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author | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2011-02-28 23:58:15 +0000 |
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committer | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2011-02-28 23:58:15 +0000 |
commit | 8e4e45185f2db2b1b0fc4b465d80682a1c6789a7 (patch) | |
tree | 772e8f4d0f2fd14940dbc78934f8911eca963a56 /spi.c | |
parent | 5fca87d961a9b218613817ada4e3ee620016fbaf (diff) | |
download | flashrom-8e4e45185f2db2b1b0fc4b465d80682a1c6789a7.tar.gz |
Update the ITE IT8500 EC support to match the current state of the
flashrom-chromium tree.
This code has been deployed and tested to work on the Cr-48.
There are a few caveats, though:
- The boot BIOS straps register must be modified to select LPC. This
can be done with the "select_bbs.sh" script (Install iotools at
http://code.google.com/p/iotools/ before using select_bbs).
- It is very important to disable power management daemons before
running flashrom on this EC. I commented out the brute force method
we use in the Chromium OS branch that disables powerd, since IIRC
Carl-Daniel has a better approach in the works.
- Due to dependencies which may be introduced by the OEM/ODM EC
firmware, the code is not guaranteed to work for anything other than
the Cr-48.
Signed-off-by: David Hendricks <dhendrix@google.com>
Carl-Daniel comments:
Code is not hooked up yet because probing needs to be sorted out.
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1263 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'spi.c')
-rw-r--r-- | spi.c | 7 |
1 files changed, 7 insertions, 0 deletions
@@ -55,6 +55,13 @@ const struct spi_programmer spi_programmer[] = { .write_256 = ich_spi_write_256, }, + { /* SPI_CONTROLLER_IT85XX */ + .command = it85xx_spi_send_command, + .multicommand = default_spi_send_multicommand, + .read = ich_spi_read, + .write_256 = ich_spi_write_256, + }, + { /* SPI_CONTROLLER_IT87XX */ .command = it8716f_spi_send_command, .multicommand = default_spi_send_multicommand, |