Various IT85* cleanups and fixes.

Fix a few typos.
Change the EC memory region mapping name.
Drop unused function parameter.
Use mmio_writeb()/mmio_readb() to get reliable access to volatile memory
locations instead of plain pointer access which is optimized away by gcc.
Use own it85_* SPI high-level chip read/write functions instead of
relying on unrelated ICH functions.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>

David writes:
I applied the patch against the Chromium OS branch and
successfully tested read and write operations on a Cr48.

Acked-by: David Hendricks <dhendrix@google.com>


git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1279 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

1 files changed, 2 insertions, 2 deletions

diff --git a/spi.c b/spi.c
index 8106360..79b5ad5 100644
--- a/spi.c
+++ b/spi.c
@@ -58,8 +58,8 @@ const struct spi_programmer spi_programmer[] = {
 	{ /* SPI_CONTROLLER_IT85XX */
 		.command = it85xx_spi_send_command,
 		.multicommand = default_spi_send_multicommand,
-		.read = ich_spi_read,
-		.write_256 = ich_spi_write_256,
+		.read = it85_spi_read,
+		.write_256 = it85_spi_write_256,
 	},
 
 	{ /* SPI_CONTROLLER_IT87XX */