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author | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2009-11-24 18:27:10 +0000 |
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committer | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2009-11-24 18:27:10 +0000 |
commit | b11957a290eee1e1df99e2ec6cbde765be984bea (patch) | |
tree | 55b9f4704024f1e845fc1c8df44a2b1bd97d6884 /spi.c | |
parent | 22eb8c5bf161e671497dec9c3ff9d0365ac8c27d (diff) | |
download | flashrom-b11957a290eee1e1df99e2ec6cbde765be984bea.tar.gz |
Add the ability to set Bus Pirate SPI speed via the command line.
Example usage:
flashrom -p buspiratespi:spispeed=2.6MHz,dev=/dev/foo
flashrom -p buspiratespi:dev=/dev/foo,spispeed=2.6M
Refactor programmer option parsing (this allows cleanups in other
programmers as well).
Increase SPI read size from 8 to 12 bytes (current single-transaction
limit of the Bus Pirate raw SPI protocol).
Add Bus Pirate to the list of programmers supporting 4 byte RDID.
Add Bus Pirate syntax to the man page.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
Tested-by: Sean Nelson <audiohacked@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@776 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'spi.c')
-rw-r--r-- | spi.c | 3 |
1 files changed, 3 insertions, 0 deletions
@@ -319,6 +319,9 @@ int probe_spi_rdid4(struct flashchip *flash) #if DUMMY_SUPPORT == 1 case SPI_CONTROLLER_DUMMY: #endif +#if BUSPIRATE_SPI_SUPPORT == 1 + case SPI_CONTROLLER_BUSPIRATE: +#endif return probe_spi_rdid_generic(flash, 4); default: printf_debug("4b ID not supported on this SPI controller\n"); |