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| author | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2008-11-28 05:40:27 +0000 |
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| committer | hailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2008-11-28 05:40:27 +0000 |
| commit | 26f9fa7080777b1ed6d1c8b06e30520a0efe9537 (patch) | |
| tree | 61376bc0e4b1059bb7776f76df178961a5ae74a9 /spi.h | |
| parent | 880f70f3e2af7eb17b1c52c8c434fb91816b5154 (diff) | |
| download | flashrom-26f9fa7080777b1ed6d1c8b06e30520a0efe9537.tar.gz | |
Original v2 revision: 3776
Add SST25VF080B flash chip support.
This is the first chip which uses the infrastructure for alternative
erase commands, namely spi_chip_erase_60_c7().
Signed-off-by: Jason Wang <Qingpei.Wang@amd.com>
Reviewed-by: Joe Bao <zheng.bao@amd.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@350 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'spi.h')
0 files changed, 0 insertions, 0 deletions