delta/flashrom.git - code.coreboot.org: Obsolete (use flashrom-git)

	Commit message (Expand)	Author	Age	Files	Lines
*	Add support for remaining Numonyx (Micron) N25Q chips.	stefanct	2013-06-28	1	-0/+5
*	Introduce spi_block_erase_db().	stefanct	2013-06-28	1	-0/+5
*	Add support for Atmel's AT25F series of SPI flash chips.	stefanct	2012-12-29	1	-4/+4
*	Add support for Atmel AT26DF041.	stefanct	2012-10-27	1	-0/+10
*	Add spi_block_erase_62.	stefanct	2012-09-21	1	-0/+5
*	dummyflasher: Add a status register to SPI chips.	stefanct	2012-05-06	1	-1/+5
*	Add support for SFDP (JESD216).	stefanct	2012-02-17	1	-0/+5
*	Add paranoid checks for correct values in essential registers in the	hailfinger	2010-08-18	1	-0/+1
*	The AAI code rewrite in r1052 introduced a bug: The writelen of AAI	hailfinger	2010-07-29	1	-5/+5
*	Add detailed status register printing and unlocking for all ATMEL AT25*	hailfinger	2010-07-29	1	-1/+2
*	Modernize SPI AAI code, blacklist IT87 SPI for AAI, allow AAI to run	hailfinger	2010-06-20	1	-0/+6
*	Some chips implement the RES (0xab) opcode, but they use a non-standard	hailfinger	2010-05-28	1	-0/+2
*	Convert chips to block_erasers:	snelson	2010-01-19	1	-0/+5
*	Add Bus Pirate SPI support to flashrom.	hailfinger	2009-11-24	1	-0/+1
*	Use a distinct return code for SPI commands with unsupported/invalid	hailfinger	2009-07-14	1	-0/+1
*	There are various reasons why a SPI command can fail. Among others, I	hailfinger	2009-05-13	1	-0/+4
*	Original v2 revision: 3781	hailfinger	2008-11-28	1	-0/+5
*	Original v2 revision: 3779	uwe	2008-11-28	1	-0/+5
*	Original v2 revision: 3775	hailfinger	2008-11-28	1	-0/+5
*	Original v2 revision: 3754	hailfinger	2008-11-15	1	-1/+1
*	Original v2 revision: 3418	stuge	2008-07-07	1	-1/+1
*	Original v2 revision: 3320	hailfinger	2008-05-15	1	-0/+5
*	Original v2 revision: 3302	hailfinger	2008-05-13	1	-0/+88