diff options
| author | stefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2012-10-27 00:06:02 +0000 |
|---|---|---|
| committer | stefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2012-10-27 00:06:02 +0000 |
| commit | 589cab162da1321f107ca8baab2c36bcfba28d83 (patch) | |
| tree | 42a78390b7e92346efe9c97c93e458eb91a75d86 /spi.h | |
| parent | ddabed468f56decd650346d5bdad65a96b1b1b91 (diff) | |
| download | flashrom-589cab162da1321f107ca8baab2c36bcfba28d83.tar.gz | |
Add support for Atmel AT26DF041.
Wicked chip: No WRSR, no write enable command (but swallows our
default one without a problem), supports an auto-erasing page write
(but even without that page writes are recommended to write the
whole page i.e. operate on a completely erased page), mad
requirements on block refreshments if only partly written.
Found on my Intel D946GZIS and tested with my serprog in situ.
Using the page write by setting JEDEC_BYTE_PROGRAM to 0x11 and using
the spi_chip_write_256 command greatly improves performance and works
flawlessly.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1616 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'spi.h')
| -rw-r--r-- | spi.h | 10 |
1 files changed, 10 insertions, 0 deletions
@@ -76,11 +76,21 @@ #define JEDEC_CE_C7_OUTSIZE 0x01 #define JEDEC_CE_C7_INSIZE 0x00 +/* Block Erase 0x50 is supported by Atmel AT26DF chips. */ +#define JEDEC_BE_50 0x50 +#define JEDEC_BE_50_OUTSIZE 0x04 +#define JEDEC_BE_50_INSIZE 0x00 + /* Block Erase 0x52 is supported by SST and old Atmel chips. */ #define JEDEC_BE_52 0x52 #define JEDEC_BE_52_OUTSIZE 0x04 #define JEDEC_BE_52_INSIZE 0x00 +/* Block Erase 0x81 is supported by Atmel AT26DF chips. */ +#define JEDEC_BE_81 0x81 +#define JEDEC_BE_81_OUTSIZE 0x04 +#define JEDEC_BE_81_INSIZE 0x00 + /* Block Erase 0xd8 is supported by EON/Macronix chips. */ #define JEDEC_BE_D8 0xd8 #define JEDEC_BE_D8_OUTSIZE 0x04 |