diff options
| author | stefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2012-05-06 17:03:40 +0000 |
|---|---|---|
| committer | stefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2012-05-06 17:03:40 +0000 |
| commit | 73f705d7813e1e6d02754f6fdb5ee310fd83a8a4 (patch) | |
| tree | 2fbeddbc906b96de794bd02794d73360124277d6 /spi.h | |
| parent | 5822735a95c43cdf7292f455b674c0649abebd94 (diff) | |
| download | flashrom-73f705d7813e1e6d02754f6fdb5ee310fd83a8a4.tar.gz | |
dummyflasher: Add a status register to SPI chips.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1532 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'spi.h')
| -rw-r--r-- | spi.h | 6 |
1 files changed, 5 insertions, 1 deletions
@@ -95,7 +95,11 @@ #define JEDEC_RDSR 0x05 #define JEDEC_RDSR_OUTSIZE 0x01 #define JEDEC_RDSR_INSIZE 0x01 -#define JEDEC_RDSR_BIT_WIP (0x01 << 0) + +/* Status Register Bits */ +#define SPI_SR_WIP (0x01 << 0) +#define SPI_SR_WEL (0x01 << 1) +#define SPI_SR_AAI (0x01 << 6) /* Write Status Enable */ #define JEDEC_EWSR 0x50 |