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authorhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2010-07-29 16:24:09 +0000
committerhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2010-07-29 16:24:09 +0000
commitcac0493246093e3142f887122e7255ab416c2db2 (patch)
tree8210f5452bb94ba4225c958302ba954e126f643f /spi.h
parent6a3f30eeaa0f0649db520b666e065da41fb3ff20 (diff)
downloadflashrom-cac0493246093e3142f887122e7255ab416c2db2.tar.gz
If we violate the raw SPI communication protocol requirements of the Bus
Pirate (namely, waiting for the completion of one command before sending the next one), we can reduce the number of round trips by a factor of 3. The FT2232 chip present in the Bus Pirate has a big enough buffer (at least 128 bytes IIRC) to avoid overflows in the tiny buffer of the Bus Pirate PIC. Thanks to Daniel Flinkmann for sponsoring development of this patch. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested-by: Daniel Flinkmann <DFlinkmann@gmx.de> Acked-by: Daniel Flinkmann <dflinkmann@gmx.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1120 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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