diff options
| author | stefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2012-09-21 12:46:56 +0000 |
|---|---|---|
| committer | stefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1> | 2012-09-21 12:46:56 +0000 |
| commit | f6ca415998f44aaafc49560aea602c3e8ad10d17 (patch) | |
| tree | 55a94a70e9662a8558667c171b33bdfe99be483e /spi.h | |
| parent | aff33539f7bd0d7b767b8e04d193db8147565d66 (diff) | |
| download | flashrom-f6ca415998f44aaafc49560aea602c3e8ad10d17.tar.gz | |
Add spi_block_erase_62.
This is used by the AT25F series (only?), but is generic enough to reside in spi25.c.
The only currently supported chip is the AT25F512B. Other members of that series
need some additional infrastructure code, hence this patch adds the erase function to
the AT25F512B only.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1600 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'spi.h')
| -rw-r--r-- | spi.h | 5 |
1 files changed, 5 insertions, 0 deletions
@@ -66,6 +66,11 @@ #define JEDEC_CE_60_OUTSIZE 0x01 #define JEDEC_CE_60_INSIZE 0x00 +/* Chip Erase 0x62 is supported by Atmel AT25F chips. */ +#define JEDEC_CE_62 0x62 +#define JEDEC_CE_62_OUTSIZE 0x01 +#define JEDEC_CE_62_INSIZE 0x00 + /* Chip Erase 0xc7 is supported by SST/ST/EON/Macronix chips. */ #define JEDEC_CE_C7 0xc7 #define JEDEC_CE_C7_OUTSIZE 0x01 |