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Build-tested on 32bit x86.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@521 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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chips in external flashers, they are not accessed via pointers at all.
Benefits:
This allows us to differentiate between volatile machine memory accesses
and flash chip accesses.
It also enforces usage of chip_{read,write}[bwl] to access flash chips,
so nobody will unintentionally use pointers to access chips anymore.
Some unneeded casts are removed as well.
Grepping for chip operations and machine memory operations doesn't yield
any false positives anymore.
Compile tested on 32 bit and 64 bit Linux.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@519 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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The semantic patch I used in r418 to make the original conversion to
accessor functions was missing one isomorphism:
a[b] <=> *(a+b)
The semantic patcher Coccinelle was used to create this patch. Semantic
patch follows:
@@
typedef uint8_t;
expression a;
volatile uint8_t *b;
@@
- b[a]
+ *(b + a)
@@
expression a;
volatile uint8_t *b;
@@
- *(b) = (a);
+ chip_writeb(a, b);
@@
volatile uint8_t *b;
@@
- *(b)
+ chip_readb(b)
@@
type T;
T b;
@@
(
chip_readb
|
chip_writeb
)
(...,
- (T)
- (b)
+ b
)
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@498 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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see IDs in the default flash location. However, sometimes the chip does
not react to the ID command, either because it doesn't understand the
command or because the command never reached it.
One way to detect this is to compare ID output with flash chip contents
for the same location. If they are identical, there is a high chance
you're not actually seeing ID output. Warn the user in that case.
This patch helps a lot when a chip is not recognized and we want to
check if the probe responses are real IDs or just random flash chip
contents.
This should probably be added to all probe functions, but probe_jedec is
called for all sizes and thus flashrom will check this condition at
least once per size, making sure we can cross-match the warning.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: FENG Yu Ning <fengyuning1984@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@494 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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FreeBSD definitions of (read|write)[bwl] collide with our own. Before we
attempt trickery, we can simply rename the accessor functions.
Patch created with the help of Coccinelle.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Idwer Vollering <idwer_v@hotmail.com>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@420 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Use helper functions to access flash chips.
Right now we perform direct pointer manipulation without any abstraction
to read from and write to memory mapped flash chips. That makes it
impossible to drive any flasher which does not mmap the whole chip.
Using helper functions readb() and writeb() allows a driver for external
flash programmers like Paraflasher to replace readb and writeb with
calls to its own chip access routines.
This patch has the additional advantage of removing lots of unnecessary
casts to volatile uint8_t * and now-superfluous parentheses which caused
poor readability.
I used the semantic patcher Coccinelle to create this patch. The
semantic patch follows:
@@
expression a;
typedef uint8_t;
volatile uint8_t *b;
@@
- *(b) = (a);
+ writeb(a, b);
@@
volatile uint8_t *b;
@@
- *(b)
+ readb(b)
@@
type T;
T b;
@@
(
readb
|
writeb
)
(...,
- (T)
- (b)
+ b
)
In contrast to a sed script, the semantic patch performs type checking
before converting anything.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: FENG Yu Ning <fengyuning1984@gmail.com>
Tested-by: Joe Julian
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@418 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Beautify flash chip ID verbose printout a little, always use %02x.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@390 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Increase delay in probe_jedec() after Product ID Entry to 10ms
We should follow data sheet timing, even if chips have been tested to answer
faster in the field.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@273 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Update comment to match delay change in probe_jedec() r3373
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@264 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Increase delay in probe_jedec() to 2ms to reliably detect AT29C020
Run time is increased a few 100ms but this is needed for reliability.
I consider this trivial.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@262 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Check the JEDEC vendor ID for correct parity. Flash chips which can be
detected by JEDEC probe routines all have vendor IDs with correct
parity. Use a parity check as additional hint whether a vendor ID makes
sense.
Note: Device IDs have no parity requirements whatsoever.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@231 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Add continuation ID support to jedec.c
The continuation ID code does not go further than checking for IDs of
the type 0x7fXX, but does this for vendor and product ID. The current
published JEDEC spec has a list where the largest vendor ID is 7 bytes
long, but all leading bytes are 0x7f. The list will grow in the future,
and using a 64bit variable will not be enough anymore.
Besides that, it seems that the location of the ID byte after the first
continuation ID byte is very vendor specific, so we may have to revisit
that code some time in the future.
(Suggestion for a new encoding:
Use a two-byte data type for the ID, the lower byte contains the only
non-0x7f byte, the upper byte contains the number of 0x7f bytes used as
prefix, which is the bank number minus 1 the vendor ID appears in.)
Add support for EON EN29F002AT.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Corey Osgood <corey.osgood@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@171 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Fix ATMEL 29C020 detection with flashrom. The JEDEC probe routine had
a delay of 10 us after entering ID mode and this was insufficient for
the 29C020. The data sheet claims we have to wait 10 ms, but tests have
shown that 20 us suffice. Allow for variations in chip delays with a
factor of 2 safety margin.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@159 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Some cosmetic cleanups in the flashrom code and output.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@151 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Changes to flashrom to support the K8N-NEO3, first tested at Google on GSOC day :-)
Also minor changes to remove tab-space combinations where possible.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Signed-off-by: David Hendricks <david.hendricks@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@144 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Add '(C)' where it's missing (for consistency reasons).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@136 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Change all flashrom license headers to use our standard format.
No changes in content of the files.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@131 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Cosmetic fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@130 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Drop a bunch of useless header files, merge them into flash.h.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@128 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Move code into *.c files, there's no reason to have it in header files.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@127 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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big cosmetic offensive on flashrom. (trivial)
* Give decent names to virt_addr and virt_addr_2
* add some comments
* move virtual addresses to the end of the struct,
so they dont mess up the initializer.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@111 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Fix coding style of flashrom by running indent on all files:
indent -npro -kr -i8 -ts8 -sob -l80 -ss -ncs *.[ch]
Some minor fixups were required, and maybe a few more cosmetic
changeѕ are needed.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@108 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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apply patch from Giampiero Giancipoli <gianci@email.it>:
Fixed write_page_write_jedec() in jedec.c. Added a check-reprogram loop
in the same function, to come around the high page write failure rate on
some boards.
This patch includes the changes suggested by Ron to simplify the control
flow.
It also includes trivial changes by me to make flashrom build on newer
systems (libpci needs libz now). I also made a small type case compile fix
and proper return code handling in one or two places.
Signed-off-by: Giampiero Giancipoli <gianci@email.it>
Signed-off-by: Ronald G Minnich <rminnich@gmail.com>
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@78 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Removing $Id$ tags as they have no meaning in SVN
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@60 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flasrom update from Stefan, resovle issue 21
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@34 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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added -E option for chip erase, remove duplicated code
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@30 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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add retry to write_byte_program_jedec(), 99% success rate
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@29 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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SST49LF00[2,3,4] should use
the same driver as 49LF008
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@27 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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support for sst firmware hub
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@25 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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data tye consistence
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@20 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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removed false alarm of erase/write, use verify '-v' if you are not sure about the integrity
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@19 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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more jedec standard consolidatation.
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@18 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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rmove unused #define and function declaretion
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@17 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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consolidate more jedec standard code
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@15 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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remove duplicated code
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@14 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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due to popular demand, added flash_and_burn to the freebios2 tree.
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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