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* Rename programmer registration functionshailfinger2014-07-191-2/+2
| | | | | | | | | | | | | register_programmer suggests that we register a programmer. However, that function registers a master for a given bus type, and a programmer may support multiple masters (e.g. SPI, FWH). Rename a few other functions to be more consistent. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1831 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Move global io_base_addr into compilation units.stefanct2014-06-011-0/+1
| | | | | | | Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1813 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add additional error handling to pcidev_readbar() callers.stefanct2013-08-231-0/+2
| | | | | | | | | | | This is mostly a leftover of Niklas' "remove exit call from pcidev_init" patch. While not explicitly necessary detecting errors early is usually a good idea. Signed-off-by: Niklas Söderlund <niso@kth.se> Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1718 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Decouple BAR reading from pci device init, handle errors gracefully.hailfinger2013-01-051-3/+8
| | | | | | | | | | | | | | | | pcidev_init() now returns struct pci_device * instead of a BAR stored in PCI config space. This allows for real error checking instead of having exit(1) everywhere in pcidev.c. Thanks to Niklas Söderlund for coming up with the original error handling patch which was slightly modified and folded into this patch. Move the declaration of struct pci_device in programmer.h before the first user. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1644 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Unify PCI init and let pcidev clean itself up.stefanct2013-01-041-1/+1
| | | | | | | | | | | | | | | | | | | Previously the internal programmer used its own code to initialize pcilib. This patch extracts the common code from the internal programmer and pcidev_init() into pcidev_init_common(). This fixes the non-existent PCI cleanup of the internal programmer and adds an additional safety by checking for an already existing PCI context. We got a nice shutdown function registration infrastructure, but did not use it very wisely. Instead we added shutdown functions to a myriad of programmers unnecessarily. In this patch we get rid of those that do only call pci_cleanup(pacc) by adding a shutdown function the pcidev.c itself that gets registered by pcidev_init(). Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1642 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Unify usbdev_status and pcidev_status into dev_entry.stefanct2012-12-271-1/+1
| | | | | | | | | | | | | | | | | | | Once upon a time usbdev_status was created for the ft2232 programmer. Its IDs are semantically different to pcidev_status because they indicate USB instead of PCI IDs, but apart from that both data structures are equal. This change makes life easier for everything involved in handling and printing the status of devices that is noted in those structures by combining them into dev_entry. It is still possible to distinguish between PCI and USB devices indirectly by using the struct programmer's type field. Also, add a programmer column to the PCI and USB devices lists. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1632 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Some ISO C fixes.stefanct2012-08-271-1/+1
| | | | | | | | | | | | | | | | | This patch just fixes a limited number of bits not conforming to c99 by using - __asm__ instead of just asm - {0} instead of {} for struct initialization - h_addr_list[0] instead of h_addr to access the host address in struct hostent - #include <strings.h> where needed (for ffs and strcasecmp) Based on a previous patch by Carl-Daniel. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1585 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Automatically release I/O permissions on shutdown.hailfinger2012-07-211-2/+2
| | | | | | | | | | | | | | | | | | | | | | get_io_perms() is renamed to rget_io_perms() and automatically registers a function to release I/O permissions on shutdown. Actually release I/O permissions on Solaris and iopl()-supporting operating systems like Linux. This patch fixes quite a few programmers which forgot to release I/O permissions on shutdown, and it simplifies the shutdown and error handling code for all others. Do not call exit(1) if I/O permissions are denied and return an error instead. This part of the patch was written by Niklas Söderlund. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Niklas Söderlund <niso@kth.se> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1551 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Hide hwaccess.h from public API.hailfinger2012-07-201-0/+1
| | | | | | | | | | | | | | Move hwaccess.h #include from flash.h to individual drivers. libflashrom users need flash.h, but they do not care about hwaccess.h and should not see its definitions because they may conflict with other hardware access functions and #defines used by the libflashrom user. Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1549 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add struct flashctx * parameter to all functions accessing flash chips.hailfinger2011-12-181-2/+8
| | | | | | | | | | | | | | | | | All programmer access function prototypes except init have been made static and moved to the respective file. A few internal functions in flash chip drivers had chipaddr parameters which are no longer needed. The lines touched by flashctx changes have been adjusted to 80 columns except in header files. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1474 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Register Parallel/LPC/FWH programmers the same way SPI programmers are ↵hailfinger2011-11-091-3/+15
| | | | | | | | | | | | | | | | | | | | | registered. All programmers are now calling programmer registration functions and direct manipulations of buses_supported are not needed/possible anymore. Note: Programmers without parallel/LPC/FWH chip support should not call register_par_programmer(). Additional fixes: Set max_rom_decode.parallel for drkaiser. Remove abuse of programmer_map_flash_region in it85spi. Annotate several FIXMEs in it85spi. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-By: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1463 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Rename CHIP_BUSTYPE_FOO to BUS_FOO.hailfinger2011-07-271-1/+1
| | | | | | | | | | It's shorter to type, and we have less problems with the 80 column limit. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1396 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Use shutdown callback mechanism to shutdown programmersdhendrix2011-06-141-15/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch attempts to resolve some programmer shutdown ordering issues by having the programmer init functions register shutdown callbacks explicitly wherever it makes most sense. Before, assumptions were made that could lead to the internal programmer's state changing before the external programmer could be shut down properly. Now, each programmer cleans up after itself and (hopefully) performs each operation in the correct order. As a side-effect, this patch gives us a better usage model for reverse operations such as rpci_* and rmmio_*. In the long-run, this should make reversing the initialization process easier to understand, less tedious, and less error-prone. In short, this patch does the following: - Registers a shutdown callback during initialization for each programmer. - Kills the .shutdown function pointer from programmer_entry struct. Also, make most shutdown functions static. - Adds a few minor clean-ups and corrections (e.g. missing physunmap() calls). TODO: Remove forward declaration of serprog_shutdown() (added to simplify diff) Signed-off-by: David Hendricks <dhendrix@google.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1338 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Simplify pcidev_init by killing the vendorid parameter which was prettyhailfinger2011-03-071-2/+1
| | | | | | | | | | | | | | | useless anyway since it was present in the pcidevs parameter as well. This also allows us to handle multiple programmers with different vendor IDs in the same driver. Fix compilation of flashrom with only the nicrealtek driver. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1274 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Split off programmer.h from flash.h.hailfinger2010-07-271-0/+1
| | | | | | | | | | | | | | | | | | | | | | Programmer specific functions are of absolutely no interest to any file except those dealing with programmer specific actions (special SPI commands and the generic core). The new header structure is as follows (and yes, improvements are possible): flashchips.h flash chip IDs chipdrivers.h chip-specific read/write/... functions flash.h common header for all stuff that doesn't fit elsewhere hwaccess.h hardware access functions programmer.h programmer specific functions coreboot_tables.h header from coreboot, internal programmer only spi.h SPI command definitions Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1112 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Various places in the flashrom source feature custom parameterhailfinger2010-07-061-2/+2
| | | | | | | | | | | | | | | | | | | | extraction from programmer_param. This led to wildly differing syntax for programmer parameters, and it also voids pretty much every assumption you could make about programmer_param. The latter is a problem for libflashrom. Use extract_param everywhere, clean up related code and make it more foolproof. Add two instances of exit(1) where we have no option to return an error. Remove six instances of exit(1) where returning an error was possible. WARNING: This changes programmer parameter syntax for a few programmers! Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1070 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Kill global variables, constants and functions if local scope suffices.hailfinger2010-07-031-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | Constify variables where possible. Initialize programmer-related variables explicitly in programmer_init to allow running programmer_init from a clean state after programmer_shutdown. Prohibit registering programmer shutdown functions before init or after shutdown. Kill some dead code. Rename global variables with namespace-polluting names. Use a previously unused locking helper function in sst49lfxxxc.c. This is needed for libflashrom. Effects on the binary size of flashrom are minimal (300 bytes shrinkage), but the data section shrinks by 4384 bytes, and that's a good thing if flashrom is operating in constrained envionments. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1068 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Set maximum flash size for 3Com NICs to 128kb = 1Mbitstuge2010-06-171-0/+1
| | | | | | | | | | This fact was already documented on http://flashrom.org/NIC3Com Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1049 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Remove unneeded #include statements completely.hailfinger2010-05-301-2/+0
| | | | | | | | | | | | | | | | unistd.h was only used to get a definition of NULL in all files. Add our own NULL #define and remove unistd.h from flash.h stdio.h has no place in flash.h, it should be included only in files which really need it. Add #include statements in individual .c files where needed. Replace a few printf with msg_* to eliminate the need for stdio.h. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1021 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Handle the following architectures in generic flashrom code:hailfinger2010-05-261-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - x86/x86_64 (little endian) - PowerPC (big endian) - MIPS (big+little endian) No changes to programmer specific code. This means any drivers with MMIO access will _not_ suddenly start working on big endian systems, but with this patch everything is in place to fix them. Compilation should work on all architectures listed above for all drivers except nic3com and nicrealtek which require PCI Port IO which is x86-only for now. To compile without nic3com and nicrealtek, run make distclean make CONFIG_NIC3COM=no CONFIG_NICREALTEK=no Thanks to Misha Manulis for testing early versions of this patch on PowerPC (big endian) with the satasii programmer. Thanks to Segher Boessenkool for design review and for helping out with compiler tricks and pointing out that we need eieio on PowerPC. Thanks to Vladimir Serbinenko for compile testing on MIPS (little endian) and PowerPC (big endian) and for runtime testing on MIPS (little endian). Thanks to David Daney for compile testing on MIPS (big endian). Thanks to Uwe Hermann for compile and runtime testing on x86_64. DO NOT RUN FLASHROM ON NON-X86 AFTER APPLYING THIS PATCH! This patch only provides the infrastructure, but does not convert any drivers, so flashrom will compile, but it won't do the right thing on non-x86 platforms. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Misha Manulis <misha@manulis.com> Acked-by: Vladimir 'phcoder/φ-coder' Serbinenko <phcoder@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Segher Boessenkool <segher@kernel.crashing.org> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1013 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Replace PCI_OK/PCI_NT by OK/NTmkarcher2010-02-241-10/+10
| | | | | | | | | | We don't need to duplicate OK and NT as PCI_OK and PCI_NT if the symbols are already there (defined for the chipset enable table). Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@911 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for parallel flash on Dr. Kaiser PC-Waechter PCI devices.uwe2009-09-021-1/+2
| | | | | | | | | | | | | | | | The vendor sold different designs under that name, the patch works with the one that has an Actel FPGA as PCI-to-Flash bridge. The Flash chip is a "Macronix MX29F001B" (128 KB, parallel) soldered directly to the PCB. Flash operations (PROBE, READ, ERASE, WRITE) work as expected. Signed-off-by: TURBO J <turboj@gmx.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@712 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* "3COM 3C90xB: PCI 10BASE-T (TPO)" (10b7:9004) works fine.hailfinger2009-08-241-1/+1
| | | | | | | | | | Reported by Mark Panajotovic <panajotovic.marko@gmail.com>. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@699 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Use a common parameter variable for all programmers. This allows us tohailfinger2009-08-121-2/+2
| | | | | | | | | | | reduce #ifdef clauses a lot if we compile out some programmers completely. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@679 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Releasing IO permissions was done by hand everywhere. Use a properhailfinger2009-08-091-6/+1
| | | | | | | | | | | abstraction. Kill unneeded #include statements. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@672 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Mark the 10b7:9058 3COM card (3C905B: Cyclone 10/100/BNC) as "OK", forgotuwe2009-06-021-1/+1
| | | | | | | | | | | this in the last commit. Also do some random cleanups while I'm at it. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@567 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for the 10b7:9058 3COM NIC (3C905B: Cyclone 10/100/BNC).uwe2009-06-021-2/+3
| | | | | | | | | | | | | Also, add Atmel AT29C512 support. Both are tested on hardware by Maciej Pijanka. Signed-off-by: Maciej Pijanka <maciej.pijanka@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@566 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Only probe for chips with compatible bus protocols.hailfinger2009-06-011-0/+2
| | | | | | | | | | | | | | | | | | | It doesn't make sense to probe for SPI chips on a LPC host, nor does it make sense to probe for LPC chips on a Parallel host. This change is backwards compatible, but adding host protocol info to chipset init functions will speed up probing. Once all chipset init functions are updated and the Winbond W29EE011 and AMIC A49LF040A chip definitions are updated, the W29EE011 workaround can be deleted as the W29/A49 conflict magically disappears. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested on real hardware and Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@560 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Documentation improvements and small code/whitespace fixes (trivial).uwe2009-05-191-5/+1
| | | | | | | | | Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@535 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Factor out fallback_map/unmap, most external programmers don't needuwe2009-05-171-9/+0
| | | | | | | | | | | and special handling here (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@531 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add proper workaround for 3COM 3C90xB cards, which need special fixupsuwe2009-05-161-1/+25
| | | | | | | | | | | | | | | | (the 3C90xC ones don't). This is tested on hardware. Also, add initial support for the Atmel AT29C010A chip (which I inserted in a 3COM 3C90xB card for testing). It can be detected, read works, erase works, but write will need some additional code (will post in another patch later). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@520 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Use chipaddr instead of volatile uint8_t * because when we accesshailfinger2009-05-161-4/+4
| | | | | | | | | | | | | | | | | | | | | chips in external flashers, they are not accessed via pointers at all. Benefits: This allows us to differentiate between volatile machine memory accesses and flash chip accesses. It also enforces usage of chip_{read,write}[bwl] to access flash chips, so nobody will unintentionally use pointers to access chips anymore. Some unneeded casts are removed as well. Grepping for chip operations and machine memory operations doesn't yield any false positives anymore. Compile tested on 32 bit and 64 bit Linux. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@519 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add generic 16 bit and 32 bit chip read/write emulation to the externalhailfinger2009-05-161-18/+0
| | | | | | | | | | | | | flasher infrastructure. The emulation works by splitting 32 bit accesses into 16 bit accesses and 16 bit accesses into to 8 bit accesses. That way, external flashers can mix and match the amount of emulation they need. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@517 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Refactor parts of the 3COM NIC code.uwe2009-05-151-88/+12
| | | | | | | | | | | | | | | | | Move the reusable PCI specific parts into pcidev.c, they'll be usable for other NIC code (Realtek, VIA, ...) and also for SATA/IDE controller cards as external programmers (for every PCI device which can program EEPROMs basically). Also add print_supported_pcidevs() to show the supported PCI devices (currently only NICs, soon more) in the 'flashrom -L' output. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@515 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Make the nic3com code check how many supported NICs are found. If we finduwe2009-05-141-17/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | multiple ones, abort with a message to the user, suggesting to use the flashrom -p nic3com=bb:dd.f syntax. If exactly one supported NIC is found, use it. If none is found, abort with an error. Print the bb:dd.f numbers for all supported NICs we find, so the user doesn't have to poke around in lspci output to find the desired bb:dd.f. Also, drop one pci_read_long() in favor of using the already existing base_addr[0] struct field. Drop the BAR in user messages, it's not really useful for us. Instead, explain the BDF syntax a bit more verbosely. While I'm at it, update the manpage some more to mention and fully document the external programmer support we have (or will have soon). The patch is tested on hardware: $ flashrom -p nic3com flashrom v0.9.0-r512 Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200, BDF 05:04.0) Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200, BDF 05:03.0) Error: Multiple supported NICs found. Please use 'flashrom -p nic3com=bb:dd.f' to explicitly select the card with the given BDF (PCI bus, device, function). $ flashrom -p nic3com=05:04.0 flashrom v0.9.0-r512 Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200, BDF 05:04.0) Calibrating delay loop... OK. Found chip "Atmel AT49BV512" (64 KB) at physical address 0xffff0000. No operations were specified. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@513 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Fix compilation of nic3com on 64bit.hailfinger2009-05-141-2/+2
| | | | | | | | Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@512 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Factor out portable iopl()-style code into a global functionuwe2009-05-141-15/+4
| | | | | | | | | | | which all programmers can use, add missing close() call (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@511 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* 3COM: Add support for users to specify a certain NIC via PCI bus:slot.funcuwe2009-05-141-21/+47
| | | | | | | | | | | | | notation, in case there are multiple NICs in one system. Usage: flashrom -p nic3com=bb:ss.f Signed-off-by: Christian Ruppert <spooky85@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@510 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Fix nic3com.c build issues on *BSD (trivial).uwe2009-05-131-1/+7
| | | | | | | | | Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@501 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for 3COM NICs as "external programmer" and Atmel AT49BV512.uwe2009-05-131-0/+170
This allows flashrom to identify, read, write, erase and verify flash chips on (some) 3COM network cards. The patch uses the external programmer infrastructure, the network card is basically treated as an external flash programmer. Usage: $ ./flashrom -p nic3com flashrom v0.9.0-r498 Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200), addr = 0xa400 Calibrating delay loop... OK. Found chip "Atmel AT49BV512" (64 KB) at physical address 0xffff0000. No operations were specified. $ ./flashrom -p nic3com -E flashrom v0.9.0-r498 Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200), addr = 0xa400 Calibrating delay loop... OK. Found chip "Atmel AT49BV512" (64 KB) at physical address 0xffff0000. Erasing flash chip... SUCCESS. $ ./flashrom -p nic3com -wv backup.bin flashrom v0.9.0-r498 Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200), addr = 0xa400 Calibrating delay loop... OK. Found chip "Atmel AT49BV512" (64 KB) at physical address 0xffff0000. Flash image seems to be a legacy BIOS. Disabling checks. Programming page: 1023 at address: 0x0000ffc0 Verifying flash... VERIFIED. $ ./flashrom -p nic3com -r backup.bin flashrom v0.9.0-r498 Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200), addr = 0xa400 Calibrating delay loop... OK. Found chip "Atmel AT49BV512" (64 KB) at physical address 0xffff0000. Reading flash... done. I have tested this on actual hardware (see PCI IDs above) and all operations worked fine. Support for other 3COM cards will follow (I added some more which should be supportable by this code, but they're untested so far), as well as support for NICs from other vendors. The patch also adds support for the Atmel AT49BV512 which is soldered onto the 3COM NIC I used for testing. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Mateusz Murawski <matowy@tlen.pl> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@499 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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