| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | The SPI opcode 0xd8 is not a chip erase opcode on any chip out there. | hailfinger | 2010-06-20 | 1 | -23/+0 |
| * | Modernize SPI AAI code, blacklist IT87 SPI for AAI, allow AAI to run | hailfinger | 2010-06-20 | 1 | -13/+64 |
| * | Fix message printing for SPI RES on spew level. | hailfinger | 2010-06-20 | 1 | -22/+16 |
| * | So far, we have up to 4 different names for the same thing (ignoring | hailfinger | 2010-05-31 | 1 | -6/+6 |
| * | Some chips implement the RES (0xab) opcode, but they use a non-standard | hailfinger | 2010-05-28 | 1 | -6/+32 |
| * | Handle the following architectures in generic flashrom code: | hailfinger | 2010-05-26 | 1 | -0/+4 |
| * | Every SPI programmer driver had its own completely different chip write | hailfinger | 2010-05-21 | 1 | -2/+48 |
| * | Convert chips' message printing to msg_c* | snelson | 2010-03-24 | 1 | -69/+58 |
| * | Split spi.c into programmer and chip code | snelson | 2010-02-26 | 1 | -0/+992 |
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index : delta/flashrom.git | |
| code.coreboot.org: Obsolete (use flashrom-git) |
| summaryrefslogtreecommitdiff |