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authorflorian <florian@3ad0048d-3df7-0310-abae-a5850022a9f2>2013-04-25 20:23:51 +0000
committerflorian <florian@3ad0048d-3df7-0310-abae-a5850022a9f2>2013-04-25 20:23:51 +0000
commit8728e095105c989b760ccd6aba8655f6f44e1285 (patch)
tree519c6c43af90e6eedb0755412a5dd5ca4e2ed930 /compiler
parent0f33efaa8fe401d95fa11b53b3bfbb7315060051 (diff)
parent0980e6ba55dee5179db444146b682a72a70763f7 (diff)
downloadfpc-8728e095105c989b760ccd6aba8655f6f44e1285.tar.gz
* merge i8086 branch by Nikolay Nikolov
git-svn-id: http://svn.freepascal.org/svn/fpc/trunk@24324 3ad0048d-3df7-0310-abae-a5850022a9f2
Diffstat (limited to 'compiler')
-rw-r--r--compiler/Makefile.fpc22
-rw-r--r--compiler/aasmtai.pas19
-rw-r--r--compiler/cg64f32.pas24
-rw-r--r--compiler/cgbase.pas16
-rw-r--r--compiler/cgobj.pas12
-rw-r--r--compiler/cgutils.pas6
-rw-r--r--compiler/cutils.pas38
-rw-r--r--compiler/defutil.pas161
-rw-r--r--compiler/fpcdefs.inc17
-rw-r--r--compiler/globals.pas5
-rw-r--r--compiler/globtype.pas6
-rw-r--r--compiler/hlcg2ll.pas63
-rw-r--r--compiler/hlcgobj.pas175
-rw-r--r--compiler/i8086/cgcpu.pas1521
-rw-r--r--compiler/i8086/cpubase.inc149
-rw-r--r--compiler/i8086/cpuinfo.pas130
-rw-r--r--compiler/i8086/cpunode.pas60
-rw-r--r--compiler/i8086/cpupara.pas716
-rw-r--r--compiler/i8086/cpupi.pas100
-rw-r--r--compiler/i8086/cputarg.pas88
-rw-r--r--compiler/i8086/hlcgcpu.pas203
-rw-r--r--compiler/i8086/i8086att.inc947
-rw-r--r--compiler/i8086/i8086atts.inc947
-rw-r--r--compiler/i8086/i8086int.inc947
-rw-r--r--compiler/i8086/i8086nop.inc2
-rw-r--r--compiler/i8086/i8086op.inc947
-rw-r--r--compiler/i8086/i8086prop.inc947
-rw-r--r--compiler/i8086/i8086tab.inc11567
-rw-r--r--compiler/i8086/n8086add.pas682
-rw-r--r--compiler/i8086/n8086inl.pas80
-rw-r--r--compiler/i8086/n8086mat.pas475
-rw-r--r--compiler/i8086/r8086ari.inc82
-rw-r--r--compiler/i8086/r8086att.inc82
-rw-r--r--compiler/i8086/r8086con.inc82
-rw-r--r--compiler/i8086/r8086dwrf.inc82
-rw-r--r--compiler/i8086/r8086int.inc82
-rw-r--r--compiler/i8086/r8086iri.inc82
-rw-r--r--compiler/i8086/r8086nasm.inc82
-rw-r--r--compiler/i8086/r8086nor.inc2
-rw-r--r--compiler/i8086/r8086nri.inc82
-rw-r--r--compiler/i8086/r8086num.inc82
-rw-r--r--compiler/i8086/r8086op.inc82
-rw-r--r--compiler/i8086/r8086ot.inc82
-rw-r--r--compiler/i8086/r8086rni.inc82
-rw-r--r--compiler/i8086/r8086sri.inc82
-rw-r--r--compiler/i8086/r8086stab.inc82
-rw-r--r--compiler/i8086/r8086std.inc82
-rw-r--r--compiler/i8086/ra8086att.pas59
-rw-r--r--compiler/i8086/ra8086int.pas74
-rw-r--r--compiler/i8086/rgcpu.pas111
-rw-r--r--compiler/jvm/hlcgcpu.pas72
-rw-r--r--compiler/link.pas7
-rw-r--r--compiler/nadd.pas67
-rw-r--r--compiler/ncal.pas7
-rw-r--r--compiler/ncgflw.pas89
-rw-r--r--compiler/ncginl.pas3
-rw-r--r--compiler/ncgmat.pas48
-rw-r--r--compiler/ncgmem.pas24
-rw-r--r--compiler/ncgset.pas95
-rw-r--r--compiler/ncgutil.pas36
-rw-r--r--compiler/ncnv.pas2
-rw-r--r--compiler/nflw.pas65
-rw-r--r--compiler/ninl.pas276
-rw-r--r--compiler/nmat.pas109
-rw-r--r--compiler/optdfa.pas21
-rw-r--r--compiler/options.pas15
-rw-r--r--compiler/optutils.pas5
-rw-r--r--compiler/pdecvar.pas8
-rw-r--r--compiler/pexpr.pas4
-rw-r--r--compiler/powerpc64/hlcgcpu.pas4
-rw-r--r--compiler/pp.pas7
-rw-r--r--compiler/ppc8086.lpi145
-rw-r--r--compiler/ppu.pas14
-rw-r--r--compiler/psub.pas6
-rw-r--r--compiler/ptype.pas7
-rw-r--r--compiler/scanner.pas6
-rw-r--r--compiler/symconst.pas6
-rw-r--r--compiler/symdef.pas37
-rw-r--r--compiler/symsym.pas4
-rw-r--r--compiler/systems.inc9
-rw-r--r--compiler/systems.pas12
-rw-r--r--compiler/systems/i_android.pas4
-rw-r--r--compiler/systems/i_beos.pas4
-rw-r--r--compiler/systems/i_bsd.pas4
-rw-r--r--compiler/systems/i_emx.pas4
-rw-r--r--compiler/systems/i_go32v2.pas4
-rw-r--r--compiler/systems/i_haiku.pas4
-rw-r--r--compiler/systems/i_linux.pas4
-rw-r--r--compiler/systems/i_msdos.pas102
-rw-r--r--compiler/systems/i_nativent.pas4
-rw-r--r--compiler/systems/i_nwl.pas4
-rw-r--r--compiler/systems/i_nwm.pas4
-rw-r--r--compiler/systems/i_os2.pas4
-rw-r--r--compiler/systems/i_sunos.pas4
-rw-r--r--compiler/systems/i_symbian.pas4
-rw-r--r--compiler/systems/i_watcom.pas4
-rw-r--r--compiler/systems/i_wdosx.pas4
-rw-r--r--compiler/systems/i_win.pas4
-rw-r--r--compiler/systems/t_msdos.pas329
-rw-r--r--compiler/utils/ppuutils/ppudump.pp6
-rw-r--r--compiler/version.pas4
-rw-r--r--compiler/x86/aasmcpu.pas127
-rw-r--r--compiler/x86/agx86int.pas31
-rw-r--r--compiler/x86/agx86nsm.pas76
-rw-r--r--compiler/x86/cgx86.pas71
-rw-r--r--compiler/x86/cpubase.pas100
-rw-r--r--compiler/x86/itcpugas.pas31
-rw-r--r--compiler/x86/itx86int.pas14
-rw-r--r--compiler/x86/nx86add.pas4
-rw-r--r--compiler/x86/nx86inl.pas62
-rw-r--r--compiler/x86/nx86set.pas139
-rw-r--r--compiler/x86/rax86att.pas3
112 files changed, 24234 insertions, 687 deletions
diff --git a/compiler/Makefile.fpc b/compiler/Makefile.fpc
index 10cdc6a15b..f1fcd68563 100644
--- a/compiler/Makefile.fpc
+++ b/compiler/Makefile.fpc
@@ -32,7 +32,7 @@ fpcdir=..
unexport FPC_VERSION FPC_COMPILERINFO
# Which platforms are ready for inclusion in the cycle
-CYCLETARGETS=i386 powerpc sparc arm x86_64 powerpc64 m68k armeb mipsel mips avr jvm
+CYCLETARGETS=i386 powerpc sparc arm x86_64 powerpc64 m68k armeb mipsel mips avr jvm i8086
# All supported targets used for clean
ALLTARGETS=$(CYCLETARGETS)
@@ -77,6 +77,9 @@ endif
ifdef JVM
PPC_TARGET=jvm
endif
+ifdef I8086
+PPC_TARGET=i8086
+endif
# Default is to generate a compiler for the same
# platform as CPU_TARGET (a native compiler)
@@ -193,6 +196,9 @@ endif
ifeq ($(CPC_TARGET),jvm)
CPUSUF=jvm
endif
+ifeq ($(CPC_TARGET),i8086)
+CPUSUF=8086
+endif
# Do not define the default -d$(CPU_TARGET) because that
# will conflict with our -d$(CPC_TARGET)
@@ -279,6 +285,11 @@ ifeq ($(PPC_TARGET),jvm)
override LOCALOPT+=-Fujvm -dNOOPT
endif
+# i8086 specific
+ifeq ($(PPC_TARGET),i8086)
+override LOCALOPT+=-Fux86 -dNOOPT
+endif
+
OPTWPOCOLLECT=-OWdevirtcalls,optvmts -FW$(BASEDIR)/pp1.wpo
OPTWPOPERFORM=-Owdevirtcalls,optvmts -Fw$(BASEDIR)/pp1.wpo
# symbol liveness WPO requires nm, smart linking and no stripping (the latter
@@ -303,6 +314,9 @@ endif
ifeq ($(OS_TARGET),gba)
NoNativeBinaries=1
endif
+ifeq ($(OS_TARGET),msdos)
+NoNativeBinaries=1
+endif
[rules]
#####################################################################
@@ -377,7 +391,7 @@ endif
# CPU targets
#####################################################################
-PPC_TARGETS=i386 m68k powerpc sparc arm armeb x86_64 powerpc64 alpha vis ia64 mips mipsel avr jvm
+PPC_TARGETS=i386 m68k powerpc sparc arm armeb x86_64 powerpc64 alpha vis ia64 mips mipsel avr jvm i8086
INSTALL_TARGETS=$(addsuffix _exe_install,$(sort $(CYCLETARGETS) $(PPC_TARGETS)))
.PHONY: $(PPC_TARGETS) $(INSTALL_TARGETS)
@@ -432,12 +446,12 @@ tempclean:
-$(DEL) $(PPCROSSNAME) $(TEMPNAME) $(TEMPNAME1) $(TEMPNAME2) $(TEMPNAME3) $(MSG2INC) pp1.wpo pp2.wpo
execlean :
- -$(DEL) ppc386$(EXEEXT) ppc68k$(EXEEXT) ppcx64$(EXEEXT) ppcppc$(EXEEXT) ppcsparc$(EXEEXT) ppcppc64$(EXEEXT) ppcarm$(EXEEXT) ppcmips$(EXEEXT) ppcmipsel$(EXEEXT) ppcjvm$(EXEEXT) $(EXENAME) $(TEMPWPONAME1) $(TEMPWPONAME2)
+ -$(DEL) ppc386$(EXEEXT) ppc68k$(EXEEXT) ppcx64$(EXEEXT) ppcppc$(EXEEXT) ppcsparc$(EXEEXT) ppcppc64$(EXEEXT) ppcarm$(EXEEXT) ppcmips$(EXEEXT) ppcmipsel$(EXEEXT) ppcjvm$(EXEEXT) ppc8086$(EXEEXT) $(EXENAME) $(TEMPWPONAME1) $(TEMPWPONAME2)
$(addsuffix _clean,$(ALLTARGETS)):
-$(DELTREE) $(addprefix $(subst _clean,,$@),/units)
-$(DEL) $(addprefix $(subst _clean,,$@)/,*$(OEXT) *$(PPUEXT) *$(RSTEXT) *$(ASMEXT) *$(STATICLIBEXT) *$(SHAREDLIBEXT) *$(PPLEXT))
- -$(DEL) $(addprefix $(subst _clean,,$@)/,ppc386$(EXEEXT) ppc68k$(EXEEXT) ppcx64$(EXEEXT) ppcppc$(EXEEXT) ppcsparc$(EXEEXT) ppcppc64$(EXEEXT) ppcarm$(EXEEXT) ppcmips$(EXEEXT) ppcmipsel$(EXEEXT) ppcjvm$(EXEEXT) $(EXENAME))
+ -$(DEL) $(addprefix $(subst _clean,,$@)/,ppc386$(EXEEXT) ppc68k$(EXEEXT) ppcx64$(EXEEXT) ppcppc$(EXEEXT) ppcsparc$(EXEEXT) ppcppc64$(EXEEXT) ppcarm$(EXEEXT) ppcmips$(EXEEXT) ppcmipsel$(EXEEXT) ppcjvm$(EXEEXT) ppc8086$(EXEEXT) $(EXENAME))
cycleclean: cleanall $(addsuffix _clean,$(CPC_TARGET))
-$(DEL) $(EXENAME)
diff --git a/compiler/aasmtai.pas b/compiler/aasmtai.pas
index 1fe67c684b..1d048b03d5 100644
--- a/compiler/aasmtai.pas
+++ b/compiler/aasmtai.pas
@@ -142,19 +142,26 @@ interface
);
const
-{$ifdef cpu64bitaddr}
+{$if defined(cpu64bitaddr)}
aitconst_ptr = aitconst_64bit;
aitconst_ptr_unaligned = aitconst_64bit_unaligned;
-{$else cpu64bitaddr}
+{$elseif defined(cpu32bitaddr)}
aitconst_ptr = aitconst_32bit;
aitconst_ptr_unaligned = aitconst_32bit_unaligned;
-{$endif cpu64bitaddr}
+{$elseif defined(cpu16bitaddr)}
+ aitconst_ptr = aitconst_16bit;
+ aitconst_ptr_unaligned = aitconst_16bit_unaligned;
+{$endif}
-{$ifdef cpu64bitalu}
+{$if defined(cpu64bitalu)}
aitconst_aint = aitconst_64bit;
-{$else cpu64bitaddr}
+{$elseif defined(cpu32bitalu)}
aitconst_aint = aitconst_32bit;
-{$endif cpu64bitaddr}
+{$elseif defined(cpu16bitalu)}
+ aitconst_aint = aitconst_16bit;
+{$elseif defined(cpu8bitalu)}
+ aitconst_aint = aitconst_8bit;
+{$endif}
taitypestr : array[taitype] of string[24] = (
'<none>',
diff --git a/compiler/cg64f32.pas b/compiler/cg64f32.pas
index c9eb416d7f..2ab68d16d7 100644
--- a/compiler/cg64f32.pas
+++ b/compiler/cg64f32.pas
@@ -219,10 +219,10 @@ unit cg64f32;
begin
if target_info.endian = endian_big then
swap64(value);
- cg.a_load_const_ref(list,OS_32,aint(lo(value)),ref);
+ cg.a_load_const_ref(list,OS_32,tcgint(lo(value)),ref);
tmpref := ref;
inc(tmpref.offset,4);
- cg.a_load_const_ref(list,OS_32,aint(hi(value)),tmpref);
+ cg.a_load_const_ref(list,OS_32,tcgint(hi(value)),tmpref);
end;
@@ -271,8 +271,8 @@ unit cg64f32;
procedure tcg64f32.a_load64_const_reg(list : TAsmList;value : int64;reg : tregister64);
begin
- cg.a_load_const_reg(list,OS_32,aint(lo(value)),reg.reglo);
- cg.a_load_const_reg(list,OS_32,aint(hi(value)),reg.reghi);
+ cg.a_load_const_reg(list,OS_32,tcgint(lo(value)),reg.reglo);
+ cg.a_load_const_reg(list,OS_32,tcgint(hi(value)),reg.reghi);
end;
@@ -359,9 +359,9 @@ unit cg64f32;
swap64(a);
tmpsref := sref;
tmpsref.bitlen := 32;
- hlcg.a_load_const_subsetref(list,u32inttype,aint(lo(a)),tmpsref);
+ hlcg.a_load_const_subsetref(list,u32inttype,tcgint(lo(a)),tmpsref);
inc(tmpsref.ref.offset,4);
- hlcg.a_load_const_subsetref(list,u32inttype,aint(hi(a)),tmpsref);
+ hlcg.a_load_const_subsetref(list,u32inttype,tcgint(hi(a)),tmpsref);
end;
@@ -537,7 +537,7 @@ unit cg64f32;
LOC_CREGISTER :
cg.a_load_reg_reg(list,OS_32,OS_32,l.register64.reglo,reg);
LOC_CONSTANT :
- cg.a_load_const_reg(list,OS_32,aint(lo(l.value64)),reg);
+ cg.a_load_const_reg(list,OS_32,tcgint(lo(l.value64)),reg);
else
internalerror(200203244);
end;
@@ -554,7 +554,7 @@ unit cg64f32;
LOC_CREGISTER :
cg.a_load_reg_reg(list,OS_32,OS_32,l.register64.reghi,reg);
LOC_CONSTANT :
- cg.a_load_const_reg(list,OS_32,aint(hi(l.value64)),reg);
+ cg.a_load_const_reg(list,OS_32,tcgint(hi(l.value64)),reg);
else
internalerror(200203244);
end;
@@ -675,15 +675,15 @@ unit cg64f32;
begin
{ Keep this order of first lo before hi to have
the correct push order for m68k }
- cg.a_load_const_cgpara(list,OS_32,aint(lo(value)),tmploclo);
- cg.a_load_const_cgpara(list,OS_32,aint(hi(value)),tmplochi);
+ cg.a_load_const_cgpara(list,OS_32,tcgint(lo(value)),tmploclo);
+ cg.a_load_const_cgpara(list,OS_32,tcgint(hi(value)),tmplochi);
end
else
begin
{ Keep this order of first hi before lo to have
the correct push order for i386 }
- cg.a_load_const_cgpara(list,OS_32,aint(hi(value)),tmplochi);
- cg.a_load_const_cgpara(list,OS_32,aint(lo(value)),tmploclo);
+ cg.a_load_const_cgpara(list,OS_32,tcgint(hi(value)),tmplochi);
+ cg.a_load_const_cgpara(list,OS_32,tcgint(lo(value)),tmploclo);
end;
tmploclo.done;
tmplochi.done;
diff --git a/compiler/cgbase.pas b/compiler/cgbase.pas
index 481842605c..816e05a9c8 100644
--- a/compiler/cgbase.pas
+++ b/compiler/cgbase.pas
@@ -294,17 +294,27 @@ interface
tvarregable2tcgloc : array[tvarregable] of tcgloc = (LOC_VOID,
LOC_CREGISTER,LOC_CFPUREGISTER,LOC_CMMREGISTER,LOC_CREGISTER);
-{$ifdef cpu64bitalu}
+{$if defined(cpu64bitalu)}
{ operand size describing an unsigned value in a pair of int registers }
OS_PAIR = OS_128;
{ operand size describing an signed value in a pair of int registers }
OS_SPAIR = OS_S128;
-{$else cpu64bitalu}
+{$elseif defined(cpu32bitalu)}
{ operand size describing an unsigned value in a pair of int registers }
OS_PAIR = OS_64;
{ operand size describing an signed value in a pair of int registers }
OS_SPAIR = OS_S64;
-{$endif cpu64bitalu}
+{$elseif defined(cpu16bitalu)}
+ { operand size describing an unsigned value in a pair of int registers }
+ OS_PAIR = OS_32;
+ { operand size describing an signed value in a pair of int registers }
+ OS_SPAIR = OS_S32;
+{$elseif defined(cpu8bitalu)}
+ { operand size describing an unsigned value in a pair of int registers }
+ OS_PAIR = OS_16;
+ { operand size describing an signed value in a pair of int registers }
+ OS_SPAIR = OS_S16;
+{$endif}
{ Table to convert tcgsize variables to the correspondending
unsigned types }
diff --git a/compiler/cgobj.pas b/compiler/cgobj.pas
index 0edaef1a87..302594a854 100644
--- a/compiler/cgobj.pas
+++ b/compiler/cgobj.pas
@@ -2100,8 +2100,16 @@ implementation
paramanager.getintparaloc(pd,1,cgpara1);
paramanager.getintparaloc(pd,2,cgpara2);
reference_reset_symbol(hrefvmt,current_asmdata.RefAsmSymbol(objdef.vmt_mangledname),0,sizeof(pint));
- a_loadaddr_ref_cgpara(list,hrefvmt,cgpara2);
- a_load_reg_cgpara(list,OS_ADDR,reg,cgpara1);
+ if pd.is_pushleftright then
+ begin
+ a_load_reg_cgpara(list,OS_ADDR,reg,cgpara1);
+ a_loadaddr_ref_cgpara(list,hrefvmt,cgpara2);
+ end
+ else
+ begin
+ a_loadaddr_ref_cgpara(list,hrefvmt,cgpara2);
+ a_load_reg_cgpara(list,OS_ADDR,reg,cgpara1);
+ end;
paramanager.freecgpara(list,cgpara1);
paramanager.freecgpara(list,cgpara2);
allocallcpuregisters(list);
diff --git a/compiler/cgutils.pas b/compiler/cgutils.pas
index c4a458fde6..d15819fd66 100644
--- a/compiler/cgutils.pas
+++ b/compiler/cgutils.pas
@@ -105,11 +105,7 @@ unit cgutils;
{$endif cpuflags}
LOC_CONSTANT : (
case longint of
-{$ifdef FPC_BIG_ENDIAN}
- 1 : (_valuedummy,value : aint);
-{$else FPC_BIG_ENDIAN}
- 1 : (value : aint);
-{$endif FPC_BIG_ENDIAN}
+ 1 : (value : TCGInt);
2 : (value64 : Int64);
);
LOC_CREFERENCE,
diff --git a/compiler/cutils.pas b/compiler/cutils.pas
index d68ae53d93..9f47c26ac1 100644
--- a/compiler/cutils.pas
+++ b/compiler/cutils.pas
@@ -29,6 +29,9 @@ unit cutils;
interface
+ uses
+ constexp;
+
type
Tcharset=set of char;
@@ -42,6 +45,17 @@ interface
{# Returns the maximum value between @var(a) and @var(b) }
function max(a,b : longint) : longint;{$ifdef USEINLINE}inline;{$endif}
function max(a,b : int64) : int64;{$ifdef USEINLINE}inline;{$endif}
+
+ { These functions are intenionally put here and not in the constexp unit.
+ Since Tconstexprint may be automatically converted to int, which causes
+ loss of data and since there are already min and max functions for ints in
+ this unit, we put min and max for Tconstexprint as well. This way we avoid
+ potential bugs, caused by code unintentionally calling the int versions of
+ min/max on Tconstexprint, because of only including cutils and forgetting
+ the constexp unit in the uses clause. }
+ function min(const a,b : Tconstexprint) : Tconstexprint;{$ifdef USEINLINE}inline;{$endif}
+ function max(const a,b : Tconstexprint) : Tconstexprint;{$ifdef USEINLINE}inline;{$endif}
+
{# Return value @var(i) aligned on @var(a) boundary }
function align(i,a:longint):longint;{$ifdef USEINLINE}inline;{$endif}
{ if you have an address aligned using "oldalignment" and add an
@@ -190,6 +204,18 @@ implementation
end;
+ function min(const a,b : Tconstexprint) : Tconstexprint;{$ifdef USEINLINE}inline;{$endif}
+ {
+ return the minimal of a and b
+ }
+ begin
+ if a<=b then
+ min:=a
+ else
+ min:=b;
+ end;
+
+
function max(a,b : longint) : longint;{$ifdef USEINLINE}inline;{$endif}
{
return the maximum of a and b
@@ -214,6 +240,18 @@ implementation
end;
+ function max(const a,b : Tconstexprint) : Tconstexprint;{$ifdef USEINLINE}inline;{$endif}
+ {
+ return the maximum of a and b
+ }
+ begin
+ if a>=b then
+ max:=a
+ else
+ max:=b;
+ end;
+
+
function newalignment(oldalignment: longint; offset: int64): longint;
var
localoffset: longint;
diff --git a/compiler/defutil.pas b/compiler/defutil.pas
index cb46a81809..f46a01475d 100644
--- a/compiler/defutil.pas
+++ b/compiler/defutil.pas
@@ -225,15 +225,48 @@ interface
{# Returns true, if definition is a "real" real (i.e. single/double/extended) }
function is_real(def : tdef) : boolean;
+ { true, if def is a 8 bit int type }
+ function is_8bitint(def : tdef) : boolean;
+
+ { true, if def is a 8 bit ordinal type }
+ function is_8bit(def : tdef) : boolean;
+
+ { true, if def is a 16 bit int type }
+ function is_16bitint(def : tdef) : boolean;
+
+ { true, if def is a 16 bit ordinal type }
+ function is_16bit(def : tdef) : boolean;
+
{# Returns true, if def is a 32 bit integer type }
function is_32bitint(def : tdef) : boolean;
+ {# Returns true, if def is a 32 bit ordinal type }
+ function is_32bit(def : tdef) : boolean;
+
{# Returns true, if def is a 64 bit integer type }
function is_64bitint(def : tdef) : boolean;
{# Returns true, if def is a 64 bit type }
function is_64bit(def : tdef) : boolean;
+ { true, if def is an int type, larger than the processor's native int size }
+ function is_oversizedint(def : tdef) : boolean;
+
+ { true, if def is an ordinal type, larger than the processor's native int size }
+ function is_oversizedord(def : tdef) : boolean;
+
+ { true, if def is an int type, equal in size to the processor's native int size }
+ function is_nativeint(def : tdef) : boolean;
+
+ { true, if def is an ordinal type, equal in size to the processor's native int size }
+ function is_nativeord(def : tdef) : boolean;
+
+ { true, if def is an unsigned int type, equal in size to the processor's native int size }
+ function is_nativeuint(def : tdef) : boolean;
+
+ { true, if def is a signed int type, equal in size to the processor's native int size }
+ function is_nativesint(def : tdef) : boolean;
+
{# If @var(l) isn't in the range of todef a range check error (if not explicit) is generated and
the value is placed within the range
}
@@ -288,7 +321,7 @@ interface
implementation
uses
- verbose;
+ verbose,cutils;
{ returns true, if def uses FPU }
function is_fpu(def : tdef) : boolean;
@@ -359,8 +392,10 @@ implementation
range_to_basetype:=s32bit
else if (l>=low(cardinal)) and (h<=high(cardinal)) then
range_to_basetype:=u32bit
+ else if (l>=low(int64)) and (h<=high(int64)) then
+ range_to_basetype:=s64bit
else
- range_to_basetype:=s64bit;
+ range_to_basetype:=u64bit;
end;
@@ -788,12 +823,41 @@ implementation
end;
+ { true, if def is a 8 bit int type }
+ function is_8bitint(def : tdef) : boolean;
+ begin
+ result:=(def.typ=orddef) and (torddef(def).ordtype in [u8bit,s8bit])
+ end;
+
+ { true, if def is a 8 bit ordinal type }
+ function is_8bit(def : tdef) : boolean;
+ begin
+ result:=(def.typ=orddef) and (torddef(def).ordtype in [u8bit,s8bit,pasbool8,bool8bit,uchar])
+ end;
+
+ { true, if def is a 16 bit int type }
+ function is_16bitint(def : tdef) : boolean;
+ begin
+ result:=(def.typ=orddef) and (torddef(def).ordtype in [u16bit,s16bit])
+ end;
+
+ { true, if def is a 16 bit ordinal type }
+ function is_16bit(def : tdef) : boolean;
+ begin
+ result:=(def.typ=orddef) and (torddef(def).ordtype in [u16bit,s16bit,pasbool16,bool16bit,uwidechar])
+ end;
+
{ true, if def is a 32 bit int type }
function is_32bitint(def : tdef) : boolean;
begin
result:=(def.typ=orddef) and (torddef(def).ordtype in [u32bit,s32bit])
end;
+ { true, if def is a 32 bit ordinal type }
+ function is_32bit(def: tdef): boolean;
+ begin
+ result:=(def.typ=orddef) and (torddef(def).ordtype in [u32bit,s32bit,pasbool32,bool32bit])
+ end;
{ true, if def is a 64 bit int type }
function is_64bitint(def : tdef) : boolean;
@@ -809,6 +873,75 @@ implementation
end;
+ { true, if def is an int type, larger than the processor's native int size }
+ function is_oversizedint(def : tdef) : boolean;
+ begin
+{$if defined(cpu8bitalu)}
+ result:=is_64bitint(def) or is_32bitint(def) or is_16bitint(def);
+{$elseif defined(cpu16bitalu)}
+ result:=is_64bitint(def) or is_32bitint(def);
+{$elseif defined(cpu32bitaddr)}
+ result:=is_64bitint(def);
+{$elseif defined(cpu64bitaddr)}
+ result:=false;
+{$endif}
+ end;
+
+ { true, if def is an ordinal type, larger than the processor's native int size }
+ function is_oversizedord(def : tdef) : boolean;
+ begin
+{$if defined(cpu8bitalu)}
+ result:=is_64bit(def) or is_32bit(def) or is_16bit(def);
+{$elseif defined(cpu16bitalu)}
+ result:=is_64bit(def) or is_32bit(def);
+{$elseif defined(cpu32bitaddr)}
+ result:=is_64bit(def);
+{$elseif defined(cpu64bitaddr)}
+ result:=false;
+{$endif}
+ end;
+
+
+ { true, if def is an int type, equal in size to the processor's native int size }
+ function is_nativeint(def: tdef): boolean;
+ begin
+{$if defined(cpu8bitalu)}
+ result:=is_8bitint(def);
+{$elseif defined(cpu16bitalu)}
+ result:=is_16bitint(def);
+{$elseif defined(cpu32bitaddr)}
+ result:=is_32bitint(def);
+{$elseif defined(cpu64bitaddr)}
+ result:=is_64bitint(def);
+{$endif}
+ end;
+
+ { true, if def is an ordinal type, equal in size to the processor's native int size }
+ function is_nativeord(def: tdef): boolean;
+ begin
+{$if defined(cpu8bitalu)}
+ result:=is_8bit(def);
+{$elseif defined(cpu16bitalu)}
+ result:=is_16bit(def);
+{$elseif defined(cpu32bitaddr)}
+ result:=is_32bit(def);
+{$elseif defined(cpu64bitaddr)}
+ result:=is_64bit(def);
+{$endif}
+ end;
+
+ { true, if def is an unsigned int type, equal in size to the processor's native int size }
+ function is_nativeuint(def: tdef): boolean;
+ begin
+ result:=is_nativeint(def) and (def.typ=orddef) and (torddef(def).ordtype in [u64bit,u32bit,u16bit,u8bit]);
+ end;
+
+ { true, if def is a signed int type, equal in size to the processor's native int size }
+ function is_nativesint(def: tdef): boolean;
+ begin
+ result:=is_nativeint(def) and (def.typ=orddef) and (torddef(def).ordtype in [s64bit,s32bit,s16bit,s8bit]);
+ end;
+
{ if l isn't in the range of todef a range check error (if not explicit) is generated and
the value is placed within the range }
procedure testrange(todef : tdef;var l : tconstexprint;explicit,forcerangecheck:boolean);
@@ -1042,13 +1175,15 @@ implementation
procvardef:
begin
if not tprocvardef(def).is_addressonly then
- {$if sizeof(pint) = 4}
+ {$if sizeof(pint) = 2}
+ result:=OS_32
+ {$elseif sizeof(pint) = 4}
result:=OS_64
- {$else} {$if sizeof(pint) = 8}
+ {$elseif sizeof(pint) = 8}
result:=OS_128
{$else}
internalerror(200707141)
- {$endif} {$endif}
+ {$endif}
else
result:=OS_ADDR;
end;
@@ -1117,7 +1252,13 @@ implementation
{# returns true, if the type passed is a varset }
function is_smallset(p : tdef) : boolean;
begin
- result:=(p.typ=setdef) and (p.size in [1,2,4])
+ {$if defined(cpu8bitalu)}
+ result:=(p.typ=setdef) and (p.size = 1)
+ {$elseif defined(cpu16bitalu)}
+ result:=(p.typ=setdef) and (p.size in [1,2])
+ {$else}
+ result:=(p.typ=setdef) and (p.size in [1,2,4])
+ {$endif}
end;
@@ -1133,12 +1274,8 @@ implementation
var
llow, lhigh: tconstexprint;
begin
- llow:=rd.low;
- if llow<ld.low then
- llow:=ld.low;
- lhigh:=rd.high;
- if lhigh<ld.high then
- lhigh:=ld.high;
+ llow:=min(ld.low,rd.low);
+ lhigh:=max(ld.high,rd.high);
case range_to_basetype(llow,lhigh) of
s8bit:
result:=torddef(s8inttype);
diff --git a/compiler/fpcdefs.inc b/compiler/fpcdefs.inc
index 9ae16c05d9..e250a56465 100644
--- a/compiler/fpcdefs.inc
+++ b/compiler/fpcdefs.inc
@@ -42,6 +42,23 @@
{$packrecords c}
{$endif cpuarm}
+{$ifdef i8086}
+ {$define cpu16bit}
+ {$define cpu16bitaddr}
+ {$define cpu16bitalu}
+ {$define x86}
+ {$define cpuflags}
+ {$define cpuextended}
+ {//$define SUPPORT_MMX}
+ {$define cpumm}
+ {$define fewintregisters}
+ {$define cpurox}
+ {$define SUPPORT_SAFECALL}
+ {$define cpuneedsmulhelper}
+ { TODO: add another define in order to disable the div helper for 16-bit divs? }
+ {$define cpuneedsdiv32helper}
+{$endif i8086}
+
{$ifdef i386}
{$define cpu32bit}
{$define cpu32bitaddr}
diff --git a/compiler/globals.pas b/compiler/globals.pas
index a9f8c6d707..67a39fe4ed 100644
--- a/compiler/globals.pas
+++ b/compiler/globals.pas
@@ -460,6 +460,11 @@ interface
optimizecputype : cpu_armv8;
fputype : fpu_vfp;
{$endif aarch64}
+ {$ifdef i8086}
+ cputype : cpu_8086;
+ optimizecputype : cpu_8086;
+ fputype : fpu_x87;
+ {$endif i8086}
{$endif not GENERIC_CPU}
asmmode : asmmode_standard;
{$ifndef jvm}
diff --git a/compiler/globtype.pas b/compiler/globtype.pas
index cc359f64e4..899f745640 100644
--- a/compiler/globtype.pas
+++ b/compiler/globtype.pas
@@ -41,6 +41,8 @@ interface
{$endif symansistr}
PSymStr = ^TSymStr;
+ Int32 = Longint;
+
{ Integer type corresponding to pointer size }
{$ifdef cpu64bitaddr}
PUint = qword;
@@ -488,7 +490,9 @@ interface
);
{ Default calling convention }
-{$ifdef x86}
+{$if defined(i8086)}
+ pocall_default = pocall_pascal;
+{$elseif defined(i386) or defined(x86_64)}
pocall_default = pocall_register;
{$else}
pocall_default = pocall_stdcall;
diff --git a/compiler/hlcg2ll.pas b/compiler/hlcg2ll.pas
index aa8d2e0290..eddcaa97be 100644
--- a/compiler/hlcg2ll.pas
+++ b/compiler/hlcg2ll.pas
@@ -112,7 +112,7 @@ unit hlcg2ll;
@param(a value of constant to send)
@param(cgpara where the parameter will be stored)
}
- procedure a_load_const_cgpara(list : TAsmList;tosize : tdef;a : aint;const cgpara : TCGPara);override;
+ procedure a_load_const_cgpara(list : TAsmList;tosize : tdef;a : tcgint;const cgpara : TCGPara);override;
{# Pass the value of a parameter, which is located in memory, to a routine.
A generic version is provided. This routine should
@@ -160,9 +160,9 @@ unit hlcg2ll;
function a_call_name_static(list : TAsmList;pd : tprocdef;const s : TSymStr; forceresdef: tdef): tcgpara;override;
{ move instructions }
- procedure a_load_const_reg(list : TAsmList;tosize : tdef;a : aint;register : tregister);override;
- procedure a_load_const_ref(list : TAsmList;tosize : tdef;a : aint;const ref : treference);override;
- procedure a_load_const_loc(list : TAsmList;tosize : tdef;a : aint;const loc : tlocation);override;
+ procedure a_load_const_reg(list : TAsmList;tosize : tdef;a : tcgint;register : tregister);override;
+ procedure a_load_const_ref(list : TAsmList;tosize : tdef;a : tcgint;const ref : treference);override;
+ procedure a_load_const_loc(list : TAsmList;tosize : tdef;a : tcgint;const loc : tlocation);override;
procedure a_load_reg_ref(list : TAsmList;fromsize, tosize : tdef;register : tregister;const ref : treference);override;
procedure a_load_reg_ref_unaligned(list : TAsmList;fromsize, tosize : tdef;register : tregister;const ref : treference);override;
procedure a_load_reg_reg(list : TAsmList;fromsize, tosize : tdef;reg1,reg2 : tregister);override;
@@ -214,9 +214,9 @@ unit hlcg2ll;
{ the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
{ that in this case the *second* operand is used as both source and }
{ destination (JM) }
- procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: tdef; a: Aint; reg: TRegister); override;
- procedure a_op_const_ref(list : TAsmList; Op: TOpCG; size: tdef; a: Aint; const ref: TReference); override;
- procedure a_op_const_loc(list : TAsmList; Op: TOpCG; size: tdef; a: Aint; const loc: tlocation);override;
+ procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: tdef; a: tcgint; reg: TRegister); override;
+ procedure a_op_const_ref(list : TAsmList; Op: TOpCG; size: tdef; a: tcgint; const ref: TReference); override;
+ procedure a_op_const_loc(list : TAsmList; Op: TOpCG; size: tdef; a: tcgint; const loc: tlocation);override;
procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: tdef; reg1, reg2: TRegister); override;
procedure a_op_reg_ref(list : TAsmList; Op: TOpCG; size: tdef; reg: TRegister; const ref: TReference); override;
procedure a_op_ref_reg(list : TAsmList; Op: TOpCG; size: tdef; const ref: TReference; reg: TRegister); override;
@@ -226,17 +226,17 @@ unit hlcg2ll;
{ trinary operations for processors that support them, 'emulated' }
{ on others. None with "ref" arguments since I don't think there }
{ are any processors that support it (JM) }
- procedure a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tdef; a: aint; src, dst: tregister); override;
+ procedure a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tdef; a: tcgint; src, dst: tregister); override;
procedure a_op_reg_reg_reg(list: TAsmList; op: TOpCg; size: tdef; src1, src2, dst: tregister); override;
- procedure a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tdef; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); override;
+ procedure a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tdef; a: tcgint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); override;
procedure a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tdef; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation); override;
{ comparison operations }
- procedure a_cmp_const_reg_label(list : TAsmList;size : tdef;cmp_op : topcmp;a : aint;reg : tregister;
+ procedure a_cmp_const_reg_label(list : TAsmList;size : tdef;cmp_op : topcmp;a : tcgint;reg : tregister;
l : tasmlabel);override;
- procedure a_cmp_const_ref_label(list : TAsmList;size : tdef;cmp_op : topcmp;a : aint;const ref : treference;
+ procedure a_cmp_const_ref_label(list : TAsmList;size : tdef;cmp_op : topcmp;a : tcgint;const ref : treference;
l : tasmlabel); override;
- procedure a_cmp_const_loc_label(list: TAsmList; size: tdef;cmp_op: topcmp; a: aint; const loc: tlocation;
+ procedure a_cmp_const_loc_label(list: TAsmList; size: tdef;cmp_op: topcmp; a: tcgint; const loc: tlocation;
l : tasmlabel);override;
procedure a_cmp_reg_reg_label(list : TAsmList;size : tdef;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); override;
procedure a_cmp_ref_reg_label(list : TAsmList;size : tdef;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); override;
@@ -436,7 +436,7 @@ implementation
cg.a_load_reg_cgpara(list,def_cgsize(size),r,cgpara);
end;
- procedure thlcg2ll.a_load_const_cgpara(list: TAsmList; tosize: tdef; a: aint; const cgpara: TCGPara);
+ procedure thlcg2ll.a_load_const_cgpara(list: TAsmList; tosize: tdef; a: tcgint; const cgpara: TCGPara);
begin
cg.a_load_const_cgpara(list,def_cgsize(tosize),a,cgpara);
end;
@@ -478,17 +478,17 @@ implementation
result:=get_call_result_cgpara(pd,forceresdef);
end;
- procedure thlcg2ll.a_load_const_reg(list: TAsmList; tosize: tdef; a: aint; register: tregister);
+ procedure thlcg2ll.a_load_const_reg(list: TAsmList; tosize: tdef; a: tcgint; register: tregister);
begin
cg.a_load_const_reg(list,def_cgsize(tosize),a,register);
end;
- procedure thlcg2ll.a_load_const_ref(list: TAsmList; tosize: tdef; a: aint; const ref: treference);
+ procedure thlcg2ll.a_load_const_ref(list: TAsmList; tosize: tdef; a: tcgint; const ref: treference);
begin
cg.a_load_const_ref(list,def_cgsize(tosize),a,ref);
end;
- procedure thlcg2ll.a_load_const_loc(list: TAsmList; tosize: tdef; a: aint; const loc: tlocation);
+ procedure thlcg2ll.a_load_const_loc(list: TAsmList; tosize: tdef; a: tcgint; const loc: tlocation);
begin
case loc.loc of
LOC_SUBSETREG,LOC_CSUBSETREG,
@@ -746,17 +746,17 @@ implementation
cg.a_loadmm_reg_intreg(list,def_cgsize(fromsize),def_cgsize(tosize),mmreg,intreg,shuffle);
end;
*)
- procedure thlcg2ll.a_op_const_reg(list: TAsmList; Op: TOpCG; size: tdef; a: Aint; reg: TRegister);
+ procedure thlcg2ll.a_op_const_reg(list: TAsmList; Op: TOpCG; size: tdef; a: tcgint; reg: TRegister);
begin
cg.a_op_const_reg(list,op,def_cgsize(size),a,reg);
end;
- procedure thlcg2ll.a_op_const_ref(list: TAsmList; Op: TOpCG; size: tdef; a: Aint; const ref: TReference);
+ procedure thlcg2ll.a_op_const_ref(list: TAsmList; Op: TOpCG; size: tdef; a: tcgint; const ref: TReference);
begin
cg.a_op_const_ref(list,op,def_cgsize(size),a,ref);
end;
- procedure thlcg2ll.a_op_const_loc(list: TAsmList; Op: TOpCG; size: tdef; a: Aint; const loc: tlocation);
+ procedure thlcg2ll.a_op_const_loc(list: TAsmList; Op: TOpCG; size: tdef; a: tcgint; const loc: tlocation);
begin
{$ifdef extdebug}
if def_cgsize(size)<>loc.size then
@@ -816,7 +816,7 @@ implementation
end;
end;
- procedure thlcg2ll.a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tdef; a: aint; src, dst: tregister);
+ procedure thlcg2ll.a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tdef; a: tcgint; src, dst: tregister);
begin
cg.a_op_const_reg_reg(list,op,def_cgsize(size),a,src,dst);
end;
@@ -826,7 +826,7 @@ implementation
cg.a_op_reg_reg_reg(list,op,def_cgsize(size),src1,src2,dst);
end;
- procedure thlcg2ll.a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tdef; a: aint; src, dst: tregister; setflags: boolean; var ovloc: tlocation);
+ procedure thlcg2ll.a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tdef; a: tcgint; src, dst: tregister; setflags: boolean; var ovloc: tlocation);
begin
cg.a_op_const_reg_reg_checkoverflow(list,op,def_cgsize(size),a,src,dst,setflags,ovloc);
end;
@@ -836,17 +836,17 @@ implementation
cg.a_op_reg_reg_reg_checkoverflow(list,op,def_cgsize(size),src1,src2,dst,setflags,ovloc);
end;
- procedure thlcg2ll.a_cmp_const_reg_label(list: TAsmList; size: tdef; cmp_op: topcmp; a: aint; reg: tregister; l: tasmlabel);
+ procedure thlcg2ll.a_cmp_const_reg_label(list: TAsmList; size: tdef; cmp_op: topcmp; a: tcgint; reg: tregister; l: tasmlabel);
begin
cg.a_cmp_const_reg_label(list,def_cgsize(size),cmp_op,a,reg,l);
end;
- procedure thlcg2ll.a_cmp_const_ref_label(list: TAsmList; size: tdef; cmp_op: topcmp; a: aint; const ref: treference; l: tasmlabel);
+ procedure thlcg2ll.a_cmp_const_ref_label(list: TAsmList; size: tdef; cmp_op: topcmp; a: tcgint; const ref: treference; l: tasmlabel);
begin
cg.a_cmp_const_ref_label(list,def_cgsize(size),cmp_op,a,ref,l);
end;
- procedure thlcg2ll.a_cmp_const_loc_label(list: TAsmList; size: tdef; cmp_op: topcmp; a: aint; const loc: tlocation; l: tasmlabel);
+ procedure thlcg2ll.a_cmp_const_loc_label(list: TAsmList; size: tdef; cmp_op: topcmp; a: tcgint; const loc: tlocation; l: tasmlabel);
begin
case loc.loc of
LOC_SUBSETREG,LOC_CSUBSETREG,
@@ -996,14 +996,14 @@ implementation
{ load a smaller size to OS_64 }
if l.loc=LOC_REGISTER then
begin
-{$ifdef AVR}
+{$if defined(cpu8bitalu) or defined(cpu16bitalu)}
{ on avr, we cannot change the size of a register
due to the nature how register with size > OS8 are handled
}
hregister:=cg.getintregister(list,OS_32);
-{$else AVR}
+{$else}
hregister:=cg.makeregsize(list,l.register64.reglo,OS_32);
-{$endif AVR}
+{$endif}
cg.a_load_reg_reg(list,l.size,OS_32,l.register64.reglo,hregister);
end
else
@@ -1028,7 +1028,7 @@ implementation
cg.a_label(list,hl);
end;
else
- a_load_loc_reg(list,src_size,osuinttype,l,hregister);
+ a_load_loc_reg(list,src_size,u32inttype,l,hregister);
end;
{ reset hi part, take care of the signed bit of the current value }
hregisterhi:=cg.getintregister(list,OS_32);
@@ -1127,7 +1127,12 @@ implementation
if (TCGSize2Size[dst_cgsize]<TCGSize2Size[l.size]) then
begin
if (l.loc in [LOC_REGISTER,LOC_CREGISTER]) then
- l.register:=cg.makeregsize(list,l.register,dst_cgsize);
+ begin
+{$if defined(cpu8bitalu) or defined(cpu16bitalu)}
+ if TCGSize2Size[dst_cgsize]<=TCGSize2Size[OS_INT] then
+{$endif}
+ l.register:=cg.makeregsize(list,l.register,dst_cgsize);
+ end;
{ for big endian systems, the reference's offset must }
{ be increased in this case, since they have the }
{ MSB first in memory and e.g. byte(word_var) should }
diff --git a/compiler/hlcgobj.pas b/compiler/hlcgobj.pas
index 033232f4f8..72bd71c3eb 100644
--- a/compiler/hlcgobj.pas
+++ b/compiler/hlcgobj.pas
@@ -133,7 +133,7 @@ unit hlcgobj;
@param(a value of constant to send)
@param(cgpara where the parameter will be stored)
}
- procedure a_load_const_cgpara(list : TAsmList;tosize : tdef;a : aint;const cgpara : TCGPara);virtual;
+ procedure a_load_const_cgpara(list : TAsmList;tosize : tdef;a : tcgint;const cgpara : TCGPara);virtual;
{# Pass the value of a parameter, which is located in memory, to a routine.
A generic version is provided. This routine should
@@ -205,9 +205,9 @@ unit hlcgobj;
procedure a_call_name_inherited(list : TAsmList;pd : tprocdef;const s : TSymStr);virtual;
{ move instructions }
- procedure a_load_const_reg(list : TAsmList;tosize : tdef;a : aint;register : tregister);virtual;abstract;
- procedure a_load_const_ref(list : TAsmList;tosize : tdef;a : aint;const ref : treference);virtual;
- procedure a_load_const_loc(list : TAsmList;tosize : tdef;a : aint;const loc : tlocation);virtual;
+ procedure a_load_const_reg(list : TAsmList;tosize : tdef;a : tcgint;register : tregister);virtual;abstract;
+ procedure a_load_const_ref(list : TAsmList;tosize : tdef;a : tcgint;const ref : treference);virtual;
+ procedure a_load_const_loc(list : TAsmList;tosize : tdef;a : tcgint;const loc : tlocation);virtual;
procedure a_load_reg_ref(list : TAsmList;fromsize, tosize : tdef;register : tregister;const ref : treference);virtual;abstract;
procedure a_load_reg_ref_unaligned(list : TAsmList;fromsize, tosize : tdef;register : tregister;const ref : treference);virtual;
procedure a_load_reg_reg(list : TAsmList;fromsize, tosize : tdef;reg1,reg2 : tregister);virtual;abstract;
@@ -229,7 +229,7 @@ unit hlcgobj;
procedure a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tdef; const fromsreg, tosreg: tsubsetregister); virtual;
procedure a_load_subsetreg_ref(list : TAsmList; fromsubsetsize, tosize: tdef; const sreg: tsubsetregister; const destref: treference); virtual;
procedure a_load_ref_subsetreg(list : TAsmList; fromsize, tosubsetsize: tdef; const fromref: treference; const sreg: tsubsetregister); virtual;
- procedure a_load_const_subsetreg(list: TAsmlist; tosubsetsize: tdef; a: aint; const sreg: tsubsetregister); virtual;
+ procedure a_load_const_subsetreg(list: TAsmlist; tosubsetsize: tdef; a: tcgint; const sreg: tsubsetregister); virtual;
procedure a_load_subsetreg_loc(list: TAsmlist; fromsubsetsize, tosize: tdef; const sreg: tsubsetregister; const loc: tlocation); virtual;
procedure a_load_subsetref_reg(list : TAsmList; fromsubsetsize, tosize: tdef; const sref: tsubsetreference; destreg: tregister); virtual;
@@ -253,12 +253,12 @@ unit hlcgobj;
{ bit set/clear instructions }
procedure a_bit_set_reg_reg(list : TAsmList; doset: boolean; bitnumbersize, destsize: tdef; bitnumber,dest: tregister); virtual;
- procedure a_bit_set_const_ref(list: TAsmList; doset: boolean;destsize: tdef; bitnumber: aint; const ref: treference); virtual;
- procedure a_bit_set_const_reg(list: TAsmList; doset: boolean; destsize: tdef; bitnumber: aint; destreg: tregister); virtual;
- procedure a_bit_set_const_subsetreg(list: TAsmList; doset: boolean; destsize: tdef; bitnumber: aint; const destreg: tsubsetregister); virtual;
+ procedure a_bit_set_const_ref(list: TAsmList; doset: boolean;destsize: tdef; bitnumber: tcgint; const ref: treference); virtual;
+ procedure a_bit_set_const_reg(list: TAsmList; doset: boolean; destsize: tdef; bitnumber: tcgint; destreg: tregister); virtual;
+ procedure a_bit_set_const_subsetreg(list: TAsmList; doset: boolean; destsize: tdef; bitnumber: tcgint; const destreg: tsubsetregister); virtual;
procedure a_bit_set_reg_ref(list: TAsmList; doset: boolean; fromsize, tosize: tdef; bitnumber: tregister; const ref: treference); virtual;
procedure a_bit_set_reg_loc(list: TAsmList; doset: boolean; regsize, tosize: tdef; bitnumber: tregister; const loc: tlocation);virtual;
- procedure a_bit_set_const_loc(list: TAsmList; doset: boolean; tosize: tdef; bitnumber: aint; const loc: tlocation);virtual;
+ procedure a_bit_set_const_loc(list: TAsmList; doset: boolean; tosize: tdef; bitnumber: tcgint; const loc: tlocation);virtual;
protected
function get_call_result_cgpara(pd: tprocdef; forceresdef: tdef): tcgpara;
@@ -319,11 +319,11 @@ unit hlcgobj;
{ the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
{ that in this case the *second* operand is used as both source and }
{ destination (JM) }
- procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: tdef; a: Aint; reg: TRegister); virtual; abstract;
- procedure a_op_const_ref(list : TAsmList; Op: TOpCG; size: tdef; a: Aint; const ref: TReference); virtual;
- procedure a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : tdef; a : aint; const sreg: tsubsetregister); virtual;
- procedure a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : tdef; a : aint; const sref: tsubsetreference); virtual;
- procedure a_op_const_loc(list : TAsmList; Op: TOpCG; size: tdef; a: Aint; const loc: tlocation);virtual;
+ procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: tdef; a: tcgint; reg: TRegister); virtual; abstract;
+ procedure a_op_const_ref(list : TAsmList; Op: TOpCG; size: tdef; a: tcgint; const ref: TReference); virtual;
+ procedure a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : tdef; a : tcgint; const sreg: tsubsetregister); virtual;
+ procedure a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : tdef; a : tcgint; const sref: tsubsetreference); virtual;
+ procedure a_op_const_loc(list : TAsmList; Op: TOpCG; size: tdef; a: tcgint; const loc: tlocation);virtual;
procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: tdef; reg1, reg2: TRegister); virtual; abstract;
procedure a_op_reg_ref(list : TAsmList; Op: TOpCG; size: tdef; reg: TRegister; const ref: TReference); virtual;
procedure a_op_ref_reg(list : TAsmList; Op: TOpCG; size: tdef; const ref: TReference; reg: TRegister); virtual;
@@ -335,17 +335,17 @@ unit hlcgobj;
{ trinary operations for processors that support them, 'emulated' }
{ on others. None with "ref" arguments since I don't think there }
{ are any processors that support it (JM) }
- procedure a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tdef; a: aint; src, dst: tregister); virtual;
+ procedure a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tdef; a: tcgint; src, dst: tregister); virtual;
procedure a_op_reg_reg_reg(list: TAsmList; op: TOpCg; size: tdef; src1, src2, dst: tregister); virtual;
- procedure a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tdef; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
+ procedure a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tdef; a: tcgint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
procedure a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tdef; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
{ comparison operations }
- procedure a_cmp_const_reg_label(list : TAsmList;size : tdef;cmp_op : topcmp;a : aint;reg : tregister;
+ procedure a_cmp_const_reg_label(list : TAsmList;size : tdef;cmp_op : topcmp;a : tcgint;reg : tregister;
l : tasmlabel);virtual;
- procedure a_cmp_const_ref_label(list : TAsmList;size : tdef;cmp_op : topcmp;a : aint;const ref : treference;
+ procedure a_cmp_const_ref_label(list : TAsmList;size : tdef;cmp_op : topcmp;a : tcgint;const ref : treference;
l : tasmlabel); virtual;
- procedure a_cmp_const_loc_label(list: TAsmList; size: tdef;cmp_op: topcmp; a: aint; const loc: tlocation;
+ procedure a_cmp_const_loc_label(list: TAsmList; size: tdef;cmp_op: topcmp; a: tcgint; const loc: tlocation;
l : tasmlabel);virtual;
procedure a_cmp_reg_reg_label(list : TAsmList;size : tdef;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
procedure a_cmp_ref_reg_label(list : TAsmList;size : tdef;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
@@ -787,7 +787,7 @@ implementation
end;
end;
- procedure thlcgobj.a_load_const_cgpara(list: TAsmList; tosize: tdef; a: aint; const cgpara: TCGPara);
+ procedure thlcgobj.a_load_const_cgpara(list: TAsmList; tosize: tdef; a: tcgint; const cgpara: TCGPara);
var
ref : treference;
begin
@@ -901,7 +901,7 @@ implementation
a_call_name(list,pd,s,nil,false);
end;
- procedure thlcgobj.a_load_const_ref(list: TAsmList; tosize: tdef; a: aint; const ref: treference);
+ procedure thlcgobj.a_load_const_ref(list: TAsmList; tosize: tdef; a: tcgint; const ref: treference);
var
tmpreg: tregister;
begin
@@ -910,7 +910,7 @@ implementation
a_load_reg_ref(list,tosize,tosize,tmpreg,ref);
end;
- procedure thlcgobj.a_load_const_loc(list: TAsmList; tosize: tdef; a: aint; const loc: tlocation);
+ procedure thlcgobj.a_load_const_loc(list: TAsmList; tosize: tdef; a: tcgint; const loc: tlocation);
begin
case loc.loc of
LOC_REFERENCE,LOC_CREFERENCE:
@@ -1146,7 +1146,7 @@ implementation
a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,sreg);
end;
- procedure thlcgobj.a_load_const_subsetreg(list: TAsmlist; tosubsetsize: tdef; a: aint; const sreg: tsubsetregister);
+ procedure thlcgobj.a_load_const_subsetreg(list: TAsmlist; tosubsetsize: tdef; a: tcgint; const sreg: tsubsetregister);
var
subsetregdef: torddef;
bitmask: aword;
@@ -1505,17 +1505,17 @@ implementation
end;
end;
- procedure thlcgobj.a_bit_set_const_ref(list: TAsmList; doset: boolean; destsize: tdef; bitnumber: aint; const ref: treference);
+ procedure thlcgobj.a_bit_set_const_ref(list: TAsmList; doset: boolean; destsize: tdef; bitnumber: tcgint; const ref: treference);
begin
a_load_const_subsetref(list,u8inttype,ord(doset),get_bit_const_ref_sref(bitnumber,destsize,ref));
end;
- procedure thlcgobj.a_bit_set_const_reg(list: TAsmList; doset: boolean; destsize: tdef; bitnumber: aint; destreg: tregister);
+ procedure thlcgobj.a_bit_set_const_reg(list: TAsmList; doset: boolean; destsize: tdef; bitnumber: tcgint; destreg: tregister);
begin
a_load_const_subsetreg(list,u8inttype,ord(doset),get_bit_const_reg_sreg(destsize,bitnumber,destreg));
end;
- procedure thlcgobj.a_bit_set_const_subsetreg(list: TAsmList; doset: boolean; destsize: tdef; bitnumber: aint; const destreg: tsubsetregister);
+ procedure thlcgobj.a_bit_set_const_subsetreg(list: TAsmList; doset: boolean; destsize: tdef; bitnumber: tcgint; const destreg: tsubsetregister);
var
tmpsreg: tsubsetregister;
begin
@@ -1559,7 +1559,7 @@ implementation
end;
end;
- procedure thlcgobj.a_bit_set_const_loc(list: TAsmList; doset: boolean; tosize: tdef; bitnumber: aint; const loc: tlocation);
+ procedure thlcgobj.a_bit_set_const_loc(list: TAsmList; doset: boolean; tosize: tdef; bitnumber: tcgint; const loc: tlocation);
begin
case loc.loc of
LOC_REFERENCE:
@@ -2435,7 +2435,7 @@ implementation
cg.a_loadmm_reg_intreg(list,def_cgsize(fromsize),def_cgsize(tosize),mmreg,intreg,shuffle);
end;
*)
- procedure thlcgobj.a_op_const_ref(list: TAsmList; Op: TOpCG; size: tdef; a: Aint; const ref: TReference);
+ procedure thlcgobj.a_op_const_ref(list: TAsmList; Op: TOpCG; size: tdef; a: tcgint; const ref: TReference);
var
tmpreg : tregister;
begin
@@ -2445,7 +2445,7 @@ implementation
a_load_reg_ref(list,size,size,tmpreg,ref);
end;
- procedure thlcgobj.a_op_const_subsetreg(list: TAsmList; Op: TOpCG; size, subsetsize: tdef; a: aint; const sreg: tsubsetregister);
+ procedure thlcgobj.a_op_const_subsetreg(list: TAsmList; Op: TOpCG; size, subsetsize: tdef; a: tcgint; const sreg: tsubsetregister);
var
tmpreg: tregister;
begin
@@ -2455,7 +2455,7 @@ implementation
a_load_reg_subsetreg(list,size,subsetsize,tmpreg,sreg);
end;
- procedure thlcgobj.a_op_const_subsetref(list: TAsmList; Op: TOpCG; size, subsetsize: tdef; a: aint; const sref: tsubsetreference);
+ procedure thlcgobj.a_op_const_subsetref(list: TAsmList; Op: TOpCG; size, subsetsize: tdef; a: tcgint; const sref: tsubsetreference);
var
tmpreg: tregister;
begin
@@ -2465,7 +2465,7 @@ implementation
a_load_reg_subsetref(list,size,subsetsize,tmpreg,sref);
end;
- procedure thlcgobj.a_op_const_loc(list: TAsmList; Op: TOpCG; size: tdef; a: Aint; const loc: tlocation);
+ procedure thlcgobj.a_op_const_loc(list: TAsmList; Op: TOpCG; size: tdef; a: tcgint; const loc: tlocation);
begin
case loc.loc of
LOC_REGISTER, LOC_CREGISTER:
@@ -2588,7 +2588,7 @@ implementation
end;
end;
- procedure thlcgobj.a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tdef; a: aint; src, dst: tregister);
+ procedure thlcgobj.a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tdef; a: tcgint; src, dst: tregister);
begin
a_load_reg_reg(list,size,size,src,dst);
a_op_const_reg(list,op,size,a,dst);
@@ -2618,7 +2618,7 @@ implementation
end;
end;
- procedure thlcgobj.a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tdef; a: aint; src, dst: tregister; setflags: boolean; var ovloc: tlocation);
+ procedure thlcgobj.a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tdef; a: tcgint; src, dst: tregister; setflags: boolean; var ovloc: tlocation);
begin
ovloc.loc:=LOC_VOID;
if not setflags then
@@ -2636,7 +2636,7 @@ implementation
internalerror(2010122911);
end;
- procedure thlcgobj.a_cmp_const_reg_label(list: TAsmList; size: tdef; cmp_op: topcmp; a: aint; reg: tregister; l: tasmlabel);
+ procedure thlcgobj.a_cmp_const_reg_label(list: TAsmList; size: tdef; cmp_op: topcmp; a: tcgint; reg: tregister; l: tasmlabel);
var
tmpreg: tregister;
begin
@@ -2645,7 +2645,7 @@ implementation
a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
end;
- procedure thlcgobj.a_cmp_const_ref_label(list: TAsmList; size: tdef; cmp_op: topcmp; a: aint; const ref: treference; l: tasmlabel);
+ procedure thlcgobj.a_cmp_const_ref_label(list: TAsmList; size: tdef; cmp_op: topcmp; a: tcgint; const ref: treference; l: tasmlabel);
var
tmpreg: tregister;
begin
@@ -2654,7 +2654,7 @@ implementation
a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
end;
- procedure thlcgobj.a_cmp_const_loc_label(list: TAsmList; size: tdef; cmp_op: topcmp; a: aint; const loc: tlocation; l: tasmlabel);
+ procedure thlcgobj.a_cmp_const_loc_label(list: TAsmList; size: tdef; cmp_op: topcmp; a: tcgint; const loc: tlocation; l: tasmlabel);
var
tmpreg: tregister;
begin
@@ -2829,9 +2829,18 @@ implementation
paramanager.getintparaloc(pd,1,cgpara1);
paramanager.getintparaloc(pd,2,cgpara2);
paramanager.getintparaloc(pd,3,cgpara3);
- a_loadaddr_ref_cgpara(list,strdef,dest,cgpara3);
- a_loadaddr_ref_cgpara(list,strdef,source,cgpara2);
- a_load_const_cgpara(list,s32inttype,strdef.len,cgpara1);
+ if pd.is_pushleftright then
+ begin
+ a_load_const_cgpara(list,s32inttype,strdef.len,cgpara1);
+ a_loadaddr_ref_cgpara(list,strdef,source,cgpara2);
+ a_loadaddr_ref_cgpara(list,strdef,dest,cgpara3);
+ end
+ else
+ begin
+ a_loadaddr_ref_cgpara(list,strdef,dest,cgpara3);
+ a_loadaddr_ref_cgpara(list,strdef,source,cgpara2);
+ a_load_const_cgpara(list,s32inttype,strdef.len,cgpara1);
+ end;
paramanager.freecgpara(list,cgpara3);
paramanager.freecgpara(list,cgpara2);
paramanager.freecgpara(list,cgpara1);
@@ -2851,8 +2860,16 @@ implementation
cgpara2.init;
paramanager.getintparaloc(pd,1,cgpara1);
paramanager.getintparaloc(pd,2,cgpara2);
- a_loadaddr_ref_cgpara(list,vardef,dest,cgpara2);
- a_loadaddr_ref_cgpara(list,vardef,source,cgpara1);
+ if pd.is_pushleftright then
+ begin
+ a_loadaddr_ref_cgpara(list,vardef,source,cgpara1);
+ a_loadaddr_ref_cgpara(list,vardef,dest,cgpara2);
+ end
+ else
+ begin
+ a_loadaddr_ref_cgpara(list,vardef,dest,cgpara2);
+ a_loadaddr_ref_cgpara(list,vardef,source,cgpara1);
+ end;
paramanager.freecgpara(list,cgpara2);
paramanager.freecgpara(list,cgpara1);
g_call_system_proc(list,pd,nil);
@@ -2904,8 +2921,16 @@ implementation
if is_open_array(t) then
InternalError(201103054);
reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
- a_loadaddr_ref_cgpara(list,voidpointertype,href,cgpara2);
- a_loadaddr_ref_cgpara(list,t,ref,cgpara1);
+ if pd.is_pushleftright then
+ begin
+ a_loadaddr_ref_cgpara(list,t,ref,cgpara1);
+ a_loadaddr_ref_cgpara(list,voidpointertype,href,cgpara2);
+ end
+ else
+ begin
+ a_loadaddr_ref_cgpara(list,voidpointertype,href,cgpara2);
+ a_loadaddr_ref_cgpara(list,t,ref,cgpara1);
+ end;
paramanager.freecgpara(list,cgpara1);
paramanager.freecgpara(list,cgpara2);
g_call_system_proc(list,pd,nil);
@@ -2944,8 +2969,16 @@ implementation
paramanager.getintparaloc(pd,1,cgpara1);
paramanager.getintparaloc(pd,2,cgpara2);
reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
- a_loadaddr_ref_cgpara(list,voidpointertype,href,cgpara2);
- a_loadaddr_ref_cgpara(list,t,ref,cgpara1);
+ if pd.is_pushleftright then
+ begin
+ a_loadaddr_ref_cgpara(list,t,ref,cgpara1);
+ a_loadaddr_ref_cgpara(list,voidpointertype,href,cgpara2);
+ end
+ else
+ begin
+ a_loadaddr_ref_cgpara(list,voidpointertype,href,cgpara2);
+ a_loadaddr_ref_cgpara(list,t,ref,cgpara1);
+ end;
paramanager.freecgpara(list,cgpara1);
paramanager.freecgpara(list,cgpara2);
g_call_system_proc(list,pd,nil);
@@ -2986,8 +3019,16 @@ implementation
paramanager.getintparaloc(pd,1,cgpara1);
paramanager.getintparaloc(pd,2,cgpara2);
reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
- a_loadaddr_ref_cgpara(list,voidpointertype,href,cgpara2);
- a_loadaddr_ref_cgpara(list,t,ref,cgpara1);
+ if pd.is_pushleftright then
+ begin
+ a_loadaddr_ref_cgpara(list,t,ref,cgpara1);
+ a_loadaddr_ref_cgpara(list,voidpointertype,href,cgpara2);
+ end
+ else
+ begin
+ a_loadaddr_ref_cgpara(list,voidpointertype,href,cgpara2);
+ a_loadaddr_ref_cgpara(list,t,ref,cgpara1);
+ end;
paramanager.freecgpara(list,cgpara1);
paramanager.freecgpara(list,cgpara2);
g_call_system_proc(list,pd,nil);
@@ -3020,6 +3061,14 @@ implementation
paramanager.getintparaloc(pd,3,cgpara3);
reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
+ { if calling convention is left to right, push parameters 1 and 2 }
+ if pd.is_pushleftright then
+ begin
+ a_loadaddr_ref_cgpara(list,t,ref,cgpara1);
+ a_loadaddr_ref_cgpara(list,voidpointertype,href,cgpara2);
+ end;
+
+ { push parameter 3 }
if highloc.loc=LOC_CONSTANT then
a_load_const_cgpara(list,ptrsinttype,highloc.value+1,cgpara3)
else
@@ -3037,8 +3086,12 @@ implementation
a_load_reg_cgpara(list,ptrsinttype,lenreg,cgpara3);
end;
- a_loadaddr_ref_cgpara(list,voidpointertype,href,cgpara2);
- a_loadaddr_ref_cgpara(list,t,ref,cgpara1);
+ { if calling convention is right to left, push parameters 2 and 1 }
+ if not pd.is_pushleftright then
+ begin
+ a_loadaddr_ref_cgpara(list,voidpointertype,href,cgpara2);
+ a_loadaddr_ref_cgpara(list,t,ref,cgpara1);
+ end;
paramanager.freecgpara(list,cgpara1);
paramanager.freecgpara(list,cgpara2);
paramanager.freecgpara(list,cgpara3);
@@ -3308,12 +3361,24 @@ implementation
paramanager.getintparaloc(pd,1,cgpara1);
paramanager.getintparaloc(pd,2,cgpara2);
paramanager.getintparaloc(pd,3,cgpara3);
- { load size }
- a_load_reg_cgpara(list,ptrsinttype,sizereg,cgpara3);
- { load destination }
- a_load_reg_cgpara(list,ptrarrdef,destreg,cgpara2);
- { load source }
- a_load_reg_cgpara(list,ptrarrdef,sourcereg,cgpara1);
+ if pd.is_pushleftright then
+ begin
+ { load source }
+ a_load_reg_cgpara(list,ptrarrdef,sourcereg,cgpara1);
+ { load destination }
+ a_load_reg_cgpara(list,ptrarrdef,destreg,cgpara2);
+ { load size }
+ a_load_reg_cgpara(list,ptrsinttype,sizereg,cgpara3);
+ end
+ else
+ begin
+ { load size }
+ a_load_reg_cgpara(list,ptrsinttype,sizereg,cgpara3);
+ { load destination }
+ a_load_reg_cgpara(list,ptrarrdef,destreg,cgpara2);
+ { load source }
+ a_load_reg_cgpara(list,ptrarrdef,sourcereg,cgpara1);
+ end;
paramanager.freecgpara(list,cgpara3);
paramanager.freecgpara(list,cgpara2);
paramanager.freecgpara(list,cgpara1);
diff --git a/compiler/i8086/cgcpu.pas b/compiler/i8086/cgcpu.pas
new file mode 100644
index 0000000000..6725e16a58
--- /dev/null
+++ b/compiler/i8086/cgcpu.pas
@@ -0,0 +1,1521 @@
+{
+ Copyright (c) 1998-2002 by Florian Klaempfl
+
+ This unit implements the code generator for the i8086
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+ ****************************************************************************
+}
+unit cgcpu;
+
+{$i fpcdefs.inc}
+
+ interface
+
+ uses
+ globtype,
+ cgbase,cgobj,cg64f32,cgx86,
+ aasmbase,aasmtai,aasmdata,aasmcpu,
+ cpubase,parabase,cgutils,
+ symconst,symdef
+ ;
+
+ type
+
+ { tcg8086 }
+
+ tcg8086 = class(tcgx86)
+ procedure init_register_allocators;override;
+ procedure do_register_allocation(list:TAsmList;headertai:tai);override;
+
+ function getintregister(list:TAsmList;size:Tcgsize):Tregister;override;
+
+ procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg: TRegister); override;
+ procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; src, dst: TRegister); override;
+
+ { passing parameter using push instead of mov }
+ procedure a_load_reg_cgpara(list : TAsmList;size : tcgsize;r : tregister;const cgpara : tcgpara);override;
+ procedure a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const cgpara : tcgpara);override;
+ procedure a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const cgpara : tcgpara);override;
+ procedure a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const cgpara : tcgpara);override;
+
+ { move instructions }
+ procedure a_load_const_reg(list : TAsmList; tosize: tcgsize; a : tcgint;reg : tregister);override;
+ procedure a_load_const_ref(list : TAsmList; tosize: tcgsize; a : tcgint;const ref : treference);override;
+ procedure a_load_reg_ref(list : TAsmList;fromsize,tosize: tcgsize; reg : tregister;const ref : treference);override;
+ procedure a_load_ref_reg(list : TAsmList;fromsize,tosize: tcgsize;const ref : treference;reg : tregister);override;
+ procedure a_load_reg_reg(list : TAsmList;fromsize,tosize: tcgsize;reg1,reg2 : tregister);override;
+
+ procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: tresflags; reg: TRegister);override;
+ procedure g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref: TReference);override;
+
+ procedure g_proc_exit(list : TAsmList;parasize:longint;nostackframe:boolean);override;
+ procedure g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:tcgint;destreg:tregister);
+ procedure g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);
+
+ procedure g_exception_reason_save(list : TAsmList; const href : treference);override;
+ procedure g_exception_reason_save_const(list : TAsmList; const href : treference; a: tcgint);override;
+ procedure g_exception_reason_load(list : TAsmList; const href : treference);override;
+
+ procedure g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: tcgint);override;
+ procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);override;
+ procedure g_maybe_got_init(list: TAsmList); override;
+
+ procedure get_32bit_ops(op: TOpCG; out op1,op2: TAsmOp);
+ end;
+
+ tcg64f8086 = class(tcg64f32)
+{ procedure a_op64_ref_reg(list : TAsmList;op:TOpCG;size : tcgsize;const ref : treference;reg : tregister64);override;}
+ procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);override;
+ procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);override;
+{ procedure a_op64_const_ref(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const ref : treference);override;}
+ private
+ procedure get_64bit_ops(op:TOpCG;var op1,op2:TAsmOp);
+ end;
+
+ procedure create_codegen;
+
+ implementation
+
+ uses
+ globals,verbose,systems,cutils,
+ paramgr,procinfo,fmodule,
+ rgcpu,rgx86,cpuinfo,
+ symtype,symsym;
+
+ function use_push(const cgpara:tcgpara):boolean;
+ begin
+ result:=(not paramanager.use_fixed_stack) and
+ assigned(cgpara.location) and
+ (cgpara.location^.loc=LOC_REFERENCE) and
+ (cgpara.location^.reference.index=NR_STACK_POINTER_REG);
+ end;
+
+
+ procedure tcg8086.init_register_allocators;
+ begin
+ inherited init_register_allocators;
+ if not(target_info.system in [system_i386_darwin,system_i386_iphonesim]) and
+ (cs_create_pic in current_settings.moduleswitches) then
+ rg[R_INTREGISTER]:=trgcpu.create(R_INTREGISTER,R_SUBWHOLE,[RS_AX,RS_DX,RS_CX,RS_SI,RS_DI],first_int_imreg,[RS_BP])
+ else
+ if (cs_useebp in current_settings.optimizerswitches) and assigned(current_procinfo) and (current_procinfo.framepointer<>NR_BP) then
+ rg[R_INTREGISTER]:=trgcpu.create(R_INTREGISTER,R_SUBWHOLE,[RS_AX,RS_DX,RS_CX,RS_BX,RS_SI,RS_DI,RS_BP],first_int_imreg,[])
+ else
+ rg[R_INTREGISTER]:=trgintcpu.create(R_INTREGISTER,R_SUBWHOLE,[RS_AX,RS_DX,RS_CX,RS_BX,RS_SI,RS_DI],first_int_imreg,[RS_BP]);
+ rg[R_MMXREGISTER]:=trgcpu.create(R_MMXREGISTER,R_SUBNONE,[RS_XMM0,RS_XMM1,RS_XMM2,RS_XMM3,RS_XMM4,RS_XMM5,RS_XMM6,RS_XMM7],first_mm_imreg,[]);
+ rg[R_MMREGISTER]:=trgcpu.create(R_MMREGISTER,R_SUBWHOLE,[RS_XMM0,RS_XMM1,RS_XMM2,RS_XMM3,RS_XMM4,RS_XMM5,RS_XMM6,RS_XMM7],first_mm_imreg,[]);
+ rgfpu:=Trgx86fpu.create;
+ end;
+
+ procedure tcg8086.do_register_allocation(list:TAsmList;headertai:tai);
+ begin
+ if (pi_needs_got in current_procinfo.flags) then
+ begin
+ if getsupreg(current_procinfo.got) < first_int_imreg then
+ include(rg[R_INTREGISTER].used_in_proc,getsupreg(current_procinfo.got));
+ end;
+ inherited do_register_allocation(list,headertai);
+ end;
+
+
+ function tcg8086.getintregister(list: TAsmList; size: Tcgsize): Tregister;
+ begin
+ case size of
+ OS_8, OS_S8,
+ OS_16, OS_S16:
+ Result := inherited getintregister(list, size);
+ OS_32, OS_S32:
+ begin
+ Result:=inherited getintregister(list, OS_16);
+ { ensure that the high register can be retrieved by
+ GetNextReg
+ }
+ if inherited getintregister(list, OS_16)<>GetNextReg(Result) then
+ internalerror(2013030202);
+ end;
+ else
+ internalerror(2013030201);
+ end;
+ end;
+
+
+ procedure tcg8086.a_op_const_reg(list: TAsmList; Op: TOpCG; size: TCGSize;
+ a: tcgint; reg: TRegister);
+ var
+ tmpreg: tregister;
+ op1, op2: TAsmOp;
+ begin
+ optimize_op_const(op, a);
+ check_register_size(size,reg);
+
+ if size in [OS_64, OS_S64] then
+ internalerror(2013030904);
+
+ if size in [OS_32, OS_S32] then
+ begin
+ case op of
+ OP_NONE:
+ begin
+ { Opcode is optimized away }
+ end;
+ OP_MOVE:
+ begin
+ { Optimized, replaced with a simple load }
+ a_load_const_reg(list,size,a,reg);
+ end;
+ OP_ADD, OP_AND, OP_OR, OP_SUB, OP_XOR:
+ begin
+ if (longword(a) = high(longword)) and
+ (op in [OP_AND,OP_OR,OP_XOR]) then
+ begin
+ case op of
+ OP_AND:
+ exit;
+ OP_OR:
+ a_load_const_reg(list,size,high(longword),reg);
+ OP_XOR:
+ begin
+ list.concat(taicpu.op_reg(A_NOT,S_W,reg));
+ list.concat(taicpu.op_reg(A_NOT,S_W,GetNextReg(reg)));
+ end;
+ end
+ end
+ else
+ begin
+ get_32bit_ops(op, op1, op2);
+ list.concat(taicpu.op_const_reg(op1,S_W,aint(a and $FFFF),reg));
+ list.concat(taicpu.op_const_reg(op2,S_W,aint(a shr 16),GetNextReg(reg)));
+ end;
+ end;
+ else
+ begin
+ tmpreg:=getintregister(list,size);
+ a_load_const_reg(list,size,a,tmpreg);
+ a_op_reg_reg(list,op,size,tmpreg,reg);
+ end;
+ end;
+ end
+ else
+ inherited a_op_const_reg(list, Op, size, a, reg);
+ end;
+
+
+ procedure tcg8086.a_op_reg_reg(list: TAsmList; Op: TOpCG; size: TCGSize;
+ src, dst: TRegister);
+ var
+ op1, op2: TAsmOp;
+ hl_skip, hl_loop_start: TAsmLabel;
+ ai: taicpu;
+ begin
+ check_register_size(size,src);
+ check_register_size(size,dst);
+ if size in [OS_64, OS_S64] then
+ internalerror(2013030902);
+ if size in [OS_32, OS_S32] then
+ begin
+ case op of
+ OP_NEG:
+ begin
+ if src<>dst then
+ a_load_reg_reg(list,size,size,src,dst);
+ list.concat(taicpu.op_reg(A_NOT, S_W, GetNextReg(dst)));
+ list.concat(taicpu.op_reg(A_NEG, S_W, dst));
+ list.concat(taicpu.op_const_reg(A_SBB, S_W,-1, GetNextReg(dst)));
+ end;
+ OP_NOT:
+ begin
+ if src<>dst then
+ a_load_reg_reg(list,size,size,src,dst);
+ list.concat(taicpu.op_reg(A_NOT, S_W, dst));
+ list.concat(taicpu.op_reg(A_NOT, S_W, GetNextReg(dst)));
+ end;
+ OP_ADD,OP_SUB,OP_XOR,OP_OR,OP_AND:
+ begin
+ get_32bit_ops(op, op1, op2);
+ list.concat(taicpu.op_reg_reg(op1, S_W, src, dst));
+ list.concat(taicpu.op_reg_reg(op2, S_W, GetNextReg(src), GetNextReg(dst)));
+ end;
+ OP_SHR,OP_SHL,OP_SAR:
+ begin
+ getcpuregister(list,NR_CX);
+ a_load_reg_reg(list,size,OS_16,src,NR_CX);
+ list.concat(taicpu.op_const_reg(A_AND,S_W,$1f,NR_CX));
+
+ current_asmdata.getjumplabel(hl_skip);
+ ai:=Taicpu.Op_Sym(A_Jcc,S_NO,hl_skip);
+ ai.SetCondition(C_Z);
+ ai.is_jmp:=true;
+ list.concat(ai);
+
+ current_asmdata.getjumplabel(hl_loop_start);
+ a_label(list,hl_loop_start);
+
+ case op of
+ OP_SHR:
+ begin
+ list.concat(taicpu.op_const_reg(A_SHR,S_W,1,GetNextReg(dst)));
+ list.concat(taicpu.op_const_reg(A_RCR,S_W,1,dst));
+ end;
+ OP_SAR:
+ begin
+ list.concat(taicpu.op_const_reg(A_SAR,S_W,1,GetNextReg(dst)));
+ list.concat(taicpu.op_const_reg(A_RCR,S_W,1,dst));
+ end;
+ OP_SHL:
+ begin
+ list.concat(taicpu.op_const_reg(A_SHL,S_W,1,dst));
+ list.concat(taicpu.op_const_reg(A_RCL,S_W,1,GetNextReg(dst)));
+ end;
+ else
+ internalerror(2013030903);
+ end;
+
+ ai:=Taicpu.Op_Sym(A_LOOP,S_W,hl_loop_start);
+ ai.is_jmp:=true;
+ list.concat(ai);
+
+ a_label(list,hl_skip);
+
+ ungetcpuregister(list,NR_CX);
+ end;
+ else
+ internalerror(2013030901);
+ end;
+ end
+ else
+ inherited a_op_reg_reg(list, Op, size, src, dst);
+ end;
+
+
+ procedure tcg8086.a_load_reg_cgpara(list : TAsmList;size : tcgsize;r : tregister;const cgpara : tcgpara);
+ var
+ pushsize, pushsize2: tcgsize;
+ begin
+ check_register_size(size,r);
+ if use_push(cgpara) then
+ begin
+ if tcgsize2size[cgpara.Size] > 2 then
+ begin
+ if tcgsize2size[cgpara.Size] <> 4 then
+ internalerror(2013031101);
+ if cgpara.location^.Next = nil then
+ begin
+ if tcgsize2size[cgpara.location^.size] <> 4 then
+ internalerror(2013031101);
+ end
+ else
+ begin
+ if tcgsize2size[cgpara.location^.size] <> 2 then
+ internalerror(2013031101);
+ if tcgsize2size[cgpara.location^.Next^.size] <> 2 then
+ internalerror(2013031101);
+ if cgpara.location^.Next^.Next <> nil then
+ internalerror(2013031101);
+ end;
+
+ if tcgsize2size[cgpara.size]>cgpara.alignment then
+ pushsize:=cgpara.size
+ else
+ pushsize:=int_cgsize(cgpara.alignment);
+ pushsize2 := int_cgsize(tcgsize2size[pushsize] - 2);
+ list.concat(taicpu.op_reg(A_PUSH,TCgsize2opsize[pushsize2],makeregsize(list,GetNextReg(r),pushsize2)));
+ list.concat(taicpu.op_reg(A_PUSH,S_W,makeregsize(list,r,OS_16)));
+ end
+ else
+ begin
+ cgpara.check_simple_location;
+ if tcgsize2size[cgpara.location^.size]>cgpara.alignment then
+ pushsize:=cgpara.location^.size
+ else
+ pushsize:=int_cgsize(cgpara.alignment);
+ list.concat(taicpu.op_reg(A_PUSH,TCgsize2opsize[pushsize],makeregsize(list,r,pushsize)));
+ end;
+ end
+ else
+ inherited a_load_reg_cgpara(list,size,r,cgpara);
+ end;
+
+
+ procedure tcg8086.a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const cgpara : tcgpara);
+ var
+ pushsize : tcgsize;
+ begin
+ if use_push(cgpara) then
+ begin
+ if tcgsize2size[cgpara.Size] > 2 then
+ begin
+ if tcgsize2size[cgpara.Size] <> 4 then
+ internalerror(2013031101);
+ if cgpara.location^.Next = nil then
+ begin
+ if tcgsize2size[cgpara.location^.size] <> 4 then
+ internalerror(2013031101);
+ end
+ else
+ begin
+ if tcgsize2size[cgpara.location^.size] <> 2 then
+ internalerror(2013031101);
+ if tcgsize2size[cgpara.location^.Next^.size] <> 2 then
+ internalerror(2013031101);
+ if cgpara.location^.Next^.Next <> nil then
+ internalerror(2013031101);
+ end;
+ if (cgpara.alignment <> 4) and (cgpara.alignment <> 2) then
+ internalerror(2013031101);
+
+ list.concat(taicpu.op_const(A_PUSH,S_W,a shr 16));
+ list.concat(taicpu.op_const(A_PUSH,S_W,a and $FFFF));
+ end
+ else
+ begin
+ cgpara.check_simple_location;
+ if tcgsize2size[cgpara.location^.size]>cgpara.alignment then
+ pushsize:=cgpara.location^.size
+ else
+ pushsize:=int_cgsize(cgpara.alignment);
+ list.concat(taicpu.op_const(A_PUSH,tcgsize2opsize[pushsize],a));
+ end;
+ end
+ else
+ inherited a_load_const_cgpara(list,size,a,cgpara);
+ end;
+
+
+ procedure tcg8086.a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const cgpara : tcgpara);
+
+ procedure pushdata(paraloc:pcgparalocation;ofs:tcgint);
+ var
+ pushsize : tcgsize;
+ opsize : topsize;
+ tmpreg : tregister;
+ href,tmpref: treference;
+ begin
+ if not assigned(paraloc) then
+ exit;
+ if (paraloc^.loc<>LOC_REFERENCE) or
+ (paraloc^.reference.index<>NR_STACK_POINTER_REG) or
+ (tcgsize2size[paraloc^.size]>4) then
+ internalerror(200501162);
+ { Pushes are needed in reverse order, add the size of the
+ current location to the offset where to load from. This
+ prevents wrong calculations for the last location when
+ the size is not a power of 2 }
+ if assigned(paraloc^.next) then
+ pushdata(paraloc^.next,ofs+tcgsize2size[paraloc^.size]);
+ { Push the data starting at ofs }
+ href:=r;
+ inc(href.offset,ofs);
+ if tcgsize2size[paraloc^.size]>cgpara.alignment then
+ pushsize:=paraloc^.size
+ else
+ pushsize:=int_cgsize(cgpara.alignment);
+ opsize:=TCgsize2opsize[pushsize];
+ { for go32v2 we obtain OS_F32,
+ but pushs is not valid, we need pushl }
+ if opsize=S_FS then
+ opsize:=S_L;
+ if tcgsize2size[paraloc^.size]<cgpara.alignment then
+ begin
+ tmpreg:=getintregister(list,pushsize);
+ a_load_ref_reg(list,paraloc^.size,pushsize,href,tmpreg);
+ list.concat(taicpu.op_reg(A_PUSH,opsize,tmpreg));
+ end
+ else
+ begin
+ make_simple_ref(list,href);
+ if tcgsize2size[pushsize] > 2 then
+ begin
+ tmpref := href;
+ Inc(tmpref.offset, 2);
+ list.concat(taicpu.op_ref(A_PUSH,TCgsize2opsize[int_cgsize(tcgsize2size[pushsize]-2)],tmpref));
+ end;
+ list.concat(taicpu.op_ref(A_PUSH,opsize,href));
+ end;
+ end;
+
+ var
+ len : tcgint;
+ href : treference;
+ begin
+ { cgpara.size=OS_NO requires a copy on the stack }
+ if use_push(cgpara) then
+ begin
+ { Record copy? }
+ if (cgpara.size in [OS_NO,OS_F64]) or (size=OS_NO) then
+ begin
+ cgpara.check_simple_location;
+ len:=align(cgpara.intsize,cgpara.alignment);
+ g_stackpointer_alloc(list,len);
+ reference_reset_base(href,NR_STACK_POINTER_REG,0,4);
+ g_concatcopy(list,r,href,len);
+ end
+ else
+ begin
+ if tcgsize2size[cgpara.size]<>tcgsize2size[size] then
+ internalerror(200501161);
+ { We need to push the data in reverse order,
+ therefor we use a recursive algorithm }
+ pushdata(cgpara.location,0);
+ end
+ end
+ else
+ inherited a_load_ref_cgpara(list,size,r,cgpara);
+ end;
+
+
+ procedure tcg8086.a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const cgpara : tcgpara);
+ var
+ tmpreg : tregister;
+ opsize : topsize;
+ tmpref : treference;
+ begin
+ with r do
+ begin
+ if use_push(cgpara) then
+ begin
+ cgpara.check_simple_location;
+ opsize:=tcgsize2opsize[OS_ADDR];
+ if (segment=NR_NO) and (base=NR_NO) and (index=NR_NO) then
+ begin
+ if assigned(symbol) then
+ begin
+ if (target_info.system in [system_i386_darwin,system_i386_iphonesim]) and
+ ((r.symbol.bind in [AB_EXTERNAL,AB_WEAK_EXTERNAL]) or
+ (cs_create_pic in current_settings.moduleswitches)) then
+ begin
+ tmpreg:=getaddressregister(list);
+ a_loadaddr_ref_reg(list,r,tmpreg);
+ list.concat(taicpu.op_reg(A_PUSH,opsize,tmpreg));
+ end
+ else if cs_create_pic in current_settings.moduleswitches then
+ begin
+ if offset<>0 then
+ begin
+ tmpreg:=getaddressregister(list);
+ a_loadaddr_ref_reg(list,r,tmpreg);
+ list.concat(taicpu.op_reg(A_PUSH,opsize,tmpreg));
+ end
+ else
+ begin
+ reference_reset_symbol(tmpref,r.symbol,0,r.alignment);
+ tmpref.refaddr:=addr_pic;
+ tmpref.base:=current_procinfo.got;
+{$ifdef EXTDEBUG}
+ if not (pi_needs_got in current_procinfo.flags) then
+ Comment(V_warning,'pi_needs_got not included');
+{$endif EXTDEBUG}
+ include(current_procinfo.flags,pi_needs_got);
+ list.concat(taicpu.op_ref(A_PUSH,S_L,tmpref));
+ end
+ end
+ else
+ list.concat(Taicpu.Op_sym_ofs(A_PUSH,opsize,symbol,offset));
+ end
+ else
+ list.concat(Taicpu.Op_const(A_PUSH,opsize,offset));
+ end
+ else if (segment=NR_NO) and (base=NR_NO) and (index<>NR_NO) and
+ (offset=0) and (scalefactor=0) and (symbol=nil) then
+ list.concat(Taicpu.Op_reg(A_PUSH,opsize,index))
+ else if (segment=NR_NO) and (base<>NR_NO) and (index=NR_NO) and
+ (offset=0) and (symbol=nil) then
+ list.concat(Taicpu.Op_reg(A_PUSH,opsize,base))
+ else
+ begin
+ tmpreg:=getaddressregister(list);
+ a_loadaddr_ref_reg(list,r,tmpreg);
+ list.concat(taicpu.op_reg(A_PUSH,opsize,tmpreg));
+ end;
+ end
+ else
+ inherited a_loadaddr_ref_cgpara(list,r,cgpara);
+ end;
+ end;
+
+
+ procedure tcg8086.a_load_const_reg(list : TAsmList; tosize: tcgsize; a : tcgint;reg : tregister);
+ begin
+ check_register_size(tosize,reg);
+ if tosize in [OS_S32,OS_32] then
+ begin
+ list.concat(taicpu.op_const_reg(A_MOV,S_W,longint(a and $ffff),reg));
+ list.concat(taicpu.op_const_reg(A_MOV,S_W,longint(a shr 16),GetNextReg(reg)));
+ end
+ else
+ list.concat(taicpu.op_const_reg(A_MOV,TCGSize2OpSize[tosize],a,reg));
+ end;
+
+
+ procedure tcg8086.a_load_const_ref(list : TAsmList; tosize: tcgsize; a : tcgint;const ref : treference);
+ var
+ tmpref : treference;
+ begin
+ tmpref:=ref;
+ make_simple_ref(list,tmpref);
+
+ if tosize in [OS_S32,OS_32] then
+ begin
+ a_load_const_ref(list,OS_16,longint(a and $ffff),tmpref);
+ inc(tmpref.offset,2);
+ a_load_const_ref(list,OS_16,longint(a shr 16),tmpref);
+ end
+ else
+ list.concat(taicpu.op_const_ref(A_MOV,TCGSize2OpSize[tosize],a,tmpref));
+ end;
+
+
+
+ procedure tcg8086.a_load_reg_ref(list : TAsmList;fromsize,tosize: tcgsize; reg : tregister;const ref : treference);
+ var
+ tmpsize : tcgsize;
+ tmpreg : tregister;
+ tmpref : treference;
+ begin
+ tmpref:=ref;
+ make_simple_ref(list,tmpref);
+ check_register_size(fromsize,reg);
+
+ case tosize of
+ OS_8,OS_S8:
+ if fromsize in [OS_8,OS_S8] then
+ list.concat(taicpu.op_reg_ref(A_MOV, S_B, reg, tmpref))
+ else
+ internalerror(2013030310);
+ OS_16,OS_S16:
+ if fromsize in [OS_16,OS_S16] then
+ list.concat(taicpu.op_reg_ref(A_MOV, S_W, reg, tmpref))
+ else
+ internalerror(2013030312);
+ OS_32,OS_S32:
+ if fromsize in [OS_32,OS_S32] then
+ begin
+ list.concat(taicpu.op_reg_ref(A_MOV, S_W, reg, tmpref));
+ inc(tmpref.offset, 2);
+ list.concat(taicpu.op_reg_ref(A_MOV, S_W, GetNextReg(reg), tmpref));
+ end
+ else
+ internalerror(2013030313);
+ else
+ internalerror(2013030311);
+ end;
+ end;
+
+
+ procedure tcg8086.a_load_ref_reg(list : TAsmList;fromsize,tosize: tcgsize;const ref : treference;reg : tregister);
+
+ procedure add_mov(instr: Taicpu);
+ begin
+ { Notify the register allocator that we have written a move instruction so
+ it can try to eliminate it. }
+ if (instr.oper[0]^.reg<>current_procinfo.framepointer) and (instr.oper[0]^.reg<>NR_STACK_POINTER_REG) then
+ add_move_instruction(instr);
+ list.concat(instr);
+ end;
+
+ var
+ tmpref : treference;
+ begin
+ tmpref:=ref;
+ make_simple_ref(list,tmpref);
+ check_register_size(tosize,reg);
+
+ if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
+ internalerror(2011021307);
+{ if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
+ fromsize:=tosize;}
+
+ case tosize of
+ OS_8,OS_S8:
+ if fromsize in [OS_8,OS_S8] then
+ list.concat(taicpu.op_ref_reg(A_MOV, S_B, tmpref, reg))
+ else
+ internalerror(2013030210);
+ OS_16,OS_S16:
+ case fromsize of
+ OS_8:
+ begin
+ list.concat(taicpu.op_const_reg(A_MOV, S_W, 0, reg));
+ reg := makeregsize(list, reg, OS_8);
+ list.concat(taicpu.op_ref_reg(A_MOV, S_B, tmpref, reg));
+ end;
+ OS_S8:
+ begin
+ getcpuregister(list, NR_AX);
+ list.concat(taicpu.op_ref_reg(A_MOV, S_B, tmpref, NR_AL));
+ list.concat(taicpu.op_none(A_CBW));
+ add_mov(taicpu.op_reg_reg(A_MOV, S_W, NR_AX, reg));
+ ungetcpuregister(list, NR_AX);
+ end;
+ OS_16,OS_S16:
+ list.concat(taicpu.op_ref_reg(A_MOV, S_W, tmpref, reg));
+ else
+ internalerror(2013030212);
+ end;
+ OS_32,OS_S32:
+ case fromsize of
+ OS_8:
+ begin
+ list.concat(taicpu.op_const_reg(A_MOV,S_W,0,GetNextReg(reg)));
+ list.concat(taicpu.op_const_reg(A_MOV, S_W, 0, reg));
+ reg := makeregsize(list, reg, OS_8);
+ list.concat(taicpu.op_ref_reg(A_MOV, S_B, tmpref, reg));
+ end;
+ OS_S8:
+ begin
+ getcpuregister(list, NR_AX);
+ getcpuregister(list, NR_DX);
+ list.concat(taicpu.op_ref_reg(A_MOV, S_B, tmpref, NR_AL));
+ list.concat(taicpu.op_none(A_CBW));
+ list.concat(taicpu.op_none(A_CWD));
+ add_mov(taicpu.op_reg_reg(A_MOV, S_W, NR_AX, reg));
+ add_mov(taicpu.op_reg_reg(A_MOV, S_W, NR_DX, GetNextReg(reg)));
+ ungetcpuregister(list, NR_AX);
+ ungetcpuregister(list, NR_DX);
+ end;
+ OS_16:
+ begin
+ list.concat(taicpu.op_ref_reg(A_MOV, S_W, tmpref, reg));
+ list.concat(taicpu.op_const_reg(A_MOV,S_W,0,GetNextReg(reg)));
+ end;
+ OS_S16:
+ begin
+ getcpuregister(list, NR_AX);
+ getcpuregister(list, NR_DX);
+ list.concat(taicpu.op_ref_reg(A_MOV, S_W, tmpref, NR_AX));
+ list.concat(taicpu.op_none(A_CWD));
+ add_mov(taicpu.op_reg_reg(A_MOV, S_W, NR_AX, reg));
+ add_mov(taicpu.op_reg_reg(A_MOV, S_W, NR_DX, GetNextReg(reg)));
+ ungetcpuregister(list, NR_AX);
+ ungetcpuregister(list, NR_DX);
+ end;
+ OS_32,OS_S32:
+ begin
+ list.concat(taicpu.op_ref_reg(A_MOV, S_W, tmpref, reg));
+ inc(tmpref.offset, 2);
+ list.concat(taicpu.op_ref_reg(A_MOV, S_W, tmpref, GetNextReg(reg)));
+ end;
+ else
+ internalerror(2013030213);
+ end;
+ else
+ internalerror(2013030211);
+ end;
+ end;
+
+
+ procedure tcg8086.a_load_reg_reg(list : TAsmList;fromsize,tosize: tcgsize;reg1,reg2 : tregister);
+
+ procedure add_mov(instr: Taicpu);
+ begin
+ { Notify the register allocator that we have written a move instruction so
+ it can try to eliminate it. }
+ if (instr.oper[0]^.reg<>current_procinfo.framepointer) and (instr.oper[0]^.reg<>NR_STACK_POINTER_REG) then
+ add_move_instruction(instr);
+ list.concat(instr);
+ end;
+
+ begin
+ check_register_size(fromsize,reg1);
+ check_register_size(tosize,reg2);
+
+ if tcgsize2size[fromsize]>tcgsize2size[tosize] then
+ begin
+ if tosize in [OS_32, OS_S32] then
+ internalerror(2013031801);
+ reg1:=makeregsize(list,reg1,tosize);
+ fromsize:=tosize;
+ end;
+
+ if (reg1<>reg2) then
+ begin
+ case tosize of
+ OS_8,OS_S8:
+ if fromsize in [OS_8,OS_S8] then
+ add_mov(taicpu.op_reg_reg(A_MOV, S_B, reg1, reg2))
+ else
+ internalerror(2013030210);
+ OS_16,OS_S16:
+ case fromsize of
+ OS_8:
+ begin
+ list.concat(taicpu.op_const_reg(A_MOV, S_W, 0, reg2));
+ reg2 := makeregsize(list, reg2, OS_8);
+ add_mov(taicpu.op_reg_reg(A_MOV, S_B, reg1, reg2));
+ end;
+ OS_S8:
+ begin
+ getcpuregister(list, NR_AX);
+ add_mov(taicpu.op_reg_reg(A_MOV, S_B, reg1, NR_AL));
+ list.concat(taicpu.op_none(A_CBW));
+ add_mov(taicpu.op_reg_reg(A_MOV, S_W, NR_AX, reg2));
+ ungetcpuregister(list, NR_AX);
+ end;
+ OS_16,OS_S16:
+ add_mov(taicpu.op_reg_reg(A_MOV, S_W, reg1, reg2));
+ else
+ internalerror(2013030212);
+ end;
+ OS_32,OS_S32:
+ case fromsize of
+ OS_8:
+ begin
+ list.concat(taicpu.op_const_reg(A_MOV, S_W, 0, GetNextReg(reg2)));
+ list.concat(taicpu.op_const_reg(A_MOV, S_W, 0, reg2));
+ reg2 := makeregsize(list, reg2, OS_8);
+ add_mov(taicpu.op_reg_reg(A_MOV, S_B, reg1, reg2));
+ end;
+ OS_S8:
+ begin
+ getcpuregister(list, NR_AX);
+ getcpuregister(list, NR_DX);
+ add_mov(taicpu.op_reg_reg(A_MOV, S_B, reg1, NR_AL));
+ list.concat(taicpu.op_none(A_CBW));
+ list.concat(taicpu.op_none(A_CWD));
+ add_mov(taicpu.op_reg_reg(A_MOV, S_W, NR_AX, reg2));
+ add_mov(taicpu.op_reg_reg(A_MOV, S_W, NR_DX, GetNextReg(reg2)));
+ ungetcpuregister(list, NR_AX);
+ ungetcpuregister(list, NR_DX);
+ end;
+ OS_16:
+ begin
+ add_mov(taicpu.op_reg_reg(A_MOV, S_W, reg1, reg2));
+ list.concat(taicpu.op_const_reg(A_MOV,S_W,0,GetNextReg(reg2)));
+ end;
+ OS_S16:
+ begin
+ getcpuregister(list, NR_AX);
+ getcpuregister(list, NR_DX);
+ add_mov(taicpu.op_reg_reg(A_MOV, S_W, reg1, NR_AX));
+ list.concat(taicpu.op_none(A_CWD));
+ add_mov(taicpu.op_reg_reg(A_MOV, S_W, NR_AX, reg2));
+ add_mov(taicpu.op_reg_reg(A_MOV, S_W, NR_DX, GetNextReg(reg2)));
+ ungetcpuregister(list, NR_AX);
+ ungetcpuregister(list, NR_DX);
+ end;
+ OS_32,OS_S32:
+ begin
+ add_mov(taicpu.op_reg_reg(A_MOV, S_W, reg1, reg2));
+ add_mov(taicpu.op_reg_reg(A_MOV, S_W, GetNextReg(reg1), GetNextReg(reg2)));
+ end;
+ else
+ internalerror(2013030213);
+ end;
+ else
+ internalerror(2013030211);
+ end;
+ end;
+ end;
+
+
+ procedure tcg8086.g_flags2reg(list: TAsmList; size: TCgSize; const f: tresflags; reg: TRegister);
+ var
+ ai : taicpu;
+ hreg, hreg16 : tregister;
+ hl_skip: TAsmLabel;
+ invf: TResFlags;
+ begin
+ hreg:=makeregsize(list,reg,OS_8);
+
+ invf := f;
+ inverse_flags(invf);
+
+ list.concat(Taicpu.op_const_reg(A_MOV, S_B, 0, hreg));
+
+ current_asmdata.getjumplabel(hl_skip);
+ ai:=Taicpu.Op_Sym(A_Jcc,S_NO,hl_skip);
+ ai.SetCondition(flags_to_cond(invf));
+ ai.is_jmp:=true;
+ list.concat(ai);
+
+ { 16-bit INC is shorter than 8-bit }
+ hreg16:=makeregsize(list,hreg,OS_16);
+ list.concat(Taicpu.op_reg(A_INC, S_W, hreg16));
+
+ a_label(list,hl_skip);
+
+ if reg<>hreg then
+ a_load_reg_reg(list,OS_8,size,hreg,reg);
+ end;
+
+
+ procedure tcg8086.g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref: TReference);
+ var
+ tmpreg : tregister;
+ begin
+ tmpreg:=getintregister(list,size);
+ g_flags2reg(list,size,f,tmpreg);
+ a_load_reg_ref(list,size,size,tmpreg,ref);
+ end;
+
+
+ procedure tcg8086.g_proc_exit(list : TAsmList;parasize:longint;nostackframe:boolean);
+ var
+ stacksize : longint;
+ begin
+ { MMX needs to call EMMS }
+ if assigned(rg[R_MMXREGISTER]) and
+ (rg[R_MMXREGISTER].uses_registers) then
+ list.concat(Taicpu.op_none(A_EMMS,S_NO));
+
+ { remove stackframe }
+ if not nostackframe then
+ begin
+ if (current_procinfo.framepointer=NR_STACK_POINTER_REG) then
+ begin
+ stacksize:=current_procinfo.calc_stackframe_size;
+ if (target_info.stackalign>4) and
+ ((stacksize <> 0) or
+ (pi_do_call in current_procinfo.flags) or
+ { can't detect if a call in this case -> use nostackframe }
+ { if you (think you) know what you are doing }
+ (po_assembler in current_procinfo.procdef.procoptions)) then
+ stacksize := align(stacksize+sizeof(aint),target_info.stackalign) - sizeof(aint);
+ if (stacksize<>0) then
+ cg.a_op_const_reg(list,OP_ADD,OS_ADDR,stacksize,current_procinfo.framepointer);
+ end
+ else
+ begin
+ list.concat(Taicpu.op_reg_reg(A_MOV, S_W, NR_BP, NR_SP));
+ list.concat(Taicpu.op_reg(A_POP, S_W, NR_BP));
+ {todo: use LEAVE for 286+}
+ {list.concat(Taicpu.op_none(A_LEAVE,S_NO));}
+ end;
+ list.concat(tai_regalloc.dealloc(current_procinfo.framepointer,nil));
+ end;
+
+ { return from proc }
+ if (po_interrupt in current_procinfo.procdef.procoptions) and
+ { this messes up stack alignment }
+ (target_info.stackalign=4) then
+ begin
+ if assigned(current_procinfo.procdef.funcretloc[calleeside].location) and
+ (current_procinfo.procdef.funcretloc[calleeside].location^.loc=LOC_REGISTER) then
+ begin
+ if (getsupreg(current_procinfo.procdef.funcretloc[calleeside].location^.register)=RS_EAX) then
+ list.concat(Taicpu.Op_const_reg(A_ADD,S_L,4,NR_ESP))
+ else
+ internalerror(2010053001);
+ end
+ else
+ list.concat(Taicpu.Op_reg(A_POP,S_L,NR_EAX));
+ list.concat(Taicpu.Op_reg(A_POP,S_L,NR_EBX));
+ list.concat(Taicpu.Op_reg(A_POP,S_L,NR_ECX));
+
+ if (current_procinfo.procdef.funcretloc[calleeside].size in [OS_64,OS_S64]) and
+ assigned(current_procinfo.procdef.funcretloc[calleeside].location) and
+ assigned(current_procinfo.procdef.funcretloc[calleeside].location^.next) and
+ (current_procinfo.procdef.funcretloc[calleeside].location^.next^.loc=LOC_REGISTER) then
+ begin
+ if (getsupreg(current_procinfo.procdef.funcretloc[calleeside].location^.next^.register)=RS_EDX) then
+ list.concat(Taicpu.Op_const_reg(A_ADD,S_L,4,NR_ESP))
+ else
+ internalerror(2010053002);
+ end
+ else
+ list.concat(Taicpu.Op_reg(A_POP,S_L,NR_EDX));
+
+ list.concat(Taicpu.Op_reg(A_POP,S_L,NR_ESI));
+ list.concat(Taicpu.Op_reg(A_POP,S_L,NR_EDI));
+ { .... also the segment registers }
+ list.concat(Taicpu.Op_reg(A_POP,S_W,NR_DS));
+ list.concat(Taicpu.Op_reg(A_POP,S_W,NR_ES));
+ list.concat(Taicpu.Op_reg(A_POP,S_W,NR_FS));
+ list.concat(Taicpu.Op_reg(A_POP,S_W,NR_GS));
+ { this restores the flags }
+ list.concat(Taicpu.Op_none(A_IRET,S_NO));
+ end
+ { Routines with the poclearstack flag set use only a ret }
+ else if (current_procinfo.procdef.proccalloption in clearstack_pocalls) and
+ (not paramanager.use_fixed_stack) then
+ begin
+ { complex return values are removed from stack in C code PM }
+ { but not on win32 }
+ { and not for safecall with hidden exceptions, because the result }
+ { wich contains the exception is passed in EAX }
+ if (target_info.system <> system_i386_win32) and
+ not ((current_procinfo.procdef.proccalloption = pocall_safecall) and
+ (tf_safecall_exceptions in target_info.flags)) and
+ paramanager.ret_in_param(current_procinfo.procdef.returndef,
+ current_procinfo.procdef) then
+ list.concat(Taicpu.Op_const(A_RET,S_W,sizeof(aint)))
+ else
+ list.concat(Taicpu.Op_none(A_RET,S_NO));
+ end
+ { ... also routines with parasize=0 }
+ else if (parasize=0) then
+ list.concat(Taicpu.Op_none(A_RET,S_NO))
+ else
+ begin
+ { parameters are limited to 65535 bytes because ret allows only imm16 }
+ if (parasize>65535) then
+ CGMessage(cg_e_parasize_too_big);
+ list.concat(Taicpu.Op_const(A_RET,S_W,parasize));
+ end;
+ end;
+
+
+ procedure tcg8086.g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:tcgint;destreg:tregister);
+ var
+ power,len : longint;
+ opsize : topsize;
+{$ifndef __NOWINPECOFF__}
+ again,ok : tasmlabel;
+{$endif}
+ begin
+ { get stack space }
+ getcpuregister(list,NR_EDI);
+ a_load_loc_reg(list,OS_INT,lenloc,NR_EDI);
+ list.concat(Taicpu.op_reg(A_INC,S_L,NR_EDI));
+ { Now EDI contains (high+1). Copy it to ECX for later use. }
+ getcpuregister(list,NR_ECX);
+ list.concat(Taicpu.op_reg_reg(A_MOV,S_L,NR_EDI,NR_ECX));
+ if (elesize<>1) then
+ begin
+ if ispowerof2(elesize, power) then
+ list.concat(Taicpu.op_const_reg(A_SHL,S_L,power,NR_EDI))
+ else
+ list.concat(Taicpu.op_const_reg(A_IMUL,S_L,elesize,NR_EDI));
+ end;
+{$ifndef __NOWINPECOFF__}
+ { windows guards only a few pages for stack growing, }
+ { so we have to access every page first }
+ if target_info.system=system_i386_win32 then
+ begin
+ current_asmdata.getjumplabel(again);
+ current_asmdata.getjumplabel(ok);
+ a_label(list,again);
+ list.concat(Taicpu.op_const_reg(A_CMP,S_L,winstackpagesize,NR_EDI));
+ a_jmp_cond(list,OC_B,ok);
+ list.concat(Taicpu.op_const_reg(A_SUB,S_L,winstackpagesize-4,NR_ESP));
+ list.concat(Taicpu.op_reg(A_PUSH,S_L,NR_EDI));
+ list.concat(Taicpu.op_const_reg(A_SUB,S_L,winstackpagesize,NR_EDI));
+ a_jmp_always(list,again);
+
+ a_label(list,ok);
+ end;
+{$endif __NOWINPECOFF__}
+ { If we were probing pages, EDI=(size mod pagesize) and ESP is decremented
+ by (size div pagesize)*pagesize, otherwise EDI=size.
+ Either way, subtracting EDI from ESP will set ESP to desired final value. }
+ list.concat(Taicpu.op_reg_reg(A_SUB,S_L,NR_EDI,NR_ESP));
+ { align stack on 4 bytes }
+ list.concat(Taicpu.op_const_reg(A_AND,S_L,aint($fffffff4),NR_ESP));
+ { load destination, don't use a_load_reg_reg, that will add a move instruction
+ that can confuse the reg allocator }
+ list.concat(Taicpu.Op_reg_reg(A_MOV,S_L,NR_ESP,NR_EDI));
+
+ { Allocate ESI and load it with source }
+ getcpuregister(list,NR_ESI);
+ a_loadaddr_ref_reg(list,ref,NR_ESI);
+
+ { calculate size }
+ len:=elesize;
+ opsize:=S_B;
+ if (len and 3)=0 then
+ begin
+ opsize:=S_L;
+ len:=len shr 2;
+ end
+ else
+ if (len and 1)=0 then
+ begin
+ opsize:=S_W;
+ len:=len shr 1;
+ end;
+
+ if len>1 then
+ begin
+ if ispowerof2(len, power) then
+ list.concat(Taicpu.op_const_reg(A_SHL,S_L,power,NR_ECX))
+ else
+ list.concat(Taicpu.op_const_reg(A_IMUL,S_L,len,NR_ECX));
+ end;
+ list.concat(Taicpu.op_none(A_REP,S_NO));
+ case opsize of
+ S_B : list.concat(Taicpu.Op_none(A_MOVSB,S_NO));
+ S_W : list.concat(Taicpu.Op_none(A_MOVSW,S_NO));
+ S_L : list.concat(Taicpu.Op_none(A_MOVSD,S_NO));
+ end;
+ ungetcpuregister(list,NR_EDI);
+ ungetcpuregister(list,NR_ECX);
+ ungetcpuregister(list,NR_ESI);
+
+ { patch the new address, but don't use a_load_reg_reg, that will add a move instruction
+ that can confuse the reg allocator }
+ list.concat(Taicpu.Op_reg_reg(A_MOV,S_L,NR_ESP,destreg));
+ end;
+
+
+ procedure tcg8086.g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);
+ begin
+ { Nothing to release }
+ end;
+
+
+ procedure tcg8086.g_exception_reason_save(list : TAsmList; const href : treference);
+ begin
+ if not paramanager.use_fixed_stack then
+ list.concat(Taicpu.op_reg(A_PUSH,tcgsize2opsize[OS_INT],NR_FUNCTION_RESULT_REG))
+ else
+ inherited g_exception_reason_save(list,href);
+ end;
+
+
+ procedure tcg8086.g_exception_reason_save_const(list : TAsmList;const href : treference; a: tcgint);
+ begin
+ if not paramanager.use_fixed_stack then
+ list.concat(Taicpu.op_const(A_PUSH,tcgsize2opsize[OS_INT],a))
+ else
+ inherited g_exception_reason_save_const(list,href,a);
+ end;
+
+
+ procedure tcg8086.g_exception_reason_load(list : TAsmList; const href : treference);
+ begin
+ if not paramanager.use_fixed_stack then
+ begin
+ cg.a_reg_alloc(list,NR_FUNCTION_RESULT_REG);
+ list.concat(Taicpu.op_reg(A_POP,tcgsize2opsize[OS_INT],NR_FUNCTION_RESULT_REG))
+ end
+ else
+ inherited g_exception_reason_load(list,href);
+ end;
+
+
+ procedure tcg8086.g_maybe_got_init(list: TAsmList);
+ var
+ notdarwin: boolean;
+ begin
+ { allocate PIC register }
+ if (cs_create_pic in current_settings.moduleswitches) and
+ (tf_pic_uses_got in target_info.flags) and
+ (pi_needs_got in current_procinfo.flags) then
+ begin
+ notdarwin:=not(target_info.system in [system_i386_darwin,system_i386_iphonesim]);
+ { on darwin, the got register is virtual (and allocated earlier
+ already) }
+ if notdarwin then
+ { ecx could be used in leaf procedures that don't use ecx to pass
+ aparameter }
+ current_procinfo.got:=NR_EBX;
+ if notdarwin { needs testing before it can be enabled for non-darwin platforms
+ and
+ (current_settings.optimizecputype in [cpu_Pentium2,cpu_Pentium3,cpu_Pentium4]) } then
+ begin
+ current_module.requires_ebx_pic_helper:=true;
+ cg.a_call_name_static(list,'fpc_geteipasebx');
+ end
+ else
+ begin
+ { call/pop is faster than call/ret/mov on Core Solo and later
+ according to Apple's benchmarking -- and all Intel Macs
+ have at least a Core Solo (furthermore, the i386 - Pentium 1
+ don't have a return stack buffer) }
+ a_call_name_static(list,current_procinfo.CurrGOTLabel.name);
+ a_label(list,current_procinfo.CurrGotLabel);
+ list.concat(taicpu.op_reg(A_POP,S_L,current_procinfo.got))
+ end;
+ if notdarwin then
+ begin
+ list.concat(taicpu.op_sym_ofs_reg(A_ADD,S_L,current_asmdata.RefAsmSymbol('_GLOBAL_OFFSET_TABLE_'),0,NR_PIC_OFFSET_REG));
+ list.concat(tai_regalloc.alloc(NR_PIC_OFFSET_REG,nil));
+ end;
+ end;
+ end;
+
+
+ procedure tcg8086.get_32bit_ops(op: TOpCG; out op1, op2: TAsmOp);
+ begin
+ case op of
+ OP_ADD :
+ begin
+ op1:=A_ADD;
+ op2:=A_ADC;
+ end;
+ OP_SUB :
+ begin
+ op1:=A_SUB;
+ op2:=A_SBB;
+ end;
+ OP_XOR :
+ begin
+ op1:=A_XOR;
+ op2:=A_XOR;
+ end;
+ OP_OR :
+ begin
+ op1:=A_OR;
+ op2:=A_OR;
+ end;
+ OP_AND :
+ begin
+ op1:=A_AND;
+ op2:=A_AND;
+ end;
+ else
+ internalerror(200203241);
+ end;
+ end;
+
+
+ procedure tcg8086.g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: tcgint);
+ var
+ hsym : tsym;
+ href : treference;
+ paraloc : Pcgparalocation;
+ begin
+ { calculate the parameter info for the procdef }
+ procdef.init_paraloc_info(callerside);
+ hsym:=tsym(procdef.parast.Find('self'));
+ if not(assigned(hsym) and
+ (hsym.typ=paravarsym)) then
+ internalerror(200305251);
+ paraloc:=tparavarsym(hsym).paraloc[callerside].location;
+ while paraloc<>nil do
+ with paraloc^ do
+ begin
+ case loc of
+ LOC_REGISTER:
+ a_op_const_reg(list,OP_SUB,size,ioffset,register);
+ LOC_REFERENCE:
+ begin
+ { offset in the wrapper needs to be adjusted for the stored
+ return address }
+ if (reference.index<>NR_BP) and (reference.index<>NR_BX) and (reference.index<>NR_DI)
+ and (reference.index<>NR_SI) then
+ begin
+ list.concat(taicpu.op_reg(A_PUSH,S_W,NR_DI));
+ list.concat(taicpu.op_reg_reg(A_MOV,S_W,reference.index,NR_DI));
+
+ if reference.index=NR_SP then
+ reference_reset_base(href,NR_DI,reference.offset+sizeof(pint)+2,sizeof(pint))
+ else
+ reference_reset_base(href,NR_DI,reference.offset+sizeof(pint),sizeof(pint));
+ a_op_const_ref(list,OP_SUB,size,ioffset,href);
+ list.concat(taicpu.op_reg(A_POP,S_W,NR_DI));
+ end
+ else
+ begin
+ reference_reset_base(href,reference.index,reference.offset+sizeof(pint),sizeof(pint));
+ a_op_const_ref(list,OP_SUB,size,ioffset,href);
+ end;
+ end
+ else
+ internalerror(200309189);
+ end;
+ paraloc:=next;
+ end;
+ end;
+
+
+ procedure tcg8086.g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);
+ {
+ possible calling conventions:
+ default stdcall cdecl pascal register
+ default(0): OK OK OK OK OK
+ virtual(1): OK OK OK OK OK(2)
+
+ (0):
+ set self parameter to correct value
+ jmp mangledname
+
+ (1): The wrapper code use %eax to reach the virtual method address
+ set self to correct value
+ move self,%bx
+ mov 0(%bx),%bx ; load vmt
+ jmp vmtoffs(%bx) ; method offs
+
+ (2): Virtual use values pushed on stack to reach the method address
+ so the following code be generated:
+ set self to correct value
+ push %bx ; allocate space for function address
+ push %bx
+ push %di
+ mov self,%bx
+ mov 0(%bx),%bx ; load vmt
+ mov vmtoffs(%bx),bx ; method offs
+ mov %sp,%di
+ mov %bx,4(%di)
+ pop %di
+ pop %bx
+ ret 0; jmp the address
+
+ }
+
+ procedure getselftobx(offs: longint);
+ var
+ href : treference;
+ selfoffsetfromsp : longint;
+ begin
+ { "mov offset(%sp),%bx" }
+ if (procdef.proccalloption<>pocall_register) then
+ begin
+ list.concat(taicpu.op_reg(A_PUSH,S_W,NR_DI));
+ { framepointer is pushed for nested procs }
+ if procdef.parast.symtablelevel>normal_function_level then
+ selfoffsetfromsp:=2*sizeof(aint)
+ else
+ selfoffsetfromsp:=sizeof(aint);
+ list.concat(taicpu.op_reg_reg(A_mov,S_W,NR_SP,NR_DI));
+ reference_reset_base(href,NR_DI,selfoffsetfromsp+offs+2,2);
+ cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,NR_BX);
+ list.concat(taicpu.op_reg(A_POP,S_W,NR_DI));
+ end
+ else
+ cg.a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_BX,NR_BX);
+ end;
+
+
+ procedure loadvmttobx;
+ var
+ href : treference;
+ begin
+ { mov 0(%bx),%bx ; load vmt}
+ reference_reset_base(href,NR_BX,0,2);
+ cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,NR_BX);
+ end;
+
+
+ procedure loadmethodoffstobx;
+ var
+ href : treference;
+ begin
+ if (procdef.extnumber=$ffff) then
+ Internalerror(200006139);
+ { mov vmtoffs(%bx),%bx ; method offs }
+ reference_reset_base(href,NR_BX,tobjectdef(procdef.struct).vmtmethodoffset(procdef.extnumber),2);
+ cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,NR_BX);
+ end;
+
+
+ var
+ lab : tasmsymbol;
+ make_global : boolean;
+ href : treference;
+ begin
+ if not(procdef.proctypeoption in [potype_function,potype_procedure]) then
+ Internalerror(200006137);
+ if not assigned(procdef.struct) or
+ (procdef.procoptions*[po_classmethod, po_staticmethod,
+ po_methodpointer, po_interrupt, po_iocheck]<>[]) then
+ Internalerror(200006138);
+ if procdef.owner.symtabletype<>ObjectSymtable then
+ Internalerror(200109191);
+
+ make_global:=false;
+ if (not current_module.is_unit) or
+ create_smartlink or
+ (procdef.owner.defowner.owner.symtabletype=globalsymtable) then
+ make_global:=true;
+
+ if make_global then
+ List.concat(Tai_symbol.Createname_global(labelname,AT_FUNCTION,0))
+ else
+ List.concat(Tai_symbol.Createname(labelname,AT_FUNCTION,0));
+
+ { set param1 interface to self }
+ g_adjust_self_value(list,procdef,ioffset);
+
+ if (po_virtualmethod in procdef.procoptions) and
+ not is_objectpascal_helper(procdef.struct) then
+ begin
+ { case 1 & case 2 }
+ list.concat(taicpu.op_reg(A_PUSH,S_W,NR_BX)); { allocate space for address}
+ list.concat(taicpu.op_reg(A_PUSH,S_W,NR_BX));
+ list.concat(taicpu.op_reg(A_PUSH,S_W,NR_DI));
+ getselftobx(8);
+ loadvmttobx;
+ loadmethodoffstobx;
+ { set target address
+ "mov %bx,4(%sp)" }
+ reference_reset_base(href,NR_DI,4,2);
+ list.concat(taicpu.op_reg_reg(A_MOV,S_W,NR_SP,NR_DI));
+ list.concat(taicpu.op_reg_ref(A_MOV,S_W,NR_BX,href));
+
+ { load ax? }
+ if procdef.proccalloption=pocall_register then
+ list.concat(taicpu.op_reg_reg(A_MOV,S_W,NR_BX,NR_AX));
+
+ { restore register
+ pop %di,bx }
+ list.concat(taicpu.op_reg(A_POP,S_W,NR_DI));
+ list.concat(taicpu.op_reg(A_POP,S_W,NR_BX));
+
+ { ret ; jump to the address }
+ list.concat(taicpu.op_none(A_RET,S_W));
+ end
+ { case 0 }
+ else
+ begin
+ lab:=current_asmdata.RefAsmSymbol(procdef.mangledname);
+ list.concat(taicpu.op_sym(A_JMP,S_NO,lab))
+ end;
+
+ List.concat(Tai_symbol_end.Createname(labelname));
+ end;
+
+
+{ ************* 64bit operations ************ }
+
+ procedure tcg64f8086.get_64bit_ops(op:TOpCG;var op1,op2:TAsmOp);
+ begin
+ case op of
+ OP_ADD :
+ begin
+ op1:=A_ADD;
+ op2:=A_ADC;
+ end;
+ OP_SUB :
+ begin
+ op1:=A_SUB;
+ op2:=A_SBB;
+ end;
+ OP_XOR :
+ begin
+ op1:=A_XOR;
+ op2:=A_XOR;
+ end;
+ OP_OR :
+ begin
+ op1:=A_OR;
+ op2:=A_OR;
+ end;
+ OP_AND :
+ begin
+ op1:=A_AND;
+ op2:=A_AND;
+ end;
+ else
+ internalerror(200203241);
+ end;
+ end;
+
+
+(* procedure tcg64f8086.a_op64_ref_reg(list : TAsmList;op:TOpCG;size : tcgsize;const ref : treference;reg : tregister64);
+ var
+ op1,op2 : TAsmOp;
+ tempref : treference;
+ begin
+ if not(op in [OP_NEG,OP_NOT]) then
+ begin
+ get_64bit_ops(op,op1,op2);
+ tempref:=ref;
+ tcgx86(cg).make_simple_ref(list,tempref);
+ list.concat(taicpu.op_ref_reg(op1,S_L,tempref,reg.reglo));
+ inc(tempref.offset,4);
+ list.concat(taicpu.op_ref_reg(op2,S_L,tempref,reg.reghi));
+ end
+ else
+ begin
+ a_load64_ref_reg(list,ref,reg);
+ a_op64_reg_reg(list,op,size,reg,reg);
+ end;
+ end;*)
+
+
+ procedure tcg64f8086.a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);
+ var
+ op1,op2 : TAsmOp;
+ begin
+ case op of
+ OP_NEG :
+ begin
+ if (regsrc.reglo<>regdst.reglo) then
+ a_load64_reg_reg(list,regsrc,regdst);
+ cg.a_op_reg_reg(list,OP_NOT,OS_32,regdst.reghi,regdst.reghi);
+ cg.a_op_reg_reg(list,OP_NEG,OS_32,regdst.reglo,regdst.reglo);
+ { there's no OP_SBB, so do it directly }
+ list.concat(taicpu.op_const_reg(A_SBB,S_W,-1,regdst.reghi));
+ list.concat(taicpu.op_const_reg(A_SBB,S_W,-1,GetNextReg(regdst.reghi)));
+ exit;
+ end;
+ OP_NOT :
+ begin
+ if (regsrc.reglo<>regdst.reglo) then
+ a_load64_reg_reg(list,regsrc,regdst);
+ cg.a_op_reg_reg(list,OP_NOT,OS_32,regdst.reglo,regdst.reglo);
+ cg.a_op_reg_reg(list,OP_NOT,OS_32,regdst.reghi,regdst.reghi);
+ exit;
+ end;
+ end;
+ get_64bit_ops(op,op1,op2);
+ list.concat(taicpu.op_reg_reg(op1,S_W,regsrc.reglo,regdst.reglo));
+ list.concat(taicpu.op_reg_reg(op2,S_W,GetNextReg(regsrc.reglo),GetNextReg(regdst.reglo)));
+ list.concat(taicpu.op_reg_reg(op2,S_W,regsrc.reghi,regdst.reghi));
+ list.concat(taicpu.op_reg_reg(op2,S_W,GetNextReg(regsrc.reghi),GetNextReg(regdst.reghi)));
+ end;
+
+
+ procedure tcg64f8086.a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);
+ var
+ op1,op2 : TAsmOp;
+ begin
+ case op of
+ OP_AND,OP_OR,OP_XOR:
+ begin
+ cg.a_op_const_reg(list,op,OS_32,tcgint(lo(value)),reg.reglo);
+ cg.a_op_const_reg(list,op,OS_32,tcgint(hi(value)),reg.reghi);
+ end;
+ OP_ADD, OP_SUB:
+ begin
+ // can't use a_op_const_ref because this may use dec/inc
+ get_64bit_ops(op,op1,op2);
+ list.concat(taicpu.op_const_reg(op1,S_W,aint(value and $ffff),reg.reglo));
+ list.concat(taicpu.op_const_reg(op2,S_W,aint((value shr 16) and $ffff),GetNextReg(reg.reglo)));
+ list.concat(taicpu.op_const_reg(op2,S_W,aint((value shr 32) and $ffff),reg.reghi));
+ list.concat(taicpu.op_const_reg(op2,S_W,aint((value shr 48) and $ffff),GetNextReg(reg.reghi)));
+ end;
+ else
+ internalerror(200204021);
+ end;
+ end;
+
+
+(* procedure tcg64f8086.a_op64_const_ref(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const ref : treference);
+ var
+ op1,op2 : TAsmOp;
+ tempref : treference;
+ begin
+ tempref:=ref;
+ tcgx86(cg).make_simple_ref(list,tempref);
+ case op of
+ OP_AND,OP_OR,OP_XOR:
+ begin
+ cg.a_op_const_ref(list,op,OS_32,tcgint(lo(value)),tempref);
+ inc(tempref.offset,4);
+ cg.a_op_const_ref(list,op,OS_32,tcgint(hi(value)),tempref);
+ end;
+ OP_ADD, OP_SUB:
+ begin
+ get_64bit_ops(op,op1,op2);
+ // can't use a_op_const_ref because this may use dec/inc
+ list.concat(taicpu.op_const_ref(op1,S_L,aint(lo(value)),tempref));
+ inc(tempref.offset,4);
+ list.concat(taicpu.op_const_ref(op2,S_L,aint(hi(value)),tempref));
+ end;
+ else
+ internalerror(200204022);
+ end;
+ end;*)
+
+ procedure create_codegen;
+ begin
+ cg := tcg8086.create;
+ cg64 := tcg64f8086.create;
+ end;
+
+end.
diff --git a/compiler/i8086/cpubase.inc b/compiler/i8086/cpubase.inc
new file mode 100644
index 0000000000..5d4ca009a7
--- /dev/null
+++ b/compiler/i8086/cpubase.inc
@@ -0,0 +1,149 @@
+{
+ Copyright (c) 1998-2000 by Florian Klaempfl and Peter Vreman
+
+ Contains the basic declarations for the i8086 architecture
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+ ****************************************************************************
+}
+{ This include file contains the basic declarations for the i8086 architecture.
+}
+
+{*****************************************************************************
+ Operand Sizes
+*****************************************************************************}
+
+ type
+ topsize = (S_NO,
+ S_B,S_W,S_L,S_Q,S_BW,S_BL,S_WL,
+ S_IS,S_IL,S_IQ,
+ S_FS,S_FL,S_FX,S_FV,S_FXX,
+ S_MD,
+ S_NEAR,S_FAR,S_SHORT,
+ S_T,
+ S_XMM,
+ S_YMM
+ );
+
+
+{*****************************************************************************
+ Registers
+*****************************************************************************}
+ const
+ {# Standard opcode string table (for each tasmop enumeration). The
+ opcode strings should conform to the names as defined by the
+ processor manufacturer.
+ }
+ std_op2str:op2strtable={$i i8086int.inc}
+
+{*****************************************************************************
+ GDB Information
+*****************************************************************************}
+
+ {# Register indexes for stabs information, when some
+ parameters or variables are stored in registers.
+
+ Taken from i386.c (dbx_register_map) and i386.h
+ (FIXED_REGISTERS) from GCC 3.x source code
+
+ }
+ reg_stab_table : array[tregisterindex] of shortint = (
+ {$i r8086stab.inc}
+ );
+
+
+{*****************************************************************************
+ Default generic sizes
+*****************************************************************************}
+
+ {# Defines the default address size for a processor, }
+ OS_ADDR = OS_16;
+ {# the natural int size for a processor,
+ has to match osuinttype/ossinttype as initialized in psystem }
+ OS_INT = OS_16;
+ OS_SINT = OS_S16;
+ {# the maximum float size for a processor, }
+ OS_FLOAT = OS_F80;
+ {# the size of a vector register for a processor }
+ OS_VECTOR = OS_M128;
+
+{*****************************************************************************
+ Generic Register names
+*****************************************************************************}
+
+ {# Stack pointer register }
+ NR_STACK_POINTER_REG = NR_SP;
+ RS_STACK_POINTER_REG = RS_SP;
+ {# Frame pointer register }
+ RS_FRAME_POINTER_REG = RS_BP;
+ NR_FRAME_POINTER_REG = NR_BP;
+ { Return address for DWARF }
+ NR_RETURN_ADDRESS_REG = NR_EIP;
+ {# Register for addressing absolute data in a position independant way,
+ such as in PIC code. The exact meaning is ABI specific. For
+ further information look at GCC source : PIC_OFFSET_TABLE_REGNUM
+ }
+ NR_PIC_OFFSET_REG = NR_BX;
+ { Results are returned in this register (16-bit values) }
+ NR_FUNCTION_RETURN_REG = NR_AX;
+ RS_FUNCTION_RETURN_REG = RS_AX;
+ { Low part of 32bit return value }
+ NR_FUNCTION_RETURN32_LOW_REG = NR_AX;
+ RS_FUNCTION_RETURN32_LOW_REG = RS_AX;
+ { High part of 32bit return value }
+ NR_FUNCTION_RETURN32_HIGH_REG = NR_DX;
+ RS_FUNCTION_RETURN32_HIGH_REG = RS_DX;
+ { The value returned from a function is available in this register }
+ NR_FUNCTION_RESULT_REG = NR_FUNCTION_RETURN_REG;
+ RS_FUNCTION_RESULT_REG = RS_FUNCTION_RETURN_REG;
+ { The lowh part of 32bit value returned from a function }
+ NR_FUNCTION_RESULT32_LOW_REG = NR_FUNCTION_RETURN32_LOW_REG;
+ RS_FUNCTION_RESULT32_LOW_REG = RS_FUNCTION_RETURN32_LOW_REG;
+ { The high part of 32bit value returned from a function }
+ NR_FUNCTION_RESULT32_HIGH_REG = NR_FUNCTION_RETURN32_HIGH_REG;
+ RS_FUNCTION_RESULT32_HIGH_REG = RS_FUNCTION_RETURN32_HIGH_REG;
+
+ { WARNING: don't change to R_ST0!! See comments above implementation of }
+ { a_loadfpu* methods in rgcpu (JM) }
+ NR_fpu_result_reg = NR_ST;
+ NR_mm_result_reg = NR_MM0;
+
+ { Offset where the parent framepointer is pushed }
+ PARENT_FRAMEPOINTER_OFFSET = 8;
+
+{*****************************************************************************
+ GCC /ABI linking information
+*****************************************************************************}
+
+ const
+ {# Registers which must be saved when calling a routine declared as
+ cppdecl, cdecl, stdcall, safecall, palmossyscall. The registers
+ saved should be the ones as defined in the target ABI and / or GCC.
+
+ This value can be deduced from the CALLED_USED_REGISTERS array in the
+ GCC source.
+ }
+ saved_standard_registers : array[0..3] of tsuperregister = (RS_BX,RS_SI,RS_DI,RS_BP);
+
+ saved_mm_registers : array[0..0] of tsuperregister = (RS_INVALID);
+ {# Required parameter alignment when calling a routine declared as
+ stdcall and cdecl. The alignment value should be the one defined
+ by GCC or the target ABI.
+
+ The value of this constant is equal to the constant
+ PARM_BOUNDARY / BITS_PER_UNIT in the GCC source.
+ }
+ std_param_align = 2;
diff --git a/compiler/i8086/cpuinfo.pas b/compiler/i8086/cpuinfo.pas
new file mode 100644
index 0000000000..7ff0f1a841
--- /dev/null
+++ b/compiler/i8086/cpuinfo.pas
@@ -0,0 +1,130 @@
+{
+ Copyright (c) 1998-2004 by Florian Klaempfl
+
+ Basic Processor information
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+ ****************************************************************************
+}
+Unit cpuinfo;
+
+{$i fpcdefs.inc}
+
+Interface
+
+ uses
+ globtype;
+
+Type
+ bestreal = extended;
+ ts32real = single;
+ ts64real = double;
+ ts80real = extended;
+ ts128real = type extended;
+ ts64comp = type extended;
+
+ pbestreal=^bestreal;
+
+ { possible supported processors for this target }
+ tcputype =
+ (cpu_none,
+ cpu_8086,
+ cpu_186,
+ cpu_286,
+ cpu_386,
+ cpu_Pentium,
+ cpu_Pentium2,
+ cpu_Pentium3,
+ cpu_Pentium4,
+ cpu_PentiumM
+ );
+
+ tfputype =
+ (fpu_none,
+// fpu_soft,
+ fpu_x87,
+ fpu_sse,
+ fpu_sse2,
+ fpu_sse3,
+ fpu_ssse3,
+ fpu_sse41,
+ fpu_sse42,
+ fpu_avx
+ );
+
+
+Const
+ { calling conventions supported by the code generator }
+ supported_calling_conventions : tproccalloptions = [
+ pocall_internproc,
+ pocall_register,
+ pocall_safecall,
+ pocall_stdcall,
+ pocall_cdecl,
+ pocall_cppdecl,
+ pocall_far16,
+ pocall_pascal,
+ pocall_oldfpccall,
+ pocall_mwpascal
+ ];
+
+ cputypestr : array[tcputype] of string[10] = ('',
+ '8086',
+ '80186',
+ '80286',
+ '80386',
+ 'PENTIUM',
+ 'PENTIUM2',
+ 'PENTIUM3',
+ 'PENTIUM4',
+ 'PENTIUMM'
+ );
+
+ fputypestr : array[tfputype] of string[6] = ('',
+// 'SOFT',
+ 'X87',
+ 'SSE',
+ 'SSE2',
+ 'SSE3',
+ 'SSSE3',
+ 'SSE41',
+ 'SSE42',
+ 'AVX'
+ );
+
+ sse_singlescalar : set of tfputype = [fpu_sse,fpu_sse2,fpu_sse3];
+ sse_doublescalar : set of tfputype = [fpu_sse2,fpu_sse3];
+
+ { Supported optimizations, only used for information }
+ supported_optimizerswitches = genericlevel1optimizerswitches+
+ genericlevel2optimizerswitches+
+ genericlevel3optimizerswitches-
+ { no need to write info about those }
+ [cs_opt_level1,cs_opt_level2,cs_opt_level3]+
+ [cs_opt_peephole,cs_opt_regvar,cs_opt_stackframe,
+ cs_opt_asmcse,cs_opt_loopunroll,cs_opt_uncertain,
+ cs_opt_tailrecursion,cs_opt_nodecse,cs_useebp,
+ cs_opt_reorder_fields,cs_opt_fastmath];
+
+ level1optimizerswitches = genericlevel1optimizerswitches + [cs_opt_peephole];
+ level2optimizerswitches = genericlevel2optimizerswitches + level1optimizerswitches +
+ [cs_opt_regvar,cs_opt_stackframe,cs_opt_tailrecursion,cs_opt_nodecse];
+ level3optimizerswitches = genericlevel3optimizerswitches + level2optimizerswitches + [{,cs_opt_loopunroll}];
+ level4optimizerswitches = genericlevel4optimizerswitches + level3optimizerswitches + [cs_useebp];
+
+Implementation
+
+end.
diff --git a/compiler/i8086/cpunode.pas b/compiler/i8086/cpunode.pas
new file mode 100644
index 0000000000..409aa7366a
--- /dev/null
+++ b/compiler/i8086/cpunode.pas
@@ -0,0 +1,60 @@
+{
+ Copyright (c) 2000-2002 by Florian Klaempfl
+
+ Includes the i8086 code generator
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+ ****************************************************************************
+}
+unit cpunode;
+
+{$i fpcdefs.inc}
+
+ interface
+
+ implementation
+
+ uses
+ { generic nodes }
+ ncgbas,
+ ncgld,
+ ncgflw,
+ ncgcnv,
+ ncgmem,
+ ncgmat,
+ ncgcon,
+ ncgcal,
+ ncgset,
+ ncginl,
+ ncgopt,
+ ncgobjc,
+ { to be able to only parts of the generic code,
+ the processor specific nodes must be included
+ after the generic one (FK)
+ }
+ nx86set,
+ nx86con,
+ nx86cnv,
+
+ n8086add{,
+ n386cal,
+ n386mem,
+ n386set},
+ n8086inl,
+ n8086mat
+ ;
+
+end.
diff --git a/compiler/i8086/cpupara.pas b/compiler/i8086/cpupara.pas
new file mode 100644
index 0000000000..765c2a6d5e
--- /dev/null
+++ b/compiler/i8086/cpupara.pas
@@ -0,0 +1,716 @@
+{
+ Copyright (c) 2002 by Florian Klaempfl
+
+ Generates the argument location information for i8086
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+ ****************************************************************************
+}
+unit cpupara;
+
+{$i fpcdefs.inc}
+
+ interface
+
+ uses
+ globtype,
+ aasmtai,aasmdata,cpubase,cgbase,cgutils,
+ symconst,symtype,symsym,symdef,
+ parabase,paramgr;
+
+ type
+ ti8086paramanager = class(tparamanager)
+ function param_use_paraloc(const cgpara:tcgpara):boolean;override;
+ function ret_in_param(def:tdef;pd:tabstractprocdef):boolean;override;
+ function push_addr_param(varspez:tvarspez;def : tdef;calloption : tproccalloption) : boolean;override;
+ function get_para_align(calloption : tproccalloption):byte;override;
+ function get_volatile_registers_int(calloption : tproccalloption):tcpuregisterset;override;
+ function get_volatile_registers_fpu(calloption : tproccalloption):tcpuregisterset;override;
+ function get_volatile_registers_mm(calloption : tproccalloption):tcpuregisterset;override;
+ { Returns the location for the nr-st 16 Bit int parameter
+ if every parameter before is an 16 Bit int parameter as well
+ and if the calling conventions for the helper routines of the
+ rtl are used.
+
+ TODO: This allocates 32-bit ints on other CPU architectures. Since
+ we're small/tiny model only, for now we can get away with allocating
+ always 16-bit int parameters, but in the future, when we implement
+ other memory models, this mechanism has to be extended somehow to
+ support 32-bit addresses on a 16-bit CPU.
+ }
+ procedure getintparaloc(pd : tabstractprocdef; nr : longint; var cgpara : tcgpara);override;
+ function create_paraloc_info(p : tabstractprocdef; side: tcallercallee):longint;override;
+ function create_varargs_paraloc_info(p : tabstractprocdef; varargspara:tvarargsparalist):longint;override;
+ procedure createtempparaloc(list: TAsmList;calloption : tproccalloption;parasym : tparavarsym;can_use_final_stack_loc : boolean;var cgpara:TCGPara);override;
+ function get_funcretloc(p : tabstractprocdef; side: tcallercallee; forcetempdef: tdef): TCGPara;override;
+ private
+ procedure create_stdcall_paraloc_info(p : tabstractprocdef; side: tcallercallee;paras:tparalist;var parasize:longint);
+ procedure create_register_paraloc_info(p : tabstractprocdef; side: tcallercallee;paras:tparalist;var parareg,parasize:longint);
+ end;
+
+
+ implementation
+
+ uses
+ cutils,
+ systems,verbose,
+ symtable,
+ defutil;
+
+ const
+ parasupregs : array[0..2] of tsuperregister = (RS_AX,RS_DX,RS_CX);
+
+{****************************************************************************
+ ti8086paramanager
+****************************************************************************}
+
+ function ti8086paramanager.param_use_paraloc(const cgpara:tcgpara):boolean;
+ var
+ paraloc : pcgparalocation;
+ begin
+ if not assigned(cgpara.location) then
+ internalerror(200410102);
+ result:=true;
+ { All locations are LOC_REFERENCE }
+ paraloc:=cgpara.location;
+ while assigned(paraloc) do
+ begin
+ if (paraloc^.loc<>LOC_REFERENCE) then
+ begin
+ result:=false;
+ exit;
+ end;
+ paraloc:=paraloc^.next;
+ end;
+ end;
+
+
+ function ti8086paramanager.ret_in_param(def:tdef;pd:tabstractprocdef):boolean;
+ var
+ size: longint;
+ begin
+ if handle_common_ret_in_param(def,pd,result) then
+ exit;
+
+ { 64-bit types are returned as a parameter pointer, since putting them
+ in registers would require 4 registers on the i8086 }
+ if (def.size > 4) and (def.typ <> floatdef) then
+ begin
+ result:=true;
+ exit;
+ end;
+
+ result:=inherited ret_in_param(def,pd);
+ end;
+
+
+ function ti8086paramanager.push_addr_param(varspez:tvarspez;def : tdef;calloption : tproccalloption) : boolean;
+ begin
+ result:=false;
+ { var,out,constref always require address }
+ if varspez in [vs_var,vs_out,vs_constref] then
+ begin
+ result:=true;
+ exit;
+ end;
+ { Only vs_const, vs_value here }
+ case def.typ of
+ variantdef :
+ begin
+ { variants are small enough to be passed by value except if
+ required by the windows api
+
+ variants are somethings very delphi/windows specific so do it like
+ windows/delphi (FK)
+ }
+ if ((target_info.system=system_i386_win32) and
+ (calloption in [pocall_stdcall,pocall_safecall]) and
+ (varspez=vs_const)) or
+ (calloption=pocall_register) then
+ result:=true
+ else
+ result:=false;
+ end;
+ formaldef :
+ result:=true;
+ recorddef :
+ begin
+ { Delphi stdcall passes records on the stack for call by value }
+ if (target_info.system=system_i386_win32) and
+ (calloption=pocall_stdcall) and
+ (varspez=vs_value) then
+ result:=false
+ else
+ result:=
+ (not(calloption in (cdecl_pocalls)) and
+ (def.size>sizeof(aint))) or
+ (((calloption = pocall_mwpascal) or (target_info.system=system_i386_wince)) and
+ (varspez=vs_const));
+ end;
+ arraydef :
+ begin
+ { array of const values are pushed on the stack as
+ well as dyn. arrays }
+ if (calloption in cdecl_pocalls) then
+ result:=not(is_array_of_const(def) or
+ is_dynamic_array(def))
+ else
+ begin
+ result:=(
+ (tarraydef(def).highrange>=tarraydef(def).lowrange) and
+ (def.size>sizeof(aint))
+ ) or
+ is_open_array(def) or
+ is_array_of_const(def) or
+ is_array_constructor(def);
+ end;
+ end;
+ objectdef :
+ result:=is_object(def);
+ stringdef :
+ result:= (tstringdef(def).stringtype in [st_shortstring,st_longstring]);
+ procvardef :
+ result:=not(calloption in cdecl_pocalls) and not tprocvardef(def).is_addressonly;
+ setdef :
+ result:=not(calloption in cdecl_pocalls) and (not is_smallset(def));
+ end;
+ end;
+
+
+ function ti8086paramanager.get_para_align(calloption : tproccalloption):byte;
+ begin
+ result:=std_param_align;
+ end;
+
+
+ function ti8086paramanager.get_volatile_registers_int(calloption : tproccalloption):tcpuregisterset;
+ begin
+ case calloption of
+ pocall_internproc :
+ result:=[];
+ pocall_register,
+ pocall_safecall,
+ pocall_stdcall,
+ pocall_cdecl,
+ pocall_cppdecl,
+ pocall_mwpascal :
+ result:=[RS_AX,RS_DX,RS_CX];
+ pocall_far16,
+ pocall_pascal,
+ pocall_oldfpccall :
+ result:=[RS_AX,RS_DX,RS_CX,RS_SI,RS_DI,RS_BX];
+ else
+ internalerror(200309071);
+ end;
+ end;
+
+
+ function ti8086paramanager.get_volatile_registers_fpu(calloption : tproccalloption):tcpuregisterset;
+ begin
+ result:=[0..first_fpu_imreg-1];
+ end;
+
+
+ function ti8086paramanager.get_volatile_registers_mm(calloption : tproccalloption):tcpuregisterset;
+ begin
+ result:=[0..first_mm_imreg-1];
+ end;
+
+
+ procedure ti8086paramanager.getintparaloc(pd : tabstractprocdef; nr : longint; var cgpara : tcgpara);
+ var
+ paraloc : pcgparalocation;
+ def : tdef;
+ begin
+ def:=tparavarsym(pd.paras[nr-1]).vardef;
+ cgpara.reset;
+ cgpara.size:=def_cgsize(def);
+ cgpara.intsize:=tcgsize2size[cgpara.size];
+ cgpara.alignment:=get_para_align(pd.proccalloption);
+ cgpara.def:=def;
+ paraloc:=cgpara.add_location;
+ with paraloc^ do
+ begin
+ size:=OS_INT;
+ if pd.proccalloption=pocall_register then
+ begin
+ if (nr<=length(parasupregs)) then
+ begin
+ if nr=0 then
+ internalerror(200309271);
+ loc:=LOC_REGISTER;
+ register:=newreg(R_INTREGISTER,parasupregs[nr-1],R_SUBWHOLE);
+ end
+ else
+ begin
+ loc:=LOC_REFERENCE;
+ reference.index:=NR_STACK_POINTER_REG;
+ { the previous parameters didn't take up room in memory }
+ reference.offset:=sizeof(aint)*(nr-length(parasupregs)-1)
+ end;
+ end
+ else
+ begin
+ loc:=LOC_REFERENCE;
+ reference.index:=NR_STACK_POINTER_REG;
+ reference.offset:=sizeof(aint)*nr;
+ end;
+ end;
+ end;
+
+
+ function ti8086paramanager.get_funcretloc(p : tabstractprocdef; side: tcallercallee; forcetempdef: tdef): TCGPara;
+ var
+ retcgsize : tcgsize;
+ paraloc : pcgparalocation;
+ sym: tfieldvarsym;
+ usedef: tdef;
+ handled: boolean;
+ begin
+ if not assigned(forcetempdef) then
+ usedef:=p.returndef
+ else
+ usedef:=forcetempdef;
+ { on darwin/i386, if a record has only one field and that field is a
+ single or double, it has to be returned like a single/double }
+ if (target_info.system in [system_i386_darwin,system_i386_iphonesim]) and
+ ((usedef.typ=recorddef) or
+ is_object(usedef)) and
+ tabstractrecordsymtable(tabstractrecorddef(usedef).symtable).has_single_field(sym) and
+ (sym.vardef.typ=floatdef) and
+ (tfloatdef(sym.vardef).floattype in [s32real,s64real]) then
+ usedef:=sym.vardef;
+
+ handled:=set_common_funcretloc_info(p,usedef,retcgsize,result);
+ { normally forcetempdef is passed straight through to
+ set_common_funcretloc_info and that one will correctly determine whether
+ the location is a temporary one, but that doesn't work here because we
+ sometimes have to change the type }
+ result.temporary:=assigned(forcetempdef);
+ if handled then
+ exit;
+
+ { darwin/x86 requires that results < sizeof(aint) are sign/zero
+ extended to sizeof(aint) }
+ if (target_info.system in [system_i386_darwin,system_i386_iphonesim]) and
+ (side=calleeside) and
+ (result.intsize>0) and
+ (result.intsize<sizeof(aint)) then
+ begin
+ result.def:=sinttype;
+ result.intsize:=sizeof(aint);
+ retcgsize:=OS_SINT;
+ result.size:=retcgsize;
+ end;
+
+ { Return in FPU register? }
+ if result.def.typ=floatdef then
+ begin
+ paraloc:=result.add_location;
+ paraloc^.loc:=LOC_FPUREGISTER;
+ paraloc^.register:=NR_FPU_RESULT_REG;
+ paraloc^.size:=retcgsize;
+ end
+ else
+ { Return in register }
+ begin
+ paraloc:=result.add_location;
+ paraloc^.loc:=LOC_REGISTER;
+ if retcgsize in [OS_64,OS_S64] then
+ internalerror(2013031201);
+ if retcgsize in [OS_32,OS_S32] then
+ begin
+ { low 16bits }
+ if side=callerside then
+ paraloc^.register:=NR_FUNCTION_RESULT32_LOW_REG
+ else
+ paraloc^.register:=NR_FUNCTION_RETURN32_LOW_REG;
+ paraloc^.size:=OS_16;
+
+ { high 16bits }
+ paraloc:=result.add_location;
+ paraloc^.loc:=LOC_REGISTER;
+ if side=callerside then
+ paraloc^.register:=NR_FUNCTION_RESULT32_HIGH_REG
+ else
+ paraloc^.register:=NR_FUNCTION_RETURN32_HIGH_REG;
+ paraloc^.size:=OS_16;
+ end
+ else
+ begin
+ paraloc^.size:=retcgsize;
+ if side=callerside then
+ paraloc^.register:=newreg(R_INTREGISTER,RS_FUNCTION_RESULT_REG,cgsize2subreg(R_INTREGISTER,retcgsize))
+ else
+ paraloc^.register:=newreg(R_INTREGISTER,RS_FUNCTION_RETURN_REG,cgsize2subreg(R_INTREGISTER,retcgsize));
+ end;
+ end;
+ end;
+
+
+ procedure ti8086paramanager.create_stdcall_paraloc_info(p : tabstractprocdef; side: tcallercallee;paras:tparalist;var parasize:longint);
+ var
+ i : integer;
+ hp : tparavarsym;
+ paradef : tdef;
+ paraloc : pcgparalocation;
+ l,
+ paralen,
+ varalign : longint;
+ paraalign : shortint;
+ pushaddr : boolean;
+ paracgsize : tcgsize;
+ begin
+ paraalign:=get_para_align(p.proccalloption);
+ { we push Flags and CS as long
+ to cope with the IRETD
+ and we save 6 register + 4 selectors }
+ if po_interrupt in p.procoptions then
+ inc(parasize,8+6*4+4*2);
+ { Offset is calculated like:
+ sub esp,12
+ mov [esp+8],para3
+ mov [esp+4],para2
+ mov [esp],para1
+ call function
+ That means for pushes the para with the
+ highest offset (see para3) needs to be pushed first
+ }
+ if p.proccalloption in pushleftright_pocalls then
+ i:=paras.count-1
+ else
+ i:=0;
+ while ((p.proccalloption in pushleftright_pocalls) and (i>=0)) or
+ (not(p.proccalloption in pushleftright_pocalls) and (i<=paras.count-1)) do
+ begin
+ hp:=tparavarsym(paras[i]);
+ paradef:=hp.vardef;
+ pushaddr:=push_addr_param(hp.varspez,paradef,p.proccalloption);
+ if pushaddr then
+ begin
+ paralen:=sizeof(aint);
+ paracgsize:=OS_ADDR;
+ paradef:=getpointerdef(paradef);
+ end
+ else
+ begin
+ paralen:=push_size(hp.varspez,paradef,p.proccalloption);
+ { darwin/x86 requires that parameters < sizeof(aint) are sign/ }
+ { zero extended to sizeof(aint) }
+ if (target_info.system in [system_i386_darwin,system_i386_iphonesim]) and
+ (side = callerside) and
+ (paralen > 0) and
+ (paralen < sizeof(aint)) then
+ begin
+ paralen:=sizeof(aint);
+ paracgsize:=OS_SINT;
+ paradef:=sinttype;
+ end
+ else
+ paracgsize:=def_cgsize(paradef);
+ end;
+ hp.paraloc[side].reset;
+ hp.paraloc[side].size:=paracgsize;
+ hp.paraloc[side].intsize:=paralen;
+ hp.paraloc[side].def:=paradef;
+ hp.paraloc[side].Alignment:=paraalign;
+ { Copy to stack? }
+ if (paracgsize=OS_NO) or
+ (use_fixed_stack) then
+ begin
+ paraloc:=hp.paraloc[side].add_location;
+ paraloc^.loc:=LOC_REFERENCE;
+ paraloc^.size:=paracgsize;
+ if side=callerside then
+ paraloc^.reference.index:=NR_STACK_POINTER_REG
+ else
+ paraloc^.reference.index:=NR_FRAME_POINTER_REG;
+ varalign:=used_align(size_2_align(paralen),paraalign,paraalign);
+
+ { don't let push_size return 16, because then we can }
+ { read past the end of the heap since the value is only }
+ { 10 bytes long (JM) }
+ if (paracgsize = OS_F80) and
+ (target_info.system in [system_i386_darwin,system_i386_iphonesim]) then
+ paralen:=16;
+ paraloc^.reference.offset:=parasize;
+ if side=calleeside then
+ inc(paraloc^.reference.offset,target_info.first_parm_offset);
+ parasize:=align(parasize+paralen,varalign);
+ end
+ else
+ begin
+ if paralen=0 then
+ internalerror(200501163);
+ while (paralen>0) do
+ begin
+ paraloc:=hp.paraloc[side].add_location;
+ paraloc^.loc:=LOC_REFERENCE;
+ { single and double need a single location }
+ if (paracgsize in [OS_F64,OS_F32]) then
+ begin
+ paraloc^.size:=paracgsize;
+ l:=paralen;
+ end
+ else
+ begin
+ { We can allocate at maximum 32 bits per location }
+ if paralen>sizeof(aint) then
+ l:=sizeof(aint)
+ else
+ l:=paralen;
+ paraloc^.size:=int_cgsize(l);
+ end;
+ if (side=callerside) or
+ (po_nostackframe in p.procoptions) then
+ paraloc^.reference.index:=NR_STACK_POINTER_REG
+ else
+ paraloc^.reference.index:=NR_FRAME_POINTER_REG;
+ varalign:=used_align(size_2_align(l),paraalign,paraalign);
+ paraloc^.reference.offset:=parasize;
+ if side=calleeside then
+ if not(po_nostackframe in p.procoptions) then
+ inc(paraloc^.reference.offset,target_info.first_parm_offset)
+ else
+ { return addres }
+ inc(paraloc^.reference.offset,4);
+ parasize:=align(parasize+l,varalign);
+ dec(paralen,l);
+ end;
+ end;
+ if p.proccalloption in pushleftright_pocalls then
+ dec(i)
+ else
+ inc(i);
+ end;
+ end;
+
+
+ procedure ti8086paramanager.create_register_paraloc_info(p : tabstractprocdef; side: tcallercallee;paras:tparalist;
+ var parareg,parasize:longint);
+ var
+ hp : tparavarsym;
+ paradef : tdef;
+ paraloc : pcgparalocation;
+ paracgsize : tcgsize;
+ i : integer;
+ l,
+ paralen,
+ varalign : longint;
+ pushaddr : boolean;
+ paraalign : shortint;
+ pass : byte;
+ begin
+ if paras.count=0 then
+ exit;
+ paraalign:=get_para_align(p.proccalloption);
+
+ { clean up here so we can later detect properly if a parameter has been
+ assigned or not
+ }
+ for i:=0 to paras.count-1 do
+ tparavarsym(paras[i]).paraloc[side].reset;
+ { Register parameters are assigned from left to right,
+ stack parameters from right to left so assign first the
+ register parameters in a first pass, in the second
+ pass all unhandled parameters are done }
+ for pass:=1 to 2 do
+ begin
+ if pass=1 then
+ i:=0
+ else
+ i:=paras.count-1;
+ while true do
+ begin
+ hp:=tparavarsym(paras[i]);
+ paradef:=hp.vardef;
+ if not(assigned(hp.paraloc[side].location)) then
+ begin
+ pushaddr:=push_addr_param(hp.varspez,hp.vardef,p.proccalloption);
+ if pushaddr then
+ begin
+ paralen:=sizeof(aint);
+ paracgsize:=OS_ADDR;
+ paradef:=getpointerdef(paradef);
+ end
+ else
+ begin
+ paralen:=push_size(hp.varspez,hp.vardef,p.proccalloption);
+ paracgsize:=def_cgsize(hp.vardef);
+ end;
+ hp.paraloc[side].size:=paracgsize;
+ hp.paraloc[side].intsize:=paralen;
+ hp.paraloc[side].Alignment:=paraalign;
+ hp.paraloc[side].def:=paradef;
+ {
+ EAX
+ EDX
+ ECX
+ Stack
+ Stack
+
+ 64bit values,floats,arrays and records are always
+ on the stack.
+
+ In case of po_delphi_nested_cc, the parent frame pointer
+ is also always passed on the stack.
+ }
+ if (parareg<=high(parasupregs)) and
+ (paralen<=sizeof(aint)) and
+ (not(hp.vardef.typ in [floatdef,recorddef,arraydef]) or
+ pushaddr) and
+ (not(vo_is_parentfp in hp.varoptions) or
+ not(po_delphi_nested_cc in p.procoptions)) then
+ begin
+ if pass=1 then
+ begin
+ paraloc:=hp.paraloc[side].add_location;
+ paraloc^.size:=paracgsize;
+ paraloc^.loc:=LOC_REGISTER;
+ paraloc^.register:=newreg(R_INTREGISTER,parasupregs[parareg],cgsize2subreg(R_INTREGISTER,paracgsize));
+ inc(parareg);
+ end;
+ end
+ else
+ if pass=2 then
+ begin
+ { Copy to stack? }
+ if (use_fixed_stack) or
+ (paracgsize=OS_NO) then
+ begin
+ paraloc:=hp.paraloc[side].add_location;
+ paraloc^.loc:=LOC_REFERENCE;
+ paraloc^.size:=paracgsize;
+ if side=callerside then
+ paraloc^.reference.index:=NR_STACK_POINTER_REG
+ else
+ paraloc^.reference.index:=NR_FRAME_POINTER_REG;
+ varalign:=used_align(size_2_align(paralen),paraalign,paraalign);
+ paraloc^.reference.offset:=parasize;
+ if side=calleeside then
+ inc(paraloc^.reference.offset,target_info.first_parm_offset);
+ parasize:=align(parasize+paralen,varalign);
+ end
+ else
+ begin
+ if paralen=0 then
+ internalerror(200501163);
+ while (paralen>0) do
+ begin
+ paraloc:=hp.paraloc[side].add_location;
+ paraloc^.loc:=LOC_REFERENCE;
+ { Extended and double need a single location }
+ if (paracgsize in [OS_F64,OS_F32]) then
+ begin
+ paraloc^.size:=paracgsize;
+ l:=paralen;
+ end
+ else
+ begin
+ { We can allocate at maximum 32 bits per location }
+ if paralen>sizeof(aint) then
+ l:=sizeof(aint)
+ else
+ l:=paralen;
+ paraloc^.size:=int_cgsize(l);
+ end;
+ if side=callerside then
+ paraloc^.reference.index:=NR_STACK_POINTER_REG
+ else
+ paraloc^.reference.index:=NR_FRAME_POINTER_REG;
+ varalign:=used_align(size_2_align(l),paraalign,paraalign);
+ paraloc^.reference.offset:=parasize;
+ if side=calleeside then
+ inc(paraloc^.reference.offset,target_info.first_parm_offset);
+ parasize:=align(parasize+l,varalign);
+ dec(paralen,l);
+ end;
+ end;
+ end;
+ end;
+ case pass of
+ 1:
+ begin
+ if i=paras.count-1 then
+ break;
+ inc(i);
+ end;
+ 2:
+ begin
+ if i=0 then
+ break;
+ dec(i);
+ end;
+ end;
+ end;
+ end;
+ end;
+
+
+ function ti8086paramanager.create_paraloc_info(p : tabstractprocdef; side: tcallercallee):longint;
+ var
+ parasize,
+ parareg : longint;
+ begin
+ parasize:=0;
+ parareg:=0;
+ case p.proccalloption of
+ pocall_register :
+ create_register_paraloc_info(p,side,p.paras,parareg,parasize);
+ pocall_internproc :
+ begin
+ { Use default calling }
+{$warnings off}
+ if (pocall_default=pocall_register) then
+ create_register_paraloc_info(p,side,p.paras,parareg,parasize)
+ else
+ create_stdcall_paraloc_info(p,side,p.paras,parasize);
+{$warnings on}
+ end;
+ else
+ create_stdcall_paraloc_info(p,side,p.paras,parasize);
+ end;
+ create_funcretloc_info(p,side);
+ result:=parasize;
+ end;
+
+
+ function ti8086paramanager.create_varargs_paraloc_info(p : tabstractprocdef; varargspara:tvarargsparalist):longint;
+ var
+ parasize : longint;
+ begin
+ parasize:=0;
+ { calculate the registers for the normal parameters }
+ create_stdcall_paraloc_info(p,callerside,p.paras,parasize);
+ { append the varargs }
+ create_stdcall_paraloc_info(p,callerside,varargspara,parasize);
+ result:=parasize;
+ end;
+
+
+ procedure ti8086paramanager.createtempparaloc(list: TAsmList;calloption : tproccalloption;parasym : tparavarsym;can_use_final_stack_loc : boolean;var cgpara:TCGPara);
+ begin
+ { Never a need for temps when value is pushed (calls inside parameters
+ will simply allocate even more stack space for their parameters) }
+ if not(use_fixed_stack) then
+ can_use_final_stack_loc:=true;
+ inherited createtempparaloc(list,calloption,parasym,can_use_final_stack_loc,cgpara);
+ end;
+
+
+begin
+ paramanager:=ti8086paramanager.create;
+end.
diff --git a/compiler/i8086/cpupi.pas b/compiler/i8086/cpupi.pas
new file mode 100644
index 0000000000..f6fa9f7c6c
--- /dev/null
+++ b/compiler/i8086/cpupi.pas
@@ -0,0 +1,100 @@
+{
+ Copyright (c) 2002 by Florian Klaempfl
+
+ This unit contains the CPU specific part of tprocinfo
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+ ****************************************************************************
+}
+
+{ This unit contains the CPU specific part of tprocinfo. }
+unit cpupi;
+
+{$i fpcdefs.inc}
+
+ interface
+
+ uses
+ psub,procinfo,aasmdata;
+
+ type
+ ti8086procinfo = class(tcgprocinfo)
+ constructor create(aparent:tprocinfo);override;
+ procedure set_first_temp_offset;override;
+ function calc_stackframe_size:longint;override;
+ procedure generate_parameter_info;override;
+ end;
+
+
+ implementation
+
+ uses
+ cutils,
+ systems,globals,globtype,
+ cgobj,tgobj,paramgr,
+ cpubase,
+ cgutils,
+ symconst;
+
+ constructor ti8086procinfo.create(aparent:tprocinfo);
+ begin
+ inherited create(aparent);
+ got:=NR_EBX;
+ end;
+
+
+ procedure ti8086procinfo.set_first_temp_offset;
+ begin
+ if paramanager.use_fixed_stack then
+ begin
+ if not(po_assembler in procdef.procoptions) and
+ (tg.direction > 0) then
+ tg.setfirsttemp(tg.direction*maxpushedparasize);
+ if (tg.direction < 0) and
+ not(po_nostackframe in procdef.procoptions) then
+ { compensate for the return address and the "pushl %ebp" }
+ tg.setalignmentmismatch(sizeof(pint)*2);
+ end;
+ end;
+
+
+ function ti8086procinfo.calc_stackframe_size:longint;
+ begin
+ { ???:
+ align to 4 bytes at least
+ otherwise all those subl $2,%esp are meaningless PM }
+ if target_info.stackalign<=2 then
+ result:=Align(tg.direction*tg.lasttemp,min(current_settings.alignment.localalignmax,2))
+ else
+ { aligned during stack frame allocation, because also depends number
+ of saved registers }
+ result:=tg.direction*tg.lasttemp+maxpushedparasize;
+ end;
+
+
+ procedure ti8086procinfo.generate_parameter_info;
+ begin
+ inherited generate_parameter_info;
+ { Para_stack_size is only used to determine how many bytes to remove }
+ { from the stack at the end of the procedure (in the "ret $xx"). }
+ { If the stack is fixed, nothing has to be removed by the callee }
+ if paramanager.use_fixed_stack then
+ para_stack_size := 0;
+ end;
+
+begin
+ cprocinfo:=ti8086procinfo;
+end.
diff --git a/compiler/i8086/cputarg.pas b/compiler/i8086/cputarg.pas
new file mode 100644
index 0000000000..a2b443b3ec
--- /dev/null
+++ b/compiler/i8086/cputarg.pas
@@ -0,0 +1,88 @@
+{
+ Copyright (c) 2001-2002 by Peter Vreman
+
+ Includes the i8086 dependent target units
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+ ****************************************************************************
+}
+unit cputarg;
+
+{$i fpcdefs.inc}
+
+interface
+
+
+implementation
+
+ uses
+ systems { prevent a syntax error when nothing is included }
+
+{**************************************
+ Targets
+**************************************}
+
+ {$ifndef NOTARGETMSDOS}
+ ,t_msdos
+ {$endif}
+
+{**************************************
+ Assemblers
+**************************************}
+
+ {$ifndef NOAG386ATT}
+// ,agx86att
+ {$endif}
+ {$ifndef NOAG386NSM}
+ ,agx86nsm
+ {$endif}
+ {$ifndef NOAG386INT}
+// ,agx86int
+ {$endif}
+
+// ,ogcoff
+// ,ogelf
+// ,ogmacho
+// ,cpuelf
+
+{**************************************
+ Assembler Readers
+**************************************}
+
+ {$ifndef NoRa8086Int}
+ ,ra8086int
+ {$endif NoRa8086Int}
+ {$ifndef NoRa8086Att}
+ ,ra8086att
+ {$endif NoRa8086Att}
+
+{**************************************
+ Debuginfo
+**************************************}
+
+ {$ifndef NoCFIDwarf}
+ ,cfidwarf
+ {$endif NoCFIDwarf}
+ {$ifndef NoDbgStabs}
+ ,dbgstabs
+ {$endif NoDbgStabs}
+ {$ifndef NoDbgDwarf}
+ ,dbgdwarf
+ {$endif NoDbgDwarf}
+
+ ;
+
+end.
diff --git a/compiler/i8086/hlcgcpu.pas b/compiler/i8086/hlcgcpu.pas
new file mode 100644
index 0000000000..325a04bbd4
--- /dev/null
+++ b/compiler/i8086/hlcgcpu.pas
@@ -0,0 +1,203 @@
+{
+ Copyright (c) 1998-2010 by Florian Klaempfl and Jonas Maebe
+ Member of the Free Pascal development team
+
+ This unit contains routines to create a pass-through high-level code
+ generator. This is used by most regular code generators.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+ ****************************************************************************
+}
+
+unit hlcgcpu;
+
+{$i fpcdefs.inc}
+
+interface
+
+ uses
+ aasmdata,
+ symtype,symdef,parabase,
+ cgbase,cgutils,
+ hlcgobj, hlcgx86;
+
+
+ type
+ thlcgcpu = class(thlcgx86)
+ protected
+ procedure gen_loadfpu_loc_cgpara(list: TAsmList; size: tdef; const l: tlocation; const cgpara: tcgpara; locintsize: longint); override;
+ public
+ procedure g_copyvaluepara_openarray(list: TAsmList; const ref: treference; const lenloc: tlocation; arrdef: tarraydef; destreg: tregister); override;
+ procedure g_releasevaluepara_openarray(list: TAsmList; arrdef: tarraydef; const l: tlocation); override;
+ end;
+
+ procedure create_hlcodegen;
+
+implementation
+
+ uses
+ globtype,verbose,
+ paramgr,
+ cpubase,tgobj,cgobj,cgcpu;
+
+ { thlcgcpu }
+
+ procedure thlcgcpu.gen_loadfpu_loc_cgpara(list: TAsmList; size: tdef; const l: tlocation; const cgpara: tcgpara; locintsize: longint);
+ var
+ locsize : tcgsize;
+ tmploc : tlocation;
+ href : treference;
+ stacksize : longint;
+ begin
+ if not(l.size in [OS_32,OS_S32,OS_64,OS_S64,OS_128,OS_S128]) then
+ locsize:=l.size
+ else
+ locsize:=int_float_cgsize(tcgsize2size[l.size]);
+ case l.loc of
+ LOC_FPUREGISTER,
+ LOC_CFPUREGISTER:
+ begin
+ case cgpara.location^.loc of
+ LOC_REFERENCE:
+ begin
+ stacksize:=align(locintsize,cgpara.alignment);
+ if (not paramanager.use_fixed_stack) and
+ (cgpara.location^.reference.index=NR_STACK_POINTER_REG) then
+ begin
+ cg.g_stackpointer_alloc(list,stacksize);
+ reference_reset_base(href,NR_STACK_POINTER_REG,0,sizeof(pint));
+ end
+ else
+ reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
+ cg.a_loadfpu_reg_ref(list,locsize,locsize,l.register,href);
+ end;
+ LOC_FPUREGISTER:
+ begin
+ cg.a_loadfpu_reg_reg(list,locsize,cgpara.location^.size,l.register,cgpara.location^.register);
+ end;
+ { can happen if a record with only 1 "single field" is
+ returned in a floating point register and then is directly
+ passed to a regcall parameter }
+ LOC_REGISTER:
+ begin
+ tmploc:=l;
+ location_force_mem(list,tmploc,size);
+ case locsize of
+ OS_F32:
+ tmploc.size:=OS_32;
+ OS_F64:
+ tmploc.size:=OS_64;
+ else
+ internalerror(2010053116);
+ end;
+ cg.a_load_loc_cgpara(list,tmploc,cgpara);
+ location_freetemp(list,tmploc);
+ end
+ else
+ internalerror(2010053003);
+ end;
+ end;
+ LOC_MMREGISTER,
+ LOC_CMMREGISTER:
+ begin
+ case cgpara.location^.loc of
+ LOC_REFERENCE:
+ begin
+ { can't use TCGSize2Size[l.size], because the size of an
+ 80 bit extended parameter can be either 10 or 12 bytes }
+ stacksize:=align(locintsize,cgpara.alignment);
+ if (not paramanager.use_fixed_stack) and
+ (cgpara.location^.reference.index=NR_STACK_POINTER_REG) then
+ begin
+ cg.g_stackpointer_alloc(list,stacksize);
+ reference_reset_base(href,NR_STACK_POINTER_REG,0,sizeof(pint));
+ end
+ else
+ reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
+ cg.a_loadmm_reg_ref(list,locsize,locsize,l.register,href,mms_movescalar);
+ end;
+ LOC_FPUREGISTER:
+ begin
+ tmploc:=l;
+ location_force_mem(list,tmploc,size);
+ cg.a_loadfpu_ref_cgpara(list,tmploc.size,tmploc.reference,cgpara);
+ location_freetemp(list,tmploc);
+ end;
+ else
+ internalerror(2010053004);
+ end;
+ end;
+ LOC_REFERENCE,
+ LOC_CREFERENCE :
+ begin
+ case cgpara.location^.loc of
+ LOC_REFERENCE:
+ begin
+ stacksize:=align(locintsize,cgpara.alignment);
+ if (not paramanager.use_fixed_stack) and
+ (cgpara.location^.reference.index=NR_STACK_POINTER_REG) then
+ cg.a_load_ref_cgpara(list,locsize,l.reference,cgpara)
+ else
+ begin
+ reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
+ cg.g_concatcopy(list,l.reference,href,stacksize);
+ end;
+ end;
+ LOC_FPUREGISTER:
+ begin
+ cg.a_loadfpu_ref_cgpara(list,locsize,l.reference,cgpara);
+ end;
+ else
+ internalerror(2010053005);
+ end;
+ end;
+ else
+ internalerror(2002042430);
+ end;
+ end;
+
+
+ procedure thlcgcpu.g_copyvaluepara_openarray(list: TAsmList; const ref: treference; const lenloc: tlocation; arrdef: tarraydef; destreg: tregister);
+ begin
+ if paramanager.use_fixed_stack then
+ begin
+ inherited;
+ exit;
+ end;
+ tcg8086(cg).g_copyvaluepara_openarray(list,ref,lenloc,arrdef.elesize,destreg);
+ end;
+
+
+ procedure thlcgcpu.g_releasevaluepara_openarray(list: TAsmList; arrdef: tarraydef; const l: tlocation);
+ begin
+ if paramanager.use_fixed_stack then
+ begin
+ inherited;
+ exit;
+ end;
+ tcg8086(cg).g_releasevaluepara_openarray(list,l);
+ end;
+
+
+ procedure create_hlcodegen;
+ begin
+ hlcg:=thlcgcpu.create;
+ create_codegen;
+ end;
+
+
+
+end.
diff --git a/compiler/i8086/i8086att.inc b/compiler/i8086/i8086att.inc
new file mode 100644
index 0000000000..14ca3fbc0b
--- /dev/null
+++ b/compiler/i8086/i8086att.inc
@@ -0,0 +1,947 @@
+{ don't edit, this file is generated from x86ins.dat }
+(
+'none',
+'aaa',
+'aad',
+'aam',
+'aas',
+'adc',
+'add',
+'and',
+'arpl',
+'bound',
+'bsf',
+'bsr',
+'bswap',
+'bt',
+'btc',
+'btr',
+'bts',
+'call',
+'cbtw',
+'cltd',
+'clc',
+'cld',
+'cli',
+'clts',
+'cmc',
+'cmp',
+'cmpsb',
+'cmpsl',
+'cmpsw',
+'cmpxchg',
+'cmpxchg486',
+'cmpxchg8b',
+'cpuid',
+'cwd',
+'cwtl',
+'daa',
+'das',
+'dec',
+'div',
+'emms',
+'enter',
+'f2xm1',
+'fabs',
+'fadd',
+'faddp',
+'fbld',
+'fbstp',
+'fchs',
+'fclex',
+'fcmovb',
+'fcmovbe',
+'fcmove',
+'fcmovnb',
+'fcmovnbe',
+'fcmovne',
+'fcmovnu',
+'fcmovu',
+'fcom',
+'fcomi',
+'fcomip',
+'fcomp',
+'fcompp',
+'fcos',
+'fdecstp',
+'fdisi',
+'fdiv',
+'fdivp',
+'fdivr',
+'fdivrp',
+'femms',
+'feni',
+'ffree',
+'fiadd',
+'ficom',
+'ficomp',
+'fidiv',
+'fidivr',
+'fild',
+'fimul',
+'fincstp',
+'finit',
+'fist',
+'fistp',
+'fisttp',
+'fisub',
+'fisubr',
+'fld',
+'fld1',
+'fldcw',
+'fldenv',
+'fldl2e',
+'fldl2t',
+'fldlg2',
+'fldln2',
+'fldpi',
+'fldz',
+'fmul',
+'fmulp',
+'fnclex',
+'fndisi',
+'fneni',
+'fninit',
+'fnop',
+'fnsave',
+'fnstcw',
+'fnstenv',
+'fnstsw',
+'fpatan',
+'fprem',
+'fprem1',
+'fptan',
+'frndint',
+'frstor',
+'fsave',
+'fscale',
+'fsetpm',
+'fsin',
+'fsincos',
+'fsqrt',
+'fst',
+'fstcw',
+'fstenv',
+'fstp',
+'fstsw',
+'fsub',
+'fsubp',
+'fsubr',
+'fsubrp',
+'ftst',
+'fucom',
+'fucomi',
+'fucomip',
+'fucomp',
+'fucompp',
+'fwait',
+'fxam',
+'fxch',
+'fxtract',
+'fyl2x',
+'fyl2xp1',
+'hlt',
+'ibts',
+'icebp',
+'idiv',
+'imul',
+'in',
+'inc',
+'insb',
+'insl',
+'insw',
+'int',
+'int01',
+'int1',
+'int03',
+'int3',
+'into',
+'invd',
+'invlpg',
+'iret',
+'iret',
+'iretw',
+'iretq',
+'jcxz',
+'jecxz',
+'jrcxz',
+'jmp',
+'lahf',
+'lar',
+'lcall',
+'lds',
+'lea',
+'leave',
+'les',
+'lfs',
+'lgdt',
+'lgs',
+'lidt',
+'ljmp',
+'lldt',
+'lmsw',
+'loadall',
+'loadall286',
+'lock',
+'lodsb',
+'lodsl',
+'lodsw',
+'loop',
+'loope',
+'loopne',
+'loopnz',
+'loopz',
+'lsl',
+'lss',
+'ltr',
+'monitor',
+'mov',
+'movd',
+'movq',
+'movsb',
+'movsl',
+'movsq',
+'movsw',
+'movs',
+'movz',
+'mul',
+'mwait',
+'neg',
+'nop',
+'not',
+'or',
+'out',
+'outsb',
+'outsl',
+'outsw',
+'packssdw',
+'packsswb',
+'packuswb',
+'paddb',
+'paddd',
+'paddsb',
+'paddsiw',
+'paddsw',
+'paddusb',
+'paddusw',
+'paddw',
+'pand',
+'pandn',
+'paveb',
+'pavgusb',
+'pcmpeqb',
+'pcmpeqd',
+'pcmpeqw',
+'pcmpgtb',
+'pcmpgtd',
+'pcmpgtw',
+'pdistib',
+'pf2id',
+'pfacc',
+'pfadd',
+'pfcmpeq',
+'pfcmpge',
+'pfcmpgt',
+'pfmax',
+'pfmin',
+'pfmul',
+'pfrcp',
+'pfrcpit1',
+'pfrcpit2',
+'pfrsqit1',
+'pfrsqrt',
+'pfsub',
+'pfsubr',
+'pi2fd',
+'pmachriw',
+'pmaddwd',
+'pmagw',
+'pmulhriw',
+'pmulhrwa',
+'pmulhrwc',
+'pmulhw',
+'pmullw',
+'pmvgezb',
+'pmvlzb',
+'pmvnzb',
+'pmvzb',
+'pop',
+'popa',
+'popal',
+'popaw',
+'popf',
+'popfl',
+'popfw',
+'popfq',
+'por',
+'prefetch',
+'prefetchw',
+'pslld',
+'pslldq',
+'psllq',
+'psllw',
+'psrad',
+'psraw',
+'psrld',
+'psrlq',
+'psrlw',
+'psubb',
+'psubd',
+'psubsb',
+'psubsiw',
+'psubsw',
+'psubusb',
+'psubusw',
+'psubw',
+'punpckhbw',
+'punpckhdq',
+'punpckhwd',
+'punpcklbw',
+'punpckldq',
+'punpcklwd',
+'push',
+'pusha',
+'pushal',
+'pushaw',
+'pushf',
+'pushfl',
+'pushfw',
+'pushfq',
+'pxor',
+'rcl',
+'rcr',
+'rdshr',
+'rdmsr',
+'rdpmc',
+'rdtsc',
+'rep',
+'repe',
+'repne',
+'repnz',
+'repz',
+'ret',
+'lret',
+'ret',
+'rol',
+'ror',
+'rsdc',
+'rsldt',
+'rsm',
+'sahf',
+'sal',
+'salc',
+'sar',
+'sbb',
+'scasb',
+'scasl',
+'scasq',
+'scasw',
+'cs',
+'ds',
+'es',
+'fs',
+'gs',
+'ss',
+'sgdt',
+'shl',
+'shld',
+'shr',
+'shrd',
+'sidt',
+'sldt',
+'smi',
+'smint',
+'smintold',
+'smsw',
+'stc',
+'std',
+'sti',
+'stosb',
+'stosl',
+'stosw',
+'str',
+'sub',
+'svdc',
+'svldt',
+'svts',
+'syscall',
+'sysenter',
+'sysexit',
+'sysret',
+'test',
+'ud1',
+'ud2',
+'umov',
+'verr',
+'verw',
+'wait',
+'wbinvd',
+'wrshr',
+'wrmsr',
+'xadd',
+'xbts',
+'xchg',
+'xlat',
+'xlatb',
+'xor',
+'xstore',
+'xcryptecb',
+'xcryptcbc',
+'xcryptcfb',
+'xcryptofb',
+'cmov',
+'j',
+'set',
+'addps',
+'addss',
+'andnps',
+'andps',
+'cmpeqps',
+'cmpeqss',
+'cmpleps',
+'cmpless',
+'cmpltps',
+'cmpltss',
+'cmpneqps',
+'cmpneqss',
+'cmpnleps',
+'cmpnless',
+'cmpnltps',
+'cmpnltss',
+'cmpordps',
+'cmpordss',
+'cmpunordps',
+'cmpunordss',
+'cmpps',
+'cmpss',
+'comiss',
+'cvtpi2ps',
+'cvtps2pi',
+'cvtsi2ss',
+'cvtss2si',
+'cvttps2pi',
+'cvttss2si',
+'divps',
+'divss',
+'ldmxcsr',
+'maxps',
+'maxss',
+'minps',
+'minss',
+'movaps',
+'movhps',
+'movlhps',
+'movlps',
+'movhlps',
+'movmskps',
+'movntps',
+'movss',
+'movups',
+'mulps',
+'mulss',
+'orps',
+'rcpps',
+'rcpss',
+'rsqrtps',
+'rsqrtss',
+'shufps',
+'sqrtps',
+'sqrtss',
+'stmxcsr',
+'subps',
+'subss',
+'ucomiss',
+'unpckhps',
+'unpcklps',
+'xorps',
+'fxrstor',
+'fxsave',
+'prefetchnta',
+'prefetcht0',
+'prefetcht1',
+'prefetcht2',
+'sfence',
+'maskmovq',
+'movntq',
+'pavgb',
+'pavgw',
+'pextrw',
+'pinsrw',
+'pmaxsw',
+'pmaxub',
+'pminsw',
+'pminub',
+'pmovmskb',
+'pmulhuw',
+'psadbw',
+'pshufw',
+'pfnacc',
+'pfpnacc',
+'pi2fw',
+'pf2iw',
+'pswapd',
+'ffreep',
+'maskmovdqu',
+'clflush',
+'movntdq',
+'movnti',
+'movntpd',
+'pause',
+'lfence',
+'mfence',
+'movdqa',
+'movdqu',
+'movdq2q',
+'movq2dq',
+'paddq',
+'pmuludq',
+'pshufd',
+'pshufhw',
+'pshuflw',
+'psrldq',
+'psubq',
+'punpckhqdq',
+'punpcklqdq',
+'addpd',
+'addsd',
+'andnpd',
+'andpd',
+'cmpeqpd',
+'cmpeqsd',
+'cmplepd',
+'cmplesd',
+'cmpltpd',
+'cmpltsd',
+'cmpneqpd',
+'cmpneqsd',
+'cmpnlepd',
+'cmpnlesd',
+'cmpnltpd',
+'cmpnltsd',
+'cmpordpd',
+'cmpordsd',
+'cmpunordpd',
+'cmpunordsd',
+'cmppd',
+'comisd',
+'cvtdq2pd',
+'cvtdq2ps',
+'cvtpd2dq',
+'cvtpd2pi',
+'cvtpd2ps',
+'cvtpi2pd',
+'cvtps2dq',
+'cvtps2pd',
+'cvtsd2si',
+'cvtsd2ss',
+'cvtsi2sd',
+'cvtss2sd',
+'cvttpd2pi',
+'cvttpd2dq',
+'cvttps2dq',
+'cvttsd2si',
+'divpd',
+'divsd',
+'maxpd',
+'maxsd',
+'minpd',
+'minsd',
+'movapd',
+'movhpd',
+'movlpd',
+'movmskpd',
+'movupd',
+'mulpd',
+'mulsd',
+'orpd',
+'shufpd',
+'sqrtpd',
+'sqrtsd',
+'subpd',
+'subsd',
+'ucomisd',
+'unpckhpd',
+'unpcklpd',
+'xorpd',
+'addsubpd',
+'addsubps',
+'haddpd',
+'haddps',
+'hsubpd',
+'hsubps',
+'lddqu',
+'movddup',
+'movshdup',
+'movsldup',
+'vmread',
+'vmwrite',
+'vmcall',
+'vmlaunch',
+'vmresume',
+'vmxoff',
+'vmxon',
+'vmclear',
+'vmptrld',
+'vmptrst',
+'vmrun',
+'vmmcall',
+'vmload',
+'vmsave',
+'stgi',
+'clgi',
+'skinit',
+'invlpga',
+'montmul',
+'xsha1',
+'xsha256',
+'dmint',
+'rdm',
+'movabs',
+'movslq',
+'cqto',
+'cmpxchg16b',
+'movntss',
+'movntsd',
+'insertq',
+'extrq',
+'lzcnt',
+'pabsb',
+'pabsw',
+'pabsd',
+'palignr',
+'phaddw',
+'phaddd',
+'phaddsw',
+'phsubw',
+'phsubd',
+'phsubsw',
+'pmaddubsw',
+'pmulhrsw',
+'pshufb',
+'psignb',
+'psignw',
+'psignd',
+'blendps',
+'blendpd',
+'blendvps',
+'blendvpd',
+'dpps',
+'dppd',
+'extractps',
+'insertps',
+'movntdqa',
+'mpsadbw',
+'packusdw',
+'pblendvb',
+'pblendw',
+'pcmpeqq',
+'pextrb',
+'pextrd',
+'pextrq',
+'phminposuw',
+'pinsrb',
+'pinsrd',
+'pinsrq',
+'pmaxsb',
+'pmaxsd',
+'pmaxud',
+'pmaxuw',
+'pminsb',
+'pminsd',
+'pminuw',
+'pminud',
+'pmovsxbw',
+'pmovsxbd',
+'pmovsxbq',
+'pmovsxwd',
+'pmovsxwq',
+'pmovsxdq',
+'pmovzxbw',
+'pmovzxbd',
+'pmovzxbq',
+'pmovzxwd',
+'pmovzxwq',
+'pmovzxdq',
+'pmuldq',
+'pmulld',
+'ptest',
+'roundps',
+'roundpd',
+'roundss',
+'roundsd',
+'crc32',
+'pcmpestri',
+'pcmpestrm',
+'pcmpistri',
+'pcmpistrm',
+'pcmpgtq',
+'popcnt',
+'aesenc',
+'aesenclast',
+'aesdec',
+'aesdeclast',
+'aesimc',
+'aeskeygenassist',
+'stosq',
+'lodsq',
+'cmpsq',
+'vaddpd',
+'vaddps',
+'vaddsd',
+'vaddss',
+'vaddsubpd',
+'vaddsubps',
+'vaesdec',
+'vaesdeclast',
+'vaesenc',
+'vaesenclast',
+'vaesimc',
+'vaeskeygenassist',
+'vandnpd',
+'vandnps',
+'vandpd',
+'vandps',
+'vblendpd',
+'vblendps',
+'vblendvpd',
+'vblendvps',
+'vbroadcastf128',
+'vbroadcastsd',
+'vbroadcastss',
+'vcmppd',
+'vcmpps',
+'vcmpsd',
+'vcmpss',
+'vcomisd',
+'vcomiss',
+'vcvtdq2pd',
+'vcvtdq2ps',
+'vcvtpd2dq',
+'vcvtpd2ps',
+'vcvtps2dq',
+'vcvtps2pd',
+'vcvtsd2si',
+'vcvtsd2ss',
+'vcvtsi2sd',
+'vcvtsi2ss',
+'vcvtss2sd',
+'vcvtss2si',
+'vcvttpd2dq',
+'vcvttps2dq',
+'vcvttsd2si',
+'vcvttss2si',
+'vdivpd',
+'vdivps',
+'vdivsd',
+'vdivss',
+'vdppd',
+'vdpps',
+'vextractf128',
+'vextractps',
+'vhaddpd',
+'vhaddps',
+'vhsubpd',
+'vhsubps',
+'vinsertf128',
+'vinsertps',
+'vlddqu',
+'vldmxcsr',
+'vmaskmovdqu',
+'vmaskmovpd',
+'vmaskmovps',
+'vmaxpd',
+'vmaxps',
+'vmaxsd',
+'vmaxss',
+'vminpd',
+'vminps',
+'vminsd',
+'vminss',
+'vmovapd',
+'vmovaps',
+'vmovd',
+'vmovddup',
+'vmovdqa',
+'vmovdqu',
+'vmovhlps',
+'vmovhpd',
+'vmovhps',
+'vmovlhps',
+'vmovlpd',
+'vmovlps',
+'vmovmskpd',
+'vmovmskps',
+'vmovntdq',
+'vmovntdqa',
+'vmovntpd',
+'vmovntps',
+'vmovq',
+'vmovsd',
+'vmovshdup',
+'vmovsldup',
+'vmovss',
+'vmovupd',
+'vmovups',
+'vmpsadbw',
+'vmulpd',
+'vmulps',
+'vmulsd',
+'vmulss',
+'vorpd',
+'vorps',
+'vpabsb',
+'vpabsd',
+'vpabsw',
+'vpackssdw',
+'vpacksswb',
+'vpackusdw',
+'vpackuswb',
+'vpaddb',
+'vpaddd',
+'vpaddq',
+'vpaddsb',
+'vpaddsw',
+'vpaddusb',
+'vpaddusw',
+'vpaddw',
+'vpalignr',
+'vpand',
+'vpandn',
+'vpavgb',
+'vpavgw',
+'vpblendvb',
+'vpblendw',
+'vpclmulqdq',
+'vpcmpeqb',
+'vpcmpeqd',
+'vpcmpeqq',
+'vpcmpeqw',
+'vpcmpestri',
+'vpcmpestrm',
+'vpcmpgtb',
+'vpcmpgtd',
+'vpcmpgtq',
+'vpcmpgtw',
+'vpcmpistri',
+'vpcmpistrm',
+'vperm2f128',
+'vpermilpd',
+'vpermilps',
+'vpextrb',
+'vpextrd',
+'vpextrq',
+'vpextrw',
+'vphaddd',
+'vphaddsw',
+'vphaddw',
+'vphminposuw',
+'vphsubd',
+'vphsubsw',
+'vphsubw',
+'vpinsrb',
+'vpinsrd',
+'vpinsrq',
+'vpinsrw',
+'vpmaddubsw',
+'vpmaddwd',
+'vpmaxsb',
+'vpmaxsd',
+'vpmaxsw',
+'vpmaxub',
+'vpmaxud',
+'vpmaxuw',
+'vpminsb',
+'vpminsd',
+'vpminsw',
+'vpminub',
+'vpminud',
+'vpminuw',
+'vpmovmskb',
+'vpmovsxbd',
+'vpmovsxbq',
+'vpmovsxbw',
+'vpmovsxdq',
+'vpmovsxwd',
+'vpmovsxwq',
+'vpmovzxbd',
+'vpmovzxbq',
+'vpmovzxbw',
+'vpmovzxdq',
+'vpmovzxwd',
+'vpmovzxwq',
+'vpmuldq',
+'vpmulhrsw',
+'vpmulhuw',
+'vpmulhw',
+'vpmulld',
+'vpmullw',
+'vpmuludq',
+'vpor',
+'vpsadbw',
+'vpshufb',
+'vpshufd',
+'vpshufhw',
+'vpshuflw',
+'vpsignb',
+'vpsignd',
+'vpsignw',
+'vpslld',
+'vpslldq',
+'vpsllq',
+'vpsllw',
+'vpsrad',
+'vpsraw',
+'vpsrld',
+'vpsrldq',
+'vpsrlq',
+'vpsrlw',
+'vpsubb',
+'vpsubd',
+'vpsubq',
+'vpsubsb',
+'vpsubsw',
+'vpsubusb',
+'vpsubusw',
+'vpsubw',
+'vptest',
+'vpunpckhbw',
+'vpunpckhdq',
+'vpunpckhqdq',
+'vpunpckhwd',
+'vpunpcklbw',
+'vpunpckldq',
+'vpunpcklqdq',
+'vpunpcklwd',
+'vpxor',
+'vrcpps',
+'vrcpss',
+'vroundpd',
+'vroundps',
+'vroundsd',
+'vroundss',
+'vrsqrtps',
+'vrsqrtss',
+'vshufpd',
+'vshufps',
+'vsqrtpd',
+'vsqrtps',
+'vsqrtsd',
+'vsqrtss',
+'vstmxcsr',
+'vsubpd',
+'vsubps',
+'vsubsd',
+'vsubss',
+'vtestpd',
+'vtestps',
+'vucomisd',
+'vucomiss',
+'vunpckhpd',
+'vunpckhps',
+'vunpcklpd',
+'vunpcklps',
+'vxorpd',
+'vxorps',
+'vzeroall',
+'vzeroupper'
+);
diff --git a/compiler/i8086/i8086atts.inc b/compiler/i8086/i8086atts.inc
new file mode 100644
index 0000000000..2f06270fe3
--- /dev/null
+++ b/compiler/i8086/i8086atts.inc
@@ -0,0 +1,947 @@
+{ don't edit, this file is generated from x86ins.dat }
+(
+attsufNONE,
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+);
diff --git a/compiler/i8086/i8086int.inc b/compiler/i8086/i8086int.inc
new file mode 100644
index 0000000000..3a3f4b4631
--- /dev/null
+++ b/compiler/i8086/i8086int.inc
@@ -0,0 +1,947 @@
+{ don't edit, this file is generated from x86ins.dat }
+(
+'none',
+'aaa',
+'aad',
+'aam',
+'aas',
+'adc',
+'add',
+'and',
+'arpl',
+'bound',
+'bsf',
+'bsr',
+'bswap',
+'bt',
+'btc',
+'btr',
+'bts',
+'call',
+'cbw',
+'cdq',
+'clc',
+'cld',
+'cli',
+'clts',
+'cmc',
+'cmp',
+'cmpsb',
+'cmpsd',
+'cmpsw',
+'cmpxchg',
+'cmpxchg486',
+'cmpxchg8b',
+'cpuid',
+'cwd',
+'cwde',
+'daa',
+'das',
+'dec',
+'div',
+'emms',
+'enter',
+'f2xm1',
+'fabs',
+'fadd',
+'faddp',
+'fbld',
+'fbstp',
+'fchs',
+'fclex',
+'fcmovb',
+'fcmovbe',
+'fcmove',
+'fcmovnb',
+'fcmovnbe',
+'fcmovne',
+'fcmovnu',
+'fcmovu',
+'fcom',
+'fcomi',
+'fcomip',
+'fcomp',
+'fcompp',
+'fcos',
+'fdecstp',
+'fdisi',
+'fdiv',
+'fdivp',
+'fdivr',
+'fdivrp',
+'femms',
+'feni',
+'ffree',
+'fiadd',
+'ficom',
+'ficomp',
+'fidiv',
+'fidivr',
+'fild',
+'fimul',
+'fincstp',
+'finit',
+'fist',
+'fistp',
+'fisttp',
+'fisub',
+'fisubr',
+'fld',
+'fld1',
+'fldcw',
+'fldenv',
+'fldl2e',
+'fldl2t',
+'fldlg2',
+'fldln2',
+'fldpi',
+'fldz',
+'fmul',
+'fmulp',
+'fnclex',
+'fndisi',
+'fneni',
+'fninit',
+'fnop',
+'fnsave',
+'fnstcw',
+'fnstenv',
+'fnstsw',
+'fpatan',
+'fprem',
+'fprem1',
+'fptan',
+'frndint',
+'frstor',
+'fsave',
+'fscale',
+'fsetpm',
+'fsin',
+'fsincos',
+'fsqrt',
+'fst',
+'fstcw',
+'fstenv',
+'fstp',
+'fstsw',
+'fsub',
+'fsubp',
+'fsubr',
+'fsubrp',
+'ftst',
+'fucom',
+'fucomi',
+'fucomip',
+'fucomp',
+'fucompp',
+'fwait',
+'fxam',
+'fxch',
+'fxtract',
+'fyl2x',
+'fyl2xp1',
+'hlt',
+'ibts',
+'icebp',
+'idiv',
+'imul',
+'in',
+'inc',
+'insb',
+'insd',
+'insw',
+'int',
+'int01',
+'int1',
+'int03',
+'int3',
+'into',
+'invd',
+'invlpg',
+'iret',
+'iretd',
+'iretw',
+'iretq',
+'jcxz',
+'jecxz',
+'jrcxz',
+'jmp',
+'lahf',
+'lar',
+'lcall',
+'lds',
+'lea',
+'leave',
+'les',
+'lfs',
+'lgdt',
+'lgs',
+'lidt',
+'ljmp',
+'lldt',
+'lmsw',
+'loadall',
+'loadall286',
+'lock',
+'lodsb',
+'lodsd',
+'lodsw',
+'loop',
+'loope',
+'loopne',
+'loopnz',
+'loopz',
+'lsl',
+'lss',
+'ltr',
+'monitor',
+'mov',
+'movd',
+'movq',
+'movsb',
+'movsd',
+'movsq',
+'movsw',
+'movsx',
+'movzx',
+'mul',
+'mwait',
+'neg',
+'nop',
+'not',
+'or',
+'out',
+'outsb',
+'outsd',
+'outsw',
+'packssdw',
+'packsswb',
+'packuswb',
+'paddb',
+'paddd',
+'paddsb',
+'paddsiw',
+'paddsw',
+'paddusb',
+'paddusw',
+'paddw',
+'pand',
+'pandn',
+'paveb',
+'pavgusb',
+'pcmpeqb',
+'pcmpeqd',
+'pcmpeqw',
+'pcmpgtb',
+'pcmpgtd',
+'pcmpgtw',
+'pdistib',
+'pf2id',
+'pfacc',
+'pfadd',
+'pfcmpeq',
+'pfcmpge',
+'pfcmpgt',
+'pfmax',
+'pfmin',
+'pfmul',
+'pfrcp',
+'pfrcpit1',
+'pfrcpit2',
+'pfrsqit1',
+'pfrsqrt',
+'pfsub',
+'pfsubr',
+'pi2fd',
+'pmachriw',
+'pmaddwd',
+'pmagw',
+'pmulhriw',
+'pmulhrwa',
+'pmulhrwc',
+'pmulhw',
+'pmullw',
+'pmvgezb',
+'pmvlzb',
+'pmvnzb',
+'pmvzb',
+'pop',
+'popa',
+'popad',
+'popaw',
+'popf',
+'popfd',
+'popfw',
+'popfq',
+'por',
+'prefetch',
+'prefetchw',
+'pslld',
+'pslldq',
+'psllq',
+'psllw',
+'psrad',
+'psraw',
+'psrld',
+'psrlq',
+'psrlw',
+'psubb',
+'psubd',
+'psubsb',
+'psubsiw',
+'psubsw',
+'psubusb',
+'psubusw',
+'psubw',
+'punpckhbw',
+'punpckhdq',
+'punpckhwd',
+'punpcklbw',
+'punpckldq',
+'punpcklwd',
+'push',
+'pusha',
+'pushad',
+'pushaw',
+'pushf',
+'pushfd',
+'pushfw',
+'pushfq',
+'pxor',
+'rcl',
+'rcr',
+'rdshr',
+'rdmsr',
+'rdpmc',
+'rdtsc',
+'rep',
+'repe',
+'repne',
+'repnz',
+'repz',
+'ret',
+'retf',
+'retn',
+'rol',
+'ror',
+'rsdc',
+'rsldt',
+'rsm',
+'sahf',
+'sal',
+'salc',
+'sar',
+'sbb',
+'scasb',
+'scasd',
+'scasq',
+'scasw',
+'segcs',
+'segds',
+'seges',
+'segfs',
+'seggs',
+'segss',
+'sgdt',
+'shl',
+'shld',
+'shr',
+'shrd',
+'sidt',
+'sldt',
+'smi',
+'smint',
+'smintold',
+'smsw',
+'stc',
+'std',
+'sti',
+'stosb',
+'stosd',
+'stosw',
+'str',
+'sub',
+'svdc',
+'svldt',
+'svts',
+'syscall',
+'sysenter',
+'sysexit',
+'sysret',
+'test',
+'ud1',
+'ud2',
+'umov',
+'verr',
+'verw',
+'wait',
+'wbinvd',
+'wrshr',
+'wrmsr',
+'xadd',
+'xbts',
+'xchg',
+'xlat',
+'xlatb',
+'xor',
+'xstore',
+'xcryptecb',
+'xcryptcbc',
+'xcryptcfb',
+'xcryptofb',
+'cmov',
+'j',
+'set',
+'addps',
+'addss',
+'andnps',
+'andps',
+'cmpeqps',
+'cmpeqss',
+'cmpleps',
+'cmpless',
+'cmpltps',
+'cmpltss',
+'cmpneqps',
+'cmpneqss',
+'cmpnleps',
+'cmpnless',
+'cmpnltps',
+'cmpnltss',
+'cmpordps',
+'cmpordss',
+'cmpunordps',
+'cmpunordss',
+'cmpps',
+'cmpss',
+'comiss',
+'cvtpi2ps',
+'cvtps2pi',
+'cvtsi2ss',
+'cvtss2si',
+'cvttps2pi',
+'cvttss2si',
+'divps',
+'divss',
+'ldmxcsr',
+'maxps',
+'maxss',
+'minps',
+'minss',
+'movaps',
+'movhps',
+'movlhps',
+'movlps',
+'movhlps',
+'movmskps',
+'movntps',
+'movss',
+'movups',
+'mulps',
+'mulss',
+'orps',
+'rcpps',
+'rcpss',
+'rsqrtps',
+'rsqrtss',
+'shufps',
+'sqrtps',
+'sqrtss',
+'stmxcsr',
+'subps',
+'subss',
+'ucomiss',
+'unpckhps',
+'unpcklps',
+'xorps',
+'fxrstor',
+'fxsave',
+'prefetchnta',
+'prefetcht0',
+'prefetcht1',
+'prefetcht2',
+'sfence',
+'maskmovq',
+'movntq',
+'pavgb',
+'pavgw',
+'pextrw',
+'pinsrw',
+'pmaxsw',
+'pmaxub',
+'pminsw',
+'pminub',
+'pmovmskb',
+'pmulhuw',
+'psadbw',
+'pshufw',
+'pfnacc',
+'pfpnacc',
+'pi2fw',
+'pf2iw',
+'pswapd',
+'ffreep',
+'maskmovdqu',
+'clflush',
+'movntdq',
+'movnti',
+'movntpd',
+'pause',
+'lfence',
+'mfence',
+'movdqa',
+'movdqu',
+'movdq2q',
+'movq2dq',
+'paddq',
+'pmuludq',
+'pshufd',
+'pshufhw',
+'pshuflw',
+'psrldq',
+'psubq',
+'punpckhqdq',
+'punpcklqdq',
+'addpd',
+'addsd',
+'andnpd',
+'andpd',
+'cmpeqpd',
+'cmpeqsd',
+'cmplepd',
+'cmplesd',
+'cmpltpd',
+'cmpltsd',
+'cmpneqpd',
+'cmpneqsd',
+'cmpnlepd',
+'cmpnlesd',
+'cmpnltpd',
+'cmpnltsd',
+'cmpordpd',
+'cmpordsd',
+'cmpunordpd',
+'cmpunordsd',
+'cmppd',
+'comisd',
+'cvtdq2pd',
+'cvtdq2ps',
+'cvtpd2dq',
+'cvtpd2pi',
+'cvtpd2ps',
+'cvtpi2pd',
+'cvtps2dq',
+'cvtps2pd',
+'cvtsd2si',
+'cvtsd2ss',
+'cvtsi2sd',
+'cvtss2sd',
+'cvttpd2pi',
+'cvttpd2dq',
+'cvttps2dq',
+'cvttsd2si',
+'divpd',
+'divsd',
+'maxpd',
+'maxsd',
+'minpd',
+'minsd',
+'movapd',
+'movhpd',
+'movlpd',
+'movmskpd',
+'movupd',
+'mulpd',
+'mulsd',
+'orpd',
+'shufpd',
+'sqrtpd',
+'sqrtsd',
+'subpd',
+'subsd',
+'ucomisd',
+'unpckhpd',
+'unpcklpd',
+'xorpd',
+'addsubpd',
+'addsubps',
+'haddpd',
+'haddps',
+'hsubpd',
+'hsubps',
+'lddqu',
+'movddup',
+'movshdup',
+'movsldup',
+'vmread',
+'vmwrite',
+'vmcall',
+'vmlaunch',
+'vmresume',
+'vmxoff',
+'vmxon',
+'vmclear',
+'vmptrld',
+'vmptrst',
+'vmrun',
+'vmmcall',
+'vmload',
+'vmsave',
+'stgi',
+'clgi',
+'skinit',
+'invlpga',
+'montmul',
+'xsha1',
+'xsha256',
+'dmint',
+'rdm',
+'movabs',
+'movsxd',
+'cqo',
+'cmpxchg16b',
+'movntss',
+'movntsd',
+'insertq',
+'extrq',
+'lzcnt',
+'pabsb',
+'pabsw',
+'pabsd',
+'palignr',
+'phaddw',
+'phaddd',
+'phaddsw',
+'phsubw',
+'phsubd',
+'phsubsw',
+'pmaddubsw',
+'pmulhrsw',
+'pshufb',
+'psignb',
+'psignw',
+'psignd',
+'blendps',
+'blendpd',
+'blendvps',
+'blendvpd',
+'dpps',
+'dppd',
+'extractps',
+'insertps',
+'movntdqa',
+'mpsadbw',
+'packusdw',
+'pblendvb',
+'pblendw',
+'pcmpeqq',
+'pextrb',
+'pextrd',
+'pextrq',
+'phminposuw',
+'pinsrb',
+'pinsrd',
+'pinsrq',
+'pmaxsb',
+'pmaxsd',
+'pmaxud',
+'pmaxuw',
+'pminsb',
+'pminsd',
+'pminuw',
+'pminud',
+'pmovsxbw',
+'pmovsxbd',
+'pmovsxbq',
+'pmovsxwd',
+'pmovsxwq',
+'pmovsxdq',
+'pmovzxbw',
+'pmovzxbd',
+'pmovzxbq',
+'pmovzxwd',
+'pmovzxwq',
+'pmovzxdq',
+'pmuldq',
+'pmulld',
+'ptest',
+'roundps',
+'roundpd',
+'roundss',
+'roundsd',
+'crc32',
+'pcmpestri',
+'pcmpestrm',
+'pcmpistri',
+'pcmpistrm',
+'pcmpgtq',
+'popcnt',
+'aesenc',
+'aesenclast',
+'aesdec',
+'aesdeclast',
+'aesimc',
+'aeskeygenassist',
+'stosq',
+'lodsq',
+'cmpsq',
+'vaddpd',
+'vaddps',
+'vaddsd',
+'vaddss',
+'vaddsubpd',
+'vaddsubps',
+'vaesdec',
+'vaesdeclast',
+'vaesenc',
+'vaesenclast',
+'vaesimc',
+'vaeskeygenassist',
+'vandnpd',
+'vandnps',
+'vandpd',
+'vandps',
+'vblendpd',
+'vblendps',
+'vblendvpd',
+'vblendvps',
+'vbroadcastf128',
+'vbroadcastsd',
+'vbroadcastss',
+'vcmppd',
+'vcmpps',
+'vcmpsd',
+'vcmpss',
+'vcomisd',
+'vcomiss',
+'vcvtdq2pd',
+'vcvtdq2ps',
+'vcvtpd2dq',
+'vcvtpd2ps',
+'vcvtps2dq',
+'vcvtps2pd',
+'vcvtsd2si',
+'vcvtsd2ss',
+'vcvtsi2sd',
+'vcvtsi2ss',
+'vcvtss2sd',
+'vcvtss2si',
+'vcvttpd2dq',
+'vcvttps2dq',
+'vcvttsd2si',
+'vcvttss2si',
+'vdivpd',
+'vdivps',
+'vdivsd',
+'vdivss',
+'vdppd',
+'vdpps',
+'vextractf128',
+'vextractps',
+'vhaddpd',
+'vhaddps',
+'vhsubpd',
+'vhsubps',
+'vinsertf128',
+'vinsertps',
+'vlddqu',
+'vldmxcsr',
+'vmaskmovdqu',
+'vmaskmovpd',
+'vmaskmovps',
+'vmaxpd',
+'vmaxps',
+'vmaxsd',
+'vmaxss',
+'vminpd',
+'vminps',
+'vminsd',
+'vminss',
+'vmovapd',
+'vmovaps',
+'vmovd',
+'vmovddup',
+'vmovdqa',
+'vmovdqu',
+'vmovhlps',
+'vmovhpd',
+'vmovhps',
+'vmovlhps',
+'vmovlpd',
+'vmovlps',
+'vmovmskpd',
+'vmovmskps',
+'vmovntdq',
+'vmovntdqa',
+'vmovntpd',
+'vmovntps',
+'vmovq',
+'vmovsd',
+'vmovshdup',
+'vmovsldup',
+'vmovss',
+'vmovupd',
+'vmovups',
+'vmpsadbw',
+'vmulpd',
+'vmulps',
+'vmulsd',
+'vmulss',
+'vorpd',
+'vorps',
+'vpabsb',
+'vpabsd',
+'vpabsw',
+'vpackssdw',
+'vpacksswb',
+'vpackusdw',
+'vpackuswb',
+'vpaddb',
+'vpaddd',
+'vpaddq',
+'vpaddsb',
+'vpaddsw',
+'vpaddusb',
+'vpaddusw',
+'vpaddw',
+'vpalignr',
+'vpand',
+'vpandn',
+'vpavgb',
+'vpavgw',
+'vpblendvb',
+'vpblendw',
+'vpclmulqdq',
+'vpcmpeqb',
+'vpcmpeqd',
+'vpcmpeqq',
+'vpcmpeqw',
+'vpcmpestri',
+'vpcmpestrm',
+'vpcmpgtb',
+'vpcmpgtd',
+'vpcmpgtq',
+'vpcmpgtw',
+'vpcmpistri',
+'vpcmpistrm',
+'vperm2f128',
+'vpermilpd',
+'vpermilps',
+'vpextrb',
+'vpextrd',
+'vpextrq',
+'vpextrw',
+'vphaddd',
+'vphaddsw',
+'vphaddw',
+'vphminposuw',
+'vphsubd',
+'vphsubsw',
+'vphsubw',
+'vpinsrb',
+'vpinsrd',
+'vpinsrq',
+'vpinsrw',
+'vpmaddubsw',
+'vpmaddwd',
+'vpmaxsb',
+'vpmaxsd',
+'vpmaxsw',
+'vpmaxub',
+'vpmaxud',
+'vpmaxuw',
+'vpminsb',
+'vpminsd',
+'vpminsw',
+'vpminub',
+'vpminud',
+'vpminuw',
+'vpmovmskb',
+'vpmovsxbd',
+'vpmovsxbq',
+'vpmovsxbw',
+'vpmovsxdq',
+'vpmovsxwd',
+'vpmovsxwq',
+'vpmovzxbd',
+'vpmovzxbq',
+'vpmovzxbw',
+'vpmovzxdq',
+'vpmovzxwd',
+'vpmovzxwq',
+'vpmuldq',
+'vpmulhrsw',
+'vpmulhuw',
+'vpmulhw',
+'vpmulld',
+'vpmullw',
+'vpmuludq',
+'vpor',
+'vpsadbw',
+'vpshufb',
+'vpshufd',
+'vpshufhw',
+'vpshuflw',
+'vpsignb',
+'vpsignd',
+'vpsignw',
+'vpslld',
+'vpslldq',
+'vpsllq',
+'vpsllw',
+'vpsrad',
+'vpsraw',
+'vpsrld',
+'vpsrldq',
+'vpsrlq',
+'vpsrlw',
+'vpsubb',
+'vpsubd',
+'vpsubq',
+'vpsubsb',
+'vpsubsw',
+'vpsubusb',
+'vpsubusw',
+'vpsubw',
+'vptest',
+'vpunpckhbw',
+'vpunpckhdq',
+'vpunpckhqdq',
+'vpunpckhwd',
+'vpunpcklbw',
+'vpunpckldq',
+'vpunpcklqdq',
+'vpunpcklwd',
+'vpxor',
+'vrcpps',
+'vrcpss',
+'vroundpd',
+'vroundps',
+'vroundsd',
+'vroundss',
+'vrsqrtps',
+'vrsqrtss',
+'vshufpd',
+'vshufps',
+'vsqrtpd',
+'vsqrtps',
+'vsqrtsd',
+'vsqrtss',
+'vstmxcsr',
+'vsubpd',
+'vsubps',
+'vsubsd',
+'vsubss',
+'vtestpd',
+'vtestps',
+'vucomisd',
+'vucomiss',
+'vunpckhpd',
+'vunpckhps',
+'vunpcklpd',
+'vunpcklps',
+'vxorpd',
+'vxorps',
+'vzeroall',
+'vzeroupper'
+);
diff --git a/compiler/i8086/i8086nop.inc b/compiler/i8086/i8086nop.inc
new file mode 100644
index 0000000000..2c78c83758
--- /dev/null
+++ b/compiler/i8086/i8086nop.inc
@@ -0,0 +1,2 @@
+{ don't edit, this file is generated from x86ins.dat }
+1652;
diff --git a/compiler/i8086/i8086op.inc b/compiler/i8086/i8086op.inc
new file mode 100644
index 0000000000..fbbb16b8c6
--- /dev/null
+++ b/compiler/i8086/i8086op.inc
@@ -0,0 +1,947 @@
+{ don't edit, this file is generated from x86ins.dat }
+(
+A_NONE,
+A_AAA,
+A_AAD,
+A_AAM,
+A_AAS,
+A_ADC,
+A_ADD,
+A_AND,
+A_ARPL,
+A_BOUND,
+A_BSF,
+A_BSR,
+A_BSWAP,
+A_BT,
+A_BTC,
+A_BTR,
+A_BTS,
+A_CALL,
+A_CBW,
+A_CDQ,
+A_CLC,
+A_CLD,
+A_CLI,
+A_CLTS,
+A_CMC,
+A_CMP,
+A_CMPSB,
+A_CMPSD,
+A_CMPSW,
+A_CMPXCHG,
+A_CMPXCHG486,
+A_CMPXCHG8B,
+A_CPUID,
+A_CWD,
+A_CWDE,
+A_DAA,
+A_DAS,
+A_DEC,
+A_DIV,
+A_EMMS,
+A_ENTER,
+A_F2XM1,
+A_FABS,
+A_FADD,
+A_FADDP,
+A_FBLD,
+A_FBSTP,
+A_FCHS,
+A_FCLEX,
+A_FCMOVB,
+A_FCMOVBE,
+A_FCMOVE,
+A_FCMOVNB,
+A_FCMOVNBE,
+A_FCMOVNE,
+A_FCMOVNU,
+A_FCMOVU,
+A_FCOM,
+A_FCOMI,
+A_FCOMIP,
+A_FCOMP,
+A_FCOMPP,
+A_FCOS,
+A_FDECSTP,
+A_FDISI,
+A_FDIV,
+A_FDIVP,
+A_FDIVR,
+A_FDIVRP,
+A_FEMMS,
+A_FENI,
+A_FFREE,
+A_FIADD,
+A_FICOM,
+A_FICOMP,
+A_FIDIV,
+A_FIDIVR,
+A_FILD,
+A_FIMUL,
+A_FINCSTP,
+A_FINIT,
+A_FIST,
+A_FISTP,
+A_FISTTP,
+A_FISUB,
+A_FISUBR,
+A_FLD,
+A_FLD1,
+A_FLDCW,
+A_FLDENV,
+A_FLDL2E,
+A_FLDL2T,
+A_FLDLG2,
+A_FLDLN2,
+A_FLDPI,
+A_FLDZ,
+A_FMUL,
+A_FMULP,
+A_FNCLEX,
+A_FNDISI,
+A_FNENI,
+A_FNINIT,
+A_FNOP,
+A_FNSAVE,
+A_FNSTCW,
+A_FNSTENV,
+A_FNSTSW,
+A_FPATAN,
+A_FPREM,
+A_FPREM1,
+A_FPTAN,
+A_FRNDINT,
+A_FRSTOR,
+A_FSAVE,
+A_FSCALE,
+A_FSETPM,
+A_FSIN,
+A_FSINCOS,
+A_FSQRT,
+A_FST,
+A_FSTCW,
+A_FSTENV,
+A_FSTP,
+A_FSTSW,
+A_FSUB,
+A_FSUBP,
+A_FSUBR,
+A_FSUBRP,
+A_FTST,
+A_FUCOM,
+A_FUCOMI,
+A_FUCOMIP,
+A_FUCOMP,
+A_FUCOMPP,
+A_FWAIT,
+A_FXAM,
+A_FXCH,
+A_FXTRACT,
+A_FYL2X,
+A_FYL2XP1,
+A_HLT,
+A_IBTS,
+A_ICEBP,
+A_IDIV,
+A_IMUL,
+A_IN,
+A_INC,
+A_INSB,
+A_INSD,
+A_INSW,
+A_INT,
+A_INT01,
+A_INT1,
+A_INT03,
+A_INT3,
+A_INTO,
+A_INVD,
+A_INVLPG,
+A_IRET,
+A_IRETD,
+A_IRETW,
+A_IRETQ,
+A_JCXZ,
+A_JECXZ,
+A_JRCXZ,
+A_JMP,
+A_LAHF,
+A_LAR,
+A_LCALL,
+A_LDS,
+A_LEA,
+A_LEAVE,
+A_LES,
+A_LFS,
+A_LGDT,
+A_LGS,
+A_LIDT,
+A_LJMP,
+A_LLDT,
+A_LMSW,
+A_LOADALL,
+A_LOADALL286,
+A_LOCK,
+A_LODSB,
+A_LODSD,
+A_LODSW,
+A_LOOP,
+A_LOOPE,
+A_LOOPNE,
+A_LOOPNZ,
+A_LOOPZ,
+A_LSL,
+A_LSS,
+A_LTR,
+A_MONITOR,
+A_MOV,
+A_MOVD,
+A_MOVQ,
+A_MOVSB,
+A_MOVSD,
+A_MOVSQ,
+A_MOVSW,
+A_MOVSX,
+A_MOVZX,
+A_MUL,
+A_MWAIT,
+A_NEG,
+A_NOP,
+A_NOT,
+A_OR,
+A_OUT,
+A_OUTSB,
+A_OUTSD,
+A_OUTSW,
+A_PACKSSDW,
+A_PACKSSWB,
+A_PACKUSWB,
+A_PADDB,
+A_PADDD,
+A_PADDSB,
+A_PADDSIW,
+A_PADDSW,
+A_PADDUSB,
+A_PADDUSW,
+A_PADDW,
+A_PAND,
+A_PANDN,
+A_PAVEB,
+A_PAVGUSB,
+A_PCMPEQB,
+A_PCMPEQD,
+A_PCMPEQW,
+A_PCMPGTB,
+A_PCMPGTD,
+A_PCMPGTW,
+A_PDISTIB,
+A_PF2ID,
+A_PFACC,
+A_PFADD,
+A_PFCMPEQ,
+A_PFCMPGE,
+A_PFCMPGT,
+A_PFMAX,
+A_PFMIN,
+A_PFMUL,
+A_PFRCP,
+A_PFRCPIT1,
+A_PFRCPIT2,
+A_PFRSQIT1,
+A_PFRSQRT,
+A_PFSUB,
+A_PFSUBR,
+A_PI2FD,
+A_PMACHRIW,
+A_PMADDWD,
+A_PMAGW,
+A_PMULHRIW,
+A_PMULHRWA,
+A_PMULHRWC,
+A_PMULHW,
+A_PMULLW,
+A_PMVGEZB,
+A_PMVLZB,
+A_PMVNZB,
+A_PMVZB,
+A_POP,
+A_POPA,
+A_POPAD,
+A_POPAW,
+A_POPF,
+A_POPFD,
+A_POPFW,
+A_POPFQ,
+A_POR,
+A_PREFETCH,
+A_PREFETCHW,
+A_PSLLD,
+A_PSLLDQ,
+A_PSLLQ,
+A_PSLLW,
+A_PSRAD,
+A_PSRAW,
+A_PSRLD,
+A_PSRLQ,
+A_PSRLW,
+A_PSUBB,
+A_PSUBD,
+A_PSUBSB,
+A_PSUBSIW,
+A_PSUBSW,
+A_PSUBUSB,
+A_PSUBUSW,
+A_PSUBW,
+A_PUNPCKHBW,
+A_PUNPCKHDQ,
+A_PUNPCKHWD,
+A_PUNPCKLBW,
+A_PUNPCKLDQ,
+A_PUNPCKLWD,
+A_PUSH,
+A_PUSHA,
+A_PUSHAD,
+A_PUSHAW,
+A_PUSHF,
+A_PUSHFD,
+A_PUSHFW,
+A_PUSHFQ,
+A_PXOR,
+A_RCL,
+A_RCR,
+A_RDSHR,
+A_RDMSR,
+A_RDPMC,
+A_RDTSC,
+A_REP,
+A_REPE,
+A_REPNE,
+A_REPNZ,
+A_REPZ,
+A_RET,
+A_RETF,
+A_RETN,
+A_ROL,
+A_ROR,
+A_RSDC,
+A_RSLDT,
+A_RSM,
+A_SAHF,
+A_SAL,
+A_SALC,
+A_SAR,
+A_SBB,
+A_SCASB,
+A_SCASD,
+A_SCASQ,
+A_SCASW,
+A_SEGCS,
+A_SEGDS,
+A_SEGES,
+A_SEGFS,
+A_SEGGS,
+A_SEGSS,
+A_SGDT,
+A_SHL,
+A_SHLD,
+A_SHR,
+A_SHRD,
+A_SIDT,
+A_SLDT,
+A_SMI,
+A_SMINT,
+A_SMINTOLD,
+A_SMSW,
+A_STC,
+A_STD,
+A_STI,
+A_STOSB,
+A_STOSD,
+A_STOSW,
+A_STR,
+A_SUB,
+A_SVDC,
+A_SVLDT,
+A_SVTS,
+A_SYSCALL,
+A_SYSENTER,
+A_SYSEXIT,
+A_SYSRET,
+A_TEST,
+A_UD1,
+A_UD2,
+A_UMOV,
+A_VERR,
+A_VERW,
+A_WAIT,
+A_WBINVD,
+A_WRSHR,
+A_WRMSR,
+A_XADD,
+A_XBTS,
+A_XCHG,
+A_XLAT,
+A_XLATB,
+A_XOR,
+A_XSTORE,
+A_XCRYPTECB,
+A_XCRYPTCBC,
+A_XCRYPTCFB,
+A_XCRYPTOFB,
+A_CMOVcc,
+A_Jcc,
+A_SETcc,
+A_ADDPS,
+A_ADDSS,
+A_ANDNPS,
+A_ANDPS,
+A_CMPEQPS,
+A_CMPEQSS,
+A_CMPLEPS,
+A_CMPLESS,
+A_CMPLTPS,
+A_CMPLTSS,
+A_CMPNEQPS,
+A_CMPNEQSS,
+A_CMPNLEPS,
+A_CMPNLESS,
+A_CMPNLTPS,
+A_CMPNLTSS,
+A_CMPORDPS,
+A_CMPORDSS,
+A_CMPUNORDPS,
+A_CMPUNORDSS,
+A_CMPPS,
+A_CMPSS,
+A_COMISS,
+A_CVTPI2PS,
+A_CVTPS2PI,
+A_CVTSI2SS,
+A_CVTSS2SI,
+A_CVTTPS2PI,
+A_CVTTSS2SI,
+A_DIVPS,
+A_DIVSS,
+A_LDMXCSR,
+A_MAXPS,
+A_MAXSS,
+A_MINPS,
+A_MINSS,
+A_MOVAPS,
+A_MOVHPS,
+A_MOVLHPS,
+A_MOVLPS,
+A_MOVHLPS,
+A_MOVMSKPS,
+A_MOVNTPS,
+A_MOVSS,
+A_MOVUPS,
+A_MULPS,
+A_MULSS,
+A_ORPS,
+A_RCPPS,
+A_RCPSS,
+A_RSQRTPS,
+A_RSQRTSS,
+A_SHUFPS,
+A_SQRTPS,
+A_SQRTSS,
+A_STMXCSR,
+A_SUBPS,
+A_SUBSS,
+A_UCOMISS,
+A_UNPCKHPS,
+A_UNPCKLPS,
+A_XORPS,
+A_FXRSTOR,
+A_FXSAVE,
+A_PREFETCHNTA,
+A_PREFETCHT0,
+A_PREFETCHT1,
+A_PREFETCHT2,
+A_SFENCE,
+A_MASKMOVQ,
+A_MOVNTQ,
+A_PAVGB,
+A_PAVGW,
+A_PEXTRW,
+A_PINSRW,
+A_PMAXSW,
+A_PMAXUB,
+A_PMINSW,
+A_PMINUB,
+A_PMOVMSKB,
+A_PMULHUW,
+A_PSADBW,
+A_PSHUFW,
+A_PFNACC,
+A_PFPNACC,
+A_PI2FW,
+A_PF2IW,
+A_PSWAPD,
+A_FFREEP,
+A_MASKMOVDQU,
+A_CLFLUSH,
+A_MOVNTDQ,
+A_MOVNTI,
+A_MOVNTPD,
+A_PAUSE,
+A_LFENCE,
+A_MFENCE,
+A_MOVDQA,
+A_MOVDQU,
+A_MOVDQ2Q,
+A_MOVQ2DQ,
+A_PADDQ,
+A_PMULUDQ,
+A_PSHUFD,
+A_PSHUFHW,
+A_PSHUFLW,
+A_PSRLDQ,
+A_PSUBQ,
+A_PUNPCKHQDQ,
+A_PUNPCKLQDQ,
+A_ADDPD,
+A_ADDSD,
+A_ANDNPD,
+A_ANDPD,
+A_CMPEQPD,
+A_CMPEQSD,
+A_CMPLEPD,
+A_CMPLESD,
+A_CMPLTPD,
+A_CMPLTSD,
+A_CMPNEQPD,
+A_CMPNEQSD,
+A_CMPNLEPD,
+A_CMPNLESD,
+A_CMPNLTPD,
+A_CMPNLTSD,
+A_CMPORDPD,
+A_CMPORDSD,
+A_CMPUNORDPD,
+A_CMPUNORDSD,
+A_CMPPD,
+A_COMISD,
+A_CVTDQ2PD,
+A_CVTDQ2PS,
+A_CVTPD2DQ,
+A_CVTPD2PI,
+A_CVTPD2PS,
+A_CVTPI2PD,
+A_CVTPS2DQ,
+A_CVTPS2PD,
+A_CVTSD2SI,
+A_CVTSD2SS,
+A_CVTSI2SD,
+A_CVTSS2SD,
+A_CVTTPD2PI,
+A_CVTTPD2DQ,
+A_CVTTPS2DQ,
+A_CVTTSD2SI,
+A_DIVPD,
+A_DIVSD,
+A_MAXPD,
+A_MAXSD,
+A_MINPD,
+A_MINSD,
+A_MOVAPD,
+A_MOVHPD,
+A_MOVLPD,
+A_MOVMSKPD,
+A_MOVUPD,
+A_MULPD,
+A_MULSD,
+A_ORPD,
+A_SHUFPD,
+A_SQRTPD,
+A_SQRTSD,
+A_SUBPD,
+A_SUBSD,
+A_UCOMISD,
+A_UNPCKHPD,
+A_UNPCKLPD,
+A_XORPD,
+A_ADDSUBPD,
+A_ADDSUBPS,
+A_HADDPD,
+A_HADDPS,
+A_HSUBPD,
+A_HSUBPS,
+A_LDDQU,
+A_MOVDDUP,
+A_MOVSHDUP,
+A_MOVSLDUP,
+A_VMREAD,
+A_VMWRITE,
+A_VMCALL,
+A_VMLAUNCH,
+A_VMRESUME,
+A_VMXOFF,
+A_VMXON,
+A_VMCLEAR,
+A_VMPTRLD,
+A_VMPTRST,
+A_VMRUN,
+A_VMMCALL,
+A_VMLOAD,
+A_VMSAVE,
+A_STGI,
+A_CLGI,
+A_SKINIT,
+A_INVLPGA,
+A_MONTMUL,
+A_XSHA1,
+A_XSHA256,
+A_DMINT,
+A_RDM,
+A_MOVABS,
+A_MOVSXD,
+A_CQO,
+A_CMPXCHG16B,
+A_MOVNTSS,
+A_MOVNTSD,
+A_INSERTQ,
+A_EXTRQ,
+A_LZCNT,
+A_PABSB,
+A_PABSW,
+A_PABSD,
+A_PALIGNR,
+A_PHADDW,
+A_PHADDD,
+A_PHADDSW,
+A_PHSUBW,
+A_PHSUBD,
+A_PHSUBSW,
+A_PMADDUBSW,
+A_PMULHRSW,
+A_PSHUFB,
+A_PSIGNB,
+A_PSIGNW,
+A_PSIGND,
+A_BLENDPS,
+A_BLENDPD,
+A_BLENDVPS,
+A_BLENDVPD,
+A_DPPS,
+A_DPPD,
+A_EXTRACTPS,
+A_INSERTPS,
+A_MOVNTDQA,
+A_MPSADBW,
+A_PACKUSDW,
+A_PBLENDVB,
+A_PBLENDW,
+A_PCMPEQQ,
+A_PEXTRB,
+A_PEXTRD,
+A_PEXTRQ,
+A_PHMINPOSUW,
+A_PINSRB,
+A_PINSRD,
+A_PINSRQ,
+A_PMAXSB,
+A_PMAXSD,
+A_PMAXUD,
+A_PMAXUW,
+A_PMINSB,
+A_PMINSD,
+A_PMINUW,
+A_PMINUD,
+A_PMOVSXBW,
+A_PMOVSXBD,
+A_PMOVSXBQ,
+A_PMOVSXWD,
+A_PMOVSXWQ,
+A_PMOVSXDQ,
+A_PMOVZXBW,
+A_PMOVZXBD,
+A_PMOVZXBQ,
+A_PMOVZXWD,
+A_PMOVZXWQ,
+A_PMOVZXDQ,
+A_PMULDQ,
+A_PMULLD,
+A_PTEST,
+A_ROUNDPS,
+A_ROUNDPD,
+A_ROUNDSS,
+A_ROUNDSD,
+A_CRC32,
+A_PCMPESTRI,
+A_PCMPESTRM,
+A_PCMPISTRI,
+A_PCMPISTRM,
+A_PCMPGTQ,
+A_POPCNT,
+A_AESENC,
+A_AESENCLAST,
+A_AESDEC,
+A_AESDECLAST,
+A_AESIMC,
+A_AESKEYGENASSIST,
+A_STOSQ,
+A_LODSQ,
+A_CMPSQ,
+A_VADDPD,
+A_VADDPS,
+A_VADDSD,
+A_VADDSS,
+A_VADDSUBPD,
+A_VADDSUBPS,
+A_VAESDEC,
+A_VAESDECLAST,
+A_VAESENC,
+A_VAESENCLAST,
+A_VAESIMC,
+A_VAESKEYGENASSIST,
+A_VANDNPD,
+A_VANDNPS,
+A_VANDPD,
+A_VANDPS,
+A_VBLENDPD,
+A_VBLENDPS,
+A_VBLENDVPD,
+A_VBLENDVPS,
+A_VBROADCASTF128,
+A_VBROADCASTSD,
+A_VBROADCASTSS,
+A_VCMPPD,
+A_VCMPPS,
+A_VCMPSD,
+A_VCMPSS,
+A_VCOMISD,
+A_VCOMISS,
+A_VCVTDQ2PD,
+A_VCVTDQ2PS,
+A_VCVTPD2DQ,
+A_VCVTPD2PS,
+A_VCVTPS2DQ,
+A_VCVTPS2PD,
+A_VCVTSD2SI,
+A_VCVTSD2SS,
+A_VCVTSI2SD,
+A_VCVTSI2SS,
+A_VCVTSS2SD,
+A_VCVTSS2SI,
+A_VCVTTPD2DQ,
+A_VCVTTPS2DQ,
+A_VCVTTSD2SI,
+A_VCVTTSS2SI,
+A_VDIVPD,
+A_VDIVPS,
+A_VDIVSD,
+A_VDIVSS,
+A_VDPPD,
+A_VDPPS,
+A_VEXTRACTF128,
+A_VEXTRACTPS,
+A_VHADDPD,
+A_VHADDPS,
+A_VHSUBPD,
+A_VHSUBPS,
+A_VINSERTF128,
+A_VINSERTPS,
+A_VLDDQU,
+A_VLDMXCSR,
+A_VMASKMOVDQU,
+A_VMASKMOVPD,
+A_VMASKMOVPS,
+A_VMAXPD,
+A_VMAXPS,
+A_VMAXSD,
+A_VMAXSS,
+A_VMINPD,
+A_VMINPS,
+A_VMINSD,
+A_VMINSS,
+A_VMOVAPD,
+A_VMOVAPS,
+A_VMOVD,
+A_VMOVDDUP,
+A_VMOVDQA,
+A_VMOVDQU,
+A_VMOVHLPS,
+A_VMOVHPD,
+A_VMOVHPS,
+A_VMOVLHPS,
+A_VMOVLPD,
+A_VMOVLPS,
+A_VMOVMSKPD,
+A_VMOVMSKPS,
+A_VMOVNTDQ,
+A_VMOVNTDQA,
+A_VMOVNTPD,
+A_VMOVNTPS,
+A_VMOVQ,
+A_VMOVSD,
+A_VMOVSHDUP,
+A_VMOVSLDUP,
+A_VMOVSS,
+A_VMOVUPD,
+A_VMOVUPS,
+A_VMPSADBW,
+A_VMULPD,
+A_VMULPS,
+A_VMULSD,
+A_VMULSS,
+A_VORPD,
+A_VORPS,
+A_VPABSB,
+A_VPABSD,
+A_VPABSW,
+A_VPACKSSDW,
+A_VPACKSSWB,
+A_VPACKUSDW,
+A_VPACKUSWB,
+A_VPADDB,
+A_VPADDD,
+A_VPADDQ,
+A_VPADDSB,
+A_VPADDSW,
+A_VPADDUSB,
+A_VPADDUSW,
+A_VPADDW,
+A_VPALIGNR,
+A_VPAND,
+A_VPANDN,
+A_VPAVGB,
+A_VPAVGW,
+A_VPBLENDVB,
+A_VPBLENDW,
+A_VPCLMULQDQ,
+A_VPCMPEQB,
+A_VPCMPEQD,
+A_VPCMPEQQ,
+A_VPCMPEQW,
+A_VPCMPESTRI,
+A_VPCMPESTRM,
+A_VPCMPGTB,
+A_VPCMPGTD,
+A_VPCMPGTQ,
+A_VPCMPGTW,
+A_VPCMPISTRI,
+A_VPCMPISTRM,
+A_VPERM2F128,
+A_VPERMILPD,
+A_VPERMILPS,
+A_VPEXTRB,
+A_VPEXTRD,
+A_VPEXTRQ,
+A_VPEXTRW,
+A_VPHADDD,
+A_VPHADDSW,
+A_VPHADDW,
+A_VPHMINPOSUW,
+A_VPHSUBD,
+A_VPHSUBSW,
+A_VPHSUBW,
+A_VPINSRB,
+A_VPINSRD,
+A_VPINSRQ,
+A_VPINSRW,
+A_VPMADDUBSW,
+A_VPMADDWD,
+A_VPMAXSB,
+A_VPMAXSD,
+A_VPMAXSW,
+A_VPMAXUB,
+A_VPMAXUD,
+A_VPMAXUW,
+A_VPMINSB,
+A_VPMINSD,
+A_VPMINSW,
+A_VPMINUB,
+A_VPMINUD,
+A_VPMINUW,
+A_VPMOVMSKB,
+A_VPMOVSXBD,
+A_VPMOVSXBQ,
+A_VPMOVSXBW,
+A_VPMOVSXDQ,
+A_VPMOVSXWD,
+A_VPMOVSXWQ,
+A_VPMOVZXBD,
+A_VPMOVZXBQ,
+A_VPMOVZXBW,
+A_VPMOVZXDQ,
+A_VPMOVZXWD,
+A_VPMOVZXWQ,
+A_VPMULDQ,
+A_VPMULHRSW,
+A_VPMULHUW,
+A_VPMULHW,
+A_VPMULLD,
+A_VPMULLW,
+A_VPMULUDQ,
+A_VPOR,
+A_VPSADBW,
+A_VPSHUFB,
+A_VPSHUFD,
+A_VPSHUFHW,
+A_VPSHUFLW,
+A_VPSIGNB,
+A_VPSIGND,
+A_VPSIGNW,
+A_VPSLLD,
+A_VPSLLDQ,
+A_VPSLLQ,
+A_VPSLLW,
+A_VPSRAD,
+A_VPSRAW,
+A_VPSRLD,
+A_VPSRLDQ,
+A_VPSRLQ,
+A_VPSRLW,
+A_VPSUBB,
+A_VPSUBD,
+A_VPSUBQ,
+A_VPSUBSB,
+A_VPSUBSW,
+A_VPSUBUSB,
+A_VPSUBUSW,
+A_VPSUBW,
+A_VPTEST,
+A_VPUNPCKHBW,
+A_VPUNPCKHDQ,
+A_VPUNPCKHQDQ,
+A_VPUNPCKHWD,
+A_VPUNPCKLBW,
+A_VPUNPCKLDQ,
+A_VPUNPCKLQDQ,
+A_VPUNPCKLWD,
+A_VPXOR,
+A_VRCPPS,
+A_VRCPSS,
+A_VROUNDPD,
+A_VROUNDPS,
+A_VROUNDSD,
+A_VROUNDSS,
+A_VRSQRTPS,
+A_VRSQRTSS,
+A_VSHUFPD,
+A_VSHUFPS,
+A_VSQRTPD,
+A_VSQRTPS,
+A_VSQRTSD,
+A_VSQRTSS,
+A_VSTMXCSR,
+A_VSUBPD,
+A_VSUBPS,
+A_VSUBSD,
+A_VSUBSS,
+A_VTESTPD,
+A_VTESTPS,
+A_VUCOMISD,
+A_VUCOMISS,
+A_VUNPCKHPD,
+A_VUNPCKHPS,
+A_VUNPCKLPD,
+A_VUNPCKLPS,
+A_VXORPD,
+A_VXORPS,
+A_VZEROALL,
+A_VZEROUPPER
+);
diff --git a/compiler/i8086/i8086prop.inc b/compiler/i8086/i8086prop.inc
new file mode 100644
index 0000000000..e57a923f65
--- /dev/null
+++ b/compiler/i8086/i8086prop.inc
@@ -0,0 +1,947 @@
+{ don't edit, this file is generated from x86ins.dat }
+(
+(Ch: (Ch_None, Ch_None, Ch_None)),
+(Ch: (Ch_MEAX, Ch_WFlags, Ch_None)),
+(Ch: (Ch_MEAX, Ch_WFlags, Ch_None)),
+(Ch: (Ch_MEAX, Ch_WFlags, Ch_None)),
+(Ch: (Ch_MEAX, Ch_WFlags, Ch_None)),
+(Ch: (Ch_Mop2, Ch_Rop1, Ch_RWFlags)),
+(Ch: (Ch_Mop2, Ch_Rop1, Ch_WFlags)),
+(Ch: (Ch_Mop2, Ch_Rop1, Ch_WFlags)),
+(Ch: (Ch_WFlags, Ch_None, Ch_None)),
+(Ch: (Ch_Rop1, Ch_None, Ch_None)),
+(Ch: (Ch_Wop2, Ch_WFlags, Ch_Rop1)),
+(Ch: (Ch_Wop2, Ch_WFlags, Ch_Rop1)),
+(Ch: (Ch_MOp1, Ch_None, Ch_None)),
+(Ch: (Ch_WFlags, Ch_Rop1, Ch_Rop2)),
+(Ch: (Ch_Mop2, Ch_Rop1, Ch_WFlags)),
+(Ch: (Ch_Mop2, Ch_Rop1, Ch_WFlags)),
+(Ch: (Ch_Mop2, Ch_Rop1, Ch_WFlags)),
+(Ch: (Ch_ROp1, Ch_All, Ch_None)),
+(Ch: (Ch_MEAX, Ch_None, Ch_None)),
+(Ch: (Ch_MEAX, Ch_WEDX, Ch_None)),
+(Ch: (Ch_WFlags, Ch_None, Ch_None)),
+(Ch: (Ch_CDirFlag, Ch_None, Ch_None)),
+(Ch: (Ch_WFlags, Ch_None, Ch_None)),
+(Ch: (Ch_None, Ch_None, Ch_None)),
+(Ch: (Ch_WFlags, Ch_None, Ch_None)),
+(Ch: (Ch_ROp1, Ch_ROp2, Ch_WFlags)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_none)),
+(Ch: (Ch_MEAX, Ch_WEDX, Ch_None)),
+(Ch: (Ch_MEAX, Ch_None, Ch_None)),
+(Ch: (Ch_MEAX, Ch_None, Ch_None)),
+(Ch: (Ch_MEAX, Ch_None, Ch_None)),
+(Ch: (Ch_Mop1, Ch_WFlags, Ch_None)),
+(Ch: (Ch_RWEAX, Ch_WEDX, Ch_WFlags)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_RWESP, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_ROp1, Ch_None)),
+(Ch: (Ch_FPU, Ch_ROp1, Ch_None)),
+(Ch: (Ch_Rop1, Ch_FPU, Ch_None)),
+(Ch: (Ch_Wop1, Ch_FPU, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_RFLAGS, Ch_None)),
+(Ch: (Ch_FPU, Ch_RFLAGS, Ch_None)),
+(Ch: (Ch_FPU, Ch_RFLAGS, Ch_None)),
+(Ch: (Ch_FPU, Ch_RFLAGS, Ch_None)),
+(Ch: (Ch_FPU, Ch_RFLAGS, Ch_None)),
+(Ch: (Ch_FPU, Ch_RFLAGS, Ch_None)),
+(Ch: (Ch_FPU, Ch_RFLAGS, Ch_None)),
+(Ch: (Ch_FPU, Ch_RFLAGS, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_WFLAGS, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_WFLAGS, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_ROp1, Ch_None)),
+(Ch: (Ch_FPU, Ch_ROp1, Ch_None)),
+(Ch: (Ch_FPU, Ch_ROp1, Ch_None)),
+(Ch: (Ch_FPU, Ch_ROp1, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_ROp1, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_ROp1, Ch_None)),
+(Ch: (Ch_FPU, Ch_ROp1, Ch_None)),
+(Ch: (Ch_FPU, Ch_ROp1, Ch_None)),
+(Ch: (Ch_FPU, Ch_ROp1, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_Wop1, Ch_None, Ch_None)),
+(Ch: (Ch_Wop1, Ch_None, Ch_None)),
+(Ch: (Ch_Wop1, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_ROp1, Ch_None)),
+(Ch: (Ch_FPU, Ch_ROp1, Ch_None)),
+(Ch: (Ch_Rop1, Ch_FPU, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_ROp1, Ch_FPU, Ch_None)),
+(Ch: (Ch_ROp1, Ch_FPU, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_Wop1, Ch_None, Ch_None)),
+(Ch: (Ch_Wop1, Ch_None, Ch_None)),
+(Ch: (Ch_Wop1, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_Wop1, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_Wop1, Ch_None, Ch_None)),
+(Ch: (Ch_Wop1, Ch_None, Ch_None)),
+(Ch: (Ch_Wop1, Ch_None, Ch_None)),
+(Ch: (Ch_Wop1, Ch_FPU, Ch_None)),
+(Ch: (Ch_Wop1, Ch_None, Ch_None)),
+(Ch: (Ch_ROp1, Ch_FPU, Ch_None)),
+(Ch: (Ch_ROp1, Ch_FPU, Ch_None)),
+(Ch: (Ch_ROp1, Ch_FPU, Ch_None)),
+(Ch: (Ch_ROp1, Ch_FPU, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_None, Ch_None, Ch_None)),
+(Ch: (Ch_WFLAGS, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_WFLAGS, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_FPU, Ch_None, Ch_None)),
+(Ch: (Ch_None, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_RWEAX, Ch_WEDX, Ch_WFlags)),
+(Ch: (Ch_RWEAX, Ch_WEDX, Ch_WFlags)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Mop1, Ch_WFlags, Ch_None)),
+(Ch: (Ch_WMemEDI, Ch_RWEDI, Ch_REDX)),
+(Ch: (Ch_WMemEDI, Ch_RWEDI, Ch_REDX)),
+(Ch: (Ch_WMemEDI, Ch_RWEDI, Ch_REDX)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_None, Ch_None, Ch_None)),
+(Ch: (Ch_None, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_RECX, Ch_None, Ch_None)),
+(Ch: (Ch_RECX, Ch_None, Ch_None)),
+(Ch: (Ch_RECX, Ch_None, Ch_None)),
+(Ch: (Ch_ROp1, Ch_None, Ch_None)),
+(Ch: (Ch_WEAX, Ch_RFlags, Ch_None)),
+(Ch: (Ch_Wop2, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_RWESP, Ch_WEBP, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_None, Ch_None, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_None, Ch_None, Ch_None)),
+(Ch: (Ch_ROp1, Ch_None, Ch_None)),
+(Ch: (Ch_None, Ch_None, Ch_None)),
+(Ch: (Ch_None, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_None, Ch_None, Ch_None)),
+(Ch: (Ch_WEAX, Ch_RWESI, Ch_None)),
+(Ch: (Ch_WEAX, Ch_RWESI, Ch_None)),
+(Ch: (Ch_WEAX, Ch_RWESI, Ch_None)),
+(Ch: (Ch_RWECX, Ch_None, Ch_None)),
+(Ch: (Ch_RWECX, Ch_RFlags, Ch_None)),
+(Ch: (Ch_RWECX, Ch_RFlags, Ch_None)),
+(Ch: (Ch_RWECX, Ch_RFlags, Ch_None)),
+(Ch: (Ch_RWECX, Ch_RFlags, Ch_None)),
+(Ch: (Ch_Wop2, Ch_WFlags, Ch_None)),
+(Ch: (Ch_Wop2, Ch_ROP1, Ch_None)),
+(Ch: (Ch_None, Ch_None, Ch_None)),
+(Ch: (Ch_None, Ch_None, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Rop1, Ch_Wop2, Ch_None)),
+(Ch: (Ch_Rop1, Ch_Wop2, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Wop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_RWEAX, Ch_WEDX, Ch_WFlags)),
+(Ch: (Ch_None, Ch_None, Ch_None)),
+(Ch: (Ch_Mop1, Ch_None, Ch_None)),
+(Ch: (Ch_None, Ch_None, Ch_None)),
+(Ch: (Ch_Mop1, Ch_WFlags, Ch_None)),
+(Ch: (Ch_Mop2, Ch_Rop1, Ch_WFlags)),
+(Ch: (Ch_Rop1, Ch_Rop2, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_Mop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Mop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Mop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Mop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_Mop2, Ch_Rop1, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
+(Ch: (Ch_All, Ch_None, Ch_None)),
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diff --git a/compiler/i8086/i8086tab.inc b/compiler/i8086/i8086tab.inc
new file mode 100644
index 0000000000..a170207709
--- /dev/null
+++ b/compiler/i8086/i8086tab.inc
@@ -0,0 +1,11567 @@
+{ don't edit, this file is generated from x86ins.dat }
+(
+ (
+ opcode : A_NONE;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #0;
+ flags : if_none
+ ),
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+ optypes : (ot_none,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_nox86_64
+ ),
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+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#213#10;
+ flags : if_8086 or if_nox86_64
+ ),
+ (
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+ optypes : (ot_immediate,ot_none,ot_none,ot_none);
+ code : #1#213#20;
+ flags : if_8086 or if_sb or if_nox86_64
+ ),
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+ optypes : (ot_none,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_nox86_64
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+ flags : if_8086 or if_sm
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+ code : #1#16#65;
+ flags : if_8086
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+ flags : if_8086
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+ flags : if_386 or if_sm
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+ flags : if_8086 or if_sw
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+ (
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+ (
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+ (
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+ code : #1#99#65;
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+ ),
+ (
+ opcode : A_ARPL;
+ ops : 2;
+ optypes : (ot_memory,ot_reg16,ot_none,ot_none);
+ code : #1#99#65;
+ flags : if_286 or if_prot or if_sm or if_nox86_64
+ ),
+ (
+ opcode : A_BOUND;
+ ops : 2;
+ optypes : (ot_reg16 or ot_bits32,ot_memory,ot_none,ot_none);
+ code : #208#1#98#72;
+ flags : if_186 or if_nox86_64
+ ),
+ (
+ opcode : A_BSF;
+ ops : 2;
+ optypes : (ot_reg16 or ot_bits32 or ot_bits64,ot_rm_gpr,ot_none,ot_none);
+ code : #208#2#15#188#72;
+ flags : if_386 or if_sm
+ ),
+ (
+ opcode : A_BSR;
+ ops : 2;
+ optypes : (ot_reg16 or ot_bits32 or ot_bits64,ot_rm_gpr,ot_none,ot_none);
+ code : #208#2#15#189#72;
+ flags : if_386 or if_sm
+ ),
+ (
+ opcode : A_BSWAP;
+ ops : 1;
+ optypes : (ot_reg32 or ot_bits64,ot_none,ot_none,ot_none);
+ code : #208#1#15#8#200;
+ flags : if_486
+ ),
+ (
+ opcode : A_BT;
+ ops : 2;
+ optypes : (ot_rm_gpr,ot_reg16 or ot_bits32 or ot_bits64,ot_none,ot_none);
+ code : #208#2#15#163#65;
+ flags : if_386 or if_sm
+ ),
+ (
+ opcode : A_BT;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_immediate,ot_none,ot_none);
+ code : #208#2#15#186#132#21;
+ flags : if_386 or if_sb
+ ),
+ (
+ opcode : A_BTC;
+ ops : 2;
+ optypes : (ot_rm_gpr,ot_reg16 or ot_bits32 or ot_bits64,ot_none,ot_none);
+ code : #208#2#15#187#65;
+ flags : if_386 or if_sm
+ ),
+ (
+ opcode : A_BTC;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_immediate,ot_none,ot_none);
+ code : #208#2#15#186#135#21;
+ flags : if_386 or if_sb
+ ),
+ (
+ opcode : A_BTR;
+ ops : 2;
+ optypes : (ot_rm_gpr,ot_reg16 or ot_bits32 or ot_bits64,ot_none,ot_none);
+ code : #208#2#15#179#65;
+ flags : if_386 or if_sm
+ ),
+ (
+ opcode : A_BTR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_immediate,ot_none,ot_none);
+ code : #208#2#15#186#134#21;
+ flags : if_386 or if_sb
+ ),
+ (
+ opcode : A_BTS;
+ ops : 2;
+ optypes : (ot_rm_gpr,ot_reg16 or ot_bits32 or ot_bits64,ot_none,ot_none);
+ code : #208#2#15#171#65;
+ flags : if_386 or if_sm
+ ),
+ (
+ opcode : A_BTS;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_immediate,ot_none,ot_none);
+ code : #208#2#15#186#133#21;
+ flags : if_386 or if_sb
+ ),
+ (
+ opcode : A_CALL;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits32,ot_none,ot_none,ot_none);
+ code : #213#1#255#130;
+ flags : if_386 or if_nox86_64
+ ),
+ (
+ opcode : A_CALL;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits16,ot_none,ot_none,ot_none);
+ code : #212#1#255#130;
+ flags : if_8086
+ ),
+ (
+ opcode : A_CALL;
+ ops : 1;
+ optypes : (ot_immediate,ot_none,ot_none,ot_none);
+ code : #208#1#232#52;
+ flags : if_8086
+ ),
+ (
+ opcode : A_CALL;
+ ops : 1;
+ optypes : (ot_immediate or ot_near,ot_none,ot_none,ot_none);
+ code : #208#1#232#52;
+ flags : if_8086
+ ),
+ (
+ opcode : A_CALL;
+ ops : 1;
+ optypes : (ot_immediate or ot_far,ot_none,ot_none,ot_none);
+ code : #208#1#154#28#31;
+ flags : if_8086 or if_nox86_64
+ ),
+ (
+ opcode : A_CALL;
+ ops : 1;
+ optypes : (ot_memory or ot_near,ot_none,ot_none,ot_none);
+ code : #208#1#255#130;
+ flags : if_8086
+ ),
+ (
+ opcode : A_CALL;
+ ops : 1;
+ optypes : (ot_memory or ot_far,ot_none,ot_none,ot_none);
+ code : #208#1#255#131;
+ flags : if_8086
+ ),
+ (
+ opcode : A_CALL;
+ ops : 2;
+ optypes : (ot_immediate,ot_immediate,ot_none,ot_none);
+ code : #215#1#154#29#24;
+ flags : if_8086 or if_nox86_64
+ ),
+ (
+ opcode : A_CALL;
+ ops : 2;
+ optypes : (ot_immediate or ot_bits16,ot_immediate,ot_none,ot_none);
+ code : #212#1#154#25#24;
+ flags : if_8086 or if_nox86_64
+ ),
+ (
+ opcode : A_CALL;
+ ops : 2;
+ optypes : (ot_immediate,ot_immediate or ot_bits16,ot_none,ot_none);
+ code : #212#1#154#25#24;
+ flags : if_8086 or if_nox86_64
+ ),
+ (
+ opcode : A_CALL;
+ ops : 2;
+ optypes : (ot_immediate or ot_bits32,ot_immediate,ot_none,ot_none);
+ code : #213#1#154#33#24;
+ flags : if_386 or if_nox86_64
+ ),
+ (
+ opcode : A_CALL;
+ ops : 2;
+ optypes : (ot_immediate,ot_immediate or ot_bits32,ot_none,ot_none);
+ code : #213#1#154#33#24;
+ flags : if_386 or if_nox86_64
+ ),
+ (
+ opcode : A_CBW;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #212#1#152;
+ flags : if_8086
+ ),
+ (
+ opcode : A_CDQ;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #213#1#153;
+ flags : if_386
+ ),
+ (
+ opcode : A_CLC;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#248;
+ flags : if_8086
+ ),
+ (
+ opcode : A_CLD;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#252;
+ flags : if_8086
+ ),
+ (
+ opcode : A_CLI;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#250;
+ flags : if_8086
+ ),
+ (
+ opcode : A_CLTS;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#15#6;
+ flags : if_286 or if_priv
+ ),
+ (
+ opcode : A_CMC;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#245;
+ flags : if_8086
+ ),
+ (
+ opcode : A_CMP;
+ ops : 2;
+ optypes : (ot_rm_gpr,ot_reg16 or ot_bits32 or ot_bits64,ot_none,ot_none);
+ code : #208#1#57#65;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_CMP;
+ ops : 2;
+ optypes : (ot_reg16 or ot_bits32 or ot_bits64,ot_rm_gpr,ot_none,ot_none);
+ code : #208#1#59#72;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_CMP;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_reg8,ot_none,ot_none);
+ code : #1#56#65;
+ flags : if_8086
+ ),
+ (
+ opcode : A_CMP;
+ ops : 2;
+ optypes : (ot_reg8,ot_rm_gpr or ot_bits8,ot_none,ot_none);
+ code : #1#58#72;
+ flags : if_8086
+ ),
+ (
+ opcode : A_CMP;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_immediate or ot_bits8 or ot_signed,ot_none,ot_none);
+ code : #208#1#131#135#13;
+ flags : if_8086
+ ),
+ (
+ opcode : A_CMP;
+ ops : 2;
+ optypes : (ot_reg_eax,ot_immediate,ot_none,ot_none);
+ code : #213#1#61#33;
+ flags : if_386 or if_sm
+ ),
+ (
+ opcode : A_CMP;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits32,ot_immediate,ot_none,ot_none);
+ code : #213#1#129#135#33;
+ flags : if_386 or if_sm
+ ),
+ (
+ opcode : A_CMP;
+ ops : 2;
+ optypes : (ot_reg_ax,ot_immediate,ot_none,ot_none);
+ code : #212#1#61#25;
+ flags : if_8086 or if_sw
+ ),
+ (
+ opcode : A_CMP;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16,ot_immediate,ot_none,ot_none);
+ code : #212#1#129#135#25;
+ flags : if_8086 or if_sw
+ ),
+ (
+ opcode : A_CMP;
+ ops : 2;
+ optypes : (ot_reg_al,ot_immediate,ot_none,ot_none);
+ code : #1#60#17;
+ flags : if_8086 or if_sb
+ ),
+ (
+ opcode : A_CMP;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
+ code : #1#128#135#17;
+ flags : if_8086 or if_sb
+ ),
+ (
+ opcode : A_CMP;
+ ops : 2;
+ optypes : (ot_memory,ot_immediate or ot_bits32,ot_none,ot_none);
+ code : #213#1#129#135#33;
+ flags : if_386 or if_sd
+ ),
+ (
+ opcode : A_CMP;
+ ops : 2;
+ optypes : (ot_memory,ot_immediate or ot_bits16,ot_none,ot_none);
+ code : #212#1#129#135#25;
+ flags : if_8086 or if_sw
+ ),
+ (
+ opcode : A_CMP;
+ ops : 2;
+ optypes : (ot_memory,ot_immediate or ot_bits8,ot_none,ot_none);
+ code : #1#128#135#17;
+ flags : if_8086 or if_sb
+ ),
+ (
+ opcode : A_CMPSB;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #218#1#166;
+ flags : if_8086
+ ),
+ (
+ opcode : A_CMPSD;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #218#213#1#167;
+ flags : if_386
+ ),
+ (
+ opcode : A_CMPSD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate,ot_none);
+ code : #220#2#15#194#72#22;
+ flags : if_willamette or if_sse2 or if_sm2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_CMPSW;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #218#212#1#167;
+ flags : if_8086
+ ),
+ (
+ opcode : A_CMPXCHG;
+ ops : 2;
+ optypes : (ot_rm_gpr,ot_reg16 or ot_bits32 or ot_bits64,ot_none,ot_none);
+ code : #208#2#15#177#65;
+ flags : if_pent or if_sm
+ ),
+ (
+ opcode : A_CMPXCHG;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_reg8,ot_none,ot_none);
+ code : #2#15#176#65;
+ flags : if_pent
+ ),
+ (
+ opcode : A_CMPXCHG486;
+ ops : 2;
+ optypes : (ot_rm_gpr,ot_reg16 or ot_bits32 or ot_bits64,ot_none,ot_none);
+ code : #208#2#15#167#65;
+ flags : if_486 or if_sm
+ ),
+ (
+ opcode : A_CMPXCHG486;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_reg8,ot_none,ot_none);
+ code : #2#15#166#65;
+ flags : if_486 or if_undoc
+ ),
+ (
+ opcode : A_CMPXCHG8B;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #2#15#199#129;
+ flags : if_pent
+ ),
+ (
+ opcode : A_CPUID;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#15#162;
+ flags : if_pent
+ ),
+ (
+ opcode : A_CWD;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #212#1#153;
+ flags : if_8086
+ ),
+ (
+ opcode : A_CWDE;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #213#1#152;
+ flags : if_386
+ ),
+ (
+ opcode : A_DAA;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#39;
+ flags : if_8086 or if_nox86_64
+ ),
+ (
+ opcode : A_DAS;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#47;
+ flags : if_8086 or if_nox86_64
+ ),
+ (
+ opcode : A_DEC;
+ ops : 1;
+ optypes : (ot_reg16 or ot_bits32,ot_none,ot_none,ot_none);
+ code : #208#8#72;
+ flags : if_8086 or if_nox86_64
+ ),
+ (
+ opcode : A_DEC;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_none,ot_none,ot_none);
+ code : #208#1#255#129;
+ flags : if_8086
+ ),
+ (
+ opcode : A_DEC;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits8,ot_none,ot_none,ot_none);
+ code : #1#254#129;
+ flags : if_8086
+ ),
+ (
+ opcode : A_DIV;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_none,ot_none,ot_none);
+ code : #208#1#247#134;
+ flags : if_8086
+ ),
+ (
+ opcode : A_DIV;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits8,ot_none,ot_none,ot_none);
+ code : #1#246#134;
+ flags : if_8086
+ ),
+ (
+ opcode : A_EMMS;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#15#119;
+ flags : if_pent or if_mmx
+ ),
+ (
+ opcode : A_ENTER;
+ ops : 2;
+ optypes : (ot_immediate,ot_immediate,ot_none,ot_none);
+ code : #1#200#24#21;
+ flags : if_186
+ ),
+ (
+ opcode : A_F2XM1;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#217#240;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FABS;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#217#225;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FADD;
+ ops : 1;
+ optypes : (ot_memory or ot_bits32,ot_none,ot_none,ot_none);
+ code : #1#216#128;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FADD;
+ ops : 1;
+ optypes : (ot_memory or ot_bits64,ot_none,ot_none,ot_none);
+ code : #1#220#128;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FADD;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#222#193;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FADD;
+ ops : 1;
+ optypes : (ot_fpureg or ot_to,ot_none,ot_none,ot_none);
+ code : #1#220#8#192;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FADD;
+ ops : 2;
+ optypes : (ot_fpureg,ot_fpu0,ot_none,ot_none);
+ code : #1#220#8#192;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FADD;
+ ops : 1;
+ optypes : (ot_fpureg,ot_none,ot_none,ot_none);
+ code : #1#216#8#192;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FADD;
+ ops : 2;
+ optypes : (ot_fpu0,ot_fpureg,ot_none,ot_none);
+ code : #1#216#9#192;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FADDP;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#222#193;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FADDP;
+ ops : 1;
+ optypes : (ot_fpureg,ot_none,ot_none,ot_none);
+ code : #1#222#8#192;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FADDP;
+ ops : 2;
+ optypes : (ot_fpureg,ot_fpu0,ot_none,ot_none);
+ code : #1#222#8#192;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FBLD;
+ ops : 1;
+ optypes : (ot_memory or ot_bits80,ot_none,ot_none,ot_none);
+ code : #1#223#132;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FBLD;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #1#223#132;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FBSTP;
+ ops : 1;
+ optypes : (ot_memory or ot_bits80,ot_none,ot_none,ot_none);
+ code : #1#223#134;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FBSTP;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #1#223#134;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FCHS;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#217#224;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FCLEX;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #3#155#219#226;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FCMOVB;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#218#193;
+ flags : if_p6 or if_fpu
+ ),
+ (
+ opcode : A_FCMOVB;
+ ops : 1;
+ optypes : (ot_fpureg,ot_none,ot_none,ot_none);
+ code : #1#218#8#192;
+ flags : if_p6 or if_fpu
+ ),
+ (
+ opcode : A_FCMOVB;
+ ops : 2;
+ optypes : (ot_fpu0,ot_fpureg,ot_none,ot_none);
+ code : #1#218#9#192;
+ flags : if_p6 or if_fpu
+ ),
+ (
+ opcode : A_FCMOVBE;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#218#209;
+ flags : if_p6 or if_fpu
+ ),
+ (
+ opcode : A_FCMOVBE;
+ ops : 1;
+ optypes : (ot_fpureg,ot_none,ot_none,ot_none);
+ code : #1#218#8#208;
+ flags : if_p6 or if_fpu
+ ),
+ (
+ opcode : A_FCMOVBE;
+ ops : 2;
+ optypes : (ot_fpu0,ot_fpureg,ot_none,ot_none);
+ code : #1#218#9#208;
+ flags : if_p6 or if_fpu
+ ),
+ (
+ opcode : A_FCMOVE;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#218#201;
+ flags : if_p6 or if_fpu
+ ),
+ (
+ opcode : A_FCMOVE;
+ ops : 1;
+ optypes : (ot_fpureg,ot_none,ot_none,ot_none);
+ code : #1#218#8#200;
+ flags : if_p6 or if_fpu
+ ),
+ (
+ opcode : A_FCMOVE;
+ ops : 2;
+ optypes : (ot_fpu0,ot_fpureg,ot_none,ot_none);
+ code : #1#218#9#200;
+ flags : if_p6 or if_fpu
+ ),
+ (
+ opcode : A_FCMOVNB;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#219#193;
+ flags : if_p6 or if_fpu
+ ),
+ (
+ opcode : A_FCMOVNB;
+ ops : 1;
+ optypes : (ot_fpureg,ot_none,ot_none,ot_none);
+ code : #1#219#8#192;
+ flags : if_p6 or if_fpu
+ ),
+ (
+ opcode : A_FCMOVNB;
+ ops : 2;
+ optypes : (ot_fpu0,ot_fpureg,ot_none,ot_none);
+ code : #1#219#9#192;
+ flags : if_p6 or if_fpu
+ ),
+ (
+ opcode : A_FCMOVNBE;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#219#209;
+ flags : if_p6 or if_fpu
+ ),
+ (
+ opcode : A_FCMOVNBE;
+ ops : 1;
+ optypes : (ot_fpureg,ot_none,ot_none,ot_none);
+ code : #1#219#8#208;
+ flags : if_p6 or if_fpu
+ ),
+ (
+ opcode : A_FCMOVNBE;
+ ops : 2;
+ optypes : (ot_fpu0,ot_fpureg,ot_none,ot_none);
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+ optypes : (ot_none,ot_none,ot_none,ot_none);
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+ flags : if_p6 or if_fpu
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+ optypes : (ot_fpureg,ot_none,ot_none,ot_none);
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+ flags : if_p6 or if_fpu
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+ flags : if_p6 or if_fpu
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+ optypes : (ot_none,ot_none,ot_none,ot_none);
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+ flags : if_p6 or if_fpu
+ ),
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+ flags : if_p6 or if_fpu
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+ flags : if_p6 or if_fpu
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+ flags : if_p6 or if_fpu
+ ),
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+ flags : if_p6 or if_fpu
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+ flags : if_p6 or if_fpu
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+ flags : if_8086 or if_fpu
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+ flags : if_8086 or if_fpu
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+ flags : if_8086 or if_fpu
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+ flags : if_8086 or if_fpu
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+ flags : if_8086 or if_fpu
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+ flags : if_8086 or if_fpu
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+ flags : if_8086 or if_fpu
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+ flags : if_8086 or if_fpu
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+ flags : if_386 or if_fpu
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+ optypes : (ot_none,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ optypes : (ot_none,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ flags : if_8086 or if_fpu
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+ optypes : (ot_memory or ot_bits64,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ optypes : (ot_none,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ flags : if_8086 or if_fpu
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+ flags : if_8086 or if_fpu
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+ flags : if_8086 or if_fpu
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+ flags : if_8086 or if_fpu
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+ flags : if_8086 or if_fpu
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+ flags : if_8086 or if_fpu
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+ optypes : (ot_memory or ot_bits32,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ flags : if_8086 or if_fpu
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+ flags : if_8086 or if_fpu
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+ flags : if_8086 or if_fpu
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+ optypes : (ot_fpureg,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ flags : if_8086 or if_fpu
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+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ optypes : (ot_fpureg,ot_none,ot_none,ot_none);
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+ optypes : (ot_fpureg,ot_fpu0,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ opcode : A_FEMMS;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
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+ flags : if_pent or if_3dnow
+ ),
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+ opcode : A_FENI;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ opcode : A_FFREE;
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+ optypes : (ot_fpureg,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ opcode : A_FIADD;
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+ optypes : (ot_memory or ot_bits16,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ ops : 1;
+ optypes : (ot_memory or ot_bits32,ot_none,ot_none,ot_none);
+ code : #1#218#128;
+ flags : if_8086 or if_fpu
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+ ops : 1;
+ optypes : (ot_memory or ot_bits16,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ optypes : (ot_memory or ot_bits32,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ optypes : (ot_memory or ot_bits16,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ flags : if_8086 or if_fpu
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+ optypes : (ot_memory or ot_bits32,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ optypes : (ot_memory or ot_bits16,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ optypes : (ot_memory or ot_bits32,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ flags : if_8086 or if_fpu
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+ ops : 1;
+ optypes : (ot_memory or ot_bits64,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ optypes : (ot_memory or ot_bits16,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ optypes : (ot_memory or ot_bits32,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
+ ),
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+ opcode : A_FINIT;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ optypes : (ot_memory or ot_bits32,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ optypes : (ot_memory or ot_bits16,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ optypes : (ot_memory or ot_bits32,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ flags : if_8086 or if_fpu
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+ optypes : (ot_memory or ot_bits32,ot_none,ot_none,ot_none);
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+ flags : if_prescott or if_fpu
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+ flags : if_8086 or if_fpu
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+ optypes : (ot_memory or ot_bits32,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ optypes : (ot_memory or ot_bits16,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ ops : 1;
+ optypes : (ot_memory or ot_bits32,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ optypes : (ot_memory or ot_bits32,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ optypes : (ot_memory or ot_bits64,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
+ ),
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+ optypes : (ot_memory or ot_bits80,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ opcode : A_FLD;
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+ optypes : (ot_fpureg,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ (
+ opcode : A_FLD1;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
+ ),
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+ opcode : A_FLDCW;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu or if_sw
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+ opcode : A_FLDENV;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
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+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#217#234;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FLDL2T;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#217#233;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FLDLG2;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#217#236;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FLDLN2;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#217#237;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FLDPI;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#217#235;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FLDZ;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#217#238;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FMUL;
+ ops : 1;
+ optypes : (ot_memory or ot_bits32,ot_none,ot_none,ot_none);
+ code : #1#216#129;
+ flags : if_8086 or if_fpu
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+ ops : 1;
+ optypes : (ot_memory or ot_bits64,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FMUL;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FMUL;
+ ops : 1;
+ optypes : (ot_fpureg or ot_to,ot_none,ot_none,ot_none);
+ code : #1#220#8#200;
+ flags : if_8086 or if_fpu
+ ),
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+ ops : 2;
+ optypes : (ot_fpureg,ot_fpu0,ot_none,ot_none);
+ code : #1#220#8#200;
+ flags : if_8086 or if_fpu
+ ),
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+ ops : 1;
+ optypes : (ot_fpureg,ot_none,ot_none,ot_none);
+ code : #1#216#8#200;
+ flags : if_8086 or if_fpu
+ ),
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+ ops : 2;
+ optypes : (ot_fpu0,ot_fpureg,ot_none,ot_none);
+ code : #1#216#9#200;
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+ ),
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+ opcode : A_FMULP;
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+ optypes : (ot_none,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
+ ),
+ (
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+ optypes : (ot_fpureg,ot_none,ot_none,ot_none);
+ code : #1#222#8#200;
+ flags : if_8086 or if_fpu
+ ),
+ (
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+ optypes : (ot_fpureg,ot_fpu0,ot_none,ot_none);
+ code : #1#222#8#200;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FNCLEX;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#219#226;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FNDISI;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#219#225;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FNENI;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#219#224;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FNINIT;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#219#227;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FNOP;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#217#208;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FNSAVE;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #1#221#134;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FNSTCW;
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+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #1#217#135;
+ flags : if_8086 or if_fpu or if_sw
+ ),
+ (
+ opcode : A_FNSTENV;
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+ optypes : (ot_memory,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
+ ),
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+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #1#221#135;
+ flags : if_8086 or if_fpu or if_sw
+ ),
+ (
+ opcode : A_FNSTSW;
+ ops : 1;
+ optypes : (ot_reg_ax,ot_none,ot_none,ot_none);
+ code : #2#223#224;
+ flags : if_286 or if_fpu
+ ),
+ (
+ opcode : A_FPATAN;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FPREM;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FPREM1;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#217#245;
+ flags : if_386 or if_fpu
+ ),
+ (
+ opcode : A_FPTAN;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#217#242;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FRNDINT;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#217#252;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FRSTOR;
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+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #1#221#132;
+ flags : if_8086 or if_fpu
+ ),
+ (
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+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #2#155#221#134;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FSCALE;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FSETPM;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
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+ flags : if_286 or if_fpu
+ ),
+ (
+ opcode : A_FSIN;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#217#254;
+ flags : if_386 or if_fpu
+ ),
+ (
+ opcode : A_FSINCOS;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#217#251;
+ flags : if_386 or if_fpu
+ ),
+ (
+ opcode : A_FSQRT;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#217#250;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FST;
+ ops : 1;
+ optypes : (ot_memory or ot_bits32,ot_none,ot_none,ot_none);
+ code : #1#217#130;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FST;
+ ops : 1;
+ optypes : (ot_memory or ot_bits64,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FST;
+ ops : 1;
+ optypes : (ot_fpureg,ot_none,ot_none,ot_none);
+ code : #1#221#8#208;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FSTCW;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #2#155#217#135;
+ flags : if_8086 or if_fpu or if_sw
+ ),
+ (
+ opcode : A_FSTENV;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #2#155#217#134;
+ flags : if_8086 or if_fpu
+ ),
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+ opcode : A_FSTP;
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+ optypes : (ot_memory or ot_bits32,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FSTP;
+ ops : 1;
+ optypes : (ot_memory or ot_bits64,ot_none,ot_none,ot_none);
+ code : #1#221#131;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FSTP;
+ ops : 1;
+ optypes : (ot_memory or ot_bits80,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
+ ),
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+ opcode : A_FSTP;
+ ops : 1;
+ optypes : (ot_fpureg,ot_none,ot_none,ot_none);
+ code : #1#221#8#216;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FSTSW;
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+ optypes : (ot_memory,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu or if_sw
+ ),
+ (
+ opcode : A_FSTSW;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #3#155#223#224;
+ flags : if_286 or if_fpu
+ ),
+ (
+ opcode : A_FSTSW;
+ ops : 1;
+ optypes : (ot_reg_ax,ot_none,ot_none,ot_none);
+ code : #3#155#223#224;
+ flags : if_286 or if_fpu
+ ),
+ (
+ opcode : A_FSUB;
+ ops : 1;
+ optypes : (ot_memory or ot_bits32,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FSUB;
+ ops : 1;
+ optypes : (ot_memory or ot_bits64,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
+ ),
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+ opcode : A_FSUB;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
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+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FSUB;
+ ops : 1;
+ optypes : (ot_fpureg or ot_to,ot_none,ot_none,ot_none);
+ code : #1#220#8#224;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FSUB;
+ ops : 2;
+ optypes : (ot_fpureg,ot_fpu0,ot_none,ot_none);
+ code : #1#220#8#224;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FSUB;
+ ops : 1;
+ optypes : (ot_fpureg,ot_none,ot_none,ot_none);
+ code : #1#216#8#224;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FSUB;
+ ops : 2;
+ optypes : (ot_fpu0,ot_fpureg,ot_none,ot_none);
+ code : #1#216#9#224;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FSUBP;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#222#225;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FSUBP;
+ ops : 1;
+ optypes : (ot_fpureg,ot_none,ot_none,ot_none);
+ code : #1#222#8#224;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FSUBP;
+ ops : 2;
+ optypes : (ot_fpureg,ot_fpu0,ot_none,ot_none);
+ code : #1#222#8#224;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FSUBR;
+ ops : 1;
+ optypes : (ot_memory or ot_bits32,ot_none,ot_none,ot_none);
+ code : #1#216#133;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FSUBR;
+ ops : 1;
+ optypes : (ot_memory or ot_bits64,ot_none,ot_none,ot_none);
+ code : #1#220#133;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FSUBR;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#220#233;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FSUBR;
+ ops : 1;
+ optypes : (ot_fpureg or ot_to,ot_none,ot_none,ot_none);
+ code : #1#220#8#232;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FSUBR;
+ ops : 2;
+ optypes : (ot_fpureg,ot_fpu0,ot_none,ot_none);
+ code : #1#220#8#232;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FSUBR;
+ ops : 1;
+ optypes : (ot_fpureg,ot_none,ot_none,ot_none);
+ code : #1#216#8#232;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FSUBR;
+ ops : 2;
+ optypes : (ot_fpu0,ot_fpureg,ot_none,ot_none);
+ code : #1#216#9#232;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FSUBRP;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#222#233;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FSUBRP;
+ ops : 1;
+ optypes : (ot_fpureg,ot_none,ot_none,ot_none);
+ code : #1#222#8#232;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FSUBRP;
+ ops : 2;
+ optypes : (ot_fpureg,ot_fpu0,ot_none,ot_none);
+ code : #1#222#8#232;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FTST;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#217#228;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FUCOM;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#221#225;
+ flags : if_386 or if_fpu
+ ),
+ (
+ opcode : A_FUCOM;
+ ops : 1;
+ optypes : (ot_fpureg,ot_none,ot_none,ot_none);
+ code : #1#221#8#224;
+ flags : if_386 or if_fpu
+ ),
+ (
+ opcode : A_FUCOM;
+ ops : 2;
+ optypes : (ot_fpu0,ot_fpureg,ot_none,ot_none);
+ code : #1#221#9#224;
+ flags : if_386 or if_fpu
+ ),
+ (
+ opcode : A_FUCOMI;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#219#233;
+ flags : if_p6 or if_fpu
+ ),
+ (
+ opcode : A_FUCOMI;
+ ops : 1;
+ optypes : (ot_fpureg,ot_none,ot_none,ot_none);
+ code : #1#219#8#232;
+ flags : if_p6 or if_fpu
+ ),
+ (
+ opcode : A_FUCOMI;
+ ops : 2;
+ optypes : (ot_fpu0,ot_fpureg,ot_none,ot_none);
+ code : #1#219#9#232;
+ flags : if_p6 or if_fpu
+ ),
+ (
+ opcode : A_FUCOMIP;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#223#233;
+ flags : if_p6 or if_fpu
+ ),
+ (
+ opcode : A_FUCOMIP;
+ ops : 1;
+ optypes : (ot_fpureg,ot_none,ot_none,ot_none);
+ code : #1#223#8#232;
+ flags : if_p6 or if_fpu
+ ),
+ (
+ opcode : A_FUCOMIP;
+ ops : 2;
+ optypes : (ot_fpu0,ot_fpureg,ot_none,ot_none);
+ code : #1#223#9#232;
+ flags : if_p6 or if_fpu
+ ),
+ (
+ opcode : A_FUCOMP;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#221#233;
+ flags : if_386 or if_fpu
+ ),
+ (
+ opcode : A_FUCOMP;
+ ops : 1;
+ optypes : (ot_fpureg,ot_none,ot_none,ot_none);
+ code : #1#221#8#232;
+ flags : if_386 or if_fpu
+ ),
+ (
+ opcode : A_FUCOMP;
+ ops : 2;
+ optypes : (ot_fpu0,ot_fpureg,ot_none,ot_none);
+ code : #1#221#9#232;
+ flags : if_386 or if_fpu
+ ),
+ (
+ opcode : A_FUCOMPP;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#218#233;
+ flags : if_386 or if_fpu
+ ),
+ (
+ opcode : A_FWAIT;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#155;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FXAM;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#217#229;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FXCH;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#217#201;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FXCH;
+ ops : 1;
+ optypes : (ot_fpureg,ot_none,ot_none,ot_none);
+ code : #1#217#8#200;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FXCH;
+ ops : 2;
+ optypes : (ot_fpureg,ot_fpu0,ot_none,ot_none);
+ code : #1#217#8#200;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FXCH;
+ ops : 2;
+ optypes : (ot_fpu0,ot_fpureg,ot_none,ot_none);
+ code : #1#217#9#200;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FXTRACT;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#217#244;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FYL2X;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#217#241;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_FYL2XP1;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#217#249;
+ flags : if_8086 or if_fpu
+ ),
+ (
+ opcode : A_HLT;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#244;
+ flags : if_8086 or if_priv
+ ),
+ (
+ opcode : A_IBTS;
+ ops : 2;
+ optypes : (ot_rm_gpr,ot_reg16 or ot_bits32 or ot_bits64,ot_none,ot_none);
+ code : #208#2#15#167#65;
+ flags : if_386 or if_sm or if_undoc
+ ),
+ (
+ opcode : A_ICEBP;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#241;
+ flags : if_386
+ ),
+ (
+ opcode : A_IDIV;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_none,ot_none,ot_none);
+ code : #208#1#247#135;
+ flags : if_8086
+ ),
+ (
+ opcode : A_IDIV;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits8,ot_none,ot_none,ot_none);
+ code : #1#246#135;
+ flags : if_8086
+ ),
+ (
+ opcode : A_IMUL;
+ ops : 2;
+ optypes : (ot_reg16 or ot_bits32 or ot_bits64,ot_rm_gpr,ot_none,ot_none);
+ code : #208#2#15#175#72;
+ flags : if_386 or if_sm
+ ),
+ (
+ opcode : A_IMUL;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_none,ot_none,ot_none);
+ code : #208#1#247#133;
+ flags : if_8086
+ ),
+ (
+ opcode : A_IMUL;
+ ops : 3;
+ optypes : (ot_reg32 or ot_bits64,ot_rm_gpr,ot_immediate or ot_bits8 or ot_signed,ot_none);
+ code : #208#1#107#72#14;
+ flags : if_286 or if_sm
+ ),
+ (
+ opcode : A_IMUL;
+ ops : 3;
+ optypes : (ot_reg32 or ot_bits64,ot_rm_gpr,ot_immediate,ot_none);
+ code : #208#1#105#72#34;
+ flags : if_286 or if_sm or if_sd or if_ar2
+ ),
+ (
+ opcode : A_IMUL;
+ ops : 2;
+ optypes : (ot_reg32 or ot_bits64,ot_immediate or ot_bits8 or ot_signed,ot_none,ot_none);
+ code : #208#1#107#64#13;
+ flags : if_286
+ ),
+ (
+ opcode : A_IMUL;
+ ops : 2;
+ optypes : (ot_reg32,ot_immediate,ot_none,ot_none);
+ code : #213#1#105#64#33;
+ flags : if_286 or if_sd
+ ),
+ (
+ opcode : A_IMUL;
+ ops : 3;
+ optypes : (ot_reg16,ot_rm_gpr,ot_immediate or ot_bits8 or ot_signed,ot_none);
+ code : #212#1#107#72#14;
+ flags : if_286 or if_sm
+ ),
+ (
+ opcode : A_IMUL;
+ ops : 3;
+ optypes : (ot_reg16,ot_rm_gpr,ot_immediate,ot_none);
+ code : #212#1#105#72#26;
+ flags : if_286 or if_sm or if_sw or if_ar2
+ ),
+ (
+ opcode : A_IMUL;
+ ops : 2;
+ optypes : (ot_reg16,ot_immediate or ot_bits8 or ot_signed,ot_none,ot_none);
+ code : #212#1#107#64#13;
+ flags : if_286
+ ),
+ (
+ opcode : A_IMUL;
+ ops : 2;
+ optypes : (ot_reg16,ot_immediate,ot_none,ot_none);
+ code : #212#1#105#64#25;
+ flags : if_286 or if_sw
+ ),
+ (
+ opcode : A_IMUL;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits8,ot_none,ot_none,ot_none);
+ code : #1#246#133;
+ flags : if_8086
+ ),
+ (
+ opcode : A_IN;
+ ops : 2;
+ optypes : (ot_reg_al,ot_immediate,ot_none,ot_none);
+ code : #1#228#21;
+ flags : if_8086 or if_sb
+ ),
+ (
+ opcode : A_IN;
+ ops : 2;
+ optypes : (ot_reg_ax or ot_bits32,ot_immediate,ot_none,ot_none);
+ code : #208#1#229#21;
+ flags : if_8086 or if_sb
+ ),
+ (
+ opcode : A_IN;
+ ops : 2;
+ optypes : (ot_reg_al,ot_reg_dx,ot_none,ot_none);
+ code : #1#236;
+ flags : if_8086
+ ),
+ (
+ opcode : A_IN;
+ ops : 2;
+ optypes : (ot_reg_ax or ot_bits32,ot_reg_dx,ot_none,ot_none);
+ code : #208#1#237;
+ flags : if_8086
+ ),
+ (
+ opcode : A_INC;
+ ops : 1;
+ optypes : (ot_reg16 or ot_bits32,ot_none,ot_none,ot_none);
+ code : #208#8#64;
+ flags : if_8086 or if_nox86_64
+ ),
+ (
+ opcode : A_INC;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_none,ot_none,ot_none);
+ code : #208#1#255#128;
+ flags : if_8086
+ ),
+ (
+ opcode : A_INC;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits8,ot_none,ot_none,ot_none);
+ code : #1#254#128;
+ flags : if_8086
+ ),
+ (
+ opcode : A_INSB;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#108;
+ flags : if_186
+ ),
+ (
+ opcode : A_INSD;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #213#1#109;
+ flags : if_386
+ ),
+ (
+ opcode : A_INSW;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #212#1#109;
+ flags : if_186
+ ),
+ (
+ opcode : A_INT;
+ ops : 1;
+ optypes : (ot_immediate,ot_none,ot_none,ot_none);
+ code : #1#205#20;
+ flags : if_8086 or if_sb
+ ),
+ (
+ opcode : A_INT01;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#241;
+ flags : if_386
+ ),
+ (
+ opcode : A_INT1;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#241;
+ flags : if_386
+ ),
+ (
+ opcode : A_INT03;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#204;
+ flags : if_8086
+ ),
+ (
+ opcode : A_INT3;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#204;
+ flags : if_8086
+ ),
+ (
+ opcode : A_INTO;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#206;
+ flags : if_8086 or if_nox86_64
+ ),
+ (
+ opcode : A_INVD;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#15#8;
+ flags : if_486 or if_priv
+ ),
+ (
+ opcode : A_INVLPG;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #2#15#1#135;
+ flags : if_486 or if_priv
+ ),
+ (
+ opcode : A_IRET;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #215#1#207;
+ flags : if_8086
+ ),
+ (
+ opcode : A_IRETD;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #213#1#207;
+ flags : if_386
+ ),
+ (
+ opcode : A_IRETW;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #212#1#207;
+ flags : if_8086
+ ),
+ (
+ opcode : A_JCXZ;
+ ops : 1;
+ optypes : (ot_immediate,ot_none,ot_none,ot_none);
+ code : #200#1#227#40;
+ flags : if_8086 or if_nox86_64
+ ),
+ (
+ opcode : A_JECXZ;
+ ops : 1;
+ optypes : (ot_immediate,ot_none,ot_none,ot_none);
+ code : #201#1#227#40;
+ flags : if_386
+ ),
+ (
+ opcode : A_JMP;
+ ops : 1;
+ optypes : (ot_immediate or ot_bits8,ot_none,ot_none,ot_none);
+ code : #1#235#40;
+ flags : if_8086 or if_pass2
+ ),
+ (
+ opcode : A_JMP;
+ ops : 1;
+ optypes : (ot_immediate or ot_bits16 or ot_bits32,ot_none,ot_none,ot_none);
+ code : #208#1#233#52;
+ flags : if_8086 or if_pass2
+ ),
+ (
+ opcode : A_JMP;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits32,ot_none,ot_none,ot_none);
+ code : #213#1#255#132;
+ flags : if_386 or if_nox86_64
+ ),
+ (
+ opcode : A_JMP;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits16,ot_none,ot_none,ot_none);
+ code : #212#1#255#132;
+ flags : if_8086
+ ),
+ (
+ opcode : A_JMP;
+ ops : 1;
+ optypes : (ot_immediate or ot_short,ot_none,ot_none,ot_none);
+ code : #1#235#40;
+ flags : if_8086 or if_pass2
+ ),
+ (
+ opcode : A_JMP;
+ ops : 1;
+ optypes : (ot_immediate or ot_near,ot_none,ot_none,ot_none);
+ code : #208#1#233#52;
+ flags : if_8086 or if_pass2
+ ),
+ (
+ opcode : A_JMP;
+ ops : 1;
+ optypes : (ot_immediate or ot_far,ot_none,ot_none,ot_none);
+ code : #208#1#234#28#31;
+ flags : if_8086 or if_pass2 or if_nox86_64
+ ),
+ (
+ opcode : A_JMP;
+ ops : 1;
+ optypes : (ot_memory or ot_near,ot_none,ot_none,ot_none);
+ code : #208#1#255#132;
+ flags : if_8086
+ ),
+ (
+ opcode : A_JMP;
+ ops : 1;
+ optypes : (ot_memory or ot_far,ot_none,ot_none,ot_none);
+ code : #208#1#255#133;
+ flags : if_8086
+ ),
+ (
+ opcode : A_JMP;
+ ops : 2;
+ optypes : (ot_immediate,ot_immediate,ot_none,ot_none);
+ code : #215#1#234#29#24;
+ flags : if_8086 or if_nox86_64
+ ),
+ (
+ opcode : A_JMP;
+ ops : 2;
+ optypes : (ot_immediate,ot_immediate or ot_bits16,ot_none,ot_none);
+ code : #212#1#234#25#24;
+ flags : if_8086 or if_nox86_64
+ ),
+ (
+ opcode : A_JMP;
+ ops : 2;
+ optypes : (ot_immediate,ot_immediate or ot_bits32,ot_none,ot_none);
+ code : #213#1#234#33#24;
+ flags : if_386 or if_nox86_64
+ ),
+ (
+ opcode : A_LAHF;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#159;
+ flags : if_8086
+ ),
+ (
+ opcode : A_LAR;
+ ops : 2;
+ optypes : (ot_reg16 or ot_bits32 or ot_bits64,ot_rm_gpr,ot_none,ot_none);
+ code : #208#2#15#2#72;
+ flags : if_286 or if_prot or if_sm
+ ),
+ (
+ opcode : A_LCALL;
+ ops : 1;
+ optypes : (ot_memory or ot_bits32,ot_none,ot_none,ot_none);
+ code : #213#1#255#131;
+ flags : if_386 or if_nox86_64
+ ),
+ (
+ opcode : A_LCALL;
+ ops : 1;
+ optypes : (ot_memory or ot_bits16,ot_none,ot_none,ot_none);
+ code : #212#1#255#131;
+ flags : if_8086
+ ),
+ (
+ opcode : A_LDS;
+ ops : 2;
+ optypes : (ot_reg16 or ot_bits32,ot_memory,ot_none,ot_none);
+ code : #208#1#197#72;
+ flags : if_8086 or if_nox86_64
+ ),
+ (
+ opcode : A_LEA;
+ ops : 2;
+ optypes : (ot_reg32 or ot_bits64,ot_memory,ot_none,ot_none);
+ code : #208#1#141#72;
+ flags : if_8086
+ ),
+ (
+ opcode : A_LEA;
+ ops : 2;
+ optypes : (ot_reg32 or ot_bits64,ot_immediate,ot_none,ot_none);
+ code : #208#1#141#72;
+ flags : if_8086 or if_sd
+ ),
+ (
+ opcode : A_LEAVE;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#201;
+ flags : if_186
+ ),
+ (
+ opcode : A_LES;
+ ops : 2;
+ optypes : (ot_reg16 or ot_bits32,ot_memory,ot_none,ot_none);
+ code : #208#1#196#72;
+ flags : if_8086 or if_nox86_64
+ ),
+ (
+ opcode : A_LFS;
+ ops : 2;
+ optypes : (ot_reg16 or ot_bits32,ot_memory,ot_none,ot_none);
+ code : #208#2#15#180#72;
+ flags : if_386
+ ),
+ (
+ opcode : A_LGDT;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #2#15#1#130;
+ flags : if_286 or if_priv
+ ),
+ (
+ opcode : A_LGS;
+ ops : 2;
+ optypes : (ot_reg16 or ot_bits32,ot_memory,ot_none,ot_none);
+ code : #208#2#15#181#72;
+ flags : if_386
+ ),
+ (
+ opcode : A_LIDT;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #2#15#1#131;
+ flags : if_286 or if_priv
+ ),
+ (
+ opcode : A_LJMP;
+ ops : 1;
+ optypes : (ot_memory or ot_bits32,ot_none,ot_none,ot_none);
+ code : #213#1#255#133;
+ flags : if_386 or if_nox86_64
+ ),
+ (
+ opcode : A_LJMP;
+ ops : 1;
+ optypes : (ot_memory or ot_bits16,ot_none,ot_none,ot_none);
+ code : #212#1#255#133;
+ flags : if_8086
+ ),
+ (
+ opcode : A_LLDT;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits16,ot_none,ot_none,ot_none);
+ code : #2#15#0#130;
+ flags : if_286 or if_prot or if_priv
+ ),
+ (
+ opcode : A_LMSW;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits16,ot_none,ot_none,ot_none);
+ code : #2#15#1#134;
+ flags : if_286 or if_priv
+ ),
+ (
+ opcode : A_LOADALL;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#15#7;
+ flags : if_386 or if_undoc
+ ),
+ (
+ opcode : A_LOADALL286;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#15#5;
+ flags : if_286 or if_undoc
+ ),
+ (
+ opcode : A_LOCK;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#240;
+ flags : if_8086 or if_pre
+ ),
+ (
+ opcode : A_LODSB;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#172;
+ flags : if_8086
+ ),
+ (
+ opcode : A_LODSD;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #213#1#173;
+ flags : if_386
+ ),
+ (
+ opcode : A_LODSW;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #212#1#173;
+ flags : if_8086
+ ),
+ (
+ opcode : A_LOOP;
+ ops : 1;
+ optypes : (ot_immediate,ot_none,ot_none,ot_none);
+ code : #202#1#226#40;
+ flags : if_8086
+ ),
+ (
+ opcode : A_LOOP;
+ ops : 2;
+ optypes : (ot_immediate,ot_reg_cx,ot_none,ot_none);
+ code : #200#1#226#40;
+ flags : if_8086 or if_nox86_64
+ ),
+ (
+ opcode : A_LOOP;
+ ops : 2;
+ optypes : (ot_immediate,ot_reg_ecx or ot_bits64,ot_none,ot_none);
+ code : #201#1#226#40;
+ flags : if_386
+ ),
+ (
+ opcode : A_LOOPE;
+ ops : 1;
+ optypes : (ot_immediate,ot_none,ot_none,ot_none);
+ code : #202#1#225#40;
+ flags : if_8086
+ ),
+ (
+ opcode : A_LOOPE;
+ ops : 2;
+ optypes : (ot_immediate,ot_reg_cx,ot_none,ot_none);
+ code : #200#1#225#40;
+ flags : if_8086 or if_nox86_64
+ ),
+ (
+ opcode : A_LOOPE;
+ ops : 2;
+ optypes : (ot_immediate,ot_reg_ecx or ot_bits64,ot_none,ot_none);
+ code : #201#1#225#40;
+ flags : if_386
+ ),
+ (
+ opcode : A_LOOPNE;
+ ops : 1;
+ optypes : (ot_immediate,ot_none,ot_none,ot_none);
+ code : #202#1#224#40;
+ flags : if_8086
+ ),
+ (
+ opcode : A_LOOPNE;
+ ops : 2;
+ optypes : (ot_immediate,ot_reg_cx,ot_none,ot_none);
+ code : #200#1#224#40;
+ flags : if_8086 or if_nox86_64
+ ),
+ (
+ opcode : A_LOOPNE;
+ ops : 2;
+ optypes : (ot_immediate,ot_reg_ecx or ot_bits64,ot_none,ot_none);
+ code : #201#1#224#40;
+ flags : if_386
+ ),
+ (
+ opcode : A_LOOPNZ;
+ ops : 1;
+ optypes : (ot_immediate,ot_none,ot_none,ot_none);
+ code : #202#1#224#40;
+ flags : if_8086
+ ),
+ (
+ opcode : A_LOOPNZ;
+ ops : 2;
+ optypes : (ot_immediate,ot_reg_cx,ot_none,ot_none);
+ code : #200#1#224#40;
+ flags : if_8086 or if_nox86_64
+ ),
+ (
+ opcode : A_LOOPNZ;
+ ops : 2;
+ optypes : (ot_immediate,ot_reg_ecx or ot_bits64,ot_none,ot_none);
+ code : #201#1#224#40;
+ flags : if_386
+ ),
+ (
+ opcode : A_LOOPZ;
+ ops : 1;
+ optypes : (ot_immediate,ot_none,ot_none,ot_none);
+ code : #202#1#225#40;
+ flags : if_8086
+ ),
+ (
+ opcode : A_LOOPZ;
+ ops : 2;
+ optypes : (ot_immediate,ot_reg_cx,ot_none,ot_none);
+ code : #200#1#225#40;
+ flags : if_8086 or if_nox86_64
+ ),
+ (
+ opcode : A_LOOPZ;
+ ops : 2;
+ optypes : (ot_immediate,ot_reg_ecx or ot_bits64,ot_none,ot_none);
+ code : #201#1#225#40;
+ flags : if_386
+ ),
+ (
+ opcode : A_LSL;
+ ops : 2;
+ optypes : (ot_reg16 or ot_bits32 or ot_bits64,ot_rm_gpr,ot_none,ot_none);
+ code : #208#2#15#3#72;
+ flags : if_286 or if_prot or if_sm
+ ),
+ (
+ opcode : A_LSS;
+ ops : 2;
+ optypes : (ot_reg16 or ot_bits32 or ot_bits64,ot_memory,ot_none,ot_none);
+ code : #208#2#15#178#72;
+ flags : if_386
+ ),
+ (
+ opcode : A_LTR;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits16,ot_none,ot_none,ot_none);
+ code : #2#15#0#131;
+ flags : if_286 or if_prot or if_priv
+ ),
+ (
+ opcode : A_MONITOR;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #3#15#1#200;
+ flags : if_prescott
+ ),
+ (
+ opcode : A_MONITOR;
+ ops : 3;
+ optypes : (ot_reg_eax,ot_reg_ecx,ot_reg_edx,ot_none);
+ code : #3#15#1#200;
+ flags : if_prescott
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_mem_offs,ot_reg_ax,ot_none,ot_none);
+ code : #212#1#163#36;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_mem_offs,ot_reg_eax,ot_none,ot_none);
+ code : #213#1#163#36;
+ flags : if_386 or if_sm
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_rm_gpr,ot_reg16 or ot_bits32 or ot_bits64,ot_none,ot_none);
+ code : #208#1#137#65;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_reg_ax,ot_mem_offs,ot_none,ot_none);
+ code : #212#1#161#37;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_reg_eax,ot_mem_offs,ot_none,ot_none);
+ code : #213#1#161#37;
+ flags : if_386 or if_sm
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_reg16 or ot_bits32 or ot_bits64,ot_rm_gpr,ot_none,ot_none);
+ code : #208#1#139#72;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_reg32,ot_immediate,ot_none,ot_none);
+ code : #213#8#184#33;
+ flags : if_386 or if_sd
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits32,ot_immediate,ot_none,ot_none);
+ code : #213#1#199#128#33;
+ flags : if_386 or if_sm
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_reg16,ot_immediate,ot_none,ot_none);
+ code : #212#8#184#25;
+ flags : if_8086 or if_sw
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16,ot_immediate,ot_none,ot_none);
+ code : #212#1#199#128#25;
+ flags : if_8086 or if_sw
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_mem_offs,ot_reg_al,ot_none,ot_none);
+ code : #1#162#36;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_reg8,ot_none,ot_none);
+ code : #1#136#65;
+ flags : if_8086
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_reg_al,ot_mem_offs,ot_none,ot_none);
+ code : #1#160#37;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_reg8,ot_rm_gpr or ot_bits8,ot_none,ot_none);
+ code : #1#138#72;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_reg8,ot_immediate,ot_none,ot_none);
+ code : #8#176#17;
+ flags : if_8086 or if_sb
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
+ code : #1#198#128#17;
+ flags : if_8086 or if_sb
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32,ot_reg_cs,ot_none,ot_none);
+ code : #208#1#140#129;
+ flags : if_8086
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32,ot_reg_dess,ot_none,ot_none);
+ code : #208#1#140#65;
+ flags : if_8086
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32,ot_reg_fsgs,ot_none,ot_none);
+ code : #208#1#140#65;
+ flags : if_386
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_reg_dess,ot_rm_gpr or ot_bits16 or ot_bits32,ot_none,ot_none);
+ code : #209#1#142#72;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_reg_fsgs,ot_rm_gpr or ot_bits16 or ot_bits32,ot_none,ot_none);
+ code : #209#1#142#72;
+ flags : if_386 or if_sm
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_reg32,ot_reg_cr4,ot_none,ot_none);
+ code : #2#15#32#132;
+ flags : if_pent or if_priv or if_nox86_64
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_reg32,ot_reg_creg,ot_none,ot_none);
+ code : #2#15#32#65;
+ flags : if_386 or if_priv or if_nox86_64
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_reg32,ot_reg_dreg,ot_none,ot_none);
+ code : #2#15#33#65;
+ flags : if_386 or if_priv or if_nox86_64
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_reg32,ot_reg_treg,ot_none,ot_none);
+ code : #2#15#36#65;
+ flags : if_386 or if_priv or if_nox86_64
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_reg_cr4,ot_reg32,ot_none,ot_none);
+ code : #2#15#34#140;
+ flags : if_pent or if_priv or if_nox86_64
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_reg_creg,ot_reg32,ot_none,ot_none);
+ code : #2#15#34#72;
+ flags : if_386 or if_priv or if_nox86_64
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_reg_dreg,ot_reg32,ot_none,ot_none);
+ code : #2#15#35#72;
+ flags : if_386 or if_priv or if_nox86_64
+ ),
+ (
+ opcode : A_MOV;
+ ops : 2;
+ optypes : (ot_reg_treg,ot_reg32,ot_none,ot_none);
+ code : #2#15#38#72;
+ flags : if_386 or if_priv or if_nox86_64
+ ),
+ (
+ opcode : A_MOVD;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_rm_gpr or ot_bits32,ot_none,ot_none);
+ code : #2#15#110#72;
+ flags : if_pent or if_mmx or if_sd
+ ),
+ (
+ opcode : A_MOVD;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits32,ot_mmxreg,ot_none,ot_none);
+ code : #2#15#126#65;
+ flags : if_pent or if_mmx or if_sd
+ ),
+ (
+ opcode : A_MOVD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_rm_gpr or ot_bits32,ot_none,ot_none);
+ code : #241#2#15#110#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_MOVD;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits32,ot_xmmreg,ot_none,ot_none);
+ code : #241#2#15#126#65;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_MOVQ;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#111#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_MOVQ;
+ ops : 2;
+ optypes : (ot_mmxrm,ot_mmxreg,ot_none,ot_none);
+ code : #2#15#127#65;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_MOVQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #219#2#15#126#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_MOVQ;
+ ops : 2;
+ optypes : (ot_xmmrm,ot_xmmreg,ot_none,ot_none);
+ code : #241#2#15#214#65;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_MOVSB;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#164;
+ flags : if_8086
+ ),
+ (
+ opcode : A_MOVSD;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #213#1#165;
+ flags : if_386
+ ),
+ (
+ opcode : A_MOVSD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #220#2#15#16#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_MOVSD;
+ ops : 2;
+ optypes : (ot_xmmrm,ot_xmmreg,ot_none,ot_none);
+ code : #220#2#15#17#65;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_MOVSW;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #212#1#165;
+ flags : if_8086
+ ),
+ (
+ opcode : A_MOVSX;
+ ops : 2;
+ optypes : (ot_reg32 or ot_bits64,ot_rm_gpr or ot_bits16,ot_none,ot_none);
+ code : #208#2#15#191#72;
+ flags : if_386
+ ),
+ (
+ opcode : A_MOVSX;
+ ops : 2;
+ optypes : (ot_reg16 or ot_bits32 or ot_bits64,ot_rm_gpr or ot_bits8,ot_none,ot_none);
+ code : #208#2#15#190#72;
+ flags : if_386
+ ),
+ (
+ opcode : A_MOVZX;
+ ops : 2;
+ optypes : (ot_reg32 or ot_bits64,ot_rm_gpr or ot_bits16,ot_none,ot_none);
+ code : #208#2#15#183#72;
+ flags : if_386
+ ),
+ (
+ opcode : A_MOVZX;
+ ops : 2;
+ optypes : (ot_reg16 or ot_bits32 or ot_bits64,ot_rm_gpr or ot_bits8,ot_none,ot_none);
+ code : #208#2#15#182#72;
+ flags : if_386
+ ),
+ (
+ opcode : A_MUL;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_none,ot_none,ot_none);
+ code : #208#1#247#132;
+ flags : if_8086
+ ),
+ (
+ opcode : A_MUL;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits8,ot_none,ot_none,ot_none);
+ code : #1#246#132;
+ flags : if_8086
+ ),
+ (
+ opcode : A_MWAIT;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #3#15#1#201;
+ flags : if_prescott
+ ),
+ (
+ opcode : A_MWAIT;
+ ops : 2;
+ optypes : (ot_reg_eax,ot_reg_ecx,ot_none,ot_none);
+ code : #3#15#1#201;
+ flags : if_prescott
+ ),
+ (
+ opcode : A_NEG;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_none,ot_none,ot_none);
+ code : #208#1#247#131;
+ flags : if_8086
+ ),
+ (
+ opcode : A_NEG;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits8,ot_none,ot_none,ot_none);
+ code : #1#246#131;
+ flags : if_8086
+ ),
+ (
+ opcode : A_NOP;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#144;
+ flags : if_8086
+ ),
+ (
+ opcode : A_NOT;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_none,ot_none,ot_none);
+ code : #208#1#247#130;
+ flags : if_8086
+ ),
+ (
+ opcode : A_NOT;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits8,ot_none,ot_none,ot_none);
+ code : #1#246#130;
+ flags : if_8086
+ ),
+ (
+ opcode : A_OR;
+ ops : 2;
+ optypes : (ot_rm_gpr,ot_reg16 or ot_bits32 or ot_bits64,ot_none,ot_none);
+ code : #208#1#9#65;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_OR;
+ ops : 2;
+ optypes : (ot_reg16 or ot_bits32 or ot_bits64,ot_rm_gpr,ot_none,ot_none);
+ code : #208#1#11#72;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_OR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_reg8,ot_none,ot_none);
+ code : #1#8#65;
+ flags : if_8086
+ ),
+ (
+ opcode : A_OR;
+ ops : 2;
+ optypes : (ot_reg8,ot_rm_gpr or ot_bits8,ot_none,ot_none);
+ code : #1#10#72;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_OR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_immediate or ot_bits8 or ot_signed,ot_none,ot_none);
+ code : #208#1#131#129#13;
+ flags : if_8086
+ ),
+ (
+ opcode : A_OR;
+ ops : 2;
+ optypes : (ot_reg_eax,ot_immediate,ot_none,ot_none);
+ code : #213#1#13#33;
+ flags : if_386 or if_sm
+ ),
+ (
+ opcode : A_OR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits32,ot_immediate,ot_none,ot_none);
+ code : #213#1#129#129#33;
+ flags : if_386 or if_sm
+ ),
+ (
+ opcode : A_OR;
+ ops : 2;
+ optypes : (ot_reg_ax,ot_immediate,ot_none,ot_none);
+ code : #212#1#13#25;
+ flags : if_8086 or if_sw
+ ),
+ (
+ opcode : A_OR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16,ot_immediate,ot_none,ot_none);
+ code : #212#1#129#129#25;
+ flags : if_8086 or if_sw
+ ),
+ (
+ opcode : A_OR;
+ ops : 2;
+ optypes : (ot_reg_al,ot_immediate,ot_none,ot_none);
+ code : #1#12#17;
+ flags : if_8086 or if_sb
+ ),
+ (
+ opcode : A_OR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
+ code : #1#128#129#17;
+ flags : if_8086 or if_sb
+ ),
+ (
+ opcode : A_OUT;
+ ops : 2;
+ optypes : (ot_immediate,ot_reg_al,ot_none,ot_none);
+ code : #1#230#20;
+ flags : if_8086 or if_sb
+ ),
+ (
+ opcode : A_OUT;
+ ops : 2;
+ optypes : (ot_immediate,ot_reg_ax,ot_none,ot_none);
+ code : #212#1#231#20;
+ flags : if_8086 or if_sb
+ ),
+ (
+ opcode : A_OUT;
+ ops : 2;
+ optypes : (ot_immediate,ot_reg_eax,ot_none,ot_none);
+ code : #213#1#231#20;
+ flags : if_386 or if_sb
+ ),
+ (
+ opcode : A_OUT;
+ ops : 2;
+ optypes : (ot_reg_dx,ot_reg_al,ot_none,ot_none);
+ code : #1#238;
+ flags : if_8086
+ ),
+ (
+ opcode : A_OUT;
+ ops : 2;
+ optypes : (ot_reg_dx,ot_reg_ax,ot_none,ot_none);
+ code : #212#1#239;
+ flags : if_8086
+ ),
+ (
+ opcode : A_OUT;
+ ops : 2;
+ optypes : (ot_reg_dx,ot_reg_eax,ot_none,ot_none);
+ code : #213#1#239;
+ flags : if_386
+ ),
+ (
+ opcode : A_OUTSB;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#110;
+ flags : if_186
+ ),
+ (
+ opcode : A_OUTSD;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #213#1#111;
+ flags : if_386
+ ),
+ (
+ opcode : A_OUTSW;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #212#1#111;
+ flags : if_186
+ ),
+ (
+ opcode : A_PACKSSDW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#107#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PACKSSDW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#107#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PACKSSWB;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#99#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PACKSSWB;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#99#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PACKUSWB;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#103#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PACKUSWB;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#103#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PADDB;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#252#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PADDB;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#252#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PADDD;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#254#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PADDD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#254#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PADDSB;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#236#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PADDSB;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#236#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PADDSIW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#81#72;
+ flags : if_pent or if_mmx or if_sm or if_cyrix
+ ),
+ (
+ opcode : A_PADDSW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#237#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PADDSW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#237#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PADDUSB;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#220#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PADDUSB;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#220#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PADDUSW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#221#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PADDUSW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#221#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PADDW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#253#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PADDW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#253#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PAND;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#219#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PAND;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#219#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PANDN;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#223#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PANDN;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#223#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PAVEB;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#80#72;
+ flags : if_pent or if_mmx or if_sm or if_cyrix
+ ),
+ (
+ opcode : A_PAVGUSB;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#15#72#1#191;
+ flags : if_pent or if_3dnow or if_sm
+ ),
+ (
+ opcode : A_PCMPEQB;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#116#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PCMPEQB;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#116#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PCMPEQD;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#118#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PCMPEQD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#118#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PCMPEQW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#117#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PCMPEQW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#117#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PCMPGTB;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#100#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PCMPGTB;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#100#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PCMPGTD;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#102#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PCMPGTD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#102#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PCMPGTW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#101#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PCMPGTW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#101#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PDISTIB;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_memory,ot_none,ot_none);
+ code : #2#15#84#72;
+ flags : if_pent or if_mmx or if_sm or if_cyrix
+ ),
+ (
+ opcode : A_PF2ID;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#15#72#1#29;
+ flags : if_pent or if_3dnow or if_sm
+ ),
+ (
+ opcode : A_PFACC;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#15#72#1#174;
+ flags : if_pent or if_3dnow or if_sm
+ ),
+ (
+ opcode : A_PFADD;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#15#72#1#158;
+ flags : if_pent or if_3dnow or if_sm
+ ),
+ (
+ opcode : A_PFCMPEQ;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#15#72#1#176;
+ flags : if_pent or if_3dnow or if_sm
+ ),
+ (
+ opcode : A_PFCMPGE;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#15#72#1#144;
+ flags : if_pent or if_3dnow or if_sm
+ ),
+ (
+ opcode : A_PFCMPGT;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#15#72#1#160;
+ flags : if_pent or if_3dnow or if_sm
+ ),
+ (
+ opcode : A_PFMAX;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#15#72#1#164;
+ flags : if_pent or if_3dnow or if_sm
+ ),
+ (
+ opcode : A_PFMIN;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#15#72#1#148;
+ flags : if_pent or if_3dnow or if_sm
+ ),
+ (
+ opcode : A_PFMUL;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#15#72#1#180;
+ flags : if_pent or if_3dnow or if_sm
+ ),
+ (
+ opcode : A_PFRCP;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#15#72#1#150;
+ flags : if_pent or if_3dnow or if_sm
+ ),
+ (
+ opcode : A_PFRCPIT1;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#15#72#1#166;
+ flags : if_pent or if_3dnow or if_sm
+ ),
+ (
+ opcode : A_PFRCPIT2;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#15#72#1#182;
+ flags : if_pent or if_3dnow or if_sm
+ ),
+ (
+ opcode : A_PFRSQIT1;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#15#72#1#167;
+ flags : if_pent or if_3dnow or if_sm
+ ),
+ (
+ opcode : A_PFRSQRT;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#15#72#1#151;
+ flags : if_pent or if_3dnow or if_sm
+ ),
+ (
+ opcode : A_PFSUB;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#15#72#1#154;
+ flags : if_pent or if_3dnow or if_sm
+ ),
+ (
+ opcode : A_PFSUBR;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#15#72#1#170;
+ flags : if_pent or if_3dnow or if_sm
+ ),
+ (
+ opcode : A_PI2FD;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#15#72#1#13;
+ flags : if_pent or if_3dnow or if_sm
+ ),
+ (
+ opcode : A_PMACHRIW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_memory,ot_none,ot_none);
+ code : #2#15#94#72;
+ flags : if_pent or if_mmx or if_sm or if_cyrix
+ ),
+ (
+ opcode : A_PMADDWD;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#245#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PMADDWD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#245#72;
+ flags : if_willamette or if_sm or if_sse2
+ ),
+ (
+ opcode : A_PMAGW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#82#72;
+ flags : if_pent or if_mmx or if_sm or if_cyrix
+ ),
+ (
+ opcode : A_PMULHRIW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#93#72;
+ flags : if_pent or if_mmx or if_sm or if_cyrix
+ ),
+ (
+ opcode : A_PMULHRWA;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#15#72#1#183;
+ flags : if_pent or if_3dnow or if_sm
+ ),
+ (
+ opcode : A_PMULHRWC;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#89#72;
+ flags : if_pent or if_mmx or if_sm or if_cyrix
+ ),
+ (
+ opcode : A_PMULHW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#229#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PMULHW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#229#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PMULLW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#213#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PMULLW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#213#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PMVGEZB;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_memory,ot_none,ot_none);
+ code : #2#15#92#72;
+ flags : if_pent or if_mmx or if_sm or if_cyrix
+ ),
+ (
+ opcode : A_PMVLZB;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_memory,ot_none,ot_none);
+ code : #2#15#91#72;
+ flags : if_pent or if_mmx or if_sm or if_cyrix
+ ),
+ (
+ opcode : A_PMVNZB;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_memory,ot_none,ot_none);
+ code : #2#15#90#72;
+ flags : if_pent or if_mmx or if_sm or if_cyrix
+ ),
+ (
+ opcode : A_PMVZB;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_memory,ot_none,ot_none);
+ code : #2#15#88#72;
+ flags : if_pent or if_mmx or if_sm or if_cyrix
+ ),
+ (
+ opcode : A_POP;
+ ops : 1;
+ optypes : (ot_reg16,ot_none,ot_none,ot_none);
+ code : #212#8#88;
+ flags : if_8086
+ ),
+ (
+ opcode : A_POP;
+ ops : 1;
+ optypes : (ot_reg32,ot_none,ot_none,ot_none);
+ code : #213#8#88;
+ flags : if_386 or if_nox86_64
+ ),
+ (
+ opcode : A_POP;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits16,ot_none,ot_none,ot_none);
+ code : #212#1#143#128;
+ flags : if_8086
+ ),
+ (
+ opcode : A_POP;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits32,ot_none,ot_none,ot_none);
+ code : #213#1#143#128;
+ flags : if_386 or if_nox86_64
+ ),
+ (
+ opcode : A_POP;
+ ops : 1;
+ optypes : (ot_reg_cs,ot_none,ot_none,ot_none);
+ code : #1#15;
+ flags : if_8086 or if_undoc
+ ),
+ (
+ opcode : A_POP;
+ ops : 1;
+ optypes : (ot_reg_dess,ot_none,ot_none,ot_none);
+ code : #4;
+ flags : if_8086 or if_nox86_64
+ ),
+ (
+ opcode : A_POP;
+ ops : 1;
+ optypes : (ot_reg_fsgs,ot_none,ot_none,ot_none);
+ code : #1#15#5#221;
+ flags : if_386
+ ),
+ (
+ opcode : A_POPA;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #215#1#97;
+ flags : if_186 or if_nox86_64
+ ),
+ (
+ opcode : A_POPAD;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #213#1#97;
+ flags : if_386 or if_nox86_64
+ ),
+ (
+ opcode : A_POPAW;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #212#1#97;
+ flags : if_186 or if_nox86_64
+ ),
+ (
+ opcode : A_POPF;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #215#1#157;
+ flags : if_186 or if_nox86_64
+ ),
+ (
+ opcode : A_POPFD;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #213#1#157;
+ flags : if_386 or if_nox86_64
+ ),
+ (
+ opcode : A_POPFW;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #212#1#157;
+ flags : if_186 or if_nox86_64
+ ),
+ (
+ opcode : A_POR;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#235#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_POR;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#235#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PREFETCH;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #2#15#13#128;
+ flags : if_pent or if_3dnow or if_sm
+ ),
+ (
+ opcode : A_PREFETCHW;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #2#15#13#129;
+ flags : if_pent or if_3dnow or if_sm
+ ),
+ (
+ opcode : A_PSLLD;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#242#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PSLLD;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_immediate,ot_none,ot_none);
+ code : #2#15#114#134#21;
+ flags : if_pent or if_mmx or if_sb or if_ar1
+ ),
+ (
+ opcode : A_PSLLD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#242#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PSLLD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_immediate,ot_none,ot_none);
+ code : #241#2#15#114#134#21;
+ flags : if_willamette or if_sse2 or if_sb or if_ar1
+ ),
+ (
+ opcode : A_PSLLDQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_immediate,ot_none,ot_none);
+ code : #241#2#15#115#135#21;
+ flags : if_willamette or if_sse2 or if_sb or if_ar1
+ ),
+ (
+ opcode : A_PSLLQ;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#243#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PSLLQ;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_immediate,ot_none,ot_none);
+ code : #2#15#115#134#21;
+ flags : if_pent or if_mmx or if_sb or if_ar1
+ ),
+ (
+ opcode : A_PSLLQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#243#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PSLLQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_immediate,ot_none,ot_none);
+ code : #241#2#15#115#134#21;
+ flags : if_willamette or if_sse2 or if_sb or if_ar1
+ ),
+ (
+ opcode : A_PSLLW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#241#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PSLLW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_immediate,ot_none,ot_none);
+ code : #2#15#113#134#21;
+ flags : if_pent or if_mmx or if_sb or if_ar1
+ ),
+ (
+ opcode : A_PSLLW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#241#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PSLLW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_immediate,ot_none,ot_none);
+ code : #241#2#15#113#134#21;
+ flags : if_willamette or if_sse2 or if_sb or if_ar1
+ ),
+ (
+ opcode : A_PSRAD;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#226#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PSRAD;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_immediate,ot_none,ot_none);
+ code : #2#15#114#132#21;
+ flags : if_pent or if_mmx or if_sb or if_ar1
+ ),
+ (
+ opcode : A_PSRAD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#226#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PSRAD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_immediate,ot_none,ot_none);
+ code : #241#2#15#114#132#21;
+ flags : if_willamette or if_sse2 or if_sb or if_ar1
+ ),
+ (
+ opcode : A_PSRAW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#225#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PSRAW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_immediate,ot_none,ot_none);
+ code : #2#15#113#132#21;
+ flags : if_pent or if_mmx or if_sb or if_ar1
+ ),
+ (
+ opcode : A_PSRAW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#225#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PSRAW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_immediate,ot_none,ot_none);
+ code : #241#2#15#113#132#21;
+ flags : if_willamette or if_sse2 or if_sb or if_ar1
+ ),
+ (
+ opcode : A_PSRLD;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#210#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PSRLD;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_immediate,ot_none,ot_none);
+ code : #2#15#114#130#21;
+ flags : if_pent or if_mmx or if_sb or if_ar1
+ ),
+ (
+ opcode : A_PSRLD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#210#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PSRLD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_immediate,ot_none,ot_none);
+ code : #241#2#15#114#130#21;
+ flags : if_willamette or if_sse2 or if_sb or if_ar1
+ ),
+ (
+ opcode : A_PSRLQ;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#211#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PSRLQ;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_immediate,ot_none,ot_none);
+ code : #2#15#115#130#21;
+ flags : if_pent or if_mmx or if_sb or if_ar1
+ ),
+ (
+ opcode : A_PSRLQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#211#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PSRLQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_immediate,ot_none,ot_none);
+ code : #241#2#15#115#130#21;
+ flags : if_willamette or if_sse2 or if_sb or if_ar1
+ ),
+ (
+ opcode : A_PSRLW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#209#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PSRLW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_immediate,ot_none,ot_none);
+ code : #2#15#113#130#21;
+ flags : if_pent or if_mmx or if_sb or if_ar1
+ ),
+ (
+ opcode : A_PSRLW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#209#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PSRLW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_immediate,ot_none,ot_none);
+ code : #241#2#15#113#130#21;
+ flags : if_willamette or if_sse2 or if_sb or if_ar1
+ ),
+ (
+ opcode : A_PSUBB;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#248#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PSUBB;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#248#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PSUBD;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#250#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PSUBD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#250#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PSUBSB;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#232#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PSUBSB;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#232#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PSUBSIW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_memory,ot_none,ot_none);
+ code : #2#15#85#72;
+ flags : if_pent or if_mmx or if_sm or if_cyrix
+ ),
+ (
+ opcode : A_PSUBSIW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxreg,ot_none,ot_none);
+ code : #2#15#85#72;
+ flags : if_pent or if_mmx or if_cyrix
+ ),
+ (
+ opcode : A_PSUBSW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#233#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PSUBSW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#233#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PSUBUSB;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#216#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PSUBUSB;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#216#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PSUBUSW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#217#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PSUBUSW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#217#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PSUBW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#249#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PSUBW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#249#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PUNPCKHBW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#104#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PUNPCKHBW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#104#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PUNPCKHDQ;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#106#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PUNPCKHDQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#106#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PUNPCKHWD;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#105#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PUNPCKHWD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#105#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PUNPCKLBW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#96#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PUNPCKLBW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#96#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PUNPCKLDQ;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#98#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PUNPCKLDQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#98#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PUNPCKLWD;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#97#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PUNPCKLWD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#97#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PUSH;
+ ops : 1;
+ optypes : (ot_reg16,ot_none,ot_none,ot_none);
+ code : #212#8#80;
+ flags : if_8086
+ ),
+ (
+ opcode : A_PUSH;
+ ops : 1;
+ optypes : (ot_reg32,ot_none,ot_none,ot_none);
+ code : #213#8#80;
+ flags : if_386 or if_nox86_64
+ ),
+ (
+ opcode : A_PUSH;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits16,ot_none,ot_none,ot_none);
+ code : #212#1#255#134;
+ flags : if_8086
+ ),
+ (
+ opcode : A_PUSH;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits32,ot_none,ot_none,ot_none);
+ code : #213#1#255#134;
+ flags : if_386 or if_nox86_64
+ ),
+ (
+ opcode : A_PUSH;
+ ops : 1;
+ optypes : (ot_immediate or ot_bits32,ot_none,ot_none,ot_none);
+ code : #213#1#104#32#221;
+ flags : if_386
+ ),
+ (
+ opcode : A_PUSH;
+ ops : 1;
+ optypes : (ot_immediate or ot_bits16,ot_none,ot_none,ot_none);
+ code : #212#1#104#24#221;
+ flags : if_286
+ ),
+ (
+ opcode : A_PUSH;
+ ops : 1;
+ optypes : (ot_immediate or ot_bits8 or ot_signed,ot_none,ot_none,ot_none);
+ code : #1#106#12#221;
+ flags : if_286
+ ),
+ (
+ opcode : A_PUSH;
+ ops : 1;
+ optypes : (ot_reg_fsgs,ot_none,ot_none,ot_none);
+ code : #1#15#7#221;
+ flags : if_386 or if_nox86_64
+ ),
+ (
+ opcode : A_PUSH;
+ ops : 1;
+ optypes : (ot_reg_sreg,ot_none,ot_none,ot_none);
+ code : #6;
+ flags : if_8086 or if_nox86_64
+ ),
+ (
+ opcode : A_PUSHA;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #215#1#96;
+ flags : if_186 or if_nox86_64
+ ),
+ (
+ opcode : A_PUSHAD;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #213#1#96;
+ flags : if_386 or if_nox86_64
+ ),
+ (
+ opcode : A_PUSHAW;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #212#1#96;
+ flags : if_186 or if_nox86_64
+ ),
+ (
+ opcode : A_PUSHF;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #215#1#156;
+ flags : if_186
+ ),
+ (
+ opcode : A_PUSHFD;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #213#1#156;
+ flags : if_386 or if_nox86_64
+ ),
+ (
+ opcode : A_PUSHFW;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #212#1#156;
+ flags : if_186
+ ),
+ (
+ opcode : A_PXOR;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#239#72;
+ flags : if_pent or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PXOR;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#239#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_RCL;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_unity,ot_none,ot_none);
+ code : #208#1#209#130;
+ flags : if_8086
+ ),
+ (
+ opcode : A_RCL;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_reg_cl,ot_none,ot_none);
+ code : #208#1#211#130;
+ flags : if_8086
+ ),
+ (
+ opcode : A_RCL;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_immediate,ot_none,ot_none);
+ code : #208#1#193#130#21;
+ flags : if_8086 or if_sb
+ ),
+ (
+ opcode : A_RCL;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_unity,ot_none,ot_none);
+ code : #1#208#130;
+ flags : if_8086
+ ),
+ (
+ opcode : A_RCL;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_reg_cl,ot_none,ot_none);
+ code : #1#210#130;
+ flags : if_8086
+ ),
+ (
+ opcode : A_RCL;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
+ code : #1#192#130#21;
+ flags : if_186 or if_sb
+ ),
+ (
+ opcode : A_RCR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_unity,ot_none,ot_none);
+ code : #208#1#209#131;
+ flags : if_8086
+ ),
+ (
+ opcode : A_RCR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_reg_cl,ot_none,ot_none);
+ code : #208#1#211#131;
+ flags : if_8086
+ ),
+ (
+ opcode : A_RCR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_immediate,ot_none,ot_none);
+ code : #208#1#193#131#21;
+ flags : if_8086 or if_sb
+ ),
+ (
+ opcode : A_RCR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_unity,ot_none,ot_none);
+ code : #1#208#131;
+ flags : if_8086
+ ),
+ (
+ opcode : A_RCR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_reg_cl,ot_none,ot_none);
+ code : #1#210#131;
+ flags : if_8086
+ ),
+ (
+ opcode : A_RCR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
+ code : #1#192#131#21;
+ flags : if_186 or if_sb
+ ),
+ (
+ opcode : A_RDSHR;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#15#54;
+ flags : if_p6 or if_cyrix or if_smm
+ ),
+ (
+ opcode : A_RDMSR;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#15#50;
+ flags : if_pent or if_priv
+ ),
+ (
+ opcode : A_RDPMC;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#15#51;
+ flags : if_p6
+ ),
+ (
+ opcode : A_RDTSC;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#15#49;
+ flags : if_pent
+ ),
+ (
+ opcode : A_REP;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#243;
+ flags : if_8086 or if_pre
+ ),
+ (
+ opcode : A_REPE;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#243;
+ flags : if_8086 or if_pre
+ ),
+ (
+ opcode : A_REPNE;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#242;
+ flags : if_8086 or if_pre
+ ),
+ (
+ opcode : A_REPNZ;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#242;
+ flags : if_8086 or if_pre
+ ),
+ (
+ opcode : A_REPZ;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#243;
+ flags : if_8086 or if_pre
+ ),
+ (
+ opcode : A_RET;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#195;
+ flags : if_8086
+ ),
+ (
+ opcode : A_RET;
+ ops : 1;
+ optypes : (ot_immediate,ot_none,ot_none,ot_none);
+ code : #1#194#24;
+ flags : if_8086 or if_sw
+ ),
+ (
+ opcode : A_RETF;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#203;
+ flags : if_8086
+ ),
+ (
+ opcode : A_RETF;
+ ops : 1;
+ optypes : (ot_immediate,ot_none,ot_none,ot_none);
+ code : #1#202#24;
+ flags : if_8086 or if_sw
+ ),
+ (
+ opcode : A_RETN;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#195;
+ flags : if_8086
+ ),
+ (
+ opcode : A_RETN;
+ ops : 1;
+ optypes : (ot_immediate,ot_none,ot_none,ot_none);
+ code : #1#194#24;
+ flags : if_8086 or if_sw
+ ),
+ (
+ opcode : A_ROL;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_unity,ot_none,ot_none);
+ code : #208#1#209#128;
+ flags : if_8086
+ ),
+ (
+ opcode : A_ROL;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_reg_cl,ot_none,ot_none);
+ code : #208#1#211#128;
+ flags : if_8086
+ ),
+ (
+ opcode : A_ROL;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_immediate,ot_none,ot_none);
+ code : #208#1#193#128#21;
+ flags : if_8086 or if_sb
+ ),
+ (
+ opcode : A_ROL;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_unity,ot_none,ot_none);
+ code : #1#208#128;
+ flags : if_8086
+ ),
+ (
+ opcode : A_ROL;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_reg_cl,ot_none,ot_none);
+ code : #1#210#128;
+ flags : if_8086
+ ),
+ (
+ opcode : A_ROL;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
+ code : #1#192#128#21;
+ flags : if_186 or if_sb
+ ),
+ (
+ opcode : A_ROR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_unity,ot_none,ot_none);
+ code : #208#1#209#129;
+ flags : if_8086
+ ),
+ (
+ opcode : A_ROR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_reg_cl,ot_none,ot_none);
+ code : #208#1#211#129;
+ flags : if_8086
+ ),
+ (
+ opcode : A_ROR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_immediate,ot_none,ot_none);
+ code : #208#1#193#129#21;
+ flags : if_8086 or if_sb
+ ),
+ (
+ opcode : A_ROR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_unity,ot_none,ot_none);
+ code : #1#208#129;
+ flags : if_8086
+ ),
+ (
+ opcode : A_ROR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_reg_cl,ot_none,ot_none);
+ code : #1#210#129;
+ flags : if_8086
+ ),
+ (
+ opcode : A_ROR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
+ code : #1#192#129#21;
+ flags : if_186 or if_sb
+ ),
+ (
+ opcode : A_RSDC;
+ ops : 2;
+ optypes : (ot_reg_sreg,ot_memory or ot_bits80,ot_none,ot_none);
+ code : #2#15#121#65;
+ flags : if_486 or if_cyrix or if_smm
+ ),
+ (
+ opcode : A_RSLDT;
+ ops : 1;
+ optypes : (ot_memory or ot_bits80,ot_none,ot_none,ot_none);
+ code : #2#15#123#128;
+ flags : if_486 or if_cyrix or if_smm
+ ),
+ (
+ opcode : A_RSM;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#15#170;
+ flags : if_pent or if_smm
+ ),
+ (
+ opcode : A_SAHF;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#158;
+ flags : if_8086
+ ),
+ (
+ opcode : A_SAL;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_unity,ot_none,ot_none);
+ code : #208#1#209#132;
+ flags : if_8086
+ ),
+ (
+ opcode : A_SAL;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_reg_cl,ot_none,ot_none);
+ code : #208#1#211#132;
+ flags : if_8086
+ ),
+ (
+ opcode : A_SAL;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_immediate,ot_none,ot_none);
+ code : #208#1#193#132#21;
+ flags : if_8086 or if_sb
+ ),
+ (
+ opcode : A_SAL;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_unity,ot_none,ot_none);
+ code : #1#208#132;
+ flags : if_8086
+ ),
+ (
+ opcode : A_SAL;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_reg_cl,ot_none,ot_none);
+ code : #1#210#132;
+ flags : if_8086
+ ),
+ (
+ opcode : A_SAL;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
+ code : #1#192#132#21;
+ flags : if_186 or if_sb
+ ),
+ (
+ opcode : A_SALC;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#214;
+ flags : if_8086 or if_undoc or if_nox86_64
+ ),
+ (
+ opcode : A_SAR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_unity,ot_none,ot_none);
+ code : #208#1#209#135;
+ flags : if_8086
+ ),
+ (
+ opcode : A_SAR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_reg_cl,ot_none,ot_none);
+ code : #208#1#211#135;
+ flags : if_8086
+ ),
+ (
+ opcode : A_SAR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_immediate,ot_none,ot_none);
+ code : #208#1#193#135#21;
+ flags : if_8086 or if_sb
+ ),
+ (
+ opcode : A_SAR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_unity,ot_none,ot_none);
+ code : #1#208#135;
+ flags : if_8086
+ ),
+ (
+ opcode : A_SAR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_reg_cl,ot_none,ot_none);
+ code : #1#210#135;
+ flags : if_8086
+ ),
+ (
+ opcode : A_SAR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
+ code : #1#192#135#21;
+ flags : if_186 or if_sb
+ ),
+ (
+ opcode : A_SBB;
+ ops : 2;
+ optypes : (ot_rm_gpr,ot_reg16 or ot_bits32 or ot_bits64,ot_none,ot_none);
+ code : #208#1#25#65;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_SBB;
+ ops : 2;
+ optypes : (ot_reg16 or ot_bits32 or ot_bits64,ot_rm_gpr,ot_none,ot_none);
+ code : #208#1#27#72;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_SBB;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_immediate or ot_bits8 or ot_signed,ot_none,ot_none);
+ code : #208#1#131#131#13;
+ flags : if_8086
+ ),
+ (
+ opcode : A_SBB;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_reg8,ot_none,ot_none);
+ code : #1#24#65;
+ flags : if_8086
+ ),
+ (
+ opcode : A_SBB;
+ ops : 2;
+ optypes : (ot_reg8,ot_rm_gpr or ot_bits8,ot_none,ot_none);
+ code : #1#26#72;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_SBB;
+ ops : 2;
+ optypes : (ot_reg_eax,ot_immediate,ot_none,ot_none);
+ code : #213#1#29#33;
+ flags : if_386 or if_sm
+ ),
+ (
+ opcode : A_SBB;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits32,ot_immediate,ot_none,ot_none);
+ code : #208#1#129#131#33;
+ flags : if_386 or if_sm
+ ),
+ (
+ opcode : A_SBB;
+ ops : 2;
+ optypes : (ot_reg_ax,ot_immediate,ot_none,ot_none);
+ code : #212#1#29#25;
+ flags : if_8086 or if_sw
+ ),
+ (
+ opcode : A_SBB;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16,ot_immediate,ot_none,ot_none);
+ code : #208#1#129#131#25;
+ flags : if_8086 or if_sw
+ ),
+ (
+ opcode : A_SBB;
+ ops : 2;
+ optypes : (ot_reg_al,ot_immediate,ot_none,ot_none);
+ code : #1#28#17;
+ flags : if_8086 or if_sb
+ ),
+ (
+ opcode : A_SBB;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
+ code : #1#128#131#17;
+ flags : if_8086 or if_sb
+ ),
+ (
+ opcode : A_SCASB;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #218#1#174;
+ flags : if_8086
+ ),
+ (
+ opcode : A_SCASD;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #218#213#1#175;
+ flags : if_386
+ ),
+ (
+ opcode : A_SCASW;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #218#212#1#175;
+ flags : if_8086
+ ),
+ (
+ opcode : A_SEGCS;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#46;
+ flags : if_8086 or if_pre
+ ),
+ (
+ opcode : A_SEGDS;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#62;
+ flags : if_8086 or if_pre
+ ),
+ (
+ opcode : A_SEGES;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#38;
+ flags : if_8086 or if_pre
+ ),
+ (
+ opcode : A_SEGFS;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#100;
+ flags : if_8086 or if_pre
+ ),
+ (
+ opcode : A_SEGGS;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#101;
+ flags : if_8086 or if_pre
+ ),
+ (
+ opcode : A_SEGSS;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#54;
+ flags : if_8086 or if_pre
+ ),
+ (
+ opcode : A_SGDT;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #2#15#1#128;
+ flags : if_286
+ ),
+ (
+ opcode : A_SHL;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_unity,ot_none,ot_none);
+ code : #208#1#209#132;
+ flags : if_8086
+ ),
+ (
+ opcode : A_SHL;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_reg_cl,ot_none,ot_none);
+ code : #208#1#211#132;
+ flags : if_8086
+ ),
+ (
+ opcode : A_SHL;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_immediate,ot_none,ot_none);
+ code : #208#1#193#132#21;
+ flags : if_186 or if_sw
+ ),
+ (
+ opcode : A_SHL;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_unity,ot_none,ot_none);
+ code : #1#208#132;
+ flags : if_8086
+ ),
+ (
+ opcode : A_SHL;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_reg_cl,ot_none,ot_none);
+ code : #1#210#132;
+ flags : if_8086
+ ),
+ (
+ opcode : A_SHL;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
+ code : #1#192#132#21;
+ flags : if_186 or if_sb
+ ),
+ (
+ opcode : A_SHLD;
+ ops : 3;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_reg16 or ot_bits32 or ot_bits64,ot_immediate,ot_none);
+ code : #209#2#15#164#65#22;
+ flags : if_386 or if_sm2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_SHLD;
+ ops : 3;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_reg16 or ot_bits32 or ot_bits64,ot_reg_cl,ot_none);
+ code : #209#2#15#165#65;
+ flags : if_386 or if_sm
+ ),
+ (
+ opcode : A_SHR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_unity,ot_none,ot_none);
+ code : #208#1#209#133;
+ flags : if_8086
+ ),
+ (
+ opcode : A_SHR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_reg_cl,ot_none,ot_none);
+ code : #208#1#211#133;
+ flags : if_8086
+ ),
+ (
+ opcode : A_SHR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_immediate,ot_none,ot_none);
+ code : #208#1#193#133#21;
+ flags : if_186 or if_sw
+ ),
+ (
+ opcode : A_SHR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_unity,ot_none,ot_none);
+ code : #1#208#133;
+ flags : if_8086
+ ),
+ (
+ opcode : A_SHR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_reg_cl,ot_none,ot_none);
+ code : #1#210#133;
+ flags : if_8086
+ ),
+ (
+ opcode : A_SHR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
+ code : #1#192#133#21;
+ flags : if_186 or if_sb
+ ),
+ (
+ opcode : A_SHRD;
+ ops : 3;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_reg16 or ot_bits32 or ot_bits64,ot_immediate,ot_none);
+ code : #209#2#15#172#65#22;
+ flags : if_386 or if_sm2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_SHRD;
+ ops : 3;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_reg16 or ot_bits32 or ot_bits64,ot_reg_cl,ot_none);
+ code : #209#2#15#173#65;
+ flags : if_386 or if_sm
+ ),
+ (
+ opcode : A_SIDT;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #2#15#1#129;
+ flags : if_286
+ ),
+ (
+ opcode : A_SLDT;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #2#15#0#128;
+ flags : if_286
+ ),
+ (
+ opcode : A_SLDT;
+ ops : 1;
+ optypes : (ot_reg16 or ot_bits32 or ot_bits64,ot_none,ot_none,ot_none);
+ code : #208#2#15#0#128;
+ flags : if_286
+ ),
+ (
+ opcode : A_SMI;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#241;
+ flags : if_386 or if_undoc
+ ),
+ (
+ opcode : A_SMINT;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#15#56;
+ flags : if_p6 or if_cyrix
+ ),
+ (
+ opcode : A_SMINTOLD;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#15#126;
+ flags : if_486 or if_cyrix
+ ),
+ (
+ opcode : A_SMSW;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_none,ot_none,ot_none);
+ code : #208#2#15#1#132;
+ flags : if_286
+ ),
+ (
+ opcode : A_STC;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#249;
+ flags : if_8086
+ ),
+ (
+ opcode : A_STD;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#253;
+ flags : if_8086
+ ),
+ (
+ opcode : A_STI;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#251;
+ flags : if_8086
+ ),
+ (
+ opcode : A_STOSB;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#170;
+ flags : if_8086
+ ),
+ (
+ opcode : A_STOSD;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #213#1#171;
+ flags : if_386
+ ),
+ (
+ opcode : A_STOSW;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #212#1#171;
+ flags : if_8086
+ ),
+ (
+ opcode : A_STR;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #2#15#0#129;
+ flags : if_286 or if_prot
+ ),
+ (
+ opcode : A_STR;
+ ops : 1;
+ optypes : (ot_reg16 or ot_bits32 or ot_bits64,ot_none,ot_none,ot_none);
+ code : #208#2#15#0#129;
+ flags : if_286 or if_prot
+ ),
+ (
+ opcode : A_SUB;
+ ops : 2;
+ optypes : (ot_rm_gpr,ot_reg16 or ot_bits32 or ot_bits64,ot_none,ot_none);
+ code : #208#1#41#65;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_SUB;
+ ops : 2;
+ optypes : (ot_reg16 or ot_bits32 or ot_bits64,ot_rm_gpr,ot_none,ot_none);
+ code : #208#1#43#72;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_SUB;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_reg8,ot_none,ot_none);
+ code : #1#40#65;
+ flags : if_8086
+ ),
+ (
+ opcode : A_SUB;
+ ops : 2;
+ optypes : (ot_reg8,ot_rm_gpr or ot_bits8,ot_none,ot_none);
+ code : #1#42#72;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_SUB;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_immediate or ot_bits8 or ot_signed,ot_none,ot_none);
+ code : #208#1#131#133#13;
+ flags : if_8086
+ ),
+ (
+ opcode : A_SUB;
+ ops : 2;
+ optypes : (ot_reg_eax,ot_immediate,ot_none,ot_none);
+ code : #213#1#45#33;
+ flags : if_386 or if_sm
+ ),
+ (
+ opcode : A_SUB;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits32,ot_immediate,ot_none,ot_none);
+ code : #208#1#129#133#33;
+ flags : if_386 or if_sm
+ ),
+ (
+ opcode : A_SUB;
+ ops : 2;
+ optypes : (ot_reg_ax,ot_immediate,ot_none,ot_none);
+ code : #212#1#45#25;
+ flags : if_8086 or if_sw
+ ),
+ (
+ opcode : A_SUB;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16,ot_immediate,ot_none,ot_none);
+ code : #212#1#129#133#25;
+ flags : if_8086 or if_sw
+ ),
+ (
+ opcode : A_SUB;
+ ops : 2;
+ optypes : (ot_reg_al,ot_immediate,ot_none,ot_none);
+ code : #1#44#17;
+ flags : if_8086 or if_sb
+ ),
+ (
+ opcode : A_SUB;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
+ code : #1#128#133#17;
+ flags : if_8086 or if_sb
+ ),
+ (
+ opcode : A_SVDC;
+ ops : 2;
+ optypes : (ot_memory or ot_bits80,ot_reg_sreg,ot_none,ot_none);
+ code : #2#15#120#65;
+ flags : if_486 or if_cyrix or if_smm
+ ),
+ (
+ opcode : A_SVLDT;
+ ops : 1;
+ optypes : (ot_memory or ot_bits80,ot_none,ot_none,ot_none);
+ code : #2#15#122#128;
+ flags : if_486 or if_cyrix or if_smm
+ ),
+ (
+ opcode : A_SVTS;
+ ops : 1;
+ optypes : (ot_memory or ot_bits80,ot_none,ot_none,ot_none);
+ code : #2#15#124#128;
+ flags : if_486 or if_cyrix or if_smm
+ ),
+ (
+ opcode : A_SYSCALL;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#15#5;
+ flags : if_p6 or if_amd
+ ),
+ (
+ opcode : A_SYSENTER;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#15#52;
+ flags : if_p6
+ ),
+ (
+ opcode : A_SYSEXIT;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#15#53;
+ flags : if_p6 or if_priv
+ ),
+ (
+ opcode : A_SYSRET;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#15#7;
+ flags : if_p6 or if_priv or if_amd
+ ),
+ (
+ opcode : A_TEST;
+ ops : 2;
+ optypes : (ot_rm_gpr,ot_reg16 or ot_bits32 or ot_bits64,ot_none,ot_none);
+ code : #208#1#133#65;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_TEST;
+ ops : 2;
+ optypes : (ot_reg16 or ot_bits32 or ot_bits64,ot_memory,ot_none,ot_none);
+ code : #208#1#133#72;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_TEST;
+ ops : 2;
+ optypes : (ot_reg8,ot_reg8,ot_none,ot_none);
+ code : #1#132#65;
+ flags : if_8086
+ ),
+ (
+ opcode : A_TEST;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_reg8,ot_none,ot_none);
+ code : #1#132#65;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_TEST;
+ ops : 2;
+ optypes : (ot_reg_eax,ot_immediate,ot_none,ot_none);
+ code : #213#1#169#33;
+ flags : if_386 or if_sm
+ ),
+ (
+ opcode : A_TEST;
+ ops : 2;
+ optypes : (ot_reg_ax,ot_immediate,ot_none,ot_none);
+ code : #212#1#169#25;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_TEST;
+ ops : 2;
+ optypes : (ot_reg_al,ot_immediate,ot_none,ot_none);
+ code : #1#168#17;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_TEST;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits32,ot_immediate,ot_none,ot_none);
+ code : #213#1#247#128#33;
+ flags : if_386 or if_sm
+ ),
+ (
+ opcode : A_TEST;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16,ot_immediate,ot_none,ot_none);
+ code : #212#1#247#128#25;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_TEST;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
+ code : #1#246#128#17;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_TEST;
+ ops : 2;
+ optypes : (ot_memory,ot_immediate or ot_bits32,ot_none,ot_none);
+ code : #213#1#247#128#33;
+ flags : if_386 or if_sm
+ ),
+ (
+ opcode : A_TEST;
+ ops : 2;
+ optypes : (ot_memory,ot_immediate or ot_bits16,ot_none,ot_none);
+ code : #212#1#247#128#25;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_TEST;
+ ops : 2;
+ optypes : (ot_memory,ot_immediate or ot_bits8,ot_none,ot_none);
+ code : #1#246#128#17;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_UD1;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#15#185;
+ flags : if_286 or if_undoc
+ ),
+ (
+ opcode : A_UD2;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#15#11;
+ flags : if_286
+ ),
+ (
+ opcode : A_UMOV;
+ ops : 2;
+ optypes : (ot_rm_gpr,ot_reg16 or ot_bits32 or ot_bits64,ot_none,ot_none);
+ code : #208#2#15#17#65;
+ flags : if_386 or if_undoc or if_sm
+ ),
+ (
+ opcode : A_UMOV;
+ ops : 2;
+ optypes : (ot_reg16 or ot_bits32 or ot_bits64,ot_memory,ot_none,ot_none);
+ code : #208#2#15#19#72;
+ flags : if_386 or if_undoc or if_sm
+ ),
+ (
+ opcode : A_UMOV;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_reg8,ot_none,ot_none);
+ code : #2#15#16#65;
+ flags : if_386 or if_undoc
+ ),
+ (
+ opcode : A_UMOV;
+ ops : 2;
+ optypes : (ot_reg8,ot_rm_gpr or ot_bits8,ot_none,ot_none);
+ code : #2#15#18#72;
+ flags : if_386 or if_undoc
+ ),
+ (
+ opcode : A_VERR;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #2#15#0#132;
+ flags : if_286 or if_prot
+ ),
+ (
+ opcode : A_VERR;
+ ops : 1;
+ optypes : (ot_memory or ot_bits16,ot_none,ot_none,ot_none);
+ code : #2#15#0#132;
+ flags : if_286 or if_prot
+ ),
+ (
+ opcode : A_VERR;
+ ops : 1;
+ optypes : (ot_reg16,ot_none,ot_none,ot_none);
+ code : #2#15#0#132;
+ flags : if_286 or if_prot
+ ),
+ (
+ opcode : A_VERW;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #2#15#0#133;
+ flags : if_286 or if_prot
+ ),
+ (
+ opcode : A_VERW;
+ ops : 1;
+ optypes : (ot_memory or ot_bits16,ot_none,ot_none,ot_none);
+ code : #2#15#0#133;
+ flags : if_286 or if_prot
+ ),
+ (
+ opcode : A_VERW;
+ ops : 1;
+ optypes : (ot_reg16,ot_none,ot_none,ot_none);
+ code : #2#15#0#133;
+ flags : if_286 or if_prot
+ ),
+ (
+ opcode : A_WAIT;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#155;
+ flags : if_8086
+ ),
+ (
+ opcode : A_WBINVD;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#15#9;
+ flags : if_486 or if_priv
+ ),
+ (
+ opcode : A_WRSHR;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#15#55;
+ flags : if_p6 or if_cyrix or if_smm
+ ),
+ (
+ opcode : A_WRMSR;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#15#48;
+ flags : if_pent or if_priv
+ ),
+ (
+ opcode : A_XADD;
+ ops : 2;
+ optypes : (ot_memory,ot_reg16 or ot_bits32 or ot_bits64,ot_none,ot_none);
+ code : #208#2#15#193#65;
+ flags : if_486 or if_sm
+ ),
+ (
+ opcode : A_XADD;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_reg8,ot_none,ot_none);
+ code : #2#15#192#65;
+ flags : if_486
+ ),
+ (
+ opcode : A_XADD;
+ ops : 2;
+ optypes : (ot_reg8,ot_reg8,ot_none,ot_none);
+ code : #2#15#192#65;
+ flags : if_486
+ ),
+ (
+ opcode : A_XADD;
+ ops : 2;
+ optypes : (ot_reg16,ot_reg16,ot_none,ot_none);
+ code : #208#2#15#193#65;
+ flags : if_486
+ ),
+ (
+ opcode : A_XADD;
+ ops : 2;
+ optypes : (ot_reg32,ot_reg32,ot_none,ot_none);
+ code : #209#2#15#193#65;
+ flags : if_486
+ ),
+ (
+ opcode : A_XBTS;
+ ops : 2;
+ optypes : (ot_reg16,ot_memory,ot_none,ot_none);
+ code : #212#2#15#166#72;
+ flags : if_386 or if_sw or if_undoc
+ ),
+ (
+ opcode : A_XBTS;
+ ops : 2;
+ optypes : (ot_reg16,ot_reg16,ot_none,ot_none);
+ code : #212#2#15#166#72;
+ flags : if_386 or if_undoc
+ ),
+ (
+ opcode : A_XBTS;
+ ops : 2;
+ optypes : (ot_reg32,ot_memory,ot_none,ot_none);
+ code : #213#2#15#166#72;
+ flags : if_386 or if_sd or if_undoc
+ ),
+ (
+ opcode : A_XBTS;
+ ops : 2;
+ optypes : (ot_reg32,ot_reg32,ot_none,ot_none);
+ code : #213#2#15#166#72;
+ flags : if_386 or if_undoc
+ ),
+ (
+ opcode : A_XCHG;
+ ops : 2;
+ optypes : (ot_reg_ax,ot_reg16,ot_none,ot_none);
+ code : #212#9#144;
+ flags : if_8086
+ ),
+ (
+ opcode : A_XCHG;
+ ops : 2;
+ optypes : (ot_reg_eax,ot_reg32,ot_none,ot_none);
+ code : #213#9#144;
+ flags : if_386
+ ),
+ (
+ opcode : A_XCHG;
+ ops : 2;
+ optypes : (ot_reg16,ot_reg_ax,ot_none,ot_none);
+ code : #212#8#144;
+ flags : if_8086
+ ),
+ (
+ opcode : A_XCHG;
+ ops : 2;
+ optypes : (ot_reg32,ot_reg_eax,ot_none,ot_none);
+ code : #213#8#144;
+ flags : if_386
+ ),
+ (
+ opcode : A_XCHG;
+ ops : 2;
+ optypes : (ot_reg16 or ot_bits32 or ot_bits64,ot_rm_gpr,ot_none,ot_none);
+ code : #208#1#135#72;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_XCHG;
+ ops : 2;
+ optypes : (ot_memory,ot_reg16 or ot_bits32 or ot_bits64,ot_none,ot_none);
+ code : #208#1#135#65;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_XCHG;
+ ops : 2;
+ optypes : (ot_reg8,ot_rm_gpr or ot_bits8,ot_none,ot_none);
+ code : #1#134#72;
+ flags : if_8086
+ ),
+ (
+ opcode : A_XCHG;
+ ops : 2;
+ optypes : (ot_memory or ot_bits8,ot_reg8,ot_none,ot_none);
+ code : #1#134#65;
+ flags : if_8086
+ ),
+ (
+ opcode : A_XLAT;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#215;
+ flags : if_8086
+ ),
+ (
+ opcode : A_XLATB;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #1#215;
+ flags : if_8086
+ ),
+ (
+ opcode : A_XOR;
+ ops : 2;
+ optypes : (ot_rm_gpr,ot_reg16 or ot_bits32 or ot_bits64,ot_none,ot_none);
+ code : #208#1#49#65;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_XOR;
+ ops : 2;
+ optypes : (ot_reg16 or ot_bits32 or ot_bits64,ot_rm_gpr,ot_none,ot_none);
+ code : #208#1#51#72;
+ flags : if_8086 or if_sm
+ ),
+ (
+ opcode : A_XOR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_reg8,ot_none,ot_none);
+ code : #1#48#65;
+ flags : if_8086
+ ),
+ (
+ opcode : A_XOR;
+ ops : 2;
+ optypes : (ot_reg8,ot_rm_gpr or ot_bits8,ot_none,ot_none);
+ code : #1#50#72;
+ flags : if_8086
+ ),
+ (
+ opcode : A_XOR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16 or ot_bits32 or ot_bits64,ot_immediate or ot_bits8 or ot_signed,ot_none,ot_none);
+ code : #208#1#131#134#13;
+ flags : if_8086
+ ),
+ (
+ opcode : A_XOR;
+ ops : 2;
+ optypes : (ot_reg_eax,ot_immediate,ot_none,ot_none);
+ code : #213#1#53#33;
+ flags : if_386 or if_sm
+ ),
+ (
+ opcode : A_XOR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits32,ot_immediate,ot_none,ot_none);
+ code : #208#1#129#134#33;
+ flags : if_386 or if_sm
+ ),
+ (
+ opcode : A_XOR;
+ ops : 2;
+ optypes : (ot_reg_ax,ot_immediate,ot_none,ot_none);
+ code : #212#1#53#25;
+ flags : if_8086 or if_sw
+ ),
+ (
+ opcode : A_XOR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits16,ot_immediate,ot_none,ot_none);
+ code : #212#1#129#134#25;
+ flags : if_8086 or if_sw
+ ),
+ (
+ opcode : A_XOR;
+ ops : 2;
+ optypes : (ot_reg_al,ot_immediate,ot_none,ot_none);
+ code : #1#52#17;
+ flags : if_8086 or if_sb
+ ),
+ (
+ opcode : A_XOR;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits8,ot_immediate,ot_none,ot_none);
+ code : #1#128#134#17;
+ flags : if_8086 or if_sb
+ ),
+ (
+ opcode : A_XSTORE;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #3#15#167#192;
+ flags : if_p6 or if_cyrix
+ ),
+ (
+ opcode : A_XCRYPTECB;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #219#3#15#167#200;
+ flags : if_p6 or if_cyrix
+ ),
+ (
+ opcode : A_XCRYPTCBC;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #219#3#15#167#208;
+ flags : if_p6 or if_cyrix
+ ),
+ (
+ opcode : A_XCRYPTCFB;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #219#3#15#167#224;
+ flags : if_p6 or if_cyrix
+ ),
+ (
+ opcode : A_XCRYPTOFB;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #219#3#15#167#232;
+ flags : if_p6 or if_cyrix
+ ),
+ (
+ opcode : A_CMOVcc;
+ ops : 2;
+ optypes : (ot_reg16 or ot_bits32 or ot_bits64,ot_rm_gpr,ot_none,ot_none);
+ code : #208#1#15#11#64#72;
+ flags : if_p6 or if_sm
+ ),
+ (
+ opcode : A_Jcc;
+ ops : 1;
+ optypes : (ot_immediate or ot_bits8,ot_none,ot_none,ot_none);
+ code : #11#112#40;
+ flags : if_8086
+ ),
+ (
+ opcode : A_Jcc;
+ ops : 1;
+ optypes : (ot_immediate or ot_bits16 or ot_bits32,ot_none,ot_none,ot_none);
+ code : #208#1#15#11#128#52;
+ flags : if_386 or if_pass2
+ ),
+ (
+ opcode : A_Jcc;
+ ops : 1;
+ optypes : (ot_immediate or ot_short,ot_none,ot_none,ot_none);
+ code : #11#112#40;
+ flags : if_8086
+ ),
+ (
+ opcode : A_Jcc;
+ ops : 1;
+ optypes : (ot_immediate or ot_near,ot_none,ot_none,ot_none);
+ code : #208#1#15#11#128#52;
+ flags : if_386 or if_pass2
+ ),
+ (
+ opcode : A_SETcc;
+ ops : 1;
+ optypes : (ot_rm_gpr or ot_bits8,ot_none,ot_none,ot_none);
+ code : #1#15#11#144#128;
+ flags : if_386
+ ),
+ (
+ opcode : A_ADDPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #217#2#15#88#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_ADDSS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #219#2#15#88#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_ANDNPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #2#15#85#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_ANDPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #2#15#84#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_CMPEQPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #217#2#15#194#72#1#0;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_CMPEQSS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #219#2#15#194#72#1#0;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_CMPLEPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #217#2#15#194#72#1#2;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_CMPLESS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #219#2#15#194#72#1#2;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_CMPLTPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #217#2#15#194#72#1#1;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_CMPLTSS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #219#2#15#194#72#1#1;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_CMPNEQPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #217#2#15#194#72#1#4;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_CMPNEQSS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #219#2#15#194#72#1#4;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_CMPNLEPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #217#2#15#194#72#1#6;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_CMPNLESS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #219#2#15#194#72#1#6;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_CMPNLTPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #217#2#15#194#72#1#5;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_CMPNLTSS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #219#2#15#194#72#1#5;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_CMPORDPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #217#2#15#194#72#1#7;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_CMPORDSS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #219#2#15#194#72#1#7;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_CMPUNORDPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #217#2#15#194#72#1#3;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_CMPUNORDSS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #219#2#15#194#72#1#3;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_CMPPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate,ot_none);
+ code : #217#2#15#194#72#18;
+ flags : if_katmai or if_sse or if_sb or if_ar2
+ ),
+ (
+ opcode : A_CMPSS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate,ot_none);
+ code : #219#2#15#194#72#18;
+ flags : if_katmai or if_sse or if_sb or if_ar2
+ ),
+ (
+ opcode : A_COMISS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #2#15#47#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_CVTPI2PS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_mmxrm,ot_none,ot_none);
+ code : #217#2#15#42#72;
+ flags : if_katmai or if_sse or if_mmx
+ ),
+ (
+ opcode : A_CVTPS2PI;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_memory or ot_bits64,ot_none,ot_none);
+ code : #217#2#15#45#72;
+ flags : if_katmai or if_sse or if_mmx
+ ),
+ (
+ opcode : A_CVTPS2PI;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_xmmreg,ot_none,ot_none);
+ code : #217#2#15#45#72;
+ flags : if_katmai or if_sse or if_mmx
+ ),
+ (
+ opcode : A_CVTSI2SS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_rm_gpr or ot_bits32,ot_none,ot_none);
+ code : #219#209#2#15#42#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_CVTSS2SI;
+ ops : 2;
+ optypes : (ot_reg32 or ot_bits64,ot_memory or ot_bits32,ot_none,ot_none);
+ code : #219#208#2#15#45#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_CVTSS2SI;
+ ops : 2;
+ optypes : (ot_reg32 or ot_bits64,ot_xmmreg,ot_none,ot_none);
+ code : #219#208#2#15#45#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_CVTTPS2PI;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_memory or ot_bits64,ot_none,ot_none);
+ code : #217#2#15#44#72;
+ flags : if_katmai or if_sse or if_mmx
+ ),
+ (
+ opcode : A_CVTTPS2PI;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_xmmreg,ot_none,ot_none);
+ code : #217#2#15#44#72;
+ flags : if_katmai or if_sse or if_mmx
+ ),
+ (
+ opcode : A_CVTTSS2SI;
+ ops : 2;
+ optypes : (ot_reg32 or ot_bits64,ot_memory or ot_bits32,ot_none,ot_none);
+ code : #219#208#2#15#44#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_CVTTSS2SI;
+ ops : 2;
+ optypes : (ot_reg32 or ot_bits64,ot_xmmreg,ot_none,ot_none);
+ code : #219#208#2#15#44#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_DIVPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #217#2#15#94#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_DIVSS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #219#2#15#94#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_LDMXCSR;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #2#15#174#130;
+ flags : if_katmai or if_sse or if_sd
+ ),
+ (
+ opcode : A_MAXPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #217#2#15#95#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_MAXSS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #219#2#15#95#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_MINPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #217#2#15#93#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_MINSS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #219#2#15#93#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_MOVAPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #2#15#40#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_MOVAPS;
+ ops : 2;
+ optypes : (ot_xmmrm,ot_xmmreg,ot_none,ot_none);
+ code : #2#15#41#65;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_MOVHPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory,ot_none,ot_none);
+ code : #2#15#22#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_MOVHPS;
+ ops : 2;
+ optypes : (ot_memory,ot_xmmreg,ot_none,ot_none);
+ code : #2#15#23#65;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_MOVLHPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #2#15#22#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_MOVLPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory,ot_none,ot_none);
+ code : #2#15#18#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_MOVLPS;
+ ops : 2;
+ optypes : (ot_memory,ot_xmmreg,ot_none,ot_none);
+ code : #2#15#19#65;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_MOVHLPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #2#15#18#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_MOVMSKPS;
+ ops : 2;
+ optypes : (ot_reg32,ot_xmmreg,ot_none,ot_none);
+ code : #2#15#80#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_MOVNTPS;
+ ops : 2;
+ optypes : (ot_memory,ot_xmmreg,ot_none,ot_none);
+ code : #2#15#43#65;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_MOVSS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #219#2#15#16#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_MOVSS;
+ ops : 2;
+ optypes : (ot_xmmrm,ot_xmmreg,ot_none,ot_none);
+ code : #219#2#15#17#65;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_MOVUPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #217#2#15#16#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_MOVUPS;
+ ops : 2;
+ optypes : (ot_xmmrm,ot_xmmreg,ot_none,ot_none);
+ code : #217#2#15#17#65;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_MULPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #2#15#89#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_MULSS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #219#2#15#89#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_ORPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #2#15#86#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_RCPPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #217#2#15#83#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_RCPSS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #219#2#15#83#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_RSQRTPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #217#2#15#82#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_RSQRTSS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #219#2#15#82#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_SHUFPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate,ot_none);
+ code : #2#15#198#72#18;
+ flags : if_katmai or if_sse or if_sb or if_ar2
+ ),
+ (
+ opcode : A_SQRTPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #217#2#15#81#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_SQRTSS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #219#2#15#81#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_STMXCSR;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #2#15#174#131;
+ flags : if_katmai or if_sse or if_sd
+ ),
+ (
+ opcode : A_SUBPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #217#2#15#92#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_SUBSS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #219#2#15#92#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_UCOMISS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #2#15#46#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_UNPCKHPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #2#15#21#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_UNPCKLPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #2#15#20#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_XORPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #2#15#87#72;
+ flags : if_katmai or if_sse
+ ),
+ (
+ opcode : A_FXRSTOR;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #2#15#174#129;
+ flags : if_p6 or if_sse or if_fpu
+ ),
+ (
+ opcode : A_FXSAVE;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #2#15#174#128;
+ flags : if_p6 or if_sse or if_fpu
+ ),
+ (
+ opcode : A_PREFETCHNTA;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #2#15#24#128;
+ flags : if_katmai
+ ),
+ (
+ opcode : A_PREFETCHT0;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #2#15#24#129;
+ flags : if_katmai
+ ),
+ (
+ opcode : A_PREFETCHT1;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #2#15#24#130;
+ flags : if_katmai
+ ),
+ (
+ opcode : A_PREFETCHT2;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #2#15#24#131;
+ flags : if_katmai
+ ),
+ (
+ opcode : A_SFENCE;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #3#15#174#248;
+ flags : if_katmai
+ ),
+ (
+ opcode : A_MASKMOVQ;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxreg,ot_none,ot_none);
+ code : #2#15#247#72;
+ flags : if_katmai or if_mmx
+ ),
+ (
+ opcode : A_MOVNTQ;
+ ops : 2;
+ optypes : (ot_memory,ot_mmxreg,ot_none,ot_none);
+ code : #2#15#231#65;
+ flags : if_katmai or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PAVGB;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#224#72;
+ flags : if_katmai or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PAVGB;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#224#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PAVGW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#227#72;
+ flags : if_katmai or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PAVGW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#227#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PEXTRW;
+ ops : 3;
+ optypes : (ot_reg32,ot_mmxreg,ot_immediate,ot_none);
+ code : #2#15#197#72#18;
+ flags : if_katmai or if_mmx or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PEXTRW;
+ ops : 3;
+ optypes : (ot_reg32,ot_xmmreg,ot_immediate,ot_none);
+ code : #241#2#15#197#72#22;
+ flags : if_sse41
+ ),
+ (
+ opcode : A_PEXTRW;
+ ops : 3;
+ optypes : (ot_memory or ot_bits32,ot_xmmreg,ot_immediate,ot_none);
+ code : #241#3#15#58#21#65#22;
+ flags : if_sse41
+ ),
+ (
+ opcode : A_PINSRW;
+ ops : 3;
+ optypes : (ot_mmxreg,ot_reg16,ot_immediate,ot_none);
+ code : #2#15#196#72#18;
+ flags : if_katmai or if_mmx or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PINSRW;
+ ops : 3;
+ optypes : (ot_mmxreg,ot_reg32,ot_immediate,ot_none);
+ code : #2#15#196#72#18;
+ flags : if_katmai or if_mmx or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PINSRW;
+ ops : 3;
+ optypes : (ot_mmxreg,ot_memory,ot_immediate,ot_none);
+ code : #2#15#196#72#18;
+ flags : if_katmai or if_mmx or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PINSRW;
+ ops : 3;
+ optypes : (ot_mmxreg,ot_memory or ot_bits16,ot_immediate,ot_none);
+ code : #2#15#196#72#18;
+ flags : if_katmai or if_mmx or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PINSRW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_reg16,ot_immediate,ot_none);
+ code : #241#2#15#196#72#22;
+ flags : if_willamette or if_sse2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PINSRW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_reg32,ot_immediate,ot_none);
+ code : #241#2#15#196#72#22;
+ flags : if_willamette or if_sse2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PINSRW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_memory,ot_immediate,ot_none);
+ code : #241#2#15#196#72#22;
+ flags : if_willamette or if_sse2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PINSRW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_memory or ot_bits16,ot_immediate,ot_none);
+ code : #241#2#15#196#72#22;
+ flags : if_willamette or if_sse2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PMAXSW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#238#72;
+ flags : if_katmai or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PMAXSW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#238#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PMAXUB;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#222#72;
+ flags : if_katmai or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PMAXUB;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#222#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PMINSW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#234#72;
+ flags : if_katmai or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PMINSW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#234#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PMINUB;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#218#72;
+ flags : if_katmai or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PMINUB;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#218#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PMOVMSKB;
+ ops : 2;
+ optypes : (ot_reg32,ot_mmxreg,ot_none,ot_none);
+ code : #2#15#215#72;
+ flags : if_katmai or if_mmx
+ ),
+ (
+ opcode : A_PMOVMSKB;
+ ops : 2;
+ optypes : (ot_reg32,ot_xmmreg,ot_none,ot_none);
+ code : #241#2#15#215#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_PMULHUW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#228#72;
+ flags : if_katmai or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PMULHUW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#228#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PSADBW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#246#72;
+ flags : if_katmai or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PSADBW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#246#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PSHUFW;
+ ops : 3;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_immediate,ot_none);
+ code : #2#15#112#72#18;
+ flags : if_katmai or if_mmx or if_sm2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PFNACC;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#15#72#1#138;
+ flags : if_pent or if_3dnow or if_sm
+ ),
+ (
+ opcode : A_PFPNACC;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#15#72#1#142;
+ flags : if_pent or if_3dnow or if_sm
+ ),
+ (
+ opcode : A_PI2FW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#15#72#1#12;
+ flags : if_pent or if_3dnow or if_sm
+ ),
+ (
+ opcode : A_PF2IW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#15#72#1#28;
+ flags : if_pent or if_3dnow or if_sm
+ ),
+ (
+ opcode : A_PSWAPD;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#15#72#1#187;
+ flags : if_pent or if_3dnow or if_sm
+ ),
+ (
+ opcode : A_FFREEP;
+ ops : 1;
+ optypes : (ot_fpureg,ot_none,ot_none,ot_none);
+ code : #1#223#8#192;
+ flags : if_pent or if_3dnow or if_fpu
+ ),
+ (
+ opcode : A_MASKMOVDQU;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #241#2#15#247#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_CLFLUSH;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #2#15#174#135;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_MOVNTDQ;
+ ops : 2;
+ optypes : (ot_memory,ot_xmmreg,ot_none,ot_none);
+ code : #241#2#15#231#65;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_MOVNTI;
+ ops : 2;
+ optypes : (ot_memory,ot_reg32 or ot_bits64,ot_none,ot_none);
+ code : #208#2#15#195#65;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_MOVNTPD;
+ ops : 2;
+ optypes : (ot_memory,ot_xmmreg,ot_none,ot_none);
+ code : #241#2#15#43#65;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PAUSE;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #219#1#144;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_LFENCE;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #3#15#174#232;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_MFENCE;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #3#15#174#240;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_MOVDQA;
+ ops : 2;
+ optypes : (ot_xmmrm,ot_xmmreg,ot_none,ot_none);
+ code : #241#2#15#127#65;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_MOVDQA;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#111#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_MOVDQU;
+ ops : 2;
+ optypes : (ot_xmmrm,ot_xmmreg,ot_none,ot_none);
+ code : #219#2#15#127#65;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_MOVDQU;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #219#2#15#111#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_MOVDQ2Q;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_xmmreg,ot_none,ot_none);
+ code : #220#2#15#214#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_MOVQ2DQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_mmxreg,ot_none,ot_none);
+ code : #219#2#15#214#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_PADDQ;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#212#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PADDQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#212#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PMULUDQ;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#244#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PMULUDQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#244#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PSHUFD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate,ot_none);
+ code : #241#2#15#112#72#18;
+ flags : if_willamette or if_sse2 or if_sm2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PSHUFHW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate,ot_none);
+ code : #219#2#15#112#72#18;
+ flags : if_willamette or if_sse2 or if_sm2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PSHUFLW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate,ot_none);
+ code : #220#2#15#112#72#18;
+ flags : if_willamette or if_sse2 or if_sm2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PSRLDQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_immediate,ot_none,ot_none);
+ code : #241#2#15#115#131#21;
+ flags : if_willamette or if_sse2 or if_sb or if_ar1
+ ),
+ (
+ opcode : A_PSUBQ;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #2#15#251#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PSUBQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#251#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PUNPCKHQDQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#109#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_PUNPCKLQDQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#108#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_ADDPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#88#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_ADDSD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #220#2#15#88#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_ANDNPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#85#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_ANDPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#84#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_CMPEQPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#194#72#1#0;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_CMPEQSD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #220#2#15#194#72#1#0;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_CMPLEPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#194#72#1#2;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_CMPLESD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #220#2#15#194#72#1#2;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_CMPLTPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#194#72#1#1;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_CMPLTSD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #220#2#15#194#72#1#1;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_CMPNEQPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#194#72#1#4;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_CMPNEQSD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #220#2#15#194#72#1#4;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_CMPNLEPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#194#72#1#6;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_CMPNLESD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #220#2#15#194#72#1#6;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_CMPNLTPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#194#72#1#5;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_CMPNLTSD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #220#2#15#194#72#1#5;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_CMPORDPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#194#72#1#7;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_CMPORDSD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #220#2#15#194#72#1#7;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_CMPUNORDPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#194#72#1#3;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_CMPUNORDSD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #220#2#15#194#72#1#3;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_CMPPD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate,ot_none);
+ code : #241#2#15#194#72#22;
+ flags : if_willamette or if_sse2 or if_sm2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_COMISD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#47#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_CVTDQ2PD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #219#2#15#230#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_CVTDQ2PD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory or ot_bits64,ot_none,ot_none);
+ code : #219#2#15#230#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_CVTDQ2PS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #2#15#91#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_CVTPD2DQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #220#2#15#230#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_CVTPD2PI;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#45#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_CVTPD2PS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#90#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_CVTPI2PD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_mmxrm,ot_none,ot_none);
+ code : #241#2#15#42#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_CVTPS2DQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#91#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_CVTPS2PD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #2#15#90#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_CVTPS2PD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory or ot_bits64,ot_none,ot_none);
+ code : #2#15#90#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_CVTSD2SI;
+ ops : 2;
+ optypes : (ot_reg32,ot_xmmreg,ot_none,ot_none);
+ code : #220#2#15#45#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_CVTSD2SI;
+ ops : 2;
+ optypes : (ot_reg32,ot_memory or ot_bits64,ot_none,ot_none);
+ code : #220#2#15#45#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_CVTSD2SS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #220#2#15#90#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_CVTSD2SS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory or ot_bits64,ot_none,ot_none);
+ code : #220#2#15#90#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_CVTSI2SD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_rm_gpr or ot_bits32,ot_none,ot_none);
+ code : #220#2#15#42#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_CVTSS2SD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #219#2#15#90#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_CVTSS2SD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory or ot_bits32,ot_none,ot_none);
+ code : #219#2#15#90#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_CVTTPD2PI;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#44#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_CVTTPD2DQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#230#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_CVTTPS2DQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #219#2#15#91#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_CVTTSD2SI;
+ ops : 2;
+ optypes : (ot_reg32 or ot_bits64,ot_xmmreg,ot_none,ot_none);
+ code : #220#208#2#15#44#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_CVTTSD2SI;
+ ops : 2;
+ optypes : (ot_reg32 or ot_bits64,ot_memory or ot_bits64,ot_none,ot_none);
+ code : #220#208#2#15#44#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_DIVPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#94#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_DIVSD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #220#2#15#94#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_MAXPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#95#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_MAXSD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #220#2#15#95#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_MINPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#93#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_MINSD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #220#2#15#93#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_MOVAPD;
+ ops : 2;
+ optypes : (ot_xmmrm,ot_xmmreg,ot_none,ot_none);
+ code : #241#2#15#41#65;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_MOVAPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#40#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_MOVHPD;
+ ops : 2;
+ optypes : (ot_memory,ot_xmmreg,ot_none,ot_none);
+ code : #241#2#15#23#65;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_MOVHPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory,ot_none,ot_none);
+ code : #241#2#15#22#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_MOVLPD;
+ ops : 2;
+ optypes : (ot_memory,ot_xmmreg,ot_none,ot_none);
+ code : #241#2#15#19#65;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_MOVLPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory,ot_none,ot_none);
+ code : #241#2#15#18#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_MOVMSKPD;
+ ops : 2;
+ optypes : (ot_reg32,ot_xmmreg,ot_none,ot_none);
+ code : #241#2#15#80#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_MOVUPD;
+ ops : 2;
+ optypes : (ot_xmmrm,ot_xmmreg,ot_none,ot_none);
+ code : #241#2#15#17#65;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_MOVUPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#16#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_MULPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#89#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_MULSD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #220#2#15#89#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_ORPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#86#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_SHUFPD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate,ot_none);
+ code : #241#2#15#198#72#22;
+ flags : if_willamette or if_sse2 or if_sm2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_SQRTPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#81#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_SQRTSD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #220#2#15#81#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_SUBPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#92#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_SUBSD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #220#2#15#92#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_UCOMISD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#46#72;
+ flags : if_willamette or if_sse2
+ ),
+ (
+ opcode : A_UNPCKHPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#21#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_UNPCKLPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#20#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_XORPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#87#72;
+ flags : if_willamette or if_sse2 or if_sm
+ ),
+ (
+ opcode : A_ADDSUBPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#208#72;
+ flags : if_prescott or if_sse3 or if_sm
+ ),
+ (
+ opcode : A_ADDSUBPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #220#2#15#208#72;
+ flags : if_prescott or if_sse3 or if_sm
+ ),
+ (
+ opcode : A_HADDPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#124#72;
+ flags : if_prescott or if_sse3 or if_sm
+ ),
+ (
+ opcode : A_HADDPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #220#2#15#124#72;
+ flags : if_prescott or if_sse3 or if_sm
+ ),
+ (
+ opcode : A_HSUBPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#2#15#125#72;
+ flags : if_prescott or if_sse3 or if_sm
+ ),
+ (
+ opcode : A_HSUBPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #220#2#15#125#72;
+ flags : if_prescott or if_sse3 or if_sm
+ ),
+ (
+ opcode : A_LDDQU;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory,ot_none,ot_none);
+ code : #220#2#15#240#72;
+ flags : if_prescott or if_sse3
+ ),
+ (
+ opcode : A_MOVDDUP;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #220#2#15#18#72;
+ flags : if_prescott or if_sse3
+ ),
+ (
+ opcode : A_MOVSHDUP;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #219#2#15#22#72;
+ flags : if_prescott or if_sse3 or if_sm
+ ),
+ (
+ opcode : A_MOVSLDUP;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #219#2#15#18#72;
+ flags : if_prescott or if_sse3 or if_sm
+ ),
+ (
+ opcode : A_VMREAD;
+ ops : 2;
+ optypes : (ot_reg32,ot_reg32,ot_none,ot_none);
+ code : #2#15#120#65;
+ flags : if_386 or if_priv or if_prot
+ ),
+ (
+ opcode : A_VMREAD;
+ ops : 2;
+ optypes : (ot_memory,ot_reg32,ot_none,ot_none);
+ code : #2#15#120#65;
+ flags : if_386 or if_priv or if_prot or if_sm
+ ),
+ (
+ opcode : A_VMWRITE;
+ ops : 2;
+ optypes : (ot_reg32,ot_reg32,ot_none,ot_none);
+ code : #2#15#121#72;
+ flags : if_386 or if_priv or if_prot
+ ),
+ (
+ opcode : A_VMWRITE;
+ ops : 2;
+ optypes : (ot_reg32,ot_memory,ot_none,ot_none);
+ code : #2#15#121#72;
+ flags : if_386 or if_priv or if_prot or if_sm
+ ),
+ (
+ opcode : A_VMCALL;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #3#15#1#193;
+ flags : if_386 or if_priv or if_prot
+ ),
+ (
+ opcode : A_VMLAUNCH;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #3#15#1#194;
+ flags : if_386 or if_priv or if_prot
+ ),
+ (
+ opcode : A_VMRESUME;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #3#15#1#195;
+ flags : if_386 or if_priv or if_prot
+ ),
+ (
+ opcode : A_VMXOFF;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #3#15#1#196;
+ flags : if_386 or if_priv or if_prot
+ ),
+ (
+ opcode : A_VMXON;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #219#2#15#199#134;
+ flags : if_priv or if_prot
+ ),
+ (
+ opcode : A_VMCLEAR;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #241#2#15#199#134;
+ flags : if_priv or if_prot
+ ),
+ (
+ opcode : A_VMPTRLD;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #2#15#199#134;
+ flags : if_priv or if_prot
+ ),
+ (
+ opcode : A_VMPTRST;
+ ops : 1;
+ optypes : (ot_memory,ot_none,ot_none,ot_none);
+ code : #2#15#199#135;
+ flags : if_priv or if_prot
+ ),
+ (
+ opcode : A_VMRUN;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #3#15#1#216;
+ flags : if_386 or if_svm or if_priv or if_prot
+ ),
+ (
+ opcode : A_VMMCALL;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #3#15#1#217;
+ flags : if_386 or if_svm
+ ),
+ (
+ opcode : A_VMLOAD;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #3#15#1#218;
+ flags : if_386 or if_svm or if_priv or if_prot
+ ),
+ (
+ opcode : A_VMSAVE;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #3#15#1#219;
+ flags : if_386 or if_svm or if_priv or if_prot
+ ),
+ (
+ opcode : A_STGI;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #3#15#1#220;
+ flags : if_386 or if_svm or if_priv or if_prot
+ ),
+ (
+ opcode : A_CLGI;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #3#15#1#221;
+ flags : if_386 or if_svm or if_priv or if_prot
+ ),
+ (
+ opcode : A_SKINIT;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #3#15#1#222;
+ flags : if_386 or if_svm or if_priv or if_prot
+ ),
+ (
+ opcode : A_INVLPGA;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #3#15#1#223;
+ flags : if_386 or if_svm or if_priv or if_prot
+ ),
+ (
+ opcode : A_MONTMUL;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #219#3#15#166#192;
+ flags : if_centaur
+ ),
+ (
+ opcode : A_XSHA1;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #219#3#15#166#200;
+ flags : if_centaur
+ ),
+ (
+ opcode : A_XSHA256;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #219#3#15#166#208;
+ flags : if_centaur
+ ),
+ (
+ opcode : A_DMINT;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#15#57;
+ flags : if_p6 or if_cyrix
+ ),
+ (
+ opcode : A_RDM;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #2#15#58;
+ flags : if_p6 or if_cyrix
+ ),
+ (
+ opcode : A_MOVNTSS;
+ ops : 2;
+ optypes : (ot_memory,ot_xmmreg,ot_none,ot_none);
+ code : #219#2#15#43#65;
+ flags : if_sse4 or if_sd
+ ),
+ (
+ opcode : A_MOVNTSD;
+ ops : 2;
+ optypes : (ot_memory,ot_xmmreg,ot_none,ot_none);
+ code : #220#213#2#15#43#65;
+ flags : if_sse4
+ ),
+ (
+ opcode : A_INSERTQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #220#2#15#121#72;
+ flags : if_sse4
+ ),
+ (
+ opcode : A_INSERTQ;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_immediate,ot_immediate);
+ code : #220#2#15#120#72#22#23;
+ flags : if_sse4 or if_sb
+ ),
+ (
+ opcode : A_EXTRQ;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_immediate,ot_immediate,ot_none);
+ code : #241#2#15#120#128#21#22;
+ flags : if_sse4 or if_sb
+ ),
+ (
+ opcode : A_EXTRQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #241#2#15#121#72;
+ flags : if_sse4
+ ),
+ (
+ opcode : A_LZCNT;
+ ops : 2;
+ optypes : (ot_reg16,ot_rm_gpr,ot_none,ot_none);
+ code : #208#219#2#15#189#72;
+ flags : if_386 or if_sm or if_sse4
+ ),
+ (
+ opcode : A_LZCNT;
+ ops : 2;
+ optypes : (ot_reg32 or ot_bits64,ot_rm_gpr,ot_none,ot_none);
+ code : #209#219#2#15#189#72;
+ flags : if_386 or if_sm or if_sse4
+ ),
+ (
+ opcode : A_PABSB;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #217#3#15#56#28#72;
+ flags : if_ssse3 or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PABSB;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#28#72;
+ flags : if_ssse3 or if_sm
+ ),
+ (
+ opcode : A_PABSW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #217#3#15#56#29#72;
+ flags : if_ssse3 or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PABSW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#29#72;
+ flags : if_ssse3 or if_sm
+ ),
+ (
+ opcode : A_PABSD;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #217#3#15#56#30#72;
+ flags : if_ssse3 or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PABSD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#30#72;
+ flags : if_ssse3 or if_sm
+ ),
+ (
+ opcode : A_PALIGNR;
+ ops : 3;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_immediate,ot_none);
+ code : #217#3#15#58#15#72#22;
+ flags : if_ssse3 or if_mmx or if_sm2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PALIGNR;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate,ot_none);
+ code : #241#3#15#58#15#72#22;
+ flags : if_ssse3 or if_sm2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PHADDW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #217#3#15#56#1#72;
+ flags : if_ssse3 or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PHADDW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#1#72;
+ flags : if_ssse3 or if_sm
+ ),
+ (
+ opcode : A_PHADDD;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #217#3#15#56#2#72;
+ flags : if_ssse3 or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PHADDD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#2#72;
+ flags : if_ssse3 or if_sm
+ ),
+ (
+ opcode : A_PHADDSW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #217#3#15#56#3#72;
+ flags : if_ssse3 or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PHADDSW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#3#72;
+ flags : if_ssse3 or if_sm
+ ),
+ (
+ opcode : A_PHSUBW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #217#3#15#56#5#72;
+ flags : if_ssse3 or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PHSUBW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#5#72;
+ flags : if_ssse3 or if_sm
+ ),
+ (
+ opcode : A_PHSUBD;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #217#3#15#56#6#72;
+ flags : if_ssse3 or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PHSUBD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#6#72;
+ flags : if_ssse3 or if_sm
+ ),
+ (
+ opcode : A_PHSUBSW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #217#3#15#56#7#72;
+ flags : if_ssse3 or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PHSUBSW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#7#72;
+ flags : if_ssse3 or if_sm
+ ),
+ (
+ opcode : A_PMADDUBSW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #217#3#15#56#4#72;
+ flags : if_ssse3 or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PMADDUBSW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#4#72;
+ flags : if_ssse3 or if_sm
+ ),
+ (
+ opcode : A_PMULHRSW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #217#3#15#56#11#72;
+ flags : if_ssse3 or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PMULHRSW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#11#72;
+ flags : if_ssse3 or if_sm
+ ),
+ (
+ opcode : A_PSHUFB;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #217#3#15#56#0#72;
+ flags : if_ssse3 or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PSHUFB;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#0#72;
+ flags : if_ssse3 or if_sm
+ ),
+ (
+ opcode : A_PSIGNB;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #217#3#15#56#8#72;
+ flags : if_ssse3 or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PSIGNB;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#8#72;
+ flags : if_ssse3 or if_sm
+ ),
+ (
+ opcode : A_PSIGNW;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #217#3#15#56#9#72;
+ flags : if_ssse3 or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PSIGNW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#9#72;
+ flags : if_ssse3 or if_sm
+ ),
+ (
+ opcode : A_PSIGND;
+ ops : 2;
+ optypes : (ot_mmxreg,ot_mmxrm,ot_none,ot_none);
+ code : #217#3#15#56#10#72;
+ flags : if_ssse3 or if_mmx or if_sm
+ ),
+ (
+ opcode : A_PSIGND;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#10#72;
+ flags : if_ssse3 or if_sm
+ ),
+ (
+ opcode : A_BLENDPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate,ot_none);
+ code : #241#3#15#58#12#72#22;
+ flags : if_sse41 or if_sm2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_BLENDPD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate,ot_none);
+ code : #241#3#15#58#13#72#22;
+ flags : if_sse41 or if_sm2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_BLENDVPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#20#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_BLENDVPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#21#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_DPPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate,ot_none);
+ code : #241#3#15#58#64#72#22;
+ flags : if_sse41 or if_sm2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_DPPD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate,ot_none);
+ code : #241#3#15#58#65#72#22;
+ flags : if_sse41 or if_sm2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_EXTRACTPS;
+ ops : 3;
+ optypes : (ot_memory,ot_xmmreg,ot_immediate,ot_none);
+ code : #241#213#3#15#58#23#65#22;
+ flags : if_sse41 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_EXTRACTPS;
+ ops : 3;
+ optypes : (ot_reg32 or ot_bits64,ot_xmmreg,ot_immediate,ot_none);
+ code : #241#3#15#58#23#65#22;
+ flags : if_sse41 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_INSERTPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate,ot_none);
+ code : #241#3#15#58#33#72#22;
+ flags : if_sse41 or if_sm2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_MOVNTDQA;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory,ot_none,ot_none);
+ code : #241#3#15#56#42#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_MPSADBW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate,ot_none);
+ code : #241#3#15#58#66#72#22;
+ flags : if_sse41 or if_sm2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PACKUSDW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#43#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_PBLENDVB;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#16#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_PBLENDW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate,ot_none);
+ code : #241#3#15#58#14#72#22;
+ flags : if_sse41 or if_sm2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PCMPEQQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#41#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_PEXTRB;
+ ops : 3;
+ optypes : (ot_reg32 or ot_bits64,ot_xmmreg,ot_immediate,ot_none);
+ code : #241#3#15#58#20#65#22;
+ flags : if_sse41 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PEXTRB;
+ ops : 3;
+ optypes : (ot_memory or ot_bits8,ot_xmmreg,ot_immediate,ot_none);
+ code : #241#3#15#58#20#65#22;
+ flags : if_sse41 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PEXTRD;
+ ops : 3;
+ optypes : (ot_reg32,ot_xmmreg,ot_immediate,ot_none);
+ code : #241#3#15#58#22#65#22;
+ flags : if_sse41 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PEXTRD;
+ ops : 3;
+ optypes : (ot_memory or ot_bits32,ot_xmmreg,ot_immediate,ot_none);
+ code : #241#3#15#58#22#65#22;
+ flags : if_sse41 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PHMINPOSUW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#65#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_PINSRB;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_reg32 or ot_bits64,ot_immediate,ot_none);
+ code : #241#3#15#58#32#72#22;
+ flags : if_sse41 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PINSRB;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_memory or ot_bits8,ot_immediate,ot_none);
+ code : #241#3#15#58#32#72#22;
+ flags : if_sse41 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PINSRD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_reg32,ot_immediate,ot_none);
+ code : #241#3#15#58#34#72#22;
+ flags : if_sse41 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PINSRD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_memory or ot_bits32,ot_immediate,ot_none);
+ code : #241#3#15#58#34#72#22;
+ flags : if_sse41 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PMAXSB;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#60#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_PMAXSD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#61#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_PMAXUD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#63#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_PMAXUW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#62#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_PMINSB;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#56#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_PMINSD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#57#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_PMINUW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#58#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_PMINUD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#59#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_PMOVSXBW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#32#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_PMOVSXBD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#33#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_PMOVSXBQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#34#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_PMOVSXWD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#35#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_PMOVSXWQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#36#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_PMOVSXDQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#37#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_PMOVZXBW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#48#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_PMOVZXBD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#49#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_PMOVZXBQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#50#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_PMOVZXWD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#51#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_PMOVZXWQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#52#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_PMOVZXDQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#53#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_PMULDQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#40#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_PMULLD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#64#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_PTEST;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#23#72;
+ flags : if_sse41 or if_sm
+ ),
+ (
+ opcode : A_ROUNDPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate,ot_none);
+ code : #241#3#15#58#8#72#22;
+ flags : if_sse41 or if_sm2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_ROUNDPD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate,ot_none);
+ code : #241#3#15#58#9#72#22;
+ flags : if_sse41 or if_sm2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_ROUNDSS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate,ot_none);
+ code : #241#3#15#58#10#72#22;
+ flags : if_sse41 or if_sm2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_ROUNDSD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate,ot_none);
+ code : #241#3#15#58#11#72#22;
+ flags : if_sse41 or if_sm2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_CRC32;
+ ops : 2;
+ optypes : (ot_reg32,ot_rm_gpr or ot_bits8,ot_none,ot_none);
+ code : #220#3#15#56#240#72;
+ flags : if_sse42
+ ),
+ (
+ opcode : A_CRC32;
+ ops : 2;
+ optypes : (ot_reg32,ot_rm_gpr or ot_bits16 or ot_bits32,ot_none,ot_none);
+ code : #209#220#3#15#56#241#72;
+ flags : if_sse42
+ ),
+ (
+ opcode : A_PCMPESTRI;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate,ot_none);
+ code : #241#3#15#58#97#72#22;
+ flags : if_sse42 or if_sm2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PCMPESTRM;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate,ot_none);
+ code : #241#3#15#58#96#72#22;
+ flags : if_sse42 or if_sm2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PCMPISTRI;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate,ot_none);
+ code : #241#3#15#58#99#72#22;
+ flags : if_sse42 or if_sm2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PCMPISTRM;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate,ot_none);
+ code : #241#3#15#58#98#72#22;
+ flags : if_sse42 or if_sm2 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_PCMPGTQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#55#72;
+ flags : if_sse42 or if_sm
+ ),
+ (
+ opcode : A_POPCNT;
+ ops : 2;
+ optypes : (ot_reg16,ot_rm_gpr or ot_bits16,ot_none,ot_none);
+ code : #219#208#2#15#184#72;
+ flags : if_386 or if_sm or if_sse4
+ ),
+ (
+ opcode : A_POPCNT;
+ ops : 2;
+ optypes : (ot_reg32,ot_rm_gpr or ot_bits32,ot_none,ot_none);
+ code : #219#208#2#15#184#72;
+ flags : if_386 or if_sm or if_sse4
+ ),
+ (
+ opcode : A_AESENC;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#220#72;
+ flags : if_sse4 or if_sm
+ ),
+ (
+ opcode : A_AESENCLAST;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#221#72;
+ flags : if_sse4 or if_sm
+ ),
+ (
+ opcode : A_AESDEC;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#222#72;
+ flags : if_sse4 or if_sm
+ ),
+ (
+ opcode : A_AESDECLAST;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#223#72;
+ flags : if_sse4 or if_sm
+ ),
+ (
+ opcode : A_AESIMC;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#3#15#56#219#72;
+ flags : if_sse4 or if_sm
+ ),
+ (
+ opcode : A_AESKEYGENASSIST;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate,ot_none);
+ code : #241#3#15#58#223#72#22;
+ flags : if_sse4 or if_sb or if_ar2
+ ),
+ (
+ opcode : A_VADDPD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#88#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VADDPD;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #241#242#244#248#1#88#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VADDPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #242#248#1#88#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VADDPS;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #242#244#248#1#88#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VADDSD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits64,ot_none);
+ code : #220#242#248#1#88#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VADDSD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_none);
+ code : #220#242#248#1#88#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VADDSS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits32,ot_none);
+ code : #219#242#248#1#88#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VADDSS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_none);
+ code : #219#242#248#1#88#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VADDSUBPD;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #241#242#244#248#1#208#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VADDSUBPD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#208#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VADDSUBPS;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #220#242#244#248#1#208#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VADDSUBPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #220#242#248#1#208#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VAESDEC;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#222#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VAESDECLAST;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#223#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VAESENC;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#220#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VAESENCLAST;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#221#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VAESIMC;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#242#249#1#219#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VAESKEYGENASSIST;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#250#1#223#72#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VANDNPD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#85#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VANDNPD;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #241#242#244#248#1#85#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VANDNPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #242#248#1#85#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VANDNPS;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #242#244#248#1#85#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VANDPD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#84#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VANDPD;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #241#242#244#248#1#84#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VANDPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #242#248#1#84#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VANDPS;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #242#244#248#1#84#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VBLENDPD;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_immediate or ot_bits8);
+ code : #241#242#250#1#13#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VBLENDPD;
+ ops : 4;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_immediate or ot_bits8);
+ code : #241#242#244#250#1#13#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VBLENDPS;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_immediate or ot_bits8);
+ code : #241#242#250#1#12#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VBLENDPS;
+ ops : 4;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_immediate or ot_bits8);
+ code : #241#242#244#250#1#12#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VBLENDVPD;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_xmmreg);
+ code : #241#242#250#1#75#61#80#247;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VBLENDVPD;
+ ops : 4;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_ymmreg);
+ code : #241#242#244#250#1#75#61#80#247;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VBLENDVPS;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_xmmreg);
+ code : #241#242#250#1#74#61#80#247;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VBLENDVPS;
+ ops : 4;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_ymmreg);
+ code : #241#242#244#250#1#74#61#80#247;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VBROADCASTF128;
+ ops : 2;
+ optypes : (ot_ymmreg,ot_memory or ot_bits128,ot_none,ot_none);
+ code : #241#242#244#249#1#26#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VBROADCASTSD;
+ ops : 2;
+ optypes : (ot_ymmreg,ot_memory or ot_bits64,ot_none,ot_none);
+ code : #241#242#244#249#1#25#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VBROADCASTSS;
+ ops : 2;
+ optypes : (ot_ymmreg,ot_memory or ot_bits32,ot_none,ot_none);
+ code : #241#242#244#249#1#24#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VBROADCASTSS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory or ot_bits32,ot_none,ot_none);
+ code : #241#242#249#1#24#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCMPPD;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_immediate or ot_bits8);
+ code : #241#242#248#1#194#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCMPPD;
+ ops : 4;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_immediate or ot_bits8);
+ code : #241#242#244#248#1#194#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCMPPS;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_immediate or ot_bits8);
+ code : #242#248#1#194#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCMPPS;
+ ops : 4;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_immediate or ot_bits8);
+ code : #242#244#248#1#194#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCMPSD;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits64,ot_immediate or ot_bits8);
+ code : #220#242#248#1#194#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCMPSD;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_immediate or ot_bits8);
+ code : #220#242#248#1#194#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCMPSS;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits64,ot_immediate or ot_bits8);
+ code : #219#242#248#1#194#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCMPSS;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_immediate or ot_bits8);
+ code : #219#242#248#1#194#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCOMISD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory or ot_bits64,ot_none,ot_none);
+ code : #241#242#248#1#47#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCOMISD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #241#242#248#1#47#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCOMISS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory or ot_bits32,ot_none,ot_none);
+ code : #242#248#1#47#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCOMISS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #242#248#1#47#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTDQ2PD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory or ot_bits64,ot_none,ot_none);
+ code : #219#242#248#1#230#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTDQ2PD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #219#242#248#1#230#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTDQ2PD;
+ ops : 2;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_none,ot_none);
+ code : #219#242#244#248#1#230#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTDQ2PD;
+ ops : 2;
+ optypes : (ot_ymmreg,ot_memory or ot_bits128,ot_none,ot_none);
+ code : #219#242#244#248#1#230#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTDQ2PS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #242#248#1#91#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTDQ2PS;
+ ops : 2;
+ optypes : (ot_ymmreg,ot_ymmrm,ot_none,ot_none);
+ code : #242#244#248#1#91#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTPD2DQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #220#242#248#1#230#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTPD2DQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_ymmrm,ot_none,ot_none);
+ code : #220#242#244#248#1#230#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTPD2PS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#242#248#1#90#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTPD2PS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_ymmrm,ot_none,ot_none);
+ code : #241#242#244#248#1#90#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTPS2DQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#242#248#1#91#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTPS2DQ;
+ ops : 2;
+ optypes : (ot_ymmreg,ot_ymmrm,ot_none,ot_none);
+ code : #241#242#244#248#1#91#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTPS2PD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory or ot_bits64,ot_none,ot_none);
+ code : #242#248#1#90#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTPS2PD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #242#248#1#90#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTPS2PD;
+ ops : 2;
+ optypes : (ot_ymmreg,ot_xmmrm,ot_none,ot_none);
+ code : #242#244#248#1#90#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTSD2SI;
+ ops : 2;
+ optypes : (ot_reg32,ot_memory or ot_bits64,ot_none,ot_none);
+ code : #220#242#248#1#45#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTSD2SI;
+ ops : 2;
+ optypes : (ot_reg32,ot_xmmreg,ot_none,ot_none);
+ code : #220#242#248#1#45#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTSD2SI;
+ ops : 2;
+ optypes : (ot_reg64,ot_memory or ot_bits64,ot_none,ot_none);
+ code : #220#242#243#248#1#45#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTSD2SI;
+ ops : 2;
+ optypes : (ot_reg64,ot_xmmreg,ot_none,ot_none);
+ code : #220#242#243#248#1#45#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTSD2SS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits64,ot_none);
+ code : #220#242#248#1#90#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTSD2SS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_none);
+ code : #220#242#248#1#90#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTSI2SD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_rm_gpr or ot_bits32,ot_none);
+ code : #220#242#248#1#42#61#80;
+ flags : if_avx or if_sandybridge or if_sd
+ ),
+ (
+ opcode : A_VCVTSI2SD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_rm_gpr or ot_bits64,ot_none);
+ code : #220#242#243#248#1#42#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTSI2SS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_rm_gpr or ot_bits32,ot_none);
+ code : #219#242#248#1#42#61#80;
+ flags : if_avx or if_sandybridge or if_sd
+ ),
+ (
+ opcode : A_VCVTSI2SS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_rm_gpr or ot_bits64,ot_none);
+ code : #219#242#243#248#1#42#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTSS2SD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits32,ot_none);
+ code : #219#242#248#1#90#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTSS2SD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_none);
+ code : #219#242#248#1#90#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTSS2SI;
+ ops : 2;
+ optypes : (ot_reg32,ot_memory or ot_bits32,ot_none,ot_none);
+ code : #219#242#248#1#45#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTSS2SI;
+ ops : 2;
+ optypes : (ot_reg32,ot_xmmreg,ot_none,ot_none);
+ code : #219#242#248#1#45#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTSS2SI;
+ ops : 2;
+ optypes : (ot_reg64,ot_memory or ot_bits32,ot_none,ot_none);
+ code : #219#242#243#248#1#45#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTSS2SI;
+ ops : 2;
+ optypes : (ot_reg64,ot_xmmreg,ot_none,ot_none);
+ code : #219#242#243#248#1#45#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTTPD2DQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#242#248#1#230#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTTPD2DQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_ymmrm,ot_none,ot_none);
+ code : #241#242#244#248#1#230#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTTPS2DQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #219#242#248#1#91#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTTPS2DQ;
+ ops : 2;
+ optypes : (ot_ymmreg,ot_ymmrm,ot_none,ot_none);
+ code : #219#242#244#248#1#91#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTTSD2SI;
+ ops : 2;
+ optypes : (ot_reg32,ot_memory or ot_bits64,ot_none,ot_none);
+ code : #220#242#248#1#44#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTTSD2SI;
+ ops : 2;
+ optypes : (ot_reg32,ot_xmmreg,ot_none,ot_none);
+ code : #220#242#248#1#44#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTTSD2SI;
+ ops : 2;
+ optypes : (ot_reg64,ot_memory or ot_bits64,ot_none,ot_none);
+ code : #220#242#243#248#1#44#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTTSD2SI;
+ ops : 2;
+ optypes : (ot_reg64,ot_xmmreg,ot_none,ot_none);
+ code : #220#242#243#248#1#44#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTTSS2SI;
+ ops : 2;
+ optypes : (ot_reg32,ot_memory or ot_bits32,ot_none,ot_none);
+ code : #219#242#248#1#44#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTTSS2SI;
+ ops : 2;
+ optypes : (ot_reg32,ot_xmmreg,ot_none,ot_none);
+ code : #219#242#248#1#44#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTTSS2SI;
+ ops : 2;
+ optypes : (ot_reg64,ot_memory or ot_bits32,ot_none,ot_none);
+ code : #219#242#243#248#1#44#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VCVTTSS2SI;
+ ops : 2;
+ optypes : (ot_reg64,ot_xmmreg,ot_none,ot_none);
+ code : #219#242#243#248#1#44#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VDIVPD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#94#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VDIVPD;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #241#242#244#248#1#94#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VDIVPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #242#248#1#94#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VDIVPS;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #242#244#248#1#94#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VDIVSD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits64,ot_none);
+ code : #220#242#248#1#94#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VDIVSD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_none);
+ code : #220#242#248#1#94#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VDIVSS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits32,ot_none);
+ code : #219#242#248#1#94#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VDIVSS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_none);
+ code : #219#242#248#1#94#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VDPPD;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_immediate or ot_bits8);
+ code : #241#242#250#1#65#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VDPPS;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_immediate or ot_bits8);
+ code : #241#242#250#1#64#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VDPPS;
+ ops : 4;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_immediate or ot_bits8);
+ code : #241#242#244#250#1#64#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VEXTRACTF128;
+ ops : 3;
+ optypes : (ot_xmmrm,ot_ymmreg,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#244#250#1#25#65#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VEXTRACTPS;
+ ops : 3;
+ optypes : (ot_rm_gpr or ot_bits32,ot_xmmreg,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#250#1#23#65#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VHADDPD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#124#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VHADDPD;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #241#242#244#248#1#124#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VHADDPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #220#242#248#1#124#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VHADDPS;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #220#242#244#248#1#124#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VHSUBPD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#125#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VHSUBPD;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #241#242#244#248#1#125#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VHSUBPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #220#242#248#1#125#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VHSUBPS;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #220#242#244#248#1#125#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VINSERTF128;
+ ops : 4;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_xmmrm,ot_immediate or ot_bits8);
+ code : #241#242#244#250#1#24#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VINSERTPS;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits32,ot_immediate or ot_bits8);
+ code : #241#242#250#1#33#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VINSERTPS;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_immediate or ot_bits8);
+ code : #241#242#250#1#33#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VLDDQU;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory or ot_bits128,ot_none,ot_none);
+ code : #220#242#248#1#240#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VLDDQU;
+ ops : 2;
+ optypes : (ot_ymmreg,ot_memory or ot_bits256,ot_none,ot_none);
+ code : #220#242#244#248#1#240#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VLDMXCSR;
+ ops : 1;
+ optypes : (ot_memory or ot_bits32,ot_none,ot_none,ot_none);
+ code : #242#248#1#174#130;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMASKMOVDQU;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #241#242#248#1#247#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMASKMOVPD;
+ ops : 3;
+ optypes : (ot_memory or ot_bits256,ot_ymmreg,ot_ymmreg,ot_none);
+ code : #241#242#244#249#1#47#61#66;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMASKMOVPD;
+ ops : 3;
+ optypes : (ot_memory or ot_bits128,ot_xmmreg,ot_xmmreg,ot_none);
+ code : #241#242#249#1#47#61#66;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMASKMOVPD;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_memory or ot_bits256,ot_none);
+ code : #241#242#244#249#1#45#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMASKMOVPD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits128,ot_none);
+ code : #241#242#249#1#45#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMASKMOVPS;
+ ops : 3;
+ optypes : (ot_memory or ot_bits256,ot_ymmreg,ot_ymmreg,ot_none);
+ code : #241#242#244#249#1#46#61#66;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMASKMOVPS;
+ ops : 3;
+ optypes : (ot_memory or ot_bits128,ot_xmmreg,ot_xmmreg,ot_none);
+ code : #241#242#249#1#46#61#66;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMASKMOVPS;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_memory or ot_bits256,ot_none);
+ code : #241#242#244#249#1#44#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMASKMOVPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits128,ot_none);
+ code : #241#242#249#1#44#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMAXPD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#95#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMAXPD;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #241#242#244#248#1#95#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMAXPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #242#248#1#95#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMAXPS;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #242#244#248#1#95#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMAXSD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits64,ot_none);
+ code : #220#242#248#1#95#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMAXSD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_none);
+ code : #220#242#248#1#95#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMAXSS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits32,ot_none);
+ code : #219#242#248#1#95#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMAXSS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_none);
+ code : #219#242#248#1#95#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMINPD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#93#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMINPD;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #241#242#244#248#1#93#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMINPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #242#248#1#93#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMINPS;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #242#244#248#1#93#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMINSD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits64,ot_none);
+ code : #220#242#248#1#93#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMINSD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_none);
+ code : #220#242#248#1#93#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMINSS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits32,ot_none);
+ code : #219#242#248#1#93#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMINSS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_none);
+ code : #219#242#248#1#93#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVAPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#242#248#1#40#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVAPD;
+ ops : 2;
+ optypes : (ot_xmmrm,ot_xmmreg,ot_none,ot_none);
+ code : #241#242#248#1#41#65;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVAPD;
+ ops : 2;
+ optypes : (ot_ymmreg,ot_ymmrm,ot_none,ot_none);
+ code : #241#242#244#248#1#40#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVAPD;
+ ops : 2;
+ optypes : (ot_ymmrm,ot_ymmreg,ot_none,ot_none);
+ code : #241#242#244#248#1#41#65;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVAPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #242#248#1#40#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVAPS;
+ ops : 2;
+ optypes : (ot_xmmrm,ot_xmmreg,ot_none,ot_none);
+ code : #242#248#1#41#65;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVAPS;
+ ops : 2;
+ optypes : (ot_ymmreg,ot_ymmrm,ot_none,ot_none);
+ code : #242#244#248#1#40#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVAPS;
+ ops : 2;
+ optypes : (ot_ymmrm,ot_ymmreg,ot_none,ot_none);
+ code : #242#244#248#1#41#65;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_rm_gpr or ot_bits32,ot_none,ot_none);
+ code : #241#242#248#1#110#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVD;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits32,ot_xmmreg,ot_none,ot_none);
+ code : #241#242#248#1#126#65;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVDDUP;
+ ops : 2;
+ optypes : (ot_ymmreg,ot_ymmrm,ot_none,ot_none);
+ code : #220#242#244#248#1#18#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVDDUP;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory or ot_bits64,ot_none,ot_none);
+ code : #220#242#248#1#18#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVDDUP;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #220#242#248#1#18#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVDQA;
+ ops : 2;
+ optypes : (ot_ymmrm,ot_ymmreg,ot_none,ot_none);
+ code : #241#242#244#248#1#127#65;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVDQA;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#242#248#1#111#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVDQA;
+ ops : 2;
+ optypes : (ot_xmmrm,ot_xmmreg,ot_none,ot_none);
+ code : #241#242#248#1#127#65;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVDQA;
+ ops : 2;
+ optypes : (ot_ymmreg,ot_ymmrm,ot_none,ot_none);
+ code : #241#242#244#248#1#111#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVDQU;
+ ops : 2;
+ optypes : (ot_ymmreg,ot_ymmrm,ot_none,ot_none);
+ code : #219#242#244#248#1#111#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVDQU;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #219#242#248#1#111#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVDQU;
+ ops : 2;
+ optypes : (ot_xmmrm,ot_xmmreg,ot_none,ot_none);
+ code : #219#242#248#1#127#65;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVDQU;
+ ops : 2;
+ optypes : (ot_ymmrm,ot_ymmreg,ot_none,ot_none);
+ code : #219#242#244#248#1#127#65;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVHLPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_none);
+ code : #242#248#1#18#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVHPD;
+ ops : 2;
+ optypes : (ot_memory or ot_bits64,ot_xmmreg,ot_none,ot_none);
+ code : #241#242#248#1#23#65;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVHPD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits64,ot_none);
+ code : #241#242#248#1#22#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVHPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits64,ot_none);
+ code : #242#248#1#22#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVHPS;
+ ops : 2;
+ optypes : (ot_memory or ot_bits64,ot_xmmreg,ot_none,ot_none);
+ code : #242#248#1#23#65;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVLHPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_none);
+ code : #242#248#1#22#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVLPD;
+ ops : 2;
+ optypes : (ot_memory or ot_bits64,ot_xmmreg,ot_none,ot_none);
+ code : #241#242#248#1#19#65;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVLPD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits64,ot_none);
+ code : #241#242#248#1#18#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVLPS;
+ ops : 2;
+ optypes : (ot_memory or ot_bits64,ot_xmmreg,ot_none,ot_none);
+ code : #242#248#1#19#65;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVLPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits64,ot_none);
+ code : #242#248#1#18#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVMSKPD;
+ ops : 2;
+ optypes : (ot_reg32,ot_ymmreg,ot_none,ot_none);
+ code : #241#242#244#248#1#80#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVMSKPD;
+ ops : 2;
+ optypes : (ot_reg64,ot_xmmreg,ot_none,ot_none);
+ code : #241#242#248#1#80#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVMSKPD;
+ ops : 2;
+ optypes : (ot_reg32,ot_xmmreg,ot_none,ot_none);
+ code : #241#242#248#1#80#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVMSKPD;
+ ops : 2;
+ optypes : (ot_reg64,ot_ymmreg,ot_none,ot_none);
+ code : #241#242#244#248#1#80#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVMSKPS;
+ ops : 2;
+ optypes : (ot_reg32,ot_ymmreg,ot_none,ot_none);
+ code : #242#244#248#1#80#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVMSKPS;
+ ops : 2;
+ optypes : (ot_reg64,ot_xmmreg,ot_none,ot_none);
+ code : #242#248#1#80#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVMSKPS;
+ ops : 2;
+ optypes : (ot_reg32,ot_xmmreg,ot_none,ot_none);
+ code : #242#248#1#80#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVMSKPS;
+ ops : 2;
+ optypes : (ot_reg64,ot_ymmreg,ot_none,ot_none);
+ code : #242#244#248#1#80#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVNTDQ;
+ ops : 2;
+ optypes : (ot_memory or ot_bits128,ot_xmmreg,ot_none,ot_none);
+ code : #241#242#248#1#231#65;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVNTDQ;
+ ops : 2;
+ optypes : (ot_memory or ot_bits256,ot_ymmreg,ot_none,ot_none);
+ code : #241#242#244#248#1#231#65;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVNTDQA;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory or ot_bits128,ot_none,ot_none);
+ code : #241#242#249#1#42#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVNTPD;
+ ops : 2;
+ optypes : (ot_memory or ot_bits256,ot_ymmreg,ot_none,ot_none);
+ code : #241#242#244#248#1#43#65;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVNTPD;
+ ops : 2;
+ optypes : (ot_memory or ot_bits128,ot_xmmreg,ot_none,ot_none);
+ code : #241#242#248#1#43#65;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVNTPS;
+ ops : 2;
+ optypes : (ot_memory or ot_bits128,ot_ymmreg,ot_none,ot_none);
+ code : #242#244#248#1#43#65;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVNTPS;
+ ops : 2;
+ optypes : (ot_memory or ot_bits128,ot_xmmreg,ot_none,ot_none);
+ code : #242#248#1#43#65;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVQ;
+ ops : 2;
+ optypes : (ot_rm_gpr or ot_bits64,ot_xmmreg,ot_none,ot_none);
+ code : #241#242#243#248#1#126#65;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_rm_gpr or ot_bits64,ot_none,ot_none);
+ code : #241#242#243#248#1#110#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVSD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_none);
+ code : #220#242#248#1#16#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVSD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory or ot_bits64,ot_none,ot_none);
+ code : #220#242#248#1#16#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVSD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_none);
+ code : #220#242#248#1#17#61#66;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVSD;
+ ops : 2;
+ optypes : (ot_memory or ot_bits64,ot_xmmreg,ot_none,ot_none);
+ code : #220#242#248#1#17#65;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVSHDUP;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #219#242#248#1#22#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVSHDUP;
+ ops : 2;
+ optypes : (ot_ymmreg,ot_ymmrm,ot_none,ot_none);
+ code : #219#242#244#248#1#22#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVSLDUP;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #219#242#248#1#18#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVSLDUP;
+ ops : 2;
+ optypes : (ot_ymmreg,ot_ymmrm,ot_none,ot_none);
+ code : #219#242#244#248#1#18#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVSS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_none);
+ code : #219#242#248#1#16#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVSS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory or ot_bits64,ot_none,ot_none);
+ code : #219#242#248#1#16#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVSS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_none);
+ code : #219#242#248#1#17#61#66;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVSS;
+ ops : 2;
+ optypes : (ot_memory or ot_bits64,ot_xmmreg,ot_none,ot_none);
+ code : #219#242#248#1#17#65;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVUPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#242#248#1#16#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVUPD;
+ ops : 2;
+ optypes : (ot_xmmrm,ot_xmmreg,ot_none,ot_none);
+ code : #241#242#248#1#17#65;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVUPD;
+ ops : 2;
+ optypes : (ot_ymmreg,ot_ymmrm,ot_none,ot_none);
+ code : #241#242#244#248#1#16#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVUPD;
+ ops : 2;
+ optypes : (ot_ymmrm,ot_ymmreg,ot_none,ot_none);
+ code : #241#242#244#248#1#17#65;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVUPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #242#248#1#16#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVUPS;
+ ops : 2;
+ optypes : (ot_xmmrm,ot_xmmreg,ot_none,ot_none);
+ code : #242#248#1#17#65;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVUPS;
+ ops : 2;
+ optypes : (ot_ymmreg,ot_ymmrm,ot_none,ot_none);
+ code : #242#244#248#1#16#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMOVUPS;
+ ops : 2;
+ optypes : (ot_ymmrm,ot_ymmreg,ot_none,ot_none);
+ code : #242#244#248#1#17#65;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMPSADBW;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_immediate or ot_bits8);
+ code : #241#242#250#1#66#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMULPD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#89#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMULPD;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #241#242#244#248#1#89#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMULPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #242#248#1#89#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMULPS;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #242#244#248#1#89#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMULSD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits64,ot_none);
+ code : #220#242#248#1#89#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMULSD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_none);
+ code : #220#242#248#1#89#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMULSS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits32,ot_none);
+ code : #219#242#248#1#89#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VMULSS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_none);
+ code : #219#242#248#1#89#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VORPD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#86#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VORPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #242#248#1#86#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VORPS;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #242#244#248#1#86#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPABSB;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#242#249#1#28#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPABSD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#242#249#1#30#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPABSW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#242#249#1#29#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPACKSSDW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#107#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPACKSSWB;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#99#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPACKUSDW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#43#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPACKUSWB;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#103#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPADDB;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#252#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPADDD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#254#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPADDQ;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#212#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPADDSB;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#236#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPADDSW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#237#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPADDUSB;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#220#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPADDUSW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#221#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPADDW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#253#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPALIGNR;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_immediate or ot_bits8);
+ code : #241#242#250#1#15#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPAND;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#219#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPANDN;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#223#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPAVGB;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#224#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPAVGW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#227#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPBLENDVB;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_xmmreg);
+ code : #241#242#250#1#76#61#80#247;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPBLENDW;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_immediate or ot_bits8);
+ code : #241#242#250#1#14#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPCLMULQDQ;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_immediate or ot_bits8);
+ code : #241#242#250#1#68#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPCMPEQB;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#116#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPCMPEQD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#118#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPCMPEQQ;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#41#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPCMPEQW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#117#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPCMPESTRI;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#250#1#97#72#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPCMPESTRM;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#250#1#96#72#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPCMPGTB;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#100#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPCMPGTD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#102#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPCMPGTQ;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#55#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPCMPGTW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#101#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPCMPISTRI;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#250#1#99#72#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPCMPISTRM;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#250#1#98#72#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPERM2F128;
+ ops : 4;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_immediate or ot_bits8);
+ code : #241#242#244#250#1#6#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPERMILPD;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #241#242#244#249#1#13#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPERMILPD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#250#1#5#72#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPERMILPD;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmrm,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#244#250#1#5#72#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPERMILPD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#13#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPERMILPS;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #241#242#244#249#1#12#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPERMILPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#250#1#4#72#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPERMILPS;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmrm,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#244#250#1#4#72#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPERMILPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#12#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPEXTRB;
+ ops : 3;
+ optypes : (ot_reg32,ot_xmmreg,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#250#1#20#65#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPEXTRB;
+ ops : 3;
+ optypes : (ot_reg64,ot_xmmreg,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#250#1#20#65#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPEXTRB;
+ ops : 3;
+ optypes : (ot_memory or ot_bits8,ot_xmmreg,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#250#1#20#65#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPEXTRD;
+ ops : 3;
+ optypes : (ot_rm_gpr or ot_bits32,ot_xmmreg,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#250#1#22#65#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPEXTRQ;
+ ops : 3;
+ optypes : (ot_rm_gpr or ot_bits64,ot_xmmreg,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#243#250#1#22#65#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPEXTRW;
+ ops : 3;
+ optypes : (ot_reg32,ot_xmmreg,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#248#1#197#72#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPEXTRW;
+ ops : 3;
+ optypes : (ot_reg64,ot_xmmreg,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#248#1#197#72#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPEXTRW;
+ ops : 3;
+ optypes : (ot_reg32,ot_xmmreg,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#250#1#21#65#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPEXTRW;
+ ops : 3;
+ optypes : (ot_reg64,ot_xmmreg,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#250#1#21#65#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPEXTRW;
+ ops : 3;
+ optypes : (ot_memory or ot_bits16,ot_xmmreg,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#250#1#21#65#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPHADDD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#2#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPHADDSW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#3#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPHADDW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#1#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPHMINPOSUW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#242#249#1#65#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPHSUBD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#6#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPHSUBSW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#7#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPHSUBW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#5#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPINSRB;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_reg32,ot_immediate or ot_bits8);
+ code : #241#242#250#1#32#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPINSRB;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits8,ot_immediate or ot_bits8);
+ code : #241#242#250#1#32#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPINSRD;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_rm_gpr or ot_bits32,ot_immediate or ot_bits8);
+ code : #241#242#250#1#34#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPINSRQ;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_rm_gpr or ot_bits64,ot_immediate or ot_bits8);
+ code : #241#242#243#250#1#34#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPINSRW;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_reg32,ot_immediate or ot_bits8);
+ code : #241#242#248#1#196#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPINSRW;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits16,ot_immediate or ot_bits8);
+ code : #241#242#248#1#196#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMADDUBSW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#4#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMADDWD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#245#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMAXSB;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#60#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMAXSD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#61#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMAXSW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#238#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMAXUB;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#222#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMAXUD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#63#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMAXUW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#62#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMINSB;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#56#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMINSD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#57#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMINSW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#234#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMINUB;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#218#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMINUD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#59#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMINUW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#58#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMOVMSKB;
+ ops : 2;
+ optypes : (ot_reg64,ot_xmmreg,ot_none,ot_none);
+ code : #241#242#248#1#215#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMOVMSKB;
+ ops : 2;
+ optypes : (ot_reg32,ot_xmmreg,ot_none,ot_none);
+ code : #241#242#248#1#215#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMOVSXBD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory or ot_bits32,ot_none,ot_none);
+ code : #241#242#249#1#33#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMOVSXBD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #241#242#249#1#33#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMOVSXBQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory or ot_bits16,ot_none,ot_none);
+ code : #241#242#249#1#34#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMOVSXBQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #241#242#249#1#34#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMOVSXBW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory or ot_bits64,ot_none,ot_none);
+ code : #241#242#249#1#32#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMOVSXBW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #241#242#249#1#32#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMOVSXDQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory or ot_bits64,ot_none,ot_none);
+ code : #241#242#249#1#37#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMOVSXDQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #241#242#249#1#37#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMOVSXWD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory or ot_bits64,ot_none,ot_none);
+ code : #241#242#249#1#35#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMOVSXWD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #241#242#249#1#35#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMOVSXWQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory or ot_bits32,ot_none,ot_none);
+ code : #241#242#249#1#36#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMOVSXWQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #241#242#249#1#36#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMOVZXBD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory or ot_bits32,ot_none,ot_none);
+ code : #241#242#249#1#49#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMOVZXBD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #241#242#249#1#49#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMOVZXBQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory or ot_bits16,ot_none,ot_none);
+ code : #241#242#249#1#50#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMOVZXBQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #241#242#249#1#50#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMOVZXBW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory or ot_bits64,ot_none,ot_none);
+ code : #241#242#249#1#48#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMOVZXBW;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #241#242#249#1#48#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMOVZXDQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory or ot_bits64,ot_none,ot_none);
+ code : #241#242#249#1#53#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMOVZXDQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #241#242#249#1#53#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMOVZXWD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory or ot_bits64,ot_none,ot_none);
+ code : #241#242#249#1#51#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMOVZXWD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #241#242#249#1#51#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMOVZXWQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory or ot_bits32,ot_none,ot_none);
+ code : #241#242#249#1#52#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMOVZXWQ;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #241#242#249#1#52#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMULDQ;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#40#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMULHRSW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#11#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMULHUW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#228#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMULHW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#229#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMULLD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#64#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMULLW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#213#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPMULUDQ;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#244#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPOR;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#235#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSADBW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#246#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSHUFB;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#0#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSHUFD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#248#1#112#72#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSHUFHW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate or ot_bits8,ot_none);
+ code : #219#242#248#1#112#72#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSHUFLW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate or ot_bits8,ot_none);
+ code : #220#242#248#1#112#72#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSIGNB;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#8#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSIGND;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#10#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSIGNW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#249#1#9#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSLLD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#248#1#114#60#142#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSLLD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#242#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSLLDQ;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#248#1#115#60#143#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSLLQ;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#243#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSLLQ;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#248#1#115#60#142#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSLLW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#248#1#113#60#142#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSLLW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#241#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSRAD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#248#1#114#60#140#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSRAD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#226#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSRAW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#248#1#113#60#140#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSRAW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#225#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSRLD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#248#1#114#60#138#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSRLD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#210#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSRLDQ;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#248#1#115#60#139#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSRLQ;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#248#1#115#60#138#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSRLQ;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#211#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSRLW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#248#1#113#60#138#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSRLW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#209#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSUBB;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#248#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSUBD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#250#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSUBQ;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#251#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSUBSB;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#232#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSUBSW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#233#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSUBUSB;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#216#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSUBUSW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#217#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPSUBW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#249#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPTEST;
+ ops : 2;
+ optypes : (ot_ymmreg,ot_ymmrm,ot_none,ot_none);
+ code : #241#242#244#249#1#23#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPTEST;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#242#249#1#23#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPUNPCKHBW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#104#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPUNPCKHDQ;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#106#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPUNPCKHQDQ;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#109#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPUNPCKHWD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#105#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPUNPCKLBW;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#96#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPUNPCKLDQ;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#98#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPUNPCKLQDQ;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#108#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPUNPCKLWD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#97#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VPXOR;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#239#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VRCPPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #242#248#1#83#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VRCPPS;
+ ops : 2;
+ optypes : (ot_ymmreg,ot_ymmrm,ot_none,ot_none);
+ code : #242#244#248#1#83#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VRCPSS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits32,ot_none);
+ code : #219#242#248#1#83#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VRCPSS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_none);
+ code : #219#242#248#1#83#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VROUNDPD;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmrm,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#244#250#1#9#72#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VROUNDPD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#250#1#9#72#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VROUNDPS;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmrm,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#244#250#1#8#72#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VROUNDPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_immediate or ot_bits8,ot_none);
+ code : #241#242#250#1#8#72#22;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VROUNDSD;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits64,ot_immediate or ot_bits8);
+ code : #241#242#250#1#11#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VROUNDSD;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_immediate or ot_bits8);
+ code : #241#242#250#1#11#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VROUNDSS;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits32,ot_immediate or ot_bits8);
+ code : #241#242#250#1#10#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VROUNDSS;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_immediate or ot_bits8);
+ code : #241#242#250#1#10#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VRSQRTPS;
+ ops : 2;
+ optypes : (ot_ymmreg,ot_ymmrm,ot_none,ot_none);
+ code : #242#244#248#1#82#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VRSQRTPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #242#248#1#82#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VRSQRTSS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits32,ot_none);
+ code : #219#242#248#1#82#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VRSQRTSS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_none);
+ code : #219#242#248#1#82#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VSHUFPD;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_immediate or ot_bits8);
+ code : #241#242#248#1#198#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VSHUFPD;
+ ops : 4;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_immediate or ot_bits8);
+ code : #241#242#244#248#1#198#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VSHUFPS;
+ ops : 4;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_immediate or ot_bits8);
+ code : #242#248#1#198#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VSHUFPS;
+ ops : 4;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_immediate or ot_bits8);
+ code : #242#244#248#1#198#61#80#23;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VSQRTPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#242#248#1#81#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VSQRTPD;
+ ops : 2;
+ optypes : (ot_ymmreg,ot_ymmrm,ot_none,ot_none);
+ code : #241#242#244#248#1#81#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VSQRTPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #242#248#1#81#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VSQRTPS;
+ ops : 2;
+ optypes : (ot_ymmreg,ot_ymmrm,ot_none,ot_none);
+ code : #242#244#248#1#81#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VSQRTSD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits64,ot_none);
+ code : #220#242#248#1#81#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VSQRTSD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_none);
+ code : #220#242#248#1#81#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VSQRTSS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits32,ot_none);
+ code : #219#242#248#1#81#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VSQRTSS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_none);
+ code : #219#242#248#1#81#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VSTMXCSR;
+ ops : 1;
+ optypes : (ot_memory or ot_bits32,ot_none,ot_none,ot_none);
+ code : #242#248#1#174#131;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VSUBPD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#92#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VSUBPD;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #241#242#244#248#1#92#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VSUBPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #242#248#1#92#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VSUBPS;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #242#244#248#1#92#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VSUBSD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits64,ot_none);
+ code : #220#242#248#1#92#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VSUBSD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_none);
+ code : #220#242#248#1#92#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VSUBSS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_memory or ot_bits32,ot_none);
+ code : #219#242#248#1#92#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VSUBSS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmreg,ot_none);
+ code : #219#242#248#1#92#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VTESTPD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#242#249#1#15#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VTESTPD;
+ ops : 2;
+ optypes : (ot_ymmreg,ot_ymmrm,ot_none,ot_none);
+ code : #241#242#244#249#1#15#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VTESTPS;
+ ops : 2;
+ optypes : (ot_ymmreg,ot_ymmrm,ot_none,ot_none);
+ code : #241#242#244#249#1#14#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VTESTPS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmrm,ot_none,ot_none);
+ code : #241#242#249#1#14#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VUCOMISD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory or ot_bits64,ot_none,ot_none);
+ code : #241#242#248#1#46#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VUCOMISD;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #241#242#248#1#46#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VUCOMISS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_memory or ot_bits32,ot_none,ot_none);
+ code : #242#248#1#46#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VUCOMISS;
+ ops : 2;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_none,ot_none);
+ code : #242#248#1#46#72;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VUNPCKHPD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#21#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VUNPCKHPD;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #241#242#244#248#1#21#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VUNPCKHPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #242#248#1#21#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VUNPCKHPS;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #242#244#248#1#21#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VUNPCKLPD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#20#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VUNPCKLPD;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #241#242#244#248#1#20#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VUNPCKLPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #242#248#1#20#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VUNPCKLPS;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #242#244#248#1#20#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VXORPD;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #241#242#248#1#87#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VXORPD;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #241#242#244#248#1#87#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VXORPS;
+ ops : 3;
+ optypes : (ot_xmmreg,ot_xmmreg,ot_xmmrm,ot_none);
+ code : #242#248#1#87#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VXORPS;
+ ops : 3;
+ optypes : (ot_ymmreg,ot_ymmreg,ot_ymmrm,ot_none);
+ code : #242#244#248#1#87#61#80;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VZEROALL;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #242#244#248#1#119;
+ flags : if_avx or if_sandybridge
+ ),
+ (
+ opcode : A_VZEROUPPER;
+ ops : 0;
+ optypes : (ot_none,ot_none,ot_none,ot_none);
+ code : #242#248#1#119;
+ flags : if_avx or if_sandybridge
+ )
+);
diff --git a/compiler/i8086/n8086add.pas b/compiler/i8086/n8086add.pas
new file mode 100644
index 0000000000..cb28e6f5f7
--- /dev/null
+++ b/compiler/i8086/n8086add.pas
@@ -0,0 +1,682 @@
+{
+ Copyright (c) 2000-2002 by Florian Klaempfl
+
+ Code generation for add nodes on the i8086
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+ ****************************************************************************
+}
+unit n8086add;
+
+{$i fpcdefs.inc}
+
+interface
+
+ uses
+ node,nadd,cpubase,nx86add;
+
+ type
+
+ { ti8086addnode }
+
+ ti8086addnode = class(tx86addnode)
+ function use_generic_mul32to64: boolean; override;
+ procedure second_addordinal; override;
+ procedure second_add64bit;override;
+ procedure second_cmp64bit;override;
+ procedure second_cmp32bit;
+ procedure second_cmpordinal;override;
+ procedure second_mul(unsigned: boolean);
+ end;
+
+ implementation
+
+ uses
+ globtype,systems,
+ cutils,verbose,globals,
+ symconst,symdef,paramgr,defutil,
+ aasmbase,aasmtai,aasmdata,aasmcpu,
+ cgbase,procinfo,
+ ncon,nset,cgutils,tgobj,
+ cga,ncgutil,cgobj,cg64f32,cgx86,
+ hlcgobj;
+
+{*****************************************************************************
+ use_generic_mul32to64
+*****************************************************************************}
+
+ function ti8086addnode.use_generic_mul32to64: boolean;
+ begin
+ result := True;
+ end;
+
+ { handles all multiplications }
+ procedure ti8086addnode.second_addordinal;
+ var
+ unsigned: boolean;
+ begin
+ unsigned:=not(is_signed(left.resultdef)) or
+ not(is_signed(right.resultdef));
+ if nodetype=muln then
+ second_mul(unsigned)
+ else
+ inherited second_addordinal;
+ end;
+
+{*****************************************************************************
+ Add64bit
+*****************************************************************************}
+
+ procedure ti8086addnode.second_add64bit;
+ var
+ op : TOpCG;
+ op1,op2 : TAsmOp;
+ opsize : TOpSize;
+ hregister,
+ hregister2 : tregister;
+ hl4 : tasmlabel;
+ mboverflow,
+ unsigned:boolean;
+ r:Tregister;
+ begin
+ pass_left_right;
+
+ op1:=A_NONE;
+ op2:=A_NONE;
+ mboverflow:=false;
+ opsize:=S_L;
+ unsigned:=((left.resultdef.typ=orddef) and
+ (torddef(left.resultdef).ordtype=u64bit)) or
+ ((right.resultdef.typ=orddef) and
+ (torddef(right.resultdef).ordtype=u64bit));
+ case nodetype of
+ addn :
+ begin
+ op:=OP_ADD;
+ mboverflow:=true;
+ end;
+ subn :
+ begin
+ op:=OP_SUB;
+ op1:=A_SUB;
+ op2:=A_SBB;
+ mboverflow:=true;
+ end;
+ xorn:
+ op:=OP_XOR;
+ orn:
+ op:=OP_OR;
+ andn:
+ op:=OP_AND;
+ else
+ begin
+ { everything should be handled in pass_1 (JM) }
+ internalerror(200109051);
+ end;
+ end;
+
+ { left and right no register? }
+ { then one must be demanded }
+ if (left.location.loc<>LOC_REGISTER) then
+ begin
+ if (right.location.loc<>LOC_REGISTER) then
+ begin
+ hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
+ hregister2:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
+ cg64.a_load64_loc_reg(current_asmdata.CurrAsmList,left.location,joinreg64(hregister,hregister2));
+ location_reset(left.location,LOC_REGISTER,left.location.size);
+ left.location.register64.reglo:=hregister;
+ left.location.register64.reghi:=hregister2;
+ end
+ else
+ begin
+ location_swap(left.location,right.location);
+ toggleflag(nf_swapped);
+ end;
+ end;
+
+ { at this point, left.location.loc should be LOC_REGISTER }
+ if right.location.loc=LOC_REGISTER then
+ begin
+ { when swapped another result register }
+ if (nodetype=subn) and (nf_swapped in flags) then
+ begin
+ cg64.a_op64_reg_reg(current_asmdata.CurrAsmList,op,location.size,
+ left.location.register64,
+ right.location.register64);
+ location_swap(left.location,right.location);
+ toggleflag(nf_swapped);
+ end
+ else
+ begin
+ cg64.a_op64_reg_reg(current_asmdata.CurrAsmList,op,location.size,
+ right.location.register64,
+ left.location.register64);
+ end;
+ end
+ else
+ begin
+ { right.location<>LOC_REGISTER }
+ if (nodetype=subn) and (nf_swapped in flags) then
+ begin
+ r:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
+ cg64.a_load64low_loc_reg(current_asmdata.CurrAsmList,right.location,r);
+ emit_reg_reg(op1,opsize,left.location.register64.reglo,r);
+ emit_reg_reg(op2,opsize,GetNextReg(left.location.register64.reglo),GetNextReg(r));
+ emit_reg_reg(A_MOV,opsize,r,left.location.register64.reglo);
+ emit_reg_reg(A_MOV,opsize,GetNextReg(r),GetNextReg(left.location.register64.reglo));
+ cg64.a_load64high_loc_reg(current_asmdata.CurrAsmList,right.location,r);
+ { the carry flag is still ok }
+ emit_reg_reg(op2,opsize,left.location.register64.reghi,r);
+ emit_reg_reg(op2,opsize,GetNextReg(left.location.register64.reghi),GetNextReg(r));
+ emit_reg_reg(A_MOV,opsize,r,left.location.register64.reghi);
+ emit_reg_reg(A_MOV,opsize,GetNextReg(r),GetNextReg(left.location.register64.reghi));
+ end
+ else
+ begin
+ cg64.a_op64_loc_reg(current_asmdata.CurrAsmList,op,location.size,right.location,
+ left.location.register64);
+ end;
+ location_freetemp(current_asmdata.CurrAsmList,right.location);
+ end;
+
+ { only in case of overflow operations }
+ { produce overflow code }
+ { we must put it here directly, because sign of operation }
+ { is in unsigned VAR!! }
+ if mboverflow then
+ begin
+ if cs_check_overflow in current_settings.localswitches then
+ begin
+ current_asmdata.getjumplabel(hl4);
+ if unsigned then
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,F_AE,hl4)
+ else
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NO,hl4);
+ cg.a_call_name(current_asmdata.CurrAsmList,'FPC_OVERFLOW',false);
+ cg.a_label(current_asmdata.CurrAsmList,hl4);
+ end;
+ end;
+
+ location_copy(location,left.location);
+ end;
+
+
+ procedure ti8086addnode.second_cmp64bit;
+ var
+ hregister,
+ hregister2 : tregister;
+ href : treference;
+ unsigned : boolean;
+
+ procedure firstjmp64bitcmp;
+
+ var
+ oldnodetype : tnodetype;
+
+ begin
+{$ifdef OLDREGVARS}
+ load_all_regvars(current_asmdata.CurrAsmList);
+{$endif OLDREGVARS}
+ { the jump the sequence is a little bit hairy }
+ case nodetype of
+ ltn,gtn:
+ begin
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),current_procinfo.CurrTrueLabel);
+ { cheat a little bit for the negative test }
+ toggleflag(nf_swapped);
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),current_procinfo.CurrFalseLabel);
+ toggleflag(nf_swapped);
+ end;
+ lten,gten:
+ begin
+ oldnodetype:=nodetype;
+ if nodetype=lten then
+ nodetype:=ltn
+ else
+ nodetype:=gtn;
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),current_procinfo.CurrTrueLabel);
+ { cheat for the negative test }
+ if nodetype=ltn then
+ nodetype:=gtn
+ else
+ nodetype:=ltn;
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),current_procinfo.CurrFalseLabel);
+ nodetype:=oldnodetype;
+ end;
+ equaln:
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,current_procinfo.CurrFalseLabel);
+ unequaln:
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,current_procinfo.CurrTrueLabel);
+ end;
+ end;
+
+ procedure middlejmp64bitcmp;
+
+ var
+ oldnodetype : tnodetype;
+
+ begin
+{$ifdef OLDREGVARS}
+ load_all_regvars(current_asmdata.CurrAsmList);
+{$endif OLDREGVARS}
+ { the jump the sequence is a little bit hairy }
+ case nodetype of
+ ltn,gtn:
+ begin
+ { the comparisaion of the low word have to be }
+ { always unsigned! }
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(true),current_procinfo.CurrTrueLabel);
+ { cheat a little bit for the negative test }
+ toggleflag(nf_swapped);
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(true),current_procinfo.CurrFalseLabel);
+ toggleflag(nf_swapped);
+ end;
+ lten,gten:
+ begin
+ oldnodetype:=nodetype;
+ if nodetype=lten then
+ nodetype:=ltn
+ else
+ nodetype:=gtn;
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(true),current_procinfo.CurrTrueLabel);
+ { cheat for the negative test }
+ if nodetype=ltn then
+ nodetype:=gtn
+ else
+ nodetype:=ltn;
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(true),current_procinfo.CurrFalseLabel);
+ nodetype:=oldnodetype;
+ end;
+ equaln:
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,current_procinfo.CurrFalseLabel);
+ unequaln:
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,current_procinfo.CurrTrueLabel);
+ end;
+ end;
+
+ procedure lastjmp64bitcmp;
+
+ begin
+ { the jump the sequence is a little bit hairy }
+ case nodetype of
+ ltn,gtn,lten,gten:
+ begin
+ { the comparisaion of the low word have to be }
+ { always unsigned! }
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(true),current_procinfo.CurrTrueLabel);
+ cg.a_jmp_always(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
+ end;
+ equaln:
+ begin
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,current_procinfo.CurrFalseLabel);
+ cg.a_jmp_always(current_asmdata.CurrAsmList,current_procinfo.CurrTrueLabel);
+ end;
+ unequaln:
+ begin
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,current_procinfo.CurrTrueLabel);
+ cg.a_jmp_always(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
+ end;
+ end;
+ end;
+
+ begin
+ pass_left_right;
+
+ unsigned:=((left.resultdef.typ=orddef) and
+ (torddef(left.resultdef).ordtype=u64bit)) or
+ ((right.resultdef.typ=orddef) and
+ (torddef(right.resultdef).ordtype=u64bit));
+
+ { left and right no register? }
+ { then one must be demanded }
+ if (left.location.loc<>LOC_REGISTER) then
+ begin
+ if (right.location.loc<>LOC_REGISTER) then
+ begin
+ { we can reuse a CREGISTER for comparison }
+ if (left.location.loc<>LOC_CREGISTER) then
+ begin
+ hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
+ hregister2:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
+ cg64.a_load64_loc_reg(current_asmdata.CurrAsmList,left.location,joinreg64(hregister,hregister2));
+ location_freetemp(current_asmdata.CurrAsmList,left.location);
+ location_reset(left.location,LOC_REGISTER,left.location.size);
+ left.location.register64.reglo:=hregister;
+ left.location.register64.reghi:=hregister2;
+ end;
+ end
+ else
+ begin
+ location_swap(left.location,right.location);
+ toggleflag(nf_swapped);
+ end;
+ end;
+
+ { at this point, left.location.loc should be LOC_REGISTER }
+ if right.location.loc=LOC_REGISTER then
+ begin
+ emit_reg_reg(A_CMP,S_W,GetNextReg(right.location.register64.reghi),GetNextReg(left.location.register64.reghi));
+ firstjmp64bitcmp;
+ emit_reg_reg(A_CMP,S_W,right.location.register64.reghi,left.location.register64.reghi);
+ middlejmp64bitcmp;
+ emit_reg_reg(A_CMP,S_W,GetNextReg(right.location.register64.reglo),GetNextReg(left.location.register64.reglo));
+ middlejmp64bitcmp;
+ emit_reg_reg(A_CMP,S_W,right.location.register64.reglo,left.location.register64.reglo);
+ lastjmp64bitcmp;
+ end
+ else
+ begin
+ case right.location.loc of
+ LOC_CREGISTER :
+ begin
+ emit_reg_reg(A_CMP,S_W,GetNextReg(right.location.register64.reghi),GetNextReg(left.location.register64.reghi));
+ firstjmp64bitcmp;
+ emit_reg_reg(A_CMP,S_W,right.location.register64.reghi,left.location.register64.reghi);
+ middlejmp64bitcmp;
+ emit_reg_reg(A_CMP,S_W,GetNextReg(right.location.register64.reglo),GetNextReg(left.location.register64.reglo));
+ middlejmp64bitcmp;
+ emit_reg_reg(A_CMP,S_W,right.location.register64.reglo,left.location.register64.reglo);
+ lastjmp64bitcmp;
+ end;
+ LOC_CREFERENCE,
+ LOC_REFERENCE :
+ begin
+ tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,right.location.reference);
+ href:=right.location.reference;
+ inc(href.offset,6);
+ emit_ref_reg(A_CMP,S_W,href,GetNextReg(left.location.register64.reghi));
+ firstjmp64bitcmp;
+ dec(href.offset,2);
+ emit_ref_reg(A_CMP,S_W,href,left.location.register64.reghi);
+ middlejmp64bitcmp;
+ dec(href.offset,2);
+ emit_ref_reg(A_CMP,S_W,href,GetNextReg(left.location.register64.reglo));
+ middlejmp64bitcmp;
+ emit_ref_reg(A_CMP,S_W,right.location.reference,left.location.register64.reglo);
+ lastjmp64bitcmp;
+ cg.a_jmp_always(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
+ location_freetemp(current_asmdata.CurrAsmList,right.location);
+ end;
+ LOC_CONSTANT :
+ begin
+ current_asmdata.CurrAsmList.concat(taicpu.op_const_reg(A_CMP,S_W,aint((right.location.value64 shr 48) and $FFFF),GetNextReg(left.location.register64.reghi)));
+ firstjmp64bitcmp;
+ current_asmdata.CurrAsmList.concat(taicpu.op_const_reg(A_CMP,S_W,aint((right.location.value64 shr 32) and $FFFF),left.location.register64.reghi));
+ middlejmp64bitcmp;
+ current_asmdata.CurrAsmList.concat(taicpu.op_const_reg(A_CMP,S_W,aint((right.location.value64 shr 16) and $FFFF),GetNextReg(left.location.register64.reglo)));
+ middlejmp64bitcmp;
+ current_asmdata.CurrAsmList.concat(taicpu.op_const_reg(A_CMP,S_W,aint(right.location.value64 and $FFFF),left.location.register64.reglo));
+ lastjmp64bitcmp;
+ end;
+ else
+ internalerror(200203282);
+ end;
+ end;
+
+ { we have LOC_JUMP as result }
+ location_reset(location,LOC_JUMP,OS_NO)
+ end;
+
+ procedure ti8086addnode.second_cmp32bit;
+ var
+ hregister : tregister;
+ href : treference;
+ unsigned : boolean;
+
+ procedure firstjmp32bitcmp;
+
+ var
+ oldnodetype : tnodetype;
+
+ begin
+{$ifdef OLDREGVARS}
+ load_all_regvars(current_asmdata.CurrAsmList);
+{$endif OLDREGVARS}
+ { the jump the sequence is a little bit hairy }
+ case nodetype of
+ ltn,gtn:
+ begin
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),current_procinfo.CurrTrueLabel);
+ { cheat a little bit for the negative test }
+ toggleflag(nf_swapped);
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),current_procinfo.CurrFalseLabel);
+ toggleflag(nf_swapped);
+ end;
+ lten,gten:
+ begin
+ oldnodetype:=nodetype;
+ if nodetype=lten then
+ nodetype:=ltn
+ else
+ nodetype:=gtn;
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),current_procinfo.CurrTrueLabel);
+ { cheat for the negative test }
+ if nodetype=ltn then
+ nodetype:=gtn
+ else
+ nodetype:=ltn;
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),current_procinfo.CurrFalseLabel);
+ nodetype:=oldnodetype;
+ end;
+ equaln:
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,current_procinfo.CurrFalseLabel);
+ unequaln:
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,current_procinfo.CurrTrueLabel);
+ end;
+ end;
+
+ procedure secondjmp32bitcmp;
+
+ begin
+ { the jump the sequence is a little bit hairy }
+ case nodetype of
+ ltn,gtn,lten,gten:
+ begin
+ { the comparisaion of the low dword have to be }
+ { always unsigned! }
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(true),current_procinfo.CurrTrueLabel);
+ cg.a_jmp_always(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
+ end;
+ equaln:
+ begin
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,current_procinfo.CurrFalseLabel);
+ cg.a_jmp_always(current_asmdata.CurrAsmList,current_procinfo.CurrTrueLabel);
+ end;
+ unequaln:
+ begin
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,current_procinfo.CurrTrueLabel);
+ cg.a_jmp_always(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
+ end;
+ end;
+ end;
+
+ begin
+ pass_left_right;
+
+ unsigned:=((left.resultdef.typ=orddef) and
+ (torddef(left.resultdef).ordtype=u32bit)) or
+ ((right.resultdef.typ=orddef) and
+ (torddef(right.resultdef).ordtype=u32bit));
+
+ { left and right no register? }
+ { then one must be demanded }
+ if (left.location.loc<>LOC_REGISTER) then
+ begin
+ if (right.location.loc<>LOC_REGISTER) then
+ begin
+ { we can reuse a CREGISTER for comparison }
+ if (left.location.loc<>LOC_CREGISTER) then
+ begin
+ hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
+ cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_32,left.location,hregister);
+ location_freetemp(current_asmdata.CurrAsmList,left.location);
+ location_reset(left.location,LOC_REGISTER,left.location.size);
+ left.location.register:=hregister;
+ end;
+ end
+ else
+ begin
+ location_swap(left.location,right.location);
+ toggleflag(nf_swapped);
+ end;
+ end;
+
+ { at this point, left.location.loc should be LOC_REGISTER }
+ if right.location.loc=LOC_REGISTER then
+ begin
+ emit_reg_reg(A_CMP,S_W,GetNextReg(right.location.register),GetNextReg(left.location.register));
+ firstjmp32bitcmp;
+ emit_reg_reg(A_CMP,S_W,right.location.register,left.location.register);
+ secondjmp32bitcmp;
+ end
+ else
+ begin
+ case right.location.loc of
+ LOC_CREGISTER :
+ begin
+ emit_reg_reg(A_CMP,S_W,GetNextReg(right.location.register),GetNextReg(left.location.register));
+ firstjmp32bitcmp;
+ emit_reg_reg(A_CMP,S_W,right.location.register,left.location.register);
+ secondjmp32bitcmp;
+ end;
+ LOC_CREFERENCE,
+ LOC_REFERENCE :
+ begin
+ tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,right.location.reference);
+ href:=right.location.reference;
+ inc(href.offset,2);
+ emit_ref_reg(A_CMP,S_W,href,GetNextReg(left.location.register));
+ firstjmp32bitcmp;
+ emit_ref_reg(A_CMP,S_W,right.location.reference,left.location.register);
+ secondjmp32bitcmp;
+ cg.a_jmp_always(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
+ location_freetemp(current_asmdata.CurrAsmList,right.location);
+ end;
+ LOC_CONSTANT :
+ begin
+ current_asmdata.CurrAsmList.concat(taicpu.op_const_reg(A_CMP,S_W,aint((right.location.value shr 16) and $FFFF),GetNextReg(left.location.register)));
+ firstjmp32bitcmp;
+ current_asmdata.CurrAsmList.concat(taicpu.op_const_reg(A_CMP,S_W,aint(right.location.value and $FFFF),left.location.register));
+ secondjmp32bitcmp;
+ end;
+ else
+ internalerror(200203282);
+ end;
+ end;
+
+ { we have LOC_JUMP as result }
+ location_reset(location,LOC_JUMP,OS_NO)
+ end;
+
+ procedure ti8086addnode.second_cmpordinal;
+ begin
+ if is_32bit(left.resultdef) then
+ second_cmp32bit
+ else
+ inherited second_cmpordinal;
+ end;
+
+
+{*****************************************************************************
+ x86 MUL
+*****************************************************************************}
+
+ procedure ti8086addnode.second_mul(unsigned: boolean);
+
+ procedure add_mov(instr: Taicpu);
+ begin
+ { Notify the register allocator that we have written a move instruction so
+ it can try to eliminate it. }
+ if (instr.oper[0]^.reg<>current_procinfo.framepointer) and (instr.oper[0]^.reg<>NR_STACK_POINTER_REG) then
+ tcgx86(cg).add_move_instruction(instr);
+ current_asmdata.CurrAsmList.concat(instr);
+ end;
+
+ var reg:Tregister;
+ ref:Treference;
+ use_ref:boolean;
+ hl4 : tasmlabel;
+
+ const
+ asmops: array[boolean] of tasmop = (A_IMUL, A_MUL);
+
+ begin
+ pass_left_right;
+
+ {The location.register will be filled in later (JM)}
+ location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
+ { Mul supports registers and references, so if not register/reference,
+ load the location into a register. }
+ use_ref:=false;
+ if left.location.loc in [LOC_REGISTER,LOC_CREGISTER] then
+ reg:=left.location.register
+ else if left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE] then
+ begin
+ tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,left.location.reference);
+ ref:=left.location.reference;
+ use_ref:=true;
+ end
+ else
+ begin
+ {LOC_CONSTANT for example.}
+ reg:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
+ hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,osuinttype,left.location,reg);
+ end;
+ {Allocate AX.}
+ cg.getcpuregister(current_asmdata.CurrAsmList,NR_AX);
+ {Load the right value.}
+ hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,osuinttype,right.location,NR_AX);
+ {Also allocate DX, since it is also modified by a mul (JM).}
+ cg.getcpuregister(current_asmdata.CurrAsmList,NR_DX);
+ if use_ref then
+ emit_ref(asmops[unsigned],S_W,ref)
+ else
+ emit_reg(asmops[unsigned],S_W,reg);
+ if (cs_check_overflow in current_settings.localswitches) and
+ { 16->32 bit cannot overflow }
+ (not is_32bitint(resultdef)) then
+ begin
+ current_asmdata.getjumplabel(hl4);
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,F_AE,hl4);
+ cg.a_call_name(current_asmdata.CurrAsmList,'FPC_OVERFLOW',false);
+ cg.a_label(current_asmdata.CurrAsmList,hl4);
+ end;
+ {Free AX,DX}
+ cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_DX);
+ if is_32bitint(resultdef) then
+ begin
+ {Allocate an imaginary 32-bit register, which consists of a pair of
+ 16-bit registers and store DX:AX into it}
+ location.register := cg.getintregister(current_asmdata.CurrAsmList,OS_32);
+ add_mov(Taicpu.Op_reg_reg(A_MOV,S_W,NR_AX,location.register));
+ add_mov(Taicpu.Op_reg_reg(A_MOV,S_W,NR_DX,GetNextReg(location.register)));
+ end
+ else
+ begin
+ {Allocate a new register and store the result in AX in it.}
+ location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
+ cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_AX);
+ cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_AX,location.register);
+ end;
+ location_freetemp(current_asmdata.CurrAsmList,left.location);
+ location_freetemp(current_asmdata.CurrAsmList,right.location);
+ end;
+
+
+begin
+ caddnode:=ti8086addnode;
+end.
diff --git a/compiler/i8086/n8086inl.pas b/compiler/i8086/n8086inl.pas
new file mode 100644
index 0000000000..0e381c9d45
--- /dev/null
+++ b/compiler/i8086/n8086inl.pas
@@ -0,0 +1,80 @@
+{
+ Copyright (c) 1998-2002 by Florian Klaempfl
+
+ Generate i8086 inline nodes
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+ ****************************************************************************
+}
+unit n8086inl;
+
+{$i fpcdefs.inc}
+
+interface
+
+ uses
+ nx86inl,node;
+
+ type
+
+ { ti8086inlinenode }
+
+ ti8086inlinenode = class(tx86inlinenode)
+ function typecheck_seg: tnode; override;
+ function first_seg: tnode; override;
+ procedure second_seg; override;
+ end;
+
+implementation
+
+ uses
+ ninl,
+ systems,
+ globtype,globals,
+ cutils,verbose,
+ symconst,
+ defutil,
+ aasmbase,aasmtai,aasmdata,aasmcpu,
+ symtype,symdef,
+ cgbase,pass_2,
+ cpuinfo,cpubase,paramgr,
+ nbas,ncon,ncal,ncnv,nld,ncgutil,
+ tgobj,
+ cga,cgutils,cgx86,cgobj,hlcgobj,
+ htypechk;
+
+ function ti8086inlinenode.typecheck_seg: tnode;
+ begin
+ result := nil;
+ resultdef:=u16inttype;
+ end;
+
+ function ti8086inlinenode.first_seg: tnode;
+ begin
+ expectloc:=LOC_REGISTER;
+ result:=nil;
+ end;
+
+ procedure ti8086inlinenode.second_seg;
+ begin
+ location_reset(location,LOC_REGISTER,OS_16);
+ location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_16);
+ current_asmdata.CurrAsmList.Concat(Taicpu.op_reg_reg(A_MOV,S_W,NR_DS,location.register));
+ end;
+
+begin
+ cinlinenode:=ti8086inlinenode;
+end.
diff --git a/compiler/i8086/n8086mat.pas b/compiler/i8086/n8086mat.pas
new file mode 100644
index 0000000000..d8feaba51f
--- /dev/null
+++ b/compiler/i8086/n8086mat.pas
@@ -0,0 +1,475 @@
+{
+ Copyright (c) 1998-2002 by Florian Klaempfl
+
+ Generate i8086 assembler for math nodes
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+ ****************************************************************************
+}
+unit n8086mat;
+
+{$i fpcdefs.inc}
+
+interface
+
+ uses
+ node,nmat,ncgmat,nx86mat;
+
+ type
+ ti8086moddivnode = class(tmoddivnode)
+ procedure pass_generate_code;override;
+ end;
+
+ ti8086shlshrnode = class(tcgshlshrnode)
+ procedure second_64bit;override;
+ function first_shlshr64bitint: tnode; override;
+ end;
+
+ ti8086unaryminusnode = class(tx86unaryminusnode)
+ end;
+
+ ti8086notnode = class(tx86notnode)
+ end;
+
+
+implementation
+
+ uses
+ globtype,systems,constexp,
+ cutils,verbose,globals,
+ symconst,symdef,aasmbase,aasmtai,aasmdata,aasmcpu,defutil,
+ cgbase,pass_2,
+ ncon,
+ cpubase,cpuinfo,
+ cga,ncgutil,cgobj,cgutils,
+ hlcgobj;
+
+{*****************************************************************************
+ ti8086moddivnode
+*****************************************************************************}
+
+ function log2(i : dword) : dword;
+ begin
+ result:=0;
+ i:=i shr 1;
+ while i<>0 do
+ begin
+ i:=i shr 1;
+ inc(result);
+ end;
+ end;
+
+
+ procedure ti8086moddivnode.pass_generate_code;
+ var
+ hreg1,hreg2:Tregister;
+ power:longint;
+ hl:Tasmlabel;
+ op:Tasmop;
+ e : longint;
+ d,l,r,s,m,a,n,t : dword;
+ m_low,m_high,j,k : qword;
+ begin
+ secondpass(left);
+ if codegenerror then
+ exit;
+ secondpass(right);
+ if codegenerror then
+ exit;
+
+ if is_64bitint(resultdef) then
+ { should be handled in pass_1 (JM) }
+ internalerror(200109052);
+ { put numerator in register }
+ location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
+ hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,resultdef,false);
+ hreg1:=left.location.register;
+
+ if (nodetype=divn) and (right.nodetype=ordconstn) then
+ begin
+ if ispowerof2(tordconstnode(right).value.svalue,power) then
+ begin
+ { for signed numbers, the numerator must be adjusted before the
+ shift instruction, but not wih unsigned numbers! Otherwise,
+ "Cardinal($ffffffff) div 16" overflows! (JM) }
+ if is_signed(left.resultdef) Then
+ begin
+ if (current_settings.optimizecputype <> cpu_386) and
+ not(cs_opt_size in current_settings.optimizerswitches) then
+ { use a sequence without jumps, saw this in
+ comp.compilers (JM) }
+ begin
+ { no jumps, but more operations }
+ hreg2:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
+ emit_reg_reg(A_MOV,S_L,hreg1,hreg2);
+ {If the left value is signed, hreg2=$ffffffff, otherwise 0.}
+ emit_const_reg(A_SAR,S_L,31,hreg2);
+ {If signed, hreg2=right value-1, otherwise 0.}
+ emit_const_reg(A_AND,S_L,tordconstnode(right).value.svalue-1,hreg2);
+ { add to the left value }
+ emit_reg_reg(A_ADD,S_L,hreg2,hreg1);
+ { do the shift }
+ emit_const_reg(A_SAR,S_L,power,hreg1);
+ end
+ else
+ begin
+ { a jump, but less operations }
+ emit_reg_reg(A_TEST,S_L,hreg1,hreg1);
+ current_asmdata.getjumplabel(hl);
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NS,hl);
+ if power=1 then
+ emit_reg(A_INC,S_L,hreg1)
+ else
+ emit_const_reg(A_ADD,S_L,tordconstnode(right).value.svalue-1,hreg1);
+ cg.a_label(current_asmdata.CurrAsmList,hl);
+ emit_const_reg(A_SAR,S_L,power,hreg1);
+ end
+ end
+ else
+ emit_const_reg(A_SHR,S_L,power,hreg1);
+ location.register:=hreg1;
+ end
+ else
+ begin
+ if is_signed(left.resultdef) then
+ begin
+ e:=tordconstnode(right).value.svalue;
+ d:=abs(e);
+ { Determine algorithm (a), multiplier (m), and shift factor (s) for 32-bit
+ signed integer division. Based on: Granlund, T.; Montgomery, P.L.:
+ "Division by Invariant Integers using Multiplication". SIGPLAN Notices,
+ Vol. 29, June 1994, page 61.
+ }
+
+ l:=log2(d);
+ j:=qword($80000000) mod qword(d);
+ k:=(qword(1) shl (32+l)) div (qword($80000000-j));
+ m_low:=((qword(1)) shl (32+l)) div d;
+ m_high:=(((qword(1)) shl (32+l)) + k) div d;
+ while ((m_low shr 1) < (m_high shr 1)) and (l > 0) do
+ begin
+ m_low:=m_low shr 1;
+ m_high:=m_high shr 1;
+ dec(l);
+ end;
+ m:=dword(m_high);
+ s:=l;
+ if (m_high shr 31)<>0 then
+ a:=1
+ else
+ a:=0;
+ cg.getcpuregister(current_asmdata.CurrAsmList,NR_EAX);
+ emit_const_reg(A_MOV,S_L,aint(m),NR_EAX);
+ cg.getcpuregister(current_asmdata.CurrAsmList,NR_EDX);
+ emit_reg(A_IMUL,S_L,hreg1);
+ emit_reg_reg(A_MOV,S_L,hreg1,NR_EAX);
+ if a<>0 then
+ begin
+ emit_reg_reg(A_ADD,S_L,NR_EAX,NR_EDX);
+ {
+ printf ("; dividend: memory location or register other than EAX or EDX\n");
+ printf ("\n");
+ printf ("MOV EAX, 0%08LXh\n", m);
+ printf ("IMUL dividend\n");
+ printf ("MOV EAX, dividend\n");
+ printf ("ADD EDX, EAX\n");
+ if (s) printf ("SAR EDX, %d\n", s);
+ printf ("SHR EAX, 31\n");
+ printf ("ADD EDX, EAX\n");
+ if (e < 0) printf ("NEG EDX\n");
+ printf ("\n");
+ printf ("; quotient now in EDX\n");
+ }
+ end;
+ {
+ printf ("; dividend: memory location of register other than EAX or EDX\n");
+ printf ("\n");
+ printf ("MOV EAX, 0%08LXh\n", m);
+ printf ("IMUL dividend\n");
+ printf ("MOV EAX, dividend\n");
+ if (s) printf ("SAR EDX, %d\n", s);
+ printf ("SHR EAX, 31\n");
+ printf ("ADD EDX, EAX\n");
+ if (e < 0) printf ("NEG EDX\n");
+ printf ("\n");
+ printf ("; quotient now in EDX\n");
+ }
+ if s<>0 then
+ emit_const_reg(A_SAR,S_L,s,NR_EDX);
+ emit_const_reg(A_SHR,S_L,31,NR_EAX);
+ emit_reg_reg(A_ADD,S_L,NR_EAX,NR_EDX);
+ if e<0 then
+ emit_reg(A_NEG,S_L,NR_EDX);
+ cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_EDX);
+ cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_EAX);
+ location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
+ cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_EDX,location.register)
+ end
+ else
+ begin
+ d:=tordconstnode(right).value.svalue;
+ if d>=$80000000 then
+ begin
+ emit_const_reg(A_CMP,S_L,aint(d),hreg1);
+ location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
+ emit_const_reg(A_MOV,S_L,0,location.register);
+ emit_const_reg(A_SBB,S_L,-1,location.register);
+ end
+ else
+ begin
+ { Reduce divisor until it becomes odd }
+ n:=0;
+ t:=d;
+ while (t and 1)=0 do
+ begin
+ t:=t shr 1;
+ inc(n);
+ end;
+ { Generate m, s for algorithm 0. Based on: Granlund, T.; Montgomery,
+ P.L.: "Division by Invariant Integers using Multiplication".
+ SIGPLAN Notices, Vol. 29, June 1994, page 61.
+ }
+ l:=log2(t)+1;
+ j:=qword($ffffffff) mod qword(t);
+ k:=(qword(1) shl (32+l)) div (qword($ffffffff-j));
+ m_low:=((qword(1)) shl (32+l)) div t;
+ m_high:=(((qword(1)) shl (32+l)) + k) div t;
+ while ((m_low shr 1) < (m_high shr 1)) and (l>0) do
+ begin
+ m_low:=m_low shr 1;
+ m_high:=m_high shr 1;
+ l:=l-1;
+ end;
+ if (m_high shr 32)=0 then
+ begin
+ m:=dword(m_high);
+ s:=l;
+ a:=0;
+ end
+
+ { Generate m, s for algorithm 1. Based on: Magenheimer, D.J.; et al:
+ "Integer Multiplication and Division on the HP Precision Architecture".
+ IEEE Transactions on Computers, Vol 37, No. 8, August 1988, page 980.
+ }
+ else
+ begin
+ s:=log2(t);
+ m_low:=(qword(1) shl (32+s)) div qword(t);
+ r:=dword(((qword(1)) shl (32+s)) mod qword(t));
+ if (r < ((t>>1)+1)) then
+ m:=dword(m_low)
+ else
+ m:=dword(m_low)+1;
+ a:=1;
+ end;
+ { Reduce multiplier for either algorithm to smallest possible }
+ while (m and 1)=0 do
+ begin
+ m:=m shr 1;
+ dec(s);
+ end;
+ { Adjust multiplier for reduction of even divisors }
+ inc(s,n);
+ cg.getcpuregister(current_asmdata.CurrAsmList,NR_EAX);
+ emit_const_reg(A_MOV,S_L,aint(m),NR_EAX);
+ cg.getcpuregister(current_asmdata.CurrAsmList,NR_EDX);
+ emit_reg(A_MUL,S_L,hreg1);
+ if a<>0 then
+ begin
+ {
+ printf ("; dividend: register other than EAX or memory location\n");
+ printf ("\n");
+ printf ("MOV EAX, 0%08lXh\n", m);
+ printf ("MUL dividend\n");
+ printf ("ADD EAX, 0%08lXh\n", m);
+ printf ("ADC EDX, 0\n");
+ if (s) printf ("SHR EDX, %d\n", s);
+ printf ("\n");
+ printf ("; quotient now in EDX\n");
+ }
+ emit_const_reg(A_ADD,S_L,aint(m),NR_EAX);
+ emit_const_reg(A_ADC,S_L,0,NR_EDX);
+ end;
+ if s<>0 then
+ emit_const_reg(A_SHR,S_L,aint(s),NR_EDX);
+ cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_EDX);
+ cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_EAX);
+ location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
+ cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_EDX,location.register)
+ end;
+ end
+ end
+ end
+ else
+ begin
+ cg.getcpuregister(current_asmdata.CurrAsmList,NR_EAX);
+ emit_reg_reg(A_MOV,S_L,hreg1,NR_EAX);
+ cg.getcpuregister(current_asmdata.CurrAsmList,NR_EDX);
+ {Sign extension depends on the left type.}
+ if torddef(left.resultdef).ordtype=u32bit then
+ emit_reg_reg(A_XOR,S_L,NR_EDX,NR_EDX)
+ else
+ emit_none(A_CDQ,S_NO);
+
+ {Division depends on the right type.}
+ if Torddef(right.resultdef).ordtype=u32bit then
+ op:=A_DIV
+ else
+ op:=A_IDIV;
+
+ if right.location.loc in [LOC_REFERENCE,LOC_CREFERENCE] then
+ emit_ref(op,S_L,right.location.reference)
+ else if right.location.loc in [LOC_REGISTER,LOC_CREGISTER] then
+ emit_reg(op,S_L,right.location.register)
+ else
+ begin
+ hreg1:=cg.getintregister(current_asmdata.CurrAsmList,right.location.size);
+ hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,u32inttype,right.location,hreg1);
+ emit_reg(op,S_L,hreg1);
+ end;
+
+ {Copy the result into a new register. Release EAX & EDX.}
+ cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_EDX);
+ cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_EAX);
+ location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
+ if nodetype=divn then
+ cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_EAX,location.register)
+ else
+ cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_EDX,location.register);
+ end;
+ end;
+
+
+{*****************************************************************************
+ TI8086SHLRSHRNODE
+*****************************************************************************}
+
+
+ function ti8086shlshrnode.first_shlshr64bitint: tnode;
+ begin
+ result := nil;
+ end;
+
+ procedure ti8086shlshrnode.second_64bit;
+ var
+ hreg64hi,hreg64lo:Tregister;
+ v : TConstExprInt;
+ l1,l2,l3:Tasmlabel;
+ ai: taicpu;
+ begin
+ location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
+
+ { load left operator in a register }
+ hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,resultdef,false);
+ hreg64hi:=left.location.register64.reghi;
+ hreg64lo:=left.location.register64.reglo;
+
+ if right.nodetype=ordconstn then
+ v:=Tordconstnode(right).value and 63;
+
+ { shifting by 0 directly coded: }
+ if (right.nodetype=ordconstn) and (v=0) then
+ begin
+ { ultra hyper fast shift by 0 }
+ end
+ { shifting by 1 directly coded: }
+ else if (right.nodetype=ordconstn) and (v=1) then
+ begin
+ if nodetype=shln then
+ begin
+ emit_const_reg(A_SHL,S_W,1,hreg64lo);
+ emit_const_reg(A_RCL,S_W,1,GetNextReg(hreg64lo));
+ emit_const_reg(A_RCL,S_W,1,hreg64hi);
+ emit_const_reg(A_RCL,S_W,1,GetNextReg(hreg64hi));
+ end
+ else
+ begin
+ emit_const_reg(A_SHR,S_W,1,GetNextReg(hreg64hi));
+ emit_const_reg(A_RCR,S_W,1,hreg64hi);
+ emit_const_reg(A_RCR,S_W,1,GetNextReg(hreg64lo));
+ emit_const_reg(A_RCR,S_W,1,hreg64lo);
+ end;
+ end
+ else
+ begin
+ { load right operators in a register }
+ cg.getcpuregister(current_asmdata.CurrAsmList,NR_CX);
+
+ { shifting by a constant? }
+ if right.nodetype=ordconstn then
+ begin
+ v:=Tordconstnode(right).value and 63;
+ hlcg.a_load_const_reg(current_asmdata.CurrAsmList,u16inttype,v,NR_CX);
+ end
+ else
+ begin
+ hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,u16inttype,right.location,NR_CX);
+
+ { left operator is already in a register }
+ { hence are both in a register }
+ { is it in the case CX ? }
+ end;
+
+ current_asmdata.getjumplabel(l1);
+ current_asmdata.getjumplabel(l2);
+ current_asmdata.getjumplabel(l3);
+ { for consts, we don't need the extra checks for 0 or >= 64, since
+ we've already handled them earlier as a special case }
+ if right.nodetype<>ordconstn then
+ begin
+ emit_const_reg(A_CMP,S_L,64,NR_CX);
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,F_L,l1);
+ cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_XOR,OS_32,hreg64lo,hreg64lo);
+ cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_XOR,OS_32,hreg64hi,hreg64hi);
+ cg.a_jmp_always(current_asmdata.CurrAsmList,l3);
+ cg.a_label(current_asmdata.CurrAsmList,l1);
+ emit_reg_reg(A_TEST,S_W,NR_CX,NR_CX);
+ cg.a_jmp_flags(current_asmdata.CurrAsmList,F_E,l3);
+ end;
+ cg.a_label(current_asmdata.CurrAsmList,l2);
+ if nodetype=shln then
+ begin
+ emit_const_reg(A_SHL,S_W,1,hreg64lo);
+ emit_const_reg(A_RCL,S_W,1,GetNextReg(hreg64lo));
+ emit_const_reg(A_RCL,S_W,1,hreg64hi);
+ emit_const_reg(A_RCL,S_W,1,GetNextReg(hreg64hi));
+ end
+ else
+ begin
+ emit_const_reg(A_SHR,S_W,1,GetNextReg(hreg64hi));
+ emit_const_reg(A_RCR,S_W,1,hreg64hi);
+ emit_const_reg(A_RCR,S_W,1,GetNextReg(hreg64lo));
+ emit_const_reg(A_RCR,S_W,1,hreg64lo);
+ end;
+ ai:=Taicpu.Op_Sym(A_LOOP,S_W,l2);
+ ai.is_jmp := True;
+ current_asmdata.CurrAsmList.Concat(ai);
+ cg.a_label(current_asmdata.CurrAsmList,l3);
+
+ cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_CX);
+ end;
+
+ location.register64.reglo:=hreg64lo;
+ location.register64.reghi:=hreg64hi;
+ end;
+
+
+begin
+ cunaryminusnode:=ti8086unaryminusnode;
+ cmoddivnode:=ti8086moddivnode;
+ cshlshrnode:=ti8086shlshrnode;
+ cnotnode:=ti8086notnode;
+end.
diff --git a/compiler/i8086/r8086ari.inc b/compiler/i8086/r8086ari.inc
new file mode 100644
index 0000000000..308a4e9366
--- /dev/null
+++ b/compiler/i8086/r8086ari.inc
@@ -0,0 +1,82 @@
+{ don't edit, this file is generated from x86reg.dat }
+2,
+1,
+3,
+14,
+13,
+21,
+15,
+6,
+5,
+39,
+40,
+41,
+42,
+26,
+7,
+10,
+19,
+9,
+33,
+34,
+35,
+36,
+37,
+38,
+27,
+11,
+4,
+22,
+16,
+8,
+20,
+12,
+25,
+28,
+18,
+24,
+32,
+30,
+31,
+57,
+58,
+59,
+60,
+61,
+62,
+63,
+64,
+17,
+23,
+29,
+56,
+48,
+49,
+50,
+51,
+52,
+53,
+54,
+55,
+43,
+44,
+45,
+46,
+47,
+65,
+66,
+67,
+68,
+69,
+70,
+71,
+72,
+73,
+74,
+75,
+76,
+77,
+78,
+79,
+80,
+0
diff --git a/compiler/i8086/r8086att.inc b/compiler/i8086/r8086att.inc
new file mode 100644
index 0000000000..a1ffa9a4e5
--- /dev/null
+++ b/compiler/i8086/r8086att.inc
@@ -0,0 +1,82 @@
+{ don't edit, this file is generated from x86reg.dat }
+'INVALID',
+'%al',
+'%ah',
+'%ax',
+'%eax',
+'%cl',
+'%ch',
+'%cx',
+'%ecx',
+'%dl',
+'%dh',
+'%dx',
+'%edx',
+'%bl',
+'%bh',
+'%bx',
+'%ebx',
+'%si',
+'%esi',
+'%di',
+'%edi',
+'%bp',
+'%ebp',
+'%sp',
+'%esp',
+'%eip',
+'%cs',
+'%ds',
+'%es',
+'%ss',
+'%fs',
+'%gs',
+'%flags',
+'%dr0',
+'%dr1',
+'%dr2',
+'%dr3',
+'%dr6',
+'%dr7',
+'%cr0',
+'%cr2',
+'%cr3',
+'%cr4',
+'%tr3',
+'%tr4',
+'%tr5',
+'%tr6',
+'%tr7',
+'%st(0)',
+'%st(1)',
+'%st(2)',
+'%st(3)',
+'%st(4)',
+'%st(5)',
+'%st(6)',
+'%st(7)',
+'%st',
+'%mm0',
+'%mm1',
+'%mm2',
+'%mm3',
+'%mm4',
+'%mm5',
+'%mm6',
+'%mm7',
+'%xmm0',
+'%xmm1',
+'%xmm2',
+'%xmm3',
+'%xmm4',
+'%xmm5',
+'%xmm6',
+'%xmm7',
+'%ymm0',
+'%ymm1',
+'%ymm2',
+'%ymm3',
+'%ymm4',
+'%ymm5',
+'%ymm6',
+'%ymm7'
diff --git a/compiler/i8086/r8086con.inc b/compiler/i8086/r8086con.inc
new file mode 100644
index 0000000000..7490b4284b
--- /dev/null
+++ b/compiler/i8086/r8086con.inc
@@ -0,0 +1,82 @@
+{ don't edit, this file is generated from x86reg.dat }
+NR_NO = tregister($00000000);
+NR_AL = tregister($01010000);
+NR_AH = tregister($01020000);
+NR_AX = tregister($01030000);
+NR_EAX = tregister($01040000);
+NR_CL = tregister($01010001);
+NR_CH = tregister($01020001);
+NR_CX = tregister($01030001);
+NR_ECX = tregister($01040001);
+NR_DL = tregister($01010002);
+NR_DH = tregister($01020002);
+NR_DX = tregister($01030002);
+NR_EDX = tregister($01040002);
+NR_BL = tregister($01010003);
+NR_BH = tregister($01020003);
+NR_BX = tregister($01030003);
+NR_EBX = tregister($01040003);
+NR_SI = tregister($01030004);
+NR_ESI = tregister($01040004);
+NR_DI = tregister($01030005);
+NR_EDI = tregister($01040005);
+NR_BP = tregister($01030006);
+NR_EBP = tregister($01040006);
+NR_SP = tregister($01030007);
+NR_ESP = tregister($01040007);
+NR_EIP = tregister($05040000);
+NR_CS = tregister($05000001);
+NR_DS = tregister($05000002);
+NR_ES = tregister($05000003);
+NR_SS = tregister($05000004);
+NR_FS = tregister($05000005);
+NR_GS = tregister($05000006);
+NR_FLAGS = tregister($05000007);
+NR_DR0 = tregister($05000007);
+NR_DR1 = tregister($05000008);
+NR_DR2 = tregister($05000009);
+NR_DR3 = tregister($0500000a);
+NR_DR6 = tregister($0500000b);
+NR_DR7 = tregister($0500000c);
+NR_CR0 = tregister($0500000d);
+NR_CR2 = tregister($0500000e);
+NR_CR3 = tregister($0500000f);
+NR_CR4 = tregister($05000010);
+NR_TR3 = tregister($05000011);
+NR_TR4 = tregister($05000012);
+NR_TR5 = tregister($05000013);
+NR_TR6 = tregister($05000014);
+NR_TR7 = tregister($05000015);
+NR_ST0 = tregister($02000000);
+NR_ST1 = tregister($02000001);
+NR_ST2 = tregister($02000002);
+NR_ST3 = tregister($02000003);
+NR_ST4 = tregister($02000004);
+NR_ST5 = tregister($02000005);
+NR_ST6 = tregister($02000006);
+NR_ST7 = tregister($02000007);
+NR_ST = tregister($02000008);
+NR_MM0 = tregister($03000000);
+NR_MM1 = tregister($03000001);
+NR_MM2 = tregister($03000002);
+NR_MM3 = tregister($03000003);
+NR_MM4 = tregister($03000004);
+NR_MM5 = tregister($03000005);
+NR_MM6 = tregister($03000006);
+NR_MM7 = tregister($03000007);
+NR_XMM0 = tregister($040C0000);
+NR_XMM1 = tregister($040C0001);
+NR_XMM2 = tregister($040C0002);
+NR_XMM3 = tregister($040C0003);
+NR_XMM4 = tregister($040C0004);
+NR_XMM5 = tregister($040C0005);
+NR_XMM6 = tregister($040C0006);
+NR_XMM7 = tregister($040C0007);
+NR_YMM0 = tregister($040D0000);
+NR_YMM1 = tregister($040D0001);
+NR_YMM2 = tregister($040D0002);
+NR_YMM3 = tregister($040D0003);
+NR_YMM4 = tregister($040D0004);
+NR_YMM5 = tregister($040D0005);
+NR_YMM6 = tregister($040D0006);
+NR_YMM7 = tregister($040D0007);
diff --git a/compiler/i8086/r8086dwrf.inc b/compiler/i8086/r8086dwrf.inc
new file mode 100644
index 0000000000..89af30a5fb
--- /dev/null
+++ b/compiler/i8086/r8086dwrf.inc
@@ -0,0 +1,82 @@
+{ don't edit, this file is generated from x86reg.dat }
+-1,
+0,
+0,
+0,
+0,
+1,
+1,
+1,
+1,
+2,
+2,
+2,
+2,
+3,
+3,
+3,
+3,
+6,
+6,
+7,
+7,
+5,
+5,
+4,
+4,
+8,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+11,
+12,
+13,
+14,
+15,
+16,
+17,
+18,
+11,
+29,
+30,
+31,
+32,
+33,
+34,
+35,
+36,
+21,
+22,
+23,
+24,
+25,
+26,
+27,
+28,
+21,
+22,
+23,
+24,
+25,
+26,
+27,
+28
diff --git a/compiler/i8086/r8086int.inc b/compiler/i8086/r8086int.inc
new file mode 100644
index 0000000000..c1cc5aafe9
--- /dev/null
+++ b/compiler/i8086/r8086int.inc
@@ -0,0 +1,82 @@
+{ don't edit, this file is generated from x86reg.dat }
+'INVALID',
+'al',
+'ah',
+'ax',
+'eax',
+'cl',
+'ch',
+'cx',
+'ecx',
+'dl',
+'dh',
+'dx',
+'edx',
+'bl',
+'bh',
+'bx',
+'ebx',
+'si',
+'esi',
+'di',
+'edi',
+'bp',
+'ebp',
+'sp',
+'esp',
+'eip',
+'cs',
+'ds',
+'es',
+'ss',
+'fs',
+'gs',
+'flags',
+'dr0',
+'dr1',
+'dr2',
+'dr3',
+'dr6',
+'dr7',
+'cr0',
+'cr2',
+'cr3',
+'cr4',
+'tr3',
+'tr4',
+'tr5',
+'tr6',
+'tr7',
+'st(0)',
+'st(1)',
+'st(2)',
+'st(3)',
+'st(4)',
+'st(5)',
+'st(6)',
+'st(7)',
+'st',
+'mm0',
+'mm1',
+'mm2',
+'mm3',
+'mm4',
+'mm5',
+'mm6',
+'mm7',
+'xmm0',
+'xmm1',
+'xmm2',
+'xmm3',
+'xmm4',
+'xmm5',
+'xmm6',
+'xmm7',
+'ymm0',
+'ymm1',
+'ymm2',
+'ymm3',
+'ymm4',
+'ymm5',
+'ymm6',
+'ymm7'
diff --git a/compiler/i8086/r8086iri.inc b/compiler/i8086/r8086iri.inc
new file mode 100644
index 0000000000..6dc9c21e2f
--- /dev/null
+++ b/compiler/i8086/r8086iri.inc
@@ -0,0 +1,82 @@
+{ don't edit, this file is generated from x86reg.dat }
+0,
+2,
+1,
+3,
+14,
+13,
+21,
+15,
+6,
+5,
+39,
+40,
+41,
+42,
+26,
+7,
+10,
+19,
+9,
+33,
+34,
+35,
+36,
+37,
+38,
+27,
+11,
+4,
+22,
+16,
+8,
+20,
+12,
+25,
+28,
+18,
+24,
+32,
+30,
+31,
+57,
+58,
+59,
+60,
+61,
+62,
+63,
+64,
+17,
+23,
+29,
+56,
+48,
+49,
+50,
+51,
+52,
+53,
+54,
+55,
+43,
+44,
+45,
+46,
+47,
+65,
+66,
+67,
+68,
+69,
+70,
+71,
+72,
+73,
+74,
+75,
+76,
+77,
+78,
+79,
+80
diff --git a/compiler/i8086/r8086nasm.inc b/compiler/i8086/r8086nasm.inc
new file mode 100644
index 0000000000..d8d754fa18
--- /dev/null
+++ b/compiler/i8086/r8086nasm.inc
@@ -0,0 +1,82 @@
+{ don't edit, this file is generated from x86reg.dat }
+'INVALID',
+'al',
+'ah',
+'ax',
+'eax',
+'cl',
+'ch',
+'cx',
+'ecx',
+'dl',
+'dh',
+'dx',
+'edx',
+'bl',
+'bh',
+'bx',
+'ebx',
+'si',
+'esi',
+'di',
+'edi',
+'bp',
+'ebp',
+'sp',
+'esp',
+'eip',
+'cs',
+'ds',
+'es',
+'ss',
+'fs',
+'gs',
+'flags',
+'dr0',
+'dr1',
+'dr2',
+'dr3',
+'dr6',
+'dr7',
+'cr0',
+'cr2',
+'cr3',
+'cr4',
+'tr3',
+'tr4',
+'tr5',
+'tr6',
+'tr7',
+'st0',
+'st1',
+'st2',
+'st3',
+'st4',
+'st5',
+'st6',
+'st7',
+'st0',
+'mm0',
+'mm1',
+'mm2',
+'mm3',
+'mm4',
+'mm5',
+'mm6',
+'mm7',
+'xmm0',
+'xmm1',
+'xmm2',
+'xmm3',
+'xmm4',
+'xmm5',
+'xmm6',
+'xmm7',
+'ymm0',
+'ymm1',
+'ymm2',
+'ymm3',
+'ymm4',
+'ymm5',
+'ymm6',
+'ymm7'
diff --git a/compiler/i8086/r8086nor.inc b/compiler/i8086/r8086nor.inc
new file mode 100644
index 0000000000..b4d5de5c03
--- /dev/null
+++ b/compiler/i8086/r8086nor.inc
@@ -0,0 +1,2 @@
+{ don't edit, this file is generated from x86reg.dat }
+81
diff --git a/compiler/i8086/r8086nri.inc b/compiler/i8086/r8086nri.inc
new file mode 100644
index 0000000000..6dc9c21e2f
--- /dev/null
+++ b/compiler/i8086/r8086nri.inc
@@ -0,0 +1,82 @@
+{ don't edit, this file is generated from x86reg.dat }
+0,
+2,
+1,
+3,
+14,
+13,
+21,
+15,
+6,
+5,
+39,
+40,
+41,
+42,
+26,
+7,
+10,
+19,
+9,
+33,
+34,
+35,
+36,
+37,
+38,
+27,
+11,
+4,
+22,
+16,
+8,
+20,
+12,
+25,
+28,
+18,
+24,
+32,
+30,
+31,
+57,
+58,
+59,
+60,
+61,
+62,
+63,
+64,
+17,
+23,
+29,
+56,
+48,
+49,
+50,
+51,
+52,
+53,
+54,
+55,
+43,
+44,
+45,
+46,
+47,
+65,
+66,
+67,
+68,
+69,
+70,
+71,
+72,
+73,
+74,
+75,
+76,
+77,
+78,
+79,
+80
diff --git a/compiler/i8086/r8086num.inc b/compiler/i8086/r8086num.inc
new file mode 100644
index 0000000000..b64c292e6b
--- /dev/null
+++ b/compiler/i8086/r8086num.inc
@@ -0,0 +1,82 @@
+{ don't edit, this file is generated from x86reg.dat }
+tregister($00000000),
+tregister($01010000),
+tregister($01020000),
+tregister($01030000),
+tregister($01040000),
+tregister($01010001),
+tregister($01020001),
+tregister($01030001),
+tregister($01040001),
+tregister($01010002),
+tregister($01020002),
+tregister($01030002),
+tregister($01040002),
+tregister($01010003),
+tregister($01020003),
+tregister($01030003),
+tregister($01040003),
+tregister($01030004),
+tregister($01040004),
+tregister($01030005),
+tregister($01040005),
+tregister($01030006),
+tregister($01040006),
+tregister($01030007),
+tregister($01040007),
+tregister($05040000),
+tregister($05000001),
+tregister($05000002),
+tregister($05000003),
+tregister($05000004),
+tregister($05000005),
+tregister($05000006),
+tregister($05000007),
+tregister($05000007),
+tregister($05000008),
+tregister($05000009),
+tregister($0500000a),
+tregister($0500000b),
+tregister($0500000c),
+tregister($0500000d),
+tregister($0500000e),
+tregister($0500000f),
+tregister($05000010),
+tregister($05000011),
+tregister($05000012),
+tregister($05000013),
+tregister($05000014),
+tregister($05000015),
+tregister($02000000),
+tregister($02000001),
+tregister($02000002),
+tregister($02000003),
+tregister($02000004),
+tregister($02000005),
+tregister($02000006),
+tregister($02000007),
+tregister($02000008),
+tregister($03000000),
+tregister($03000001),
+tregister($03000002),
+tregister($03000003),
+tregister($03000004),
+tregister($03000005),
+tregister($03000006),
+tregister($03000007),
+tregister($040C0000),
+tregister($040C0001),
+tregister($040C0002),
+tregister($040C0003),
+tregister($040C0004),
+tregister($040C0005),
+tregister($040C0006),
+tregister($040C0007),
+tregister($040D0000),
+tregister($040D0001),
+tregister($040D0002),
+tregister($040D0003),
+tregister($040D0004),
+tregister($040D0005),
+tregister($040D0006),
+tregister($040D0007)
diff --git a/compiler/i8086/r8086op.inc b/compiler/i8086/r8086op.inc
new file mode 100644
index 0000000000..f8d7f13e05
--- /dev/null
+++ b/compiler/i8086/r8086op.inc
@@ -0,0 +1,82 @@
+{ don't edit, this file is generated from x86reg.dat }
+0,
+0,
+4,
+0,
+0,
+1,
+5,
+1,
+1,
+2,
+6,
+2,
+2,
+3,
+7,
+3,
+3,
+6,
+6,
+7,
+7,
+5,
+5,
+4,
+4,
+0,
+1,
+3,
+0,
+2,
+4,
+5,
+0,
+0,
+1,
+2,
+3,
+6,
+7,
+0,
+2,
+3,
+4,
+3,
+4,
+5,
+6,
+7,
+0,
+1,
+2,
+3,
+4,
+5,
+6,
+7,
+0,
+0,
+1,
+2,
+3,
+4,
+5,
+6,
+7,
+0,
+1,
+2,
+3,
+4,
+5,
+6,
+7,
+0,
+1,
+2,
+3,
+4,
+5,
+6,
+7
diff --git a/compiler/i8086/r8086ot.inc b/compiler/i8086/r8086ot.inc
new file mode 100644
index 0000000000..663b499a3d
--- /dev/null
+++ b/compiler/i8086/r8086ot.inc
@@ -0,0 +1,82 @@
+{ don't edit, this file is generated from x86reg.dat }
+OT_NONE,
+OT_REG_AL,
+OT_REG8,
+OT_REG_AX,
+OT_REG_EAX,
+OT_REG_CL,
+OT_REG8,
+OT_REG_CX,
+OT_REG_ECX,
+OT_REG8,
+OT_REG8,
+OT_REG_DX,
+OT_REG32,
+OT_REG8,
+OT_REG8,
+OT_REG16,
+OT_REG32,
+OT_REG16,
+OT_REG32,
+OT_REG16,
+OT_REG32,
+OT_REG16,
+OT_REG32,
+OT_REG16,
+OT_REG32,
+OT_NONE,
+OT_REG_CS,
+OT_REG_DESS,
+OT_REG_DESS,
+OT_REG_DESS,
+OT_REG_FSGS,
+OT_REG_FSGS,
+OT_NONE,
+OT_REG_DREG,
+OT_REG_DREG,
+OT_REG_DREG,
+OT_REG_DREG,
+OT_REG_DREG,
+OT_REG_DREG,
+OT_REG_CREG,
+OT_REG_CREG,
+OT_REG_CREG,
+OT_REG_CR4,
+OT_REG_TREG,
+OT_REG_TREG,
+OT_REG_TREG,
+OT_REG_TREG,
+OT_REG_TREG,
+OT_FPU0,
+OT_FPUREG,
+OT_FPUREG,
+OT_FPUREG,
+OT_FPUREG,
+OT_FPUREG,
+OT_FPUREG,
+OT_FPUREG,
+OT_FPU0,
+OT_MMXREG,
+OT_MMXREG,
+OT_MMXREG,
+OT_MMXREG,
+OT_MMXREG,
+OT_MMXREG,
+OT_MMXREG,
+OT_MMXREG,
+OT_XMMREG,
+OT_XMMREG,
+OT_XMMREG,
+OT_XMMREG,
+OT_XMMREG,
+OT_XMMREG,
+OT_XMMREG,
+OT_XMMREG,
+OT_YMMREG,
+OT_YMMREG,
+OT_YMMREG,
+OT_YMMREG,
+OT_YMMREG,
+OT_YMMREG,
+OT_YMMREG,
+OT_YMMREG
diff --git a/compiler/i8086/r8086rni.inc b/compiler/i8086/r8086rni.inc
new file mode 100644
index 0000000000..8ba7ff2abe
--- /dev/null
+++ b/compiler/i8086/r8086rni.inc
@@ -0,0 +1,82 @@
+{ don't edit, this file is generated from x86reg.dat }
+0,
+1,
+5,
+9,
+13,
+2,
+6,
+10,
+14,
+3,
+7,
+11,
+15,
+17,
+19,
+21,
+23,
+4,
+8,
+12,
+16,
+18,
+20,
+22,
+24,
+48,
+49,
+50,
+51,
+52,
+53,
+54,
+55,
+56,
+57,
+58,
+59,
+60,
+61,
+62,
+63,
+64,
+65,
+66,
+67,
+68,
+69,
+70,
+71,
+72,
+73,
+74,
+75,
+76,
+77,
+78,
+79,
+80,
+26,
+27,
+28,
+29,
+30,
+31,
+33,
+32,
+34,
+35,
+36,
+37,
+38,
+39,
+40,
+41,
+42,
+43,
+44,
+45,
+46,
+47,
+25
diff --git a/compiler/i8086/r8086sri.inc b/compiler/i8086/r8086sri.inc
new file mode 100644
index 0000000000..6dc9c21e2f
--- /dev/null
+++ b/compiler/i8086/r8086sri.inc
@@ -0,0 +1,82 @@
+{ don't edit, this file is generated from x86reg.dat }
+0,
+2,
+1,
+3,
+14,
+13,
+21,
+15,
+6,
+5,
+39,
+40,
+41,
+42,
+26,
+7,
+10,
+19,
+9,
+33,
+34,
+35,
+36,
+37,
+38,
+27,
+11,
+4,
+22,
+16,
+8,
+20,
+12,
+25,
+28,
+18,
+24,
+32,
+30,
+31,
+57,
+58,
+59,
+60,
+61,
+62,
+63,
+64,
+17,
+23,
+29,
+56,
+48,
+49,
+50,
+51,
+52,
+53,
+54,
+55,
+43,
+44,
+45,
+46,
+47,
+65,
+66,
+67,
+68,
+69,
+70,
+71,
+72,
+73,
+74,
+75,
+76,
+77,
+78,
+79,
+80
diff --git a/compiler/i8086/r8086stab.inc b/compiler/i8086/r8086stab.inc
new file mode 100644
index 0000000000..4011a98e70
--- /dev/null
+++ b/compiler/i8086/r8086stab.inc
@@ -0,0 +1,82 @@
+{ don't edit, this file is generated from x86reg.dat }
+-1,
+0,
+0,
+0,
+0,
+1,
+1,
+1,
+1,
+2,
+2,
+2,
+2,
+3,
+3,
+3,
+3,
+6,
+6,
+7,
+7,
+5,
+5,
+4,
+4,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+-1,
+12,
+13,
+14,
+15,
+16,
+17,
+18,
+19,
+12,
+29,
+30,
+31,
+32,
+33,
+34,
+35,
+36,
+21,
+22,
+23,
+24,
+25,
+26,
+27,
+28,
+21,
+22,
+23,
+24,
+25,
+26,
+27,
+28
diff --git a/compiler/i8086/r8086std.inc b/compiler/i8086/r8086std.inc
new file mode 100644
index 0000000000..c1cc5aafe9
--- /dev/null
+++ b/compiler/i8086/r8086std.inc
@@ -0,0 +1,82 @@
+{ don't edit, this file is generated from x86reg.dat }
+'INVALID',
+'al',
+'ah',
+'ax',
+'eax',
+'cl',
+'ch',
+'cx',
+'ecx',
+'dl',
+'dh',
+'dx',
+'edx',
+'bl',
+'bh',
+'bx',
+'ebx',
+'si',
+'esi',
+'di',
+'edi',
+'bp',
+'ebp',
+'sp',
+'esp',
+'eip',
+'cs',
+'ds',
+'es',
+'ss',
+'fs',
+'gs',
+'flags',
+'dr0',
+'dr1',
+'dr2',
+'dr3',
+'dr6',
+'dr7',
+'cr0',
+'cr2',
+'cr3',
+'cr4',
+'tr3',
+'tr4',
+'tr5',
+'tr6',
+'tr7',
+'st(0)',
+'st(1)',
+'st(2)',
+'st(3)',
+'st(4)',
+'st(5)',
+'st(6)',
+'st(7)',
+'st',
+'mm0',
+'mm1',
+'mm2',
+'mm3',
+'mm4',
+'mm5',
+'mm6',
+'mm7',
+'xmm0',
+'xmm1',
+'xmm2',
+'xmm3',
+'xmm4',
+'xmm5',
+'xmm6',
+'xmm7',
+'ymm0',
+'ymm1',
+'ymm2',
+'ymm3',
+'ymm4',
+'ymm5',
+'ymm6',
+'ymm7'
diff --git a/compiler/i8086/ra8086att.pas b/compiler/i8086/ra8086att.pas
new file mode 100644
index 0000000000..694aee8f0f
--- /dev/null
+++ b/compiler/i8086/ra8086att.pas
@@ -0,0 +1,59 @@
+{
+ Copyright (c) 1998-2002 by Carl Eric Codere and Peter Vreman
+
+ Does the parsing for the i8086 GNU AS styled inline assembler.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+ ****************************************************************************
+}
+Unit ra8086att;
+
+{$i fpcdefs.inc}
+
+ interface
+
+ uses
+ rax86att;
+
+ type
+ ti8086attreader = class(tx86attreader)
+ end;
+
+
+ implementation
+
+ uses
+ rabase,systems;
+
+const
+ asmmode_i8086_att_info : tasmmodeinfo =
+ (
+ id : asmmode_i8086_att;
+ idtxt : 'ATT';
+ casmreader : ti8086attreader;
+ );
+
+ asmmode_i8086_standard_info : tasmmodeinfo =
+ (
+ id : asmmode_standard;
+ idtxt : 'STANDARD';
+ casmreader : ti8086attreader;
+ );
+
+initialization
+ RegisterAsmMode(asmmode_i8086_att_info);
+ RegisterAsmMode(asmmode_i8086_standard_info);
+end.
diff --git a/compiler/i8086/ra8086int.pas b/compiler/i8086/ra8086int.pas
new file mode 100644
index 0000000000..a0a3dc67c0
--- /dev/null
+++ b/compiler/i8086/ra8086int.pas
@@ -0,0 +1,74 @@
+{
+ Copyright (c) 1998-2006 by Carl Eric Codere and Peter Vreman
+
+ Does the parsing for the i8086 intel styled inline assembler.
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+ ****************************************************************************
+}
+Unit ra8086int;
+
+{$i fpcdefs.inc}
+
+ interface
+
+ uses
+ rax86int;
+
+ type
+ ti8086intreader = class(tx86intreader)
+ // procedure handleopcode;override;
+ end;
+
+
+ implementation
+
+ uses
+ rabase,systems,rax86,aasmcpu;
+
+(*
+ procedure ti386intreader.handleopcode;
+ var
+ instr : Tx86Instruction;
+ begin
+ instr:=Tx86Instruction.Create(Tx86Operand);
+ instr.OpOrder:=op_att;
+ BuildOpcode(instr);
+ instr.AddReferenceSizes;
+ instr.SetInstructionOpsize;
+ {
+ instr.CheckOperandSizes;
+ }
+ instr.ConcatInstruction(curlist);
+ instr.Free;
+ end;
+*)
+
+{*****************************************************************************
+ Initialize
+*****************************************************************************}
+
+const
+ asmmode_i8086_intel_info : tasmmodeinfo =
+ (
+ id : asmmode_i8086_intel;
+ idtxt : 'INTEL';
+ casmreader : ti8086intreader;
+ );
+
+begin
+ RegisterAsmMode(asmmode_i8086_intel_info);
+end.
diff --git a/compiler/i8086/rgcpu.pas b/compiler/i8086/rgcpu.pas
new file mode 100644
index 0000000000..378a1d4a85
--- /dev/null
+++ b/compiler/i8086/rgcpu.pas
@@ -0,0 +1,111 @@
+{
+ Copyright (c) 1998-2002 by Florian Klaempfl
+
+ This unit implements the i386 specific class for the register
+ allocator
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+ ****************************************************************************
+}
+
+unit rgcpu;
+
+{$i fpcdefs.inc}
+
+ interface
+
+ uses
+ cpubase,
+ cpuinfo,
+ aasmbase,aasmtai,aasmdata,
+ cclasses,globtype,cgbase,rgobj,rgx86;
+
+ type
+ trgcpu = class(trgx86)
+ procedure add_constraints(reg:Tregister);override;
+ end;
+
+ trgintcpu = class(trgcpu)
+ procedure add_cpu_interferences(p : tai);override;
+ end;
+
+
+implementation
+
+ uses
+ systems,
+ verbose,
+ aasmcpu,
+ cgutils;
+
+ const
+ { This value is used in tsaved. If the array value is equal
+ to this, then this means that this register is not used.}
+ reg_not_saved = $7fffffff;
+
+{************************************************************************
+ trgcpu
+*************************************************************************}
+
+ procedure trgcpu.add_constraints(reg:Tregister);
+ var
+ supreg : tsuperregister;
+ begin
+ if getsubreg(reg) in [R_SUBL,R_SUBH] then
+ begin
+ { Some registers have no 8-bit subregister }
+ supreg:=getsupreg(reg);
+ add_edge(supreg,RS_SI);
+ add_edge(supreg,RS_DI);
+ add_edge(supreg,RS_BP);
+ end;
+ end;
+
+
+ procedure trgintcpu.add_cpu_interferences(p : tai);
+ var
+ href : treference;
+ i : integer;
+ begin
+ if p.typ=ait_instruction then
+ begin
+ for i:=0 to taicpu(p).ops-1 do
+ begin
+ if taicpu(p).oper[i]^.typ=top_ref then
+ begin
+ href:=taicpu(p).oper[i]^.ref^;
+ if (href.base<>NR_NO) and (getsupreg(href.base)>=first_int_imreg) then
+ begin
+ add_edge(getsupreg(href.base),RS_AX);
+ add_edge(getsupreg(href.base),RS_CX);
+ add_edge(getsupreg(href.base),RS_DX);
+ add_edge(getsupreg(href.base),RS_SI);
+ add_edge(getsupreg(href.base),RS_DI);
+ end;
+ if (href.index<>NR_NO) and (getsupreg(href.index)>=first_int_imreg) then
+ begin
+ add_edge(getsupreg(href.index),RS_AX);
+ add_edge(getsupreg(href.index),RS_BX);
+ add_edge(getsupreg(href.index),RS_CX);
+ add_edge(getsupreg(href.index),RS_DX);
+ add_edge(getsupreg(href.index),RS_BP);
+ end;
+ end;
+ end;
+ end;
+ end;
+
+end.
diff --git a/compiler/jvm/hlcgcpu.pas b/compiler/jvm/hlcgcpu.pas
index 629ef845d9..80ae5148d3 100644
--- a/compiler/jvm/hlcgcpu.pas
+++ b/compiler/jvm/hlcgcpu.pas
@@ -48,32 +48,32 @@ uses
function def2regtyp(def: tdef): tregistertype; override;
- procedure a_load_const_cgpara(list : TAsmList;tosize : tdef;a : aint;const cgpara : TCGPara);override;
+ procedure a_load_const_cgpara(list : TAsmList;tosize : tdef;a : tcgint;const cgpara : TCGPara);override;
function a_call_name(list : TAsmList;pd : tprocdef;const s : TSymStr; forceresdef: tdef; weak: boolean): tcgpara;override;
procedure a_call_name_inherited(list : TAsmList;pd : tprocdef;const s : TSymStr);override;
procedure a_call_reg(list: TAsmList; pd: tabstractprocdef; reg: tregister); override;
- procedure a_load_const_reg(list : TAsmList;tosize : tdef;a : aint;register : tregister);override;
- procedure a_load_const_ref(list : TAsmList;tosize : tdef;a : aint;const ref : treference);override;
+ procedure a_load_const_reg(list : TAsmList;tosize : tdef;a : tcgint;register : tregister);override;
+ procedure a_load_const_ref(list : TAsmList;tosize : tdef;a : tcgint;const ref : treference);override;
procedure a_load_reg_ref(list : TAsmList;fromsize, tosize : tdef;register : tregister;const ref : treference);override;
procedure a_load_reg_reg(list : TAsmList;fromsize, tosize : tdef;reg1,reg2 : tregister);override;
procedure a_load_ref_reg(list : TAsmList;fromsize, tosize : tdef;const ref : treference;register : tregister);override;
procedure a_load_ref_ref(list : TAsmList;fromsize, tosize : tdef;const sref : treference;const dref : treference);override;
procedure a_loadaddr_ref_reg(list : TAsmList;fromsize, tosize : tdef;const ref : treference;r : tregister);override;
- procedure a_op_const_reg(list: TAsmList; Op: TOpCG; size: tdef; a: Aint; reg: TRegister); override;
- procedure a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tdef; a: aint; src, dst: tregister); override;
- procedure a_op_const_ref(list: TAsmList; Op: TOpCG; size: tdef; a: Aint; const ref: TReference); override;
+ procedure a_op_const_reg(list: TAsmList; Op: TOpCG; size: tdef; a: tcgint; reg: TRegister); override;
+ procedure a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tdef; a: tcgint; src, dst: tregister); override;
+ procedure a_op_const_ref(list: TAsmList; Op: TOpCG; size: tdef; a: tcgint; const ref: TReference); override;
procedure a_op_ref_reg(list: TAsmList; Op: TOpCG; size: tdef; const ref: TReference; reg: TRegister); override;
procedure a_op_reg_reg_reg(list: TAsmList; op: TOpCg; size: tdef; src1, src2, dst: tregister); override;
procedure a_op_reg_reg(list: TAsmList; Op: TOpCG; size: tdef; reg1, reg2: TRegister); override;
- procedure a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tdef; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); override;
+ procedure a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tdef; a: tcgint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); override;
procedure a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tdef; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation); override;
- procedure a_cmp_const_ref_label(list: TAsmList; size: tdef; cmp_op: topcmp; a: aint; const ref: treference; l: tasmlabel); override;
- procedure a_cmp_const_reg_label(list: TAsmList; size: tdef; cmp_op: topcmp; a: aint; reg: tregister; l: tasmlabel); override;
+ procedure a_cmp_const_ref_label(list: TAsmList; size: tdef; cmp_op: topcmp; a: tcgint; const ref: treference; l: tasmlabel); override;
+ procedure a_cmp_const_reg_label(list: TAsmList; size: tdef; cmp_op: topcmp; a: tcgint; reg: tregister; l: tasmlabel); override;
procedure a_cmp_ref_reg_label(list: TAsmList; size: tdef; cmp_op: topcmp; const ref: treference; reg: tregister; l: tasmlabel); override;
procedure a_cmp_reg_ref_label(list: TAsmList; size: tdef; cmp_op: topcmp; reg: tregister; const ref: treference; l: tasmlabel); override;
procedure a_cmp_reg_reg_label(list: TAsmList; size: tdef; cmp_op: topcmp; reg1, reg2: tregister; l: tasmlabel); override;
@@ -129,7 +129,7 @@ uses
{ extra_slots are the slots that are used by the reference, and that
will be removed by the load operation }
procedure a_load_ref_stack(list : TAsmList;size: tdef;const ref: treference;extra_slots: longint);
- procedure a_load_const_stack(list : TAsmList;size: tdef;a :aint; typ: TRegisterType);
+ procedure a_load_const_stack(list : TAsmList;size: tdef;a :tcgint; typ: TRegisterType);
procedure a_load_stack_loc(list : TAsmList;size: tdef;const loc: tlocation);
procedure a_load_loc_stack(list : TAsmList;size: tdef;const loc: tlocation);
@@ -137,7 +137,7 @@ uses
procedure a_loadfpu_const_stack(list : TAsmList;size: tdef;a :double);
procedure a_op_stack(list : TAsmList;op: topcg; size: tdef; trunc32: boolean);
- procedure a_op_const_stack(list : TAsmList;op: topcg; size: tdef;a : aint);
+ procedure a_op_const_stack(list : TAsmList;op: topcg; size: tdef;a : tcgint);
procedure a_op_reg_stack(list : TAsmList;op: topcg; size: tdef;reg: tregister);
procedure a_op_ref_stack(list : TAsmList;op: topcg; size: tdef;const ref: treference);
procedure a_op_loc_stack(list : TAsmList;op: topcg; size: tdef;const loc: tlocation);
@@ -158,7 +158,7 @@ uses
procedure a_cmp_stack_label(list : TAsmlist; size: tdef; cmp_op: topcmp; lab: tasmlabel);
{ these 2 routines perform the massaging expected by the previous one }
procedure maybe_adjust_cmp_stackval(list : TAsmlist; size: tdef; cmp_op: topcmp);
- function maybe_adjust_cmp_constval(size: tdef; cmp_op: topcmp; a: aint): aint;
+ function maybe_adjust_cmp_constval(size: tdef; cmp_op: topcmp; a: tcgint): tcgint;
{ truncate/sign extend after performing operations on values < 32 bit
that may have overflowed outside the range }
procedure maybe_adjust_op_result(list: TAsmList; op: TOpCg; size: tdef);
@@ -181,7 +181,7 @@ uses
procedure gen_typecheck(list: TAsmList; checkop: tasmop; checkdef: tdef);
protected
- procedure a_load_const_stack_intern(list : TAsmList;size : tdef;a : aint; typ: TRegisterType; legalize_const: boolean);
+ procedure a_load_const_stack_intern(list : TAsmList;size : tdef;a : tcgint; typ: TRegisterType; legalize_const: boolean);
function get_enum_init_val_ref(def: tdef; out ref: treference): boolean;
@@ -206,11 +206,11 @@ uses
{ return the load/store opcode to load/store from/to ref; if the result
has to be and'ed after a load to get the final value, that constant
is returned in finishandval (otherwise that value is set to -1) }
- function loadstoreopcref(def: tdef; isload: boolean; const ref: treference; out finishandval: aint): tasmop;
+ function loadstoreopcref(def: tdef; isload: boolean; const ref: treference; out finishandval: tcgint): tasmop;
{ return the load/store opcode to load/store from/to reg; if the result
has to be and'ed after a load to get the final value, that constant
is returned in finishandval (otherwise that value is set to -1) }
- function loadstoreopc(def: tdef; isload, isarray: boolean; out finishandval: aint): tasmop;
+ function loadstoreopc(def: tdef; isload, isarray: boolean; out finishandval: tcgint): tasmop;
procedure resizestackfpuval(list: TAsmList; fromsize, tosize: tcgsize);
{ in case of an OS_32 OP_DIV, we have to use an OS_S64 OP_IDIV because the
JVM does not support unsigned divisions }
@@ -298,7 +298,7 @@ implementation
end;
end;
- procedure thlcgjvm.a_load_const_cgpara(list: TAsmList; tosize: tdef; a: aint; const cgpara: TCGPara);
+ procedure thlcgjvm.a_load_const_cgpara(list: TAsmList; tosize: tdef; a: tcgint; const cgpara: TCGPara);
begin
tosize:=get_para_push_size(tosize);
if tosize=s8inttype then
@@ -325,7 +325,7 @@ implementation
end;
- procedure thlcgjvm.a_load_const_stack_intern(list : TAsmList;size : tdef;a : aint; typ: TRegisterType; legalize_const: boolean);
+ procedure thlcgjvm.a_load_const_stack_intern(list : TAsmList;size : tdef;a : tcgint; typ: TRegisterType; legalize_const: boolean);
begin
if legalize_const and
(typ=R_INTREGISTER) and
@@ -344,7 +344,7 @@ implementation
end;
- procedure thlcgjvm.a_load_const_stack(list : TAsmList;size : tdef;a : aint; typ: TRegisterType);
+ procedure thlcgjvm.a_load_const_stack(list : TAsmList;size : tdef;a : tcgint; typ: TRegisterType);
const
int2opc: array[-1..5] of tasmop = (a_iconst_m1,a_iconst_0,a_iconst_1,
a_iconst_2,a_iconst_3,a_iconst_4,a_iconst_5);
@@ -530,7 +530,7 @@ implementation
end;
end;
- procedure thlcgjvm.a_op_const_stack(list: TAsmList;op: topcg;size: tdef;a: aint);
+ procedure thlcgjvm.a_op_const_stack(list: TAsmList;op: topcg;size: tdef;a: tcgint);
var
trunc32: boolean;
begin
@@ -849,11 +849,11 @@ implementation
OS_32,OS_S32:
a_op_const_stack(list,OP_XOR,size,cardinal($80000000));
OS_64,OS_S64:
- a_op_const_stack(list,OP_XOR,size,aint($8000000000000000));
+ a_op_const_stack(list,OP_XOR,size,tcgint($8000000000000000));
end;
end;
- function thlcgjvm.maybe_adjust_cmp_constval(size: tdef; cmp_op: topcmp; a: aint): aint;
+ function thlcgjvm.maybe_adjust_cmp_constval(size: tdef; cmp_op: topcmp; a: tcgint): tcgint;
begin
result:=a;
{ use cmp_op because eventually that's what indicates the
@@ -865,7 +865,7 @@ implementation
OS_32,OS_S32:
result:=a xor cardinal($80000000);
OS_64,OS_S64:
- result:=a xor aint($8000000000000000);
+ result:=a xor tcgint($8000000000000000);
end;
end;
@@ -1050,13 +1050,13 @@ implementation
end;
end;
- procedure thlcgjvm.a_load_const_reg(list: TAsmList; tosize: tdef; a: aint; register: tregister);
+ procedure thlcgjvm.a_load_const_reg(list: TAsmList; tosize: tdef; a: tcgint; register: tregister);
begin
a_load_const_stack(list,tosize,a,def2regtyp(tosize));
a_load_stack_reg(list,tosize,register);
end;
- procedure thlcgjvm.a_load_const_ref(list: TAsmList; tosize: tdef; a: aint; const ref: treference);
+ procedure thlcgjvm.a_load_const_ref(list: TAsmList; tosize: tdef; a: tcgint; const ref: treference);
var
extra_slots: longint;
begin
@@ -1121,19 +1121,19 @@ implementation
a_load_ref_reg(list,java_jlobject,java_jlobject,ref,r);
end;
- procedure thlcgjvm.a_op_const_reg(list: TAsmList; Op: TOpCG; size: tdef; a: Aint; reg: TRegister);
+ procedure thlcgjvm.a_op_const_reg(list: TAsmList; Op: TOpCG; size: tdef; a: tcgint; reg: TRegister);
begin
a_op_const_reg_reg(list,op,size,a,reg,reg);
end;
- procedure thlcgjvm.a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tdef; a: aint; src, dst: tregister);
+ procedure thlcgjvm.a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tdef; a: tcgint; src, dst: tregister);
begin
a_load_reg_stack(list,size,src);
a_op_const_stack(list,op,size,a);
a_load_stack_reg(list,size,dst);
end;
- procedure thlcgjvm.a_op_const_ref(list: TAsmList; Op: TOpCG; size: tdef; a: Aint; const ref: TReference);
+ procedure thlcgjvm.a_op_const_ref(list: TAsmList; Op: TOpCG; size: tdef; a: tcgint; const ref: TReference);
var
extra_slots: longint;
begin
@@ -1168,7 +1168,7 @@ implementation
a_op_reg_reg_reg(list,op,size,reg1,reg2,reg2);
end;
- procedure thlcgjvm.a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tdef; a: aint; src, dst: tregister; setflags: boolean; var ovloc: tlocation);
+ procedure thlcgjvm.a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tdef; a: tcgint; src, dst: tregister; setflags: boolean; var ovloc: tlocation);
var
tmpreg: tregister;
begin
@@ -1267,7 +1267,7 @@ implementation
ovloc.loc:=LOC_VOID;
end;
- procedure thlcgjvm.a_cmp_const_ref_label(list: TAsmList; size: tdef; cmp_op: topcmp; a: aint; const ref: treference; l: tasmlabel);
+ procedure thlcgjvm.a_cmp_const_ref_label(list: TAsmList; size: tdef; cmp_op: topcmp; a: tcgint; const ref: treference; l: tasmlabel);
begin
if ref.base<>NR_EVAL_STACK_BASE then
a_load_ref_stack(list,size,ref,prepare_stack_for_ref(list,ref,false));
@@ -1276,7 +1276,7 @@ implementation
a_cmp_stack_label(list,size,cmp_op,l);
end;
- procedure thlcgjvm.a_cmp_const_reg_label(list: TAsmList; size: tdef; cmp_op: topcmp; a: aint; reg: tregister; l: tasmlabel);
+ procedure thlcgjvm.a_cmp_const_reg_label(list: TAsmList; size: tdef; cmp_op: topcmp; a: tcgint; reg: tregister; l: tasmlabel);
begin
a_load_reg_stack(list,size,reg);
maybe_adjust_cmp_stackval(list,size,cmp_op);
@@ -1904,7 +1904,7 @@ implementation
procedure thlcgjvm.a_load_stack_reg(list: TAsmList; size: tdef; reg: tregister);
var
opc: tasmop;
- finishandval: aint;
+ finishandval: tcgint;
begin
opc:=loadstoreopc(size,false,false,finishandval);
list.concat(taicpu.op_reg(opc,reg));
@@ -1917,7 +1917,7 @@ implementation
procedure thlcgjvm.a_load_stack_ref(list: TAsmList; size: tdef; const ref: treference; extra_slots: longint);
var
opc: tasmop;
- finishandval: aint;
+ finishandval: tcgint;
begin
{ fake location that indicates the value has to remain on the stack }
if ref.base=NR_EVAL_STACK_BASE then
@@ -1936,7 +1936,7 @@ implementation
procedure thlcgjvm.a_load_reg_stack(list: TAsmList; size: tdef; reg: tregister);
var
opc: tasmop;
- finishandval: aint;
+ finishandval: tcgint;
begin
opc:=loadstoreopc(size,true,false,finishandval);
list.concat(taicpu.op_reg(opc,reg));
@@ -1951,7 +1951,7 @@ implementation
procedure thlcgjvm.a_load_ref_stack(list: TAsmList; size: tdef; const ref: treference; extra_slots: longint);
var
opc: tasmop;
- finishandval: aint;
+ finishandval: tcgint;
begin
{ fake location that indicates the value is already on the stack? }
if (ref.base=NR_EVAL_STACK_BASE) then
@@ -1971,7 +1971,7 @@ implementation
gen_typecheck(list,a_checkcast,size);
end;
- function thlcgjvm.loadstoreopcref(def: tdef; isload: boolean; const ref: treference; out finishandval: aint): tasmop;
+ function thlcgjvm.loadstoreopcref(def: tdef; isload: boolean; const ref: treference; out finishandval: tcgint): tasmop;
const
{ isload static }
getputopc: array[boolean,boolean] of tasmop =
@@ -2002,7 +2002,7 @@ implementation
result:=loadstoreopc(def,isload,ref.arrayreftype<>art_none,finishandval);
end;
- function thlcgjvm.loadstoreopc(def: tdef; isload, isarray: boolean; out finishandval: aint): tasmop;
+ function thlcgjvm.loadstoreopc(def: tdef; isload, isarray: boolean; out finishandval: tcgint): tasmop;
var
size: longint;
begin
diff --git a/compiler/link.pas b/compiler/link.pas
index 135f21bcc4..2972a2dcd9 100644
--- a/compiler/link.pas
+++ b/compiler/link.pas
@@ -1571,9 +1571,16 @@ Implementation
arfinishcmd : 'gar s $LIB'
);
+ ar_watcom_wlib_omf_info : tarinfo =
+ ( id : ar_watcom_wlib_omf;
+ arcmd : 'wlib -q -fo -c $LIB $FILES';
+ arfinishcmd : ''
+ );
+
initialization
RegisterAr(ar_gnu_ar_info);
RegisterAr(ar_gnu_ar_scripted_info);
RegisterAr(ar_gnu_gar_info);
+ RegisterAr(ar_watcom_wlib_omf_info);
end.
diff --git a/compiler/nadd.pas b/compiler/nadd.pas
index de4c787a41..2747e22ac3 100644
--- a/compiler/nadd.pas
+++ b/compiler/nadd.pas
@@ -1067,12 +1067,12 @@ implementation
operation on a float and int are also handled }
{$ifdef x86}
{ use extended as default real type only when the x87 fpu is used }
- {$ifdef i386}
+ {$if defined(i386) or defined(i8086)}
if not(current_settings.fputype=fpu_x87) then
resultrealdef:=s64floattype
else
resultrealdef:=pbestrealtype^;
- {$endif i386}
+ {$endif i386 or i8086}
{$ifdef x86_64}
{ x86-64 has no x87 only mode, so use always double as default }
resultrealdef:=s64floattype;
@@ -1416,22 +1416,27 @@ implementation
if (torddef(rd).ordtype<>u64bit) then
inserttypeconv(right,u64inttype);
end
- { 64 bit cpus do calculations always in 64 bit }
-{$ifndef cpu64bitaddr}
- { is there a cardinal? }
- else if ((torddef(rd).ordtype=u32bit) or (torddef(ld).ordtype=u32bit)) then
+ { is there a larger int? }
+ else if is_oversizedint(rd) or is_oversizedint(ld) then
+ begin
+ nd:=get_common_intdef(torddef(ld),torddef(rd),false);
+ inserttypeconv(right,nd);
+ inserttypeconv(left,nd);
+ end
+ { is there a native unsigned int? }
+ else if is_nativeuint(rd) or is_nativeuint(ld) then
begin
- { convert positive constants to u32bit }
- if (torddef(ld).ordtype<>u32bit) and
+ { convert positive constants to uinttype }
+ if (not is_nativeuint(ld)) and
is_constintnode(left) and
(tordconstnode(left).value >= 0) then
- inserttypeconv(left,u32inttype);
- if (torddef(rd).ordtype<>u32bit) and
+ inserttypeconv(left,uinttype);
+ if (not is_nativeuint(rd)) and
is_constintnode(right) and
(tordconstnode(right).value >= 0) then
- inserttypeconv(right,u32inttype);
+ inserttypeconv(right,uinttype);
{ when one of the operand is signed or the operation is subn then perform
- the operation in 64bit, can't use rd/ld here because there
+ the operation in a larger signed type, can't use rd/ld here because there
could be already typeconvs inserted.
This is compatible with the code below for other unsigned types (PFV) }
if is_signed(left.resultdef) or
@@ -1441,7 +1446,7 @@ implementation
if nodetype<>subn then
CGMessage(type_h_mixed_signed_unsigned);
{ mark as internal in case added for a subn, so }
- { ttypeconvnode.simplify can remove the 64 bit }
+ { ttypeconvnode.simplify can remove the larger }
{ typecast again if semantically correct. Even }
{ if we could detect that here already, we }
{ mustn't do it here because that would change }
@@ -1451,18 +1456,19 @@ implementation
not is_signed(right.resultdef)) or
(nodetype in [orn,xorn]) then
include(flags,nf_internal);
- inserttypeconv(left,s64inttype);
- inserttypeconv(right,s64inttype);
+ { get next larger signed int type }
+ nd:=get_common_intdef(torddef(sinttype),torddef(uinttype),false);
+ inserttypeconv(left,nd);
+ inserttypeconv(right,nd);
end
else
begin
- if (torddef(left.resultdef).ordtype<>u32bit) then
- inserttypeconv(left,u32inttype);
- if (torddef(right.resultdef).ordtype<>u32bit) then
- inserttypeconv(right,u32inttype);
+ if not is_nativeuint(left.resultdef) then
+ inserttypeconv(left,uinttype);
+ if not is_nativeuint(right.resultdef) then
+ inserttypeconv(right,uinttype);
end;
end
-{$endif cpu64bitaddr}
{ generic ord conversion is sinttype }
else
begin
@@ -1473,15 +1479,8 @@ implementation
is_signed(rd) or
(nodetype=subn) then
begin
-{$ifdef cpunodefaultint}
- { for small cpus we use the smallest common type }
- nd:=get_common_intdef(torddef(ld),torddef(rd),false);
- inserttypeconv(right,nd);
- inserttypeconv(left,nd);
-{$else cpunodefaultint}
inserttypeconv(right,sinttype);
inserttypeconv(left,sinttype);
-{$endif cpunodefaultint}
end
else
begin
@@ -1568,7 +1567,7 @@ implementation
llow:=rlow;
lhigh:=rhigh;
end;
- nd:=tsetdef.create(tsetdef(ld).elementdef,min(llow,rlow),max(lhigh,rhigh));
+ nd:=tsetdef.create(tsetdef(ld).elementdef,min(llow,rlow).svalue,max(lhigh,rhigh).svalue);
inserttypeconv(left,nd);
if (rd.typ=setdef) then
inserttypeconv(right,nd)
@@ -2847,14 +2846,18 @@ implementation
if nodetype in [addn,subn,muln,andn,orn,xorn] then
expectloc:=LOC_REGISTER
else
+{$ifdef cpu16bitalu}
+ expectloc:=LOC_JUMP;
+{$else cpu16bitalu}
expectloc:=LOC_FLAGS;
+{$endif cpu16bitalu}
end
{$endif cpuneedsmulhelper}
{ generic s32bit conversion }
else
begin
{$ifdef cpuneedsmulhelper}
- if (nodetype=muln) and not(torddef(resultdef).ordtype in [u8bit,s8bit]) then
+ if (nodetype=muln) and not(torddef(resultdef).ordtype in [u8bit,s8bit{$ifdef cpu16bitalu},u16bit,s16bit{$endif}]) then
begin
result := nil;
@@ -2883,8 +2886,12 @@ implementation
if nodetype in [addn,subn,muln,andn,orn,xorn] then
expectloc:=LOC_REGISTER
else
+{$ifdef cpu16bitalu}
+ expectloc:=LOC_JUMP;
+{$else cpu16bitalu}
expectloc:=LOC_FLAGS;
- end;
+{$endif cpu16bitalu}
+ end;
end
{ left side a setdef, must be before string processing,
diff --git a/compiler/ncal.pas b/compiler/ncal.pas
index cab23b5a3a..be93ff1bef 100644
--- a/compiler/ncal.pas
+++ b/compiler/ncal.pas
@@ -51,7 +51,8 @@ interface
cnf_create_failed, { exception thrown in constructor -> don't call beforedestruction }
cnf_objc_processed, { the procedure name has been set to the appropriate objc_msgSend* variant -> don't process again }
cnf_objc_id_call, { the procedure is a member call via id -> any ObjC method of any ObjC type in scope is fair game }
- cnf_unit_specified { the unit in which the procedure has to be searched has been specified }
+ cnf_unit_specified, { the unit in which the procedure has to be searched has been specified }
+ cnf_call_never_returns { information for the dfa that a subroutine never returns }
);
tcallnodeflags = set of tcallnodeflag;
@@ -3329,8 +3330,8 @@ implementation
That means the for pushes the para with the
highest offset (see para3) needs to be pushed first
}
-{$if defined(i386) or defined(m68k)}
- { the i386, m68k and jvm code generators expect all reference }
+{$if defined(i386) or defined(i8086) or defined(m68k)}
+ { the i386, i8086, m68k and jvm code generators expect all reference }
{ parameters to be in this order so they can use }
{ pushes in case of no fixed stack }
if (not paramanager.use_fixed_stack and
diff --git a/compiler/ncgflw.pas b/compiler/ncgflw.pas
index 40c12e47c6..2fd1a3a590 100644
--- a/compiler/ncgflw.pas
+++ b/compiler/ncgflw.pas
@@ -72,10 +72,6 @@ interface
procedure pass_generate_code;override;
end;
- tcgraisenode = class(traisenode)
- procedure pass_generate_code;override;
- end;
-
tcgtryexceptnode = class(ttryexceptnode)
procedure pass_generate_code;override;
end;
@@ -950,96 +946,12 @@ implementation
{*****************************************************************************
- SecondRaise
-*****************************************************************************}
-
- procedure tcgraisenode.pass_generate_code;
-
- var
- a : tasmlabel;
- href2: treference;
- paraloc1,paraloc2,paraloc3 : tcgpara;
- pd : tprocdef;
- begin
- location_reset(location,LOC_VOID,OS_NO);
-
- if assigned(left) then
- begin
- pd:=search_system_proc('fpc_raiseexception');
- paraloc1.init;
- paraloc2.init;
- paraloc3.init;
- paramanager.getintparaloc(pd,1,paraloc1);
- paramanager.getintparaloc(pd,2,paraloc2);
- paramanager.getintparaloc(pd,3,paraloc3);
-
- { multiple parameters? }
- if assigned(right) then
- begin
- { frame tree }
- if assigned(third) then
- secondpass(third);
- secondpass(right);
- end;
- secondpass(left);
- if codegenerror then
- exit;
-
- { Push parameters }
- if assigned(right) then
- begin
- { frame tree }
- if assigned(third) then
- cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,third.location,paraloc3)
- else
- cg.a_load_const_cgpara(current_asmdata.CurrAsmList,OS_ADDR,0,paraloc3);
- { push address }
- cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
- end
- else
- begin
- { get current address }
- current_asmdata.getaddrlabel(a);
- cg.a_label(current_asmdata.CurrAsmList,a);
- reference_reset_symbol(href2,a,0,1);
- { push current frame }
- cg.a_load_reg_cgpara(current_asmdata.CurrAsmList,OS_ADDR,NR_FRAME_POINTER_REG,paraloc3);
- { push current address }
- if target_info.system <> system_powerpc_macos then
- cg.a_loadaddr_ref_cgpara(current_asmdata.CurrAsmList,href2,paraloc2)
- else
- cg.a_load_const_cgpara(current_asmdata.CurrAsmList,OS_ADDR,0,paraloc2);
- end;
- cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
- paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
- paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
- paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc3);
- cg.allocallcpuregisters(current_asmdata.CurrAsmList);
- cg.a_call_name(current_asmdata.CurrAsmList,'FPC_RAISEEXCEPTION',false);
- cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
-
- paraloc1.done;
- paraloc2.done;
- paraloc3.done;
- end
- else
- begin
- cg.allocallcpuregisters(current_asmdata.CurrAsmList);
- cg.a_call_name(current_asmdata.CurrAsmList,'FPC_POPADDRSTACK',false);
- cg.a_call_name(current_asmdata.CurrAsmList,'FPC_RERAISE',false);
- cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
- end;
- end;
-
-
-{*****************************************************************************
SecondTryExcept
*****************************************************************************}
var
endexceptlabel : tasmlabel;
-
{ does the necessary things to clean up the object stack }
{ in the except block }
procedure cleanupobjectstack;
@@ -1660,7 +1572,6 @@ begin
ccontinuenode:=tcgcontinuenode;
cgotonode:=tcggotonode;
clabelnode:=tcglabelnode;
- craisenode:=tcgraisenode;
ctryexceptnode:=tcgtryexceptnode;
ctryfinallynode:=tcgtryfinallynode;
connode:=tcgonnode;
diff --git a/compiler/ncginl.pas b/compiler/ncginl.pas
index 60f76dc6a2..13f93a6b2a 100644
--- a/compiler/ncginl.pas
+++ b/compiler/ncginl.pas
@@ -59,6 +59,7 @@ interface
procedure second_setlength; virtual; abstract;
procedure second_box; virtual; abstract;
procedure second_popcnt; virtual;
+ procedure second_seg; virtual; abstract;
end;
implementation
@@ -187,6 +188,8 @@ implementation
second_box;
in_popcnt_x:
second_popcnt;
+ in_seg_x:
+ second_seg;
else internalerror(9);
end;
end;
diff --git a/compiler/ncgmat.pas b/compiler/ncgmat.pas
index 95c796117b..cc3cee544d 100644
--- a/compiler/ncgmat.pas
+++ b/compiler/ncgmat.pas
@@ -179,20 +179,20 @@ implementation
begin
secondpass(left);
location_reset(location,LOC_REGISTER,left.location.size);
- location.register64.reglo:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
- location.register64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
+ location.register64.reglo:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
+ location.register64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
cg64.a_op64_loc_reg(current_asmdata.CurrAsmList,OP_NEG,OS_S64,
left.location,joinreg64(location.register64.reglo,location.register64.reghi));
{ there's only overflow in case left was low(int64) -> -left = left }
if (cs_check_overflow in current_settings.localswitches) then
begin
- tr:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
- cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_XOR,OS_INT,
+ tr:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
+ cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_XOR,OS_32,
aint($80000000),location.register64.reghi,tr);
- cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_INT,
+ cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,
location.register64.reglo,tr);
current_asmdata.getjumplabel(hl);
- cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_NE,0,tr,hl);
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_32,OC_NE,0,tr,hl);
cg.a_call_name(current_asmdata.CurrAsmList,'FPC_OVERFLOW',false);
cg.a_label(current_asmdata.CurrAsmList,hl);
end;
@@ -245,7 +245,7 @@ implementation
if (left.resultdef.size<=sinttype.size) then
opsize:=sinttype
else
- opsize:=s64inttype;
+ opsize:={$ifdef cpu16bitalu}s32inttype{$else}s64inttype{$endif};
{$endif cpunodefaultint}
hlcg.location_force_reg(current_asmdata.CurrAsmList,location,left.resultdef,opsize,false);
hlcg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,opsize,location.register,location.register);
@@ -304,6 +304,7 @@ implementation
paraloc1 : tcgpara;
opsize : tcgsize;
opdef : tdef;
+ pd: tprocdef;
begin
secondpass(left);
if codegenerror then
@@ -384,7 +385,8 @@ implementation
current_asmdata.getjumplabel(hl);
cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_NE,0,hdenom,hl);
paraloc1.init;
- paramanager.getintparaloc(search_system_proc('fpc_handleerror'),1,paraloc1);
+ pd:=search_system_proc('fpc_handleerror');
+ paramanager.getintparaloc(pd,1,paraloc1);
cg.a_load_const_cgpara(current_asmdata.CurrAsmList,OS_S32,aint(200),paraloc1);
paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
cg.a_call_name(current_asmdata.CurrAsmList,'FPC_HANDLEERROR',false);
@@ -435,14 +437,34 @@ implementation
{ load left operators in a register }
if is_signed(left.resultdef) then
begin
- opsize:=OS_SINT;
- opdef:=ossinttype
+ {$ifdef cpu16bitalu}
+ if left.resultdef.size > 2 then
+ begin
+ opsize:=OS_S32;
+ opdef:=s32inttype;
+ end
+ else
+ {$endif cpu16bitalu}
+ begin
+ opsize:=OS_SINT;
+ opdef:=ossinttype
+ end;
end
else
begin
- opsize:=OS_INT;
- opdef:=osuinttype;
- end;
+ {$ifdef cpu16bitalu}
+ if left.resultdef.size > 2 then
+ begin
+ opsize:=OS_32;
+ opdef:=u32inttype;
+ end
+ else
+ {$endif cpu16bitalu}
+ begin
+ opsize:=OS_INT;
+ opdef:=osuinttype;
+ end;
+ end;
{$endif cpunodefaultint}
hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,true);
diff --git a/compiler/ncgmem.pas b/compiler/ncgmem.pas
index 264ae8accc..53b9e47c05 100644
--- a/compiler/ncgmem.pas
+++ b/compiler/ncgmem.pas
@@ -721,8 +721,16 @@ implementation
pd:=search_system_proc('fpc_dynarray_rangecheck');
paramanager.getintparaloc(pd,1,paraloc1);
paramanager.getintparaloc(pd,2,paraloc2);
- cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
- cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
+ if pd.is_pushleftright then
+ begin
+ cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
+ cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
+ end
+ else
+ begin
+ cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
+ cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
+ end;
paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
cg.allocallcpuregisters(current_asmdata.CurrAsmList);
@@ -755,8 +763,16 @@ implementation
pd:=search_system_proc(helpername);
paramanager.getintparaloc(pd,1,paraloc1);
paramanager.getintparaloc(pd,2,paraloc2);
- cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
- cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
+ if pd.is_pushleftright then
+ begin
+ cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
+ cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
+ end
+ else
+ begin
+ cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
+ cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
+ end;
paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
diff --git a/compiler/ncgset.pas b/compiler/ncgset.pas
index 3103669e9f..4ce32f473c 100644
--- a/compiler/ncgset.pas
+++ b/compiler/ncgset.pas
@@ -626,7 +626,7 @@ implementation
genitem(t^.less);
if t^._low=t^._high then
begin
-{$ifndef cpu64bitalu}
+{$ifdef cpu32bitalu}
if def_cgsize(opsize) in [OS_S64,OS_64] then
begin
current_asmdata.getjumplabel(l1);
@@ -635,7 +635,26 @@ implementation
cg.a_label(current_asmdata.CurrAsmList,l1);
end
else
-{$endif not cpu64bitalu}
+{$endif cpu32bitalu}
+{$ifdef cpu16bitalu)}
+ if def_cgsize(opsize) in [OS_S64,OS_64] then
+ begin
+ current_asmdata.getjumplabel(l1);
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(hi(int64(t^._low.svalue)))),GetNextReg(hregister2),l1);
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(lo(hi(int64(t^._low.svalue)))),hregister2,l1);
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(lo(int64(t^._low.svalue)))),GetNextReg(hregister),l1);
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_EQ, aint(lo(lo(int64(t^._low.svalue)))),hregister, blocklabel(t^.blockid));
+ cg.a_label(current_asmdata.CurrAsmList,l1);
+ end
+ else if def_cgsize(opsize) in [OS_S32,OS_32] then
+ begin
+ current_asmdata.getjumplabel(l1);
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_NE, aint(hi(int32(t^._low.svalue))),GetNextReg(hregister),l1);
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_EQ, aint(lo(int32(t^._low.svalue))),hregister, blocklabel(t^.blockid));
+ cg.a_label(current_asmdata.CurrAsmList,l1);
+ end
+ else
+{$endif cpu16bitalu}
begin
hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, OC_EQ, aint(t^._low.svalue),hregister, blocklabel(t^.blockid));
end;
@@ -650,7 +669,7 @@ implementation
{ ELSE-label }
if not lastwasrange or (t^._low-last>1) then
begin
-{$ifndef cpu64bitalu}
+{$ifdef cpu32bitalu}
if def_cgsize(opsize) in [OS_64,OS_S64] then
begin
current_asmdata.getjumplabel(l1);
@@ -663,13 +682,46 @@ implementation
cg.a_label(current_asmdata.CurrAsmList,l1);
end
else
-{$endif not cpu64bitalu}
+{$endif cpu32bitalu}
+{$ifdef cpu16bitalu}
+ if def_cgsize(opsize) in [OS_64,OS_S64] then
+ begin
+ current_asmdata.getjumplabel(l1);
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(hi(int64(t^._low.svalue)))),
+ GetNextReg(hregister2), elselabel);
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(hi(int64(t^._low.svalue)))),
+ GetNextReg(hregister2), l1);
+ { the comparison of the low words must be always unsigned! }
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(hi(int64(t^._low.svalue)))),
+ hregister2, elselabel);
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(lo(hi(int64(t^._low.svalue)))),
+ hregister2, l1);
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(hi(lo(int64(t^._low.svalue)))),
+ GetNextReg(hregister), elselabel);
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(hi(lo(int64(t^._low.svalue)))),
+ GetNextReg(hregister), l1);
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(lo(int64(t^._low.svalue)))), hregister, elselabel);
+ cg.a_label(current_asmdata.CurrAsmList,l1);
+ end
+ else if def_cgsize(opsize) in [OS_32,OS_S32] then
+ begin
+ current_asmdata.getjumplabel(l1);
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(int32(t^._low.svalue))),
+ GetNextReg(hregister), elselabel);
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(int32(t^._low.svalue))),
+ GetNextReg(hregister), l1);
+ { the comparisation of the low dword must be always unsigned! }
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(int32(t^._low.svalue))), hregister, elselabel);
+ cg.a_label(current_asmdata.CurrAsmList,l1);
+ end
+ else
+{$endif cpu16bitalu}
begin
hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, jmp_lt, aint(t^._low.svalue), hregister,
elselabel);
end;
end;
-{$ifndef cpu64bitalu}
+{$ifdef cpu32bitalu}
if def_cgsize(opsize) in [OS_S64,OS_64] then
begin
current_asmdata.getjumplabel(l1);
@@ -681,7 +733,38 @@ implementation
cg.a_label(current_asmdata.CurrAsmList,l1);
end
else
-{$endif not cpu64bitalu}
+{$endif cpu32bitalu}
+{$ifdef cpu16bitalu}
+ if def_cgsize(opsize) in [OS_S64,OS_64] then
+ begin
+ current_asmdata.getjumplabel(l1);
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(hi(int64(t^._high.svalue)))), GetNextReg(hregister2),
+ blocklabel(t^.blockid));
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(hi(int64(t^._high.svalue)))), GetNextReg(hregister2),
+ l1);
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(lo(hi(int64(t^._high.svalue)))), hregister2,
+ blocklabel(t^.blockid));
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(lo(hi(int64(t^._high.svalue)))), hregister2,
+ l1);
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_B, aint(hi(lo(int64(t^._high.svalue)))), GetNextReg(hregister),
+ blocklabel(t^.blockid));
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_A, aint(hi(lo(int64(t^._high.svalue)))), GetNextReg(hregister),
+ l1);
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_BE, aint(lo(lo(int64(t^._high.svalue)))), hregister, blocklabel(t^.blockid));
+ cg.a_label(current_asmdata.CurrAsmList,l1);
+ end
+ else if def_cgsize(opsize) in [OS_S32,OS_32] then
+ begin
+ current_asmdata.getjumplabel(l1);
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_lt, aint(hi(int32(t^._high.svalue))), GetNextReg(hregister),
+ blocklabel(t^.blockid));
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, jmp_gt, aint(hi(int32(t^._high.svalue))), GetNextReg(hregister),
+ l1);
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, OS_16, OC_BE, aint(lo(int32(t^._high.svalue))), hregister, blocklabel(t^.blockid));
+ cg.a_label(current_asmdata.CurrAsmList,l1);
+ end
+ else
+{$endif cpu16bitalu}
begin
hlcg.a_cmp_const_reg_label(current_asmdata.CurrAsmList, opsize, jmp_le, aint(t^._high.svalue), hregister, blocklabel(t^.blockid));
end;
diff --git a/compiler/ncgutil.pas b/compiler/ncgutil.pas
index 5a34501726..b88d1103c0 100644
--- a/compiler/ncgutil.pas
+++ b/compiler/ncgutil.pas
@@ -408,6 +408,14 @@ implementation
procedure new_exception(list:TAsmList;const t:texceptiontemps;exceptlabel:tasmlabel);
+ const
+{$ifdef cpu16bitaddr}
+ pushexceptaddr_frametype_cgsize = OS_S16;
+ setjmp_result_cgsize = OS_S16;
+{$else cpu16bitaddr}
+ pushexceptaddr_frametype_cgsize = OS_S32;
+ setjmp_result_cgsize = OS_S32;
+{$endif cpu16bitaddr}
var
paraloc1,paraloc2,paraloc3 : tcgpara;
pd: tprocdef;
@@ -419,10 +427,20 @@ implementation
paramanager.getintparaloc(pd,1,paraloc1);
paramanager.getintparaloc(pd,2,paraloc2);
paramanager.getintparaloc(pd,3,paraloc3);
- cg.a_loadaddr_ref_cgpara(list,t.envbuf,paraloc3);
- cg.a_loadaddr_ref_cgpara(list,t.jmpbuf,paraloc2);
- { push type of exceptionframe }
- cg.a_load_const_cgpara(list,OS_S32,1,paraloc1);
+ if pd.is_pushleftright then
+ begin
+ { push type of exceptionframe }
+ cg.a_load_const_cgpara(list,pushexceptaddr_frametype_cgsize,1,paraloc1);
+ cg.a_loadaddr_ref_cgpara(list,t.jmpbuf,paraloc2);
+ cg.a_loadaddr_ref_cgpara(list,t.envbuf,paraloc3);
+ end
+ else
+ begin
+ cg.a_loadaddr_ref_cgpara(list,t.envbuf,paraloc3);
+ cg.a_loadaddr_ref_cgpara(list,t.jmpbuf,paraloc2);
+ { push type of exceptionframe }
+ cg.a_load_const_cgpara(list,pushexceptaddr_frametype_cgsize,1,paraloc1);
+ end;
paramanager.freecgpara(list,paraloc3);
paramanager.freecgpara(list,paraloc2);
paramanager.freecgpara(list,paraloc1);
@@ -440,7 +458,7 @@ implementation
cg.alloccpuregisters(list,R_INTREGISTER,[RS_FUNCTION_RESULT_REG]);
cg.g_exception_reason_save(list, t.reasonbuf);
- cg.a_cmp_const_reg_label(list,OS_S32,OC_NE,0,cg.makeregsize(list,NR_FUNCTION_RESULT_REG,OS_S32),exceptlabel);
+ cg.a_cmp_const_reg_label(list,setjmp_result_cgsize,OC_NE,0,cg.makeregsize(list,NR_FUNCTION_RESULT_REG,setjmp_result_cgsize),exceptlabel);
cg.dealloccpuregisters(list,R_INTREGISTER,[RS_FUNCTION_RESULT_REG]);
paraloc1.done;
paraloc2.done;
@@ -1027,10 +1045,14 @@ implementation
begin
unget_para(paraloc^);
gen_alloc_regloc(list,destloc);
- cg.a_load_cgparaloc_anyreg(list,OS_32,paraloc^,destloc.register,sizeof(aint));
+ cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^,destloc.register,sizeof(aint));
unget_para(paraloc^.Next^);
gen_alloc_regloc(list,destloc);
- cg.a_load_cgparaloc_anyreg(list,OS_32,paraloc^.Next^,destloc.registerhi,sizeof(aint));
+ {$if defined(cpu16bitalu) or defined(cpu8bitalu)}
+ cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^.Next^,GetNextReg(destloc.register),sizeof(aint));
+ {$else}
+ cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^.Next^,destloc.registerhi,sizeof(aint));
+ {$endif}
end
else
internalerror(200410105);
diff --git a/compiler/ncnv.pas b/compiler/ncnv.pas
index 7e3ae73b71..6a8a6acd57 100644
--- a/compiler/ncnv.pas
+++ b/compiler/ncnv.pas
@@ -3086,7 +3086,7 @@ implementation
{ convert to a 64bit int (only necessary for 32bit processors) (JM) }
if resultdef.size > sizeof(aint) then
begin
- result := ctypeconvnode.create_internal(left,s32inttype);
+ result := ctypeconvnode.create_internal(left,sinttype);
result := ctypeconvnode.create(result,resultdef);
left := nil;
firstpass(result);
diff --git a/compiler/nflw.pas b/compiler/nflw.pas
index 788f90f29f..613918ea07 100644
--- a/compiler/nflw.pas
+++ b/compiler/nflw.pas
@@ -1937,26 +1937,55 @@ implementation
function traisenode.pass_1 : tnode;
+ var
+ statements : tstatementnode;
+ current_addr : tlabelnode;
+ raisenode : tcallnode;
begin
- result:=nil;
- include(current_procinfo.flags,pi_do_call);
- expectloc:=LOC_VOID;
- if assigned(left) then
- begin
- { first para must be a _class_ }
- firstpass(left);
- { insert needed typeconvs for addr,frame }
- if assigned(right) then
- begin
- { addr }
- firstpass(right);
- { frame }
- if assigned(third) then
- firstpass(third);
- end;
- end;
- end;
+ result:=internalstatements(statements);
+ if assigned(left) then
+ begin
+ { first para must be a class }
+ firstpass(left);
+ { insert needed typeconvs for addr,frame }
+ if assigned(right) then
+ begin
+ { addr }
+ firstpass(right);
+ { frame }
+ if assigned(third) then
+ firstpass(third)
+ else
+ third:=cpointerconstnode.Create(0,voidpointertype);
+ end
+ else
+ begin
+ right:=cloadparentfpnode.create(current_procinfo.procdef);
+ current_addr:=clabelnode.create(cnothingnode.create,tlabelsym.create('$raiseaddr'));
+ addstatement(statements,current_addr);
+ third:=caddrnode.create(cloadnode.create(current_addr.labsym,current_addr.labsym.owner));
+ end;
+
+ raisenode:=ccallnode.createintern('fpc_raiseexception',
+ ccallparanode.create(third,
+ ccallparanode.create(right,
+ ccallparanode.create(left,nil)))
+ );
+ include(raisenode.callnodeflags,cnf_call_never_returns);
+ addstatement(statements,raisenode);
+ end
+ else
+ begin
+ addstatement(statements,ccallnode.createintern('fpc_popaddrstack',nil));
+ raisenode:=ccallnode.createintern('fpc_reraise',nil);
+ include(raisenode.callnodeflags,cnf_call_never_returns);
+ addstatement(statements,raisenode);
+ end;
+ left:=nil;
+ right:=nil;
+ third:=nil;
+ end;
{*****************************************************************************
TTRYEXCEPTNODE
diff --git a/compiler/ninl.pas b/compiler/ninl.pas
index 731c889af7..8259e71e40 100644
--- a/compiler/ninl.pas
+++ b/compiler/ninl.pas
@@ -79,6 +79,9 @@ interface
function first_assigned: tnode; virtual;
function first_assert: tnode; virtual;
function first_popcnt: tnode; virtual;
+ { override these for Seg() support }
+ function typecheck_seg: tnode; virtual;
+ function first_seg: tnode; virtual;
private
function handle_str: tnode;
@@ -156,6 +159,39 @@ implementation
end;
+ function get_str_int_func(def: tdef): string;
+ var
+ ordtype: tordtype;
+ begin
+ ordtype := torddef(def).ordtype;
+ if not (ordtype in [scurrency,s64bit,u64bit,s32bit,u32bit,s16bit,u16bit,s8bit,u8bit]) then
+ internalerror(2013032603);
+
+ if is_oversizedord(def) then
+ begin
+ case ordtype of
+ scurrency,
+ s64bit: exit('int64');
+ u64bit: exit('qword');
+ s32bit: exit('longint');
+ u32bit: exit('longword');
+ s16bit: exit('smallint');
+ u16bit: exit('word');
+ else
+ internalerror(2013032604);
+ end;
+ end
+ else
+ begin
+ if is_nativeuint(def) then
+ exit('uint')
+ else
+ exit('sint');
+ end;
+ internalerror(2013032605);
+ end;
+
+
function tinlinenode.handle_str : tnode;
var
lenpara,
@@ -324,23 +360,11 @@ implementation
procname:=procname+'enum'
else
case torddef(source.resultdef).ordtype of
-{$ifdef cpu64bitaddr}
- u64bit:
- procname := procname + 'uint';
-{$else}
- u32bit:
- procname := procname + 'uint';
- u64bit:
- procname := procname + 'qword';
- scurrency,
- s64bit:
- procname := procname + 'int64';
-{$endif}
pasbool8,pasbool16,pasbool32,pasbool64,
bool8bit,bool16bit,bool32bit,bool64bit:
procname := procname + 'bool';
else
- procname := procname + 'sint';
+ procname := procname + get_str_int_func(source.resultdef);
end;
{ for ansistrings insert the encoding argument }
@@ -530,6 +554,75 @@ implementation
end;
+ procedure get_read_write_int_func(def: tdef; out func_suffix: string; out readfunctype: tdef);
+ var
+ ordtype: tordtype;
+ begin
+ ordtype := torddef(def).ordtype;
+ if not (ordtype in [s64bit,u64bit,s32bit,u32bit,s16bit,u16bit,s8bit,u8bit]) then
+ internalerror(2013032601);
+
+ if is_oversizedint(def) then
+ begin
+ case ordtype of
+ s64bit:
+ begin
+ func_suffix := 'int64';
+ readfunctype:=s64inttype;
+ end;
+ u64bit :
+ begin
+ func_suffix := 'qword';
+ readfunctype:=u64inttype;
+ end;
+ s32bit:
+ begin
+ func_suffix := 'longint';
+ readfunctype:=s32inttype;
+ end;
+ u32bit :
+ begin
+ func_suffix := 'longword';
+ readfunctype:=u32inttype;
+ end;
+ s16bit:
+ begin
+ func_suffix := 'smallint';
+ readfunctype:=s16inttype;
+ end;
+ u16bit :
+ begin
+ func_suffix := 'word';
+ readfunctype:=u16inttype;
+ end;
+ else
+ internalerror(2013032602);
+ end;
+ end
+ else
+ begin
+ case ordtype of
+ s64bit,
+ s32bit,
+ s16bit,
+ s8bit:
+ begin
+ func_suffix := 'sint';
+ readfunctype := sinttype;
+ end;
+ u64bit,
+ u32bit,
+ u16bit,
+ u8bit:
+ begin
+ func_suffix := 'uint';
+ readfunctype := uinttype;
+ end;
+ end;
+ end;
+ end;
+
+
function Tinlinenode.handle_text_read_write(filepara,params:Ttertiarynode;var newstatement:Tnode):boolean;
{Read(ln)/write(ln) for text files.}
@@ -546,6 +639,7 @@ implementation
temp:Ttempcreatenode;
readfunctype:Tdef;
name:string[63];
+ func_suffix:string[8];
begin
para:=Tcallparanode(params);
@@ -615,31 +709,19 @@ implementation
orddef :
begin
case Torddef(para.left.resultdef).ordtype of
-{$ifdef cpu64bitaddr}
- s64bit,
-{$endif cpu64bitaddr}
s8bit,
s16bit,
- s32bit :
- begin
- name := procprefixes[do_read]+'sint';
- { iso pascal needs a different handler }
- if (m_iso in current_settings.modeswitches) and do_read then
- name:=name+'_iso';
- readfunctype:=sinttype;
- end;
-{$ifdef cpu64bitaddr}
- u64bit,
-{$endif cpu64bitaddr}
+ s32bit,
+ s64bit,
u8bit,
u16bit,
- u32bit :
+ u32bit,
+ u64bit:
begin
- name := procprefixes[do_read]+'uint';
- { iso pascal needs a different handler }
+ get_read_write_int_func(para.left.resultdef,func_suffix,readfunctype);
+ name := procprefixes[do_read]+func_suffix;
if (m_iso in current_settings.modeswitches) and do_read then
name:=name+'_iso';
- readfunctype:=uinttype;
end;
uchar :
begin
@@ -654,24 +736,6 @@ implementation
name := procprefixes[do_read]+'widechar';
readfunctype:=cwidechartype;
end;
-{$ifndef cpu64bitaddr}
- s64bit :
- begin
- name := procprefixes[do_read]+'int64';
- { iso pascal needs a different handler }
- if (m_iso in current_settings.modeswitches) and do_read then
- name:=name+'_iso';
- readfunctype:=s64inttype;
- end;
- u64bit :
- begin
- name := procprefixes[do_read]+'qword';
- { iso pascal needs a different handler }
- if (m_iso in current_settings.modeswitches) and do_read then
- name:=name+'_iso';
- readfunctype:=u64inttype;
- end;
-{$endif not cpu64bitaddr}
scurrency:
begin
name := procprefixes[do_read]+'currency';
@@ -1303,6 +1367,40 @@ implementation
end;
+ function get_val_int_func(def: tdef): string;
+ var
+ ordtype: tordtype;
+ begin
+ ordtype := torddef(def).ordtype;
+ if not (ordtype in [s64bit,u64bit,s32bit,u32bit,s16bit,u16bit,s8bit,u8bit]) then
+ internalerror(2013032603);
+
+ if is_oversizedint(def) then
+ begin
+ case ordtype of
+ s64bit: exit('int64');
+ u64bit: exit('qword');
+ s32bit: exit('longint');
+ u32bit: exit('longword');
+ s16bit: exit('smallint');
+ u16bit: exit('word');
+ else
+ internalerror(2013032604);
+ end;
+ end
+ else
+ begin
+ case ordtype of
+ s64bit,s32bit,s16bit,s8bit: exit('sint');
+ u64bit,u32bit,u16bit,u8bit: exit('uint');
+ else
+ internalerror(2013032604);
+ end;
+ end;
+ internalerror(2013032605);
+ end;
+
+
function tinlinenode.handle_val: tnode;
var
procname,
@@ -1403,11 +1501,12 @@ implementation
{ we need its resultdef later on }
codepara.get_paratype;
end
- else if (torddef(codepara.resultdef).ordtype = torddef(ptrsinttype).ordtype) then
+ else if (torddef(codepara.resultdef).ordtype <> torddef(ptrsinttype).ordtype) then
{ because code is a var parameter, it must match types exactly }
- { however, since it will return values in [0..255], both longints }
- { and cardinals are fine. Since the formal code para type is }
- { longint, insert a typecoversion to longint for cardinal para's }
+ { however, since it will return values >= 0, both signed and }
+ { and unsigned ints of the same size are fine. Since the formal }
+ { code para type is sinttype, insert a typecoversion to sint for }
+ { unsigned para's }
begin
codepara.left := ctypeconvnode.create_internal(codepara.left,ptrsinttype);
{ make it explicit, oterwise you may get a nonsense range }
@@ -1423,29 +1522,15 @@ implementation
orddef:
begin
case torddef(destpara.resultdef).ordtype of
-{$ifdef cpu64bitaddr}
- s64bit,
-{$endif cpu64bitaddr}
- s8bit,
- s16bit,
- s32bit:
+ s8bit,s16bit,s32bit,s64bit,
+ u8bit,u16bit,u32bit,u64bit:
begin
- suffix := 'sint_';
- { we also need a destsize para in this case }
- sizepara := ccallparanode.create(cordconstnode.create
- (destpara.resultdef.size,s32inttype,true),nil);
+ suffix := get_val_int_func(destpara.resultdef) + '_';
+ { we also need a destsize para in the case of sint }
+ if suffix = 'sint_' then
+ sizepara := ccallparanode.create(cordconstnode.create
+ (destpara.resultdef.size,s32inttype,true),nil);
end;
-{$ifdef cpu64bitaddr}
- u64bit,
-{$endif cpu64bitaddr}
- u8bit,
- u16bit,
- u32bit:
- suffix := 'uint_';
-{$ifndef cpu64bitaddr}
- s64bit: suffix := 'int64_';
- u64bit: suffix := 'qword_';
-{$endif not cpu64bitaddr}
scurrency: suffix := 'currency_';
else
internalerror(200304225);
@@ -2453,6 +2538,7 @@ implementation
var
hightree,
hp : tnode;
+ temp_pnode: pnode;
begin
result:=nil;
{ when handling writeln "left" contains no valid address }
@@ -2710,10 +2796,7 @@ implementation
in_seg_x :
begin
- if target_info.system in systems_managed_vm then
- message(parser_e_feature_unsupported_for_vm);
- set_varstate(left,vs_read,[]);
- result:=cordconstnode.create(0,s32inttype,false);
+ result := typecheck_seg;
end;
in_pred_x,
@@ -2986,14 +3069,21 @@ implementation
in_trunc_real,
in_round_real :
begin
- set_varstate(left,vs_read,[vsf_must_be_valid]);
+ { on i8086, the int64 result is returned in a var param, because
+ it's too big to fit in a register or a pair of registers. In
+ that case we have 2 parameters and left.nodetype is a callparan. }
+ if left.nodetype = callparan then
+ temp_pnode := @tcallparanode(left).left
+ else
+ temp_pnode := @left;
+ set_varstate(temp_pnode^,vs_read,[vsf_must_be_valid]);
{ for direct float rounding, no best real type cast should be necessary }
- if not((left.resultdef.typ=floatdef) and
- (tfloatdef(left.resultdef).floattype in [s32real,s64real,s80real,sc80real,s128real])) and
+ if not((temp_pnode^.resultdef.typ=floatdef) and
+ (tfloatdef(temp_pnode^.resultdef).floattype in [s32real,s64real,s80real,sc80real,s128real])) and
{ converting an int64 to double on platforms without }
{ extended can cause precision loss }
- not(left.nodetype in [ordconstn,realconstn]) then
- inserttypeconv(left,pbestrealtype^);
+ not(temp_pnode^.nodetype in [ordconstn,realconstn]) then
+ inserttypeconv(temp_pnode^,pbestrealtype^);
resultdef:=s64inttype;
end;
@@ -3469,7 +3559,9 @@ implementation
internalerror(2000101001);
in_seg_x :
- internalerror(200104046);
+ begin
+ result:=first_seg;
+ end;
in_settextbuf_file_x,
in_reset_typedfile,
@@ -3894,6 +3986,22 @@ implementation
end;
+ function tinlinenode.typecheck_seg: tnode;
+ begin
+ if target_info.system in systems_managed_vm then
+ message(parser_e_feature_unsupported_for_vm);
+ set_varstate(left,vs_read,[]);
+ result:=cordconstnode.create(0,s32inttype,false);
+ end;
+
+
+ function tinlinenode.first_seg: tnode;
+ begin
+ internalerror(200104046);
+ result:=nil;
+ end;
+
+
function tinlinenode.handle_box: tnode;
begin
result:=nil;
diff --git a/compiler/nmat.pas b/compiler/nmat.pas
index 4532f08e86..da5ecdc833 100644
--- a/compiler/nmat.pas
+++ b/compiler/nmat.pas
@@ -192,6 +192,7 @@ implementation
else_statements,
statements : tstatementnode;
result_data : ttempcreatenode;
+ nd : torddef;
begin
result:=nil;
typecheckpass(left);
@@ -242,18 +243,20 @@ implementation
{ Additionally, do the same for cardinal/qwords and other positive types, but }
{ always in a way that a smaller type is converted to a bigger type }
{ (webtbs/tw8870) }
- if (rd.ordtype in [u32bit,u64bit]) and
+ if (rd.ordtype in [u8bit,u16bit,u32bit,u64bit]) and
((is_constintnode(left) and
- (tordconstnode(left).value >= 0)) or
+ (tordconstnode(left).value >= 0) and
+ (tordconstnode(left).value <= get_max_value(rd))) or
(not is_signed(ld) and
(rd.size >= ld.size))) then
begin
inserttypeconv(left,right.resultdef);
ld:=torddef(left.resultdef);
end;
- if (ld.ordtype in [u32bit,u64bit]) and
+ if (ld.ordtype in [u8bit,u16bit,u32bit,u64bit]) and
((is_constintnode(right) and
- (tordconstnode(right).value >= 0)) or
+ (tordconstnode(right).value >= 0) and
+ (tordconstnode(right).value <= get_max_value(ld))) or
(not is_signed(rd) and
(ld.size >= rd.size))) then
begin
@@ -273,7 +276,6 @@ implementation
resultdef:=left.resultdef;
end
else
-{$ifndef cpu64bitaddr}
{ when there is one 64bit value, everything is done
in 64bit }
if (is_64bitint(left.resultdef) or
@@ -296,21 +298,33 @@ implementation
resultdef:=left.resultdef;
end
else
- { when mixing cardinals and signed numbers, convert everythign to 64bit (JM) }
- if ((rd.ordtype = u32bit) and
+ { is there a larger than the native int? }
+ if is_oversizedint(ld) or is_oversizedint(rd) then
+ begin
+ nd:=get_common_intdef(ld,rd,false);
+ if (ld.ordtype<>nd.ordtype) then
+ inserttypeconv(left,nd);
+ if (rd.ordtype<>nd.ordtype) then
+ inserttypeconv(right,nd);
+ resultdef:=left.resultdef;
+ end
+ else
+ { when mixing unsigned and signed native ints, convert everything to a larger signed type (JM) }
+ if (is_nativeuint(rd) and
is_signed(ld)) or
- ((ld.ordtype = u32bit) and
+ (is_nativeuint(ld) and
is_signed(rd)) then
begin
CGMessage(type_h_mixed_signed_unsigned);
- if (ld.ordtype<>s64bit) then
- inserttypeconv(left,s64inttype);
- if (rd.ordtype<>s64bit) then
- inserttypeconv(right,s64inttype);
+ { get a signed int, larger than the native int }
+ nd:=get_common_intdef(torddef(sinttype),torddef(uinttype),false);
+ if (ld.ordtype<>nd.ordtype) then
+ inserttypeconv(left,nd);
+ if (rd.ordtype<>nd.ordtype) then
+ inserttypeconv(right,nd);
resultdef:=left.resultdef;
end
else
-{$endif not cpu64bitaddr}
begin
{ Make everything always default singed int }
if not(rd.ordtype in [torddef(sinttype).ordtype,torddef(uinttype).ordtype]) then
@@ -394,6 +408,13 @@ implementation
left := nil;
right := nil;
firstpass(result);
+
+ if result.resultdef.typ<>orddef then
+ internalerror(2013031701);
+ if resultdef.typ<>orddef then
+ internalerror(2013031701);
+ if torddef(result.resultdef).ordtype <> torddef(resultdef).ordtype then
+ inserttypeconv(result,resultdef);
end;
{$else cpuneedsdiv32helper}
begin
@@ -604,18 +625,34 @@ implementation
begin
{ keep singness of orignal type }
if is_signed(left.resultdef) then
-{$ifdef cpunodefaultint}
- inserttypeconv(left,nd)
-{$else cpunodefaultint}
- inserttypeconv(left,s32inttype)
-{$endif cpunodefaultint}
+ begin
+{$if defined(cpunodefaultint)}
+ inserttypeconv(left,nd)
+{$elseif defined(cpu64bitalu) or defined(cpu32bitalu)}
+ inserttypeconv(left,s32inttype)
+{$elseif defined(cpu16bitalu)}
+ if (left.resultdef.size > 2) or (right.resultdef.size > 2) then
+ inserttypeconv(left,s32inttype)
+ else
+ inserttypeconv(left,sinttype);
+{$else}
+ internalerror(2013031301);
+{$endif}
+ end
else
begin
-{$ifdef cpunodefaultint}
+{$if defined(cpunodefaultint)}
inserttypeconv(left,nd)
-{$else cpunodefaultint}
+{$elseif defined(cpu64bitalu) or defined(cpu32bitalu)}
inserttypeconv(left,u32inttype);
-{$endif cpunodefaultint}
+{$elseif defined(cpu16bitalu)}
+ if (left.resultdef.size > 2) or (right.resultdef.size > 2) then
+ inserttypeconv(left,u32inttype)
+ else
+ inserttypeconv(left,uinttype);
+{$else}
+ internalerror(2013031301);
+{$endif}
end
end;
@@ -755,18 +792,21 @@ implementation
}
end
{$endif SUPPORT_MMX}
-{$ifndef cpu64bitaddr}
- else if is_64bit(left.resultdef) then
+ else if is_oversizedord(left.resultdef) then
begin
- inserttypeconv(left,s64inttype);
- resultdef:=left.resultdef
+ if is_64bit(left.resultdef) then
+ inserttypeconv(left,s64inttype)
+ else if is_32bit(left.resultdef) then
+ inserttypeconv(left,s32inttype)
+ else if is_16bit(left.resultdef) then
+ inserttypeconv(left,s16inttype)
+ else
+ internalerror(2013040701);
+ resultdef:=left.resultdef;
end
-{$endif not cpu64bitaddr}
else if (left.resultdef.typ=orddef) then
begin
-{$ifndef cpunodefaultint}
inserttypeconv(left,sinttype);
-{$endif cpunodefaultint}
resultdef:=left.resultdef
end
else
@@ -893,14 +933,19 @@ implementation
result:=left;
left:=nil;
end
-{$ifndef cpu64bitaddr}
- else if is_64bit(left.resultdef) then
+ else if is_oversizedord(left.resultdef) then
begin
- inserttypeconv(left,s64inttype);
+ if is_64bit(left.resultdef) then
+ inserttypeconv(left,s64inttype)
+ else if is_32bit(left.resultdef) then
+ inserttypeconv(left,s32inttype)
+ else if is_16bit(left.resultdef) then
+ inserttypeconv(left,s16inttype)
+ else
+ internalerror(2013040702);
result:=left;
left:=nil;
end
-{$endif not cpu64bitaddr}
else if (left.resultdef.typ=orddef) then
begin
inserttypeconv(left,sinttype);
diff --git a/compiler/optdfa.pas b/compiler/optdfa.pas
index 28f2f6fd46..e4734bca55 100644
--- a/compiler/optdfa.pas
+++ b/compiler/optdfa.pas
@@ -222,7 +222,8 @@ unit optdfa;
begin
{ last node, not exit or raise node and function? }
if assigned(resultnode) and
- not(node.nodetype in [raisen,exitn]) then
+ not(node.nodetype=exitn) and
+ not((node.nodetype=calln) and (cnf_call_never_returns in tcallnode(node).callnodeflags)) then
begin
{ if yes, result lifes }
DFASetDiff(l,resultnode.optinfo^.life,n.optinfo^.def);
@@ -499,24 +500,6 @@ unit optdfa;
end;
end;
- raisen:
- begin
- if not(assigned(node.optinfo^.life)) then
- begin
- dfainfo.use:=@node.optinfo^.use;
- dfainfo.def:=@node.optinfo^.def;
- dfainfo.map:=map;
- foreachnodestatic(pm_postprocess,traisenode(node).left,@AddDefUse,@dfainfo);
- foreachnodestatic(pm_postprocess,traisenode(node).right,@AddDefUse,@dfainfo);
- foreachnodestatic(pm_postprocess,traisenode(node).third,@AddDefUse,@dfainfo);
- { update node }
- l:=node.optinfo^.life;
- DFASetIncludeSet(l,node.optinfo^.use);
- UpdateLifeInfo(node,l);
- printdfainfo(output,node);
- end;
- end;
-
calln:
begin
if not(assigned(node.optinfo^.def)) and
diff --git a/compiler/options.pas b/compiler/options.pas
index d583c200b2..228ed23b96 100644
--- a/compiler/options.pas
+++ b/compiler/options.pas
@@ -2960,6 +2960,17 @@ begin
def_system_macro('FPC_LOCALS_ARE_STACK_REG_RELATIVE');
{$endif}
+{$ifdef i8086}
+ def_system_macro('CPU86'); { Borland compatibility }
+ def_system_macro('CPU87'); { Borland compatibility }
+ def_system_macro('CPU8086');
+ def_system_macro('CPUI8086');
+ def_system_macro('CPU16');
+ def_system_macro('FPC_HAS_TYPE_EXTENDED');
+ def_system_macro('FPC_HAS_TYPE_DOUBLE');
+ def_system_macro('FPC_HAS_TYPE_SINGLE');
+{$endif i8086}
+
{ Set up a default prefix for binutils when cross-compiling }
if source_info.system<>target_info.system then
case target_info.system of
@@ -3311,12 +3322,12 @@ if (target_info.abi = abi_eabihf) then
if init_settings.fputype<>fpu_none then
begin
-{$if defined(i386)}
+{$if defined(i386) or defined(i8086)}
def_system_macro('FPC_HAS_TYPE_EXTENDED');
{$endif}
def_system_macro('FPC_HAS_TYPE_SINGLE');
def_system_macro('FPC_HAS_TYPE_DOUBLE');
-{$if not defined(i386) and not defined(x86_64)}
+{$if not defined(i386) and not defined(x86_64) and not defined(i8086)}
def_system_macro('FPC_INCLUDE_SOFTWARE_INT64_TO_DOUBLE');
{$endif}
{$if defined(m68k)}
diff --git a/compiler/optutils.pas b/compiler/optutils.pas
index 2cca995efc..a82286274a 100644
--- a/compiler/optutils.pas
+++ b/compiler/optutils.pas
@@ -52,7 +52,7 @@ unit optutils;
uses
verbose,
optbase,
- nbas,nflw,nutils,nset;
+ ncal,nbas,nflw,nutils,nset;
function TIndexedNodeSet.Add(node : tnode) : boolean;
var
@@ -264,7 +264,8 @@ unit optutils;
begin
{ not sure if this is enough (FK) }
result:=p;
- p.successor:=succ;
+ if not(cnf_call_never_returns in tcallnode(p).callnodeflags) then
+ p.successor:=succ;
end;
inlinen:
begin
diff --git a/compiler/pdecvar.pas b/compiler/pdecvar.pas
index 5fc9254512..82687dd54e 100644
--- a/compiler/pdecvar.pas
+++ b/compiler/pdecvar.pas
@@ -1225,9 +1225,9 @@ implementation
abssym : tabsolutevarsym;
pt,hp : tnode;
st : tsymtable;
- {$ifdef i386}
+ {$if defined(i386) or defined(i8086)}
tmpaddr : int64;
- {$endif}
+ {$endif defined(i386) or defined(i8086)}
begin
abssym:=nil;
{ only allowed for one var }
@@ -1268,9 +1268,9 @@ implementation
else
{$endif}
abssym.addroffset:=Tordconstnode(pt).value.svalue;
-{$ifdef i386}
+{$if defined(i386) or defined(i8086)}
abssym.absseg:=false;
- if (target_info.system in [system_i386_go32v2,system_i386_watcom]) and
+ if (target_info.system in [system_i386_go32v2,system_i386_watcom,system_i8086_msdos]) and
try_to_consume(_COLON) then
begin
pt.free;
diff --git a/compiler/pexpr.pas b/compiler/pexpr.pas
index cc3fe1c4d3..3555e4e8d7 100644
--- a/compiler/pexpr.pas
+++ b/compiler/pexpr.pas
@@ -1857,8 +1857,8 @@ implementation
arraydef:
begin
p2:=comp_expr(true,false);
- { support SEG:OFS for go32v2 Mem[] }
- if (target_info.system in [system_i386_go32v2,system_i386_watcom]) and
+ { support SEG:OFS for go32v2/msdos Mem[] }
+ if (target_info.system in [system_i386_go32v2,system_i386_watcom,system_i8086_msdos]) and
(p1.nodetype=loadn) and
assigned(tloadnode(p1).symtableentry) and
assigned(tloadnode(p1).symtableentry.owner.name) and
diff --git a/compiler/powerpc64/hlcgcpu.pas b/compiler/powerpc64/hlcgcpu.pas
index 37688cbe42..ef1fcbfc00 100644
--- a/compiler/powerpc64/hlcgcpu.pas
+++ b/compiler/powerpc64/hlcgcpu.pas
@@ -36,7 +36,7 @@ uses
type
thlcgcpu = class(thlcgppcgen)
procedure a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tdef; const sreg: tsubsetregister; destreg: tregister); override;
- procedure a_load_const_subsetreg(list: TAsmlist; tosubsetsize: tdef; a: aint; const sreg: tsubsetregister); override;
+ procedure a_load_const_subsetreg(list: TAsmlist; tosubsetsize: tdef; a: tcgint; const sreg: tsubsetregister); override;
protected
procedure a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tdef; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt); override;
end;
@@ -86,7 +86,7 @@ implementation
end;
- procedure thlcgcpu.a_load_const_subsetreg(list: TAsmlist; tosubsetsize: tdef; a: aint; const sreg: tsubsetregister);
+ procedure thlcgcpu.a_load_const_subsetreg(list: TAsmlist; tosubsetsize: tdef; a: tcgint; const sreg: tsubsetregister);
var
tmpreg : TRegister;
begin
diff --git a/compiler/pp.pas b/compiler/pp.pas
index 1469332ec7..09c307b7b4 100644
--- a/compiler/pp.pas
+++ b/compiler/pp.pas
@@ -25,6 +25,7 @@ program pp;
possible compiler switches:
-----------------------------------------------------------------
CMEM use cmem unit for better memory debugging
+ I8086 generate a compiler for the Intel 8086+
I386 generate a compiler for the Intel i386+
x86_64 generate a compiler for the AMD x86-64 architecture
M68K generate a compiler for the M68000
@@ -62,6 +63,12 @@ program pp;
{$endif}
{ exactly one target CPU must be defined }
+{$ifdef I8086}
+ {$ifdef CPUDEFINED}
+ {$fatal ONLY one of the switches for the CPU type must be defined}
+ {$endif CPUDEFINED}
+ {$define CPUDEFINED}
+{$endif I8086}
{$ifdef I386}
{$ifdef CPUDEFINED}
{$fatal ONLY one of the switches for the CPU type must be defined}
diff --git a/compiler/ppc8086.lpi b/compiler/ppc8086.lpi
new file mode 100644
index 0000000000..a74d17d094
--- /dev/null
+++ b/compiler/ppc8086.lpi
@@ -0,0 +1,145 @@
+<?xml version="1.0"?>
+<CONFIG>
+ <ProjectOptions>
+ <Version Value="9"/>
+ <PathDelim Value="\"/>
+ <General>
+ <Flags>
+ <MainUnitHasUsesSectionForAllUnits Value="False"/>
+ <MainUnitHasCreateFormStatements Value="False"/>
+ <MainUnitHasTitleStatement Value="False"/>
+ <LRSInOutputDirectory Value="False"/>
+ </Flags>
+ <SessionStorage Value="InProjectDir"/>
+ <MainUnit Value="0"/>
+ <Title Value="ppc8086"/>
+ </General>
+ <BuildModes Count="1">
+ <Item1 Name="default" Default="True"/>
+ </BuildModes>
+ <PublishOptions>
+ <Version Value="2"/>
+ <IncludeFileFilter Value="*.(pas|pp|inc|lfm|lpr|lrs|lpi|lpk|sh|xml)"/>
+ <ExcludeFileFilter Value="*.(bak|ppu|ppw|o|so);*~;backup"/>
+ </PublishOptions>
+ <RunParams>
+ <local>
+ <FormatVersion Value="1"/>
+ <LaunchingApplication PathPlusParams="\usr\X11R6\bin\xterm -T 'Lazarus Run Output' -e $(LazarusDir)\tools\runwait.sh $(TargetCmdLine)"/>
+ </local>
+ </RunParams>
+ <Units Count="15">
+ <Unit0>
+ <Filename Value="pp.pas"/>
+ <IsPartOfProject Value="True"/>
+ <UnitName Value="pp"/>
+ </Unit0>
+ <Unit1>
+ <Filename Value="i8086\cgcpu.pas"/>
+ <IsPartOfProject Value="True"/>
+ <UnitName Value="cgcpu"/>
+ </Unit1>
+ <Unit2>
+ <Filename Value="i8086\cpubase.inc"/>
+ <IsPartOfProject Value="True"/>
+ </Unit2>
+ <Unit3>
+ <Filename Value="i8086\cpuinfo.pas"/>
+ <IsPartOfProject Value="True"/>
+ <UnitName Value="cpuinfo"/>
+ </Unit3>
+ <Unit4>
+ <Filename Value="i8086\cpunode.pas"/>
+ <IsPartOfProject Value="True"/>
+ <UnitName Value="cpunode"/>
+ </Unit4>
+ <Unit5>
+ <Filename Value="i8086\cpupara.pas"/>
+ <IsPartOfProject Value="True"/>
+ <UnitName Value="cpupara"/>
+ </Unit5>
+ <Unit6>
+ <Filename Value="i8086\cpupi.pas"/>
+ <IsPartOfProject Value="True"/>
+ <UnitName Value="cpupi"/>
+ </Unit6>
+ <Unit7>
+ <Filename Value="i8086\cputarg.pas"/>
+ <IsPartOfProject Value="True"/>
+ <UnitName Value="cputarg"/>
+ </Unit7>
+ <Unit8>
+ <Filename Value="i8086\hlcgcpu.pas"/>
+ <IsPartOfProject Value="True"/>
+ <UnitName Value="hlcgcpu"/>
+ </Unit8>
+ <Unit9>
+ <Filename Value="i8086\ra8086att.pas"/>
+ <IsPartOfProject Value="True"/>
+ <UnitName Value="ra8086att"/>
+ </Unit9>
+ <Unit10>
+ <Filename Value="i8086\ra8086int.pas"/>
+ <IsPartOfProject Value="True"/>
+ <UnitName Value="ra8086int"/>
+ </Unit10>
+ <Unit11>
+ <Filename Value="i8086\rgcpu.pas"/>
+ <IsPartOfProject Value="True"/>
+ <UnitName Value="rgcpu"/>
+ </Unit11>
+ <Unit12>
+ <Filename Value="i8086\n8086add.pas"/>
+ <IsPartOfProject Value="True"/>
+ <UnitName Value="n8086add"/>
+ </Unit12>
+ <Unit13>
+ <Filename Value="i8086\n8086mat.pas"/>
+ <IsPartOfProject Value="True"/>
+ <UnitName Value="n8086mat"/>
+ </Unit13>
+ <Unit14>
+ <Filename Value="i8086\n8086inl.pas"/>
+ <IsPartOfProject Value="True"/>
+ <UnitName Value="n8086inl"/>
+ </Unit14>
+ </Units>
+ </ProjectOptions>
+ <CompilerOptions>
+ <Version Value="11"/>
+ <PathDelim Value="\"/>
+ <Target>
+ <Filename Value="i8086\pp"/>
+ </Target>
+ <SearchPaths>
+ <IncludeFiles Value="i8086;x86"/>
+ <OtherUnitFiles Value="i8086;x86;systems"/>
+ <UnitOutputDirectory Value="i8086\lazbuild"/>
+ </SearchPaths>
+ <Parsing>
+ <SyntaxOptions>
+ <CStyleOperator Value="False"/>
+ <AllowLabel Value="False"/>
+ <CPPInline Value="False"/>
+ <UseAnsiStrings Value="False"/>
+ </SyntaxOptions>
+ </Parsing>
+ <CodeGeneration>
+ <Optimizations>
+ <OptimizationLevel Value="0"/>
+ </Optimizations>
+ </CodeGeneration>
+ <Other>
+ <Verbosity>
+ <ShowWarn Value="False"/>
+ <ShowNotes Value="False"/>
+ <ShowHints Value="False"/>
+ </Verbosity>
+ <ConfigFile>
+ <StopAfterErrCount Value="50"/>
+ </ConfigFile>
+ <CustomOptions Value="-di8086 -dNOOPT -dEXTDEBUG -gl"/>
+ <CompilerPath Value="$(CompPath)"/>
+ </Other>
+ </CompilerOptions>
+</CONFIG>
diff --git a/compiler/ppu.pas b/compiler/ppu.pas
index 6abd7f414c..9dd93aad46 100644
--- a/compiler/ppu.pas
+++ b/compiler/ppu.pas
@@ -183,7 +183,8 @@ const
{ 11 } 64 {'powerpc64'},
{ 12 } 16 {'avr'},
{ 13 } 32 {'mipsel'},
- { 14 } 32 {'jvm'}
+ { 14 } 32 {'jvm'},
+ { 15 } 16 {'i8086'}
);
CpuAluBitSize : array[tsystemcpu] of longint =
(
@@ -201,7 +202,8 @@ const
{ 11 } 64 {'powerpc64'},
{ 12 } 8 {'avr'},
{ 13 } 32 {'mipsel'},
- { 14 } 64 {'jvm'}
+ { 14 } 64 {'jvm'},
+ { 15 } 16 {'i8086'}
);
{$endif generic_cpu}
@@ -812,11 +814,13 @@ begin
result:=0;
end;
{$else not generic_cpu}
-{$ifdef cpu64bitaddr}
+{$if defined(cpu64bitaddr)}
result:=getint64;
-{$else cpu64bitaddr}
+{$elseif defined(cpu32bitaddr)}
result:=getlongint;
-{$endif cpu32bitaddr}
+{$elseif defined(cpu16bitaddr)}
+ result:=getword;
+{$endif}
{$endif not generic_cpu}
end;
diff --git a/compiler/psub.pas b/compiler/psub.pas
index 86c9f4c5c2..cd70479630 100644
--- a/compiler/psub.pas
+++ b/compiler/psub.pas
@@ -940,7 +940,7 @@ implementation
begin
tg:=tgobjclass.create;
-{$if defined(x86) or defined(arm)}
+{$if defined(i386) or defined(x86_64) or defined(arm)}
{$if defined(arm)}
{ frame and stack pointer must be always the same on arm thumb so it makes no
sense to fiddle with a frame pointer }
@@ -1218,11 +1218,11 @@ implementation
flowcontrol:=[];
do_firstpass(code);
-{$ifdef i386}
+{$if defined(i386) or defined(i8086)}
procdef.fpu_used:=node_resources_fpu(code);
if procdef.fpu_used>0 then
include(flags,pi_uses_fpu);
-{$endif i386}
+{$endif i386 or i8086}
{ Print the node to tree.log }
if paraprintnodetree=1 then
diff --git a/compiler/ptype.pas b/compiler/ptype.pas
index 2dac866c4c..3aad0b79e3 100644
--- a/compiler/ptype.pas
+++ b/compiler/ptype.pas
@@ -1107,8 +1107,11 @@ implementation
orddef :
begin
if torddef(def).ordtype in [uchar,
- u8bit,u16bit,
- s8bit,s16bit,s32bit,
+ u8bit,
+ s8bit,s16bit,
+{$if defined(cpu32bitaddr) or defined(cpu64bitaddr)}
+ u16bit,s32bit,
+{$endif defined(cpu32bitaddr) or defined(cpu64bitaddr)}
{$ifdef cpu64bitaddr}
u32bit,s64bit,
{$endif cpu64bitaddr}
diff --git a/compiler/scanner.pas b/compiler/scanner.pas
index 0bd783f6e6..0555b1d4c5 100644
--- a/compiler/scanner.pas
+++ b/compiler/scanner.pas
@@ -512,14 +512,14 @@ implementation
init_settings.packenum:=current_settings.packenum;
init_settings.setalloc:=current_settings.setalloc;
end;
-{$ifdef i386}
- { Default to intel assembler for delphi/tp7 on i386 }
+{$if defined(i386) or defined(i8086)}
+ { Default to intel assembler for delphi/tp7 on i386/i8086 }
if (m_delphi in current_settings.modeswitches) or
(m_tp7 in current_settings.modeswitches) then
current_settings.asmmode:=asmmode_i386_intel;
if changeinit then
init_settings.asmmode:=current_settings.asmmode;
-{$endif i386}
+{$endif i386 or i8086}
{ Exception support explicitly turned on (mainly for macpas, to }
{ compensate for lack of interprocedural goto support) }
diff --git a/compiler/symconst.pas b/compiler/symconst.pas
index 22829e234a..72f942ada4 100644
--- a/compiler/symconst.pas
+++ b/compiler/symconst.pas
@@ -659,6 +659,12 @@ inherited_objectoptions : tobjectoptions = [oo_has_virtual,oo_has_private,oo_has
}
pushleftright_pocalls : tproccalloptions = [pocall_register,pocall_pascal];
{$endif}
+{$ifdef i8086}
+ { we only take this into account on i386, on other platforms we always
+ push in the same order
+ }
+ pushleftright_pocalls : tproccalloptions = [pocall_register,pocall_pascal];
+{$endif}
SymTypeName : array[tsymtyp] of string[12] = (
'abstractsym','globalvar','localvar','paravar','fieldvar',
diff --git a/compiler/symdef.pas b/compiler/symdef.pas
index 45778d21b4..20f808f27f 100644
--- a/compiler/symdef.pas
+++ b/compiler/symdef.pas
@@ -511,6 +511,7 @@ interface
procedure check_mark_as_nested;
procedure init_paraloc_info(side: tcallercallee);
function stack_tainting_parameter(side: tcallercallee): boolean;
+ function is_pushleftright: boolean;
private
procedure count_para(p:TObject;arg:pointer);
procedure insert_para(p:TObject;arg:pointer);
@@ -639,9 +640,9 @@ interface
procendtai : tai;
import_nr : word;
extnumber : word;
-{$ifdef i386}
+{$if defined(i386) or defined(i8086)}
fpu_used : byte;
-{$endif i386}
+{$endif i386 or i8086}
{$if defined(arm)}
{ the arm paramanager might need to know the total size of the stackframe
to avoid cyclic unit dependencies or global variables, this infomatation is
@@ -911,6 +912,9 @@ interface
java_procvarbase : tobjectdef;
const
+{$ifdef i8086}
+ pbestrealtype : ^tdef = @s80floattype;
+{$endif}
{$ifdef i386}
pbestrealtype : ^tdef = @s80floattype;
{$endif}
@@ -2519,10 +2523,18 @@ implementation
{$ifdef cpu16bitaddr}
case filetyp of
ft_text :
- savesize:=96;
+ {$ifdef avr}
+ savesize:=96;
+ {$else avr}
+ savesize:=576;
+ {$endif avr}
ft_typed,
ft_untyped :
- savesize:=76;
+ {$ifdef avr}
+ savesize:=76;
+ {$else avr}
+ savesize:=316;
+ {$endif avr}
end;
{$endif cpu16bitaddr}
end;
@@ -4130,6 +4142,15 @@ implementation
end;
end;
+ function tabstractprocdef.is_pushleftright: boolean;
+ begin
+{$if defined(i8086) or defined(i386)}
+ result:=proccalloption in pushleftright_pocalls;
+{$else}
+ result:=false;
+{$endif}
+ end;
+
{***************************************************************************
TPROCDEF
@@ -4157,9 +4178,9 @@ implementation
import_nr:=0;
inlininginfo:=nil;
deprecatedmsg:=nil;
-{$ifdef i386}
+{$if defined(i386) or defined(i8086)}
fpu_used:=maxfpuregs;
-{$endif i386}
+{$endif i386 or i8086}
end;
@@ -4583,9 +4604,9 @@ implementation
tprocdef(result).import_name:=stringdup(import_name^);
tprocdef(result).import_nr:=import_nr;
tprocdef(result).extnumber:=$ffff;
-{$ifdef i386}
+{$if defined(i386) or defined(i8086)}
tprocdef(result).fpu_used:=fpu_used;
-{$endif i386}
+{$endif i386 or i8086}
tprocdef(result).visibility:=visibility;
tprocdef(result).synthetickind:=synthetickind;
{ we need a separate implementation for the copied def }
diff --git a/compiler/symsym.pas b/compiler/symsym.pas
index 4a76afb050..078699bb24 100644
--- a/compiler/symsym.pas
+++ b/compiler/symsym.pas
@@ -273,9 +273,9 @@ interface
tabsolutevarsym = class(tabstractvarsym)
public
abstyp : absolutetyp;
-{$ifdef i386}
+{$if defined(i386) or defined(i8086)}
absseg : boolean;
-{$endif i386}
+{$endif defined(i386) or defined(i8086)}
asmname : pshortstring;
addroffset : aword;
ref : tpropaccesslist;
diff --git a/compiler/systems.inc b/compiler/systems.inc
index 5efb5454f0..db8b4fa2e8 100644
--- a/compiler/systems.inc
+++ b/compiler/systems.inc
@@ -48,7 +48,8 @@
cpu_powerpc64, { 11 }
cpu_avr, { 12 }
cpu_mipsel, { 13 }
- cpu_jvm { 14 }
+ cpu_jvm, { 14 }
+ cpu_i8086 { 15 }
);
tasmmode= (asmmode_none
@@ -65,6 +66,8 @@
,asmmode_x86_64_intel
,asmmode_x86_64_att
,asmmode_avr_gas
+ ,asmmode_i8086_intel
+ ,asmmode_i8086_att
);
(* IMPORTANT NOTE:
@@ -155,7 +158,8 @@
system_jvm_java32, { 75 }
system_jvm_android32, { 76 }
system_arm_android, { 77 }
- system_i386_android { 78 }
+ system_i386_android, { 78 }
+ system_i8086_msdos { 79 }
);
type
@@ -198,6 +202,7 @@
,ar_mpw_ar
,ar_gnu_ar_scripted
,ar_gnu_gar
+ ,ar_watcom_wlib_omf
);
tres = (res_none
diff --git a/compiler/systems.pas b/compiler/systems.pas
index 705f601dac..5e57fa8785 100644
--- a/compiler/systems.pas
+++ b/compiler/systems.pas
@@ -340,7 +340,7 @@ interface
cpu2str : array[TSystemCpu] of string[10] =
('','i386','m68k','alpha','powerpc','sparc','vm','ia64','x86_64',
- 'mipseb','arm', 'powerpc64', 'avr', 'mipsel','jvm');
+ 'mipseb','arm', 'powerpc64', 'avr', 'mipsel','jvm', 'i8086');
abi2str : array[tabi] of string[10] =
('DEFAULT','SYSV','AIX','EABI','ARMEB','EABIHF');
@@ -735,10 +735,10 @@ begin
when the define is the same as the source cpu then we use the source
os, else we pick a default }
{$ifdef i386}
- {$ifdef cpu86}
+ {$ifdef cpui386}
default_target(source_info.system);
{$define default_target_set}
- {$else cpu86}
+ {$else cpui386}
{$ifdef linux}
default_target(system_i386_linux);
{$define default_target_set}
@@ -759,7 +759,7 @@ begin
{$define default_target_set}
default_target(system_i386_android);
{$endif}
- {$endif cpu86}
+ {$endif cpui386}
{ default is linux }
{$ifndef default_target_set}
default_target(system_i386_linux);
@@ -919,6 +919,10 @@ begin
{$ifdef jvm}
default_target(system_jvm_java32);
{$endif jvm}
+
+{$ifdef i8086}
+ default_target(system_i8086_msdos);
+{$endif i8086}
end;
diff --git a/compiler/systems/i_android.pas b/compiler/systems/i_android.pas
index 91ce8a0524..dcf9f72398 100644
--- a/compiler/systems/i_android.pas
+++ b/compiler/systems/i_android.pas
@@ -162,11 +162,11 @@ unit i_android;
implementation
initialization
-{$ifdef CPU86}
+{$ifdef CPUI386}
{$ifdef android}
set_source_info(system_i386_android_info);
{$endif}
-{$endif CPU86}
+{$endif CPUI386}
{$ifdef CPUARM}
{$ifdef android}
set_source_info(system_arm_android_info);
diff --git a/compiler/systems/i_beos.pas b/compiler/systems/i_beos.pas
index b2a7f22fdb..bfdf975f70 100644
--- a/compiler/systems/i_beos.pas
+++ b/compiler/systems/i_beos.pas
@@ -105,11 +105,11 @@ unit i_beos;
implementation
initialization
-{$ifdef cpu86}
+{$ifdef cpui386}
{$ifdef beos}
{$ifndef haiku}
set_source_info(system_i386_beos_info);
{$endif haiku}
{$endif beos}
-{$endif cpu86}
+{$endif cpui386}
end.
diff --git a/compiler/systems/i_bsd.pas b/compiler/systems/i_bsd.pas
index da8a1fbc13..4d3f78547f 100644
--- a/compiler/systems/i_bsd.pas
+++ b/compiler/systems/i_bsd.pas
@@ -951,7 +951,7 @@ unit i_bsd;
implementation
initialization
-{$ifdef cpu86}
+{$ifdef cpui386}
{$ifdef FreeBSD}
set_source_info(system_i386_FreeBSD_info);
{$endif}
@@ -964,7 +964,7 @@ initialization
{$ifdef Darwin}
set_source_info(system_i386_Darwin_info);
{$endif Darwin}
-{$endif cpu86}
+{$endif cpui386}
{$ifdef cpux86_64}
{$ifdef FreeBSD}
set_source_info(system_x86_64_FreeBSD_info);
diff --git a/compiler/systems/i_emx.pas b/compiler/systems/i_emx.pas
index 18c24c5ee2..cce75e5280 100644
--- a/compiler/systems/i_emx.pas
+++ b/compiler/systems/i_emx.pas
@@ -106,7 +106,7 @@ unit i_emx;
implementation
initialization
-{$ifdef CPU86}
+{$ifdef CPUI386}
{$ifdef EMX}
{$IFNDEF VER1_0}
set_source_info(system_i386_emx_info);
@@ -115,5 +115,5 @@ initialization
source_info.scriptext := '.bat';
{$ENDIF VER1_0}
{$endif EMX}
-{$endif CPU86}
+{$endif CPUI386}
end.
diff --git a/compiler/systems/i_go32v2.pas b/compiler/systems/i_go32v2.pas
index 9ccd984a36..b5d20b3239 100644
--- a/compiler/systems/i_go32v2.pas
+++ b/compiler/systems/i_go32v2.pas
@@ -94,9 +94,9 @@ unit i_go32v2;
implementation
initialization
-{$ifdef cpu86}
+{$ifdef cpui386}
{$ifdef go32v2}
set_source_info(system_i386_go32v2_info);
{$endif go32v2}
-{$endif cpu86}
+{$endif cpui386}
end.
diff --git a/compiler/systems/i_haiku.pas b/compiler/systems/i_haiku.pas
index 15b391d486..71b6fef5e5 100644
--- a/compiler/systems/i_haiku.pas
+++ b/compiler/systems/i_haiku.pas
@@ -106,9 +106,9 @@ unit i_haiku;
implementation
initialization
-{$ifdef cpu86}
+{$ifdef cpui386}
{$ifdef haiku}
set_source_info(system_i386_haiku_info);
{$endif haiku}
-{$endif cpu86}
+{$endif cpui386}
end.
diff --git a/compiler/systems/i_linux.pas b/compiler/systems/i_linux.pas
index 5fec64c4db..ad474d5568 100644
--- a/compiler/systems/i_linux.pas
+++ b/compiler/systems/i_linux.pas
@@ -940,14 +940,14 @@ unit i_linux;
implementation
initialization
-{$ifdef CPU86}
+{$ifdef CPUI386}
{$ifdef linux}
{ some FreeBSD versions define linux as well }
{$ifndef FreeBSD}
set_source_info(system_i386_linux_info);
{$endif FreeBSD}
{$endif}
-{$endif CPU86}
+{$endif CPUI386}
{$ifdef CPU68}
{$ifdef linux}
set_source_info(system_m68k_linux_info);
diff --git a/compiler/systems/i_msdos.pas b/compiler/systems/i_msdos.pas
new file mode 100644
index 0000000000..07ce06aad8
--- /dev/null
+++ b/compiler/systems/i_msdos.pas
@@ -0,0 +1,102 @@
+{
+ Copyright (c) 1998-2002 by Peter Vreman
+
+ This unit implements support information structures for MS-DOS
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ ****************************************************************************
+}
+{ This unit implements support information structures for go32v2. }
+unit i_msdos;
+
+{$i fpcdefs.inc}
+
+ interface
+
+ uses
+ systems;
+
+ const
+ system_i8086_msdos_info : tsysteminfo =
+ (
+ system : system_i8086_msdos;
+ name : 'MS-DOS 16-bit real mode';
+ shortname : 'MSDOS';
+ flags : [tf_use_8_3,tf_smartlink_library,tf_smartlink_sections];
+ cpu : cpu_i8086;
+ unit_env : 'MSDOSUNITS';
+ extradefines : '';
+ exeext : '.exe';
+ defext : '.def';
+ scriptext : '.bat';
+ smartext : '.sl';
+ unitext : '.ppu';
+ unitlibext : '.ppl';
+ asmext : '.s';
+ objext : '.o';
+ resext : '.res';
+ resobjext : '.or';
+ sharedlibext : '.dll';
+ staticlibext : '.lib';
+ staticlibprefix : '';
+ sharedlibprefix : '';
+ sharedClibext : '.dll';
+ staticClibext : '.a';
+ staticClibprefix : 'lib';
+ sharedClibprefix : '';
+ importlibprefix : '';
+ importlibext : '.al';
+ Cprefix : '_';
+ newline : #13#10;
+ dirsep : '\';
+ assem : as_i386_nasmobj;
+ assemextern : as_i386_nasmobj;
+ link : nil;
+ linkextern : nil;
+ ar : ar_watcom_wlib_omf;
+ res : res_none;
+ dbg : dbg_stabs;
+ script : script_dos;
+ endian : endian_little;
+ alignment :
+ (
+ procalign : 2;
+ loopalign : 2;
+ jumpalign : 0;
+ constalignmin : 0;
+ constalignmax : 2;
+ varalignmin : 0;
+ varalignmax : 2;
+ localalignmin : 0;
+ localalignmax : 2;
+ recordalignmin : 0;
+ recordalignmax : 2;
+ maxCrecordalign : 2
+ );
+ first_parm_offset : 4;
+ stacksize : 4096;
+ stackalign : 2;
+ abi : abi_default;
+ );
+
+ implementation
+
+initialization
+{$ifdef cpu8086}
+ {$ifdef dos16}
+ set_source_info(system_i8086_msdos_info);
+ {$endif dos16}
+{$endif cpu8086}
+end.
diff --git a/compiler/systems/i_nativent.pas b/compiler/systems/i_nativent.pas
index b283e73f86..9828a56611 100644
--- a/compiler/systems/i_nativent.pas
+++ b/compiler/systems/i_nativent.pas
@@ -99,9 +99,9 @@ unit i_nativent;
implementation
initialization
-{$ifdef CPU86}
+{$ifdef CPUI386}
{$ifdef NATIVENT}
set_source_info(system_i386_nativent_info);
{$endif NATIVENT}
-{$endif CPU86}
+{$endif CPUI386}
end.
diff --git a/compiler/systems/i_nwl.pas b/compiler/systems/i_nwl.pas
index 17d28947dd..5264094cbe 100644
--- a/compiler/systems/i_nwl.pas
+++ b/compiler/systems/i_nwl.pas
@@ -94,9 +94,9 @@ unit i_nwl;
implementation
initialization
-{$ifdef CPU86}
+{$ifdef CPUI386}
{$ifdef netwlibc}
set_source_info(system_i386_netwlibc_info);
{$endif netwlibc}
-{$endif CPU86}
+{$endif CPUI386}
end.
diff --git a/compiler/systems/i_nwm.pas b/compiler/systems/i_nwm.pas
index 82ed77d5de..13506cae41 100644
--- a/compiler/systems/i_nwm.pas
+++ b/compiler/systems/i_nwm.pas
@@ -94,9 +94,9 @@ unit i_nwm;
implementation
initialization
-{$ifdef CPU86}
+{$ifdef CPUI386}
{$ifdef netware}
set_source_info(system_i386_netware_info);
{$endif netware}
-{$endif CPU86}
+{$endif CPUI386}
end.
diff --git a/compiler/systems/i_os2.pas b/compiler/systems/i_os2.pas
index 135c004b7a..21e854cdca 100644
--- a/compiler/systems/i_os2.pas
+++ b/compiler/systems/i_os2.pas
@@ -106,7 +106,7 @@ unit i_os2;
implementation
initialization
-{$ifdef CPU86}
+{$ifdef CPUI386}
{$ifdef os2}
{$IFNDEF EMX}
set_source_info(system_i386_os2_info);
@@ -115,5 +115,5 @@ initialization
set_source_info(system_i386_os2_info);
{$ENDIF VER1_0}
{$endif os2}
-{$endif CPU86}
+{$endif CPUI386}
end.
diff --git a/compiler/systems/i_sunos.pas b/compiler/systems/i_sunos.pas
index b142b48381..558dfe3344 100644
--- a/compiler/systems/i_sunos.pas
+++ b/compiler/systems/i_sunos.pas
@@ -230,11 +230,11 @@ unit i_sunos;
implementation
initialization
-{$ifdef CPU86}
+{$ifdef CPUI386}
{$ifdef solaris}
set_source_info(system_i386_solaris_info);
{$endif solaris}
-{$endif CPU86}
+{$endif CPUI386}
{$ifdef CPUX86_64}
{$ifdef solaris}
set_source_info(system_x86_64_solaris_info);
diff --git a/compiler/systems/i_symbian.pas b/compiler/systems/i_symbian.pas
index 4f5a1caa36..bccb22ca04 100644
--- a/compiler/systems/i_symbian.pas
+++ b/compiler/systems/i_symbian.pas
@@ -161,11 +161,11 @@ implementation
initialization
-{$ifdef CPU86}
+{$ifdef CPUI386}
{$ifdef Symbian}
set_source_info(system_i386_symbian_info);
{$endif Symbian}
-{$endif CPU86}
+{$endif CPUI386}
{$ifdef CPUARM}
{$ifdef Symbian}
diff --git a/compiler/systems/i_watcom.pas b/compiler/systems/i_watcom.pas
index b27f23110f..9cf1aef621 100644
--- a/compiler/systems/i_watcom.pas
+++ b/compiler/systems/i_watcom.pas
@@ -94,9 +94,9 @@ unit i_watcom;
implementation
initialization
-{$ifdef cpu86}
+{$ifdef cpui386}
{$ifdef watcom}
set_source_info(system_i386_watcom_info);
{$endif watcom}
-{$endif cpu86}
+{$endif cpui386}
end.
diff --git a/compiler/systems/i_wdosx.pas b/compiler/systems/i_wdosx.pas
index 0bff33417b..509c913c0e 100644
--- a/compiler/systems/i_wdosx.pas
+++ b/compiler/systems/i_wdosx.pas
@@ -94,11 +94,11 @@ unit i_wdosx;
implementation
initialization
-{$ifdef CPU86}
+{$ifdef CPUI386}
{$ifdef WIN32}
{$ifdef WDOSX}
set_source_info(system_i386_wdosx_info);
{$endif WDOSX}
{$endif WIN32}
-{$endif CPU86}
+{$endif CPUI386}
end.
diff --git a/compiler/systems/i_win.pas b/compiler/systems/i_win.pas
index 6a3d8e4045..c995f07f3e 100644
--- a/compiler/systems/i_win.pas
+++ b/compiler/systems/i_win.pas
@@ -297,7 +297,7 @@ unit i_win;
implementation
initialization
-{$ifdef CPU86}
+{$ifdef CPUI386}
{$ifdef WIN32}
{$ifndef WDOSX}
set_source_info(system_i386_win32_info);
@@ -306,7 +306,7 @@ initialization
{$ifdef WINCE}
set_source_info(system_i386_wince_info);
{$endif WINCE}
-{$endif CPU86}
+{$endif CPUI386}
{$ifdef CPUX86_64}
{$ifdef WIN64}
diff --git a/compiler/systems/t_msdos.pas b/compiler/systems/t_msdos.pas
new file mode 100644
index 0000000000..413b71e37d
--- /dev/null
+++ b/compiler/systems/t_msdos.pas
@@ -0,0 +1,329 @@
+{
+ Copyright (c) 1998-2002 by Peter Vreman
+
+ This unit implements support import,export,link routines
+ for the (i8086) MS-DOS target
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+
+ ****************************************************************************
+}
+unit t_msdos;
+
+{$i fpcdefs.inc}
+
+{$define USE_LINKER_WLINK}
+
+interface
+
+
+implementation
+
+ uses
+ SysUtils,
+ cutils,cfileutl,cclasses,
+ globtype,globals,systems,verbose,script,
+ fmodule,i_msdos,
+ link,aasmbase;
+
+ type
+ { Borland TLINK support }
+ TExternalLinkerMsDosTLink=class(texternallinker)
+ private
+ Function WriteResponseFile(isdll:boolean) : Boolean;
+ public
+ constructor Create;override;
+ procedure SetDefaultInfo;override;
+ function MakeExecutable:boolean;override;
+ end;
+
+ { the ALINK linker from http://alink.sourceforge.net/ }
+ TExternalLinkerMsDosALink=class(texternallinker)
+ private
+ Function WriteResponseFile(isdll:boolean) : Boolean;
+ public
+ constructor Create;override;
+ procedure SetDefaultInfo;override;
+ function MakeExecutable:boolean;override;
+ end;
+
+ { the (Open) Watcom linker }
+ TExternalLinkerMsDosWLink=class(texternallinker)
+ private
+ Function WriteResponseFile(isdll:boolean) : Boolean;
+ public
+ constructor Create;override;
+ procedure SetDefaultInfo;override;
+ function MakeExecutable:boolean;override;
+ end;
+
+
+{****************************************************************************
+ TExternalLinkerMsDosTLink
+****************************************************************************}
+
+Constructor TExternalLinkerMsDosTLink.Create;
+begin
+ Inherited Create;
+ { allow duplicated libs (PM) }
+ SharedLibFiles.doubles:=true;
+ StaticLibFiles.doubles:=true;
+end;
+
+
+procedure TExternalLinkerMsDosTLink.SetDefaultInfo;
+begin
+ with Info do
+ begin
+ ExeCmd[1]:='tlink $RES';
+ end;
+end;
+
+
+Function TExternalLinkerMsDosTLink.WriteResponseFile(isdll:boolean) : Boolean;
+Var
+ linkres : TLinkRes;
+ s : string;
+begin
+ WriteResponseFile:=False;
+
+ { Open link.res file }
+ LinkRes:=TLinkRes.Create(outputexedir+Info.ResName,true);
+
+ { Add all options to link.res instead of passing them via command line:
+ DOS command line is limited to 126 characters! }
+
+ { add objectfiles, start with prt0 always }
+ LinkRes.Add(GetShortName(FindObjectFile('prt0','',false)) + ' +');
+ while not ObjectFiles.Empty do
+ begin
+ s:=ObjectFiles.GetFirst;
+ if s<>'' then
+ LinkRes.Add(GetShortName(s) + ' +');
+ end;
+ LinkRes.Add(', ' + maybequoted(current_module.exefilename));
+
+ { Write and Close response }
+ linkres.writetodisk;
+ LinkRes.Free;
+
+ WriteResponseFile:=True;
+end;
+
+
+function TExternalLinkerMsDosTLink.MakeExecutable:boolean;
+var
+ binstr,
+ cmdstr : TCmdStr;
+ success : boolean;
+begin
+ if not(cs_link_nolink in current_settings.globalswitches) then
+ Message1(exec_i_linking,current_module.exefilename);
+
+ { Write used files and libraries and our own tlink script }
+ WriteResponsefile(false);
+
+ { Call linker }
+ SplitBinCmd(Info.ExeCmd[1],binstr,cmdstr);
+ Replace(cmdstr,'$RES','@'+maybequoted(outputexedir+Info.ResName));
+ success:=DoExec(FindUtil(utilsprefix+BinStr),cmdstr,true,false);
+
+ { Remove ReponseFile }
+ if (success) and not(cs_link_nolink in current_settings.globalswitches) then
+ DeleteFile(outputexedir+Info.ResName);
+
+ MakeExecutable:=success; { otherwise a recursive call to link method }
+end;
+
+{****************************************************************************
+ TExternalLinkerMsDosALink
+****************************************************************************}
+
+{ TExternalLinkerMsDosALink }
+
+function TExternalLinkerMsDosALink.WriteResponseFile(isdll: boolean): Boolean;
+Var
+ linkres : TLinkRes;
+ s : string;
+begin
+ WriteResponseFile:=False;
+
+ { Open link.res file }
+ LinkRes:=TLinkRes.Create(outputexedir+Info.ResName,true);
+
+ { Add all options to link.res instead of passing them via command line:
+ DOS command line is limited to 126 characters! }
+
+ { add objectfiles, start with prt0 always }
+ LinkRes.Add(maybequoted(FindObjectFile('prt0','',false)));
+ while not ObjectFiles.Empty do
+ begin
+ s:=ObjectFiles.GetFirst;
+ if s<>'' then
+ LinkRes.Add(maybequoted(s));
+ end;
+ LinkRes.Add('-oEXE');
+ LinkRes.Add('-o ' + maybequoted(current_module.exefilename));
+
+ { Write and Close response }
+ linkres.writetodisk;
+ LinkRes.Free;
+
+ WriteResponseFile:=True;
+end;
+
+constructor TExternalLinkerMsDosALink.Create;
+begin
+ Inherited Create;
+ { allow duplicated libs (PM) }
+ SharedLibFiles.doubles:=true;
+ StaticLibFiles.doubles:=true;
+end;
+
+procedure TExternalLinkerMsDosALink.SetDefaultInfo;
+begin
+ with Info do
+ begin
+ ExeCmd[1]:='alink $RES';
+ end;
+end;
+
+function TExternalLinkerMsDosALink.MakeExecutable: boolean;
+var
+ binstr,
+ cmdstr : TCmdStr;
+ success : boolean;
+begin
+ if not(cs_link_nolink in current_settings.globalswitches) then
+ Message1(exec_i_linking,current_module.exefilename);
+
+ { Write used files and libraries and our own tlink script }
+ WriteResponsefile(false);
+
+ { Call linker }
+ SplitBinCmd(Info.ExeCmd[1],binstr,cmdstr);
+ Replace(cmdstr,'$RES','@'+maybequoted(outputexedir+Info.ResName));
+ success:=DoExec(FindUtil(utilsprefix+BinStr),cmdstr,true,false);
+
+ { Remove ReponseFile }
+ if (success) and not(cs_link_nolink in current_settings.globalswitches) then
+ DeleteFile(outputexedir+Info.ResName);
+
+ MakeExecutable:=success; { otherwise a recursive call to link method }
+end;
+
+
+
+{****************************************************************************
+ TExternalLinkerMsDosWLink
+****************************************************************************}
+
+{ TExternalLinkerMsDosWLink }
+
+function TExternalLinkerMsDosWLink.WriteResponseFile(isdll: boolean): Boolean;
+Var
+ linkres : TLinkRes;
+ s : string;
+begin
+ WriteResponseFile:=False;
+
+ { Open link.res file }
+ LinkRes:=TLinkRes.Create(outputexedir+Info.ResName,true);
+
+ { Add all options to link.res instead of passing them via command line:
+ DOS command line is limited to 126 characters! }
+
+ { add objectfiles, start with prt0 always }
+ LinkRes.Add('file ' + maybequoted(FindObjectFile('prt0','',false)));
+ while not ObjectFiles.Empty do
+ begin
+ s:=ObjectFiles.GetFirst;
+ if s<>'' then
+ LinkRes.Add('file ' + maybequoted(s));
+ end;
+ while not StaticLibFiles.Empty do
+ begin
+ s:=StaticLibFiles.GetFirst;
+ if s<>'' then
+ LinkRes.Add('library '+MaybeQuoted(s));
+ end;
+ LinkRes.Add('format dos');
+ LinkRes.Add('option dosseg');
+ LinkRes.Add('name ' + maybequoted(current_module.exefilename));
+
+ { Write and Close response }
+ linkres.writetodisk;
+ LinkRes.Free;
+
+ WriteResponseFile:=True;
+end;
+
+constructor TExternalLinkerMsDosWLink.Create;
+begin
+ Inherited Create;
+ { allow duplicated libs (PM) }
+ SharedLibFiles.doubles:=true;
+ StaticLibFiles.doubles:=true;
+end;
+
+procedure TExternalLinkerMsDosWLink.SetDefaultInfo;
+begin
+ with Info do
+ begin
+ ExeCmd[1]:='wlink $RES';
+ end;
+end;
+
+function TExternalLinkerMsDosWLink.MakeExecutable: boolean;
+var
+ binstr,
+ cmdstr : TCmdStr;
+ success : boolean;
+begin
+ if not(cs_link_nolink in current_settings.globalswitches) then
+ Message1(exec_i_linking,current_module.exefilename);
+
+ { Write used files and libraries and our own tlink script }
+ WriteResponsefile(false);
+
+ { Call linker }
+ SplitBinCmd(Info.ExeCmd[1],binstr,cmdstr);
+ Replace(cmdstr,'$RES','@'+maybequoted(outputexedir+Info.ResName));
+ success:=DoExec(FindUtil(utilsprefix+BinStr),cmdstr,true,false);
+
+ { Remove ReponseFile }
+ if (success) and not(cs_link_nolink in current_settings.globalswitches) then
+ DeleteFile(outputexedir+Info.ResName);
+
+ MakeExecutable:=success; { otherwise a recursive call to link method }
+end;
+
+
+{*****************************************************************************
+ Initialize
+*****************************************************************************}
+
+initialization
+{$if defined(USE_LINKER_TLINK)}
+ RegisterExternalLinker(system_i8086_msdos_info,TExternalLinkerMsDosTLink);
+{$elseif defined(USE_LINKER_ALINK)}
+ RegisterExternalLinker(system_i8086_msdos_info,TExternalLinkerMsDosALink);
+{$elseif defined(USE_LINKER_WLINK)}
+ RegisterExternalLinker(system_i8086_msdos_info,TExternalLinkerMsDosWLink);
+{$else}
+ {$fatal no linker defined}
+{$endif}
+ RegisterTarget(system_i8086_msdos_info);
+end.
diff --git a/compiler/utils/ppuutils/ppudump.pp b/compiler/utils/ppuutils/ppudump.pp
index ac3e39bb86..558007c44d 100644
--- a/compiler/utils/ppuutils/ppudump.pp
+++ b/compiler/utils/ppuutils/ppudump.pp
@@ -74,7 +74,8 @@ const
{ 11 } 'powerpc64',
{ 12 } 'avr',
{ 13 } 'mipsel',
- { 14 } 'jvm'
+ { 14 } 'jvm',
+ { 15 } 'i8086'
);
{ List of all supported system-cpu couples }
@@ -158,7 +159,8 @@ const
{ 75 } 'Java-JVM',
{ 76 } 'Android-JVM',
{ 77 } 'Android-arm',
- { 78 } 'Android-i386'
+ { 78 } 'Android-i386',
+ { 79 } 'MSDOS-i8086'
);
const
diff --git a/compiler/version.pas b/compiler/version.pas
index 2d8198405a..f51fcde36a 100644
--- a/compiler/version.pas
+++ b/compiler/version.pas
@@ -41,9 +41,9 @@ interface
date_string = {$I %DATE%};
{ source cpu string }
-{$ifdef cpu86}
+{$ifdef cpui386}
source_cpu_string = 'i386';
-{$endif cpu86}
+{$endif cpui386}
{$ifdef cpupowerpc32}
source_cpu_string = 'powerpc';
{$endif cpupowerpc32}
diff --git a/compiler/x86/aasmcpu.pas b/compiler/x86/aasmcpu.pas
index 77f15162a1..56989a6fb6 100644
--- a/compiler/x86/aasmcpu.pas
+++ b/compiler/x86/aasmcpu.pas
@@ -181,11 +181,13 @@ interface
OT_UNITY = OT_IMMEDIATE or OT_ONENESS; { for shift/rotate instructions }
{ Size of the instruction table converted by nasmconv.pas }
-{$ifdef x86_64}
+{$if defined(x86_64)}
instabentries = {$i x8664nop.inc}
-{$else x86_64}
+{$elseif defined(i386)}
instabentries = {$i i386nop.inc}
-{$endif x86_64}
+{$elseif defined(i8086)}
+ instabentries = {$i i8086nop.inc}
+{$endif}
maxinfolen = 8;
MaxInsChanges = 3; { Max things a instruction can change }
@@ -244,11 +246,13 @@ interface
InsProp : array[tasmop] of TInsProp =
-{$ifdef x86_64}
+{$if defined(x86_64)}
{$i x8664pro.inc}
-{$else x86_64}
+{$elseif defined(i386)}
{$i i386prop.inc}
-{$endif x86_64}
+{$elseif defined(i8086)}
+ {$i i8086prop.inc}
+{$endif}
type
TOperandOrder = (op_intel,op_att);
@@ -306,7 +310,21 @@ interface
procedure changeopsize(siz:topsize);
function GetString:string;
- procedure CheckNonCommutativeOpcodes;
+
+ { This is a workaround for the GAS non commutative fpu instruction braindamage.
+ Early versions of the UnixWare assembler had a bug where some fpu instructions
+ were reversed and GAS still keeps this "feature" for compatibility.
+ for details: http://sourceware.org/binutils/docs/as/i386_002dBugs.html#i386_002dBugs
+ http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=372528
+ http://en.wikibooks.org/wiki/X86_Assembly/GAS_Syntax#Caveats
+
+ Since FPC is "GAS centric" due to its history it generates instructions with the same operand order so
+ when generating output for other assemblers, the opcodes must be fixed before writing them.
+ This function returns the fixed opcodes. Changing the opcodes permanently is no good idea
+ because in case of smartlinking assembler is generated twice so at the second run wrong
+ assembler is generated.
+ }
+ function FixNonCommutativeOpcodes: tasmop;
private
FOperandOrder : TOperandOrder;
procedure init(_size : topsize); { this need to be called by all constructor }
@@ -438,16 +456,18 @@ implementation
PInsTabMemRefSizeInfoCache=^TInsTabMemRefSizeInfoCache;
const
-{$ifdef x86_64}
+{$if defined(x86_64)}
InsTab:array[0..instabentries-1] of TInsEntry={$i x8664tab.inc}
-{$else x86_64}
+{$elseif defined(i386)}
InsTab:array[0..instabentries-1] of TInsEntry={$i i386tab.inc}
-{$endif x86_64}
+{$elseif defined(i8086)}
+ InsTab:array[0..instabentries-1] of TInsEntry={$i i8086tab.inc}
+{$endif}
var
InsTabCache : PInsTabCache;
InsTabMemRefSizeInfoCache: PInsTabMemRefSizeInfoCache;
const
-{$ifdef x86_64}
+{$if defined(x86_64)}
{ Intel style operands ! }
opsize_2_type:array[0..2,topsize] of longint=(
(OT_NONE,
@@ -485,7 +505,7 @@ implementation
reg_ot_table : array[tregisterindex] of longint = (
{$i r8664ot.inc}
);
-{$else x86_64}
+{$elseif defined(i386)}
{ Intel style operands ! }
opsize_2_type:array[0..2,topsize] of longint=(
(OT_NONE,
@@ -523,7 +543,45 @@ implementation
reg_ot_table : array[tregisterindex] of longint = (
{$i r386ot.inc}
);
-{$endif x86_64}
+{$elseif defined(i8086)}
+ { Intel style operands ! }
+ opsize_2_type:array[0..2,topsize] of longint=(
+ (OT_NONE,
+ OT_BITS8,OT_BITS16,OT_BITS32,OT_BITS64,OT_BITS16,OT_BITS32,OT_BITS32,
+ OT_BITS16,OT_BITS32,OT_BITS64,
+ OT_BITS32,OT_BITS64,OT_BITS80,OT_BITS64,OT_NONE,
+ OT_BITS64,
+ OT_NEAR,OT_FAR,OT_SHORT,
+ OT_NONE,
+ OT_BITS128,
+ OT_BITS256
+ ),
+ (OT_NONE,
+ OT_BITS8,OT_BITS16,OT_BITS32,OT_BITS64,OT_BITS8,OT_BITS8,OT_BITS16,
+ OT_BITS16,OT_BITS32,OT_BITS64,
+ OT_BITS32,OT_BITS64,OT_BITS80,OT_BITS64,OT_NONE,
+ OT_BITS64,
+ OT_NEAR,OT_FAR,OT_SHORT,
+ OT_NONE,
+ OT_BITS128,
+ OT_BITS256
+ ),
+ (OT_NONE,
+ OT_BITS8,OT_BITS16,OT_BITS32,OT_BITS64,OT_NONE,OT_NONE,OT_NONE,
+ OT_BITS16,OT_BITS32,OT_BITS64,
+ OT_BITS32,OT_BITS64,OT_BITS80,OT_BITS64,OT_NONE,
+ OT_BITS64,
+ OT_NEAR,OT_FAR,OT_SHORT,
+ OT_NONE,
+ OT_BITS128,
+ OT_BITS256
+ )
+ );
+
+ reg_ot_table : array[tregisterindex] of longint = (
+ {$i r8086ot.inc}
+ );
+{$endif}
function MemRefInfo(aAsmop: TAsmOp): TInsTabMemRefSizeInfoRec;
begin
@@ -961,8 +1019,10 @@ implementation
end;
- procedure taicpu.CheckNonCommutativeOpcodes;
+ function taicpu.FixNonCommutativeOpcodes: tasmop;
begin
+ result:=opcode;
+
{ we need ATT order }
SetOperandOrder(op_att);
@@ -981,21 +1041,21 @@ implementation
(ops=0) then
begin
if opcode=A_FSUBR then
- opcode:=A_FSUB
+ result:=A_FSUB
else if opcode=A_FSUB then
- opcode:=A_FSUBR
+ result:=A_FSUBR
else if opcode=A_FDIVR then
- opcode:=A_FDIV
+ result:=A_FDIV
else if opcode=A_FDIV then
- opcode:=A_FDIVR
+ result:=A_FDIVR
else if opcode=A_FSUBRP then
- opcode:=A_FSUBP
+ result:=A_FSUBP
else if opcode=A_FSUBP then
- opcode:=A_FSUBRP
+ result:=A_FSUBRP
else if opcode=A_FDIVRP then
- opcode:=A_FDIVP
+ result:=A_FDIVP
else if opcode=A_FDIVP then
- opcode:=A_FDIVRP;
+ result:=A_FDIVRP;
end;
if (
(ops=1) and
@@ -1005,13 +1065,13 @@ implementation
) then
begin
if opcode=A_FSUBRP then
- opcode:=A_FSUBP
+ result:=A_FSUBP
else if opcode=A_FSUBP then
- opcode:=A_FSUBRP
+ result:=A_FSUBRP
else if opcode=A_FDIVRP then
- opcode:=A_FDIVP
+ result:=A_FDIVP
else if opcode=A_FDIVP then
- opcode:=A_FDIVRP;
+ result:=A_FDIVRP;
end;
end;
@@ -1492,15 +1552,19 @@ implementation
function regval(r:Tregister):byte;
const
- {$ifdef x86_64}
+ {$if defined(x86_64)}
opcode_table:array[tregisterindex] of tregisterindex = (
{$i r8664op.inc}
);
- {$else x86_64}
+ {$elseif defined(i386)}
opcode_table:array[tregisterindex] of tregisterindex = (
{$i r386op.inc}
);
- {$endif x86_64}
+ {$elseif defined(i8086)}
+ opcode_table:array[tregisterindex] of tregisterindex = (
+ {$i r8086op.inc}
+ );
+ {$endif}
var
regidx : tregisterindex;
begin
@@ -2039,7 +2103,7 @@ implementation
else
rex:=rex and $F7;
end;
- if not(exists_vex) then
+ if not(exists_vex) then
begin
if rex<>0 then
Inc(len);
@@ -2473,8 +2537,11 @@ implementation
24,25,26 : // 030..032
begin
getvalsym(c-24);
+{$ifndef i8086}
+ { currval is an aint so this cannot happen on i8086 and causes only a warning }
if (currval<-65536) or (currval>65535) then
Message2(asmw_e_value_exceeds_bounds,'word',tostr(currval));
+{$endif i8086}
if assigned(currsym) then
objdata_writereloc(currval,2,currsym,currabsreloc)
else
diff --git a/compiler/x86/agx86int.pas b/compiler/x86/agx86int.pas
index 776d02339f..6def907657 100644
--- a/compiler/x86/agx86int.pas
+++ b/compiler/x86/agx86int.pas
@@ -457,6 +457,7 @@ implementation
consttype : taiconst_type;
do_line,DoNotSplitLine,
quoted : boolean;
+ fixed_opcode: TAsmOp;
begin
if not assigned(p) then
exit;
@@ -696,7 +697,7 @@ implementation
end;
ait_instruction :
begin
- taicpu(hp).CheckNonCommutativeOpcodes;
+ fixed_opcode:=taicpu(hp).FixNonCommutativeOpcodes;
taicpu(hp).SetOperandOrder(op_intel);
{ Reset }
suffix:='';
@@ -707,8 +708,8 @@ implementation
if (taicpu(hp).opsize=S_W) and
(
(
- (taicpu(hp).opcode=A_PUSH) or
- (taicpu(hp).opcode=A_POP)
+ (fixed_opcode=A_PUSH) or
+ (fixed_opcode=A_POP)
) and
(taicpu(hp).oper[0]^.typ=top_reg) and
is_segment_reg(taicpu(hp).oper[0]^.reg)
@@ -717,14 +718,14 @@ implementation
{ added prefix instructions, must be on same line as opcode }
if (taicpu(hp).ops = 0) and
- ((taicpu(hp).opcode = A_REP) or
- (taicpu(hp).opcode = A_LOCK) or
- (taicpu(hp).opcode = A_REPE) or
- (taicpu(hp).opcode = A_REPNZ) or
- (taicpu(hp).opcode = A_REPZ) or
- (taicpu(hp).opcode = A_REPNE)) then
+ ((fixed_opcode = A_REP) or
+ (fixed_opcode = A_LOCK) or
+ (fixed_opcode = A_REPE) or
+ (fixed_opcode = A_REPNZ) or
+ (fixed_opcode = A_REPZ) or
+ (fixed_opcode = A_REPNE)) then
Begin
- prefix:=std_op2str[taicpu(hp).opcode]+#9;
+ prefix:=std_op2str[fixed_opcode]+#9;
{ there can be a stab inbetween when the opcode was on
a different line in the source code }
repeat
@@ -750,20 +751,20 @@ implementation
prefix:= '';
if (target_asm.id = as_i386_wasm) and
(taicpu(hp).opsize=S_W) and
- (taicpu(hp).opcode=A_PUSH) and
+ (fixed_opcode=A_PUSH) and
(taicpu(hp).oper[0]^.typ=top_const) then
begin
AsmWriteln(#9#9'DB 66h,68h ; pushw imm16');
AsmWrite(#9#9'DW');
end
else if (target_asm.id=as_x86_64_masm) and
- (taicpu(hp).opcode=A_MOVQ) then
+ (fixed_opcode=A_MOVQ) then
AsmWrite(#9#9'mov')
else
- AsmWrite(#9#9+prefix+std_op2str[taicpu(hp).opcode]+cond2str[taicpu(hp).condition]+suffix);
+ AsmWrite(#9#9+prefix+std_op2str[fixed_opcode]+cond2str[taicpu(hp).condition]+suffix);
if taicpu(hp).ops<>0 then
begin
- if is_calljmp(taicpu(hp).opcode) then
+ if is_calljmp(fixed_opcode) then
begin
AsmWrite(#9);
WriteOper_jmp(taicpu(hp).oper[0]^,taicpu(hp).opsize);
@@ -776,7 +777,7 @@ implementation
AsmWrite(#9)
else
AsmWrite(',');
- WriteOper(taicpu(hp).oper[i]^,taicpu(hp).opsize,taicpu(hp).opcode,(i=2));
+ WriteOper(taicpu(hp).oper[i]^,taicpu(hp).opsize,fixed_opcode,(i=2));
end;
end;
end;
diff --git a/compiler/x86/agx86nsm.pas b/compiler/x86/agx86nsm.pas
index add3249f60..5241cc0024 100644
--- a/compiler/x86/agx86nsm.pas
+++ b/compiler/x86/agx86nsm.pas
@@ -64,7 +64,13 @@ interface
nasm_regname_table : array[tregisterindex] of string[7] = (
{r386nasm.inc contains the Nasm name of each register.}
+{$if defined(x86_64)}
+ {$fatal nasm support not yet implemented for x86_64 }
+{$elseif defined(i386)}
{$i r386nasm.inc}
+{$elseif defined(i8086)}
+ {$i r8086nasm.inc}
+{$endif}
);
function nasm_regname(r:Tregister):string;
@@ -359,7 +365,15 @@ interface
end
else
begin
+{$ifdef x86_64}
+ asmwrite('qword ');
+{$endif}
+{$ifdef i386}
asmwrite('dword ');
+{$endif i386}
+{$ifdef i8086}
+ asmwrite('word ');
+{$endif i8086}
if assigned(o.ref^.symbol) then
begin
if SmartAsm then
@@ -389,16 +403,19 @@ interface
WriteReference(o.ref^)
else
begin
+{ NEAR forces NASM to emit near jumps, which are 386+ }
+{$ifndef i8086}
if not(
(op=A_JCXZ) or (op=A_JECXZ) or
-{$ifdef x86_64}
+ {$ifdef x86_64}
(op=A_JRCXZ) or
-{$endif x86_64}
+ {$endif x86_64}
(op=A_LOOP) or (op=A_LOOPE) or
(op=A_LOOPNE) or (op=A_LOOPNZ) or
(op=A_LOOPZ)
) then
AsmWrite('NEAR ');
+{$endif i8086}
AsmWrite(o.ref^.symbol.name);
if SmartAsm then
AddSymbol(o.ref^.symbol.name,false);
@@ -496,6 +513,11 @@ interface
AsmWrite('.');
AsmWrite(aname);
end;
+{$ifdef i8086}
+ { WLINK requires this in order to leave the BSS section out of the executable }
+ if atype = sec_bss then
+ AsmWrite(' class=bss');
+{$endif i8086}
AsmLn;
LasTSecType:=atype;
end;
@@ -521,6 +543,7 @@ interface
{$ifdef cpuextended}
e : extended;
{$endif cpuextended}
+ fixed_opcode: TAsmOp;
begin
if not assigned(p) then
exit;
@@ -580,7 +603,7 @@ interface
ait_datablock :
begin
- if tai_datablock(hp).is_global then
+ if tai_datablock(hp).is_global or SmartAsm then
begin
AsmWrite(#9'GLOBAL ');
AsmWriteLn(tai_datablock(hp).sym.name);
@@ -834,7 +857,14 @@ interface
ait_label :
begin
if tai_label(hp).labsym.is_used then
- AsmWriteLn(tai_label(hp).labsym.name+':');
+ begin
+ if SmartAsm then
+ begin
+ AsmWrite(#9'GLOBAL ');
+ AsmWriteLn(tai_label(hp).labsym.name);
+ end;
+ AsmWriteLn(tai_label(hp).labsym.name+':');
+ end;
if SmartAsm then
AddSymbol(tai_label(hp).labsym.name,true);
end;
@@ -843,7 +873,7 @@ interface
begin
if tai_symbol(hp).has_value then
internalerror(2009090803);
- if tai_symbol(hp).is_global then
+ if tai_symbol(hp).is_global or SmartAsm then
begin
AsmWrite(#9'GLOBAL ');
AsmWriteLn(tai_symbol(hp).sym.name);
@@ -861,12 +891,12 @@ interface
ait_instruction :
begin
- taicpu(hp).CheckNonCommutativeOpcodes;
+ fixed_opcode:=taicpu(hp).FixNonCommutativeOpcodes;
{ We need intel order, no At&t }
taicpu(hp).SetOperandOrder(op_intel);
s:='';
- if ((taicpu(hp).opcode=A_FADDP) or
- (taicpu(hp).opcode=A_FMULP))
+ if ((fixed_opcode=A_FADDP) or
+ (fixed_opcode=A_FMULP))
and (taicpu(hp).ops=0) then
begin
taicpu(hp).allocate_oper(2);
@@ -875,7 +905,7 @@ interface
taicpu(hp).oper[1]^.typ:=top_reg;
taicpu(hp).oper[1]^.reg:=NR_ST;
end;
- if taicpu(hp).opcode=A_FWAIT then
+ if fixed_opcode=A_FWAIT then
AsmWriteln(#9#9'DB'#9'09bh')
else
begin
@@ -883,18 +913,18 @@ interface
word prefix to get selectors
to be pushed in 2 bytes PM }
if (taicpu(hp).opsize=S_W) and
- ((taicpu(hp).opcode=A_PUSH) or
- (taicpu(hp).opcode=A_POP)) and
+ ((fixed_opcode=A_PUSH) or
+ (fixed_opcode=A_POP)) and
(taicpu(hp).oper[0]^.typ=top_reg) and
(is_segment_reg(taicpu(hp).oper[0]^.reg)) then
AsmWriteln(#9#9'DB'#9'066h');
- AsmWrite(#9#9+std_op2str[taicpu(hp).opcode]+cond2str[taicpu(hp).condition]);
+ AsmWrite(#9#9+std_op2str[fixed_opcode]+cond2str[taicpu(hp).condition]);
if taicpu(hp).ops<>0 then
begin
- if is_calljmp(taicpu(hp).opcode) then
+ if is_calljmp(fixed_opcode) then
begin
AsmWrite(#9);
- WriteOper_jmp(taicpu(hp).oper[0]^,taicpu(hp).opcode);
+ WriteOper_jmp(taicpu(hp).oper[0]^,fixed_opcode);
end
else
begin
@@ -904,7 +934,7 @@ interface
AsmWrite(#9)
else
AsmWrite(',');
- WriteOper(taicpu(hp).oper[i]^,taicpu(hp).opsize,taicpu(hp).opcode,taicpu(hp).ops,(i=2));
+ WriteOper(taicpu(hp).oper[i]^,taicpu(hp).opsize,fixed_opcode,taicpu(hp).ops,(i=2));
end;
end;
end;
@@ -1018,7 +1048,12 @@ interface
if current_module.mainsource<>'' then
comment(v_info,'Start writing nasm-styled assembler output for '+current_module.mainsource);
{$endif}
+{$ifdef i8086}
+ AsmWriteLn('BITS 16');
+ AsmWriteLn('CPU 286');
+{$else i8086}
AsmWriteLn('BITS 32');
+{$endif i8086}
AsmLn;
WriteExternals;
@@ -1036,6 +1071,15 @@ interface
WriteSmartExternals;
FreeExternChainList;
end;
+{$ifdef i8086}
+ { NASM complains if you put a missing section in the GROUP directive, so }
+ { we add empty declarations to make sure they exist, even if empty }
+ AsmWriteLn('SECTION .rodata');
+ AsmWriteLn('SECTION .data');
+ AsmWriteLn('SECTION .bss class=bss');
+ { group these sections in the same segment }
+ AsmWriteLn('GROUP dgroup rodata data bss');
+{$endif i8086}
{$ifdef EXTDEBUG}
if current_module.mainsource<>'' then
comment(v_info,'Done writing nasm-styled assembler output for '+current_module.mainsource);
@@ -1080,7 +1124,7 @@ interface
idtxt : 'NASMOBJ';
asmbin : 'nasm';
asmcmd : '-f obj -o $OBJ $ASM';
- supported_targets : [system_i386_embedded];
+ supported_targets : [system_i386_embedded, system_i8086_msdos];
flags : [af_needar,af_no_debug];
labelprefix : '..@';
comment : '; ';
diff --git a/compiler/x86/cgx86.pas b/compiler/x86/cgx86.pas
index 5d02763c28..3208139830 100644
--- a/compiler/x86/cgx86.pas
+++ b/compiler/x86/cgx86.pas
@@ -132,19 +132,25 @@ unit cgx86;
end;
const
-{$ifdef x86_64}
+{$if defined(x86_64)}
TCGSize2OpSize: Array[tcgsize] of topsize =
(S_NO,S_B,S_W,S_L,S_Q,S_XMM,S_B,S_W,S_L,S_Q,S_XMM,
S_FS,S_FL,S_FX,S_IQ,S_FXX,
S_NO,S_NO,S_NO,S_MD,S_XMM,S_YMM,
S_NO,S_NO,S_NO,S_NO,S_XMM,S_YMM);
-{$else x86_64}
+{$elseif defined(i386)}
TCGSize2OpSize: Array[tcgsize] of topsize =
(S_NO,S_B,S_W,S_L,S_L,S_T,S_B,S_W,S_L,S_L,S_L,
S_FS,S_FL,S_FX,S_IQ,S_FXX,
S_NO,S_NO,S_NO,S_MD,S_XMM,S_YMM,
S_NO,S_NO,S_NO,S_NO,S_XMM,S_YMM);
-{$endif x86_64}
+{$elseif defined(i8086)}
+ TCGSize2OpSize: Array[tcgsize] of topsize =
+ (S_NO,S_B,S_W,S_W,S_W,S_T,S_B,S_W,S_W,S_W,S_W,
+ S_FS,S_FL,S_FX,S_IQ,S_FXX,
+ S_NO,S_NO,S_NO,S_MD,S_XMM,S_YMM,
+ S_NO,S_NO,S_NO,S_NO,S_XMM,S_YMM);
+{$endif}
{$ifndef NOTARGETWIN}
winstackpagesize = 4096;
@@ -369,7 +375,7 @@ unit cgx86;
if (ref.refaddr in [addr_pic,addr_pic_no_got]) then
exit;
-{$ifdef x86_64}
+{$if defined(x86_64)}
{ Only 32bit is allowed }
{ Note that this isn't entirely correct: for RIP-relative targets/memory models,
it is actually (offset+@symbol-RIP) that should fit into 32 bits. Since two last
@@ -505,7 +511,7 @@ unit cgx86;
end;
end;
-{$else x86_64}
+{$elseif defined(i386)}
add_hreg:=false;
if (target_info.system in [system_i386_darwin,system_i386_iphonesim]) then
begin
@@ -561,7 +567,17 @@ unit cgx86;
ref.base:=hreg;
end;
end;
-{$endif x86_64}
+{$elseif defined(i8086)}
+ { i8086 does not support stack relative addressing }
+ if ref.base = NR_STACK_POINTER_REG then
+ begin
+ href:=ref;
+ href.base:=getaddressregister(list);
+ { let the register allocator find a suitable register for the reference }
+ list.Concat(Taicpu.op_reg_reg(A_MOV, S_W, NR_SP, href.base));
+ ref:=href;
+ end
+{$endif}
end;
@@ -1538,6 +1554,14 @@ unit cgx86;
procedure tcgx86.a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; src, dst: TRegister);
+ const
+{$if defined(cpu64bitalu) or defined(cpu32bitalu)}
+ REGCX=NR_ECX;
+ REGCX_Size = OS_32;
+{$elseif defined(cpu16bitalu)}
+ REGCX=NR_CX;
+ REGCX_Size = OS_16;
+{$endif}
var
dstsize: topsize;
instr:Taicpu;
@@ -1559,10 +1583,10 @@ unit cgx86;
OP_SHR,OP_SHL,OP_SAR,OP_ROL,OP_ROR:
begin
{ Use ecx to load the value, that allows better coalescing }
- getcpuregister(list,NR_ECX);
- a_load_reg_reg(list,size,OS_32,src,NR_ECX);
+ getcpuregister(list,REGCX);
+ a_load_reg_reg(list,size,REGCX_Size,src,REGCX);
list.concat(taicpu.op_reg_reg(Topcg2asmop[op],tcgsize2opsize[size],NR_CL,dst));
- ungetcpuregister(list,NR_ECX);
+ ungetcpuregister(list,REGCX);
end;
else
begin
@@ -1805,15 +1829,22 @@ unit cgx86;
procedure Tcgx86.g_concatcopy(list:TAsmList;const source,dest:Treference;len:tcgint);
const
-{$ifdef cpu64bitalu}
+{$if defined(cpu64bitalu)}
REGCX=NR_RCX;
REGSI=NR_RSI;
REGDI=NR_RDI;
-{$else cpu64bitalu}
+ copy_len_sizes = [1, 2, 4, 8];
+{$elseif defined(cpu32bitalu)}
REGCX=NR_ECX;
REGSI=NR_ESI;
REGDI=NR_EDI;
-{$endif cpu64bitalu}
+ copy_len_sizes = [1, 2, 4];
+{$elseif defined(cpu16bitalu)}
+ REGCX=NR_CX;
+ REGSI=NR_SI;
+ REGDI=NR_DI;
+ copy_len_sizes = [1, 2];
+{$endif}
type copymode=(copy_move,copy_mmx,copy_string);
@@ -1837,7 +1868,7 @@ unit cgx86;
cm:=copy_string;
if (cs_opt_size in current_settings.optimizerswitches) and
not((len<=16) and (cm=copy_mmx)) and
- not(len in [1,2,4{$ifdef x86_64},8{$endif x86_64}]) then
+ not(len in copy_len_sizes) then
cm:=copy_string;
if (source.segment<>NR_NO) or
(dest.segment<>NR_NO) then
@@ -1861,11 +1892,13 @@ unit cgx86;
copysize:=2;
cgsize:=OS_16;
end
+{$if defined(cpu32bitalu) or defined(cpu64bitalu)}
else if len<8 then
begin
copysize:=4;
cgsize:=OS_32;
end
+{$endif cpu32bitalu or cpu64bitalu}
{$ifdef cpu64bitalu}
else if len<16 then
begin
@@ -1951,9 +1984,9 @@ unit cgx86;
end;
getcpuregister(list,REGCX);
-{$ifdef i386}
+{$if defined(i8086) or defined(i386)}
list.concat(Taicpu.op_none(A_CLD,S_NO));
-{$endif i386}
+{$endif i8086 or i386}
if (cs_opt_size in current_settings.optimizerswitches) and
(len>sizeof(aint)+(sizeof(aint) div 2)) then
begin
@@ -1972,11 +2005,13 @@ unit cgx86;
end;
if helpsize>0 then
begin
-{$ifdef cpu64bitalu}
+{$if defined(cpu64bitalu)}
list.concat(Taicpu.op_none(A_MOVSQ,S_NO))
-{$else}
+{$elseif defined(cpu32bitalu)}
list.concat(Taicpu.op_none(A_MOVSD,S_NO));
-{$endif cpu64bitalu}
+{$elseif defined(cpu16bitalu)}
+ list.concat(Taicpu.op_none(A_MOVSW,S_NO));
+{$endif}
end;
if len>=4 then
begin
diff --git a/compiler/x86/cpubase.pas b/compiler/x86/cpubase.pas
index 08e5ea5d32..9cacc614a9 100644
--- a/compiler/x86/cpubase.pas
+++ b/compiler/x86/cpubase.pas
@@ -1,7 +1,7 @@
{
Copyright (c) 1998-2002 by Florian Klaempfl and Peter Vreman
- Contains the base types for the i386 and x86-64 architecture
+ Contains the base types for the i8086, i386 and x86-64 architecture
* This code was inspired by the NASM sources
The Netwide Assembler is Copyright (c) 1996 Simon Tatham and
@@ -45,11 +45,13 @@ uses
*****************************************************************************}
type
-{$ifdef x86_64}
+{$if defined(x86_64)}
TAsmOp={$i x8664op.inc}
-{$else x86_64}
+{$elseif defined(i386)}
TAsmOp={$i i386op.inc}
-{$endif x86_64}
+{$elseif defined(i8086)}
+ TAsmOp={$i i8086op.inc}
+{$endif}
{ This should define the array of instructions as string }
op2strtable=array[tasmop] of string[16];
@@ -91,6 +93,15 @@ uses
RS_EDI = RS_RDI;
RS_EBP = RS_RBP;
RS_ESP = RS_RSP;
+ { create aliases to allow code sharing between i386 and i8086 }
+ RS_AX = RS_RAX;
+ RS_BX = RS_RBX;
+ RS_CX = RS_RCX;
+ RS_DX = RS_RDX;
+ RS_SI = RS_RSI;
+ RS_DI = RS_RDI;
+ RS_BP = RS_RBP;
+ RS_SP = RS_RSP;
{ Number of first imaginary register }
first_int_imreg = $10;
@@ -136,57 +147,71 @@ uses
{$endif x86_64}
{ The subregister that specifies the entire register and an address }
-{$ifdef x86_64}
+{$if defined(x86_64)}
{ Hammer }
R_SUBWHOLE = R_SUBQ;
R_SUBADDR = R_SUBQ;
-{$else x86_64}
+{$elseif defined(i386)}
{ i386 }
R_SUBWHOLE = R_SUBD;
R_SUBADDR = R_SUBD;
-{$endif x86_64}
+{$elseif defined(i8086)}
+ { i8086 }
+ R_SUBWHOLE = R_SUBW;
+ R_SUBADDR = R_SUBW;
+{$endif}
{ Available Registers }
-{$ifdef x86_64}
+{$if defined(x86_64)}
{$i r8664con.inc}
-{$else x86_64}
+{$elseif defined(i386)}
{$i r386con.inc}
-{$endif x86_64}
+{$elseif defined(i8086)}
+ {$i r8086con.inc}
+{$endif}
type
{ Number of registers used for indexing in tables }
-{$ifdef x86_64}
+{$if defined(x86_64)}
tregisterindex=0..{$i r8664nor.inc}-1;
-{$else x86_64}
+{$elseif defined(i386)}
tregisterindex=0..{$i r386nor.inc}-1;
-{$endif x86_64}
+{$elseif defined(i8086)}
+ tregisterindex=0..{$i r8086nor.inc}-1;
+{$endif}
const
{ TODO: Calculate bsstart}
regnumber_count_bsstart = 64;
regnumber_table : array[tregisterindex] of tregister = (
-{$ifdef x86_64}
+{$if defined(x86_64)}
{$i r8664num.inc}
-{$else x86_64}
+{$elseif defined(i386)}
{$i r386num.inc}
-{$endif x86_64}
+{$elseif defined(i8086)}
+ {$i r8086num.inc}
+{$endif}
);
regstabs_table : array[tregisterindex] of shortint = (
-{$ifdef x86_64}
+{$if defined(x86_64)}
{$i r8664stab.inc}
-{$else x86_64}
+{$elseif defined(i386)}
{$i r386stab.inc}
-{$endif x86_64}
+{$elseif defined(i8086)}
+ {$i r8086stab.inc}
+{$endif}
);
regdwarf_table : array[tregisterindex] of shortint = (
-{$ifdef x86_64}
+{$if defined(x86_64)}
{$i r8664dwrf.inc}
-{$else x86_64}
+{$elseif defined(i386)}
{$i r386dwrf.inc}
-{$endif x86_64}
+{$elseif defined(i8086)}
+ {$i r8086dwrf.inc}
+{$endif}
);
RS_DEFAULTFLAGS = RS_FLAGS;
@@ -261,13 +286,18 @@ uses
function inverse_cond(const c: TAsmCond): TAsmCond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
function conditions_equal(const c1, c2: TAsmCond): boolean; {$ifdef USEINLINE}inline;{$endif USEINLINE}
+{$ifdef i8086}
+ { returns the next virtual register }
+ function GetNextReg(const r : TRegister) : TRegister;
+{$endif i8086}
+
implementation
uses
rgbase,verbose;
const
- {$ifdef x86_64}
+ {$if defined(x86_64)}
std_regname_table : TRegNameTable = (
{$i r8664std.inc}
);
@@ -278,7 +308,7 @@ implementation
std_regname_index : array[tregisterindex] of tregisterindex = (
{$i r8664sri.inc}
);
- {$else x86_64}
+ {$elseif defined(i386)}
std_regname_table : TRegNameTable = (
{$i r386std.inc}
);
@@ -290,7 +320,19 @@ implementation
std_regname_index : array[tregisterindex] of tregisterindex = (
{$i r386sri.inc}
);
- {$endif x86_64}
+ {$elseif defined(i8086)}
+ std_regname_table : TRegNameTable = (
+ {$i r8086std.inc}
+ );
+
+ regnumber_index : array[tregisterindex] of tregisterindex = (
+ {$i r8086rni.inc}
+ );
+
+ std_regname_index : array[tregisterindex] of tregisterindex = (
+ {$i r8086sri.inc}
+ );
+ {$endif}
{*****************************************************************************
@@ -511,4 +553,12 @@ implementation
end;
+{$ifdef i8086}
+ function GetNextReg(const r: TRegister): TRegister;
+ begin
+ result:=TRegister(longint(r)+1);
+ end;
+{$endif i8086}
+
+
end.
diff --git a/compiler/x86/itcpugas.pas b/compiler/x86/itcpugas.pas
index d03ee786d2..37eb631cb3 100644
--- a/compiler/x86/itcpugas.pas
+++ b/compiler/x86/itcpugas.pas
@@ -32,15 +32,17 @@ interface
TAttSuffix = (AttSufNONE,AttSufINT,AttSufFPU,AttSufFPUint,AttSufINTdual,AttSufMM);
const
-{$ifdef x86_64}
- {x86att.inc contains the name for each x86-64 mnemonic}
+ { include mnemonic strings }
+{$if defined(x86_64)}
gas_op2str:op2strtable={$i x8664att.inc}
gas_needsuffix:array[tasmop] of TAttSuffix={$i x8664ats.inc}
-{$else x86_64}
- {x86att.inc contains the name for each i386 mnemonic}
+{$elseif defined(i386)}
gas_op2str:op2strtable={$i i386att.inc}
gas_needsuffix:array[tasmop] of TAttSuffix={$i i386atts.inc}
-{$endif x86_64}
+{$elseif defined(i8086)}
+ gas_op2str:op2strtable={$i i8086att.inc}
+ gas_needsuffix:array[tasmop] of TAttSuffix={$i i8086atts.inc}
+{$endif}
{$ifdef x86_64}
gas_opsize2str : array[topsize] of string[2] = ('',
@@ -78,7 +80,7 @@ interface
'','','',
't',
'x',
- 'y'
+ 'y'
);
{ suffix-to-opsize conversion tables, used in asmreadrer }
att_sizesuffixstr : array[0..11] of string[2] = (
@@ -106,7 +108,7 @@ implementation
cutils,verbose;
const
- {$ifdef x86_64}
+ {$if defined(x86_64)}
att_regname_table : array[tregisterindex] of string[7] = (
{r8664att.inc contains the AT&T name of each register.}
{$i r8664att.inc}
@@ -117,7 +119,7 @@ implementation
ATT name.}
{$i r8664ari.inc}
);
- {$else x86_64}
+ {$elseif defined(i386)}
att_regname_table : array[tregisterindex] of string[7] = (
{r386att.inc contains the AT&T name of each register.}
{$i r386att.inc}
@@ -128,7 +130,18 @@ implementation
ATT name.}
{$i r386ari.inc}
);
- {$endif x86_64}
+ {$elseif defined(i8086)}
+ att_regname_table : array[tregisterindex] of string[7] = (
+ {r8086att.inc contains the AT&T name of each register.}
+ {$i r8086att.inc}
+ );
+
+ att_regname_index : array[tregisterindex] of tregisterindex = (
+ {r8086ari.inc contains an index which sorts att_regname_table by
+ ATT name.}
+ {$i r8086ari.inc}
+ );
+ {$endif}
function findreg_by_attname(const s:string):byte;
var
diff --git a/compiler/x86/itx86int.pas b/compiler/x86/itx86int.pas
index b8b8e21248..e46fc28847 100644
--- a/compiler/x86/itx86int.pas
+++ b/compiler/x86/itx86int.pas
@@ -39,7 +39,7 @@ implementation
cpubase;
const
- {$ifdef x86_64}
+ {$if defined(x86_64)}
int_regname_table : array[tregisterindex] of string[7] = (
{$i r8664int.inc}
);
@@ -47,7 +47,7 @@ implementation
int_regname_index : array[tregisterindex] of tregisterindex = (
{$i r8664iri.inc}
);
- {$else x86_64}
+ {$elseif defined(i386)}
int_regname_table : array[tregisterindex] of string[7] = (
{$i r386int.inc}
);
@@ -55,7 +55,15 @@ implementation
int_regname_index : array[tregisterindex] of tregisterindex = (
{$i r386iri.inc}
);
- {$endif x86_64}
+ {$elseif defined(i8086)}
+ int_regname_table : array[tregisterindex] of string[7] = (
+ {$i r8086int.inc}
+ );
+
+ int_regname_index : array[tregisterindex] of tregisterindex = (
+ {$i r8086iri.inc}
+ );
+ {$endif}
function findreg_by_intname(const s:string):integer;
diff --git a/compiler/x86/nx86add.pas b/compiler/x86/nx86add.pas
index aedd6207ce..ccf0859443 100644
--- a/compiler/x86/nx86add.pas
+++ b/compiler/x86/nx86add.pas
@@ -44,7 +44,9 @@ unit nx86add;
procedure second_addfloatsse;
public
procedure second_addfloat;override;
+{$ifndef i8086}
procedure second_addsmallset;override;
+{$endif not i8086}
procedure second_add64bit;override;
procedure second_cmpfloat;override;
procedure second_cmpsmallset;override;
@@ -332,6 +334,7 @@ unit nx86add;
AddSmallSet
*****************************************************************************}
+{$ifndef i8086}
procedure tx86addnode.second_addsmallset;
var
setbase : aint;
@@ -439,6 +442,7 @@ unit nx86add;
if opsize<>int_cgsize(resultdef.size) then
hlcg.location_force_reg(current_asmdata.CurrAsmList,location,opdef,hlcg.tcgsize2orddef(int_cgsize(resultdef.size)),false);
end;
+{$endif not i8086}
procedure tx86addnode.second_cmpsmallset;
diff --git a/compiler/x86/nx86inl.pas b/compiler/x86/nx86inl.pas
index 17a8e8d6d0..f7c4f48957 100644
--- a/compiler/x86/nx86inl.pas
+++ b/compiler/x86/nx86inl.pas
@@ -60,10 +60,12 @@ interface
procedure second_prefetch;override;
+{$ifndef i8086}
procedure second_abs_long;override;
+{$endif not i8086}
procedure second_popcnt;override;
private
- procedure load_fpu_location;
+ procedure load_fpu_location(lnode: tnode);
end;
implementation
@@ -196,28 +198,28 @@ implementation
end;
{ load the FPU into the an fpu register }
- procedure tx86inlinenode.load_fpu_location;
+ procedure tx86inlinenode.load_fpu_location(lnode: tnode);
begin
location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
location.register:=NR_FPU_RESULT_REG;
- secondpass(left);
- case left.location.loc of
+ secondpass(lnode);
+ case lnode.location.loc of
LOC_FPUREGISTER:
;
LOC_CFPUREGISTER:
begin
- cg.a_loadfpu_reg_reg(current_asmdata.CurrAsmList,left.location.size,
- left.location.size,left.location.register,location.register);
+ cg.a_loadfpu_reg_reg(current_asmdata.CurrAsmList,lnode.location.size,
+ lnode.location.size,lnode.location.register,location.register);
end;
LOC_REFERENCE,LOC_CREFERENCE:
begin
cg.a_loadfpu_ref_reg(current_asmdata.CurrAsmList,
- left.location.size,left.location.size,
- left.location.reference,location.register);
+ lnode.location.size,lnode.location.size,
+ lnode.location.reference,location.register);
end;
LOC_MMREGISTER,LOC_CMMREGISTER:
begin
- location:=left.location;
+ location:=lnode.location;
location_force_fpureg(current_asmdata.CurrAsmList,location,false);
end;
else
@@ -228,7 +230,7 @@ implementation
procedure tx86inlinenode.second_arctan_real;
begin
- load_fpu_location;
+ load_fpu_location(left);
emit_none(A_FLD1,S_NO);
emit_none(A_FPATAN,S_NO);
end;
@@ -256,7 +258,7 @@ implementation
end
else
begin
- load_fpu_location;
+ load_fpu_location(left);
emit_none(A_FABS,S_NO);
end;
end;
@@ -283,7 +285,13 @@ implementation
else
{$endif x86_64}
begin
- load_fpu_location;
+{$ifdef i8086}
+ if left.nodetype <> callparan then
+ internalerror(2013031501);
+ load_fpu_location(tcallparanode(left).left);
+{$else i8086}
+ load_fpu_location(left);
+{$endif i8086}
location_reset_ref(location,LOC_REFERENCE,OS_S64,0);
tg.GetTemp(current_asmdata.CurrAsmList,resultdef.size,resultdef.alignment,tt_normal,location.reference);
emit_ref(A_FISTP,S_IQ,location.reference);
@@ -319,7 +327,13 @@ implementation
begin
if (current_settings.fputype>=fpu_sse3) then
begin
- load_fpu_location;
+{$ifdef i8086}
+ if left.nodetype <> callparan then
+ internalerror(2013031501);
+ load_fpu_location(tcallparanode(left).left);
+{$else i8086}
+ load_fpu_location(left);
+{$endif i8086}
location_reset_ref(location,LOC_REFERENCE,OS_S64,0);
tg.GetTemp(current_asmdata.CurrAsmList,resultdef.size,resultdef.alignment,tt_normal,location.reference);
emit_ref(A_FISTTP,S_IQ,location.reference);
@@ -332,7 +346,11 @@ implementation
emit_ref(A_FNSTCW,S_NO,newcw);
emit_ref(A_FNSTCW,S_NO,oldcw);
emit_const_ref(A_OR,S_W,$0f00,newcw);
- load_fpu_location;
+{$ifdef i8086}
+ load_fpu_location(tcallparanode(left).left);
+{$else i8086}
+ load_fpu_location(left);
+{$endif i8086}
emit_ref(A_FLDCW,S_NO,newcw);
location_reset_ref(location,LOC_REFERENCE,OS_S64,0);
tg.GetTemp(current_asmdata.CurrAsmList,resultdef.size,resultdef.alignment,tt_normal,location.reference);
@@ -359,7 +377,7 @@ implementation
end
else
begin
- load_fpu_location;
+ load_fpu_location(left);
emit_reg_reg(A_FMUL,S_NO,NR_ST0,NR_ST0);
end;
end;
@@ -383,14 +401,14 @@ implementation
end
else
begin
- load_fpu_location;
+ load_fpu_location(left);
emit_none(A_FSQRT,S_NO);
end;
end;
procedure tx86inlinenode.second_ln_real;
begin
- load_fpu_location;
+ load_fpu_location(left);
emit_none(A_FLDLN2,S_NO);
emit_none(A_FXCH,S_NO);
emit_none(A_FYL2X,S_NO);
@@ -398,13 +416,13 @@ implementation
procedure tx86inlinenode.second_cos_real;
begin
- load_fpu_location;
+ load_fpu_location(left);
emit_none(A_FCOS,S_NO);
end;
procedure tx86inlinenode.second_sin_real;
begin
- load_fpu_location;
+ load_fpu_location(left);
emit_none(A_FSIN,S_NO)
end;
@@ -413,9 +431,9 @@ implementation
ref : treference;
r : tregister;
begin
-{$ifdef i386}
+{$if defined(i386) or defined(i8086)}
if current_settings.cputype>=cpu_Pentium3 then
-{$endif i386}
+{$endif i386 or i8086}
begin
secondpass(left);
case left.location.loc of
@@ -434,6 +452,7 @@ implementation
end;
+{$ifndef i8086}
procedure tx86inlinenode.second_abs_long;
var
hregister : tregister;
@@ -470,6 +489,7 @@ implementation
current_asmdata.CurrAsmList.concat(hp);
end;
end;
+{$endif not i8086}
{*****************************************************************************
INCLUDE/EXCLUDE GENERIC HANDLING
diff --git a/compiler/x86/nx86set.pas b/compiler/x86/nx86set.pas
index 6bc7710eff..937cf1c0b0 100644
--- a/compiler/x86/nx86set.pas
+++ b/compiler/x86/nx86set.pas
@@ -118,7 +118,11 @@ implementation
reference_reset_symbol(href,table,0,sizeof(pint));
href.offset:=(-aint(min_))*sizeof(aint);
href.index:=indexreg;
+{$ifdef i8086}
+ cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SHL,OS_INT,1,indexreg);
+{$else i8086}
href.scalefactor:=sizeof(aint);
+{$endif i8086}
emit_ref(A_JMP,S_NO,href);
{ generate jump table }
if (target_info.system in [system_i386_darwin,system_i386_iphonesim]) then
@@ -225,7 +229,11 @@ implementation
cond_le:=F_BE;
end;
{ do we need to generate cmps? }
+{$ifdef i8086}
+ if (with_sign and (min_label<0)) or (opcgsize in [OS_32, OS_S32]) then
+{$else i8086}
if (with_sign and (min_label<0)) then
+{$endif i8086}
genlinearcmplist(hp)
else
begin
@@ -344,8 +352,8 @@ implementation
to 32 bits, the left side may also not contain higher values or be signed !! }
use_small:=is_smallset(right.resultdef) and
not is_signed(left.resultdef) and
- ((left.resultdef.typ=orddef) and (torddef(left.resultdef).high.svalue<32) or
- (left.resultdef.typ=enumdef) and (tenumdef(left.resultdef).max<32));
+ ((left.resultdef.typ=orddef) and (torddef(left.resultdef).high.svalue<{$ifdef i8086}16{$else}32{$endif}) or
+ (left.resultdef.typ=enumdef) and (tenumdef(left.resultdef).max<{$ifdef i8086}16{$else}32{$endif}));
{ Can we generate jumps? Possible for all types of sets }
genjumps:=(right.nodetype=setconstn) and
@@ -371,7 +379,11 @@ implementation
swapleftright;
orgopsize := def_cgsize(left.resultdef);
+{$ifdef i8086}
+ opsize := OS_16;
+{$else i8086}
opsize := OS_32;
+{$endif i8086}
if is_signed(left.resultdef) then
opsize := tcgsize(ord(opsize)+(ord(OS_S8)-ord(OS_8)));
opdef:=hlcg.tcgsize2orddef(opsize);
@@ -493,6 +505,37 @@ implementation
end
else
begin
+{$ifdef i8086}
+ cg.getcpuregister(current_asmdata.CurrAsmList,NR_CX);
+ if TCGSize2Size[left.location.size] > 2 then
+ left.location.size := OS_16;
+ cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_16,left.location,NR_CX);
+
+ register_maybe_adjust_setbase(current_asmdata.CurrAsmList,left.location,setbase);
+ if (tcgsize2size[right.location.size] < 2) or
+ (right.location.loc = LOC_CONSTANT) then
+ hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,u16inttype,true);
+
+ hreg:=cg.getintregister(current_asmdata.CurrAsmList,OS_16);
+ emit_const_reg(A_MOV,S_W,1,hreg);
+ emit_reg_reg(A_SHL,S_W,NR_CL,hreg);
+
+ case right.location.loc of
+ LOC_REGISTER,
+ LOC_CREGISTER :
+ begin
+ emit_reg_reg(A_TEST,S_L,hreg,right.location.register);
+ end;
+ LOC_CREFERENCE,
+ LOC_REFERENCE :
+ begin
+ emit_reg_ref(A_TEST,S_L,hreg,right.location.reference);
+ end;
+ else
+ internalerror(2002032210);
+ end;
+ cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_CX);
+{$else i8086}
hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,u32inttype,true);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,left.location,setbase);
if (tcgsize2size[right.location.size] < 4) or
@@ -514,6 +557,7 @@ implementation
else
internalerror(2002032210);
end;
+{$endif i8086}
location.resflags:=F_C;
end;
end
@@ -521,6 +565,29 @@ implementation
begin
if right.location.loc=LOC_CONSTANT then
begin
+{$ifdef i8086}
+ location.resflags:=F_C;
+ current_asmdata.getjumplabel(l);
+ current_asmdata.getjumplabel(l2);
+
+ cg.getcpuregister(current_asmdata.CurrAsmList,NR_CX);
+ if TCGSize2Size[left.location.size] > 2 then
+ left.location.size := OS_16;
+ cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_16,left.location,NR_CX);
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,OC_BE,15,NR_CX,l);
+ { reset carry flag }
+ current_asmdata.CurrAsmList.concat(taicpu.op_none(A_CLC,S_NO));
+ cg.a_jmp_always(current_asmdata.CurrAsmList,l2);
+
+ hreg:=cg.getintregister(current_asmdata.CurrAsmList,OS_16);
+ cg.a_label(current_asmdata.CurrAsmList,l);
+ emit_const_reg(A_MOV,S_W,1,hreg);
+ emit_reg_reg(A_SHL,S_W,NR_CL,hreg);
+ cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_CX);
+ emit_const_reg(A_TEST,S_W,right.location.value,hreg);
+
+ cg.a_label(current_asmdata.CurrAsmList,l2);
+{$else i8086}
location.resflags:=F_C;
current_asmdata.getjumplabel(l);
current_asmdata.getjumplabel(l2);
@@ -568,6 +635,7 @@ implementation
end;
end;
cg.a_label(current_asmdata.CurrAsmList,l2);
+{$endif i8086}
end { of right.location.loc=LOC_CONSTANT }
{ do search in a normal set which could have >32 elementsm
but also used if the left side contains values > 32 or < 0 }
@@ -594,6 +662,72 @@ implementation
end
else
begin
+{$ifdef i8086}
+ cg.getcpuregister(current_asmdata.CurrAsmList,NR_CX);
+ if TCGSize2Size[left.location.size] > 2 then
+ left.location.size := OS_16;
+ cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_16,left.location,NR_CX);
+
+ pleftreg:=cg.getintregister(current_asmdata.CurrAsmList,OS_16);
+
+ if (right.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
+ hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,opdef,true);
+
+ if (opsize >= OS_S8) or { = if signed }
+ ((left.resultdef.typ=orddef) and
+ ((torddef(left.resultdef).low < int64(tsetdef(right.resultdef).setbase)) or
+ (torddef(left.resultdef).high > int64(tsetdef(right.resultdef).setmax)))) or
+ ((left.resultdef.typ=enumdef) and
+ ((tenumdef(left.resultdef).min < aint(tsetdef(right.resultdef).setbase)) or
+ (tenumdef(left.resultdef).max > aint(tsetdef(right.resultdef).setmax)))) then
+ begin
+
+ { we have to check if the value is < 0 or > setmax }
+
+ current_asmdata.getjumplabel(l);
+ current_asmdata.getjumplabel(l2);
+
+ { BE will be false for negative values }
+ cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,opsize,OC_BE,tsetdef(right.resultdef).setmax-tsetdef(right.resultdef).setbase,pleftreg,l);
+ { reset carry flag }
+ current_asmdata.CurrAsmList.concat(taicpu.op_none(A_CLC,S_NO));
+ cg.a_jmp_always(current_asmdata.CurrAsmList,l2);
+
+ cg.a_label(current_asmdata.CurrAsmList,l);
+
+ emit_const_reg(A_MOV,S_W,1,pleftreg);
+ emit_reg_reg(A_SHL,S_W,NR_CL,pleftreg);
+ cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_CX);
+ case right.location.loc of
+ LOC_REGISTER, LOC_CREGISTER :
+ emit_reg_reg(A_TEST,S_W,pleftreg,right.location.register);
+ LOC_CREFERENCE, LOC_REFERENCE :
+ emit_reg_ref(A_TEST,S_W,pleftreg,right.location.reference);
+ else
+ internalerror(2007020301);
+ end;
+
+ cg.a_label(current_asmdata.CurrAsmList,l2);
+
+ location.resflags:=F_C;
+
+ end
+ else
+ begin
+ emit_const_reg(A_MOV,S_W,1,pleftreg);
+ emit_reg_reg(A_SHL,S_W,NR_CL,pleftreg);
+ cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_CX);
+ case right.location.loc of
+ LOC_REGISTER, LOC_CREGISTER :
+ emit_reg_reg(A_TEST,S_W,pleftreg,right.location.register);
+ LOC_CREFERENCE, LOC_REFERENCE :
+ emit_reg_ref(A_TEST,S_W,pleftreg,right.location.reference);
+ else
+ internalerror(2007020302);
+ end;
+ location.resflags:=F_C;
+ end;
+{$else i8086}
hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,opdef,false);
register_maybe_adjust_setbase(current_asmdata.CurrAsmList,left.location,setbase);
if (right.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
@@ -649,6 +783,7 @@ implementation
end;
location.resflags:=F_C;
end;
+{$endif i8086}
end;
end;
end;
diff --git a/compiler/x86/rax86att.pas b/compiler/x86/rax86att.pas
index 059b69e36f..abc97ed45b 100644
--- a/compiler/x86/rax86att.pas
+++ b/compiler/x86/rax86att.pas
@@ -352,6 +352,9 @@ Implementation
{$ifdef i386}
if actasmpattern='GOT' then
{$endif i386}
+{$ifdef i8086}
+ if actasmpattern='GOT' then
+{$endif i8086}
begin
oper.opr.ref.refaddr:=addr_pic;
consume(AS_ID);