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authorlundinc <lundinc@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>2020-03-24 21:54:22 +0000
committerlundinc <lundinc@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>2020-03-24 21:54:22 +0000
commitf5221dff43de249079c2da081723cb7a456f981f (patch)
tree54c1428d3909aa7e3b2cf7bd2c8b67975886a60a /FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/drivers/fsl_usart.c
parentbcf16bcbc0e3cb060d0c4fc2fc3bda5a38f3d745 (diff)
downloadfreertos-f5221dff43de249079c2da081723cb7a456f981f.tar.gz
commit 9f316c246baafa15c542a5aea81a94f26e3d6507
Author: David Vrabel <david.vrabel@cambridgeconsultants.com> Date: Mon Mar 16 11:21:46 2020 +0000 Demo/Posix_GCC: add demo application for Posix port using GCC This is largely a copy of the Windows demo application with a few key changes: - heap_3 (use malloc()/free()) so tools like valgrind "just work". - printf() wrapped in a mutex to prevent deadlocks on the internal pthread mutexes inside printf(). SCons (https://scons.org/) is used as the build system. This will be built as a 64-bit application, but note that the memory allocation trace points only record the lower 32-bits of the address. commit f78f919b3e2f0d707531a301a8ca07cd02bc4778 Author: Markus Rinne <markus.ka.rinne@gmail.com> Date: Thu Mar 19 21:00:24 2020 +0200 Fix function comments commit 1cd2d38d960a3576addb224582c88489bade5141 Author: David Chalco <david@chalco.io> Date: Fri Mar 20 10:29:05 2020 -0700 unix separators for path and remove .exe suffix from risc compiler (works on windows/mac) commit 938b19419eded12817737ab0644e94ed2ba7e95d Author: Yuhui Zheng <10982575+yuhui-zheng@users.noreply.github.com> Date: Thu Mar 19 18:23:09 2020 -0700 Removing ./FreeRTOS-Labs directory, since: - IoT libraries are now in LTS branch. - FAT/POSIX/Light-weight MQTT are in https://github.com/FreeRTOS/FreeRTOS-Labs. commit 1a4abbc9e91b13fd6394464ade59d5e048320c7c Author: Yuhui Zheng <10982575+yuhui-zheng@users.noreply.github.com> Date: Tue Mar 17 19:30:02 2020 -0700 Maintenance -- clean up readme.txt and add url to GitHub. (#38) * Removing readme.txt, as now we have README.md in place. The only information missing from README.md is about FAQ. * Adding FAQ information in README.md. * Adding a .url to root to redict user to FreeRTOS github home page. commit 47bb466aa19395b7785bcb830e2e4dd35f6bafc5 Author: Yuhui Zheng <10982575+yuhui-zheng@users.noreply.github.com> Date: Tue Mar 17 13:07:44 2020 -0700 Update issue templates Template maintenance. - adding title prefix. - adding examples to "additional context" section. commit f506290041f56867765f8efa70ed2862125bdb7c Author: Yuhui Zheng <10982575+yuhui-zheng@users.noreply.github.com> Date: Tue Mar 17 10:15:07 2020 -0700 Create SECURITY.md Apply the recommended SECURITY.md from AWS to our repo. commit 8982a2f80a80a2a0a47cf82de07b52101bd9d606 Author: Yuhui Zheng <10982575+yuhui-zheng@users.noreply.github.com> Date: Fri Mar 13 12:50:10 2020 -0700 Add ./lib directory to make sure Zynq project compiles. commit ecf0f12aa14ad6fdafe1ef37257cbb4e03e2abd5 Author: AniruddhaKanhere <60444055+AniruddhaKanhere@users.noreply.github.com> Date: Wed Mar 11 10:19:48 2020 -0700 Sync up with Amazon-freertos repo (10th March 2020) (#34) * Sync up with amazon-freertos * Sync up with amazon-freertos * Sync up with amazon-freertos commit 0acffef047973e2e61c2201fd69cd9bbd317f674 Author: Yuhui Zheng <10982575+yuhui-zheng@users.noreply.github.com> Date: Tue Mar 10 10:20:48 2020 -0700 GitHub PR template. (#29) commit c40a6da2e4cb8042b56d1b174051cbbe9813781a Author: AniruddhaKanhere <60444055+AniruddhaKanhere@users.noreply.github.com> Date: Mon Mar 9 11:18:48 2020 -0700 pass payload length when calling UDP callback (#30) * pass payload length when calling UDP callback commit 12d580e93d4d9074b9a867632f0681a511b4ad12 Author: Yuhui Zheng <10982575+yuhui-zheng@users.noreply.github.com> Date: Fri Mar 6 18:16:51 2020 -0800 Update issue templates Initial issue template. Created following https://help.github.com/en/github/building-a-strong-community/configuring-issue-templates-for-your-repository#configuring-the-template-chooser. If change is needed, we could go another round. commit 9debffb5e0e42ff716f58b2270b3af09652294af Author: Yuhui Zheng <10982575+yuhui-zheng@users.noreply.github.com> Date: Fri Mar 6 17:27:46 2020 -0800 Update README.md to remove dead link. See the conversation https://github.com/FreeRTOS/FreeRTOS/commit/42c627b2b88cb3b487fea983d8b566a8bbae54fa#comments . Linkage for both ```./FreeRTOS/Source``` and ```./FreeRTOS/Demo``` are removed, since it looks weird to only provide linkage to Demo. commit 7e1a4bf563240501fc45167aee9d929c533939dd Author: AniruddhaKanhere <60444055+AniruddhaKanhere@users.noreply.github.com> Date: Fri Mar 6 15:18:09 2020 -0800 Fix DHCP option Client-identifier (#28) commit 42c627b2b88cb3b487fea983d8b566a8bbae54fa Author: Yuhui.Zheng <10982575+yuhui-zheng@users.noreply.github.com> Date: Fri Mar 6 09:15:11 2020 -0800 Update readme and revert relative URL. (#27) * Reordering: bumping cloning instruction up. * Rewording readme.md to be clear kernel code is a submodule of this repository. * Reverting relative URL, since user cannot click through on GitHub page. (With URL, user could still download the correct version of the code. Reverting simply due to UI issue.) commit 5751ae9b60e248ebd0b4dd7c58df54364d2bb9d5 Author: Gaurav-Aggarwal-AWS <33462878+aggarg@users.noreply.github.com> Date: Fri Mar 6 09:11:42 2020 -0800 Update CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso project (#26) This commit updates the project for LPC55S69 so that it works with the latest version of MCUXpresso and SDK. Signed-off-by: Gaurav Aggarwal <aggarg@amazon.com> commit a9ffffe1f01f45f79e127c15727784984077932f Author: Carl Lundin <53273776+lundinc2@users.noreply.github.com> Date: Thu Mar 5 17:16:13 2020 -0800 Using Relative URL For Submoduling. (#24) commit 52c82076b38fe73d1dc46c97abf74ae9b803696c Author: Carl Lundin <53273776+lundinc2@users.noreply.github.com> Date: Thu Mar 5 09:16:31 2020 -0800 use relative path to point to bundled toolchain instead (#25) commit b877e4ec478de2c24d07ab46241070d7c66f375c Author: lundinc2 <53273776+lundinc2@users.noreply.github.com> Date: Tue Feb 25 13:18:38 2020 -0800 Moved vulnerability reporting and code of conduct to top of CONTRIBUTING.md (#20) commit bef165d46799fb8faa58aaa224f80c16b6538e69 Author: Yuhui.Zheng <10982575+yuhui-zheng@users.noreply.github.com> Date: Tue Feb 18 22:06:38 2020 -0800 Linking test source file from relative path. (#19) commit 89e7bbe292afd3912d1f0b2402cc506878bad869 Author: Yuhui.Zheng <10982575+yuhui-zheng@users.noreply.github.com> Date: Tue Feb 18 17:47:55 2020 -0800 A preliminary .gitignore file, to prevent us checking in files unnecessary. (#18) https://github.com/github/gitignore. commit c2a98127acb48c4562233230e66ca5c282688579 Author: RichardBarry <3073890+RichardBarry@users.noreply.github.com> Date: Sun Feb 16 13:19:53 2020 -0800 Minor wording changes in the 'previous releases' section of the readme.me file. (#17) commit 24c772d1439e5c291c0a29fce0a46996ca8afaa9 Author: Yuhui.Zheng <10982575+yuhui-zheng@users.noreply.github.com> Date: Fri Feb 14 12:47:01 2020 -0800 Submodule kernel directory. (#16) * Removing FreeRTOS/Source in readiness for submoduling. * Submoduling kernel. * README.md update due to submoduling. When releasing, please follow these steps: 1. in local directory, clean directory and check "git status" shows "nothing to commit, working tree clean" for ALL subdirectories. 2. copy source code and instructions only to an empty folder. Git related should not be in this folder -- this covers .git, .gitignore, .github, .gitmodules, gitmessages, ...... 3. zip the folder from step 2. (create both .zip and .7z) 4. attach .zip and .7z to the release. (e.g. attach these two in new release -- https://github.com/FreeRTOS/FreeRTOS/releases/new) 5. PLEASE download both, unzip, diff with your local git repo. (should not see any difference other than git related.) And, sanity check a couple of projects. commit c3f8b91652392dc55e0d7067b90a40de5f5f0837 Author: Rashed Talukder <9218468+rashedtalukder@users.noreply.github.com> Date: Thu Feb 13 17:47:14 2020 -0800 Update readme. Fixed typos and cli commands (#14) commit 4723b825f2989213c1cdb2ebf4d6793e0292e363 Author: Julian Poidevin <julian-poidevin@users.noreply.github.com> Date: Fri Feb 14 02:43:36 2020 +0100 Fixed wrong git clone SSH command (#13) Replaced bad https URL with proper SSH URL commit fc819b821715c42602819e58499846147a6394f5 Author: RichardBarry <3073890+RichardBarry@users.noreply.github.com> Date: Thu Feb 13 17:42:22 2020 -0800 Correct the xTimerCreate() documentation which said NULL was returned if the timer period was passed into the function as 0, whereas that is not the case. (#15) Add a note to the documentation for both the xTimerCreate() and xTimerCreateStatic() functions that the timer period must be greater than 0. commit 1c711ab530b5f0dbd811d7d62e0a3763706ffff4 Author: Rashed Talukder <9218468+rashedtalukder@users.noreply.github.com> Date: Wed Feb 12 23:00:18 2020 -0800 Updated contributions guidelines (#12) commit 84fcc0d5317d96c6b086034093c8c1c83e050819 Author: Cobus van Eeden <35851496+cobusve@users.noreply.github.com> Date: Wed Feb 12 15:05:06 2020 -0800 Updates to Markdown files and readme.txt (#11) commit 4b53196b71e02708ef1010a639d90236fbbd4032 Author: Cobus van Eeden <35851496+cobusve@users.noreply.github.com> Date: Tue Feb 11 18:23:08 2020 -0800 Adding Contributions.md (#8) git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2825 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
Diffstat (limited to 'FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/drivers/fsl_usart.c')
-rw-r--r--FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/drivers/fsl_usart.c373
1 files changed, 218 insertions, 155 deletions
diff --git a/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/drivers/fsl_usart.c b/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/drivers/fsl_usart.c
index c52abed43..dd35da6b4 100644
--- a/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/drivers/fsl_usart.c
+++ b/FreeRTOS/Demo/CORTEX_MPU_M33F_NXP_LPC55S69_MCUXpresso/NXP_Code/drivers/fsl_usart.c
@@ -1,6 +1,6 @@
/*
* Copyright (c) 2016, Freescale Semiconductor, Inc.
- * Copyright 2016-2018 NXP
+ * Copyright 2016-2019 NXP
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
@@ -10,12 +10,25 @@
#include "fsl_device_registers.h"
#include "fsl_flexcomm.h"
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
/* Component ID definition, used by tools. */
#ifndef FSL_COMPONENT_ID
#define FSL_COMPONENT_ID "platform.drivers.flexcomm_usart"
#endif
-enum _usart_transfer_states
+/*!
+ * @brief Used for conversion from `flexcomm_usart_irq_handler_t` to `flexcomm_irq_handler_t`
+ */
+typedef union usart_to_flexcomm
+{
+ flexcomm_usart_irq_handler_t usart_master_handler;
+ flexcomm_irq_handler_t flexcomm_handler;
+} usart_to_flexcomm_t;
+
+enum
{
kUSART_TxIdle, /* TX idle. */
kUSART_TxBusy, /* TX busy. */
@@ -41,18 +54,18 @@ static const uint32_t s_usartBaseAddrs[FSL_FEATURE_SOC_USART_COUNT] = USART_BASE
/*! brief Returns instance number for USART peripheral base address. */
uint32_t USART_GetInstance(USART_Type *base)
{
- int i;
+ uint32_t i;
- for (i = 0; i < FSL_FEATURE_SOC_USART_COUNT; i++)
+ for (i = 0; i < (uint32_t)FSL_FEATURE_SOC_USART_COUNT; i++)
{
if ((uint32_t)base == s_usartBaseAddrs[i])
{
- return i;
+ break;
}
}
- assert(false);
- return 0;
+ assert(i < FSL_FEATURE_SOC_USART_COUNT);
+ return i;
}
/*!
@@ -67,14 +80,16 @@ size_t USART_TransferGetRxRingBufferLength(usart_handle_t *handle)
/* Check arguments */
assert(NULL != handle);
+ uint16_t rxRingBufferHead = handle->rxRingBufferHead;
+ uint16_t rxRingBufferTail = handle->rxRingBufferTail;
- if (handle->rxRingBufferTail > handle->rxRingBufferHead)
+ if (rxRingBufferTail > rxRingBufferHead)
{
- size = (size_t)(handle->rxRingBufferHead + handle->rxRingBufferSize - handle->rxRingBufferTail);
+ size = (size_t)rxRingBufferHead + handle->rxRingBufferSize - (size_t)rxRingBufferTail;
}
else
{
- size = (size_t)(handle->rxRingBufferHead - handle->rxRingBufferTail);
+ size = (size_t)rxRingBufferHead - (size_t)rxRingBufferTail;
}
return size;
}
@@ -122,7 +137,7 @@ void USART_TransferStartRingBuffer(USART_Type *base, usart_handle_t *handle, uin
assert(NULL != ringBuffer);
/* Setup the ringbuffer address */
- handle->rxRingBuffer = ringBuffer;
+ handle->rxRingBuffer = ringBuffer;
handle->rxRingBufferSize = ringBufferSize;
handle->rxRingBufferHead = 0U;
handle->rxRingBufferTail = 0U;
@@ -144,11 +159,11 @@ void USART_TransferStopRingBuffer(USART_Type *base, usart_handle_t *handle)
assert(NULL != base);
assert(NULL != handle);
- if (handle->rxState == kUSART_RxIdle)
+ if (handle->rxState == (uint8_t)kUSART_RxIdle)
{
base->FIFOINTENCLR = USART_FIFOINTENCLR_RXLVL_MASK | USART_FIFOINTENCLR_RXERR_MASK;
}
- handle->rxRingBuffer = NULL;
+ handle->rxRingBuffer = NULL;
handle->rxRingBufferSize = 0U;
handle->rxRingBufferHead = 0U;
handle->rxRingBufferTail = 0U;
@@ -180,8 +195,8 @@ status_t USART_Init(USART_Type *base, const usart_config_t *config, uint32_t src
int result;
/* check arguments */
- assert(!((NULL == base) || (NULL == config) || (0 == srcClock_Hz)));
- if ((NULL == base) || (NULL == config) || (0 == srcClock_Hz))
+ assert(!((NULL == base) || (NULL == config) || (0U == srcClock_Hz)));
+ if ((NULL == base) || (NULL == config) || (0U == srcClock_Hz))
{
return kStatus_InvalidArgument;
}
@@ -193,13 +208,6 @@ status_t USART_Init(USART_Type *base, const usart_config_t *config, uint32_t src
return result;
}
- /* setup baudrate */
- result = USART_SetBaudRate(base, config->baudRate_Bps, srcClock_Hz);
- if (kStatus_Success != result)
- {
- return result;
- }
-
if (config->enableTx)
{
/* empty and enable txFIFO */
@@ -223,7 +231,19 @@ status_t USART_Init(USART_Type *base, const usart_config_t *config, uint32_t src
}
/* setup configuration and enable USART */
base->CFG = USART_CFG_PARITYSEL(config->parityMode) | USART_CFG_STOPLEN(config->stopBitCount) |
- USART_CFG_DATALEN(config->bitCountPerChar) | USART_CFG_LOOP(config->loopback) | USART_CFG_ENABLE_MASK;
+ USART_CFG_DATALEN(config->bitCountPerChar) | USART_CFG_LOOP(config->loopback) |
+ USART_CFG_SYNCEN((uint32_t)config->syncMode >> 1) | USART_CFG_SYNCMST((uint8_t)config->syncMode) |
+ USART_CFG_CLKPOL(config->clockPolarity) | USART_CFG_ENABLE_MASK;
+
+ /* Setup baudrate */
+ result = USART_SetBaudRate(base, config->baudRate_Bps, srcClock_Hz);
+ if (kStatus_Success != result)
+ {
+ return result;
+ }
+ /* Setting continuous Clock configuration. used for synchronous mode. */
+ USART_EnableContinuousSCLK(base, config->enableContinuousSCLK);
+
return kStatus_Success;
}
@@ -238,7 +258,7 @@ void USART_Deinit(USART_Type *base)
{
/* Check arguments */
assert(NULL != base);
- while (!(base->STAT & USART_STAT_TXIDLE_MASK))
+ while (0U == (base->STAT & USART_STAT_TXIDLE_MASK))
{
}
/* Disable interrupts, disable dma requests, disable peripheral */
@@ -269,18 +289,21 @@ void USART_GetDefaultConfig(usart_config_t *config)
assert(NULL != config);
/* Initializes the configure structure to zero. */
- memset(config, 0, sizeof(*config));
+ (void)memset(config, 0, sizeof(*config));
/* Set always all members ! */
- config->baudRate_Bps = 115200U;
- config->parityMode = kUSART_ParityDisabled;
- config->stopBitCount = kUSART_OneStopBit;
- config->bitCountPerChar = kUSART_8BitsPerChar;
- config->loopback = false;
- config->enableRx = false;
- config->enableTx = false;
- config->txWatermark = kUSART_TxFifo0;
- config->rxWatermark = kUSART_RxFifo1;
+ config->baudRate_Bps = 115200U;
+ config->parityMode = kUSART_ParityDisabled;
+ config->stopBitCount = kUSART_OneStopBit;
+ config->bitCountPerChar = kUSART_8BitsPerChar;
+ config->loopback = false;
+ config->enableRx = false;
+ config->enableTx = false;
+ config->txWatermark = kUSART_TxFifo0;
+ config->rxWatermark = kUSART_RxFifo1;
+ config->syncMode = kUSART_SyncModeDisabled;
+ config->enableContinuousSCLK = false;
+ config->clockPolarity = kUSART_RxSampleOnFallingEdge;
}
/*!
@@ -294,7 +317,7 @@ void USART_GetDefaultConfig(usart_config_t *config)
*
* param base USART peripheral base address.
* param baudrate_Bps USART baudrate to be set.
- * param srcClock_Hz USART clock source freqency in HZ.
+ * param srcClock_Hz USART clock source frequency in HZ.
* retval kStatus_USART_BaudrateNotSupport Baudrate is not support in current clock source.
* retval kStatus_Success Set baudrate succeed.
* retval kStatus_InvalidArgument One or more arguments are invalid.
@@ -306,40 +329,53 @@ status_t USART_SetBaudRate(USART_Type *base, uint32_t baudrate_Bps, uint32_t src
/* check arguments */
assert(!((NULL == base) || (0 == baudrate_Bps) || (0 == srcClock_Hz)));
- if ((NULL == base) || (0 == baudrate_Bps) || (0 == srcClock_Hz))
+ if ((NULL == base) || (0U == baudrate_Bps) || (0U == srcClock_Hz))
{
return kStatus_InvalidArgument;
}
- /*
- * Smaller values of OSR can make the sampling position within a data bit less accurate and may
- * potentially cause more noise errors or incorrect data.
- */
- for (osrval = best_osrval; osrval >= 8; osrval--)
+ /* If synchronous master mode is enabled, only configure the BRG value. */
+ if ((base->CFG & USART_CFG_SYNCEN_MASK) != 0U)
{
- brgval = (srcClock_Hz / ((osrval + 1) * baudrate_Bps)) - 1;
- if (brgval > 0xFFFF)
+ if ((base->CFG & USART_CFG_SYNCMST_MASK) != 0U)
{
- continue;
+ brgval = srcClock_Hz / baudrate_Bps;
+ base->BRG = brgval - 1U;
}
- baudrate = srcClock_Hz / ((osrval + 1) * (brgval + 1));
- diff = baudrate_Bps < baudrate ? baudrate - baudrate_Bps : baudrate_Bps - baudrate;
- if (diff < best_diff)
+ }
+ else
+ {
+ /*
+ * Smaller values of OSR can make the sampling position within a data bit less accurate and may
+ * potentially cause more noise errors or incorrect data.
+ */
+ for (osrval = best_osrval; osrval >= 8U; osrval--)
{
- best_diff = diff;
- best_osrval = osrval;
- best_brgval = brgval;
+ brgval = (((srcClock_Hz * 10U) / ((osrval + 1U) * baudrate_Bps)) - 5U) / 10U;
+ if (brgval > 0xFFFFU)
+ {
+ continue;
+ }
+ baudrate = srcClock_Hz / ((osrval + 1U) * (brgval + 1U));
+ diff = baudrate_Bps < baudrate ? baudrate - baudrate_Bps : baudrate_Bps - baudrate;
+ if (diff < best_diff)
+ {
+ best_diff = diff;
+ best_osrval = osrval;
+ best_brgval = brgval;
+ }
}
- }
- /* value over range */
- if (best_brgval > 0xFFFF)
- {
- return kStatus_USART_BaudrateNotSupport;
+ /* value over range */
+ if (best_brgval > 0xFFFFU)
+ {
+ return kStatus_USART_BaudrateNotSupport;
+ }
+
+ base->OSR = best_osrval;
+ base->BRG = best_brgval;
}
- base->OSR = best_osrval;
- base->BRG = best_brgval;
return kStatus_Success;
}
@@ -362,21 +398,21 @@ void USART_WriteBlocking(USART_Type *base, const uint8_t *data, size_t length)
return;
}
/* Check whether txFIFO is enabled */
- if (!(base->FIFOCFG & USART_FIFOCFG_ENABLETX_MASK))
+ if (0U == (base->FIFOCFG & USART_FIFOCFG_ENABLETX_MASK))
{
return;
}
- for (; length > 0; length--)
+ for (; length > 0U; length--)
{
/* Loop until txFIFO get some space for new data */
- while (!(base->FIFOSTAT & USART_FIFOSTAT_TXNOTFULL_MASK))
+ while (0U == (base->FIFOSTAT & USART_FIFOSTAT_TXNOTFULL_MASK))
{
}
base->FIFOWR = *data;
data++;
}
/* Wait to finish transfer */
- while (!(base->STAT & USART_STAT_TXIDLE_MASK))
+ while (0U == (base->STAT & USART_STAT_TXIDLE_MASK))
{
}
}
@@ -398,7 +434,8 @@ void USART_WriteBlocking(USART_Type *base, const uint8_t *data, size_t length)
*/
status_t USART_ReadBlocking(USART_Type *base, uint8_t *data, size_t length)
{
- uint32_t status;
+ uint32_t statusFlag;
+ status_t status = kStatus_Success;
/* check arguments */
assert(!((NULL == base) || (NULL == data)));
@@ -408,45 +445,52 @@ status_t USART_ReadBlocking(USART_Type *base, uint8_t *data, size_t length)
}
/* Check whether rxFIFO is enabled */
- if (!(base->FIFOCFG & USART_FIFOCFG_ENABLERX_MASK))
+ if ((base->FIFOCFG & USART_FIFOCFG_ENABLERX_MASK) == 0U)
{
return kStatus_Fail;
}
- for (; length > 0; length--)
+ for (; length > 0U; length--)
{
/* loop until rxFIFO have some data to read */
- while (!(base->FIFOSTAT & USART_FIFOSTAT_RXNOTEMPTY_MASK))
+ while ((base->FIFOSTAT & USART_FIFOSTAT_RXNOTEMPTY_MASK) == 0U)
{
}
- /* check receive status */
- status = base->STAT;
- if (status & USART_STAT_FRAMERRINT_MASK)
+ /* check rxFIFO statusFlag */
+ if ((base->FIFOSTAT & USART_FIFOSTAT_RXERR_MASK) != 0U)
{
- base->STAT |= USART_STAT_FRAMERRINT_MASK;
- return kStatus_USART_FramingError;
+ base->FIFOCFG |= USART_FIFOCFG_EMPTYRX_MASK;
+ base->FIFOSTAT |= USART_FIFOSTAT_RXERR_MASK;
+ status = kStatus_USART_RxError;
+ break;
}
- if (status & USART_STAT_PARITYERRINT_MASK)
+ /* check receive statusFlag */
+ statusFlag = base->STAT;
+ /* Clear all status flags */
+ base->STAT |= statusFlag;
+ if ((statusFlag & USART_STAT_PARITYERRINT_MASK) != 0U)
{
- base->STAT |= USART_STAT_PARITYERRINT_MASK;
- return kStatus_USART_ParityError;
+ status = kStatus_USART_ParityError;
}
- if (status & USART_STAT_RXNOISEINT_MASK)
+ if ((statusFlag & USART_STAT_FRAMERRINT_MASK) != 0U)
{
- base->STAT |= USART_STAT_RXNOISEINT_MASK;
- return kStatus_USART_NoiseError;
+ status = kStatus_USART_FramingError;
}
- /* check rxFIFO status */
- if (base->FIFOSTAT & USART_FIFOSTAT_RXERR_MASK)
+ if ((statusFlag & USART_STAT_RXNOISEINT_MASK) != 0U)
{
- base->FIFOCFG |= USART_FIFOCFG_EMPTYRX_MASK;
- base->FIFOSTAT |= USART_FIFOSTAT_RXERR_MASK;
- return kStatus_USART_RxError;
+ status = kStatus_USART_NoiseError;
}
- *data = base->FIFORD;
- data++;
+ if (kStatus_Success == status)
+ {
+ *data = (uint8_t)base->FIFORD;
+ data++;
+ }
+ else
+ {
+ break;
+ }
}
- return kStatus_Success;
+ return status;
}
/*!
@@ -466,10 +510,13 @@ status_t USART_TransferCreateHandle(USART_Type *base,
usart_transfer_callback_t callback,
void *userData)
{
- int32_t instance = 0;
-
/* Check 'base' */
assert(!((NULL == base) || (NULL == handle)));
+
+ uint32_t instance = 0;
+ usart_to_flexcomm_t handler;
+ handler.usart_master_handler = USART_TransferHandleIRQ;
+
if ((NULL == base) || (NULL == handle))
{
return kStatus_InvalidArgument;
@@ -477,20 +524,20 @@ status_t USART_TransferCreateHandle(USART_Type *base,
instance = USART_GetInstance(base);
- memset(handle, 0, sizeof(*handle));
+ (void)memset(handle, 0, sizeof(*handle));
/* Set the TX/RX state. */
- handle->rxState = kUSART_RxIdle;
- handle->txState = kUSART_TxIdle;
+ handle->rxState = (uint8_t)kUSART_RxIdle;
+ handle->txState = (uint8_t)kUSART_TxIdle;
/* Set the callback and user data. */
- handle->callback = callback;
- handle->userData = userData;
- handle->rxWatermark = (usart_rxfifo_watermark_t)USART_FIFOTRIG_RXLVL_GET(base);
- handle->txWatermark = (usart_txfifo_watermark_t)USART_FIFOTRIG_TXLVL_GET(base);
+ handle->callback = callback;
+ handle->userData = userData;
+ handle->rxWatermark = (uint8_t)USART_FIFOTRIG_RXLVL_GET(base);
+ handle->txWatermark = (uint8_t)USART_FIFOTRIG_TXLVL_GET(base);
- FLEXCOMM_SetIRQHandler(base, (flexcomm_irq_handler_t)USART_TransferHandleIRQ, handle);
+ FLEXCOMM_SetIRQHandler(base, handler.flexcomm_handler, handle);
/* Enable interrupt in NVIC. */
- EnableIRQ(s_usartIRQ[instance]);
+ (void)EnableIRQ(s_usartIRQ[instance]);
return kStatus_Success;
}
@@ -524,22 +571,22 @@ status_t USART_TransferSendNonBlocking(USART_Type *base, usart_handle_t *handle,
}
/* Check xfer members */
assert(!((0 == xfer->dataSize) || (NULL == xfer->data)));
- if ((0 == xfer->dataSize) || (NULL == xfer->data))
+ if ((0U == xfer->dataSize) || (NULL == xfer->data))
{
return kStatus_InvalidArgument;
}
/* Return error if current TX busy. */
- if (kUSART_TxBusy == handle->txState)
+ if ((uint8_t)kUSART_TxBusy == handle->txState)
{
return kStatus_USART_TxBusy;
}
else
{
- handle->txData = xfer->data;
- handle->txDataSize = xfer->dataSize;
+ handle->txData = xfer->data;
+ handle->txDataSize = xfer->dataSize;
handle->txDataSizeAll = xfer->dataSize;
- handle->txState = kUSART_TxBusy;
+ handle->txState = (uint8_t)kUSART_TxBusy;
/* Enable transmiter interrupt. */
base->FIFOINTENSET |= USART_FIFOINTENSET_TXLVL_MASK;
}
@@ -560,12 +607,12 @@ void USART_TransferAbortSend(USART_Type *base, usart_handle_t *handle)
assert(NULL != handle);
/* Disable interrupts */
- USART_DisableInterrupts(base, kUSART_TxLevelInterruptEnable);
+ USART_DisableInterrupts(base, (uint32_t)kUSART_TxLevelInterruptEnable);
/* Empty txFIFO */
base->FIFOCFG |= USART_FIFOCFG_EMPTYTX_MASK;
- handle->txDataSize = 0;
- handle->txState = kUSART_TxIdle;
+ handle->txDataSize = 0U;
+ handle->txState = (uint8_t)kUSART_TxIdle;
}
/*!
@@ -586,7 +633,7 @@ status_t USART_TransferGetSendCount(USART_Type *base, usart_handle_t *handle, ui
assert(NULL != handle);
assert(NULL != count);
- if (kUSART_TxIdle == handle->txState)
+ if ((uint8_t)kUSART_TxIdle == handle->txState)
{
return kStatus_NoTransferInProgress;
}
@@ -644,7 +691,7 @@ status_t USART_TransferReceiveNonBlocking(USART_Type *base,
}
/* Check xfer members */
assert(!((0 == xfer->dataSize) || (NULL == xfer->data)));
- if ((0 == xfer->dataSize) || (NULL == xfer->data))
+ if ((0U == xfer->dataSize) || (NULL == xfer->data))
{
return kStatus_InvalidArgument;
}
@@ -658,22 +705,22 @@ status_t USART_TransferReceiveNonBlocking(USART_Type *base,
If there are not enough data in ring buffer, copy all of them to xfer->data,
save the xfer->data remained empty space to uart handle, receive data
to this empty space and trigger callback when finished. */
- if (kUSART_RxBusy == handle->rxState)
+ if ((uint8_t)kUSART_RxBusy == handle->rxState)
{
return kStatus_USART_RxBusy;
}
else
{
- bytesToReceive = xfer->dataSize;
+ bytesToReceive = xfer->dataSize;
bytesCurrentReceived = 0U;
/* If RX ring buffer is used. */
- if (handle->rxRingBuffer)
+ if (handle->rxRingBuffer != NULL)
{
/* Disable IRQ, protect ring buffer. */
regPrimask = DisableGlobalIRQ();
/* How many bytes in RX ring buffer currently. */
bytesToCopy = USART_TransferGetRxRingBufferLength(handle);
- if (bytesToCopy)
+ if (bytesToCopy != 0U)
{
bytesToCopy = MIN(bytesToReceive, bytesToCopy);
bytesToReceive -= bytesToCopy;
@@ -682,7 +729,7 @@ status_t USART_TransferReceiveNonBlocking(USART_Type *base,
{
xfer->data[bytesCurrentReceived++] = handle->rxRingBuffer[handle->rxRingBufferTail];
/* Wrap to 0. Not use modulo (%) because it might be large and slow. */
- if (handle->rxRingBufferTail + 1U == handle->rxRingBufferSize)
+ if ((size_t)handle->rxRingBufferTail + 1U == handle->rxRingBufferSize)
{
handle->rxRingBufferTail = 0U;
}
@@ -693,20 +740,20 @@ status_t USART_TransferReceiveNonBlocking(USART_Type *base,
}
}
/* If ring buffer does not have enough data, still need to read more data. */
- if (bytesToReceive)
+ if (bytesToReceive != 0U)
{
/* No data in ring buffer, save the request to UART handle. */
- handle->rxData = xfer->data + bytesCurrentReceived;
- handle->rxDataSize = bytesToReceive;
+ handle->rxData = xfer->data + bytesCurrentReceived;
+ handle->rxDataSize = bytesToReceive;
handle->rxDataSizeAll = bytesToReceive;
- handle->rxState = kUSART_RxBusy;
+ handle->rxState = (uint8_t)kUSART_RxBusy;
}
/* Enable IRQ if previously enabled. */
EnableGlobalIRQ(regPrimask);
/* Call user callback since all data are received. */
- if (0 == bytesToReceive)
+ if (0U == bytesToReceive)
{
- if (handle->callback)
+ if (handle->callback != NULL)
{
handle->callback(base, handle, kStatus_USART_RxIdle, handle->userData);
}
@@ -715,16 +762,16 @@ status_t USART_TransferReceiveNonBlocking(USART_Type *base,
/* Ring buffer not used. */
else
{
- handle->rxData = xfer->data + bytesCurrentReceived;
- handle->rxDataSize = bytesToReceive;
+ handle->rxData = xfer->data + bytesCurrentReceived;
+ handle->rxDataSize = bytesToReceive;
handle->rxDataSizeAll = bytesToReceive;
- handle->rxState = kUSART_RxBusy;
+ handle->rxState = (uint8_t)kUSART_RxBusy;
/* Enable RX interrupt. */
base->FIFOINTENSET |= USART_FIFOINTENSET_RXLVL_MASK;
}
/* Return the how many bytes have read. */
- if (receivedBytes)
+ if (receivedBytes != NULL)
{
*receivedBytes = bytesCurrentReceived;
}
@@ -746,16 +793,16 @@ void USART_TransferAbortReceive(USART_Type *base, usart_handle_t *handle)
assert(NULL != handle);
/* Only abort the receive to handle->rxData, the RX ring buffer is still working. */
- if (!handle->rxRingBuffer)
+ if (NULL == handle->rxRingBuffer)
{
/* Disable interrupts */
- USART_DisableInterrupts(base, kUSART_RxLevelInterruptEnable);
+ USART_DisableInterrupts(base, (uint32_t)kUSART_RxLevelInterruptEnable);
/* Empty rxFIFO */
base->FIFOCFG |= USART_FIFOCFG_EMPTYRX_MASK;
}
handle->rxDataSize = 0U;
- handle->rxState = kUSART_RxIdle;
+ handle->rxState = (uint8_t)kUSART_RxIdle;
}
/*!
@@ -775,7 +822,7 @@ status_t USART_TransferGetReceiveCount(USART_Type *base, usart_handle_t *handle,
assert(NULL != handle);
assert(NULL != count);
- if (kUSART_RxIdle == handle->rxState)
+ if ((uint8_t)kUSART_RxIdle == handle->rxState)
{
return kStatus_NoTransferInProgress;
}
@@ -798,43 +845,46 @@ void USART_TransferHandleIRQ(USART_Type *base, usart_handle_t *handle)
/* Check arguments */
assert((NULL != base) && (NULL != handle));
- bool receiveEnabled = (handle->rxDataSize) || (handle->rxRingBuffer);
- bool sendEnabled = handle->txDataSize;
+ bool receiveEnabled = ((handle->rxDataSize != 0U) || (handle->rxRingBuffer != NULL));
+ bool sendEnabled = (handle->txDataSize != 0U);
+ uint8_t rxdata;
+ size_t tmpsize;
/* If RX overrun. */
- if (base->FIFOSTAT & USART_FIFOSTAT_RXERR_MASK)
+ if ((base->FIFOSTAT & USART_FIFOSTAT_RXERR_MASK) != 0U)
{
/* Clear rx error state. */
base->FIFOSTAT |= USART_FIFOSTAT_RXERR_MASK;
/* clear rxFIFO */
base->FIFOCFG |= USART_FIFOCFG_EMPTYRX_MASK;
/* Trigger callback. */
- if (handle->callback)
+ if (handle->callback != NULL)
{
handle->callback(base, handle, kStatus_USART_RxError, handle->userData);
}
}
- while ((receiveEnabled && (base->FIFOSTAT & USART_FIFOSTAT_RXNOTEMPTY_MASK)) ||
- (sendEnabled && (base->FIFOSTAT & USART_FIFOSTAT_TXNOTFULL_MASK)))
+ while ((receiveEnabled && ((base->FIFOSTAT & USART_FIFOSTAT_RXNOTEMPTY_MASK) != 0U)) ||
+ (sendEnabled && ((base->FIFOSTAT & USART_FIFOSTAT_TXNOTFULL_MASK) != 0U)))
{
/* Receive data */
- if (receiveEnabled && (base->FIFOSTAT & USART_FIFOSTAT_RXNOTEMPTY_MASK))
+ if (receiveEnabled && ((base->FIFOSTAT & USART_FIFOSTAT_RXNOTEMPTY_MASK) != 0U))
{
/* Receive to app bufffer if app buffer is present */
- if (handle->rxDataSize)
+ if (handle->rxDataSize != 0U)
{
- *handle->rxData = base->FIFORD;
+ rxdata = (uint8_t)base->FIFORD;
+ *handle->rxData = rxdata;
handle->rxDataSize--;
handle->rxData++;
- receiveEnabled = ((handle->rxDataSize != 0) || (handle->rxRingBuffer));
- if (!handle->rxDataSize)
+ receiveEnabled = ((handle->rxDataSize != 0U) || (handle->rxRingBuffer != NULL));
+ if (0U == handle->rxDataSize)
{
- if (!handle->rxRingBuffer)
+ if (NULL == handle->rxRingBuffer)
{
base->FIFOINTENCLR = USART_FIFOINTENCLR_RXLVL_MASK | USART_FIFOINTENSET_RXERR_MASK;
}
- handle->rxState = kUSART_RxIdle;
- if (handle->callback)
+ handle->rxState = (uint8_t)kUSART_RxIdle;
+ if (handle->callback != NULL)
{
handle->callback(base, handle, kStatus_USART_RxIdle, handle->userData);
}
@@ -843,21 +893,21 @@ void USART_TransferHandleIRQ(USART_Type *base, usart_handle_t *handle)
/* Otherwise receive to ring buffer if ring buffer is present */
else
{
- if (handle->rxRingBuffer)
+ if (handle->rxRingBuffer != NULL)
{
/* If RX ring buffer is full, trigger callback to notify over run. */
if (USART_TransferIsRxRingBufferFull(handle))
{
- if (handle->callback)
+ if (handle->callback != NULL)
{
handle->callback(base, handle, kStatus_USART_RxRingBufferOverrun, handle->userData);
}
}
- /* If ring buffer is still full after callback function, the oldest data is overrided. */
+ /* If ring buffer is still full after callback function, the oldest data is overridden. */
if (USART_TransferIsRxRingBufferFull(handle))
{
/* Increase handle->rxRingBufferTail to make room for new data. */
- if (handle->rxRingBufferTail + 1U == handle->rxRingBufferSize)
+ if ((size_t)handle->rxRingBufferTail + 1U == handle->rxRingBufferSize)
{
handle->rxRingBufferTail = 0U;
}
@@ -867,9 +917,10 @@ void USART_TransferHandleIRQ(USART_Type *base, usart_handle_t *handle)
}
}
/* Read data. */
- handle->rxRingBuffer[handle->rxRingBufferHead] = base->FIFORD;
+ rxdata = (uint8_t)base->FIFORD;
+ handle->rxRingBuffer[handle->rxRingBufferHead] = rxdata;
/* Increase handle->rxRingBufferHead. */
- if (handle->rxRingBufferHead + 1U == handle->rxRingBufferSize)
+ if ((size_t)handle->rxRingBufferHead + 1U == handle->rxRingBufferSize)
{
handle->rxRingBufferHead = 0U;
}
@@ -881,38 +932,50 @@ void USART_TransferHandleIRQ(USART_Type *base, usart_handle_t *handle)
}
}
/* Send data */
- if (sendEnabled && (base->FIFOSTAT & USART_FIFOSTAT_TXNOTFULL_MASK))
+ if (sendEnabled && ((base->FIFOSTAT & USART_FIFOSTAT_TXNOTFULL_MASK) != 0U))
{
base->FIFOWR = *handle->txData;
handle->txDataSize--;
handle->txData++;
- sendEnabled = handle->txDataSize != 0;
+ sendEnabled = handle->txDataSize != 0U;
if (!sendEnabled)
{
base->FIFOINTENCLR = USART_FIFOINTENCLR_TXLVL_MASK;
- handle->txState = kUSART_TxIdle;
- if (handle->callback)
- {
- handle->callback(base, handle, kStatus_USART_TxIdle, handle->userData);
- }
+ handle->txState = (uint8_t)kUSART_TxIdle;
+
+ base->INTENSET |= USART_INTENSET_TXIDLEEN_MASK;
}
}
}
+ /* Tx idle and the interrupt is enabled. */
+ if ((0U != (base->INTENSET & USART_INTENSET_TXIDLEEN_MASK)) &&
+ (0U != (base->INTSTAT & USART_INTSTAT_TXIDLE_MASK)) && (handle->txState == (uint8_t)kUSART_TxIdle))
+ {
+ /* Disable tx idle interrupt */
+ base->INTENCLR |= USART_INTENCLR_TXIDLECLR_MASK;
+ /* Trigger callback. */
+ if (handle->callback != NULL)
+ {
+ handle->callback(base, handle, kStatus_USART_TxIdle, handle->userData);
+ }
+ }
+
/* ring buffer is not used */
if (NULL == handle->rxRingBuffer)
{
+ tmpsize = handle->rxDataSize;
+
/* restore if rx transfer ends and rxLevel is different from default value */
- if ((handle->rxDataSize == 0) && (USART_FIFOTRIG_RXLVL_GET(base) != handle->rxWatermark))
+ if ((tmpsize == 0U) && (USART_FIFOTRIG_RXLVL_GET(base) != handle->rxWatermark))
{
base->FIFOTRIG =
(base->FIFOTRIG & (~USART_FIFOTRIG_RXLVL_MASK)) | USART_FIFOTRIG_RXLVL(handle->rxWatermark);
}
/* decrease level if rx transfer is bellow */
- if ((handle->rxDataSize != 0) && (handle->rxDataSize < (USART_FIFOTRIG_RXLVL_GET(base) + 1)))
+ if ((tmpsize != 0U) && (tmpsize < (USART_FIFOTRIG_RXLVL_GET(base) + 1U)))
{
- base->FIFOTRIG =
- (base->FIFOTRIG & (~USART_FIFOTRIG_RXLVL_MASK)) | (USART_FIFOTRIG_RXLVL(handle->rxDataSize - 1));
+ base->FIFOTRIG = (base->FIFOTRIG & (~USART_FIFOTRIG_RXLVL_MASK)) | (USART_FIFOTRIG_RXLVL(tmpsize - 1U));
}
}
}