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authorrtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>2015-08-04 17:36:55 +0000
committerrtel <rtel@1d2547de-c912-0410-9cb9-b8ca96c0e9e2>2015-08-04 17:36:55 +0000
commitb5765a2a97bc50a3ec8564d34a51c9874abd2221 (patch)
tree9b8d6da1a3b9e4b26e753633a83f68c25f642711 /FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/microblaze_0/libsrc/standalone_v4_2/src/microblaze_enable_interrupts.S
parenta5ddfe03149df3ebee68aa52b13e10f9ba823cfb (diff)
downloadfreertos-b5765a2a97bc50a3ec8564d34a51c9874abd2221.tar.gz
Common scheduler code:
- Back out changes that allow mutexes to be given from a semaphore after tests showed issues that would not be fast to fix. Demo projects: - Update the Microblaze Kintex 7 project and BSP to use version 2015.2 of the Xilinx SDK. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2363 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
Diffstat (limited to 'FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/microblaze_0/libsrc/standalone_v4_2/src/microblaze_enable_interrupts.S')
-rw-r--r--FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/microblaze_0/libsrc/standalone_v4_2/src/microblaze_enable_interrupts.S68
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diff --git a/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/microblaze_0/libsrc/standalone_v4_2/src/microblaze_enable_interrupts.S b/FreeRTOS/Demo/MicroBlaze_Kintex7_EthernetLite/BSP/microblaze_0/libsrc/standalone_v4_2/src/microblaze_enable_interrupts.S
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+/******************************************************************************
+*
+* Copyright (C) 2004 - 2014 Xilinx, Inc. All rights reserved.
+*
+* Permission is hereby granted, free of charge, to any person obtaining a copy
+* of this software and associated documentation files (the "Software"), to deal
+* in the Software without restriction, including without limitation the rights
+* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+* copies of the Software, and to permit persons to whom the Software is
+* furnished to do so, subject to the following conditions:
+*
+* The above copyright notice and this permission notice shall be included in
+* all copies or substantial portions of the Software.
+*
+* Use of the Software is limited solely to applications:
+* (a) running on a Xilinx device, or
+* (b) that interact with a Xilinx device through a bus or interconnect.
+*
+* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+* SOFTWARE.
+*
+* Except as contained in this notice, the name of the Xilinx shall not be used
+* in advertising or otherwise to promote the sale, use or other dealings in
+* this Software without prior written authorization from Xilinx.
+*
+******************************************************************************/
+#
+# File : microblaze_enable_interrupts.s
+# Date : 2002, March 20.
+# Company: Xilinx
+# Group : Emerging Software Technologies
+#
+# Summary:
+# Enable interrupts on the microblaze.
+#
+#
+####################################################################
+
+#include "xparameters.h"
+
+ .text
+ .globl microblaze_enable_interrupts
+ .ent microblaze_enable_interrupts
+ .align 2
+microblaze_enable_interrupts:
+#if XPAR_MICROBLAZE_USE_MSR_INSTR == 1
+ rtsd r15, 8
+ msrset r0, 0x2
+#else /*XPAR_MICROBLAZE_USE_MSR_INSTR == 1*/
+ #Read the MSR register
+ mfs r12, rmsr
+ #Set the interrupt enable bit
+ ori r12, r12, 0x2
+ #Save the MSR register
+ mts rmsr, r12
+ #Return
+ rtsd r15, 8
+ nop
+#endif /*XPAR_MICROBLAZE_USE_MSR_INSTR == 1*/
+ .end microblaze_enable_interrupts
+
+
+