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* Update the LM3Sxxxx_IAR_Keil demo so the IAR project writes to the UART and ↵rtel2019-12-277-108/+342
| | | | | | executes in QEMU. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2775 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Updates to CM4_MPU RCDS portgaurav-aws2019-12-242-90/+146
| | | | | | | | | - System calls are now only allowed from kernel code. This change can be turned on or off using configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY. - MPU is disabled before reprogramming it and enabled afterwards to be compliant with ARM recommendations. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2774 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Remove local paths from the URL filesgaurav-aws2019-12-242-4/+0
| | | | git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2773 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Add readme into the third party RISC-V port that points to the directories ↵rtel2019-12-241-0/+6
| | | | | | that contains the official ports. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2772 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Add IAR MPU project for STM32L475 Discovery Kit IoT Nodegaurav-aws2019-12-2112-112/+3593
| | | | git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2771 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Updates to CM4_MPU IAR portgaurav-aws2019-12-213-114/+153
| | | | | | | | | - System calls are now only allowed from kernel code. This change can be turned on or off using configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY. - MPU is disabled before reprogramming it and enabled afterwards to be compliant with ARM recommendations. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2770 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Increase test coverage for queue sets.rtel2019-12-2092-2/+347
| | | | | | Rename the CORTEX_M0+_LPC51U68_LPCXpresso demo to CORTEX_M0+_LPC51U68_GCC_IAR_KEIL as it supports all three compilers. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2769 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Remove build files accidentally checked in.rtel2019-12-20128-159033/+0
| | | | | | Remove the CMSIS math library as it is large and not used. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2768 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Add MPU projects for STM32L475 Discovery Kit IoT Nodegaurav-aws2019-12-20103-0/+134687
| | | | git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2767 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Updates to CM4_MPU GCC portgaurav-aws2019-12-202-22/+110
| | | | | | | | | - System calls are now only allowed from kernel code. This change can be turned on or off using configENFORCE_SYSTEM_CALLS_FROM_KERNEL_ONLY. - MPU is disabled before reprogramming it and enabled afterwards to be compliant with ARM recommendations. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2766 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Adding GCC/Keil/IAR projects for NXP LPC51U68 (CM0+). yuhzheng2019-12-18218-0/+208291
| | | | | | Please see readme.txt for todo items. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2765 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Cortex M0 GCC/IAR/Keil ports -- tickless support. yuhzheng2019-12-186-52/+689
| | | | | | The default portMISSED_COUNTS_FACTOR is set to 45 cycles. User could override this value, if a more accurate count is available. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2764 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* RVDS/Keil weak linkage for vPortSetupTimerInterrupt() -- CM4F, CM3 yuhzheng2019-12-182-3/+3
| | | | | | Test steps are documented in this PR https://github.com/aws/amazon-freertos/pull/1141. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2763 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Use linker script variables for MPU setup for Nuvoton M2351 Keil Projectgaurav-aws2019-12-174-75/+90
| | | | | | | | | | Earlier we were using hard-coded addresses for MPU setup which were ensured to be the same as linker script setup. This change updates the Keil uVision project for Nuvoton Numaker-PFM-M2351 to use the variables exported from the linker script. This ensures that the MPU setup never goes out of sync with linker script. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2762 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Use the linker script variables for MPU setup for Keil Simulator Demogaurav-aws2019-12-172-52/+79
| | | | | | | | | | Earlier we were using hard-coded addresses for MPU setup which were ensured to be the same as linker script setup. This change updates the Keil Simulator demo to use the variables exported from the linker script. This ensures that the MPU setup does not go out of sync with linker script. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2761 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Move warning suppression for IAR compiler to portmacro.h for v8M portsgaurav-aws2019-12-079-3/+58
| | | | | | | | | IAR produces some warnings which can not be fixed in the source code because then other compilers start generating warnings. We suppressed those warnings in the project file before. This change moves the warning suppression from project files to portmacro.h. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2760 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Check socket binding result before doing anything with socket. (This is to ↵yuhzheng2019-12-041-3/+9
| | | | | | | | | | | | | | | address ARG findings.) Breaking the single return rule here, due to precedent violation at line 1039 and 1144. prvTransferConnect() now returns: - pdTRUE: everything's good. pdTRUE = 1. - -pdFREERTOS_ERRNO_ENOMEM: FreeRTOS_socket() failed. -pdFREERTOS_ERRNO_ENOMEM = -12. - -pdFREERTOS_ERRNO_EINVAL || -pdFREERTOS_ERRNO_ECANCELED: FreeRTOS_bind() failed. Negative values. Thus, at line 569 and line 617, needs to check != pdTRUE instead of == pdFALSE. This commit is done on behalf of Alfred. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2759 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Fix bug when xQueueOverwrite() and xQueueOverwrite() from ISR are used to ↵rtel2019-12-031-26/+35
| | | | | | | | | overwrite items in two queues that are part of the same set. Minor queue optimisations. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2758 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Add the Labs projects provided in the V10.2.1_191129 zip file.rtel2019-12-02801-0/+356576
| | | | git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2757 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Remove guards against __ARMCC_VERSION version numbers that were previously ↵rtel2019-11-2110-163/+29
| | | | | | used to avoid compiler warnings in some GCC ARM Cortex ports. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2756 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Add software timer to the Win32 blinky demo.rtel2019-11-183-2/+4
| | | | git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2755 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Remove driver files that generate compiler warnings from the ↵rtel2019-11-1817-1913/+76
| | | | | | | | RISC-V_Renode_Emulator_SoftConsole project. Update RISC-V ports so the interrupt stack is set to a known value before the scheduler is started if the interrupt stack is statically defined rather than re-using the main.c() stack. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2754 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Update to the latest atomic.h.rtel2019-11-187-178/+206
| | | | | | | | | | | Improve commenting in RISC-V GCC port. Fix IAR RISC-V port so the first task starts with interrupts enabled. Add references to third party page ref using newlib with FreeRTOS into the tasks.c file in each place newlib is referenced. Move the position of the traceTASK_DELETE() trace macro in case of use with a memory allocator that writes over freed memory even when inside a critical section. Efficiency improvement: Make sure xTaskIncrementTick() does not return pdTRUE when the scheduler is locked. This just prevents an unnecessary yield interrupt (unnecessary as it is ignored) when xYieldPending happens to be pdTRUE. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2753 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Rename the RISC-V_RV32_SiFive_Hifive1_GCC folder to ↵rtel2019-10-22172-0/+0
| | | | | | RISC-V_RV32_SiFive_HiFive1_FreedomStudio as it is built with Freedom Studio. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2752 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Add nano-specs linker option to HiFive1_GCC demo.rtel2019-10-221-2/+2
| | | | git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2751 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Fix spelling mistakes copied and pasted into a couple of RISC-V demo main.c ↵rtel2019-10-223-8/+8
| | | | | | files. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2750 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Change version and license text in RISC-V_RV32_SiFive_HiFive1_GCC ↵rtel2019-10-225-176/+44
| | | | | | FreeRTOSConfig.h file. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2749 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Tidy up main_full.c and change alignment of variable accesses in RegTest.S ↵rtel2019-10-223-5/+8
| | | | | | for the RISC-V_Renode_Emulator_SoftConsole demo. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2748 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Rework RISC-V QEMU example to use vanilla Eclipse in place of Freedom ↵rtel2019-10-227-29/+16
| | | | | | Studio. NOTE: RISC-V QEMU mtime interrupts are not generated consistently. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2747 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Add some asserts into the common demo tasks to catch scenarios where the ↵rtel2019-10-213-1/+8
| | | | | | tasks are not being used but the part of the demo/test that gets called from the tick hook is called resultant in an access to objects that were not created. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2746 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Update RISK-V GCC port to ensure the first task starts with interrupts ↵rtel2019-10-211-4/+7
| | | | | | enabled - previously its interrupts were only enabled after it yielded for the first time. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2745 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Add the miv-basic.resc reNode script into the ↵rtel2019-10-171-0/+7
| | | | | | RISC-V_Renode_Emulator_SoftConsole demo as it is no longer shipped with the Microsemi tools. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2744 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Rename RISC-V-Qemu-sive_e_Freedom_Studio directory to ↵rtel2019-10-1658-0/+0
| | | | | | RISC-V-Qemu-sifive_e-Eclipse-GCC as it is now using Vanilla Eclipse and vanilla GCC in place of Freedom Studio. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2743 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Recreate the RISC-V-Qemu demo using Vanilla Eclipse in place of Freedom ↵rtel2019-10-1615-802/+118
| | | | | | Studio as there is not a new Freedom Studio project that targets the HiFive1 board, and the updated Freedom Studio version didn't work with this project any more anyway. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2742 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Move the call to traceTASK_DELETE() to before port ↵rtel2019-10-151-2/+5
| | | | | | portPRE_TASK_DELETE_HOOK() as in the Windows port portPRE_TASK_DELETE_HOOK() never returns. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2741 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Add IAR demo for the SiFive RISC-V HiFive Rev B board.rtel2019-10-1417-0/+7889
| | | | git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2740 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Update the RegTest.S file used by several GCC RISC-V demos to ensure correct ↵rtel2019-10-143-3/+12
| | | | | | alignment of constant loads from assembly code. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2739 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Tidy up the RISC-V_RV32_SiFive_HiFive1_GCC demo ready for its eventual release.rtel2019-10-14151-22545/+160
| | | | git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2738 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Added the "full" demo to the RISC-V_RV32_SiFive_HiFive1_GCC demo - backup ↵rtel2019-10-1311-126/+1021
| | | | | | check in only as still a work in progress. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2737 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* RIS-V_RV32_SiFive_HiFive1_GCC project now running the blinky demo - still a ↵rtel2019-10-1110-415/+365
| | | | | | work in progress. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2736 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Formatting changes only.rtel2019-10-101-137/+137
| | | | git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2735 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* RISC-V-RV32_SiFive_HiFive1_GCC project is now also building the FreeRTOS ↵rtel2019-10-105-4/+527
| | | | | | kernel code - but not using it yet - still a work in progress. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2734 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Base project to replace existing Freedom Studio project using latest Freedom ↵rtel2019-10-09313-0/+35861
| | | | | | Studio project format - builds and executes but does not yet include RTOS code. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2733 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Minor formatting change in comment only.rtel2019-10-071-4/+4
| | | | git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2732 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Update FreeRTOS.h with the version in GitHub. This is also to test submodule.yuhzheng2019-09-241-6/+5
| | | | git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2731 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Nordic port. Notes for Richard -- the work items we discussed about for ↵yuhzheng2019-09-245-0/+1027
| | | | | | nrf52840-dk and Wiced_CY still remain. The only reason for this commit is we want to test out submodule. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2730 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Revert 2728. Not because the files are still needed, but because we want to ↵yuhzheng2019-09-243-0/+771
| | | | | | | | test out submodule. Before further updating project files in GitHub, keeping an additional copy. git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2729 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Wiced_CY port is not needed anymore. Use GCC/ARM_CRx_No_GIC instead. yuhzheng2019-09-243-771/+0
| | | | git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2728 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Adding tickless hooks to GCC/ARM_CRx_No_GIC port. yuhzheng2019-09-241-0/+6
| | | | git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2727 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
* Correct code comments that referred to taskYIELD_FROM_ISR to portYIELD_FROM_ISR.rtel2019-09-244-7/+7
| | | | | | | | Update RV32 port to use 16 byte-alignment all the time (only strictly necessary when using FLOP instructions). git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2726 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
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