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authorOlof Johansson <olof@lixom.net>2020-09-13 11:14:59 -0700
committerOlof Johansson <olof@lixom.net>2020-09-13 11:15:01 -0700
commit465c335bb5fd25f1f433481b7423a982e23a4c58 (patch)
tree7c6214703083462e2b539dc630bfb63f3ac97874 /arch/arm/mach-s3c/include/mach/io-s3c24xx.h
parentf75aef392f869018f78cfedf3c320a6b3fcfda6b (diff)
parenta1342f6a9ff88ad88ff7a981c53ae0869c94d243 (diff)
downloadlinux-465c335bb5fd25f1f433481b7423a982e23a4c58.tar.gz
Merge tag 'samsung-soc-s3c-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/soc
Samsung S3C24xx and S3C64xx machine code cleanup for v5.10 Big cleanup for the Samsung S3C24xx and S3C64xx platforms, although it also touches files shared with S5Pv210 and Exynos. This is mostly Arnd Bergmann work which Krzysztof Kozlowski took over, rebased and polished. The goal is to cleanup, merge and finally make the Samsung S3C24xx and S3C64xx architectures multiplatform. The multiplatform did not happen yet here - just cleaning up and merging into one arch/arm/mach-s3c directory. However this is step forward for multiplatform or at least to keep this code still maintainable. This pulls also branch with changes for Samsung SoC sound drivers from broonie/sound because the cleanups there were part of this series and all further patches depend on them. * tag 'samsung-soc-s3c-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (62 commits) ARM: s3c: Avoid naming clash of S3C24xx and S3C64xx timer setup ARM: s3c: Cleanup from old plat-samsung include ARM: s3c: make headers local if possible ARM: s3c: move into a common directory ARM: s3c24xx: stop including mach/hardware.h from mach/io.h cpufreq: s3c24xx: move low-level clk reg access into platform code cpufreq: s3c2412: use global s3c2412_cpufreq_setrefresh ARM: s3c: remove cpufreq header dependencies cpufreq: s3c24xx: split out registers fbdev: s3c2410fb: remove mach header dependency ARM: s3c24xx: bast: avoid irq_desc array usage ARM: s3c24xx: spi: avoid hardcoding fiq number in driver ARM: s3c24xx: include mach/irqs.h where needed ARM: s3c24xx: move s3cmci pinctrl handling into board files ARM: s3c24xx: move iis pinctrl config into boards ARM: s3c24xx: move spi fiq handler into platform ARM: s3c: adc: move header to linux/soc/samsung ARM: s3c24xx: move irqchip driver back into platform ARM: s3c24xx: move regs-spi.h into spi driver ARM: s3c64xx: remove mach/hardware.h ... Link: https://lore.kernel.org/r/20200831154751.7551-1-krzk@kernel.org Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-s3c/include/mach/io-s3c24xx.h')
-rw-r--r--arch/arm/mach-s3c/include/mach/io-s3c24xx.h50
1 files changed, 50 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c/include/mach/io-s3c24xx.h b/arch/arm/mach-s3c/include/mach/io-s3c24xx.h
new file mode 100644
index 000000000000..738b775d3336
--- /dev/null
+++ b/arch/arm/mach-s3c/include/mach/io-s3c24xx.h
@@ -0,0 +1,50 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * arch/arm/mach-s3c2410/include/mach/io.h
+ * from arch/arm/mach-rpc/include/mach/io.h
+ *
+ * Copyright (C) 1997 Russell King
+ * (C) 2003 Simtec Electronics
+*/
+
+#ifndef __ASM_ARM_ARCH_IO_S3C24XX_H
+#define __ASM_ARM_ARCH_IO_S3C24XX_H
+
+#include <mach/map-base.h>
+
+/*
+ * ISA style IO, for each machine to sort out mappings for,
+ * if it implements it. We reserve two 16M regions for ISA,
+ * so the PC/104 can use separate addresses for 8-bit and
+ * 16-bit port I/O.
+ */
+#define PCIO_BASE S3C_ADDR(0x02000000)
+#define IO_SPACE_LIMIT 0x00ffffff
+#define S3C24XX_VA_ISA_WORD (PCIO_BASE)
+#define S3C24XX_VA_ISA_BYTE (PCIO_BASE + 0x01000000)
+
+#ifdef CONFIG_ISA
+
+#define inb(p) readb(S3C24XX_VA_ISA_BYTE + (p))
+#define inw(p) readw(S3C24XX_VA_ISA_WORD + (p))
+#define inl(p) readl(S3C24XX_VA_ISA_WORD + (p))
+
+#define outb(v,p) writeb((v), S3C24XX_VA_ISA_BYTE + (p))
+#define outw(v,p) writew((v), S3C24XX_VA_ISA_WORD + (p))
+#define outl(v,p) writel((v), S3C24XX_VA_ISA_WORD + (p))
+
+#define insb(p,d,l) readsb(S3C24XX_VA_ISA_BYTE + (p),d,l)
+#define insw(p,d,l) readsw(S3C24XX_VA_ISA_WORD + (p),d,l)
+#define insl(p,d,l) readsl(S3C24XX_VA_ISA_WORD + (p),d,l)
+
+#define outsb(p,d,l) writesb(S3C24XX_VA_ISA_BYTE + (p),d,l)
+#define outsw(p,d,l) writesw(S3C24XX_VA_ISA_WORD + (p),d,l)
+#define outsl(p,d,l) writesl(S3C24XX_VA_ISA_WORD + (p),d,l)
+
+#else
+
+#define __io(x) (PCIO_BASE + (x))
+
+#endif
+
+#endif