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* graph/nvc0: Fix engine pointer retrievalgk20a_syncLauri Peltonen2015-02-171-1/+1
* drm/nouveau: Set tile modeAri Hirvonen2015-02-174-0/+67
* drm/nouveau: Support fence fd's at kickoffLauri Peltonen2015-02-174-1/+152
* gem: Split nv50_dma_pushLauri Peltonen2015-02-173-12/+22
* drm/nouveau: Add fence fd helpersLauri Peltonen2015-02-172-1/+78
* drm/nouveau: Split nouveau_fence_syncLauri Peltonen2015-02-176-59/+54
* WAR for 3.18 kernelsAlexandre Courbot2015-02-171-1/+1
* gem: allow user-space to specify an object should be coherentAlexandre Courbot2015-02-172-0/+4
* ttm: use custom dma_address pointerAlexandre Courbot2015-02-173-14/+49
* graph/gf100: add support for netlist firmwaresAlexandre Courbot2015-02-172-0/+172
* platform: support for netlist firmwaresAlexandre Courbot2015-02-173-3/+75
* instmem/gk20a: add IOMMU supportAlexandre Courbot2015-02-171-31/+241
* platform: probe IOMMU if presentAlexandre Courbot2015-02-173-1/+124
* instmem/gk20a: use DMA attributesAlexandre Courbot2015-02-172-4/+51
* gk20a: remove RAM deviceAlexandre Courbot2015-02-174-70/+0
* instmem/gk20a: move memory allocation to instmemAlexandre Courbot2015-02-175-85/+217
* make RAM device optionalAlexandre Courbot2015-02-177-17/+55
* docAlexandre Courbot2015-02-103-0/+65
* [DEBUG] Add channel dumping functions for NVEAAlexandre Courbot2015-02-103-0/+226
* lib: fix drm backendBen Skeggs2015-02-061-1/+1
* device: post write to NV_PMC_BOOT_1 when flipping endian switchBen Skeggs2015-02-021-2/+4
* devinit/nv04: change owner to intBen Skeggs2015-02-021-1/+1
* mxm: indent an if statementDan Carpenter2015-02-021-1/+1
* gr/gf100: fix some accidental or'ing of buffer addressesBen Skeggs2015-02-023-6/+6
* fifo/nv04: remove the loop from the interrupt handlerBen Skeggs2015-01-271-50/+35
* fuse/gm107: simplify the return logicMartin Peres2015-01-271-3/+1
* drm: finalise nvkm namespace switch (no binary change)Ben Skeggs2015-01-1950-625/+360
* device: namespace + nvidia gpu names (no binary change)Ben Skeggs2015-01-1922-272/+282
* vp: namespace + nvidia gpu names (no binary change)Ben Skeggs2015-01-194-41/+41
* sw: namespace + nvidia gpu names (no binary change)Ben Skeggs2015-01-1911-232/+203
* sec: namespace + nvidia gpu names (no binary change)Ben Skeggs2015-01-197-67/+61
* pm: namespace + nvidia gpu names (no binary change)Ben Skeggs2015-01-1919-627/+516
* msvld: namespace + nvidia gpu names (no binary change)Ben Skeggs2015-01-199-143/+141
* msppp: namespace + nvidia gpu names (no binary change)Ben Skeggs2015-01-198-107/+104
* mspdec: namespace + nvidia gpu names (no binary change)Ben Skeggs2015-01-199-142/+140
* mpeg: namespace + nvidia gpu names (no binary change)Ben Skeggs2015-01-199-273/+237
* gr: namespace + nvidia gpu names (no binary change)Ben Skeggs2015-01-1974-3271/+3185
* fifo: namespace + nvidia gpu names (no binary change)Ben Skeggs2015-01-1922-1188/+1126
* dmaobj: namespace + nvidia gpu names (no binary change)Ben Skeggs2015-01-1911-176/+157
* disp: namespace + nvidia gpu names (no binary change)Ben Skeggs2015-01-1942-1146/+1055
* cipher: namespace + nvidia gpu names (no binary change)Ben Skeggs2015-01-194-74/+71
* ce: namespace + nvidia gpu names (no binary change)Ben Skeggs2015-01-1916-377/+355
* bsp: namespace + nvidia gpu names (no binary change)Ben Skeggs2015-01-194-41/+41
* volt: namespace + nvidia gpu names (no binary change)Ben Skeggs2015-01-196-108/+100
* timer: namespace + nvidia gpu names (no binary change)Ben Skeggs2015-01-1926-91/+105
* therm: namespace + nvidia gpu names (no binary change)Ben Skeggs2015-01-1920-685/+639
* pmu: namespace + nvidia gpu names (no binary change)Ben Skeggs2015-01-1928-256/+243
* mmu: namespace + nvidia gpu names (no binary change)Ben Skeggs2015-01-1929-374/+351
* mc: namespace + nvidia gpu names (no binary change)Ben Skeggs2015-01-1920-208/+192
* ltc: namespace + nvidia gpu names (no binary change)Ben Skeggs2015-01-197-97/+88