Add config files for many NVIDIA reference boards

Configuration files are added for:
* Harmony, booting from NAND.
* Seaboard/Springbank, booting from NAND.
* Ventana, booting from eMMC.
* Whistler, booting from eMMC.
* Cardhu A02/A04 and A05, booting from eMMC.

Change-Id: I7e9c9f025c85a23f36cfa1f2af8305836698eb84
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-on: http://git-master/r/167467
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Eric Brower <ebrower@nvidia.com>
Tested-by: Eric Brower <ebrower@nvidia.com>
Reviewed-by: Allen Martin <amartin@nvidia.com>

21 files changed, 3404 insertions, 0 deletions

diff --git a/.gitignore b/.gitignore
new file mode 100644
index 0000000..9750905
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1,3 @@
+*.bct
+*.img
+u-boot.bin
diff --git a/cardhu/E1186_Hynix_1GB_H5TC2G83BFR-PBA_375MHz_111114_317_sdmmc4_x8.bct.cfg b/cardhu/E1186_Hynix_1GB_H5TC2G83BFR-PBA_375MHz_111114_317_sdmmc4_x8.bct.cfg
new file mode 100644
index 0000000..22ede9d
--- /dev/null
+++ b/cardhu/E1186_Hynix_1GB_H5TC2G83BFR-PBA_375MHz_111114_317_sdmmc4_x8.bct.cfg
@@ -0,0 +1,819 @@
+# Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+#
+# This software is provided 'as-is', without any express or implied
+# warranty. In no event will the authors be held liable for any damages
+# arising from the use of this software.
+#
+# Permission is granted to anyone to use this software for any purpose,
+# including commercial applications, and to alter it and redistribute it
+# freely, subject to the following restrictions:
+#
+# 1. The origin of this software must not be misrepresented; you must not
+#    claim that you wrote the original software. If you use this software
+#    in a product, an acknowledgment in the product documentation would be
+#    appreciated but is not required.
+# 2. Altered source versions must be plainly marked as such, and must not be
+#    misrepresented as being the original software.
+# 3. This notice may not be removed or altered from any source distribution.
+
+Version       = 0x00030001;
+BlockSize     = 0x00004000;
+PageSize      = 0x00000200;
+PartitionSize = 0x02000000;
+OdmData       = 0x400c0000;
+
+DevType[0] = NvBootDevType_Sdmmc;
+DeviceParam[0].SdmmcParams.ClockDivider           = 0x00000009;
+DeviceParam[0].SdmmcParams.DataWidth              = NvBootSdmmcDataWidth_8Bit;
+DeviceParam[0].SdmmcParams.MaxPowerClassSupported = 0x00000000;
+DeviceParam[0].SdmmcParams.SdController           = 0x00000000;
+
+DevType[1] = NvBootDevType_Sdmmc;
+DeviceParam[1].SdmmcParams.ClockDivider           = 0x00000009;
+DeviceParam[1].SdmmcParams.DataWidth              = NvBootSdmmcDataWidth_8Bit;
+DeviceParam[1].SdmmcParams.MaxPowerClassSupported = 0x00000000;
+DeviceParam[1].SdmmcParams.SdController           = 0x00000000;
+
+DevType[2] = NvBootDevType_Sdmmc;
+DeviceParam[2].SdmmcParams.ClockDivider           = 0x00000009;
+DeviceParam[2].SdmmcParams.DataWidth              = NvBootSdmmcDataWidth_8Bit;
+DeviceParam[2].SdmmcParams.MaxPowerClassSupported = 0x00000000;
+DeviceParam[2].SdmmcParams.SdController           = 0x00000000;
+
+DevType[3] = NvBootDevType_Sdmmc;
+DeviceParam[3].SdmmcParams.ClockDivider           = 0x00000009;
+DeviceParam[3].SdmmcParams.DataWidth              = NvBootSdmmcDataWidth_8Bit;
+DeviceParam[3].SdmmcParams.MaxPowerClassSupported = 0x00000000;
+DeviceParam[3].SdmmcParams.SdController           = 0x00000000;
+
+SDRAM[0].MemoryType                         = NvBootMemoryType_Ddr3;
+SDRAM[0].PllMChargePumpSetupControl         = 0x00000008;
+SDRAM[0].PllMLoopFilterSetupControl         = 0x00000000;
+SDRAM[0].PllMInputDivider                   = 0x0000000c;
+SDRAM[0].PllMFeedbackDivider                = 0x000002ee;
+SDRAM[0].PllMPostDivider                    = 0x00000000;
+SDRAM[0].PllMStableTime                     = 0x0000012c;
+SDRAM[0].EmcClockDivider                    = 0x00000002;
+SDRAM[0].EmcAutoCalInterval                 = 0x001fffff;
+SDRAM[0].EmcAutoCalConfig                   = 0xa0f10000;
+SDRAM[0].EmcAutoCalWait                     = 0x00000064;
+SDRAM[0].EmcPinProgramWait                  = 0x00000001;
+SDRAM[0].EmcRc                              = 0x00000011;
+SDRAM[0].EmcRfc                             = 0x0000003a;
+SDRAM[0].EmcRas                             = 0x0000000c;
+SDRAM[0].EmcRp                              = 0x00000004;
+SDRAM[0].EmcR2w                             = 0x00000003;
+SDRAM[0].EmcW2r                             = 0x00000008;
+SDRAM[0].EmcR2p                             = 0x00000002;
+SDRAM[0].EmcW2p                             = 0x0000000a;
+SDRAM[0].EmcRrd                             = 0x00000002;
+SDRAM[0].EmcRdRcd                           = 0x00000004;
+SDRAM[0].EmcWrRcd                           = 0x00000004;
+SDRAM[0].EmcRext                            = 0x00000001;
+SDRAM[0].EmcWdv                             = 0x00000004;
+SDRAM[0].EmcQUseExtra                       = 0x00000000;
+SDRAM[0].EmcQUse                            = 0x00000006;
+SDRAM[0].EmcQRst                            = 0x00000004;
+SDRAM[0].EmcQSafe                           = 0x00000008;
+SDRAM[0].EmcRdv                             = 0x0000000d;
+SDRAM[0].EmcRefresh                         = 0x00000b2d;
+SDRAM[0].EmcBurstRefreshNum                 = 0x00000000;
+SDRAM[0].EmcPdEx2Wr                         = 0x00000001;
+SDRAM[0].EmcPdEx2Rd                         = 0x00000008;
+SDRAM[0].EmcPChg2Pden                       = 0x00000001;
+SDRAM[0].EmcAct2Pden                        = 0x00000000;
+SDRAM[0].EmcAr2Pden                         = 0x00000007;
+SDRAM[0].EmcRw2Pden                         = 0x0000000f;
+SDRAM[0].EmcTxsr                            = 0x00000040;
+SDRAM[0].EmcTcke                            = 0x00000004;
+SDRAM[0].EmcTfaw                            = 0x0000000c;
+SDRAM[0].EmcTrpab                           = 0x00000000;
+SDRAM[0].EmcTClkStable                      = 0x00000004;
+SDRAM[0].EmcTClkStop                        = 0x00000005;
+SDRAM[0].EmcTRefBw                          = 0x00000b6d;
+SDRAM[0].EmcFbioCfg5                        = 0x00007088;
+SDRAM[0].EmcFbioCfg6                        = 0x00000006;
+SDRAM[0].EmcFbioSpare                       = 0xd8000000;
+SDRAM[0].EmcMrsResetDllWait                 = 0x00000000;
+SDRAM[0].EmcMrsResetDll                     = 0x00000000;
+SDRAM[0].EmcMrsDdr2DllReset                 = 0x00000000;
+SDRAM[0].EmcMrs                             = 0x80000521;
+SDRAM[0].EmcEmrsEmr2                        = 0x80200000;
+SDRAM[0].EmcEmrsEmr3                        = 0x80300000;
+SDRAM[0].EmcEmrsDdr2DllEnable               = 0x00000000;
+SDRAM[0].EmcEmrsDdr2OcdCalib                = 0x00000000;
+SDRAM[0].EmcEmrs                            = 0x80100002;
+SDRAM[0].EmcMrw1                            = 0x00000000;
+SDRAM[0].EmcMrw2                            = 0x00000000;
+SDRAM[0].EmcMrw3                            = 0x00000000;
+SDRAM[0].EmcMrwResetCommand                 = 0x00000000;
+SDRAM[0].EmcMrwResetNInitWait               = 0x00000000;
+SDRAM[0].EmcAdrCfg                          = 0x00000000;
+SDRAM[0].McEmemCfg                          = 0x00000400;
+SDRAM[0].EmcCfg2                            = 0x000c0099;
+SDRAM[0].EmcCfgDigDll                       = 0x00200084;
+SDRAM[0].EmcCfgDigDllPeriod                 = 0x00008000;
+SDRAM[0].EmcCfg                             = 0x23c00000;
+SDRAM[0].EmcDbg                             = 0x01000400;
+SDRAM[0].WarmBootWait                       = 0x00000002;
+SDRAM[0].EmcCttTermCtrl                     = 0x00000802;
+SDRAM[0].EmcOdtWrite                        = 0x00000000;
+SDRAM[0].EmcOdtRead                         = 0x00000000;
+SDRAM[0].EmcZcalWaitCnt                     = 0x00000040;
+SDRAM[0].EmcZcalMrwCmd                      = 0x80000000;
+SDRAM[0].EmcDdr2Wait                        = 0x00000000;
+SDRAM[0].PmcDdrPwr                          = 0x00000003;
+SDRAM[0].EmcClockSource                     = 0x00000000;
+SDRAM[0].EmcClockUsePllMUD                  = 0x00000000;
+SDRAM[0].EmcPinExtraWait                    = 0x00000000;
+SDRAM[0].EmcTimingControlWait               = 0x00000000;
+SDRAM[0].EmcWext                            = 0x00000000;
+SDRAM[0].EmcCtt                             = 0x00000000;
+SDRAM[0].EmcCttDuration                     = 0x00000000;
+SDRAM[0].EmcPreRefreshReqCnt                = 0x000002cb;
+SDRAM[0].EmcTxsrDll                         = 0x00000200;
+SDRAM[0].EmcCfgRsv                          = 0xff00ff89;
+SDRAM[0].EmcMrwExtra                        = 0x00000000;
+SDRAM[0].EmcWarmBootMrw1                    = 0x00000000;
+SDRAM[0].EmcWarmBootMrw2                    = 0x00000000;
+SDRAM[0].EmcWarmBootMrw3                    = 0x00000000;
+SDRAM[0].EmcWarmBootMrwExtra                = 0x00000000;
+SDRAM[0].EmcWarmBootExtraModeRegWriteEnable = 0x00000000;
+SDRAM[0].EmcExtraModeRegWriteEnable         = 0x00000000;
+SDRAM[0].EmcMrsWaitCnt                      = 0x0184000c;
+SDRAM[0].EmcCmdQ                            = 0x10004408;
+SDRAM[0].EmcMc2EmcQ                         = 0x06000404;
+SDRAM[0].EmcDynSelfRefControl               = 0x8000174b;
+SDRAM[0].AhbArbitrationXbarCtrlMemInitDone  = 0x00000001;
+SDRAM[0].EmcDevSelect                       = 0x00000002;
+SDRAM[0].EmcSelDpdCtrl                      = 0x0004032c;
+SDRAM[0].EmcDllXformDqs0                    = 0x0003c000;
+SDRAM[0].EmcDllXformDqs1                    = 0x0003c000;
+SDRAM[0].EmcDllXformDqs2                    = 0x0003c000;
+SDRAM[0].EmcDllXformDqs3                    = 0x0003c000;
+SDRAM[0].EmcDllXformDqs4                    = 0x0003c000;
+SDRAM[0].EmcDllXformDqs5                    = 0x0003c000;
+SDRAM[0].EmcDllXformDqs6                    = 0x0003c000;
+SDRAM[0].EmcDllXformDqs7                    = 0x0003c000;
+SDRAM[0].EmcDllXformQUse0                   = 0x00000000;
+SDRAM[0].EmcDllXformQUse1                   = 0x00000000;
+SDRAM[0].EmcDllXformQUse2                   = 0x00000000;
+SDRAM[0].EmcDllXformQUse3                   = 0x00000000;
+SDRAM[0].EmcDllXformQUse4                   = 0x00000000;
+SDRAM[0].EmcDllXformQUse5                   = 0x00000000;
+SDRAM[0].EmcDllXformQUse6                   = 0x00000000;
+SDRAM[0].EmcDllXformQUse7                   = 0x00000000;
+SDRAM[0].EmcDliTrimTxDqs0                   = 0x00000000;
+SDRAM[0].EmcDliTrimTxDqs1                   = 0x00000000;
+SDRAM[0].EmcDliTrimTxDqs2                   = 0x00000000;
+SDRAM[0].EmcDliTrimTxDqs3                   = 0x00000000;
+SDRAM[0].EmcDliTrimTxDqs4                   = 0x00000000;
+SDRAM[0].EmcDliTrimTxDqs5                   = 0x00000000;
+SDRAM[0].EmcDliTrimTxDqs6                   = 0x00000000;
+SDRAM[0].EmcDliTrimTxDqs7                   = 0x00000000;
+SDRAM[0].EmcDllXformDq0                     = 0x00040000;
+SDRAM[0].EmcDllXformDq1                     = 0x00040000;
+SDRAM[0].EmcDllXformDq2                     = 0x00040000;
+SDRAM[0].EmcDllXformDq3                     = 0x00040000;
+SDRAM[0].EmcZcalInterval                    = 0x00020000;
+SDRAM[0].EmcZcalInitDev0                    = 0x80000011;
+SDRAM[0].EmcZcalInitDev1                    = 0x00000000;
+SDRAM[0].EmcZcalInitWait                    = 0x00000002;
+SDRAM[0].EmcZcalColdBootEnable              = 0x00000001;
+SDRAM[0].EmcZcalWarmBootEnable              = 0x00000001;
+SDRAM[0].EmcMrwLpddr2ZcalWarmBoot           = 0x000a00ab;
+SDRAM[0].EmcZqCalDdr3WarmBoot               = 0x00000011;
+SDRAM[0].EmcZcalWarmBootWait                = 0x00000001;
+SDRAM[0].EmcMrsWarmBootEnable               = 0x00000001;
+SDRAM[0].EmcMrsExtra                        = 0x80000521;
+SDRAM[0].EmcWarmBootMrs                     = 0x80100002;
+SDRAM[0].EmcWarmBootEmrs                    = 0x80000521;
+SDRAM[0].EmcWarmBootEmr2                    = 0x80200000;
+SDRAM[0].EmcWarmBootEmr3                    = 0x80300000;
+SDRAM[0].EmcWarmBootMrsExtra                = 0x80100002;
+SDRAM[0].EmcClkenOverride                   = 0x00000000;
+SDRAM[0].EmcExtraRefreshNum                 = 0x00000002;
+SDRAM[0].EmcClkenOverrideAllWarmBoot        = 0x00000000;
+SDRAM[0].McClkenOverrideAllWarmBoot         = 0x00000000;
+SDRAM[0].EmcCfgDigDllPeriodWarmBoot         = 0x00000003;
+SDRAM[0].PmcVddpSel                         = 0x00000002;
+SDRAM[0].PmcDdrCfg                          = 0x00000002;
+SDRAM[0].PmcIoDpdReq                        = 0x80800000;
+SDRAM[0].PmcENoVttGen                       = 0x00000000;
+SDRAM[0].PmcNoIoPower                       = 0x00000000;
+SDRAM[0].EmcXm2CmdPadCtrl                   = 0x000002a0;
+SDRAM[0].EmcXm2CmdPadCtrl2                  = 0x770c0000;
+SDRAM[0].EmcXm2DqsPadCtrl                   = 0x770c1414;
+SDRAM[0].EmcXm2DqsPadCtrl2                  = 0x0800013d;
+SDRAM[0].EmcXm2DqsPadCtrl3                  = 0x08000021;
+SDRAM[0].EmcXm2DqPadCtrl                    = 0x770c2990;
+SDRAM[0].EmcXm2DqPadCtrl2                   = 0x00000000;
+SDRAM[0].EmcXm2ClkPadCtrl                   = 0x77fff884;
+SDRAM[0].EmcXm2CompPadCtrl                  = 0x01f1f508;
+SDRAM[0].EmcXm2VttGenPadCtrl                = 0x05057404;
+SDRAM[0].EmcXm2VttGenPadCtrl2               = 0x54000007;
+SDRAM[0].EmcXm2QUsePadCtrl                  = 0x080001e8;
+SDRAM[0].McEmemAdrCfg                       = 0x00000000;
+SDRAM[0].McEmemAdrCfgDev0                   = 0x00080303;
+SDRAM[0].McEmemAdrCfgDev1                   = 0x00080303;
+SDRAM[0].McEmemArbCfg                       = 0x0000000b;
+SDRAM[0].McEmemArbOutstandingReq            = 0xc0000044;
+SDRAM[0].McEmemArbTimingRcd                 = 0x00000001;
+SDRAM[0].McEmemArbTimingRp                  = 0x00000002;
+SDRAM[0].McEmemArbTimingRc                  = 0x00000009;
+SDRAM[0].McEmemArbTimingRas                 = 0x00000005;
+SDRAM[0].McEmemArbTimingFaw                 = 0x00000005;
+SDRAM[0].McEmemArbTimingRrd                 = 0x00000001;
+SDRAM[0].McEmemArbTimingRap2Pre             = 0x00000002;
+SDRAM[0].McEmemArbTimingWap2Pre             = 0x00000008;
+SDRAM[0].McEmemArbTimingR2R                 = 0x00000002;
+SDRAM[0].McEmemArbTimingW2W                 = 0x00000002;
+SDRAM[0].McEmemArbTimingR2W                 = 0x00000003;
+SDRAM[0].McEmemArbTimingW2R                 = 0x00000006;
+SDRAM[0].McEmemArbDaTurns                   = 0x06030202;
+SDRAM[0].McEmemArbDaCovers                  = 0x000d0709;
+SDRAM[0].McEmemArbMisc0                     = 0x7086110a;
+SDRAM[0].McEmemArbMisc1                     = 0x78000000;
+SDRAM[0].McEmemArbRing1Throttle             = 0x001f0000;
+SDRAM[0].McEmemArbOverride                  = 0x00000080;
+SDRAM[0].McEmemArbRsv                       = 0xff00ff00;
+SDRAM[0].McClkenOverride                    = 0x00000000;
+
+SDRAM[1].MemoryType                         = NvBootMemoryType_Ddr3;
+SDRAM[1].PllMChargePumpSetupControl         = 0x00000008;
+SDRAM[1].PllMLoopFilterSetupControl         = 0x00000000;
+SDRAM[1].PllMInputDivider                   = 0x0000000c;
+SDRAM[1].PllMFeedbackDivider                = 0x000002ee;
+SDRAM[1].PllMPostDivider                    = 0x00000000;
+SDRAM[1].PllMStableTime                     = 0x0000012c;
+SDRAM[1].EmcClockDivider                    = 0x00000002;
+SDRAM[1].EmcAutoCalInterval                 = 0x001fffff;
+SDRAM[1].EmcAutoCalConfig                   = 0xa0f10000;
+SDRAM[1].EmcAutoCalWait                     = 0x00000064;
+SDRAM[1].EmcPinProgramWait                  = 0x00000001;
+SDRAM[1].EmcRc                              = 0x00000011;
+SDRAM[1].EmcRfc                             = 0x0000003a;
+SDRAM[1].EmcRas                             = 0x0000000c;
+SDRAM[1].EmcRp                              = 0x00000004;
+SDRAM[1].EmcR2w                             = 0x00000003;
+SDRAM[1].EmcW2r                             = 0x00000008;
+SDRAM[1].EmcR2p                             = 0x00000002;
+SDRAM[1].EmcW2p                             = 0x0000000a;
+SDRAM[1].EmcRrd                             = 0x00000002;
+SDRAM[1].EmcRdRcd                           = 0x00000004;
+SDRAM[1].EmcWrRcd                           = 0x00000004;
+SDRAM[1].EmcRext                            = 0x00000001;
+SDRAM[1].EmcWdv                             = 0x00000004;
+SDRAM[1].EmcQUseExtra                       = 0x00000000;
+SDRAM[1].EmcQUse                            = 0x00000006;
+SDRAM[1].EmcQRst                            = 0x00000004;
+SDRAM[1].EmcQSafe                           = 0x00000008;
+SDRAM[1].EmcRdv                             = 0x0000000d;
+SDRAM[1].EmcRefresh                         = 0x00000b2d;
+SDRAM[1].EmcBurstRefreshNum                 = 0x00000000;
+SDRAM[1].EmcPdEx2Wr                         = 0x00000001;
+SDRAM[1].EmcPdEx2Rd                         = 0x00000008;
+SDRAM[1].EmcPChg2Pden                       = 0x00000001;
+SDRAM[1].EmcAct2Pden                        = 0x00000000;
+SDRAM[1].EmcAr2Pden                         = 0x00000007;
+SDRAM[1].EmcRw2Pden                         = 0x0000000f;
+SDRAM[1].EmcTxsr                            = 0x00000040;
+SDRAM[1].EmcTcke                            = 0x00000004;
+SDRAM[1].EmcTfaw                            = 0x0000000c;
+SDRAM[1].EmcTrpab                           = 0x00000000;
+SDRAM[1].EmcTClkStable                      = 0x00000004;
+SDRAM[1].EmcTClkStop                        = 0x00000005;
+SDRAM[1].EmcTRefBw                          = 0x00000b6d;
+SDRAM[1].EmcFbioCfg5                        = 0x00007088;
+SDRAM[1].EmcFbioCfg6                        = 0x00000006;
+SDRAM[1].EmcFbioSpare                       = 0xd8000000;
+SDRAM[1].EmcMrsResetDllWait                 = 0x00000000;
+SDRAM[1].EmcMrsResetDll                     = 0x00000000;
+SDRAM[1].EmcMrsDdr2DllReset                 = 0x00000000;
+SDRAM[1].EmcMrs                             = 0x80000521;
+SDRAM[1].EmcEmrsEmr2                        = 0x80200000;
+SDRAM[1].EmcEmrsEmr3                        = 0x80300000;
+SDRAM[1].EmcEmrsDdr2DllEnable               = 0x00000000;
+SDRAM[1].EmcEmrsDdr2OcdCalib                = 0x00000000;
+SDRAM[1].EmcEmrs                            = 0x80100002;
+SDRAM[1].EmcMrw1                            = 0x00000000;
+SDRAM[1].EmcMrw2                            = 0x00000000;
+SDRAM[1].EmcMrw3                            = 0x00000000;
+SDRAM[1].EmcMrwResetCommand                 = 0x00000000;
+SDRAM[1].EmcMrwResetNInitWait               = 0x00000000;
+SDRAM[1].EmcAdrCfg                          = 0x00000000;
+SDRAM[1].McEmemCfg                          = 0x00000400;
+SDRAM[1].EmcCfg2                            = 0x000c0099;
+SDRAM[1].EmcCfgDigDll                       = 0x00200084;
+SDRAM[1].EmcCfgDigDllPeriod                 = 0x00008000;
+SDRAM[1].EmcCfg                             = 0x23c00000;
+SDRAM[1].EmcDbg                             = 0x01000400;
+SDRAM[1].WarmBootWait                       = 0x00000002;
+SDRAM[1].EmcCttTermCtrl                     = 0x00000802;
+SDRAM[1].EmcOdtWrite                        = 0x00000000;
+SDRAM[1].EmcOdtRead                         = 0x00000000;
+SDRAM[1].EmcZcalWaitCnt                     = 0x00000040;
+SDRAM[1].EmcZcalMrwCmd                      = 0x80000000;
+SDRAM[1].EmcDdr2Wait                        = 0x00000000;
+SDRAM[1].PmcDdrPwr                          = 0x00000003;
+SDRAM[1].EmcClockSource                     = 0x00000000;
+SDRAM[1].EmcClockUsePllMUD                  = 0x00000000;
+SDRAM[1].EmcPinExtraWait                    = 0x00000000;
+SDRAM[1].EmcTimingControlWait               = 0x00000000;
+SDRAM[1].EmcWext                            = 0x00000000;
+SDRAM[1].EmcCtt                             = 0x00000000;
+SDRAM[1].EmcCttDuration                     = 0x00000000;
+SDRAM[1].EmcPreRefreshReqCnt                = 0x000002cb;
+SDRAM[1].EmcTxsrDll                         = 0x00000200;
+SDRAM[1].EmcCfgRsv                          = 0xff00ff89;
+SDRAM[1].EmcMrwExtra                        = 0x00000000;
+SDRAM[1].EmcWarmBootMrw1                    = 0x00000000;
+SDRAM[1].EmcWarmBootMrw2                    = 0x00000000;
+SDRAM[1].EmcWarmBootMrw3                    = 0x00000000;
+SDRAM[1].EmcWarmBootMrwExtra                = 0x00000000;
+SDRAM[1].EmcWarmBootExtraModeRegWriteEnable = 0x00000000;
+SDRAM[1].EmcExtraModeRegWriteEnable         = 0x00000000;
+SDRAM[1].EmcMrsWaitCnt                      = 0x0184000c;
+SDRAM[1].EmcCmdQ                            = 0x10004408;
+SDRAM[1].EmcMc2EmcQ                         = 0x06000404;
+SDRAM[1].EmcDynSelfRefControl               = 0x8000174b;
+SDRAM[1].AhbArbitrationXbarCtrlMemInitDone  = 0x00000001;
+SDRAM[1].EmcDevSelect                       = 0x00000002;
+SDRAM[1].EmcSelDpdCtrl                      = 0x0004032c;
+SDRAM[1].EmcDllXformDqs0                    = 0x0003c000;
+SDRAM[1].EmcDllXformDqs1                    = 0x0003c000;
+SDRAM[1].EmcDllXformDqs2                    = 0x0003c000;
+SDRAM[1].EmcDllXformDqs3                    = 0x0003c000;
+SDRAM[1].EmcDllXformDqs4                    = 0x0003c000;
+SDRAM[1].EmcDllXformDqs5                    = 0x0003c000;
+SDRAM[1].EmcDllXformDqs6                    = 0x0003c000;
+SDRAM[1].EmcDllXformDqs7                    = 0x0003c000;
+SDRAM[1].EmcDllXformQUse0                   = 0x00000000;
+SDRAM[1].EmcDllXformQUse1                   = 0x00000000;
+SDRAM[1].EmcDllXformQUse2                   = 0x00000000;
+SDRAM[1].EmcDllXformQUse3                   = 0x00000000;
+SDRAM[1].EmcDllXformQUse4                   = 0x00000000;
+SDRAM[1].EmcDllXformQUse5                   = 0x00000000;
+SDRAM[1].EmcDllXformQUse6                   = 0x00000000;
+SDRAM[1].EmcDllXformQUse7                   = 0x00000000;
+SDRAM[1].EmcDliTrimTxDqs0                   = 0x00000000;
+SDRAM[1].EmcDliTrimTxDqs1                   = 0x00000000;
+SDRAM[1].EmcDliTrimTxDqs2                   = 0x00000000;
+SDRAM[1].EmcDliTrimTxDqs3                   = 0x00000000;
+SDRAM[1].EmcDliTrimTxDqs4                   = 0x00000000;
+SDRAM[1].EmcDliTrimTxDqs5                   = 0x00000000;
+SDRAM[1].EmcDliTrimTxDqs6                   = 0x00000000;
+SDRAM[1].EmcDliTrimTxDqs7                   = 0x00000000;
+SDRAM[1].EmcDllXformDq0                     = 0x00040000;
+SDRAM[1].EmcDllXformDq1                     = 0x00040000;
+SDRAM[1].EmcDllXformDq2                     = 0x00040000;
+SDRAM[1].EmcDllXformDq3                     = 0x00040000;
+SDRAM[1].EmcZcalInterval                    = 0x00020000;
+SDRAM[1].EmcZcalInitDev0                    = 0x80000011;
+SDRAM[1].EmcZcalInitDev1                    = 0x00000000;
+SDRAM[1].EmcZcalInitWait                    = 0x00000002;
+SDRAM[1].EmcZcalColdBootEnable              = 0x00000001;
+SDRAM[1].EmcZcalWarmBootEnable              = 0x00000001;
+SDRAM[1].EmcMrwLpddr2ZcalWarmBoot           = 0x000a00ab;
+SDRAM[1].EmcZqCalDdr3WarmBoot               = 0x00000011;
+SDRAM[1].EmcZcalWarmBootWait                = 0x00000001;
+SDRAM[1].EmcMrsWarmBootEnable               = 0x00000001;
+SDRAM[1].EmcMrsExtra                        = 0x80000521;
+SDRAM[1].EmcWarmBootMrs                     = 0x80100002;
+SDRAM[1].EmcWarmBootEmrs                    = 0x80000521;
+SDRAM[1].EmcWarmBootEmr2                    = 0x80200000;
+SDRAM[1].EmcWarmBootEmr3                    = 0x80300000;
+SDRAM[1].EmcWarmBootMrsExtra                = 0x80100002;
+SDRAM[1].EmcClkenOverride                   = 0x00000000;
+SDRAM[1].EmcExtraRefreshNum                 = 0x00000002;
+SDRAM[1].EmcClkenOverrideAllWarmBoot        = 0x00000000;
+SDRAM[1].McClkenOverrideAllWarmBoot         = 0x00000000;
+SDRAM[1].EmcCfgDigDllPeriodWarmBoot         = 0x00000003;
+SDRAM[1].PmcVddpSel                         = 0x00000002;
+SDRAM[1].PmcDdrCfg                          = 0x00000002;
+SDRAM[1].PmcIoDpdReq                        = 0x80800000;
+SDRAM[1].PmcENoVttGen                       = 0x00000000;
+SDRAM[1].PmcNoIoPower                       = 0x00000000;
+SDRAM[1].EmcXm2CmdPadCtrl                   = 0x000002a0;
+SDRAM[1].EmcXm2CmdPadCtrl2                  = 0x770c0000;
+SDRAM[1].EmcXm2DqsPadCtrl                   = 0x770c1414;
+SDRAM[1].EmcXm2DqsPadCtrl2                  = 0x0800013d;
+SDRAM[1].EmcXm2DqsPadCtrl3                  = 0x08000021;
+SDRAM[1].EmcXm2DqPadCtrl                    = 0x770c2990;
+SDRAM[1].EmcXm2DqPadCtrl2                   = 0x00000000;
+SDRAM[1].EmcXm2ClkPadCtrl                   = 0x77fff884;
+SDRAM[1].EmcXm2CompPadCtrl                  = 0x01f1f508;
+SDRAM[1].EmcXm2VttGenPadCtrl                = 0x05057404;
+SDRAM[1].EmcXm2VttGenPadCtrl2               = 0x54000007;
+SDRAM[1].EmcXm2QUsePadCtrl                  = 0x080001e8;
+SDRAM[1].McEmemAdrCfg                       = 0x00000000;
+SDRAM[1].McEmemAdrCfgDev0                   = 0x00080303;
+SDRAM[1].McEmemAdrCfgDev1                   = 0x00080303;
+SDRAM[1].McEmemArbCfg                       = 0x0000000b;
+SDRAM[1].McEmemArbOutstandingReq            = 0xc0000044;
+SDRAM[1].McEmemArbTimingRcd                 = 0x00000001;
+SDRAM[1].McEmemArbTimingRp                  = 0x00000002;
+SDRAM[1].McEmemArbTimingRc                  = 0x00000009;
+SDRAM[1].McEmemArbTimingRas                 = 0x00000005;
+SDRAM[1].McEmemArbTimingFaw                 = 0x00000005;
+SDRAM[1].McEmemArbTimingRrd                 = 0x00000001;
+SDRAM[1].McEmemArbTimingRap2Pre             = 0x00000002;
+SDRAM[1].McEmemArbTimingWap2Pre             = 0x00000008;
+SDRAM[1].McEmemArbTimingR2R                 = 0x00000002;
+SDRAM[1].McEmemArbTimingW2W                 = 0x00000002;
+SDRAM[1].McEmemArbTimingR2W                 = 0x00000003;
+SDRAM[1].McEmemArbTimingW2R                 = 0x00000006;
+SDRAM[1].McEmemArbDaTurns                   = 0x06030202;
+SDRAM[1].McEmemArbDaCovers                  = 0x000d0709;
+SDRAM[1].McEmemArbMisc0                     = 0x7086110a;
+SDRAM[1].McEmemArbMisc1                     = 0x78000000;
+SDRAM[1].McEmemArbRing1Throttle             = 0x001f0000;
+SDRAM[1].McEmemArbOverride                  = 0x00000080;
+SDRAM[1].McEmemArbRsv                       = 0xff00ff00;
+SDRAM[1].McClkenOverride                    = 0x00000000;
+
+SDRAM[2].MemoryType                         = NvBootMemoryType_Ddr3;
+SDRAM[2].PllMChargePumpSetupControl         = 0x00000008;
+SDRAM[2].PllMLoopFilterSetupControl         = 0x00000000;
+SDRAM[2].PllMInputDivider                   = 0x0000000c;
+SDRAM[2].PllMFeedbackDivider                = 0x000002ee;
+SDRAM[2].PllMPostDivider                    = 0x00000000;
+SDRAM[2].PllMStableTime                     = 0x0000012c;
+SDRAM[2].EmcClockDivider                    = 0x00000002;
+SDRAM[2].EmcAutoCalInterval                 = 0x001fffff;
+SDRAM[2].EmcAutoCalConfig                   = 0xa0f10000;
+SDRAM[2].EmcAutoCalWait                     = 0x00000064;
+SDRAM[2].EmcPinProgramWait                  = 0x00000001;
+SDRAM[2].EmcRc                              = 0x00000011;
+SDRAM[2].EmcRfc                             = 0x0000003a;
+SDRAM[2].EmcRas                             = 0x0000000c;
+SDRAM[2].EmcRp                              = 0x00000004;
+SDRAM[2].EmcR2w                             = 0x00000003;
+SDRAM[2].EmcW2r                             = 0x00000008;
+SDRAM[2].EmcR2p                             = 0x00000002;
+SDRAM[2].EmcW2p                             = 0x0000000a;
+SDRAM[2].EmcRrd                             = 0x00000002;
+SDRAM[2].EmcRdRcd                           = 0x00000004;
+SDRAM[2].EmcWrRcd                           = 0x00000004;
+SDRAM[2].EmcRext                            = 0x00000001;
+SDRAM[2].EmcWdv                             = 0x00000004;
+SDRAM[2].EmcQUseExtra                       = 0x00000000;
+SDRAM[2].EmcQUse                            = 0x00000006;
+SDRAM[2].EmcQRst                            = 0x00000004;
+SDRAM[2].EmcQSafe                           = 0x00000008;
+SDRAM[2].EmcRdv                             = 0x0000000d;
+SDRAM[2].EmcRefresh                         = 0x00000b2d;
+SDRAM[2].EmcBurstRefreshNum                 = 0x00000000;
+SDRAM[2].EmcPdEx2Wr                         = 0x00000001;
+SDRAM[2].EmcPdEx2Rd                         = 0x00000008;
+SDRAM[2].EmcPChg2Pden                       = 0x00000001;
+SDRAM[2].EmcAct2Pden                        = 0x00000000;
+SDRAM[2].EmcAr2Pden                         = 0x00000007;
+SDRAM[2].EmcRw2Pden                         = 0x0000000f;
+SDRAM[2].EmcTxsr                            = 0x00000040;
+SDRAM[2].EmcTcke                            = 0x00000004;
+SDRAM[2].EmcTfaw                            = 0x0000000c;
+SDRAM[2].EmcTrpab                           = 0x00000000;
+SDRAM[2].EmcTClkStable                      = 0x00000004;
+SDRAM[2].EmcTClkStop                        = 0x00000005;
+SDRAM[2].EmcTRefBw                          = 0x00000b6d;
+SDRAM[2].EmcFbioCfg5                        = 0x00007088;
+SDRAM[2].EmcFbioCfg6                        = 0x00000006;
+SDRAM[2].EmcFbioSpare                       = 0xd8000000;
+SDRAM[2].EmcMrsResetDllWait                 = 0x00000000;
+SDRAM[2].EmcMrsResetDll                     = 0x00000000;
+SDRAM[2].EmcMrsDdr2DllReset                 = 0x00000000;
+SDRAM[2].EmcMrs                             = 0x80000521;
+SDRAM[2].EmcEmrsEmr2                        = 0x80200000;
+SDRAM[2].EmcEmrsEmr3                        = 0x80300000;
+SDRAM[2].EmcEmrsDdr2DllEnable               = 0x00000000;
+SDRAM[2].EmcEmrsDdr2OcdCalib                = 0x00000000;
+SDRAM[2].EmcEmrs                            = 0x80100002;
+SDRAM[2].EmcMrw1                            = 0x00000000;
+SDRAM[2].EmcMrw2                            = 0x00000000;
+SDRAM[2].EmcMrw3                            = 0x00000000;
+SDRAM[2].EmcMrwResetCommand                 = 0x00000000;
+SDRAM[2].EmcMrwResetNInitWait               = 0x00000000;
+SDRAM[2].EmcAdrCfg                          = 0x00000000;
+SDRAM[2].McEmemCfg                          = 0x00000400;
+SDRAM[2].EmcCfg2                            = 0x000c0099;
+SDRAM[2].EmcCfgDigDll                       = 0x00200084;
+SDRAM[2].EmcCfgDigDllPeriod                 = 0x00008000;
+SDRAM[2].EmcCfg                             = 0x23c00000;
+SDRAM[2].EmcDbg                             = 0x01000400;
+SDRAM[2].WarmBootWait                       = 0x00000002;
+SDRAM[2].EmcCttTermCtrl                     = 0x00000802;
+SDRAM[2].EmcOdtWrite                        = 0x00000000;
+SDRAM[2].EmcOdtRead                         = 0x00000000;
+SDRAM[2].EmcZcalWaitCnt                     = 0x00000040;
+SDRAM[2].EmcZcalMrwCmd                      = 0x80000000;
+SDRAM[2].EmcDdr2Wait                        = 0x00000000;
+SDRAM[2].PmcDdrPwr                          = 0x00000003;
+SDRAM[2].EmcClockSource                     = 0x00000000;
+SDRAM[2].EmcClockUsePllMUD                  = 0x00000000;
+SDRAM[2].EmcPinExtraWait                    = 0x00000000;
+SDRAM[2].EmcTimingControlWait               = 0x00000000;
+SDRAM[2].EmcWext                            = 0x00000000;
+SDRAM[2].EmcCtt                             = 0x00000000;
+SDRAM[2].EmcCttDuration                     = 0x00000000;
+SDRAM[2].EmcPreRefreshReqCnt                = 0x000002cb;
+SDRAM[2].EmcTxsrDll                         = 0x00000200;
+SDRAM[2].EmcCfgRsv                          = 0xff00ff89;
+SDRAM[2].EmcMrwExtra                        = 0x00000000;
+SDRAM[2].EmcWarmBootMrw1                    = 0x00000000;
+SDRAM[2].EmcWarmBootMrw2                    = 0x00000000;
+SDRAM[2].EmcWarmBootMrw3                    = 0x00000000;
+SDRAM[2].EmcWarmBootMrwExtra                = 0x00000000;
+SDRAM[2].EmcWarmBootExtraModeRegWriteEnable = 0x00000000;
+SDRAM[2].EmcExtraModeRegWriteEnable         = 0x00000000;
+SDRAM[2].EmcMrsWaitCnt                      = 0x0184000c;
+SDRAM[2].EmcCmdQ                            = 0x10004408;
+SDRAM[2].EmcMc2EmcQ                         = 0x06000404;
+SDRAM[2].EmcDynSelfRefControl               = 0x8000174b;
+SDRAM[2].AhbArbitrationXbarCtrlMemInitDone  = 0x00000001;
+SDRAM[2].EmcDevSelect                       = 0x00000002;
+SDRAM[2].EmcSelDpdCtrl                      = 0x0004032c;
+SDRAM[2].EmcDllXformDqs0                    = 0x0003c000;
+SDRAM[2].EmcDllXformDqs1                    = 0x0003c000;
+SDRAM[2].EmcDllXformDqs2                    = 0x0003c000;
+SDRAM[2].EmcDllXformDqs3                    = 0x0003c000;
+SDRAM[2].EmcDllXformDqs4                    = 0x0003c000;
+SDRAM[2].EmcDllXformDqs5                    = 0x0003c000;
+SDRAM[2].EmcDllXformDqs6                    = 0x0003c000;
+SDRAM[2].EmcDllXformDqs7                    = 0x0003c000;
+SDRAM[2].EmcDllXformQUse0                   = 0x00000000;
+SDRAM[2].EmcDllXformQUse1                   = 0x00000000;
+SDRAM[2].EmcDllXformQUse2                   = 0x00000000;
+SDRAM[2].EmcDllXformQUse3                   = 0x00000000;
+SDRAM[2].EmcDllXformQUse4                   = 0x00000000;
+SDRAM[2].EmcDllXformQUse5                   = 0x00000000;
+SDRAM[2].EmcDllXformQUse6                   = 0x00000000;
+SDRAM[2].EmcDllXformQUse7                   = 0x00000000;
+SDRAM[2].EmcDliTrimTxDqs0                   = 0x00000000;
+SDRAM[2].EmcDliTrimTxDqs1                   = 0x00000000;
+SDRAM[2].EmcDliTrimTxDqs2                   = 0x00000000;
+SDRAM[2].EmcDliTrimTxDqs3                   = 0x00000000;
+SDRAM[2].EmcDliTrimTxDqs4                   = 0x00000000;
+SDRAM[2].EmcDliTrimTxDqs5                   = 0x00000000;
+SDRAM[2].EmcDliTrimTxDqs6                   = 0x00000000;
+SDRAM[2].EmcDliTrimTxDqs7                   = 0x00000000;
+SDRAM[2].EmcDllXformDq0                     = 0x00040000;
+SDRAM[2].EmcDllXformDq1                     = 0x00040000;
+SDRAM[2].EmcDllXformDq2                     = 0x00040000;
+SDRAM[2].EmcDllXformDq3                     = 0x00040000;
+SDRAM[2].EmcZcalInterval                    = 0x00020000;
+SDRAM[2].EmcZcalInitDev0                    = 0x80000011;
+SDRAM[2].EmcZcalInitDev1                    = 0x00000000;
+SDRAM[2].EmcZcalInitWait                    = 0x00000002;
+SDRAM[2].EmcZcalColdBootEnable              = 0x00000001;
+SDRAM[2].EmcZcalWarmBootEnable              = 0x00000001;
+SDRAM[2].EmcMrwLpddr2ZcalWarmBoot           = 0x000a00ab;
+SDRAM[2].EmcZqCalDdr3WarmBoot               = 0x00000011;
+SDRAM[2].EmcZcalWarmBootWait                = 0x00000001;
+SDRAM[2].EmcMrsWarmBootEnable               = 0x00000001;
+SDRAM[2].EmcMrsExtra                        = 0x80000521;
+SDRAM[2].EmcWarmBootMrs                     = 0x80100002;
+SDRAM[2].EmcWarmBootEmrs                    = 0x80000521;
+SDRAM[2].EmcWarmBootEmr2                    = 0x80200000;
+SDRAM[2].EmcWarmBootEmr3                    = 0x80300000;
+SDRAM[2].EmcWarmBootMrsExtra                = 0x80100002;
+SDRAM[2].EmcClkenOverride                   = 0x00000000;
+SDRAM[2].EmcExtraRefreshNum                 = 0x00000002;
+SDRAM[2].EmcClkenOverrideAllWarmBoot        = 0x00000000;
+SDRAM[2].McClkenOverrideAllWarmBoot         = 0x00000000;
+SDRAM[2].EmcCfgDigDllPeriodWarmBoot         = 0x00000003;
+SDRAM[2].PmcVddpSel                         = 0x00000002;
+SDRAM[2].PmcDdrCfg                          = 0x00000002;
+SDRAM[2].PmcIoDpdReq                        = 0x80800000;
+SDRAM[2].PmcENoVttGen                       = 0x00000000;
+SDRAM[2].PmcNoIoPower                       = 0x00000000;
+SDRAM[2].EmcXm2CmdPadCtrl                   = 0x000002a0;
+SDRAM[2].EmcXm2CmdPadCtrl2                  = 0x770c0000;
+SDRAM[2].EmcXm2DqsPadCtrl                   = 0x770c1414;
+SDRAM[2].EmcXm2DqsPadCtrl2                  = 0x0800013d;
+SDRAM[2].EmcXm2DqsPadCtrl3                  = 0x08000021;
+SDRAM[2].EmcXm2DqPadCtrl                    = 0x770c2990;
+SDRAM[2].EmcXm2DqPadCtrl2                   = 0x00000000;
+SDRAM[2].EmcXm2ClkPadCtrl                   = 0x77fff884;
+SDRAM[2].EmcXm2CompPadCtrl                  = 0x01f1f508;
+SDRAM[2].EmcXm2VttGenPadCtrl                = 0x05057404;
+SDRAM[2].EmcXm2VttGenPadCtrl2               = 0x54000007;
+SDRAM[2].EmcXm2QUsePadCtrl                  = 0x080001e8;
+SDRAM[2].McEmemAdrCfg                       = 0x00000000;
+SDRAM[2].McEmemAdrCfgDev0                   = 0x00080303;
+SDRAM[2].McEmemAdrCfgDev1                   = 0x00080303;
+SDRAM[2].McEmemArbCfg                       = 0x0000000b;
+SDRAM[2].McEmemArbOutstandingReq            = 0xc0000044;
+SDRAM[2].McEmemArbTimingRcd                 = 0x00000001;
+SDRAM[2].McEmemArbTimingRp                  = 0x00000002;
+SDRAM[2].McEmemArbTimingRc                  = 0x00000009;
+SDRAM[2].McEmemArbTimingRas                 = 0x00000005;
+SDRAM[2].McEmemArbTimingFaw                 = 0x00000005;
+SDRAM[2].McEmemArbTimingRrd                 = 0x00000001;
+SDRAM[2].McEmemArbTimingRap2Pre             = 0x00000002;
+SDRAM[2].McEmemArbTimingWap2Pre             = 0x00000008;
+SDRAM[2].McEmemArbTimingR2R                 = 0x00000002;
+SDRAM[2].McEmemArbTimingW2W                 = 0x00000002;
+SDRAM[2].McEmemArbTimingR2W                 = 0x00000003;
+SDRAM[2].McEmemArbTimingW2R                 = 0x00000006;
+SDRAM[2].McEmemArbDaTurns                   = 0x06030202;
+SDRAM[2].McEmemArbDaCovers                  = 0x000d0709;
+SDRAM[2].McEmemArbMisc0                     = 0x7086110a;
+SDRAM[2].McEmemArbMisc1                     = 0x78000000;
+SDRAM[2].McEmemArbRing1Throttle             = 0x001f0000;
+SDRAM[2].McEmemArbOverride                  = 0x00000080;
+SDRAM[2].McEmemArbRsv                       = 0xff00ff00;
+SDRAM[2].McClkenOverride                    = 0x00000000;
+
+SDRAM[3].MemoryType                         = NvBootMemoryType_Ddr3;
+SDRAM[3].PllMChargePumpSetupControl         = 0x00000008;
+SDRAM[3].PllMLoopFilterSetupControl         = 0x00000000;
+SDRAM[3].PllMInputDivider                   = 0x0000000c;
+SDRAM[3].PllMFeedbackDivider                = 0x000002ee;
+SDRAM[3].PllMPostDivider                    = 0x00000000;
+SDRAM[3].PllMStableTime                     = 0x0000012c;
+SDRAM[3].EmcClockDivider                    = 0x00000002;
+SDRAM[3].EmcAutoCalInterval                 = 0x001fffff;
+SDRAM[3].EmcAutoCalConfig                   = 0xa0f10000;
+SDRAM[3].EmcAutoCalWait                     = 0x00000064;
+SDRAM[3].EmcPinProgramWait                  = 0x00000001;
+SDRAM[3].EmcRc                              = 0x00000011;
+SDRAM[3].EmcRfc                             = 0x0000003a;
+SDRAM[3].EmcRas                             = 0x0000000c;
+SDRAM[3].EmcRp                              = 0x00000004;
+SDRAM[3].EmcR2w                             = 0x00000003;
+SDRAM[3].EmcW2r                             = 0x00000008;
+SDRAM[3].EmcR2p                             = 0x00000002;
+SDRAM[3].EmcW2p                             = 0x0000000a;
+SDRAM[3].EmcRrd                             = 0x00000002;
+SDRAM[3].EmcRdRcd                           = 0x00000004;
+SDRAM[3].EmcWrRcd                           = 0x00000004;
+SDRAM[3].EmcRext                            = 0x00000001;
+SDRAM[3].EmcWdv                             = 0x00000004;
+SDRAM[3].EmcQUseExtra                       = 0x00000000;
+SDRAM[3].EmcQUse                            = 0x00000006;
+SDRAM[3].EmcQRst                            = 0x00000004;
+SDRAM[3].EmcQSafe                           = 0x00000008;
+SDRAM[3].EmcRdv                             = 0x0000000d;
+SDRAM[3].EmcRefresh                         = 0x00000b2d;
+SDRAM[3].EmcBurstRefreshNum                 = 0x00000000;
+SDRAM[3].EmcPdEx2Wr                         = 0x00000001;
+SDRAM[3].EmcPdEx2Rd                         = 0x00000008;
+SDRAM[3].EmcPChg2Pden                       = 0x00000001;
+SDRAM[3].EmcAct2Pden                        = 0x00000000;
+SDRAM[3].EmcAr2Pden                         = 0x00000007;
+SDRAM[3].EmcRw2Pden                         = 0x0000000f;
+SDRAM[3].EmcTxsr                            = 0x00000040;
+SDRAM[3].EmcTcke                            = 0x00000004;
+SDRAM[3].EmcTfaw                            = 0x0000000c;
+SDRAM[3].EmcTrpab                           = 0x00000000;
+SDRAM[3].EmcTClkStable                      = 0x00000004;
+SDRAM[3].EmcTClkStop                        = 0x00000005;
+SDRAM[3].EmcTRefBw                          = 0x00000b6d;
+SDRAM[3].EmcFbioCfg5                        = 0x00007088;
+SDRAM[3].EmcFbioCfg6                        = 0x00000006;
+SDRAM[3].EmcFbioSpare                       = 0xd8000000;
+SDRAM[3].EmcMrsResetDllWait                 = 0x00000000;
+SDRAM[3].EmcMrsResetDll                     = 0x00000000;
+SDRAM[3].EmcMrsDdr2DllReset                 = 0x00000000;
+SDRAM[3].EmcMrs                             = 0x80000521;
+SDRAM[3].EmcEmrsEmr2                        = 0x80200000;
+SDRAM[3].EmcEmrsEmr3                        = 0x80300000;
+SDRAM[3].EmcEmrsDdr2DllEnable               = 0x00000000;
+SDRAM[3].EmcEmrsDdr2OcdCalib                = 0x00000000;
+SDRAM[3].EmcEmrs                            = 0x80100002;
+SDRAM[3].EmcMrw1                            = 0x00000000;
+SDRAM[3].EmcMrw2                            = 0x00000000;
+SDRAM[3].EmcMrw3                            = 0x00000000;
+SDRAM[3].EmcMrwResetCommand                 = 0x00000000;
+SDRAM[3].EmcMrwResetNInitWait               = 0x00000000;
+SDRAM[3].EmcAdrCfg                          = 0x00000000;
+SDRAM[3].McEmemCfg                          = 0x00000400;
+SDRAM[3].EmcCfg2                            = 0x000c0099;
+SDRAM[3].EmcCfgDigDll                       = 0x00200084;
+SDRAM[3].EmcCfgDigDllPeriod                 = 0x00008000;
+SDRAM[3].EmcCfg                             = 0x23c00000;
+SDRAM[3].EmcDbg                             = 0x01000400;
+SDRAM[3].WarmBootWait                       = 0x00000002;
+SDRAM[3].EmcCttTermCtrl                     = 0x00000802;
+SDRAM[3].EmcOdtWrite                        = 0x00000000;
+SDRAM[3].EmcOdtRead                         = 0x00000000;
+SDRAM[3].EmcZcalWaitCnt                     = 0x00000040;
+SDRAM[3].EmcZcalMrwCmd                      = 0x80000000;
+SDRAM[3].EmcDdr2Wait                        = 0x00000000;
+SDRAM[3].PmcDdrPwr                          = 0x00000003;
+SDRAM[3].EmcClockSource                     = 0x00000000;
+SDRAM[3].EmcClockUsePllMUD                  = 0x00000000;
+SDRAM[3].EmcPinExtraWait                    = 0x00000000;
+SDRAM[3].EmcTimingControlWait               = 0x00000000;
+SDRAM[3].EmcWext                            = 0x00000000;
+SDRAM[3].EmcCtt                             = 0x00000000;
+SDRAM[3].EmcCttDuration                     = 0x00000000;
+SDRAM[3].EmcPreRefreshReqCnt                = 0x000002cb;
+SDRAM[3].EmcTxsrDll                         = 0x00000200;
+SDRAM[3].EmcCfgRsv                          = 0xff00ff89;
+SDRAM[3].EmcMrwExtra                        = 0x00000000;
+SDRAM[3].EmcWarmBootMrw1                    = 0x00000000;
+SDRAM[3].EmcWarmBootMrw2                    = 0x00000000;
+SDRAM[3].EmcWarmBootMrw3                    = 0x00000000;
+SDRAM[3].EmcWarmBootMrwExtra                = 0x00000000;
+SDRAM[3].EmcWarmBootExtraModeRegWriteEnable = 0x00000000;
+SDRAM[3].EmcExtraModeRegWriteEnable         = 0x00000000;
+SDRAM[3].EmcMrsWaitCnt                      = 0x0184000c;
+SDRAM[3].EmcCmdQ                            = 0x10004408;
+SDRAM[3].EmcMc2EmcQ                         = 0x06000404;
+SDRAM[3].EmcDynSelfRefControl               = 0x8000174b;
+SDRAM[3].AhbArbitrationXbarCtrlMemInitDone  = 0x00000001;
+SDRAM[3].EmcDevSelect                       = 0x00000002;
+SDRAM[3].EmcSelDpdCtrl                      = 0x0004032c;
+SDRAM[3].EmcDllXformDqs0                    = 0x0003c000;
+SDRAM[3].EmcDllXformDqs1                    = 0x0003c000;
+SDRAM[3].EmcDllXformDqs2                    = 0x0003c000;
+SDRAM[3].EmcDllXformDqs3                    = 0x0003c000;
+SDRAM[3].EmcDllXformDqs4                    = 0x0003c000;
+SDRAM[3].EmcDllXformDqs5                    = 0x0003c000;
+SDRAM[3].EmcDllXformDqs6                    = 0x0003c000;
+SDRAM[3].EmcDllXformDqs7                    = 0x0003c000;
+SDRAM[3].EmcDllXformQUse0                   = 0x00000000;
+SDRAM[3].EmcDllXformQUse1                   = 0x00000000;
+SDRAM[3].EmcDllXformQUse2                   = 0x00000000;
+SDRAM[3].EmcDllXformQUse3                   = 0x00000000;
+SDRAM[3].EmcDllXformQUse4                   = 0x00000000;
+SDRAM[3].EmcDllXformQUse5                   = 0x00000000;
+SDRAM[3].EmcDllXformQUse6                   = 0x00000000;
+SDRAM[3].EmcDllXformQUse7                   = 0x00000000;
+SDRAM[3].EmcDliTrimTxDqs0                   = 0x00000000;
+SDRAM[3].EmcDliTrimTxDqs1                   = 0x00000000;
+SDRAM[3].EmcDliTrimTxDqs2                   = 0x00000000;
+SDRAM[3].EmcDliTrimTxDqs3                   = 0x00000000;
+SDRAM[3].EmcDliTrimTxDqs4                   = 0x00000000;
+SDRAM[3].EmcDliTrimTxDqs5                   = 0x00000000;
+SDRAM[3].EmcDliTrimTxDqs6                   = 0x00000000;
+SDRAM[3].EmcDliTrimTxDqs7                   = 0x00000000;
+SDRAM[3].EmcDllXformDq0                     = 0x00040000;
+SDRAM[3].EmcDllXformDq1                     = 0x00040000;
+SDRAM[3].EmcDllXformDq2                     = 0x00040000;
+SDRAM[3].EmcDllXformDq3                     = 0x00040000;
+SDRAM[3].EmcZcalInterval                    = 0x00020000;
+SDRAM[3].EmcZcalInitDev0                    = 0x80000011;
+SDRAM[3].EmcZcalInitDev1                    = 0x00000000;
+SDRAM[3].EmcZcalInitWait                    = 0x00000002;
+SDRAM[3].EmcZcalColdBootEnable              = 0x00000001;
+SDRAM[3].EmcZcalWarmBootEnable              = 0x00000001;
+SDRAM[3].EmcMrwLpddr2ZcalWarmBoot           = 0x000a00ab;
+SDRAM[3].EmcZqCalDdr3WarmBoot               = 0x00000011;
+SDRAM[3].EmcZcalWarmBootWait                = 0x00000001;
+SDRAM[3].EmcMrsWarmBootEnable               = 0x00000001;
+SDRAM[3].EmcMrsExtra                        = 0x80000521;
+SDRAM[3].EmcWarmBootMrs                     = 0x80100002;
+SDRAM[3].EmcWarmBootEmrs                    = 0x80000521;
+SDRAM[3].EmcWarmBootEmr2                    = 0x80200000;
+SDRAM[3].EmcWarmBootEmr3                    = 0x80300000;
+SDRAM[3].EmcWarmBootMrsExtra                = 0x80100002;
+SDRAM[3].EmcClkenOverride                   = 0x00000000;
+SDRAM[3].EmcExtraRefreshNum                 = 0x00000002;
+SDRAM[3].EmcClkenOverrideAllWarmBoot        = 0x00000000;
+SDRAM[3].McClkenOverrideAllWarmBoot         = 0x00000000;
+SDRAM[3].EmcCfgDigDllPeriodWarmBoot         = 0x00000003;
+SDRAM[3].PmcVddpSel                         = 0x00000002;
+SDRAM[3].PmcDdrCfg                          = 0x00000002;
+SDRAM[3].PmcIoDpdReq                        = 0x80800000;
+SDRAM[3].PmcENoVttGen                       = 0x00000000;
+SDRAM[3].PmcNoIoPower                       = 0x00000000;
+SDRAM[3].EmcXm2CmdPadCtrl                   = 0x000002a0;
+SDRAM[3].EmcXm2CmdPadCtrl2                  = 0x770c0000;
+SDRAM[3].EmcXm2DqsPadCtrl                   = 0x770c1414;
+SDRAM[3].EmcXm2DqsPadCtrl2                  = 0x0800013d;
+SDRAM[3].EmcXm2DqsPadCtrl3                  = 0x08000021;
+SDRAM[3].EmcXm2DqPadCtrl                    = 0x770c2990;
+SDRAM[3].EmcXm2DqPadCtrl2                   = 0x00000000;
+SDRAM[3].EmcXm2ClkPadCtrl                   = 0x77fff884;
+SDRAM[3].EmcXm2CompPadCtrl                  = 0x01f1f508;
+SDRAM[3].EmcXm2VttGenPadCtrl                = 0x05057404;
+SDRAM[3].EmcXm2VttGenPadCtrl2               = 0x54000007;
+SDRAM[3].EmcXm2QUsePadCtrl                  = 0x080001e8;
+SDRAM[3].McEmemAdrCfg                       = 0x00000000;
+SDRAM[3].McEmemAdrCfgDev0                   = 0x00080303;
+SDRAM[3].McEmemAdrCfgDev1                   = 0x00080303;
+SDRAM[3].McEmemArbCfg                       = 0x0000000b;
+SDRAM[3].McEmemArbOutstandingReq            = 0xc0000044;
+SDRAM[3].McEmemArbTimingRcd                 = 0x00000001;
+SDRAM[3].McEmemArbTimingRp                  = 0x00000002;
+SDRAM[3].McEmemArbTimingRc                  = 0x00000009;
+SDRAM[3].McEmemArbTimingRas                 = 0x00000005;
+SDRAM[3].McEmemArbTimingFaw                 = 0x00000005;
+SDRAM[3].McEmemArbTimingRrd                 = 0x00000001;
+SDRAM[3].McEmemArbTimingRap2Pre             = 0x00000002;
+SDRAM[3].McEmemArbTimingWap2Pre             = 0x00000008;
+SDRAM[3].McEmemArbTimingR2R                 = 0x00000002;
+SDRAM[3].McEmemArbTimingW2W                 = 0x00000002;
+SDRAM[3].McEmemArbTimingR2W                 = 0x00000003;
+SDRAM[3].McEmemArbTimingW2R                 = 0x00000006;
+SDRAM[3].McEmemArbDaTurns                   = 0x06030202;
+SDRAM[3].McEmemArbDaCovers                  = 0x000d0709;
+SDRAM[3].McEmemArbMisc0                     = 0x7086110a;
+SDRAM[3].McEmemArbMisc1                     = 0x78000000;
+SDRAM[3].McEmemArbRing1Throttle             = 0x001f0000;
+SDRAM[3].McEmemArbOverride                  = 0x00000080;
+SDRAM[3].McEmemArbRsv                       = 0xff00ff00;
+SDRAM[3].McClkenOverride                    = 0x00000000;
diff --git a/cardhu/E1198_Hynix_2GB_H5TC2G83BFR-PBA_667MHz_111121_317_sdmmc4_x8.bct.cfg b/cardhu/E1198_Hynix_2GB_H5TC2G83BFR-PBA_667MHz_111121_317_sdmmc4_x8.bct.cfg
new file mode 100644
index 0000000..96b8f81
--- /dev/null
+++ b/cardhu/E1198_Hynix_2GB_H5TC2G83BFR-PBA_667MHz_111121_317_sdmmc4_x8.bct.cfg
@@ -0,0 +1,819 @@
+# Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+#
+# This software is provided 'as-is', without any express or implied
+# warranty. In no event will the authors be held liable for any damages
+# arising from the use of this software.
+#
+# Permission is granted to anyone to use this software for any purpose,
+# including commercial applications, and to alter it and redistribute it
+# freely, subject to the following restrictions:
+#
+# 1. The origin of this software must not be misrepresented; you must not
+#    claim that you wrote the original software. If you use this software
+#    in a product, an acknowledgment in the product documentation would be
+#    appreciated but is not required.
+# 2. Altered source versions must be plainly marked as such, and must not be
+#    misrepresented as being the original software.
+# 3. This notice may not be removed or altered from any source distribution.
+
+Version       = 0x00030001;
+BlockSize     = 0x00004000;
+PageSize      = 0x00000200;
+PartitionSize = 0x02000000;
+OdmData       = 0x800c0000;
+
+DevType[0] = NvBootDevType_Sdmmc;
+DeviceParam[0].SdmmcParams.ClockDivider           = 0x00000009;
+DeviceParam[0].SdmmcParams.DataWidth              = NvBootSdmmcDataWidth_8Bit;
+DeviceParam[0].SdmmcParams.MaxPowerClassSupported = 0x00000000;
+DeviceParam[0].SdmmcParams.SdController           = 0x00000000;
+
+DevType[1] = NvBootDevType_Sdmmc;
+DeviceParam[1].SdmmcParams.ClockDivider           = 0x00000009;
+DeviceParam[1].SdmmcParams.DataWidth              = NvBootSdmmcDataWidth_8Bit;
+DeviceParam[1].SdmmcParams.MaxPowerClassSupported = 0x00000000;
+DeviceParam[1].SdmmcParams.SdController           = 0x00000000;
+
+DevType[2] = NvBootDevType_Sdmmc;
+DeviceParam[2].SdmmcParams.ClockDivider           = 0x00000009;
+DeviceParam[2].SdmmcParams.DataWidth              = NvBootSdmmcDataWidth_8Bit;
+DeviceParam[2].SdmmcParams.MaxPowerClassSupported = 0x00000000;
+DeviceParam[2].SdmmcParams.SdController           = 0x00000000;
+
+DevType[3] = NvBootDevType_Sdmmc;
+DeviceParam[3].SdmmcParams.ClockDivider           = 0x00000009;
+DeviceParam[3].SdmmcParams.DataWidth              = NvBootSdmmcDataWidth_8Bit;
+DeviceParam[3].SdmmcParams.MaxPowerClassSupported = 0x00000000;
+DeviceParam[3].SdmmcParams.SdController           = 0x00000000;
+
+SDRAM[0].MemoryType                         = NvBootMemoryType_Ddr3;
+SDRAM[0].PllMChargePumpSetupControl         = 0x00000008;
+SDRAM[0].PllMLoopFilterSetupControl         = 0x00000000;
+SDRAM[0].PllMInputDivider                   = 0x0000000c;
+SDRAM[0].PllMFeedbackDivider                = 0x0000029b;
+SDRAM[0].PllMPostDivider                    = 0x00000000;
+SDRAM[0].PllMStableTime                     = 0x0000012c;
+SDRAM[0].EmcClockDivider                    = 0x00000000;
+SDRAM[0].EmcAutoCalInterval                 = 0x001fffff;
+SDRAM[0].EmcAutoCalConfig                   = 0xa0f10000;
+SDRAM[0].EmcAutoCalWait                     = 0x00000064;
+SDRAM[0].EmcPinProgramWait                  = 0x00000001;
+SDRAM[0].EmcRc                              = 0x0000001f;
+SDRAM[0].EmcRfc                             = 0x00000069;
+SDRAM[0].EmcRas                             = 0x00000016;
+SDRAM[0].EmcRp                              = 0x00000008;
+SDRAM[0].EmcR2w                             = 0x00000005;
+SDRAM[0].EmcW2r                             = 0x0000000c;
+SDRAM[0].EmcR2p                             = 0x00000003;
+SDRAM[0].EmcW2p                             = 0x00000011;
+SDRAM[0].EmcRrd                             = 0x00000002;
+SDRAM[0].EmcRdRcd                           = 0x00000008;
+SDRAM[0].EmcWrRcd                           = 0x00000008;
+SDRAM[0].EmcRext                            = 0x00000001;
+SDRAM[0].EmcWdv                             = 0x00000007;
+SDRAM[0].EmcQUseExtra                       = 0x0000000c;
+SDRAM[0].EmcQUse                            = 0x0000000b;
+SDRAM[0].EmcQRst                            = 0x00000009;
+SDRAM[0].EmcQSafe                           = 0x0000000c;
+SDRAM[0].EmcRdv                             = 0x00000011;
+SDRAM[0].EmcRefresh                         = 0x00001412;
+SDRAM[0].EmcBurstRefreshNum                 = 0x00000000;
+SDRAM[0].EmcPdEx2Wr                         = 0x00000002;
+SDRAM[0].EmcPdEx2Rd                         = 0x0000000e;
+SDRAM[0].EmcPChg2Pden                       = 0x00000001;
+SDRAM[0].EmcAct2Pden                        = 0x00000000;
+SDRAM[0].EmcAr2Pden                         = 0x0000000c;
+SDRAM[0].EmcRw2Pden                         = 0x00000016;
+SDRAM[0].EmcTxsr                            = 0x00000072;
+SDRAM[0].EmcTcke                            = 0x00000005;
+SDRAM[0].EmcTfaw                            = 0x00000015;
+SDRAM[0].EmcTrpab                           = 0x00000000;
+SDRAM[0].EmcTClkStable                      = 0x00000006;
+SDRAM[0].EmcTClkStop                        = 0x00000007;
+SDRAM[0].EmcTRefBw                          = 0x00001453;
+SDRAM[0].EmcFbioCfg5                        = 0x00005088;
+SDRAM[0].EmcFbioCfg6                        = 0x00000004;
+SDRAM[0].EmcFbioSpare                       = 0xf8000000;
+SDRAM[0].EmcMrsResetDllWait                 = 0x00000000;
+SDRAM[0].EmcMrsResetDll                     = 0x00000000;
+SDRAM[0].EmcMrsDdr2DllReset                 = 0x00000000;
+SDRAM[0].EmcMrs                             = 0x00000b71;
+SDRAM[0].EmcEmrsEmr2                        = 0x00200018;
+SDRAM[0].EmcEmrsEmr3                        = 0x00300000;
+SDRAM[0].EmcEmrsDdr2DllEnable               = 0x00000000;
+SDRAM[0].EmcEmrsDdr2OcdCalib                = 0x00000000;
+SDRAM[0].EmcEmrs                            = 0x00100002;
+SDRAM[0].EmcMrw1                            = 0x00000000;
+SDRAM[0].EmcMrw2                            = 0x00000000;
+SDRAM[0].EmcMrw3                            = 0x00000000;
+SDRAM[0].EmcMrwResetCommand                 = 0x00000000;
+SDRAM[0].EmcMrwResetNInitWait               = 0x00000000;
+SDRAM[0].EmcAdrCfg                          = 0x00000001;
+SDRAM[0].McEmemCfg                          = 0x00000800;
+SDRAM[0].EmcCfg2                            = 0x000c0099;
+SDRAM[0].EmcCfgDigDll                       = 0xf00b0191;
+SDRAM[0].EmcCfgDigDllPeriod                 = 0x00008000;
+SDRAM[0].EmcCfg                             = 0x23e00000;
+SDRAM[0].EmcDbg                             = 0x01000400;
+SDRAM[0].WarmBootWait                       = 0x00000002;
+SDRAM[0].EmcCttTermCtrl                     = 0x00000802;
+SDRAM[0].EmcOdtWrite                        = 0x00000000;
+SDRAM[0].EmcOdtRead                         = 0x00000000;
+SDRAM[0].EmcZcalWaitCnt                     = 0x00000040;
+SDRAM[0].EmcZcalMrwCmd                      = 0x00000000;
+SDRAM[0].EmcDdr2Wait                        = 0x00000000;
+SDRAM[0].PmcDdrPwr                          = 0x00000003;
+SDRAM[0].EmcClockSource                     = 0x00000000;
+SDRAM[0].EmcClockUsePllMUD                  = 0x00000001;
+SDRAM[0].EmcPinExtraWait                    = 0x00000000;
+SDRAM[0].EmcTimingControlWait               = 0x00000000;
+SDRAM[0].EmcWext                            = 0x00000000;
+SDRAM[0].EmcCtt                             = 0x00000000;
+SDRAM[0].EmcCttDuration                     = 0x00000000;
+SDRAM[0].EmcPreRefreshReqCnt                = 0x00000504;
+SDRAM[0].EmcTxsrDll                         = 0x00000200;
+SDRAM[0].EmcCfgRsv                          = 0xff00ff09;
+SDRAM[0].EmcMrwExtra                        = 0x00000000;
+SDRAM[0].EmcWarmBootMrw1                    = 0x00000000;
+SDRAM[0].EmcWarmBootMrw2                    = 0x00000000;
+SDRAM[0].EmcWarmBootMrw3                    = 0x00000000;
+SDRAM[0].EmcWarmBootMrwExtra                = 0x00000000;
+SDRAM[0].EmcWarmBootExtraModeRegWriteEnable = 0x00000000;
+SDRAM[0].EmcExtraModeRegWriteEnable         = 0x00000000;
+SDRAM[0].EmcMrsWaitCnt                      = 0x0116000c;
+SDRAM[0].EmcCmdQ                            = 0x10004408;
+SDRAM[0].EmcMc2EmcQ                         = 0x06000404;
+SDRAM[0].EmcDynSelfRefControl               = 0x800028a5;
+SDRAM[0].AhbArbitrationXbarCtrlMemInitDone  = 0x00000001;
+SDRAM[0].EmcDevSelect                       = 0x00000000;
+SDRAM[0].EmcSelDpdCtrl                      = 0x0004032c;
+SDRAM[0].EmcDllXformDqs0                    = 0x00000008;
+SDRAM[0].EmcDllXformDqs1                    = 0x00000008;
+SDRAM[0].EmcDllXformDqs2                    = 0x00000008;
+SDRAM[0].EmcDllXformDqs3                    = 0x00000008;
+SDRAM[0].EmcDllXformDqs4                    = 0x00000008;
+SDRAM[0].EmcDllXformDqs5                    = 0x00000008;
+SDRAM[0].EmcDllXformDqs6                    = 0x00000008;
+SDRAM[0].EmcDllXformDqs7                    = 0x00000008;
+SDRAM[0].EmcDllXformQUse0                   = 0x00000000;
+SDRAM[0].EmcDllXformQUse1                   = 0x00000000;
+SDRAM[0].EmcDllXformQUse2                   = 0x00000000;
+SDRAM[0].EmcDllXformQUse3                   = 0x00000000;
+SDRAM[0].EmcDllXformQUse4                   = 0x00000000;
+SDRAM[0].EmcDllXformQUse5                   = 0x00000000;
+SDRAM[0].EmcDllXformQUse6                   = 0x00000000;
+SDRAM[0].EmcDllXformQUse7                   = 0x00000000;
+SDRAM[0].EmcDliTrimTxDqs0                   = 0x00000000;
+SDRAM[0].EmcDliTrimTxDqs1                   = 0x00000000;
+SDRAM[0].EmcDliTrimTxDqs2                   = 0x00000000;
+SDRAM[0].EmcDliTrimTxDqs3                   = 0x00000000;
+SDRAM[0].EmcDliTrimTxDqs4                   = 0x00000000;
+SDRAM[0].EmcDliTrimTxDqs5                   = 0x00000000;
+SDRAM[0].EmcDliTrimTxDqs6                   = 0x00000000;
+SDRAM[0].EmcDliTrimTxDqs7                   = 0x00000000;
+SDRAM[0].EmcDllXformDq0                     = 0x00000008;
+SDRAM[0].EmcDllXformDq1                     = 0x00000008;
+SDRAM[0].EmcDllXformDq2                     = 0x00000008;
+SDRAM[0].EmcDllXformDq3                     = 0x00000008;
+SDRAM[0].EmcZcalInterval                    = 0x00020000;
+SDRAM[0].EmcZcalInitDev0                    = 0x80000011;
+SDRAM[0].EmcZcalInitDev1                    = 0x40000011;
+SDRAM[0].EmcZcalInitWait                    = 0x00000001;
+SDRAM[0].EmcZcalColdBootEnable              = 0x00000001;
+SDRAM[0].EmcZcalWarmBootEnable              = 0x00000001;
+SDRAM[0].EmcMrwLpddr2ZcalWarmBoot           = 0x000a00ab;
+SDRAM[0].EmcZqCalDdr3WarmBoot               = 0x00000011;
+SDRAM[0].EmcZcalWarmBootWait                = 0x00000001;
+SDRAM[0].EmcMrsWarmBootEnable               = 0x00000001;
+SDRAM[0].EmcMrsExtra                        = 0x00000b71;
+SDRAM[0].EmcWarmBootMrs                     = 0x00100002;
+SDRAM[0].EmcWarmBootEmrs                    = 0x00000b71;
+SDRAM[0].EmcWarmBootEmr2                    = 0x00200018;
+SDRAM[0].EmcWarmBootEmr3                    = 0x00300000;
+SDRAM[0].EmcWarmBootMrsExtra                = 0x00100002;
+SDRAM[0].EmcClkenOverride                   = 0x00000000;
+SDRAM[0].EmcExtraRefreshNum                 = 0x00000002;
+SDRAM[0].EmcClkenOverrideAllWarmBoot        = 0x00000000;
+SDRAM[0].McClkenOverrideAllWarmBoot         = 0x00000000;
+SDRAM[0].EmcCfgDigDllPeriodWarmBoot         = 0x00000003;
+SDRAM[0].PmcVddpSel                         = 0x00000002;
+SDRAM[0].PmcDdrCfg                          = 0x00000002;
+SDRAM[0].PmcIoDpdReq                        = 0x80800000;
+SDRAM[0].PmcENoVttGen                       = 0x00000000;
+SDRAM[0].PmcNoIoPower                       = 0x00000000;
+SDRAM[0].EmcXm2CmdPadCtrl                   = 0x000002a0;
+SDRAM[0].EmcXm2CmdPadCtrl2                  = 0x770c0000;
+SDRAM[0].EmcXm2DqsPadCtrl                   = 0x770c1414;
+SDRAM[0].EmcXm2DqsPadCtrl2                  = 0x0600013d;
+SDRAM[0].EmcXm2DqsPadCtrl3                  = 0x07000021;
+SDRAM[0].EmcXm2DqPadCtrl                    = 0x770c2990;
+SDRAM[0].EmcXm2DqPadCtrl2                   = 0x22220000;
+SDRAM[0].EmcXm2ClkPadCtrl                   = 0x77fff884;
+SDRAM[0].EmcXm2CompPadCtrl                  = 0x01f1f508;
+SDRAM[0].EmcXm2VttGenPadCtrl                = 0x07077404;
+SDRAM[0].EmcXm2VttGenPadCtrl2               = 0x54000000;
+SDRAM[0].EmcXm2QUsePadCtrl                  = 0x080001e8;
+SDRAM[0].McEmemAdrCfg                       = 0x00000001;
+SDRAM[0].McEmemAdrCfgDev0                   = 0x00080303;
+SDRAM[0].McEmemAdrCfgDev1                   = 0x00080303;
+SDRAM[0].McEmemArbCfg                       = 0x00000014;
+SDRAM[0].McEmemArbOutstandingReq            = 0xc0000079;
+SDRAM[0].McEmemArbTimingRcd                 = 0x00000003;
+SDRAM[0].McEmemArbTimingRp                  = 0x00000004;
+SDRAM[0].McEmemArbTimingRc                  = 0x00000010;
+SDRAM[0].McEmemArbTimingRas                 = 0x0000000a;
+SDRAM[0].McEmemArbTimingFaw                 = 0x0000000a;
+SDRAM[0].McEmemArbTimingRrd                 = 0x00000001;
+SDRAM[0].McEmemArbTimingRap2Pre             = 0x00000003;
+SDRAM[0].McEmemArbTimingWap2Pre             = 0x0000000b;
+SDRAM[0].McEmemArbTimingR2R                 = 0x00000002;
+SDRAM[0].McEmemArbTimingW2W                 = 0x00000002;
+SDRAM[0].McEmemArbTimingR2W                 = 0x00000004;
+SDRAM[0].McEmemArbTimingW2R                 = 0x00000008;
+SDRAM[0].McEmemArbDaTurns                   = 0x08040202;
+SDRAM[0].McEmemArbDaCovers                  = 0x00140c10;
+SDRAM[0].McEmemArbMisc0                     = 0x70ea1f11;
+SDRAM[0].McEmemArbMisc1                     = 0x78000000;
+SDRAM[0].McEmemArbRing1Throttle             = 0x001f0000;
+SDRAM[0].McEmemArbOverride                  = 0x00000080;
+SDRAM[0].McEmemArbRsv                       = 0xff00ff00;
+SDRAM[0].McClkenOverride                    = 0x00000000;
+
+SDRAM[1].MemoryType                         = NvBootMemoryType_Ddr3;
+SDRAM[1].PllMChargePumpSetupControl         = 0x00000008;
+SDRAM[1].PllMLoopFilterSetupControl         = 0x00000000;
+SDRAM[1].PllMInputDivider                   = 0x0000000c;
+SDRAM[1].PllMFeedbackDivider                = 0x0000029b;
+SDRAM[1].PllMPostDivider                    = 0x00000000;
+SDRAM[1].PllMStableTime                     = 0x0000012c;
+SDRAM[1].EmcClockDivider                    = 0x00000000;
+SDRAM[1].EmcAutoCalInterval                 = 0x001fffff;
+SDRAM[1].EmcAutoCalConfig                   = 0xa0f10000;
+SDRAM[1].EmcAutoCalWait                     = 0x00000064;
+SDRAM[1].EmcPinProgramWait                  = 0x00000001;
+SDRAM[1].EmcRc                              = 0x0000001f;
+SDRAM[1].EmcRfc                             = 0x00000069;
+SDRAM[1].EmcRas                             = 0x00000016;
+SDRAM[1].EmcRp                              = 0x00000008;
+SDRAM[1].EmcR2w                             = 0x00000005;
+SDRAM[1].EmcW2r                             = 0x0000000c;
+SDRAM[1].EmcR2p                             = 0x00000003;
+SDRAM[1].EmcW2p                             = 0x00000011;
+SDRAM[1].EmcRrd                             = 0x00000002;
+SDRAM[1].EmcRdRcd                           = 0x00000008;
+SDRAM[1].EmcWrRcd                           = 0x00000008;
+SDRAM[1].EmcRext                            = 0x00000001;
+SDRAM[1].EmcWdv                             = 0x00000007;
+SDRAM[1].EmcQUseExtra                       = 0x0000000c;
+SDRAM[1].EmcQUse                            = 0x0000000b;
+SDRAM[1].EmcQRst                            = 0x00000009;
+SDRAM[1].EmcQSafe                           = 0x0000000c;
+SDRAM[1].EmcRdv                             = 0x00000011;
+SDRAM[1].EmcRefresh                         = 0x00001412;
+SDRAM[1].EmcBurstRefreshNum                 = 0x00000000;
+SDRAM[1].EmcPdEx2Wr                         = 0x00000002;
+SDRAM[1].EmcPdEx2Rd                         = 0x0000000e;
+SDRAM[1].EmcPChg2Pden                       = 0x00000001;
+SDRAM[1].EmcAct2Pden                        = 0x00000000;
+SDRAM[1].EmcAr2Pden                         = 0x0000000c;
+SDRAM[1].EmcRw2Pden                         = 0x00000016;
+SDRAM[1].EmcTxsr                            = 0x00000072;
+SDRAM[1].EmcTcke                            = 0x00000005;
+SDRAM[1].EmcTfaw                            = 0x00000015;
+SDRAM[1].EmcTrpab                           = 0x00000000;
+SDRAM[1].EmcTClkStable                      = 0x00000006;
+SDRAM[1].EmcTClkStop                        = 0x00000007;
+SDRAM[1].EmcTRefBw                          = 0x00001453;
+SDRAM[1].EmcFbioCfg5                        = 0x00005088;
+SDRAM[1].EmcFbioCfg6                        = 0x00000004;
+SDRAM[1].EmcFbioSpare                       = 0xf8000000;
+SDRAM[1].EmcMrsResetDllWait                 = 0x00000000;
+SDRAM[1].EmcMrsResetDll                     = 0x00000000;
+SDRAM[1].EmcMrsDdr2DllReset                 = 0x00000000;
+SDRAM[1].EmcMrs                             = 0x00000b71;
+SDRAM[1].EmcEmrsEmr2                        = 0x00200018;
+SDRAM[1].EmcEmrsEmr3                        = 0x00300000;
+SDRAM[1].EmcEmrsDdr2DllEnable               = 0x00000000;
+SDRAM[1].EmcEmrsDdr2OcdCalib                = 0x00000000;
+SDRAM[1].EmcEmrs                            = 0x00100002;
+SDRAM[1].EmcMrw1                            = 0x00000000;
+SDRAM[1].EmcMrw2                            = 0x00000000;
+SDRAM[1].EmcMrw3                            = 0x00000000;
+SDRAM[1].EmcMrwResetCommand                 = 0x00000000;
+SDRAM[1].EmcMrwResetNInitWait               = 0x00000000;
+SDRAM[1].EmcAdrCfg                          = 0x00000001;
+SDRAM[1].McEmemCfg                          = 0x00000800;
+SDRAM[1].EmcCfg2                            = 0x000c0099;
+SDRAM[1].EmcCfgDigDll                       = 0xf00b0191;
+SDRAM[1].EmcCfgDigDllPeriod                 = 0x00008000;
+SDRAM[1].EmcCfg                             = 0x23e00000;
+SDRAM[1].EmcDbg                             = 0x01000400;
+SDRAM[1].WarmBootWait                       = 0x00000002;
+SDRAM[1].EmcCttTermCtrl                     = 0x00000802;
+SDRAM[1].EmcOdtWrite                        = 0x00000000;
+SDRAM[1].EmcOdtRead                         = 0x00000000;
+SDRAM[1].EmcZcalWaitCnt                     = 0x00000040;
+SDRAM[1].EmcZcalMrwCmd                      = 0x00000000;
+SDRAM[1].EmcDdr2Wait                        = 0x00000000;
+SDRAM[1].PmcDdrPwr                          = 0x00000003;
+SDRAM[1].EmcClockSource                     = 0x00000000;
+SDRAM[1].EmcClockUsePllMUD                  = 0x00000001;
+SDRAM[1].EmcPinExtraWait                    = 0x00000000;
+SDRAM[1].EmcTimingControlWait               = 0x00000000;
+SDRAM[1].EmcWext                            = 0x00000000;
+SDRAM[1].EmcCtt                             = 0x00000000;
+SDRAM[1].EmcCttDuration                     = 0x00000000;
+SDRAM[1].EmcPreRefreshReqCnt                = 0x00000504;
+SDRAM[1].EmcTxsrDll                         = 0x00000200;
+SDRAM[1].EmcCfgRsv                          = 0xff00ff09;
+SDRAM[1].EmcMrwExtra                        = 0x00000000;
+SDRAM[1].EmcWarmBootMrw1                    = 0x00000000;
+SDRAM[1].EmcWarmBootMrw2                    = 0x00000000;
+SDRAM[1].EmcWarmBootMrw3                    = 0x00000000;
+SDRAM[1].EmcWarmBootMrwExtra                = 0x00000000;
+SDRAM[1].EmcWarmBootExtraModeRegWriteEnable = 0x00000000;
+SDRAM[1].EmcExtraModeRegWriteEnable         = 0x00000000;
+SDRAM[1].EmcMrsWaitCnt                      = 0x0116000c;
+SDRAM[1].EmcCmdQ                            = 0x10004408;
+SDRAM[1].EmcMc2EmcQ                         = 0x06000404;
+SDRAM[1].EmcDynSelfRefControl               = 0x800028a5;
+SDRAM[1].AhbArbitrationXbarCtrlMemInitDone  = 0x00000001;
+SDRAM[1].EmcDevSelect                       = 0x00000000;
+SDRAM[1].EmcSelDpdCtrl                      = 0x0004032c;
+SDRAM[1].EmcDllXformDqs0                    = 0x00000008;
+SDRAM[1].EmcDllXformDqs1                    = 0x00000008;
+SDRAM[1].EmcDllXformDqs2                    = 0x00000008;
+SDRAM[1].EmcDllXformDqs3                    = 0x00000008;
+SDRAM[1].EmcDllXformDqs4                    = 0x00000008;
+SDRAM[1].EmcDllXformDqs5                    = 0x00000008;
+SDRAM[1].EmcDllXformDqs6                    = 0x00000008;
+SDRAM[1].EmcDllXformDqs7                    = 0x00000008;
+SDRAM[1].EmcDllXformQUse0                   = 0x00000000;
+SDRAM[1].EmcDllXformQUse1                   = 0x00000000;
+SDRAM[1].EmcDllXformQUse2                   = 0x00000000;
+SDRAM[1].EmcDllXformQUse3                   = 0x00000000;
+SDRAM[1].EmcDllXformQUse4                   = 0x00000000;
+SDRAM[1].EmcDllXformQUse5                   = 0x00000000;
+SDRAM[1].EmcDllXformQUse6                   = 0x00000000;
+SDRAM[1].EmcDllXformQUse7                   = 0x00000000;
+SDRAM[1].EmcDliTrimTxDqs0                   = 0x00000000;
+SDRAM[1].EmcDliTrimTxDqs1                   = 0x00000000;
+SDRAM[1].EmcDliTrimTxDqs2                   = 0x00000000;
+SDRAM[1].EmcDliTrimTxDqs3                   = 0x00000000;
+SDRAM[1].EmcDliTrimTxDqs4                   = 0x00000000;
+SDRAM[1].EmcDliTrimTxDqs5                   = 0x00000000;
+SDRAM[1].EmcDliTrimTxDqs6                   = 0x00000000;
+SDRAM[1].EmcDliTrimTxDqs7                   = 0x00000000;
+SDRAM[1].EmcDllXformDq0                     = 0x00000008;
+SDRAM[1].EmcDllXformDq1                     = 0x00000008;
+SDRAM[1].EmcDllXformDq2                     = 0x00000008;
+SDRAM[1].EmcDllXformDq3                     = 0x00000008;
+SDRAM[1].EmcZcalInterval                    = 0x00020000;
+SDRAM[1].EmcZcalInitDev0                    = 0x80000011;
+SDRAM[1].EmcZcalInitDev1                    = 0x40000011;
+SDRAM[1].EmcZcalInitWait                    = 0x00000001;
+SDRAM[1].EmcZcalColdBootEnable              = 0x00000001;
+SDRAM[1].EmcZcalWarmBootEnable              = 0x00000001;
+SDRAM[1].EmcMrwLpddr2ZcalWarmBoot           = 0x000a00ab;
+SDRAM[1].EmcZqCalDdr3WarmBoot               = 0x00000011;
+SDRAM[1].EmcZcalWarmBootWait                = 0x00000001;
+SDRAM[1].EmcMrsWarmBootEnable               = 0x00000001;
+SDRAM[1].EmcMrsExtra                        = 0x00000b71;
+SDRAM[1].EmcWarmBootMrs                     = 0x00100002;
+SDRAM[1].EmcWarmBootEmrs                    = 0x00000b71;
+SDRAM[1].EmcWarmBootEmr2                    = 0x00200018;
+SDRAM[1].EmcWarmBootEmr3                    = 0x00300000;
+SDRAM[1].EmcWarmBootMrsExtra                = 0x00100002;
+SDRAM[1].EmcClkenOverride                   = 0x00000000;
+SDRAM[1].EmcExtraRefreshNum                 = 0x00000002;
+SDRAM[1].EmcClkenOverrideAllWarmBoot        = 0x00000000;
+SDRAM[1].McClkenOverrideAllWarmBoot         = 0x00000000;
+SDRAM[1].EmcCfgDigDllPeriodWarmBoot         = 0x00000003;
+SDRAM[1].PmcVddpSel                         = 0x00000002;
+SDRAM[1].PmcDdrCfg                          = 0x00000002;
+SDRAM[1].PmcIoDpdReq                        = 0x80800000;
+SDRAM[1].PmcENoVttGen                       = 0x00000000;
+SDRAM[1].PmcNoIoPower                       = 0x00000000;
+SDRAM[1].EmcXm2CmdPadCtrl                   = 0x000002a0;
+SDRAM[1].EmcXm2CmdPadCtrl2                  = 0x770c0000;
+SDRAM[1].EmcXm2DqsPadCtrl                   = 0x770c1414;
+SDRAM[1].EmcXm2DqsPadCtrl2                  = 0x0600013d;
+SDRAM[1].EmcXm2DqsPadCtrl3                  = 0x07000021;
+SDRAM[1].EmcXm2DqPadCtrl                    = 0x770c2990;
+SDRAM[1].EmcXm2DqPadCtrl2                   = 0x22220000;
+SDRAM[1].EmcXm2ClkPadCtrl                   = 0x77fff884;
+SDRAM[1].EmcXm2CompPadCtrl                  = 0x01f1f508;
+SDRAM[1].EmcXm2VttGenPadCtrl                = 0x07077404;
+SDRAM[1].EmcXm2VttGenPadCtrl2               = 0x54000000;
+SDRAM[1].EmcXm2QUsePadCtrl                  = 0x080001e8;
+SDRAM[1].McEmemAdrCfg                       = 0x00000001;
+SDRAM[1].McEmemAdrCfgDev0                   = 0x00080303;
+SDRAM[1].McEmemAdrCfgDev1                   = 0x00080303;
+SDRAM[1].McEmemArbCfg                       = 0x00000014;
+SDRAM[1].McEmemArbOutstandingReq            = 0xc0000079;
+SDRAM[1].McEmemArbTimingRcd                 = 0x00000003;
+SDRAM[1].McEmemArbTimingRp                  = 0x00000004;
+SDRAM[1].McEmemArbTimingRc                  = 0x00000010;
+SDRAM[1].McEmemArbTimingRas                 = 0x0000000a;
+SDRAM[1].McEmemArbTimingFaw                 = 0x0000000a;
+SDRAM[1].McEmemArbTimingRrd                 = 0x00000001;
+SDRAM[1].McEmemArbTimingRap2Pre             = 0x00000003;
+SDRAM[1].McEmemArbTimingWap2Pre             = 0x0000000b;
+SDRAM[1].McEmemArbTimingR2R                 = 0x00000002;
+SDRAM[1].McEmemArbTimingW2W                 = 0x00000002;
+SDRAM[1].McEmemArbTimingR2W                 = 0x00000004;
+SDRAM[1].McEmemArbTimingW2R                 = 0x00000008;
+SDRAM[1].McEmemArbDaTurns                   = 0x08040202;
+SDRAM[1].McEmemArbDaCovers                  = 0x00140c10;
+SDRAM[1].McEmemArbMisc0                     = 0x70ea1f11;
+SDRAM[1].McEmemArbMisc1                     = 0x78000000;
+SDRAM[1].McEmemArbRing1Throttle             = 0x001f0000;
+SDRAM[1].McEmemArbOverride                  = 0x00000080;
+SDRAM[1].McEmemArbRsv                       = 0xff00ff00;
+SDRAM[1].McClkenOverride                    = 0x00000000;
+
+SDRAM[2].MemoryType                         = NvBootMemoryType_Ddr3;
+SDRAM[2].PllMChargePumpSetupControl         = 0x00000008;
+SDRAM[2].PllMLoopFilterSetupControl         = 0x00000000;
+SDRAM[2].PllMInputDivider                   = 0x0000000c;
+SDRAM[2].PllMFeedbackDivider                = 0x0000029b;
+SDRAM[2].PllMPostDivider                    = 0x00000000;
+SDRAM[2].PllMStableTime                     = 0x0000012c;
+SDRAM[2].EmcClockDivider                    = 0x00000000;
+SDRAM[2].EmcAutoCalInterval                 = 0x001fffff;
+SDRAM[2].EmcAutoCalConfig                   = 0xa0f10000;
+SDRAM[2].EmcAutoCalWait                     = 0x00000064;
+SDRAM[2].EmcPinProgramWait                  = 0x00000001;
+SDRAM[2].EmcRc                              = 0x0000001f;
+SDRAM[2].EmcRfc                             = 0x00000069;
+SDRAM[2].EmcRas                             = 0x00000016;
+SDRAM[2].EmcRp                              = 0x00000008;
+SDRAM[2].EmcR2w                             = 0x00000005;
+SDRAM[2].EmcW2r                             = 0x0000000c;
+SDRAM[2].EmcR2p                             = 0x00000003;
+SDRAM[2].EmcW2p                             = 0x00000011;
+SDRAM[2].EmcRrd                             = 0x00000002;
+SDRAM[2].EmcRdRcd                           = 0x00000008;
+SDRAM[2].EmcWrRcd                           = 0x00000008;
+SDRAM[2].EmcRext                            = 0x00000001;
+SDRAM[2].EmcWdv                             = 0x00000007;
+SDRAM[2].EmcQUseExtra                       = 0x0000000c;
+SDRAM[2].EmcQUse                            = 0x0000000b;
+SDRAM[2].EmcQRst                            = 0x00000009;
+SDRAM[2].EmcQSafe                           = 0x0000000c;
+SDRAM[2].EmcRdv                             = 0x00000011;
+SDRAM[2].EmcRefresh                         = 0x00001412;
+SDRAM[2].EmcBurstRefreshNum                 = 0x00000000;
+SDRAM[2].EmcPdEx2Wr                         = 0x00000002;
+SDRAM[2].EmcPdEx2Rd                         = 0x0000000e;
+SDRAM[2].EmcPChg2Pden                       = 0x00000001;
+SDRAM[2].EmcAct2Pden                        = 0x00000000;
+SDRAM[2].EmcAr2Pden                         = 0x0000000c;
+SDRAM[2].EmcRw2Pden                         = 0x00000016;
+SDRAM[2].EmcTxsr                            = 0x00000072;
+SDRAM[2].EmcTcke                            = 0x00000005;
+SDRAM[2].EmcTfaw                            = 0x00000015;
+SDRAM[2].EmcTrpab                           = 0x00000000;
+SDRAM[2].EmcTClkStable                      = 0x00000006;
+SDRAM[2].EmcTClkStop                        = 0x00000007;
+SDRAM[2].EmcTRefBw                          = 0x00001453;
+SDRAM[2].EmcFbioCfg5                        = 0x00005088;
+SDRAM[2].EmcFbioCfg6                        = 0x00000004;
+SDRAM[2].EmcFbioSpare                       = 0xf8000000;
+SDRAM[2].EmcMrsResetDllWait                 = 0x00000000;
+SDRAM[2].EmcMrsResetDll                     = 0x00000000;
+SDRAM[2].EmcMrsDdr2DllReset                 = 0x00000000;
+SDRAM[2].EmcMrs                             = 0x00000b71;
+SDRAM[2].EmcEmrsEmr2                        = 0x00200018;
+SDRAM[2].EmcEmrsEmr3                        = 0x00300000;
+SDRAM[2].EmcEmrsDdr2DllEnable               = 0x00000000;
+SDRAM[2].EmcEmrsDdr2OcdCalib                = 0x00000000;
+SDRAM[2].EmcEmrs                            = 0x00100002;
+SDRAM[2].EmcMrw1                            = 0x00000000;
+SDRAM[2].EmcMrw2                            = 0x00000000;
+SDRAM[2].EmcMrw3                            = 0x00000000;
+SDRAM[2].EmcMrwResetCommand                 = 0x00000000;
+SDRAM[2].EmcMrwResetNInitWait               = 0x00000000;
+SDRAM[2].EmcAdrCfg                          = 0x00000001;
+SDRAM[2].McEmemCfg                          = 0x00000800;
+SDRAM[2].EmcCfg2                            = 0x000c0099;
+SDRAM[2].EmcCfgDigDll                       = 0xf00b0191;
+SDRAM[2].EmcCfgDigDllPeriod                 = 0x00008000;
+SDRAM[2].EmcCfg                             = 0x23e00000;
+SDRAM[2].EmcDbg                             = 0x01000400;
+SDRAM[2].WarmBootWait                       = 0x00000002;
+SDRAM[2].EmcCttTermCtrl                     = 0x00000802;
+SDRAM[2].EmcOdtWrite                        = 0x00000000;
+SDRAM[2].EmcOdtRead                         = 0x00000000;
+SDRAM[2].EmcZcalWaitCnt                     = 0x00000040;
+SDRAM[2].EmcZcalMrwCmd                      = 0x00000000;
+SDRAM[2].EmcDdr2Wait                        = 0x00000000;
+SDRAM[2].PmcDdrPwr                          = 0x00000003;
+SDRAM[2].EmcClockSource                     = 0x00000000;
+SDRAM[2].EmcClockUsePllMUD                  = 0x00000001;
+SDRAM[2].EmcPinExtraWait                    = 0x00000000;
+SDRAM[2].EmcTimingControlWait               = 0x00000000;
+SDRAM[2].EmcWext                            = 0x00000000;
+SDRAM[2].EmcCtt                             = 0x00000000;
+SDRAM[2].EmcCttDuration                     = 0x00000000;
+SDRAM[2].EmcPreRefreshReqCnt                = 0x00000504;
+SDRAM[2].EmcTxsrDll                         = 0x00000200;
+SDRAM[2].EmcCfgRsv                          = 0xff00ff09;
+SDRAM[2].EmcMrwExtra                        = 0x00000000;
+SDRAM[2].EmcWarmBootMrw1                    = 0x00000000;
+SDRAM[2].EmcWarmBootMrw2                    = 0x00000000;
+SDRAM[2].EmcWarmBootMrw3                    = 0x00000000;
+SDRAM[2].EmcWarmBootMrwExtra                = 0x00000000;
+SDRAM[2].EmcWarmBootExtraModeRegWriteEnable = 0x00000000;
+SDRAM[2].EmcExtraModeRegWriteEnable         = 0x00000000;
+SDRAM[2].EmcMrsWaitCnt                      = 0x0116000c;
+SDRAM[2].EmcCmdQ                            = 0x10004408;
+SDRAM[2].EmcMc2EmcQ                         = 0x06000404;
+SDRAM[2].EmcDynSelfRefControl               = 0x800028a5;
+SDRAM[2].AhbArbitrationXbarCtrlMemInitDone  = 0x00000001;
+SDRAM[2].EmcDevSelect                       = 0x00000000;
+SDRAM[2].EmcSelDpdCtrl                      = 0x0004032c;
+SDRAM[2].EmcDllXformDqs0                    = 0x00000008;
+SDRAM[2].EmcDllXformDqs1                    = 0x00000008;
+SDRAM[2].EmcDllXformDqs2                    = 0x00000008;
+SDRAM[2].EmcDllXformDqs3                    = 0x00000008;
+SDRAM[2].EmcDllXformDqs4                    = 0x00000008;
+SDRAM[2].EmcDllXformDqs5                    = 0x00000008;
+SDRAM[2].EmcDllXformDqs6                    = 0x00000008;
+SDRAM[2].EmcDllXformDqs7                    = 0x00000008;
+SDRAM[2].EmcDllXformQUse0                   = 0x00000000;
+SDRAM[2].EmcDllXformQUse1                   = 0x00000000;
+SDRAM[2].EmcDllXformQUse2                   = 0x00000000;
+SDRAM[2].EmcDllXformQUse3                   = 0x00000000;
+SDRAM[2].EmcDllXformQUse4                   = 0x00000000;
+SDRAM[2].EmcDllXformQUse5                   = 0x00000000;
+SDRAM[2].EmcDllXformQUse6                   = 0x00000000;
+SDRAM[2].EmcDllXformQUse7                   = 0x00000000;
+SDRAM[2].EmcDliTrimTxDqs0                   = 0x00000000;
+SDRAM[2].EmcDliTrimTxDqs1                   = 0x00000000;
+SDRAM[2].EmcDliTrimTxDqs2                   = 0x00000000;
+SDRAM[2].EmcDliTrimTxDqs3                   = 0x00000000;
+SDRAM[2].EmcDliTrimTxDqs4                   = 0x00000000;
+SDRAM[2].EmcDliTrimTxDqs5                   = 0x00000000;
+SDRAM[2].EmcDliTrimTxDqs6                   = 0x00000000;
+SDRAM[2].EmcDliTrimTxDqs7                   = 0x00000000;
+SDRAM[2].EmcDllXformDq0                     = 0x00000008;
+SDRAM[2].EmcDllXformDq1                     = 0x00000008;
+SDRAM[2].EmcDllXformDq2                     = 0x00000008;
+SDRAM[2].EmcDllXformDq3                     = 0x00000008;
+SDRAM[2].EmcZcalInterval                    = 0x00020000;
+SDRAM[2].EmcZcalInitDev0                    = 0x80000011;
+SDRAM[2].EmcZcalInitDev1                    = 0x40000011;
+SDRAM[2].EmcZcalInitWait                    = 0x00000001;
+SDRAM[2].EmcZcalColdBootEnable              = 0x00000001;
+SDRAM[2].EmcZcalWarmBootEnable              = 0x00000001;
+SDRAM[2].EmcMrwLpddr2ZcalWarmBoot           = 0x000a00ab;
+SDRAM[2].EmcZqCalDdr3WarmBoot               = 0x00000011;
+SDRAM[2].EmcZcalWarmBootWait                = 0x00000001;
+SDRAM[2].EmcMrsWarmBootEnable               = 0x00000001;
+SDRAM[2].EmcMrsExtra                        = 0x00000b71;
+SDRAM[2].EmcWarmBootMrs                     = 0x00100002;
+SDRAM[2].EmcWarmBootEmrs                    = 0x00000b71;
+SDRAM[2].EmcWarmBootEmr2                    = 0x00200018;
+SDRAM[2].EmcWarmBootEmr3                    = 0x00300000;
+SDRAM[2].EmcWarmBootMrsExtra                = 0x00100002;
+SDRAM[2].EmcClkenOverride                   = 0x00000000;
+SDRAM[2].EmcExtraRefreshNum                 = 0x00000002;
+SDRAM[2].EmcClkenOverrideAllWarmBoot        = 0x00000000;
+SDRAM[2].McClkenOverrideAllWarmBoot         = 0x00000000;
+SDRAM[2].EmcCfgDigDllPeriodWarmBoot         = 0x00000003;
+SDRAM[2].PmcVddpSel                         = 0x00000002;
+SDRAM[2].PmcDdrCfg                          = 0x00000002;
+SDRAM[2].PmcIoDpdReq                        = 0x80800000;
+SDRAM[2].PmcENoVttGen                       = 0x00000000;
+SDRAM[2].PmcNoIoPower                       = 0x00000000;
+SDRAM[2].EmcXm2CmdPadCtrl                   = 0x000002a0;
+SDRAM[2].EmcXm2CmdPadCtrl2                  = 0x770c0000;
+SDRAM[2].EmcXm2DqsPadCtrl                   = 0x770c1414;
+SDRAM[2].EmcXm2DqsPadCtrl2                  = 0x0600013d;
+SDRAM[2].EmcXm2DqsPadCtrl3                  = 0x07000021;
+SDRAM[2].EmcXm2DqPadCtrl                    = 0x770c2990;
+SDRAM[2].EmcXm2DqPadCtrl2                   = 0x22220000;
+SDRAM[2].EmcXm2ClkPadCtrl                   = 0x77fff884;
+SDRAM[2].EmcXm2CompPadCtrl                  = 0x01f1f508;
+SDRAM[2].EmcXm2VttGenPadCtrl                = 0x07077404;
+SDRAM[2].EmcXm2VttGenPadCtrl2               = 0x54000000;
+SDRAM[2].EmcXm2QUsePadCtrl                  = 0x080001e8;
+SDRAM[2].McEmemAdrCfg                       = 0x00000001;
+SDRAM[2].McEmemAdrCfgDev0                   = 0x00080303;
+SDRAM[2].McEmemAdrCfgDev1                   = 0x00080303;
+SDRAM[2].McEmemArbCfg                       = 0x00000014;
+SDRAM[2].McEmemArbOutstandingReq            = 0xc0000079;
+SDRAM[2].McEmemArbTimingRcd                 = 0x00000003;
+SDRAM[2].McEmemArbTimingRp                  = 0x00000004;
+SDRAM[2].McEmemArbTimingRc                  = 0x00000010;
+SDRAM[2].McEmemArbTimingRas                 = 0x0000000a;
+SDRAM[2].McEmemArbTimingFaw                 = 0x0000000a;
+SDRAM[2].McEmemArbTimingRrd                 = 0x00000001;
+SDRAM[2].McEmemArbTimingRap2Pre             = 0x00000003;
+SDRAM[2].McEmemArbTimingWap2Pre             = 0x0000000b;
+SDRAM[2].McEmemArbTimingR2R                 = 0x00000002;
+SDRAM[2].McEmemArbTimingW2W                 = 0x00000002;
+SDRAM[2].McEmemArbTimingR2W                 = 0x00000004;
+SDRAM[2].McEmemArbTimingW2R                 = 0x00000008;
+SDRAM[2].McEmemArbDaTurns                   = 0x08040202;
+SDRAM[2].McEmemArbDaCovers                  = 0x00140c10;
+SDRAM[2].McEmemArbMisc0                     = 0x70ea1f11;
+SDRAM[2].McEmemArbMisc1                     = 0x78000000;
+SDRAM[2].McEmemArbRing1Throttle             = 0x001f0000;
+SDRAM[2].McEmemArbOverride                  = 0x00000080;
+SDRAM[2].McEmemArbRsv                       = 0xff00ff00;
+SDRAM[2].McClkenOverride                    = 0x00000000;
+
+SDRAM[3].MemoryType                         = NvBootMemoryType_Ddr3;
+SDRAM[3].PllMChargePumpSetupControl         = 0x00000008;
+SDRAM[3].PllMLoopFilterSetupControl         = 0x00000000;
+SDRAM[3].PllMInputDivider                   = 0x0000000c;
+SDRAM[3].PllMFeedbackDivider                = 0x0000029b;
+SDRAM[3].PllMPostDivider                    = 0x00000000;
+SDRAM[3].PllMStableTime                     = 0x0000012c;
+SDRAM[3].EmcClockDivider                    = 0x00000000;
+SDRAM[3].EmcAutoCalInterval                 = 0x001fffff;
+SDRAM[3].EmcAutoCalConfig                   = 0xa0f10000;
+SDRAM[3].EmcAutoCalWait                     = 0x00000064;
+SDRAM[3].EmcPinProgramWait                  = 0x00000001;
+SDRAM[3].EmcRc                              = 0x0000001f;
+SDRAM[3].EmcRfc                             = 0x00000069;
+SDRAM[3].EmcRas                             = 0x00000016;
+SDRAM[3].EmcRp                              = 0x00000008;
+SDRAM[3].EmcR2w                             = 0x00000005;
+SDRAM[3].EmcW2r                             = 0x0000000c;
+SDRAM[3].EmcR2p                             = 0x00000003;
+SDRAM[3].EmcW2p                             = 0x00000011;
+SDRAM[3].EmcRrd                             = 0x00000002;
+SDRAM[3].EmcRdRcd                           = 0x00000008;
+SDRAM[3].EmcWrRcd                           = 0x00000008;
+SDRAM[3].EmcRext                            = 0x00000001;
+SDRAM[3].EmcWdv                             = 0x00000007;
+SDRAM[3].EmcQUseExtra                       = 0x0000000c;
+SDRAM[3].EmcQUse                            = 0x0000000b;
+SDRAM[3].EmcQRst                            = 0x00000009;
+SDRAM[3].EmcQSafe                           = 0x0000000c;
+SDRAM[3].EmcRdv                             = 0x00000011;
+SDRAM[3].EmcRefresh                         = 0x00001412;
+SDRAM[3].EmcBurstRefreshNum                 = 0x00000000;
+SDRAM[3].EmcPdEx2Wr                         = 0x00000002;
+SDRAM[3].EmcPdEx2Rd                         = 0x0000000e;
+SDRAM[3].EmcPChg2Pden                       = 0x00000001;
+SDRAM[3].EmcAct2Pden                        = 0x00000000;
+SDRAM[3].EmcAr2Pden                         = 0x0000000c;
+SDRAM[3].EmcRw2Pden                         = 0x00000016;
+SDRAM[3].EmcTxsr                            = 0x00000072;
+SDRAM[3].EmcTcke                            = 0x00000005;
+SDRAM[3].EmcTfaw                            = 0x00000015;
+SDRAM[3].EmcTrpab                           = 0x00000000;
+SDRAM[3].EmcTClkStable                      = 0x00000006;
+SDRAM[3].EmcTClkStop                        = 0x00000007;
+SDRAM[3].EmcTRefBw                          = 0x00001453;
+SDRAM[3].EmcFbioCfg5                        = 0x00005088;
+SDRAM[3].EmcFbioCfg6                        = 0x00000004;
+SDRAM[3].EmcFbioSpare                       = 0xf8000000;
+SDRAM[3].EmcMrsResetDllWait                 = 0x00000000;
+SDRAM[3].EmcMrsResetDll                     = 0x00000000;
+SDRAM[3].EmcMrsDdr2DllReset                 = 0x00000000;
+SDRAM[3].EmcMrs                             = 0x00000b71;
+SDRAM[3].EmcEmrsEmr2                        = 0x00200018;
+SDRAM[3].EmcEmrsEmr3                        = 0x00300000;
+SDRAM[3].EmcEmrsDdr2DllEnable               = 0x00000000;
+SDRAM[3].EmcEmrsDdr2OcdCalib                = 0x00000000;
+SDRAM[3].EmcEmrs                            = 0x00100002;
+SDRAM[3].EmcMrw1                            = 0x00000000;
+SDRAM[3].EmcMrw2                            = 0x00000000;
+SDRAM[3].EmcMrw3                            = 0x00000000;
+SDRAM[3].EmcMrwResetCommand                 = 0x00000000;
+SDRAM[3].EmcMrwResetNInitWait               = 0x00000000;
+SDRAM[3].EmcAdrCfg                          = 0x00000001;
+SDRAM[3].McEmemCfg                          = 0x00000800;
+SDRAM[3].EmcCfg2                            = 0x000c0099;
+SDRAM[3].EmcCfgDigDll                       = 0xf00b0191;
+SDRAM[3].EmcCfgDigDllPeriod                 = 0x00008000;
+SDRAM[3].EmcCfg                             = 0x23e00000;
+SDRAM[3].EmcDbg                             = 0x01000400;
+SDRAM[3].WarmBootWait                       = 0x00000002;
+SDRAM[3].EmcCttTermCtrl                     = 0x00000802;
+SDRAM[3].EmcOdtWrite                        = 0x00000000;
+SDRAM[3].EmcOdtRead                         = 0x00000000;
+SDRAM[3].EmcZcalWaitCnt                     = 0x00000040;
+SDRAM[3].EmcZcalMrwCmd                      = 0x00000000;
+SDRAM[3].EmcDdr2Wait                        = 0x00000000;
+SDRAM[3].PmcDdrPwr                          = 0x00000003;
+SDRAM[3].EmcClockSource                     = 0x00000000;
+SDRAM[3].EmcClockUsePllMUD                  = 0x00000001;
+SDRAM[3].EmcPinExtraWait                    = 0x00000000;
+SDRAM[3].EmcTimingControlWait               = 0x00000000;
+SDRAM[3].EmcWext                            = 0x00000000;
+SDRAM[3].EmcCtt                             = 0x00000000;
+SDRAM[3].EmcCttDuration                     = 0x00000000;
+SDRAM[3].EmcPreRefreshReqCnt                = 0x00000504;
+SDRAM[3].EmcTxsrDll                         = 0x00000200;
+SDRAM[3].EmcCfgRsv                          = 0xff00ff09;
+SDRAM[3].EmcMrwExtra                        = 0x00000000;
+SDRAM[3].EmcWarmBootMrw1                    = 0x00000000;
+SDRAM[3].EmcWarmBootMrw2                    = 0x00000000;
+SDRAM[3].EmcWarmBootMrw3                    = 0x00000000;
+SDRAM[3].EmcWarmBootMrwExtra                = 0x00000000;
+SDRAM[3].EmcWarmBootExtraModeRegWriteEnable = 0x00000000;
+SDRAM[3].EmcExtraModeRegWriteEnable         = 0x00000000;
+SDRAM[3].EmcMrsWaitCnt                      = 0x0116000c;
+SDRAM[3].EmcCmdQ                            = 0x10004408;
+SDRAM[3].EmcMc2EmcQ                         = 0x06000404;
+SDRAM[3].EmcDynSelfRefControl               = 0x800028a5;
+SDRAM[3].AhbArbitrationXbarCtrlMemInitDone  = 0x00000001;
+SDRAM[3].EmcDevSelect                       = 0x00000000;
+SDRAM[3].EmcSelDpdCtrl                      = 0x0004032c;
+SDRAM[3].EmcDllXformDqs0                    = 0x00000008;
+SDRAM[3].EmcDllXformDqs1                    = 0x00000008;
+SDRAM[3].EmcDllXformDqs2                    = 0x00000008;
+SDRAM[3].EmcDllXformDqs3                    = 0x00000008;
+SDRAM[3].EmcDllXformDqs4                    = 0x00000008;
+SDRAM[3].EmcDllXformDqs5                    = 0x00000008;
+SDRAM[3].EmcDllXformDqs6                    = 0x00000008;
+SDRAM[3].EmcDllXformDqs7                    = 0x00000008;
+SDRAM[3].EmcDllXformQUse0                   = 0x00000000;
+SDRAM[3].EmcDllXformQUse1                   = 0x00000000;
+SDRAM[3].EmcDllXformQUse2                   = 0x00000000;
+SDRAM[3].EmcDllXformQUse3                   = 0x00000000;
+SDRAM[3].EmcDllXformQUse4                   = 0x00000000;
+SDRAM[3].EmcDllXformQUse5                   = 0x00000000;
+SDRAM[3].EmcDllXformQUse6                   = 0x00000000;
+SDRAM[3].EmcDllXformQUse7                   = 0x00000000;
+SDRAM[3].EmcDliTrimTxDqs0                   = 0x00000000;
+SDRAM[3].EmcDliTrimTxDqs1                   = 0x00000000;
+SDRAM[3].EmcDliTrimTxDqs2                   = 0x00000000;
+SDRAM[3].EmcDliTrimTxDqs3                   = 0x00000000;
+SDRAM[3].EmcDliTrimTxDqs4                   = 0x00000000;
+SDRAM[3].EmcDliTrimTxDqs5                   = 0x00000000;
+SDRAM[3].EmcDliTrimTxDqs6                   = 0x00000000;
+SDRAM[3].EmcDliTrimTxDqs7                   = 0x00000000;
+SDRAM[3].EmcDllXformDq0                     = 0x00000008;
+SDRAM[3].EmcDllXformDq1                     = 0x00000008;
+SDRAM[3].EmcDllXformDq2                     = 0x00000008;
+SDRAM[3].EmcDllXformDq3                     = 0x00000008;
+SDRAM[3].EmcZcalInterval                    = 0x00020000;
+SDRAM[3].EmcZcalInitDev0                    = 0x80000011;
+SDRAM[3].EmcZcalInitDev1                    = 0x40000011;
+SDRAM[3].EmcZcalInitWait                    = 0x00000001;
+SDRAM[3].EmcZcalColdBootEnable              = 0x00000001;
+SDRAM[3].EmcZcalWarmBootEnable              = 0x00000001;
+SDRAM[3].EmcMrwLpddr2ZcalWarmBoot           = 0x000a00ab;
+SDRAM[3].EmcZqCalDdr3WarmBoot               = 0x00000011;
+SDRAM[3].EmcZcalWarmBootWait                = 0x00000001;
+SDRAM[3].EmcMrsWarmBootEnable               = 0x00000001;
+SDRAM[3].EmcMrsExtra                        = 0x00000b71;
+SDRAM[3].EmcWarmBootMrs                     = 0x00100002;
+SDRAM[3].EmcWarmBootEmrs                    = 0x00000b71;
+SDRAM[3].EmcWarmBootEmr2                    = 0x00200018;
+SDRAM[3].EmcWarmBootEmr3                    = 0x00300000;
+SDRAM[3].EmcWarmBootMrsExtra                = 0x00100002;
+SDRAM[3].EmcClkenOverride                   = 0x00000000;
+SDRAM[3].EmcExtraRefreshNum                 = 0x00000002;
+SDRAM[3].EmcClkenOverrideAllWarmBoot        = 0x00000000;
+SDRAM[3].McClkenOverrideAllWarmBoot         = 0x00000000;
+SDRAM[3].EmcCfgDigDllPeriodWarmBoot         = 0x00000003;
+SDRAM[3].PmcVddpSel                         = 0x00000002;
+SDRAM[3].PmcDdrCfg                          = 0x00000002;
+SDRAM[3].PmcIoDpdReq                        = 0x80800000;
+SDRAM[3].PmcENoVttGen                       = 0x00000000;
+SDRAM[3].PmcNoIoPower                       = 0x00000000;
+SDRAM[3].EmcXm2CmdPadCtrl                   = 0x000002a0;
+SDRAM[3].EmcXm2CmdPadCtrl2                  = 0x770c0000;
+SDRAM[3].EmcXm2DqsPadCtrl                   = 0x770c1414;
+SDRAM[3].EmcXm2DqsPadCtrl2                  = 0x0600013d;
+SDRAM[3].EmcXm2DqsPadCtrl3                  = 0x07000021;
+SDRAM[3].EmcXm2DqPadCtrl                    = 0x770c2990;
+SDRAM[3].EmcXm2DqPadCtrl2                   = 0x22220000;
+SDRAM[3].EmcXm2ClkPadCtrl                   = 0x77fff884;
+SDRAM[3].EmcXm2CompPadCtrl                  = 0x01f1f508;
+SDRAM[3].EmcXm2VttGenPadCtrl                = 0x07077404;
+SDRAM[3].EmcXm2VttGenPadCtrl2               = 0x54000000;
+SDRAM[3].EmcXm2QUsePadCtrl                  = 0x080001e8;
+SDRAM[3].McEmemAdrCfg                       = 0x00000001;
+SDRAM[3].McEmemAdrCfgDev0                   = 0x00080303;
+SDRAM[3].McEmemAdrCfgDev1                   = 0x00080303;
+SDRAM[3].McEmemArbCfg                       = 0x00000014;
+SDRAM[3].McEmemArbOutstandingReq            = 0xc0000079;
+SDRAM[3].McEmemArbTimingRcd                 = 0x00000003;
+SDRAM[3].McEmemArbTimingRp                  = 0x00000004;
+SDRAM[3].McEmemArbTimingRc                  = 0x00000010;
+SDRAM[3].McEmemArbTimingRas                 = 0x0000000a;
+SDRAM[3].McEmemArbTimingFaw                 = 0x0000000a;
+SDRAM[3].McEmemArbTimingRrd                 = 0x00000001;
+SDRAM[3].McEmemArbTimingRap2Pre             = 0x00000003;
+SDRAM[3].McEmemArbTimingWap2Pre             = 0x0000000b;
+SDRAM[3].McEmemArbTimingR2R                 = 0x00000002;
+SDRAM[3].McEmemArbTimingW2W                 = 0x00000002;
+SDRAM[3].McEmemArbTimingR2W                 = 0x00000004;
+SDRAM[3].McEmemArbTimingW2R                 = 0x00000008;
+SDRAM[3].McEmemArbDaTurns                   = 0x08040202;
+SDRAM[3].McEmemArbDaCovers                  = 0x00140c10;
+SDRAM[3].McEmemArbMisc0                     = 0x70ea1f11;
+SDRAM[3].McEmemArbMisc1                     = 0x78000000;
+SDRAM[3].McEmemArbRing1Throttle             = 0x001f0000;
+SDRAM[3].McEmemArbOverride                  = 0x00000080;
+SDRAM[3].McEmemArbRsv                       = 0xff00ff00;
+SDRAM[3].McClkenOverride                    = 0x00000000;
diff --git a/cardhu/E1198_Hynix_2GB_H5TC4G83MFR-PBA_375MHz_111122_317_sdmmc4_x8.bct.cfg b/cardhu/E1198_Hynix_2GB_H5TC4G83MFR-PBA_375MHz_111122_317_sdmmc4_x8.bct.cfg
new file mode 100644
index 0000000..f4ee3e0
--- /dev/null
+++ b/cardhu/E1198_Hynix_2GB_H5TC4G83MFR-PBA_375MHz_111122_317_sdmmc4_x8.bct.cfg
@@ -0,0 +1,819 @@
+# Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+#
+# This software is provided 'as-is', without any express or implied
+# warranty. In no event will the authors be held liable for any damages
+# arising from the use of this software.
+#
+# Permission is granted to anyone to use this software for any purpose,
+# including commercial applications, and to alter it and redistribute it
+# freely, subject to the following restrictions:
+#
+# 1. The origin of this software must not be misrepresented; you must not
+#    claim that you wrote the original software. If you use this software
+#    in a product, an acknowledgment in the product documentation would be
+#    appreciated but is not required.
+# 2. Altered source versions must be plainly marked as such, and must not be
+#    misrepresented as being the original software.
+# 3. This notice may not be removed or altered from any source distribution.
+
+Version       = 0x00030001;
+BlockSize     = 0x00004000;
+PageSize      = 0x00000200;
+PartitionSize = 0x02000000;
+OdmData       = 0x800c0000;
+
+DevType[0] = NvBootDevType_Sdmmc;
+DeviceParam[0].SdmmcParams.ClockDivider           = 0x00000009;
+DeviceParam[0].SdmmcParams.DataWidth              = NvBootSdmmcDataWidth_8Bit;
+DeviceParam[0].SdmmcParams.MaxPowerClassSupported = 0x00000000;
+DeviceParam[0].SdmmcParams.SdController           = 0x00000000;
+
+DevType[1] = NvBootDevType_Sdmmc;
+DeviceParam[1].SdmmcParams.ClockDivider           = 0x00000009;
+DeviceParam[1].SdmmcParams.DataWidth              = NvBootSdmmcDataWidth_8Bit;
+DeviceParam[1].SdmmcParams.MaxPowerClassSupported = 0x00000000;
+DeviceParam[1].SdmmcParams.SdController           = 0x00000000;
+
+DevType[2] = NvBootDevType_Sdmmc;
+DeviceParam[2].SdmmcParams.ClockDivider           = 0x00000009;
+DeviceParam[2].SdmmcParams.DataWidth              = NvBootSdmmcDataWidth_8Bit;
+DeviceParam[2].SdmmcParams.MaxPowerClassSupported = 0x00000000;
+DeviceParam[2].SdmmcParams.SdController           = 0x00000000;
+
+DevType[3] = NvBootDevType_Sdmmc;
+DeviceParam[3].SdmmcParams.ClockDivider           = 0x00000009;
+DeviceParam[3].SdmmcParams.DataWidth              = NvBootSdmmcDataWidth_8Bit;
+DeviceParam[3].SdmmcParams.MaxPowerClassSupported = 0x00000000;
+DeviceParam[3].SdmmcParams.SdController           = 0x00000000;
+
+SDRAM[0].MemoryType                         = NvBootMemoryType_Ddr3;
+SDRAM[0].PllMChargePumpSetupControl         = 0x00000008;
+SDRAM[0].PllMLoopFilterSetupControl         = 0x00000000;
+SDRAM[0].PllMInputDivider                   = 0x0000000c;
+SDRAM[0].PllMFeedbackDivider                = 0x000002ee;
+SDRAM[0].PllMPostDivider                    = 0x00000000;
+SDRAM[0].PllMStableTime                     = 0x0000012c;
+SDRAM[0].EmcClockDivider                    = 0x00000002;
+SDRAM[0].EmcAutoCalInterval                 = 0x001fffff;
+SDRAM[0].EmcAutoCalConfig                   = 0xa0f10000;
+SDRAM[0].EmcAutoCalWait                     = 0x00000064;
+SDRAM[0].EmcPinProgramWait                  = 0x00000001;
+SDRAM[0].EmcRc                              = 0x00000011;
+SDRAM[0].EmcRfc                             = 0x0000006f;
+SDRAM[0].EmcRas                             = 0x0000000c;
+SDRAM[0].EmcRp                              = 0x00000004;
+SDRAM[0].EmcR2w                             = 0x00000003;
+SDRAM[0].EmcW2r                             = 0x00000008;
+SDRAM[0].EmcR2p                             = 0x00000002;
+SDRAM[0].EmcW2p                             = 0x0000000a;
+SDRAM[0].EmcRrd                             = 0x00000002;
+SDRAM[0].EmcRdRcd                           = 0x00000004;
+SDRAM[0].EmcWrRcd                           = 0x00000004;
+SDRAM[0].EmcRext                            = 0x00000001;
+SDRAM[0].EmcWdv                             = 0x00000004;
+SDRAM[0].EmcQUseExtra                       = 0x00000000;
+SDRAM[0].EmcQUse                            = 0x00000006;
+SDRAM[0].EmcQRst                            = 0x00000004;
+SDRAM[0].EmcQSafe                           = 0x0000000a;
+SDRAM[0].EmcRdv                             = 0x0000000d;
+SDRAM[0].EmcRefresh                         = 0x00000b2d;
+SDRAM[0].EmcBurstRefreshNum                 = 0x00000000;
+SDRAM[0].EmcPdEx2Wr                         = 0x00000001;
+SDRAM[0].EmcPdEx2Rd                         = 0x00000008;
+SDRAM[0].EmcPChg2Pden                       = 0x00000001;
+SDRAM[0].EmcAct2Pden                        = 0x00000000;
+SDRAM[0].EmcAr2Pden                         = 0x00000007;
+SDRAM[0].EmcRw2Pden                         = 0x0000000f;
+SDRAM[0].EmcTxsr                            = 0x00000075;
+SDRAM[0].EmcTcke                            = 0x00000004;
+SDRAM[0].EmcTfaw                            = 0x0000000c;
+SDRAM[0].EmcTrpab                           = 0x00000000;
+SDRAM[0].EmcTClkStable                      = 0x00000004;
+SDRAM[0].EmcTClkStop                        = 0x00000005;
+SDRAM[0].EmcTRefBw                          = 0x00000b6d;
+SDRAM[0].EmcFbioCfg5                        = 0x00007088;
+SDRAM[0].EmcFbioCfg6                        = 0x00000006;
+SDRAM[0].EmcFbioSpare                       = 0xd8000000;
+SDRAM[0].EmcMrsResetDllWait                 = 0x00000000;
+SDRAM[0].EmcMrsResetDll                     = 0x00000000;
+SDRAM[0].EmcMrsDdr2DllReset                 = 0x00000000;
+SDRAM[0].EmcMrs                             = 0x80000521;
+SDRAM[0].EmcEmrsEmr2                        = 0x80200000;
+SDRAM[0].EmcEmrsEmr3                        = 0x80300000;
+SDRAM[0].EmcEmrsDdr2DllEnable               = 0x00000000;
+SDRAM[0].EmcEmrsDdr2OcdCalib                = 0x00000000;
+SDRAM[0].EmcEmrs                            = 0x80100002;
+SDRAM[0].EmcMrw1                            = 0x00000000;
+SDRAM[0].EmcMrw2                            = 0x00000000;
+SDRAM[0].EmcMrw3                            = 0x00000000;
+SDRAM[0].EmcMrwResetCommand                 = 0x00000000;
+SDRAM[0].EmcMrwResetNInitWait               = 0x00000000;
+SDRAM[0].EmcAdrCfg                          = 0x00000080;
+SDRAM[0].McEmemCfg                          = 0x00000800;
+SDRAM[0].EmcCfg2                            = 0x000c0099;
+SDRAM[0].EmcCfgDigDll                       = 0x00200084;
+SDRAM[0].EmcCfgDigDllPeriod                 = 0x00008000;
+SDRAM[0].EmcCfg                             = 0x23c00000;
+SDRAM[0].EmcDbg                             = 0x01000400;
+SDRAM[0].WarmBootWait                       = 0x00000002;
+SDRAM[0].EmcCttTermCtrl                     = 0x00000802;
+SDRAM[0].EmcOdtWrite                        = 0x00000000;
+SDRAM[0].EmcOdtRead                         = 0x00000000;
+SDRAM[0].EmcZcalWaitCnt                     = 0x00000040;
+SDRAM[0].EmcZcalMrwCmd                      = 0x80000000;
+SDRAM[0].EmcDdr2Wait                        = 0x00000000;
+SDRAM[0].PmcDdrPwr                          = 0x00000003;
+SDRAM[0].EmcClockSource                     = 0x00000000;
+SDRAM[0].EmcClockUsePllMUD                  = 0x00000000;
+SDRAM[0].EmcPinExtraWait                    = 0x00000000;
+SDRAM[0].EmcTimingControlWait               = 0x00000000;
+SDRAM[0].EmcWext                            = 0x00000000;
+SDRAM[0].EmcCtt                             = 0x00000000;
+SDRAM[0].EmcCttDuration                     = 0x00000000;
+SDRAM[0].EmcPreRefreshReqCnt                = 0x000002cb;
+SDRAM[0].EmcTxsrDll                         = 0x00000200;
+SDRAM[0].EmcCfgRsv                          = 0xff00ff89;
+SDRAM[0].EmcMrwExtra                        = 0x00000000;
+SDRAM[0].EmcWarmBootMrw1                    = 0x00000000;
+SDRAM[0].EmcWarmBootMrw2                    = 0x00000000;
+SDRAM[0].EmcWarmBootMrw3                    = 0x00000000;
+SDRAM[0].EmcWarmBootMrwExtra                = 0x00000000;
+SDRAM[0].EmcWarmBootExtraModeRegWriteEnable = 0x00000000;
+SDRAM[0].EmcExtraModeRegWriteEnable         = 0x00000000;
+SDRAM[0].EmcMrsWaitCnt                      = 0x0150000c;
+SDRAM[0].EmcCmdQ                            = 0x10004408;
+SDRAM[0].EmcMc2EmcQ                         = 0x06000404;
+SDRAM[0].EmcDynSelfRefControl               = 0x8000174b;
+SDRAM[0].AhbArbitrationXbarCtrlMemInitDone  = 0x00000001;
+SDRAM[0].EmcDevSelect                       = 0x00000002;
+SDRAM[0].EmcSelDpdCtrl                      = 0x0004032c;
+SDRAM[0].EmcDllXformDqs0                    = 0x0003c000;
+SDRAM[0].EmcDllXformDqs1                    = 0x0003c000;
+SDRAM[0].EmcDllXformDqs2                    = 0x0003c000;
+SDRAM[0].EmcDllXformDqs3                    = 0x0003c000;
+SDRAM[0].EmcDllXformDqs4                    = 0x0003c000;
+SDRAM[0].EmcDllXformDqs5                    = 0x0003c000;
+SDRAM[0].EmcDllXformDqs6                    = 0x0003c000;
+SDRAM[0].EmcDllXformDqs7                    = 0x0003c000;
+SDRAM[0].EmcDllXformQUse0                   = 0x00000000;
+SDRAM[0].EmcDllXformQUse1                   = 0x00000000;
+SDRAM[0].EmcDllXformQUse2                   = 0x00000000;
+SDRAM[0].EmcDllXformQUse3                   = 0x00000000;
+SDRAM[0].EmcDllXformQUse4                   = 0x00000000;
+SDRAM[0].EmcDllXformQUse5                   = 0x00000000;
+SDRAM[0].EmcDllXformQUse6                   = 0x00000000;
+SDRAM[0].EmcDllXformQUse7                   = 0x00000000;
+SDRAM[0].EmcDliTrimTxDqs0                   = 0x00000000;
+SDRAM[0].EmcDliTrimTxDqs1                   = 0x00000000;
+SDRAM[0].EmcDliTrimTxDqs2                   = 0x00000000;
+SDRAM[0].EmcDliTrimTxDqs3                   = 0x00000000;
+SDRAM[0].EmcDliTrimTxDqs4                   = 0x00000000;
+SDRAM[0].EmcDliTrimTxDqs5                   = 0x00000000;
+SDRAM[0].EmcDliTrimTxDqs6                   = 0x00000000;
+SDRAM[0].EmcDliTrimTxDqs7                   = 0x00000000;
+SDRAM[0].EmcDllXformDq0                     = 0x00040000;
+SDRAM[0].EmcDllXformDq1                     = 0x00040000;
+SDRAM[0].EmcDllXformDq2                     = 0x00040000;
+SDRAM[0].EmcDllXformDq3                     = 0x00040000;
+SDRAM[0].EmcZcalInterval                    = 0x00020000;
+SDRAM[0].EmcZcalInitDev0                    = 0x80000011;
+SDRAM[0].EmcZcalInitDev1                    = 0x00000000;
+SDRAM[0].EmcZcalInitWait                    = 0x00000002;
+SDRAM[0].EmcZcalColdBootEnable              = 0x00000001;
+SDRAM[0].EmcZcalWarmBootEnable              = 0x00000001;
+SDRAM[0].EmcMrwLpddr2ZcalWarmBoot           = 0x000a00ab;
+SDRAM[0].EmcZqCalDdr3WarmBoot               = 0x00000011;
+SDRAM[0].EmcZcalWarmBootWait                = 0x00000001;
+SDRAM[0].EmcMrsWarmBootEnable               = 0x00000001;
+SDRAM[0].EmcMrsExtra                        = 0x80000521;
+SDRAM[0].EmcWarmBootMrs                     = 0x80100002;
+SDRAM[0].EmcWarmBootEmrs                    = 0x80000521;
+SDRAM[0].EmcWarmBootEmr2                    = 0x80200000;
+SDRAM[0].EmcWarmBootEmr3                    = 0x80300000;
+SDRAM[0].EmcWarmBootMrsExtra                = 0x80100002;
+SDRAM[0].EmcClkenOverride                   = 0x00000000;
+SDRAM[0].EmcExtraRefreshNum                 = 0x00000002;
+SDRAM[0].EmcClkenOverrideAllWarmBoot        = 0x00000000;
+SDRAM[0].McClkenOverrideAllWarmBoot         = 0x00000000;
+SDRAM[0].EmcCfgDigDllPeriodWarmBoot         = 0x00000003;
+SDRAM[0].PmcVddpSel                         = 0x00000002;
+SDRAM[0].PmcDdrCfg                          = 0x00000002;
+SDRAM[0].PmcIoDpdReq                        = 0x80800000;
+SDRAM[0].PmcENoVttGen                       = 0x00000000;
+SDRAM[0].PmcNoIoPower                       = 0x00000000;
+SDRAM[0].EmcXm2CmdPadCtrl                   = 0x000002a0;
+SDRAM[0].EmcXm2CmdPadCtrl2                  = 0x770c0000;
+SDRAM[0].EmcXm2DqsPadCtrl                   = 0x770c1414;
+SDRAM[0].EmcXm2DqsPadCtrl2                  = 0x0800013d;
+SDRAM[0].EmcXm2DqsPadCtrl3                  = 0x08000021;
+SDRAM[0].EmcXm2DqPadCtrl                    = 0x770c2990;
+SDRAM[0].EmcXm2DqPadCtrl2                   = 0x00000000;
+SDRAM[0].EmcXm2ClkPadCtrl                   = 0x77fff884;
+SDRAM[0].EmcXm2CompPadCtrl                  = 0x01f1f508;
+SDRAM[0].EmcXm2VttGenPadCtrl                = 0x05057404;
+SDRAM[0].EmcXm2VttGenPadCtrl2               = 0x54000007;
+SDRAM[0].EmcXm2QUsePadCtrl                  = 0x080001e8;
+SDRAM[0].McEmemAdrCfg                       = 0x00000000;
+SDRAM[0].McEmemAdrCfgDev0                   = 0x00090303;
+SDRAM[0].McEmemAdrCfgDev1                   = 0x00090303;
+SDRAM[0].McEmemArbCfg                       = 0x0000000b;
+SDRAM[0].McEmemArbOutstandingReq            = 0xc0000044;
+SDRAM[0].McEmemArbTimingRcd                 = 0x00000001;
+SDRAM[0].McEmemArbTimingRp                  = 0x00000002;
+SDRAM[0].McEmemArbTimingRc                  = 0x00000009;
+SDRAM[0].McEmemArbTimingRas                 = 0x00000005;
+SDRAM[0].McEmemArbTimingFaw                 = 0x00000005;
+SDRAM[0].McEmemArbTimingRrd                 = 0x00000001;
+SDRAM[0].McEmemArbTimingRap2Pre             = 0x00000002;
+SDRAM[0].McEmemArbTimingWap2Pre             = 0x00000008;
+SDRAM[0].McEmemArbTimingR2R                 = 0x00000002;
+SDRAM[0].McEmemArbTimingW2W                 = 0x00000002;
+SDRAM[0].McEmemArbTimingR2W                 = 0x00000003;
+SDRAM[0].McEmemArbTimingW2R                 = 0x00000006;
+SDRAM[0].McEmemArbDaTurns                   = 0x06030202;
+SDRAM[0].McEmemArbDaCovers                  = 0x000d0709;
+SDRAM[0].McEmemArbMisc0                     = 0x7086110a;
+SDRAM[0].McEmemArbMisc1                     = 0x78000000;
+SDRAM[0].McEmemArbRing1Throttle             = 0x001f0000;
+SDRAM[0].McEmemArbOverride                  = 0x00000080;
+SDRAM[0].McEmemArbRsv                       = 0xff00ff00;
+SDRAM[0].McClkenOverride                    = 0x00000000;
+
+SDRAM[1].MemoryType                         = NvBootMemoryType_Ddr3;
+SDRAM[1].PllMChargePumpSetupControl         = 0x00000008;
+SDRAM[1].PllMLoopFilterSetupControl         = 0x00000000;
+SDRAM[1].PllMInputDivider                   = 0x0000000c;
+SDRAM[1].PllMFeedbackDivider                = 0x000002ee;
+SDRAM[1].PllMPostDivider                    = 0x00000000;
+SDRAM[1].PllMStableTime                     = 0x0000012c;
+SDRAM[1].EmcClockDivider                    = 0x00000002;
+SDRAM[1].EmcAutoCalInterval                 = 0x001fffff;
+SDRAM[1].EmcAutoCalConfig                   = 0xa0f10000;
+SDRAM[1].EmcAutoCalWait                     = 0x00000064;
+SDRAM[1].EmcPinProgramWait                  = 0x00000001;
+SDRAM[1].EmcRc                              = 0x00000011;
+SDRAM[1].EmcRfc                             = 0x0000006f;
+SDRAM[1].EmcRas                             = 0x0000000c;
+SDRAM[1].EmcRp                              = 0x00000004;
+SDRAM[1].EmcR2w                             = 0x00000003;
+SDRAM[1].EmcW2r                             = 0x00000008;
+SDRAM[1].EmcR2p                             = 0x00000002;
+SDRAM[1].EmcW2p                             = 0x0000000a;
+SDRAM[1].EmcRrd                             = 0x00000002;
+SDRAM[1].EmcRdRcd                           = 0x00000004;
+SDRAM[1].EmcWrRcd                           = 0x00000004;
+SDRAM[1].EmcRext                            = 0x00000001;
+SDRAM[1].EmcWdv                             = 0x00000004;
+SDRAM[1].EmcQUseExtra                       = 0x00000000;
+SDRAM[1].EmcQUse                            = 0x00000006;
+SDRAM[1].EmcQRst                            = 0x00000004;
+SDRAM[1].EmcQSafe                           = 0x0000000a;
+SDRAM[1].EmcRdv                             = 0x0000000d;
+SDRAM[1].EmcRefresh                         = 0x00000b2d;
+SDRAM[1].EmcBurstRefreshNum                 = 0x00000000;
+SDRAM[1].EmcPdEx2Wr                         = 0x00000001;
+SDRAM[1].EmcPdEx2Rd                         = 0x00000008;
+SDRAM[1].EmcPChg2Pden                       = 0x00000001;
+SDRAM[1].EmcAct2Pden                        = 0x00000000;
+SDRAM[1].EmcAr2Pden                         = 0x00000007;
+SDRAM[1].EmcRw2Pden                         = 0x0000000f;
+SDRAM[1].EmcTxsr                            = 0x00000075;
+SDRAM[1].EmcTcke                            = 0x00000004;
+SDRAM[1].EmcTfaw                            = 0x0000000c;
+SDRAM[1].EmcTrpab                           = 0x00000000;
+SDRAM[1].EmcTClkStable                      = 0x00000004;
+SDRAM[1].EmcTClkStop                        = 0x00000005;
+SDRAM[1].EmcTRefBw                          = 0x00000b6d;
+SDRAM[1].EmcFbioCfg5                        = 0x00007088;
+SDRAM[1].EmcFbioCfg6                        = 0x00000006;
+SDRAM[1].EmcFbioSpare                       = 0xd8000000;
+SDRAM[1].EmcMrsResetDllWait                 = 0x00000000;
+SDRAM[1].EmcMrsResetDll                     = 0x00000000;
+SDRAM[1].EmcMrsDdr2DllReset                 = 0x00000000;
+SDRAM[1].EmcMrs                             = 0x80000521;
+SDRAM[1].EmcEmrsEmr2                        = 0x80200000;
+SDRAM[1].EmcEmrsEmr3                        = 0x80300000;
+SDRAM[1].EmcEmrsDdr2DllEnable               = 0x00000000;
+SDRAM[1].EmcEmrsDdr2OcdCalib                = 0x00000000;
+SDRAM[1].EmcEmrs                            = 0x80100002;
+SDRAM[1].EmcMrw1                            = 0x00000000;
+SDRAM[1].EmcMrw2                            = 0x00000000;
+SDRAM[1].EmcMrw3                            = 0x00000000;
+SDRAM[1].EmcMrwResetCommand                 = 0x00000000;
+SDRAM[1].EmcMrwResetNInitWait               = 0x00000000;
+SDRAM[1].EmcAdrCfg                          = 0x00000080;
+SDRAM[1].McEmemCfg                          = 0x00000800;
+SDRAM[1].EmcCfg2                            = 0x000c0099;
+SDRAM[1].EmcCfgDigDll                       = 0x00200084;
+SDRAM[1].EmcCfgDigDllPeriod                 = 0x00008000;
+SDRAM[1].EmcCfg                             = 0x23c00000;
+SDRAM[1].EmcDbg                             = 0x01000400;
+SDRAM[1].WarmBootWait                       = 0x00000002;
+SDRAM[1].EmcCttTermCtrl                     = 0x00000802;
+SDRAM[1].EmcOdtWrite                        = 0x00000000;
+SDRAM[1].EmcOdtRead                         = 0x00000000;
+SDRAM[1].EmcZcalWaitCnt                     = 0x00000040;
+SDRAM[1].EmcZcalMrwCmd                      = 0x80000000;
+SDRAM[1].EmcDdr2Wait                        = 0x00000000;
+SDRAM[1].PmcDdrPwr                          = 0x00000003;
+SDRAM[1].EmcClockSource                     = 0x00000000;
+SDRAM[1].EmcClockUsePllMUD                  = 0x00000000;
+SDRAM[1].EmcPinExtraWait                    = 0x00000000;
+SDRAM[1].EmcTimingControlWait               = 0x00000000;
+SDRAM[1].EmcWext                            = 0x00000000;
+SDRAM[1].EmcCtt                             = 0x00000000;
+SDRAM[1].EmcCttDuration                     = 0x00000000;
+SDRAM[1].EmcPreRefreshReqCnt                = 0x000002cb;
+SDRAM[1].EmcTxsrDll                         = 0x00000200;
+SDRAM[1].EmcCfgRsv                          = 0xff00ff89;
+SDRAM[1].EmcMrwExtra                        = 0x00000000;
+SDRAM[1].EmcWarmBootMrw1                    = 0x00000000;
+SDRAM[1].EmcWarmBootMrw2                    = 0x00000000;
+SDRAM[1].EmcWarmBootMrw3                    = 0x00000000;
+SDRAM[1].EmcWarmBootMrwExtra                = 0x00000000;
+SDRAM[1].EmcWarmBootExtraModeRegWriteEnable = 0x00000000;
+SDRAM[1].EmcExtraModeRegWriteEnable         = 0x00000000;
+SDRAM[1].EmcMrsWaitCnt                      = 0x0150000c;
+SDRAM[1].EmcCmdQ                            = 0x10004408;
+SDRAM[1].EmcMc2EmcQ                         = 0x06000404;
+SDRAM[1].EmcDynSelfRefControl               = 0x8000174b;
+SDRAM[1].AhbArbitrationXbarCtrlMemInitDone  = 0x00000001;
+SDRAM[1].EmcDevSelect                       = 0x00000002;
+SDRAM[1].EmcSelDpdCtrl                      = 0x0004032c;
+SDRAM[1].EmcDllXformDqs0                    = 0x0003c000;
+SDRAM[1].EmcDllXformDqs1                    = 0x0003c000;
+SDRAM[1].EmcDllXformDqs2                    = 0x0003c000;
+SDRAM[1].EmcDllXformDqs3                    = 0x0003c000;
+SDRAM[1].EmcDllXformDqs4                    = 0x0003c000;
+SDRAM[1].EmcDllXformDqs5                    = 0x0003c000;
+SDRAM[1].EmcDllXformDqs6                    = 0x0003c000;
+SDRAM[1].EmcDllXformDqs7                    = 0x0003c000;
+SDRAM[1].EmcDllXformQUse0                   = 0x00000000;
+SDRAM[1].EmcDllXformQUse1                   = 0x00000000;
+SDRAM[1].EmcDllXformQUse2                   = 0x00000000;
+SDRAM[1].EmcDllXformQUse3                   = 0x00000000;
+SDRAM[1].EmcDllXformQUse4                   = 0x00000000;
+SDRAM[1].EmcDllXformQUse5                   = 0x00000000;
+SDRAM[1].EmcDllXformQUse6                   = 0x00000000;
+SDRAM[1].EmcDllXformQUse7                   = 0x00000000;
+SDRAM[1].EmcDliTrimTxDqs0                   = 0x00000000;
+SDRAM[1].EmcDliTrimTxDqs1                   = 0x00000000;
+SDRAM[1].EmcDliTrimTxDqs2                   = 0x00000000;
+SDRAM[1].EmcDliTrimTxDqs3                   = 0x00000000;
+SDRAM[1].EmcDliTrimTxDqs4                   = 0x00000000;
+SDRAM[1].EmcDliTrimTxDqs5                   = 0x00000000;
+SDRAM[1].EmcDliTrimTxDqs6                   = 0x00000000;
+SDRAM[1].EmcDliTrimTxDqs7                   = 0x00000000;
+SDRAM[1].EmcDllXformDq0                     = 0x00040000;
+SDRAM[1].EmcDllXformDq1                     = 0x00040000;
+SDRAM[1].EmcDllXformDq2                     = 0x00040000;
+SDRAM[1].EmcDllXformDq3                     = 0x00040000;
+SDRAM[1].EmcZcalInterval                    = 0x00020000;
+SDRAM[1].EmcZcalInitDev0                    = 0x80000011;
+SDRAM[1].EmcZcalInitDev1                    = 0x00000000;
+SDRAM[1].EmcZcalInitWait                    = 0x00000002;
+SDRAM[1].EmcZcalColdBootEnable              = 0x00000001;
+SDRAM[1].EmcZcalWarmBootEnable              = 0x00000001;
+SDRAM[1].EmcMrwLpddr2ZcalWarmBoot           = 0x000a00ab;
+SDRAM[1].EmcZqCalDdr3WarmBoot               = 0x00000011;
+SDRAM[1].EmcZcalWarmBootWait                = 0x00000001;
+SDRAM[1].EmcMrsWarmBootEnable               = 0x00000001;
+SDRAM[1].EmcMrsExtra                        = 0x80000521;
+SDRAM[1].EmcWarmBootMrs                     = 0x80100002;
+SDRAM[1].EmcWarmBootEmrs                    = 0x80000521;
+SDRAM[1].EmcWarmBootEmr2                    = 0x80200000;
+SDRAM[1].EmcWarmBootEmr3                    = 0x80300000;
+SDRAM[1].EmcWarmBootMrsExtra                = 0x80100002;
+SDRAM[1].EmcClkenOverride                   = 0x00000000;
+SDRAM[1].EmcExtraRefreshNum                 = 0x00000002;
+SDRAM[1].EmcClkenOverrideAllWarmBoot        = 0x00000000;
+SDRAM[1].McClkenOverrideAllWarmBoot         = 0x00000000;
+SDRAM[1].EmcCfgDigDllPeriodWarmBoot         = 0x00000003;
+SDRAM[1].PmcVddpSel                         = 0x00000002;
+SDRAM[1].PmcDdrCfg                          = 0x00000002;
+SDRAM[1].PmcIoDpdReq                        = 0x80800000;
+SDRAM[1].PmcENoVttGen                       = 0x00000000;
+SDRAM[1].PmcNoIoPower                       = 0x00000000;
+SDRAM[1].EmcXm2CmdPadCtrl                   = 0x000002a0;
+SDRAM[1].EmcXm2CmdPadCtrl2                  = 0x770c0000;
+SDRAM[1].EmcXm2DqsPadCtrl                   = 0x770c1414;
+SDRAM[1].EmcXm2DqsPadCtrl2                  = 0x0800013d;
+SDRAM[1].EmcXm2DqsPadCtrl3                  = 0x08000021;
+SDRAM[1].EmcXm2DqPadCtrl                    = 0x770c2990;
+SDRAM[1].EmcXm2DqPadCtrl2                   = 0x00000000;
+SDRAM[1].EmcXm2ClkPadCtrl                   = 0x77fff884;
+SDRAM[1].EmcXm2CompPadCtrl                  = 0x01f1f508;
+SDRAM[1].EmcXm2VttGenPadCtrl                = 0x05057404;
+SDRAM[1].EmcXm2VttGenPadCtrl2               = 0x54000007;
+SDRAM[1].EmcXm2QUsePadCtrl                  = 0x080001e8;
+SDRAM[1].McEmemAdrCfg                       = 0x00000000;
+SDRAM[1].McEmemAdrCfgDev0                   = 0x00090303;
+SDRAM[1].McEmemAdrCfgDev1                   = 0x00090303;
+SDRAM[1].McEmemArbCfg                       = 0x0000000b;
+SDRAM[1].McEmemArbOutstandingReq            = 0xc0000044;
+SDRAM[1].McEmemArbTimingRcd                 = 0x00000001;
+SDRAM[1].McEmemArbTimingRp                  = 0x00000002;
+SDRAM[1].McEmemArbTimingRc                  = 0x00000009;
+SDRAM[1].McEmemArbTimingRas                 = 0x00000005;
+SDRAM[1].McEmemArbTimingFaw                 = 0x00000005;
+SDRAM[1].McEmemArbTimingRrd                 = 0x00000001;
+SDRAM[1].McEmemArbTimingRap2Pre             = 0x00000002;
+SDRAM[1].McEmemArbTimingWap2Pre             = 0x00000008;
+SDRAM[1].McEmemArbTimingR2R                 = 0x00000002;
+SDRAM[1].McEmemArbTimingW2W                 = 0x00000002;
+SDRAM[1].McEmemArbTimingR2W                 = 0x00000003;
+SDRAM[1].McEmemArbTimingW2R                 = 0x00000006;
+SDRAM[1].McEmemArbDaTurns                   = 0x06030202;
+SDRAM[1].McEmemArbDaCovers                  = 0x000d0709;
+SDRAM[1].McEmemArbMisc0                     = 0x7086110a;
+SDRAM[1].McEmemArbMisc1                     = 0x78000000;
+SDRAM[1].McEmemArbRing1Throttle             = 0x001f0000;
+SDRAM[1].McEmemArbOverride                  = 0x00000080;
+SDRAM[1].McEmemArbRsv                       = 0xff00ff00;
+SDRAM[1].McClkenOverride                    = 0x00000000;
+
+SDRAM[2].MemoryType                         = NvBootMemoryType_Ddr3;
+SDRAM[2].PllMChargePumpSetupControl         = 0x00000008;
+SDRAM[2].PllMLoopFilterSetupControl         = 0x00000000;
+SDRAM[2].PllMInputDivider                   = 0x0000000c;
+SDRAM[2].PllMFeedbackDivider                = 0x000002ee;
+SDRAM[2].PllMPostDivider                    = 0x00000000;
+SDRAM[2].PllMStableTime                     = 0x0000012c;
+SDRAM[2].EmcClockDivider                    = 0x00000002;
+SDRAM[2].EmcAutoCalInterval                 = 0x001fffff;
+SDRAM[2].EmcAutoCalConfig                   = 0xa0f10000;
+SDRAM[2].EmcAutoCalWait                     = 0x00000064;
+SDRAM[2].EmcPinProgramWait                  = 0x00000001;
+SDRAM[2].EmcRc                              = 0x00000011;
+SDRAM[2].EmcRfc                             = 0x0000006f;
+SDRAM[2].EmcRas                             = 0x0000000c;
+SDRAM[2].EmcRp                              = 0x00000004;
+SDRAM[2].EmcR2w                             = 0x00000003;
+SDRAM[2].EmcW2r                             = 0x00000008;
+SDRAM[2].EmcR2p                             = 0x00000002;
+SDRAM[2].EmcW2p                             = 0x0000000a;
+SDRAM[2].EmcRrd                             = 0x00000002;
+SDRAM[2].EmcRdRcd                           = 0x00000004;
+SDRAM[2].EmcWrRcd                           = 0x00000004;
+SDRAM[2].EmcRext                            = 0x00000001;
+SDRAM[2].EmcWdv                             = 0x00000004;
+SDRAM[2].EmcQUseExtra                       = 0x00000000;
+SDRAM[2].EmcQUse                            = 0x00000006;
+SDRAM[2].EmcQRst                            = 0x00000004;
+SDRAM[2].EmcQSafe                           = 0x0000000a;
+SDRAM[2].EmcRdv                             = 0x0000000d;
+SDRAM[2].EmcRefresh                         = 0x00000b2d;
+SDRAM[2].EmcBurstRefreshNum                 = 0x00000000;
+SDRAM[2].EmcPdEx2Wr                         = 0x00000001;
+SDRAM[2].EmcPdEx2Rd                         = 0x00000008;
+SDRAM[2].EmcPChg2Pden                       = 0x00000001;
+SDRAM[2].EmcAct2Pden                        = 0x00000000;
+SDRAM[2].EmcAr2Pden                         = 0x00000007;
+SDRAM[2].EmcRw2Pden                         = 0x0000000f;
+SDRAM[2].EmcTxsr                            = 0x00000075;
+SDRAM[2].EmcTcke                            = 0x00000004;
+SDRAM[2].EmcTfaw                            = 0x0000000c;
+SDRAM[2].EmcTrpab                           = 0x00000000;
+SDRAM[2].EmcTClkStable                      = 0x00000004;
+SDRAM[2].EmcTClkStop                        = 0x00000005;
+SDRAM[2].EmcTRefBw                          = 0x00000b6d;
+SDRAM[2].EmcFbioCfg5                        = 0x00007088;
+SDRAM[2].EmcFbioCfg6                        = 0x00000006;
+SDRAM[2].EmcFbioSpare                       = 0xd8000000;
+SDRAM[2].EmcMrsResetDllWait                 = 0x00000000;
+SDRAM[2].EmcMrsResetDll                     = 0x00000000;
+SDRAM[2].EmcMrsDdr2DllReset                 = 0x00000000;
+SDRAM[2].EmcMrs                             = 0x80000521;
+SDRAM[2].EmcEmrsEmr2                        = 0x80200000;
+SDRAM[2].EmcEmrsEmr3                        = 0x80300000;
+SDRAM[2].EmcEmrsDdr2DllEnable               = 0x00000000;
+SDRAM[2].EmcEmrsDdr2OcdCalib                = 0x00000000;
+SDRAM[2].EmcEmrs                            = 0x80100002;
+SDRAM[2].EmcMrw1                            = 0x00000000;
+SDRAM[2].EmcMrw2                            = 0x00000000;
+SDRAM[2].EmcMrw3                            = 0x00000000;
+SDRAM[2].EmcMrwResetCommand                 = 0x00000000;
+SDRAM[2].EmcMrwResetNInitWait               = 0x00000000;
+SDRAM[2].EmcAdrCfg                          = 0x00000080;
+SDRAM[2].McEmemCfg                          = 0x00000800;
+SDRAM[2].EmcCfg2                            = 0x000c0099;
+SDRAM[2].EmcCfgDigDll                       = 0x00200084;
+SDRAM[2].EmcCfgDigDllPeriod                 = 0x00008000;
+SDRAM[2].EmcCfg                             = 0x23c00000;
+SDRAM[2].EmcDbg                             = 0x01000400;
+SDRAM[2].WarmBootWait                       = 0x00000002;
+SDRAM[2].EmcCttTermCtrl                     = 0x00000802;
+SDRAM[2].EmcOdtWrite                        = 0x00000000;
+SDRAM[2].EmcOdtRead                         = 0x00000000;
+SDRAM[2].EmcZcalWaitCnt                     = 0x00000040;
+SDRAM[2].EmcZcalMrwCmd                      = 0x80000000;
+SDRAM[2].EmcDdr2Wait                        = 0x00000000;
+SDRAM[2].PmcDdrPwr                          = 0x00000003;
+SDRAM[2].EmcClockSource                     = 0x00000000;
+SDRAM[2].EmcClockUsePllMUD                  = 0x00000000;
+SDRAM[2].EmcPinExtraWait                    = 0x00000000;
+SDRAM[2].EmcTimingControlWait               = 0x00000000;
+SDRAM[2].EmcWext                            = 0x00000000;
+SDRAM[2].EmcCtt                             = 0x00000000;
+SDRAM[2].EmcCttDuration                     = 0x00000000;
+SDRAM[2].EmcPreRefreshReqCnt                = 0x000002cb;
+SDRAM[2].EmcTxsrDll                         = 0x00000200;
+SDRAM[2].EmcCfgRsv                          = 0xff00ff89;
+SDRAM[2].EmcMrwExtra                        = 0x00000000;
+SDRAM[2].EmcWarmBootMrw1                    = 0x00000000;
+SDRAM[2].EmcWarmBootMrw2                    = 0x00000000;
+SDRAM[2].EmcWarmBootMrw3                    = 0x00000000;
+SDRAM[2].EmcWarmBootMrwExtra                = 0x00000000;
+SDRAM[2].EmcWarmBootExtraModeRegWriteEnable = 0x00000000;
+SDRAM[2].EmcExtraModeRegWriteEnable         = 0x00000000;
+SDRAM[2].EmcMrsWaitCnt                      = 0x0150000c;
+SDRAM[2].EmcCmdQ                            = 0x10004408;
+SDRAM[2].EmcMc2EmcQ                         = 0x06000404;
+SDRAM[2].EmcDynSelfRefControl               = 0x8000174b;
+SDRAM[2].AhbArbitrationXbarCtrlMemInitDone  = 0x00000001;
+SDRAM[2].EmcDevSelect                       = 0x00000002;
+SDRAM[2].EmcSelDpdCtrl                      = 0x0004032c;
+SDRAM[2].EmcDllXformDqs0                    = 0x0003c000;
+SDRAM[2].EmcDllXformDqs1                    = 0x0003c000;
+SDRAM[2].EmcDllXformDqs2                    = 0x0003c000;
+SDRAM[2].EmcDllXformDqs3                    = 0x0003c000;
+SDRAM[2].EmcDllXformDqs4                    = 0x0003c000;
+SDRAM[2].EmcDllXformDqs5                    = 0x0003c000;
+SDRAM[2].EmcDllXformDqs6                    = 0x0003c000;
+SDRAM[2].EmcDllXformDqs7                    = 0x0003c000;
+SDRAM[2].EmcDllXformQUse0                   = 0x00000000;
+SDRAM[2].EmcDllXformQUse1                   = 0x00000000;
+SDRAM[2].EmcDllXformQUse2                   = 0x00000000;
+SDRAM[2].EmcDllXformQUse3                   = 0x00000000;
+SDRAM[2].EmcDllXformQUse4                   = 0x00000000;
+SDRAM[2].EmcDllXformQUse5                   = 0x00000000;
+SDRAM[2].EmcDllXformQUse6                   = 0x00000000;
+SDRAM[2].EmcDllXformQUse7                   = 0x00000000;
+SDRAM[2].EmcDliTrimTxDqs0                   = 0x00000000;
+SDRAM[2].EmcDliTrimTxDqs1                   = 0x00000000;
+SDRAM[2].EmcDliTrimTxDqs2                   = 0x00000000;
+SDRAM[2].EmcDliTrimTxDqs3                   = 0x00000000;
+SDRAM[2].EmcDliTrimTxDqs4                   = 0x00000000;
+SDRAM[2].EmcDliTrimTxDqs5                   = 0x00000000;
+SDRAM[2].EmcDliTrimTxDqs6                   = 0x00000000;
+SDRAM[2].EmcDliTrimTxDqs7                   = 0x00000000;
+SDRAM[2].EmcDllXformDq0                     = 0x00040000;
+SDRAM[2].EmcDllXformDq1                     = 0x00040000;
+SDRAM[2].EmcDllXformDq2                     = 0x00040000;
+SDRAM[2].EmcDllXformDq3                     = 0x00040000;
+SDRAM[2].EmcZcalInterval                    = 0x00020000;
+SDRAM[2].EmcZcalInitDev0                    = 0x80000011;
+SDRAM[2].EmcZcalInitDev1                    = 0x00000000;
+SDRAM[2].EmcZcalInitWait                    = 0x00000002;
+SDRAM[2].EmcZcalColdBootEnable              = 0x00000001;
+SDRAM[2].EmcZcalWarmBootEnable              = 0x00000001;
+SDRAM[2].EmcMrwLpddr2ZcalWarmBoot           = 0x000a00ab;
+SDRAM[2].EmcZqCalDdr3WarmBoot               = 0x00000011;
+SDRAM[2].EmcZcalWarmBootWait                = 0x00000001;
+SDRAM[2].EmcMrsWarmBootEnable               = 0x00000001;
+SDRAM[2].EmcMrsExtra                        = 0x80000521;
+SDRAM[2].EmcWarmBootMrs                     = 0x80100002;
+SDRAM[2].EmcWarmBootEmrs                    = 0x80000521;
+SDRAM[2].EmcWarmBootEmr2                    = 0x80200000;
+SDRAM[2].EmcWarmBootEmr3                    = 0x80300000;
+SDRAM[2].EmcWarmBootMrsExtra                = 0x80100002;
+SDRAM[2].EmcClkenOverride                   = 0x00000000;
+SDRAM[2].EmcExtraRefreshNum                 = 0x00000002;
+SDRAM[2].EmcClkenOverrideAllWarmBoot        = 0x00000000;
+SDRAM[2].McClkenOverrideAllWarmBoot         = 0x00000000;
+SDRAM[2].EmcCfgDigDllPeriodWarmBoot         = 0x00000003;
+SDRAM[2].PmcVddpSel                         = 0x00000002;
+SDRAM[2].PmcDdrCfg                          = 0x00000002;
+SDRAM[2].PmcIoDpdReq                        = 0x80800000;
+SDRAM[2].PmcENoVttGen                       = 0x00000000;
+SDRAM[2].PmcNoIoPower                       = 0x00000000;
+SDRAM[2].EmcXm2CmdPadCtrl                   = 0x000002a0;
+SDRAM[2].EmcXm2CmdPadCtrl2                  = 0x770c0000;
+SDRAM[2].EmcXm2DqsPadCtrl                   = 0x770c1414;
+SDRAM[2].EmcXm2DqsPadCtrl2                  = 0x0800013d;
+SDRAM[2].EmcXm2DqsPadCtrl3                  = 0x08000021;
+SDRAM[2].EmcXm2DqPadCtrl                    = 0x770c2990;
+SDRAM[2].EmcXm2DqPadCtrl2                   = 0x00000000;
+SDRAM[2].EmcXm2ClkPadCtrl                   = 0x77fff884;
+SDRAM[2].EmcXm2CompPadCtrl                  = 0x01f1f508;
+SDRAM[2].EmcXm2VttGenPadCtrl                = 0x05057404;
+SDRAM[2].EmcXm2VttGenPadCtrl2               = 0x54000007;
+SDRAM[2].EmcXm2QUsePadCtrl                  = 0x080001e8;
+SDRAM[2].McEmemAdrCfg                       = 0x00000000;
+SDRAM[2].McEmemAdrCfgDev0                   = 0x00090303;
+SDRAM[2].McEmemAdrCfgDev1                   = 0x00090303;
+SDRAM[2].McEmemArbCfg                       = 0x0000000b;
+SDRAM[2].McEmemArbOutstandingReq            = 0xc0000044;
+SDRAM[2].McEmemArbTimingRcd                 = 0x00000001;
+SDRAM[2].McEmemArbTimingRp                  = 0x00000002;
+SDRAM[2].McEmemArbTimingRc                  = 0x00000009;
+SDRAM[2].McEmemArbTimingRas                 = 0x00000005;
+SDRAM[2].McEmemArbTimingFaw                 = 0x00000005;
+SDRAM[2].McEmemArbTimingRrd                 = 0x00000001;
+SDRAM[2].McEmemArbTimingRap2Pre             = 0x00000002;
+SDRAM[2].McEmemArbTimingWap2Pre             = 0x00000008;
+SDRAM[2].McEmemArbTimingR2R                 = 0x00000002;
+SDRAM[2].McEmemArbTimingW2W                 = 0x00000002;
+SDRAM[2].McEmemArbTimingR2W                 = 0x00000003;
+SDRAM[2].McEmemArbTimingW2R                 = 0x00000006;
+SDRAM[2].McEmemArbDaTurns                   = 0x06030202;
+SDRAM[2].McEmemArbDaCovers                  = 0x000d0709;
+SDRAM[2].McEmemArbMisc0                     = 0x7086110a;
+SDRAM[2].McEmemArbMisc1                     = 0x78000000;
+SDRAM[2].McEmemArbRing1Throttle             = 0x001f0000;
+SDRAM[2].McEmemArbOverride                  = 0x00000080;
+SDRAM[2].McEmemArbRsv                       = 0xff00ff00;
+SDRAM[2].McClkenOverride                    = 0x00000000;
+
+SDRAM[3].MemoryType                         = NvBootMemoryType_Ddr3;
+SDRAM[3].PllMChargePumpSetupControl         = 0x00000008;
+SDRAM[3].PllMLoopFilterSetupControl         = 0x00000000;
+SDRAM[3].PllMInputDivider                   = 0x0000000c;
+SDRAM[3].PllMFeedbackDivider                = 0x000002ee;
+SDRAM[3].PllMPostDivider                    = 0x00000000;
+SDRAM[3].PllMStableTime                     = 0x0000012c;
+SDRAM[3].EmcClockDivider                    = 0x00000002;
+SDRAM[3].EmcAutoCalInterval                 = 0x001fffff;
+SDRAM[3].EmcAutoCalConfig                   = 0xa0f10000;
+SDRAM[3].EmcAutoCalWait                     = 0x00000064;
+SDRAM[3].EmcPinProgramWait                  = 0x00000001;
+SDRAM[3].EmcRc                              = 0x00000011;
+SDRAM[3].EmcRfc                             = 0x0000006f;
+SDRAM[3].EmcRas                             = 0x0000000c;
+SDRAM[3].EmcRp                              = 0x00000004;
+SDRAM[3].EmcR2w                             = 0x00000003;
+SDRAM[3].EmcW2r                             = 0x00000008;
+SDRAM[3].EmcR2p                             = 0x00000002;
+SDRAM[3].EmcW2p                             = 0x0000000a;
+SDRAM[3].EmcRrd                             = 0x00000002;
+SDRAM[3].EmcRdRcd                           = 0x00000004;
+SDRAM[3].EmcWrRcd                           = 0x00000004;
+SDRAM[3].EmcRext                            = 0x00000001;
+SDRAM[3].EmcWdv                             = 0x00000004;
+SDRAM[3].EmcQUseExtra                       = 0x00000000;
+SDRAM[3].EmcQUse                            = 0x00000006;
+SDRAM[3].EmcQRst                            = 0x00000004;
+SDRAM[3].EmcQSafe                           = 0x0000000a;
+SDRAM[3].EmcRdv                             = 0x0000000d;
+SDRAM[3].EmcRefresh                         = 0x00000b2d;
+SDRAM[3].EmcBurstRefreshNum                 = 0x00000000;
+SDRAM[3].EmcPdEx2Wr                         = 0x00000001;
+SDRAM[3].EmcPdEx2Rd                         = 0x00000008;
+SDRAM[3].EmcPChg2Pden                       = 0x00000001;
+SDRAM[3].EmcAct2Pden                        = 0x00000000;
+SDRAM[3].EmcAr2Pden                         = 0x00000007;
+SDRAM[3].EmcRw2Pden                         = 0x0000000f;
+SDRAM[3].EmcTxsr                            = 0x00000075;
+SDRAM[3].EmcTcke                            = 0x00000004;
+SDRAM[3].EmcTfaw                            = 0x0000000c;
+SDRAM[3].EmcTrpab                           = 0x00000000;
+SDRAM[3].EmcTClkStable                      = 0x00000004;
+SDRAM[3].EmcTClkStop                        = 0x00000005;
+SDRAM[3].EmcTRefBw                          = 0x00000b6d;
+SDRAM[3].EmcFbioCfg5                        = 0x00007088;
+SDRAM[3].EmcFbioCfg6                        = 0x00000006;
+SDRAM[3].EmcFbioSpare                       = 0xd8000000;
+SDRAM[3].EmcMrsResetDllWait                 = 0x00000000;
+SDRAM[3].EmcMrsResetDll                     = 0x00000000;
+SDRAM[3].EmcMrsDdr2DllReset                 = 0x00000000;
+SDRAM[3].EmcMrs                             = 0x80000521;
+SDRAM[3].EmcEmrsEmr2                        = 0x80200000;
+SDRAM[3].EmcEmrsEmr3                        = 0x80300000;
+SDRAM[3].EmcEmrsDdr2DllEnable               = 0x00000000;
+SDRAM[3].EmcEmrsDdr2OcdCalib                = 0x00000000;
+SDRAM[3].EmcEmrs                            = 0x80100002;
+SDRAM[3].EmcMrw1                            = 0x00000000;
+SDRAM[3].EmcMrw2                            = 0x00000000;
+SDRAM[3].EmcMrw3                            = 0x00000000;
+SDRAM[3].EmcMrwResetCommand                 = 0x00000000;
+SDRAM[3].EmcMrwResetNInitWait               = 0x00000000;
+SDRAM[3].EmcAdrCfg                          = 0x00000080;
+SDRAM[3].McEmemCfg                          = 0x00000800;
+SDRAM[3].EmcCfg2                            = 0x000c0099;
+SDRAM[3].EmcCfgDigDll                       = 0x00200084;
+SDRAM[3].EmcCfgDigDllPeriod                 = 0x00008000;
+SDRAM[3].EmcCfg                             = 0x23c00000;
+SDRAM[3].EmcDbg                             = 0x01000400;
+SDRAM[3].WarmBootWait                       = 0x00000002;
+SDRAM[3].EmcCttTermCtrl                     = 0x00000802;
+SDRAM[3].EmcOdtWrite                        = 0x00000000;
+SDRAM[3].EmcOdtRead                         = 0x00000000;
+SDRAM[3].EmcZcalWaitCnt                     = 0x00000040;
+SDRAM[3].EmcZcalMrwCmd                      = 0x80000000;
+SDRAM[3].EmcDdr2Wait                        = 0x00000000;
+SDRAM[3].PmcDdrPwr                          = 0x00000003;
+SDRAM[3].EmcClockSource                     = 0x00000000;
+SDRAM[3].EmcClockUsePllMUD                  = 0x00000000;
+SDRAM[3].EmcPinExtraWait                    = 0x00000000;
+SDRAM[3].EmcTimingControlWait               = 0x00000000;
+SDRAM[3].EmcWext                            = 0x00000000;
+SDRAM[3].EmcCtt                             = 0x00000000;
+SDRAM[3].EmcCttDuration                     = 0x00000000;
+SDRAM[3].EmcPreRefreshReqCnt                = 0x000002cb;
+SDRAM[3].EmcTxsrDll                         = 0x00000200;
+SDRAM[3].EmcCfgRsv                          = 0xff00ff89;
+SDRAM[3].EmcMrwExtra                        = 0x00000000;
+SDRAM[3].EmcWarmBootMrw1                    = 0x00000000;
+SDRAM[3].EmcWarmBootMrw2                    = 0x00000000;
+SDRAM[3].EmcWarmBootMrw3                    = 0x00000000;
+SDRAM[3].EmcWarmBootMrwExtra                = 0x00000000;
+SDRAM[3].EmcWarmBootExtraModeRegWriteEnable = 0x00000000;
+SDRAM[3].EmcExtraModeRegWriteEnable         = 0x00000000;
+SDRAM[3].EmcMrsWaitCnt                      = 0x0150000c;
+SDRAM[3].EmcCmdQ                            = 0x10004408;
+SDRAM[3].EmcMc2EmcQ                         = 0x06000404;
+SDRAM[3].EmcDynSelfRefControl               = 0x8000174b;
+SDRAM[3].AhbArbitrationXbarCtrlMemInitDone  = 0x00000001;
+SDRAM[3].EmcDevSelect                       = 0x00000002;
+SDRAM[3].EmcSelDpdCtrl                      = 0x0004032c;
+SDRAM[3].EmcDllXformDqs0                    = 0x0003c000;
+SDRAM[3].EmcDllXformDqs1                    = 0x0003c000;
+SDRAM[3].EmcDllXformDqs2                    = 0x0003c000;
+SDRAM[3].EmcDllXformDqs3                    = 0x0003c000;
+SDRAM[3].EmcDllXformDqs4                    = 0x0003c000;
+SDRAM[3].EmcDllXformDqs5                    = 0x0003c000;
+SDRAM[3].EmcDllXformDqs6                    = 0x0003c000;
+SDRAM[3].EmcDllXformDqs7                    = 0x0003c000;
+SDRAM[3].EmcDllXformQUse0                   = 0x00000000;
+SDRAM[3].EmcDllXformQUse1                   = 0x00000000;
+SDRAM[3].EmcDllXformQUse2                   = 0x00000000;
+SDRAM[3].EmcDllXformQUse3                   = 0x00000000;
+SDRAM[3].EmcDllXformQUse4                   = 0x00000000;
+SDRAM[3].EmcDllXformQUse5                   = 0x00000000;
+SDRAM[3].EmcDllXformQUse6                   = 0x00000000;
+SDRAM[3].EmcDllXformQUse7                   = 0x00000000;
+SDRAM[3].EmcDliTrimTxDqs0                   = 0x00000000;
+SDRAM[3].EmcDliTrimTxDqs1                   = 0x00000000;
+SDRAM[3].EmcDliTrimTxDqs2                   = 0x00000000;
+SDRAM[3].EmcDliTrimTxDqs3                   = 0x00000000;
+SDRAM[3].EmcDliTrimTxDqs4                   = 0x00000000;
+SDRAM[3].EmcDliTrimTxDqs5                   = 0x00000000;
+SDRAM[3].EmcDliTrimTxDqs6                   = 0x00000000;
+SDRAM[3].EmcDliTrimTxDqs7                   = 0x00000000;
+SDRAM[3].EmcDllXformDq0                     = 0x00040000;
+SDRAM[3].EmcDllXformDq1                     = 0x00040000;
+SDRAM[3].EmcDllXformDq2                     = 0x00040000;
+SDRAM[3].EmcDllXformDq3                     = 0x00040000;
+SDRAM[3].EmcZcalInterval                    = 0x00020000;
+SDRAM[3].EmcZcalInitDev0                    = 0x80000011;
+SDRAM[3].EmcZcalInitDev1                    = 0x00000000;
+SDRAM[3].EmcZcalInitWait                    = 0x00000002;
+SDRAM[3].EmcZcalColdBootEnable              = 0x00000001;
+SDRAM[3].EmcZcalWarmBootEnable              = 0x00000001;
+SDRAM[3].EmcMrwLpddr2ZcalWarmBoot           = 0x000a00ab;
+SDRAM[3].EmcZqCalDdr3WarmBoot               = 0x00000011;
+SDRAM[3].EmcZcalWarmBootWait                = 0x00000001;
+SDRAM[3].EmcMrsWarmBootEnable               = 0x00000001;
+SDRAM[3].EmcMrsExtra                        = 0x80000521;
+SDRAM[3].EmcWarmBootMrs                     = 0x80100002;
+SDRAM[3].EmcWarmBootEmrs                    = 0x80000521;
+SDRAM[3].EmcWarmBootEmr2                    = 0x80200000;
+SDRAM[3].EmcWarmBootEmr3                    = 0x80300000;
+SDRAM[3].EmcWarmBootMrsExtra                = 0x80100002;
+SDRAM[3].EmcClkenOverride                   = 0x00000000;
+SDRAM[3].EmcExtraRefreshNum                 = 0x00000002;
+SDRAM[3].EmcClkenOverrideAllWarmBoot        = 0x00000000;
+SDRAM[3].McClkenOverrideAllWarmBoot         = 0x00000000;
+SDRAM[3].EmcCfgDigDllPeriodWarmBoot         = 0x00000003;
+SDRAM[3].PmcVddpSel                         = 0x00000002;
+SDRAM[3].PmcDdrCfg                          = 0x00000002;
+SDRAM[3].PmcIoDpdReq                        = 0x80800000;
+SDRAM[3].PmcENoVttGen                       = 0x00000000;
+SDRAM[3].PmcNoIoPower                       = 0x00000000;
+SDRAM[3].EmcXm2CmdPadCtrl                   = 0x000002a0;
+SDRAM[3].EmcXm2CmdPadCtrl2                  = 0x770c0000;
+SDRAM[3].EmcXm2DqsPadCtrl                   = 0x770c1414;
+SDRAM[3].EmcXm2DqsPadCtrl2                  = 0x0800013d;
+SDRAM[3].EmcXm2DqsPadCtrl3                  = 0x08000021;
+SDRAM[3].EmcXm2DqPadCtrl                    = 0x770c2990;
+SDRAM[3].EmcXm2DqPadCtrl2                   = 0x00000000;
+SDRAM[3].EmcXm2ClkPadCtrl                   = 0x77fff884;
+SDRAM[3].EmcXm2CompPadCtrl                  = 0x01f1f508;
+SDRAM[3].EmcXm2VttGenPadCtrl                = 0x05057404;
+SDRAM[3].EmcXm2VttGenPadCtrl2               = 0x54000007;
+SDRAM[3].EmcXm2QUsePadCtrl                  = 0x080001e8;
+SDRAM[3].McEmemAdrCfg                       = 0x00000000;
+SDRAM[3].McEmemAdrCfgDev0                   = 0x00090303;
+SDRAM[3].McEmemAdrCfgDev1                   = 0x00090303;
+SDRAM[3].McEmemArbCfg                       = 0x0000000b;
+SDRAM[3].McEmemArbOutstandingReq            = 0xc0000044;
+SDRAM[3].McEmemArbTimingRcd                 = 0x00000001;
+SDRAM[3].McEmemArbTimingRp                  = 0x00000002;
+SDRAM[3].McEmemArbTimingRc                  = 0x00000009;
+SDRAM[3].McEmemArbTimingRas                 = 0x00000005;
+SDRAM[3].McEmemArbTimingFaw                 = 0x00000005;
+SDRAM[3].McEmemArbTimingRrd                 = 0x00000001;
+SDRAM[3].McEmemArbTimingRap2Pre             = 0x00000002;
+SDRAM[3].McEmemArbTimingWap2Pre             = 0x00000008;
+SDRAM[3].McEmemArbTimingR2R                 = 0x00000002;
+SDRAM[3].McEmemArbTimingW2W                 = 0x00000002;
+SDRAM[3].McEmemArbTimingR2W                 = 0x00000003;
+SDRAM[3].McEmemArbTimingW2R                 = 0x00000006;
+SDRAM[3].McEmemArbDaTurns                   = 0x06030202;
+SDRAM[3].McEmemArbDaCovers                  = 0x000d0709;
+SDRAM[3].McEmemArbMisc0                     = 0x7086110a;
+SDRAM[3].McEmemArbMisc1                     = 0x78000000;
+SDRAM[3].McEmemArbRing1Throttle             = 0x001f0000;
+SDRAM[3].McEmemArbOverride                  = 0x00000080;
+SDRAM[3].McEmemArbRsv                       = 0xff00ff00;
+SDRAM[3].McClkenOverride                    = 0x00000000;
diff --git a/cardhu/README.txt b/cardhu/README.txt
new file mode 100644
index 0000000..17f17ae
--- /dev/null
+++ b/cardhu/README.txt
@@ -0,0 +1,49 @@
+How to identify your Cardhu
+===========================
+
+Cardhu exists in two forms:
+
+1) A form-factor device, fully enclosed in plastics, which thus looks like
+   a production tablet. Note that it is possible for a "door" to have been
+   removed from the rear plastic cover of the device.
+
+   Devices of this type should have a sticker, attached to the outer plastics,
+   of the form 940-81290-1001-000. The 3rd component of that number ("1001" in
+   the example) indicates the SKU of the device. Use this SKU to determine
+   which BCT to use.
+
+   The SKU uniquely determines the revision and configuration of the main
+   board in the device. The following table describes the mapping:
+
+   SKU implies: Board Revision  RAM size
+   ====         ==============  ========
+   1000         A04             2 GB
+   1001         A04             1 GB
+   1003         A05             2 GB
+   1005         A05             2 GB
+
+2) An engineering device, with all internal circuit boards fully exposed,
+   which can have 1" metal stand-offs screwed into the chassis for support.
+
+   Devices of this type should have a sticker, attached to the main circuit
+   board, of the form 600-81291-1000-002. The final component of that number
+   ("002" in the example) indicates the revision of the board. 002 means A02,
+   004 means A04, 005 means A05, etc.
+
+   For reference, these engineering devices are known as SKU 4000.
+
+   These boards may contain either 1 GB or 2 GB of RAM. The exposed side of
+   the main board will always contain 4 chips that are the first GB or RAM.
+   The rear side of the board may contain 4 additional chips that are the
+   second GB of RAM. Carefully check the rear of the board to determine your
+   device's RAM size.
+
+Selecting a BCT for Cardhu
+==========================
+
+Once you know your board revision and RAM size, you may select the appropriate
+BCT to use. The cbootimage configuration files *.img.cfg in this directory are
+named based on the board revision and RAM size they apply to. Similarly, when
+the build script generates flashable *.img files, those are also named based
+on the board revision and RAM size they apply to. Select the appropriate image
+based on the image file name.
diff --git a/cardhu/build.sh b/cardhu/build.sh
new file mode 100755
index 0000000..fbd5f62
--- /dev/null
+++ b/cardhu/build.sh
@@ -0,0 +1,37 @@
+#!/bin/sh
+
+# Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+#
+# This software is provided 'as-is', without any express or implied
+# warranty. In no event will the authors be held liable for any damages
+# arising from the use of this software.
+#
+# Permission is granted to anyone to use this software for any purpose,
+# including commercial applications, and to alter it and redistribute it
+# freely, subject to the following restrictions:
+#
+# 1. The origin of this software must not be misrepresented; you must not
+#    claim that you wrote the original software. If you use this software
+#    in a product, an acknowledgment in the product documentation would be
+#    appreciated but is not required.
+# 2. Altered source versions must be plainly marked as such, and must not be
+#    misrepresented as being the original software.
+# 3. This notice may not be removed or altered from any source distribution.
+
+set -e
+set -x
+
+cbootimage -t30 -gbct \
+    E1186_Hynix_1GB_H5TC2G83BFR-PBA_375MHz_111114_317_sdmmc4_x8.bct.cfg \
+    E1186_Hynix_1GB_H5TC2G83BFR-PBA_375MHz_111114_317_sdmmc4_x8.bct
+cbootimage -t30 cardhu-a02-a04-1gb-emmc.img.cfg cardhu-a02-a04-1gb-emmc.img
+
+cbootimage -t30 -gbct \
+    E1198_Hynix_2GB_H5TC2G83BFR-PBA_667MHz_111121_317_sdmmc4_x8.bct.cfg \
+    E1198_Hynix_2GB_H5TC2G83BFR-PBA_667MHz_111121_317_sdmmc4_x8.bct
+cbootimage -t30 cardhu-a02-a04-2gb-emmc.img.cfg cardhu-a02-a04-2gb-emmc.img
+
+cbootimage -t30 -gbct \
+    E1198_Hynix_2GB_H5TC4G83MFR-PBA_375MHz_111122_317_sdmmc4_x8.bct.cfg \
+    E1198_Hynix_2GB_H5TC4G83MFR-PBA_375MHz_111122_317_sdmmc4_x8.bct
+cbootimage -t30 cardhu-a05-2gb-emmc.img.cfg cardhu-a05-2gb-emmc.img
diff --git a/cardhu/cardhu-a02-a04-1gb-emmc.img.cfg b/cardhu/cardhu-a02-a04-1gb-emmc.img.cfg
new file mode 100644
index 0000000..e12af42
--- /dev/null
+++ b/cardhu/cardhu-a02-a04-1gb-emmc.img.cfg
@@ -0,0 +1,22 @@
+# Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+#
+# This software is provided 'as-is', without any express or implied
+# warranty. In no event will the authors be held liable for any damages
+# arising from the use of this software.
+#
+# Permission is granted to anyone to use this software for any purpose,
+# including commercial applications, and to alter it and redistribute it
+# freely, subject to the following restrictions:
+#
+# 1. The origin of this software must not be misrepresented; you must not
+#    claim that you wrote the original software. If you use this software
+#    in a product, an acknowledgment in the product documentation would be
+#    appreciated but is not required.
+# 2. Altered source versions must be plainly marked as such, and must not be
+#    misrepresented as being the original software.
+# 3. This notice may not be removed or altered from any source distribution.
+
+Version       = 0x00020001;
+Bctcopy       = 1;
+Bctfile       = E1186_Hynix_1GB_H5TC2G83BFR-PBA_375MHz_111114_317_sdmmc4_x8.bct;
+BootLoader    = u-boot.bin,0x80108000,0x80108000,Complete;
diff --git a/cardhu/cardhu-a02-a04-2gb-emmc.img.cfg b/cardhu/cardhu-a02-a04-2gb-emmc.img.cfg
new file mode 100644
index 0000000..5aeffc3
--- /dev/null
+++ b/cardhu/cardhu-a02-a04-2gb-emmc.img.cfg
@@ -0,0 +1,22 @@
+# Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+#
+# This software is provided 'as-is', without any express or implied
+# warranty. In no event will the authors be held liable for any damages
+# arising from the use of this software.
+#
+# Permission is granted to anyone to use this software for any purpose,
+# including commercial applications, and to alter it and redistribute it
+# freely, subject to the following restrictions:
+#
+# 1. The origin of this software must not be misrepresented; you must not
+#    claim that you wrote the original software. If you use this software
+#    in a product, an acknowledgment in the product documentation would be
+#    appreciated but is not required.
+# 2. Altered source versions must be plainly marked as such, and must not be
+#    misrepresented as being the original software.
+# 3. This notice may not be removed or altered from any source distribution.
+
+Version       = 0x00020001;
+Bctcopy       = 1;
+Bctfile       = E1198_Hynix_2GB_H5TC2G83BFR-PBA_667MHz_111121_317_sdmmc4_x8.bct;
+BootLoader    = u-boot.bin,0x80108000,0x80108000,Complete;
diff --git a/cardhu/cardhu-a05-2gb-emmc.img.cfg b/cardhu/cardhu-a05-2gb-emmc.img.cfg
new file mode 100644
index 0000000..996c4c7
--- /dev/null
+++ b/cardhu/cardhu-a05-2gb-emmc.img.cfg
@@ -0,0 +1,22 @@
+# Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+#
+# This software is provided 'as-is', without any express or implied
+# warranty. In no event will the authors be held liable for any damages
+# arising from the use of this software.
+#
+# Permission is granted to anyone to use this software for any purpose,
+# including commercial applications, and to alter it and redistribute it
+# freely, subject to the following restrictions:
+#
+# 1. The origin of this software must not be misrepresented; you must not
+#    claim that you wrote the original software. If you use this software
+#    in a product, an acknowledgment in the product documentation would be
+#    appreciated but is not required.
+# 2. Altered source versions must be plainly marked as such, and must not be
+#    misrepresented as being the original software.
+# 3. This notice may not be removed or altered from any source distribution.
+
+Version       = 0x00020001;
+Bctcopy       = 1;
+Bctfile       = E1198_Hynix_2GB_H5TC4G83MFR-PBA_375MHz_111122_317_sdmmc4_x8.bct;
+BootLoader    = u-boot.bin,0x80108000,0x80108000,Complete;
diff --git a/harmony/build.sh b/harmony/build.sh
new file mode 100755
index 0000000..2209860
--- /dev/null
+++ b/harmony/build.sh
@@ -0,0 +1,27 @@
+#!/bin/sh
+
+# Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+#
+# This software is provided 'as-is', without any express or implied
+# warranty. In no event will the authors be held liable for any damages
+# arising from the use of this software.
+#
+# Permission is granted to anyone to use this software for any purpose,
+# including commercial applications, and to alter it and redistribute it
+# freely, subject to the following restrictions:
+#
+# 1. The origin of this software must not be misrepresented; you must not
+#    claim that you wrote the original software. If you use this software
+#    in a product, an acknowledgment in the product documentation would be
+#    appreciated but is not required.
+# 2. Altered source versions must be plainly marked as such, and must not be
+#    misrepresented as being the original software.
+# 3. This notice may not be removed or altered from any source distribution.
+
+set -e
+set -x
+
+cbootimage -gbct \
+    harmony_a02_12Mhz_H5PS1G83EFR-S6C_333Mhz_1GB_2K8Nand_HY27UF084G2B-TP.bct.cfg \
+    harmony_a02_12Mhz_H5PS1G83EFR-S6C_333Mhz_1GB_2K8Nand_HY27UF084G2B-TP.bct
+cbootimage harmony-nand.img.cfg harmony-nand.img
diff --git a/harmony/harmony-nand.img.cfg b/harmony/harmony-nand.img.cfg
new file mode 100644
index 0000000..ac2bc51
--- /dev/null
+++ b/harmony/harmony-nand.img.cfg
@@ -0,0 +1,22 @@
+# Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+#
+# This software is provided 'as-is', without any express or implied
+# warranty. In no event will the authors be held liable for any damages
+# arising from the use of this software.
+#
+# Permission is granted to anyone to use this software for any purpose,
+# including commercial applications, and to alter it and redistribute it
+# freely, subject to the following restrictions:
+#
+# 1. The origin of this software must not be misrepresented; you must not
+#    claim that you wrote the original software. If you use this software
+#    in a product, an acknowledgment in the product documentation would be
+#    appreciated but is not required.
+# 2. Altered source versions must be plainly marked as such, and must not be
+#    misrepresented as being the original software.
+# 3. This notice may not be removed or altered from any source distribution.
+
+Version       = 0x00020001;
+Bctcopy       = 1;
+Bctfile       = harmony_a02_12Mhz_H5PS1G83EFR-S6C_333Mhz_1GB_2K8Nand_HY27UF084G2B-TP.bct;
+BootLoader    = u-boot.bin,0x00108000,0x00108000,Complete;
diff --git a/harmony/harmony_a02_12Mhz_H5PS1G83EFR-S6C_333Mhz_1GB_2K8Nand_HY27UF084G2B-TP.bct.cfg b/harmony/harmony_a02_12Mhz_H5PS1G83EFR-S6C_333Mhz_1GB_2K8Nand_HY27UF084G2B-TP.bct.cfg
new file mode 100644
index 0000000..f948be1
--- /dev/null
+++ b/harmony/harmony_a02_12Mhz_H5PS1G83EFR-S6C_333Mhz_1GB_2K8Nand_HY27UF084G2B-TP.bct.cfg
@@ -0,0 +1,153 @@
+# Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+#
+# This software is provided 'as-is', without any express or implied
+# warranty. In no event will the authors be held liable for any damages
+# arising from the use of this software.
+#
+# Permission is granted to anyone to use this software for any purpose,
+# including commercial applications, and to alter it and redistribute it
+# freely, subject to the following restrictions:
+#
+# 1. The origin of this software must not be misrepresented; you must not
+#    claim that you wrote the original software. If you use this software
+#    in a product, an acknowledgment in the product documentation would be
+#    appreciated but is not required.
+# 2. Altered source versions must be plainly marked as such, and must not be
+#    misrepresented as being the original software.
+# 3. This notice may not be removed or altered from any source distribution.
+
+Version       = 0x00020001;
+BlockSize     = 0x00020000;
+PageSize      = 0x00000800;
+PartitionSize = 0x01000000;
+OdmData       = 0x300d8000;
+
+DevType[0] = NvBootDevType_Nand;
+DeviceParam[0].NandParams.ClockDivider  = 0x00000004;
+DeviceParam[0].NandParams.NandTiming2   = 0x0000000a;
+DeviceParam[0].NandParams.NandTiming    = 0x3b269213;
+DeviceParam[0].NandParams.BlockSizeLog2 = 0x00000000;
+DeviceParam[0].NandParams.PageSizeLog2  = 0x00000000;
+
+DevType[1] = NvBootDevType_Nand;
+DeviceParam[1].NandParams.ClockDivider  = 0x00000004;
+DeviceParam[1].NandParams.NandTiming2   = 0x0000000a;
+DeviceParam[1].NandParams.NandTiming    = 0x3b269213;
+DeviceParam[1].NandParams.BlockSizeLog2 = 0x00000000;
+DeviceParam[1].NandParams.PageSizeLog2  = 0x00000000;
+
+DevType[2] = NvBootDevType_Nand;
+DeviceParam[2].NandParams.ClockDivider  = 0x00000004;
+DeviceParam[2].NandParams.NandTiming2   = 0x0000000a;
+DeviceParam[2].NandParams.NandTiming    = 0x3b269213;
+DeviceParam[2].NandParams.BlockSizeLog2 = 0x00000000;
+DeviceParam[2].NandParams.PageSizeLog2  = 0x00000000;
+
+DevType[3] = NvBootDevType_Nand;
+DeviceParam[3].NandParams.ClockDivider  = 0x00000004;
+DeviceParam[3].NandParams.NandTiming2   = 0x0000000a;
+DeviceParam[3].NandParams.NandTiming    = 0x3b269213;
+DeviceParam[3].NandParams.BlockSizeLog2 = 0x00000000;
+DeviceParam[3].NandParams.PageSizeLog2  = 0x00000000;
+
+SDRAM[0].MemoryType                 = NvBootMemoryType_Ddr2;
+SDRAM[0].PllMChargePumpSetupControl = 0x00000008;
+SDRAM[0].PllMLoopFilterSetupControl = 0x00000000;
+SDRAM[0].PllMInputDivider           = 0x0000000c;
+SDRAM[0].PllMFeedbackDivider        = 0x0000029a;
+SDRAM[0].PllMPostDivider            = 0x00000000;
+SDRAM[0].PllMStableTime             = 0x0000012c;
+SDRAM[0].EmcClockDivider            = 0x00000001;
+SDRAM[0].EmcAutoCalInterval         = 0x00000000;
+SDRAM[0].EmcAutoCalConfig           = 0xe0a61818;
+SDRAM[0].EmcAutoCalWait             = 0x00000000;
+SDRAM[0].EmcPinProgramWait          = 0x00000000;
+SDRAM[0].EmcRc                      = 0x00000014;
+SDRAM[0].EmcRfc                     = 0x0000002b;
+SDRAM[0].EmcRas                     = 0x0000000f;
+SDRAM[0].EmcRp                      = 0x00000005;
+SDRAM[0].EmcR2w                     = 0x00000004;
+SDRAM[0].EmcW2r                     = 0x00000005;
+SDRAM[0].EmcR2p                     = 0x00000003;
+SDRAM[0].EmcW2p                     = 0x0000000c;
+SDRAM[0].EmcRrd                     = 0x00000003;
+SDRAM[0].EmcRdRcd                   = 0x00000005;
+SDRAM[0].EmcWrRcd                   = 0x00000005;
+SDRAM[0].EmcRext                    = 0x00000001;
+SDRAM[0].EmcWdv                     = 0x00000004;
+SDRAM[0].EmcQUseExtra               = 0x00000000;
+SDRAM[0].EmcQUse                    = 0x00000005;
+SDRAM[0].EmcQRst                    = 0x00000004;
+SDRAM[0].EmcQSafe                   = 0x00000009;
+SDRAM[0].EmcRdv                     = 0x0000000d;
+SDRAM[0].EmcRefresh                 = 0x000009ff;
+SDRAM[0].EmcBurstRefreshNum         = 0x00000000;
+SDRAM[0].EmcPdEx2Wr                 = 0x00000003;
+SDRAM[0].EmcPdEx2Rd                 = 0x00000003;
+SDRAM[0].EmcPChg2Pden               = 0x00000005;
+SDRAM[0].EmcAct2Pden                = 0x00000005;
+SDRAM[0].EmcAr2Pden                 = 0x00000001;
+SDRAM[0].EmcRw2Pden                 = 0x0000000f;
+SDRAM[0].EmcTxsr                    = 0x000000c8;
+SDRAM[0].EmcTcke                    = 0x00000003;
+SDRAM[0].EmcTfaw                    = 0x0000000c;
+SDRAM[0].EmcTrpab                   = 0x00000006;
+SDRAM[0].EmcTClkStable              = 0x00000008;
+SDRAM[0].EmcTClkStop                = 0x00000002;
+SDRAM[0].EmcTRefBw                  = 0x00000000;
+SDRAM[0].EmcFbioCfg1                = 0x00000000;
+SDRAM[0].EmcFbioDqsibDlyMsb         = 0x00000000;
+SDRAM[0].EmcFbioDqsibDly            = 0x1c1c2020;
+SDRAM[0].EmcFbioQuseDlyMsb          = 0x00000000;
+SDRAM[0].EmcFbioQuseDly             = 0x5a504646;
+SDRAM[0].EmcFbioCfg5                = 0x00000083;
+SDRAM[0].EmcFbioCfg6                = 0x00000002;
+SDRAM[0].EmcFbioSpare               = 0x00000000;
+SDRAM[0].EmcMrsResetDllWait         = 0x00000000;
+SDRAM[0].EmcMrsResetDll             = 0x00000000;
+SDRAM[0].EmcMrsDdr2DllReset         = 0x00000100;
+SDRAM[0].EmcMrs                     = 0x00000a6a;
+SDRAM[0].EmcEmrsEmr2                = 0x00200000;
+SDRAM[0].EmcEmrsEmr3                = 0x00300000;
+SDRAM[0].EmcEmrsDdr2DllEnable       = 0x00100000;
+SDRAM[0].EmcEmrsDdr2OcdCalib        = 0x00100384;
+SDRAM[0].EmcEmrs                    = 0x00100004;
+SDRAM[0].EmcMrw1                    = 0x00000000;
+SDRAM[0].EmcMrw2                    = 0x00000000;
+SDRAM[0].EmcMrw3                    = 0x00000000;
+SDRAM[0].EmcMrwResetCommand         = 0x00000000;
+SDRAM[0].EmcMrwResetNInitWait       = 0x00000000;
+SDRAM[0].EmcAdrCfg1                 = 0x00070303;
+SDRAM[0].EmcAdrCfg                  = 0x01070303;
+SDRAM[0].McEmemCfg                  = 0x00100000;
+SDRAM[0].McLowLatencyConfig         = 0x80000003;
+SDRAM[0].EmcCfg2                    = 0x00000405;
+SDRAM[0].EmcCfgDigDll               = 0xf0000313;
+SDRAM[0].EmcCfgClktrim0             = 0x00000000;
+SDRAM[0].EmcCfgClktrim1             = 0x00000000;
+SDRAM[0].EmcCfgClktrim2             = 0x00000000;
+SDRAM[0].EmcCfg                     = 0x2001ff01;
+SDRAM[0].EmcDbg                     = 0x01000000;
+SDRAM[0].AhbArbitrationXbarCtrl     = 0x00010000;
+SDRAM[0].EmcDllXformDqs             = 0x00000010;
+SDRAM[0].EmcDllXformQUse            = 0x00000008;
+SDRAM[0].WarmBootWait               = 0x00000002;
+SDRAM[0].EmcCttTermCtrl             = 0x00000802;
+SDRAM[0].EmcOdtWrite                = 0x00000000;
+SDRAM[0].EmcOdtRead                 = 0x00000000;
+SDRAM[0].EmcZcalRefCnt              = 0x00000000;
+SDRAM[0].EmcZcalWaitCnt             = 0x00000000;
+SDRAM[0].EmcZcalMrwCmd              = 0x00000000;
+SDRAM[0].EmcMrwZqInitDev0           = 0x00000000;
+SDRAM[0].EmcMrwZqInitDev1           = 0x00000000;
+SDRAM[0].EmcMrwZqInitWait           = 0x00000000;
+SDRAM[0].EmcDdr2Wait                = 0x00000002;
+SDRAM[0].PmcDdrPwr                  = 0x00000001;
+SDRAM[0].ApbMiscGpXm2CfgAPadCtrl    = 0x77ffc000;
+SDRAM[0].ApbMiscGpXm2CfgCPadCtrl2   = 0x08080079;
+SDRAM[0].ApbMiscGpXm2CfgCPadCtrl    = 0x77fffff0;
+SDRAM[0].ApbMiscGpXm2CfgDPadCtrl2   = 0x44440009;
+SDRAM[0].ApbMiscGpXm2CfgDPadCtrl    = 0x77fffff0;
+SDRAM[0].ApbMiscGpXm2ClkCfgPadCtrl  = 0x77ffc000;
+SDRAM[0].ApbMiscGpXm2CompPadCtrl    = 0x01f1f008;
+SDRAM[0].ApbMiscGpXm2VttGenPadCtrl  = 0x07076600;
diff --git a/seaboard/PM282_Hynix_1GB_H5PS2G83AFR-S6C_380MHz_nand.bct.cfg b/seaboard/PM282_Hynix_1GB_H5PS2G83AFR-S6C_380MHz_nand.bct.cfg
new file mode 100644
index 0000000..0e15eb7
--- /dev/null
+++ b/seaboard/PM282_Hynix_1GB_H5PS2G83AFR-S6C_380MHz_nand.bct.cfg
@@ -0,0 +1,153 @@
+# Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+#
+# This software is provided 'as-is', without any express or implied
+# warranty. In no event will the authors be held liable for any damages
+# arising from the use of this software.
+#
+# Permission is granted to anyone to use this software for any purpose,
+# including commercial applications, and to alter it and redistribute it
+# freely, subject to the following restrictions:
+#
+# 1. The origin of this software must not be misrepresented; you must not
+#    claim that you wrote the original software. If you use this software
+#    in a product, an acknowledgment in the product documentation would be
+#    appreciated but is not required.
+# 2. Altered source versions must be plainly marked as such, and must not be
+#    misrepresented as being the original software.
+# 3. This notice may not be removed or altered from any source distribution.
+
+Version       = 0x00020001;
+BlockSize     = 0x00020000;
+PageSize      = 0x00000800;
+PartitionSize = 0x01000000;
+OdmData       = 0x300d8000;
+
+DevType[0] = NvBootDevType_Nand;
+DeviceParam[0].NandParams.ClockDivider  = 0x00000004;
+DeviceParam[0].NandParams.NandTiming2   = 0x0000000a;
+DeviceParam[0].NandParams.NandTiming    = 0x3b269213;
+DeviceParam[0].NandParams.BlockSizeLog2 = 0x00000000;
+DeviceParam[0].NandParams.PageSizeLog2  = 0x00000000;
+
+DevType[1] = NvBootDevType_Nand;
+DeviceParam[1].NandParams.ClockDivider  = 0x00000004;
+DeviceParam[1].NandParams.NandTiming2   = 0x0000000a;
+DeviceParam[1].NandParams.NandTiming    = 0x3b269213;
+DeviceParam[1].NandParams.BlockSizeLog2 = 0x00000000;
+DeviceParam[1].NandParams.PageSizeLog2  = 0x00000000;
+
+DevType[2] = NvBootDevType_Nand;
+DeviceParam[2].NandParams.ClockDivider  = 0x00000004;
+DeviceParam[2].NandParams.NandTiming2   = 0x0000000a;
+DeviceParam[2].NandParams.NandTiming    = 0x3b269213;
+DeviceParam[2].NandParams.BlockSizeLog2 = 0x00000000;
+DeviceParam[2].NandParams.PageSizeLog2  = 0x00000000;
+
+DevType[3] = NvBootDevType_Nand;
+DeviceParam[3].NandParams.ClockDivider  = 0x00000004;
+DeviceParam[3].NandParams.NandTiming2   = 0x0000000a;
+DeviceParam[3].NandParams.NandTiming    = 0x3b269213;
+DeviceParam[3].NandParams.BlockSizeLog2 = 0x00000000;
+DeviceParam[3].NandParams.PageSizeLog2  = 0x00000000;
+
+SDRAM[0].MemoryType                 = NvBootMemoryType_Ddr2;
+SDRAM[0].PllMChargePumpSetupControl = 0x00000008;
+SDRAM[0].PllMLoopFilterSetupControl = 0x00000000;
+SDRAM[0].PllMInputDivider           = 0x0000000c;
+SDRAM[0].PllMFeedbackDivider        = 0x000002f8;
+SDRAM[0].PllMPostDivider            = 0x00000000;
+SDRAM[0].PllMStableTime             = 0x0000012c;
+SDRAM[0].EmcClockDivider            = 0x00000001;
+SDRAM[0].EmcAutoCalInterval         = 0x00000000;
+SDRAM[0].EmcAutoCalConfig           = 0xe0a61818;
+SDRAM[0].EmcAutoCalWait             = 0x00000000;
+SDRAM[0].EmcPinProgramWait          = 0x00000000;
+SDRAM[0].EmcRc                      = 0x00000017;
+SDRAM[0].EmcRfc                     = 0x0000004b;
+SDRAM[0].EmcRas                     = 0x00000012;
+SDRAM[0].EmcRp                      = 0x00000006;
+SDRAM[0].EmcR2w                     = 0x00000004;
+SDRAM[0].EmcW2r                     = 0x00000005;
+SDRAM[0].EmcR2p                     = 0x00000003;
+SDRAM[0].EmcW2p                     = 0x0000000c;
+SDRAM[0].EmcRrd                     = 0x00000003;
+SDRAM[0].EmcRdRcd                   = 0x00000006;
+SDRAM[0].EmcWrRcd                   = 0x00000006;
+SDRAM[0].EmcRext                    = 0x00000001;
+SDRAM[0].EmcWdv                     = 0x00000004;
+SDRAM[0].EmcQUseExtra               = 0x00000000;
+SDRAM[0].EmcQUse                    = 0x00000005;
+SDRAM[0].EmcQRst                    = 0x00000004;
+SDRAM[0].EmcQSafe                   = 0x00000009;
+SDRAM[0].EmcRdv                     = 0x0000000d;
+SDRAM[0].EmcRefresh                 = 0x00000b5f;
+SDRAM[0].EmcBurstRefreshNum         = 0x00000000;
+SDRAM[0].EmcPdEx2Wr                 = 0x00000003;
+SDRAM[0].EmcPdEx2Rd                 = 0x00000003;
+SDRAM[0].EmcPChg2Pden               = 0x00000006;
+SDRAM[0].EmcAct2Pden                = 0x00000006;
+SDRAM[0].EmcAr2Pden                 = 0x00000001;
+SDRAM[0].EmcRw2Pden                 = 0x00000011;
+SDRAM[0].EmcTxsr                    = 0x000000c8;
+SDRAM[0].EmcTcke                    = 0x00000003;
+SDRAM[0].EmcTfaw                    = 0x0000000e;
+SDRAM[0].EmcTrpab                   = 0x00000007;
+SDRAM[0].EmcTClkStable              = 0x0000000f;
+SDRAM[0].EmcTClkStop                = 0x00000002;
+SDRAM[0].EmcTRefBw                  = 0x00000000;
+SDRAM[0].EmcFbioCfg1                = 0x00000000;
+SDRAM[0].EmcFbioDqsibDlyMsb         = 0x00000000;
+SDRAM[0].EmcFbioDqsibDly            = 0x24242424;
+SDRAM[0].EmcFbioQuseDlyMsb          = 0x00000000;
+SDRAM[0].EmcFbioQuseDly             = 0x64646464;
+SDRAM[0].EmcFbioCfg5                = 0x00000083;
+SDRAM[0].EmcFbioCfg6                = 0x00000002;
+SDRAM[0].EmcFbioSpare               = 0x00000000;
+SDRAM[0].EmcMrsResetDllWait         = 0x00000000;
+SDRAM[0].EmcMrsResetDll             = 0x00000000;
+SDRAM[0].EmcMrsDdr2DllReset         = 0x00000100;
+SDRAM[0].EmcMrs                     = 0x00000a6a;
+SDRAM[0].EmcEmrsEmr2                = 0x00200000;
+SDRAM[0].EmcEmrsEmr3                = 0x00300000;
+SDRAM[0].EmcEmrsDdr2DllEnable       = 0x00100000;
+SDRAM[0].EmcEmrsDdr2OcdCalib        = 0x00100380;
+SDRAM[0].EmcEmrs                    = 0x00100000;
+SDRAM[0].EmcMrw1                    = 0x00000000;
+SDRAM[0].EmcMrw2                    = 0x00000000;
+SDRAM[0].EmcMrw3                    = 0x00000000;
+SDRAM[0].EmcMrwResetCommand         = 0x00000000;
+SDRAM[0].EmcMrwResetNInitWait       = 0x00000000;
+SDRAM[0].EmcAdrCfg1                 = 0x00080303;
+SDRAM[0].EmcAdrCfg                  = 0x00080303;
+SDRAM[0].McEmemCfg                  = 0x00100000;
+SDRAM[0].McLowLatencyConfig         = 0x80000003;
+SDRAM[0].EmcCfg2                    = 0x00000405;
+SDRAM[0].EmcCfgDigDll               = 0xf0000413;
+SDRAM[0].EmcCfgClktrim0             = 0x00000000;
+SDRAM[0].EmcCfgClktrim1             = 0x00000000;
+SDRAM[0].EmcCfgClktrim2             = 0x00000000;
+SDRAM[0].EmcCfg                     = 0x0001ff00;
+SDRAM[0].EmcDbg                     = 0x01000000;
+SDRAM[0].AhbArbitrationXbarCtrl     = 0x00010000;
+SDRAM[0].EmcDllXformDqs             = 0x00000010;
+SDRAM[0].EmcDllXformQUse            = 0x00000008;
+SDRAM[0].WarmBootWait               = 0x00000002;
+SDRAM[0].EmcCttTermCtrl             = 0x00000802;
+SDRAM[0].EmcOdtWrite                = 0x00000000;
+SDRAM[0].EmcOdtRead                 = 0x00000000;
+SDRAM[0].EmcZcalRefCnt              = 0x00000000;
+SDRAM[0].EmcZcalWaitCnt             = 0x00000000;
+SDRAM[0].EmcZcalMrwCmd              = 0x00000000;
+SDRAM[0].EmcMrwZqInitDev0           = 0x00000000;
+SDRAM[0].EmcMrwZqInitDev1           = 0x00000000;
+SDRAM[0].EmcMrwZqInitWait           = 0x00000000;
+SDRAM[0].EmcDdr2Wait                = 0x00000002;
+SDRAM[0].PmcDdrPwr                  = 0x00000001;
+SDRAM[0].ApbMiscGpXm2CfgAPadCtrl    = 0x77ffc000;
+SDRAM[0].ApbMiscGpXm2CfgCPadCtrl2   = 0x08080079;
+SDRAM[0].ApbMiscGpXm2CfgCPadCtrl    = 0x77fffff0;
+SDRAM[0].ApbMiscGpXm2CfgDPadCtrl2   = 0x00000009;
+SDRAM[0].ApbMiscGpXm2CfgDPadCtrl    = 0x77fffff0;
+SDRAM[0].ApbMiscGpXm2ClkCfgPadCtrl  = 0x77ffc000;
+SDRAM[0].ApbMiscGpXm2CompPadCtrl    = 0x01f1f008;
+SDRAM[0].ApbMiscGpXm2VttGenPadCtrl  = 0x07076600;
diff --git a/seaboard/build.sh b/seaboard/build.sh
new file mode 100755
index 0000000..558a7ce
--- /dev/null
+++ b/seaboard/build.sh
@@ -0,0 +1,27 @@
+#!/bin/sh
+
+# Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+#
+# This software is provided 'as-is', without any express or implied
+# warranty. In no event will the authors be held liable for any damages
+# arising from the use of this software.
+#
+# Permission is granted to anyone to use this software for any purpose,
+# including commercial applications, and to alter it and redistribute it
+# freely, subject to the following restrictions:
+#
+# 1. The origin of this software must not be misrepresented; you must not
+#    claim that you wrote the original software. If you use this software
+#    in a product, an acknowledgment in the product documentation would be
+#    appreciated but is not required.
+# 2. Altered source versions must be plainly marked as such, and must not be
+#    misrepresented as being the original software.
+# 3. This notice may not be removed or altered from any source distribution.
+
+set -e
+set -x
+
+cbootimage -gbct \
+    PM282_Hynix_1GB_H5PS2G83AFR-S6C_380MHz_nand.bct.cfg \
+    PM282_Hynix_1GB_H5PS2G83AFR-S6C_380MHz_nand.bct
+cbootimage seaboard-nand.img.cfg seaboard-nand.img
diff --git a/seaboard/seaboard-nand.img.cfg b/seaboard/seaboard-nand.img.cfg
new file mode 100644
index 0000000..82faac0
--- /dev/null
+++ b/seaboard/seaboard-nand.img.cfg
@@ -0,0 +1,22 @@
+# Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+#
+# This software is provided 'as-is', without any express or implied
+# warranty. In no event will the authors be held liable for any damages
+# arising from the use of this software.
+#
+# Permission is granted to anyone to use this software for any purpose,
+# including commercial applications, and to alter it and redistribute it
+# freely, subject to the following restrictions:
+#
+# 1. The origin of this software must not be misrepresented; you must not
+#    claim that you wrote the original software. If you use this software
+#    in a product, an acknowledgment in the product documentation would be
+#    appreciated but is not required.
+# 2. Altered source versions must be plainly marked as such, and must not be
+#    misrepresented as being the original software.
+# 3. This notice may not be removed or altered from any source distribution.
+
+Version       = 0x00020001;
+Bctcopy       = 1;
+Bctfile       = PM282_Hynix_1GB_H5PS2G83AFR-S6C_380MHz_nand.bct;
+BootLoader    = u-boot.bin,0x00108000,0x00108000,Complete;
diff --git a/ventana/build.sh b/ventana/build.sh
new file mode 100755
index 0000000..e1a7681
--- /dev/null
+++ b/ventana/build.sh
@@ -0,0 +1,27 @@
+#!/bin/sh
+
+# Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+#
+# This software is provided 'as-is', without any express or implied
+# warranty. In no event will the authors be held liable for any damages
+# arising from the use of this software.
+#
+# Permission is granted to anyone to use this software for any purpose,
+# including commercial applications, and to alter it and redistribute it
+# freely, subject to the following restrictions:
+#
+# 1. The origin of this software must not be misrepresented; you must not
+#    claim that you wrote the original software. If you use this software
+#    in a product, an acknowledgment in the product documentation would be
+#    appreciated but is not required.
+# 2. Altered source versions must be plainly marked as such, and must not be
+#    misrepresented as being the original software.
+# 3. This notice may not be removed or altered from any source distribution.
+
+set -e
+set -x
+
+cbootimage -gbct \
+    ventana_A03_12MHz_EDB8132B1PB6DF_300Mhz_1GB_emmc_THGBM1G6D4EBAI4.bct.cfg \
+    ventana_A03_12MHz_EDB8132B1PB6DF_300Mhz_1GB_emmc_THGBM1G6D4EBAI4.bct
+cbootimage ventana-emmc.img.cfg ventana-emmc.img
diff --git a/ventana/ventana-emmc.img.cfg b/ventana/ventana-emmc.img.cfg
new file mode 100644
index 0000000..6aaee7f
--- /dev/null
+++ b/ventana/ventana-emmc.img.cfg
@@ -0,0 +1,22 @@
+# Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+#
+# This software is provided 'as-is', without any express or implied
+# warranty. In no event will the authors be held liable for any damages
+# arising from the use of this software.
+#
+# Permission is granted to anyone to use this software for any purpose,
+# including commercial applications, and to alter it and redistribute it
+# freely, subject to the following restrictions:
+#
+# 1. The origin of this software must not be misrepresented; you must not
+#    claim that you wrote the original software. If you use this software
+#    in a product, an acknowledgment in the product documentation would be
+#    appreciated but is not required.
+# 2. Altered source versions must be plainly marked as such, and must not be
+#    misrepresented as being the original software.
+# 3. This notice may not be removed or altered from any source distribution.
+
+Version       = 0x00020001;
+Bctcopy       = 1;
+Bctfile       = ventana_A03_12MHz_EDB8132B1PB6DF_300Mhz_1GB_emmc_THGBM1G6D4EBAI4.bct;
+BootLoader    = u-boot.bin,0x00108000,0x00108000,Complete;
diff --git a/ventana/ventana_A03_12MHz_EDB8132B1PB6DF_300Mhz_1GB_emmc_THGBM1G6D4EBAI4.bct.cfg b/ventana/ventana_A03_12MHz_EDB8132B1PB6DF_300Mhz_1GB_emmc_THGBM1G6D4EBAI4.bct.cfg
new file mode 100644
index 0000000..ebaf87e
--- /dev/null
+++ b/ventana/ventana_A03_12MHz_EDB8132B1PB6DF_300Mhz_1GB_emmc_THGBM1G6D4EBAI4.bct.cfg
@@ -0,0 +1,145 @@
+# Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+#
+# This software is provided 'as-is', without any express or implied
+# warranty. In no event will the authors be held liable for any damages
+# arising from the use of this software.
+#
+# Permission is granted to anyone to use this software for any purpose,
+# including commercial applications, and to alter it and redistribute it
+# freely, subject to the following restrictions:
+#
+# 1. The origin of this software must not be misrepresented; you must not
+#    claim that you wrote the original software. If you use this software
+#    in a product, an acknowledgment in the product documentation would be
+#    appreciated but is not required.
+# 2. Altered source versions must be plainly marked as such, and must not be
+#    misrepresented as being the original software.
+# 3. This notice may not be removed or altered from any source distribution.
+
+Version       = 0x00020001;
+BlockSize     = 0x00004000;
+PageSize      = 0x00000200;
+PartitionSize = 0x01000000;
+OdmData       = 0x300d8000;
+
+DevType[0] = NvBootDevType_Sdmmc;
+DeviceParam[0].SdmmcParams.ClockDivider           = 0x0000000c;
+DeviceParam[0].SdmmcParams.DataWidth              = NvBootSdmmcDataWidth_4Bit;
+DeviceParam[0].SdmmcParams.MaxPowerClassSupported = 0x00000000;
+
+DevType[1] = NvBootDevType_Sdmmc;
+DeviceParam[1].SdmmcParams.ClockDivider           = 0x0000000c;
+DeviceParam[1].SdmmcParams.DataWidth              = NvBootSdmmcDataWidth_4Bit;
+DeviceParam[1].SdmmcParams.MaxPowerClassSupported = 0x00000000;
+
+DevType[2] = NvBootDevType_Sdmmc;
+DeviceParam[2].SdmmcParams.ClockDivider           = 0x0000000c;
+DeviceParam[2].SdmmcParams.DataWidth              = NvBootSdmmcDataWidth_4Bit;
+DeviceParam[2].SdmmcParams.MaxPowerClassSupported = 0x00000000;
+
+DevType[3] = NvBootDevType_Sdmmc;
+DeviceParam[3].SdmmcParams.ClockDivider           = 0x0000000c;
+DeviceParam[3].SdmmcParams.DataWidth              = NvBootSdmmcDataWidth_4Bit;
+DeviceParam[3].SdmmcParams.MaxPowerClassSupported = 0x00000000;
+
+SDRAM[0].MemoryType                 = NvBootMemoryType_LpDdr2;
+SDRAM[0].PllMChargePumpSetupControl = 0x00000008;
+SDRAM[0].PllMLoopFilterSetupControl = 0x00000000;
+SDRAM[0].PllMInputDivider           = 0x0000000c;
+SDRAM[0].PllMFeedbackDivider        = 0x00000258;
+SDRAM[0].PllMPostDivider            = 0x00000000;
+SDRAM[0].PllMStableTime             = 0x0000012c;
+SDRAM[0].EmcClockDivider            = 0x00000001;
+SDRAM[0].EmcAutoCalInterval         = 0x00000000;
+SDRAM[0].EmcAutoCalConfig           = 0xe0a61111;
+SDRAM[0].EmcAutoCalWait             = 0x00000000;
+SDRAM[0].EmcPinProgramWait          = 0x00000000;
+SDRAM[0].EmcRc                      = 0x00000012;
+SDRAM[0].EmcRfc                     = 0x00000027;
+SDRAM[0].EmcRas                     = 0x0000000d;
+SDRAM[0].EmcRp                      = 0x00000007;
+SDRAM[0].EmcR2w                     = 0x00000007;
+SDRAM[0].EmcW2r                     = 0x00000005;
+SDRAM[0].EmcR2p                     = 0x00000003;
+SDRAM[0].EmcW2p                     = 0x00000009;
+SDRAM[0].EmcRrd                     = 0x00000003;
+SDRAM[0].EmcRdRcd                   = 0x00000006;
+SDRAM[0].EmcWrRcd                   = 0x00000006;
+SDRAM[0].EmcRext                    = 0x00000003;
+SDRAM[0].EmcWdv                     = 0x00000002;
+SDRAM[0].EmcQUseExtra               = 0x00000005;
+SDRAM[0].EmcQUse                    = 0x00000006;
+SDRAM[0].EmcQRst                    = 0x00000003;
+SDRAM[0].EmcQSafe                   = 0x00000009;
+SDRAM[0].EmcRdv                     = 0x0000000c;
+SDRAM[0].EmcRefresh                 = 0x0000045f;
+SDRAM[0].EmcBurstRefreshNum         = 0x00000000;
+SDRAM[0].EmcPdEx2Wr                 = 0x00000004;
+SDRAM[0].EmcPdEx2Rd                 = 0x00000004;
+SDRAM[0].EmcPChg2Pden               = 0x00000007;
+SDRAM[0].EmcAct2Pden                = 0x00000006;
+SDRAM[0].EmcAr2Pden                 = 0x00000001;
+SDRAM[0].EmcRw2Pden                 = 0x0000000e;
+SDRAM[0].EmcTxsr                    = 0x0000002a;
+SDRAM[0].EmcTcke                    = 0x00000003;
+SDRAM[0].EmcTfaw                    = 0x0000000f;
+SDRAM[0].EmcTrpab                   = 0x00000008;
+SDRAM[0].EmcTClkStable              = 0x00000005;
+SDRAM[0].EmcTClkStop                = 0x00000002;
+SDRAM[0].EmcTRefBw                  = 0x000004e0;
+SDRAM[0].EmcFbioCfg1                = 0x00000000;
+SDRAM[0].EmcFbioDqsibDlyMsb         = 0x00000000;
+SDRAM[0].EmcFbioDqsibDly            = 0x383c443c;
+SDRAM[0].EmcFbioQuseDlyMsb          = 0x00000000;
+SDRAM[0].EmcFbioQuseDly             = 0x6e6e6e6e;
+SDRAM[0].EmcFbioCfg5                = 0x00000282;
+SDRAM[0].EmcFbioCfg6                = 0x00000002;
+SDRAM[0].EmcFbioSpare               = 0x00000000;
+SDRAM[0].EmcMrsResetDllWait         = 0x00000000;
+SDRAM[0].EmcMrsResetDll             = 0x00000000;
+SDRAM[0].EmcMrsDdr2DllReset         = 0x00000000;
+SDRAM[0].EmcMrs                     = 0x00000000;
+SDRAM[0].EmcEmrsEmr2                = 0x00000000;
+SDRAM[0].EmcEmrsEmr3                = 0x00000000;
+SDRAM[0].EmcEmrsDdr2DllEnable       = 0x00000000;
+SDRAM[0].EmcEmrsDdr2OcdCalib        = 0x00000000;
+SDRAM[0].EmcEmrs                    = 0x00000000;
+SDRAM[0].EmcMrw1                    = 0x0001006a;
+SDRAM[0].EmcMrw2                    = 0x00020003;
+SDRAM[0].EmcMrw3                    = 0x00030002;
+SDRAM[0].EmcMrwResetCommand         = 0x003f0000;
+SDRAM[0].EmcMrwResetNInitWait       = 0x0000000a;
+SDRAM[0].EmcAdrCfg1                 = 0x00070303;
+SDRAM[0].EmcAdrCfg                  = 0x01070303;
+SDRAM[0].McEmemCfg                  = 0x00100000;
+SDRAM[0].McLowLatencyConfig         = 0x80000003;
+SDRAM[0].EmcCfg2                    = 0x00000403;
+SDRAM[0].EmcCfgDigDll               = 0xe0000313;
+SDRAM[0].EmcCfgClktrim0             = 0x00000000;
+SDRAM[0].EmcCfgClktrim1             = 0x00000000;
+SDRAM[0].EmcCfgClktrim2             = 0x00000000;
+SDRAM[0].EmcCfg                     = 0x0001ff00;
+SDRAM[0].EmcDbg                     = 0x01000020;
+SDRAM[0].AhbArbitrationXbarCtrl     = 0x00010000;
+SDRAM[0].EmcDllXformDqs             = 0x00000010;
+SDRAM[0].EmcDllXformQUse            = 0x00000008;
+SDRAM[0].WarmBootWait               = 0x00000001;
+SDRAM[0].EmcCttTermCtrl             = 0x00000802;
+SDRAM[0].EmcOdtWrite                = 0x00000000;
+SDRAM[0].EmcOdtRead                 = 0x00000000;
+SDRAM[0].EmcZcalRefCnt              = 0x00000000;
+SDRAM[0].EmcZcalWaitCnt             = 0x0000001b;
+SDRAM[0].EmcZcalMrwCmd              = 0x000a0056;
+SDRAM[0].EmcMrwZqInitDev0           = 0x800a00ff;
+SDRAM[0].EmcMrwZqInitDev1           = 0x400a00ff;
+SDRAM[0].EmcMrwZqInitWait           = 0x00000001;
+SDRAM[0].EmcDdr2Wait                = 0x00000000;
+SDRAM[0].PmcDdrPwr                  = 0x00000000;
+SDRAM[0].ApbMiscGpXm2CfgAPadCtrl    = 0x77ffc000;
+SDRAM[0].ApbMiscGpXm2CfgCPadCtrl2   = 0x08080040;
+SDRAM[0].ApbMiscGpXm2CfgCPadCtrl    = 0x77fffff8;
+SDRAM[0].ApbMiscGpXm2CfgDPadCtrl2   = 0x44440000;
+SDRAM[0].ApbMiscGpXm2CfgDPadCtrl    = 0x77fffff8;
+SDRAM[0].ApbMiscGpXm2ClkCfgPadCtrl  = 0x77ffc000;
+SDRAM[0].ApbMiscGpXm2CompPadCtrl    = 0x01f1f008;
+SDRAM[0].ApbMiscGpXm2VttGenPadCtrl  = 0x00005500;
diff --git a/whistler/E1108_Elpida_512MB_EDB4032B2PB-6D-F_300MHz_40nm_emmc_x8.bct.cfg b/whistler/E1108_Elpida_512MB_EDB4032B2PB-6D-F_300MHz_40nm_emmc_x8.bct.cfg
new file mode 100644
index 0000000..f4482a6
--- /dev/null
+++ b/whistler/E1108_Elpida_512MB_EDB4032B2PB-6D-F_300MHz_40nm_emmc_x8.bct.cfg
@@ -0,0 +1,145 @@
+# Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+#
+# This software is provided 'as-is', without any express or implied
+# warranty. In no event will the authors be held liable for any damages
+# arising from the use of this software.
+#
+# Permission is granted to anyone to use this software for any purpose,
+# including commercial applications, and to alter it and redistribute it
+# freely, subject to the following restrictions:
+#
+# 1. The origin of this software must not be misrepresented; you must not
+#    claim that you wrote the original software. If you use this software
+#    in a product, an acknowledgment in the product documentation would be
+#    appreciated but is not required.
+# 2. Altered source versions must be plainly marked as such, and must not be
+#    misrepresented as being the original software.
+# 3. This notice may not be removed or altered from any source distribution.
+
+Version       = 0x00020001;
+BlockSize     = 0x00004000;
+PageSize      = 0x00000200;
+PartitionSize = 0x01000000;
+OdmData       = 0x200c0000;
+
+DevType[0] = NvBootDevType_Sdmmc;
+DeviceParam[0].SdmmcParams.ClockDivider           = 0x0000000c;
+DeviceParam[0].SdmmcParams.DataWidth              = NvBootSdmmcDataWidth_8Bit;
+DeviceParam[0].SdmmcParams.MaxPowerClassSupported = 0x0000000f;
+
+DevType[1] = NvBootDevType_Sdmmc;
+DeviceParam[1].SdmmcParams.ClockDivider           = 0x0000000c;
+DeviceParam[1].SdmmcParams.DataWidth              = NvBootSdmmcDataWidth_8Bit;
+DeviceParam[1].SdmmcParams.MaxPowerClassSupported = 0x0000000f;
+
+DevType[2] = NvBootDevType_Sdmmc;
+DeviceParam[2].SdmmcParams.ClockDivider           = 0x0000000c;
+DeviceParam[2].SdmmcParams.DataWidth              = NvBootSdmmcDataWidth_8Bit;
+DeviceParam[2].SdmmcParams.MaxPowerClassSupported = 0x0000000f;
+
+DevType[3] = NvBootDevType_Sdmmc;
+DeviceParam[3].SdmmcParams.ClockDivider           = 0x0000000c;
+DeviceParam[3].SdmmcParams.DataWidth              = NvBootSdmmcDataWidth_8Bit;
+DeviceParam[3].SdmmcParams.MaxPowerClassSupported = 0x0000000f;
+
+SDRAM[0].MemoryType                 = NvBootMemoryType_LpDdr2;
+SDRAM[0].PllMChargePumpSetupControl = 0x00000008;
+SDRAM[0].PllMLoopFilterSetupControl = 0x00000000;
+SDRAM[0].PllMInputDivider           = 0x0000000c;
+SDRAM[0].PllMFeedbackDivider        = 0x00000258;
+SDRAM[0].PllMPostDivider            = 0x00000000;
+SDRAM[0].PllMStableTime             = 0x0000012c;
+SDRAM[0].EmcClockDivider            = 0x00000001;
+SDRAM[0].EmcAutoCalInterval         = 0x00000000;
+SDRAM[0].EmcAutoCalConfig           = 0xe0a61111;
+SDRAM[0].EmcAutoCalWait             = 0x00000000;
+SDRAM[0].EmcPinProgramWait          = 0x00000000;
+SDRAM[0].EmcRc                      = 0x00000012;
+SDRAM[0].EmcRfc                     = 0x00000027;
+SDRAM[0].EmcRas                     = 0x0000000d;
+SDRAM[0].EmcRp                      = 0x00000006;
+SDRAM[0].EmcR2w                     = 0x00000007;
+SDRAM[0].EmcW2r                     = 0x00000005;
+SDRAM[0].EmcR2p                     = 0x00000003;
+SDRAM[0].EmcW2p                     = 0x00000009;
+SDRAM[0].EmcRrd                     = 0x00000003;
+SDRAM[0].EmcRdRcd                   = 0x00000006;
+SDRAM[0].EmcWrRcd                   = 0x00000006;
+SDRAM[0].EmcRext                    = 0x00000003;
+SDRAM[0].EmcWdv                     = 0x00000002;
+SDRAM[0].EmcQUseExtra               = 0x00000005;
+SDRAM[0].EmcQUse                    = 0x00000006;
+SDRAM[0].EmcQRst                    = 0x00000003;
+SDRAM[0].EmcQSafe                   = 0x00000009;
+SDRAM[0].EmcRdv                     = 0x0000000c;
+SDRAM[0].EmcRefresh                 = 0x0000045f;
+SDRAM[0].EmcBurstRefreshNum         = 0x00000000;
+SDRAM[0].EmcPdEx2Wr                 = 0x00000004;
+SDRAM[0].EmcPdEx2Rd                 = 0x00000004;
+SDRAM[0].EmcPChg2Pden               = 0x00000006;
+SDRAM[0].EmcAct2Pden                = 0x00000008;
+SDRAM[0].EmcAr2Pden                 = 0x00000001;
+SDRAM[0].EmcRw2Pden                 = 0x0000000e;
+SDRAM[0].EmcTxsr                    = 0x0000002a;
+SDRAM[0].EmcTcke                    = 0x00000003;
+SDRAM[0].EmcTfaw                    = 0x0000000f;
+SDRAM[0].EmcTrpab                   = 0x00000007;
+SDRAM[0].EmcTClkStable              = 0x00000005;
+SDRAM[0].EmcTClkStop                = 0x00000002;
+SDRAM[0].EmcTRefBw                  = 0x000004e0;
+SDRAM[0].EmcFbioCfg1                = 0x00000000;
+SDRAM[0].EmcFbioDqsibDlyMsb         = 0x00000000;
+SDRAM[0].EmcFbioDqsibDly            = 0x28282828;
+SDRAM[0].EmcFbioQuseDlyMsb          = 0x00000000;
+SDRAM[0].EmcFbioQuseDly             = 0x00000000;
+SDRAM[0].EmcFbioCfg5                = 0x00000282;
+SDRAM[0].EmcFbioCfg6                = 0x00000002;
+SDRAM[0].EmcFbioSpare               = 0x00000000;
+SDRAM[0].EmcMrsResetDllWait         = 0x00000000;
+SDRAM[0].EmcMrsResetDll             = 0x00000000;
+SDRAM[0].EmcMrsDdr2DllReset         = 0x00000000;
+SDRAM[0].EmcMrs                     = 0x00000000;
+SDRAM[0].EmcEmrsEmr2                = 0x00000000;
+SDRAM[0].EmcEmrsEmr3                = 0x00000000;
+SDRAM[0].EmcEmrsDdr2DllEnable       = 0x00000000;
+SDRAM[0].EmcEmrsDdr2OcdCalib        = 0x00000000;
+SDRAM[0].EmcEmrs                    = 0x00000000;
+SDRAM[0].EmcMrw1                    = 0x0001006a;
+SDRAM[0].EmcMrw2                    = 0x00020003;
+SDRAM[0].EmcMrw3                    = 0x00030002;
+SDRAM[0].EmcMrwResetCommand         = 0x003f0000;
+SDRAM[0].EmcMrwResetNInitWait       = 0x0000000a;
+SDRAM[0].EmcAdrCfg1                 = 0x00060302;
+SDRAM[0].EmcAdrCfg                  = 0x01060302;
+SDRAM[0].McEmemCfg                  = 0x00080000;
+SDRAM[0].McLowLatencyConfig         = 0x80000003;
+SDRAM[0].EmcCfg2                    = 0x00000403;
+SDRAM[0].EmcCfgDigDll               = 0xe0000413;
+SDRAM[0].EmcCfgClktrim0             = 0x00000000;
+SDRAM[0].EmcCfgClktrim1             = 0x00000000;
+SDRAM[0].EmcCfgClktrim2             = 0x00000000;
+SDRAM[0].EmcCfg                     = 0x0001ff00;
+SDRAM[0].EmcDbg                     = 0x01000020;
+SDRAM[0].AhbArbitrationXbarCtrl     = 0x00010000;
+SDRAM[0].EmcDllXformDqs             = 0x00000010;
+SDRAM[0].EmcDllXformQUse            = 0x00000008;
+SDRAM[0].WarmBootWait               = 0x00000001;
+SDRAM[0].EmcCttTermCtrl             = 0x00000802;
+SDRAM[0].EmcOdtWrite                = 0x00000000;
+SDRAM[0].EmcOdtRead                 = 0x00000000;
+SDRAM[0].EmcZcalRefCnt              = 0x00000000;
+SDRAM[0].EmcZcalWaitCnt             = 0x0000001b;
+SDRAM[0].EmcZcalMrwCmd              = 0x000a0056;
+SDRAM[0].EmcMrwZqInitDev0           = 0x800a00ff;
+SDRAM[0].EmcMrwZqInitDev1           = 0x400a00ff;
+SDRAM[0].EmcMrwZqInitWait           = 0x00000001;
+SDRAM[0].EmcDdr2Wait                = 0x00000000;
+SDRAM[0].PmcDdrPwr                  = 0x00000000;
+SDRAM[0].ApbMiscGpXm2CfgAPadCtrl    = 0x77ffc000;
+SDRAM[0].ApbMiscGpXm2CfgCPadCtrl2   = 0x08080040;
+SDRAM[0].ApbMiscGpXm2CfgCPadCtrl    = 0x77fffff8;
+SDRAM[0].ApbMiscGpXm2CfgDPadCtrl2   = 0x00000000;
+SDRAM[0].ApbMiscGpXm2CfgDPadCtrl    = 0x77fffff8;
+SDRAM[0].ApbMiscGpXm2ClkCfgPadCtrl  = 0x77ffc000;
+SDRAM[0].ApbMiscGpXm2CompPadCtrl    = 0x01f1f008;
+SDRAM[0].ApbMiscGpXm2VttGenPadCtrl  = 0x00005500;
diff --git a/whistler/build.sh b/whistler/build.sh
new file mode 100755
index 0000000..36d3665
--- /dev/null
+++ b/whistler/build.sh
@@ -0,0 +1,27 @@
+#!/bin/sh
+
+# Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+#
+# This software is provided 'as-is', without any express or implied
+# warranty. In no event will the authors be held liable for any damages
+# arising from the use of this software.
+#
+# Permission is granted to anyone to use this software for any purpose,
+# including commercial applications, and to alter it and redistribute it
+# freely, subject to the following restrictions:
+#
+# 1. The origin of this software must not be misrepresented; you must not
+#    claim that you wrote the original software. If you use this software
+#    in a product, an acknowledgment in the product documentation would be
+#    appreciated but is not required.
+# 2. Altered source versions must be plainly marked as such, and must not be
+#    misrepresented as being the original software.
+# 3. This notice may not be removed or altered from any source distribution.
+
+set -e
+set -x
+
+cbootimage -gbct \
+    E1108_Elpida_512MB_EDB4032B2PB-6D-F_300MHz_40nm_emmc_x8.bct.cfg \
+    E1108_Elpida_512MB_EDB4032B2PB-6D-F_300MHz_40nm_emmc_x8.bct
+cbootimage whistler-emmc.img.cfg whistler-emmc.img
diff --git a/whistler/whistler-emmc.img.cfg b/whistler/whistler-emmc.img.cfg
new file mode 100644
index 0000000..606612c
--- /dev/null
+++ b/whistler/whistler-emmc.img.cfg
@@ -0,0 +1,22 @@
+# Copyright (c) 2012, NVIDIA CORPORATION.  All rights reserved.
+#
+# This software is provided 'as-is', without any express or implied
+# warranty. In no event will the authors be held liable for any damages
+# arising from the use of this software.
+#
+# Permission is granted to anyone to use this software for any purpose,
+# including commercial applications, and to alter it and redistribute it
+# freely, subject to the following restrictions:
+#
+# 1. The origin of this software must not be misrepresented; you must not
+#    claim that you wrote the original software. If you use this software
+#    in a product, an acknowledgment in the product documentation would be
+#    appreciated but is not required.
+# 2. Altered source versions must be plainly marked as such, and must not be
+#    misrepresented as being the original software.
+# 3. This notice may not be removed or altered from any source distribution.
+
+Version       = 0x00020001;
+Bctcopy       = 1;
+Bctfile       = E1108_Elpida_512MB_EDB4032B2PB-6D-F_300MHz_40nm_emmc_x8.bct;
+BootLoader    = u-boot.bin,0x00108000,0x00108000,Complete;