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* board-to-kernel-dt: don't generate outer state nodeStephen Warren2015-05-141-4/+0
| | | | | | | | | | | | | The important thing for board-to-kernel-dt to generate is the content of the pinmux "state" node in DT. The name and label of the node that contains this information is essentially irrelevant. Since this irrelevant name and label varies between boards in existing DTs, update board-to-kernel-dt so it doesn't generate it. This makes it obvious that the name and label shouldn't be modified when importing new versions of board-to-kernel-dt's output. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Support for MIPI pad ctrl groups in *.boardStephen Warren2015-03-251-0/+6
| | | | | | | Update csv-to-board.py to extract, and board-to-*.py to emit, configuration for MIPI pad ctrl groups. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* Support Tegra210Stephen Warren2015-02-251-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | Tegra210 changes the pinmux HW in a few ways; at least: - The set of drive groups is much more 1:1 with the set of pins. Most pins have an associated drive group register as well as an associated pinmux register, and most drive groups cover a single pin. - Some register fields have moved from the drive group registers into the pinmux registers. - The set of available options for each pin and group varies relative to previous chips, and hence the register layouts vary a bit too. This patch updates tegra-pinmux-scripts minimally to handle these changes, to a level equivalent to the support for previous chips. For example, some new options such as per-pin schmitt aren't handled since the syseng-supplied pinmux spreadsheets don't provide a value for this option. csv-to-board-tegra124-xlsx.py is renamed to csv-to-board.py since it now supports boards using different SoCs, and it's not worth encoding all supported SoCs in the filename (Tegra30/114 aren't supported by it, hence the previous naming). Signed-off-by: Stephen Warren <swarren@nvidia.com>
* fix kernel dt generation for Tegra 3Lucas Stach2015-01-091-1/+1
| | | | | | | There is no attribute rcv_sel on Tegra 3. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* Warn about unconfigured pinsStephen Warren2014-08-211-0/+2
| | | | | | | When generating a kernel or U-Boot pinmux configuration, complain about pins that have no configuration. That's probably a bug in the spreadsheet. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* Initial set of scriptsStephen Warren2014-04-221-0/+65
A set of scripts to generate Linux kernel and U-Boot pinmux drivers and board pinmux configuration tables. Also included are scripts to convert existing Linux kernel pinmux drivers and NV-internal spreadsheets to the internal data representation. SoC configuration files are included for Tegra30, Tegra114, and Tegra124. Board configuration files are included for Jetson TK1 and Venice2. configs/tegra30.soc configs/tegra114.soc configs/tegra124.soc SoC pin definitions configs/jetson-tk1.board configs/venice2.board Board configurations soc-to-kernel-pinctrl-driver.py soc-to-uboot-driver.py Generate Linux kernel and U-Boot pinmux drivers board-to-kernel-dt.py board-to-uboot.py Generate board configuration tables for the Linux kernel (DT) and U-Boot. kernel-pinctrl-driver-to-soc.py Convert an existing Linux kernel pinmux driver to the internal representation of an SoC used by this project. csv-to-board-tegra124-xlsx.py Convert an NV-internal board configuration spreadsheet to the internal representation of a board configuration used by this project. tegra_pmx_board_parser.py tegra_pmx_parser_utils.py tegra_pmx_soc_parser.py tegra_pmx_utils.py Internal Python modules used to parse the internal data representations, and various other utilities. Signed-off-by: Stephen Warren <swarren@nvidia.com>