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This makes the script generate code that matches U-Boot as of its commit
"ARM: tegra: use DT bindings for GPIO naming".
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Add a comment block to the top of each generated U-Boot header file
indicating that the file was auto-generated, should not be manually
edited, and with a pointer to the tool and command used to generate it.
Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Update csv-to-board.py to extract, and board-to-*.py to emit,
configuration for MIPI pad ctrl groups.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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append_aligned_tabs_indent_with_tabs() was converting TABs to spaces to
simplify calculation of line length, assuming the only TABs were at the
beginning of the line, and hence were all exactly 8 characters wide. In
some scenarios, TABs were also embedded within the line, which caused
incorrect calculations. Solve this by explicitly evaluating TAB widths
character by character, rather than taking shortcuts.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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The FIXME has already been fixed!
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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This series mainly adds support for configuring the MIPI pad control
registers, along with a few fixes/cleanups first. I'll enhance the
Jetson TK1 board file to actually include MIPI pad control settings
as soon as I've cleared up one other change in the latest spreadsheet.
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Tegra210 changes the pinmux HW in a few ways; at least:
- The set of drive groups is much more 1:1 with the set of pins. Most
pins have an associated drive group register as well as an associated
pinmux register, and most drive groups cover a single pin.
- Some register fields have moved from the drive group registers into
the pinmux registers.
- The set of available options for each pin and group varies relative to
previous chips, and hence the register layouts vary a bit too.
This patch updates tegra-pinmux-scripts minimally to handle these
changes, to a level equivalent to the support for previous chips. For
example, some new options such as per-pin schmitt aren't handled since
the syseng-supplied pinmux spreadsheets don't provide a value for this
option.
csv-to-board-tegra124-xlsx.py is renamed to csv-to-board.py since it now
supports boards using different SoCs, and it's not worth encoding all
supported SoCs in the filename (Tegra30/114 aren't supported by it, hence
the previous naming).
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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When generating a kernel or U-Boot pinmux configuration, complain about
pins that have no configuration. That's probably a bug in the spreadsheet.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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A set of scripts to generate Linux kernel and U-Boot pinmux drivers and
board pinmux configuration tables. Also included are scripts to convert
existing Linux kernel pinmux drivers and NV-internal spreadsheets to the
internal data representation.
SoC configuration files are included for Tegra30, Tegra114, and Tegra124.
Board configuration files are included for Jetson TK1 and Venice2.
configs/tegra30.soc
configs/tegra114.soc
configs/tegra124.soc
SoC pin definitions
configs/jetson-tk1.board
configs/venice2.board
Board configurations
soc-to-kernel-pinctrl-driver.py
soc-to-uboot-driver.py
Generate Linux kernel and U-Boot pinmux drivers
board-to-kernel-dt.py
board-to-uboot.py
Generate board configuration tables for the Linux kernel (DT) and
U-Boot.
kernel-pinctrl-driver-to-soc.py
Convert an existing Linux kernel pinmux driver to the internal
representation of an SoC used by this project.
csv-to-board-tegra124-xlsx.py
Convert an NV-internal board configuration spreadsheet to the
internal representation of a board configuration used by this
project.
tegra_pmx_board_parser.py
tegra_pmx_parser_utils.py
tegra_pmx_soc_parser.py
tegra_pmx_utils.py
Internal Python modules used to parse the internal data
representations, and various other utilities.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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