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| author | Stephen Warren <swarren@nvidia.com> | 2015-08-18 13:12:01 -0600 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2015-08-18 13:13:23 -0600 |
| commit | 9e89de7bfce3459bade593424d9760b9972c0463 (patch) | |
| tree | 48449bdf6dc7462705e1128d2cb5a775169f0426 | |
| parent | 098a4a086a581d1cfff0bca13d60b1dcf6f8b1ed (diff) | |
| download | tegra-uboot-flasher-scripts-9e89de7bfce3459bade593424d9760b9972c0463.tar.gz | |
Fix "typo" in comment re: padding calculations
The binary format is U-Boot code + DTB + pad + flash image. U-Boot moves
the DTB out of the way of BSS. The pad is to prevent U-Boot trashing the
flash image, not the DTB. Fix the comment to reflect that.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
| -rwxr-xr-x | tegra-uboot-flasher | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tegra-uboot-flasher b/tegra-uboot-flasher index 4809665..d20e3ad 100755 --- a/tegra-uboot-flasher +++ b/tegra-uboot-flasher @@ -160,7 +160,7 @@ def func_flash(): if args.debug: print 'bss_size %d 0x%x' % (bss_size, bss_size) - # Avoid U-Boot's BSS, so the BSS-zeroing doesn't trash the DTB + # Avoid U-Boot's BSS, so the BSS-zeroing doesn't trash the appended flash image # Add 4KB in case the DTB size changes due to fdtput # Align to 4k, so flash writes don't need a bounce buffer for DMA padded_size = (u_boot_plus_dtb_size + bss_size + (2 * 4 * 1024) - 1) & ~((4 * 1024) - 1) |