summaryrefslogtreecommitdiff
path: root/yjit/src/backend
Commit message (Collapse)AuthorAgeFilesLines
* YJIT: Merge lower_stack into the split pass (#7748)Takashi Kokubun2023-04-203-71/+55
|
* YJIT: Merge csel and mov on arm64 (#7747)Takashi Kokubun2023-04-201-94/+91
| | | | | * YJIT: Refactor arm64_split with &mut insn * YJIT: Merge csel and mov on arm64
* YJIT: Avoid splitting mov for small values on arm64 (#7745)Takashi Kokubun2023-04-201-2/+31
| | | | | | | | | | | | | * YJIT: Avoid splitting mov for small values on arm64 * Fix a comment Co-authored-by: Alan Wu <XrXr@users.noreply.github.com> * YJIT: Test the 0xffff boundary --------- Co-authored-by: Alan Wu <XrXr@users.noreply.github.com>
* YJIT: Replace Mov with LoadInto on arm64 (#7744)Takashi Kokubun2023-04-191-20/+39
| | | | | * YJIT: Replace Mov with LoadInto on arm64 * YJIT: Add a test for the new pass
* YJIT: Remove Insn::RegTemps (#7741)Takashi Kokubun2023-04-193-84/+66
| | | | | | | | | | | * YJIT: Remove Insn::RegTemps * Update a comment Co-authored-by: Maxime Chevalier-Boisvert <maximechevalierb@gmail.com> --------- Co-authored-by: Maxime Chevalier-Boisvert <maximechevalierb@gmail.com>
* YJIT: Spill a caller stack as late as possible (#7726)Takashi Kokubun2023-04-171-3/+8
|
* YJIT: Add a counter to all side exits (#7720)Takashi Kokubun2023-04-143-4/+4
|
* YJIT: Introduce Target::SideExit (#7712)Takashi Kokubun2023-04-144-53/+180
| | | | | | | * YJIT: Introduce Target::SideExit * YJIT: Obviate Insn::SideExitContext * YJIT: Avoid cloning a Context for each insn
* YJIT: Move stack_opnd from Context to Assembler (#7700)Takashi Kokubun2023-04-131-1/+1
|
* YJIT: Let Assembler own Context (#7691)Takashi Kokubun2023-04-122-14/+18
| | | | | | | | | | | * YJIT: Let Assembler own Context * Update a comment Co-authored-by: Maxime Chevalier-Boisvert <maximechevalierb@gmail.com> --------- Co-authored-by: Maxime Chevalier-Boisvert <maximechevalierb@gmail.com>
* YJIT: Reduce paddings if --yjit-exec-mem-size <= 128 on arm64 (#7671)Takashi Kokubun2023-04-112-9/+43
| | | | | | | * YJIT: Reduce paddings if --yjit-exec-mem-size <= 128 on arm64 * YJIT: Define jmp_ptr_bytes on CodeBlock
* YJIT: Stack temp register allocation for arm64 (#7659)Takashi Kokubun2023-04-063-24/+45
| | | | | | | | | | | | | | | | | * YJIT: Stack temp register allocation for arm64 * Update a comment Co-authored-by: Maxime Chevalier-Boisvert <maximechevalierb@gmail.com> * Update comments about assertion * Update a comment Co-authored-by: Maxime Chevalier-Boisvert <maximechevalierb@gmail.com> --------- Co-authored-by: Maxime Chevalier-Boisvert <maximechevalierb@gmail.com>
* YJIT: Stack temp register allocation (#7651)Takashi Kokubun2023-04-043-12/+200
| | | Co-authored-by: Maxime Chevalier-Boisvert <maximechevalierb@gmail.com>
* YJIT: Eliminate unnecessary mov for trampolines (#7537)Takashi Kokubun2023-03-151-1/+4
|
* YJIT: Use assert_disasm! in an A64 test to avoid unused warningAlan Wu2023-03-151-0/+6
| | | I kept getting unused warnings for this macro on A64 macOS.
* YJIT: Allow testing assembler with disasm (#7470)Takashi Kokubun2023-03-141-2/+15
| | | | | | | | | | | * YJIT: Allow testing assembler with disasm * YJIT: Drop new dependencies * YJIT: Avoid address manipulation * YJIT: Introduce assert_disasm! macro * YJIT: Update the comment about assert_disasm
* YJIT: Merge add/sub/and/or/xor and mov on x86_64 (#7492)Takashi Kokubun2023-03-131-23/+90
|
* YJIT: Merge x86_merge into x86_split (#7487)Takashi Kokubun2023-03-091-31/+12
|
* YJIT: Optimize `cmp REG, 0` into `test REG, REG` (#7471)Takashi Kokubun2023-03-091-2/+31
|
* YJIT: Add comments to peek and x86_mergeTakashi Kokubun2023-03-072-0/+4
|
* YJIT: Merge lea and mov on x86_64 when possibleTakashi Kokubun2023-03-072-3/+55
|
* YJIT: shrink stack_size/sp_offet to u8/i8 (#7426)Maxime Chevalier-Boisvert2023-03-021-1/+1
|
* YJIT: Introduce Opnd::Stack (#7352)Takashi Kokubun2023-02-223-5/+33
|
* Fix typos in YJIT [ci skip]Alan Wu2023-02-021-1/+1
|
* YJIT: ARM64: Fix long jumps to labelsAlan Wu2023-02-021-5/+60
| | | | | | | | | | | | | | | | Previously, with Code GC, YJIT panicked while trying to emit a B.cond instruction with an offset that is not encodable in 19 bits. This only happens when the code in an assembler instance straddles two pages. To fix this, when we detect that a jump to a label can land on a different page, we switch to a fresh new page and regenerate all the code in the assembler there. We still assume that no one assembler has so much code that it wouldn't fit inside a fresh new page. [Bug #19385] Co-authored-by: Takashi Kokubun <takashikkbn@gmail.com> Co-authored-by: Maxime Chevalier-Boisvert <maxime.chevalierboisvert@shopify.com>
* YJIT: ARM64: Move functions out of arm64_emit()Alan Wu2023-02-021-90/+90
|
* YJIT: Refactor side_exitsJimmy Miller2023-01-191-0/+1
|
* YJIT: Dump spill error to stderr [ci skip]Alan Wu2023-01-031-3/+3
| | | | | Since the panic message is in stderr, better to use the same stream in case stdout and stderr are not synced due to IO redirection.
* YJIT: fix 32 and 16 bit register store (#6840)Jemma Issroff2022-12-011-1/+23
| | | | | | | | | | | | | | | | | | | | * Fix 32 and 16 bit register store in YJIT Co-Authored-By: Takashi Kokubun <takashikkbn@gmail.com> * Remove an unnecessary diff * Reuse an rm_num_bits result * Use u16::MAX instead * Update the link Co-authored-by: Alan Wu <XrXr@users.noreply.github.com> * Just use sturh for 16 bits Co-authored-by: Takashi Kokubun <takashikkbn@gmail.com> Co-authored-by: Alan Wu <XrXr@users.noreply.github.com>
* YJIT: Simplify Insn::CCall to obviate Target::FunPtr (#6793)Takashi Kokubun2022-11-233-28/+10
|
* Fix YJIT backend to account for unsigned int immediates (#6789)Jemma Issroff2022-11-231-2/+42
| | | | | | | | | | | | | | | | | YJIT: x86_64: Fix cmp with number where sign bit is set Before this commit, we were unconditionally treating unsigned ints as signed ints when counting the number of bits required for representing the immediate in machine code. When the size of the immediate matches the size of the other operand, no sign extension happens, so this was incorrect. `asm.cmp(opnd64, 0x8000_0000)` panicked even though it's encodable as `CMP r/m32, imm32`. Large shape ids were impacted by this issue. Co-Authored-By: Aaron Patterson <tenderlove@ruby-lang.org> Co-Authored-By: Alan Wu <alanwu@ruby-lang.org> Co-authored-by: Aaron Patterson <tenderlove@ruby-lang.org> Co-authored-by: Alan Wu <alanwu@ruby-lang.org>
* YJIT: Skip padding jumps to side exits on Arm (#6790)Takashi Kokubun2022-11-223-24/+32
| | | | | | | | | YJIT: Skip padding jumps to side exits Co-authored-by: Maxime Chevalier-Boisvert <maxime.chevalierboisvert@shopify.com> Co-authored-by: Alan Wu <alansi.xingwu@shopify.com> Co-authored-by: Maxime Chevalier-Boisvert <maxime.chevalierboisvert@shopify.com> Co-authored-by: Alan Wu <alansi.xingwu@shopify.com>
* 32 bit comparison on shape idAaron Patterson2022-11-182-4/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit changes the shape id comparisons to use a 32 bit comparison rather than 64 bit. That means we don't need to load the shape id to a register on x86 machines. Given the following program: ```ruby class Foo def initialize @foo = 1 @bar = 1 end def read [@foo, @bar] end end foo = Foo.new foo.read foo.read foo.read foo.read foo.read puts RubyVM::YJIT.disasm(Foo.instance_method(:read)) ``` The machine code we generated _before_ this change is like this: ``` == BLOCK 1/4, ISEQ RANGE [0,3), 65 bytes ====================== # getinstancevariable 0x559a18623023: mov rax, qword ptr [r13 + 0x18] # guard object is heap 0x559a18623027: test al, 7 0x559a1862302a: jne 0x559a1862502d 0x559a18623030: cmp rax, 4 0x559a18623034: jbe 0x559a1862502d # guard shape, embedded, and T_OBJECT 0x559a1862303a: mov rcx, qword ptr [rax] 0x559a1862303d: movabs r11, 0xffff00000000201f 0x559a18623047: and rcx, r11 0x559a1862304a: movabs r11, 0xb000000002001 0x559a18623054: cmp rcx, r11 0x559a18623057: jne 0x559a18625046 0x559a1862305d: mov rax, qword ptr [rax + 0x18] 0x559a18623061: mov qword ptr [rbx], rax == BLOCK 2/4, ISEQ RANGE [3,6), 0 bytes ======================= == BLOCK 3/4, ISEQ RANGE [3,6), 47 bytes ====================== # gen_direct_jmp: fallthrough # getinstancevariable # regenerate_branch # getinstancevariable # regenerate_branch 0x559a18623064: mov rax, qword ptr [r13 + 0x18] # guard shape, embedded, and T_OBJECT 0x559a18623068: mov rcx, qword ptr [rax] 0x559a1862306b: movabs r11, 0xffff00000000201f 0x559a18623075: and rcx, r11 0x559a18623078: movabs r11, 0xb000000002001 0x559a18623082: cmp rcx, r11 0x559a18623085: jne 0x559a18625099 0x559a1862308b: mov rax, qword ptr [rax + 0x20] 0x559a1862308f: mov qword ptr [rbx + 8], rax ``` After this change, it's like this: ``` == BLOCK 1/4, ISEQ RANGE [0,3), 41 bytes ====================== # getinstancevariable 0x5560c986d023: mov rax, qword ptr [r13 + 0x18] # guard object is heap 0x5560c986d027: test al, 7 0x5560c986d02a: jne 0x5560c986f02d 0x5560c986d030: cmp rax, 4 0x5560c986d034: jbe 0x5560c986f02d # guard shape 0x5560c986d03a: cmp word ptr [rax + 6], 0x19 0x5560c986d03f: jne 0x5560c986f046 0x5560c986d045: mov rax, qword ptr [rax + 0x10] 0x5560c986d049: mov qword ptr [rbx], rax == BLOCK 2/4, ISEQ RANGE [3,6), 0 bytes ======================= == BLOCK 3/4, ISEQ RANGE [3,6), 23 bytes ====================== # gen_direct_jmp: fallthrough # getinstancevariable # regenerate_branch # getinstancevariable # regenerate_branch 0x5560c986d04c: mov rax, qword ptr [r13 + 0x18] # guard shape 0x5560c986d050: cmp word ptr [rax + 6], 0x19 0x5560c986d055: jne 0x5560c986f099 0x5560c986d05b: mov rax, qword ptr [rax + 0x18] 0x5560c986d05f: mov qword ptr [rbx + 8], rax ``` The first ivar read is a bit more complex, but the second ivar read is much simpler. I think eventually we could teach the context about the shape, then emit only one shape guard.
* YJIT: Always encode Opnd::Value in 64 bits on x86_64 for GC offsets (#6733)Takashi Kokubun2022-11-151-5/+5
| | | | | | | | | | | | | | | | | * YJIT: Always encode Opnd::Value in 64 bits on x86_64 for GC offsets Co-authored-by: Alan Wu <alansi.xingwu@shopify.com> * Introduce heap_object_p * Leave original mov intact * Remove unneeded branches * Add a test for movabs Co-authored-by: Alan Wu <alansi.xingwu@shopify.com>
* YJIT: Stop incrementing write_pos if cb.has_dropped_bytes (#6664)Takashi Kokubun2022-11-031-1/+1
| | | | | Co-Authored-By: Alan Wu <alansi.xingwu@shopify.com> Co-authored-by: Alan Wu <alansi.xingwu@shopify.com>
* YJIT: Support invokeblock (#6640)Takashi Kokubun2022-11-022-4/+5
| | | | | | | | | * YJIT: Support invokeblock * Update yjit/src/backend/arm64/mod.rs * Update yjit/src/codegen.rs Co-authored-by: Maxime Chevalier-Boisvert <maximechevalierb@gmail.com>
* YJIT: Visualize live ranges on register spill (#6651)Takashi Kokubun2022-11-011-6/+37
|
* YJIT: Invalidate i-cache for the other cb on next_page (#6631)Takashi Kokubun2022-10-261-1/+18
| | | | | | | * YJIT: Invalidate i-cache for the other cb on next_page * YJIT: Invalidate only what's written by jmp_ptr * YJIT: Move the code to the arm64 backend
* YJIT: Skip dumping code for the other cb on --yjit-dump-disasm (#6592)Takashi Kokubun2022-10-191-2/+2
| | | | | YJIT: Skip dumping code for the other cb on --yjit-dump-disasm
* YJIT: fold the "asm_comments" feature into "disasm" (#6591)Alan Wu2022-10-192-2/+2
| | | | | Previously, enabling only "disasm" didn't actually build. Since these two features are closely related and we don't really use one without the other, let's simplify and merge the two features together.
* YJIT: Allow --yjit-dump-disasm to dump into a file (#6552)Takashi Kokubun2022-10-171-7/+4
| | | | | | | * YJIT: Allow --yjit-dump-disasm to dump into a file * YJIT: Move IO implementation to disasm.rs * YJIT: More consistent naming
* YJIT: Interleave inline and outlined code blocks (#6460)Takashi Kokubun2022-10-174-59/+103
| | | | Co-authored-by: Alan Wu <alansi.xingwu@shopify.com> Co-authored-by: Maxime Chevalier-Boisvert <maxime.chevalierboisvert@shopify.com>
* More clippy fixes (#6547)Jimmy Miller2022-10-142-13/+28
|
* fixes more clippy warnings (#6543)Jimmy Miller2022-10-133-45/+16
| | | | | * fixes more clippy warnings * Fix x86 c_callable to have doc_strings
* YJIT: fix ARM64 bitmask encoding for 32 bit registers (#6503)Alan Wu2022-10-061-9/+34
| | | | | | | | | | | | | | For logical instructions such as AND, there is a constraint that the N part of the bitmask immediate must be 0. We weren't respecting this condition previously and were silently emitting undefined instructions. Check for this condition in the assembler and tweak the backend to correctly detect whether a number could be encoded as an immediate in a 32 bit logical instruction. Due to the nature of the immediate encoding, the same numeric value encodes differently depending on the size of the register the instruction works on. We currently don't have cases where we use 32 bit immediates but we ran into this encoding issue during development.
* Split cmp operations that aren't 32/64 bit for arm (#6484)Jimmy Miller2022-10-032-0/+24
|
* A bunch of clippy auto fixes for yjit (#6476)Jimmy Miller2022-09-302-5/+5
|
* Change IncrCounter lowering on AArch64 (#6455)Kevin Newton2022-09-271-11/+21
| | | | | | | | | | | * Change IncrCounter lowering on AArch64 Previously we were using LDADDAL which is not available on Graviton 1 chips. Instead, we're going to use an exclusive load/store group through the LDAXR/STLXR instructions. * Update yjit/src/backend/arm64/mod.rs Co-authored-by: Maxime Chevalier-Boisvert <maximechevalierb@gmail.com>
* Invalidate i-cache after link_labels (#6388)Takashi Kokubun2022-09-161-11/+11
|
* YJIT: Add Opnd#with_num_bits to use only 8 bits (#6359)Takashi Kokubun2022-09-142-6/+27
| | | | | | | | | * YJIT: Add Opnd#sub_opnd to use only 8 bits * Add with_num_bits and let arm64_split use it * Add another assertion to with_num_bits * Use only with_num_bits
View Lorry Controller Status