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-rw-r--r--zephyr/projects/brya/BUILD.py12
-rw-r--r--zephyr/projects/brya/CMakeLists.txt4
-rw-r--r--zephyr/projects/brya/Kconfig2
-rw-r--r--zephyr/projects/brya/adc.dts6
-rw-r--r--zephyr/projects/brya/battery.dts2
-rw-r--r--zephyr/projects/brya/battery_present.c2
-rw-r--r--zephyr/projects/brya/brya.dts2
-rw-r--r--zephyr/projects/brya/cbi_eeprom.dts16
-rw-r--r--zephyr/projects/brya/fan.dts3
-rw-r--r--zephyr/projects/brya/gpio.dts96
-rw-r--r--zephyr/projects/brya/i2c.dts185
-rw-r--r--zephyr/projects/brya/include/gpio_map.h21
-rw-r--r--zephyr/projects/brya/interrupts.dts2
-rw-r--r--zephyr/projects/brya/kblight_hooks.c2
-rw-r--r--zephyr/projects/brya/keyboard.dts5
-rw-r--r--zephyr/projects/brya/motionsense.dts27
-rw-r--r--zephyr/projects/brya/prj.conf11
-rw-r--r--zephyr/projects/brya/prj_brya.conf2
-rw-r--r--zephyr/projects/brya/prj_ghost.conf5
-rw-r--r--zephyr/projects/brya/pwm_leds.dts3
-rw-r--r--zephyr/projects/brya/temp_sensors.dts58
-rw-r--r--zephyr/projects/brya/usbc.dts91
22 files changed, 271 insertions, 286 deletions
diff --git a/zephyr/projects/brya/BUILD.py b/zephyr/projects/brya/BUILD.py
index d044a11ae7..9991335ca7 100644
--- a/zephyr/projects/brya/BUILD.py
+++ b/zephyr/projects/brya/BUILD.py
@@ -1,11 +1,13 @@
-# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Copyright 2021 The ChromiumOS Authors
# Use of this source code is governed by a BSD-style license that can be
# found in the LICENSE file.
"""Define zmake projects for brya."""
-def register_npcx9_variant(project_name, extra_dts_overlays=(), extra_kconfig_files=()):
+def register_npcx9_variant(
+ project_name, extra_dts_overlays=(), extra_kconfig_files=()
+):
"""Register a variant of a brya, even though this is not named as such."""
return register_npcx_project(
project_name=project_name,
@@ -13,7 +15,6 @@ def register_npcx9_variant(project_name, extra_dts_overlays=(), extra_kconfig_fi
dts_overlays=[
"adc.dts",
"battery.dts",
- "cbi_eeprom.dts",
"fan.dts",
"gpio.dts",
"i2c.dts",
@@ -40,8 +41,3 @@ brya = register_npcx9_variant(
extra_dts_overlays=[here / "brya.dts"],
extra_kconfig_files=[here / "prj_brya.conf"],
)
-
-ghost = brya.variant(
- project_name="ghost",
- kconfig_files=[here / "prj_ghost.conf"],
-)
diff --git a/zephyr/projects/brya/CMakeLists.txt b/zephyr/projects/brya/CMakeLists.txt
index 0cb61eb838..11c1a8386f 100644
--- a/zephyr/projects/brya/CMakeLists.txt
+++ b/zephyr/projects/brya/CMakeLists.txt
@@ -1,10 +1,10 @@
-# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Copyright 2021 The ChromiumOS Authors
# Use of this source code is governed by a BSD-style license that can be
# found in the LICENSE file.
cmake_minimum_required(VERSION 3.13.1)
-find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
+find_package(Zephyr REQUIRED HINTS "${ZEPHYR_BASE}")
project(brya)
set(PLATFORM_EC_BOARD "${PLATFORM_EC}/board/brya" CACHE PATH
diff --git a/zephyr/projects/brya/Kconfig b/zephyr/projects/brya/Kconfig
index 111476eb42..4dd8e23443 100644
--- a/zephyr/projects/brya/Kconfig
+++ b/zephyr/projects/brya/Kconfig
@@ -1,4 +1,4 @@
-# Copyright 2022 The Chromium OS Authors. All rights reserved.
+# Copyright 2022 The ChromiumOS Authors
# Use of this source code is governed by a BSD-style license that can be
# found in the LICENSE file.
diff --git a/zephyr/projects/brya/adc.dts b/zephyr/projects/brya/adc.dts
index e1502b2389..f3f0d1e064 100644
--- a/zephyr/projects/brya/adc.dts
+++ b/zephyr/projects/brya/adc.dts
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2022 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -8,22 +8,18 @@
compatible = "named-adc-channels";
adc_ddr_soc: ddr_soc {
- label = "TEMP_DDR_SOC";
enum-name = "ADC_TEMP_SENSOR_1_DDR_SOC";
io-channels = <&adc0 0>;
};
adc_ambient: ambient {
- label = "TEMP_AMBIENT";
enum-name = "ADC_TEMP_SENSOR_2_AMBIENT";
io-channels = <&adc0 1>;
};
adc_charger: charger {
- label = "TEMP_CHARGER";
enum-name = "ADC_TEMP_SENSOR_3_CHARGER";
io-channels = <&adc0 6>;
};
adc_wwan: wwan {
- label = "TEMP_WWAN";
enum-name = "ADC_TEMP_SENSOR_4_WWAN";
io-channels = <&adc0 7>;
};
diff --git a/zephyr/projects/brya/battery.dts b/zephyr/projects/brya/battery.dts
index 1de6b3aa4a..4844d88d92 100644
--- a/zephyr/projects/brya/battery.dts
+++ b/zephyr/projects/brya/battery.dts
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2022 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
diff --git a/zephyr/projects/brya/battery_present.c b/zephyr/projects/brya/battery_present.c
index 5dc587293c..c487a01f36 100644
--- a/zephyr/projects/brya/battery_present.c
+++ b/zephyr/projects/brya/battery_present.c
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2022 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
diff --git a/zephyr/projects/brya/brya.dts b/zephyr/projects/brya/brya.dts
index 4182da6c32..4b0490afa9 100644
--- a/zephyr/projects/brya/brya.dts
+++ b/zephyr/projects/brya/brya.dts
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2022 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
diff --git a/zephyr/projects/brya/cbi_eeprom.dts b/zephyr/projects/brya/cbi_eeprom.dts
deleted file mode 100644
index 95a6806f31..0000000000
--- a/zephyr/projects/brya/cbi_eeprom.dts
+++ /dev/null
@@ -1,16 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-&i2c7_0 {
- cbi_eeprom: eeprom@50 {
- compatible = "atmel,at24";
- reg = <0x50>;
- label = "EEPROM_CBI";
- size = <2048>;
- pagesize = <16>;
- address-width = <8>;
- timeout = <5>;
- };
-};
diff --git a/zephyr/projects/brya/fan.dts b/zephyr/projects/brya/fan.dts
index e67845757f..aa6dcfde7d 100644
--- a/zephyr/projects/brya/fan.dts
+++ b/zephyr/projects/brya/fan.dts
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2022 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -9,7 +9,6 @@
fan_0 {
pwms = <&pwm5 0 PWM_KHZ(1) PWM_POLARITY_NORMAL>;
- pwm-frequency = <1000>;
rpm_min = <2200>;
rpm_start = <2200>;
rpm_max = <4200>;
diff --git a/zephyr/projects/brya/gpio.dts b/zephyr/projects/brya/gpio.dts
index 2b853f4d3b..6c6a2ac054 100644
--- a/zephyr/projects/brya/gpio.dts
+++ b/zephyr/projects/brya/gpio.dts
@@ -1,4 +1,4 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+/* Copyright 2021 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -132,10 +132,12 @@
gpio_pg_ec_dsw_pwrok: pg_ec_dsw_pwrok {
gpios = <&gpioc 7 GPIO_INPUT>;
enum-name = "GPIO_PG_EC_DSW_PWROK";
+ alias = "GPIO_SEQ_EC_DSW_PWROK";
};
en_s5_rails {
gpios = <&gpiob 6 GPIO_OUTPUT_LOW>;
enum-name = "GPIO_EN_S5_RAILS";
+ alias = "GPIO_TEMP_SENSOR_POWER";
};
sys_rst_odl {
gpios = <&gpioc 5 GPIO_ODR_HIGH>;
@@ -272,116 +274,68 @@
};
usb_c0_oc_odl {
gpios = <&ioex_port1 4 GPIO_ODR_HIGH>;
- enum-name = "IOEX_USB_C0_OC_ODL";
no-auto-init;
};
- usb_c0_frs_en {
+ usb_c0_frs_en: usb_c0_frs_en {
gpios = <&ioex_port1 6 GPIO_OUTPUT_LOW>;
enum-name = "IOEX_USB_C0_FRS_EN";
no-auto-init;
};
usb_c0_rt_rst_odl: usb_c0_rt_rst_odl {
gpios = <&ioex_port1 7 GPIO_ODR_LOW>;
- enum-name = "IOEX_USB_C0_RT_RST_ODL";
no-auto-init;
};
usb_c2_rt_rst_odl: usb_c2_rt_rst_odl {
gpios = <&ioex_port2 2 GPIO_ODR_LOW>;
- enum-name = "IOEX_USB_C2_RT_RST_ODL";
no-auto-init;
};
usb_c1_oc_odl {
gpios = <&ioex_port2 3 GPIO_ODR_HIGH>;
- enum-name = "IOEX_USB_C1_OC_ODL";
no-auto-init;
};
usb_c2_oc_odl {
gpios = <&ioex_port2 4 GPIO_ODR_HIGH>;
- enum-name = "IOEX_USB_C2_OC_ODL";
no-auto-init;
};
- usb_c2_frs_en {
+ usb_c2_frs_en: usb_c2_frs_en {
gpios = <&ioex_port2 6 GPIO_OUTPUT_LOW>;
enum-name = "IOEX_USB_C2_FRS_EN";
no-auto-init;
};
+ /* unimplemented GPIOs */
+ entering-rw {
+ enum-name = "GPIO_ENTERING_RW";
+ };
};
usba-port-enable-list {
compatible = "cros-ec,usba-port-enable-pins";
enable-pins = <&gpio_en_pp5000_usba_r>;
};
-
- vsby-psl-in-list {
- /* Use PSL_IN1/2/3 as detection pins from hibernate mode */
- psl-in-pads = <&psl_in1 &psl_in2 &psl_in3>;
- status = "okay";
- };
-};
-
-&i2c1_0 {
- status = "okay";
- pinctrl-0 = <&i2c1_0_sda_scl_gp87_90>;
- pinctrl-names = "default";
-
- nct3808_0_P1: nct3808_0_P1@70 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "nuvoton,nct38xx-gpio";
- reg = <0x70>;
- label = "NCT3808_0_P1";
-
- ioex_port1: gpio@0 {
- compatible = "nuvoton,nct38xx-gpio-port";
- reg = <0x0>;
- label = "NCT3808_0_P1_GPIO0";
- gpio-controller;
- #gpio-cells = <2>;
- ngpios = <8>;
- pin_mask = <0xdc>;
- pinmux_mask = <0xff>;
- };
- };
-
- nct3808_0_P2: nct3808_0_P2@74 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "nuvoton,nct38xx-gpio";
- reg = <0x74>;
- label = "NCT3808_0_P2";
-
- ioex_port2: gpio@0 {
- compatible = "nuvoton,nct38xx-gpio-port";
- reg = <0x0>;
- label = "NCT3808_0_P2_GPIO0";
- gpio-controller;
- #gpio-cells = <2>;
- ngpios = <8>;
- pin_mask = <0xdc>;
- pinmux_mask = <0xff>;
- };
- };
-
- nct3808_alert_1 {
- compatible = "nuvoton,nct38xx-gpio-alert";
- irq-gpios = <&gpioe 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
- nct38xx-dev = <&nct3808_0_P1 &nct3808_0_P2>;
- label = "NCT3808_ALERT_1";
- };
};
/* Power switch logic input pads */
/* LID_OPEN_OD */
-&psl_in1 {
- flag = <NPCX_PSL_RISING_EDGE>;
+&psl_in1_gpd2 {
+ psl-in-mode = "edge";
+ psl-in-pol = "high-rising";
};
/* ACOK_EC_OD */
-&psl_in2 {
- flag = <NPCX_PSL_RISING_EDGE>;
+&psl_in2_gp00 {
+ psl-in-mode = "edge";
+ psl-in-pol = "high-rising";
};
/* GSC_EC_PWR_BTN_ODL */
-&psl_in3 {
- flag = <NPCX_PSL_FALLING_EDGE>;
+&psl_in3_gp01 {
+ psl-in-mode = "edge";
+ psl-in-pol = "high-rising";
+};
+
+/* Power domain device controlled by PSL (Power Switch Logic) IO pads */
+&power_ctrl_psl {
+ status = "okay";
+ pinctrl-names = "sleep";
+ pinctrl-0 = <&psl_in1_gpd2 &psl_in2_gp00 &psl_in3_gp01>;
};
diff --git a/zephyr/projects/brya/i2c.dts b/zephyr/projects/brya/i2c.dts
index 6567e27bf0..7284d80870 100644
--- a/zephyr/projects/brya/i2c.dts
+++ b/zephyr/projects/brya/i2c.dts
@@ -1,60 +1,50 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2022 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
+ #include <dt-bindings/usb_pd_tcpm.h>
+
/ {
named-i2c-ports {
compatible = "named-i2c-ports";
i2c_sensor: sensor {
i2c-port = <&i2c0_0>;
- enum-name = "I2C_PORT_SENSOR";
+ enum-names = "I2C_PORT_SENSOR";
};
tcpc0_2: tcpc0_2 {
i2c-port = <&i2c1_0>;
- enum-name = "I2C_PORT_USB_C0_C2_TCPC";
+ enum-names = "I2C_PORT_USB_C0_C2_TCPC";
};
tcpc1: tcpc1 {
i2c-port = <&i2c4_1>;
- enum-name = "I2C_PORT_USB_C1_TCPC";
+ enum-names = "I2C_PORT_USB_C1_TCPC";
dynamic-speed;
};
- ppc0_2: ppc0_2 {
+ c0_c2_bc12: c0_c2_bc12 {
i2c-port = <&i2c2_0>;
- enum-name = "I2C_PORT_USB_C0_C2_PPC";
+ enum-names = "I2C_PORT_USB_C0_C2_PPC",
+ "I2C_PORT_USB_C0_C2_BC12";
};
- ppc1: ppc1 {
+ c1_bc12: c1_bc12 {
i2c-port = <&i2c6_1>;
- enum-name = "I2C_PORT_USB_C1_PPC";
+ enum-names = "I2C_PORT_USB_C1_PPC",
+ "I2C_PORT_USB_C1_BC12";
dynamic-speed;
};
retimer0_2: retimer0_2 {
i2c-port = <&i2c3_0>;
- enum-name = "I2C_PORT_USB_C0_C2_MUX";
+ enum-names = "I2C_PORT_USB_C0_C2_MUX";
};
battery {
i2c-port = <&i2c5_0>;
- enum-name = "I2C_PORT_BATTERY";
- };
- eeprom {
- i2c-port = <&i2c7_0>;
- enum-name = "I2C_PORT_EEPROM";
+ enum-names = "I2C_PORT_BATTERY";
};
i2c_charger: charger {
i2c-port = <&i2c7_0>;
- enum-name = "I2C_PORT_CHARGER";
- };
- c1_bc12: c1_bc12 {
- i2c-port = <&i2c6_1>;
- enum-name = "I2C_PORT_USB_C1_BC12";
- };
- c0_c2_bc12: c0_c2_bc12 {
- i2c-port = <&i2c2_0>;
- enum-name = "I2C_PORT_USB_C0_C2_BC12";
- };
- mp2964 {
- i2c-port = <&i2c7_0>;
- enum-name = "I2C_PORT_MP2964";
+ enum-names = "I2C_PORT_CHARGER",
+ "I2C_PORT_EEPROM",
+ "I2C_PORT_MP2964";
};
};
};
@@ -75,6 +65,67 @@
clock-frequency = <I2C_BITRATE_FAST_PLUS>;
pinctrl-0 = <&i2c1_0_sda_scl_gp87_90>;
pinctrl-names = "default";
+
+ tcpc_port0: nct38xx@70 {
+ compatible = "nuvoton,nct38xx";
+ reg = <0x70>;
+ gpio-dev = <&nct3808_0_P1>;
+ tcpc-flags = <(
+ TCPC_FLAGS_TCPCI_REV2_0 |
+ TCPC_FLAGS_NO_DEBUG_ACC_CONTROL)>;
+ };
+
+ nct3808_0_P1: nct3808_0_P1@70 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nuvoton,nct38xx-gpio";
+ reg = <0x70>;
+ label = "NCT3808_0_P1";
+
+ ioex_port1: gpio@0 {
+ compatible = "nuvoton,nct38xx-gpio-port";
+ reg = <0x0>;
+ label = "NCT3808_0_P1_GPIO0";
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <8>;
+ pin_mask = <0xdc>;
+ pinmux_mask = <0xff>;
+ };
+ };
+
+ tcpc_port2: nct38xx@74 {
+ compatible = "nuvoton,nct38xx";
+ reg = <0x74>;
+ gpio-dev = <&nct3808_0_P2>;
+ tcpc-flags = <(TCPC_FLAGS_TCPCI_REV2_0)>;
+ };
+
+ nct3808_0_P2: nct3808_0_P2@74 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "nuvoton,nct38xx-gpio";
+ reg = <0x74>;
+ label = "NCT3808_0_P2";
+
+ ioex_port2: gpio@0 {
+ compatible = "nuvoton,nct38xx-gpio-port";
+ reg = <0x0>;
+ label = "NCT3808_0_P2_GPIO0";
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpios = <8>;
+ pin_mask = <0xdc>;
+ pinmux_mask = <0xff>;
+ };
+ };
+
+ nct3808_alert_1 {
+ compatible = "nuvoton,nct38xx-gpio-alert";
+ irq-gpios = <&gpioe 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+ nct38xx-dev = <&nct3808_0_P1 &nct3808_0_P2>;
+ label = "NCT3808_ALERT_1";
+ };
};
&i2c_ctrl1 {
@@ -86,6 +137,34 @@
clock-frequency = <I2C_BITRATE_FAST_PLUS>;
pinctrl-0 = <&i2c2_0_sda_scl_gp91_92>;
pinctrl-names = "default";
+
+ ppc_port0: syv682x@40 {
+ compatible = "silergy,syv682x";
+ status = "okay";
+ reg = <0x40>;
+ frs_en_gpio = <&usb_c0_frs_en>;
+ };
+
+ bc12_port0: pi3usb9201@5f {
+ compatible = "pericom,pi3usb9201";
+ status = "okay";
+ reg = <0x5f>;
+ irq = <&int_usb_c0_bc12>;
+ };
+
+ ppc_port2: syv682x@42 {
+ compatible = "silergy,syv682x";
+ status = "okay";
+ reg = <0x42>;
+ frs_en_gpio = <&usb_c2_frs_en>;
+ };
+
+ bc12_port2: pi3usb9201@5d {
+ compatible = "pericom,pi3usb9201";
+ status = "okay";
+ reg = <0x5d>;
+ irq = <&int_usb_c2_bc12>;
+ };
};
&i2c_ctrl2 {
@@ -97,6 +176,20 @@
clock-frequency = <I2C_BITRATE_FAST_PLUS>;
pinctrl-0 = <&i2c3_0_sda_scl_gpd0_d1>;
pinctrl-names = "default";
+
+ usb_c0_bb_retimer: jhl8040r-c0@56 {
+ compatible = "intel,jhl8040r";
+ reg = <0x56>;
+ int-pin = <&usb_c0_rt_int_odl>;
+ reset-pin = <&usb_c0_rt_rst_odl>;
+ };
+
+ usb_c2_bb_retimer: jhl8040r-c2@57 {
+ compatible = "intel,jhl8040r";
+ reg = <0x57>;
+ int-pin = <&usb_c2_rt_int_odl>;
+ reset-pin = <&usb_c2_rt_rst_odl>;
+ };
};
&i2c_ctrl3 {
@@ -108,6 +201,16 @@
clock-frequency = <I2C_BITRATE_FAST>;
pinctrl-0 = <&i2c4_1_sda_scl_gpf2_f3>;
pinctrl-names = "default";
+
+ tcpc_port1: ps8xxx@b {
+ compatible = "parade,ps8xxx";
+ reg = <0xb>;
+ tcpc-flags = <(
+ TCPC_FLAGS_TCPCI_REV2_0 |
+ TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V |
+ TCPC_FLAGS_CONTROL_VCONN |
+ TCPC_FLAGS_CONTROL_FRS)>;
+ };
};
&i2c_ctrl4 {
@@ -130,6 +233,19 @@
clock-frequency = <I2C_BITRATE_FAST>;
pinctrl-0 = <&i2c6_1_sda_scl_gpe3_e4>;
pinctrl-names = "default";
+
+ ppc_port1: nx20p348x@72 {
+ compatible = "nxp,nx20p348x";
+ status = "okay";
+ reg = <0x72>;
+ };
+
+ bc12_port1: pi3usb9201@5f {
+ compatible = "pericom,pi3usb9201";
+ status = "okay";
+ reg = <0x5f>;
+ irq = <&int_usb_c1_bc12>;
+ };
};
&i2c_ctrl6 {
@@ -147,6 +263,21 @@
reg = <0x20>;
label = "I2C_ADDR_MP2964_FLAGS";
};
+
+ charger: bq25710@9 {
+ compatible = "ti,bq25710";
+ status = "okay";
+ reg = <0x9>;
+ };
+
+ cbi_eeprom: eeprom@50 {
+ compatible = "atmel,at24";
+ reg = <0x50>;
+ size = <2048>;
+ pagesize = <16>;
+ address-width = <8>;
+ timeout = <5>;
+ };
};
&i2c_ctrl7 {
diff --git a/zephyr/projects/brya/include/gpio_map.h b/zephyr/projects/brya/include/gpio_map.h
deleted file mode 100644
index 98f3463132..0000000000
--- a/zephyr/projects/brya/include/gpio_map.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/* Copyright 2021 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#ifndef __ZEPHYR_GPIO_MAP_H
-#define __ZEPHYR_GPIO_MAP_H
-
-#include <zephyr/devicetree.h>
-#include <gpio_signal.h>
-
-#define GPIO_ENTERING_RW GPIO_UNIMPLEMENTED
-
-#define GPIO_SEQ_EC_DSW_PWROK GPIO_PG_EC_DSW_PWROK
-
-/* TODO(fabiobaltieri): make this a named-temp-sensors property, deprecate the
- * Kconfig option.
- */
-#define GPIO_TEMP_SENSOR_POWER GPIO_EN_S5_RAILS
-
-#endif /* __ZEPHYR_GPIO_MAP_H */
diff --git a/zephyr/projects/brya/interrupts.dts b/zephyr/projects/brya/interrupts.dts
index 7132c12f77..1adca3e035 100644
--- a/zephyr/projects/brya/interrupts.dts
+++ b/zephyr/projects/brya/interrupts.dts
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2022 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
diff --git a/zephyr/projects/brya/kblight_hooks.c b/zephyr/projects/brya/kblight_hooks.c
index e00d8953db..d6d795f28e 100644
--- a/zephyr/projects/brya/kblight_hooks.c
+++ b/zephyr/projects/brya/kblight_hooks.c
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2022 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
diff --git a/zephyr/projects/brya/keyboard.dts b/zephyr/projects/brya/keyboard.dts
index 4f06764810..91fad2db92 100644
--- a/zephyr/projects/brya/keyboard.dts
+++ b/zephyr/projects/brya/keyboard.dts
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2022 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -7,7 +7,6 @@
kblight {
compatible = "cros-ec,kblight-pwm";
pwms = <&pwm3 0 PWM_HZ(2400) PWM_POLARITY_NORMAL>;
- frequency = <2400>;
};
};
@@ -41,6 +40,8 @@
&kso10_gp07
&kso11_gp06
&kso12_gp05
+ &kso13_gp04
+ &kso14_gp82
>;
pinctrl-names = "default";
};
diff --git a/zephyr/projects/brya/motionsense.dts b/zephyr/projects/brya/motionsense.dts
index dd3f479042..78b5d2387e 100644
--- a/zephyr/projects/brya/motionsense.dts
+++ b/zephyr/projects/brya/motionsense.dts
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2022 The Chromium OS Authors
+ * Copyright 2022 The ChromiumOS Authors
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -29,11 +29,9 @@
motionsense-mutex {
compatible = "cros-ec,motionsense-mutex";
mutex_lis2dw12: lis2dw12-mutex {
- label = "LIS2DW12_MUTEX";
};
mutex_lsm6dso: lsm6dso-mutex {
- label = "LSM6DSO_MUTEX";
};
};
@@ -67,7 +65,12 @@
status = "okay";
};
- lsm6dso_data: lsm6dso-drv-data {
+ lsm6dso_accel_data: lsm6dso-drv-data {
+ compatible = "cros-ec,drvdata-lsm6dso";
+ status = "okay";
+ };
+
+ lsm6dso_gyro_data: lsm6dso-drv-data {
compatible = "cros-ec,drvdata-lsm6dso";
status = "okay";
};
@@ -139,7 +142,7 @@
/*
* List of motion sensors that creates motion_sensors array.
- * The label "lid_accel" and "base_accel" are used to indicate
+ * The nodelabel "lid_accel" and "base_accel" are used to indicate
* motion sensor IDs for lid angle calculation.
*/
motionsense-sensor {
@@ -147,7 +150,6 @@
compatible = "cros-ec,lis2dw12";
status = "okay";
- label = "Lid Accel";
active-mask = "SENSOR_ACTIVE_S0_S3";
location = "MOTIONSENSE_LOC_LID";
mutex = <&mutex_lis2dw12>;
@@ -160,11 +162,9 @@
compatible =
"cros-ec,motionsense-sensor-config";
ec-s0 {
- label = "SENSOR_CONFIG_EC_S0";
odr = <(10000 | ROUND_UP_FLAG)>;
};
ec-s3 {
- label = "SENSOR_CONFIG_EC_S3";
odr = <(10000 | ROUND_UP_FLAG)>;
};
};
@@ -174,25 +174,22 @@
compatible = "cros-ec,lsm6dso-accel";
status = "okay";
- label = "Base Accel";
active-mask = "SENSOR_ACTIVE_S0_S3";
location = "MOTIONSENSE_LOC_BASE";
mutex = <&mutex_lsm6dso>;
port = <&i2c_sensor>;
rot-standard-ref = <&base_rot_ref>;
default-range = <4>;
- drv-data = <&lsm6dso_data>;
+ drv-data = <&lsm6dso_accel_data>;
i2c-spi-addr-flags = "LSM6DSO_ADDR0_FLAGS";
configs {
compatible =
"cros-ec,motionsense-sensor-config";
ec-s0 {
- label = "SENSOR_CONFIG_EC_S0";
odr = <(13000 | ROUND_UP_FLAG)>;
ec-rate = <(100 * USEC_PER_MSEC)>;
};
ec-s3 {
- label = "SENSOR_CONFIG_EC_S3";
odr = <(10000 | ROUND_UP_FLAG)>;
ec-rate = <(100 * USEC_PER_MSEC)>;
};
@@ -203,14 +200,13 @@
compatible = "cros-ec,lsm6dso-gyro";
status = "okay";
- label = "Base Gyro";
active-mask = "SENSOR_ACTIVE_S0_S3";
location = "MOTIONSENSE_LOC_BASE";
mutex = <&mutex_lsm6dso>;
port = <&i2c_sensor>;
rot-standard-ref = <&base_rot_ref>;
default-range = <(1000 | ROUND_UP_FLAG)>; /* dps */
- drv-data = <&lsm6dso_data>;
+ drv-data = <&lsm6dso_gyro_data>;
i2c-spi-addr-flags = "LSM6DSO_ADDR0_FLAGS";
};
@@ -218,7 +214,6 @@
compatible = "cros-ec,tcs3400-clear";
status = "okay";
- label = "Clear Light";
active-mask = "SENSOR_ACTIVE_S0_S3";
location = "MOTIONSENSE_LOC_CAMERA";
port = <&i2c_sensor>;
@@ -230,7 +225,6 @@
"cros-ec,motionsense-sensor-config";
ec-s0 {
/* Run ALS sensor in S0 */
- label = "SENSOR_CONFIG_EC_S0";
odr = <1000>;
};
};
@@ -240,7 +234,6 @@
compatible = "cros-ec,tcs3400-rgb";
status = "okay";
- label = "RGB Light";
active-mask = "SENSOR_ACTIVE_S0_S3";
location = "MOTIONSENSE_LOC_CAMERA";
default-range = <0x10000>; /* scale = 1x, uscale = 0 */
diff --git a/zephyr/projects/brya/prj.conf b/zephyr/projects/brya/prj.conf
index 7ce897ae5f..19b523261b 100644
--- a/zephyr/projects/brya/prj.conf
+++ b/zephyr/projects/brya/prj.conf
@@ -1,4 +1,4 @@
-# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Copyright 2021 The ChromiumOS Authors
# Use of this source code is governed by a BSD-style license that can be
# found in the LICENSE file.
@@ -35,9 +35,9 @@ CONFIG_PLATFORM_EC_BOARD_VERSION_CBI=y
# eSPI
CONFIG_ESPI=y
-CONFIG_PLATFORM_EC_ESPI_VW_SLP_S4=y
-CONFIG_PLATFORM_EC_ESPI_VW_SLP_S5=y
-CONFIG_PLATFORM_EC_ESPI_DEFAULT_VW_WIDTH_US=150
+CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S4=y
+CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_VW_SLP_S5=y
+CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI_DEFAULT_VW_WIDTH_US=150
# I2C
CONFIG_I2C=y
@@ -86,9 +86,6 @@ CONFIG_PLATFORM_EC_TEMP_SENSOR=y
CONFIG_PLATFORM_EC_THERMISTOR=y
CONFIG_PLATFORM_EC_TEMP_SENSOR_POWER=y
-# Miscellaneous configs
-CONFIG_PLATFORM_EC_HIBERNATE_PSL=y
-
# MKBP event
CONFIG_PLATFORM_EC_MKBP_EVENT=y
CONFIG_PLATFORM_EC_MKBP_INPUT_DEVICES=y
diff --git a/zephyr/projects/brya/prj_brya.conf b/zephyr/projects/brya/prj_brya.conf
index 48f98f479d..5aaf86a8c9 100644
--- a/zephyr/projects/brya/prj_brya.conf
+++ b/zephyr/projects/brya/prj_brya.conf
@@ -1,4 +1,4 @@
-# Copyright 2022 The Chromium OS Authors. All rights reserved.
+# Copyright 2022 The ChromiumOS Authors
# Use of this source code is governed by a BSD-style license that can be
# found in the LICENSE file.
diff --git a/zephyr/projects/brya/prj_ghost.conf b/zephyr/projects/brya/prj_ghost.conf
deleted file mode 100644
index 666aeb1dd0..0000000000
--- a/zephyr/projects/brya/prj_ghost.conf
+++ /dev/null
@@ -1,5 +0,0 @@
-# Copyright 2022 The Chromium OS Authors. All rights reserved.
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-
-CONFIG_PLATFORM_EC_CHARGESPLASH=y
diff --git a/zephyr/projects/brya/pwm_leds.dts b/zephyr/projects/brya/pwm_leds.dts
index 4f5157317d..4321b4bd34 100644
--- a/zephyr/projects/brya/pwm_leds.dts
+++ b/zephyr/projects/brya/pwm_leds.dts
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2022 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -20,7 +20,6 @@
compatible = "cros-ec,pwm-leds";
leds = <&pwm_led0 &pwm_led1>;
- frequency = <4800>;
/*<amber white>*/
color-map-red = <0 0>;
diff --git a/zephyr/projects/brya/temp_sensors.dts b/zephyr/projects/brya/temp_sensors.dts
index f4505a3bc1..ae436a2c6b 100644
--- a/zephyr/projects/brya/temp_sensors.dts
+++ b/zephyr/projects/brya/temp_sensors.dts
@@ -1,4 +1,4 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2022 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
@@ -6,58 +6,66 @@
#include <cros/thermistor/thermistor.dtsi>
/ {
+ temp_ddr_soc: ddr_soc {
+ compatible = "cros-ec,temp-sensor-thermistor";
+ thermistor = <&thermistor_3V3_30K9_47K_4050B>;
+ adc = <&adc_ddr_soc>;
+ };
+
+ temp_ambient: ambient {
+ compatible = "cros-ec,temp-sensor-thermistor";
+ thermistor = <&thermistor_3V3_30K9_47K_4050B>;
+ adc = <&adc_ambient>;
+ };
+
+ temp_charger: charger {
+ compatible = "cros-ec,temp-sensor-thermistor";
+ thermistor = <&thermistor_3V3_30K9_47K_4050B>;
+ adc = <&adc_charger>;
+ };
+
+ temp_wwan: wwan {
+ compatible = "cros-ec,temp-sensor-thermistor";
+ thermistor = <&thermistor_3V3_30K9_47K_4050B>;
+ adc = <&adc_wwan>;
+ };
+
named-temp-sensors {
+ compatible = "cros-ec,temp-sensors";
ddr_soc {
- compatible = "cros-ec,temp-sensor-thermistor",
- "cros-ec,temp-sensor";
- thermistor = <&thermistor_3V3_30K9_47K_4050B>;
- label = "DDR and SOC";
- enum-name = "TEMP_SENSOR_1_DDR_SOC";
temp_fan_off = <35>;
temp_fan_max = <60>;
temp_host_high = <85>;
temp_host_halt = <90>;
temp_host_release_high = <80>;
- adc = <&adc_ddr_soc>;
+ sensor = <&temp_ddr_soc>;
};
+
ambient {
- compatible = "cros-ec,temp-sensor-thermistor",
- "cros-ec,temp-sensor";
- thermistor = <&thermistor_3V3_30K9_47K_4050B>;
- label = "Ambient";
- enum-name = "TEMP_SENSOR_2_AMBIENT";
temp_fan_off = <35>;
temp_fan_max = <60>;
temp_host_high = <85>;
temp_host_halt = <90>;
temp_host_release_high = <80>;
- adc = <&adc_ambient>;
+ sensor = <&temp_ambient>;
};
+
charger {
- compatible = "cros-ec,temp-sensor-thermistor",
- "cros-ec,temp-sensor";
- thermistor = <&thermistor_3V3_30K9_47K_4050B>;
- label = "Charger";
- enum-name = "TEMP_SENSOR_3_CHARGER";
temp_fan_off = <35>;
temp_fan_max = <65>;
temp_host_high = <105>;
temp_host_halt = <120>;
temp_host_release_high = <90>;
- adc = <&adc_charger>;
+ sensor = <&temp_charger>;
};
+
wwan {
- compatible = "cros-ec,temp-sensor-thermistor",
- "cros-ec,temp-sensor";
- thermistor = <&thermistor_3V3_30K9_47K_4050B>;
- label = "WWAN";
- enum-name = "TEMP_SENSOR_4_WWAN";
temp_fan_off = <35>;
temp_fan_max = <60>;
temp_host_high = <130>;
temp_host_halt = <130>;
temp_host_release_high = <100>;
- adc = <&adc_wwan>;
+ sensor = <&temp_wwan>;
};
};
};
diff --git a/zephyr/projects/brya/usbc.dts b/zephyr/projects/brya/usbc.dts
index 181acd837e..1be9ac94ac 100644
--- a/zephyr/projects/brya/usbc.dts
+++ b/zephyr/projects/brya/usbc.dts
@@ -1,10 +1,8 @@
-/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+/* Copyright 2022 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
- #include <dt-bindings/usb_pd_tcpm.h>
-
/ {
usbc {
#address-cells = <1>;
@@ -13,37 +11,17 @@
port0@0 {
compatible = "named-usbc-port";
reg = <0>;
- bc12 {
- compatible = "pericom,pi3usb9201";
- status = "okay";
- irq = <&int_usb_c0_bc12>;
- port = <&c0_c2_bc12>;
- i2c-addr-flags = "PI3USB9201_I2C_ADDR_3_FLAGS";
- };
- tcpc {
- compatible = "nuvoton,nct38xx";
- gpio-dev = <&nct3808_0_P1>;
- port = <&tcpc0_2>;
- i2c-addr-flags = "NCT38XX_I2C_ADDR1_1_FLAGS";
- tcpc-flags = <(
- TCPC_FLAGS_TCPCI_REV2_0 |
- TCPC_FLAGS_NO_DEBUG_ACC_CONTROL)>;
+ bc12 = <&bc12_port0>;
+ tcpc = <&tcpc_port0>;
+ chg = <&charger>;
+ usb-mux-chain-0 {
+ compatible = "cros-ec,usb-mux-chain";
+ usb-muxes = <&usb_c0_bb_retimer
+ &virtual_mux_c0>;
};
- chg {
- compatible = "ti,bq25710";
- status = "okay";
- port = <&i2c_charger>;
- };
- usb-muxes = <&usb_c0_bb_retimer &virtual_mux_c0>;
+ ppc = <&ppc_port0>;
};
port0-muxes {
- usb_c0_bb_retimer: jhl8040r-c0 {
- compatible = "intel,jhl8040r";
- port = <&retimer0_2>;
- i2c-addr-flags = <0x56>;
- int-pin = <&usb_c0_rt_int_odl>;
- reset-pin = <&usb_c0_rt_rst_odl>;
- };
virtual_mux_c0: virtual-mux-c0 {
compatible = "cros-ec,usbc-mux-virtual";
};
@@ -52,24 +30,13 @@
port1@1 {
compatible = "named-usbc-port";
reg = <1>;
- bc12 {
- compatible = "pericom,pi3usb9201";
- status = "okay";
- irq = <&int_usb_c1_bc12>;
- port = <&c1_bc12>;
- i2c-addr-flags = "PI3USB9201_I2C_ADDR_3_FLAGS";
+ bc12 = <&bc12_port1>;
+ tcpc = <&tcpc_port1>;
+ usb-mux-chain-1 {
+ compatible = "cros-ec,usb-mux-chain";
+ usb-muxes = <&virtual_mux_c1 &tcpci_mux_c1>;
};
- tcpc {
- compatible = "parade,ps8xxx";
- port = <&tcpc1>;
- i2c-addr-flags = "PS8XXX_I2C_ADDR1_FLAGS";
- tcpc-flags = <(
- TCPC_FLAGS_TCPCI_REV2_0 |
- TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V |
- TCPC_FLAGS_CONTROL_VCONN |
- TCPC_FLAGS_CONTROL_FRS)>;
- };
- usb-muxes = <&virtual_mux_c1 &tcpci_mux_c1>;
+ ppc = <&ppc_port1>;
};
port1-muxes {
tcpci_mux_c1: tcpci-mux-c1 {
@@ -84,30 +51,16 @@
port2@2 {
compatible = "named-usbc-port";
reg = <2>;
- bc12 {
- compatible = "pericom,pi3usb9201";
- status = "okay";
- irq = <&int_usb_c2_bc12>;
- port = <&c0_c2_bc12>;
- i2c-addr-flags = "PI3USB9201_I2C_ADDR_1_FLAGS";
- };
- tcpc {
- compatible = "nuvoton,nct38xx";
- gpio-dev = <&nct3808_0_P2>;
- port = <&tcpc0_2>;
- i2c-addr-flags = "NCT38XX_I2C_ADDR2_1_FLAGS";
- tcpc-flags = <(TCPC_FLAGS_TCPCI_REV2_0)>;
+ bc12 = <&bc12_port2>;
+ tcpc = <&tcpc_port2>;
+ usb-mux-chain-2 {
+ compatible = "cros-ec,usb-mux-chain";
+ usb-muxes = <&usb_c2_bb_retimer
+ &virtual_mux_c2>;
};
- usb-muxes = <&usb_c2_bb_retimer &virtual_mux_c2>;
+ ppc = <&ppc_port2>;
};
port2-muxes {
- usb_c2_bb_retimer: jhl8040r-c2 {
- compatible = "intel,jhl8040r";
- port = <&retimer0_2>;
- i2c-addr-flags = <0x57>;
- int-pin = <&usb_c2_rt_int_odl>;
- reset-pin = <&usb_c2_rt_rst_odl>;
- };
virtual_mux_c2: virtual-mux-c2 {
compatible = "cros-ec,usbc-mux-virtual";
};