diff options
Diffstat (limited to 'zephyr/shim/chip/mchp/include/system_chip.h')
| -rw-r--r-- | zephyr/shim/chip/mchp/include/system_chip.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/zephyr/shim/chip/mchp/include/system_chip.h b/zephyr/shim/chip/mchp/include/system_chip.h index a62ea4a525..01cd1e7391 100644 --- a/zephyr/shim/chip/mchp/include/system_chip.h +++ b/zephyr/shim/chip/mchp/include/system_chip.h @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -6,18 +6,18 @@ #ifndef __CROS_EC_SYSTEM_CHIP_H_ #define __CROS_EC_SYSTEM_CHIP_H_ -#define SET_BIT(reg, bit) ((reg) |= (0x1 << (bit))) -#define CLEAR_BIT(reg, bit) ((reg) &= (~(0x1 << (bit)))) +#define SET_BIT(reg, bit) ((reg) |= (0x1 << (bit))) +#define CLEAR_BIT(reg, bit) ((reg) &= (~(0x1 << (bit)))) #undef IS_BIT_SET -#define IS_BIT_SET(reg, bit) (((reg) >> (bit)) & (0x1)) +#define IS_BIT_SET(reg, bit) (((reg) >> (bit)) & (0x1)) /******************************************************************************/ /* Optional M4 Registers */ -#define CPU_MPU_CTRL REG32(0xE000ED94) -#define CPU_MPU_RNR REG32(0xE000ED98) -#define CPU_MPU_RBAR REG32(0xE000ED9C) -#define CPU_MPU_RASR REG32(0xE000EDA0) +#define CPU_MPU_CTRL REG32(0xE000ED94) +#define CPU_MPU_RNR REG32(0xE000ED98) +#define CPU_MPU_RBAR REG32(0xE000ED9C) +#define CPU_MPU_RASR REG32(0xE000EDA0) void system_download_from_flash(uint32_t srcAddr, uint32_t dstAddr, uint32_t size, uint32_t exeAddr); |