diff options
Diffstat (limited to 'zephyr/shim/chip/mchp/system_download_from_flash.c')
| -rw-r--r-- | zephyr/shim/chip/mchp/system_download_from_flash.c | 50 |
1 files changed, 24 insertions, 26 deletions
diff --git a/zephyr/shim/chip/mchp/system_download_from_flash.c b/zephyr/shim/chip/mchp/system_download_from_flash.c index 99026fe822..ced7f4d89c 100644 --- a/zephyr/shim/chip/mchp/system_download_from_flash.c +++ b/zephyr/shim/chip/mchp/system_download_from_flash.c @@ -1,4 +1,4 @@ -/* Copyright 2022 The Chromium OS Authors. All rights reserved. +/* Copyright 2022 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ @@ -10,30 +10,28 @@ #include "system_chip.h" /* Modules Map */ -#define WDT_NODE DT_INST(0, microchip_xec_watchdog) -#define STRUCT_WDT_REG_BASE_ADDR \ - ((struct wdt_regs *)(DT_REG_ADDR(WDT_NODE))) +#define WDT_NODE DT_INST(0, microchip_xec_watchdog) +#define STRUCT_WDT_REG_BASE_ADDR ((struct wdt_regs *)(DT_REG_ADDR(WDT_NODE))) -#define PCR_NODE DT_INST(0, microchip_xec_pcr) +#define PCR_NODE DT_INST(0, microchip_xec_pcr) #define STRUCT_PCR_REG_BASE_ADDR \ - ((struct pcr_regs *)DT_REG_ADDR_BY_IDX(PCR_NODE, 0)) + ((struct pcr_regs *)DT_REG_ADDR_BY_IDX(PCR_NODE, 0)) -#define QSPI_NODE DT_INST(0, microchip_xec_qmspi_ldma) +#define QSPI_NODE DT_INST(0, microchip_xec_qmspi_ldma) #define STRUCT_QSPI_REG_BASE_ADDR \ - ((struct qmspi_regs *)(DT_REG_ADDR(QSPI_NODE))) + ((struct qmspi_regs *)(DT_REG_ADDR(QSPI_NODE))) -#define SPI_READ_111 0x03 -#define SPI_READ_111_FAST 0x0b -#define SPI_READ_112_FAST 0x3b +#define SPI_READ_111 0x03 +#define SPI_READ_111_FAST 0x0b +#define SPI_READ_112_FAST 0x3b -#define QSPI_STATUS_DONE \ - (MCHP_QMSPI_STS_DONE | MCHP_QMSPI_STS_DMA_DONE) +#define QSPI_STATUS_DONE (MCHP_QMSPI_STS_DONE | MCHP_QMSPI_STS_DMA_DONE) -#define QSPI_STATUS_ERR \ - (MCHP_QMSPI_STS_TXB_ERR | MCHP_QMSPI_STS_RXB_ERR | \ +#define QSPI_STATUS_ERR \ + (MCHP_QMSPI_STS_TXB_ERR | MCHP_QMSPI_STS_RXB_ERR | \ MCHP_QMSPI_STS_PROG_ERR | MCHP_QMSPI_STS_LDMA_RX_ERR) -noreturn void __keep __attribute__ ((section(".code_in_sram2"))) +noreturn void __keep __attribute__((section(".code_in_sram2"))) __start_qspi(uint32_t resetVectAddr) { struct pcr_regs *pcr = STRUCT_PCR_REG_BASE_ADDR; @@ -79,7 +77,7 @@ uintptr_t __lfw_sram_start = CONFIG_CROS_EC_RAM_BASE + CONFIG_CROS_EC_RAM_SIZE; typedef void (*START_QSPI_IN_SRAM_FP)(uint32_t); void system_download_from_flash(uint32_t srcAddr, uint32_t dstAddr, - uint32_t size, uint32_t resetVectAddr) + uint32_t size, uint32_t resetVectAddr) { struct pcr_regs *pcr = STRUCT_PCR_REG_BASE_ADDR; struct qmspi_regs *qspi = STRUCT_QSPI_REG_BASE_ADDR; @@ -102,16 +100,16 @@ void system_download_from_flash(uint32_t srcAddr, uint32_t dstAddr, qspi->CTRL = BIT(MCHP_QMSPI_C_DESCR_EN_POS); /* Transmit 4 bytes(opcode + 24-bit address) on IO0 */ - qspi->DESCR[0] = (MCHP_QMSPI_C_IFM_1X | MCHP_QMSPI_C_TX_DATA | - MCHP_QMSPI_C_XFR_UNITS_1 | - MCHP_QMSPI_C_XFR_NUNITS(4) | - MCHP_QMSPI_C_NEXT_DESCR(1)); + qspi->DESCR[0] = + (MCHP_QMSPI_C_IFM_1X | MCHP_QMSPI_C_TX_DATA | + MCHP_QMSPI_C_XFR_UNITS_1 | MCHP_QMSPI_C_XFR_NUNITS(4) | + MCHP_QMSPI_C_NEXT_DESCR(1)); /* Transmit 8 clocks with IO0 and IO1 tri-stated */ - qspi->DESCR[1] = (MCHP_QMSPI_C_IFM_2X | MCHP_QMSPI_C_TX_DIS | - MCHP_QMSPI_C_XFR_UNITS_1 | - MCHP_QMSPI_C_XFR_NUNITS(2) | - MCHP_QMSPI_C_NEXT_DESCR(2)); + qspi->DESCR[1] = + (MCHP_QMSPI_C_IFM_2X | MCHP_QMSPI_C_TX_DIS | + MCHP_QMSPI_C_XFR_UNITS_1 | MCHP_QMSPI_C_XFR_NUNITS(2) | + MCHP_QMSPI_C_NEXT_DESCR(2)); /* Read using LDMA RX Chan 0, IFM=2x, Last Descriptor, close */ qspi->DESCR[2] = (MCHP_QMSPI_C_IFM_2X | MCHP_QMSPI_C_TX_DIS | @@ -147,7 +145,7 @@ void system_download_from_flash(uint32_t srcAddr, uint32_t dstAddr, /* Copy the __start_gdma_in_lpram instructions to LPRAM */ for (i = 0; i < &__flash_lplfw_end - &__flash_lplfw_start; i++) { *((uint32_t *)__lfw_sram_start + i) = - *(&__flash_lplfw_start + i); + *(&__flash_lplfw_start + i); } /* Call into SRAM routine to start QSPI */ |