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authorhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2009-12-22 23:54:10 +0000
committerhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2009-12-22 23:54:10 +0000
commit48e9d53a7fc7d655d4ba192c15a6f33ca336455a (patch)
treeae622763f2f1d79b1c0366f60242d7e13f0a6340 /spi.c
parent69bb848f87d91d51cb8bf6890f3c4c34b8a368b9 (diff)
downloadflashrom-48e9d53a7fc7d655d4ba192c15a6f33ca336455a.tar.gz
Add a few FIXME comments to the generic SPI code.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@814 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'spi.c')
-rw-r--r--spi.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/spi.c b/spi.c
index a2b26c5..43dc4bf 100644
--- a/spi.c
+++ b/spi.c
@@ -807,6 +807,7 @@ int spi_write_status_register(int status)
int result;
struct spi_command cmds[] = {
{
+ /* FIXME: WRSR requires either EWSR or WREN depending on chip type. */
.writecnt = JEDEC_EWSR_OUTSIZE,
.writearr = (const unsigned char[]){ JEDEC_EWSR },
.readcnt = 0,
@@ -1059,6 +1060,7 @@ int spi_aai_write(struct flashchip *flash, uint8_t *buf)
fprintf(stderr, "ERASE FAILED!\n");
return -1;
}
+ /* FIXME: This will fail on ICH/VIA SPI. */
result = spi_write_enable();
if (result)
return result;