| Commit message (Collapse) | Author | Age | Files | Lines |
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Constify variables where possible.
Initialize programmer-related variables explicitly in programmer_init to
allow running programmer_init from a clean state after
programmer_shutdown.
Prohibit registering programmer shutdown functions before init or after
shutdown.
Kill some dead code.
Rename global variables with namespace-polluting names.
Use a previously unused locking helper function in sst49lfxxxc.c.
This is needed for libflashrom.
Effects on the binary size of flashrom are minimal (300 bytes
shrinkage), but the data section shrinks by 4384 bytes, and that's a
good thing if flashrom is operating in constrained envionments.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1068 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- Fix a number of typos (found via ispell).
- Use correct vendor names (as per their websites) consistently.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@985 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Fixed suggestions by Carl-Daniel.
Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Remove chipdriver.h include from flash.h
Some of the spi programmer drivers required chipdrivers.h, needs fixing later:
it87spi.c
ichspi.c
sb600spi.c
wbsio_spi.c
buspirate_spi.c
ft2232spi.c
bitbang_spi.c
dediprog.c
Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@914 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Add FEATURE_SHORT_RESET, FEATURE_LONG_RESET, and FEATURE_EITHER_RESET
rewrite jedec functions to use getaddrmask
convert write_49f002 to write_jedec_1
convert write_w39v040c to write_jedec_1
convert probe_w39v040c to probe_jedec
convert write_49lf040 to write_jedec_1
convert write_pm29f002 to write_jedec
convert write_29f040b to write_jedec_1
convert probe_29f040b to probe_jedec
convert erase_chip_29f040b to erase_chip_block_jedec
convert erase_sector_29f040b to erase_sector_jedec
convert write_m29f002b to write_jedec
convert write_m29f002t to write_jedec
convert *_29f002 to *_jedec
decouple unused files from Makefile:
am29f040b.c
en29f002a.c
m29f002.c
mx29f002.c
pm29f002.c
sst49lf040.c
w39v040c.c
w49f002u.c
Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Anders Juel Jensen <andersjjensen@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@886 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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probe_jedec function instead of half a dozen wrappers.
The trick here is to have FEATURE_ADDR_FULL==0 and thus default to
unmasked addresses. That way, we only have to annotate chips which need
small address masks.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@840 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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All functions which just call probe_jedec and then map flash registers
are replaced by probe_jedec. All functions which call probe_jedec, map
flash registers and do something else can at least eliminate mapping
flash registers.
Fix logic inversion in probe_jedec to map flash registers on success
instead of on failure.
Change a few TIMING_IGNORED to TIMING_FIXME where probe_jedec is used.
Total savings: One probe function simplified, three probe functions
eliminated.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Sean Nelson <audiohacked@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@839 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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for many chip provided the only changes are the addresses are converted from
0x5555/0x2AAA to 0x555/0x2AA or similar. The patch mostly changes jedec.c, but
a few other files are changed because they use the jedec functions within
their own functions.
The patch also adds a copyright line to flashchips.c because of my recent work in converting AMD and Atmel chips to use struct erase_block.
Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@828 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Am29F010A/B
Am29F002(N)BB
Am29F002(N)BT
Am29F016D
Am29F040B
Am29F080B
Am29LV040B
Am29LV081B
A29040B
Pm29F002T
Pm29F002B
Change function signature of Am29 erase functions and JEDEC chip erase
to be usable with block_erasers.
Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@812 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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good sign we should have used delays between toggle bit reads. Tell the
user about this. 2^20 loops need roughly a second depending on flash
bus speed. One reason for excessive loops can be a slow operation like
erase.
The Winbond W39V040C requires a 50 ms delay between toggle bit reads
during erase according to the datasheet. Turns out a 2 ms delay is
sufficient. Use a safety factor of 4 and default all erase operations to
8 ms delay between toggle reads. This is short enough not to have a
substantial negative impact on erase times, and should improve
reliability.
This patch addresses the excessive toggle behaviour (observed on some
non-Winbond chips) and the toggle delay requirement (Winbond W39V040C).
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Javier Ortega Conde (aka Malkavian) <malkavian666@gmail.com>
Acked-By: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@807 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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on the value except for delays between single chip_writeb.
If a chip has zero probe_delay, delays between chip_writeb should be
skipped as well.
Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@805 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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in en29f002a.c is reintroduced as write_by_byte_jedec in jedec.c as it
contains no chip-specific instructions. It is not yet used in other
chip drivers, as key addresses (0x2AAA/0x5555) are often specified with
less bits. After crosschecking datasheets, most of the fixmes can
probably be resolved as indicated in them, causing significant code
reduction.
The common JEDEC code for bytewise programming does not program 0xFF at
all.
The chips that had a dedicated bytewise flash function which has been
changed to write_jedec_1 thus changed flashing behaviour and the
"write" test flag has been removed. This applies to:
AMD Am29F002BB/Am29F002NBB
AMD Am29F002BT/Am29F002NBT (TEST_OK_PREW before)
AMIC A29002B
AMIC A29002T (TEST_OK_PREW before)
EON EN29F002(A)(N)B
EON EN29F002(A)(N)T (TEST_OK_PREW before)
Macronix MX29F001B (TEST_OK_PREW before)
Macronix MX29F001T (TEST_OK_PREW before)
Macronix MX29F002B
Macronix MX29F002T (TEST_OK_PREW before)
Macronix MX29LV040
Similar analysis should be performed for the read id stuff.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@785 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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which is not used at all within flashrom code, and renames the
misleadingly named protect_jedec function to start_program_jedec. Calls
to protect_jedec after flashing are removed, because
a) on LPC chips, the command sent by protoct_jedec is not even in the
datasheet and
b) on parallel chips, the block write command issued before already
contained the software protection sequence, so software protection is
definitely enabled.
This patch also removes two clones of protect_jedec
Background: JEDEC Software Data Protection started as an optional
feature, which was disabled on the first single-voltage-flash chips. The
software data protection is the need to prefix a write with a magic
"write enable" command, while without write protection every write
access into the chip's address space modifies flash content. This magic
write enable command also tells the flash chip that the programmer
obviously support sending write-enable commands and turns off the "any
write modifies flash content" mode. There also exist a two-command (6
writes) sequence that disables Software Data Protection completey, which
should only ever be used to prepare updating with a device that can't
handle software data protection.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@783 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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jedec.c error handling used double negation in too many places for no
good reason. Clean up.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@779 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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correct range, essentially rendering the functionality useless. This
patch simplifies the code and fixes the bug.
Thanks to Luke Dashjr for testing.
Mark Winbond W29C040P as supported.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Luke Dashjr <luke_coreboot@dashjr.org>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@757 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@751 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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(unsupported) chip erase.
Annotate SST49LF004B quirks for TBL#.
Add TEST_OK_PRW which is useful when a PREW chip gets a new erase
routine.
Change a few erase function prototypes to use unsigned int instead of
int.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Luc Verhaegen <libv@skynet.be>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@731 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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The __func__ variant is standardized in C99 and recommended to be
used instead of __FUNCTION__ in the gcc info page.
Only _very_ old versions of gcc did not know about __func__, but we've
been using both __func__ and __FUNCTION__ for a long while now, and
nobody complained about this, so all our users seem to use recent
enough compilers.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@711 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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functions. This makes visual inspection and grepping a lot harder than
necessary.
Remove line breaks where appropriate.
Some error messages should end up on stderr instead of just being
displayed in verbose mode.
Thanks to Maciej Pijanka for testing.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@660 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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write_page_write_jedec (jedec.c).
Tested by Urja Rannikko with external flasher.
Tested by Uwe Hermann with onboard flash.
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Urja Rannikko <urjaman@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@632 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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And even when it checks if the erase worked, the result of that check is
often ignored.
Convert all erase functions and actually check return codes
almost everywhere.
Check inside all erase_* routines if erase worked, not outside.
erase_sector_jedec and erase_block_jedec have changed prototypes to
enable erase checking.
Uwe successfully tested LPC on an CK804 box and SPI on some SB600 box.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@595 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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handle the delay on their own if needed.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Urja Rannikko <urjaman@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@578 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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conflicting delay requirements for old and new chips with the same
probing sequence.
Signed-Off-by: Maciej Pijanka <maciej.pijanka@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@569 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Build-tested on 32bit x86.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@521 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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chips in external flashers, they are not accessed via pointers at all.
Benefits:
This allows us to differentiate between volatile machine memory accesses
and flash chip accesses.
It also enforces usage of chip_{read,write}[bwl] to access flash chips,
so nobody will unintentionally use pointers to access chips anymore.
Some unneeded casts are removed as well.
Grepping for chip operations and machine memory operations doesn't yield
any false positives anymore.
Compile tested on 32 bit and 64 bit Linux.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@519 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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The semantic patch I used in r418 to make the original conversion to
accessor functions was missing one isomorphism:
a[b] <=> *(a+b)
The semantic patcher Coccinelle was used to create this patch. Semantic
patch follows:
@@
typedef uint8_t;
expression a;
volatile uint8_t *b;
@@
- b[a]
+ *(b + a)
@@
expression a;
volatile uint8_t *b;
@@
- *(b) = (a);
+ chip_writeb(a, b);
@@
volatile uint8_t *b;
@@
- *(b)
+ chip_readb(b)
@@
type T;
T b;
@@
(
chip_readb
|
chip_writeb
)
(...,
- (T)
- (b)
+ b
)
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@498 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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see IDs in the default flash location. However, sometimes the chip does
not react to the ID command, either because it doesn't understand the
command or because the command never reached it.
One way to detect this is to compare ID output with flash chip contents
for the same location. If they are identical, there is a high chance
you're not actually seeing ID output. Warn the user in that case.
This patch helps a lot when a chip is not recognized and we want to
check if the probe responses are real IDs or just random flash chip
contents.
This should probably be added to all probe functions, but probe_jedec is
called for all sizes and thus flashrom will check this condition at
least once per size, making sure we can cross-match the warning.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: FENG Yu Ning <fengyuning1984@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@494 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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FreeBSD definitions of (read|write)[bwl] collide with our own. Before we
attempt trickery, we can simply rename the accessor functions.
Patch created with the help of Coccinelle.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Idwer Vollering <idwer_v@hotmail.com>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@420 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Use helper functions to access flash chips.
Right now we perform direct pointer manipulation without any abstraction
to read from and write to memory mapped flash chips. That makes it
impossible to drive any flasher which does not mmap the whole chip.
Using helper functions readb() and writeb() allows a driver for external
flash programmers like Paraflasher to replace readb and writeb with
calls to its own chip access routines.
This patch has the additional advantage of removing lots of unnecessary
casts to volatile uint8_t * and now-superfluous parentheses which caused
poor readability.
I used the semantic patcher Coccinelle to create this patch. The
semantic patch follows:
@@
expression a;
typedef uint8_t;
volatile uint8_t *b;
@@
- *(b) = (a);
+ writeb(a, b);
@@
volatile uint8_t *b;
@@
- *(b)
+ readb(b)
@@
type T;
T b;
@@
(
readb
|
writeb
)
(...,
- (T)
- (b)
+ b
)
In contrast to a sed script, the semantic patch performs type checking
before converting anything.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: FENG Yu Ning <fengyuning1984@gmail.com>
Tested-by: Joe Julian
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@418 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Beautify flash chip ID verbose printout a little, always use %02x.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@390 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Increase delay in probe_jedec() after Product ID Entry to 10ms
We should follow data sheet timing, even if chips have been tested to answer
faster in the field.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@273 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Update comment to match delay change in probe_jedec() r3373
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@264 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Increase delay in probe_jedec() to 2ms to reliably detect AT29C020
Run time is increased a few 100ms but this is needed for reliability.
I consider this trivial.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@262 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Check the JEDEC vendor ID for correct parity. Flash chips which can be
detected by JEDEC probe routines all have vendor IDs with correct
parity. Use a parity check as additional hint whether a vendor ID makes
sense.
Note: Device IDs have no parity requirements whatsoever.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@231 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Add continuation ID support to jedec.c
The continuation ID code does not go further than checking for IDs of
the type 0x7fXX, but does this for vendor and product ID. The current
published JEDEC spec has a list where the largest vendor ID is 7 bytes
long, but all leading bytes are 0x7f. The list will grow in the future,
and using a 64bit variable will not be enough anymore.
Besides that, it seems that the location of the ID byte after the first
continuation ID byte is very vendor specific, so we may have to revisit
that code some time in the future.
(Suggestion for a new encoding:
Use a two-byte data type for the ID, the lower byte contains the only
non-0x7f byte, the upper byte contains the number of 0x7f bytes used as
prefix, which is the bank number minus 1 the vendor ID appears in.)
Add support for EON EN29F002AT.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Corey Osgood <corey.osgood@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@171 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Fix ATMEL 29C020 detection with flashrom. The JEDEC probe routine had
a delay of 10 us after entering ID mode and this was insufficient for
the 29C020. The data sheet claims we have to wait 10 ms, but tests have
shown that 20 us suffice. Allow for variations in chip delays with a
factor of 2 safety margin.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@159 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Some cosmetic cleanups in the flashrom code and output.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@151 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Changes to flashrom to support the K8N-NEO3, first tested at Google on GSOC day :-)
Also minor changes to remove tab-space combinations where possible.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Signed-off-by: David Hendricks <david.hendricks@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@144 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Add '(C)' where it's missing (for consistency reasons).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@136 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Change all flashrom license headers to use our standard format.
No changes in content of the files.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@131 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Cosmetic fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@130 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Drop a bunch of useless header files, merge them into flash.h.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@128 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Move code into *.c files, there's no reason to have it in header files.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@127 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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big cosmetic offensive on flashrom. (trivial)
* Give decent names to virt_addr and virt_addr_2
* add some comments
* move virtual addresses to the end of the struct,
so they dont mess up the initializer.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@111 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Fix coding style of flashrom by running indent on all files:
indent -npro -kr -i8 -ts8 -sob -l80 -ss -ncs *.[ch]
Some minor fixups were required, and maybe a few more cosmetic
changeѕ are needed.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@108 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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apply patch from Giampiero Giancipoli <gianci@email.it>:
Fixed write_page_write_jedec() in jedec.c. Added a check-reprogram loop
in the same function, to come around the high page write failure rate on
some boards.
This patch includes the changes suggested by Ron to simplify the control
flow.
It also includes trivial changes by me to make flashrom build on newer
systems (libpci needs libz now). I also made a small type case compile fix
and proper return code handling in one or two places.
Signed-off-by: Giampiero Giancipoli <gianci@email.it>
Signed-off-by: Ronald G Minnich <rminnich@gmail.com>
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@78 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Removing $Id$ tags as they have no meaning in SVN
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@60 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flasrom update from Stefan, resovle issue 21
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@34 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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added -E option for chip erase, remove duplicated code
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@30 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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add retry to write_byte_program_jedec(), 99% success rate
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@29 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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