| Commit message (Collapse) | Author | Age | Files | Lines |
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Tested mainboards:
OK:
- ASRock Fatal1ty 970 Performance and P4i65G
Reported by anonymous email message ID:
932677687262b1300eaf14260999d9262c31@guerrillamail.com
The latter actually had a tested board enable already.
Flash chips:
- Eon EN25Q128 to PREW (+PREW)
Reported by Adrian Graham
- GigaDevice GD25VQ41B to PREW (+PREW)
Reported by David Hendricks
- Winbond W39V040FB to PREW (+EW)
Reported by fjed on IRC
Miscellaneous:
- Change PCI IDs of "MS-6577 (Xenon)" board enable.
The previous IDs contained the on-board display adapter which is
disabled when a dedicated graphics card is installed.
- Add a note to the README how to overcome the clang warning if only a
single programmer is enabled.
- Fix some typo and manpage problems found by lintian
- r1920 introduced some explicit calls to pkg-config instead of $(PKG_CONFIG).
This patch corrects that.
- Make MS-7094 (K8T Neo2-F V2.0) board enable less contestable.
Previous PCI IDs were board-specific but ot the other of devices
that could be disabled by the firmware or that vary among
hardware revions. There are no good alternatives available.
However, since we always have a DMI decoder available now, we can
use non-board-specific devices without taking risks. Thanks to
Uwe Hermann for reporting and testing.
- Some other small changes to clean up whitespace and fix some warnings
from Debian's lintian.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1951 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This came up when I was testing if building on SunOS still works
on the buildbot's instance of OmniOS r151014 which is based on illumos.
The fix is
- to link against libnsl
- a small C type fix in ich_descriptor_tool
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1950 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This patch has been cherry-picked from various patches in the chromiumos
tree denoted below.
Change-Id: I4b679e23ab37a4357b1e3d23f6f65a1c31f7d71a
Change-Id: Ibda56201ab4519315431c08206c61ceffb7c7e65
Change-Id: I540ad2d304dc69a7c79ca154beb744ef947ff808
Servo V2 has two FT4232H parts. The first one (denoted 'legacy') is
dedicated to supporting orginal Servo V1 functionality. The second,
residing at USB ID 0x18d1:5003 provides two other SPI interfaces on
port A and B respectively.
Additional changes by Alexandru Gagniuc, Hatim Kanchwala and Urja Rannikko:
- The clock divisor is set to '6', as this creates a 10MHz SPI clock,
which is the same SPI clock that the chromiumos branch produced.
- Add udev rule for Google servo boards to util/flashrom.rules.
- Add Google servo entry to manpage.
Signed-off-by: Todd Broch <tbroch@chromium.org>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Hatim Kanchwala <hatim@hatimak.me>
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Acked-by: Hatim Kanchwala <hatim@hatimak.me>
Acked-by: Urja Rannikko <urjaman@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1925 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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We do CPU architecture checks once for the makefile in arch.h and
once for HW access abstraction in hwaccess.c. This patch unifies
related files so that they can share the checks to improve
maintainability and reduce the chance of inconsistencies.
Furthermore, it refines some of the definitions, which
- adds "support" for AARCH64 and PPC64,
- adds big-endian handling on arm as well as LE handling on PPC64,
- fixes compilation of internal.c on AARCH64 and PPC64.
Additionally, this patch continues to unify all OS checks in
flashrom by adding a new helper macro IS_WINDOWS.
The old header file for architecture checking is renamed to platform.h
to reflect its broader scope and all new macros are add in there.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1864 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Up to now, when compiling flashrom outside a VCS it would print two
warnings that are not very clear to the user. This patch adds a new
auxilary function to getrevision.sh and uses it in the makefile to print a
single and more meaningful message to the user while hiding the
warnings from getrevision.sh.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1862 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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The Wildcat Point PCH can be paired with Broadwell or Haswell.
This patch was essentially backported from ChromiumOS commit 9bd2af8.
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1845 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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The core of this patch to support Bay Trail originally came from the
Chromiumos flashrom repo and was modified by Sage to support the
Rangeley/Avoton parts as well.
Because that was not complicated enough already Stefan Tauner refactored
and refined everything. Bay Trail seems to be the first Atom SoC able to
support hwseq. No SPI Programming Guide could be obtained so it is
handled similarly to Lynx Point which seems to be its nearest relative.
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Signed-off-by: Martin Roth <gaumless@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Tested-by: Marc Jones <marcj303@gmail.com>
Tested-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Tested-by: Thomas Reardon <thomas_reardon@hotmail.com>
Tested-by: Wen Wang <wen.wang@adiengineering.com>
Acked-By: Marc Jones <marcj303@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1844 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Possible values as well as encodings have changed in newer chipsets as follows.
- Pre-PCH (i.e. ICH) chipsets had a maximum frequency of 33 MHz for all
operations
- Since Cougar Point the chipsets support dual output fast reads (encoded
in bit 30).
- Flash component density encoding has changed from 3 to 4 bits with Lynx
Point, currently allowing for up to 64 MB chips.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1843 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Tested mainboards:
OK:
- abit BX6 2.0
Reported by Stefan Tauner
- Acer EM61SM/EM61PM (used in Acer Aspire T180)
Reported by Benjamin Bellec
- ADLINK Express-HR
Reported by Obermair Thomas
- ASUS M3N-H/HDMI
Reported by Franc Serres
- Attro G5G100-P
Reported by Christoph Grenz
- ASRock 960GM-GS3 FX
Reported by Fuley Istvan
- Elitegroup P6BAP-A+ (V2.2)
Reported by Arnaldo Pirrone
- Elitegroup GeForce7050M-M (V2.0)
Reported by Leif Middelschulte
- Fujitsu D3041-A1 (used in ESPRIMO P2560)
Reported by Daggi Duck
- GIGABYTE GA-8S648
Reported by TeslaBIOS
- GIGABYTE GA-970A-D3P (rev. 1.0)
Reported by Jean-Francois Pirus
- GIGABYTE GA-B85M-D3H
Reported by Mladen Milinković
- GIGABYTE GA-X79-UD3
Reported by Jeff O'Neil
- GIGABYTE GA-X79-UP4 (rev. 1.0)
Reported by George Spelvin
- GIGABYTE GA-Z68MA-D2H-B3 (rev. 1.3)
Reported by Vangelis Skarmoutsos
- GIGABYTE GA-Z87-HD3
Reported by virii5
- Lenovo Tilapia CRB
Reported by jenkins56 on IRC
- MSI GT60-2OD (notebook, only with layout patches)
Reported by Vasiliy Vylegzhanin
- MSI MS-6704 (845PE Max2 PCB 1.0) (Pure Version w/o raid)
Reported by professorll
- MSI MS-7399 1.1 (used in Acer Aspire M5640/M3640)
Reported by Koen Rousseau
- MSI MS-7125 (K8N Neo4(-F/FI/FX))
We had a board enable for that one for years, but it was not (and still is not)
completely clear which boards are covered.
- MSI MS-7522 (MSI X58 Pro-E)
Reported by Gianluigi Tiesi
- PCWARE APM80-D3
Reported by César Augusto Jakoby
- Pegatron IPP7A-CP
Reported by Илья Шипко
- Supermicro H8QME-2
Reported by Greg Tippitt
- Supermicro X7SPA-H
Reported by Kyle Bentley
- Supermicro X7SPE-HF-D525
Reported by Micah Anderson
- Supermicro X8DTE
Reported by Mark Nipper
- Supermicro X8SIL-F
Reported by Peter Samuelson
- ZOTAC IONITX-A (-E) version
Reported by Maciej Wroniecki
NOT OK:
- Supermicro X10SLM-F
Reported by Micah Anderson
Flash chips:
- Atmel AT29C020 to PREW (+PREW)
It was marked like that in the past, but I could not find the reason why the
test bits were reset. Urja Rannikko tested it again and it still works.
- Eon EN25F10 to PREW (+PREW)
Reported by Stolmár Tamás
- Eon EN25QH64 to PR (+PR)
Reported by Vladimir 'φ-coder' Serbinenko
- GigaDevice GD25Q32(B) to PREW (+PREW)
Reported by mrnuke
- Macronix MX25L512(E)/MX25V512(C) to PREW (+PREW)
Reported by Jamie Nichol
- Macronix MX25L2005(C) to PREW (+PREW)
Reported by Давыдов Дмитрий
- Micron/Numonyx/ST N25Q064..1E to PREW (+PREW)
Reported by Paolo Zambotti
- Pmc Pm25LD010(C) to PREW (+PREW)
Reported by Vasile Ceteras
- Micron/Numonyx/ST M25P16 to PREW (+EW)
Reported by raven
- Micron/Numonyx/ST M25PX64 to PREW (+W)
Reported by Zaolin
- SST SST25VF020B to PREW (+PREW)
Reported by Michaël Zweers
- SST SST49LF040 to PREW (+W)
Reported by Oskar Enoksson
- Add support for MX25L3273E (evil twin of MX25L3205 et al.)
Also, add MX25L1673 and MX25L6473E to the names of their twins and
add a note about MX25L8073E.
- Winbond W25X32 to PREW (+REW)
Reported by The Raven
- Winbond W29C010 etc. to PREW (+W)
Reported by san
Chipsets tested OK:
- Intel NM70 (8086:1e5f)
Reported by mrnuke
- Intel C204 (8086:1c54)
Reported by Vasiliy Vylegzhanin
- Intel QM67 (8086:1c4f)
Reported by Obermair Thomas
- Intel HM77 (8086:1e57)
Reported by Vasiliy Vylegzhanin
- Intel B85 (8086:8c50)
Reported by Mladen Milinković
- Intel HM87 (8086:8c4b)
Reported by Vasiliy Vylegzhanin
- Intel Z87 (8086:8c44)
Reported by virii5
- NVIDIA MCP51 (10de:0261)
Reported by Marcin Kościelnicki
- SiS 648 (1039:0648)
Reported by TeslaBIOS
Miscellaneous:
- Mark ARM-USB-TINY-H as tested in ft2232_spi (reported by _nanodev_).
- getrevision.sh: Ignore failing date calls.
- getrevision.sh: Fix -u and -l for older git versions which require = for the
git log grep parameter.
- Corrected K8T Neo2-F entries due to a report from Stelios Tsampas.
- Add "-p internal" to output that requests users to send flashrom -V logs.
- Add Macbook2,1, Thinkpad X230, EasyNote LM85 to laptop whitelist.
- Tiny other stuff.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1783 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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http://www.tiaowiki.com/w/TIAO_USB_Multi_Protocol_Adapter_Lite_User's_Manual
Initial patch from Jadran Puharic <jpuharic@gmail.com>.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1781 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1771 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Make it easier to compile flashrom under NetBSD and DragonFlyBSD:
- Use /usr/pkg/ as prefix for includes and linking
- Use pciutils as include path for the right(tm) libpci
Also, fix date handling in getrevision.sh to work with the various formats for
invoking 'date'. This also uses svn's info --xml output instead of the regular one.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Tested-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1742 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- remove bashism.
- simplify some git-related code.
- improved parameter and error handling.
- additional -d/--date action which is similar to the timestamp action.
- support for an optional path parameter.
- there is only one sane time format.
- and only one sane date format too.
- use UTC dates and times only.
- vastly improve git_url() to print the correct remote url and
"nearest" branch.
- remove username from repository URLs.
- add "-dirty" to local revisions if there are uncommitted changes.
- indicate in local revisions how many git-only commits were done
since branching from upstream svn.
- fix svn_revision() fallback to svn info and remove git-svn.
- print leading r in script instead of hardcode it in the makefile;
no more "0.9.7-runknown".
- make retrieving the upstream revision work even in cloned git-svn
repositories.
- more abstractions and helper functions.
- less fragmentation of actual functionality.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1727 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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(And explicitly require bash.)
Signed-Off-By: Joerg Mayer <jmayer@loplof.de>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1716 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This allows to retrieve various data from SCM systems (git and svn) and
use them in the build process to better indicate which source was used.
For now only use it for the upstream (i.e. svn) revision number, which
was previously implemented by an awful line in the Makefile.
Signed-Off-By: David Hendricks <dhendrix@google.com>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1713 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashchips.c.
This allows to list yet unsupported chips easily.
First it tries to find the directory containing the files, then it uses sed to
extract the macro names of chips from flashchips.h, greps for them in
flashchips.c and prints it if it is not found.
If verbose mode is activated by giving at least one additional parameter
it prints the chip ID and comment following the macro definition too.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1654 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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The user may know better which CFLAGS/CPPFLAGS are appropriate.
Use FLASHROM_CFLAGS for flags which flashrom definitely needs to build.
Thanks to Stefan Tauner for pointing out the flaw in r1574.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1575 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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GNU make has a very interesting quirk: If you set a variable on the
command line, any changes to that variable in the Makefile are ignored
unless marked with the "override" keyword.
Use CFLAGS only for optimization and warning options, and use CPPFLAGS
for the dependency and other preprocessor related options.
That way packagers can specify their own CFLAGS without breaking the
build.
As a side benefit, the ich_descriptors_tool Makefile now behaves exactly
the same whether called standalone or as part of the main Makefile.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1574 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- allows for compilation with -Werror=shadow,
- use extended line limit to fix the most awful line breaks.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1570 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Move Mac OS X IOKit/DirectHW availability checks in the Makefile from
compiler check to pciutils check.
Print the compiler error messages for feature detection.
Add DOS libpci in the Makefile includes only if a PCI-based programmer
was requested.
Restrict mmap usage in ich_descriptors_tool to Unix style systems.
Build ich_descriptors_tool with the correct .exe extension on
DOS/Windows.
Build ich_descriptors_tool by default on x86. (Patch by Stefan Tauner)
Print the Windows version instead of "unknown machine" on Windows.
Don't #define our own __DARWIN__, use the standard OS X detection
method.
Update the README.
Add more generated files to svn:ignore
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1567 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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dump file
This patch adds an external utility that shares most of the existing descriptor
decoding source code. Additionally to what is available via FDOC/FDOD this
allows to access:
- the softstraps which are used to configure the chipset by flash content
without the need for BIOS routines. on ICH8 it is possible to read those
with FDOC/FDOC too, but this was removed in later chipsets.
- the ME VSCC (Vendor Specific Component Capabilities) table. simply put,
this is an SPI chip database used to figure out the flash's capabilities.
- the MAC address stored in the GbE image.
Intel thinks this information should be confidential for ICH9 and up, but
references some tidbits in their public documentation.
This patch includes the human-readable information for ICH8, Ibex Peak
(5 series) and Cougar Point (6 series); the latter two were obtained from
leaked "SPI Flash Programming Guides" found by google. Data regarding ICH9
and 10 is unknown to us yet. It can probably found in:
"Intel® ICH7, ICH8, ICH9 and ICH10 — SPI Family Flash Programming Guide"
Information regarding the upcoming Panther Point chipset is also not included.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Matthias Wenzel <bios@mazzoo.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1480 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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http://www.goepel.com/en/jtagboundary-scan/hardware/picotap.html
This device is actually a JTAG adapter, but since it uses standard
FT2232 A interface pins, it can be easily used as SPI programmer
(tested it here successfully). PicoTAP supports only 5V output, so one
needs to reduce this to 3.3V in a same manner as DLP Design DLP-USB1232H, see
http://flashrom.org/FT2232SPI_Programmer#DLP_Design_DLP-USB1232H
for details.
The PicoTAP pin-out is as follows:
PicoTAP | SPI
---------+-------
TCK | SCLK
TMS | CS#
TDI | SO
TDO | SI
/TRST | -
GND | GND
+5V | VCC, HOLD# & WP# after 3.3V regulator
I managed to run PicoTAP in 10MHz, 15MHz and 30MHz modes (by forcing
DIVIDE_BY), against SST25VF016B SPI flash, read/write/erase all worked
fine (write seems somewhat slow).
Signed-off-by: Samir Ibradžić <sibradzic@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1453 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Thanks to TIAO/DIYGADGET for sponsoring a test device!
This is an FTDI FT2232H based device which provides an easily accessible JTAG,
SPI, I2C, serial breakout. The SPI part can be used to flash SPI flash chips
using flashrom.
http://www.diygadget.com/tiao-usb-multi-protocol-adapter-jtag-spi-i2c-serial.html
http://www.tiaowiki.com/w/TIAO_USB_Multi_Protocol_Adapter_User%27s_Manual#SPI_Connector_1
There are two SPI connectors (pin headers) on the board: SPI1, which is
connected to the FT2232H's A interface, and SPI2, which is connected to the
chip's B interface. Both can be used to flash SPI chips:
flashrom -p ft2232_spi:type=tumpa,port=A
flashrom -p ft2232_spi:type=tumpa,port=B
The default interface is A, so for SPI1 you can also just write:
flashrom -p ft2232_spi:type=tumpa
I tested all operations on both interfaces, everything works fine.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1451 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Add the following missing USB devices:
- FIC OpenMoko Neo1973 Debug board (V2+)
- Olimex ARM-USB-OCD
- Olimex ARM-USB-OCD-H
- Olimex ARM-USB-TINY
- Olimex ARM-USB-TINY-H
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1340 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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this patch combines three previously posted patches in a revised form.
one is even stolen from Stefan Reinauer (remove umlauts from man page).
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Signed-off-by: Stefan Reinauer <reinauer@google.com>
some parts are
Acked-by: Carl-Daniel Hailfinger<c-d.hailfinger.devel.2006@gmx.net>
the rest is
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1317 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This serves as a sort of progress indicator.
The output looks like this::
localhost ~ # FLASHROM="./flashrom" sh flashrom_partial_write_test.sh
testing flashrom binary: ./flashrom
Running test in /tmp/tmp.4xPejwaADU
ffh pattern written in ff_4k.bin
00h pattern written in 00_4k.bin
Reading BIOS image
Original image saved as bios.bin
aligned region 0 test: passed
...
aligned region 15 test: passed
unaligned region 0 test: passed
...
unaligned region 15 test: passed
Result: PASSED
restoring original bios image using system's flashrom
test files remain in /tmp/tmp.4xPejwaADU
Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1222 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Avoid non-portable seq.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Idwer Vollering <vidwer@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1221 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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util/flashrom_partial_write_test.sh to avoid passing in quoted
parameters which can cause problems especially if FLASHROM_PARAM is
empty or contains spaces.
Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1219 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Focus is on partial write and layout functionality.
Minor modifications by Carl-Daniel Hailfinger.
Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1218 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This allows USB-based external programmers to be used by non-root users
(which are in the 'plugdev' group). The file is to be installed by the
distros into the proper place (not sure if this is distro-specific). On
Debian the file will end up in /etc/udev/rules.d/z60_flashrom.rules.
On some systems the 'plugdev' group might have to adapted to whatever
the respective distro uses.
The following devices are listed so far:
- Amontec JTAGkey(2)
- Buspirate
- Dediprog SF100
- DLP Design DLP-USB1232H
- FTDI FT4232H Mini-Module
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1110 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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