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Diffstat (limited to 'FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include')
28 files changed, 6153 insertions, 0 deletions
diff --git a/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/config.h b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/config.h new file mode 100644 index 000000000..b7927eeaf --- /dev/null +++ b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/config.h @@ -0,0 +1,29 @@ +/** + * Copyright (C) 2016 CSI Project. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __CONFIG_H__ +#define __CONFIG_H__ + +#define CONFIG_USART 1 + +#define CONFIG_SYSTEM_SECURE +#define CONFIG_HAVE_VIC +#define CONFIG_SHA_SUPPORT_MUL_THREAD 1 +#define CONFIG_KERNEL_NONE 1 +#define CONFIG_DISABLE_IRQ 1 + +#endif /* __CSI_WIFI_H__ */ + diff --git a/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_aes.h b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_aes.h new file mode 100644 index 000000000..c6fbc0cce --- /dev/null +++ b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_aes.h @@ -0,0 +1,189 @@ +/* + * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/****************************************************************************** + * @file drv_aes.h + * @brief Header File for AES Driver + * @version V1.0 + * @date 02. June 2017 + ******************************************************************************/ +#ifndef _CSI_AES_H_ +#define _CSI_AES_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include <stdint.h> +#include <drv_common.h> +#include <drv_errno.h> + + +/// definition for aes handle. +typedef void *aes_handle_t; + +/****** AES specific error codes *****/ +typedef enum { + AES_ERROR_MODE = (EDRV_SPECIFIC + 1) , ///< Specified Mode not supported + AES_ERROR_DATA_BITS , ///< Specified number of Data bits not supported + AES_ERROR_ENDIAN ///< Specified endian not supported +} drv_aes_error_e; + +/*----- AES Control Codes: Mode -----*/ +typedef enum { + AES_MODE_ECB = 0, ///< ECB Mode + AES_MODE_CBC , ///< CBC Mode + AES_MODE_CFB , ///< CFB Mode + AES_MODE_OFB , ///< OFB Mode + AES_MODE_CTR ///< CTR Mode +} aes_mode_e; + +/*----- AES Control Codes: Crypto Mode -----*/ +typedef enum { + AES_CRYPTO_MODE_ENCRYPT = 0, ///< encrypt Mode + AES_CRYPTO_MODE_DECRYPT , ///< decrypt Mode +} aes_crypto_mode_e; + +/*----- AES Control Codes: Padding Mode -----*/ +typedef enum { + AES_PADDING_MODE_NO = 0, ///< NO-PADDING + AES_PADDING_MODE_ZERO , ///< ZERO-PADDING + AES_PADDING_MODE_PKCS5 ///< PKCS5-PADDING +} aes_padding_mode_e; + +/*----- AES Control Codes: Mode Parameters: Key length -----*/ +typedef enum { + AES_KEY_LEN_BITS_128 = 0, ///< 128 Data bits + AES_KEY_LEN_BITS_192 , ///< 192 Data bits + AES_KEY_LEN_BITS_256 ///< 256 Data bits +} aes_key_len_bits_e; + +/*----- AES Control Codes: Mode Parameters: Endian -----*/ +typedef enum { + AES_ENDIAN_LITTLE = 0, ///< Little Endian + AES_ENDIAN_BIG ///< Big Endian +} aes_endian_mode_e; + +/** +\brief AES Status +*/ +typedef struct { + uint32_t busy : 1; ///< busy flag +} aes_status_t; + +/****** AES Event *****/ +typedef enum { + AES_EVENT_CRYPTO_COMPLETE = 0 ///< Encrypt completed +} aes_event_e; +typedef void (*aes_event_cb_t)(aes_event_e event); ///< Pointer to \ref aes_event_cb_t : AES Event call back. + + +/** +\brief AES Device Driver Capabilities. +*/ +typedef struct { + uint32_t ecb_mode : 1; ///< supports ECB mode + uint32_t cbc_mode : 1; ///< supports CBC mode + uint32_t cfb_mode : 1; ///< supports CFB mode + uint32_t ofb_mode : 1; ///< supports OFB mode + uint32_t ctr_mode : 1; ///< supports CTR mode + uint32_t bits_128 : 1; ///< supports 128bits key length + uint32_t bits_192 : 1; ///< supports 192bits key length + uint32_t bits_256 : 1; ///< supports 256bits key length +} aes_capabilities_t; + + +// Function documentation + +/** + \brief get aes instance count. + \return aes handle count +*/ +int32_t csi_aes_get_instance_count(void); + +/** + \brief Initialize AES Interface. 1. Initializes the resources needed for the AES interface 2.registers event callback function + \param[in] idx must not exceed return value of csi_aes_get_instance_count(). + \param[in] cb_event Pointer to \ref aes_event_cb_t + \return return aes handle if success +*/ +aes_handle_t csi_aes_initialize(int32_t idx, aes_event_cb_t cb_event); + +/** + \brief De-initialize AES Interface. stops operation and releases the software resources used by the interface + \param[in] handle aes handle to operate. + \return error code +*/ +int32_t csi_aes_uninitialize(aes_handle_t handle); + +/** + \brief Get driver capabilities. + \param[in] handle aes handle to operate. + \return \ref aes_capabilities_t +*/ +aes_capabilities_t csi_aes_get_capabilities(aes_handle_t handle); + +/** + \brief config aes mode. + \param[in] handle aes handle to operate. + \param[in] mode \ref aes_mode_e + \param[in] keylen_bits \ref aes_key_len_bits_e + \param[in] endian \ref aes_endian_mode_e + \param[in] arg Pointer to the iv address when mode is cbc_mode + \return error code +*/ +int32_t csi_aes_config(aes_handle_t handle, + aes_mode_e mode, + aes_key_len_bits_e keylen_bits, + aes_endian_mode_e endian, + uint32_t arg + ); + +/** + \brief set crypto key. + \param[in] handle aes handle to operate. + \param[in] context aes information context(NULL when hardware implementation) + \param[in] key Pointer to the key buf + \param[in] key_len Pointer to \ref aes_key_len_bits_e + \param[in] enc \ref aes_crypto_mode_e + \return error code +*/ +int32_t csi_aes_set_key(aes_handle_t handle, void *context, void *key, aes_key_len_bits_e key_len, aes_crypto_mode_e enc); + +/** + \brief encrypt or decrypt + \param[in] handle aes handle to operate. + \param[in] context aes information context(NULL when hardware implementation) + \param[in] in Pointer to the Source data + \param[out] out Pointer to the Result data. + \param[in] len the Source data len. + \param[in] padding \ref aes_padding_mode_e. + \return error code +*/ +int32_t csi_aes_crypto(aes_handle_t handle, void *context, void *in, void *out, uint32_t len, aes_padding_mode_e padding); + +/** + \brief Get AES status. + \param[in] handle aes handle to operate. + \return AES status \ref aes_status_t +*/ +aes_status_t csi_aes_get_status(aes_handle_t handle); + +#ifdef __cplusplus +} +#endif + +#endif /* _CSI_AES_H_ */ diff --git a/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_common.h b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_common.h new file mode 100644 index 000000000..fef26479e --- /dev/null +++ b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_common.h @@ -0,0 +1,47 @@ +/* + * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/****************************************************************************** + * @file drv_common.h + * @brief Header File for Common Driver + * @version V1.0 + * @date 02. June 2017 + ******************************************************************************/ + +#ifndef _DRV_COMMON_H_ +#define _DRV_COMMON_H_ + +#include <stdint.h> +#include <drv_errno.h> +#include "config.h" + +/** pin definition */ +typedef int32_t pin_t; + +/// \details driver handle +typedef void *drv_handle_t; + +/** +\brief General power states +*/ +typedef enum { + DRV_POWER_OFF, ///< Power off: no operation possible + DRV_POWER_LOW, ///< Low Power mode: retain state, detect and signal wake-up events + DRV_POWER_FULL ///< Power on: full operation at maximum performance +} csi_power_stat_e; + +#endif /* _DRV_COMMON_H */ + diff --git a/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_crc.h b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_crc.h new file mode 100644 index 000000000..bde0e9ed1 --- /dev/null +++ b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_crc.h @@ -0,0 +1,150 @@ +/* + * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/****************************************************************************** + * @file drv_crc.h + * @brief Header File for CRC Driver + * @version V1.0 + * @date 02. June 2017 + ******************************************************************************/ +#ifndef _CSI_CRC_H_ +#define _CSI_CRC_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include <stdint.h> +#include <drv_errno.h> +#include <drv_common.h> + + +/****** CRC specific error codes *****/ +#define CRC_ERROR_MODE (EDRV_SPECIFIC + 1) ///< Specified Mode not supported + +/// definition for crc handle. +typedef void *crc_handle_t; + +/*----- CRC Control Codes: Mode -----*/ +typedef enum { + CRC_MODE_CRC8 = 0, ///< Mode CRC8 + CRC_MODE_CRC16 , ///< Mode CRC16 + CRC_MODE_CRC32 ///< Mode CRC32 +} crc_mode_e; + +/*----- CRC Control Codes: Mode Parameters: Key length -----*/ +typedef enum { + CRC_STANDARD_CRC_ROHC = 0, ///< Standard CRC RHOC + CRC_STANDARD_CRC_MAXIM , ///< Standard CRC MAXIAM + CRC_STANDARD_CRC_X25 , ///< Standard CRC X25 + CRC_STANDARD_CRC_CCITT , ///< Standard CRC CCITT + CRC_STANDARD_CRC_USB , ///< Standard CRC USB + CRC_STANDARD_CRC_IBM , ///< Standard CRC IBM + CRC_STANDARD_CRC_MODBUS ///< Standard CRC MODBUS +} crc_standard_crc_e; + +/** +\brief CRC Status +*/ +typedef struct { + uint32_t busy : 1; ///< busy flag +} crc_status_t; + +/****** CRC Event *****/ +typedef enum { + CRC_EVENT_CALCULATE_COMPLETE = 0, ///< Calculate completed +} crc_event_e; + +typedef void (*crc_event_cb_t)(crc_event_e event); ///< Pointer to \ref crc_event_cb_t : CRC Event call back. + +/** +\brief CRC Device Driver Capabilities. +*/ +typedef struct { + uint32_t ROHC : 1; ///< supports ROHC mode + uint32_t MAXIM : 1; ///< supports MAXIM mode + uint32_t X25 : 1; ///< supports X25 mode + uint32_t CCITT : 1; ///< supports CCITT mode + uint32_t USB : 1; ///< supports USB mode + uint32_t IBM : 1; ///< supports IBM mode + uint32_t MODBUS : 1; ///< supports MODBUS mode +} crc_capabilities_t; + +// Function documentation + +/** + \brief get crc handle count. + \return crc handle count +*/ +int32_t csi_crc_get_instance_count(void); + +/** + \brief Initialize CRC Interface. 1. Initializes the resources needed for the CRC interface 2.registers event callback function + \param[in] idx must not exceed return value of csi_crc_get_handle_count() + \param[in] cb_event Pointer to \ref crc_event_cb_t + \return return crc handle if success +*/ +crc_handle_t csi_crc_initialize(int32_t idx, crc_event_cb_t cb_event); + +/** + \brief De-initialize CRC Interface. stops operation and releases the software resources used by the interface + \param[in] handle crc handle to operate. + \return error code +*/ +int32_t csi_crc_uninitialize(crc_handle_t handle); + +/** + \brief Get driver capabilities. + \param[in] handle crc handle to operate. + \return \ref crc_capabilities_t +*/ +crc_capabilities_t csi_crc_get_capabilities(crc_handle_t handle); + +/** + \brief config crc mode. + \param[in] handle crc handle to operate. + \param[in] mode \ref crc_mode_e + \param[in] standard \ref crc_standard_crc_e + \return error code +*/ +int32_t csi_crc_config(crc_handle_t handle, + crc_mode_e mode, + crc_standard_crc_e standard + ); + +/** + \brief calculate crc. + \param[in] handle crc handle to operate. + \param[in] in Pointer to the input data + \param[out] out Pointer to the result. + \param[in] len intpu data len. + \return error code +*/ +int32_t csi_crc_calculate(crc_handle_t handle, const void *in, void *out, uint32_t len); + +/** + \brief Get CRC status. + \param[in] handle crc handle to operate. + \return CRC status \ref crc_status_t +*/ +crc_status_t csi_crc_get_status(crc_handle_t handle); + + +#ifdef __cplusplus +} +#endif + +#endif /* _CSI_CRC_H_ */ diff --git a/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_dmac.h b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_dmac.h new file mode 100644 index 000000000..633e06169 --- /dev/null +++ b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_dmac.h @@ -0,0 +1,171 @@ +/* + * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +/****************************************************************************** + * @file drv_dmac.h + * @brief header file for dmac driver + * @version V1.0 + * @date 02. June 2017 + ******************************************************************************/ +#ifndef _CSI_DMA_H_ +#define _CSI_DMA_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include <stdint.h> +#include <drv_common.h> + +/// definition for dmac handle. +typedef void *dmac_handle_t; + +/** +\brief DMA Driver Capabilities. +*/ +typedef struct { + uint32_t unalign_addr : 1; ///< support for unalign address transfer when memory is source +} dma_capabilities_t; + +typedef enum { + DMA_STATE_FREE = 0, ///< DMA not yet initialized or disabled + DMA_STATE_READY, ///< DMA process success and ready for use, but not start yet + DMA_STATE_BUSY, ///< DMA process is ongoing + DMA_STATE_ERROR, ///< DMA transfer error + DMA_STATE_DONE, ///< DMA transfer done +} dma_status_e; + +/****** DMA specific error codes *****/ +typedef enum { + EDRV_DMA_MODE = (EDRV_SPECIFIC + 1), ///< Specified Mode not supported +} dma_error_e; + +/****** DMA Event *****/ +typedef enum { + DMA_EVENT_TRANSFER_DONE = 0, ///< transfer complete + DMA_EVENT_TRANSFER_ERROR = 1, ///< transfer error +} dma_event_e; + +typedef enum { + DMA_ADDR_INC = 0, + DMA_ADDR_DEC, + DMA_ADDR_CONSTANT +} dma_addr_inc_e; + +typedef enum { + DMA_MEM2MEM = 0, + DMA_MEM2PERH, + DMA_PERH2MEM, + DMA_PERH2PERH, +} dma_trans_type_e; + +typedef struct { + dma_addr_inc_e src_inc; ///< source address increment + dma_addr_inc_e dst_inc; ///< destination address increment + uint8_t src_tw; ///< source transfer width in byte + uint8_t dst_tw; ///< destination transfer width in byte + uint8_t hs_if; ///< a hardware handshaking interface + dma_trans_type_e type; ///< transfer type +} dma_config_t; + +typedef void (*dma_event_cb_t)(dma_event_e event, int32_t ch); ///< Pointer to \ref dma_event_cb_t : CRC Event call back. + +/** + \brief get dma instance count. + \return dma instance count +*/ +int32_t csi_dma_get_instance_count(void); + +/** + \brief Initialize DMA Interface. 1. Initializes the resources needed for the DMA interface 2.registers event callback function + \param[in] idx must not exceed return value of csi_dma_get_instance_count() + \return pointer to dma instances +*/ +dmac_handle_t csi_dma_initialize(int32_t idx); + +/** + \brief De-initialize DMA Interface. stops operation and releases the software resources used by the interface + \param[in] handle damc handle to operate. + \return error code +*/ +int32_t csi_dma_uninitialize(dmac_handle_t handle); +/** + \brief Get driver capabilities. + \param[in] handle damc handle to operate. + \return \ref dma_capabilities_t +*/ +dma_capabilities_t csi_dma_get_capabilities(dmac_handle_t handle); + +/** + \brief get one free dma channel + \param[in] handle damc handle to operate. + \param[in] ch channel num. if -1 then allocate a free channal in this dma + \return -1 - no channel can be used, other - channel index + */ +int32_t csi_dma_alloc_channel(dmac_handle_t handle, int32_t ch); + +/** + \brief release dma channel and related resources + \param[in] handle damc handle to operate. + \param[in] ch channel num. + \return error code + */ +int32_t csi_dma_release_channel(dmac_handle_t handle, int32_t ch); + +/** + \brief + \param[in] handle damc handle to operate. + \param[in] ch channel num. if -1 then allocate a free channal in this dma + \param[in] psrcaddr dma transfer source address + \param[in] pstdaddr dma transfer source address + \param[in] length dma transfer length + \param[in] config dma transfer configure + \param[in] cb_event Pointer to \ref dma_event_cb_t + \return error code + */ +int32_t csi_dma_config(dmac_handle_t handle, int32_t ch, + void *psrcaddr, void *pstdaddr, + uint32_t length, dma_config_t *config, dma_event_cb_t cb_event); + +/** + \brief start generate dma signal. + \param[in] handle damc handle to operate. + \param[in] ch channel num. + \return error code +*/ +int32_t csi_dma_start(dmac_handle_t handle, int32_t ch); + +/** + \brief Stop generate dma signal. + \param[in] handle damc handle to operate. + \param[in] ch channel num. + \return error code +*/ +int32_t csi_dma_stop(dmac_handle_t handle, int32_t ch); + +/** + \brief Get DMA status. + \param[in] handle damc handle to operate. + \param[in] ch channel num. + \return DMA status \ref dma_status_e +*/ +dma_status_e csi_dma_get_status(dmac_handle_t handle, int32_t ch); + +#ifdef __cplusplus +} +#endif + +#endif /* _CSI_DMA_H_ */ + diff --git a/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_eflash.h b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_eflash.h new file mode 100644 index 000000000..031a04e1c --- /dev/null +++ b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_eflash.h @@ -0,0 +1,157 @@ +/* + * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +/****************************************************************************** + * @file drv_eflash.h + * @brief header file for eflash driver + * @version V1.0 + * @date 02. June 2017 + ******************************************************************************/ +#ifndef _CSI_EFLASH_H_ +#define _CSI_EFLASH_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include <stdint.h> +#include <drv_common.h> + + +/// definition for eflash handle. +typedef void *eflash_handle_t; + +/** +\brief Flash information +*/ +typedef struct { + uint32_t start; ///< Chip Start address + uint32_t end; ///< Chip End address (start+size-1) + uint32_t sector_count; ///< Number of sectors + uint32_t sector_size; ///< Uniform sector size in bytes (0=sector_info used) + uint32_t page_size; ///< Optimal programming page size in bytes + uint32_t program_unit; ///< Smallest programmable unit in bytes + uint8_t erased_value; ///< Contents of erased memory (usually 0xFF) +} eflash_info_t; + +/** +\brief Flash Status +*/ +typedef struct { + uint32_t busy : 1; ///< Flash busy flag + uint32_t error : 1; ///< Read/Program/Erase error flag (cleared on start of next operation) +} eflash_status_t; + +/****** EFLASH Event *****/ +typedef enum { + EFLASH_EVENT_READY = 0, ///< Flash Ready + EFLASH_EVENT_ERROR , ///< Read/Program/Erase Error +} eflash_event_e; + +typedef void (*eflash_event_cb_t)(eflash_event_e event); ///< Pointer to \ref eflash_event_cb_t : EFLASH Event call back. + +/** +\brief Flash Driver Capabilities. +*/ +typedef struct { + uint32_t event_ready : 1; ///< Signal Flash Ready event + uint32_t data_width : 2; ///< Data width: 0=8-bit, 1=16-bit, 2=32-bit + uint32_t erase_chip : 1; ///< Supports EraseChip operation +} eflash_capabilities_t; + +// Function documentation + +/** + \brief get eflash handle count. + \return eflash handle count +*/ +int32_t csi_eflash_get_instance_count(void); + +/** + \brief Initialize EFLASH Interface. 1. Initializes the resources needed for the EFLASH interface 2.registers event callback function + \param[in] idx must not exceed return value of csi_eflash_get_instance_count() + \param[in] cb_event Pointer to \ref eflash_event_cb_t + \return pointer to eflash handle +*/ +eflash_handle_t csi_eflash_initialize(int32_t idx, eflash_event_cb_t cb_event); + +/** + \brief De-initialize EFLASH Interface. stops operation and releases the software resources used by the interface + \param[in] handle eflash handle to operate. + \return error code +*/ +int32_t csi_eflash_uninitialize(eflash_handle_t handle); + +/** + \brief Get driver capabilities. + \param[in] handle eflash handle to operate. + \return \ref eflash_capabilities_t +*/ +eflash_capabilities_t csi_eflash_get_capabilities(eflash_handle_t handle); + +/** + \brief Read data from Flash. + \param[in] handle eflash handle to operate. + \param[in] addr Data address. + \param[out] data Pointer to a buffer storing the data read from Flash. + \param[in] cnt Number of data items to read. + \return number of data items read or error code +*/ +int32_t csi_eflash_read(eflash_handle_t handle, uint32_t addr, void *data, uint32_t cnt); + +/** + \brief Program data to Flash. + \param[in] handle eflash handle to operate. + \param[in] addr Data address. + \param[in] data Pointer to a buffer containing the data to be programmed to Flash.. + \param[in] cnt Number of data items to program. + \return number of data items programmed or error code +*/ +int32_t csi_eflash_program(eflash_handle_t handle, uint32_t addr, const void *data, uint32_t cnt); + +/** + \brief Erase Flash Sector. + \param[in] handle eflash handle to operate. + \param[in] addr Sector address + \return error code +*/ +int32_t csi_eflash_erase_sector(eflash_handle_t handle, uint32_t addr); + +/** + \brief Erase complete Flash. + \param[in] handle eflash handle to operate. + \return error code +*/ +int32_t csi_eflash_erase_chip(eflash_handle_t handle); + +/** + \brief Get Flash information. + \param[in] handle eflash handle to operate. + \return Pointer to Flash information \ref eflash_info +*/ +eflash_info_t *csi_eflash_get_info(eflash_handle_t handle); + +/** + \brief Get EFLASH status. + \param[in] handle eflash handle to operate. + \return EFLASH status \ref eflash_status_t +*/ +eflash_status_t csi_eflash_get_status(eflash_handle_t handle); + +#ifdef __cplusplus +} +#endif + +#endif /* _CSI_EFLASH_H_ */ diff --git a/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_errno.h b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_errno.h new file mode 100644 index 000000000..fdc206d2c --- /dev/null +++ b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_errno.h @@ -0,0 +1,121 @@ +/* + * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +/****************************************************************************** + * @file drv_errno.h + * @brief header file for error num + * @version V1.0 + * @date 02. June 2017 + ******************************************************************************/ + +/****************************************************************************** + * @file + * @details Error code field difination + * Error number is devided into 4 field: + * 0x8******* : 8 : means < 0 + * 0x*A****** : A : means type number: bsp(1), driver(2), hal(3), app(4)... + * 0x**AB**** : AB : means module number: timer(1), rtc(2), .... + * 0x****AB** : AB : means API number: module API's definition + * 0x******AB : AB : means sub error number + * 0 ~ 0x80 is common error such as EPERM, refer to errno.h + * 0x80 ~ 0xFF is specific error, can difine in module + * + * For example 0x81020113 means: + * 1. 0x8*******: value < 0, means error happened + * 2. 0x*1******: type number is 1, means bsp error + * 3. 0x**02****: module number is 02, means RTC error + * 4. 0x****01**: module API is 01, means RTC's init + * 5. 0x******13: specific error is 0x13=19=ENODEV, means no such device + * + * For special bsp module example, you can return: + * (BSP_ERRNO_TIMER_BASE | BSP_API_RTC_INIT | EPERM) for rtc init error + * (BSP_ERRNO_TIMER_BASE | BSP_API_RTC_SETTIME | ENXIO) for rtc settime error + * + * Here list the common sub error number (0x******AB) below(0~127 defined in errno.h as standard err code): + * Code Hex Deci Meaning + * ------------------------------------------------------- + * EPERM 0x01 1 Operation not permitted + * EIO 0x05 5 I/O error + * ENXIO 0x06 6 No such device or address + * ENOMEM 0x0C 12 Out of memory + * EACCES 0x0D 13 Permission denied + * EINVAL 0x16 22 Invalid argument + * ... + * SPEC_ERR_BASE 0x80 128 module special error number base + * ... + * ERRNO_MAX 0xFF -- Max sub error number + ******************************************************************************/ + +#ifndef _DRV_ERRNO_H_ +#define _DRV_ERRNO_H_ + + +#include <errno.h> + +#define ERRNO_DRV_START 0X80 + +/* drvier General return codes */ +typedef enum { + EDRV = ERRNO_DRV_START, ///< Unspecified error + EDRV_BUSY, ///< Driver is busy + EDRV_TIMEOUT, ///< Timeout occurred + EDRV_UNSUPPORTED, ///< Operation not supported + EDRV_PARAMETER, ///< Parameter error + EDRV_SPECIFIC ///< Start of driver specific errors +} drv_common_err_e; + + +/** Get error type */ +#define GET_ERROR_TYPE(errno) \ + (error & 0xFF000000 >> 24) +/** Get error module */ +#define GET_ERROR_MODULE(error) \ + (error & 0x00FF0000 >> 16) +/** Get error API */ +#define GET_ERROR_API(error) \ + (error & 0x0000FF00 >> 8) +/** Get errno */ +#define GET_ERROR_NUM(error) \ + (error & 0x000000FF) + +#ifndef CSI_DRV_ERRNO_BASE +/** means bsp errors */ +#define CSI_DRV_ERRNO_BASE 0x81000000 +#endif + +/** driver module id definition*/ +#define CSI_DRV_ERRNO_GPIO_BASE 0x81010000 +#define CSI_DRV_ERRNO_USART_BASE 0x81020000 +#define CSI_DRV_ERRNO_SPI_BASE 0x81030000 +#define CSI_DRV_ERRNO_I2C_BASE 0x81040000 +#define CSI_DRV_ERRNO_FLASH_BASE 0x81050000 +#define CSI_DRV_ERRNO_PWM_BASE 0x81060000 +#define CSI_DRV_ERRNO_RTC_BASE 0x81070000 +#define CSI_DRV_ERRNO_TIMER_BASE 0x81080000 +#define CSI_DRV_ERRNO_WDT_BASE 0x81090000 +#define CSI_DRV_ERRNO_AES_BASE 0x810A0000 +#define CSI_DRV_ERRNO_CRC_BASE 0x810B0000 +#define CSI_DRV_ERRNO_RSA_BASE 0x810C0000 +#define CSI_DRV_ERRNO_SHA_BASE 0x810D0000 +#define CSI_DRV_ERRNO_TRNG_BASE 0x810E0000 +#define CSI_DRV_ERRNO_EFLASH_BASE 0x810F0000 +#define CSI_DRV_ERRNO_DMA_BASE 0x81100000 +#define CSI_DRV_ERRNO_NORFLASH_BASE 0x81110000 +#define CSI_DRV_ERRNO_INTC_BASE 0x81120000 +#define CSI_DRV_ERRNO_SPU_BASE 0x81110000 +#define CSI_DRV_ERRNO_TEE_BASE 0x81130000 +#define CSI_DRV_ERRNO_PMU_BASE 0x81140000 + +#endif /* CSI_DRV_ERRNO_H */ diff --git a/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_eth.h b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_eth.h new file mode 100644 index 000000000..6ab39f9c1 --- /dev/null +++ b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_eth.h @@ -0,0 +1,105 @@ +/** + * Copyright (C) 2016 CSI Project. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + + +#ifndef _CSI_NET_H_ +#define _CSI_NET_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define CSI_ETH_VERSION_MAJOR_MINOR(major,minor) (((major) << 8) | (minor)) + +/** +\brief Driver Version +*/ +typedef struct csi_driver_version { + uint16_t api; ///< API version + uint16_t drv; ///< Driver version +} csi_drv_version_t; + +/* General return codes */ +#define CSI_ETH_OK 0 ///< Operation succeeded +#define CSI_ETH_ERROR CSI_DRV_ERRNO_ETH_BASE+1 ///< Unspecified error +#define CSI_ETH_ERROR_BUSY CSI_DRV_ERRNO_ETH_BASE+2 ///< Driver is busy +#define CSI_ETH_ERROR_TIMEOUT CSI_DRV_ERRNO_ETH_BASE+3 ///< Timeout occurred +#define CSI_ETH_ERROR_UNSUPPORTED CSI_DRV_ERRNO_ETH_BASE+4 ///< Operation not supported +#define CSI_ETH_ERROR_PARAMETER CSI_DRV_ERRNO_ETH_BASE+5 ///< Parameter error +#define CSI_ETH_ERROR_SPECIFIC CSI_DRV_ERRNO_ETH_BASE+6 ///< Start of driver specific errors + +/** +\brief General power states +*/ +typedef enum eth_power_state { + CSI_ETH_POWER_OFF, ///< Power off: no operation possible + CSI_ETH_POWER_LOW, ///< Low Power mode: retain state, detect and signal wake-up events + CSI_ETH_POWER_FULL ///< Power on: full operation at maximum performance +} eth_power_state_t; + +/** +\brief Ethernet Media Interface type +*/ +#define CSI_ETH_INTERFACE_MII (0) ///< Media Independent Interface (MII) +#define CSI_ETH_INTERFACE_RMII (1) ///< Reduced Media Independent Interface (RMII) +#define CSI_ETH_INTERFACE_SMII (2) ///< Serial Media Independent Interface (SMII) + +/** +\brief Ethernet link speed +*/ +#define CSI_ETH_SPEED_10M (0) ///< 10 Mbps link speed +#define CSI_ETH_SPEED_100M (1) ///< 100 Mbps link speed +#define CSI_ETH_SPEED_1G (2) ///< 1 Gpbs link speed + +/** +\brief Ethernet duplex mode +*/ +#define CSI_ETH_DUPLEX_HALF (0) ///< Half duplex link +#define CSI_ETH_DUPLEX_FULL (1) ///< Full duplex link + +/** +\brief Ethernet link state +*/ +typedef enum eth_link_state { + ETH_LINK_DOWN, ///< Link is down + ETH_LINK_UP ///< Link is up +} eth_link_state_t; + +/** +\brief Ethernet link information +*/ +typedef volatile struct eth_link_info { + uint32_t speed : 2; ///< Link speed: 0= 10 MBit, 1= 100 MBit, 2= 1 GBit + uint32_t duplex : 1; ///< Duplex mode: 0= Half, 1= Full + uint32_t Autonegotiation : 1; ///< Set the interface to Auto Negotiation mode of transmission parameters + uint32_t Loopback : 1; ///< Set the interface into a Loop-back test mode + uint32_t Isolation : 1; ///< Set to indicate electrical isolation of PHY interface from MII/RMII interface + uint32_t reserved : 26; +} eth_link_info_t; + +/** +\brief Ethernet MAC Address +*/ +typedef struct eth_mac_addr { + uint8_t b[6]; ///< MAC Address (6 bytes), MSB first +} eth_mac_addr_t; + +#ifdef __cplusplus +} +#endif + +#endif /* CSI_NET_H_ */ + diff --git a/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_eth_mac.h b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_eth_mac.h new file mode 100644 index 000000000..f3bda90fb --- /dev/null +++ b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_eth_mac.h @@ -0,0 +1,422 @@ +/** + * Copyright (C) 2016 CSI Project. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef _CSI_ETH_H_ +#define _CSI_ETH_H_ + +#include "drv_eth.h" + +#ifdef __cplusplus +extern "C" { +#endif + +typedef void *eth_mac_handle_t; + +#define MAX_FRAMELEN 1518 /* (note: maximum ethernet frame length would be 1518) */ + +#define CSI_ETH_MAC_API_VERSION CSI_DRIVER_VERSION_MAJOR_MINOR(2,1) /* API version */ + +#define _CSI_Driver_ETH_MAC_(n) Driver_ETH_MAC##n +#define CSI_Driver_ETH_MAC_(n) _CSI_Driver_ETH_MAC_(n) + +/****** Ethernet MAC Control Codes *****/ + +#define CSI_ETH_MAC_CONFIGURE (0x01) ///< Configure MAC; arg = configuration +#define CSI_ETH_MAC_CONTROL_TX (0x02) ///< Transmitter; arg: 0=disabled (default), 1=enabled +#define CSI_ETH_MAC_CONTROL_RX (0x03) ///< Receiver; arg: 0=disabled (default), 1=enabled +#define CSI_ETH_MAC_FLUSH (0x04) ///< Flush buffer; arg = CSI_ETH_MAC_FLUSH_... +#define CSI_ETH_MAC_SLEEP (0x05) ///< Sleep mode; arg: 1=enter and wait for Magic packet, 0=exit +#define CSI_ETH_MAC_VLAN_FILTER (0x06) ///< VLAN Filter for received frames; arg15..0: VLAN Tag; arg16: optional CSI_ETH_MAC_VLAN_FILTER_ID_ONLY; 0=disabled (default) + +/*----- Ethernet MAC Configuration -----*/ +#define CSI_ETH_MAC_SPEED_Pos 0 +#define CSI_ETH_MAC_SPEED_Msk (3UL << CSI_ETH_MAC_SPEED_Pos) +#define CSI_ETH_MAC_SPEED_10M (CSI_ETH_SPEED_10M << CSI_ETH_MAC_SPEED_Pos) ///< 10 Mbps link speed +#define CSI_ETH_MAC_SPEED_100M (CSI_ETH_SPEED_100M << CSI_ETH_MAC_SPEED_Pos) ///< 100 Mbps link speed +#define CSI_ETH_MAC_SPEED_1G (CSI_ETH_SPEED_1G << CSI_ETH_MAC_SPEED_Pos) ///< 1 Gpbs link speed +#define CSI_ETH_MAC_DUPLEX_Pos 2 +#define CSI_ETH_MAC_DUPLEX_Msk (1UL << CSI_ETH_MAC_DUPLEX_Pos) +#define CSI_ETH_MAC_DUPLEX_HALF (CSI_ETH_DUPLEX_HALF << CSI_ETH_MAC_DUPLEX_Pos) ///< Half duplex link +#define CSI_ETH_MAC_DUPLEX_FULL (CSI_ETH_DUPLEX_FULL << CSI_ETH_MAC_DUPLEX_Pos) ///< Full duplex link +#define CSI_ETH_MAC_LOOPBACK (1UL << 4) ///< Loop-back test mode +#define CSI_ETH_MAC_CHECKSUM_OFFLOAD_RX (1UL << 5) ///< Receiver Checksum offload +#define CSI_ETH_MAC_CHECKSUM_OFFLOAD_TX (1UL << 6) ///< Transmitter Checksum offload +#define CSI_ETH_MAC_ADDRESS_BROADCAST (1UL << 7) ///< Accept frames with Broadcast address +#define CSI_ETH_MAC_ADDRESS_MULTICAST (1UL << 8) ///< Accept frames with any Multicast address +#define CSI_ETH_MAC_ADDRESS_ALL (1UL << 9) ///< Accept frames with any address (Promiscuous Mode) + +/*----- Ethernet MAC Flush Flags -----*/ +#define CSI_ETH_MAC_FLUSH_RX (1UL << 0) ///< Flush Receive buffer +#define CSI_ETH_MAC_FLUSH_TX (1UL << 1) ///< Flush Transmit buffer + +/*----- Ethernet MAC VLAN Filter Flag -----*/ +#define CSI_ETH_MAC_VLAN_FILTER_ID_ONLY (1UL << 16) ///< Compare only the VLAN Identifier (12-bit) + + +/****** Ethernet MAC Frame Transmit Flags *****/ +#define CSI_ETH_MAC_TX_FRAME_FRAGMENT (1UL << 0) ///< Indicate frame fragment +#define CSI_ETH_MAC_TX_FRAME_EVENT (1UL << 1) ///< Generate event when frame is transmitted +#define CSI_ETH_MAC_TX_FRAME_TIMESTAMP (1UL << 2) ///< Capture frame time stamp + + +/****** Ethernet MAC Timer Control Codes *****/ +#define CSI_ETH_MAC_TIMER_GET_TIME (0x01) ///< Get current time +#define CSI_ETH_MAC_TIMER_SET_TIME (0x02) ///< Set new time +#define CSI_ETH_MAC_TIMER_INC_TIME (0x03) ///< Increment current time +#define CSI_ETH_MAC_TIMER_DEC_TIME (0x04) ///< Decrement current time +#define CSI_ETH_MAC_TIMER_SET_ALCSI (0x05) ///< Set alarm time +#define CSI_ETH_MAC_TIMER_ADJUST_CLOCK (0x06) ///< Adjust clock frequency; time->ns: correction factor * 2^31 + + +/** +\brief Ethernet MAC Time +*/ +typedef struct eth_mac_time { + uint32_t ns; ///< Nano seconds + uint32_t sec; ///< Seconds +} eth_mac_time_t; + + +/****** Ethernet MAC Event *****/ +#define CSI_ETH_MAC_EVENT_RX_FRAME (1UL << 0) ///< Frame Received +#define CSI_ETH_MAC_EVENT_TX_FRAME (1UL << 1) ///< Frame Transmitted +#define CSI_ETH_MAC_EVENT_WAKEUP (1UL << 2) ///< Wake-up (on Magic Packet) +#define CSI_ETH_MAC_EVENT_TIMER_ALCSI (1UL << 3) ///< Timer Alarm +#define CSI_ETH_MAC_EVENT_LINK_CHANGE (1UL << 4) ///< Link state + +typedef void (*eth_event_cb_t)(eth_mac_handle_t handle, uint32_t event); ///< Pointer to \ref eth_event_cb_t : Signal Ethernet Event. + +typedef enum +{ + FRAME_FILTER_RULE_POSITIVE_MATCHING = 0, /*!< Specifies that a filter should match a given pattern */ + FRAME_FILTER_RULE_NEGATIVE_MATCHING = 1, /*!< Specifies that a filter should NOT match a given pattern */ +} frame_filter_rule_t; + +/** +\brief Ethernet MAC Capabilities +*/ +typedef struct eth_capabilities { + uint32_t checksum_offload_rx_ip4 : 1; ///< 1 = IPv4 header checksum verified on receive + uint32_t checksum_offload_rx_ip6 : 1; ///< 1 = IPv6 checksum verification supported on receive + uint32_t checksum_offload_rx_udp : 1; ///< 1 = UDP payload checksum verified on receive + uint32_t checksum_offload_rx_tcp : 1; ///< 1 = TCP payload checksum verified on receive + uint32_t checksum_offload_rx_icmp : 1; ///< 1 = ICMP payload checksum verified on receive + uint32_t checksum_offload_tx_ip4 : 1; ///< 1 = IPv4 header checksum generated on transmit + uint32_t checksum_offload_tx_ip6 : 1; ///< 1 = IPv6 checksum generation supported on transmit + uint32_t checksum_offload_tx_udp : 1; ///< 1 = UDP payload checksum generated on transmit + uint32_t checksum_offload_tx_tcp : 1; ///< 1 = TCP payload checksum generated on transmit + uint32_t checksum_offload_tx_icmp : 1; ///< 1 = ICMP payload checksum generated on transmit + uint32_t media_interface : 2; ///< Ethernet Media Interface type + uint32_t mac_address : 1; ///< 1 = driver provides initial valid MAC address + uint32_t event_rx_frame : 1; ///< 1 = callback event generated + uint32_t event_tx_frame : 1; ///< 1 = callback event generated + uint32_t event_wakeup : 1; ///< 1 = wakeup event generated + uint32_t precision_timer : 1; ///< 1 = Precision Timer supported + uint32_t reserved : 15; ///< Reserved (must be zero) +} eth_capabilities_t; + +#if 0 +/** +\brief Ethernet Frame filter +*/ +typedef struct eth_frame_filter { + struct { + uint32_t and_or : 1; ///< 1 = AND: Packets will be rejected unless all enabled filters accept the packet; 0 = OR: Packets will be accepted unless all enabled filters reject the packet + uint32_t unicast_en : 1; ///< 1 = Packets with a destination address matching the local MAC address will be accepted + uint32_t multicast_en : 1; ///< 1 = Packets which have the Least Significant bit set in the destination address will be accepted + uint32_t broadcast_en : 1; ///< 1 = Packets which have a destination address of FF-FF-FF-FF-FF-FF will be accepted + uint32_t crc_en : 1; ///< 1 = All packets with an invalid CRC will be discarded + uint32_t patten_match_en : 1; ///< 1 = Packets which meet the Pattern Match criteria will be accepted + uint32_t magic_packet_en : 1; ///< 1 = Magic Packets for the local MAC address will be accepted + uint32_t hash_table_en : 1; ///< 1 = Packets which meet the Hash Table criteria will be accepted + } sum; ///< summary + uint32_t patten_match; ///< patten match filter + uint32_t magic_packet; ///< patten match filter + uint32_t hash_table; ///< hash table filter +} eth_frame_filter_t; +#else +/** + * Structure describing a frame filter list item + */ +typedef struct +{ + uint32_t id; /*!< Unique identifier for a packet filter item */ + frame_filter_rule_t rule; /*!< Filter matches are either POSITIVE or NEGATIVE matching */ + uint16_t offset; /*!< Offset in bytes to start filtering (referenced to the start of the ethernet packet) */ + uint16_t mask_size; /*!< Size of the mask in bytes */ + uint8_t* mask; /*!< Pattern mask bytes to be ANDed with the pattern eg. "\xff00" (must be in network byte order) */ + uint8_t* pattern; /*!< Pattern bytes used to filter eg. "\x0800" (must be in network byte order) */ + bool enabled_status; /*!< When returned from mhd_get_packet_filters, indicates if the filter is enabled */ +} eth_frame_filter_t; + +struct eth_frame_filter_list +{ + struct eth_frame_filter_list* next; +}; +typedef struct eth_frame_filter_list eth_frame_filter_list_t; +#endif + +typedef struct { + eth_event_cb_t cb_event; + eth_capabilities_t capabilities; +}eth_mac_priv_t; + +/** + \brief Get driver version. + \param[in] handle ethernet handle + \return ethernet version including chip version and driver version +*/ +csi_drv_version_t csi_eth_mac_get_version(eth_mac_handle_t handle); + +/** + \brief Get driver capabilities. + \param[in] handle ethernet handle + \return ethernet capabilities +*/ +eth_capabilities_t csi_eth_mac_get_capabilities(eth_mac_handle_t handle); + +/** + \brief This function is used to initialize Ethernet device and related resource, an event callback is registered. It is called when the middleware component like TCPIP starts operation. + \param[in] cb callback to handle ethernet event + \return return ethernet handle if success + */ +eth_mac_handle_t csi_eth_mac_initialize(eth_event_cb_t cb); + +/** + \brief This function is used to de-initialize Ethernet device. It is called when the middleware component stops operation and releases the software resources used by the interface. + \param[in] handle ethernet handle + \return error code + */ +int32_t csi_eth_mac_uninitialize(eth_mac_handle_t handle); + +/** + \brief Control Ethernet MAC Device Power. + \param[in] handle ethernet handle + \param[in] state Power state + \return error code +*/ +int32_t csi_eth_mac_power_control(eth_mac_handle_t handle, eth_power_state_t state); + +/** + \brief Get Ethernet MAC Address. + \param[in] handle ethernet handle + \param[in] mac Pointer to address + \return error code +*/ +int32_t csi_eth_mac_get_macaddr(eth_mac_handle_t handle, eth_mac_addr_t *mac); + +/** + \brief Set Ethernet MAC Address. + \param[in] handle ethernet handle + \param[in] mac Pointer to address + \return error code +*/ +int32_t csi_eth_mac_set_macaddr(eth_mac_handle_t handle, const eth_mac_addr_t *mac); + +/** + \brief Configure Address Filter. + \param[in] handle ethernet handle + \param[in] addr Pointer to addresses + \param[in] num_addr Number of addresses to configure + \return error code +*/ +int32_t csi_eth_mac_set_addrfilter(eth_mac_handle_t handle, const eth_mac_addr_t *addr, uint32_t num_addr); + +/** + \brief Send Ethernet frame. + \param[in] handle ethernet handle + \param[in] frame Pointer to frame buffer with data to send + \param[in] len Frame buffer length in bytes + \param[in] flags Frame transmit flags (see CSI_ETH_MAC_TX_FRAME_...) + \return error code +*/ +int32_t csi_eth_mac_send_frame(eth_mac_handle_t handle, const uint8_t *frame, uint32_t len, uint32_t flags); + +/** + \brief Read data of received Ethernet frame. + \param[in] handle ethernet handle + \param[in] frame Pointer to frame buffer for data to read into + \param[in] len Frame buffer length in bytes + \return number of data bytes read or execution status + - value >= 0: number of data bytes read + - value < 0: error occurred, value is execution status as defined with execution_status +*/ +int32_t csi_eth_mac_read_frame(eth_mac_handle_t handle, uint8_t *frame, uint32_t len); + +/** + \brief Get size of received Ethernet frame. + \param[in] handle ethernet handle + \return number of bytes in received frame +*/ +int32_t csi_eth_mac_get_rx_framesize(eth_mac_handle_t handle); + +/** + \brief Get time of received Ethernet frame. + \param[in] handle ethernet handle + \param[in] time Pointer to time structure for data to read into + \return error code +*/ +int32_t csi_eth_mac_get_rx_frametime(eth_mac_handle_t handle, eth_mac_time_t *time); + +/** + \brief Get time of transmitted Ethernet frame. + \param[in] handle ethernet handle + \param[in] time Pointer to time structure for data to read into + \return error code +*/ +int32_t csi_eth_mac_get_tx_frametime(eth_mac_handle_t handle, eth_mac_time_t *time); + +/** + \brief Control Ethernet Interface. + \param[in] handle ethernet handle + \param[in] control Operation + \param[in] arg Argument of operation (optional) + \return error code +*/ +int32_t csi_eth_mac_control(eth_mac_handle_t handle, uint32_t control, uint32_t arg); + +/** + \brief Control Precision Timer. + \param[in] handle ethernet handle + \param[in] control Operation + \param[in] time Pointer to time structure + \return error code +*/ +int32_t csi_eth_mac_control_time(eth_mac_handle_t handle, uint32_t control, eth_mac_time_t *time); + +/** + \brief Read Ethernet PHY Register through Management Interface. + \param[in] handle ethernet handle + \param[in] phy_addr 5-bit device address + \param[in] reg_addr 5-bit register address + \param[out] data Pointer where the result is written to + \return error code +*/ +int32_t csi_eth_mac_phy_read(eth_mac_handle_t handle, uint8_t phy_addr, uint8_t reg_addr, uint16_t *data); + +/** + \brief Write Ethernet PHY Register through Management Interface. + \param[in] handle ethernet handle + \param[in] phy_addr 5-bit device address + \param[in] reg_addr 5-bit register address + \param[in] data 16-bit data to write + \return error code +*/ +int32_t csi_eth_mac_phy_write(eth_mac_handle_t handle, uint8_t phy_addr, uint8_t reg_addr, uint16_t data); + +/** + \brief Callback function that signals a Ethernet Event. + \param[in] handle ethernet handle + \param[in] event event notification mask + \return none +*/ +void csi_eth_mac_signal_event(eth_mac_handle_t handle, uint32_t event); + +/** + \brief Add Frame Filter Setting with Filter ID. + \param[in] handle ethernet handle + \param[in] filter Pointer to filter setting + \return error code +*/ +int32_t csi_eth_mac_add_framefilter(eth_mac_handle_t handle, const eth_frame_filter_t *filter); + +/** + \brief Remove Frame Filter Setting. + \param[in] handle ethernet handle + \param[in] filter_id Frame Filter ID + \return error code +*/ +int32_t csi_eth_mac_remove_framefilter(eth_mac_handle_t handle, uint32_t filter_id); + +/** + \brief Enable/Disable Specified Frame Filter ID. + \param[in] handle ethernet handle + \param[in] filter_id Frame Filter ID + \param[in] en Enable or disable + \return error code +*/ +int32_t csi_eth_mac_en_framefilter(eth_mac_handle_t handle, uint32_t filter_id, bool en); + +/** + \brief Get frame filter table list. + \param[in] handle ethernet handle + \param[in] list frame filter table list + \param[in] count_out the count of filter setting added + \param[in] max_count max filter setting can be supported + \return error code +*/ +int32_t csi_eth_mac_get_framefilter(eth_mac_handle_t handle, eth_frame_filter_list_t* list, uint32_t* count_out, uint32_t max_count); + + +#ifdef CONFIG_ETH_ENC28J60_USE_PBUF +/** + \brief Begin to Send Ethernet frame. + \param[in] handle ethernet handle + \param[in] len Frame buffer length in bytes + \return error code +*/ +int32_t csi_eth_mac_ex_send_frame_begin(eth_mac_handle_t handle, uint32_t len); + +/** + * send a packet data + * @param address the packet data length + * + * @return + * - sent data length + */ +int32_t csi_eth_mac_ex_send_frame(eth_mac_handle_t handle, const uint8_t *frame, uint32_t len, uint32_t flags); + +/** + \brief End Send Ethernet frame. + \param[in] handle ethernet handle + \return error code +*/ +int32_t csi_eth_mac_ex_send_frame_end(eth_mac_handle_t handle); + +/** + \brief Read data of received Ethernet frame. + \param[in] handle ethernet handle + \param[in] frame Pointer to frame buffer for data to read into + \param[in] len Frame buffer length in bytes + \return number of data bytes read or execution status + - value >= 0: number of data bytes read + - value < 0: error occurred, value is execution status as defined with execution_status +*/ +int32_t csi_eth_mac_ex_read_frame(eth_mac_handle_t handle, uint8_t *frame, uint32_t len); + +/** + \brief Begin to Read data of received Ethernet frame. + \param[in] handle ethernet handle + \param[in] len Frame buffer length in bytes + \return >0 data byte in hardware buffer + ==0 no data + < 0 error +*/ +int32_t csi_eth_mac_ex_read_frame_begin(eth_mac_handle_t handle); + +/** + \brief Begin to Read data of received Ethernet frame. + \param[in] handle ethernet handle + \return error code +*/ +int32_t csi_eth_mac_ex_read_frame_end(eth_mac_handle_t handle); +#endif + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_eth_phy.h b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_eth_phy.h new file mode 100644 index 000000000..adf4aa017 --- /dev/null +++ b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_eth_phy.h @@ -0,0 +1,124 @@ +/** + * Copyright (C) 2016 CSI Project. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef _CSI_ETH_PHY_H_ +#define _CSI_ETH_PHY_H_ + +#include "drv_eth.h" + +#ifdef __cplusplus +extern "C" { +#endif + +typedef void *eth_phy_handle_t; + +#define CSI_ETH_PHY_API_VERSION CSI_ETH_VERSION_MAJOR_MINOR(2,1) /* API version */ + + +#define _CSI_Driver_ETH_PHY_(n) Driver_ETH_PHY##n +#define CSI_Driver_ETH_PHY_(n) _CSI_Driver_ETH_PHY_(n) + + +/****** Ethernet PHY Mode *****/ +#define CSI_ETH_PHY_SPEED_Pos 0 +#define CSI_ETH_PHY_SPEED_Msk (3UL << CSI_ETH_PHY_SPEED_Pos) +#define CSI_ETH_PHY_SPEED_10M (CSI_ETH_SPEED_10M << CSI_ETH_PHY_SPEED_Pos) ///< 10 Mbps link speed +#define CSI_ETH_PHY_SPEED_100M (CSI_ETH_SPEED_100M << CSI_ETH_PHY_SPEED_Pos) ///< 100 Mbps link speed +#define CSI_ETH_PHY_SPEED_1G (CSI_ETH_SPEED_1G << CSI_ETH_PHY_SPEED_Pos) ///< 1 Gpbs link speed +#define CSI_ETH_PHY_DUPLEX_Pos 2 +#define CSI_ETH_PHY_DUPLEX_Msk (1UL << CSI_ETH_PHY_DUPLEX_Pos) +#define CSI_ETH_PHY_DUPLEX_HALF (CSI_ETH_DUPLEX_HALF << CSI_ETH_PHY_DUPLEX_Pos) ///< Half duplex link +#define CSI_ETH_PHY_DUPLEX_FULL (CSI_ETH_DUPLEX_FULL << CSI_ETH_PHY_DUPLEX_Pos) ///< Full duplex link +#define CSI_ETH_PHY_AUTO_NEGOTIATE (1UL << 3) ///< Auto Negotiation mode +#define CSI_ETH_PHY_LOOPBACK (1UL << 4) ///< Loop-back test mode +#define CSI_ETH_PHY_ISOLATE (1UL << 5) ///< Isolate PHY from MII/RMII interface + +typedef int32_t (*csi_eth_phy_read_t) (uint8_t phy_addr, uint8_t reg_addr, uint16_t *data); ///< Read Ethernet PHY Register. +typedef int32_t (*csi_eth_phy_write_t) (uint8_t phy_addr, uint8_t reg_addr, uint16_t data); ///< Write Ethernet PHY Register. + +typedef struct { + csi_eth_phy_read_t phy_read; + csi_eth_phy_write_t phy_write; + eth_link_info_t link_info; +}eth_phy_priv_t; + +// Function documentation +/** + \brief Get driver version. + \param[in] handle ethernet phy handle + \return driver version +*/ +csi_drv_version_t csi_eth_phy_get_version(eth_phy_handle_t handle); + +/** + \brief Initialize Ethernet PHY Device. + \param[in] fn_read + \param[in] fn_write + \return ethernet phy handle +*/ +eth_phy_handle_t csi_eth_phy_initialize(csi_eth_phy_read_t fn_read, csi_eth_phy_write_t fn_write); + +/** + \brief De-initialize Ethernet PHY Device. + \param[in] handle ethernet phy handle + \return error code +*/ +int32_t csi_eth_phy_uninitialize(eth_phy_handle_t handle); + +/** + \brief Control Ethernet PHY Device Power. + \param[in] handle ethernet phy handle + \param[in] state Power state + \return error code +*/ +int32_t csi_eth_phy_power_control(eth_phy_handle_t handle, eth_power_state_t state); + +/** + \brief Set Ethernet Media Interface. + \param[in] handle ethernet phy handle + \param[in] interface Media Interface type + \return error code +*/ +int32_t csi_eth_phy_set_interface(eth_phy_handle_t handle, uint32_t interface); + +/** + \brief Set Ethernet PHY Device Operation mode. + \param[in] handle ethernet phy handle + \param[in] mode Operation Mode + \return error code +*/ +int32_t csi_eth_phy_set_mode(eth_phy_handle_t handle, uint32_t mode); + +/** + \brief Get Ethernet PHY Device Link state. + \param[in] handle ethernet phy handle + \return current link status \ref eth_link_state_t +*/ +eth_link_state_t csi_eth_phy_get_linkstate(eth_phy_handle_t handle); + +/** + \brief Get Ethernet PHY Device Link information. + \param[in] handle ethernet phy handle + \return current link parameters \ref eth_link_info_t +*/ +eth_link_info_t csi_eth_phy_get_linkinfo(eth_phy_handle_t handle); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_flash.h b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_flash.h new file mode 100644 index 000000000..7afd288a9 --- /dev/null +++ b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_flash.h @@ -0,0 +1,175 @@ +/* + * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +/****************************************************************************** + * @file drv_flash.c + * @brief header file for flash driver + * @version V1.0 + * @date 02. June 2017 + ******************************************************************************/ + +#ifndef _CSI_FLASH_H_ +#define _CSI_FLASH_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include <stdint.h> +#include <drv_common.h> + + +typedef struct { + uint32_t base; + void *priv; +} csi_flash_t; + +/** +\brief Flash Sector information +*/ +typedef struct { + uint32_t start; ///< Sector Start address + uint32_t end; ///< Sector End address (start+size-1) +} const flash_sector; + +/** +\brief Flash information +*/ +typedef struct { + flash_sector *sector_info; ///< Sector layout information (NULL=Uniform sectors) + uint32_t sector_count; ///< Number of sectors + uint32_t sector_size; ///< Uniform sector size in bytes (0=sector_info used) + uint32_t page_size; ///< Optimal programming page size in bytes + uint32_t program_unit; ///< Smallest programmable unit in bytes + uint8_t erased_value; ///< Contents of erased memory (usually 0xFF) +} flash_info_t; + +/** +\brief Flash Status +*/ +typedef struct { + uint32_t busy : 1; ///< Flash busy flag + uint32_t error : 1; ///< Read/Program/Erase error flag (cleared on start of next operation) +} flash_status_t; + +/****** FLASH Event *****/ +typedef enum { + FLASH_EVENT_READY = 0, ///< Flash Ready + FLASH_EVENT_ERROR , ///< Read/Program/Erase Error +} flash_event_e; + +typedef void (*flash_event_cb_t)(flash_event_e event); ///< Pointer to \ref flash_event_cb_t : FLASH Event call back. + +/** +\brief Flash Driver Capabilities. +*/ +typedef struct { + uint32_t event_ready : 1; ///< Signal Flash Ready event + uint32_t data_width : 2; ///< Data width: 0=8-bit, 1=16-bit, 2=32-bit + uint32_t erase_chip : 1; ///< Supports EraseChip operation +} flash_capabilities_t; + + + + +/** + \brief get flash instance count. + \return flash instance count +*/ +int32_t drv_flash_get_instance_count(void); + +/** + \brief get flash instance . + \param[in] idx must not exceed return value of drv_flash_get_instance_count() + \return pointer to flash instance +*/ +csi_flash_t *drv_flash_get_instance(int32_t idx); + +/** + \brief Get driver capabilities. + \param[in] instance flash instance to operate. + \return \ref flash_capabilities_t +*/ +flash_capabilities_t drv_flash_get_capabilities(const csi_flash_t *instance); + +/** + \brief Initialize FLASH Interface. 1. Initializes the resources needed for the FLASH interface 2.registers event callback function + \param[in] instance flash instance to operate. + \param[in] cb_event Pointer to \ref flash_event_cb_t + \return error code +*/ +int32_t drv_flash_initialize(const csi_flash_t *instance, flash_event_cb_t cb_event); + +/** + \brief De-initialize FLASH Interface. stops operation and releases the software resources used by the interface + \param[in] instance flash instance to operate. + \return error code +*/ +int32_t drv_flash_uninitialize(const csi_flash_t *instance); + +/** + \brief Get Flash information. + \param[in] instance flash instance to operate. + \return Pointer to Flash information \ref flash_info_t +*/ +flash_info_t *drv_flash_get_info(const csi_flash_t *instance); + +/** + \brief Read data from Flash. + \param[in] instance flash instance to operate. + \param[in] addr Data address. + \param[in] data Pointer to a buffer storing the data read from Flash. + \param[in] cnt Number of data items to read. + \return number of data items read or error code +*/ +int32_t drv_flash_read(const csi_flash_t *instance, uint32_t addr, void *data, uint32_t cnt); + +/** + \brief Program data to Flash. + \param[in] instance flash instance to operate. + \param[in] addr Data address. + \param[in] data Pointer to a buffer containing the data to be programmed to Flash.. + \param[in] cnt Number of data items to program. + \return number of data items programmed or error code +*/ +int32_t drv_flash_program(const csi_flash_t *instance, uint32_t addr, const void *data, uint32_t cnt); + +/** + \brief Erase Flash Sector. + \param[in] instance flash instance to operate. + \param[in] addr Sector address + \return error code +*/ +int32_t drv_flash_erase_sector(const csi_flash_t *instance, uint32_t addr); + +/** + \brief Erase complete Flash. + \param[in] instance flash instance to operate. + \return error code +*/ +int32_t drv_flash_erase_chip(const csi_flash_t *instance); + +/** + \brief Get FLASH status. + \param[in] instance flash instance to operate. + \return FLASH status \ref flash_status_t +*/ +flash_status_t drv_flash_get_status(const csi_flash_t *instance); + +#ifdef __cplusplus +} +#endif + +#endif /* _CSI_FLASH_H_ */ diff --git a/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_gpio.h b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_gpio.h new file mode 100644 index 000000000..5ec337b9f --- /dev/null +++ b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_gpio.h @@ -0,0 +1,192 @@ +/* + * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +/****************************************************************************** + * @file drv_gpio.h + * @brief header file for gpio driver + * @version V1.0 + * @date 02. June 2017 + ******************************************************************************/ + +#ifndef _CSI_GPIO_H_ +#define _CSI_GPIO_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include <stdint.h> +#include <stdbool.h> +#include <drv_common.h> +#include <pin_name.h> + +/// definition for gpio port handle. +typedef void *gpio_port_handle_t; +/// definition for gpio pin handle. +typedef void *gpio_pin_handle_t; + +/****** GPIO specific error codes *****/ +typedef enum { + GPIO_ERROR_MODE = (EDRV_SPECIFIC + 1), ///< Specified Mode not suphandleed + GPIO_ERROR_DIRECTION, ///< Specified direction not suphandleed + GPIO_ERROR_IRQ_MODE, ///< Specified irq mode not suphandleed +} drv_gpio_error_e; + +/*----- GPIO Control Codes: Mode -----*/ +typedef enum { + GPIO_MODE_PULLNONE = 1, ///< pull none for input + GPIO_MODE_PULLUP = 5, ///< pull up for input + GPIO_MODE_PULLDOWM = 3, ///< pull down for input + GPIO_MODE_OPEN_DRAIN = 2, ///< open drain mode for output + GPIO_MODE_PUSH_PULL = 4 ///< push-pull mode for output +} gpio_mode_e; + +/*----- GPIO Control Codes: Mode Parameters: Data Bits -----*/ +typedef enum { + GPIO_DIRECTION_INPUT = 0, ///< gpio as input + GPIO_DIRECTION_OUTPUT , ///< gpio as output +} gpio_direction_e; + +/*----- GPIO Control Codes: Mode Parameters: Parity -----*/ +typedef enum { + GPIO_IRQ_MODE_RISING_EDGE = 0, ///< interrupt mode for rising edge + GPIO_IRQ_MODE_FALLING_EDGE , ///< interrupt mode for falling edge + GPIO_IRQ_MODE_DOUBLE_EDGE , ///< interrupt mode for double edge + GPIO_IRQ_MODE_LOW_LEVEL , ///< interrupt mode for low level + GPIO_IRQ_MODE_HIGH_LEVEL , ///< interrupt mode for high level +} gpio_irq_mode_e; + +/** +\brief GPIO Driver Capabilities. +*/ +typedef struct { + uint32_t interrupt_mode : 1; ///< suphandles GPIO interrupt mode + uint32_t pull_mode : 1; +} gpio_capabilities_t; + + +typedef void (*gpio_event_cb_t)(void *arg); ///< gpio Event call back. + +/** + \brief Initialize GPIO module. 1. Initializes the resources needed for the GPIO handle 2.registers event callback function + 3.get gpio_port_handle + \param[in] port port_name. + \return gpio_port_handle +*/ +gpio_port_handle_t csi_gpio_port_initialize(port_name_t port); + +/** + \brief De-initialize GPIO handle. stops operation and releases the software resources used by the handle + \param[in] handle gpio port handle to operate. + \return error code +*/ +int32_t csi_gpio_port_uninitialize(gpio_port_handle_t handle); + +/** + \brief Get gpio capabilities.all pins have same capabilities in one handle + \param[in] handle handle instance to operate. + \return \ref gpio_capabilities_t +*/ +gpio_capabilities_t csi_gpio_get_io_capabilities(gpio_port_handle_t handle); + +/** + \brief config multiple pin within one handle + \param[in] handle gpio port handle to operate. + \param[in] mask the bitmask to identify which bits in the handle should be included (0 - ignore) + \param[in] mode \ref gpio_mode_e + \param[in] dir \ref gpio_direction_e + \return error code +*/ +int32_t csi_gpio_port_config(gpio_port_handle_t handle, + uint32_t mask, + gpio_mode_e mode, + gpio_direction_e dir); + +/** + \brief Write value to the handle(write value to multiple pins on one handle at the same time) + \param[in] handle gpio port handle to operate. + \param[in] mask The bitmask to identify which bits in the handle should be included (0 - ignore) + \param[in] value the value to be set + \return error code +*/ +int32_t csi_gpio_port_write(gpio_port_handle_t handle, uint32_t mask, uint32_t value); + +/** + \brief Read the current value on the handle(read value of multiple pins on one handle at the same time) + \param[in] handle gpio port handle to operate. + \param[in] mask The bitmask to identify which bits in the handle should be included (0 - ignore) + \param[out] value an integer with each bit corresponding to an associated handle pin setting + \return error code +*/ +int32_t csi_gpio_port_read(gpio_port_handle_t handle, uint32_t mask, uint32_t *value); + +/** + \brief Initialize GPIO handle. + \param[in] gpio_pin Pointer to the pin_t. + \param[in] cb_event Pointer to \ref gpio_event_cb_t + \param[in] arg Pointer to \ref arg used for the callback + \return gpio_pin_handle +*/ +gpio_pin_handle_t csi_gpio_pin_initialize(pin_t gpio_pin, gpio_event_cb_t cb_event, void *arg); + +/** + \brief De-initialize GPIO pin handle.stops operation and releases the software resources used by the handle. + \param[in] handle gpio pin handle to operate. + \return error code +*/ +int32_t csi_gpio_pin_uninitialize(gpio_pin_handle_t handle); + +/** + \brief config pin + \param[in] pin gpio pin handle to operate. + \param[in] mode \ref gpio_mode_e + \param[in] dir \ref gpio_direction_e + \return error code +*/ +int32_t csi_gpio_pin_config(gpio_pin_handle_t pin, + gpio_mode_e mode, + gpio_direction_e dir); + +/** + \brief Set one or zero to the selected GPIO pin. + \param[in] pin gpio pin handle to operate. + \param[in] value the value to be set + \return error code +*/ +int32_t csi_gpio_pin_write(gpio_pin_handle_t pin, bool value); + +/** + \brief Get the value of selected GPIO pin. + \param[in] pin gpio pin handle to operate. + \param[out] value buf to store the pin value + \return error code +*/ +int32_t csi_gpio_pin_read(gpio_pin_handle_t pin, bool *value); + +/** + \brief set GPIO interrupt mode. + \param[in] pin gpio pin handle to operate. + \param[in] mode the irq mode to be set + \param[in] enable the enable flag + \return error code +*/ +int32_t csi_gpio_pin_irq_set(gpio_pin_handle_t pin, gpio_irq_mode_e mode, bool enable); + + +#ifdef __cplusplus +} +#endif + +#endif /* _CSI_GPIO_H_ */ diff --git a/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_iic.h b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_iic.h new file mode 100644 index 000000000..b4b492f84 --- /dev/null +++ b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_iic.h @@ -0,0 +1,288 @@ +/* + * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +/****************************************************************************** + * @file drv_iic.h + * @brief header file for iic driver + * @version V1.0 + * @date 02. June 2017 + ******************************************************************************/ + +#ifndef _CSI_IIC_H_ +#define _CSI_IIC_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include <stdint.h> +#include <stdbool.h> +#include <drv_common.h> + +/// definition for iic handle. +typedef void *iic_handle_t; + +/*----- IIC Control Codes: Mode -----*/ +typedef enum { + IIC_MODE_MASTER, ///< IIC Master + IIC_MODE_SLAVE ///< IIC Slave +} iic_mode_e; + +/*----- IIC Control Codes: IIC Bus Speed -----*/ +typedef enum { + I2C_BUS_SPEED_STANDARD = 0, ///< Standard Speed (100kHz) + I2C_BUS_SPEED_FAST = 1, ///< Fast Speed (400kHz) + I2C_BUS_SPEED_FAST_PLUS = 2, ///< Fast+ Speed ( 1MHz) + I2C_BUS_SPEED_HIGH = 3 ///< High Speed (3.4MHz) +} iic_speed_e; + +/*----- IIC Control Codes: IIC Address Mode -----*/ +typedef enum { + I2C_ADDRESS_7BIT = 0, ///< 7-bit address mode + I2C_ADDRESS_10BIT = 1 ///< 10-bit address mode +} iic_address_mode_e; + +/** +\brief IIC Status +*/ +typedef struct { + uint32_t busy : 1; ///< Transmitter/Receiver busy flag + uint32_t mode : 1; ///< Mode: 0=Slave, 1=Master + uint32_t direction : 1; ///< Direction: 0=Transmitter, 1=Receiver + uint32_t general_call : 1; ///< General Call(address 0) indication (cleared on start of next Slave operation) + uint32_t arbitration_lost : 1; ///< Master lost arbitration(in case of multi-masters) (cleared on start of next Master operation) + uint32_t bus_error : 1; ///< Bus error detected (cleared on start of next Master/Slave operation) +} iic_status_t; + +/****** IIC Event *****/ +typedef enum { + I2C_EVENT_TRANSFER_DONE = 0, ///< Master/Slave Transmit/Receive finished + I2C_EVENT_TRANSFER_INCOMPLETE = 1, ///< Master/Slave Transmit/Receive incomplete transfer + I2C_EVENT_SLAVE_TRANSMIT = 2, ///< Slave Transmit operation requested + I2C_EVENT_SLAVE_RECEIVE = 3, ///< Slave Receive operation requested + I2C_EVENT_ADDRESS_NACK = 4, ///< Address not acknowledged from Slave + I2C_EVENT_GENERAL_CALL = 5, ///< General Call indication + I2C_EVENT_ARBITRATION_LOST = 6, ///< Master lost arbitration + I2C_EVENT_BUS_ERROR = 7, ///< Bus error detected (START/STOP at illegal position) + I2C_EVENT_BUS_CLEAR = 8 ///< Bus clear finished +} iic_event_e; + +typedef void (*iic_event_cb_t)(iic_event_e event, void *arg); ///< Pointer to \ref iic_event_cb_t : IIC Event call back. + +/** +\brief IIC Driver Capabilities. +*/ +typedef struct { + uint32_t address_10_bit : 1; ///< supports 10-bit addressing +} iic_capabilities_t; + +/** + \brief Initialize IIC Interface specified by pins. \n + 1. Initializes the resources needed for the IIC interface 2.registers event callback function + \param[in] scl scl pin of iic. + \param[in] sda sda pin of iic. + \param[in] cb_event Pointer to \ref iic_event_cb_t + \param[in] cb_arg argument for call back function + \return 0 for success, negative for error code +*/ +iic_handle_t csi_iic_initialize(pin_t scl, pin_t sda, iic_event_cb_t cb_event, void *cb_arg); + +/** + \brief De-initialize IIC Interface. stops operation and releases the software resources used by the interface + \param[in] handle iic handle to operate. + \return 0 for success, negative for error code +*/ +int32_t csi_iic_uninitialize(iic_handle_t handle); + +/** + \brief Get driver capabilities. + \param[in] handle iic handle to operate. + \return \ref iic_capabilities_t +*/ +iic_capabilities_t csi_iic_get_capabilities(iic_handle_t handle); + +/** + \brief config iic attributes. + \param[in] handle iic handle to operate. + \param[in] mode iic mode \ref iic_mode_e. if negative, then this attribute not changed. + \param[in] speed iic speed \ref iic_speed_e. if negative, then this attribute not changed. + \param[in] addr_mode iic address mode \ref iic_address_mode_e. if negative, then this attribute not changed. + \param[in] slave_addr iic address of slave. if negative, then this attribute not changed. + \return 0 for success, negative for error code +*/ +int32_t csi_iic_config(iic_handle_t handle, + iic_mode_e mode, + iic_speed_e speed, + iic_address_mode_e addr_mode, + int32_t slave_addr); + +/** + \brief Start transmitting data as I2C Master. + This function is non-blocking,\ref iic_event_e is signaled when transfer completes or error happens. + \ref csi_iic_get_status can indicates transmission status. + \param[in] handle iic handle to operate. + \param[in] data data to send to I2C Slave + \param[in] num Number of data items to send + \param[in] xfer_pending Transfer operation is pending - Stop condition will not be generated + \return 0 for success, negative for error code +*/ +int32_t csi_iic_master_send(iic_handle_t handle, const void *data, uint32_t num, bool xfer_pending); + +/** + \brief Start receiving data as I2C Master. + This function is non-blocking,\ref iic_event_e is signaled when transfer completes or error happens. + \ref csi_iic_get_status can indicates transmission status. + \param[in] handle iic handle to operate. + \param[out] data Pointer to buffer for data to receive from IIC receiver + \param[in] num Number of data items to receive + \param[in] xfer_pending Transfer operation is pending - Stop condition will not be generated + \return 0 for success, negative for error code +*/ +int32_t csi_iic_master_receive(iic_handle_t handle, void *data, uint32_t num, bool xfer_pending); + +/** + \brief Start transmitting data as I2C Slave. + This function is non-blocking,\ref iic_event_e is signaled when transfer completes or error happens. + \ref csi_iic_get_status can indicates transmission status. + \param[in] handle iic handle to operate. + \param[in] data Pointer to buffer with data to transmit to I2C Master + \param[in] num Number of data items to send + \return 0 for success, negative for error code +*/ +int32_t csi_iic_slave_send(iic_handle_t handle, const void *data, uint32_t num); + +/** + \brief Start receiving data as I2C Slave. + This function is non-blocking,\ref iic_event_e is signaled when transfer completes or error happens. + \ref csi_iic_get_status can indicates transmission status. + \param[in] handle iic handle to operate. + \param[out] data Pointer to buffer for data to receive from I2C Master + \param[in] num Number of data items to receive + \return 0 for success, negative for error code +*/ +int32_t csi_iic_slave_receive(iic_handle_t handle, const void *data, uint32_t num); + +/** + \brief abort transfer. + \param[in] handle iic handle to operate. + \return 0 for success, negative for error code +*/ +int32_t csi_iic_abort_transfer(iic_handle_t handle); + +/** + \brief Get IIC status. + \param[in] handle iic handle to operate. + \return IIC status \ref iic_status_t +*/ +iic_status_t csi_iic_get_status(iic_handle_t handle); + +/** + \brief control IIC power. + \param[in] handle iic handle to operate. + \param[in] state power state.\ref csi_power_stat_e. + \return error code +*/ +int32_t csi_iic_power_control(iic_handle_t handle, csi_power_stat_e state); + +/** + \brief config iic mode. + \param[in] handle iic handle to operate. + \param[in] mode \ref iic_mode_e.if negative, then this attribute not changed + \return error code +*/ +int32_t csi_iic_config_mode(iic_handle_t handle, iic_mode_e mode); + +/** + \brief config iic speed. + \param[in] handle iic handle to operate. + \param[in] speed \ref iic_speed_e.if negative, then this attribute not changed + \return error code +*/ +int32_t csi_iic_config_speed(iic_handle_t handle, iic_speed_e speed); + +/** + \brief config iic address mode. + \param[in] handle iic handle to operate. + \param[in] addr_mode \ref iic_address_mode_e.if negative, then this attribute not changed + \return error code +*/ +int32_t csi_iic_config_addr_mode(iic_handle_t handle, iic_address_mode_e addr_mode); + + +/** + \brief config iic slave address. + \param[in] handle iic handle to operate. + \param[in] slave_addr slave address.if negative, then this attribute not changed + \return error code +*/ +int32_t csi_iic_config_slave_addr(iic_handle_t handle, int32_t slave_addr); + +/** + \brief Get IIC transferred data count. + \param[in] handle iic handle to operate. + \return number of data bytes transferred +*/ +uint32_t csi_iic_get_data_count(iic_handle_t handle); + +/** + \brief Send START command. + \param[in] handle iic handle to operate. + \return error code +*/ +int32_t csi_iic_send_start(iic_handle_t handle); + +/** + \brief Send STOP command. + \param[in] handle iic handle to operate. + \return error code +*/ +int32_t csi_iic_send_stop(iic_handle_t handle); + +/** + \brief Reset I2C peripheral. + \param[in] handle iic handle to operate. + \return error code +*/ +int32_t csi_iic_reset(iic_handle_t handle); + +/** + \brief Read a single byte from the I2C bus. + \param[in] handle iic handle to operate. + \param[in] last Acknoledge,indicates if the byte is to be acknowledged (1 = acknowledge) + \return error code if negative, else the data is the lowest byte of return value +*/ +int32_t csi_iic_read_byte(iic_handle_t handle, int32_t last); + +/** + \brief Write one byte. + \param[in] handle iic handle to operate. + \return 0 if NAK was received, 1 if ACK was received, 2 for timeout. negative for error +*/ +int32_t csi_iic_write_byte(iic_handle_t handle, uint8_t data); + +/** + \brief Check to see if the I2C slave has been addressed. + \param[in] handle iic handle to operate. + \return 1 - read addressed, 2 - write to all slaves, + 3 - write addressed, 0 - the slave has not been addressed. + negative for error +*/ +int32_t csi_iic_slave_check_addressed(iic_handle_t handle); + +#ifdef __cplusplus +} +#endif + +#endif /* _CSI_IIC_H_ */ diff --git a/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_intc.h b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_intc.h new file mode 100644 index 000000000..10ee4cea1 --- /dev/null +++ b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_intc.h @@ -0,0 +1,163 @@ +/* + * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +/****************************************************************************** + * @file drv_intc.h + * @brief header file for intc driver + * @version V1.0 + * @date 02. June 2017 + ******************************************************************************/ + +#ifndef _CSI_INTC_H_ +#define _CSI_INTC_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include <stdint.h> +#include <drv_common.h> + +typedef enum int_trigger_mode_t +{ + INT_MODE_LOW_LEVEL, + INT_MODE_HIGH_LEVEL, + INT_MODE_RISING_EDGE, + INT_MODE_FALLING_EDGE, + INT_MODE_DOUBLE_EDGE, +} int_trigger_mode_t; + +/** + \brief initialize the INTC interrupt controller + \param [in] prio_bits the priority bits of INTC interrupt controller. + */ +void csi_intc_init(void); + +/** + \brief Enable External Interrupt + \details Enables a device-specific interrupt in the INTC interrupt controller. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +void csi_intc_enable_irq(int32_t IRQn); + +/** + \brief Disable External Interrupt + \details Disables a device-specific interrupt in the INTC interrupt controller. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +void csi_intc_disable_irq(int32_t IRQn); + +/** + \brief Get Pending Interrupt + \details Reads the pending register in the INTC and returns the pending bit for the specified interrupt. + \param [in] IRQn Interrupt number. + \return 0 Interrupt status is not pending. + \return 1 Interrupt status is pending. + */ +uint32_t csi_intc_get_pending_irq(int32_t IRQn); + +/** + \brief Set Pending Interrupt + \details Sets the pending bit of an external interrupt. + \param [in] IRQn Interrupt number. Value cannot be negative. + */ +void csi_intc_set_pending_irq(int32_t IRQn); + +/** + \brief Clear Pending Interrupt + \details Clears the pending bit of an external interrupt. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +void csi_intc_clear_pending_irq(int32_t IRQn); + +/** + \brief Get Wake up Interrupt + \details Reads the wake up register in the INTC and returns the pending bit for the specified interrupt. + \param [in] IRQn Interrupt number. + \return 0 Interrupt is not set as wake up interrupt. + \return 1 Interrupt is set as wake up interrupt. + */ +uint32_t csi_intc_get_wakeup_irq(int32_t IRQn); + +/** + \brief Set Wake up Interrupt + \details Sets the wake up bit of an external interrupt. + \param [in] IRQn Interrupt number. Value cannot be negative. + */ +void csi_intc_set_wakeup_irq(int32_t IRQn); + +/** + \brief Clear Wake up Interrupt + \details Clears the wake up bit of an external interrupt. + \param [in] IRQn External interrupt number. Value cannot be negative. + */ +void csi_intc_clear_wakeup_irq(int32_t IRQn); + +/** + \brief Get Active Interrupt + \details Reads the active register in the INTC and returns the active bit for the device specific interrupt. + \param [in] IRQn Device specific interrupt number. + \return 0 Interrupt status is not active. + \return 1 Interrupt status is active. + \note IRQn must not be negative. + */ +uint32_t csi_intc_get_active(int32_t IRQn); + +/** + \brief Set Threshold register + \details set the threshold register in the INTC. + \param [in] VectThreshold specific vecter threshold. + \param [in] PrioThreshold specific priority threshold. + */ +void csi_intc_set_threshold(uint32_t VectThreshold, uint32_t PrioThreshold); + +/** + \brief Set Interrupt Priority + \details Sets the priority of an interrupt. + \note The priority cannot be set for every core interrupt. + \param [in] IRQn Interrupt number. + \param [in] priority Priority to set. + */ +void csi_intc_set_prio(int32_t IRQn, uint32_t priority); + +/** + \brief Get Interrupt Priority + \details Reads the priority of an interrupt. + The interrupt number can be positive to specify an external (device specific) interrupt, + or negative to specify an internal (core) interrupt. + \param [in] IRQn Interrupt number. + \return Interrupt Priority. + Value is aligned automatically to the implemented priority bits of the microcontroller. + */ +uint32_t csi_intc_get_prio(int32_t IRQn); + +/** + \brief funciton is acknowledge the IRQ. this interface is internally used by irq system + \param[in] irq irq number to operate + \return 0 on success; -1 on failure + */ +int csi_intc_ack_irq(int32_t IRQn); + +/** + \briefThis function is set the attributes of an IRQ. + \param[in] irq irq number to operate + \param[in] priority interrupt priority + \param[in] trigger_mode interrupt trigger_mode + \return 0 on success; -1 on failure +*/ +int csi_intc_set_attribute(int32_t IRQn, uint32_t priority,int_trigger_mode_t trigger_mode); + +#endif /* _CSI_INTC_H_ */ + diff --git a/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_pmu.h b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_pmu.h new file mode 100644 index 000000000..0d7774264 --- /dev/null +++ b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_pmu.h @@ -0,0 +1,125 @@ +/* + * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +/****************************************************************************** + * @file drv_pmu.h + * @brief header file for pmu driver + * @version V1.0 + * @date 02. June 2017 + ******************************************************************************/ + +#ifndef _CSI_PMU_H_ +#define _CSI_PMU_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include <drv_common.h> + +/// definition for pmu handle. +typedef void *pmu_handle_t; + +/****** PMU specific error codes *****/ +typedef enum { + EDRV_PMU_MODE = (EDRV_SPECIFIC + 1), ///< Specified Mode not supported +} pmu_error_e; + +/*----- PMU Control Codes: Mode -----*/ +typedef enum { + PMU_MODE_RUN = 0, ///< Running mode + PMU_MODE_SLEEP , ///< Sleep mode + PMU_MODE_DORMANT , ///< Dormant mode + PMU_MODE_STDBY , ///< Standby mode + PMU_MODE_SHUTDOWN ///< Shutdown mode +} pmu_mode_e; + +/*----- PMU Control Codes: Wakeup type -----*/ +typedef enum { + PMU_WAKEUP_TYPE_PULSE = 0, ///< Pulse interrupt + PMU_WAKEUP_TYPE_LEVEL ///< Level interrupt +} pmu_wakeup_type_e; + +/*----- PMU Control Codes: Wakeup polarity -----*/ +typedef enum { + PMU_WAKEUP_POL_LOW = 0, ///< Low or negedge + PMU_WAKEUP_POL_HIGH ///< High or posedge +} pmu_wakeup_pol_e; + +/****** PMU Event *****/ +typedef enum { + PMU_EVENT_SLEEP_DONE = 0, ///< Send completed; however PMU may still transmit data + PMU_EVENT_BEFORE_SLEEP = 1 +} pmu_event_e; + +typedef void (*pmu_event_cb_t)(int32_t idx, pmu_event_e event, pmu_mode_e mode); ///< Pointer to \ref pmu_event_cb_t : PMU Event call back. + +typedef int32_t (*pmu_action_cb_t)(pmu_event_e event); + +/** + \brief Initialize PMU Interface. 1. Initializes the resources needed for the PMU interface 2.registers event callback function + \param[in] idx the id of the pmu + \param[in] cb_event Pointer to \ref pmu_event_cb_t + \return return pmu handle if success +*/ +pmu_handle_t drv_pmu_initialize(int32_t idx, pmu_event_cb_t cb_event); + +/** + \brief De-initialize PMU Interface. stops operation and releases the software resources used by the interface + \param[in] handle pmu handle to operate. + \return error code +*/ +int32_t drv_pmu_uninitialize(pmu_handle_t handle); + +int32_t drv_pmu_power_control(int32_t idx, csi_power_stat_e state); + +/** + \brief choose the pmu mode to enter + \param[in] handle pmu handle to operate. + \param[in] mode \ref pmu_mode_e + \return error code +*/ +int32_t drv_pmu_enter_sleep(pmu_handle_t handle, pmu_mode_e mode); + +/** + \brief choose the pmu mode to enter + \param[in] handle pmu handle to operate. + \param[in] callback Pointer to \ref pmu_action_cb_t + \return error code +*/ +int32_t drv_pmu_register_module(pmu_action_cb_t callback); + +/** + \brief exit the pmu mode + \param[in] handle pmu handle to operate. + \return error code +*/ +int32_t drv_pmu_exit_sleep(pmu_handle_t handle); + +/** + \brief Config the wakeup source. + \param[in] handle pmu handle to operate + \param[in] type \ref pmu_wakeup_type + \param[in] pol \ref pmu_wakeup_pol + \param[in] enable flag control the wakeup source is enable or not + \return error code +*/ +int32_t drv_pmu_config_wakeup_source(pmu_handle_t handle, uint32_t irq_num, pmu_wakeup_type_e type, pmu_wakeup_pol_e pol, uint8_t enable); + +#ifdef __cplusplus +} +#endif + +#endif /* _CSI_PMU_H_ */ diff --git a/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_pwm.h b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_pwm.h new file mode 100644 index 000000000..9d585429a --- /dev/null +++ b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_pwm.h @@ -0,0 +1,94 @@ +/* + * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +/****************************************************************************** + * @file drv_pwm.h + * @brief header file for pwm driver + * @version V1.0 + * @date 02. June 2017 + ******************************************************************************/ +#ifndef _CSI_PWM_H_ +#define _CSI_PWM_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include <stdint.h> +#include <drv_common.h> + + +/// definition for pwm handle. +typedef void *pwm_handle_t; + +/****** PWM specific error codes *****/ +typedef enum { + EDRV_PWM_MODE = (EDRV_SPECIFIC + 1), ///< Specified Mode not supported +} drv_pwm_error_e; + + +/** + \brief Initialize PWM Interface. 1. Initializes the resources needed for the PWM interface 2.registers event callback function + \param[in] pwm_pin pin name of pwm + \return handle pwm handle to operate. +*/ +pwm_handle_t drv_pwm_initialize(pin_t pwm_pin); + +/** + \brief De-initialize PWM Interface. stops operation and releases the software resources used by the interface + \param[in] handle pwm handle to operate. + \return error code +*/ +int32_t drv_pwm_uninitialize(pwm_handle_t handle); + +/** + \brief config pwm mode. + \param[in] handle pwm handle to operate. + \param[in] sysclk configured system clock. + \param[in] period_us the PWM period in us + \param[in] duty the PMW duty. ( 0 - 10000 represents 0% - 100% ,other values are invalid) + \return error code +*/ +int32_t drv_pwm_config(pwm_handle_t handle, + uint32_t sysclk, + uint32_t period_us, + uint32_t duty); + +/** + \brief start generate pwm signal. + \param[in] handle pwm handle to operate. + \return error code +*/ +int32_t drv_pwm_start(pwm_handle_t handle); + +/** + \brief Stop generate pwm signal. + \param[in] handle pwm handle to operate. + \return error code +*/ +int32_t drv_pwm_stop(pwm_handle_t handle); + +/** + \brief Get PWM status. + \param[in] handle pwm handle to operate. + \return PWM status \ref pwm_status_t +pwm_status_t drv_pwm_get_status(pwm_handle_t handle); +*/ + +#ifdef __cplusplus +} +#endif + +#endif /* _CSI_PWM_H_ */ diff --git a/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_rsa.h b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_rsa.h new file mode 100644 index 000000000..c7b41c108 --- /dev/null +++ b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_rsa.h @@ -0,0 +1,223 @@ +/* + * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +/****************************************************************************** + * @file drv_rsa.h + * @brief header file for rsa driver + * @version V1.0 + * @date 02. June 2017 + ******************************************************************************/ +#ifndef _CSI_RSA_H_ +#define _CSI_RSA_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include <stdint.h> +#include <drv_common.h> + + +/// definition for rsa handle. +typedef void *rsa_handle_t; + +/****** RSA specific error codes *****/ +typedef enum { + RSA_ERROR_DATA_BITS , ///< Specified number of Data bits not supported + RSA_ERROR_ENDIAN ///< Specified endian not supported +} drv_rsa_error_e; + +/*----- RSA Control Codes: Mode Parameters: Data Bits -----*/ +typedef enum { + RSA_DATA_BITS_192 = 0, ///< 192 Data bits + RSA_DATA_BITS_256 , ///< 256 Data bits + RSA_DATA_BITS_512 , ///< 512 Data bits + RSA_DATA_BITS_1024 , ///< 1024 Data bits (default) + RSA_DATA_BITS_2048 ///< 2048 Data bits +} rsa_data_bits_e; + +/*----- RSA Control Codes: Mode Parameters: Endian -----*/ +typedef enum { + RSA_ENDIAN_MODE_LITTLE = 0, ///< RSA Little Endian Mode + RSA_ENDIAN_MODE_BIG ///< RSA Big Endian Mode +} rsa_endian_mode_e; + +typedef enum { + RSA_PADDING_MODE_PKCS1 = 1, ///< RSA PKCS1 Padding Mode + RSA_PADDING_MODE_NO , ///< RSA NO Padding Mode + RSA_PADDING_MODE_SSLV23 , ///< RSA SSLV23 Padding Mode + RSA_PADDING_MODE_PKCS1_OAEP , ///< RSA PKCS1 OAEP Padding Mode + RSA_PADDING_MODE_X931 , ///< RSA X931 Padding Mode + RSA_PADDING_MODE_PSS ///< RSA PSS Padding Mode +} rsa_padding_type_e; + +typedef enum { + RSA_HASH_TYPE_MD5 = 0, + RSA_HASH_TYPE_SHA1 , + RSA_HASH_TYPE_SHA224 , + RSA_HASH_TYPE_SHA256 , + RSA_HASH_TYPE_SHA384 , + RSA_HASH_TYPE_SHA512 +} rsa_hash_type_e; + +/*----- RSA Control Codes: Mode Parameters: Padding mode -----*/ +typedef struct { + rsa_padding_type_e padding_type; + rsa_hash_type_e hash_type; +} rsa_padding_t; + +/** +\brief RSA Status +*/ +typedef struct { + uint32_t busy : 1; ///< Calculate busy flag +} rsa_status_t; + +/****** RSA Event *****/ +typedef enum { + RSA_EVENT_ENCRYPT_COMPLETE = 0, ///< Encrypt completed + RSA_EVENT_DECRYPT_COMPLETE , ///< Decrypt completed + RSA_EVENT_SIGN_COMPLETE , ///< Sign completed + RSA_EVENT_VERIFY_COMPLETE , ///< Verify completed +} rsa_event_e; + +typedef void (*rsa_event_cb_t)(rsa_event_e event); ///< Pointer to \ref rsa_event_cb_t : RSA Event call back. + + +/** +\brief RSA Device Driver Capabilities. +*/ +typedef struct { + uint32_t bits_192 : 1; ///< supports 192bits modular length + uint32_t bits_256 : 1; ///< supports 256bits modular length + uint32_t bits_512 : 1; ///< supports 512bits modular length + uint32_t bits_1024 : 1; ///< supports 1024bits modular length + uint32_t bits_2048 : 1; ///< supports 2048bits modular length +} rsa_capabilities_t; + + +// Function documentation + +/** + \brief get rsa handle count. + \return rsa handle count +*/ +int32_t csi_rsa_get_instance_count(void); + +/** + \brief Initialize RSA Interface. 1. Initializes the resources needed for the RSA interface 2.registers event callback function + \param[in] idx must not exceed return value of csi_rsa_get_instance_count() + \param[in] cb_event Pointer to \ref rsa_event_cb_t + \return pointer to rsa handle +*/ +rsa_handle_t csi_rsa_initialize(int32_t idx, rsa_event_cb_t cb_event); + +/** + \brief De-initialize RSA Interface. stops operation and releases the software resources used by the interface + \param[in] handle rsa handle to operate. + \return error code +*/ +int32_t csi_rsa_uninitialize(rsa_handle_t handle); + +/** + \brief Get driver capabilities. + \param[in] handle rsa handle to operate. + \return \ref rsa_capabilities_t +*/ +rsa_capabilities_t csi_rsa_get_capabilities(rsa_handle_t handle); + +/** + \brief config rsa mode. + \param[in] handle rsa handle to operate. + \param[in] data_bits \ref rsa_data_bits_e + \param[in] endian \ref rsa_endian_mode_e + \return error code +*/ +int32_t csi_rsa_config(rsa_handle_t handle, + rsa_data_bits_e data_bits, + rsa_endian_mode_e endian, + void *arg + ); + +/** + \brief encrypt + \param[in] handle rsa handle to operate. + \param[in] n Pointer to the public modulus + \param[in] e Pointer to the public exponent + \param[in] src Pointer to the source data. + \param[in] src_size the source data len + \param[out] out Pointer to the result buffer + \param[out] out_size the result size + \param[in] padding \ref rsa_padding_t + \return error code +*/ +int32_t csi_rsa_encrypt(rsa_handle_t handle, void *n, void *e, void *src, int32_t src_size, void *out, uint32_t *out_size, rsa_padding_t padding); + + +/** + \brief decrypt + \param[in] handle rsa handle to operate. + \param[in] n Pointer to the public modulus + \param[in] d Pointer to the privte exponent + \param[in] src Pointer to the source data. + \param[in] src_size the source data len + \param[out] out Pointer to the result buffer + \param[out] out_size the result size + \param[in] padding \ref rsa_padding_t + \return error code +*/ +int32_t csi_rsa_decrypt(rsa_handle_t handle, void *n, void *d, void *src, uint32_t src_size, void *out, uint32_t *out_size, rsa_padding_t padding); + +/** + \brief rsa sign + \param[in] handle rsa handle to operate. + \param[in] n Pointer to the public modulus + \param[in] d Pointer to the privte exponent + \param[in] src Pointer to the source data. + \param[in] src_size the source data len + \param[out] signature Pointer to the signature + \param[out] sig_size the signature size + \param[in] padding \ref rsa_padding_t + \return error code +*/ +int32_t csi_rsa_sign(rsa_handle_t handle, void *n, void *d, void *src, uint32_t src_size, void *signature, void *sig_size, rsa_padding_t padding); + +/** + \brief rsa verify + \param[in] handle rsa handle to operate. + \param[in] n Pointer to the public modulus + \param[in] e Pointer to the public exponent + \param[in] src Pointer to the source data. + \param[in] src_size the source data len + \param[in] signature Pointer to the signature + \param[in] sig_size the signature size + \param[out] result Pointer to the result + \param[in] padding \ref rsa_padding_t + \return error code +*/ +int32_t csi_rsa_verify(rsa_handle_t handle, void *n, void *e, void *src, uint32_t src_size, void *signature, uint32_t sig_size, void *result, rsa_padding_t padding); +/** + \brief Get RSA status. + \param[in] handle rsa handle to operate. + \return RSA status \ref rsa_status_t +*/ +rsa_status_t csi_rsa_get_status(rsa_handle_t handle); + + +#ifdef __cplusplus +} +#endif + +#endif /* _CSI_RSA_H_ */ diff --git a/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_rtc.h b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_rtc.h new file mode 100644 index 000000000..182b3df84 --- /dev/null +++ b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_rtc.h @@ -0,0 +1,161 @@ +/* + * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +/****************************************************************************** + * @file drv_rtc.h + * @brief header file for rtc driver + * @version V1.0 + * @date 02. June 2017 + ******************************************************************************/ + +#ifndef _CSI_RTC_H_ +#define _CSI_RTC_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include <stdint.h> +#include <drv_common.h> +#include <time.h> + +/// definition for rtc handle. +typedef void *rtc_handle_t; + +/****** rtc specific error codes *****/ +typedef enum { + EDRV_RTC_TIME = (EDRV_SPECIFIC + 1), ///< timer data not supported +} drv_rtc_error_e; + +/** +\brief RTC Status +*/ +typedef struct { + uint32_t active : 1; ///< rtc is running or not +} rtc_status_t; + +/****** RTC Event *****/ +typedef enum { + RTC_EVENT_TIMER_INTRERRUPT = 0 ///< generate interrupt +} rtc_event_e; + +typedef void (*rtc_event_cb_t)(rtc_event_e event); ///< Pointer to \ref rtc_event_cb_t : RTC Event call back. + +/** +\brief RTC Device Driver Capabilities. +*/ +typedef struct { + uint32_t interrupt_mode : 1; ///< supports Interrupt mode + uint32_t wrap_mode : 1; ///< supports wrap mode +} rtc_capabilities_t; + +/** + \brief get rtc instance count. + \return rtc instance count +*/ +int32_t csi_rtc_get_instance_count(void); + +/** + \brief Initialize RTC Interface. 1. Initializes the resources needed for the RTC interface 2.registers event callback function + \param[in] idx must not exceed return value of csi_rtc_get_instance_count() + \param[in] cb_event Pointer to \ref rtc_event_cb_t + \return pointer to rtc instance +*/ +rtc_handle_t csi_rtc_initialize(int32_t idx, rtc_event_cb_t cb_event); + +/** + \brief De-initialize RTC Interface. stops operation and releases the software resources used by the interface + \param[in] handle rtc handle to operate. + \return error code +*/ +int32_t csi_rtc_uninitialize(rtc_handle_t handle); + +/** + \brief Get driver capabilities. + \param[in] handle rtc handle to operate. + \return \ref rtc_capabilities_t +*/ +rtc_capabilities_t csi_rtc_get_capabilities(rtc_handle_t handle); + +/** + \brief Set RTC timer. + \param[in] handle rtc handle to operate. + \param[in] rtctime pointer to rtc time + \return error code +*/ +int32_t csi_rtc_set_time(rtc_handle_t handle, const struct tm *rtctime); + +/** + \brief Get RTC timer. + \param[in] handle rtc handle to operate. + \param[in] rtctime pointer to rtc time + \return error code +*/ +int32_t csi_rtc_get_time(rtc_handle_t handle, struct tm *rtctime); + + + +/** + \brief Start RTC timer. + \param[in] handle rtc handle to operate. + \return error code +*/ +int32_t csi_rtc_start(rtc_handle_t handle); + +/** + \brief Stop RTC timer. + \param[in] handle rtc handle to operate. + \return error code +*/ +int32_t csi_rtc_stop(rtc_handle_t handle); + +/** + \brief config rtc mode. + \param[in] handle rtc handle to operate. + \return error code +*/ +//int32_t drv_rtc_config (rtc_handle_t handle/*,rtc_mode_e mode*/); + +/** + \brief Get RTC status. + \param[in] handle rtc handle to operate. + \return RTC status \ref rtc_status_t +*/ +rtc_status_t csi_rtc_get_status(rtc_handle_t handle); + +/** + \brief config RTC timer. + \param[in] handle rtc handle to operate. + \param[in] rtctime time to wake up + \return error code +*/ +int32_t csi_rtc_timer_config(rtc_handle_t handle, const struct tm *rtctime); + +/** + \brief disable or enable RTC timer. + \param[in] handle rtc handle to operate. + \param[in] en set 1 enable for rtc timer + \return error code +*/ +int32_t csi_rtc_timer_enable(rtc_handle_t handle, uint8_t en); + + + + +#ifdef __cplusplus +} +#endif + +#endif /* _CSI_RTC_H_ */ diff --git a/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_sha.h b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_sha.h new file mode 100644 index 000000000..238d1548f --- /dev/null +++ b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_sha.h @@ -0,0 +1,172 @@ +/* + * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +/****************************************************************************** + * @file drv_sha.h + * @brief header file for sha driver + * @version V1.0 + * @date 02. June 2017 + ******************************************************************************/ +#ifndef _CSI_SHA_H_ +#define _CSI_SHA_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include <stdint.h> +#include <drv_common.h> +#include <drv_errno.h> + + +/// definition for sha handle. +typedef void *sha_handle_t; + +/****** SHA specific error codes *****/ +typedef enum { + SHA_ERROR_MODE = (EDRV_SPECIFIC + 1), ///< Specified Mode not supported + SHA_ERROR_ENDIAN ///< Specified endian not supported +} drv_sha_error_e; + +/*----- SHA Control Codes: Mode -----*/ +typedef enum { + SHA_MODE_1 = 1, ///< SHA_1 mode + SHA_MODE_256 , ///< SHA_256 mode + SHA_MODE_224 , ///< SHA_224 mode + SHA_MODE_512 , ///< SHA_512 mode + SHA_MODE_384 , ///< SHA_384 mode + SHA_MODE_512_256 , ///< SHA_512_256 mode + SHA_MODE_512_224 ///< SHA_512_224 mode +} sha_mode_e; + +/*----- SHA Control Codes: Mode Parameters: Endian -----*/ +typedef enum { + SHA_ENDIAN_MODE_BIG = 0, ///< Big Endian Mode + SHA_ENDIAN_MODE_LITTLE , ///< Little Endian Mode +} sha_endian_mode_e; + +/** +\brief SHA Status +*/ +typedef struct { + uint32_t busy : 1; ///< calculate busy flag +} sha_status_t; + +/****** SHA Event *****/ +typedef enum { + SHA_EVENT_COMPLETE = 0 ///< calculate completed +} sha_event_e; + +typedef void (*sha_event_cb_t)(sha_event_e event); ///< Pointer to \ref sha_event_cb_t : SHA Event call back. + + +/** +\brief SHA Device Driver Capabilities. +*/ +typedef struct { + uint32_t sha1 : 1; ///< supports sha1 mode + uint32_t sha224 : 1; ///< supports sha224 mode + uint32_t sha256 : 1; ///< supports sha256 mode + uint32_t sha384 : 1; ///< supports sha384 mode + uint32_t sha512 : 1; ///< supports sha512 mode + uint32_t sha512_224 : 1; ///< supports sha512_224 mode + uint32_t sha512_256 : 1; ///< supports sha512_256 mode + uint32_t endianmode : 1; ///< supports endian mode control + uint32_t interruptmode : 1; ///< supports interrupt mode +} sha_capabilities_t; + + +// Function documentation + +/** + \brief get sha handle count. + \return sha handle count +*/ +int32_t csi_sha_get_instance_count(void); + +/** + \brief Initialize SHA Interface. 1. Initializes the resources needed for the SHA interface 2.registers event callback function + \param[in] handle Pointer to the buffer store the sha context + \param[in] cb_event Pointer to \ref sha_event_cb_t + \return return sha handle if success +*/ +sha_handle_t csi_sha_initialize(sha_handle_t handle, sha_event_cb_t cb_event); + +/** + \brief De-initialize SHA Interface. stops operation and releases the software resources used by the interface + \param[in] handle sha handle to operate. + \return error code +*/ +int32_t csi_sha_uninitialize(sha_handle_t handle); + +/** + \brief Get driver capabilities. + \param[in] handle sha handle to operate. + \return \ref sha_capabilities_t +*/ +sha_capabilities_t csi_sha_get_capabilities(sha_handle_t handle); + +/** + \brief config sha mode. + \param[in] handle sha handle to operate. + \param[in] mode \ref sha_mode_e + \param[in] endian \ref sha_endian_mode_e + \return error code +*/ +int32_t csi_sha_config(sha_handle_t handle, + sha_mode_e mode, + sha_endian_mode_e endian + ); + +/** + \brief start the engine + \param[in] handle sha handle to operate. + \param[in] context Pointer to the sha context. + \return error code +*/ +int32_t csi_sha_starts(sha_handle_t handle, void *context); + +/** + \brief updata the engine + \param[in] handle sha handle to operate. + \param[in] context Pointer to the sha context. + \param[in] input Pointer to the Source data + \param[in] len the data len + \return error code +*/ +int32_t csi_sha_update(sha_handle_t handle, void *context, const void *input, uint32_t len); + +/** + \brief finish the engine + \param[in] handle sha handle to operate. + \param[in] context Pointer to the sha context. + \param[out] output Pointer to the dest data + \return error code +*/ +int32_t csi_sha_finish(sha_handle_t handle, void *context, void *output); + +/** + \brief Get SHA status. + \param[in] handle sha handle to operate. + \return SHA status \ref sha_status_t +*/ +sha_status_t csi_sha_get_status(sha_handle_t handle); + + +#ifdef __cplusplus +} +#endif + +#endif /* _CSI_SHA_H_ */ diff --git a/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_spi.h b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_spi.h new file mode 100644 index 000000000..3e5afe570 --- /dev/null +++ b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_spi.h @@ -0,0 +1,320 @@ +/* + * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +/****************************************************************************** + * @file drv_spi.h + * @brief header file for spi driver + * @version V1.0 + * @date 02. June 2017 + ******************************************************************************/ + +#ifndef _CSI_SPI_H_ +#define _CSI_SPI_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include <stdint.h> +#include <drv_common.h> +#include <config.h> +#ifdef CONFIG_SPI_DMA +#include <drv_dmac.h> +#endif + +/// definition for spi handle. +typedef void *spi_handle_t; + +/****** SPI specific error codes *****/ +typedef enum { + EDRV_SPI_MODE = (EDRV_SPECIFIC + 1), ///< Specified Mode not supported + EDRV_SPI_FRAME_FORMAT, ///< Specified Frame Format not supported + EDRV_SPI_DATA_BITS, ///< Specified number of Data bits not supported + EDRV_SPI_BIT_ORDER, ///< Specified Bit order not supported + EDRV_SPI_SS_MODE ///< Specified Slave Select Mode not supported +} drv_spi_err_e; + +/*----- SPI Control Codes: Mode -----*/ +typedef enum { + SPI_MODE_INACTIVE = 0, ///< SPI Inactive + SPI_MODE_MASTER, ///< SPI Master (Output on MOSI, Input on MISO); arg = Bus Speed in bps + SPI_MODE_SLAVE, ///< SPI Slave (Output on MISO, Input on MOSI) + SPI_MODE_MASTER_SIMPLEX, ///< SPI Master (Output/Input on MOSI); arg = Bus Speed in bps + SPI_MODE_SLAVE_SIMPLEX ///< SPI Slave (Output/Input on MISO) +} spi_mode_e; + +/*----- SPI Control Codes: Mode Parameters: Frame Format -----*/ +typedef enum { + SPI_FORMAT_CPOL0_CPHA0 = 0, ///< Clock Polarity 0, Clock Phase 0 (default) + SPI_FORMAT_CPOL0_CPHA1, ///< Clock Polarity 0, Clock Phase 1 + SPI_FORMAT_CPOL1_CPHA0, ///< Clock Polarity 1, Clock Phase 0 + SPI_FORMAT_CPOL1_CPHA1, ///< Clock Polarity 1, Clock Phase 1 +} spi_format_e; + +/*----- SPI Control Codes: Mode Parameters: Bit Order -----*/ +typedef enum { + SPI_ORDER_MSB2LSB = 0, ///< SPI Bit order from MSB to LSB (default) + SPI_ORDER_LSB2MSB ///< SPI Bit order from LSB to MSB +} spi_bit_order_e; + +/*----- SPI Control Codes: Mode Parameters: Data Width in bits -----*/ +#define SPI_DATAWIDTH_MAX 32 /* 1 ~ 32 bit*/ + +/*----- SPI Control Codes: Mode Parameters: Slave Select Mode -----*/ +typedef enum { + /*options for SPI_MODE_MASTER/SPI_MODE_MASTER_SIMPLEX */ + SPI_SS_MASTER_UNUSED = 0, ///< SPI Slave Select when Master: Not used (default).SS line is not controlled by master, For example,SS line connected to a fixed low level + SPI_SS_MASTER_SW, ///< SPI Slave Select when Master: Software controlled. SS line is configured by software + SPI_SS_MASTER_HW_OUTPUT, ///< SPI Slave Select when Master: Hardware controlled Output.SS line is activated or deactivated automatically by hardware + SPI_SS_MASTER_HW_INPUT, ///< SPI Slave Select when Master: Hardware monitored Input.Used in multi-master configuration where a master does not drive the Slave Select when driving the bus, but rather monitors it + /*options for SPI_MODE_SLAVE/SPI_MODE_SLAVE_SIMPLEX */ + SPI_SS_SLAVE_HW, ///< SPI Slave Select when Slave: Hardware monitored (default).Hardware monitors the Slave Select line and accepts transfers only when the line is active + SPI_SS_SLAVE_SW ///< SPI Slave Select when Slave: Software controlled.Used only when the Slave Select line is not used. Software controls if the slave is responding or not(enables or disables transfers) +} spi_ss_mode_e; + +/****** SPI Slave Select Signal definitions *****/ +typedef enum { + SPI_SS_INACTIVE = 0, ///< SPI Slave Select Signal/line Inactive + SPI_SS_ACTIVE ///< SPI Slave Select Signal/line Active +} spi_ss_stat_e; + +/** +\brief SPI Status +*/ +typedef struct { + uint32_t busy : 1; ///< Transmitter/Receiver busy flag + uint32_t data_lost : 1; ///< Data lost: Receive overflow / Transmit underflow (cleared on start of transfer operation) + uint32_t mode_fault : 1; ///< Mode fault detected; optional (cleared on start of transfer operation) +} spi_status_t; + +/****** SPI Event *****/ +typedef enum { + SPI_EVENT_TRANSFER_COMPLETE = 0, ///< Data Transfer completed. Occurs after call to ARM_SPI_Send, ARM_SPI_Receive, or ARM_SPI_Transfer to indicate that all the data has been transferred. The driver is ready for the next transfer operation + SPI_EVENT_TX_COMPLETE, ///< Data Transfer completed. Occurs after call to ARM_SPI_Send, ARM_SPI_Receive, or ARM_SPI_Transfer to indicate that all the data has been transferred. The driver is ready for the next transfer operation + SPI_EVENT_RX_COMPLETE, ///< Data Transfer completed. Occurs after call to ARM_SPI_Send, ARM_SPI_Receive, or ARM_SPI_Transfer to indicate that all the data has been transferred. The driver is ready for the next transfer operation + SPI_EVENT_DATA_LOST, ///< Data lost: Receive overflow / Transmit underflow. Occurs in slave mode when data is requested/sent by master but send/receive/transfer operation has not been started and indicates that data is lost. Occurs also in master mode when driver cannot transfer data fast enough. + SPI_EVENT_MODE_FAULT ///< Master Mode Fault (SS deactivated when Master).Occurs in master mode when Slave Select is deactivated and indicates Master Mode Fault. The driver is ready for the next transfer operation. +} spi_event_e; + +typedef void (*spi_event_cb_t)(spi_event_e event, void *arg); ///< Pointer to \ref spi_event_cb_t : SPI Event call back. + +/** +\brief SPI Driver Capabilities. +*/ +typedef struct { + uint32_t simplex : 1; ///< supports Simplex Mode (Master and Slave) + uint32_t ti_ssi : 1; ///< supports TI Synchronous Serial Interface + uint32_t microwire : 1; ///< supports Microwire Interface + uint32_t event_mode_fault : 1; ///< Signal Mode Fault event: \ref spi_event_e +} spi_capabilities_t; + +/** + \brief Initialize SPI Interface. 1. Initializes the resources needed for the SPI interface 2.registers event callback function + \param[in] mosi spi pin of mosi + \param[in] miso spi pin of miso + \param[in] sclk spi pin of sclk + \param[in] ssel spi pin of ssel + \param[in] cb_event event call back function \ref spi_event_cb_t + \param[in] cb_arg argument for call back function + \return return spi handle if success +*/ +spi_handle_t csi_spi_initialize(pin_t mosi, pin_t miso, pin_t sclk, pin_t ssel, spi_event_cb_t cb_event, void *cb_arg); + +/** + \brief De-initialize SPI Interface. stops operation and releases the software resources used by the interface + \param[in] handle spi handle to operate. + \return error code +*/ +int32_t csi_spi_uninitialize(spi_handle_t handle); + +/** + \brief Get driver capabilities. + \param[in] handle spi handle to operate. + \return \ref spi_capabilities_t +*/ +spi_capabilities_t csi_spi_get_capabilities(spi_handle_t handle); + +/** + \brief config spi mode. + \param[in] handle spi handle to operate. + \param[in] sysclk sysclk for spi module. + \param[in] baud spi baud rate. if negative, then this attribute not changed + \param[in] mode \ref spi_mode_e . if negative, then this attribute not changed + \param[in] format \ref spi_format_e . if negative, then this attribute not changed + \param[in] order \ref spi_bit_order_e . if negative, then this attribute not changed + \param[in] ss_mode \ref spi_ss_mode_e . if negative, then this attribute not changed + \param[in] bit_width spi data bitwidth: (1 ~ SPI_DATAWIDTH_MAX) . if negative, then this attribute not changed + \return error code +*/ +int32_t csi_spi_config(spi_handle_t handle, + int32_t sysclk, + int32_t baud, + spi_mode_e mode, + spi_format_e format, + spi_bit_order_e order, + spi_ss_mode_e ss_mode, + int32_t bit_width); + +/** + \brief config spi default tx value. + \param[in] handle spi handle to operate. + \param[in] value default tx value + \return error code +*/ +int32_t csi_spi_set_default_tx_value(spi_handle_t handle, uint32_t value); + +/** +\brief sending data to SPI transmitter,(received data is ignored). + if non-blocking mode, this function only start the sending, + \ref spi_event_e is signaled when operation completes or error happens. + \ref csi_spi_get_status can indicates operation status. + if blocking mode, this function return after operation completes or error happens. + \param[in] handle spi handle to operate. + \param[in] data Pointer to buffer with data to send to SPI transmitter. data_type is : uint8_t for 1..8 data bits, uint16_t for 9..16 data bits,uint32_t for 17..32 data bits, + \param[in] num Number of data items to send. + \param[in] block_mode blocking and non_blocking to selcect + \return error code +*/ +int32_t csi_spi_send(spi_handle_t handle, const void *data, uint32_t num, uint8_t block_mode); + +/** + \brief receiving data from SPI receiver.transmits the default value as specified by csi_spi_set_default_tx_value + if non-blocking mode, this function only start the receiving, + \ref spi_event_e is signaled when operation completes or error happens. + \ref csi_spi_get_status can indicates operation status. + if blocking mode, this function return after operation completes or error happens. + \param[in] handle spi handle to operate. + \param[out] data Pointer to buffer for data to receive from SPI receiver + \param[in] num Number of data items to receive + \param[in] block_mode blocking and non_blocking to selcect + \return error code +*/ +int32_t csi_spi_receive(spi_handle_t handle, void *data, uint32_t num, uint8_t block_mode); + +/** + \brief sending/receiving data to/from SPI transmitter/receiver. + if non-blocking mode, this function only start the transfer, + \ref spi_event_e is signaled when operation completes or error happens. + \ref csi_spi_get_status can indicates operation status. + if blocking mode, this function return after operation completes or error happens. + \param[in] handle spi handle to operate. + \param[in] data_out Pointer to buffer with data to send to SPI transmitter + \param[out] data_in Pointer to buffer for data to receive from SPI receiver + \param[in] num_out Number of data items to send + \param[in] num_in Number of data items to receive + \param[in] block_mode blocking and non_blocking to selcect + \return error code +*/ +int32_t csi_spi_transfer(spi_handle_t handle, const void *data_out, void *data_in, uint32_t num_out, uint32_t num_in, uint8_t block_mode); + +/** + \brief abort spi transfer. + \param[in] handle spi handle to operate. + \return error code +*/ +int32_t csi_spi_abort_transfer(spi_handle_t handle); + +/** + \brief Get SPI status. + \param[in] handle spi handle to operate. + \return SPI status \ref spi_status_t +*/ +spi_status_t csi_spi_get_status(spi_handle_t handle); + +/** + \brief config the SPI mode. + \param[in] handle spi handle + \param[in] mode spi mode. \ref spi_mode_e + \return error code +*/ +int32_t csi_spi_config_mode(spi_handle_t handle, spi_mode_e mode); + +/** + \brief Set the SPI clock divider. + \param[in] handle spi handle + \param[in] baud spi baud rate + \param[in] apbfreq sysclk for spi module. + \return error code +*/ +int32_t csi_spi_config_baudrate(spi_handle_t handle, int32_t baud, int32_t apbfreq); + +/** + \brief config the SPI mode. + \param[in] handle spi handle + \param[in] order spi bit order.\ref spi_bit_order_e + \return error code +*/ +int32_t csi_spi_config_bit_order(spi_handle_t handle, spi_bit_order_e order); + +/** + \brief Set the SPI datawidth. + \param[in] handle spi handle + \param[in] datawidth date frame size in bits + \return error code +*/ +int32_t csi_spi_config_datawidth(spi_handle_t handle, int32_t datawidth); + +/** + \brief config the SPI format. + \param[in] handle spi handle + \param[in] format spi format. \ref spi_format_e + \return error code +*/ +int32_t csi_spi_config_format(spi_handle_t handle, spi_format_e format); + +/** + \brief config the SPI slave select mode. + \param[in] handle spi handle + \param[in] ss_mode spi slave select mode. \ref spi_ss_mode_e + \return error code +*/ +int32_t csi_spi_config_ss_mode(spi_handle_t handle, spi_ss_mode_e ss_mode); + +/** + \brief Get spi transferred data count. + \param[in] handle spi handle to operate. + \return number of data bytes transferred +*/ +uint32_t csi_spi_get_data_count(spi_handle_t handle); + +/** + \brief control spi power. + \param[in] handle spi handle to operate. + \param[in] state power state.\ref csi_power_stat_e. + \return error code +*/ +int32_t csi_spi_power_control(spi_handle_t handle, csi_power_stat_e state); + +/** + \brief Check if a value is available to read. + \param[in] handle spi handle to operate. + \return non-zero if a value is available +*/ +int32_t csi_spi_slave_readable(spi_handle_t handle); + +/** + \brief Control the Slave Select signal (SS). + \param[in] handle spi handle to operate. + \param[in] stat SS state. \ref spi_ss_stat_e. + \return error code +*/ +int32_t csi_spi_ss_control(spi_handle_t handle, spi_ss_stat_e stat); + + +#ifdef __cplusplus +} +#endif + +#endif /* _CSI_SPI_H_ */ diff --git a/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_tee.h b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_tee.h new file mode 100644 index 000000000..61d61b1d2 --- /dev/null +++ b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_tee.h @@ -0,0 +1,640 @@ +/* + * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/****************************************************************************** + * @file drv_tee.h + * @brief Header File for TEE + * @version V1.0 + * @date 12 Sep 2017 + ******************************************************************************/ +#ifndef _CSI_AES_H_ +#define _CSI_AES_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include <stdint.h> + +/****** TEE AES mode *****/ +typedef enum { + TEE_AES_MODE_ECB = 0, ///< TEE AES ECB mode + TEE_AES_MODE_CBC = 1, ///< TEE AES CBC mode + TEE_AES_MODE_MAX, ///< invaild mode +} +tee_aes_mode_e; + +/** + \brief TEE AES encrypt + \note Length should be a multiple of the block size (16 bytes) + After calling this function, the content of iv is updated. + \param[in] in Pointer to plaintext buffer + \param[in] in_len Plaintext buffer length + \param[in] key Pointer to secret key + \param[in] key_len Secret key size,must be 16 bytes for AES128,24 bytes for AES192 or 32byes for AES256 + \param[out] out Pointer to ciphertext buffer + \param[in] mode \ref tee_aes_mode_e + \return return 0 if successful,otherwise error code +*/ +int32_t csi_tee_aes_encrypt(const uint8_t *in, uint32_t in_len, + const uint8_t *key, uint32_t key_len, + uint8_t iv[16], + uint8_t *out, + tee_aes_mode_e mode); + +/** + \brief TEE AES decrypt + \note Length should be a multiple of the block size (16 bytes) + After calling this function, the content of iv is updated. + \param[in] in Pointer to ciphertext buffer + \param[in] in_len Ciphertext buffer length + \param[in] key Pointer to secret key + \param[in] key_len Secret key size,must be 16 bytes for AES128,24 bytes for AES192 or 32byes for AES256 + \param[out] out Pointer to plaintext buffer + \param[in] mode \ref tee_aes_mode_e + \return return 0 if successful,otherwise error code +*/ +int32_t csi_tee_aes_decrypt(const uint8_t *in, uint32_t in_len, + const uint8_t *key, uint32_t key_len, + uint8_t iv[16], + uint8_t *out, + uint32_t mode); + +/** + \brief TEE AES ECB encrypt + \note Length should be a multiple of the block size (16 bytes) + After calling this function, the content of iv is updated. + \param[in] in Pointer to plaintext buffer + \param[in] in_len Plaintext buffer length + \param[in] key Pointer to secret key + \param[in] key_len Secret key size,must be 16 bytes for AES128,24 bytes for AES192 or 32byes for AES256 + \param[out] out Pointer to ciphertext buffer + \return return 0 if successful,otherwise error code +*/ +#define csi_tee_aes_encrypt_ecb(in, in_len, key, key_len, out) \ + csi_tee_aes_encrypt(in, in_len, key, key_len, NULL, out, TEE_AES_MODE_ECB) + +/** + \brief TEE AES ECB decrypt + \note Length should be a multiple of the block size (16 bytes) + After calling this function, the content of iv is updated. + \param[in] in Pointer to ciphertext buffer + \param[in] in_len Ciphertext buffer length + \param[in] key Pointer to secret key + \param[in] key_len Secret key size,must be 16 bytes for AES128,24 bytes for AES192 or 32byes for AES256 + \param[out] out Pointer to plaintext buffer + \return return 0 if successful,otherwise error code +*/ +#define csi_tee_aes_decrypt_ecb(in, in_len, key, key_len, out) \ + csi_tee_aes_decrypt(in, in_len, key, key_len, NULL, out, TEE_AES_MODE_ECB) + +/** + \brief TEE AES CBC encrypt + \note Length should be a multiple of the block size (16 bytes) + After calling this function, the content of iv is updated. + \param[in] in Pointer to ciphertext buffer + \param[in] in_len Ciphertext buffer length + \param[in] key Pointer to secret key + \param[in] key_len Secret key size,must be 16 bytes for AES128,24 bytes for AES192 or 32byes for AES256 + \param[out] out Pointer to plaintext buffer + \return return 0 if successful,otherwise error code +*/ +#define csi_tee_aes_encrypt_cbc(in, in_len, key, key_len, iv, out) \ + csi_tee_aes_encrypt(in, in_len, key, key_len, iv, out, TEE_AES_MODE_CBC) + +/** + \brief TEE AES CBC decrypt + \note Length should be a multiple of the block size (16 bytes) + After calling this function, the content of iv is updated. + \param[in] in Pointer to ciphertext buffer + \param[in] in_len Ciphertext buffer length + \param[in] key Pointer to secret key + \param[in] key_len Secret key size,must be 16 bytes for AES128,24 bytes for AES192 or 32byes for AES256 + \param[out] out Pointer to plaintext buffer + \return return 0 if successful,otherwise error code +*/ +#define csi_tee_aes_decrypt_cbc(in, in_len, key, key_len, iv, out) \ + csi_tee_aes_decrypt(in, in_len, key, key_len, iv, out, TEE_AES_MODE_CBC) + +/** + \brief TEE BASE64 encode/decode + \param[in] in Pointer to input data buffer + \param[in] in_len input data buffer length + \param[out] out Pointer to output data buffer + \param[out] out_len output data buffer length + \param[in] is_encode 1 encode 0 decode + \param[in] wsafe base64 websafe feature,set 1, replace "+/" with "-_" + \return return 0 if successful,otherwise error code +*/ +int32_t csi_tee_base64(const uint8_t *in, uint32_t in_len, + uint8_t *out, uint32_t *out_len, + uint32_t is_encode, + uint32_t wsafe); + +/** + \brief TEE BASE64 encode + \param[in] in Pointer to input data buffer + \param[in] in_len input data buffer length + \param[out] out Pointer to output data buffer + \param[out] out_len output data buffer length + \return return 0 if successful,otherwise error code +*/ +#define csi_tee_base64_encode(in,in_len,out,out_len) \ + csi_tee_base64(in,in_len,out,out_len,1,0) + +/** + \brief TEE BASE64 decode + \param[in] in Pointer to input data buffer + \param[in] in_len input data buffer length + \param[out] out Pointer to output data buffer + \param[out] out_len output data buffer length + \return return 0 if successful,otherwise error code +*/ +#define csi_tee_base64_decode(in,in_len,out,out_len) \ + csi_tee_base64(in,in_len,out,out_len,0,0) + +/** + \brief TEE BASE64 web safe encode + \param[in] in Pointer to input data buffer + \param[in] in_len input data buffer length + \param[out] out Pointer to output data buffer + \param[out] out_len output data buffer length + \return return 0 if successful,otherwise error code +*/ +#define csi_tee_base64_websafe_encode(in,in_len,out,out_len) \ + csi_tee_base64(in,in_len,out,out_len,1,1) + +/** + \brief TEE BASE64 web safe decode + \param[in] in Pointer to input data buffer + \param[in] in_len input data buffer length + \param[out] out Pointer to output data buffer + \param[out] out_len output data buffer length + \return return 0 if successful,otherwise error code +*/ +#define csi_tee_base64_websafe_decode(in,in_len,out,out_len) \ + csi_tee_base64(in,in_len,out,out_len,0,1) + +/** + \brief TEE obtain CID from Key Provisioning + \param[out] out Pointer to cid buffer + \param[out] out_len cid buffer length,if cid obtain successfully, + out_len is updated to actual cid sizes + \return return 0 if successful,otherwise error code +*/ +int32_t csi_tee_get_cid(uint8_t *out, uint32_t *out_len); + +/****** lpm mode *****/ +typedef enum { + TEE_LPM_MODE_WAIT = 0, ///< lpm wait + TEE_LPM_MODE_DOZE = 1, ///< lpm doze + TEE_LPM_MODE_STOP = 2, ///< lpm stop + TEE_LPM_MODE_STANDBY = 3, ///< lpm standby + TEE_LPM_MODE_MAX, +} tee_lpm_mode_e; + +/** + \brief TEE set low power mode + \param[in] gate not use for now + \param[in] irqid not use for now + \param[in] mode \ref tee_lpm_mode_e + \return return 0 if successful,otherwise error code +*/ +int32_t csi_tee_enter_lpm(uint32_t gate, uint32_t irqid, tee_lpm_mode_e mode); + +/** + \brief TEE obtain manifest info from manifest table + \note call csi_tee_get_sys_img_info, csi_tee_get_sys_os_version or csi_tee_get_sys_partition is better + \param[out] out Pointer to info buffer + \param[out] out_len Info buffer length,if info obtain successfully, + out_len is updated to actual sizes + \param[in] name info name + \return return 0 if successful,otherwise error code +*/ +int32_t csi_tee_get_manifest_info(uint8_t *out, uint32_t *out_len, char *name); + +/** + \brief TEE obtain image buffer from manifest table + \param[out] out Pointer to image buffer + \param[out] out_len Image buffer length,if info obtain successfully, + out_len is updated to actual image buffer sizes + \param[in] img_name image name + \return return 0 if successful,otherwise error code +*/ +#define csi_tee_get_sys_img_info(out,out_len,img_name) \ + csi_tee_get_manifest_info(out,out_len,img_name) + +/** + \brief TEE obtain os version from manifest table + \param[out] out Pointer to os version buffer + \param[out] out_len OS version buffer length,if info obtain successfully, + out_len is updated to actual os version buffer sizes + \return return 0 if successful,otherwise error code +*/ +#define csi_tee_get_sys_os_version(out,out_len) \ + csi_tee_get_manifest_info(out,out_len,"os_v") + +/** + \brief TEE obtain partition buffer from manifest table + \param[out] out Pointer to partition buffer + \param[out] out_len Partition buffer length,if info obtain successfully, + out_len is updated to actual partition buffer sizes + \return return 0 if successful,otherwise error code +*/ +#define csi_tee_get_sys_partition(out,out_len) \ + csi_tee_get_manifest_info(out,out_len,"sys_p") + +/** + \brief TEE set random seed + \param[in] Seed random sedd + \return return 0 if successful,otherwise error code +*/ +int32_t csi_tee_rand_seed(uint32_t seed); + +/** + \brief TEE ramdom date generation + \param[out] out Pointer to random data buffer + \param[in] out_len Data buffer length + \return return 0 if successful,otherwise error code +*/ +int32_t csi_tee_rand_generate(uint8_t *out, uint32_t out_len); + +/****** TEE RSA sign type *****/ +typedef enum { + TEE_RSA_MD5 = 0, ///< MD5 + TEE_RSA_SHA1 = 1, ///< SHA1 + TEE_RSA_SHA256 = 3, ///< SHA256 + TEE_RSA_SIGN_TYPE_MAX, ///< invailed type +} tee_rsa_sign_type_e; + +/** + \brief TEE RSA sign with private key + \param[in] in Pointer to digest buffer + \param[in] in_len Digest buffer length + \param[in] key Pointer to private key,key contains n, e, d + \param[in] key_len Private key size,must be 128*3 = 384 bytes for RSA1024, 256*3 = 768 bytes for RSA2048 + \param[out] sign Pointer to sign buffer + \param[out] sign_len Sign buffer length + \param[in] type \ref tee_rsa_sign_type_e + \return return 0 if successful,otherwise error code +*/ +int32_t csi_tee_rsa_sign(const uint8_t *in, uint32_t in_len, + const uint8_t *key, uint32_t key_len, + uint8_t *sign, uint32_t *sign_len, + tee_rsa_sign_type_e type); + +/** + \brief TEE RSA verify with public key + \param[in] in Pointer to digest buffer + \param[in] in_len Digest buffer length + \param[in] key Pointer to public key,key contains n, e + \param[in] key_len Public key size,must be 128*2 = 256 bytes for RSA1024, 256*2 = 512 bytes for RSA2048 + \param[in] sign Pointer to sign buffer + \param[in] sign_len Sign buffer length + \param[in] type \ref tee_rsa_sign_type_e + \return return 0 if verify successful,otherwise error code +*/ +int32_t csi_tee_rsa_verify(const uint8_t *in, uint32_t in_len, + const uint8_t *key, uint32_t key_len, + uint8_t *sign, uint32_t sign_len, + tee_rsa_sign_type_e type); + +/****** TEE RSA padding mode *****/ +typedef enum { + TEE_RSA_PKCS1_PADDING = 0x01, ///< RSA PKCS padding mode + TEE_RSA_NO_PADDING = 0x02, ///< RSA no padding mode +} tee_rsa_padding_mode_e; + +/** + \brief TEE RSA encrypt with public key + \param[in] in Pointer to plaintext buffer + \param[in] in_len Plaintext buffer length + \param[in] key Pointer to public key,key contains n, e + \param[in] key_len Public key size, must be 128*2 = 256 bytes for RSA1024, 256*2 = 512 bytes for RSA2048 + \param[in] out Pointer to ciphertext buffer + \param[in] out_len Ciphertext buffer length + \param[in] padding \ref tee_rsa_padding_mode_e + \return return 0 if successful,otherwise error code +*/ +int32_t csi_tee_rsa_encrypt(const uint8_t *in, uint32_t in_len, + const uint8_t *key, uint32_t key_len, + uint8_t *out, uint32_t *out_len, + tee_rsa_padding_mode_e padding); +/** + \brief TEE RSA decrypt with private key + \param[in] in Pointer to ciphertext buffer + \param[in] in_len Ciphertext buffer length + \param[in] key Pointer to private key,key contains n, e, d + \param[in] key_len Private key size,must be 128*3 = 384 bytes for RSA1024, 256*3 = 768 bytes for RSA2048 + \param[in] out Pointer to plaintext buffer + \param[in] out_len Plaintext buffer length + \param[in] padding \ref tee_rsa_padding_mode_e + \return return 0 if successful,otherwise error code +*/ +int32_t csi_tee_rsa_decrypt(const uint8_t *in, uint32_t in_len, + const uint8_t *key, uint32_t key_len, + uint8_t *out, uint32_t *out_len, + tee_rsa_padding_mode_e padding); + +/** + \brief TEE RSA sign with internal private key + \note Only use if key provisioning exist + \param[in] in Pointer to digest buffer + \param[in] in_len Digest buffer length + \param[out] sign Pointer to sign buffer + \param[out] sign_len Sign buffer length + \param[in] type \ref tee_rsa_sign_type_e + \return return 0 if successful,otherwise error code +*/ +#define csi_tee_cid_rsa_sign(in,in_len,sign,sign_len,type) \ + csi_tee_rsa_sign(in,in_len,NULL,0,sign,sign_len,type) + +/** + \brief TEE RSA verify with internal public key + \note Only use if key provisioning exist + \param[in] in Pointer to digest buffer + \param[in] in_len Digest buffer length + \param[in] sign Pointer to sign buffer + \param[in] sign_len Sign buffer length + \param[in] type \ref tee_rsa_sign_type_e + \return return 0 if verify successful,otherwise error code +*/ +#define csi_tee_cid_rsa_verify(in,in_len,sign,sign_len,type) \ + csi_tee_rsa_verify(in,in_len,NULL,0,sign,sign_len,type) + +/** + \brief TEE RSA encrypt with internal public key + \note Only use if key provisioning exist + \param[in] in Pointer to plaintext buffer + \param[in] in_len Plaintext buffer length + \param[in] out Pointer to ciphertext buffer + \param[in] out_len Ciphertext buffer length + \param[in] padding \ref tee_rsa_padding_mode_e + \return return 0 if successful,otherwise error code +*/ +#define csi_tee_cid_rsa_encrypt(in,in_len,out,out_len,padding) \ + csi_tee_rsa_encrypt(in,in_len,NULL,0,out,out_len,padding) + +/** + \brief TEE RSA decrypt with internal private key + \note Only use if key provisioning exist + \param[in] in Pointer to ciphertext buffer + \param[in] in_len Ciphertext buffer length + \param[in] key Pointer to private key,key contains n, e, d + \param[in] key_len Private key size,must be 128*3 = 384 bytes for RSA1024, 256*3 = 768 bytes for RSA2048 + \param[in] out Pointer to plaintext buffer + \param[in] out_len Plaintext buffer length + \param[in] padding \ref tee_rsa_padding_mode_e + \return return 0 if successful,otherwise error code +*/ +#define csi_tee_cid_rsa_decrypt(in,in_len,out,out_len,padding) \ + csi_tee_rsa_decrypt(in,in_len,NULL,0,out,out_len,padding) + +/** + \brief verify boot image with boot public key + \note Only use if key provisioning exist + \param[in] in Pointer to digest buffer + \param[in] in_len Digest buffer length + \param[in] sign Pointer to sign buffer + \param[in] sign_len Sign buffer length + \param[in] type \ref tee_rsa_sign_type_e + \return return 0 if verify successful,otherwise error code +*/ +int32_t csi_tee_img_rsa_verify(const uint8_t *in, uint32_t in_len, + uint8_t *sign, uint32_t sign_len, + tee_rsa_sign_type_e type); + +/****** TEE HASH operation mode *****/ +typedef enum { + TEE_HASH_OP_NONE = 0, ///< No operation + TEE_HASH_OP_START = 1, ///< HASH init + TEE_HASH_OP_UPDATA = 2, ///< HASH update + TEE_HASH_OP_FINISH = 3, ///< HASH finish + TEE_HASH_OP_MAX, ///< invailed operation +} tee_hash_op_e; + +/****** TEE HMAC type *****/ +typedef enum { + TEE_HMAC_SHA1 = 1, ///< HMAC with SHA1 +} tee_hmac_type_e; + +/** + \brief TEE HAMC + \note Call csi_tee_hmac_digest is better + out buffer size must be large enough according to type, eg. 20 bytes for TEE_HMAC_SHA1 + \param[in] in Pointer to input data buffer + \param[in] in_len Input data buffer length + \param[in] key Pointer to key buffer + \param[in] key_len Key buffer size + \param[out] out Pointer to output date buffer + \param[in] type \ref tee_hmac_type_e + \param[in] hash_op \ref tee_hash_op_e + \param[in] ctx Pointer to context of hmac + \return return 0 if successful,otherwise error code +*/ +int32_t csi_tee_hmac(const uint8_t *in, uint32_t in_len, + const uint8_t *key, uint32_t key_len, + uint8_t *out, + tee_hmac_type_e type, + tee_hash_op_e hash_op, + uint32_t *ctx); + +/** + \brief TEE HAMC digest + \note out buffer size must be large enough according to type, eg. 20 bytes for TEE_HMAC_SHA1 + \param[in] in Pointer to input data buffer + \param[in] in_len Input data buffer length + \param[in] key Pointer to key buffer + \param[in] key_len Key buffer size + \param[out] out Pointer to output date buffer + \param[in] type \ref tee_hmac_type_e + \return return 0 if successful,otherwise error code +*/ +#define csi_tee_hmac_digest(in,in_len,key,key_len,out,type) \ + csi_tee_hmac(in,in_len,key,key_len,out,type,TEE_HASH_OP_NONE,NULL) + +/****** TEE SHA type *****/ +typedef enum { + TEE_SHA1 = 0, ///< SHA1 + TEE_SHA256 = 1, ///< SHA256 + TEE_SHA224 = 2, ///< SHA224 + TEE_SHA384 = 3, ///< SHA384 + TEE_SHA512 = 4, ///< SHA512 + TEE_SHA_MAX, ///< invaild sha type +} tee_sha_type_t; + +/** + \brief TEE SHA + \note Call csi_tee_sha_digest, csi_tee_sha_start, csi_tee_sha_update or csi_tee_sha_finish is better + out buffer size must be large enough according to type, eg. 20 bytes for TEE_SHA1, 32 bytes for TEE_SHA256 + \param[in] in Pointer to input data buffer + \param[in] in_len Input data buffer length + \param[out] out Pointer to output date buffer + \param[in] type \ref tee_sha_type_t + \param[in] hash_op \ref tee_hash_op_e + \param[in] ctx Pointer to context of sha + \return return 0 if successful,otherwise error code +*/ +int32_t csi_tee_sha(const uint8_t *in, uint32_t in_len, + uint8_t *out, + tee_sha_type_t type, + tee_hash_op_e hash_op, + void *ctx); + +/** + \brief TEE SHA digest + \note out buffer size must be large enough according to type, eg. 20 bytes for TEE_SHA1, 32 bytes for TEE_SHA256 + \param[in] in Pointer to input data buffer + \param[in] in_len Input data buffer length + \param[out] out Pointer to output date buffer + \param[in] type \ref tee_sha_type_t + \return return 0 if successful,otherwise error code +*/ +#define csi_tee_sha_digest(in,in_len,out,type) \ + csi_tee_sha(in,in_len,out,type,TEE_HASH_OP_NONE,NULL); + +/** + \brief TEE SHA start, initial sha + \param[in] type \ref tee_sha_type_t + \param[in] ctx Pointer to context of sha + \return return 0 if successful,otherwise error code +*/ +#define csi_tee_sha_start(type,ctx) \ + csi_tee_sha(NULL,0,NULL,type,TEE_HASH_OP_START,ctx); + +/** + \brief TEE SHA update, update data + \param[in] in Pointer to input data buffer + \param[in] in_len Input data buffer length + \param[in] ctx Pointer to context of sha + \return return 0 if successful,otherwise error code +*/ +#define csi_tee_sha_update(in,in_len,ctx) \ + csi_tee_sha(in,in_len,NULL,0,TEE_HASH_OP_UPDATA,ctx); + +/** + \brief TEE SHA digest, get sha digest + \note out buffer size must be large enough according to type, eg. 20 bytes for TEE_SHA1, 32 bytes for TEE_SHA256 + \param[out] out Pointer to output date buffer + \param[in] ctx Pointer to context of sha + \return return 0 if successful,otherwise error code +*/ +#define csi_tee_sha_finish(out,ctx) \ + csi_tee_sha(NULL,0,out,0,TEE_HASH_OP_FINISH,ctx); + +/** + \brief TEE get device name and product key + \param[in] name_encrypted Pointer to device name ciphertext + \param[in] name_encrypted_len device name ciphertext length + \param[in] product_key_encrypted Pointer to device product key ciphertext + \param[in] product_key_encrypted_len Device product key ciphertext length + \param[out] name Pointer to device name + \param[out] name_len Device name length + \param[out] product_key Pointer to device product key + \param[out] product_key_len Device product key length + \return return 0 if successful,otherwise error code +*/ +int32_t csi_tee_dev_info_get(const uint8_t *name_encrypted, uint32_t name_encrypted_len, + const uint8_t *product_key_encrypted, uint32_t product_key_encrypted_len, + const uint8_t *name, uint32_t *name_len, + const uint8_t *product_key, uint32_t *product_key_len); + +/** + \brief TEE device info sign + \param[in] in Pointer to input date buffer + \param[in] in_len Input data buffer length + \param[in] device_secret Pointer to device secret ciphertext + \param[in] device_secret_len Device secret ciphertext length + \param[out] sign Pointer to signed buffer + \param[out] sign_len Signed buffer length + \return return 0 if successful,otherwise error code +*/ +int32_t csi_tee_dev_info_sign(const uint8_t *in, uint32_t in_len, + const uint8_t *device_secret, uint32_t device_secret_len, + const uint8_t *sign, uint32_t *sign_len); + +/** + \brief TEE device info encrypt/decrypt + \param[in] in Pointer to input date buffer + \param[in] in_len Input data buffer length + \param[in] out Pointer to output date buffer + \param[in] out_len Onput data buffer length + \param[in] is_enc 1 incrypt 0 decrypt + \return return 0 if successful,otherwise error code +*/ +int32_t csi_tee_dev_info_crypt(const uint8_t *in, uint32_t in_len, + uint8_t *out, uint32_t *out_len, + uint8_t is_enc); + +/** + \brief TEE device info encrypt + \param[in] in Pointer to input date buffer + \param[in] in_len Input data buffer length + \param[in] out Pointer to output date buffer + \param[in] out_len Onput data buffer length + \return return 0 if successful,otherwise error code +*/ +#define csi_tee_dev_info_encrypt(in, in_len, out, out_len) \ + csi_tee_dev_info_crypt(in, in_len, out, out_len, 1) + +/** + \brief TEE device info decrypt + \param[in] in Pointer to input date buffer + \param[in] in_len Input data buffer length + \param[in] out Pointer to output date buffer + \param[in] out_len Onput data buffer length + \return return 0 if successful,otherwise error code +*/ +#define csi_tee_dev_info_decrypt(in, in_len, out, out_len) \ + csi_tee_dev_info_crypt(in, in_len, out, out_len, 0) + +/****** system clock source type *****/ +typedef enum { + IHS_CLK = 0, ///< internel clock source + EHS_CLK = 1 ///< externel clock source +} clk_src_e; + +/****** system clock value scope *****/ +typedef enum { + OSR_8M_CLK_16M = 0x80204, ///< register value for clock 16M + OSR_8M_CLK_24M = 0x80206, ///< register value for clock 24M + OSR_8M_CLK_32M = 0x80208, ///< register value for clock 32M + OSR_8M_CLK_40M = 0x8020a, ///< register value for clock 40M + OSR_8M_CLK_48M = 0x8020c ///< register value for clock 48M +} clk_val_e; + +/** + \brief Set system frequence + \param[in] clk_src indicate clock source type + \param[in] clk_val system freqence to be set + \return return 0 if successful,otherwise error code +*/ +int32_t csi_tee_set_sys_freq(uint32_t clk_src, uint32_t clk_val); + +/** + \brief Get system frequence + \param[in] clk_val value address to store system freqence + \return return 0 if successful,otherwise error code +*/ +int32_t csi_tee_get_sys_freq(uint32_t *clk_val); + + +int32_t csi_tee_xor(uint8_t *out, uint32_t *out_len); +#ifdef __cplusplus +} +#endif + +#endif /* _CSI_AES_H_ */ diff --git a/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_timer.h b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_timer.h new file mode 100644 index 000000000..a2474194f --- /dev/null +++ b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_timer.h @@ -0,0 +1,168 @@ +/* + * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +/****************************************************************************** + * @file drv_timer.h + * @brief header file for timer driver + * @version V1.0 + * @date 02. June 2017 + ******************************************************************************/ + +#ifndef _CSI_TIMER_H_ +#define _CSI_TIMER_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include <stdint.h> +#include <drv_common.h> + +/// definition for timer handle. +typedef void *timer_handle_t; + +/*----- TIMER Control Codes: Mode -----*/ +typedef enum { + TIMER_MODE_FREE_RUNNING = 0, ///< free running mode + TIMER_MODE_RELOAD ///< reload mode +} timer_mode_e; + +/** +\brief TIMER Status +*/ +typedef struct { + uint32_t active : 1; ///< timer active flag + uint32_t timeout : 1; ///< timeout flag +} timer_status_t; + +/** +\brief TIMER Event +*/ +typedef enum { + TIMER_EVENT_TIMEOUT = 0 ///< time out event +} timer_event_e; + +typedef void (*timer_event_cb_t)(timer_event_e event, void *arg); ///< Pointer to \ref timer_event_cb_t : TIMER Event call back. + +/** +\brief TIMER Device Driver Capabilities. +*/ +typedef struct { + uint32_t interrupt_mode : 1; ///< supports Interrupt mode +} timer_capabilities_t; + +/** + \brief get timer instance count. + \return timer instance count +*/ +int32_t csi_timer_get_instance_count(void); + +/** + \brief Initialize TIMER Interface. 1. Initializes the resources needed for the TIMER interface 2.registers event callback function + \param[in] idx instance timer index + \param[in] cb_event Pointer to \ref timer_event_cb_t + \param[in] cb_arg arguments of cb_event + \return pointer to timer instance +*/ +timer_handle_t csi_timer_initialize(int32_t idx, timer_event_cb_t cb_event, void *cb_arg); + +/** + \brief De-initialize TIMER Interface. stops operation and releases the software resources used by the interface + \param[in] handle timer handle to operate. + \return error code +*/ +int32_t csi_timer_uninitialize(timer_handle_t handle); + +/** + \brief Get driver capabilities. + \param[in] handle timer handle to operate. + \return \ref timer_capabilities_t +*/ +timer_capabilities_t csi_timer_get_capabilities(timer_handle_t handle); + +/** + \brief config timer mode. + \param[in] handle timer handle to operate. + \param[in] mode \ref timer_mode_e + \return error code +*/ +int32_t csi_timer_config(timer_handle_t handle, timer_mode_e mode); + +/** + \brief Set timer. + \param[in] handle timer handle to operate. + \param[in] timeout the timeout value in microseconds(us). + \return error code +*/ +int32_t csi_timer_set_timeout(timer_handle_t handle, uint32_t timeout); + +/** + \brief Start timer. + \param[in] handle timer handle to operate. + \param[in] apbfreq APB frequency + \return error code +*/ +int32_t csi_timer_start(timer_handle_t handle, uint32_t apbfreq); + +/** + \brief Stop timer. + \param[in] handle timer handle to operate. + \return error code +*/ +int32_t csi_timer_stop(timer_handle_t handle); + +/** + \brief suspend timer. + \param[in] handle timer handle to operate. + \return error code +*/ +int32_t csi_timer_suspend(timer_handle_t handle); + +/** + \brief resume timer. + \param[in] handle timer handle to operate. + \return error code +*/ +int32_t csi_timer_resume(timer_handle_t handle); + +/** + \brief get timer current value + \param[in] handle timer handle to operate. + \param[in] value timer current value + \return error code +*/ +int32_t csi_timer_get_current_value(timer_handle_t handle, uint32_t *value); + +/** + \brief Get TIMER status. + \param[in] handle timer handle to operate. + \return TIMER status \ref timer_status_t +*/ +timer_status_t csi_timer_get_status(timer_handle_t handle); + +/** + \brief get timer reload value + \param[in] handle timer handle to operate. + \param[in] value timer reload value + \return error code +*/ +int32_t csi_timer_get_load_value(timer_handle_t handle, uint32_t *value); + +#ifdef __cplusplus +} +#endif + +#endif /* _CSI_TIMER_H_ */ + diff --git a/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_trng.h b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_trng.h new file mode 100644 index 000000000..5646c4c76 --- /dev/null +++ b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_trng.h @@ -0,0 +1,118 @@ +/* + * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +/****************************************************************************** + * @file drv_trng.h + * @brief header file for trng driver + * @version V1.0 + * @date 02. June 2017 + ******************************************************************************/ +#ifndef _CSI_TRNG_H_ +#define _CSI_TRNG_H_ + +#include "drv_common.h" +#ifdef __cplusplus +extern "C" { +#endif + +#include <stdint.h> + + +/// definition for trng handle. +typedef void *trng_handle_t; +/****** TRNG specific error codes *****/ +typedef enum { + TRNG_ERROR_MODE = 0, ///< Specified Mode not supported +} drv_trng_error_e; + +/*----- TRNG Control Codes: Mode -----*/ +typedef enum { + TRNG_MODE_LOWPOWER = 0, ///< TRNG Low power Mode + TRNG_MODE_NORMAL ///< TRNG Normal Mode +} trng_mode_e; + +/** +\brief TRNG Status +*/ +typedef struct { + uint32_t busy : 1; + uint32_t data_valid : 1; ///< Data is valid flag +} trng_status_t; + +/****** TRNG Event *****/ +typedef enum { + TRNG_EVENT_DATA_GENERATE_COMPLETE = 0 ///< Get data from TRNG success +} trng_event_e; +typedef void (*trng_event_cb_t)(trng_event_e event); ///< Pointer to \ref trng_event_cb_t : TRNG Event call back. + +/** +\brief TRNG Device Driver Capabilities. +*/ +typedef struct { + uint32_t lowper_mode : 1; ///< supports low power mode +} trng_capabilities_t; + +// Function documentation + +/** + \brief get trng handle count. + \return trng handle count +*/ +int32_t csi_trng_get_instance_count(void); + +/** + \brief Initialize TRNG Interface. 1. Initializes the resources needed for the TRNG interface 2.registers event callback function + \param[in] idx must not exceed return value of csi_trng_get_instance_count() + \param[in] cb_event Pointer to \ref trng_event_cb_t + \return pointer to trng handle +*/ +trng_handle_t csi_trng_initialize(int32_t idx, trng_event_cb_t cb_event); + +/** + \brief De-initialize TRNG Interface. stops operation and releases the software resources used by the interface + \param[in] handle trng handle to operate. + \return error code +*/ +int32_t csi_trng_uninitialize(trng_handle_t handle); + +/** + \brief Get driver capabilities. + \param[in] handle trng handle to operate. + \return \ref trng_capabilities_t +*/ +trng_capabilities_t csi_trng_get_capabilities(trng_handle_t handle); + +/** + \brief Get data from the TRNG. + \param[in] handle trng handle to operate. + \param[out] data Pointer to buffer with data get from TRNG + \param[in] num Number of data items to obtain + \return error code +*/ +int32_t csi_trng_get_data(trng_handle_t handle, void *data, uint32_t num); + +/** + \brief Get TRNG status. + \param[in] handle trng handle to operate. + \return TRNG status \ref trng_status_t +*/ +trng_status_t csi_trng_get_status(trng_handle_t handle); + + +#ifdef __cplusplus +} +#endif + +#endif /* _CSI_TRNG_H_ */ diff --git a/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_usart.h b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_usart.h new file mode 100644 index 000000000..cd8bbf6d7 --- /dev/null +++ b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_usart.h @@ -0,0 +1,495 @@ +/* + * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +/****************************************************************************** + * @file drv_usart.h + * @brief header file for usart driver + * @version V1.0 + * @date 02. June 2017 + ******************************************************************************/ + +#ifndef _CSI_USART_H_ +#define _CSI_USART_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include <drv_common.h> + +/// definition for usart handle. +typedef void *usart_handle_t; + +/****** USART specific error codes *****/ +typedef enum { + EDRV_USART_MODE = (EDRV_SPECIFIC + 1), ///< Specified Mode not supported + EDRV_USART_BAUDRATE, ///< Specified baudrate not supported + EDRV_USART_DATA_BITS, ///< Specified number of Data bits not supported + EDRV_USART_PARITY, ///< Specified Parity not supported + EDRV_USART_STOP_BITS, ///< Specified number of Stop bits not supported + EDRV_USART_FLOW_CONTROL, ///< Specified Flow Control not supported + EDRV_USART_CPOL, ///< Specified Clock Polarity not supported + EDRV_USART_CPHA ///< Specified Clock Phase not supported +} drv_usart_error_e; + +/*----- USART Control Codes: Mode -----*/ +typedef enum { + USART_MODE_ASYNCHRONOUS = 0, ///< USART (Asynchronous) + USART_MODE_SYNCHRONOUS_MASTER , ///< Synchronous Master + USART_MODE_SYNCHRONOUS_SLAVE , ///< Synchronous Slave (external clock signal) + USART_MODE_SINGLE_WIRE , ///< USART Single-wire (half-duplex) + USART_MODE_SINGLE_IRDA , ///< UART IrDA + USART_MODE_SINGLE_SMART_CARD , ///< UART Smart Card +} usart_mode_e; + +/*----- USART Control Codes: Mode Parameters: Data Bits -----*/ +typedef enum { + USART_DATA_BITS_5 = 0, ///< 5 Data bits + USART_DATA_BITS_6 , ///< 6 Data bit + USART_DATA_BITS_7 , ///< 7 Data bits + USART_DATA_BITS_8 , ///< 8 Data bits (default) + USART_DATA_BITS_9 ///< 9 Data bits +} usart_data_bits_e; + +/*----- USART Control Codes: Mode Parameters: Parity -----*/ +typedef enum { + USART_PARITY_NONE = 0, ///< No Parity (default) + USART_PARITY_EVEN , ///< Even Parity + USART_PARITY_ODD , ///< Odd Parity + USART_PARITY_1 , ///< Parity forced to 1 + USART_PARITY_0 ///< Parity forced to 0 +} usart_parity_e; + +/*----- USART Control Codes: Mode Parameters: Stop Bits -----*/ +typedef enum { + USART_STOP_BITS_1 = 0, ///< 1 Stop bit (default) + USART_STOP_BITS_2 , ///< 2 Stop bits + USART_STOP_BITS_1_5 , ///< 1.5 Stop bits + USART_STOP_BITS_0_5 ///< 0.5 Stop bits +} usart_stop_bits_e; + +/*----- USART Control Codes: Mode Parameters: Clock Polarity (Synchronous mode) -----*/ +typedef enum { + USART_CPOL0 = 0, ///< CPOL = 0 (default). data are captured on rising edge (low->high transition) + USART_CPOL1 ///< CPOL = 1. data are captured on falling edge (high->lowh transition) +} usart_cpol_e; + +/*----- USART Control Codes: Mode Parameters: Clock Phase (Synchronous mode) -----*/ +typedef enum { + USART_CPHA0 = 0, ///< CPHA = 0 (default). sample on first (leading) edge + USART_CPHA1 ///< CPHA = 1. sample on second (trailing) edge +} usart_cpha_e; + +/*----- USART Control Codes: flush data type-----*/ +typedef enum { + USART_FLUSH_WRITE, + USART_FLUSH_READ +} usart_flush_type_e; + +/*----- USART Control Codes: flow control type-----*/ +typedef enum { + USART_FLOWCTRL_NONE, + USART_FLOWCTRL_CTS, + USART_FLOWCTRL_RTS, + USART_FLOWCTRL_CTS_RTS +} usart_flowctrl_type_e; + +/*----- USART Modem Control -----*/ +typedef enum { + USART_RTS_CLEAR, ///< Deactivate RTS + USART_RTS_SET, ///< Activate RTS + USART_DTR_CLEAR, ///< Deactivate DTR + USART_DTR_SET ///< Activate DTR +} usart_modem_ctrl_e; + +/*----- USART Modem Status -----*/ +typedef struct { + uint32_t cts : 1; ///< CTS state: 1=Active, 0=Inactive + uint32_t dsr : 1; ///< DSR state: 1=Active, 0=Inactive + uint32_t dcd : 1; ///< DCD state: 1=Active, 0=Inactive + uint32_t ri : 1; ///< RI state: 1=Active, 0=Inactive +} usart_modem_stat_t; + +/*----- USART Control Codes: on-off intrrupte type-----*/ +typedef enum { + USART_INTR_WRITE, + USART_INTR_READ +} usart_intr_type_e; + +/** +\brief USART Status +*/ +typedef struct { + uint32_t tx_busy : 1; ///< Transmitter busy flag + uint32_t rx_busy : 1; ///< Receiver busy flag + uint32_t tx_underflow : 1; ///< Transmit data underflow detected (cleared on start of next send operation)(Synchronous Slave) + uint32_t rx_overflow : 1; ///< Receive data overflow detected (cleared on start of next receive operation) + uint32_t rx_break : 1; ///< Break detected on receive (cleared on start of next receive operation) + uint32_t rx_framing_error : 1; ///< Framing error detected on receive (cleared on start of next receive operation) + uint32_t rx_parity_error : 1; ///< Parity error detected on receive (cleared on start of next receive operation) +} usart_status_t; + +/****** USART Event *****/ +typedef enum { + USART_EVENT_SEND_COMPLETE = 0, ///< Send completed; however USART may still transmit data + USART_EVENT_RECEIVE_COMPLETE = 1, ///< Receive completed + USART_EVENT_TRANSFER_COMPLETE = 2, ///< Transfer completed + USART_EVENT_TX_COMPLETE = 3, ///< Transmit completed (optional) + USART_EVENT_TX_UNDERFLOW = 4, ///< Transmit data not available (Synchronous Slave) + USART_EVENT_RX_OVERFLOW = 5, ///< Receive data overflow + USART_EVENT_RX_TIMEOUT = 6, ///< Receive character timeout (optional) + USART_EVENT_RX_BREAK = 7, ///< Break detected on receive + USART_EVENT_RX_FRAMING_ERROR = 8, ///< Framing error detected on receive + USART_EVENT_RX_PARITY_ERROR = 9, ///< Parity error detected on receive + USART_EVENT_CTS = 10, ///< CTS state changed (optional) + USART_EVENT_DSR = 11, ///< DSR state changed (optional) + USART_EVENT_DCD = 12, ///< DCD state changed (optional) + USART_EVENT_RI = 13, ///< RI state changed (optional) + USART_EVENT_RECEIVED = 14, ///< Received data, but no send()/receive()/transfer() called +} usart_event_e; + +typedef void (*usart_event_cb_t)(usart_event_e event, void *cb_arg); ///< Pointer to \ref usart_event_cb_t : USART Event call back. + +/** +\brief USART Driver Capabilities. +*/ +typedef struct { + uint32_t asynchronous : 1; ///< supports UART (Asynchronous) mode + uint32_t synchronous_master : 1; ///< supports Synchronous Master mode + uint32_t synchronous_slave : 1; ///< supports Synchronous Slave mode + uint32_t single_wire : 1; ///< supports UART Single-wire mode + uint32_t irda : 1; ///< supports UART IrDA mode + uint32_t smart_card : 1; ///< supports UART Smart Card mode + uint32_t smart_card_clock : 1; ///< Smart Card Clock generator available + uint32_t flow_control_rts : 1; ///< RTS Flow Control available + uint32_t flow_control_cts : 1; ///< CTS Flow Control available + uint32_t event_tx_complete : 1; ///< Transmit completed event: \ref ARM_USART_EVENT_TX_COMPLETE + uint32_t event_rx_timeout : 1; ///< Signal receive character timeout event: \ref ARM_USART_EVENT_RX_TIMEOUT + uint32_t rts : 1; ///< RTS Line: 0=not available, 1=available + uint32_t cts : 1; ///< CTS Line: 0=not available, 1=available + uint32_t dtr : 1; ///< DTR Line: 0=not available, 1=available + uint32_t dsr : 1; ///< DSR Line: 0=not available, 1=available + uint32_t dcd : 1; ///< DCD Line: 0=not available, 1=available + uint32_t ri : 1; ///< RI Line: 0=not available, 1=available + uint32_t event_cts : 1; ///< Signal CTS change event: \ref ARM_USART_EVENT_CTS + uint32_t event_dsr : 1; ///< Signal DSR change event: \ref ARM_USART_EVENT_DSR + uint32_t event_dcd : 1; ///< Signal DCD change event: \ref ARM_USART_EVENT_DCD + uint32_t event_ri : 1; ///< Signal RI change event: \ref ARM_USART_EVENT_RI +} usart_capabilities_t; + +/** + \brief Initialize USART Interface. 1. Initializes the resources needed for the USART interface 2.registers event callback function + \param[in] tx usart pin of tx + \param[in] rx usart pin of rx + \param[in] cb_event Pointer to \ref usart_event_cb_t + \param[in] cb_arg argument for cb_event + \return return usart handle if success +*/ +usart_handle_t csi_usart_initialize(pin_t tx, pin_t rx, usart_event_cb_t cb_event, void *cb_arg); + +/** + \brief De-initialize USART Interface. stops operation and releases the software resources used by the interface + \param[in] handle usart handle to operate. + \return error code +*/ +int32_t csi_usart_uninitialize(usart_handle_t handle); +/** + \brief Get driver capabilities. + \param[in] handle usart handle to operate. + \return \ref usart_capabilities_t +*/ +usart_capabilities_t csi_usart_get_capabilities(usart_handle_t handle); + +/** + \brief config usart mode. + \param[in] handle usart handle to operate. + \param[in] sysclk system clock. + \param[in] baud baud rate. + \param[in] mode \ref usart_mode_e . + \param[in] parity \ref usart_parity_e . + \param[in] stopbits \ref usart_stop_bits_e . + \param[in] bits \ref usart_data_bits_e . + \return error code +*/ +int32_t csi_usart_config(usart_handle_t handle, + uint32_t sysclk, + uint32_t baud, + usart_mode_e mode, + usart_parity_e parity, + usart_stop_bits_e stopbits, + usart_data_bits_e bits); + +/** + \brief config usart default tx value. used in synchronous mode + \param[in] handle usart handle to operate. + \param[in] value default tx value + \return error code +*/ +int32_t csi_usart_set_default_tx_value(usart_handle_t handle, uint32_t value); + +/** + \brief Start sending data to USART transmitter,(received data is ignored). + This function is non-blocking,\ref usart_event_e is signaled when operation completes or error happens. + \ref csi_usart_get_status can indicates operation status. + \param[in] handle usart handle to operate. + \param[in] data Pointer to buffer with data to send to USART transmitter. data_type is : uint8_t for 5..8 data bits, uint16_t for 9 data bits + \param[in] num Number of data items to send + \return error code +*/ +int32_t csi_usart_send(usart_handle_t handle, const void *data, uint32_t num/*,bool asynch*/); + +/** + \brief Abort Send data to USART transmitter + \param[in] handle usart handle to operate. + \return error code +*/ +int32_t csi_usart_abort_send(usart_handle_t handle); + +/** + \brief Start receiving data from USART receiver.transmits the default value as specified by csi_usart_set_default_tx_value. \n + This function is non-blocking,\ref usart_event_e is signaled when operation completes or error happens. + \ref csi_usart_get_status can indicates operation status. + \param[in] handle usart handle to operate. + \param[out] data Pointer to buffer for data to receive from USART receiver.data_type is : uint8_t for 5..8 data bits, uint16_t for 9 data bits + \param[in] num Number of data items to receive + \return error code +*/ +int32_t csi_usart_receive(usart_handle_t handle, void *data, uint32_t num/*,bool asynch*/); + +/** + \brief query data from UART receiver FIFO. + \param[in] handle usart handle to operate. + \param[out] data Pointer to buffer for data to receive from UART receiver + \param[in] num Number of data items to receive + \return receive fifo data num +*/ +int32_t csi_usart_receive_query(usart_handle_t handle, void *data, uint32_t num/*,bool asynch*/); + +/** + \brief Abort Receive data from USART receiver + \param[in] handle usart handle to operate. + \return error code +*/ +int32_t csi_usart_abort_receive(usart_handle_t handle); + +/** + \brief Start synchronously sends data to the USART transmitter and receives data from the USART receiver. used in synchronous mode + This function is non-blocking,\ref usart_event_e is signaled when operation completes or error happens. + \ref csi_usart_get_status can indicates operation status. + \param[in] handle usart handle to operate. + \param[in] data_out Pointer to buffer with data to send to USART transmitter.data_type is : uint8_t for 5..8 data bits, uint16_t for 9 data bits + \param[out] data_in Pointer to buffer for data to receive from USART receiver.data_type is : uint8_t for 5..8 data bits, uint16_t for 9 data bits + \param[in] num Number of data items to transfer + \return error code +*/ +int32_t csi_usart_transfer(usart_handle_t handle, const void *data_out, void *data_in, uint32_t num/*,bool asynch*/); + +/** + \brief abort sending/receiving data to/from USART transmitter/receiver. + \param[in] handle usart handle to operate. + \return error code +*/ +int32_t csi_usart_abort_transfer(usart_handle_t handle); + +/** + \brief Get USART status. + \param[in] handle usart handle to operate. + \return USART status \ref usart_status_t +*/ +usart_status_t csi_usart_get_status(usart_handle_t handle); + +/** + \brief flush receive/send data. + \param[in] handle usart handle to operate. + \param[in] type \ref usart_flush_type_e . + \return \ref execution_status +*/ +int32_t csi_usart_flush(usart_handle_t handle, usart_flush_type_e type); + +/** + \brief control interrupt on/off. + \param[in] handle usart handle to operate. + \param[in] type \ref usart_intr_type_e. + \param[in] flag 0-OFF, 1-ON. + \return error code +*/ +int32_t csi_usart_interrupt_on_off(usart_handle_t handle, usart_intr_type_e type, int flag); + +/** + \brief set the baut drate of usart. + \param[in] addr usart base to operate. + \param[in] baudrate baud rate + \param[in] apbfreq the frequency of the apb. + \return error code +*/ +int32_t csi_usart_config_baudrate(usart_handle_t handle, uint32_t baudrate, uint32_t apbfreq); + +/** + \brief config usart mode. + \param[in] handle usart handle to operate. + \param[in] mode \ref usart_mode_e + \return error code +*/ +int32_t csi_usart_config_mode(usart_handle_t handle, usart_mode_e mode); + +/** + \brief config usart parity. + \param[in] handle usart handle to operate. + \param[in] parity \ref usart_parity_e + \return error code +*/ +int32_t csi_usart_config_parity(usart_handle_t handle, usart_parity_e parity); + +/** + \brief config usart stop bit number. + \param[in] handle usart handle to operate. + \param[in] stopbits \ref usart_stop_bits_e + \return error code +*/ +int32_t dw_usart_config_stopbits(usart_handle_t handle, usart_stop_bits_e stopbit); + +/** + \brief config usart data length. + \param[in] handle usart handle to operate. + \param[in] databits \ref usart_data_bits_e + \return error code +*/ +int32_t csi_usart_config_databits(usart_handle_t handle, usart_data_bits_e databits); + +/** + \brief get character in query mode. + \param[in] handle usart handle to operate. + \param[in] the pointer to the received character if return 0. + \return error code +*/ +int32_t csi_usart_getchar(usart_handle_t handle, uint8_t *ch); + +/** + \brief transmit character in query mode. + \param[in] handle usart handle to operate. + \param[in] ch the input character + \return error code +*/ +int32_t csi_usart_putchar(usart_handle_t handle, uint8_t ch); + +/** + \brief Get usart send data count. + \param[in] handle usart handle to operate. + \return number of data bytes transferred +*/ +uint32_t csi_usart_get_tx_count(usart_handle_t handle); + +/** + \brief Get usart receive data count. + \param[in] handle usart handle to operate. + \return number of data bytes transferred +*/ +uint32_t csi_usart_get_rx_count(usart_handle_t handle); + +/** + \brief control usart power. + \param[in] handle usart handle to operate. + \param[in] state power state.\ref csi_power_stat_e. + \return error code +*/ +int32_t csi_usart_power_control(usart_handle_t handle, csi_power_stat_e state); + +/** + \brief config usart flow control type. + \param[in] handle usart handle to operate. + \param[in] flowctrl_type flow control type.\ref usart_flowctrl_type_e. + \param[in] tx_flow The TX flow pin name + \param[in] rx_flow The RX flow pin name + \return error code +*/ +int32_t csi_usart_config_flowctrl(usart_handle_t handle, + usart_flowctrl_type_e flowctrl_type, + pin_t tx_flow, pin_t rx_flow); +/** + \brief usart modem control. + \param[in] handle usart handle to operate. + \param[in] modem_ctrl modem control action.\ref usart_modem_ctrl_e. + \return error code +*/ +int32_t csi_usart_modem_ctrl(usart_handle_t handle, usart_modem_ctrl_e modem_ctrl); + +/** + \brief get usart modem status. + \param[in] handle usart handle to operate. + \param[in] modem_ctrl modem control action.\ref usart_modem_ctrl_e. + \return modem status.\ref usart_modem_stat_t. +*/ +usart_modem_stat_t csi_usart_get_modem_stat(usart_handle_t handle); + +/** + \brief config usart clock Polarity and Phase. + \param[in] handle usart handle to operate. + \param[in] cpol Clock Polarity.\ref usart_cpol_e. + \param[in] cpha Clock Phase.\ref usart_cpha_e. + \return error code +*/ +int32_t csi_usart_config_clock(usart_handle_t handle, usart_cpol_e cpol, usart_cpha_e cpha); + +/** + \brief config usart guard time. + \param[in] handle usart handle to operate. + \param[in] num_of_bits guard time in number of bit periods. + \return error code +*/ +int32_t csi_usart_config_guard_time(usart_handle_t handle, uint32_t num_of_bits); + +/** + \brief check if usart is readable(data received). + \param[in] handle usart handle to operate. + \return 1 - a character can be read, 0 if nothing to read ,negative for error code +*/ +int32_t csi_usart_readable(usart_handle_t handle); + +/** + \brief check if usart is writable(free for data sending). + \param[in] handle usart handle to operate. + \return 1 - a character can be written, 0 - cannot be written ,negative for error code +*/ +int32_t csi_usart_writable(usart_handle_t handle); + +/** + \brief control the transmit. + \param[in] handle usart handle to operate. + \param[in] 1 - enable the transmitter. 0 - disable the transmitter + \return error code +*/ +int32_t csi_usart_control_tx(usart_handle_t handle, uint32_t enable); + +/** + \brief control the receive. + \param[in] handle usart handle to operate. + \param[in] 1 - enable the receiver. 0 - disable the receiver + \return error code +*/ +int32_t csi_usart_control_rx(usart_handle_t handle, uint32_t enable); + +/** + \brief control the break. + \param[in] handle usart handle to operate. + \param[in] 1- Enable continuous Break transmission,0 - disable continuous Break transmission + \return error code +*/ +int32_t csi_usart_control_break(usart_handle_t handle, uint32_t enable); + +#ifdef __cplusplus +} +#endif + +#endif /* _CSI_USART_H_ */ diff --git a/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_wdt.h b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_wdt.h new file mode 100644 index 000000000..bf69c127c --- /dev/null +++ b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_wdt.h @@ -0,0 +1,119 @@ +/* + * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +/****************************************************************************** + * @file drv_wdt.h + * @brief header file for wdt driver + * @version V1.0 + * @date 02. June 2017 + ******************************************************************************/ + +#ifndef _CSI_WDT_H_ +#define _CSI_WDT_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include <stdint.h> +#include <drv_common.h> + +/// definition for wdt handle. +typedef void *wdt_handle_t; + +/****** WDT Event *****/ +typedef enum { + WDT_EVENT_TIMEOUT = 0 ///< generate the interrupt +} wdt_event_e; + +typedef void (*wdt_event_cb_t)(wdt_event_e event); ///< Pointer to \ref wdt_event_cb_t : WDT Event call back. + +/** +\brief WDT Device Driver Capabilities. +*/ +typedef struct { + uint32_t interrupt : 1; ///< supports interrupt +} wdt_capabilities_t; + +/** + \brief get wdt instance count. + \return wdt instance count +*/ +int32_t csi_wdt_get_instance_count(void); + +/** + \brief Initialize WDT Interface. 1. Initializes the resources needed for the WDT interface 2.registers event callback function + \param[in] idx must not exceed return value of csi_wdt_get_instance_count() + \param[in] cb_event Pointer to \ref wdt_event_cb_t + \return pointer to wdt instance +*/ +wdt_handle_t csi_wdt_initialize(int32_t idx, wdt_event_cb_t cb_event); + +/** + \brief De-initialize WDT Interface. stops operation and releases the software resources used by the interface + \param[in] handle wdt handle to operate. + \return error code +*/ +int32_t csi_wdt_uninitialize(wdt_handle_t handle); + +/** + \brief Get driver capabilities. + \param[in] handle wdt handle to operate. + \return \ref wdt_capabilities_t +*/ +wdt_capabilities_t csi_wdt_get_capabilities(wdt_handle_t handle); + +/** + \brief Set the WDT value. + \param[in] handle wdt handle to operate. + \param[in] value the timeout value(ms). + \return error code +*/ +int32_t csi_wdt_set_timeout(wdt_handle_t handle, uint32_t value); + +/** + \brief Start the WDT. + \param[in] handle wdt handle to operate. + \return error code +*/ +int32_t csi_wdt_start(wdt_handle_t handle); + +/** + \brief Stop the WDT. + \param[in] handle wdt handle to operate. + \return error code +*/ +int32_t csi_wdt_stop(wdt_handle_t handle); + +/** + \brief Restart the WDT. + \param[in] handle wdt handle to operate. + \return error code +*/ +int32_t csi_wdt_restart(wdt_handle_t handle); + +/** + \brief Read the WDT Current value. + \param[in] handle wdt handle to operate. + \param[in] value Pointer to the Value. + \return error code +*/ +int32_t csi_wdt_read_current_value(wdt_handle_t handle, uint32_t *value); + +#ifdef __cplusplus +} +#endif + +#endif /* _CSI_WDT_H_ */ diff --git a/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_wifi.h b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_wifi.h new file mode 100644 index 000000000..0ea3d3eab --- /dev/null +++ b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_wifi.h @@ -0,0 +1,1051 @@ +/** + * Copyright (C) 2016 CSI Project. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __CSI_WIFI_H__ +#define __CSI_WIFI_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#ifndef bool +#define bool int8_t +#define false 0 ///< XOS definition of 'false' +#define true 1 ///< XOS definition of 'true' +#endif + +typedef enum { + WIFI_EVENT_WIFI_READY = 0, /**< WiFi ready */ + WIFI_EVENT_SCAN_DONE, /**< finish scanning AP */ + WIFI_EVENT_STA_START, /**< station start */ + WIFI_EVENT_STA_STOP, /**< station stop */ + WIFI_EVENT_STA_CONNECTED, /**< station connected to AP */ + WIFI_EVENT_STA_DISCONNECTED, /**< station disconnected from AP */ + WIFI_EVENT_STA_AUTHMODE_CHANGE, /**< the auth mode of AP connected by station changed */ + WIFI_EVENT_STA_GOT_IP, /**< station got IP from connected AP */ + WIFI_EVENT_STA_WPS_ER_SUCCESS, /**< station wps succeeds in enrollee mode */ + WIFI_EVENT_STA_WPS_ER_FAILED, /**< station wps fails in enrollee mode */ + WIFI_EVENT_STA_WPS_ER_TIMEOUT, /**< station wps timeout in enrollee mode */ + WIFI_EVENT_STA_WPS_ER_PIN, /**< station wps pin code in enrollee mode */ + WIFI_EVENT_AP_START, /**< soft-AP start */ + WIFI_EVENT_AP_STOP, /**< soft-AP stop */ + WIFI_EVENT_AP_STACONNECTED, /**< a station connected to soft-AP */ + WIFI_EVENT_AP_STADISCONNECTED, /**< a station disconnected from soft-AP */ + WIFI_EVENT_AP_PROBEREQRECVED, /**< Receive probe request packet in soft-AP interface */ + WIFI_EVENT_AP_STA_GOT_IP6, /**< station or ap interface v6IP addr is preferred */ + WIFI_EVENT_ETH_START, /**< ethernet start */ + WIFI_EVENT_ETH_STOP, /**< ethernet stop */ + WIFI_EVENT_ETH_CONNECTED, /**< ethernet phy link up */ + WIFI_EVENT_ETH_DISCONNECTED, /**< ethernet phy link down */ + WIFI_EVENT_ETH_GOT_IP, /**< ethernet got IP from connected AP */ + WIFI_EVENT_MAX +} wifi_event_id_t; + + +typedef enum { + CSI_IF_WIFI_STA = 0, /**< CSI station interface */ + CSI_IF_WIFI_AP, /**< CSI soft-AP interface */ + CSI_IF_ETH, /**< CSI ethernet interface */ + CSI_IF_MAX +} csi_interface_t; + +typedef enum { + WIFI_MODE_NULL = 0, /**< null mode */ + WIFI_MODE_STA, /**< WiFi station mode */ + WIFI_MODE_AP, /**< WiFi soft-AP mode */ + WIFI_MODE_APSTA, /**< WiFi station + soft-AP mode */ + WIFI_MODE_MAX +} wifi_mode_t; + +typedef csi_interface_t wifi_interface_t; + +#define WIFI_IF_STA CSI_IF_WIFI_STA +#define WIFI_IF_AP CSI_IF_WIFI_AP + +typedef enum { + WIFI_COUNTRY_CN = 0, /**< country China, channel range [1, 14] */ + WIFI_COUNTRY_JP, /**< country Japan, channel range [1, 14] */ + WIFI_COUNTRY_US, /**< country USA, channel range [1, 11] */ + WIFI_COUNTRY_EU, /**< country Europe, channel range [1, 13] */ + WIFI_COUNTRY_MAX +} wifi_country_t; + +typedef enum { + WIFI_AUTH_OPEN = 0, /**< authenticate mode : open */ + WIFI_AUTH_WEP, /**< authenticate mode : WEP */ + WIFI_AUTH_WPA_PSK, /**< authenticate mode : WPA_PSK */ + WIFI_AUTH_WPA2_PSK, /**< authenticate mode : WPA2_PSK */ + WIFI_AUTH_WPA_WPA2_PSK, /**< authenticate mode : WPA_WPA2_PSK */ + WIFI_AUTH_WPA2_ENTERPRISE, /**< authenticate mode : WPA2_ENTERPRISE */ + WIFI_AUTH_MAX +} wifi_auth_mode_t; + +enum { + WIFI_REASON_UNSPECIFIED = 1, + WIFI_REASON_AUTH_EXPIRE = 2, + WIFI_REASON_AUTH_LEAVE = 3, + WIFI_REASON_ASSOC_EXPIRE = 4, + WIFI_REASON_ASSOC_TOOMANY = 5, + WIFI_REASON_NOT_AUTHED = 6, + WIFI_REASON_NOT_ASSOCED = 7, + WIFI_REASON_ASSOC_LEAVE = 8, + WIFI_REASON_ASSOC_NOT_AUTHED = 9, + WIFI_REASON_DISASSOC_PWRCAP_BAD = 10, + WIFI_REASON_DISASSOC_SUPCHAN_BAD = 11, + WIFI_REASON_IE_INVALID = 13, + WIFI_REASON_MIC_FAILURE = 14, + WIFI_REASON_4WAY_HANDSHAKE_TIMEOUT = 15, + WIFI_REASON_GROUP_KEY_UPDATE_TIMEOUT = 16, + WIFI_REASON_IE_IN_4WAY_DIFFERS = 17, + WIFI_REASON_GROUP_CIPHER_INVALID = 18, + WIFI_REASON_PAIRWISE_CIPHER_INVALID = 19, + WIFI_REASON_AKMP_INVALID = 20, + WIFI_REASON_UNSUPP_RSN_IE_VERSION = 21, + WIFI_REASON_INVALID_RSN_IE_CAP = 22, + WIFI_REASON_802_1X_AUTH_FAILED = 23, + WIFI_REASON_CIPHER_SUITE_REJECTED = 24, + + WIFI_REASON_BEACON_TIMEOUT = 200, + WIFI_REASON_NO_AP_FOUND = 201, + WIFI_REASON_AUTH_FAIL = 202, + WIFI_REASON_ASSOC_FAIL = 203, + WIFI_REASON_HANDSHAKE_TIMEOUT = 204, +}; + +typedef enum { + WIFI_SECOND_CHAN_NONE = 0, /**< the channel width is HT20 */ + WIFI_SECOND_CHAN_ABOVE, /**< the channel width is HT40 and the second channel is above the primary channel */ + WIFI_SECOND_CHAN_BELOW, /**< the channel width is HT40 and the second channel is below the primary channel */ +} wifi_second_chan_t; + +typedef enum { + WIFI_SCAN_TYPE_ACTIVE = 0, /**< active scan */ + WIFI_SCAN_TYPE_PASSIVE, /**< passive scan */ +} wifi_scan_type_t; + +typedef struct { + uint32_t min; /**< minimum active scan time per channel, units: millisecond */ + uint32_t max; /**< maximum active scan time per channel, units: millisecond, values above 1500ms may + cause station to disconnect from AP and are not recommended. */ +} wifi_active_scan_time_t; + +typedef union { + wifi_active_scan_time_t active; /**< active scan time per channel */ + uint32_t passive; /**< passive scan time per channel, units: millisecond, values above 1500ms may + cause station to disconnect from AP and are not recommended. */ +} wifi_scan_time_t; + +typedef struct { + uint8_t *ssid; /**< SSID of AP */ + uint8_t *bssid; /**< MAC address of AP */ + uint8_t channel; /**< channel, scan the specific channel */ + bool show_hidden; /**< enable to scan AP whose SSID is hidden */ + wifi_scan_type_t scan_type; /**< scan type, active or passive */ + wifi_scan_time_t scan_time; /**< scan time per channel */ +} wifi_scan_config_t; + +typedef struct { + uint8_t bssid[6]; /**< MAC address of AP */ + uint8_t ssid[32]; /**< SSID of AP */ + uint8_t primary; /**< channel of AP */ + wifi_second_chan_t second; /**< second channel of AP */ + int8_t rssi; /**< signal strength of AP */ + wifi_auth_mode_t authmode; /**< authmode of AP */ + uint32_t low_rate_enable:1; /**< bit: 0 flag to identify if low rate is enabled or not */ + uint32_t reserved:31; /**< bit: 1..31 reserved */ +} wifi_ap_record_t; + +typedef enum { + WIFI_PS_NONE, /**< No power save */ + WIFI_PS_MODEM, /**< Modem power save */ +} wifi_ps_type_t; + +#define WIFI_PROTOCOL_11B 1 +#define WIFI_PROTOCOL_11G 2 +#define WIFI_PROTOCOL_11N 4 +#define WIFI_PROTOCOL_LR 8 + +typedef enum { + WIFI_BW_HT20 = 1, /* Bandwidth is HT20 */ + WIFI_BW_HT40, /* Bandwidth is HT40 */ + WIFI_BW_HT20_HT40, +} wifi_bandwidth_t; + +typedef struct { + uint8_t ssid[32]; /**< SSID of soft-AP */ + uint8_t password[64]; /**< Password of soft-AP */ + uint8_t ssid_len; /**< Length of SSID. If softap_config.ssid_len==0, check the SSID until there is a termination character; otherwise, set the SSID length according to softap_config.ssid_len. */ + uint8_t channel; /**< Channel of soft-AP */ + wifi_auth_mode_t authmode; /**< Auth mode of soft-AP. Do not support AUTH_WEP in soft-AP mode */ + uint8_t ssid_hidden; /**< Broadcast SSID or not, default 0, broadcast the SSID */ + uint8_t max_connection; /**< Max number of stations allowed to connect in, default 4, max 4 */ + uint16_t beacon_interval; /**< Beacon interval, 100 ~ 60000 ms, default 100 ms */ +} wifi_ap_config_t; + +typedef struct { + uint8_t ssid[32]; /**< SSID of target AP*/ + uint8_t password[64]; /**< password of target AP*/ + bool bssid_set; /**< whether set MAC address of target AP or not. Generally, station_config.bssid_set needs to be 0; and it needs to be 1 only when users need to check the MAC address of the AP.*/ + uint8_t bssid[6]; /**< MAC address of target AP*/ +} wifi_sta_config_t; + +typedef union { + wifi_ap_config_t ap; /**< configuration of AP */ + wifi_sta_config_t sta; /**< configuration of STA */ +} wifi_config_t; + +typedef struct { + uint8_t mac[6]; /**< mac address of sta that associated with soft-AP */ +} wifi_sta_info_t; + +#define CSI_WIFI_MAX_CONN_NUM (10) /**< max number of stations which can connect to soft-AP */ + +typedef struct { + wifi_sta_info_t sta[CSI_WIFI_MAX_CONN_NUM]; /**< station list */ + int num; /**< number of station that associated with soft-AP */ +} wifi_sta_list_t; + +typedef enum { + WIFI_STORAGE_FLASH, /**< all configuration will strore in both memory and flash */ + WIFI_STORAGE_RAM, /**< all configuration will only store in the memory */ +} wifi_storage_t; + +/** + * @brief Vendor IE type + * + */ +typedef enum { + WIFI_VND_IE_TYPE_BEACON, + WIFI_VND_IE_TYPE_PROBE_REQ, + WIFI_VND_IE_TYPE_PROBE_RCSI, + WIFI_VND_IE_TYPE_ASSOC_REQ, + WIFI_VND_IE_TYPE_ASSOC_RCSI, +} wifi_vendor_ie_type_t; + +/** + * @brief Vendor IE index + * + */ +typedef enum { + WIFI_VND_IE_ID_0, + WIFI_VND_IE_ID_1, +} wifi_vendor_ie_id_t; + +typedef struct { + signed rssi:8; /**< signal intensity of packet */ + unsigned rate:5; /**< data rate */ + unsigned :1; /**< reserve */ + unsigned sig_mode:2; /**< 0:is not 11n packet; 1:is 11n packet */ + unsigned :16; /**< reserve */ + unsigned mcs:7; /**< if is 11n packet, shows the modulation(range from 0 to 76) */ + unsigned cwb:1; /**< if is 11n packet, shows if is HT40 packet or not */ + unsigned :16; /**< reserve */ + unsigned smoothing:1; /**< reserve */ + unsigned not_sounding:1; /**< reserve */ + unsigned :1; /**< reserve */ + unsigned aggregation:1; /**< Aggregation */ + unsigned stbc:2; /**< STBC */ + unsigned fec_coding:1; /**< if is 11n packet, shows if is LDPC packet or not */ + unsigned sgi:1; /**< SGI */ + unsigned noise_floor:8; /**< noise floor */ + unsigned ampdu_cnt:8; /**< ampdu cnt */ + unsigned channel:4; /**< which channel this packet in */ + unsigned :12; /**< reserve */ + unsigned timestamp:32; /**< timestamp */ + unsigned :32; /**< reserve */ + unsigned :32; /**< reserve */ + unsigned sig_len:12; /**< It is really lenth of packet */ + unsigned :12; /**< reserve */ + unsigned rx_state:8; /**< rx state */ +} wifi_pkt_rx_ctrl_t; + +typedef struct { + wifi_pkt_rx_ctrl_t rx_ctrl; + uint8_t payload[0]; /**< ieee80211 packet buff, The length of payload is described by sig_len */ +} wifi_promiscuous_pkt_t; + +/** + * @brief Promiscuous frame type + * + */ +typedef enum { + WIFI_PKT_CTRL, /**< control type, receive packet buf is wifi_pkt_rx_ctrl_t */ + WIFI_PKT_MGMT, /**< management type, receive packet buf is wifi_promiscuous_pkt_t */ + WIFI_PKT_DATA, /**< data type, receive packet buf is wifi_promiscuous_pkt_t */ + WIFI_PKT_MISC, /**< other type, receive packet buf is wifi_promiscuous_pkt_t */ +} wifi_promiscuous_pkt_type_t; + +#define CSI_OK 0 +#define CSI_FAIL -1 + +#define CSI_ERR_NO_MEM 0x101 +#define CSI_ERR_INVALID_ARG 0x102 +#define CSI_ERR_INVALID_STATE 0x103 +#define CSI_ERR_INVALID_SIZE 0x104 +#define CSI_ERR_NOT_FOUND 0x105 +#define CSI_ERR_NOT_SUPPORTED 0x106 +#define CSI_ERR_TIMEOUT 0x107 +#define CSI_ERR_INVALID_RCSIONSE 0x108 +#define CSI_ERR_INVALID_CRC 0x109 + +//#define CSI_ERR_WIFI_BASE 0x3000 /*!< Starting number of WiFi error codes */ + +#define CSI_ERR_WIFI_OK CSI_OK /*!< No error */ +#define CSI_ERR_WIFI_FAIL CSI_FAIL /*!< General fail code */ +#define CSI_ERR_WIFI_NO_MEM CSI_ERR_NO_MEM /*!< Out of memory */ +#define CSI_ERR_WIFI_ARG CSI_ERR_INVALID_ARG /*!< Invalid argument */ +#define CSI_ERR_WIFI_NOT_SUPPORT CSI_ERR_NOT_SUPPORTED /*!< Indicates that API is not supported yet */ + +#define CSI_ERR_WIFI_NOT_INIT (CSI_DRV_ERRNO_WIFI_BASE + 1) /*!< WiFi driver was not installed by csi_wifi_init */ +#define CSI_ERR_WIFI_NOT_STARTED (CSI_DRV_ERRNO_WIFI_BASE + 2) /*!< WiFi driver was not started by csi_wifi_start */ +#define CSI_ERR_WIFI_IF (CSI_DRV_ERRNO_WIFI_BASE + 3) /*!< WiFi interface error */ +#define CSI_ERR_WIFI_MODE (CSI_DRV_ERRNO_WIFI_BASE + 4) /*!< WiFi mode error */ +#define CSI_ERR_WIFI_STATE (CSI_DRV_ERRNO_WIFI_BASE + 5) /*!< WiFi internal state error */ +#define CSI_ERR_WIFI_CONN (CSI_DRV_ERRNO_WIFI_BASE + 6) /*!< WiFi internal control block of station or soft-AP error */ +#define CSI_ERR_WIFI_NVS (CSI_DRV_ERRNO_WIFI_BASE + 7) /*!< WiFi internal NVS module error */ +#define CSI_ERR_WIFI_MAC (CSI_DRV_ERRNO_WIFI_BASE + 8) /*!< MAC address is invalid */ +#define CSI_ERR_WIFI_SSID (CSI_DRV_ERRNO_WIFI_BASE + 9) /*!< SSID is invalid */ +#define CSI_ERR_WIFI_PASSWORD (CSI_DRV_ERRNO_WIFI_BASE + 10) /*!< Password is invalid */ +#define CSI_ERR_WIFI_TIMEOUT (CSI_DRV_ERRNO_WIFI_BASE + 11) /*!< Timeout error */ +#define CSI_ERR_WIFI_WAKE_FAIL (CSI_DRV_ERRNO_WIFI_BASE + 12) /*!< WiFi is in sleep state(RF closed) and wakeup fail */ + +typedef enum +{ + FRAME_FILTER_MODE_FORWARD = 1, /*!< Packet filter engine forwards matching packets, discards non-matching packets */ + FRAME_FILTER_MODE_DISCARD = 0, /*!< Packet filter engine discards matching packets, forwards non-matching packets */ +} frame_filter_mode_t; + +typedef enum +{ + FRAME_FILTER_RULE_POSITIVE_MATCHING = 0, /*!< Specifies that a filter should match a given pattern */ + FRAME_FILTER_RULE_NEGATIVE_MATCHING = 1, /*!< Specifies that a filter should NOT match a given pattern */ +} frame_filter_rule_t; + +/** + * Structure describing a frame filter list item + */ +typedef struct +{ + uint32_t id; /*!< Unique identifier for a packet filter item */ + frame_filter_rule_t rule; /*!< Filter matches are either POSITIVE or NEGATIVE matching */ + uint16_t offset; /*!< Offset in bytes to start filtering (referenced to the start of the ethernet packet) */ + uint16_t mask_size; /*!< Size of the mask in bytes */ + uint8_t* mask; /*!< Pattern mask bytes to be ANDed with the pattern eg. "\xff00" (must be in network byte order) */ + uint8_t* pattern; /*!< Pattern bytes used to filter eg. "\x0800" (must be in network byte order) */ + bool enabled_status; /*!< When returned from mhd_get_packet_filters, indicates if the filter is enabled */ +} wifi_frame_filter_t; + +struct wifi_frame_filter_list +{ + struct wifi_frame_filter_list* next; +}; +typedef struct wifi_frame_filter_list wifi_frame_filter_list_t; + +typedef void (*wifi_event_cb_t)(uint32_t event); ///< Signal WiFi Event. Events refer to wifi_event_id_t + +/** + * @brief Init WiFi + * Alloc resource for WiFi driver, such as WiFi control structure, RX/TX buffer, + * WiFi NVS structure etc, this WiFi also start WiFi task + * + * @attention 1. This API must be called before all other WiFi API can be called + * + * @param cb callback to handle WiFi event + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NO_MEM: out of memory + * - others: refer to error code csi_err.h + */ +int32_t csi_wifi_init(wifi_event_cb_t *cb); + +/** + * @brief Deinit WiFi + * Free all resource allocated in csi_wifi_init and stop WiFi task + * + * @attention 1. This API should be called if you want to remove WiFi driver from the system + * + * @return CSI_OK: succeed + */ +int32_t csi_wifi_deinit(void); + +/** + * @brief Set the WiFi operating mode + * + * Set the WiFi operating mode as station, soft-AP or station+soft-AP, + * The default mode is soft-AP mode. + * + * @param mode WiFi operating mode + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + * - CSI_ERR_WIFI_ARG: invalid argument + * - others: refer to error code in csi_err.h + */ +int32_t csi_wifi_set_mode(wifi_mode_t mode); + +/** + * @brief Get current operating mode of WiFi + * + * @param[out] mode store current WiFi mode + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + * - CSI_ERR_WIFI_ARG: invalid argument + */ +int32_t csi_wifi_get_mode(wifi_mode_t *mode); + +/** + * @brief Start WiFi according to current configuration + * If mode is WIFI_MODE_STA, it create station control block and start station + * If mode is WIFI_MODE_AP, it create soft-AP control block and start soft-AP + * If mode is WIFI_MODE_APSTA, it create soft-AP and station control block and start soft-AP and station + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + * - CSI_ERR_WIFI_ARG: invalid argument + * - CSI_ERR_WIFI_NO_MEM: out of memory + * - CSI_ERR_WIFI_CONN: WiFi internal error, station or soft-AP control block wrong + * - CSI_ERR_WIFI_FAIL: other WiFi internal errors + */ +int32_t csi_wifi_start(void); + +/** + * @brief Stop WiFi + * If mode is WIFI_MODE_STA, it stop station and free station control block + * If mode is WIFI_MODE_AP, it stop soft-AP and free soft-AP control block + * If mode is WIFI_MODE_APSTA, it stop station/soft-AP and free station/soft-AP control block + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + */ +int32_t csi_wifi_stop(void); + +/** + * @brief Restore WiFi stack persistent settings to default values + * + * This function will reset settings made using the following APIs: + * - csi_wifi_get_auto_connect, + * - csi_wifi_set_protocol, + * - csi_wifi_set_config related + * - csi_wifi_set_mode + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + */ +int32_t csi_wifi_restore(void); + +/** + * @brief Connect the WiFi station to the AP. + * + * @attention 1. This API only impact WIFI_MODE_STA or WIFI_MODE_APSTA mode + * @attention 2. If connecting to an AP, call csi_wifi_disconnect to disconnect. + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + * - CSI_ERR_WIFI_NOT_START: WiFi is not started by csi_wifi_start + * - CSI_ERR_WIFI_CONN: WiFi internal error, station or soft-AP control block wrong + * - CSI_ERR_WIFI_SSID: SSID of AP which station connects is invalid + */ +int32_t csi_wifi_connect(void); + +/** + * @brief Disconnect the WiFi station from the AP. + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi was not initialized by csi_wifi_init + * - CSI_ERR_WIFI_NOT_STARTED: WiFi was not started by csi_wifi_start + * - CSI_ERR_WIFI_FAIL: other WiFi internal errors + */ +int32_t csi_wifi_disconnect(void); + +/** + * @brief deauthenticate all stations or associated id equals to aid + * + * @param aid when aid is 0, deauthenticate all stations, otherwise deauthenticate station whose associated id is aid + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + * - CSI_ERR_WIFI_NOT_STARTED: WiFi was not started by csi_wifi_start + * - CSI_ERR_WIFI_ARG: invalid argument + * - CSI_ERR_WIFI_MODE: WiFi mode is wrong + */ +int32_t csi_wifi_deauth_sta(uint16_t aid); + +/** + * @brief Scan all available APs. + * + * @attention If this API is called, the found APs are stored in WiFi driver dynamic allocated memory and that + * will be freed in csi_wifi_get_ap_list, so generally, call csi_wifi_get_ap_list to cause + * the memory to be freed once the scan is done + * @attention The values of maximum active scan time and passive scan time per channel are limited to 1500 milliseconds. + * Values above 1500ms may cause station to disconnect from AP and are not recommended. + * + * @param config configuration of scanning + * @param block if block is true, this API will block the caller until the scan is done, otherwise + * it will return immediately + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + * - CSI_ERR_WIFI_NOT_STARTED: WiFi was not started by csi_wifi_start + * - CSI_ERR_WIFI_TIMEOUT: blocking scan is timeout + * - others: refer to error code in csi_err.h + */ +int32_t csi_wifi_scan_start(wifi_scan_config_t *config, bool block); + +/** + * @brief Stop the scan in process + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + * - CSI_ERR_WIFI_NOT_STARTED: WiFi is not started by csi_wifi_start + */ +int32_t csi_wifi_scan_stop(void); + +/** + * @brief Get AP list found in last scan + * + * @param[inout] number As input param, it stores max AP number ap_records can hold. + * As output param, it receives the actual AP number this API returns. + * @param ap_records wifi_ap_record_t array to hold the found APs + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + * - CSI_ERR_WIFI_NOT_STARTED: WiFi is not started by csi_wifi_start + * - CSI_ERR_WIFI_ARG: invalid argument + * - CSI_ERR_WIFI_NO_MEM: out of memory + */ +int32_t csi_wifi_scan_get_ap_records(uint16_t *number, wifi_ap_record_t *ap_records); + + +/** + * @brief Get information of AP which station is associated with + * + * @param ap_info the wifi_ap_record_t to hold AP information + * + * @return + * - CSI_OK: succeed + * - others: fail + */ +int32_t csi_wifi_sta_get_ap_info(wifi_ap_record_t *ap_info); + +/** + * @brief Set current power save type + * + * @attention Default power save type is WIFI_PS_NONE. + * + * @param type power save type + * + * @return CSI_ERR_WIFI_NOT_SUPPORT: not supported yet + */ +int32_t csi_wifi_set_ps(wifi_ps_type_t type); + +/** + * @brief Get current power save type + * + * @attention Default power save type is WIFI_PS_NONE. + * + * @param[out] type: store current power save type + * + * @return CSI_ERR_WIFI_NOT_SUPPORT: not supported yet + */ +int32_t csi_wifi_get_ps(wifi_ps_type_t *type); + +/** + * @brief Set protocol type of specified interface + * The default protocol is (WIFI_PROTOCOL_11B|WIFI_PROTOCOL_11G|WIFI_PROTOCOL_11N) + * + * @attention Currently we only support 802.11b or 802.11bg or 802.11bgn mode + * + * @param ifx interfaces + * @param protocol_bitmap WiFi protocol bitmap + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + * - CSI_ERR_WIFI_IF: invalid interface + * - others: refer to error codes in csi_err.h + */ +int32_t csi_wifi_set_protocol(wifi_interface_t ifx, uint8_t protocol_bitmap); + +/** + * @brief Get the current protocol bitmap of the specified interface + * + * @param ifx interface + * @param[out] protocol_bitmap store current WiFi protocol bitmap of interface ifx + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + * - CSI_ERR_WIFI_IF: invalid interface + * - CSI_ERR_WIFI_ARG: invalid argument + * - others: refer to error codes in csi_err.h + */ +int32_t csi_wifi_get_protocol(wifi_interface_t ifx, uint8_t *protocol_bitmap); + +/** + * @brief Set the bandwidth of specified interface + * + * @attention 1. API return false if try to configure an interface that is not enabled + * @attention 2. WIFI_BW_HT40 is supported only when the interface support 11N + * + * @param ifx interface to be configured + * @param bw bandwidth + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + * - CSI_ERR_WIFI_IF: invalid interface + * - CSI_ERR_WIFI_ARG: invalid argument + * - others: refer to error codes in csi_err.h + */ +int32_t csi_wifi_set_bandwidth(wifi_interface_t ifx, wifi_bandwidth_t bw); + +/** + * @brief Get the bandwidth of specified interface + * + * @attention 1. API return false if try to get a interface that is not enable + * + * @param ifx interface to be configured + * @param[out] bw store bandwidth of interface ifx + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + * - CSI_ERR_WIFI_IF: invalid interface + * - CSI_ERR_WIFI_ARG: invalid argument + */ +int32_t csi_wifi_get_bandwidth(wifi_interface_t ifx, wifi_bandwidth_t *bw); + +/** + * @brief Set primary/secondary channel + * + * @attention 1. This is a special API for sniffer + * @attention 2. This API should be called after csi_wifi_start() or csi_wifi_set_promiscuous() + * + * @param primary for HT20, primary is the channel number, for HT40, primary is the primary channel + * @param second for HT20, second is ignored, for HT40, second is the second channel + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + * - CSI_ERR_WIFI_IF: invalid interface + * - CSI_ERR_WIFI_ARG: invalid argument + */ +int32_t csi_wifi_set_channel(uint8_t primary, wifi_second_chan_t second); + +/** + * @brief Get the primary/secondary channel + * + * @attention 1. API return false if try to get a interface that is not enable + * + * @param[out] primary store current primary channel + * @param[out] second store current second channel + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + * - CSI_ERR_WIFI_ARG: invalid argument + */ +int32_t csi_wifi_get_channel(uint8_t *primary, wifi_second_chan_t *second); + +/** + * @brief Set country code + * The default value is WIFI_COUNTRY_CN + * + * @param country country type + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + * - CSI_ERR_WIFI_ARG: invalid argument + * - others: refer to error code in csi_err.h + */ +int32_t csi_wifi_set_country(wifi_country_t country); + +/** + * @brief Get country code + * + * @param country store current country + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + * - CSI_ERR_WIFI_ARG: invalid argument + */ +int32_t csi_wifi_get_country(wifi_country_t *country); + +/** + * @brief Set MAC address of the WiFi station or the soft-AP interface. + * + * @attention 1. This API can only be called when the interface is disabled + * @attention 2. soft-AP and station have different MAC addresses, do not set them to be the same. + * @attention 3. The bit 0 of the first byte of MAC address can not be 1. For example, the MAC address + * can set to be "1a:XX:XX:XX:XX:XX", but can not be "15:XX:XX:XX:XX:XX". + * + * @param ifx interface + * @param mac the MAC address + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + * - CSI_ERR_WIFI_ARG: invalid argument + * - CSI_ERR_WIFI_IF: invalid interface + * - CSI_ERR_WIFI_MAC: invalid mac address + * - CSI_ERR_WIFI_MODE: WiFi mode is wrong + * - others: refer to error codes in csi_err.h + */ +int32_t csi_wifi_set_mac(wifi_interface_t ifx, uint8_t mac[6]); + +/** + * @brief Get mac of specified interface + * + * @param ifx interface + * @param[out] mac store mac of the interface ifx + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + * - CSI_ERR_WIFI_ARG: invalid argument + * - CSI_ERR_WIFI_IF: invalid interface + */ +int32_t csi_wifi_get_mac(wifi_interface_t ifx, uint8_t mac[6]); + +/** + * @brief The RX callback function in the promiscuous mode. + * Each time a packet is received, the callback function will be called. + * + * @param buf Data received. Type of data in buffer (wifi_promiscuous_pkt_t or wifi_pkt_rx_ctrl_t) indicated by 'type' parameter. + * @param type promiscuous packet type. + * + */ +typedef void (* wifi_promiscuous_cb_t)(void *buf, wifi_promiscuous_pkt_type_t type); + +/** + * @brief Register the RX callback function in the promiscuous mode. + * + * Each time a packet is received, the registered callback function will be called. + * + * @param cb callback + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + */ +int32_t csi_wifi_set_promiscuous_rx_cb(wifi_promiscuous_cb_t cb); + +/** + * @brief Enable the promiscuous mode. + * + * @param en false - disable, true - enable + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + */ +int32_t csi_wifi_set_promiscuous(bool en); + +/** + * @brief Get the promiscuous mode. + * + * @param[out] en store the current status of promiscuous mode + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + * - CSI_ERR_WIFI_ARG: invalid argument + */ +int32_t csi_wifi_get_promiscuous(bool *en); + +/** + * @brief Set the configuration of STA or AP + * + * @attention 1. This API can be called only when specified interface is enabled, otherwise, API fail + * @attention 2. For station configuration, bssid_set needs to be 0; and it needs to be 1 only when users need to check the MAC address of the AP. + * @attention 3. Limited to only one channel, so when in the soft-AP+station mode, the soft-AP will adjust its channel automatically to be the same as + * the channel of the station. + * + * @param ifx interface + * @param conf station or soft-AP configuration + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + * - CSI_ERR_WIFI_ARG: invalid argument + * - CSI_ERR_WIFI_IF: invalid interface + * - CSI_ERR_WIFI_MODE: invalid mode + * - CSI_ERR_WIFI_PASSWORD: invalid password + * - CSI_ERR_WIFI_NVS: WiFi internal NVS error + * - others: refer to the erro code in csi_err.h + */ +int32_t csi_wifi_set_config(wifi_interface_t ifx, wifi_config_t *conf); + +/** + * @brief Get configuration of specified interface + * + * @param ifx interface + * @param[out] conf station or soft-AP configuration + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + * - CSI_ERR_WIFI_ARG: invalid argument + * - CSI_ERR_WIFI_IF: invalid interface + */ +int32_t csi_wifi_get_config(wifi_interface_t ifx, wifi_config_t *conf); + +/** + * @brief Get STAs associated with soft-AP + * + * @attention SSC only API + * + * @param[out] sta station list + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + * - CSI_ERR_WIFI_ARG: invalid argument + * - CSI_ERR_WIFI_MODE: WiFi mode is wrong + * - CSI_ERR_WIFI_CONN: WiFi internal error, the station/soft-AP control block is invalid + */ +int32_t csi_wifi_ap_get_sta_list(wifi_sta_list_t *sta); + + +/** + * @brief Set the WiFi API configuration storage type + * + * @attention 1. The default value is WIFI_STORAGE_FLASH + * + * @param storage : storage type + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + * - CSI_ERR_WIFI_ARG: invalid argument + */ +int32_t csi_wifi_set_storage(wifi_storage_t storage); + +/** + * @brief Set auto connect + * The default value is true + * + * @param en : true - enable auto connect / false - disable auto connect + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + * - CSI_ERR_WIFI_MODE: WiFi internal error, the station/soft-AP control block is invalid + * - others: refer to error code in csi_err.h + */ +int32_t csi_wifi_set_auto_connect(bool en); + +/** + * @brief Get the auto connect flag + * + * @param[out] en store current auto connect configuration + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + * - CSI_ERR_WIFI_ARG: invalid argument + */ +int32_t csi_wifi_get_auto_connect(bool *en); + +/** + * @brief Set vendor specific element + * + * @param enable enable or not + * @param type information element type + * @param idx information element index + * @param vnd_ie pointer to a vendor specific element + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + * - CSI_ERR_WIFI_ARG: invalid argument + * - CSI_ERR_WIFI_NO_MEM: out of memory + */ +int32_t csi_wifi_set_vendor_ie(bool enable, wifi_vendor_ie_type_t type, wifi_vendor_ie_id_t idx, uint8_t *vnd_ie); + +/** + * @brief Define function pointer for vendor specific element callback + * @param ctx reserved + * @param type information element type + * @param sa source address + * @param vnd_ie pointer to a vendor specific element + * @param rssi received signal strength indication + */ +typedef void (*csi_vendor_ie_cb_t) (void *ctx, wifi_vendor_ie_type_t type, const uint8_t sa[6], const uint8_t *vnd_ie, int rssi); + +/** + * @brief Set vendor specific element callback + * + * @param cb callback function + * @param ctx reserved + * + * @return + * - CSI_OK: succeed + * - CSI_ERR_WIFI_NOT_INIT: WiFi is not initialized by csi_wifi_init + */ +int32_t csi_wifi_set_vendor_ie_cb(csi_vendor_ie_cb_t cb, void *ctx); + +/** + * @brief get whether the wifi driver is allowed to transmit data or not + * + * @return + * - true : upper layer should stop to transmit data to wifi driver + * - false : upper layer can transmit data to wifi driver + */ +bool csi_wifi_tx_is_stop(void); + +/** + * @brief free the rx buffer which allocated by wifi driver + * + * @param buffer: rx buffer pointer + */ +void csi_wifi_free_rx_buffer(void *buffer); + +/** + * @brief transmit the buffer via wifi driver + * + * @param wifi_if : wifi interface id + * @param buffer : the buffer to be tansmit + * @param len : the length of buffer + * + * @return + * - ERR_OK : Successfully transmit the buffer to wifi driver + * - ERR_MEM : Out of memory + * - ERR_IF : WiFi driver error + * - ERR_ARG : Invalid argument + */ +int csi_wifi_tx(wifi_interface_t wifi_if, void *buffer, uint16_t len); + +/** + * @brief The WiFi RX callback function + * + * Each time the WiFi need to forward the packets to high layer, the callback function will be called. + * ebuf is rx buffer allocated by wifi driver + */ +typedef int32_t (*wifi_rxcb_t)(void *buffer, uint16_t len, void *ebuf); + +/** + * @brief Set the WiFi RX callback + * + * @attention 1. Currently we support only one RX callback for each interface + * + * @param ifx : interface + * @param fn : WiFi RX callback + * + * @return + * - CSI_OK : succeed + * - others : fail + */ +int32_t csi_wifi_reg_rxcb(wifi_interface_t ifx, wifi_rxcb_t fn); + +/** + \brief Add Frame Filter Setting with Filter ID. + \param[in] filter Pointer to filter setting + \return +*/ +int32_t csi_wifi_add_framefilter(const wifi_frame_filter_t *filter); + +/** + \brief Remove Frame Filter Setting. + \param[in] filter_id Frame Filter ID + \return +*/ +int32_t csi_wifi_remove_framefilter(uint32_t filter_id); + +/** + \brief Enable/Disable Specified Frame Filter ID. + \param[in] filter_id Frame Filter ID + \param[in] en Enable or disable + \return +*/ +int32_t csi_wifi_en_framefilter(uint32_t filter_id, bool en); + +/** + \brief Get frame filter table list. + \param[in] list frame filter table list + \param[in] count_out the count of filter setting added + \param[in] max_count max filter setting can be supported + \return +*/ +int32_t csi_wifi_get_framefilter(wifi_frame_filter_list_t* list, uint32_t* count_out, uint32_t max_count); + +/** +* @brief This function gets the radio status of the Wi-Fi driver. +* +* @param[out] on_off indicates the Wi-Fi radio is on or off. +* +* Value |Definition | +* ------------------------------|------------------------------------------------------------------------| +* \b 0 | OFF, the Wi-Fi radio is turned off, and Wi-Fi TX/RX is disabled.| +* \b 1 | ON, the Wi-Fi radio is turned on, and Wi-Fi TX/RX is enabled.| +* +* +* @return >=0 the operation completed successfully, <0 the operation failed. +* +* @note In repeater mode, both Wi-Fi interface and Wi-Fi radio are turned on/off at the same time. +*/ +int32_t wifi_config_get_radio(uint8_t *on_off); + +/** +* @brief This function sets the radio status of the Wi-Fi driver. This operation takes effect immediately. +* +* @param[in] on_off indicates the Wi-Fi radio is on or off. +* +* Value |Definition | +* ------------------------------|------------------------------------------------------------------------| +* \b 0 | OFF, the Wi-Fi radio is turned off, and Wi-Fi TX/RX is disabled| +* \b 1 | ON, the Wi-Fi radio is turned on, and Wi-Fi TX/RX is enabled| +* +* @return >=0 the operation completed successfully, <0 the operation failed. +* +* @note In repeater mode, both Wi-Fi interface and Wi-Fi radio are turned on/off at the same time. +*/ +int32_t wifi_config_set_radio(uint8_t on_off); + +/** +* @brief This function gets the RSSI of the connected AP. It's only used for the STA mode and while the station is connected to the AP. +* +* @param[out] rssi returns the RSSI of the connected AP. +* +* @return >=0 the operation completed successfully, <0 the operation failed. +* +* +*/ +int32_t csi_wifi_connection_get_rssi(int8_t *rssi); + + +#ifdef __cplusplus +} +#endif + +#endif /* __CSI_WIFI_H__ */ + + diff --git a/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_wifi_wps.h b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_wifi_wps.h new file mode 100644 index 000000000..9cb9c9dec --- /dev/null +++ b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/drv_wifi_wps.h @@ -0,0 +1,101 @@ +/** + * Copyright (C) 2016 CSI Project. All rights reserved. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef __CSI_WIFI_WPS_H__ +#define __CSI_WIFI_WPS_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +/** \defgroup WiFi_APIs WiFi Related APIs + * @brief WiFi APIs + */ + +/** @addtogroup WiFi_APIs + * @{ + */ + +/** \defgroup WPS_APIs WPS APIs + * @brief WPS APIs + * + * WPS can only be used when station is enabled. + * + */ + +/** @addtogroup WPS_APIs + * @{ + */ + +#define CSI_ERR_WIFI_REGISTRAR (CSI_DRV_ERRNO_WIFI_BASE + 51) /*!< WPS registrar is not supported */ +#define CSI_ERR_WIFI_WPS_TYPE (CSI_DRV_ERRNO_WIFI_BASE + 52) /*!< WPS type error */ +#define CSI_ERR_WIFI_WPS_SM (CSI_DRV_ERRNO_WIFI_BASE + 53) /*!< WPS state machine is not initialized */ + +typedef enum wps_type { + WPS_TYPE_DISABLE = 0, + WPS_TYPE_PBC, + WPS_TYPE_PIN, + WPS_TYPE_MAX, +} wps_type_t; + +/** + * @brief Enable Wi-Fi WPS function. + * + * @attention WPS can only be used when station is enabled. + * + * @param wps_type : WPS type, so far only WPS_TYPE_PBC and WPS_TYPE_PIN is supported + * + * @return + * - CSI_OK : succeed + * - CSI_ERR_WIFI_WPS_TYPE : wps type is invalid + * - CSI_ERR_WIFI_WPS_MODE : wifi is not in station mode or sniffer mode is on + * - CSI_ERR_WIFI_FAIL : wps initialization fails + */ +int32_t csi_wifi_wps_enable(wps_type_t wps_type); + +/** + * @brief Disable Wi-Fi WPS function and release resource it taken. + * + * @return + * - CSI_OK : succeed + * - CSI_ERR_WIFI_WPS_MODE : wifi is not in station mode or sniffer mode is on + */ +int32_t csi_wifi_wps_disable(void); + +/** + * @brief WPS starts to work. + * + * @attention WPS can only be used when station is enabled. + * + * @param timeout_ms : maximum blocking time before API return. + * - 0 : non-blocking + * - 1~120000 : blocking time + * + * @return + * - CSI_OK : succeed + * - CSI_ERR_WIFI_WPS_TYPE : wps type is invalid + * - CSI_ERR_WIFI_WPS_MODE : wifi is not in station mode or sniffer mode is on + * - CSI_ERR_WIFI_WPS_SM : wps state machine is not initialized + * - CSI_ERR_WIFI_FAIL : wps initialization fails + */ +int32_t csi_wifi_wps_start(int timeout_ms); + +#ifdef __cplusplus +} +#endif + +#endif /* __CSI_WIFI_H__ */ + diff --git a/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/system.c b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/system.c new file mode 100644 index 000000000..34433eea6 --- /dev/null +++ b/FreeRTOS/Demo/T-HEAD_CB2201_CDK/csi/csi_driver/include/system.c @@ -0,0 +1,33 @@ +#include <stdint.h>
+#include <soc.h>
+#include <csi_core.h>
+
+extern void CORET_IRQHandler(void);
+extern void Default_handler(void);
+extern void console_init();
+void (*g_irqvector[32])(void);
+
+void irq_vectors_init(void)
+{
+ int i;
+
+ for (i = 0; i < 32; i++) {
+ g_irqvector[i] = Default_handler;
+ }
+
+ g_irqvector[CORET_IRQn] = CORET_IRQHandler;
+}
+
+
+#define CONFIG_SYSTICK_HZ 100
+#define CONFIG_SYSTEM_FREQ 24000000
+
+void SystemInit(void)
+{
+ irq_vectors_init();
+ drv_coret_config(CONFIG_SYSTEM_FREQ / CONFIG_SYSTICK_HZ, CORET_IRQn); //10ms
+ drv_nvic_enable_irq(CORET_IRQn);
+
+ console_init();
+ return;
+}
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