diff options
author | dormando <dormando@rydia.net> | 2020-04-24 18:37:39 -0700 |
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committer | dormando <dormando@rydia.net> | 2020-04-30 17:34:17 -0700 |
commit | 4f2753909324c3532836926de647c301a1407f05 (patch) | |
tree | a9d0b07a23026cc3e6a7aa547bc44c49108dcc48 /crc32c.c | |
parent | 97e8ebd82fc7ac142a30bd0740cd60bc37b8c8bc (diff) | |
download | memcached-4f2753909324c3532836926de647c301a1407f05.tar.gz |
Disable aarch64 hw crc32 function for now
Also re-adds the start time detection of intel instruction.
I never got a proper test platform for the ARM bits and it's been stuck
as a configure flag. I'd be happy to add it back if that situation
changes.
Diffstat (limited to 'crc32c.c')
-rw-r--r-- | crc32c.c | 15 |
1 files changed, 11 insertions, 4 deletions
@@ -43,9 +43,12 @@ #include <pthread.h> #include "crc32c.h" +crc_func crc32c; + /* CRC-32C (iSCSI) polynomial in reversed bit order. */ #define POLY 0x82f63b78 +uint32_t crc32c_sw(uint32_t crc, void const *buf, size_t len); uint32_t crc32c_sw_little(uint32_t crc, void const *buf, size_t len); uint32_t crc32c_sw_big(uint32_t crc, void const *buf, size_t len); #ifdef __x86_64__ @@ -260,17 +263,21 @@ static uint32_t crc32c_hw(uint32_t crc, void const *buf, size_t len) { /* Compute a CRC-32C. If the crc32 instruction is available, use the hardware version. Otherwise, use the software version. */ -uint32_t crc32c(uint32_t crc, void const *buf, size_t len) { +void crc32c_init(void) { int sse42; SSE42(sse42); - return sse42 ? crc32c_hw(crc, buf, len) : crc32c_sw(crc, buf, len); + if (sse42) { + crc32c = crc32c_hw; + } else { + crc32c = crc32c_sw; + } } #else /* !__x86_64__ */ -uint32_t crc32c(uint32_t crc, void const *buf, size_t len) { - return crc32c_sw(crc, buf, len); +void crc32c_init(void) { + crc32c = crc32c_sw; } #endif |