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* [PowerPC] Use INC_GPR/INC_VR marcos and define HAVE_NATIVE_poly1305_blocks ↵Maamoun TK2022-11-081-0/+12
| | | | in fat build
* ppc: New configure test for ELFV2_ABINiels Möller2022-01-041-2/+2
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* [PowerPC64] Use 32-bit offset to load datamamonet2020-12-181-1/+2
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* "PowerPC64" Use same register convention in VSR macroMaamoun TK2020-09-231-4/+3
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* "PowerPC64" Use explicit register namesMaamoun TK2020-09-231-4/+7
| | | | | This patch is built upon ppc-m4-macrology.patch. Using explicit register names is working as expected now.
* ppc: Add configure test and macros to replace register names.Niels Möller2020-09-211-0/+14
| | | | | | | | | | | | | * aclocal.m4 (GMP_ASM_POWERPC_R_REGISTERS): New configure test, adapted from corresponding test in GMP's acinlude.m4. * configure.ac (ASM_PPC_WANT_R_REGISTERS): New substituted variable. Set using GMP_ASM_POWERPC_R_REGISTERS, when powerpc64 assembly code is enabled. * config.m4.in: Substituted here. * powerpc64/machine.m4: Check ASM_PPC_WANT_R_REGISTERS, and if needed, replace register names like r0, r1, ... with integers. * Makefile.in (%.asm): Include m4-utils.m4 for preprocessing of .asm files, and include config.m4 before machine.m4.
* Use default m4 quote character in asm files, part 5default-m4-quote-charNiels Möller2020-09-141-17/+17
| | | | Update powerpc64 files.
* "PowerPC64" AES improve syntaxMaamoun TK2020-09-041-0/+4
| | | | | | | | | | This patch adds "VSR" macro to improve the syntax of assembly code, I will create a separate patch for gcm-hash since it hasn't merged yet to the master. I also removed the TODO from README because I tried to use "lxv/stxv" in POWER9 instead of "lxvd2x/stxvd2x" but gcc produced "lxvd2x/stxvd2x" in the binary. I'm not sure if it's variant issue of gcc but this will be problematic since "lxvd2x/stxvd2x" need permuting in little-endian mode while "lxv/stxv" is endianness aware.
* "PowerPC64" Add machine.m4Maamoun TK2020-08-261-0/+32