Merge remote-tracking branch cros/main into firmware-fpmcu-dartmonkey-releasefirmware-fpmcu-dartmonkey-release

Generated by: ./util/update_release_branch.py --board dartmonkey --relevant_paths_file
./util/fingerprint-relevant-paths.txt firmware-fpmcu-dartmonkey-release

Relevant changes:

git log --oneline 6c1587ca70..28712dae9d -- board/nocturne_fp
board/dartmonkey common/fpsensor docs/fingerprint driver/fingerprint
util/getversion.sh

ded9307b79 util/getversion.sh: Fix version when not in a git repo
956055e692 board: change Google USB vendor info
71b2ef709d Update license boilerplate text in source code files
33e11afda0 Revert "fpsensor: Build fpsensor source file with C++"
c8d0360723 fpsensor: Build fpsensor source file with C++
bc113abd53 fpsensor: Fix g++ compiler error
150a58a0dc fpsensor: Fix fp_set_sensor_mode return type
b33b5ce85b fpsensor: Remove nested designators for C++ compatibility
2e864b2539 tree-wide: const-ify argv for console commands
56d8b360f9 test: Add test for get ikm failure when seed not set
3a3d6c3690 test: Add test for fpsensor trivial key failure
233e6bbd08 fpsensor_crypto: Abstract calls to hmac_SHA256
0a041b285b docs/fingerprint: Typo correction
c03fab67e2 docs/fingerprint: Fix the path of fputils.py
0b5d4baf5a util/getversion.sh: Fix empty file list handling
6e128fe760 FPMCU dev board environment with Satlab
3eb29b6aa5 builtin: Move ssize_t to sys/types.h
345d62ebd1 docs/fingerprint: Update power numbers for latest dartmonkey release
c25ffdb316 common: Conditionally support printf %l and %i modifiers
9a3c514b45 test: Add a test to check if the debugger is connected
54e603413f Move standard library tests to their own file
43fa6b4bf8 docs/fingerprint: Update power numbers for latest bloonchipper release
25536f9a84 driver/fingerprint/fpc/bep/fpc_sensor_spi.c: Format with clang-format
4face99efd driver/fingerprint/fpc/libfp/fpc_sensor_pal.h: Format with clang-format
738de2b575 trng: Rename rand to trng_rand
14b8270edd docs/fingerprint: Update dragonclaw power numbers
0b268f93d1 driver/fingerprint/fpc/libfp/fpc_private.c: Format with clang-format
f80da163f2 driver/fingerprint/fpc/libfp/fpc_private.h: Format with clang-format
a0751778f4 board/nocturne_fp/ro_workarounds.c: Format with clang-format
5e9c85c9b1 driver/fingerprint/fpc/libfp/fpc_sensor_pal.c: Format with clang-format
c1f9dd3cf8 driver/fingerprint/fpc/libfp/fpc_bio_algorithm.h: Format with clang-format
eb1e1bed8d driver/fingerprint/fpc/libfp/fpc1145_private.h: Format with clang-format
6e7b611821 driver/fingerprint/fpc/bep/fpc_bio_algorithm.h: Format with clang-format
e0589cd5e2 driver/fingerprint/fpc/bep/fpc1035_private.h: Format with clang-format
58f0246dbe board/nocturne_fp/board_ro.c: Format with clang-format
7905e556a0 common/fpsensor/fpsensor_crypto.c: Format with clang-format
21289d170c driver/fingerprint/fpc/bep/fpc1025_private.h: Format with clang-format
98a20f937e common/fpsensor/fpsensor_state.c: Format with clang-format
a2d255d8af common/fpsensor/fpsensor.c: Format with clang-format
84e53a65da board/nocturne_fp/board.h: Format with clang-format
73055eeb3f driver/fingerprint/fpc/bep/fpc_private.c: Format with clang-format
0f7b5cb509 common/fpsensor/fpsensor_private.h: Format with clang-format
1ceade6e65 driver/fingerprint/fpc/bep/fpc_private.h: Format with clang-format
dca9d74321 Revert "trng: Rename rand to trng_rand"
a6b0b3554f trng: Rename rand to trng_rand
28d0b75b70 third_party/boringssl: Remove unused header

BRANCH=None
BUG=b:244387210 b:242720240 b:215613183 b:242720910 b:236386294
BUG=b:234181908 b:244781166 b:234781655 b:234143158 b:234181908
BUG=b:237344361 b:236025198 b:234181908 b:180945056 chromium:1098010
BUG=b:246424843 b:234181908 b:131913998
TEST=`make -j buildall`
TEST=./util/run_device_tests.py --board dartmonkey
     Test "aes": PASSED
     Test "cec": PASSED
     Test "cortexm_fpu": PASSED
     Test "crc": PASSED
     Test "flash_physical": PASSED
     Test "flash_write_protect": PASSED
     Test "fpsensor_hw": PASSED
     Test "fpsensor_spi_ro": PASSED
     Test "fpsensor_spi_rw": PASSED
     Test "fpsensor_uart_ro": PASSED
     Test "fpsensor_uart_rw": PASSED
     Test "mpu_ro": PASSED
     Test "mpu_rw": PASSED
     Test "mutex": PASSED
     Test "pingpong": PASSED
     Test "printf": PASSED
     Test "queue": PASSED
     Test "rollback_region0": PASSED
     Test "rollback_region1": PASSED
     Test "rollback_entropy": PASSED
     Test "rtc": PASSED
     Test "sha256": PASSED
     Test "sha256_unrolled": PASSED
     Test "static_if": PASSED
     Test "stdlib": PASSED
     Test "system_is_locked_wp_on": PASSED
     Test "system_is_locked_wp_off": PASSED
     Test "timer_dos": PASSED
     Test "utils": PASSED
     Test "utils_str": PASSED
     Test "panic_data_dartmonkey_v2.0.2887": PASSED
     Test "panic_data_nocturne_fp_v2.2.64": PASSED
     Test "panic_data_nami_fp_v2.2.144": PASSED
Force-Relevant-Builds: all
Signed-off-by: Tom Hughes <tomhughes@chromium.org>

Change-Id: I2c312583a709fedae8fe11d92c22328c3b634bc7

10 files changed, 82 insertions, 6 deletions

diff --git a/zephyr/app/ec/chip/CMakeLists.txt b/zephyr/app/ec/chip/CMakeLists.txt
new file mode 100644
index 0000000000..e92dbc5d5d
--- /dev/null
+++ b/zephyr/app/ec/chip/CMakeLists.txt
@@ -0,0 +1 @@
+add_subdirectory_ifdef(CONFIG_RISCV riscv)
\ No newline at end of file
diff --git a/zephyr/app/ec/chip/arm/microchip_xec/Kconfig.xec b/zephyr/app/ec/chip/arm/microchip_xec/Kconfig.xec
index d05ad020e7..3baca08d04 100644
--- a/zephyr/app/ec/chip/arm/microchip_xec/Kconfig.xec
+++ b/zephyr/app/ec/chip/arm/microchip_xec/Kconfig.xec
@@ -1,4 +1,4 @@
-# Copyright 2022 The Chromium OS Authors. All rights reserved.
+# Copyright 2022 The ChromiumOS Authors
 # Use of this source code is governed by a BSD-style license that can be
 # found in the LICENSE file.
 
@@ -8,6 +8,10 @@
 
 if SOC_FAMILY_MEC
 
+# Enable MPU for ARM targets
+config ARM_MPU
+	default y
+
 # ADC
 config PLATFORM_EC_ADC_RESOLUTION
 	default 10
diff --git a/zephyr/app/ec/chip/arm/microchip_xec/Kconfig.xec_mec172x b/zephyr/app/ec/chip/arm/microchip_xec/Kconfig.xec_mec172x
index 9e37b6a534..bfcfeb8235 100644
--- a/zephyr/app/ec/chip/arm/microchip_xec/Kconfig.xec_mec172x
+++ b/zephyr/app/ec/chip/arm/microchip_xec/Kconfig.xec_mec172x
@@ -1,4 +1,4 @@
-# Copyright 2022 The Chromium OS Authors. All rights reserved.
+# Copyright 2022 The ChromiumOS Authors
 # Use of this source code is governed by a BSD-style license that can be
 # found in the LICENSE file.
 
diff --git a/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx b/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx
index 2da9252775..17936ab05d 100644
--- a/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx
+++ b/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx
@@ -1,4 +1,4 @@
-# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Copyright 2021 The ChromiumOS Authors
 # Use of this source code is governed by a BSD-style license that can be
 # found in the LICENSE file.
 
@@ -8,6 +8,10 @@
 
 if SOC_FAMILY_NPCX
 
+# Enable MPU for ARM targets
+config ARM_MPU
+	default y
+
 # Enable NPCX firmware header generator
 config NPCX_HEADER
 	default y
diff --git a/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx7 b/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx7
index 37561f4dad..cb00db3345 100644
--- a/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx7
+++ b/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx7
@@ -1,4 +1,4 @@
-# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Copyright 2021 The ChromiumOS Authors
 # Use of this source code is governed by a BSD-style license that can be
 # found in the LICENSE file.
 
diff --git a/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx9 b/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx9
index aceec4f3ca..9c807a732c 100644
--- a/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx9
+++ b/zephyr/app/ec/chip/arm/nuvoton_npcx/Kconfig.npcx9
@@ -1,4 +1,4 @@
-# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Copyright 2021 The ChromiumOS Authors
 # Use of this source code is governed by a BSD-style license that can be
 # found in the LICENSE file.
 
diff --git a/zephyr/app/ec/chip/riscv/CMakeLists.txt b/zephyr/app/ec/chip/riscv/CMakeLists.txt
new file mode 100644
index 0000000000..b11c4e9a90
--- /dev/null
+++ b/zephyr/app/ec/chip/riscv/CMakeLists.txt
@@ -0,0 +1 @@
+add_subdirectory_ifdef(CONFIG_SOC_FAMILY_RISCV_ITE riscv-ite)
\ No newline at end of file
diff --git a/zephyr/app/ec/chip/riscv/riscv-ite/CMakeLists.txt b/zephyr/app/ec/chip/riscv/riscv-ite/CMakeLists.txt
new file mode 100644
index 0000000000..69608c33e3
--- /dev/null
+++ b/zephyr/app/ec/chip/riscv/riscv-ite/CMakeLists.txt
@@ -0,0 +1,3 @@
+if (CONFIG_ESPI_IT8XXX2)
+    zephyr_library_sources_ifdef(CONFIG_AP_POWER_CONTROL it8xxx2-espi.c)
+endif ()
\ No newline at end of file
diff --git a/zephyr/app/ec/chip/riscv/riscv-ite/Kconfig.it8xxx2 b/zephyr/app/ec/chip/riscv/riscv-ite/Kconfig.it8xxx2
index 809b9a6401..e0ea15c5b7 100644
--- a/zephyr/app/ec/chip/riscv/riscv-ite/Kconfig.it8xxx2
+++ b/zephyr/app/ec/chip/riscv/riscv-ite/Kconfig.it8xxx2
@@ -1,4 +1,4 @@
-# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Copyright 2021 The ChromiumOS Authors
 # Use of this source code is governed by a BSD-style license that can be
 # found in the LICENSE file.
 
diff --git a/zephyr/app/ec/chip/riscv/riscv-ite/it8xxx2-espi.c b/zephyr/app/ec/chip/riscv/riscv-ite/it8xxx2-espi.c
new file mode 100644
index 0000000000..6109964cb9
--- /dev/null
+++ b/zephyr/app/ec/chip/riscv/riscv-ite/it8xxx2-espi.c
@@ -0,0 +1,63 @@
+/* Copyright 2022 The ChromiumOS Authors
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+#include <soc_espi.h>
+#include <ap_power/ap_power.h>
+#include <chipset.h>
+#include <zephyr/devicetree.h>
+#include <zephyr/logging/log.h>
+
+LOG_MODULE_REGISTER(ec_chip_it8xxx2_espi, CONFIG_ESPI_LOG_LEVEL);
+
+/*
+ * When eSPI CS# is held low, it prevents IT8xxx2 from entering deep doze.
+ * To allow deep doze and save power, disable the eSPI inputs while the AP is
+ * in G3.
+ */
+static const struct device *const espi_device =
+	DEVICE_DT_GET(DT_NODELABEL(espi0));
+
+static void espi_enable_callback(struct ap_power_ev_callback *cb,
+				 struct ap_power_ev_data data)
+{
+	switch (data.event) {
+	case AP_POWER_INITIALIZED:
+		/* When AP power state becomes known, sync eSPI enable */
+		if (chipset_in_state(CHIPSET_STATE_HARD_OFF)) {
+			LOG_DBG("AP off; disabling eSPI");
+			espi_it8xxx2_enable_pad_ctrl(espi_device, false);
+		}
+		break;
+	case AP_POWER_PRE_INIT:
+	case AP_POWER_HARD_OFF: {
+		bool enable = data.event == AP_POWER_PRE_INIT;
+
+		LOG_DBG("%sabling eSPI in response to AP power event",
+			enable ? "en" : "dis");
+		espi_it8xxx2_enable_pad_ctrl(espi_device, enable);
+		break;
+	}
+	default:
+		__ASSERT(false, "%s: unhandled event: %d", __func__,
+			 data.event);
+		break;
+	}
+}
+
+static int init_espi_enable_callback(const struct device *unused)
+{
+	static struct ap_power_ev_callback cb;
+
+	if (!device_is_ready(espi_device))
+		k_oops();
+
+	ap_power_ev_init_callback(&cb, espi_enable_callback,
+				  AP_POWER_INITIALIZED | AP_POWER_PRE_INIT |
+					  AP_POWER_HARD_OFF);
+	ap_power_ev_add_callback(&cb);
+
+	return 0;
+}
+/* Should run before power sequencing init so INITIALIZED callback can fire */
+SYS_INIT(init_espi_enable_callback, APPLICATION, 0);