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* 2013-06-17 Catherine Moore <clm@codesourcery.com>Catherine Moore2013-06-174-4/+141
* * Makefile.am (mips-opc.lo): Add rules to create automaticAlan Modra2013-06-173-6/+58
* * rx-decode.opc (rx_decode_opcode): Bit operations onDJ Delorie2013-06-143-81/+103
* 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>Chao-ying Fu2013-06-133-0/+38
* 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>Sandra Loosemore2013-06-102-1/+6
* gas/Richard Sandiford2013-06-084-938/+957
* opcodes/Richard Sandiford2013-05-242-1/+5
* 2013-05-23 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel2013-05-232-2/+7
* include/opcode/Richard Sandiford2013-05-222-7/+24
* opcodes/Peter Bergner2013-05-213-7/+200
* * ia64-raw.tbl: Replace non-ASCII char.Alan Modra2013-05-174-10/+16
* gas/sekanath2013-05-153-2/+7
* gas/yufeng2013-05-133-4/+9
* binutils/ChangeLog:pinskia2013-05-103-3/+55
* * ppc-opc.c (extract_vlesi): Properly sign extend.Alan Modra2013-05-092-6/+8
* * archures.c: Add some more MSP430 machine numbers.Nick Clifton2013-05-022-135/+581
* 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>Sandra Loosemore2013-04-242-1/+6
* PR binutils/15369Nick Clifton2013-04-172-4/+10
* opcodes/Jan Kratochvil2013-04-102-1/+6
* gas/testsuite/Jan Beulich2013-04-083-15/+8
* Increase the accuracy of sparc instruction aliases.David S. Miller2013-04-063-134/+219
* * elf32-v850.c (v850_elf_is_target_special_symbol): New function.Nick Clifton2013-04-033-9/+40
* Properly check address mode for SIBH.J. Lu2013-03-272-4/+10
* PR binutils/15068Nick Clifton2013-03-272-62/+455
* * include/opcode/tic6x.h: add tic6x_coding_dreg_(msb|lsb) field coding type inNick Clifton2013-03-202-3/+20
* Eliminate warning message.eager2013-03-122-1/+7
* 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>Sandra Loosemore2013-03-122-0/+6
* 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>Sandra Loosemore2013-03-122-0/+6
* 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>Sandra Loosemore2013-03-122-0/+5
* Add support for AArch32 CRC instruction in ARMv8.ktkachov2013-03-112-1/+27
* PR binutils/15241Nick Clifton2013-03-082-2/+11
* Add RegRex64 to rizH.J. Lu2013-03-023-5/+10
* include/opcode/yufeng2013-02-285-390/+513
* * rl78-decode.opc (rl78_decode_opcode): Fix typo.Alan Modra2013-02-273-202/+208
* * rl78-decode.opc: Fix encoding of DIVWU insn.Nick Clifton2013-02-253-6/+16
* Implement Intel SMAP instructionsH.J. Lu2013-02-197-2762/+2818
* * metag-dis.c: Initialize outf->bytes_per_chunk to 4Nick Clifton2013-02-152-0/+7
* opcodes/yufeng2013-02-142-15/+24
* Correct ChangeLog dates.Maciej W. Rozycki2013-02-131-1/+1
* opcodes/Maciej W. Rozycki2013-02-132-0/+8
* 2013-02-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>Richard Earnshaw2013-02-112-2/+6
* gas/Richard Sandiford2013-02-092-13/+19
* 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>Sandra Loosemore2013-02-068-0/+865
* * po/POTFILES.in: Regenerate.Alan Modra2013-02-044-1013/+1020
* include/opcode/yufeng2013-01-308-659/+732
* Add support for V850E3V5 architectureNick Clifton2013-01-243-197/+955
* include/opcode/yufeng2013-01-175-10/+28
* Add OPERAND_TYPE_IMM32_64H.J. Lu2013-01-164-2/+16
* * config/tc-v850.c (md_assemble): Allow signed values forNick Clifton2013-01-153-2/+10
* * metag-dis.c (REG_WIDTH): Increase to 64.Nick Clifton2013-01-142-1/+5
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