| Commit message (Expand) | Author | Age | Files | Lines |
* | insns.dat: Add Intel Control-Flow Enforcement Technology (CET) instructions | Henrik Gramner | 2020-06-27 | 2 | -0/+17 |
* | BR 3392681: handle a64 instruction patters correctly | H. Peter Anvin (Intel) | 2020-06-22 | 1 | -3/+3 |
* | avx512: remove bogus imm8 for specific VCMP and VPCMP operations | H. Peter Anvin (Intel) | 2020-06-05 | 1 | -584/+584 |
* | avx512: implement shorthand forms of VCMP and VPCMP opcodes | H. Peter Anvin (Intel) | 2020-06-05 | 1 | -25/+585 |
* | BR 3392676: fix cmpxchg8b/16b with explicit size | H. Peter Anvin (Intel) | 2020-06-04 | 1 | -2/+2 |
* | BR 3392674: fix handling of {ud1,ud2b} <reg>,<reg> | H. Peter Anvin | 2020-06-01 | 1 | -6/+6 |
* | insns.dat: Fix the opcodes for the AVX512-VBMI2 instructions | Henrik Gramner | 2020-04-22 | 1 | -18/+18 |
* | LEA: allow immediate syntax; ignore operand size entirely | H. Peter Anvin (Intel) | 2019-08-14 | 2 | -3/+7 |
* | obsolete handing: handle a few more subcases in a useful way | H. Peter Anvin (Intel) | 2019-08-09 | 3 | -9/+18 |
* | perl files: clean up warnings | H. Peter Anvin (Intel) | 2019-08-09 | 2 | -13/+15 |
* | Add implicitly sized versions of the K instructions | H. Peter Anvin (Intel) | 2019-08-09 | 1 | -2/+72 |
* | insns.pl: use less cantankerous string expansion; better error info | H. Peter Anvin (Intel) | 2019-08-09 | 2 | -43/+52 |
* | x86/insns-iflags.ph: add comments in iflag.c | H. Peter Anvin | 2019-08-07 | 1 | -3/+6 |
* | iflags.ph: add file missing from commit 418138c8f2d1 | H. Peter Anvin (Intel) | 2019-08-07 | 1 | -0/+121 |
* | iflags: move definitions to a separate file; auto-generate more | H. Peter Anvin (Intel) | 2019-08-06 | 1 | -141/+89 |
* | insns.dat: Fix MOVDDUP instruction | Chang S. Bae | 2019-06-02 | 1 | -1/+1 |
* | Merge tag 'nasm-2.14.01' | H. Peter Anvin | 2018-12-22 | 1 | -0/+3 |
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| * | insns.dat: accept explicit ax/eax/rax operand to CLZERO | H. Peter Anvin | 2018-12-22 | 1 | -0/+3 |
* | | Don't convert the various RESx instructions to RESB | H. Peter Anvin | 2018-12-18 | 1 | -7/+7 |
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* | insns.dat: add Intel Software Guard Extensions (SGX) instructions | H. Peter Anvin (Intel) | 2018-06-25 | 2 | -0/+6 |
* | insns.dat: V4F(N)MADDSS are .lig not .512 | H. Peter Anvin (Intel) | 2018-06-25 | 1 | -2/+2 |
* | insns.dat: fix the opcodes for the V4FNM* instructions | H. Peter Anvin | 2018-06-25 | 1 | -2/+2 |
* | asm: support the +n syntax for register sets | H. Peter Anvin | 2018-06-25 | 1 | -6/+6 |
* | insns.dat: add support for the V4* and VP4* 4-way instructionsnasm-2.14rc8 | H. Peter Anvin (Intel) | 2018-06-25 | 2 | -0/+12 |
* | insns.dat: add PTWRITE instruction | H. Peter Anvin (Intel) | 2018-06-25 | 1 | -0/+4 |
* | insns.dat: update with instructions from ISE 319433-034 | H. Peter Anvin | 2018-06-16 | 2 | -3/+138 |
* | insns.dat: Update UD0 encoding to fit the specification | Cyrill Gorcunov | 2018-02-25 | 1 | -1/+4 |
* | Merge remote-tracking branch 'origin/nasm-2.13.xx' | H. Peter Anvin | 2018-02-20 | 1 | -1/+19 |
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| * | insns.dat: add aliases of the RET instruction with explicit operand size | H. Peter Anvin | 2018-02-14 | 1 | -1/+19 |
* | | Merge tag 'nasm-2.13.03' | H. Peter Anvin | 2018-02-07 | 1 | -95/+117 |
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| * | iflag: automatically assign values, saner handling of CPU levels | H. Peter Anvin | 2018-02-06 | 1 | -95/+117 |
| * | Revert "insns.dat: Add VAESENC, VAESENCLAST instructions" | Cyrill Gorcunov | 2018-02-05 | 1 | -24/+0 |
| * | insns.dat: Add VAESENC, VAESENCLAST instructions | Tomasz Kantecki | 2018-02-05 | 1 | -0/+24 |
| * | insns.dat: Add VPCLMULQDQ instruictions | Tomasz Kantecki | 2018-01-08 | 1 | -0/+27 |
| * | insns-flags: Add VPCLMULQDQ flag | Cyrill Gorcunov | 2018-01-08 | 1 | -0/+1 |
| * | insns.dat: Move VAES instructions to AES group | Cyrill Gorcunov | 2018-01-08 | 1 | -24/+25 |
| * | insns.dat: Add VAESENC, VAESENCLAST instructions | Tomasz Kantecki | 2018-01-08 | 1 | -0/+24 |
| * | insns-iflags: Add AES, VAES flags | Cyrill Gorcunov | 2018-01-08 | 1 | -19/+21 |
* | | insns.dat: Add VPCLMULQDQ instruictions | Tomasz Kantecki | 2017-12-29 | 1 | -0/+27 |
* | | insns-flags: Add VPCLMULQDQ flag | Cyrill Gorcunov | 2017-12-29 | 1 | -0/+1 |
* | | insns.dat: Move VAES instructions to AES group | Cyrill Gorcunov | 2017-12-29 | 1 | -24/+25 |
* | | insns.dat: Add VAESENC, VAESENCLAST instructions | Tomasz Kantecki | 2017-12-29 | 1 | -0/+24 |
* | | insns-iflags: Add AES, VAES flags | Cyrill Gorcunov | 2017-12-29 | 1 | -19/+21 |
* | | Merge remote-tracking branch 'origin/nasm-2.13.xx' | H. Peter Anvin | 2017-11-01 | 1 | -4/+6 |
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| * | BR 3392362: generate RMI versions of PEXTRW when possible | H. Peter Anvin | 2017-09-27 | 1 | -4/+6 |
* | | insns.dat: change the title of the pseudo-ops section | H. Peter Anvin | 2017-05-01 | 1 | -1/+1 |
* | | Don't sort opcodes; move all pseudo-ops to the beginning | H. Peter Anvin | 2017-05-01 | 2 | -6/+13 |
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* | doc: clean up the instruction list in the documentation slightly | H. Peter Anvin | 2017-04-07 | 1 | -16/+20 |
* | BR 3392396: fix EVEX compressed displacements | H. Peter Anvin | 2017-04-06 | 1 | -6/+6 |
* | Rename insns-iflags.pl -> insns-iflags.ph, add missing dependency | H. Peter Anvin | 2017-04-03 | 3 | -2/+2 |