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* IT87: Add ability to select between chips on GIGABYTE DualBIOS boards.stefanct2013-08-241-3/+2
| | | | | | | | | | | | | | | Thanks to Vadim Girlin for finding out how to do that. This is known to work on GA-MA770-UD3, GA-B75M-D3V, GA-B75N and GA-H61M-S1 (only M_BIOS is populated). Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com> Signed-off-by: Damien Zammit <damien@zamaudio.com> Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Tested-by: Damien Zammit <damien@zamaudio.com> Tested-by: Anton Kochkov <anton.kochkov@gmail.com> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1720 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Various cross-platform fixes.stefanct2013-07-131-1/+5
| | | | | | | | | | | | | | | | | | | | | | | Improve compilation with libpayload (compiling flashrom.c and linking is still broken): - disable Ponyprog (which enforced serial.c compilation) - make errno available where it is needed Fix internal.c for non-x86 and enable cb parsing on ARM. Fix mingw builds by using its __USE_MINGW_ANSI_STDIO macro and gnu_printf definition for printf format style checking. See http://sourceforge.net/apps/trac/mingw-w64/wiki/gnu%20printf This requires inclusion of stdio.h in flash.h. Fix order of libraries in the Makefile: FEATURE_LIBS needs to come *after* PCILIBS in case ZLIB is needed by it. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1697 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add a bunch of new/tested stuff and various small changes 17.stefanct2013-02-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested Mainboards: OK: - Acer V75-M (used in IBM Aptiva 2170-G) http://www.flashrom.org/pipermail/flashrom/2012-December/010300.html - Acorp 6M810C http://www.flashrom.org/pipermail/flashrom/2013-January/010433.html - ASRock G31M-S rev 2.0 http://www.flashrom.org/pipermail/flashrom/2013-February/010538.html - ASUS F1A75-V PRO http://paste.flashrom.org/view.php?id=1528 - ASUS M5A97 (rev. 1.0) http://www.flashrom.org/pipermail/flashrom/2013-February/010483.html - ASUS P5KPL-AM IN/GB http://www.flashrom.org/pipermail/flashrom/2013-January/010455.html - GABYTE GA-H77M-D3H http://www.flashrom.org/pipermail/flashrom/2013-February/010538.html NOT OK: - GIGABYTE GA-Z77MX-D3H http://paste.flashrom.org/view.php?id=1529 http://paste.flashrom.org/view.php?id=1530 Tested flash chips: - Winbond W25X10 to PREW (+PREW) Reported on IRC(?) - Eon EN25Q32(A/B) to PREW (+REW) http://www.flashrom.org/pipermail/flashrom/2013-February/010533.html - Eon EN25Q64 to PREW (+PREW) http://www.flashrom.org/pipermail/flashrom/2013-January/010466.html Miscellaneous: - Fix superflouos line breaks in wiki mainboard and laptop output. - Use the .nh (no hyphenation) command in the manpage to enforce single-line URLs where useful. - Reference the manpage (besides the Laptops wiki page) in the laptop warning. - Minor output and whitespace fixes. - Add Fidelix IDs. - Add ISSE clones of PMC chips. - Fix typo: EMST -> ESMT. - Add ID of ESMT F25D08QA. - Refine GigaDevice GD25Q series (missing voltages and comments). - Use underscore instead of lower-case x as wildcard in Sharp chip names. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1650 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Introduce msg_*warn.stefanct2013-01-041-1/+1
| | | | | | | | | | Also, unify all outputs of "Warning:" and "Error:" to use normal capitalization instead of mixing it with all capitals. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Idwer Vollering <vidwer@gmail.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1643 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Unify PCI init and let pcidev clean itself up.stefanct2013-01-041-4/+2
| | | | | | | | | | | | | | | | | | | Previously the internal programmer used its own code to initialize pcilib. This patch extracts the common code from the internal programmer and pcidev_init() into pcidev_init_common(). This fixes the non-existent PCI cleanup of the internal programmer and adds an additional safety by checking for an already existing PCI context. We got a nice shutdown function registration infrastructure, but did not use it very wisely. Instead we added shutdown functions to a myriad of programmers unnecessarily. In this patch we get rid of those that do only call pci_cleanup(pacc) by adding a shutdown function the pcidev.c itself that gets registered by pcidev_init(). Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1642 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Fix flashrom running on boards with coreboot.stefanct2012-09-241-7/+3
| | | | | | | | | | | | | | In r1577 we removed the discrimination of coreboot IDs and user-specified mainboards. The problem is that the board enable code required to find a board enable if either of these model strings were set. Therefore boards running coreboot that do not need a board enable failed to execute flashrom since then. This patch fixes this by handling coreboot IDs and user-supplied IDs differently again. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Idwer Vollering <vidwer@gmail.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1605 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add a bunch of new/tested stuff and various small changes 14.stefanct2012-09-211-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested Mainboards: OK: - ASUS M3A78-EH http://www.flashrom.org/pipermail/flashrom/2010-October/005297.html - ASUS P2B-LS http://www.flashrom.org/pipermail/flashrom/2010-November/005506.html - Biostar TA790GX A3+ http://paste.flashrom.org/view.php?id=1350 - ECS 848P-A7 http://www.flashrom.org/pipermail/flashrom/2011-January/005781.html - GIGABYTE GA-G41MT-S2PT Reported on IRC - GIGABYTE GA-H77-D3H Reported and tested by Alexander Gordeev on IRC. - Gigabyte GA-X79-UD5 http://www.flashrom.org/pipermail/flashrom/2012-August/009811.html - Shuttle FN78S http://www.flashrom.org/pipermail/flashrom/2012-August/009714.html - VIA EITX-3000 Reported on IRC by Tuju NOT OK: - Dell PowerEdge C6220 (0HYFFG) http://www.flashrom.org/pipermail/flashrom/2012-September/009900.html - Foxconn Q45M http://www.flashrom.org/pipermail/flashrom/2012-September/009923.html - MSI MS-7309 (K9N6SGM-V) http://www.flashrom.org/pipermail/flashrom/2012-August/009712.html - Supermicro X9QRi-F+ http://www.flashrom.org/pipermail/flashrom/2012-September/009887.html - ZOTAC H61-ITX WiFi (H61ITX-A-E) http://www.flashrom.org/pipermail/flashrom/2012-August/009649.html ASUS CUSL2-C has been tested to be working with the board enable once implemented for the TUSL2-C board. They seem to have the same PCI IDs as shown in the links below. Since only the CUSL2-C board enable has been tested yet, we distinguish the two by DMI strings. http://paste.flashrom.org/view.php?id=1393 http://www.flashrom.org/pipermail/flashrom/attachments/20091206/ddca2c6c/attachment-0002.eml Tested flash chips: - Set EMST F25L008A to PREW (+PREW) http://www.flashrom.org/pipermail/flashrom/2012-August/009714.html - Set GigaDevice GD25Q64 to PREW (+PREW) http://git.chromium.org/gitweb/?p=chromiumos/third_party/flashrom.git;a=commit;h=9e8ef49b1f626c2197e131fba6c5b65c8af4eeea - Set Macronix MX25L12805 to P (+P) http://www.flashrom.org/pipermail/flashrom/2012-September/009887.html - Set SST SST49LF003A/B to PREW (+EW) http://paste.flashrom.org/view.php?id=467 - Set Winbond W49V002FA to PREW (+EW) http://www.flashrom.org/pipermail/flashrom/2011-January/005781.html Tested chipsets: - Intel X79 (0x1d41) http://www.flashrom.org/pipermail/flashrom/2012-August/009811.html Board enables: - add ASUS P4P800-X Created by Idwer Vollering and tested by Mingsen Bao: http://paste.flashrom.org/view.php?id=467 - add DMI string to P4P800-VM Miscellaneous: - Add remaining Intel 7 series chipset (LPC) PCI IDs - Add generic SPI detection for chips from Winbond - Minor manpage changes - Minor other cleanups - Escape full stops after abbreviations in the manpage. - Add ICH9 and successors to spi_get_valid_read_addr Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1601 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Some ISO C fixes.stefanct2012-08-271-0/+1
| | | | | | | | | | | | | | | | | This patch just fixes a limited number of bits not conforming to c99 by using - __asm__ instead of just asm - {0} instead of {} for struct initialization - h_addr_list[0] instead of h_addr to access the host address in struct hostent - #include <strings.h> where needed (for ffs and strcasecmp) Based on a previous patch by Carl-Daniel. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1585 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Refactor the -p internal:mainboard handling.stefanct2012-08-201-7/+26
| | | | | | | | | | | | | | | | This patch gets rid of some global variables and makes lots of bits along the code path that control the board enable execution more generic and clearer. From now on flashrom aborts on a few more occasions that should be safer for the user. For example it aborts if the enable function for the specified mainboard (enable) can not be found. Parts of the board_match_cbname refactoring were done by Carl-Daniel. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1577 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Remove more exit calls.stefanct2012-07-301-1/+1
| | | | | | | | | | | | | | | | This patch removes the remaining exit calls from - sp_openserport - sp_opensocket - sp_docommand - internal_init Almost all of this was done by Niklas. Signed-off-by: Niklas Söderlund <niso@kth.se> Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1557 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Automatically release I/O permissions on shutdown.hailfinger2012-07-211-2/+2
| | | | | | | | | | | | | | | | | | | | | | get_io_perms() is renamed to rget_io_perms() and automatically registers a function to release I/O permissions on shutdown. Actually release I/O permissions on Solaris and iopl()-supporting operating systems like Linux. This patch fixes quite a few programmers which forgot to release I/O permissions on shutdown, and it simplifies the shutdown and error handling code for all others. Do not call exit(1) if I/O permissions are denied and return an error instead. This part of the patch was written by Niklas Söderlund. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Niklas Söderlund <niso@kth.se> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1551 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Hide hwaccess.h from public API.hailfinger2012-07-201-0/+1
| | | | | | | | | | | | | | Move hwaccess.h #include from flash.h to individual drivers. libflashrom users need flash.h, but they do not care about hwaccess.h and should not see its definitions because they may conflict with other hardware access functions and #defines used by the libflashrom user. Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1549 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add Winbond W836xx SuperI/O detection.hailfinger2012-05-061-5/+7
| | | | | | | | | | | | | Add ITE IT8707F/IT8710F detection. Note that we autodetect those chips, but we don't handle their flash translation features automatically yet. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1533 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Fix parallel-style programmer access from ITE IT87/Winbond W83627 SPIhailfinger2012-03-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The ITE IT87 SPI driver uses a trick to speed up reading and writing: If a flash chip is 512 kByte or less, the flash chip can be completely mapped in memory and both read and write accesses are faster that way. The current IT87 SPI code did use the parallel programmer interface for memory mapped reads and writes, but that's the wrong abstraction. It has been fixed to use mmio_read*/mmio_write* for that purpose. The Winbond W83627 SPI driver uses the same trick in its read path for all supported chip sizes. Fix it the same way. Switch internal_chip_readn to use mmio_readn as proper abstraction. Kudos to Michael Karcher for spotting the bugs. Reported-by: Johan Svensson <flashrom.js@crypt.se> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Tested-by: Johan Svensson <flashrom.js@crypt.se> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1511 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Replace --mainboard with -p internal:mainboardhailfinger2012-01-041-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | --mainboard is a relic from a time before external programmers and makes the CLI inconsistent. Use a programmer parameter instead and free up the short option -m. NOTE: The --list-supported-wiki output changed to use -p internal:mainboard= instead of -m The --list-supported output changed the heading of the mainboard list from Vendor Board Status Required option to Vendor Board Status Required value for -p internal:mainboard= Fix lb_vendor_dev_from_string() not to write to the supplied string. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1483 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add struct flashctx * parameter to all functions accessing flash chips.hailfinger2011-12-181-7/+28
| | | | | | | | | | | | | | | | | All programmer access function prototypes except init have been made static and moved to the respective file. A few internal functions in flash chip drivers had chipaddr parameters which are no longer needed. The lines touched by flashctx changes have been adjusted to 80 columns except in header files. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1474 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Register Parallel/LPC/FWH programmers the same way SPI programmers are ↵hailfinger2011-11-091-2/+17
| | | | | | | | | | | | | | | | | | | | | registered. All programmers are now calling programmer registration functions and direct manipulations of buses_supported are not needed/possible anymore. Note: Programmers without parallel/LPC/FWH chip support should not call register_par_programmer(). Additional fixes: Set max_rom_decode.parallel for drkaiser. Remove abuse of programmer_map_flash_region in it85spi. Annotate several FIXMEs in it85spi. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-By: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1463 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Make the laptop warning less scary if unsurestefanct2011-09-131-6/+8
| | | | | | | | | | | | Telling the user to use "force_I_want_a_brick" if it is not even a laptop, is a bit over-the-top. Introduce a new laptop parameter "this_is_not_a_laptop" that allows to force operation, but only if the detection is not sure. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1440 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Introduce ERROR_FATAL, abort upon failed chipset enables.uwe2011-09-031-1/+2
| | | | | | | | | Signed-off-by: Tadas Slotkus <devtadas@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1426 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Rename CHIP_BUSTYPE_FOO to BUS_FOO.hailfinger2011-07-271-1/+1
| | | | | | | | | | It's shorter to type, and we have less problems with the 80 column limit. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1396 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* be more refined regarding DMI chassis typesstefanct2011-07-261-5/+14
| | | | | | | | | | | | | | | | | | | | | we had broken laptops in the past that were not detected as such because their DMI chassis-type was either undefined/out-of-spec, or set to 'other' or 'unknown'. this patch tries to mitigate this problem as follows: - if the DMI chassis-type clearly identifies the system as laptop/notebook/mobile platform then nothing changes: the user gets the laptop warning without a hint to the force switch. - if the DMI chassis-type is not specific enough, we warn the user similarly, but tell them the switch. to reduce the number of false positives i have added a few new chassis types that we have encountered in the last months to the list. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1390 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Change "class" parameter name to "devclass" to avoid C++ issues.uwe2011-07-131-2/+2
| | | | | | | | | | | | | | In C++ "class" is a reserved keyword, and as we'll want to use libflashrom from C++ code at some point, let's make sure it doesn't cause issues. Other places in the code already used "devclass" anyway, so it also increases consistency and readability a bit. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1371 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Use shutdown callback mechanism to shutdown programmersdhendrix2011-06-141-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch attempts to resolve some programmer shutdown ordering issues by having the programmer init functions register shutdown callbacks explicitly wherever it makes most sense. Before, assumptions were made that could lead to the internal programmer's state changing before the external programmer could be shut down properly. Now, each programmer cleans up after itself and (hopefully) performs each operation in the correct order. As a side-effect, this patch gives us a better usage model for reverse operations such as rpci_* and rmmio_*. In the long-run, this should make reversing the initialization process easier to understand, less tedious, and less error-prone. In short, this patch does the following: - Registers a shutdown callback during initialization for each programmer. - Kills the .shutdown function pointer from programmer_entry struct. Also, make most shutdown functions static. - Adds a few minor clean-ups and corrections (e.g. missing physunmap() calls). TODO: Remove forward declaration of serprog_shutdown() (added to simplify diff) Signed-off-by: David Hendricks <dhendrix@google.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1338 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* kill central list of SPI programmersmkarcher2011-05-111-0/+5
| | | | | | | | | | | | | | | | | | Remove the array spi_programmer, replace it by dynamic registration instead. Also initially start with no busses supported, and switch to the default non-SPI only for the internal programmer. Also this patch changes the initialization for the buses_supported variable from "everything-except-SPI" to "nothing". All programmers have to set the bus type on their own, and this enables register_spi_programmer to just add the SPI both for on-board SPI interfaces (where the internal programmer already detected the other bus types), as well as for external programmers (where we have the default "none"). Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1299 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Revamp board-specific quirk handling, allow for laptop supporthailfinger2011-05-051-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | Handle board-specific quirks in three phases: 1. Before Super I/O probing (e.g. blacklisting of some Super I/O probes, or unhiding the Super I/O) 2. Before the laptop enforcement decision (e.g. whitelisting a laptop for flashing) 3. After chipset enabling (all current board enables) Implementation note: All entries in board_pciid_enables get an additional phase parameter. Alternative variants (3 tables instead of 1) also have their downsides, and I chose table bloat over table multiplication). With this patch, it should be possible to whitelist supported laptops with a matching entry (phase P2) in board_pciid_enables which points to a function setting laptop_ok=1. (In case DMI is broken, matching might be a little bit more difficult, but it is still doable.) Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1294 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for more than one Super I/O or EC per machine.hailfinger2011-04-271-3/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | flashrom currently only supports exactly one Super I/O or Embedded Controller, and this means quite a few notebooks and a small subset of desktop/server boards cannot be handled reliably and easily. Allow detection and initialization of up to 3 Super I/O and/or EC chips. WARNING! If a Super I/O or EC responds on multiple ports (0x2e and 0x4e), the code will do the wrong thing (namely, initialize the hardware twice). I have no idea if we should handle such situations, and whether we should ignore the second chip with identical ID or not. Initializing the hardware twice for the IT87* family is _not_ a problem, but I don't know how well IT85* can handle it (and whether IT85* would listen at more than one port anyway). Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Thanks to Thomas Schneider for testing on a board with ITE IT87* SPI. Test report (success) is here: http://paste.flashrom.org/view.php?id=379 Thanks to David Hendricks for testing on a Google Cr-48 laptop with ITE IT85* EC SPI. Test report (success) is here: http://www.flashrom.org/pipermail/flashrom/2011-April/006275.html Acked-by: David Hendricks <dhendrix@google.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1289 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Remove duplicate includes from the code.stepan2010-10-061-2/+0
| | | | | | | | | Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1196 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Support for Loongson-2F (MIPS) flashing.hailfinger2010-09-291-1/+1
| | | | | | | | Signed-off-by: Vladimir 'phcoder' Serbinenko <phcoder@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1183 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* The variable 'ret' is unused when compiling on BigEndian architecture.uwe2010-09-201-0/+2
| | | | | | | | | | | | | | | | | This produces an "unused variable" message, which might be treated as error if -Werror was passed to compiler. With this patch I was able to compile flashrom cleanly on ppc and ppc64: http://koji.fedoraproject.org/koji/taskinfo?taskID=2472482 http://koji.fedoraproject.org/koji/taskinfo?taskID=2472484 Signed-off-by: Peter Lemenkov <lemenkov@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1180 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Split off programmer.h from flash.h.hailfinger2010-07-271-0/+1
| | | | | | | | | | | | | | | | | | | | | | Programmer specific functions are of absolutely no interest to any file except those dealing with programmer specific actions (special SPI commands and the generic core). The new header structure is as follows (and yes, improvements are possible): flashchips.h flash chip IDs chipdrivers.h chip-specific read/write/... functions flash.h common header for all stuff that doesn't fit elsewhere hwaccess.h hardware access functions programmer.h programmer specific functions coreboot_tables.h header from coreboot, internal programmer only spi.h SPI command definitions Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1112 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Autodetect the ITE IT8705 Super I/O and enable flash writes if ithailfinger2010-07-101-2/+4
| | | | | | | | | | | | | | | | | | performs LPC->Parallel translation. Remove board enables which triggered the IT8705 write enable manually. Change the IT87 SPI special case to cover IT87 LPC->SPI and LPC->Parallel translation. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested on Syntax SV266A. Acked-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested on Shuttle AK38N, all operations work fine. Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1073 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Make programmer_param static by converting all users tohailfinger2010-07-081-3/+3
| | | | | | | | | | | | extract_programmer_param. Programmer parameters can no longer be separated with a colon, they have to be separated with a comma. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1072 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Various places in the flashrom source feature custom parameterhailfinger2010-07-061-6/+15
| | | | | | | | | | | | | | | | | | | | extraction from programmer_param. This led to wildly differing syntax for programmer parameters, and it also voids pretty much every assumption you could make about programmer_param. The latter is a problem for libflashrom. Use extract_param everywhere, clean up related code and make it more foolproof. Add two instances of exit(1) where we have no option to return an error. Remove six instances of exit(1) where returning an error was possible. WARNING: This changes programmer parameter syntax for a few programmers! Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1070 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Kill unneeded #include wherever possible.hailfinger2010-06-211-3/+0
| | | | | | | | | | | Tested on Linux, FreeBSD, NetBSD, OpenBSD, DOS. Thanks to Jonathan A. Kollasch and Idwer Vollering for testing. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Idwer Vollering <vidwer+lists.flashrom@gmail.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1057 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* The internal programmer needs correct information about flash_base andhailfinger2010-06-041-2/+34
| | | | | | | | | | | | | | chip window top/bottom alignment on non-x86 before it can be used. Abort any internal programmer action for now until the code is fixed. Add the concept of a processor enable for systems where flashing is impacted by processor settings or processor model. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1031 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* So far, we have up to 4 different names for the same thing (ignoringhailfinger2010-05-311-1/+1
| | | | | | | | | | | | | | | | | | | | | | capitalization): CONFIG_FT2232SPI (makefile config option) FT2232_SPI_SUPPORT (#define) ft2232spi (programmer name) ft2232_spi.c (programmer file) Use CONFIG_* with underscores for makefile config options and #defines and kill the useless _SUPPORT idiom. Use lowercase names with underscores for programmer names and programmer files. With this, you can run "grep -i ft2232_spi" and find everything related to the ft2232_spi driver. Same applies to all other programmers. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1023 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Handle the following architectures in generic flashrom code:hailfinger2010-05-261-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - x86/x86_64 (little endian) - PowerPC (big endian) - MIPS (big+little endian) No changes to programmer specific code. This means any drivers with MMIO access will _not_ suddenly start working on big endian systems, but with this patch everything is in place to fix them. Compilation should work on all architectures listed above for all drivers except nic3com and nicrealtek which require PCI Port IO which is x86-only for now. To compile without nic3com and nicrealtek, run make distclean make CONFIG_NIC3COM=no CONFIG_NICREALTEK=no Thanks to Misha Manulis for testing early versions of this patch on PowerPC (big endian) with the satasii programmer. Thanks to Segher Boessenkool for design review and for helping out with compiler tricks and pointing out that we need eieio on PowerPC. Thanks to Vladimir Serbinenko for compile testing on MIPS (little endian) and PowerPC (big endian) and for runtime testing on MIPS (little endian). Thanks to David Daney for compile testing on MIPS (big endian). Thanks to Uwe Hermann for compile and runtime testing on x86_64. DO NOT RUN FLASHROM ON NON-X86 AFTER APPLYING THIS PATCH! This patch only provides the infrastructure, but does not convert any drivers, so flashrom will compile, but it won't do the right thing on non-x86 platforms. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Misha Manulis <misha@manulis.com> Acked-by: Vladimir 'phcoder/φ-coder' Serbinenko <phcoder@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Segher Boessenkool <segher@kernel.crashing.org> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1013 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* --force may have been a good idea back when only developers were usinghailfinger2010-04-281-29/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | flashrom, but over the last few months we've seen too many people who incorrectly believed that --force would solve anything. One of the problems is that --force had multiple meanings: - Force chip read by faking probe success. - Force chip access even if the chip is bigger than max decode size for the flash bus. - Force erase even if erase is known bad. - Force write even if write is known bad. - Force writing even if cbtable tells us that this is the wrong image for this board. This patch cleans up --force usage: - Remove any suggestions to use --force for probe/read from flashrom output. - Don't talk about "success" or "Found chip" if the chip is forced. - Add a new internal programmer parameter boardmismatch=force. This overrides any mismatch detection from cbtable/image comparisons. - Add a new internal programmer parameter laptop=force_I_want_a_brick. - Adjust the documentation for --force. - Clean up the man page a bit whereever it talks about --force or laptops. Additional changes in this patch: - Add warnings about laptops to the documentation. - Abort if a laptop is detected. Can be overridden with the programmer parameter mentioned above. - Add "Portable" to the list of DMI strings indicating laptops. - Check if a chip specified with -c is known to flashrom. - Programmer parameter reliability and consistency fixes. - More paranoid self-checks. - Improve documentation. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@996 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Autodetect ITE IT87* LPC->SPI translation on all boards without the needhailfinger2010-03-251-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | for a board enable. Move boards which had an IT87* SPI board enable from the board enable list to the OK list. Mark the Gigabyte GA-MA78GPM-DS2H as OK. Change the it87spi forced port parameter to it87spiport=... Fix incorrect indentation in the man page. Tested by Ward Vandewege on both variants of the Gigabyte GA-M57SLI-S4 http://www.flashrom.org/pipermail/flashrom/2010-March/002712.html Tested by 李彥學 (Ian-Xue Li) on the Gigabyte GA-MA78GPM-DS2H http://www.flashrom.org/pipermail/flashrom/2010-March/002723.html Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@983 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Various coding style and cosmetic changes (trivial).uwe2010-03-131-5/+6
| | | | | | | | | | | | | | | - Fix coding-style, whitespace, and indentation in a few places. - Consistently use the same spelling ("Super I/O") everywhere. - Make some flashrom stdout output look a bit nicer. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@933 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Implement tested/untested status for board enablesmkarcher2010-02-281-0/+20
| | | | | | | | | | | | | | | The message printing code greatly exceed the 80 character limit. I can reformat it on request to obey the limit. Intended behaviour: on untested boards an explanation of that status is printed and the board enable code is not run, unless the option "boardenable=force" has been passed to the internal programmer. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Sean Nelson <audiohacked@gmail.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@919 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Warn if running on laptopsmkarcher2010-02-261-0/+12
| | | | | | | Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@916 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Linking in support for the internal programmer doesn't make sense if youhailfinger2010-02-121-56/+0
| | | | | | | | | | | | | | | only need hardware (ioport, memory) access. Split internal.c into internal.c and hwaccess.c. Note: This patch was created by "svn cp internal.c hwaccess.c" and then removing stuff from both files. That's why you can't apply the patch as-is before running the svn cp. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Sean Nelson <audiohacked@gmail.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@898 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Matching board via DMImkarcher2010-01-201-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a board is not uniquely identifiable by PCI device/subsystem IDs, a string can be specified to be looked for (case-sensitive, substring or anchored) for now in one of the following DMI items in addition to matching the PCI IDs: - System Manufacturer - System Product Name - System Version - Baseboard Manufacturer - Baseboard Product Name - Baseboard Version Strings are anchored re-like (^ at the beginning, $ at the end), but there are no plans to support full regular expressions and matched to any of the mentioned fields. The match is only made if DMI info is available and the string matches. If no DMI info is available and the PCI IDs match, a warning is printed as the board can not be autodetected. It's still open to discussion whether we add an DMI override switch to specify a string that will definitely match, and whether this switch is only used if no DMI is available or whether it overrides or augments DMI data. DMI data is currently read using dmidecode. This tool is available for all major platforms except MacOS X. I heard that there also is a MacOS X version of dmidecode, but didn't investigate that. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Luc Verhaegen <libv@skynet.be> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@874 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Some programmers (most notably FT2232SPI) use fallback_* and noop_*, buthailfinger2010-01-061-77/+0
| | | | | | | | | | | | | those functions lived inside internal.c and were unavailable if no PCI-based programmers were compiled in. Move those functions to the new file programmer.c. Thanks to Patrick Georgi for finding this. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@829 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* internal.c was always compiled in because it hosted the functionhailfinger2009-12-241-12/+0
| | | | | | | | | | | | | internal_delay(). Move that function to udelay.c and compile internal.c only if really needed. physmap.c is only needed if the programmer is internal or a PCI card. Make its compilation conditional. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Idwer Vollering <vidwer@gmail.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@822 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* SuperI/O detection now happens unconditionally and before the chipsethailfinger2009-12-221-0/+14
| | | | | | | | | | | | | | | | | | | | enable. We could run it after chipset enable, but it definitely has to happen before board enable because the board enable usually accesses the SuperI/O. With this patch, it is possible to add a struct superio to the board enable table for more accurate matching in case subsystem IDs are ambiguous. This patch focuses on the generic infrastructure aspect and on support for IT8712F/IT8716F. Thanks go to Adrian Glaubitz and Ward Vandewege for testing. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Luc Verhaegen <libv@skynet.be> Acked-by: Adrian Glaubitz <glaubitz@physik.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@813 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Internal (onboard) programming was the only feature which could not behailfinger2009-12-131-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | disabled. Make various pieces of code conditional on support for internal programming. Code shared between PCI device programmers and onboard programming is now conditional as well. It is now possible to build only with dummy support: make CONFIG_INTERNAL=no CONFIG_NIC3COM=no CONFIG_SATASII=no CONFIG_DRKAISER=no CONFIG_SERPROG=no CONFIG_FT2232SPI=no This allows building for a specific use case only, and it also facilitates porting to a new architecture because it is possible to focus on highlevel code only. Note: Either internal or dummy programmer needs to be compiled in due to the current behaviour of always picking a default programmer if -p is not specified. Picking an arbitrary external programmer as default wouldn't make sense. Build and runtime tested in all 1024 possible build combinations. The only failures are by design as mentioned above. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Sean Nelson <audiohacked@gmail.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@797 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for every single SiS chipset out there.hailfinger2009-11-151-0/+20
| | | | | | | | | | | | | | | | | | | | | | The two existing SiS chipset enables (compared to the 28 in this patch) were refactored, and one of them was fixed. A function to match PCI vendor/class combinations was added to generic code. Tested on the "Elitegroup K7S5A". Results are somewhat unexpected (some PCI settings seem to be inaccessible, but it still works). This is not based on any docs, but rather on detailed analysis of existing opensource code for some of the chipsets. Thanks to for Adrian Glaubitz testing. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Adrian Glaubitz <glaubitz@physik.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@759 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Allow to exclude each of the external programmer drivers from beinghailfinger2009-09-161-5/+12
| | | | | | | | | | | | | | | | | | compiled in. Example make commandline if you want only internal programmers: make CONFIG_FT2232SPI=no CONFIG_SERPROG=no CONFIG_NIC3COM=no CONFIG_SATASII=no CONFIG_DRKAISER=no CONFIG_DUMMY=no Of course, all of the CONFIG_* symbols can be mixed and matched as needed. CONFIG_FT2232SPI is special because even if it is enabled, make will check if the headers are available and skip it otherwise. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@724 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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