670 files changed, 131856 insertions, 0 deletions

diff --git a/FreeRTOS-Plus/Test/CBMC/.gitignore b/FreeRTOS-Plus/Test/CBMC/.gitignore
new file mode 100644
index 000000000..225be8104
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/.gitignore
@@ -0,0 +1,5 @@
+cbmc.txt
+property.xml
+coverage.xml
+*.goto
+**/html/*
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/CBMC/README.md b/FreeRTOS-Plus/Test/CBMC/README.md
new file mode 100644
index 000000000..09d5e1481
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/README.md
@@ -0,0 +1,133 @@
+CBMC Proof Infrastructure
+=========================
+
+This directory contains automated proofs of the memory safety of various parts
+of the FreeRTOS codebase. A continuous integration system validates every
+pull request posted to the repository against these proofs, and developers can
+also run the proofs on their local machines.
+
+The proofs are checked using the
+[C Bounded Model Checker](http://www.cprover.org/cbmc/), an open-source static
+analysis tool
+([GitHub repository](https://github.com/diffblue/cbmc)). This README describes
+how to run the proofs on your local clone of a:FR.
+
+
+Bulding and running proofs
+--------------------------
+
+For historical reasons, some of the proofs are built and run using CMake
+and CTest. Others use a custom python-based build system. New proofs
+should use CMake. This README describes how to build and run both kinds
+of proof.
+
+
+CMake-based build
+-----------------
+
+Follow the CBMC installation instructions below.
+
+Suppose that the freertos source tree is located at
+`~/src/freertos` and you wish to build the proofs into
+`~/build/freertos`. The following three commands build and run
+the proofs:
+
+```sh
+cmake -S~/src/freertos -B~/build/freertos -DCOMPILER=cbmc
+-DBOARD=windows -DVENDOR=pc
+cmake --build ~/build/freertos --target all-proofs
+cd ~/build/freertos && ctest -L cbmc
+```
+
+Alternatively, this single command does the same thing, assuming you
+have the Ninja build tool installed:
+
+```sh
+ctest --build-and-test                \
+    ~/src/freertos             \
+    ~/build/freertos           \
+    --build-target cbmc               \
+    --build-generator Ninja           \
+    --build-options                   \
+      -DCOMPILER=cbmc                 \
+      -DBOARD=windows                 \
+      -DVENDOR=pc                     \
+    --test-command ctest -j4 -L cbmc --output-on-failure
+```
+
+
+
+Python-based build
+------------------
+
+### Prerequisites
+
+You will need Python 3. On Windows, you will need Visual Studio 2015 or later
+(in particular, you will need the Developer Command Prompt and NMake). On macOS
+and Linux, you will need Make.
+
+
+### Installing CBMC
+
+- Clone the [CBMC repository](https://github.com/diffblue/cbmc).
+
+- The canonical compilation and installation instructions are in the
+  [COMPILING.md](https://github.com/diffblue/cbmc/blob/develop/COMPILING.md)
+  file in the CBMC repository; we reproduce the most important steps for
+  Windows users here, but refer to that document if in doubt.
+  - Download and install CMake from the [CMake website](https://cmake.org/download).
+  - Download and install the "git for Windows" package, which also
+    provides the `patch` command, from [here](https://git-scm.com/download/win).
+  - Download the flex and bison for Windows package from
+    [this sourceforge site](https://sourceforge.net/projects/winflexbison).
+    "Install" it by dropping the contents of the entire unzipped
+    package into the top-level CBMC source directory.
+  - Change into the top-level CBMC source directory and run
+    ```
+    cmake -H. -Bbuild -DCMAKE_BUILD_TYPE=Release -DWITH_JBMC=OFF
+    cmake --build build
+    ```
+
+- Ensure that you can run the programs `cbmc`, `goto-cc` (or `goto-cl`
+  on Windows), and `goto-instrument` from the command line. If you build
+  CBMC with CMake, the programs will have been installed under the
+  `build/bin/Debug` directory under the top-level `cbmc` directory; you
+  should add that directory to your `$PATH`. If you built CBMC using
+  Make, then those programs will have been installed in the `src/cbmc`,
+  `src/goto-cc`, and `src/goto-instrument` directories respectively.
+
+
+### Setting up the proofs
+
+Change into the `proofs` directory. On Windows, run
+```
+python prepare.py
+```
+On macOS or Linux, run
+```
+./prepare.py
+```
+If you are on a Windows machine but want to generate Linux Makefiles (or vice
+versa), you can pass the `--system linux` or `--system windows` options to those
+programs.
+
+
+### Running the proofs
+
+Each of the leaf directories under `proofs` is a proof of the memory
+safety of a single entry point in FreeRTOS. The scripts that you ran in the
+previous step will have left a Makefile in each of those directories. To
+run a proof, change into the directory for that proof and run `nmake` on
+Windows or `make` on Linux or macOS. The proofs may take some time to
+run; they eventually write their output to `cbmc.txt`, which should have
+the text `VERIFICATION SUCCESSFUL` at the end.
+
+
+### Proof directory structure
+
+This directory contains the following subdirectories:
+
+- `proofs` contains the proofs run against each pull request
+- `patches` contains a set of patches that get applied to the codebase prior to
+  running the proofs
+- `include` and `windows` contain header files used by the proofs.
diff --git a/FreeRTOS-Plus/Test/CBMC/cmake/compute-coverage.cmake b/FreeRTOS-Plus/Test/CBMC/cmake/compute-coverage.cmake
new file mode 100644
index 000000000..819fa11bb
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/cmake/compute-coverage.cmake
@@ -0,0 +1,14 @@
+execute_process(
+    COMMAND
+        cbmc --cover location --xml-ui
+        ${cbmc_flags} ${cbmc_verbosity} ${goto_binary}
+    OUTPUT_FILE ${out_file}
+    ERROR_FILE ${out_file}
+    RESULT_VARIABLE res
+)
+
+if(NOT (${res} EQUAL 0 OR ${res} EQUAL 10))
+    message(FATAL_ERROR
+        "Unexpected CBMC coverage return code '${res}' for proof ${proof_name}. Log written to ${out_file}."
+    )
+endif()
diff --git a/FreeRTOS-Plus/Test/CBMC/cmake/compute-property.cmake b/FreeRTOS-Plus/Test/CBMC/cmake/compute-property.cmake
new file mode 100644
index 000000000..3192aa99a
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/cmake/compute-property.cmake
@@ -0,0 +1,14 @@
+execute_process(
+    COMMAND
+        cbmc --show-properties --unwinding-assertions --xml-ui
+        ${cbmc_flags} ${cbmc_verbosity} ${goto_binary}
+    OUTPUT_FILE ${out_file}
+    ERROR_FILE ${out_file}
+    RESULT_VARIABLE res
+)
+
+if(NOT (${res} EQUAL 0 OR ${res} EQUAL 10))
+    message(FATAL_ERROR
+        "Unexpected CBMC property return code '${res}' for proof ${proof_name}. Log written to ${out_file}."
+    )
+endif()
diff --git a/FreeRTOS-Plus/Test/CBMC/cmake/model-check.cmake b/FreeRTOS-Plus/Test/CBMC/cmake/model-check.cmake
new file mode 100644
index 000000000..8dc37b094
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/cmake/model-check.cmake
@@ -0,0 +1,14 @@
+execute_process(
+    COMMAND
+        cbmc --trace --unwinding-assertions
+        ${cbmc_flags} ${cbmc_verbosity} ${goto_binary}
+    OUTPUT_FILE ${out_file}
+    ERROR_FILE ${out_file}
+    RESULT_VARIABLE res
+)
+
+if(NOT (${res} EQUAL 0 OR ${res} EQUAL 10))
+    message(FATAL_ERROR
+        "Unexpected CBMC return code '${res}' for proof ${proof_name}. Log written to ${out_file}."
+    )
+endif()
diff --git a/FreeRTOS-Plus/Test/CBMC/include/README.md b/FreeRTOS-Plus/Test/CBMC/include/README.md
new file mode 100644
index 000000000..fa317dc04
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/include/README.md
@@ -0,0 +1,2 @@
+This directory contains include files used by the CBMC proofs:
+* cbmc.h defines some macros used in the proof test harnesses
diff --git a/FreeRTOS-Plus/Test/CBMC/include/aws_freertos_ip_verification_access_ip_define.h b/FreeRTOS-Plus/Test/CBMC/include/aws_freertos_ip_verification_access_ip_define.h
new file mode 100644
index 000000000..22434a91c
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/include/aws_freertos_ip_verification_access_ip_define.h
@@ -0,0 +1,3 @@
+eFrameProcessingResult_t publicProcessIPPacket( IPPacket_t * const pxIPPacket, NetworkBufferDescriptor_t * const pxNetworkBuffer ) {
+	prvProcessIPPacket(pxIPPacket, pxNetworkBuffer);
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/include/aws_freertos_tcp_verification_access_tcp_define.h b/FreeRTOS-Plus/Test/CBMC/include/aws_freertos_tcp_verification_access_tcp_define.h
new file mode 100644
index 000000000..01075d2ba
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/include/aws_freertos_tcp_verification_access_tcp_define.h
@@ -0,0 +1,12 @@
+int32_t publicTCPPrepareSend( FreeRTOS_Socket_t *pxSocket, NetworkBufferDescriptor_t **ppxNetworkBuffer, UBaseType_t uxOptionsLength ) {
+	prvTCPPrepareSend( pxSocket, ppxNetworkBuffer, uxOptionsLength );
+}
+
+BaseType_t publicTCPHandleState( FreeRTOS_Socket_t *pxSocket, NetworkBufferDescriptor_t **ppxNetworkBuffer ) {
+	prvTCPHandleState(pxSocket, ppxNetworkBuffer);
+}
+
+void publicTCPReturnPacket( FreeRTOS_Socket_t *pxSocket, NetworkBufferDescriptor_t *pxNetworkBuffer,
+	uint32_t ulLen, BaseType_t xReleaseAfterSend ) {
+	prvTCPReturnPacket(pxSocket, pxNetworkBuffer, ulLen, xReleaseAfterSend );
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/include/cbmc.h b/FreeRTOS-Plus/Test/CBMC/include/cbmc.h
new file mode 100644
index 000000000..c30063bae
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/include/cbmc.h
@@ -0,0 +1,100 @@
+/* Standard includes. */
+#include <stdint.h>
+#include <stdio.h>
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "semphr.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_Sockets.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOS_UDP_IP.h"
+#include "FreeRTOS_DNS.h"
+#include "FreeRTOS_DHCP.h"
+#include "NetworkBufferManagement.h"
+#include "NetworkInterface.h"
+
+/*
+  * CBMC models a pointer as an object id and an offset into that
+  * object.  The top bits of a pointer encode the object id and the
+  * remaining bits encode the offset.  This means there is a bound on
+  * the maximum offset into an object in CBMC, and hence a bound on the
+  * size of objects in CBMC.
+  */
+#define CBMC_BITS               7
+#define CBMC_MAX_OBJECT_SIZE    ( 0xFFFFFFFF >> ( CBMC_BITS + 1 ) )
+
+#define IMPLIES( a, b )    ( !( a ) || ( b ) )
+
+BaseType_t nondet_basetype();
+UBaseType_t nondet_ubasetype();
+TickType_t nondet_ticktype();
+int32_t nondet_int32();
+uint32_t nondet_uint32();
+size_t nondet_sizet();
+
+#define nondet_BaseType()    nondet_basetype()
+
+void * safeMalloc( size_t size );
+
+
+enum CBMC_LOOP_CONDITION
+{
+    CBMC_LOOP_BREAK, CBMC_LOOP_CONTINUE, CBMC_LOOP_RETURN
+};
+
+/* CBMC specification: capture old value for precondition and */
+/* postcondition checking */
+
+#define OLDVAL( var )              _old_ ## var
+#define SAVE_OLDVAL( var, typ )    const typ OLDVAL( var ) = var
+
+/* CBMC specification: capture old value for values passed by */
+/* reference in function abstractions */
+
+#define OBJ( var )                 ( * var )
+#define OLDOBJ( var )              _oldobj_ ## var
+#define SAVE_OLDOBJ( var, typ )    const typ OLDOBJ( var ) = OBJ( var )
+
+/* CBMC debugging: printfs for expressions */
+
+#define __CPROVER_printf( var )          { uint32_t ValueOf_ ## var = ( uint32_t ) var; }
+#define __CPROVER_printf2( str, exp )    { uint32_t ValueOf_ ## str = ( uint32_t ) ( exp ); }
+
+/* CBMC debugging: printfs for pointer expressions */
+
+#define __CPROVER_printf_ptr( var )          { uint8_t * ValueOf_ ## var = ( uint8_t * ) var; }
+#define __CPROVER_printf2_ptr( str, exp )    { uint8_t * ValueOf_ ## str = ( uint8_t * ) ( exp ); }
+
+/*
+  * An assertion that pvPortMalloc returns NULL when asked to allocate 0 bytes.
+  * This assertion is used in some of the TaskPool proofs.
+  */
+#define __CPROVER_assert_zero_allocation()       \
+    __CPROVER_assert( pvPortMalloc( 0 ) == NULL, \
+                      "pvPortMalloc allows zero-allocated memory." )
+
+/*
+  * A stub for pvPortMalloc that nondeterministically chooses to return
+  * either NULL or an allocation of the requested space.  The stub is
+  * guaranteed to return NULL when asked to allocate 0 bytes.
+  * This stub is used in some of the TaskPool proofs.
+  */
+void * pvPortMalloc( size_t xWantedSize )
+{
+    if( xWantedSize == 0 )
+    {
+        return NULL;
+    }
+
+    return nondet_bool() ? malloc( xWantedSize ) : NULL;
+}
+
+void vPortFree( void * pv )
+{
+    ( void ) pv;
+    free( pv );
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/include/queue_init.h b/FreeRTOS-Plus/Test/CBMC/include/queue_init.h
new file mode 100644
index 000000000..f05d18830
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/include/queue_init.h
@@ -0,0 +1,141 @@
+#include "FreeRTOS.h"
+#include "queue.h"
+#include "queue_datastructure.h"
+
+#ifndef CBMC_OBJECT_BITS
+#define CBMC_OBJECT_BITS 7
+#endif
+
+#ifndef CBMC_OBJECT_MAX_SIZE
+#define CBMC_OBJECT_MAX_SIZE (UINT32_MAX>>(CBMC_OBJECT_BITS+1))
+#endif
+
+/* Using prvCopyDataToQueue together with prvNotifyQueueSetContainer
+   leads to a problem space explosion. Therefore, we use this stub
+   and a sepearted proof on prvCopyDataToQueue to deal with it.
+   As prvNotifyQueueSetContainer is disabled if configUSE_QUEUE_SETS != 1,
+   in other cases the original implementation should be used. */
+#if( configUSE_QUEUE_SETS == 1 )
+	BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition )
+	{
+		if(pxQueue->uxItemSize > ( UBaseType_t ) 0)
+		{
+			__CPROVER_assert(__CPROVER_r_ok(pvItemToQueue, ( size_t ) pxQueue->uxItemSize), "pvItemToQueue region must be readable");
+			if(xPosition == queueSEND_TO_BACK){
+				__CPROVER_assert(__CPROVER_w_ok(( void * ) pxQueue->pcWriteTo, ( size_t ) pxQueue->uxItemSize), "pxQueue->pcWriteTo region must be writable");
+			}else{
+				__CPROVER_assert(__CPROVER_w_ok(( void * ) pxQueue->u.xQueue.pcReadFrom, ( size_t ) pxQueue->uxItemSize), "pxQueue->u.xQueue.pcReadFrom region must be writable");
+			}
+			return pdFALSE;
+		}else
+		{
+			return nondet_BaseType_t();
+		}
+	}
+#endif
+
+/* xQueueCreateSet is compiled out if configUSE_QUEUE_SETS != 1.*/
+#if( configUSE_QUEUE_SETS == 1 )
+	QueueSetHandle_t xUnconstrainedQueueSet()
+	{
+		UBaseType_t uxEventQueueLength = 2;
+		QueueSetHandle_t xSet = xQueueCreateSet(uxEventQueueLength);
+		if( xSet )
+		{
+			xSet->cTxLock = nondet_int8_t();
+			xSet->cRxLock = nondet_int8_t();
+			xSet->uxMessagesWaiting = nondet_UBaseType_t();
+			xSet->xTasksWaitingToReceive.uxNumberOfItems = nondet_UBaseType_t();
+			/* This is an invariant checked with a couple of asserts in the code base.
+			   If it is false from the beginning, the CBMC proofs are not able to succeed*/
+			__CPROVER_assume(xSet->uxMessagesWaiting < xSet->uxLength);
+			xSet->xTasksWaitingToSend.uxNumberOfItems = nondet_UBaseType_t();
+		}
+		return xSet;
+	}
+#endif
+
+/* Create a mostly unconstrained Queue but bound the max item size.
+   This is required for performance reasons in CBMC at the moment. */
+QueueHandle_t xUnconstrainedQueueBoundedItemSize( UBaseType_t uxItemSizeBound ) {
+	UBaseType_t uxQueueLength;
+	UBaseType_t uxItemSize;
+	uint8_t ucQueueType;
+	__CPROVER_assume(uxQueueLength > 0);
+	__CPROVER_assume(uxItemSize < uxItemSizeBound);
+
+	// QueueGenericCreate method does not check for multiplication overflow
+	size_t uxQueueStorageSize;
+	__CPROVER_assume(uxQueueStorageSize < CBMC_OBJECT_MAX_SIZE);
+	__CPROVER_assume(uxItemSize < uxQueueStorageSize/uxQueueLength);
+
+	QueueHandle_t xQueue =
+		xQueueGenericCreate(uxQueueLength, uxItemSize, ucQueueType);
+	if(xQueue){
+		xQueue->cTxLock = nondet_int8_t();
+		xQueue->cRxLock = nondet_int8_t();
+		xQueue->uxMessagesWaiting = nondet_UBaseType_t();
+		/* This is an invariant checked with a couple of asserts in the code base.
+		   If it is false from the beginning, the CBMC proofs are not able to succeed*/
+		__CPROVER_assume(xQueue->uxMessagesWaiting < xQueue->uxLength);
+		xQueue->xTasksWaitingToReceive.uxNumberOfItems = nondet_UBaseType_t();
+		xQueue->xTasksWaitingToSend.uxNumberOfItems = nondet_UBaseType_t();
+		#if( configUSE_QUEUE_SETS == 1)
+			xQueueAddToSet(xQueue, xUnconstrainedQueueSet());
+		#endif
+	}
+	return xQueue;
+}
+
+/* Create a mostly unconstrained Queue */
+QueueHandle_t xUnconstrainedQueue( void ) {
+	UBaseType_t uxQueueLength;
+	UBaseType_t uxItemSize;
+	uint8_t ucQueueType;
+
+	__CPROVER_assume(uxQueueLength > 0);
+
+	// QueueGenericCreate method does not check for multiplication overflow
+	size_t uxQueueStorageSize;
+	__CPROVER_assume(uxQueueStorageSize < CBMC_OBJECT_MAX_SIZE);
+	__CPROVER_assume(uxItemSize < uxQueueStorageSize/uxQueueLength);
+
+	QueueHandle_t xQueue =
+		xQueueGenericCreate(uxQueueLength, uxItemSize, ucQueueType);
+
+	if(xQueue){
+		xQueue->cTxLock = nondet_int8_t();
+		xQueue->cRxLock = nondet_int8_t();
+		xQueue->uxMessagesWaiting = nondet_UBaseType_t();
+		/* This is an invariant checked with a couple of asserts in the code base.
+		   If it is false from the beginning, the CBMC proofs are not able to succeed*/
+		__CPROVER_assume(xQueue->uxMessagesWaiting < xQueue->uxLength);
+		xQueue->xTasksWaitingToReceive.uxNumberOfItems = nondet_UBaseType_t();
+		xQueue->xTasksWaitingToSend.uxNumberOfItems = nondet_UBaseType_t();
+		#if( configUSE_QUEUE_SETS == 1)
+			xQueueAddToSet(xQueue, xUnconstrainedQueueSet());
+		#endif
+	}
+	return xQueue;
+}
+
+/* Create a mostly unconstrained Mutex */
+QueueHandle_t xUnconstrainedMutex( void ) {
+	uint8_t ucQueueType;
+	QueueHandle_t xQueue =
+		xQueueCreateMutex(ucQueueType);
+	if(xQueue){
+		xQueue->cTxLock = nondet_int8_t();
+		xQueue->cRxLock = nondet_int8_t();
+		xQueue->uxMessagesWaiting = nondet_UBaseType_t();
+		/* This is an invariant checked with a couple of asserts in the code base.
+		   If it is false from the beginning, the CBMC proofs are not able to succeed*/
+		__CPROVER_assume(xQueue->uxMessagesWaiting < xQueue->uxLength);
+		xQueue->xTasksWaitingToReceive.uxNumberOfItems = nondet_UBaseType_t();
+		xQueue->xTasksWaitingToSend.uxNumberOfItems = nondet_UBaseType_t();
+		#if( configUSE_QUEUE_SETS == 1)
+			xQueueAddToSet(xQueue, xUnconstrainedQueueSet());
+		#endif
+	}
+	return xQueue;
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/include/tasksStubs.h b/FreeRTOS-Plus/Test/CBMC/include/tasksStubs.h
new file mode 100644
index 000000000..a0dd6de4a
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/include/tasksStubs.h
@@ -0,0 +1,10 @@
+#ifndef INC_TASK_STUBS_H
+#define INC_TASK_STUBS_H
+
+#include "FreeRTOS.h"
+#include "task.h"
+
+BaseType_t xState;
+void vInitTaskCheckForTimeOut(BaseType_t maxCounter, BaseType_t maxCounter_limit);
+
+#endif /* INC_TASK_STUBS_H */
diff --git a/FreeRTOS-Plus/Test/CBMC/patches/.gitattributes b/FreeRTOS-Plus/Test/CBMC/patches/.gitattributes
new file mode 100644
index 000000000..a41fc7b45
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/patches/.gitattributes
@@ -0,0 +1,2 @@
+# It seems git apply does not want crlf line endings on Windows
+*.patch eol=lf
diff --git a/FreeRTOS-Plus/Test/CBMC/patches/.gitignore b/FreeRTOS-Plus/Test/CBMC/patches/.gitignore
new file mode 100644
index 000000000..4dec98ff0
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/patches/.gitignore
@@ -0,0 +1,2 @@
+auto_patch*
+patched
diff --git a/FreeRTOS-Plus/Test/CBMC/patches/0005-Remove-volatile-qualifier-from-tasks-variables.patch b/FreeRTOS-Plus/Test/CBMC/patches/0005-Remove-volatile-qualifier-from-tasks-variables.patch
new file mode 100644
index 000000000..29cde0e77
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/patches/0005-Remove-volatile-qualifier-from-tasks-variables.patch
@@ -0,0 +1,79 @@
+This patch removes the volatile qualifier from some global variable
+declarations in the tasks.c file.  For task pool proofs, we are running
+`goto-instrument` with the `--nondet-volatile` flag on, which causes reads from
+volatile variable to be nondeterministic (i.e., any possible value can be
+returned).  This is actually the desired behavior for volatile variables
+regarding verification purposes. However, this causes a lot of trouble when
+such variables are pointers, since one of the possible values we can get when
+dereferencing a volatile pointer is `NULL`.
+
+In the case of `uxPendedTicks`, a non-volatile copy of the variable is done
+before the following loop in tasks.c (lines 2231-2255):
+
+{
+	UBaseType_t uxPendedCounts = uxPendedTicks; /* Non-volatile copy. */
+
+	if( uxPendedCounts > ( UBaseType_t ) 0U )
+	{
+		do
+		{
+			if( xTaskIncrementTick() != pdFALSE )
+			{
+				xYieldPending = pdTRUE;
+			}
+			else
+			{
+				mtCOVERAGE_TEST_MARKER();
+			}
+			--uxPendedCounts;
+		} while( uxPendedCounts > ( UBaseType_t ) 0U );
+
+		uxPendedTicks = 0;
+	}
+	else
+	{
+		mtCOVERAGE_TEST_MARKER();
+	}
+}
+
+Here, `uxPendedTicks` could return any value, making it impossible to unwind
+(or unroll) this loop in CBMC.  Therefore, we require `uxPendedTicks` to behave
+as a regular variable so that the loop can be unwound.
+
+---
+diff --git a/FreeRTOS/Source/tasks.c b/FreeRTOS/Source/tasks.c
+index ff657733..8b57d198 100644
+--- a/FreeRTOS/Source/tasks.c
++++ b/FreeRTOS/Source/tasks.c
+@@ -331,7 +331,7 @@ typedef tskTCB TCB_t;
+ 
+ /*lint -save -e956 A manual analysis and inspection has been used to determine
+ which static variables must be declared volatile. */
+-PRIVILEGED_DATA TCB_t * volatile pxCurrentTCB = NULL;
++PRIVILEGED_DATA TCB_t * pxCurrentTCB = NULL;
+ 
+ /* Lists for ready and blocked tasks. --------------------
+ xDelayedTaskList1 and xDelayedTaskList2 could be move to function scople but
+@@ -340,8 +340,8 @@ the static qualifier. */
+ PRIVILEGED_DATA static List_t pxReadyTasksLists[ configMAX_PRIORITIES ];/*< Prioritised ready tasks. */
+ PRIVILEGED_DATA static List_t xDelayedTaskList1;						/*< Delayed tasks. */
+ PRIVILEGED_DATA static List_t xDelayedTaskList2;						/*< Delayed tasks (two lists are used - one for delays that have overflowed the current tick count. */
+-PRIVILEGED_DATA static List_t * volatile pxDelayedTaskList;				/*< Points to the delayed task list currently being used. */
+-PRIVILEGED_DATA static List_t * volatile pxOverflowDelayedTaskList;		/*< Points to the delayed task list currently being used to hold tasks that have overflowed the current tick count. */
++PRIVILEGED_DATA static List_t * pxDelayedTaskList;				/*< Points to the delayed task list currently being used. */
++PRIVILEGED_DATA static List_t * pxOverflowDelayedTaskList;		/*< Points to the delayed task list currently being used to hold tasks that have overflowed the current tick count. */
+ PRIVILEGED_DATA static List_t xPendingReadyList;						/*< Tasks that have been readied while the scheduler was suspended.  They will be moved to the ready list when the scheduler is resumed. */
+ 
+ #if( INCLUDE_vTaskDelete == 1 )
+@@ -368,10 +368,10 @@ PRIVILEGED_DATA static volatile UBaseType_t uxCurrentNumberOfTasks 	= ( UBaseTyp
+ 
+ /* Other file private variables. --------------------------------*/
+ PRIVILEGED_DATA static volatile UBaseType_t uxCurrentNumberOfTasks 	= ( UBaseType_t ) 0U;
+ PRIVILEGED_DATA static volatile TickType_t xTickCount 				= ( TickType_t ) configINITIAL_TICK_COUNT;
+ PRIVILEGED_DATA static volatile UBaseType_t uxTopReadyPriority 		= tskIDLE_PRIORITY;
+ PRIVILEGED_DATA static volatile BaseType_t xSchedulerRunning 		= pdFALSE;
+-PRIVILEGED_DATA static volatile TickType_t xPendedTicks 			= ( TickType_t ) 0U;
++PRIVILEGED_DATA static TickType_t xPendedTicks 			= ( TickType_t ) 0U;
+ PRIVILEGED_DATA static volatile BaseType_t xYieldPending 			= pdFALSE;
+ PRIVILEGED_DATA static volatile BaseType_t xNumOfOverflows 			= ( BaseType_t ) 0;
+ PRIVILEGED_DATA static UBaseType_t uxTaskNumber 					= ( UBaseType_t ) 0U;
diff --git a/FreeRTOS-Plus/Test/CBMC/patches/0005-remove-static-from-prvCopyDataToQueue.patch b/FreeRTOS-Plus/Test/CBMC/patches/0005-remove-static-from-prvCopyDataToQueue.patch
new file mode 100644
index 000000000..5a79ae8cd
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/patches/0005-remove-static-from-prvCopyDataToQueue.patch
@@ -0,0 +1,22 @@
+diff --git a/FreeRTOS/Source/queue.c b/FreeRTOS/Source/queue.c
+index df2b9c8c..c2265c26 100644
+--- a/FreeRTOS/Source/queue.c
++++ b/FreeRTOS/Source/queue.c
+@@ -105,7 +105,7 @@ static BaseType_t prvIsQueueFull( const Queue_t *pxQueue ) PRIVILEGED_FUNCTION;
+  * Copies an item into the queue, either at the front of the queue or the
+  * back of the queue.
+  */
+-static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition ) PRIVILEGED_FUNCTION;
++BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition ) PRIVILEGED_FUNCTION;
+
+ /*
+  * Copies an item out of a queue.
+@@ -1985,7 +1985,7 @@ Queue_t * const pxQueue = xQueue;
+ #endif /* configUSE_MUTEXES */
+ /*-----------------------------------------------------------*/
+
+-static BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition )
++BaseType_t prvCopyDataToQueue( Queue_t * const pxQueue, const void *pvItemToQueue, const BaseType_t xPosition )
+ {
+ BaseType_t xReturn = pdFALSE;
+ UBaseType_t uxMessagesWaiting;
diff --git a/FreeRTOS-Plus/Test/CBMC/patches/0006-Remove-static-from-prvNotifyQueueSetContainer.patch b/FreeRTOS-Plus/Test/CBMC/patches/0006-Remove-static-from-prvNotifyQueueSetContainer.patch
new file mode 100644
index 000000000..9cbe7cf5f
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/patches/0006-Remove-static-from-prvNotifyQueueSetContainer.patch
@@ -0,0 +1,22 @@
+diff --git a/FreeRTOS/Source/queue.c b/FreeRTOS/Source/queue.c
+index 17a6964e..24a40c29 100644
+--- a/FreeRTOS/Source/queue.c
++++ b/FreeRTOS/Source/queue.c
+@@ -207,7 +207,7 @@ static void prvCopyDataFromQueue( Queue_t * const pxQueue, void * const pvBuffer
+ 	 * Checks to see if a queue is a member of a queue set, and if so, notifies
+ 	 * the queue set that the queue contains data.
+ 	 */
+-	static BaseType_t prvNotifyQueueSetContainer( const Queue_t * const pxQueue ) PRIVILEGED_FUNCTION;
++	BaseType_t prvNotifyQueueSetContainer( const Queue_t * const pxQueue ) PRIVILEGED_FUNCTION;
+ #endif
+
+ /*
+@@ -2887,7 +2887,7 @@ Queue_t * const pxQueue = xQueue;
+
+ #if ( configUSE_QUEUE_SETS == 1 )
+
+-	static BaseType_t prvNotifyQueueSetContainer( const Queue_t * const pxQueue )
++	BaseType_t prvNotifyQueueSetContainer( const Queue_t * const pxQueue )
+ 	{
+ 	Queue_t *pxQueueSetContainer = pxQueue->pxQueueSetContainer;
+ 	BaseType_t xReturn = pdFALSE;
diff --git a/FreeRTOS-Plus/Test/CBMC/patches/0007-Remove-static-from-prvUnlockQueue.patch b/FreeRTOS-Plus/Test/CBMC/patches/0007-Remove-static-from-prvUnlockQueue.patch
new file mode 100644
index 000000000..eaae401c6
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/patches/0007-Remove-static-from-prvUnlockQueue.patch
@@ -0,0 +1,22 @@
+diff --git a/FreeRTOS/Source/queue.c b/FreeRTOS/Source/queue.c
+index 17a6964e..60ea3e69 100644
+--- a/FreeRTOS/Source/queue.c
++++ b/FreeRTOS/Source/queue.c
+@@ -175,7 +175,7 @@ typedef xQUEUE Queue_t;
+  * to indicate that a task may require unblocking.  When the queue in unlocked
+  * these lock counts are inspected, and the appropriate action taken.
+  */
+-static void prvUnlockQueue( Queue_t * const pxQueue ) PRIVILEGED_FUNCTION;
++void prvUnlockQueue( Queue_t * const pxQueue ) PRIVILEGED_FUNCTION;
+
+ /*
+  * Uses a critical section to determine if there is any data in a queue.
+@@ -2175,7 +2175,7 @@ static void prvCopyDataFromQueue( Queue_t * const pxQueue, void * const pvBuffer
+ }
+ /*-----------------------------------------------------------*/
+
+-static void prvUnlockQueue( Queue_t * const pxQueue )
++void prvUnlockQueue( Queue_t * const pxQueue )
+ {
+ 	/* THIS FUNCTION MUST BE CALLED WITH THE SCHEDULER SUSPENDED. */
+
diff --git a/FreeRTOS-Plus/Test/CBMC/patches/FreeRTOSConfig.h b/FreeRTOS-Plus/Test/CBMC/patches/FreeRTOSConfig.h
new file mode 100644
index 000000000..28de2bd15
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/patches/FreeRTOSConfig.h
@@ -0,0 +1,237 @@
+/*
+ * FreeRTOS Kernel V10.0.1
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+* Application specific definitions.
+*
+* These definitions should be adjusted for your particular hardware and
+* application requirements.
+*
+* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+* http://www.freertos.org/a00110.html
+*
+* The bottom of this file contains some constants specific to running the UDP
+* stack in this demo.  Constants specific to FreeRTOS+TCP itself (rather than
+* the demo) are contained in FreeRTOSIPConfig.h.
+*----------------------------------------------------------*/
+#define configENABLE_BACKWARD_COMPATIBILITY        1
+#define configUSE_PREEMPTION                       1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION    1
+#define configMAX_PRIORITIES                       ( 7 )
+#define configTICK_RATE_HZ                         ( 1000 )                  /* In this non-real time simulated environment the tick frequency has to be at least a multiple of the Win32 tick frequency, and therefore very slow. */
+#define configMINIMAL_STACK_SIZE                   ( ( unsigned short ) 60 ) /* In this simulated case, the stack only has to hold one small structure as the real stack is part of the Win32 thread. */
+#define configTOTAL_HEAP_SIZE                      ( ( size_t ) ( 2048U * 1024U ) )
+#define configMAX_TASK_NAME_LEN                    ( 15 )
+#define configUSE_16_BIT_TICKS                     0
+#define configIDLE_SHOULD_YIELD                    1
+#define configUSE_CO_ROUTINES                      0
+#ifndef configUSE_MUTEXES
+    #define configUSE_MUTEXES                          1
+#endif
+#ifndef configUSE_RECURSIVE_MUTEXES
+    #define configUSE_RECURSIVE_MUTEXES                1
+#endif
+#define configQUEUE_REGISTRY_SIZE                  0
+#define configUSE_APPLICATION_TASK_TAG             1
+#define configUSE_COUNTING_SEMAPHORES              1
+#define configUSE_ALTERNATIVE_API                  0
+#define configNUM_THREAD_LOCAL_STORAGE_POINTERS    3      /* FreeRTOS+FAT requires 2 pointers if a CWD is supported. */
+#define configRECORD_STACK_HIGH_ADDRESS            1
+
+/* Hook function related definitions. */
+#ifndef configUSE_TICK_HOOK
+    #define configUSE_TICK_HOOK                        0
+#endif
+#define configUSE_IDLE_HOOK                        1
+#define configUSE_MALLOC_FAILED_HOOK               1
+#define configCHECK_FOR_STACK_OVERFLOW             0      /* Not applicable to the Win32 port. */
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                           1
+#define configTIMER_TASK_PRIORITY                  ( configMAX_PRIORITIES - 1 )
+#define configTIMER_QUEUE_LENGTH                   5
+#define configTIMER_TASK_STACK_DEPTH               ( configMINIMAL_STACK_SIZE * 2 )
+
+/* Event group related definitions. */
+#define configUSE_EVENT_GROUPS                     1
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                   0
+#define configMAX_CO_ROUTINE_PRIORITIES         ( 2 )
+
+/* Memory allocation strategy. */
+#ifndef configSUPPORT_DYNAMIC_ALLOCATION
+    #define configSUPPORT_DYNAMIC_ALLOCATION        1
+#endif
+#ifndef configSUPPORT_STATIC_ALLOCATION
+    #define configSUPPORT_STATIC_ALLOCATION         1
+#endif
+
+
+/* Set the following definitions to 1 to include the API function, or zero
+ * to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet                1
+#define INCLUDE_uxTaskPriorityGet               1
+#define INCLUDE_vTaskDelete                     1
+#define INCLUDE_vTaskCleanUpResources           0
+#ifndef INCLUDE_vTaskSuspend
+    #define INCLUDE_vTaskSuspend                    1
+#endif
+#define INCLUDE_vTaskDelayUntil                 1
+#define INCLUDE_vTaskDelay                      1
+#define INCLUDE_uxTaskGetStackHighWaterMark     1
+#ifndef INCLUDE_xTaskGetSchedulerState
+    #define INCLUDE_xTaskGetSchedulerState          1
+#endif
+#define INCLUDE_xTimerGetTimerTaskHandle        0
+#define INCLUDE_xTaskGetIdleTaskHandle          0
+#define INCLUDE_xQueueGetMutexHolder            1
+#define INCLUDE_eTaskGetState                   1
+#define INCLUDE_xEventGroupSetBitsFromISR       1
+#define INCLUDE_xTimerPendFunctionCall          1
+#define INCLUDE_xTaskGetCurrentTaskHandle       1
+#define INCLUDE_xTaskAbortDelay                 1
+
+/* This demo makes use of one or more example stats formatting functions.  These
+ * format the raw data provided by the uxTaskGetSystemState() function in to human
+ * readable ASCII form.  See the notes in the implementation of vTaskList() within
+ * FreeRTOS/Source/tasks.c for limitations.  configUSE_STATS_FORMATTING_FUNCTIONS
+ * is set to 2 so the formatting functions are included without the stdio.h being
+ * included in tasks.c.  That is because this project defines its own sprintf()
+ * functions. */
+#define configUSE_STATS_FORMATTING_FUNCTIONS    1
+
+/* Assert call defined for debug builds. */
+extern void vAssertCalled( const char * pcFile,
+                           uint32_t ulLine );
+#ifndef configASSERT
+#define configASSERT( x )    if( ( x ) == 0 ) vAssertCalled( __FILE__, __LINE__ )
+#endif
+
+/* Remove logging in formal verification */
+#define configPRINTF( X )
+
+/* Non-format version thread-safe print. */
+#define configPRINT_STRING( X )
+
+/* Application specific definitions follow. **********************************/
+
+/* If configINCLUDE_DEMO_DEBUG_STATS is set to one, then a few basic IP trace
+ * macros are defined to gather some UDP stack statistics that can then be viewed
+ * through the CLI interface. */
+#define configINCLUDE_DEMO_DEBUG_STATS       1
+
+/* The size of the global output buffer that is available for use when there
+ * are multiple command interpreters running at once (for example, one on a UART
+ * and one on TCP/IP).  This is done to prevent an output buffer being defined by
+ * each implementation - which would waste RAM.  In this case, there is only one
+ * command interpreter running, and it has its own local output buffer, so the
+ * global buffer is just set to be one byte long as it is not used and should not
+ * take up unnecessary RAM. */
+#define configCOMMAND_INT_MAX_OUTPUT_SIZE    1
+
+/* Only used when running in the FreeRTOS Windows simulator.  Defines the
+ * priority of the task used to simulate Ethernet interrupts. */
+#define configMAC_ISR_SIMULATOR_PRIORITY     ( configMAX_PRIORITIES - 1 )
+
+/* This demo creates a virtual network connection by accessing the raw Ethernet
+ * or WiFi data to and from a real network connection.  Many computers have more
+ * than one real network port, and configNETWORK_INTERFACE_TO_USE is used to tell
+ * the demo which real port should be used to create the virtual port.  The ports
+ * available are displayed on the console when the application is executed.  For
+ * example, on my development laptop setting configNETWORK_INTERFACE_TO_USE to 4
+ * results in the wired network being used, while setting
+ * configNETWORK_INTERFACE_TO_USE to 2 results in the wireless network being
+ * used. */
+#define configNETWORK_INTERFACE_TO_USE       ( 0L )
+
+/* The address of an echo server that will be used by the two demo echo client
+ * tasks:
+ * http://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/TCP_Echo_Clients.html,
+ * http://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/UDP_Echo_Clients.html. */
+#define configECHO_SERVER_ADDR0              192
+#define configECHO_SERVER_ADDR1              168
+#define configECHO_SERVER_ADDR2              2
+#define configECHO_SERVER_ADDR3              6
+#define configTCP_ECHO_CLIENT_PORT           7
+
+/* Default MAC address configuration.  The demo creates a virtual network
+ * connection that uses this MAC address by accessing the raw Ethernet/WiFi data
+ * to and from a real network connection on the host PC.  See the
+ * configNETWORK_INTERFACE_TO_USE definition above for information on how to
+ * configure the real network connection to use. */
+#define configMAC_ADDR0                      0x00
+#define configMAC_ADDR1                      0x11
+#define configMAC_ADDR2                      0x22
+#define configMAC_ADDR3                      0x33
+#define configMAC_ADDR4                      0x44
+#define configMAC_ADDR5                      0x21
+
+/* Default IP address configuration.  Used in ipconfigUSE_DHCP is set to 0, or
+ * ipconfigUSE_DHCP is set to 1 but a DNS server cannot be contacted. */
+#define configIP_ADDR0                       192
+#define configIP_ADDR1                       168
+#define configIP_ADDR2                       0
+#define configIP_ADDR3                       105
+
+/* Default gateway IP address configuration.  Used in ipconfigUSE_DHCP is set to
+ * 0, or ipconfigUSE_DHCP is set to 1 but a DNS server cannot be contacted. */
+#define configGATEWAY_ADDR0                  192
+#define configGATEWAY_ADDR1                  168
+#define configGATEWAY_ADDR2                  0
+#define configGATEWAY_ADDR3                  1
+
+/* Default DNS server configuration.  OpenDNS addresses are 208.67.222.222 and
+ * 208.67.220.220.  Used in ipconfigUSE_DHCP is set to 0, or ipconfigUSE_DHCP is
+ * set to 1 but a DNS server cannot be contacted.*/
+#define configDNS_SERVER_ADDR0               208
+#define configDNS_SERVER_ADDR1               67
+#define configDNS_SERVER_ADDR2               222
+#define configDNS_SERVER_ADDR3               222
+
+/* Default netmask configuration.  Used in ipconfigUSE_DHCP is set to 0, or
+ * ipconfigUSE_DHCP is set to 1 but a DNS server cannot be contacted. */
+#define configNET_MASK0                      255
+#define configNET_MASK1                      255
+#define configNET_MASK2                      255
+#define configNET_MASK3                      0
+
+/* The UDP port to which print messages are sent. */
+#define configPRINT_PORT                     ( 15000 )
+
+#define configPROFILING                      ( 0 )
+
+/* Pseudo random number generater used by some demo tasks. */
+extern uint32_t ulRand();
+#define configRAND32()    ulRand()
+
+/* The platform that FreeRTOS is running on. */
+#define configPLATFORM_NAME    "WinSim"
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/FreeRTOS-Plus/Test/CBMC/patches/FreeRTOSIPConfig.h b/FreeRTOS-Plus/Test/CBMC/patches/FreeRTOSIPConfig.h
new file mode 100644
index 000000000..13a2450b9
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/patches/FreeRTOSIPConfig.h
@@ -0,0 +1,305 @@
+/*
+FreeRTOS Kernel V10.2.0
+Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy of
+this software and associated documentation files (the "Software"), to deal in
+the Software without restriction, including without limitation the rights to
+use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+the Software, and to permit persons to whom the Software is furnished to do so,
+subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all
+copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+ http://aws.amazon.com/freertos
+ http://www.FreeRTOS.org
+*/
+
+
+/*****************************************************************************
+*
+* See the following URL for configuration information.
+* http://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/TCP_IP_Configuration.html
+*
+*****************************************************************************/
+
+#ifndef FREERTOS_IP_CONFIG_H
+#define FREERTOS_IP_CONFIG_H
+
+/* Set to 1 to print out debug messages.  If ipconfigHAS_DEBUG_PRINTF is set to
+ * 1 then FreeRTOS_debug_printf should be defined to the function used to print
+ * out the debugging messages. */
+#define ipconfigHAS_DEBUG_PRINTF    0
+#if ( ipconfigHAS_DEBUG_PRINTF == 1 )
+    #define FreeRTOS_debug_printf( X )    configPRINTF( X )
+#endif
+
+/* Set to 1 to print out non debugging messages, for example the output of the
+ * FreeRTOS_netstat() command, and ping replies.  If ipconfigHAS_PRINTF is set to 1
+ * then FreeRTOS_printf should be set to the function used to print out the
+ * messages. */
+#define FreeRTOS_printf( X )
+
+
+/* Define the byte order of the target MCU (the MCU FreeRTOS+TCP is executing
+ * on).  Valid options are pdFREERTOS_BIG_ENDIAN and pdFREERTOS_LITTLE_ENDIAN. */
+#define ipconfigBYTE_ORDER                         pdFREERTOS_LITTLE_ENDIAN
+
+/* If the network card/driver includes checksum offloading (IP/TCP/UDP checksums)
+ * then set ipconfigDRIVER_INCLUDED_RX_IP_CHECKSUM to 1 to prevent the software
+ * stack repeating the checksum calculations. */
+#define ipconfigDRIVER_INCLUDED_RX_IP_CHECKSUM     1
+
+/* Several API's will block until the result is known, or the action has been
+ * performed, for example FreeRTOS_send() and FreeRTOS_recv().  The timeouts can be
+ * set per socket, using setsockopt().  If not set, the times below will be
+ * used as defaults. */
+#define ipconfigSOCK_DEFAULT_RECEIVE_BLOCK_TIME    ( 5000 )
+#define ipconfigSOCK_DEFAULT_SEND_BLOCK_TIME       ( 5000 )
+
+/* Include support for DNS caching.  For TCP, having a small DNS cache is very
+ * useful.  When a cache is present, ipconfigDNS_REQUEST_ATTEMPTS can be kept low
+ * and also DNS may use small timeouts.  If a DNS reply comes in after the DNS
+ * socket has been destroyed, the result will be stored into the cache.  The next
+ * call to FreeRTOS_gethostbyname() will return immediately, without even creating
+ * a socket. */
+#define ipconfigUSE_DNS_CACHE                      ( 1 )
+#define ipconfigDNS_REQUEST_ATTEMPTS               ( 2 )
+
+/* The IP stack executes it its own task (although any application task can make
+ * use of its services through the published sockets API). ipconfigUDP_TASK_PRIORITY
+ * sets the priority of the task that executes the IP stack.  The priority is a
+ * standard FreeRTOS task priority so can take any value from 0 (the lowest
+ * priority) to (configMAX_PRIORITIES - 1) (the highest priority).
+ * configMAX_PRIORITIES is a standard FreeRTOS configuration parameter defined in
+ * FreeRTOSConfig.h, not FreeRTOSIPConfig.h. Consideration needs to be given as to
+ * the priority assigned to the task executing the IP stack relative to the
+ * priority assigned to tasks that use the IP stack. */
+#define ipconfigIP_TASK_PRIORITY                   ( configMAX_PRIORITIES - 2 )
+
+/* The size, in words (not bytes), of the stack allocated to the FreeRTOS+TCP
+ * task.  This setting is less important when the FreeRTOS Win32 simulator is used
+ * as the Win32 simulator only stores a fixed amount of information on the task
+ * stack.  FreeRTOS includes optional stack overflow detection, see:
+ * http://www.freertos.org/Stacks-and-stack-overflow-checking.html. */
+#define ipconfigIP_TASK_STACK_SIZE_WORDS           ( configMINIMAL_STACK_SIZE * 5 )
+
+/* ipconfigRAND32() is called by the IP stack to generate random numbers for
+ * things such as a DHCP transaction number or initial sequence number.  Random
+ * number generation is performed via this macro to allow applications to use their
+ * own random number generation method.  For example, it might be possible to
+ * generate a random number by sampling noise on an analogue input. */
+extern uint32_t ulRand();
+#define ipconfigRAND32()    ulRand()
+
+/* If ipconfigUSE_NETWORK_EVENT_HOOK is set to 1 then FreeRTOS+TCP will call the
+ * network event hook at the appropriate times.  If ipconfigUSE_NETWORK_EVENT_HOOK
+ * is not set to 1 then the network event hook will never be called. See:
+ * http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_UDP/API/vApplicationIPNetworkEventHook.shtml.
+ */
+#define ipconfigUSE_NETWORK_EVENT_HOOK           1
+
+/* Sockets have a send block time attribute.  If FreeRTOS_sendto() is called but
+ * a network buffer cannot be obtained then the calling task is held in the Blocked
+ * state (so other tasks can continue to executed) until either a network buffer
+ * becomes available or the send block time expires.  If the send block time expires
+ * then the send operation is aborted.  The maximum allowable send block time is
+ * capped to the value set by ipconfigMAX_SEND_BLOCK_TIME_TICKS.  Capping the
+ * maximum allowable send block time prevents prevents a deadlock occurring when
+ * all the network buffers are in use and the tasks that process (and subsequently
+ * free) the network buffers are themselves blocked waiting for a network buffer.
+ * ipconfigMAX_SEND_BLOCK_TIME_TICKS is specified in RTOS ticks.  A time in
+ * milliseconds can be converted to a time in ticks by dividing the time in
+ * milliseconds by portTICK_PERIOD_MS. */
+#define ipconfigUDP_MAX_SEND_BLOCK_TIME_TICKS    ( 5000U / portTICK_PERIOD_MS )
+
+/* If ipconfigUSE_DHCP is 1 then FreeRTOS+TCP will attempt to retrieve an IP
+ * address, netmask, DNS server address and gateway address from a DHCP server.  If
+ * ipconfigUSE_DHCP is 0 then FreeRTOS+TCP will use a static IP address.  The
+ * stack will revert to using the static IP address even when ipconfigUSE_DHCP is
+ * set to 1 if a valid configuration cannot be obtained from a DHCP server for any
+ * reason.  The static configuration used is that passed into the stack by the
+ * FreeRTOS_IPInit() function call. */
+#define ipconfigUSE_DHCP                         1
+#define ipconfigDHCP_REGISTER_HOSTNAME           1
+#define ipconfigDHCP_USES_UNICAST                1
+
+/* If ipconfigDHCP_USES_USER_HOOK is set to 1 then the application writer must
+ * provide an implementation of the DHCP callback function,
+ * xApplicationDHCPUserHook(). */
+#define ipconfigUSE_DHCP_HOOK                    0
+
+/* When ipconfigUSE_DHCP is set to 1, DHCP requests will be sent out at
+ * increasing time intervals until either a reply is received from a DHCP server
+ * and accepted, or the interval between transmissions reaches
+ * ipconfigMAXIMUM_DISCOVER_TX_PERIOD.  The IP stack will revert to using the
+ * static IP address passed as a parameter to FreeRTOS_IPInit() if the
+ * re-transmission time interval reaches ipconfigMAXIMUM_DISCOVER_TX_PERIOD without
+ * a DHCP reply being received. */
+#define ipconfigMAXIMUM_DISCOVER_TX_PERIOD \
+    ( 120000U / portTICK_PERIOD_MS )
+
+/* The ARP cache is a table that maps IP addresses to MAC addresses.  The IP
+ * stack can only send a UDP message to a remove IP address if it knowns the MAC
+ * address associated with the IP address, or the MAC address of the router used to
+ * contact the remote IP address.  When a UDP message is received from a remote IP
+ * address the MAC address and IP address are added to the ARP cache.  When a UDP
+ * message is sent to a remote IP address that does not already appear in the ARP
+ * cache then the UDP message is replaced by a ARP message that solicits the
+ * required MAC address information.  ipconfigARP_CACHE_ENTRIES defines the maximum
+ * number of entries that can exist in the ARP table at any one time. */
+#define ipconfigARP_CACHE_ENTRIES                 6
+
+/* ARP requests that do not result in an ARP response will be re-transmitted a
+ * maximum of ipconfigMAX_ARP_RETRANSMISSIONS times before the ARP request is
+ * aborted. */
+#define ipconfigMAX_ARP_RETRANSMISSIONS           ( 5 )
+
+/* ipconfigMAX_ARP_AGE defines the maximum time between an entry in the ARP
+ * table being created or refreshed and the entry being removed because it is stale.
+ * New ARP requests are sent for ARP cache entries that are nearing their maximum
+ * age.  ipconfigMAX_ARP_AGE is specified in tens of seconds, so a value of 150 is
+ * equal to 1500 seconds (or 25 minutes). */
+#define ipconfigMAX_ARP_AGE                       150
+
+/* Implementing FreeRTOS_inet_addr() necessitates the use of string handling
+ * routines, which are relatively large.  To save code space the full
+ * FreeRTOS_inet_addr() implementation is made optional, and a smaller and faster
+ * alternative called FreeRTOS_inet_addr_quick() is provided.  FreeRTOS_inet_addr()
+ * takes an IP in decimal dot format (for example, "192.168.0.1") as its parameter.
+ * FreeRTOS_inet_addr_quick() takes an IP address as four separate numerical octets
+ * (for example, 192, 168, 0, 1) as its parameters.  If
+ * ipconfigINCLUDE_FULL_INET_ADDR is set to 1 then both FreeRTOS_inet_addr() and
+ * FreeRTOS_indet_addr_quick() are available.  If ipconfigINCLUDE_FULL_INET_ADDR is
+ * not set to 1 then only FreeRTOS_indet_addr_quick() is available. */
+#define ipconfigINCLUDE_FULL_INET_ADDR            1
+
+/* ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS defines the total number of network buffer that
+ * are available to the IP stack.  The total number of network buffers is limited
+ * to ensure the total amount of RAM that can be consumed by the IP stack is capped
+ * to a pre-determinable value. */
+#define ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS    60
+
+/* A FreeRTOS queue is used to send events from application tasks to the IP
+ * stack.  ipconfigEVENT_QUEUE_LENGTH sets the maximum number of events that can
+ * be queued for processing at any one time.  The event queue must be a minimum of
+ * 5 greater than the total number of network buffers. */
+#define ipconfigEVENT_QUEUE_LENGTH \
+    ( ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS + 5 )
+
+/* The address of a socket is the combination of its IP address and its port
+ * number.  FreeRTOS_bind() is used to manually allocate a port number to a socket
+ * (to 'bind' the socket to a port), but manual binding is not normally necessary
+ * for client sockets (those sockets that initiate outgoing connections rather than
+ * wait for incoming connections on a known port number).  If
+ * ipconfigALLOW_SOCKET_SEND_WITHOUT_BIND is set to 1 then calling
+ * FreeRTOS_sendto() on a socket that has not yet been bound will result in the IP
+ * stack automatically binding the socket to a port number from the range
+ * socketAUTO_PORT_ALLOCATION_START_NUMBER to 0xffff.  If
+ * ipconfigALLOW_SOCKET_SEND_WITHOUT_BIND is set to 0 then calling FreeRTOS_sendto()
+ * on a socket that has not yet been bound will result in the send operation being
+ * aborted. */
+#define ipconfigALLOW_SOCKET_SEND_WITHOUT_BIND         1
+
+/* Defines the Time To Live (TTL) values used in outgoing UDP packets. */
+#define ipconfigUDP_TIME_TO_LIVE                       128
+/* Also defined in FreeRTOSIPConfigDefaults.h. */
+#define ipconfigTCP_TIME_TO_LIVE                       128
+
+/* USE_TCP: Use TCP and all its features. */
+#define ipconfigUSE_TCP                                ( 1 )
+
+/* USE_WIN: Let TCP use windowing mechanism. */
+#define ipconfigUSE_TCP_WIN                            ( 1 )
+
+/* The MTU is the maximum number of bytes the payload of a network frame can
+ * contain.  For normal Ethernet V2 frames the maximum MTU is 1500.  Setting a
+ * lower value can save RAM, depending on the buffer management scheme used.  If
+ * ipconfigCAN_FRAGMENT_OUTGOING_PACKETS is 1 then (ipconfigNETWORK_MTU - 28) must
+ * be divisible by 8. */
+#define ipconfigNETWORK_MTU                            1200U
+
+/* Set ipconfigUSE_DNS to 1 to include a basic DNS client/resolver.  DNS is used
+ * through the FreeRTOS_gethostbyname() API function. */
+#define ipconfigUSE_DNS                                1
+
+/* If ipconfigREPLY_TO_INCOMING_PINGS is set to 1 then the IP stack will
+ * generate replies to incoming ICMP echo (ping) requests. */
+#define ipconfigREPLY_TO_INCOMING_PINGS                1
+
+/* If ipconfigSUPPORT_OUTGOING_PINGS is set to 1 then the
+ * FreeRTOS_SendPingRequest() API function is available. */
+#define ipconfigSUPPORT_OUTGOING_PINGS                 0
+
+/* If ipconfigSUPPORT_SELECT_FUNCTION is set to 1 then the FreeRTOS_select()
+ * (and associated) API function is available. */
+#define ipconfigSUPPORT_SELECT_FUNCTION                0
+
+/* If ipconfigFILTER_OUT_NON_ETHERNET_II_FRAMES is set to 1 then Ethernet frames
+ * that are not in Ethernet II format will be dropped.  This option is included for
+ * potential future IP stack developments. */
+#define ipconfigFILTER_OUT_NON_ETHERNET_II_FRAMES      1
+
+/* If ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES is set to 1 then it is the
+ * responsibility of the Ethernet interface to filter out packets that are of no
+ * interest.  If the Ethernet interface does not implement this functionality, then
+ * set ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES to 0 to have the IP stack
+ * perform the filtering instead (it is much less efficient for the stack to do it
+ * because the packet will already have been passed into the stack).  If the
+ * Ethernet driver does all the necessary filtering in hardware then software
+ * filtering can be removed by using a value other than 1 or 0. */
+#define ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES    1
+
+/* The windows simulator cannot really simulate MAC interrupts, and needs to
+ * block occasionally to allow other tasks to run. */
+#define configWINDOWS_MAC_INTERRUPT_SIMULATOR_DELAY    ( 20 / portTICK_PERIOD_MS )
+
+/* Advanced only: in order to access 32-bit fields in the IP packets with
+ * 32-bit memory instructions, all packets will be stored 32-bit-aligned,
+ * plus 16-bits. This has to do with the contents of the IP-packets: all
+ * 32-bit fields are 32-bit-aligned, plus 16-bit. */
+#define ipconfigPACKET_FILLER_SIZE                     2U
+
+/* Define the size of the pool of TCP window descriptors.  On the average, each
+ * TCP socket will use up to 2 x 6 descriptors, meaning that it can have 2 x 6
+ * outstanding packets (for Rx and Tx).  When using up to 10 TP sockets
+ * simultaneously, one could define TCP_WIN_SEG_COUNT as 120. */
+#define ipconfigTCP_WIN_SEG_COUNT                      240
+
+/* Each TCP socket has a circular buffers for Rx and Tx, which have a fixed
+ * maximum size.  Define the size of Rx buffer for TCP sockets. */
+#define ipconfigTCP_RX_BUFFER_LENGTH                   ( 10000 )
+
+/* Define the size of Tx buffer for TCP sockets. */
+#define ipconfigTCP_TX_BUFFER_LENGTH                   ( 10000 )
+
+/* When using call-back handlers, the driver may check if the handler points to
+ * real program memory (RAM or flash) or just has a random non-zero value. */
+#define ipconfigIS_VALID_PROG_ADDRESS( x )    ( ( x ) != NULL )
+
+/* Include support for TCP keep-alive messages. */
+#define ipconfigTCP_KEEP_ALIVE                   ( 1 )
+#define ipconfigTCP_KEEP_ALIVE_INTERVAL          ( 20 ) /* Seconds. */
+
+/* The socket semaphore is used to unblock the MQTT task. */
+#define ipconfigSOCKET_HAS_USER_SEMAPHORE        ( 0 )
+
+#define ipconfigSOCKET_HAS_USER_WAKE_CALLBACK    ( 1 )
+#define ipconfigUSE_CALLBACKS                    ( 0 )
+
+
+#define portINLINE                               __inline
+
+void vApplicationMQTTGetKeys( const char ** ppcRootCA,
+                              const char ** ppcClientCert,
+                              const char ** ppcClientPrivateKey );
+
+#endif /* FREERTOS_IP_CONFIG_H */
diff --git a/FreeRTOS-Plus/Test/CBMC/patches/Makefile b/FreeRTOS-Plus/Test/CBMC/patches/Makefile
new file mode 100644
index 000000000..27888e63b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/patches/Makefile
@@ -0,0 +1,24 @@
+BRANCH=freertos
+
+PATCHED=patched
+
+default:
+	git format-patch $(BRANCH)..$(BRANCH)-cbmc-patches
+
+patch:
+	if [ ! -f $(PATCHED) ]; then \
+	  for p in *.patch; do \
+	    (cd ../../..; patch -p1 < CBMC/patches/$${p}) \
+	  done; \
+	  cat > $(PATCHED) < /dev/null; \
+	fi
+
+unpatch:
+	git checkout ../../../lib
+	$(RM) $(PATCHED)
+
+#patching file lib/FreeRTOS-Plus-TCP/include/FreeRTOS_IP_Private.h
+#patching file lib/include/private/list.h
+#patching file lib/FreeRTOS-Plus-TCP/source/FreeRTOS_DHCP.c
+#patching file lib/FreeRTOS-Plus-TCP/source/FreeRTOS_DNS.c
+#patching file lib/FreeRTOS-Plus-TCP/source/FreeRTOS_TCP_WIN.c
diff --git a/FreeRTOS-Plus/Test/CBMC/patches/README.md b/FreeRTOS-Plus/Test/CBMC/patches/README.md
new file mode 100644
index 000000000..ec0e5d424
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/patches/README.md
@@ -0,0 +1,6 @@
+This directory includes patches to FreeRTOS required to run the CBMC proofs.
+
+The patches fall into three classes:
+* First is a refactoring of prvCheckOptions
+* Second is the removal of static attributes from some functions
+* Third is two patches dealing with shortcomings of CBMC that should be removed soon.
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/CBMC/patches/__init__.py b/FreeRTOS-Plus/Test/CBMC/patches/__init__.py
new file mode 100755
index 000000000..e69de29bb
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/patches/__init__.py
diff --git a/FreeRTOS-Plus/Test/CBMC/patches/compute_patch.py b/FreeRTOS-Plus/Test/CBMC/patches/compute_patch.py
new file mode 100755
index 000000000..3e854177c
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/patches/compute_patch.py
@@ -0,0 +1,241 @@
+#!/usr/bin/env python3
+#
+# Generation of patches for CBMC proofs.
+#
+# Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in all
+# copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+
+
+import json
+import os
+import re
+import subprocess
+import textwrap
+import unittest
+
+from patches_constants import PATCHES_DIR
+from patches_constants import HEADERS
+
+
+DEFINE_REGEX_MAKEFILE = re.compile(r"(?:['\"])?([\w]+)")
+DEFINE_REGEX_HEADER = re.compile(r"\s*#\s*define\s*([\w]+)")
+
+class DirtyGitError(Exception):
+    pass
+
+class PatchCreationError(Exception):
+    pass
+
+def prolog():
+    return textwrap.dedent("""\
+        This script generates patch files for the header files used
+        in the cbmc proof. These patches permit setting values of preprocessor
+        macros as part of the proof configuration.
+    """)
+
+
+def find_all_defines():
+    """Collects all define values in Makefile.json.
+
+       Some of the Makefiles use # in the json to make comments.
+       As this is non standard json, we need to remove the comment
+       lines before parsing. Then we extract all defines from the file.
+    """
+    defines = set()
+
+    proof_dir = os.path.abspath(os.path.join(PATCHES_DIR, "..", "proofs"))
+
+    for fldr, _, fyles in os.walk(proof_dir):
+        if "Makefile.json" in fyles:
+            file = os.path.join(fldr, "Makefile.json")
+            key = "DEF"
+        elif "MakefileCommon.json" in fyles:
+            file = os.path.join(fldr, "MakefileCommon.json")
+            key = "DEF "
+        else:
+            continue
+        with open(file, "r") as source:
+            content = "".join([line for line in source
+                               if line and not line.strip().startswith("#")])
+            makefile = json.loads(content)
+            if key in makefile.keys():
+                """This regex parses the define declaration in Makefile.json
+                   'macro(x)=false' is an example for a declaration.
+                   'macro' is expected to be matched.
+                """
+                for define in makefile[key]:
+                    matched = DEFINE_REGEX_MAKEFILE.match(define)
+                    if matched:
+                        defines.add(matched.group(1))
+    return defines
+
+def manipulate_headerfile(defines, header_file):
+    """Wraps all defines used in an ifndef."""
+
+    # This regex matches the actual define in the header file.
+    modified_content = ""
+    with open(header_file, "r") as source:
+        last = ""
+        for line in source:
+            match = DEFINE_REGEX_HEADER.match(line)
+            if (match and
+                    match.group(1) in defines and
+                    not last.lstrip().startswith("#ifndef")):
+                full_def = line
+                # this loop deals with multiline definitions
+                while line.rstrip().endswith("\\"):
+                    line = next(source)
+                    full_def += line
+                # indentation for multiline definitions can be improved
+                modified_content += textwrap.dedent("""\
+                    #ifndef {target}
+                        {original}\
+                    #endif
+                    """.format(target=match.group(1), original=full_def))
+            else:
+                modified_content += line
+            last = line
+    with open(header_file, "w") as output:
+        output.write(modified_content)
+
+
+def header_dirty(header_files):
+    """Check that the header_file is not previously modified."""
+
+    # Git does not update the modified file list returned by diff-files on
+    # apply -R (at least not on MacOS).
+    # Running git status updates git's internal state.
+    status = subprocess.run(["git", "status"], stdout=subprocess.DEVNULL,
+                            stderr=subprocess.PIPE, universal_newlines=True)
+
+    diff_state = subprocess.run(["git", "diff-files"], stdout=subprocess.PIPE,
+                                stderr=subprocess.PIPE, universal_newlines=True)
+
+    if status.returncode:
+        raise DirtyGitError(textwrap.dedent("""\
+                Could not run git status. Exited: {}
+                stderr: {}
+                """.format(status.returncode, status.stderr)))
+
+    if diff_state.returncode:
+        raise DirtyGitError(textwrap.dedent("""\
+                Could not run git diff-files. Exited: {}
+                stderr: {}
+                """.format(diff_state.returncode, diff_state.stderr)))
+
+    for header_file in header_files:
+        if os.path.basename(header_file) + "\n" in diff_state.stdout:
+            return True
+    return False
+
+
+def create_patch(defines, header_file):
+    """Computes a patch enclosing defines used in CBMC proofs with #ifndef."""
+    manipulate_headerfile(defines, header_file)
+    patch = subprocess.run(["git", "diff", header_file],
+                           stdout=subprocess.PIPE,
+                           stderr=subprocess.PIPE, universal_newlines=True)
+    cleaned = subprocess.run(["git", "checkout", "--", header_file],
+                             stdout=subprocess.DEVNULL,
+                             stderr=subprocess.PIPE, universal_newlines=True)
+
+    if patch.returncode:
+        raise PatchCreationError(textwrap.dedent("""\
+                git diff exited with error code: {}
+                stderr: {}
+                """.format(patch.returncode, patch.stderr)))
+
+    if cleaned.returncode:
+        raise DirtyGitError(textwrap.dedent("""\
+                git checkout for cleaning files failed with error code: {}
+                on file {}
+                stderr: {}
+                """.format(cleaned.returncode, header_file, cleaned.stderr)))
+
+    header_path_part = header_file.replace(os.sep, "_")
+    path_name = "auto_patch_" + header_path_part + ".patch"
+    path_name = os.path.join(PATCHES_DIR, path_name)
+    if patch.stdout:
+        with open(path_name, "w") as patch_file:
+            patch_file.write(patch.stdout)
+
+
+def create_patches(headers):
+    defines = find_all_defines()
+
+    if not header_dirty(headers):
+        for header in headers:
+            create_patch(defines, header)
+    else:
+        raise DirtyGitError(textwrap.dedent("""\
+                It seems like one of the header files is in dirty state.
+                This script cannot patch files in dirty state.
+                """))
+
+# Invoke 'python3 -m unittest compute_patch.py" for running tests.
+class TestDefineRegexes(unittest.TestCase):
+    def test_makefile_regex(self):
+        input1 = "ipconfigETHERNET_MINIMUM_PACKET_BYTES={MINIMUM_PACKET_BYTES}"
+        input2 = "ipconfigETHERNET_MINIMUM_PACKET_BYTES=50"
+        input3 = "'configASSERT(X)=__CPROVER_assert(x, \"must hold\")'"
+        input4 = '"configASSERT (X)=__CPROVER_assert(x, "must hold")"'
+        input5 = "configASSERT(X)=__CPROVER_assert(x,\"must hold\")"
+
+        match1 = DEFINE_REGEX_MAKEFILE.match(input1)
+        match2 = DEFINE_REGEX_MAKEFILE.match(input2)
+        match3 = DEFINE_REGEX_MAKEFILE.match(input3)
+        match4 = DEFINE_REGEX_MAKEFILE.match(input4)
+        match5 = DEFINE_REGEX_MAKEFILE.match(input5)
+
+        self.assertIsNotNone(match1)
+        self.assertIsNotNone(match2)
+        self.assertIsNotNone(match3)
+        self.assertIsNotNone(match4)
+        self.assertIsNotNone(match5)
+
+        self.assertEqual(match1.group(1),
+                         "ipconfigETHERNET_MINIMUM_PACKET_BYTES")
+        self.assertEqual(match2.group(1),
+                         "ipconfigETHERNET_MINIMUM_PACKET_BYTES")
+        self.assertEqual(match3.group(1), "configASSERT")
+        self.assertEqual(match4.group(1), "configASSERT")
+        self.assertEqual(match5.group(1), "configASSERT")
+
+
+    def test_header_regex(self):
+        input1 = ("#define configASSERT( x )    if( ( x ) == 0 )" +
+                  "vAssertCalled( __FILE__, __LINE__ )")
+        input2 = "#define ipconfigMAX_ARP_RETRANSMISSIONS           ( 5 )"
+        input3 = "#define ipconfigINCLUDE_FULL_INET_ADDR            1"
+
+        match1 = DEFINE_REGEX_HEADER.match(input1)
+        match2 = DEFINE_REGEX_HEADER.match(input2)
+        match3 = DEFINE_REGEX_HEADER.match(input3)
+
+        self.assertIsNotNone(match1)
+        self.assertIsNotNone(match2)
+        self.assertIsNotNone(match3)
+
+        self.assertEqual(match1.group(1), "configASSERT")
+        self.assertEqual(match2.group(1), "ipconfigMAX_ARP_RETRANSMISSIONS")
+        self.assertEqual(match3.group(1), "ipconfigINCLUDE_FULL_INET_ADDR")
+
+if __name__ == '__main__':
+    create_patches(HEADERS)
diff --git a/FreeRTOS-Plus/Test/CBMC/patches/patch.py b/FreeRTOS-Plus/Test/CBMC/patches/patch.py
new file mode 100755
index 000000000..c2c0883a3
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/patches/patch.py
@@ -0,0 +1,36 @@
+#!/usr/bin/env python3
+
+import logging
+import os
+import subprocess
+import sys
+from glob import glob
+
+from patches_constants import PATCHES_DIR
+
+def patch():
+    if os.path.isfile("patched"):
+        sys.exit()
+
+    applied_patches = []
+    failed_patches = []
+    for tmpfile in glob(os.path.join(PATCHES_DIR, "*.patch")):
+        print("patch", tmpfile)
+        result = subprocess.run(["git", "apply", "--ignore-space-change", "--ignore-whitespace", tmpfile],
+                                cwd=os.path.join("..", "..", "..", ".."))
+        if result.returncode:
+            failed_patches.append(tmpfile)
+            logging.error("patching failed: %s", tmpfile)
+        else:
+            applied_patches.append(tmpfile)
+
+    with open(os.path.join(PATCHES_DIR, "patched"), "w") as outp:
+        print("Success:", file=outp)
+        print("\n".join(map(lambda x: "\t" + x, applied_patches)), file=outp)
+
+        print("Failure:", file=outp)
+        print("\n".join(map(lambda x: "\t" + x, failed_patches)), file=outp)
+
+
+if __name__ == "__main__":
+    patch()
diff --git a/FreeRTOS-Plus/Test/CBMC/patches/patches_constants.py b/FreeRTOS-Plus/Test/CBMC/patches/patches_constants.py
new file mode 100755
index 000000000..1093e6538
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/patches/patches_constants.py
@@ -0,0 +1,42 @@
+#!/usr/bin/env python3
+#
+# Constants for the generation of patches for CBMC proofs.
+#
+# Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in all
+# copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+
+import os
+
+PATCHES_DIR = os.path.dirname(os.path.abspath(__file__))
+
+
+shared_prefix = [
+    "."
+]
+shared_prefix_port = [
+    "..", "..", "..", "..", "FreeRTOS", "Source", "portable", "MSVC-MingW"
+]
+
+absolute_prefix = os.path.abspath(os.path.join(PATCHES_DIR, *shared_prefix))
+absolute_prefix_port = os.path.abspath(os.path.join(PATCHES_DIR, *shared_prefix_port))
+
+HEADERS = [os.path.join(absolute_prefix, "FreeRTOSConfig.h"),
+		   os.path.join(absolute_prefix, "FreeRTOSIPConfig.h"),
+           os.path.join(absolute_prefix_port, "portmacro.h")]
diff --git a/FreeRTOS-Plus/Test/CBMC/patches/unpatch.py b/FreeRTOS-Plus/Test/CBMC/patches/unpatch.py
new file mode 100755
index 000000000..2162971fd
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/patches/unpatch.py
@@ -0,0 +1,42 @@
+#!/usr/bin/env python3
+#
+# unpatching changes for the CBMC proofs.
+#
+# Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in all
+# copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+
+import subprocess
+import os
+import sys
+from glob import glob
+
+from patches_constants import PATCHES_DIR
+
+try:
+    os.remove(os.path.join(PATCHES_DIR, "patched"))
+except FileNotFoundError:
+    print("Nothing to do here.")
+    sys.exit(0)
+for tmpfile in glob(os.path.join(PATCHES_DIR, "*.patch")):
+    print("unpatch", tmpfile)
+    result = subprocess.run(["git", "apply", "-R", "--ignore-space-change", "--ignore-whitespace", tmpfile],
+                            cwd=os.path.join("..", "..", "..", ".."))
+    if result.returncode:
+        print("Unpatching failed: {}".format(tmpfile))
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/.gitignore b/FreeRTOS-Plus/Test/CBMC/proofs/.gitignore
new file mode 100644
index 000000000..3498c4b3b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/.gitignore
@@ -0,0 +1,10 @@
+# These files are generated by make_type_header_files.py
+*_datastructure.h
+
+Makefile
+Makefile.common
+cbmc-batch.yaml
+**/*.txt
+**/*.goto
+
+!CMakeLists.txt
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPAgeCache/ARPAgeCache_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPAgeCache/ARPAgeCache_harness.c
new file mode 100644
index 000000000..523783564
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPAgeCache/ARPAgeCache_harness.c
@@ -0,0 +1,22 @@
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "list.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOS_ARP.h"
+
+//We assume that the pxGetNetworkBufferWithDescriptor function is implemented correctly and returns a valid data structure.
+//This is the mock to mimic the correct expected bahvior. If this allocation fails, this might invalidate the proof.
+NetworkBufferDescriptor_t *pxGetNetworkBufferWithDescriptor( size_t xRequestedSizeBytes, TickType_t xBlockTimeTicks ){
+	NetworkBufferDescriptor_t *pxNetworkBuffer = (NetworkBufferDescriptor_t *) malloc(sizeof(NetworkBufferDescriptor_t));
+	pxNetworkBuffer->pucEthernetBuffer = malloc(xRequestedSizeBytes);
+	pxNetworkBuffer->xDataLength = xRequestedSizeBytes;
+	return pxNetworkBuffer;
+}
+
+void harness()
+{
+  vARPAgeCache();
+}
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPAgeCache/Makefile.json b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPAgeCache/Makefile.json
new file mode 100644
index 000000000..83c351d70
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPAgeCache/Makefile.json
@@ -0,0 +1,18 @@
+{
+  "ENTRY": "ARPAgeCache",
+  "CBMCFLAGS":
+  [
+      "--unwind 1",
+      "--unwindset vARPAgeCache.0:7",
+      "--nondet-static"
+  ],
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_ARP.goto",
+    "$(FREERTOS)/Source/tasks.goto"
+  ],
+  "DEF":
+  [
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPAgeCache/README.md b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPAgeCache/README.md
new file mode 100644
index 000000000..3352f8096
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPAgeCache/README.md
@@ -0,0 +1,2 @@
+Assuming that xNetworkInterfaceOutput is memory safe,
+this harness proves the memory safety of the vARPAgeCache function.
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPGenerateRequestPacket/ARPGenerateRequestPacket_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPGenerateRequestPacket/ARPGenerateRequestPacket_harness.c
new file mode 100644
index 000000000..3ec9500cc
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPGenerateRequestPacket/ARPGenerateRequestPacket_harness.c
@@ -0,0 +1,28 @@
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "queue.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOS_ARP.h"
+
+void harness()
+{
+	/*
+	 * The assumption made here is that the buffer pointed by pucEthernerBuffer
+	 * is at least allocated to sizeof(ARPPacket_t) size but eventually a even larger buffer.
+	 * This is not checked inside vARPGenerateRequestPacket.
+	 */
+	uint8_t ucBUFFER_SIZE;
+	__CPROVER_assume( ucBUFFER_SIZE >= sizeof(ARPPacket_t) && ucBUFFER_SIZE < 2 * sizeof(ARPPacket_t) );
+	void *xBuffer = malloc(ucBUFFER_SIZE);
+
+	NetworkBufferDescriptor_t xNetworkBuffer2;
+	xNetworkBuffer2.pucEthernetBuffer = xBuffer;
+	xNetworkBuffer2.xDataLength = ucBUFFER_SIZE;
+
+	/* vARPGenerateRequestPacket asserts buffer has room for a packet */
+	__CPROVER_assume( xNetworkBuffer2.xDataLength >= sizeof(ARPPacket_t) );
+	vARPGenerateRequestPacket( &xNetworkBuffer2 );
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPGenerateRequestPacket/Makefile.json b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPGenerateRequestPacket/Makefile.json
new file mode 100644
index 000000000..65c352489
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPGenerateRequestPacket/Makefile.json
@@ -0,0 +1,15 @@
+{
+  "ENTRY": "ARPGenerateRequestPacket",
+  "CBMCFLAGS":
+  [
+      "--unwind 1"
+  ],
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_ARP.goto"
+  ],
+  "DEF":
+  [
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPGenerateRequestPacket/README.md b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPGenerateRequestPacket/README.md
new file mode 100644
index 000000000..f8fdcc97d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPGenerateRequestPacket/README.md
@@ -0,0 +1,3 @@
+Given that the pointer target of xNetworkDescriptor.pucEthernetBuffer is allocated
+to the size claimed in xNetworkDescriptor.xDataLength,
+this harness proves the memory safety of ARPGenerateRequestPacket.
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPGetCacheEntry/ARPGetCacheEntry_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPGetCacheEntry/ARPGetCacheEntry_harness.c
new file mode 100644
index 000000000..bf188efa1
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPGetCacheEntry/ARPGetCacheEntry_harness.c
@@ -0,0 +1,17 @@
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "queue.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOS_ARP.h"
+
+
+void harness()
+{
+  uint32_t ulIPAddress;
+  MACAddress_t xMACAddress;
+
+  eARPGetCacheEntry( &ulIPAddress, &xMACAddress );
+}
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPGetCacheEntry/Configurations.json b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPGetCacheEntry/Configurations.json
new file mode 100644
index 000000000..ecc95a87f
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPGetCacheEntry/Configurations.json
@@ -0,0 +1,41 @@
+{
+  "ENTRY": "ARPGetCacheEntry",
+  "CBMCFLAGS":
+  [
+      "--unwind 1",
+      "--unwindset prvCacheLookup.0:7",
+      "--nondet-static"
+  ],
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_ARP.goto"
+  ],
+  "DEF":
+  [
+    {
+      "ARPGetCacheEntry_default":[
+        "ipconfigARP_STORES_REMOTE_ADDRESSES=0",
+        "ipconfigUSE_LLMNR=0"
+      ]
+    },
+    {
+      "ARPGetCacheEntry_LLMNR": [
+        "ipconfigARP_STORES_REMOTE_ADDRESSES=0",
+        "ipconfigUSE_LLMNR=1"
+      ]
+    },
+    {
+      "ARPGetCacheEntry_STORE_REMOTE": [
+        "ipconfigARP_STORES_REMOTE_ADDRESSES=1",
+        "ipconfigUSE_LLMNR=0"
+      ]
+    },
+    {
+      "ARPGetCacheEntry_REMOTE_LLMNR": [
+        "ipconfigARP_STORES_REMOTE_ADDRESSES=1",
+        "ipconfigUSE_LLMNR=1"
+      ]
+    }
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPGetCacheEntry/README.md b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPGetCacheEntry/README.md
new file mode 100644
index 000000000..03e987ebd
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPGetCacheEntry/README.md
@@ -0,0 +1,4 @@
+The combined proofs in the subdirectories prove that ARPGetCacheEntry
+is memory safe for all possible combinations of ipconfigARP_STORES_REMOTE_ADDRESSES
+and ipconfigUSE_LLMNR. These are the only configuration
+parameters used inside the ARPGetCacheEntry.
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPGetCacheEntryByMac/ARPGetCacheEntryByMac_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPGetCacheEntryByMac/ARPGetCacheEntryByMac_harness.c
new file mode 100644
index 000000000..442b1df6b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPGetCacheEntryByMac/ARPGetCacheEntryByMac_harness.c
@@ -0,0 +1,14 @@
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "queue.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOS_ARP.h"
+
+void harness(){
+	MACAddress_t xMACAddress;
+	uint32_t ulIPAddress;
+	eARPGetCacheEntryByMac( &xMACAddress, &ulIPAddress );
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPGetCacheEntryByMac/Makefile.json b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPGetCacheEntryByMac/Makefile.json
new file mode 100644
index 000000000..0f589a8e2
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPGetCacheEntryByMac/Makefile.json
@@ -0,0 +1,17 @@
+{
+  "ENTRY": "ARPGetCacheEntryByMac",
+  "CBMCFLAGS":
+  [
+      "--unwind 7",
+      "--nondet-static"
+  ],
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_ARP.goto"
+  ],
+  "DEF":
+  [
+    "ipconfigUSE_ARP_REVERSED_LOOKUP=1", "ipconfigARP_CACHE_ENTRIES=6"
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPGetCacheEntryByMac/README.md b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPGetCacheEntryByMac/README.md
new file mode 100644
index 000000000..77c17e2e9
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPGetCacheEntryByMac/README.md
@@ -0,0 +1,4 @@
+ARPGetCacheEntryByMac is memory safe,
+if it is enabled.
+
+ARPGetCacheEntryByMac does not use multiple configurations internally.
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPProcessPacket/ARPProcessPacket_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPProcessPacket/ARPProcessPacket_harness.c
new file mode 100644
index 000000000..f2d8e61ae
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPProcessPacket/ARPProcessPacket_harness.c
@@ -0,0 +1,15 @@
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "queue.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOS_ARP.h"
+
+void harness()
+{
+  ARPPacket_t xARPFrame;
+
+  eARPProcessPacket( &xARPFrame );
+}
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPProcessPacket/Configurations.json b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPProcessPacket/Configurations.json
new file mode 100644
index 000000000..48d5d83c9
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPProcessPacket/Configurations.json
@@ -0,0 +1,19 @@
+{
+  "ENTRY": "ARPProcessPacket",
+  "CBMCFLAGS":
+  [
+      "--unwind 1",
+      "--unwindset vARPRefreshCacheEntry.0:7,memcmp.0:17",
+      "--nondet-static"
+  ],
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_ARP.goto"
+  ],
+  "DEF":
+  [
+    {"disableClashDetection": ["ipconfigARP_USE_CLASH_DETECTION=0"]},
+    {"enableClashDetection": ["ipconfigARP_USE_CLASH_DETECTION=1"]}
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPProcessPacket/README.md b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPProcessPacket/README.md
new file mode 100644
index 000000000..0197851b1
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPProcessPacket/README.md
@@ -0,0 +1,4 @@
+The proofs in the subdirectories show that
+ARPProcessPacket is memory safe independent
+of the configuration value of
+ipconfigARP_USE_CLASH_DETECTION.
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPRefreshCacheEntry/ARPRefreshCacheEntry_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPRefreshCacheEntry/ARPRefreshCacheEntry_harness.c
new file mode 100644
index 000000000..6664d3cd0
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPRefreshCacheEntry/ARPRefreshCacheEntry_harness.c
@@ -0,0 +1,15 @@
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "queue.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_ARP.h"
+
+void harness()
+{
+  MACAddress_t xMACAddress;
+  uint32_t ulIPAddress;
+  vARPRefreshCacheEntry( &xMACAddress, ulIPAddress );
+  vARPRefreshCacheEntry( NULL, ulIPAddress );
+}
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPRefreshCacheEntry/Configurations.json b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPRefreshCacheEntry/Configurations.json
new file mode 100644
index 000000000..6cde60a51
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPRefreshCacheEntry/Configurations.json
@@ -0,0 +1,19 @@
+{
+  "ENTRY": "ARPRefreshCacheEntry",
+  "CBMCFLAGS":
+  [
+      "--unwind 1",
+      "--unwindset vARPRefreshCacheEntry.0:7,memcmp.0:17",
+      "--nondet-static"
+  ],
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_ARP.goto"
+  ],
+  "DEF":
+  [
+    {"NOT_STORE_REMOTE":["ipconfigARP_STORES_REMOTE_ADDRESSES=0"]},
+    {"STORE_REMOTE":["ipconfigARP_STORES_REMOTE_ADDRESSES=1"]}
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPRefreshCacheEntry/README.md b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPRefreshCacheEntry/README.md
new file mode 100644
index 000000000..0f84300cf
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPRefreshCacheEntry/README.md
@@ -0,0 +1,4 @@
+The proofs in this directory guarantee together that
+ARPRefreshCacheEntry is memory safe independent
+of the configuration value of
+ipconfigARP_STORES_REMOTE_ADDRESSES.
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPSendGratuitous/ARPSendGratuitous_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPSendGratuitous/ARPSendGratuitous_harness.c
new file mode 100644
index 000000000..fd02b10a2
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPSendGratuitous/ARPSendGratuitous_harness.c
@@ -0,0 +1,13 @@
+// /* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "queue.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_ARP.h"
+
+
+void harness()
+{
+  vARPSendGratuitous();
+}
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPSendGratuitous/Makefile.json b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPSendGratuitous/Makefile.json
new file mode 100644
index 000000000..1f9616ef8
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPSendGratuitous/Makefile.json
@@ -0,0 +1,18 @@
+{
+  "ENTRY": "ARPSendGratuitous",
+  "CBMCFLAGS":
+  [
+      "--unwind 1",
+      "--nondet-static"
+  ],
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_ARP.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_IP.goto",
+    "$(FREERTOS)/Source/tasks.goto"
+  ],
+  "DEF":
+  [
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPSendGratuitous/README.md b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPSendGratuitous/README.md
new file mode 100644
index 000000000..5bb155221
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARPSendGratuitous/README.md
@@ -0,0 +1,6 @@
+Abstracting xQueueGenericSend away
+and including tasks.c and FreeRTOS_IP.c:
+The ARPSendGratutious function is memory safe,
+if xQueueGenericSend is memory safe.
+
+queue.c is not compiled into the proof binary.
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_FreeRTOS_ClearARP/ClearARP_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_FreeRTOS_ClearARP/ClearARP_harness.c
new file mode 100644
index 000000000..957720133
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_FreeRTOS_ClearARP/ClearARP_harness.c
@@ -0,0 +1,13 @@
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "queue.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_ARP.h"
+
+void harness()
+{
+	FreeRTOS_ClearARP();
+}
+
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_FreeRTOS_ClearARP/Makefile.json b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_FreeRTOS_ClearARP/Makefile.json
new file mode 100644
index 000000000..332106c4e
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_FreeRTOS_ClearARP/Makefile.json
@@ -0,0 +1,15 @@
+{
+  "ENTRY": "ClearARP",
+  "CBMCFLAGS":
+  [
+      "--unwind 1"
+  ],
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_ARP.goto"
+  ],
+  "DEF":
+  [
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_FreeRTOS_ClearARP/README.md b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_FreeRTOS_ClearARP/README.md
new file mode 100644
index 000000000..2447722c9
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_FreeRTOS_ClearARP/README.md
@@ -0,0 +1,2 @@
+This proof demonstrates the memory safety of the ClearARP function in the FreeRTOS_ARP.c file.
+No restrictions are made.
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_FreeRTOS_OutputARPRequest/Configurations.json b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_FreeRTOS_OutputARPRequest/Configurations.json
new file mode 100644
index 000000000..13792bb68
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_FreeRTOS_OutputARPRequest/Configurations.json
@@ -0,0 +1,57 @@
+#
+# FreeRTOS memory safety proofs with CBMC.
+# Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+#
+# Permission is hereby granted, free of charge, to any person
+# obtaining a copy of this software and associated documentation
+# files (the "Software"), to deal in the Software without
+# restriction, including without limitation the rights to use, copy,
+# modify, merge, publish, distribute, sublicense, and/or sell copies
+# of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be
+# included in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+# BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+# ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+#
+# http://aws.amazon.com/freertos
+# http://www.FreeRTOS.org
+#
+
+{
+  "ENTRY": "OutputARPRequest",
+  "CBMCFLAGS":
+  [
+      "--unwind 20"
+  ],
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_ARP.goto"
+  ],
+  #That is the minimal required size for an ARPPacket_t plus offset in the buffer.
+  "MINIMUM_PACKET_BYTES": 50,
+  "DEF":
+  [
+    {
+      "CBMC_PROOF_ASSUMPTION_HOLDS_Packet_bytes": [
+        "CBMC_PROOF_ASSUMPTION_HOLDS=1",
+        "ipconfigETHERNET_MINIMUM_PACKET_BYTES={MINIMUM_PACKET_BYTES}"
+      ]
+    },
+    {
+      "CBMC_PROOF_ASSUMPTION_HOLDS_no_packet_bytes": ["CBMC_PROOF_ASSUMPTION_HOLDS=1"]
+    },
+    {
+      "CBMC_PROOF_ASSUMPTION_DOES_NOT_HOLD": ["CBMC_PROOF_ASSUMPTION_HOLDS=0"]
+    }
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_FreeRTOS_OutputARPRequest/OutputARPRequest_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_FreeRTOS_OutputARPRequest/OutputARPRequest_harness.c
new file mode 100644
index 000000000..472f6b1e1
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_FreeRTOS_OutputARPRequest/OutputARPRequest_harness.c
@@ -0,0 +1,76 @@
+/*
+ * FreeRTOS memory safety proofs with CBMC.
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "queue.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOS_ARP.h"
+
+
+ARPPacket_t xARPPacket;
+NetworkBufferDescriptor_t xNetworkBuffer;
+
+/* STUB!
+ * We assume that the pxGetNetworkBufferWithDescriptor function is
+ * implemented correctly and returns a valid data structure.
+ * This is the mock to mimic the expected behavior.
+ * If this allocation fails, this might invalidate the proof.
+ * FreeRTOS_OutputARPRequest calls pxGetNetworkBufferWithDescriptor
+ * to get a NetworkBufferDescriptor. Then it calls vARPGenerateRequestPacket
+ * passing this buffer along in the function call. vARPGenerateRequestPacket
+ * casts the pointer xNetworkBuffer.pucEthernetBuffer into an ARPPacket_t pointer
+ * and writes a complete ARPPacket to it. Therefore the buffer has to be at least of the size
+ * of an ARPPacket to gurantee memory safety.
+ */
+NetworkBufferDescriptor_t *pxGetNetworkBufferWithDescriptor( size_t xRequestedSizeBytes, TickType_t xBlockTimeTicks ){
+	#ifdef CBMC_PROOF_ASSUMPTION_HOLDS
+		#ifdef ipconfigETHERNET_MINIMUM_PACKET_BYTES
+			xNetworkBuffer.pucEthernetBuffer = malloc(ipconfigETHERNET_MINIMUM_PACKET_BYTES);
+		#else
+			xNetworkBuffer.pucEthernetBuffer = malloc(xRequestedSizeBytes);
+		#endif
+	#else
+		uint32_t malloc_size;
+		__CPROVER_assert(!__CPROVER_overflow_mult(2, xRequestedSizeBytes));
+		__CPROVER_assume(malloc_size > 0 && malloc_size < 2 * xRequestedSizeBytes);
+		xNetworkBuffer.pucEthernetBuffer = malloc(malloc_size);
+	#endif
+	xNetworkBuffer.xDataLength = xRequestedSizeBytes;
+	return &xNetworkBuffer;
+}
+
+
+void harness()
+{
+	uint32_t ulIPAddress;
+	FreeRTOS_OutputARPRequest( ulIPAddress );
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_FreeRTOS_OutputARPRequest/README.md b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_FreeRTOS_OutputARPRequest/README.md
new file mode 100644
index 000000000..8a868dda1
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_FreeRTOS_OutputARPRequest/README.md
@@ -0,0 +1,29 @@
+This is the memory safety proof for FreeRTOS_OutputARPRequest.
+
+This proof is a work-in-progress.  Proof assumptions are described in
+the harness.  The proof also assumes the following functions are
+memory safe and have no side effects relevant to the memory safety of
+this function:
+
+* xNetworkInterfaceOutput
+
+This proof checks FreeRTOS_OutputARPRequest in multiple configuration:
+
+* The config_CBMC_PROOF_ASSUMPTION_HOLDS_no_packet_bytes proof
+  guarantees that for a buffer allocated to xDataLength,
+  the code executed by the FreeRTOS_OutputARPRequest function
+  call of FreeRTOS_ARP.c is memory safe.
+* If the ipconfigETHERNET_MINIMUM_PACKET_BYTES is set and the
+  buffer allocated by pxGetNetworkBufferWithDescriptor allocates
+  a buffer of at least ipconfigETHERNET_MINIMUM_PACKET_BYTES,
+  the config_CBMC_PROOF_ASSUMPTION_HOLDS_Packet_bytes proof
+  guarantees that the code executed by the
+  FreeRTOS_OutputARPRequest function call
+  of FreeRTOS_ARP.c is memory safe.
+* The third configuration in the subdirectory
+  config_CBMC_PROOF_ASSUMPTION_DOES_NOT_HOLD demonstrates
+  that the code is not memory safe, if the allocation
+  code violates our assumption.
+* All proofs mock the pxGetNetworkBufferWithDescriptor
+  function for modelling the assumptions about the
+  buffer management layer.
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_FreeRTOS_PrintARPCache/FreeRTOS_PrintARPCache_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_FreeRTOS_PrintARPCache/FreeRTOS_PrintARPCache_harness.c
new file mode 100644
index 000000000..4975d66ee
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_FreeRTOS_PrintARPCache/FreeRTOS_PrintARPCache_harness.c
@@ -0,0 +1,14 @@
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "queue.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOSIPConfig.h"
+#include "FreeRTOS_ARP.h"
+
+void harness()
+{
+	FreeRTOS_PrintARPCache();
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_FreeRTOS_PrintARPCache/Makefile.json b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_FreeRTOS_PrintARPCache/Makefile.json
new file mode 100644
index 000000000..6588b10d9
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_FreeRTOS_PrintARPCache/Makefile.json
@@ -0,0 +1,17 @@
+{
+  "ENTRY": "FreeRTOS_PrintARPCache",
+  "CBMCFLAGS":
+  [
+      "--unwind 7",
+      "--nondet-static"
+  ],
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_ARP.goto"
+  ],
+  "DEF":
+  [
+    "ipconfigARP_CACHE_ENTRIES=6"
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_FreeRTOS_PrintARPCache/README.md b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_FreeRTOS_PrintARPCache/README.md
new file mode 100644
index 000000000..2c44908cd
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_FreeRTOS_PrintARPCache/README.md
@@ -0,0 +1,4 @@
+FreeRTOS_PrintARPCache_harness.c is memory safe,
+assuming vLoggingPrintf is correct and memory safe.
+
+FreeRTOS_PrintARPCache does not use multiple configurations.
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_OutputARPRequest_buffer_alloc1/Configurations.json b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_OutputARPRequest_buffer_alloc1/Configurations.json
new file mode 100644
index 000000000..ed1a2aca8
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_OutputARPRequest_buffer_alloc1/Configurations.json
@@ -0,0 +1,47 @@
+{
+  "ENTRY": "OutputARPRequest",
+  "MINIMUM_PACKET_BYTES": 50,
+  "CBMCFLAGS":
+  [
+      "--unwind {MINIMUM_PACKET_BYTES}",
+      "--unwindset xNetworkBuffersInitialise.0:3,xNetworkBuffersInitialise.1:3,vListInsert.0:3,pxGetNetworkBufferWithDescriptor.0:3,pxGetNetworkBufferWithDescriptor.1:3,vNetworkInterfaceAllocateRAMToBuffers.0:3"
+  ],
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_ARP.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/portable/BufferManagement/BufferAllocation_1.goto",
+    "$(FREERTOS)/Source/list.goto",
+    "$(FREERTOS)/Source/queue.goto"
+  ],
+  "DEF":
+  [
+    {
+      "minimal_configuration":
+      [
+        "ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS=2",
+        "configUSE_TRACE_FACILITY=0",
+        "configGENERATE_RUN_TIME_STATS=0",
+        "ipconfigUSE_LINKED_RX_MESSAGES=0"
+      ]
+    },
+    {
+      "minimal_configuration_minimal_packet_size":
+      [
+      "ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS=2",
+      "configUSE_TRACE_FACILITY=0",
+      "configGENERATE_RUN_TIME_STATS=0",
+      "ipconfigETHERNET_MINIMUM_PACKET_BYTES={MINIMUM_PACKET_BYTES}"
+      ]
+    },
+    {
+      "minimal_configuration_linked_rx_messages":
+      [
+      "ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS=2",
+      "configUSE_TRACE_FACILITY=0",
+      "configGENERATE_RUN_TIME_STATS=0",
+      "ipconfigUSE_LINKED_RX_MESSAGES=1"
+      ]
+    }
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_OutputARPRequest_buffer_alloc1/OutputARPRequest_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_OutputARPRequest_buffer_alloc1/OutputARPRequest_harness.c
new file mode 100644
index 000000000..3dae34a34
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_OutputARPRequest_buffer_alloc1/OutputARPRequest_harness.c
@@ -0,0 +1,71 @@
+/* This harness is linked against
+ * libraries/freertos_plus/standard/freertos_plus_tcp/source/portable/BufferManagement/BufferAllocation_1.goto
+ */
+#include <stdint.h>
+#include <stdio.h>
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "queue.h"
+#include "semphr.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_Sockets.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOS_ARP.h"
+#include "FreeRTOS_UDP_IP.h"
+#include "FreeRTOS_DHCP.h"
+#if( ipconfigUSE_LLMNR == 1 )
+	#include "FreeRTOS_DNS.h"
+#endif /* ipconfigUSE_LLMNR */
+#include "NetworkInterface.h"
+#include "NetworkBufferManagement.h"
+
+void vNetworkInterfaceAllocateRAMToBuffers( NetworkBufferDescriptor_t pxNetworkBuffers[ ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS ] ){
+	for(int x = 0; x < ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS; x++){
+		NetworkBufferDescriptor_t *current = &pxNetworkBuffers[x];
+		#ifdef ipconfigETHERNET_MINIMUM_PACKET_BYTES
+			current->pucEthernetBuffer = malloc(sizeof(ARPPacket_t) + (ipconfigETHERNET_MINIMUM_PACKET_BYTES- sizeof(ARPPacket_t)));
+		#else
+			current->pucEthernetBuffer = malloc(sizeof(ARPPacket_t));
+		#endif
+		current->xDataLength = sizeof(ARPPacket_t);
+	}
+}
+
+/* The code expects that the Semaphore creation relying on pvPortMalloc
+   is successful. This is checked by an assert statement, that gets
+   triggered when the allocation fails. Nevertheless, the code is perfectly
+   guarded against a failing Semaphore allocation. To make the assert pass,
+   it is assumed for now, that pvPortMalloc doesn't fail. Using a model allowing
+   failures of the allocation might be possible
+   after removing the assert in l.105 of BufferAllocation_1.c, from a memory
+   safety point of view. */
+void *pvPortMalloc( size_t xWantedSize ){
+	return malloc(xWantedSize);
+}
+
+/*
+ * This function is implemented by a third party.
+ * After looking through a couple of samples in the demos folder, it seems
+ * like the only shared contract is that you want to add the if statement
+ * for releasing the buffer to the end. Apart from that, it is up to the vendor,
+ * how to write this code out to the network.
+ */
+BaseType_t xNetworkInterfaceOutput( NetworkBufferDescriptor_t * const pxDescriptor, BaseType_t bReleaseAfterSend ){
+	if( bReleaseAfterSend != pdFALSE )
+	{
+		vReleaseNetworkBufferAndDescriptor( pxDescriptor );
+	}
+}
+
+void harness()
+{
+	BaseType_t xRes = xNetworkBuffersInitialise();
+	if(xRes == pdPASS){
+		uint32_t ulIPAddress;
+		FreeRTOS_OutputARPRequest( ulIPAddress );
+	}
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_OutputARPRequest_buffer_alloc1/README.md b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_OutputARPRequest_buffer_alloc1/README.md
new file mode 100644
index 000000000..ea5eac78d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_OutputARPRequest_buffer_alloc1/README.md
@@ -0,0 +1,27 @@
+This is the memory safety proof for ```FreeRTOS_OutputARPRequest```
+method combined with the BufferAllocation_1.c allocation strategy.
+
+This proof is a work-in-progress.  Proof assumptions are described in
+the harness.  The proof also assumes the following functions are
+memory safe and have no side effects relevant to the memory safety of
+this function:
+
+* vPortEnterCritical
+* vPortExitCritical
+* vPortGenerateSimulatedInterrupt
+* vAssertCalled
+* xTaskGetSchedulerState
+* pvTaskIncrementMutexHeldCount
+* xTaskRemoveFromEventList
+* xTaskPriorityDisinherit
+
+This proof checks ```FreeRTOS_OutputARPRequest``` in multiple configurations.
+All assume the memory safety of vNetworkInterfaceAllocateRAMToBuffers.
+* The ```config_minimal_configuration``` proof sets
+  ```ipconfigUSE_LINKED_RX_MESSAGES=0```.
+* The ```config_minimal_configuration_linked_rx_messages``` proof sets
+  ```ipconfigUSE_LINKED_RX_MESSAGES=1```.
+* The ```minimal_configuration_minimal_packet_size``` proof sets
+  ```ipconfigETHERNET_MINIMUM_PACKET_BYTES``` to 50.
+
+All harnesses include the queue.c file, but test only for the happy path.
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_OutputARPRequest_buffer_alloc2/Configurations.json b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_OutputARPRequest_buffer_alloc2/Configurations.json
new file mode 100644
index 000000000..fb5dd4be2
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_OutputARPRequest_buffer_alloc2/Configurations.json
@@ -0,0 +1,48 @@
+{
+  "ENTRY": "OutputARPRequest",
+  "MINIMUM_PACKET_BYTES": 50,
+  "CBMCFLAGS":
+  [
+      "--unwind {MINIMUM_PACKET_BYTES}",
+      "--unwindset xNetworkBuffersInitialise.0:3,xNetworkBuffersInitialise.1:3,vListInsert.0:3,pxGetNetworkBufferWithDescriptor.0:3,pxGetNetworkBufferWithDescriptor.1:3,vNetworkInterfaceAllocateRAMToBuffers.0:3"
+  ],
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_ARP.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/portable/BufferManagement/BufferAllocation_2.goto",
+    "$(FREERTOS)/Source/list.goto",
+    "$(FREERTOS)/Source/queue.goto"
+  ],
+  "DEF":
+  [
+    {
+      "minimal_configuration":
+      [
+        "ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS=2",
+        "configUSE_TRACE_FACILITY=0",
+        "configGENERATE_RUN_TIME_STATS=0",
+        "ipconfigUSE_LINKED_RX_MESSAGES=0"
+      ]
+    },
+    {
+      "minimal_configuration_minimal_packet_size":
+      [
+      "ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS=2",
+      "configUSE_TRACE_FACILITY=0",
+      "configGENERATE_RUN_TIME_STATS=0",
+      "ipconfigETHERNET_MINIMUM_PACKET_BYTES={MINIMUM_PACKET_BYTES}",
+      "ipconfigUSE_TCP=1"
+      ]
+    },
+    {
+      "minimal_configuration_linked_rx_messages":
+      [
+      "ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS=2",
+      "configUSE_TRACE_FACILITY=0",
+      "configGENERATE_RUN_TIME_STATS=0",
+      "ipconfigUSE_LINKED_RX_MESSAGES=1"
+      ]
+    }
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_OutputARPRequest_buffer_alloc2/OutputARPRequest_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_OutputARPRequest_buffer_alloc2/OutputARPRequest_harness.c
new file mode 100644
index 000000000..c047a2760
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_OutputARPRequest_buffer_alloc2/OutputARPRequest_harness.c
@@ -0,0 +1,54 @@
+/* This harness is linked against
+ * libraries/freertos_plus/standard/freertos_plus_tcp/source/portable/BufferManagement/BufferAllocation_2.goto
+ */
+#include <stdint.h>
+#include <stdio.h>
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "queue.h"
+#include "semphr.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_Sockets.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOS_ARP.h"
+#include "FreeRTOS_UDP_IP.h"
+#include "FreeRTOS_DHCP.h"
+#if( ipconfigUSE_LLMNR == 1 )
+	#include "FreeRTOS_DNS.h"
+#endif /* ipconfigUSE_LLMNR */
+#include "NetworkInterface.h"
+#include "NetworkBufferManagement.h"
+
+void *pvPortMalloc( size_t xWantedSize ){
+	return malloc(xWantedSize);
+}
+
+
+void vPortFree( void *pv ){
+	free(pv);
+}
+
+/*
+ * This function function writes a buffer to the network.  We stub it
+ * out here, and assume it has no side effects relevant to memory safety.
+ */
+BaseType_t xNetworkInterfaceOutput( NetworkBufferDescriptor_t * const pxDescriptor, BaseType_t bReleaseAfterSend ){
+	if( bReleaseAfterSend != pdFALSE )
+	{
+		vReleaseNetworkBufferAndDescriptor( pxDescriptor );
+	}
+}
+
+void harness()
+{
+	BaseType_t xRes = xNetworkBuffersInitialise();
+	if(xRes == pdPASS){
+		uint32_t ulIPAddress;
+		FreeRTOS_OutputARPRequest( ulIPAddress );
+	}
+}
+
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_OutputARPRequest_buffer_alloc2/README.md b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_OutputARPRequest_buffer_alloc2/README.md
new file mode 100644
index 000000000..5d509a7e8
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ARP/ARP_OutputARPRequest_buffer_alloc2/README.md
@@ -0,0 +1,49 @@
+This is the memory safety proof for FreeRTOS_OutputARPRequest
+method combined with the BufferAllocation_2.c allocation strategy.
+
+This proof is a work-in-progress.  Proof assumptions are described in
+the harness.  The proof also assumes the following functions are
+memory safe and have no side effects relevant to the memory safety of
+this function:
+
+* vPortEnterCritical
+* vPortExitCritical
+* vPortGenerateSimulatedInterrupt
+* vAssertCalled
+* xTaskGetSchedulerState
+* pvTaskIncrementMutexHeldCount
+* xTaskRemoveFromEventList
+* xTaskPriorityDisinherit
+
+* pvPortMalloc
+* pvPortFree
+* xNetworkInterfaceOutput
+* vNetworkInterfaceAllocateRAMToBuffers
+
+This proof disables the tracing library in the header.
+
+This proof checks FreeRTOS_OutputARPRequest in multiple configuration:
+
+* The proof in the directory config_minimal_configuration guarantees
+  that the implementation and interaction between
+  FreeRTOS_OutputARPRequest and
+  FreeRTOS-Plus-TCP/source/portable/BufferManagement/BufferAllocation_2.c
+  are memory save.  This proof depends entirely of the implementation
+  correctness of vNetworkInterfaceAllocateRAMToBuffers.
+* The proof in directory minimal_configuration_minimal_packet_size
+  guarantees that using
+  FreeRTOS-Plus-TCP/source/portable/BufferManagement/BufferAllocation_2.c
+  along with the ipconfigETHERNET_MINIMUM_PACKET_BYTES is memory save
+  as long as TCP is enabled ( ipconfigUSE_TCP 1 ) and
+  ipconfigETHERNET_MINIMUM_PACKET_BYTES < sizeof( TCPPacket_t ).
+* The directory minimal_configuration_minimal_packet_size_no_tcp
+  reminds that ipconfigETHERNET_MINIMUM_PACKET_BYTES must not be used
+  if TCP is disabled ( ipconfigUSE_TCP 1 ) along with the
+  FreeRTOS-Plus-TCP/source/portable/BufferManagement/BufferAllocation_2.c
+  allocator.
+* The proof in directory
+  config_minimal_configuration_linked_rx_messages guarantees that the
+  ipconfigUSE_LINKED_RX_MESSAGES define does not interfere with the
+  memory safety claim.
+
+All harnesses include the queue.c file, but test only for the happy path.
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/CBMCStubLibrary/tasksStubs.c b/FreeRTOS-Plus/Test/CBMC/proofs/CBMCStubLibrary/tasksStubs.c
new file mode 100644
index 000000000..3fe245f80
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/CBMCStubLibrary/tasksStubs.c
@@ -0,0 +1,47 @@
+#include "FreeRTOS.h"
+#include "task.h"
+#include "tasksStubs.h"
+
+#ifndef TASK_STUB_COUNTER
+	#define TASK_STUB_COUNTER 0;
+#endif
+
+/* 5 is a magic number, but we need some number here as a default value.
+   This value is used to bound any loop depending on xTaskCheckForTimeOut
+   as a loop bound. It should be overwritten in the Makefile.json adapting
+   to the performance requirements of the harness. */
+#ifndef TASK_STUB_COUNTER_LIMIT
+	#define TASK_STUB_COUNTER_LIMIT 5;
+#endif
+
+
+static BaseType_t xCounter = TASK_STUB_COUNTER;
+static BaseType_t xCounterLimit = TASK_STUB_COUNTER_LIMIT;
+
+BaseType_t xTaskGetSchedulerState( void )
+{
+	return xState;
+}
+
+/* This function is another method apart from overwritting the defines to init the max
+   loop bound. */
+void vInitTaskCheckForTimeOut(BaseType_t maxCounter, BaseType_t maxCounter_limit)
+{
+	xCounter = maxCounter;
+	xCounterLimit = maxCounter_limit;
+}
+
+/* This is mostly called in a loop. For CBMC, we have to bound the loop
+   to a max limits of calls. Therefore this Stub models a nondet timeout in
+   max TASK_STUB_COUNTER_LIMIT iterations.*/
+BaseType_t xTaskCheckForTimeOut( TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait ) {
+	++xCounter;
+	if(xCounter == xCounterLimit)
+	{
+		return pdTRUE;
+	}
+	else
+	{
+		return nondet_basetype();
+	}
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/CMakeLists.txt b/FreeRTOS-Plus/Test/CBMC/proofs/CMakeLists.txt
new file mode 100644
index 000000000..aaa2e3c8a
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/CMakeLists.txt
@@ -0,0 +1,40 @@
+list(APPEND cbmc_compile_options
+    -m32
+)
+
+list(APPEND cbmc_compile_definitions
+    CBMC
+    WINVER=0x400
+    _CONSOLE
+    _CRT_SECURE_NO_WARNINGS
+    _DEBUG
+    _WIN32_WINNT=0x0500
+    __PRETTY_FUNCTION__=__FUNCTION__
+    __free_rtos__
+)
+
+list(APPEND cbmc_compile_includes
+    ${CMAKE_SOURCE_DIR}/Source/include
+    ${CMAKE_SOURCE_DIR}/Source/portable/MSVC-MingW
+	${CMAKE_SOURCE_DIR}/Source/../../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/portable/BufferManagement
+	${CMAKE_SOURCE_DIR}/Source/../../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/include    
+    ${CMAKE_SOURCE_DIR}/Source/../../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/portable/Compiler/MSVC
+    ${cbmc_dir}/include
+    ${cbmc_dir}/windows
+)
+
+# Remove --flag for a specific proof with list(REMOVE_ITEM cbmc_flags --flag)
+list(APPEND cbmc_flags
+    --32
+    --bounds-check
+    --pointer-check
+    --div-by-zero-check
+    --float-overflow-check
+    --nan-check
+    --nondet-static
+    --pointer-overflow-check
+    --signed-overflow-check
+    --undefined-shift-check
+    --unsigned-overflow-check
+)
+
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/CheckOptions/CheckOptions_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/CheckOptions/CheckOptions_harness.c
new file mode 100644
index 000000000..fd0900c5e
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/CheckOptions/CheckOptions_harness.c
@@ -0,0 +1,100 @@
+/* Standard includes. */
+#include <stdint.h>
+#include <stdio.h>
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "queue.h"
+#include "semphr.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_Sockets.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOS_UDP_IP.h"
+#include "FreeRTOS_DHCP.h"
+#include "NetworkInterface.h"
+#include "NetworkBufferManagement.h"
+#include "FreeRTOS_ARP.h"
+
+#include "cbmc.h"
+
+/****************************************************************
+ * Signature of function under test
+ ****************************************************************/
+
+void prvCheckOptions( FreeRTOS_Socket_t * pxSocket,
+                      const NetworkBufferDescriptor_t * pxNetworkBuffer );
+
+/****************************************************************
+ * Declare the buffer size external to the harness so it can be
+ * accessed by the preconditions of prvSingleStepTCPHeaderOptions, and
+ * give the buffer size an unconstrained value in the harness itself.
+ ****************************************************************/
+size_t buffer_size;
+
+/****************************************************************
+ * Function contract proved correct by CheckOptionsOuter
+ ****************************************************************/
+
+size_t prvSingleStepTCPHeaderOptions( const uint8_t * const pucPtr,
+                                      size_t uxTotalLength,
+                                      FreeRTOS_Socket_t * const pxSocket,
+                                      BaseType_t xHasSYNFlag )
+{
+    /* CBMC model of pointers limits the size of the buffer */
+
+    /* Preconditions */
+    __CPROVER_assert( buffer_size < CBMC_MAX_OBJECT_SIZE,
+                      "prvSingleStepTCPHeaderOptions: buffer_size < CBMC_MAX_OBJECT_SIZE" );
+    __CPROVER_assert( 8 <= buffer_size,
+                      "prvSingleStepTCPHeaderOptions: 8 <= buffer_size" );
+    __CPROVER_assert( pucPtr != NULL,
+                      "prvSingleStepTCPHeaderOptions: pucPtr != NULL" );
+    __CPROVER_assert( uxTotalLength <= buffer_size,
+                      "prvSingleStepTCPHeaderOptions: uxTotalLength <= buffer_size" );
+    __CPROVER_assert( pxSocket != NULL,
+                      "prvSingleStepTCPHeaderOptions: pxSocket != NULL" );
+
+    /* Postconditions */
+    size_t index;
+    __CPROVER_assume( index == 1 || index <= uxTotalLength );
+
+    return index;
+}
+
+/****************************************************************
+ * Proof of CheckOptions
+ ****************************************************************/
+
+void harness()
+{
+    /* Give buffer_size an unconstrained value */
+    size_t buf_size;
+
+    buffer_size = buf_size;
+
+    /* pxSocket can be any socket */
+    FreeRTOS_Socket_t pxSocket;
+
+    /* pxNetworkBuffer can be any buffer descriptor with any buffer */
+    NetworkBufferDescriptor_t pxNetworkBuffer;
+    pxNetworkBuffer.pucEthernetBuffer = malloc( buffer_size );
+    pxNetworkBuffer.xDataLength = buffer_size;
+
+    /****************************************************************
+     * Specification and proof of CheckOptions
+     ****************************************************************/
+
+    /* CBMC model of pointers limits the size of the buffer */
+    __CPROVER_assume( buffer_size < CBMC_MAX_OBJECT_SIZE );
+
+    /* Bound required to bound iteration over the buffer */
+    __CPROVER_assume( buffer_size <= BUFFER_SIZE );
+
+    /* Buffer must be big enough to hold pxTCPPacket and pxTCPHeader */
+    __CPROVER_assume( buffer_size > 47 );
+
+    prvCheckOptions( &pxSocket, &pxNetworkBuffer );
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/CheckOptions/Makefile.json b/FreeRTOS-Plus/Test/CBMC/proofs/CheckOptions/Makefile.json
new file mode 100644
index 000000000..b6f82621a
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/CheckOptions/Makefile.json
@@ -0,0 +1,18 @@
+{
+  "ENTRY": "CheckOptions",
+  "CBMCFLAGS": "--unwind 1 --unwindset prvCheckOptions.0:41",
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_TCP_WIN.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_TCP_IP.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_Stream_Buffer.goto",
+    "$(FREERTOS)/Source/tasks.goto",
+    "$(FREERTOS)/Source/list.goto"
+  ],
+  "BUFFER_SIZE": 100,
+  "DEF":
+  [
+    "BUFFER_SIZE={BUFFER_SIZE}"
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/CheckOptionsInner/CheckOptionsInner_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/CheckOptionsInner/CheckOptionsInner_harness.c
new file mode 100644
index 000000000..bca2b1792
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/CheckOptionsInner/CheckOptionsInner_harness.c
@@ -0,0 +1,94 @@
+/* Standard includes. */
+#include <stdint.h>
+#include <stdio.h>
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "queue.h"
+#include "semphr.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_Sockets.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOS_UDP_IP.h"
+#include "FreeRTOS_DHCP.h"
+#include "NetworkInterface.h"
+#include "NetworkBufferManagement.h"
+#include "FreeRTOS_ARP.h"
+
+#include "cbmc.h"
+
+/****************************************************************
+ * Signature of function under test
+ ****************************************************************/
+
+void prvReadSackOption( const uint8_t * const pucPtr,
+                        size_t uxIndex,
+                        FreeRTOS_Socket_t * const pxSocket );
+
+/****************************************************************
+ * Proof of prvReadSackOption function contract
+ ****************************************************************/
+
+void harness()
+{
+    /* pucPtr points into a buffer */
+    size_t buffer_size;
+    uint8_t * pucPtr = malloc( buffer_size );
+
+    /* uxIndex in an index into the buffer */
+    size_t uxIndex;
+
+    /* pxSocket can be any socket with some initialized values */
+    FreeRTOS_Socket_t * pxSocket = malloc( sizeof( FreeRTOS_Socket_t ) );
+
+    pxSocket->u.xTCP.txStream = malloc( sizeof( StreamBuffer_t ) );
+
+    vListInitialise( &pxSocket->u.xTCP.xTCPWindow.xWaitQueue );
+
+    if( nondet_bool() )
+    {
+        TCPSegment_t * segment = malloc( sizeof( TCPSegment_t ) );
+        listSET_LIST_ITEM_OWNER( &segment->xQueueItem, ( void * ) segment );
+        vListInsertEnd( &pxSocket->u.xTCP.xTCPWindow.xWaitQueue, &segment->xQueueItem );
+    }
+
+    vListInitialise( &pxSocket->u.xTCP.xTCPWindow.xTxSegments );
+
+    if( nondet_bool() )
+    {
+        TCPSegment_t * segment = malloc( sizeof( TCPSegment_t ) );
+        vListInitialiseItem( &segment->xSegmentItem );
+        listSET_LIST_ITEM_OWNER( &segment->xQueueItem, ( void * ) segment );
+        vListInsertEnd( &pxSocket->u.xTCP.xTCPWindow.xTxSegments, &segment->xQueueItem );
+    }
+
+    vListInitialise( &pxSocket->u.xTCP.xTCPWindow.xPriorityQueue );
+
+    extern List_t xSegmentList;
+    vListInitialise( &xSegmentList );
+
+    /****************************************************************
+     * Specification and proof of CheckOptions inner loop
+     ****************************************************************/
+
+    /* Preconditions */
+
+    /* CBMC model of pointers limits the size of the buffer */
+    __CPROVER_assume( buffer_size < CBMC_MAX_OBJECT_SIZE );
+
+    /* Both preconditions are required to avoid integer overflow in the */
+    /* pointer offset of the pointer pucPtr + uxIndex + 8 */
+    __CPROVER_assume( uxIndex <= buffer_size );
+    __CPROVER_assume( uxIndex + 8 <= buffer_size );
+
+    /* Assuming quite a bit more about the initialization of pxSocket */
+    __CPROVER_assume( pucPtr != NULL );
+    __CPROVER_assume( pxSocket != NULL );
+
+    prvReadSackOption( pucPtr, uxIndex, pxSocket );
+
+    /* No postconditions required */
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/CheckOptionsInner/Makefile.json b/FreeRTOS-Plus/Test/CBMC/proofs/CheckOptionsInner/Makefile.json
new file mode 100644
index 000000000..8730e4f99
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/CheckOptionsInner/Makefile.json
@@ -0,0 +1,19 @@
+{
+  "ENTRY": "CheckOptionsInner",
+  "CBMCFLAGS": [
+      "--unwind 1",
+      "--unwindset prvTCPWindowTxCheckAck.1:2,prvTCPWindowFastRetransmit.2:2"
+  ],
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_TCP_IP.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_TCP_WIN.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_Stream_Buffer.goto",
+    "$(FREERTOS)/Source/tasks.goto",
+    "$(FREERTOS)/Source/list.goto"
+  ],
+  "DEF":
+  [
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/CheckOptionsOuter/CheckOptionsOuter_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/CheckOptionsOuter/CheckOptionsOuter_harness.c
new file mode 100644
index 000000000..b8833fc79
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/CheckOptionsOuter/CheckOptionsOuter_harness.c
@@ -0,0 +1,100 @@
+/* Standard includes. */
+#include <stdint.h>
+#include <stdio.h>
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "queue.h"
+#include "semphr.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_Sockets.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOS_UDP_IP.h"
+#include "FreeRTOS_DHCP.h"
+#include "NetworkInterface.h"
+#include "NetworkBufferManagement.h"
+#include "FreeRTOS_ARP.h"
+
+#include "cbmc.h"
+
+/****************************************************************
+ * Signature of the function under test
+ ****************************************************************/
+
+size_t prvSingleStepTCPHeaderOptions( const uint8_t * const pucPtr,
+                                      size_t uxTotalLength,
+                                      FreeRTOS_Socket_t * const pxSocket,
+                                      BaseType_t xHasSYNFlag );
+
+/****************************************************************
+ * Declare the buffer size external to the harness so it can be
+ * accessed by the preconditions of prvReadSackOption, and give the
+ * buffer size an unconstrained value in the harness itself.
+ ****************************************************************/
+
+size_t buffer_size;
+
+/****************************************************************
+ * Function contract proved correct by CheckOptionsInner
+ ****************************************************************/
+
+void prvReadSackOption( const uint8_t * const pucPtr,
+                        size_t uxIndex,
+                        FreeRTOS_Socket_t * const pxSocket )
+{
+    /* Preconditions */
+    __CPROVER_assert( buffer_size < CBMC_MAX_OBJECT_SIZE,
+                      "prvReadSackOption: buffer_size < CBMC_MAX_OBJECT_SIZE" );
+    __CPROVER_assert( uxIndex <= buffer_size,
+                      "prvReadSackOption: uxIndex <= buffer_size" );
+    __CPROVER_assert( uxIndex + 8 <= buffer_size,
+                      "prvReadSackOption: uxIndex + 8 <= buffer_size" );
+    __CPROVER_assert( pucPtr != NULL,
+                      "prvReadSackOption: pucPtr != NULL" );
+    __CPROVER_assert( pxSocket != NULL,
+                      "prvReadSackOption: pxSocket != NULL" );
+
+    /* No postconditions required */
+}
+
+/****************************************************************
+ * Proof of prvSingleStepTCPHeaderOptions function contract
+ ****************************************************************/
+
+void harness()
+{
+    /* Give buffer_size an unconstrained value */
+    size_t buf_size;
+
+    buffer_size = buf_size;
+
+    uint8_t * pucPtr = malloc( buffer_size );
+    size_t uxTotalLength;
+    FreeRTOS_Socket_t * pxSocket = malloc( sizeof( FreeRTOS_Socket_t ) );
+    BaseType_t xHasSYNFlag;
+
+    /****************************************************************
+     * Specification and proof of CheckOptions outer loop
+     ****************************************************************/
+
+    /* CBMC model of pointers limits the size of the buffer */
+    __CPROVER_assume( buffer_size < CBMC_MAX_OBJECT_SIZE );
+
+    /* Preconditions */
+    __CPROVER_assume( 8 <= buffer_size ); /* ulFirst and ulLast */
+    __CPROVER_assume( pucPtr != NULL );
+    __CPROVER_assume( uxTotalLength <= buffer_size );
+    __CPROVER_assume( pxSocket != NULL );
+
+    size_t index = prvSingleStepTCPHeaderOptions( pucPtr,
+                                                  uxTotalLength,
+                                                  pxSocket,
+                                                  xHasSYNFlag );
+
+    /* Postconditions */
+    __CPROVER_assert( index == 1 || index <= uxTotalLength,
+                      "prvSingleStepTCPHeaderOptions: index <= uxTotalLength" );
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/CheckOptionsOuter/Makefile.json b/FreeRTOS-Plus/Test/CBMC/proofs/CheckOptionsOuter/Makefile.json
new file mode 100644
index 000000000..dfecf7886
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/CheckOptionsOuter/Makefile.json
@@ -0,0 +1,20 @@
+{
+  "ENTRY": "CheckOptionsOuter",
+  "CBMCFLAGS":
+  [
+      "--unwind 1",
+      "--unwindset prvSingleStepTCPHeaderOptions.2:32"
+  ],
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_TCP_IP.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_TCP_WIN.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_Stream_Buffer.goto",
+    "$(FREERTOS)/Source/tasks.goto",
+    "$(FREERTOS)/Source/list.goto"
+  ],
+  "DEF":
+  [
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/DHCP/DHCPProcess/DHCPProcess_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/DHCP/DHCPProcess/DHCPProcess_harness.c
new file mode 100644
index 000000000..bbed7b243
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/DHCP/DHCPProcess/DHCPProcess_harness.c
@@ -0,0 +1,102 @@
+/*
+  * FreeRTOS memory safety proofs with CBMC.
+  * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+  *
+  * Permission is hereby granted, free of charge, to any person
+  * obtaining a copy of this software and associated documentation
+  * files (the "Software"), to deal in the Software without
+  * restriction, including without limitation the rights to use, copy,
+  * modify, merge, publish, distribute, sublicense, and/or sell copies
+  * of the Software, and to permit persons to whom the Software is
+  * furnished to do so, subject to the following conditions:
+  *
+  * The above copyright notice and this permission notice shall be
+  * included in all copies or substantial portions of the Software.
+  *
+  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+  * SOFTWARE.
+  *
+  * http://aws.amazon.com/freertos
+  * http://www.FreeRTOS.org
+  */
+
+/* Standard includes. */
+#include <stdint.h>
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "semphr.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_Sockets.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOS_UDP_IP.h"
+#include "FreeRTOS_DHCP.h"
+#include "FreeRTOS_ARP.h"
+
+/* Static members defined in FreeRTOS_DHCP.c */
+extern DHCPData_t xDHCPData;
+extern Socket_t xDHCPSocket;
+void prvCreateDHCPSocket();
+
+/* Static member defined in freertos_api.c */
+#ifdef CBMC_GETNETWORKBUFFER_FAILURE_BOUND
+    extern uint32_t GetNetworkBuffer_failure_count;
+#endif
+
+/****************************************************************
+ * The signature of the function under test.
+ ****************************************************************/
+
+void vDHCPProcess( BaseType_t xReset );
+
+/****************************************************************
+ * Abstract prvProcessDHCPReplies proved memory safe in ProcessDHCPReplies.
+ ****************************************************************/
+
+BaseType_t prvProcessDHCPReplies( BaseType_t xExpectedMessageType )
+{
+    return nondet_BaseType();
+}
+
+/****************************************************************
+ * The proof of vDHCPProcess
+ ****************************************************************/
+
+void harness()
+{
+    BaseType_t xReset;
+
+    /****************************************************************
+     * Initialize the counter used to bound the number of times
+     * GetNetworkBufferWithDescriptor can fail.
+     ****************************************************************/
+
+    #ifdef CBMC_GETNETWORKBUFFER_FAILURE_BOUND
+        GetNetworkBuffer_failure_count = 0;
+    #endif
+
+    /****************************************************************
+     * Assume a valid socket in most states of the DHCP state machine.
+     *
+     * The socket is created in the eWaitingSendFirstDiscover state.
+     * xReset==True resets the state to eWaitingSendFirstDiscover.
+     ****************************************************************/
+
+    if( !( ( xDHCPData.eDHCPState == eWaitingSendFirstDiscover ) ||
+           ( xReset != pdFALSE ) ) )
+    {
+        prvCreateDHCPSocket();
+        __CPROVER_assume( xDHCPSocket != NULL );
+    }
+
+    vDHCPProcess( xReset );
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/DHCP/DHCPProcess/Makefile.json b/FreeRTOS-Plus/Test/CBMC/proofs/DHCP/DHCPProcess/Makefile.json
new file mode 100644
index 000000000..d96988754
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/DHCP/DHCPProcess/Makefile.json
@@ -0,0 +1,56 @@
+#
+# FreeRTOS memory safety proofs with CBMC.
+# Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+#
+# Permission is hereby granted, free of charge, to any person
+# obtaining a copy of this software and associated documentation
+# files (the "Software"), to deal in the Software without
+# restriction, including without limitation the rights to use, copy,
+# modify, merge, publish, distribute, sublicense, and/or sell copies
+# of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be
+# included in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+# BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+# ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+#
+# http://aws.amazon.com/freertos
+# http://www.FreeRTOS.org
+#
+
+{
+  "ENTRY": "DHCPProcess",
+
+  # Minimal buffer size for maximum coverage, see harness for details.
+  "BUFFER_SIZE": 299,
+
+  # The number of times GetNetworkBufferWithDescriptor can be allowed to fail
+  # (plus 1).
+  "FAILURE_BOUND": 2,
+
+  "CBMCFLAGS": "--unwind 4 --unwindset strlen.0:11,memcmp.0:7,prvProcessDHCPReplies.0:8,prvCreatePartDHCPMessage.0:{FAILURE_BOUND} --nondet-static --flush",
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Test/CBMC/stubs/cbmc.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Test/CBMC/stubs/freertos_api.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_DHCP.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_IP.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_ARP.goto"
+  ],
+
+  "DEF":
+  [
+    "BUFFER_SIZE={BUFFER_SIZE}",
+    "CBMC_REQUIRE_NETWORKBUFFER_ETHERNETBUFFER_NONNULL=1",
+    "CBMC_GETNETWORKBUFFER_FAILURE_BOUND={FAILURE_BOUND}"
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/DHCP/DHCPProcess/README.md b/FreeRTOS-Plus/Test/CBMC/proofs/DHCP/DHCPProcess/README.md
new file mode 100644
index 000000000..0de21e6b1
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/DHCP/DHCPProcess/README.md
@@ -0,0 +1,28 @@
+This is the memory safety proof for DHCPProcess function, which is the
+function that triggers the DHCP protocol.
+
+The main stubs in this proof deal with buffer management, which assume
+that the buffer is large enough to accomodate a DHCP message plus a
+few additional bytes for options (which is the last, variable-sized
+field in a DHCP message). We have abstracted away sockets, concurrency
+and third-party code. For more details, please check the comments on
+the harness file.
+
+This proof is a work-in-progress.  Proof assumptions are described in
+the harness.  The proof also assumes the following functions are
+memory safe and have no side effects relevant to the memory safety of
+this function:
+
+* FreeRTOS_sendto
+* FreeRTOS_setsockopt
+* FreeRTOS_socket
+* ulRand
+* vARPSendGratuitous
+* vApplicationIPNetworkEventHook
+* vLoggingPrintf
+* vPortEnterCritical
+* vPortExitCritical
+* vReleaseNetworkBufferAndDescriptor
+* vSocketBind
+* vSocketClose
+
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/DHCP/DHCPProcess/cbmc-viewer.json b/FreeRTOS-Plus/Test/CBMC/proofs/DHCP/DHCPProcess/cbmc-viewer.json
new file mode 100644
index 000000000..1bc333788
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/DHCP/DHCPProcess/cbmc-viewer.json
@@ -0,0 +1,16 @@
+{ "expected-missing-functions":
+  [
+    "vPortEnterCritical",
+    "vPortExitCritical",
+    "vSocketBind",
+    "vSocketClose",
+    "vTaskSetTimeOutState",
+    "xTaskGetTickCount",
+    "xTaskGetCurrentTaskHandle",
+    "xQueueGenericSend",
+    "xApplicationGetRandomNumber",
+    "vLoggingPrintf"
+  ],
+  "proof-name": "DHCPProcess",
+  "proof-root": "tools/cbmc/proofs"
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/DHCP/IsDHCPSocket/IsDHCPSocket_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/DHCP/IsDHCPSocket/IsDHCPSocket_harness.c
new file mode 100644
index 000000000..cbde3397b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/DHCP/IsDHCPSocket/IsDHCPSocket_harness.c
@@ -0,0 +1,49 @@
+/*
+ * FreeRTOS memory safety proofs with CBMC.
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+#include <stdint.h>
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOS_DHCP.h"
+
+/*
+ * The harness test proceeds to call IsDHCPSocket with an unconstrained value
+ */
+void harness()
+{
+  Socket_t xSocket;
+  BaseType_t xResult;
+
+  xResult = xIsDHCPSocket( xSocket );
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/DHCP/IsDHCPSocket/Makefile.json b/FreeRTOS-Plus/Test/CBMC/proofs/DHCP/IsDHCPSocket/Makefile.json
new file mode 100644
index 000000000..eac18fd55
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/DHCP/IsDHCPSocket/Makefile.json
@@ -0,0 +1,40 @@
+#
+# FreeRTOS memory safety proofs with CBMC.
+# Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+#
+# Permission is hereby granted, free of charge, to any person
+# obtaining a copy of this software and associated documentation
+# files (the "Software"), to deal in the Software without
+# restriction, including without limitation the rights to use, copy,
+# modify, merge, publish, distribute, sublicense, and/or sell copies
+# of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be
+# included in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+# BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+# ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+#
+# http://aws.amazon.com/freertos
+# http://www.FreeRTOS.org
+#
+
+{
+  "ENTRY": "IsDHCPSocket",
+  "CBMCFLAGS":
+  [
+      "--unwind 1"
+  ],
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_DHCP.goto"
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/DHCP/IsDHCPSocket/README.md b/FreeRTOS-Plus/Test/CBMC/proofs/DHCP/IsDHCPSocket/README.md
new file mode 100644
index 000000000..ec2cc5e21
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/DHCP/IsDHCPSocket/README.md
@@ -0,0 +1 @@
+This is the memory safety proof for IsDCHPSocket.
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSHandlePacket/DNShandlePacket_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSHandlePacket/DNShandlePacket_harness.c
new file mode 100644
index 000000000..10a81ece8
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSHandlePacket/DNShandlePacket_harness.c
@@ -0,0 +1,31 @@
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "queue.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_DNS.h"
+#include "FreeRTOS_IP_Private.h"
+
+/* Function prvParseDNSReply is proven to be correct separately.
+The proof can be found here: https://github.com/aws/amazon-freertos/tree/master/tools/cbmc/proofs/ParseDNSReply */
+uint32_t prvParseDNSReply( uint8_t *pucUDPPayloadBuffer,
+			   size_t xBufferLength,
+			   BaseType_t xExpected ) {}
+
+struct xDNSMessage {
+	uint16_t usIdentifier;
+	uint16_t usFlags;
+	uint16_t usQuestions;
+	uint16_t usAnswers;
+	uint16_t usAuthorityRRs;
+	uint16_t usAdditionalRRs;
+};
+
+typedef struct xDNSMessage DNSMessage_t;
+
+void harness() {
+	NetworkBufferDescriptor_t xNetworkBuffer;
+	xNetworkBuffer.pucEthernetBuffer = malloc(sizeof(UDPPacket_t)+sizeof(DNSMessage_t));
+	ulDNSHandlePacket(&xNetworkBuffer);
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSHandlePacket/Makefile.json b/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSHandlePacket/Makefile.json
new file mode 100644
index 000000000..6b2530527
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSHandlePacket/Makefile.json
@@ -0,0 +1,12 @@
+{
+  "ENTRY": "DNShandlePacket",
+  "CBMCFLAGS": "--unwind 1",
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_DNS.goto"
+  ],
+  "DEF":
+  [
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSclear/DNSclear_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSclear/DNSclear_harness.c
new file mode 100644
index 000000000..0aa26dcb6
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSclear/DNSclear_harness.c
@@ -0,0 +1,16 @@
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "queue.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_DNS.h"
+#include "FreeRTOS_IP_Private.h"
+
+
+void harness() {
+	if( ipconfigUSE_DNS_CACHE != 0 ) {
+		FreeRTOS_dnsclear();
+	}	
+	
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSclear/Makefile.json b/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSclear/Makefile.json
new file mode 100644
index 000000000..22f54b074
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSclear/Makefile.json
@@ -0,0 +1,20 @@
+{
+  "ENTRY": "DNSclear",
+  ################################################################
+  # This configuration flag uses DNS cache
+  "USE_CACHE":1,
+  "CBMCFLAGS": 
+  [
+  	"--unwind 1",
+	"--nondet-static"
+  ],
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_DNS.goto"
+  ],
+  "DEF":
+  [
+    "ipconfigUSE_DNS_CACHE={USE_CACHE}"
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSgetHostByName/DNSgetHostByName_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSgetHostByName/DNSgetHostByName_harness.c
new file mode 100644
index 000000000..d831b5709
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSgetHostByName/DNSgetHostByName_harness.c
@@ -0,0 +1,94 @@
+/* Standard includes. */
+#include <stdint.h>
+#include <stdio.h>
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "semphr.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_Sockets.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOS_UDP_IP.h"
+#include "FreeRTOS_DNS.h"
+#include "FreeRTOS_DHCP.h"
+#include "NetworkBufferManagement.h"
+#include "NetworkInterface.h"
+
+#include "cbmc.h"
+
+/****************************************************************
+ * We abstract:
+ *
+ *   All kernel task scheduling functions since we are doing
+ *   sequential verification and the sequential verification of these
+ *   sequential primitives is done elsewhere.
+ *
+ *   Many methods in the FreeRTOS TCP API in stubs/freertos_api.c
+ *
+ *   prvParseDNSReply proved memory safe elsewhere
+ *
+ *   prvCreateDNSMessage
+ *
+ * This proof assumes the length of pcHostName is bounded by
+ * MAX_HOSTNAME_LEN.  We have to bound this length because we have to
+ * bound the iterations of strcmp.
+ ****************************************************************/
+
+/****************************************************************
+ * Abstract prvParseDNSReply proved memory save in ParseDNSReply.
+ *
+ * We stub out his function to fill the payload buffer with
+ * unconstrained data and return an unconstrained size.
+ *
+ * The function under test uses only the return value of this
+ * function.
+ ****************************************************************/
+
+uint32_t prvParseDNSReply( uint8_t * pucUDPPayloadBuffer,
+                           size_t xBufferLength,
+                           BaseType_t xExpected )
+{
+    uint32_t size;
+
+    __CPROVER_havoc_object( pucUDPPayloadBuffer );
+    return size;
+}
+
+
+/****************************************************************
+ * Abstract prvCreateDNSMessage
+ *
+ * This function writes a header, a hostname, and a constant amount of
+ * data into the payload buffer, and returns the amount of data
+ * written.  This abstraction just fills the entire buffer with
+ * unconstrained data and returns and unconstrained length.
+ ****************************************************************/
+
+size_t prvCreateDNSMessage( uint8_t * pucUDPPayloadBuffer,
+                            const char * pcHostName,
+                            TickType_t uxIdentifier )
+{
+    __CPROVER_havoc_object( pucUDPPayloadBuffer );
+    size_t size;
+    return size;
+}
+
+/****************************************************************
+ * The proof for FreeRTOS_gethostbyname.
+ ****************************************************************/
+
+void harness()
+{
+    size_t len;
+
+    __CPROVER_assume( len <= MAX_HOSTNAME_LEN );
+    char * pcHostName = safeMalloc( len );
+
+    __CPROVER_assume( len > 0 ); /* prvProcessDNSCache strcmp */
+    __CPROVER_assume( pcHostName != NULL );
+    pcHostName[ len - 1 ] = NULL;
+    FreeRTOS_gethostbyname( pcHostName );
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSgetHostByName/Makefile.json b/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSgetHostByName/Makefile.json
new file mode 100644
index 000000000..e0117e38e
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSgetHostByName/Makefile.json
@@ -0,0 +1,33 @@
+{
+  "ENTRY": "DNSgetHostByName",
+
+  ################################################################
+  # This configuration sets callback to 0.
+  # It also sets MAX_HOSTNAME_LEN to 10 to bound strcmp.
+  # According to the specification MAX_HOST_NAME is upto 255.
+
+  "callback": 0,
+  "MAX_HOSTNAME_LEN": 10,
+  "HOSTNAME_UNWIND": "__eval {MAX_HOSTNAME_LEN} + 1",
+
+  "CBMCFLAGS":
+  [
+    "--unwind 1",
+    "--unwindset prvProcessDNSCache.0:5,prvGetHostByName.0:{HOSTNAME_UNWIND},prvCreateDNSMessage.0:{HOSTNAME_UNWIND},prvCreateDNSMessage.1:{HOSTNAME_UNWIND},strlen.0:{HOSTNAME_UNWIND},__builtin___strcpy_chk.0:{HOSTNAME_UNWIND},strcmp.0:{HOSTNAME_UNWIND},strcpy.0:{HOSTNAME_UNWIND}",
+    "--nondet-static"
+  ],
+
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Test/CBMC/stubs/cbmc.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Test/CBMC/stubs/freertos_api.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_DNS.goto"
+  ],
+
+  "DEF":
+  [
+    "ipconfigDNS_USE_CALLBACKS={callback}",
+    "MAX_HOSTNAME_LEN={MAX_HOSTNAME_LEN}"
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSgetHostByName/cbmc-viewer.json b/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSgetHostByName/cbmc-viewer.json
new file mode 100644
index 000000000..82e9e2b4e
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSgetHostByName/cbmc-viewer.json
@@ -0,0 +1,9 @@
+{ "expected-missing-functions":
+  [
+    "vLoggingPrintf",
+    "xApplicationGetRandomNumber",
+    "xTaskGetTickCount"
+  ],
+  "proof-name": "DNSgetHostByName",
+  "proof-root": "tools/cbmc/proofs"
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSgetHostByName_a/DNSgetHostByName_a_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSgetHostByName_a/DNSgetHostByName_a_harness.c
new file mode 100644
index 000000000..b6e30c8f3
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSgetHostByName_a/DNSgetHostByName_a_harness.c
@@ -0,0 +1,110 @@
+/* Standard includes. */
+#include <stdint.h>
+#include <stdio.h>
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "semphr.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_Sockets.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOS_UDP_IP.h"
+#include "FreeRTOS_DNS.h"
+#include "FreeRTOS_DHCP.h"
+#include "NetworkBufferManagement.h"
+#include "NetworkInterface.h"
+
+#include "cbmc.h"
+
+/****************************************************************
+ * We abstract:
+ *
+ *   All kernel task scheduling functions since we are doing
+ *   sequential verification and the sequential verification of these
+ *   sequential primitives is done elsewhere.
+ *
+ *   Many methods in the FreeRTOS TCP API in stubs/freertos_api.c
+ *
+ *   prvParseDNSReply proved memory safe elsewhere
+ *
+ *   prvCreateDNSMessage
+ *
+ * This proof assumes the length of pcHostName is bounded by
+ * MAX_HOSTNAME_LEN.  We have to bound this length because we have to
+ * bound the iterations of strcmp.
+ ****************************************************************/
+
+/****************************************************************
+ * Abstract prvParseDNSReply proved memory safe in ParseDNSReply.
+ *
+ * We stub out his function to fill the payload buffer with
+ * unconstrained data and return an unconstrained size.
+ *
+ * The function under test uses only the return value of this
+ * function.
+ ****************************************************************/
+
+uint32_t prvParseDNSReply( uint8_t * pucUDPPayloadBuffer,
+                           size_t xBufferLength,
+                           BaseType_t xExpected )
+{
+    __CPROVER_assert(pucUDPPayloadBuffer != NULL,
+		     "Precondition: pucUDPPayloadBuffer != NULL");
+
+    __CPROVER_havoc_object( pucUDPPayloadBuffer );
+    return nondet_uint32();
+}
+
+/****************************************************************
+ * Abstract prvCreateDNSMessage
+ *
+ * This function writes a header, a hostname, and a constant amount of
+ * data into the payload buffer, and returns the amount of data
+ * written.  This abstraction just fills the entire buffer with
+ * unconstrained data and returns and unconstrained length.
+ ****************************************************************/
+
+size_t prvCreateDNSMessage( uint8_t * pucUDPPayloadBuffer,
+                            const char * pcHostName,
+                            TickType_t uxIdentifier )
+{
+    __CPROVER_assert(pucUDPPayloadBuffer != NULL,
+		     "Precondition: pucUDPPayloadBuffer != NULL");
+    __CPROVER_assert(pcHostName != NULL,
+		     "Precondition: pcHostName != NULL");
+
+    __CPROVER_havoc_object( pucUDPPayloadBuffer );
+    return nondet_sizet();
+}
+
+/****************************************************************
+ * A stub for a function callback.
+ ****************************************************************/
+
+void func(const char * pcHostName, void * pvSearchID, uint32_t ulIPAddress)
+{
+}
+
+/****************************************************************
+ * The proof for FreeRTOS_gethostbyname_a.
+ ****************************************************************/
+
+void harness() {
+    size_t len;
+
+    __CPROVER_assume( len <= MAX_HOSTNAME_LEN );
+    char * pcHostName = safeMalloc( len );
+
+    __CPROVER_assume( len > 0 ); /* prvProcessDNSCache strcmp */
+    __CPROVER_assume( pcHostName != NULL );
+    pcHostName[ len - 1 ] = NULL;
+
+    FOnDNSEvent pCallback = func;
+    TickType_t xTimeout;
+    void *pvSearchID;
+
+    FreeRTOS_gethostbyname_a(pcHostName, pCallback, pvSearchID, xTimeout);
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSgetHostByName_a/Makefile.json b/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSgetHostByName_a/Makefile.json
new file mode 100644
index 000000000..5a3051004
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSgetHostByName_a/Makefile.json
@@ -0,0 +1,30 @@
+{
+  "ENTRY": "DNSgetHostByName_a",
+  ################################################################
+  # This configuration flag sets callback to 1. It also sets MAX_HOSTNAME_LEN to 10 and MAX_REQ_SIZE to 50 for performance issues.
+  # According to the specification MAX_HOST_NAME is upto 255.
+  "callback": 1,
+  "MAX_HOSTNAME_LEN": 10,
+  "HOSTNAME_UNWIND": "__eval {MAX_HOSTNAME_LEN} + 1",
+  "CBMCFLAGS":
+  [
+    "--unwind 1",
+    "--unwindset prvCreateDNSMessage.0:{HOSTNAME_UNWIND},prvCreateDNSMessage.1:{HOSTNAME_UNWIND},prvGetHostByName.0:{HOSTNAME_UNWIND},prvProcessDNSCache.0:5,strlen.0:{HOSTNAME_UNWIND},__builtin___strcpy_chk.0:{HOSTNAME_UNWIND},strcmp.0:{HOSTNAME_UNWIND},xTaskResumeAll.0:{HOSTNAME_UNWIND},xTaskResumeAll.1:{HOSTNAME_UNWIND},strcpy.0:{HOSTNAME_UNWIND}",
+    "--nondet-static"
+  ],
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Test/CBMC/stubs/cbmc.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Test/CBMC/stubs/freertos_api.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_DNS.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_IP.goto"
+  ],
+  "DEF":
+  [
+    "ipconfigDNS_USE_CALLBACKS={callback}",
+    "MAX_HOSTNAME_LEN={MAX_HOSTNAME_LEN}",
+    # This value is defined only when ipconfigUSE_DNS_CACHE==1
+    "ipconfigDNS_CACHE_NAME_LENGTH=254"
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSgetHostByName_a/cbmc-viewer.json b/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSgetHostByName_a/cbmc-viewer.json
new file mode 100644
index 000000000..a526bee36
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSgetHostByName_a/cbmc-viewer.json
@@ -0,0 +1,13 @@
+{ "expected-missing-functions":
+  [
+    "vLoggingPrintf",
+    "xApplicationGetRandomNumber",
+    "vListInsertEnd",
+    "vTaskSetTimeOutState",
+    "vTaskSuspendAll",
+    "xTaskGetTickCount",
+    "xTaskResumeAll"
+  ],
+  "proof-name": "DNSgetHostByName_a",
+  "proof-root": "tools/cbmc/proofs"
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSgetHostByName_cancel/DNSgetHostByName_cancel_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSgetHostByName_cancel/DNSgetHostByName_cancel_harness.c
new file mode 100644
index 000000000..1e5832b20
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSgetHostByName_cancel/DNSgetHostByName_cancel_harness.c
@@ -0,0 +1,49 @@
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "queue.h"
+#include "list.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_DNS.h"
+#include "FreeRTOS_IP_Private.h"
+
+
+/* This proof assumes the length of pcHostName is bounded by MAX_HOSTNAME_LEN. This also abstracts the concurrency. */ 
+
+void vDNSInitialise(void);
+
+void vDNSSetCallBack(const char *pcHostName, void *pvSearchID, FOnDNSEvent pCallbackFunction, TickType_t xTimeout, TickType_t xIdentifier);
+
+void *safeMalloc(size_t xWantedSize) { /* Returns a NULL pointer if the wanted size is 0. */
+	if(xWantedSize == 0) {
+		return NULL;
+	}
+	uint8_t byte;
+	return byte ? malloc(xWantedSize) : NULL;
+}
+
+/* Abstraction of xTaskCheckForTimeOut from task pool. This also abstracts the concurrency. */ 
+BaseType_t xTaskCheckForTimeOut(TimeOut_t * const pxTimeOut, TickType_t * const pxTicksToWait) { }
+
+/* Abstraction of xTaskResumeAll from task pool. This also abstracts the concurrency. */ 
+BaseType_t xTaskResumeAll(void) { }
+
+/* The function func mimics the callback function.*/ 
+void func(const char * pcHostName, void * pvSearchID, uint32_t ulIPAddress) {}
+
+void harness() {
+	vDNSInitialise(); /* We initialize the callbacklist in order to be able to check for functions that timed out. */ 
+	size_t pvSearchID;
+	FOnDNSEvent pCallback = func;
+	TickType_t xTimeout;
+	TickType_t xIdentifier;
+	size_t len;
+	__CPROVER_assume(len >= 0 && len <= MAX_HOSTNAME_LEN);
+	char *pcHostName = safeMalloc(len); 
+	if (len && pcHostName) {
+		pcHostName[len-1] = NULL;
+	}
+	vDNSSetCallBack( pcHostName, &pvSearchID, pCallback, xTimeout, xIdentifier); /* Add an item to be able to check the cancel function if the list is non-empty. */
+	FreeRTOS_gethostbyname_cancel(&pvSearchID);
+}
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSgetHostByName_cancel/Makefile.json b/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSgetHostByName_cancel/Makefile.json
new file mode 100644
index 000000000..02d95ab27
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSgetHostByName_cancel/Makefile.json
@@ -0,0 +1,29 @@
+{
+  "ENTRY": "DNSgetHostByName_cancel",
+  ################################################################
+	# This configuration flag sets callback to 1. It also sets MAX_HOSTNAME_LEN to 10 for performance issues.
+  # According to the specification MAX_HOST_NAME is upto 255.
+  "callback": 1,
+  "MAX_HOSTNAME_LEN": 10,
+  "HOSTNAME_UNWIND": "__eval {MAX_HOSTNAME_LEN} + 1",
+  "CBMCFLAGS":
+  [
+    "--unwind 1",
+    "--unwindset prvProcessDNSCache.0:5,strlen.0:{HOSTNAME_UNWIND},__builtin___strcpy_chk.0:{HOSTNAME_UNWIND},vDNSCheckCallBack.0:2,strcpy.0:{HOSTNAME_UNWIND}",
+    "--nondet-static"
+  ],
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_DNS.goto",
+    "$(FREERTOS)/Source/tasks.goto",
+    "$(FREERTOS)/Source/list.goto"
+  ],
+  "DEF":
+  [
+    "ipconfigDNS_USE_CALLBACKS={callback}",
+    "MAX_HOSTNAME_LEN={MAX_HOSTNAME_LEN}",
+    # This value is defined only when ipconfigUSE_DNS_CACHE==1
+    "ipconfigDNS_CACHE_NAME_LENGTH=254"
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSlookup/DNSlookup_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSlookup/DNSlookup_harness.c
new file mode 100644
index 000000000..5b725c4ca
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSlookup/DNSlookup_harness.c
@@ -0,0 +1,32 @@
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "queue.h"
+#include "list.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_DNS.h"
+#include "FreeRTOS_IP_Private.h"
+
+/* This assumes that the length of the hostname is bounded by MAX_HOSTNAME_LEN. */
+void *safeMalloc(size_t xWantedSize) {
+	if(xWantedSize == 0) {
+		return NULL;
+	}
+	uint8_t byte;
+	return byte ? malloc(xWantedSize) : NULL;
+}
+
+void harness() {
+	if(ipconfigUSE_DNS_CACHE != 0) {
+		size_t len;
+		__CPROVER_assume(len >= 0 && len <= MAX_HOSTNAME_LEN);
+		char *pcHostName = safeMalloc(len); /* malloc is replaced by safeMalloc */
+		if (len && pcHostName) {
+			pcHostName[len-1] = NULL;
+		}
+		if (pcHostName) { /* guarding against NULL pointer */
+			FreeRTOS_dnslookup(pcHostName);	
+		}
+	}	
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSlookup/Makefile.json b/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSlookup/Makefile.json
new file mode 100644
index 000000000..2187bb914
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/DNS/DNSlookup/Makefile.json
@@ -0,0 +1,26 @@
+{
+  "ENTRY": "DNSlookup",
+  ################################################################
+  # This configuration uses DNS cache and the MAX_HOSTNAME_LEN is set to 255 according to the specification
+  "MAX_HOSTNAME_LEN": 255,
+  "HOSTNAME_UNWIND": "__eval {MAX_HOSTNAME_LEN} + 1",
+  "USE_CACHE": 1,
+  "CBMCFLAGS":
+  [
+    "--unwind 1",
+    "--unwindset prvProcessDNSCache.0:5,strcmp.0:{HOSTNAME_UNWIND}",
+    "--nondet-static"
+  ],
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_DNS.goto",
+    "$(FREERTOS)/Source/tasks.goto"
+  ],
+  "DEF":
+  [
+    "ipconfigUSE_DNS_CACHE={USE_CACHE}",
+    "MAX_HOSTNAME_LEN={MAX_HOSTNAME_LEN}"
+  ],
+  "OPT" : "-m32"
+}
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/IP/SendEventToIPTask/Makefile.json b/FreeRTOS-Plus/Test/CBMC/proofs/IP/SendEventToIPTask/Makefile.json
new file mode 100644
index 000000000..083feb6e2
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/IP/SendEventToIPTask/Makefile.json
@@ -0,0 +1,41 @@
+#
+# FreeRTOS memory safety proofs with CBMC.
+# Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+#
+# Permission is hereby granted, free of charge, to any person
+# obtaining a copy of this software and associated documentation
+# files (the "Software"), to deal in the Software without
+# restriction, including without limitation the rights to use, copy,
+# modify, merge, publish, distribute, sublicense, and/or sell copies
+# of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be
+# included in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+# BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+# ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+#
+# http://aws.amazon.com/freertos
+# http://www.FreeRTOS.org
+#
+
+{
+  "ENTRY": "SendEventToIPTask",
+  "CBMCFLAGS": [
+  	"--unwind 1",
+  	"--nondet-static"
+  ],
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_IP.goto",
+    "$(FREERTOS)/Source/tasks.goto"
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/IP/SendEventToIPTask/README.md b/FreeRTOS-Plus/Test/CBMC/proofs/IP/SendEventToIPTask/README.md
new file mode 100644
index 000000000..4682310df
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/IP/SendEventToIPTask/README.md
@@ -0,0 +1,13 @@
+This is the memory safety proof for xSendEventToIPTask, a function used
+for sending different events to IP-Task.  We have abstracted away queues.
+
+This proof is a work-in-progress.  Proof assumptions are described in
+the harness.  The proof also assumes the following functions are
+memory safe and have no side effects relevant to the memory safety of
+this function:
+
+* uxQueueMessagesWaiting
+* xQueueGenericSend
+
+The coverage is imperfect (97%) because xSendEventToIPTask always
+calls xSendEventStructToIPTask with xTimeout==0.
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/IP/SendEventToIPTask/SendEventToIPTask_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/IP/SendEventToIPTask/SendEventToIPTask_harness.c
new file mode 100644
index 000000000..9bdcbf7af
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/IP/SendEventToIPTask/SendEventToIPTask_harness.c
@@ -0,0 +1,44 @@
+/*
+ * FreeRTOS memory safety proofs with CBMC.
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+#include <stdint.h>
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_IP_Private.h"
+
+// The harness test proceeds to call SendEventToIPTask with an unconstrained value
+void harness()
+{
+  eIPEvent_t eEvent;
+  xSendEventToIPTask( eEvent );
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/Makefile.template b/FreeRTOS-Plus/Test/CBMC/proofs/Makefile.template
new file mode 100644
index 000000000..a029394c2
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/Makefile.template
@@ -0,0 +1,160 @@
+default: report
+
+# ____________________________________________________________________
+# CBMC binaries
+#
+
+GOTO_CC = @GOTO_CC@
+GOTO_INSTRUMENT = goto-instrument
+GOTO_ANALYZER = goto-analyzer
+VIEWER = cbmc-viewer
+
+# ____________________________________________________________________
+# Variables
+#
+# Naming scheme:
+# ``````````````
+# FOO is the concatenation of the following:
+# FOO2: Set of command line
+# C_FOO: Value of $FOO common to all harnesses, set in this file
+# O_FOO: Value of $FOO specific to the OS we're running on, set in the
+#        makefile for the operating system
+# H_FOO: Value of $FOO specific to a particular harness, set in the
+#        makefile for that harness
+
+ENTRY = $(H_ENTRY)
+OBJS = $(H_OBJS)
+
+INC = \
+  $(INC2) \
+  $(C_INC) $(O_INC) $(H_INC) \
+  # empty
+
+CFLAGS = \
+  $(CFLAGS2) \
+  $(C_DEF) $(O_DEF) $(H_DEF) $(DEF) \
+  $(C_OPT) $(O_OPT) $(H_OPT) $(OPT) \
+  -m32 \
+  # empty
+
+CBMCFLAGS = \
+  $(CBMCFLAGS2) \
+  $(C_CBMCFLAGS) $(O_CBMCFLAGS) $(H_CBMCFLAGS) \
+  # empty
+
+INSTFLAGS = \
+  $(INSTFLAGS2) \
+  $(C_INSTFLAGS) $(O_INSTFLAGS) $(H_INSTFLAGS) \
+  # empty
+
+# ____________________________________________________________________
+# Rules
+#
+# Rules for building a:FR object files. These are not harness-specific,
+# and several harnesses might depend on a particular a:FR object, so
+# define them all once here.
+
+@RULE_GOTO@
+	$(GOTO_CC) @COMPILE_ONLY@ @RULE_OUTPUT@ $(INC) $(CFLAGS) @RULE_INPUT@
+
+# ____________________________________________________________________
+# Rules
+#
+# Rules for patching
+
+patch:
+	cd $(PROOFS)/../patches && ./patch.py
+
+unpatch:
+	cd $(PROOFS)/../patches && ./unpatch.py
+
+# ____________________________________________________________________
+# Rules
+#
+# Rules for building the CBMC harness
+
+queue_datastructure.h: $(H_OBJS_EXCEPT_HARNESS)
+	python3 @TYPE_HEADER_SCRIPT@ --binary $(FREERTOS)/Source/queue.goto --c-file $(FREERTOS)/Source/queue.c
+
+$(ENTRY)_harness.goto: $(ENTRY)_harness.c $(H_GENERATE_HEADER)
+	$(GOTO_CC) @COMPILE_ONLY@ @RULE_OUTPUT@ $(INC) $(CFLAGS) @RULE_INPUT@
+
+$(ENTRY)1.goto: $(OBJS)
+	$(GOTO_CC) @COMPILE_LINK@ @RULE_OUTPUT@ --function harness $(OBJS)
+
+$(ENTRY)2.goto: $(ENTRY)1.goto
+	 $(GOTO_INSTRUMENT) --add-library @RULE_INPUT@ @RULE_OUTPUT@ \
+		> $(ENTRY)2.txt 2>&1
+
+$(ENTRY)3.goto: $(ENTRY)2.goto
+	$(GOTO_INSTRUMENT) --drop-unused-functions @RULE_INPUT@ @RULE_OUTPUT@ \
+		> $(ENTRY)3.txt 2>&1
+
+$(ENTRY)4.goto: $(ENTRY)3.goto
+	$(GOTO_INSTRUMENT) $(INSTFLAGS) --slice-global-inits @RULE_INPUT@ @RULE_OUTPUT@ \
+		> $(ENTRY)4.txt 2>&1
+# ____________________________________________________________________
+# After running goto-instrument to remove function bodies the unused
+# functions need to be dropped again.
+
+$(ENTRY)5.goto: $(ENTRY)4.goto
+	$(GOTO_INSTRUMENT) --drop-unused-functions @RULE_INPUT@ @RULE_OUTPUT@ \
+		> $(ENTRY)5.txt 2>&1
+
+$(ENTRY).goto: $(ENTRY)5.goto
+	@CP@ @RULE_INPUT@ @RULE_OUTPUT@
+
+# ____________________________________________________________________
+# Rules
+#
+# Rules for running CBMC
+
+goto:
+	$(MAKE) patch
+	$(MAKE) $(ENTRY).goto
+
+cbmc.txt: $(ENTRY).goto
+	- cbmc $(CBMCFLAGS) --unwinding-assertions --trace @RULE_INPUT@ > $@ 2>&1
+
+property.xml: $(ENTRY).goto
+	cbmc $(CBMCFLAGS) --unwinding-assertions --show-properties --xml-ui @RULE_INPUT@ > $@ 2>&1
+
+coverage.xml: $(ENTRY).goto
+	cbmc $(CBMCFLAGS) --cover location --xml-ui @RULE_INPUT@ > $@ 2>&1
+
+cbmc: cbmc.txt
+
+property: property.xml
+
+coverage: coverage.xml
+
+report: cbmc.txt property.xml coverage.xml
+	$(VIEWER) \
+	--goto $(ENTRY).goto \
+	--srcdir $(FREERTOS) \
+	--blddir $(FREERTOS) \
+	--htmldir html \
+	--srcexclude "(.@FORWARD_SLASH@doc|.@FORWARD_SLASH@tests|.@FORWARD_SLASH@vendors)" \
+	--result cbmc.txt \
+	--property property.xml \
+	--block coverage.xml
+
+# ____________________________________________________________________
+# Rules
+#
+# Rules for cleaning up
+
+clean:
+	@RM@ $(OBJS) $(ENTRY).goto
+	@RM@ $(ENTRY)[0-9].goto $(ENTRY)[0-9].txt
+	@RM@ cbmc.txt property.xml coverage.xml TAGS TAGS-*
+	@RM@ *~ \#*
+	@RM@ queue_datastructure.h
+
+
+veryclean: clean
+	@RM_RECURSIVE@ html
+
+distclean: veryclean
+	cd $(PROOFS)/../patches && ./unpatch.py
+	cd $(PROOFS) && ./make-remove-makefiles.py
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/MakefileCommon.json b/FreeRTOS-Plus/Test/CBMC/proofs/MakefileCommon.json
new file mode 100644
index 000000000..1d49986d2
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/MakefileCommon.json
@@ -0,0 +1,47 @@
+{
+    "FREERTOS": [ " ../../../../FreeRTOS" ],
+    "PROOFS": [ "." ],
+
+    "DEF ": [
+	"WIN32",
+	"WINVER=0x400",
+	"_CONSOLE",
+	"_CRT_SECURE_NO_WARNINGS",
+	"_DEBUG",
+	"_WIN32_WINNT=0x0500",
+	"__PRETTY_FUNCTION__=__FUNCTION__",
+	"__free_rtos__",
+
+        "CBMC",
+	"'configASSERT(X)=__CPROVER_assert(X,\"Assertion Error\")'",
+        "'configPRECONDITION(X)=__CPROVER_assume(X)'",
+	"'_static='",
+	"'_volatile='"
+    ],
+
+  "INC ": [
+        "$(FREERTOS)/Source/include",
+        "$(FREERTOS)/Source/portable/MSVC-MingW",
+        "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/include",
+        "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/portable/Compiler/MSVC",
+        "$(FREERTOS)/../FreeRTOS-Plus/Demo/FreeRTOS_Plus_TCP_Minimal_Windows_Simulator/WinPCap",
+        "$(FREERTOS)/Demo/Common/include",
+        "$(FREERTOS)/../FreeRTOS-Plus/Test/CBMC/include",
+        "$(FREERTOS)/../FreeRTOS-Plus/Test/CBMC/patches",
+        "$(FREERTOS)/../FreeRTOS-Plus/Test/CBMC/windows",
+        "$(FREERTOS)/../FreeRTOS-Plus/Test/CBMC/windows2"
+    ],
+
+    "CBMCFLAGS ": [
+	"--object-bits 7",
+	"--32",
+	"--bounds-check",
+	"--pointer-check"
+    ],
+
+    "FORWARD_SLASH": ["/"],
+
+    "TYPE_HEADERS": [
+        "$(FREERTOS)/Source/queue.c"
+    ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/MakefileLinux.json b/FreeRTOS-Plus/Test/CBMC/proofs/MakefileLinux.json
new file mode 100644
index 000000000..08442a2ab
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/MakefileLinux.json
@@ -0,0 +1,36 @@
+{
+    "GOTO_CC": [
+	"goto-cc"
+    ],
+    "COMPILE_LINK": [
+	"-o"
+    ],
+    "COMPILE_ONLY": [
+	"-c",
+	"-o"
+    ],
+    "RULE_INPUT": [
+	"$<"
+    ],
+    "RULE_OUTPUT": [
+	"$@"
+    ],
+    "RULE_GOTO": [
+	"%.goto : %.c"
+    ],
+    "INC": [
+	"$(PROOFS)/../windows"
+    ],
+    "RM": [
+	"$(RM)"
+    ],
+    "RM_RECURSIVE": [
+	"$(RM) -r"
+    ],
+    "CP": [
+	"cp"
+    ],
+    "TYPE_HEADER_SCRIPT": [
+      "$(PROOFS)/make_type_header_files.py"
+    ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/MakefileWindows.json b/FreeRTOS-Plus/Test/CBMC/proofs/MakefileWindows.json
new file mode 100644
index 000000000..543dd6219
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/MakefileWindows.json
@@ -0,0 +1,44 @@
+{
+    "DEF": [
+	"WIN32"
+    ],
+    "GOTO_CC": [
+	"goto-cl"
+    ],
+    "COMPILE_LINK": [
+	"/Fe"
+    ],
+    "COMPILE_ONLY": [
+	"/c",
+	"/Fo"
+    ],
+    "RULE_INPUT": [
+	"$**"
+    ],
+    "RULE_OUTPUT": [
+	"$@"
+    ],
+    "RULE_GOTO": [
+	".c.goto:"
+    ],
+    "OPT": [
+	"/wd4210",
+	"/wd4127",
+	"/wd4214",
+	"/wd4201",
+	"/wd4244",
+	"/wd4310"
+    ],
+    "RM": [
+	"del"
+    ],
+    "RM_RECURSIVE": [
+	"del /s"
+    ],
+    "CP": [
+	"copy"
+    ],
+    "TYPE_HEADER_SCRIPT": [
+    "$(PROOFS)\\make_type_header_files.py"
+    ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ParseDNSReply/Makefile.json b/FreeRTOS-Plus/Test/CBMC/proofs/ParseDNSReply/Makefile.json
new file mode 100644
index 000000000..f372c41da
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ParseDNSReply/Makefile.json
@@ -0,0 +1,68 @@
+# The proof depends on one parameter:
+#   NETWORK_BUFFER_SIZE is the size of the network buffer being parsed
+# The buffer size must be bounded because we must bound the number of
+# iterations loops iterating over the buffer.
+
+{
+  "ENTRY": "ParseDNSReply",
+
+################################################################
+# This is the network buffer size.
+# Reasonable values are size > 12 = sizeof(xDNSMessage)
+  "NETWORK_BUFFER_SIZE": 40,
+
+################################################################
+# This is the size of the buffer into which the name is copied.
+# Set to any positive value.
+# In the source, NAME_SIZE=254 and NETWORK_BUFFER_SIZE >> NAME_SIZE
+# In the proof, NAME_SIZE >= 4 required for good coverage.
+  "NAME_SIZE":  "10",
+
+################################################################
+# Loop prvParseDNSReply.0:
+# file lib/FreeRTOS-Plus-TCP/source/FreeRTOS_DNS.c line 915
+  "PARSELOOP0": "prvParseDNSReply.0",
+
+# M = sizeof( DNSMessage_t ) = 12
+# U = sizeof( uint32_t) = 4
+# Loop bound is (NETWORK_BUFFER_SIZE - M) div (U+1) + 1 tight for SIZE >= M
+# Loop bound is 1 for 0 <= SIZE < M
+  "PARSELOOP0_UNWIND":
+    "__eval 1 if {NETWORK_BUFFER_SIZE} < 12 else ({NETWORK_BUFFER_SIZE} - 12) / 5 + 1",
+
+################################################################
+# Loop prvParseDNSReply.1:
+# file lib/FreeRTOS-Plus-TCP/source/FreeRTOS_DNS.c line 989
+  "PARSELOOP1": "prvParseDNSReply.1",
+
+# A = sizeof( DNSAnswerRecord_t ) = 10
+# M = sizeof( DNSMessage_t ) = 12
+# U = sizeof( uint32_t) = 4
+# Loop bound is (NETWORK_BUFFER_SIZE - M - A) div (A+1) + A + 1 tight
+#    for SIZE >= M + A
+# Loop bound is (NETWORK_BUFFER_SIZE - M) + 1 for M <= SIZE < M + A
+# Loop bound is 1 for 0 <= SIZE < M
+  "PARSELOOP1_UNWIND":
+    "__eval 1 if {NETWORK_BUFFER_SIZE} < 12 else ({NETWORK_BUFFER_SIZE} - 11 if {NETWORK_BUFFER_SIZE} < 22 else ({NETWORK_BUFFER_SIZE} - 12 - 10) / 11 + 11)",
+
+################################################################
+
+  "CBMCFLAGS":
+  [
+    "--unwind 1",
+    "--unwindset {PARSELOOP0}:{PARSELOOP0_UNWIND},{PARSELOOP1}:{PARSELOOP1_UNWIND},prvProcessDNSCache.0:5"
+  ],
+
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_DNS.goto",
+    "$(FREERTOS)/Source/tasks.goto"
+  ],
+
+  "DEF":
+  [
+    "NETWORK_BUFFER_SIZE={NETWORK_BUFFER_SIZE}",
+    "NAME_SIZE={NAME_SIZE}"
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ParseDNSReply/ParseDNSReply_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/ParseDNSReply/ParseDNSReply_harness.c
new file mode 100644
index 000000000..3ae1256a0
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ParseDNSReply/ParseDNSReply_harness.c
@@ -0,0 +1,130 @@
+/* Standard includes. */
+#include <stdint.h>
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "queue.h"
+#include "list.h"
+#include "semphr.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_Sockets.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOS_UDP_IP.h"
+#include "FreeRTOS_DNS.h"
+#include "NetworkBufferManagement.h"
+#include "NetworkInterface.h"
+#include "IPTraceMacroDefaults.h"
+
+#include "cbmc.h"
+
+/****************************************************************
+ * Signature of function under test
+ ****************************************************************/
+
+uint32_t prvParseDNSReply( uint8_t *pucUDPPayloadBuffer,
+			   size_t uxBufferLength,
+			   BaseType_t xExpected );
+
+/****************************************************************
+ * Abstraction of prvReadNameField proved in ReadNameField
+ ****************************************************************/
+
+size_t prvReadNameField( const uint8_t *pucByte,
+			 size_t uxRemainingBytes,
+			 char *pcName,
+			 size_t uxDestLen )
+{
+  __CPROVER_assert(NETWORK_BUFFER_SIZE < CBMC_MAX_OBJECT_SIZE,
+		   "NETWORK_BUFFER_SIZE < CBMC_MAX_OBJECT_SIZE");
+  __CPROVER_assert(NAME_SIZE < CBMC_MAX_OBJECT_SIZE,
+		   "NAME_SIZE < CBMC_MAX_OBJECT_SIZE");
+  __CPROVER_assert(NAME_SIZE >= 4,
+		   "NAME_SIZE >= 4 required for good coverage.");
+
+
+  /* Preconditions */
+  __CPROVER_assert(uxRemainingBytes < CBMC_MAX_OBJECT_SIZE,
+		   "ReadNameField: uxRemainingBytes < CBMC_MAX_OBJECT_SIZE)");
+  __CPROVER_assert(uxDestLen < CBMC_MAX_OBJECT_SIZE,
+		   "ReadNameField: uxDestLen < CBMC_MAX_OBJECT_SIZE)");
+
+  __CPROVER_assert(uxRemainingBytes <= NETWORK_BUFFER_SIZE,
+		   "ReadNameField: uxRemainingBytes <= NETWORK_BUFFER_SIZE)");
+
+  /* This precondition in the function contract for prvReadNameField
+   * fails because prvCheckOptions called prvReadNameField with the
+   * constant value 254.
+  __CPROVER_assert(uxDestLen <= NAME_SIZE,
+		   "ReadNameField: uxDestLen <= NAME_SIZE)");
+  */
+
+  __CPROVER_assert( pucByte != NULL ,
+		    "ReadNameField:  pucByte != NULL )");
+  __CPROVER_assert( pcName != NULL ,
+		    "ReadNameField:  pcName != NULL )");
+
+  __CPROVER_assert(uxDestLen > 0,
+		   "ReadNameField: uxDestLen > 0)");
+
+  /* Return value */
+  size_t index;
+
+  /* Postconditions */
+  __CPROVER_assume( index <= uxDestLen+1 && index <= uxRemainingBytes );
+
+  return index;
+}
+
+/****************************************************************
+ * Abstraction of prvSkipNameField proved in SkipNameField
+ ****************************************************************/
+
+size_t prvSkipNameField( const uint8_t *pucByte, size_t uxLength )
+{
+
+  __CPROVER_assert(NETWORK_BUFFER_SIZE < CBMC_MAX_OBJECT_SIZE,
+		   "NETWORK_BUFFER_SIZE < CBMC_MAX_OBJECT_SIZE");
+
+
+  /* Preconditions */
+  __CPROVER_assert(uxLength < CBMC_MAX_OBJECT_SIZE,
+		   "SkipNameField: uxLength < CBMC_MAX_OBJECT_SIZE)");
+  __CPROVER_assert(uxLength <= NETWORK_BUFFER_SIZE,
+		   "SkipNameField: uxLength <= NETWORK_BUFFER_SIZE)");
+  __CPROVER_assert(pucByte != NULL,
+		   "SkipNameField: pucByte != NULL)");
+
+  /* Return value */
+  size_t index;
+
+  /* Postconditions */
+  __CPROVER_assume(index <= uxLength);
+
+  return index;
+}
+
+/****************************************************************
+ * Proof of prvParseDNSReply
+ ****************************************************************/
+
+void harness() {
+
+  size_t uxBufferLength;
+  BaseType_t xExpected;
+  uint8_t *pucUDPPayloadBuffer = malloc(uxBufferLength);
+
+  __CPROVER_assert(NETWORK_BUFFER_SIZE < CBMC_MAX_OBJECT_SIZE,
+		   "NETWORK_BUFFER_SIZE < CBMC_MAX_OBJECT_SIZE");
+
+  __CPROVER_assume(uxBufferLength < CBMC_MAX_OBJECT_SIZE);
+  __CPROVER_assume(uxBufferLength <= NETWORK_BUFFER_SIZE);
+  __CPROVER_assume(pucUDPPayloadBuffer != NULL);
+
+  uint32_t index = prvParseDNSReply( pucUDPPayloadBuffer,
+				     uxBufferLength,
+				     xExpected );
+
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ProcessDHCPReplies/Makefile.json b/FreeRTOS-Plus/Test/CBMC/proofs/ProcessDHCPReplies/Makefile.json
new file mode 100644
index 000000000..c708bac13
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ProcessDHCPReplies/Makefile.json
@@ -0,0 +1,48 @@
+# The proof depends on one parameter:
+#   BUFFER_SIZE is the size of the buffer being parsed
+# The buffer size must be bounded because we must bound the number of
+# iterations loops iterating over the buffer.
+
+{
+  "ENTRY": "ProcessDHCPReplies",
+
+################################################################
+# Buffer header: sizeof(DHCPMessage_t) = 241
+# Buffer header: sizeof(DHCPMessage_IPv4_t) = 240
+  "BUFFER_HEADER": 240,
+
+################################################################
+# Buffer size
+# Reasonable sizes are  BUFFER_SIZE > BUFFER_HEADER
+# Sizes smaller than this causes CBMC to fail in simplify_byte_extract
+  "BUFFER_SIZE": 252,
+
+################################################################
+# Buffer payload
+  "BUFFER_PAYLOAD": "__eval 1 if {BUFFER_SIZE} <= {BUFFER_HEADER} else {BUFFER_SIZE} - {BUFFER_HEADER} + 1",
+
+################################################################
+
+  "CBMCFLAGS": [
+      # "--nondet-static",
+      "--unwind 1",
+      "--unwindset memcmp.0:7,prvProcessDHCPReplies.0:{BUFFER_PAYLOAD}"
+  ],
+
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Test/CBMC/stubs/cbmc.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Test/CBMC/stubs/freertos_api.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_DHCP.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/portable/BufferManagement/BufferAllocation_2.goto",
+    "$(FREERTOS)/Source/event_groups.goto",
+    "$(FREERTOS)/Source/list.goto"
+  ],
+
+  "DEF":
+  [
+    "CBMC_DHCPMESSAGE_HEADER_SIZE={BUFFER_HEADER}",
+    "CBMC_FREERTOS_RECVFROM_BUFFER_BOUND={BUFFER_SIZE}"
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ProcessDHCPReplies/ProcessDHCPReplies_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/ProcessDHCPReplies/ProcessDHCPReplies_harness.c
new file mode 100644
index 000000000..ec2fb1c8c
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ProcessDHCPReplies/ProcessDHCPReplies_harness.c
@@ -0,0 +1,37 @@
+/* Standard includes. */
+#include <stdint.h>
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "semphr.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_Sockets.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOS_UDP_IP.h"
+#include "FreeRTOS_DHCP.h"
+#include "FreeRTOS_ARP.h"
+
+
+/****************************************************************
+ * Signature of function under test
+ ****************************************************************/
+
+BaseType_t prvProcessDHCPReplies( BaseType_t xExpectedMessageType );
+
+/****************************************************************
+ * The proof for FreeRTOS_gethostbyname.
+ ****************************************************************/
+
+void harness()
+{
+    /* Omitting model of an unconstrained xDHCPData because xDHCPData is */
+    /* the source of uninitialized data only on line 647 to set a */
+    /* transaction id is an outgoing message */
+
+    BaseType_t xExpectedMessageType;
+
+    prvProcessDHCPReplies( xExpectedMessageType );
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/README.md b/FreeRTOS-Plus/Test/CBMC/proofs/README.md
new file mode 100644
index 000000000..48fb7c48d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/README.md
@@ -0,0 +1 @@
+This directory contains the proofs checked by CBMC.   For each entry point of FreeRTOS tested, there is a directory that contains the test harness and cbmc configuration information needed to check the proof.
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ReadNameField/Makefile.json b/FreeRTOS-Plus/Test/CBMC/proofs/ReadNameField/Makefile.json
new file mode 100644
index 000000000..05f3d4208
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ReadNameField/Makefile.json
@@ -0,0 +1,54 @@
+{
+  "ENTRY": "ReadNameField",
+
+################################################################
+#Enable DNS callbacks or else ReadNameField is not defined
+  "callbacks": "1",
+
+################################################################
+# This is the network buffer size.  Set to any positive value.
+  "NETWORK_BUFFER_SIZE" :  "10",
+
+################################################################
+# This is the size of the buffer into which the name is copied.
+# Set to any positive value.
+# In the source, NAME_SIZE=254 and NETWORK_BUFFER_SIZE >> NAME_SIZE
+# In the proof, NAME_SIZE >= 4 required for good coverage.
+  "NAME_SIZE":  "6",
+
+################################################################
+# Loop prvReadNameField.0:
+# should be min of buffer size and name size
+# but loop must be unwound at least once, so max of this and 1+1
+  "READLOOP0": "prvReadNameField.0",
+  "READLOOP0_UNWIND": "__eval max(2, min({NETWORK_BUFFER_SIZE}, {NAME_SIZE}+1))",
+
+################################################################
+# Loop prvReadNameField.1:
+# should be min of buffer size and name size
+# but loop must be unwound at least twice, so max of this and 2+1
+  "READLOOP1": "prvReadNameField.1",
+  "READLOOP1_UNWIND": "__eval max(3, min({NETWORK_BUFFER_SIZE}, {NAME_SIZE}))",
+
+################################################################
+
+  "CBMCFLAGS":
+  [
+    "--unwind 1",
+    "--unwindset {READLOOP0}:{READLOOP0_UNWIND},{READLOOP1}:{READLOOP1_UNWIND}"
+  ],
+
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_DNS.goto"
+  ],
+
+  "DEF":
+  [
+    "NETWORK_BUFFER_SIZE={NETWORK_BUFFER_SIZE}",
+    "NAME_SIZE={NAME_SIZE}",
+    "ipconfigDNS_USE_CALLBACKS={callbacks}",
+    "ipconfigDNS_CACHE_NAME_LENGTH=254"
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ReadNameField/ReadNameField_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/ReadNameField/ReadNameField_harness.c
new file mode 100644
index 000000000..86e30b1fd
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ReadNameField/ReadNameField_harness.c
@@ -0,0 +1,102 @@
+/* Standard includes. */
+#include <stdint.h>
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "queue.h"
+#include "list.h"
+#include "semphr.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_Sockets.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOS_UDP_IP.h"
+#include "FreeRTOS_DNS.h"
+#include "NetworkBufferManagement.h"
+#include "NetworkInterface.h"
+#include "IPTraceMacroDefaults.h"
+
+#include "cbmc.h"
+
+/****************************************************************
+ * Signature of function under test
+ ****************************************************************/
+
+size_t prvReadNameField( const uint8_t *pucByte,
+			 size_t uxRemainingBytes,
+			 char *pcName,
+			 size_t uxDestLen );
+
+/****************************************************************
+ * The function under test is not defined in all configurations
+ ****************************************************************/
+
+#if ( ipconfigUSE_DNS_CACHE == 1 ) || ( ipconfigDNS_USE_CALLBACKS == 1 )  
+
+/* prvReadNameField is defined in this configuration */
+
+#else
+
+/* prvReadNameField is not defined in this configuration, stub it. */
+
+size_t prvReadNameField( const uint8_t *pucByte,
+			 size_t uxRemainingBytes,
+			 char *pcName,
+			 size_t uxDestLen )
+{
+  return 0;
+}
+
+#endif
+
+
+/****************************************************************
+ * Proof of prvReadNameField function contract
+ ****************************************************************/
+
+void harness() {
+
+  __CPROVER_assert(NETWORK_BUFFER_SIZE < CBMC_MAX_OBJECT_SIZE,
+		   "NETWORK_BUFFER_SIZE < CBMC_MAX_OBJECT_SIZE");
+  __CPROVER_assert(NAME_SIZE < CBMC_MAX_OBJECT_SIZE,
+		   "NAME_SIZE < CBMC_MAX_OBJECT_SIZE");
+
+  __CPROVER_assert(NAME_SIZE >= 4,
+		   "NAME_SIZE >= 4 required for good coverage.");
+
+
+  size_t uxRemainingBytes;
+  size_t uxDestLen;
+
+  uint8_t *pucByte = malloc(uxRemainingBytes);
+  char *pcName = malloc(uxDestLen);
+
+  /* Preconditions */
+
+  __CPROVER_assume(uxRemainingBytes < CBMC_MAX_OBJECT_SIZE);
+  __CPROVER_assume(uxDestLen < CBMC_MAX_OBJECT_SIZE);
+
+  __CPROVER_assume(uxRemainingBytes <= NETWORK_BUFFER_SIZE);
+  __CPROVER_assume(uxDestLen <= NAME_SIZE);
+
+  __CPROVER_assume( pucByte != NULL );
+  __CPROVER_assume( pcName != NULL );
+
+  /* Avoid overflow on uxSourceLen - 1U with uxSourceLen == uxRemainingBytes */
+  //__CPROVER_assume(uxRemainingBytes > 0);
+
+  /* Avoid overflow on uxDestLen - 1U */
+  __CPROVER_assume(uxDestLen > 0);
+
+  size_t index = prvReadNameField( pucByte,
+				   uxRemainingBytes,
+				   pcName,
+				   uxDestLen );
+
+  /* Postconditions */
+
+  __CPROVER_assert( index <= uxDestLen+1 && index <= uxRemainingBytes,
+		    "prvReadNamefield: index <= uxDestLen+1");
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/SkipNameField/Makefile.json b/FreeRTOS-Plus/Test/CBMC/proofs/SkipNameField/Makefile.json
new file mode 100644
index 000000000..cb2e7a9cc
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/SkipNameField/Makefile.json
@@ -0,0 +1,32 @@
+{
+  "ENTRY": "SkipNameField",
+
+################################################################
+# This is the network buffer size. This can be set to any positive value.
+  "NETWORK_BUFFER_SIZE": 10,
+
+################################################################
+# Loop prvSkipNameField.0:
+#   file lib/FreeRTOS-Plus-TCP/source/FreeRTOS_DNS.c line 778
+#   bound should be half network buffer size, since chunk length is at least 2
+  "SKIPLOOP0": "prvSkipNameField.0",
+  "SKIPLOOP0_UNWIND": "__eval ({NETWORK_BUFFER_SIZE} + 1) / 2",
+
+################################################################
+
+  "CBMCFLAGS":
+  [
+    "--unwind 1",
+    "--unwindset {SKIPLOOP0}:{SKIPLOOP0_UNWIND}"
+  ],
+
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_DNS.goto"
+  ],
+  "DEF":
+  [
+    "NETWORK_BUFFER_SIZE={NETWORK_BUFFER_SIZE}"
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/SkipNameField/SkipNameField_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/SkipNameField/SkipNameField_harness.c
new file mode 100644
index 000000000..2820e444d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/SkipNameField/SkipNameField_harness.c
@@ -0,0 +1,54 @@
+/* Standard includes. */
+#include <stdint.h>
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "queue.h"
+#include "list.h"
+#include "semphr.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_Sockets.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOS_UDP_IP.h"
+#include "FreeRTOS_DNS.h"
+#include "NetworkBufferManagement.h"
+#include "NetworkInterface.h"
+#include "IPTraceMacroDefaults.h"
+
+#include "cbmc.h"
+
+/****************************************************************
+ * Signature of function under test
+ ****************************************************************/
+
+size_t prvSkipNameField( const uint8_t *pucByte, size_t uxLength );
+
+/****************************************************************
+ * Proof of prvSkipNameField function contract
+ ****************************************************************/
+
+void harness() {
+
+  __CPROVER_assert(NETWORK_BUFFER_SIZE < CBMC_MAX_OBJECT_SIZE,
+		   "NETWORK_BUFFER_SIZE < CBMC_MAX_OBJECT_SIZE");
+
+  size_t uxLength;
+  uint8_t *pucByte = malloc( uxLength );
+
+  /* Preconditions */
+
+  __CPROVER_assume(uxLength < CBMC_MAX_OBJECT_SIZE);
+  __CPROVER_assume(uxLength <= NETWORK_BUFFER_SIZE);
+  __CPROVER_assume(pucByte != NULL);
+
+  size_t index = prvSkipNameField( pucByte, uxLength );
+
+  /* Postconditions */
+
+  __CPROVER_assert(index <= uxLength,
+		   "prvSkipNameField: index <= uxLength");
+
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/TCP/prvTCPHandleState/Makefile.json b/FreeRTOS-Plus/Test/CBMC/proofs/TCP/prvTCPHandleState/Makefile.json
new file mode 100644
index 000000000..8f2f3037e
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/TCP/prvTCPHandleState/Makefile.json
@@ -0,0 +1,59 @@
+#
+# FreeRTOS memory safety proofs with CBMC.
+# Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+#
+# Permission is hereby granted, free of charge, to any person
+# obtaining a copy of this software and associated documentation
+# files (the "Software"), to deal in the Software without
+# restriction, including without limitation the rights to use, copy,
+# modify, merge, publish, distribute, sublicense, and/or sell copies
+# of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be
+# included in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+# BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+# ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+#
+# http://aws.amazon.com/freertos
+# http://www.FreeRTOS.org
+#
+
+{
+  "ENTRY": "TCPHandleState",
+  "TX_DRIVER":1,
+  "RX_MESSAGES":1,
+  "CBMCFLAGS":
+  [
+    "--unwind 1",
+    "--unwindset prvWinScaleFactor.0:2",
+    "--nondet-static"
+  ],
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_TCP_IP.goto"
+  ],
+  "DEF":
+  [
+    "ipconfigZERO_COPY_TX_DRIVER={TX_DRIVER}",
+    "ipconfigUSE_LINKED_RX_MESSAGES={RX_MESSAGES}",
+    "FREERTOS_TCP_ENABLE_VERIFICATION"
+  ],
+  "INSTFLAGS":
+  [
+    "--remove-function-body prvTCPPrepareSend",
+    "--remove-function-body prvTCPReturnPacket"
+  ],
+  "INC":
+  [
+    "$(FREERTOS)/tools/cbmc/include"
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/TCP/prvTCPHandleState/README.md b/FreeRTOS-Plus/Test/CBMC/proofs/TCP/prvTCPHandleState/README.md
new file mode 100644
index 000000000..8f08c5931
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/TCP/prvTCPHandleState/README.md
@@ -0,0 +1,22 @@
+This is the memory safety proof for prvTCPHandleState.
+
+This proof is a work-in-progress.  Proof assumptions are described in
+the harness.  The proof also assumes the following functions are
+memory safe and have no side effects relevant to the memory safety of
+this function:
+
+* prvTCPPrepareSend (proved independently)
+* prvTCPReturnPacket (proved independently)
+
+* lTCPAddRxdata
+* lTCPWindowRxCheck
+* lTCPWindowTxAdd
+* ulTCPWindowTxAck
+* vTCPWindowInit
+* xTCPWindowRxEmpty
+* xTCPWindowTxDone
+
+* uxStreamBufferGet
+* vReleaseNetworkBufferAndDescriptor
+* vSocketWakeUpUser
+* xTaskGetTickCount
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/TCP/prvTCPHandleState/TCPHandleState_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/TCP/prvTCPHandleState/TCPHandleState_harness.c
new file mode 100644
index 000000000..03867685a
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/TCP/prvTCPHandleState/TCPHandleState_harness.c
@@ -0,0 +1,73 @@
+/*
+ * FreeRTOS memory safety proofs with CBMC.
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "queue.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOS_TCP_IP.h"
+
+#include "../../utility/memory_assignments.c"
+
+/* This proof assumes that prvTCPPrepareSend and prvTCPReturnPacket are correct.
+These functions are proved to be correct separately. */
+
+BaseType_t publicTCPHandleState( FreeRTOS_Socket_t *pxSocket, NetworkBufferDescriptor_t **ppxNetworkBuffer );
+
+void harness() {
+	FreeRTOS_Socket_t *pxSocket = ensure_FreeRTOS_Socket_t_is_allocated();
+	size_t socketSize = sizeof(FreeRTOS_Socket_t);
+	if (ensure_memory_is_valid(pxSocket, socketSize)) {
+		/* ucOptionLength is the number of valid bytes in ulOptionsData[].
+		ulOptionsData[] is initialized as uint32_t ulOptionsData[ipSIZE_TCP_OPTIONS/sizeof(uint32_t)].
+		This assumption is required for a memcpy function that copies uxOptionsLength
+		data from pxTCPHeader->ucOptdata to pxTCPWindow->ulOptionsData.*/
+		__CPROVER_assume(pxSocket->u.xTCP.xTCPWindow.ucOptionLength == sizeof(uint32_t) * ipSIZE_TCP_OPTIONS/sizeof(uint32_t));
+		/* uxRxWinSize is initialized as size_t. This assumption is required to terminate `while(uxWinSize > 0xfffful)` loop.*/
+		__CPROVER_assume(pxSocket->u.xTCP.uxRxWinSize >= 0 && pxSocket->u.xTCP.uxRxWinSize <= sizeof(size_t));
+		/* uxRxWinSize is initialized as uint16_t. This assumption is required to terminate `while(uxWinSize > 0xfffful)` loop.*/
+		__CPROVER_assume(pxSocket->u.xTCP.usInitMSS == sizeof(uint16_t));
+	}
+
+	NetworkBufferDescriptor_t *pxNetworkBuffer = ensure_FreeRTOS_NetworkBuffer_is_allocated();
+	size_t bufferSize = sizeof(NetworkBufferDescriptor_t);
+	if(ensure_memory_is_valid(pxNetworkBuffer, bufferSize)) {
+		pxNetworkBuffer->pucEthernetBuffer = safeMalloc(sizeof(TCPPacket_t));
+	}
+	if (ensure_memory_is_valid(pxSocket, socketSize) &&
+		ensure_memory_is_valid(pxNetworkBuffer, bufferSize) &&
+		ensure_memory_is_valid(pxNetworkBuffer->pucEthernetBuffer, sizeof(TCPPacket_t)) &&
+		ensure_memory_is_valid(pxSocket->u.xTCP.pxPeerSocket, socketSize)) {
+
+			publicTCPHandleState(pxSocket, &pxNetworkBuffer);
+
+	}
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/TCP/prvTCPPrepareSend/Makefile.json b/FreeRTOS-Plus/Test/CBMC/proofs/TCP/prvTCPPrepareSend/Makefile.json
new file mode 100644
index 000000000..5d34818b5
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/TCP/prvTCPPrepareSend/Makefile.json
@@ -0,0 +1,49 @@
+#
+# FreeRTOS memory safety proofs with CBMC.
+# Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+#
+# Permission is hereby granted, free of charge, to any person
+# obtaining a copy of this software and associated documentation
+# files (the "Software"), to deal in the Software without
+# restriction, including without limitation the rights to use, copy,
+# modify, merge, publish, distribute, sublicense, and/or sell copies
+# of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be
+# included in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+# BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+# ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+#
+# http://aws.amazon.com/freertos
+# http://www.FreeRTOS.org
+#
+
+{
+  "ENTRY": "TCPPrepareSend",
+  "CBMCFLAGS":
+  [
+    "--unwind 1",
+    "--nondet-static"
+  ],
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_TCP_IP.goto"
+  ],
+  "DEF":
+  [
+    "FREERTOS_TCP_ENABLE_VERIFICATION"
+  ],
+  "INC":
+  [
+    "$(FREERTOS)/tools/cbmc/include"
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/TCP/prvTCPPrepareSend/README.md b/FreeRTOS-Plus/Test/CBMC/proofs/TCP/prvTCPPrepareSend/README.md
new file mode 100644
index 000000000..323461918
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/TCP/prvTCPPrepareSend/README.md
@@ -0,0 +1,15 @@
+This is the memory safety proof for prvTCPPrepareSend.
+
+This proof is a work-in-progress.  Proof assumptions are described in
+the harness.  The proof also assumes the following functions are
+memory safe and have no side effects relevant to the memory safety of
+this function:
+
+* ulTCPWindowTxGet
+* xTCPWindowTxDone
+
+* xTaskGetTickCount
+
+* uxStreamBufferGet
+* vReleaseNetworkBufferAndDescriptor
+* vSocketWakeUpUser
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/TCP/prvTCPPrepareSend/TCPPrepareSend_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/TCP/prvTCPPrepareSend/TCPPrepareSend_harness.c
new file mode 100644
index 000000000..9c41d7b7f
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/TCP/prvTCPPrepareSend/TCPPrepareSend_harness.c
@@ -0,0 +1,72 @@
+/*
+ * FreeRTOS memory safety proofs with CBMC.
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "queue.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOS_TCP_IP.h"
+#include "FreeRTOS_Stream_Buffer.h"
+
+#include "../../utility/memory_assignments.c"
+
+/* This proof assumes that pxGetNetworkBufferWithDescriptor is implemented correctly. */
+int32_t publicTCPPrepareSend( FreeRTOS_Socket_t *pxSocket, NetworkBufferDescriptor_t **ppxNetworkBuffer, UBaseType_t uxOptionsLength );
+
+/* Abstraction of pxGetNetworkBufferWithDescriptor. It creates a buffer. */
+NetworkBufferDescriptor_t *pxGetNetworkBufferWithDescriptor( size_t xRequestedSizeBytes, TickType_t xBlockTimeTicks ){
+	NetworkBufferDescriptor_t *pxBuffer = ensure_FreeRTOS_NetworkBuffer_is_allocated ();
+	size_t bufferSize = sizeof(NetworkBufferDescriptor_t);
+	if (ensure_memory_is_valid(pxBuffer, bufferSize)) {
+		/* The code does not expect pucEthernetBuffer to be equal to NULL if
+		pxBuffer is not NULL. */
+		pxBuffer->pucEthernetBuffer = malloc(xRequestedSizeBytes);
+		pxBuffer->xDataLength = xRequestedSizeBytes;
+	}
+	return pxBuffer;
+}
+
+void harness() {
+	FreeRTOS_Socket_t *pxSocket = ensure_FreeRTOS_Socket_t_is_allocated();
+	NetworkBufferDescriptor_t *pxNetworkBuffer = ensure_FreeRTOS_NetworkBuffer_is_allocated();
+	size_t socketSize = sizeof(FreeRTOS_Socket_t);
+	size_t bufferSize = sizeof(TCPPacket_t);
+	if (ensure_memory_is_valid(pxNetworkBuffer, sizeof(*pxNetworkBuffer))) {
+		pxNetworkBuffer->xDataLength = bufferSize;
+		/* The code does not expect pucEthernetBuffer to be equal to NULL if
+		pxNetworkBuffer is not NULL. */
+		pxNetworkBuffer->pucEthernetBuffer = malloc(bufferSize);
+	}
+	UBaseType_t uxOptionsLength;
+	if(pxSocket) {
+		publicTCPPrepareSend(pxSocket, &pxNetworkBuffer, uxOptionsLength );
+	}
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/TCP/prvTCPReturnPacket/Makefile.json b/FreeRTOS-Plus/Test/CBMC/proofs/TCP/prvTCPReturnPacket/Makefile.json
new file mode 100644
index 000000000..e0f4b2403
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/TCP/prvTCPReturnPacket/Makefile.json
@@ -0,0 +1,51 @@
+#
+# FreeRTOS memory safety proofs with CBMC.
+# Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+#
+# Permission is hereby granted, free of charge, to any person
+# obtaining a copy of this software and associated documentation
+# files (the "Software"), to deal in the Software without
+# restriction, including without limitation the rights to use, copy,
+# modify, merge, publish, distribute, sublicense, and/or sell copies
+# of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be
+# included in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+# EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+# MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+# NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+# BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+# ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+#
+# http://aws.amazon.com/freertos
+# http://www.FreeRTOS.org
+#
+
+{
+  "ENTRY": "TCPReturnPacket",
+  "RX_MESSAGES":1,
+  "CBMCFLAGS":
+  [
+    "--unwind 1",
+    "--nondet-static"
+  ],
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_TCP_IP.goto"
+  ],
+  "DEF":
+  [
+    "ipconfigUSE_LINKED_RX_MESSAGES={RX_MESSAGES}",
+    "FREERTOS_TCP_ENABLE_VERIFICATION"
+  ],
+  "INC":
+  [
+    "$(FREERTOS)/tools/cbmc/include"
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/TCP/prvTCPReturnPacket/README.md b/FreeRTOS-Plus/Test/CBMC/proofs/TCP/prvTCPReturnPacket/README.md
new file mode 100644
index 000000000..1efd644d1
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/TCP/prvTCPReturnPacket/README.md
@@ -0,0 +1,10 @@
+This is the memory safety proof for prvTCPReturnPacket.
+
+This proof is a work-in-progress.  Proof assumptions are described in
+the harness.  The proof also assumes the following functions are
+memory safe and have no side effects relevant to the memory safety of
+this function:
+
+* usGenerateChecksum
+* usGenerateProtocolChecksum
+* xNetworkInterfaceOutput
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/TCP/prvTCPReturnPacket/TCPReturnPacket_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/TCP/prvTCPReturnPacket/TCPReturnPacket_harness.c
new file mode 100644
index 000000000..19552565b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/TCP/prvTCPReturnPacket/TCPReturnPacket_harness.c
@@ -0,0 +1,67 @@
+/*
+ * FreeRTOS memory safety proofs with CBMC.
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "queue.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOS_TCP_IP.h"
+
+#include "../../utility/memory_assignments.c"
+
+/* This proof assumes that pxDuplicateNetworkBufferWithDescriptor is implemented correctly. */
+
+void publicTCPReturnPacket( FreeRTOS_Socket_t *pxSocket, NetworkBufferDescriptor_t *pxNetworkBuffer, uint32_t ulLen, BaseType_t xReleaseAfterSend );
+
+/* Abstraction of pxDuplicateNetworkBufferWithDescriptor*/
+NetworkBufferDescriptor_t *pxDuplicateNetworkBufferWithDescriptor( NetworkBufferDescriptor_t * const pxNetworkBuffer,
+	BaseType_t xNewLength ) {
+	NetworkBufferDescriptor_t *pxNetworkBuffer = ensure_FreeRTOS_NetworkBuffer_is_allocated();
+	if (ensure_memory_is_valid(pxNetworkBuffer, sizeof(*pxNetworkBuffer))) {
+		pxNetworkBuffer->pucEthernetBuffer = safeMalloc(sizeof(TCPPacket_t));
+		__CPROVER_assume(pxNetworkBuffer->pucEthernetBuffer);
+	}
+	return pxNetworkBuffer;
+}
+
+void harness() {
+	FreeRTOS_Socket_t *pxSocket = ensure_FreeRTOS_Socket_t_is_allocated();
+	NetworkBufferDescriptor_t *pxNetworkBuffer = ensure_FreeRTOS_NetworkBuffer_is_allocated();
+	if (ensure_memory_is_valid(pxNetworkBuffer, sizeof(*pxNetworkBuffer))) {
+		pxNetworkBuffer->pucEthernetBuffer = safeMalloc(sizeof(TCPPacket_t));
+		__CPROVER_assume(pxNetworkBuffer->pucEthernetBuffer);
+	}
+	uint32_t ulLen;
+	BaseType_t xReleaseAfterSend;
+	/* The code does not expect both of these to be equal to NULL at the same time. */
+	__CPROVER_assume(pxSocket != NULL || pxNetworkBuffer != NULL);
+	publicTCPReturnPacket(pxSocket, pxNetworkBuffer, ulLen, xReleaseAfterSend);
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/make_cbmc_batch_files.py b/FreeRTOS-Plus/Test/CBMC/proofs/make_cbmc_batch_files.py
new file mode 100755
index 000000000..622e000c3
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/make_cbmc_batch_files.py
@@ -0,0 +1,53 @@
+#!/usr/bin/env python3
+#
+# Generation of the cbmc-batch.yaml files for the CBMC proofs.
+#
+# Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in all
+# copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+
+import os
+import platform
+import subprocess
+
+
+def remove_cbmc_yaml_files():
+    for dyr, _, files in os.walk("."):
+        cbmc_batch_files = [os.path.join(os.path.abspath(dyr), file)
+                            for file in files if file == "cbmc-batch.yaml"]
+        for file in cbmc_batch_files:
+            os.remove(file)
+
+
+def create_cbmc_yaml_files():
+    # The YAML files are only used by CI and are not needed on Windows.
+    if platform.system() == "Windows":
+        return
+    for dyr, _, files in os.walk("."):
+        harness = [file for file in files if file.endswith("_harness.c")]
+        if harness and "Makefile" in files:
+            subprocess.run(["make", "cbmc-batch.yaml"],
+                           stdout=subprocess.PIPE,
+                           stderr=subprocess.PIPE,
+                           cwd=os.path.abspath(dyr),
+                           check=True)
+
+if __name__ == '__main__':
+    remove_cbmc_yaml_files()
+    create_cbmc_yaml_files()
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/make_common_makefile.py b/FreeRTOS-Plus/Test/CBMC/proofs/make_common_makefile.py
new file mode 100755
index 000000000..efcf1db8d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/make_common_makefile.py
@@ -0,0 +1,240 @@
+#!/usr/bin/env python3
+#
+# Generation of common Makefile for CBMC proofs.
+#
+# Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in all
+# copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+
+from pprint import pprint
+import json
+import sys
+import re
+import os
+import argparse
+
+def cleanup_whitespace(string):
+    return re.sub('\s+', ' ', string.strip())
+
+################################################################
+# Operating system specific values
+
+platform_definitions = {
+    "linux": {
+        "platform": "linux",
+        "separator": "/",
+        "define": "-D",
+        "include": "-I",
+    },
+    "macos": {
+        "platform": "darwin",
+        "separator": "/",
+        "define": "-D",
+        "include": "-I",
+    },
+    "windows": {
+        "platform": "win32",
+        "separator": "\\",
+        "define": "/D",
+        "include": "/I",
+    },
+}
+
+
+def default_platform():
+    for platform, definition in platform_definitions.items():
+        if sys.platform == definition["platform"]:
+            return platform
+    return "linux"
+
+
+def patch_path_separator(opsys, string):
+    from_separator = '/'
+    to_separator = platform_definitions[opsys]["separator"]
+
+    def escape_separator(string):
+        return string.split(from_separator + from_separator)
+
+    def change_separator(string):
+        return string.replace(from_separator, to_separator)
+
+    return from_separator.join([change_separator(escaped)
+                                for escaped in escape_separator(string)])
+
+def patch_compile_output(opsys, line, key, value):
+    if opsys != "windows":
+        return line
+
+    if key in ["COMPILE_ONLY", "COMPILE_LINK"] and value is not None:
+        if value[-1] == '/Fo':
+            return re.sub('/Fo\s+', '/Fo', line)
+        if value[-1] == '/Fe':
+            return re.sub('/Fe\s+', '/Fe', line)
+    return line
+
+################################################################
+# Argument parsing
+#
+
+def get_arguments():
+    parser = argparse.ArgumentParser()
+    parser.add_argument(
+        "--system",
+        metavar="OS",
+        choices=platform_definitions,
+        default=str(default_platform()),
+        help="Generate makefiles for operating system OS"
+    )
+    return parser.parse_args()
+
+################################################################
+# Variable definitions
+#
+# JSON files give variable definitions for common, operating system,
+# and harness specfic values
+#
+
+def read_variable_definitions(filename):
+    variable = {}
+    with open(filename) as _file:
+        for key, values in json.load(_file).items():
+            variable[cleanup_whitespace(key)] = [cleanup_whitespace(value)
+                                                 for value in values]
+    return variable
+
+def find_definition_once(key, defines, prefix=None):
+
+    # Try looking up key with and without prefix
+    prefix = "{}_".format(prefix.rstrip('_')) if prefix else ""
+    key2 = key[len(prefix):] if key.startswith(prefix) else prefix + key
+
+    for _key in [key, key2]:
+        _value = defines.get(_key)
+        if _value is not None:
+            return _value
+
+    return None
+
+def find_definition(key, defines):
+    common_defines, opsys_defines, harness_defines = defines
+    return (find_definition_once(key, harness_defines, "H") or
+            find_definition_once(key, opsys_defines, "O") or
+            find_definition_once(key, common_defines, "C"))
+
+################################################################
+# Makefile generation
+
+def construct_definition(opsys, key_prefix, value_prefix, key, definitions):
+    values = definitions.get(key)
+    if not values:
+        return ""
+    if key in ["INC", "DEF"]:
+        values = [patch_path_separator(opsys, value)
+                  for value in values]
+    lines = ["\t{}{} \\".format(value_prefix, value) for value in values]
+    return "{}_{} = \\\n{}\n\t# empty\n".format(key_prefix,
+                                                key,
+                                                '\n'.join(lines))
+
+def write_define(opsys, define, defines, makefile):
+    value = find_definition(define, defines)
+    if value:
+        if define in ["FREERTOS", "PROOFS"]:
+            value = os.path.abspath(value[0])
+        makefile.write("{} = {}\n".format(define, value))
+
+def write_common_defines(opsys, defines, makefile):
+    common_defines, opsys_defines, harness_defines = defines
+
+    for key_prefix, defines in zip(["C", "O", "H"],
+                                   [common_defines,
+                                    opsys_defines,
+                                    harness_defines]):
+        for value_prefix, key in zip([platform_definitions[opsys]["include"],
+                                      platform_definitions[opsys]["define"],
+                                      "", ""],
+                                     ["INC", "DEF", "OPT", "CBMCFLAGS"]):
+            define = construct_definition(opsys,
+                                          key_prefix, value_prefix,
+                                          key, defines)
+            if define:
+                makefile.write(define + "\n")
+
+
+def write_makefile(opsys, template, defines, makefile):
+    with open(template) as _template:
+        for line in _template:
+            line = patch_path_separator(opsys, line)
+            keys = re.findall('@(\w+)@', line)
+            values = [find_definition(key, defines) for key in keys]
+            for key, value in zip(keys, values):
+                if value is not None:
+                    line = line.replace('@{}@'.format(key), " ".join(value))
+                    line = patch_compile_output(opsys, line, key, value)
+            makefile.write(line)
+
+def write_cbmcbatchyaml_target(opsys, _makefile):
+    target = """
+################################################################
+# Build configuration file to run cbmc under cbmc-batch in CI
+
+define encode_options
+'=$(shell echo $(1) | sed 's/ ,/ /g' | sed 's/ /;/g')='
+endef
+
+cbmc-batch.yaml:
+	@echo "Building $@"
+	@$(RM) $@
+	@echo "jobos: ubuntu16" >> $@
+	@echo "cbmcflags: $(call encode_options,$(CBMCFLAGS) --unwinding-assertions)" >> $@
+	@echo "goto: $(ENTRY).goto" >> $@
+	@echo "expected: $(H_EXPECTED)" >> $@
+
+################################################################
+"""
+    if opsys != "windows":
+        _makefile.write(target)
+
+def makefile_from_template(opsys, template, defines, makefile="Makefile"):
+    with open(makefile, "w") as _makefile:
+        write_define(opsys, "FREERTOS", defines, _makefile)
+        write_define(opsys, "PROOFS", defines, _makefile)
+        write_common_defines(opsys, defines, _makefile)
+        write_makefile(opsys, template, defines, _makefile)
+        write_cbmcbatchyaml_target(opsys, _makefile)
+
+################################################################
+# Main
+
+def main():
+    args = get_arguments()
+
+    common_defines = read_variable_definitions("MakefileCommon.json")
+    opsys_defines = read_variable_definitions("MakefileWindows.json"
+                                              if args.system == "windows"
+                                              else "MakefileLinux.json")
+    harness_defines = {}
+
+    makefile_from_template(args.system,
+                           "Makefile.template",
+                           (common_defines, opsys_defines, harness_defines),
+                           "Makefile.common")
+
+if __name__ == "__main__":
+    main()
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/make_configuration_directories.py b/FreeRTOS-Plus/Test/CBMC/proofs/make_configuration_directories.py
new file mode 100755
index 000000000..9e006e9ed
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/make_configuration_directories.py
@@ -0,0 +1,163 @@
+#!/usr/bin/env python3
+#
+# Creating the CBMC proofs from Configurations.json.
+#
+# Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in all
+# copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+
+import collections
+import json
+import logging
+import os
+import pathlib
+import shutil
+import textwrap
+
+from make_proof_makefiles import load_json_config_file
+
+LOGGER = logging.getLogger("ComputeConfigurations")
+
+def prolog():
+    return textwrap.dedent("""\
+        This script Generates Makefile.json from Configrations.json.
+
+        Starting in the current directory, it walks down every subdirectory
+        looking for Configurations.json files. Every found Configurations.json
+        file is assumed to look similar to the following format:
+
+        {
+          "ENTRY": "ARPProcessPacket",
+          "CBMCFLAGS":
+          [
+              "--unwind 1",
+              "--unwindset vARPRefreshCacheEntry.0:7,memcmp.0:17",
+              "--nondet-static"
+          ],
+          "OBJS":
+          [
+            "$(ENTRY)_harness.goto",
+            "$(FREERTOS)/lib/FreeRTOS-Plus-TCP/source/FreeRTOS_ARP.goto"
+          ],
+          "DEF":
+          [
+            {"disableClashDetection": ["ipconfigARP_USE_CLASH_DETECTION=0"]},
+            {"enableClashDetection": ["ipconfigARP_USE_CLASH_DETECTION=1"]}
+          ]
+        }
+
+        The format is mainly taken from the Makefile.json files.
+        The only difference is that it expects a list of json object in the DEF
+        section. This script will generate a Makefile.json in a subdirectory and
+        copy the harness to each subdirectory.
+        The key is later taken as the name for the configuration subdirectory
+        prexied by 'config_'.
+
+        So for the above script, we get two subdirectories:
+        -config_disableClashDetection
+        -config_enableClashDetection
+
+        As an example, the resulting Makefile.json for the
+        config_disableClashDetection directory will be:
+
+        {
+          "ENTRY": "ARPProcessPacket",
+          "CBMCFLAGS": [
+            "--unwind 1",
+            "--unwindset vARPRefreshCacheEntry.0:7,memcmp.0:17",
+            "--nondet-static"
+          ],
+          "OBJS": [
+            "$(ENTRY)_harness.goto",
+            "$(FREERTOS)/lib/FreeRTOS-Plus-TCP/source/FreeRTOS_ARP.goto"
+          ],
+          "DEF": [
+            "ipconfigARP_USE_CLASH_DETECTION=0"
+          ]
+        }
+
+        These Makefile.json files then can be turned into Makefiles for running
+        the proof by executing the make-proof-makefiles.py script.
+        """)
+
+
+def process(folder, files):
+    json_content = load_json_config_file(os.path.join(folder,
+                                                      "Configurations.json"))
+    try:
+        def_list = json_content["DEF"]
+    except KeyError:
+        LOGGER.error("Expected DEF as key in a Configurations.json files.")
+        return
+    for config in def_list:
+        logging.debug(config)
+        try:
+            configname = [name for name in config.keys()
+                          if name != "EXPECTED"][0]
+            configbody = config[configname]
+        except (AttributeError, IndexError) as e:
+            LOGGER.error(e)
+            LOGGER.error(textwrap.dedent("""\
+            The expected layout for an entry in the Configurations.json
+            file is a dictonary. Here is an example of the expected format:
+
+            "DEF":
+            [
+              {"disableClashDetection": ["ipconfigARP_USE_CLASH_DETECTION=0"]},
+              {"enableClashDetection": ["ipconfigARP_USE_CLASH_DETECTION=1"]}
+            ]
+                """))
+            LOGGER.error("The offending entry is %s", config)
+            return
+        new_config_folder = os.path.join(folder, "config_" + configname)
+        pathlib.Path(new_config_folder).mkdir(exist_ok=True, parents=True)
+        harness_copied = False
+        for file in files:
+            if file.endswith("harness.c"):
+                shutil.copy(os.path.join(folder, file),
+                            os.path.join(new_config_folder, file))
+                harness_copied = True
+
+        if not harness_copied:
+            LOGGER.error("Could not find a harness in folder %s.", folder)
+            LOGGER.error("This folder is not processed do the end!")
+            return
+        # The order of keys must be maintained as otherwise the
+        # make_proof_makefiles script might fail.
+        current_config = collections.OrderedDict(json_content)
+        current_config["DEF"] = configbody
+        if "EXPECTED" in config.keys():
+            current_config["EXPECTED"] = config["EXPECTED"]
+        else:
+            current_config["EXPECTED"] = True
+        with open(os.path.join(new_config_folder, "Makefile.json"),
+                  "w") as output_file:
+            json.dump(current_config, output_file, indent=2)
+
+
+def main():
+    for fldr, _, fyles in os.walk("."):
+        if "Configurations.json" in fyles:
+            process(fldr, fyles)
+
+
+if __name__ == '__main__':
+    logging.basicConfig(format="{script}: %(levelname)s %(message)s".format(
+        script=os.path.basename(__file__)))
+    main()
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/make_proof_makefiles.py b/FreeRTOS-Plus/Test/CBMC/proofs/make_proof_makefiles.py
new file mode 100755
index 000000000..846942ee4
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/make_proof_makefiles.py
@@ -0,0 +1,416 @@
+#!/usr/bin/env python3
+#
+# Generation of Makefiles for CBMC proofs.
+#
+# Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in all
+# copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+
+
+import argparse
+import ast
+import collections
+import json
+import logging
+import operator
+import os
+import os.path
+import platform
+import re
+import sys
+import textwrap
+import traceback
+
+
+# ______________________________________________________________________________
+# Compatibility between different python versions
+# ``````````````````````````````````````````````````````````````````````````````
+
+# Python 3 doesn't have basestring
+try:
+    basestring
+except NameError:
+    basestring = str
+
+# ast.Num was deprecated in python 3.8
+_plat = platform.python_version().split(".")
+if _plat[0] == "3" and int(_plat[1]) > 7:
+    ast_num = ast.Constant
+else:
+    ast_num = ast.Num
+# ______________________________________________________________________________
+
+
+def prolog():
+    return textwrap.dedent("""\
+        This script generates Makefiles that can be used either on Windows (with
+        NMake) or Linux (with GNU Make). The Makefiles consist only of variable
+        definitions; they are intended to be used with a common Makefile that
+        defines the actual rules.
+
+        The Makefiles are generated from JSON specifications. These are simple
+        key-value dicts, but can contain variables and computation, as
+        well as comments (lines whose first character is "#"). If the
+        JSON file contains the following information:
+
+                {
+                    # 'T was brillig, and the slithy toves
+                    "FOO": "BAR",
+                    "BAZ": "{FOO}",
+
+                    # Did gyre and gimble in the wabe;
+                    "QUUX": 30
+                    "XYZZY": "__eval 5 if {QUUZ} < 5 else min({QUUX}, 60)"
+                }
+
+        then the resulting Makefile will look like
+
+                H_FOO = BAR
+                H_BAZ = BAR
+                H_QUUX = 30
+                H_XYZZY = 30
+
+        The language used for evaluation is highly restricted; arbitrary
+        python is not allowed.  JSON values that are lists will be
+        joined with whitespace:
+
+                { "FOO": ["BAR", "BAZ", "QUX"] }
+
+                ->
+
+                H_FOO = BAR BAZ QUX
+
+        As a special case, if a key is equal to "DEF", "INC" (and maybe more,
+        read the code) the list of values is treated as a list of defines or
+        include paths. Thus, they have -D or /D, or -I or /I, prepended to them
+        as appropriate for the platform.
+
+
+                { "DEF": ["DEBUG", "FOO=BAR"] }
+
+                on Linux ->
+
+                H_DEF = -DDEBUG -DFOO=BAR
+
+        Pathnames are written with a forward slash in the JSON file. In
+        each value, all slashes are replaced with backslashes if
+        generating Makefiles for Windows. If you wish to generate a
+        slash even on Windows, use two slashes---that will be changed
+        into a single forward slash on both Windows and Linux.
+
+                {
+                    "INC": [ "my/cool/directory" ],
+                    "DEF": [ "HALF=//2" ]
+                }
+
+                On Windows ->
+
+                H_INC = /Imy\cool\directory
+                H_DEF = /DHALF=/2
+
+        When invoked, this script walks the directory tree looking for files
+        called "Makefile.json". It reads that file and dumps a Makefile in that
+        same directory. We assume that this script lives in the same directory
+        as a Makefile called "Makefile.common", which contains the actual Make
+        rules. The final line of each of the generated Makefiles will be an
+        include statement, including Makefile.common.
+    """)
+
+def load_json_config_file(file):
+    with open(file) as handle:
+        lines = handle.read().splitlines()
+    no_comments = "\n".join([line for line in lines
+                             if line and not line.lstrip().startswith("#")])
+    try:
+        data = json.loads(no_comments,
+                          object_pairs_hook=collections.OrderedDict)
+    except json.decoder.JSONDecodeError:
+        traceback.print_exc()
+        logging.error("parsing file %s", file)
+        sys.exit(1)
+    return data
+
+
+def dump_makefile(dyr, system):
+    data = load_json_config_file(os.path.join(dyr, "Makefile.json"))
+
+    makefile = collections.OrderedDict()
+
+    # Makefile.common expects a variable called OBJS_EXCEPT_HARNESS to be
+    # set to a list of all the object files except the harness.
+    if "OBJS" not in data:
+        logging.error(
+            "Expected a list of object files in %s/Makefile.json" % dyr)
+        exit(1)
+    makefile["OBJS_EXCEPT_HARNESS"] = " ".join(
+        o for o in data["OBJS"] if not o.endswith("_harness.goto"))
+
+    so_far = collections.OrderedDict()
+    for name, value in data.items():
+        if isinstance(value, list):
+            new_value = []
+            for item in value:
+                new_value.append(compute(item, so_far, system, name, dyr, True))
+            makefile[name] = " ".join(new_value)
+        else:
+            makefile[name] = compute(value, so_far, system, name, dyr)
+
+    if (("EXPECTED" not in makefile.keys()) or
+            str(makefile["EXPECTED"]).lower() == "true"):
+        makefile["EXPECTED"] = "SUCCESSFUL"
+    elif str(makefile["EXPECTED"]).lower() == "false":
+        makefile["EXPECTED"] = "FAILURE"
+    makefile = ["H_%s = %s" % (k, v) for k, v in makefile.items()]
+
+    # Deal with the case of a harness being nested several levels under
+    # the top-level proof directory, where the common Makefile lives
+    common_dir_path = "..%s" % _platform_choices[system]["path-sep"]
+    common_dir_path = common_dir_path * len(dyr.split(os.path.sep)[1:])
+
+    with open(os.path.join(dyr, "Makefile"), "w") as handle:
+        handle.write(("""{contents}
+
+{include} {common_dir_path}Makefile.common""").format(
+            contents="\n".join(makefile),
+            include=_platform_choices[system]["makefile-inc"],
+            common_dir_path=common_dir_path))
+
+
+def compute(value, so_far, system, key, harness, appending=False):
+    if not isinstance(value, (basestring, float, int)):
+        logging.error(wrap("""\
+                        in file %s, the key '%s' has value '%s',
+                        which is of the wrong type (%s)"""),
+                      os.path.join(harness, "Makefile.json"), key,
+                      str(value), str(type(value)))
+        exit(1)
+
+    value = str(value)
+    try:
+        var_subbed = value.format(**so_far)
+    except KeyError as e:
+        logging.error(wrap("""\
+                        in file %s, the key '%s' has value '%s', which
+                        contains the variable %s, but that variable has
+                        not previously been set in the file"""),
+                      os.path.join(harness, "Makefile.json"), key,
+                      value, str(e))
+        exit(1)
+
+    if var_subbed[:len("__eval")] != "__eval":
+        tmp = re.sub("//", "__DOUBLE_SLASH__", var_subbed)
+        tmp = re.sub("/", _platform_choices[system]["path-sep-re"], tmp)
+        evaluated = re.sub("__DOUBLE_SLASH__", "/", tmp)
+    else:
+        to_eval = var_subbed[len("__eval"):].strip()
+        logging.debug("About to evaluate '%s'", to_eval)
+        evaluated = eval_expr(to_eval,
+                              os.path.join(harness, "Makefile.json"),
+                              key, value)
+
+    if key == "DEF":
+        final_value = "%s%s" % (_platform_choices[system]["define"],
+                                evaluated)
+    elif key == "INC":
+        final_value = "%s%s" % (_platform_choices[system]["include"],
+                                evaluated)
+    else:
+        final_value = evaluated
+
+    # Allow this value to be used for future variable substitution
+    if appending:
+        try:
+            so_far[key] = "%s %s" % (so_far[key], final_value)
+        except KeyError:
+            so_far[key] = final_value
+        logging.debug("Appending final value '%s' to key '%s'",
+                      final_value, key)
+    else:
+        so_far[key] = final_value
+        logging.info("Key '%s' set to final value '%s'", key, final_value)
+
+    return final_value
+
+
+def eval_expr(expr_string, harness, key, value):
+    """
+    Safe evaluation of purely arithmetic expressions
+    """
+    try:
+        tree = ast.parse(expr_string, mode="eval").body
+    except SyntaxError:
+        traceback.print_exc()
+        logging.error(wrap("""\
+            in file %s at key '%s', value '%s' contained the expression
+            '%s' which is an invalid expression"""), harness, key,
+                      value, expr_string)
+        exit(1)
+
+    def eval_single_node(node):
+        logging.debug(node)
+        if isinstance(node, ast_num):
+            return node.n
+        # We're only doing IfExp, which is Python's ternary operator
+        # (i.e. it's an expression). NOT If, which is a statement.
+        if isinstance(node, ast.IfExp):
+            # Let's be strict and only allow actual booleans in the guard
+            guard = eval_single_node(node.test)
+            if guard is not True and guard is not False:
+                logging.error(wrap("""\
+                    in file %s at key '%s', there was an invalid guard
+                    for an if statement."""), harness, key)
+                exit(1)
+            if guard:
+                return eval_single_node(node.body)
+            return eval_single_node(node.orelse)
+        if isinstance(node, ast.Compare):
+            left = eval_single_node(node.left)
+            # Don't allow expressions like (a < b) < c
+            right = eval_single_node(node.comparators[0])
+            op = eval_single_node(node.ops[0])
+            return op(left, right)
+        if isinstance(node, ast.BinOp):
+            left = eval_single_node(node.left)
+            right = eval_single_node(node.right)
+            op = eval_single_node(node.op)
+            return op(left, right)
+        if isinstance(node, ast.Call):
+            valid_calls = {
+                "max": max,
+                "min": min,
+            }
+            if node.func.id not in valid_calls:
+                logging.error(wrap("""\
+                    in file %s at key '%s', there was an invalid
+                    call to %s()"""), harness, key, node.func.id)
+                exit(1)
+            left = eval_single_node(node.args[0])
+            right = eval_single_node(node.args[1])
+            return valid_calls[node.func.id](left, right)
+        try:
+            return {
+                ast.Eq: operator.eq,
+                ast.NotEq: operator.ne,
+                ast.Lt: operator.lt,
+                ast.LtE: operator.le,
+                ast.Gt: operator.gt,
+                ast.GtE: operator.ge,
+
+                ast.Add: operator.add,
+                ast.Sub: operator.sub,
+                ast.Mult: operator.mul,
+                # Use floordiv (i.e. //) so that we never need to
+                # cast to an int
+                ast.Div: operator.floordiv,
+            }[type(node)]
+        except KeyError:
+            logging.error(wrap("""\
+                in file %s at key '%s', there was expression that
+                was impossible to evaluate"""), harness, key)
+            exit(1)
+
+    return eval_single_node(tree)
+
+
+_platform_choices = {
+    "linux": {
+        "platform": "linux",
+        "path-sep": "/",
+        "path-sep-re": "/",
+        "define": "-D",
+        "include": "-I",
+        "makefile-inc": "include",
+    },
+    "windows": {
+        "platform": "win32",
+        "path-sep": "\\",
+        "path-sep-re": re.escape("\\"),
+        "define": "/D",
+        "include": "/I",
+        "makefile-inc": "!INCLUDE",
+    },
+}
+# Assuming macos is the same as linux
+_mac_os = dict(_platform_choices["linux"])
+_mac_os["platform"] = "darwin"
+_platform_choices["macos"] = _mac_os
+
+
+def default_platform():
+    for arg_string, os_data in _platform_choices.items():
+        if sys.platform == os_data["platform"]:
+            return arg_string
+    return "linux"
+
+
+_args = [{
+    "flags": ["-s", "--system"],
+    "metavar": "OS",
+    "choices": _platform_choices,
+    "default": str(default_platform()),
+    "help": textwrap.dedent("""\
+                which operating system to generate makefiles for.
+                Defaults to the current platform (%(default)s);
+                choices are {choices}""").format(
+                    choices="[%s]" % ", ".join(_platform_choices)),
+}, {
+    "flags": ["-v", "--verbose"],
+    "help": "verbose output",
+    "action": "store_true",
+}, {
+    "flags": ["-w", "--very-verbose"],
+    "help": "very verbose output",
+    "action": "store_true",
+    }]
+
+
+def get_args():
+    pars = argparse.ArgumentParser(
+        description=prolog(),
+        formatter_class=argparse.RawDescriptionHelpFormatter)
+    for arg in _args:
+        flags = arg.pop("flags")
+        pars.add_argument(*flags, **arg)
+    return pars.parse_args()
+
+
+def set_up_logging(args):
+    fmt = "{script}: %(levelname)s %(message)s".format(
+        script=os.path.basename(__file__))
+    if args.very_verbose:
+        logging.basicConfig(format=fmt, level=logging.DEBUG)
+    elif args.verbose:
+        logging.basicConfig(format=fmt, level=logging.INFO)
+    else:
+        logging.basicConfig(format=fmt, level=logging.WARNING)
+
+def wrap(string):
+    return re.sub(r"\s+", " ", re.sub("\n", " ", string))
+
+def main():
+    args = get_args()
+    set_up_logging(args)
+
+    for root, _, fyles in os.walk("."):
+        if "Makefile.json" in fyles:
+            dump_makefile(root, args.system)
+
+
+if __name__ == "__main__":
+    main()
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/make_remove_makefiles.py b/FreeRTOS-Plus/Test/CBMC/proofs/make_remove_makefiles.py
new file mode 100755
index 000000000..12d0c72f1
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/make_remove_makefiles.py
@@ -0,0 +1,48 @@
+#!/usr/bin/env python3
+#
+# Removing the generated Makefiles and cbmc-batch.yaml files.
+#
+# Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in all
+# copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+
+import os
+
+from make_cbmc_batch_files import remove_cbmc_yaml_files
+
+def main():
+    try:
+        os.remove("Makefile.common")
+    except FileNotFoundError:
+        pass
+
+    for root, _, files in os.walk("."):
+        # We do not want to remove hand-written Makefiles, so
+        # only remove Makefiles that are in the same directory as
+        # a Makefile.json. Such Makefiles are generated from the
+        # JSON file.
+        if "Makefile.json" in files:
+            try:
+                os.remove(os.path.join(root, "Makefile"))
+            except FileNotFoundError:
+                pass
+
+if __name__ == "__main__":
+    remove_cbmc_yaml_files()
+    main()
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/make_type_header_files.py b/FreeRTOS-Plus/Test/CBMC/proofs/make_type_header_files.py
new file mode 100755
index 000000000..a8ac66384
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/make_type_header_files.py
@@ -0,0 +1,162 @@
+#!/usr/bin/env python3
+#
+# Compute type header files for c modules
+#
+# Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in all
+# copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+
+
+import argparse
+import logging
+import os
+import re
+import shutil
+import subprocess
+import sys
+from tempfile import TemporaryDirectory
+
+def epilog():
+    return """\
+        This program dumps a header file containing the types and macros
+        contained in the C file passed as input. It uses `goto-instrument`
+        from the CBMC tool suite instead of the preprocessor, to dump types
+        and other constructs as well as preprocessor directives.
+
+        This program should be used in cases where types or macros declared
+        for internal use in a C file use are needed to write a test harness
+        or CBMC proof.  The intention is that the build process will run
+        this program to dump the header file, and the proof will #include
+        the header.
+    """
+
+_DEFINE_REGEX_HEADER = re.compile(r"\s*#\s*define\s*([\w]+)")
+
+
+def get_module_name(fyle):
+    base = os.path.basename(fyle)
+    return base.split(".")[0]
+
+
+def collect_defines(fyle):
+    collector_result = ""
+    continue_define = False
+    in_potential_def_scope = ""
+    potential_define = False
+    potential_define_confirmed = False
+    with open(fyle) as in_file:
+        for line in in_file:
+            matched = _DEFINE_REGEX_HEADER.match(line)
+            if line.strip().startswith("#if"):
+                potential_define = True
+                in_potential_def_scope += line
+            elif line.strip().startswith("#endif") and potential_define:
+                if potential_define_confirmed:
+                    in_potential_def_scope += line
+                    collector_result += in_potential_def_scope
+                in_potential_def_scope = ""
+                potential_define = False
+                potential_define_confirmed = False
+            elif matched and potential_define:
+                potential_define_confirmed = True
+                in_potential_def_scope += line
+            elif matched or continue_define:
+                continue_define = line.strip("\n").endswith("\\")
+                collector_result += line
+            elif potential_define:
+                in_potential_def_scope += line
+    return collector_result
+
+
+def make_header_file(goto_binary, fyle, target_folder):
+    fyle = os.path.normpath(fyle)
+    with TemporaryDirectory() as tmpdir:
+        module = get_module_name(fyle)
+        header_file = "{}_datastructure.h".format(module)
+
+        drop_header_cmd = ["goto-instrument",
+                           "--dump-c-type-header",
+                           module,
+                           goto_binary,
+                           header_file]
+        res = subprocess.run(drop_header_cmd,
+                             stdout=subprocess.PIPE,
+                             stderr=subprocess.STDOUT,
+                             universal_newlines=True,
+                             cwd=tmpdir)
+        if res.returncode:
+            logging.error("Dumping type header for file '%s' failed", fyle)
+            logging.error("The command `%s` returned %s",
+                          drop_header_cmd,
+                          res.stdout)
+            logging.error("The return code is %d", int(res.returncode))
+            sys.exit(1)
+
+        header = os.path.normpath(os.path.join(tmpdir, header_file))
+        collected = collect_defines(fyle)
+        logging.debug("Dumping the following header file to '%s':\n%s\n"
+                      "// END GENERATED HEADER FILE", header, collected)
+        with open(header, "a") as out:
+            print(collected, file=out)
+
+        target_file = os.path.normpath(os.path.join(target_folder, header_file))
+        shutil.move(header, target_file)
+
+
+_ARGS = [{
+    "flags": ["--c-file"],
+    "metavar": "F",
+    "help": "source file to extract types and headers from",
+    "required": True
+}, {
+    "flags": ["--binary"],
+    "metavar": "B",
+    "help": "file compiled from the source file with CBMC's goto-cc compiler",
+    "required": True
+}, {
+    "flags": ["--out-dir"],
+    "metavar": "D",
+    "help": ("directory to write the generated header file to "
+             "(default: %(default)s)"),
+    "default": os.path.abspath(os.getcwd()),
+}, {
+    "flags": ["--verbose", "-v"],
+    "help": "verbose output",
+    "action": "store_true"
+}]
+
+
+if __name__ == '__main__':
+    pars = argparse.ArgumentParser(
+        epilog=epilog(),
+        description="Dump a C file's types and macros to a separate file")
+    for arg in _ARGS:
+        flags = arg.pop("flags")
+        pars.add_argument(*flags, **arg)
+
+    args = pars.parse_args()
+
+    fmt = "{script}: %(levelname)s %(message)s".format(
+        script=os.path.basename(__file__))
+    if args.verbose:
+        logging.basicConfig(format=fmt, level=logging.DEBUG)
+    else:
+        logging.basicConfig(format=fmt, level=logging.INFO)
+
+    make_header_file(args.binary, args.c_file, args.out_dir)
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/ninja.py b/FreeRTOS-Plus/Test/CBMC/proofs/ninja.py
new file mode 100755
index 000000000..4bfd3c8d4
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/ninja.py
@@ -0,0 +1,219 @@
+#!/usr/bin/env python3
+
+"""
+Write a ninja build file to generate reports for cbmc proofs.
+
+Given a list of folders containing cbmc proofs, write a ninja build
+file the generate reports for these proofs.  The list of folders may
+be given on the command line, in a json file, or found in the file
+system.
+"""
+
+# Add task pool
+
+import sys
+import os
+import platform
+import argparse
+import json
+
+################################################################
+# The command line parser
+
+def argument_parser():
+    """Return the command line parser."""
+
+    parser = argparse.ArgumentParser(
+        description='Generate ninja build file for cbmc proofs.',
+        epilog="""
+            Given a list of folders containing cbmc proofs, write a ninja build
+            file the generate reports for these proofs.  The list of folders may
+            be given on the command line, in a json file, or found in the file
+            system.
+            In the json file, there should be a dict mapping the key "proofs"
+            to a list of folders containing proofs.
+            The file system, all folders folders under the current directory
+            containing a file named 'cbmc-batch.yaml' is considered a
+            proof folder.
+            This script assumes that the proof is driven by a Makefile
+            with targets goto, cbmc, coverage, property, and report.
+            This script does not work with Windows and Visual Studio.
+        """
+    )
+    parser.add_argument('folders', metavar='PROOF', nargs='*',
+                        help='Folder containing a cbmc proof')
+    parser.add_argument('--proofs', metavar='JSON',
+                        help='Json file listing folders containing cbmc proofs')
+    return parser
+
+################################################################
+# The list of folders containing proofs
+#
+# The list of folders will be taken from
+# 1. the list PROOFS defined here or
+# 2. the command line
+# 3. the json file specified on the command line containing a
+#    dict mapping the key JSON_KEY to a list of folders
+# 4. the folders below the current directory containing
+#    a file named FS_KEY
+#
+
+PROOFS = [
+]
+
+JSON_KEY = 'proofs'
+FS_KEY = 'cbmc-batch.yaml'
+
+def find_proofs_in_json_file(filename):
+    """Read the list of folders containing proofs from a json file."""
+
+    if not filename:
+        return []
+    try:
+        with open(filename) as proofs:
+            return json.load(proofs)[JSON_KEY]
+    except (FileNotFoundError, KeyError):
+        raise UserWarning("Can't find key {} in json file {}".format(JSON_KEY, filename))
+    except json.decoder.JSONDecodeError:
+        raise UserWarning("Can't parse json file {}".format(filename))
+
+def find_proofs_in_filesystem():
+    """Locate the folders containing proofs in the filesystem."""
+
+    proofs = []
+    for root, _, files in os.walk('.'):
+        if FS_KEY in files:
+            proofs.append(os.path.normpath(root))
+    return proofs
+
+################################################################
+# The strings used to write sections of the ninja file
+
+NINJA_RULES = """
+################################################################
+# task pool to force sequential builds of goto binaries
+
+pool goto_pool
+  depth = 1
+
+################################################################
+# proof target rules
+
+rule build_goto
+  command = make -C ${folder} goto
+  pool = goto_pool
+
+rule build_cbmc
+  command = make -C ${folder} cbmc
+
+rule build_coverage
+  command = make -C ${folder} coverage
+
+rule build_property
+  command = make -C ${folder} property
+
+rule build_report
+  command = make -C ${folder} report
+
+rule clean_folder
+  command = make -C ${folder} clean
+
+rule veryclean_folder
+  command = make -C ${folder} veryclean
+
+rule open_proof
+  command = open ${folder}/html/index.html
+
+"""
+
+NINJA_BUILDS = """
+################################################################
+# {folder} proof targets
+
+build {folder}/{entry}.goto: build_goto
+  folder={folder}
+
+build {folder}/cbmc.txt: build_cbmc {folder}/{entry}.goto
+  folder={folder}
+
+build {folder}/coverage.xml: build_coverage {folder}/{entry}.goto
+  folder={folder}
+
+build {folder}/property.xml: build_property {folder}/{entry}.goto
+  folder={folder}
+
+build {folder}/html/index.html: build_report {folder}/{entry}.goto {folder}/cbmc.txt {folder}/coverage.xml {folder}/property.xml
+  folder={folder}
+
+build clean_{folder}: clean_folder
+  folder={folder}
+
+build veryclean_{folder}: veryclean_folder
+  folder={folder}
+
+build open_{folder}: open_proof
+  folder={folder}
+
+build {folder}: phony {folder}/html/index.html
+
+default {folder}
+
+"""
+
+NINJA_GLOBALS = """
+################################################################
+# global targets
+
+build clean: phony {clean_targets}
+
+build veryclean: phony {veryclean_targets}
+
+build open: phony {open_targets}
+"""
+
+################################################################
+# The main function
+
+def get_entry(folder):
+    """Find the name of the proof in the proof Makefile."""
+
+    with open('{}/Makefile'.format(folder)) as makefile:
+        for line in makefile:
+            if line.strip().lower().startswith('entry'):
+                return line[line.find('=')+1:].strip()
+            if line.strip().lower().startswith('h_entry'):
+                return line[line.find('=')+1:].strip()
+    raise UserWarning("Can't find ENTRY in {}/Makefile".format(folder))
+
+def write_ninja_build_file():
+    """Write a ninja build file to generate proof results."""
+
+    if platform.system().lower() == 'windows':
+        print("This script does not run on Windows.")
+        sys.exit()
+
+    args = argument_parser().parse_args()
+
+    proofs = (PROOFS or
+              args.folders or
+              find_proofs_in_json_file(args.proofs) or
+              find_proofs_in_filesystem())
+
+    with open('build.ninja', 'w') as ninja:
+        ninja.write(NINJA_RULES)
+        for proof in proofs:
+            entry = get_entry(proof)
+            ninja.write(NINJA_BUILDS.format(folder=proof, entry=entry))
+        targets = lambda kind, folders: ' '.join(
+            ['{}_{}'.format(kind, folder) for folder in folders]
+        )
+        ninja.write(NINJA_GLOBALS.format(
+            clean_targets=targets('clean', proofs),
+            veryclean_targets=targets('veryclean', proofs),
+            open_targets=targets('open', proofs)
+        ))
+
+################################################################
+
+if __name__ == "__main__":
+    write_ninja_build_file()
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/parsing/ProcessIPPacket/Makefile.json b/FreeRTOS-Plus/Test/CBMC/proofs/parsing/ProcessIPPacket/Makefile.json
new file mode 100644
index 000000000..9ad1ef4e9
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/parsing/ProcessIPPacket/Makefile.json
@@ -0,0 +1,21 @@
+{
+  "ENTRY": "ProcessIPPacket",
+  "CBMCFLAGS":
+  [
+    "--unwind 1",
+    "--nondet-static"
+  ],
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_IP.goto"
+  ],
+  "DEF":
+  [
+    "FREERTOS_TCP_ENABLE_VERIFICATION"
+  ],
+  "INC":
+  [
+    "$(FREERTOS)/tools/cbmc/include"
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/parsing/ProcessIPPacket/ProcessIPPacket_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/parsing/ProcessIPPacket/ProcessIPPacket_harness.c
new file mode 100644
index 000000000..def244a51
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/parsing/ProcessIPPacket/ProcessIPPacket_harness.c
@@ -0,0 +1,29 @@
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "queue.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_IP_Private.h"
+
+/* proof is done separately */
+BaseType_t xProcessReceivedTCPPacket(NetworkBufferDescriptor_t *pxNetworkBuffer) { }
+
+/* proof is done separately */
+BaseType_t xProcessReceivedUDPPacket(NetworkBufferDescriptor_t *pxNetworkBuffer, uint16_t usPort) { }
+
+/* This proof was done before. Hence we assume it to be correct here. */
+void vARPRefreshCacheEntry( const MACAddress_t * pxMACAddress, const uint32_t ulIPAddress ) { }
+
+eFrameProcessingResult_t publicProcessIPPacket( IPPacket_t * const pxIPPacket, NetworkBufferDescriptor_t * const pxNetworkBuffer);
+
+void harness() {
+
+	NetworkBufferDescriptor_t * const pxNetworkBuffer = malloc(sizeof(NetworkBufferDescriptor_t));
+	/* Pointer to the start of the Ethernet frame. It should be able to access the whole Ethernet frame.*/
+	pxNetworkBuffer->pucEthernetBuffer = malloc(ipTOTAL_ETHERNET_FRAME_SIZE);
+	/* Minimum length of the pxNetworkBuffer->xDataLength is at least the size of the IPPacket_t. */
+	__CPROVER_assume(pxNetworkBuffer->xDataLength >= sizeof(IPPacket_t)  && pxNetworkBuffer->xDataLength <= ipTOTAL_ETHERNET_FRAME_SIZE);
+	IPPacket_t * const pxIPPacket = malloc(sizeof(IPPacket_t));
+	publicProcessIPPacket(pxIPPacket, pxNetworkBuffer);
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/parsing/ProcessReceivedTCPPacket/Makefile.json b/FreeRTOS-Plus/Test/CBMC/proofs/parsing/ProcessReceivedTCPPacket/Makefile.json
new file mode 100644
index 000000000..901a72729
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/parsing/ProcessReceivedTCPPacket/Makefile.json
@@ -0,0 +1,31 @@
+{
+  "ENTRY": "ProcessReceivedTCPPacket",
+  "CBMCFLAGS":
+  [
+    "--unwind 1",
+    "--unwindset prvTCPSendRepeated.0:13",
+    "--nondet-static"
+  ],
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_TCP_IP.goto"
+  ],
+  "INSTFLAGS":
+  [
+    "--remove-function-body prvSingleStepTCPHeaderOptions",
+    "--remove-function-body prvCheckOptions",
+    "--remove-function-body prvTCPPrepareSend",
+    "--remove-function-body prvTCPReturnPacket",
+    "--remove-function-body prvTCPHandleState"
+  ],
+  "DEF":
+  [
+    "FREERTOS_TCP_ENABLE_VERIFICATION"
+  ],
+  "INC":
+  [
+    "$(FREERTOS)/tools/cbmc/include"
+  ]
+}
+
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/parsing/ProcessReceivedTCPPacket/ProcessReceivedTCPPacket_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/parsing/ProcessReceivedTCPPacket/ProcessReceivedTCPPacket_harness.c
new file mode 100644
index 000000000..bf84ecf05
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/parsing/ProcessReceivedTCPPacket/ProcessReceivedTCPPacket_harness.c
@@ -0,0 +1,62 @@
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "queue.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOS_TCP_IP.h"
+#include "FreeRTOS_Stream_Buffer.h"
+
+/* This proof assumes FreeRTOS_socket, pxTCPSocketLookup and 
+pxGetNetworkBufferWithDescriptor are implemented correctly.
+
+It also assumes prvSingleStepTCPHeaderOptions, prvCheckOptions, prvTCPPrepareSend,
+prvTCPHandleState and prvTCPReturnPacket are correct. These functions are
+proved to be correct separately. */
+
+/* Implementation of safe malloc */
+void *safeMalloc(size_t xWantedSize ){
+	if(xWantedSize == 0){
+		return NULL;
+	}
+	uint8_t byte;
+	return byte ? malloc(xWantedSize) : NULL;
+}
+
+/* Abstraction of FreeRTOS_socket */
+Socket_t FreeRTOS_socket( BaseType_t xDomain, BaseType_t xType, BaseType_t xProtocol) {
+	return safeMalloc(sizeof(FreeRTOS_Socket_t));
+}
+
+/* Abstraction of pxTCPSocketLookup */
+FreeRTOS_Socket_t *pxTCPSocketLookup(uint32_t ulLocalIP, UBaseType_t uxLocalPort, uint32_t ulRemoteIP, UBaseType_t uxRemotePort) {
+	FreeRTOS_Socket_t * xRetSocket = safeMalloc(sizeof(FreeRTOS_Socket_t));
+	if (xRetSocket) {
+		xRetSocket->u.xTCP.txStream = safeMalloc(sizeof(StreamBuffer_t));
+		xRetSocket->u.xTCP.pxPeerSocket = safeMalloc(sizeof(StreamBuffer_t));
+	}	
+	return xRetSocket;
+}
+
+/* Abstraction of pxGetNetworkBufferWithDescriptor */
+NetworkBufferDescriptor_t *pxGetNetworkBufferWithDescriptor( size_t xRequestedSizeBytes, TickType_t xBlockTimeTicks ){
+	NetworkBufferDescriptor_t *pxNetworkBuffer = safeMalloc(sizeof(NetworkBufferDescriptor_t));
+	if(pxNetworkBuffer) {
+		pxNetworkBuffer->pucEthernetBuffer = safeMalloc(xRequestedSizeBytes);
+		__CPROVER_assume(pxNetworkBuffer->xDataLength == ipSIZE_OF_ETH_HEADER + sizeof(int32_t));
+	}	
+	return pxNetworkBuffer;
+}
+
+void harness() {
+	NetworkBufferDescriptor_t *pxNetworkBuffer = safeMalloc(sizeof(NetworkBufferDescriptor_t));
+	if (pxNetworkBuffer) {
+		pxNetworkBuffer->pucEthernetBuffer = safeMalloc(sizeof(TCPPacket_t));
+	}
+	if (pxNetworkBuffer && pxNetworkBuffer->pucEthernetBuffer) {
+		xProcessReceivedTCPPacket(pxNetworkBuffer);
+
+	}
+
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/parsing/ProcessReceivedUDPPacket/Makefile.json b/FreeRTOS-Plus/Test/CBMC/proofs/parsing/ProcessReceivedUDPPacket/Makefile.json
new file mode 100644
index 000000000..017f625f0
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/parsing/ProcessReceivedUDPPacket/Makefile.json
@@ -0,0 +1,23 @@
+{
+  "ENTRY": "ProcessReceivedUDPPacket",
+  "MAX_RX_PACKETS":1,
+  "USE_LLMNR":1,
+  "USE_NBNS":1,
+  "CBMCFLAGS":
+  [
+    "--unwind 1",
+    "--nondet-static"
+  ],
+  "OBJS":
+  [
+    "$(ENTRY)_harness.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_UDP_IP.goto",
+    "$(FREERTOS)/../FreeRTOS-Plus/Source/FreeRTOS-Plus-TCP/FreeRTOS_IP.goto"
+  ],
+  "DEF":
+  [
+    "ipconfigUDP_MAX_RX_PACKETS={MAX_RX_PACKETS}",
+    "ipconfigUSE_LLMNR={USE_LLMNR}",
+    "ipconfigUSE_NBNS={USE_NBNS}"
+  ]
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/parsing/ProcessReceivedUDPPacket/ProcessReceivedUDPPacket_harness.c b/FreeRTOS-Plus/Test/CBMC/proofs/parsing/ProcessReceivedUDPPacket/ProcessReceivedUDPPacket_harness.c
new file mode 100644
index 000000000..0082e5d61
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/parsing/ProcessReceivedUDPPacket/ProcessReceivedUDPPacket_harness.c
@@ -0,0 +1,46 @@
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "queue.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOS_ARP.h"
+#include "FreeRTOS_UDP_IP.h"
+#include "FreeRTOS_TCP_IP.h"
+
+/*This proof assumes that pxUDPSocketLookup is implemented correctly. */
+
+/* This proof was done before. Hence we assume it to be correct here. */
+void vARPRefreshCacheEntry(const MACAddress_t * pxMACAddress, const uint32_t ulIPAddress) { }
+
+/* This proof was done before. Hence we assume it to be correct here. */
+BaseType_t xIsDHCPSocket(Socket_t xSocket) { }
+
+/* This proof was done before. Hence we assume it to be correct here. */
+uint32_t ulDNSHandlePacket(NetworkBufferDescriptor_t *pxNetworkBuffer) { }
+
+/* Implementation of safe malloc */
+void *safeMalloc(size_t xWantedSize) {
+	if(xWantedSize == 0) {
+		return NULL;
+	}
+	uint8_t byte;
+	return byte ? malloc(xWantedSize) : NULL;
+}
+
+/* Abstraction of pxUDPSocketLookup */
+FreeRTOS_Socket_t *pxUDPSocketLookup( UBaseType_t uxLocalPort ) {
+	return safeMalloc(sizeof(FreeRTOS_Socket_t));
+}
+
+void harness() {
+	NetworkBufferDescriptor_t *pxNetworkBuffer = safeMalloc(sizeof(NetworkBufferDescriptor_t));
+	if(pxNetworkBuffer) {
+		pxNetworkBuffer->pucEthernetBuffer = safeMalloc(sizeof(UDPPacket_t));
+	}
+	uint16_t usPort;
+	if (pxNetworkBuffer && pxNetworkBuffer->pucEthernetBuffer) {
+		xProcessReceivedUDPPacket(pxNetworkBuffer, usPort);
+	}
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/prepare.py b/FreeRTOS-Plus/Test/CBMC/proofs/prepare.py
new file mode 100755
index 000000000..58f9903db
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/prepare.py
@@ -0,0 +1,115 @@
+#!/usr/bin/env python3
+#
+# Python script for preparing the code base for the CBMC proofs.
+#
+# Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in all
+# copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+
+import logging
+import os
+import sys
+import textwrap
+from subprocess import CalledProcessError
+
+from make_common_makefile import main as make_common_file
+from make_configuration_directories import main as process_configurations
+from make_proof_makefiles import main as make_proof_files
+from make_cbmc_batch_files import create_cbmc_yaml_files
+
+CWD = os.getcwd()
+sys.path.append(os.path.normpath(os.path.join(CWD, "..", "patches")))
+
+#from compute_patch import create_patches
+#from compute_patch import DirtyGitError
+#from compute_patch import PatchCreationError
+from patches_constants import HEADERS
+
+from compute_patch import find_all_defines
+from compute_patch import manipulate_headerfile
+
+import patch
+
+PROOFS_DIR = os.path.dirname(os.path.abspath(__file__))
+
+LOGGER = logging.getLogger("PrepareLogger")
+
+################################################################
+
+def patch_headers(headers):
+    """Patch headers so we can define symbols on the command line.
+
+    When building for CBMC, it is convenient to define symbols on the
+    command line and know that these definitions will override the
+    definitions of the same symbols in header files.
+
+    The create_patches function takes a list of header files, searches
+    the Makefile.json files for symbols that will be defined in the
+    Makefiles, and creates patch files that protect the definition of
+    those symbols in header files with #ifndef/#endif.  In this way,
+    command line definitions will override header file definitions.
+
+    The create_patches function, however, depends on the fact that all
+    header files being modified are included in the top-level git
+    repository.  This assumption is violated if header files live in
+    submodules.
+
+    This function just updates the header files in place without
+    creating patch files.  One potential vulnerability of this
+    function is that it could cause preexisting patch files to fail if
+    they patch a file being modified here.
+    """
+    defines = find_all_defines()
+    for header in headers:
+        manipulate_headerfile(defines, header)
+
+################################################################
+
+def build():
+    process_configurations()
+    make_common_file()
+    make_proof_files()
+    try:
+        create_cbmc_yaml_files()
+    except CalledProcessError as e:
+        logging.error(textwrap.dedent("""\
+            An error occured during cbmc-batch generation.
+            The error message is: {}
+            """.format(str(e))))
+        exit(1)
+
+    # Patch headers directly instead of creating patch files.
+    patch.patch()
+    patch_headers(HEADERS)
+
+    #try:
+    #    create_patches(HEADERS)
+    #except (DirtyGitError, PatchCreationError) as e:
+    #    logging.error(textwrap.dedent("""\
+    #        An error occured during patch creation.
+    #        The error message is: {}
+    #        """.format(str(e))))
+    #    exit(1)
+
+################################################################
+
+if __name__ == '__main__':
+    logging.basicConfig(format="{script}: %(levelname)s %(message)s".format(
+        script=os.path.basename(__file__)))
+    build()
diff --git a/FreeRTOS-Plus/Test/CBMC/proofs/utility/memory_assignments.c b/FreeRTOS-Plus/Test/CBMC/proofs/utility/memory_assignments.c
new file mode 100644
index 000000000..6bcb9319a
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/proofs/utility/memory_assignments.c
@@ -0,0 +1,24 @@
+#define ensure_memory_is_valid( px, length ) (px != NULL) && __CPROVER_w_ok((px), length)
+
+/* Implementation of safe malloc which returns NULL if the requested size is 0.
+ Warning: The behavior of malloc(0) is platform dependent.
+ It is possible for malloc(0) to return an address without allocating memory.*/
+void *safeMalloc(size_t xWantedSize) {
+        return nondet_bool() ? malloc(xWantedSize) : NULL;
+}
+
+/* Memory assignment for FreeRTOS_Socket_t */
+FreeRTOS_Socket_t * ensure_FreeRTOS_Socket_t_is_allocated () {
+	FreeRTOS_Socket_t *pxSocket = safeMalloc(sizeof(FreeRTOS_Socket_t));
+	if (ensure_memory_is_valid(pxSocket, sizeof(FreeRTOS_Socket_t))) {
+		pxSocket->u.xTCP.rxStream = safeMalloc(sizeof(StreamBuffer_t));
+		pxSocket->u.xTCP.txStream = safeMalloc(sizeof(StreamBuffer_t));
+		pxSocket->u.xTCP.pxPeerSocket = safeMalloc(sizeof(FreeRTOS_Socket_t));
+	}
+	return pxSocket;
+}
+
+/* Memory assignment for FreeRTOS_Network_Buffer */
+NetworkBufferDescriptor_t * ensure_FreeRTOS_NetworkBuffer_is_allocated () {
+	return safeMalloc(sizeof(NetworkBufferDescriptor_t));
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/stubs/cbmc.c b/FreeRTOS-Plus/Test/CBMC/stubs/cbmc.c
new file mode 100644
index 000000000..73ad21893
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/stubs/cbmc.c
@@ -0,0 +1,12 @@
+#include "cbmc.h"
+
+/****************************************************************
+ * Model a malloc that can fail (CBMC malloc does not fail) and
+ * check that CBMC can model an object of the requested size.
+ ****************************************************************/
+
+void * safeMalloc( size_t size )
+{
+    __CPROVER_assert( size < CBMC_MAX_OBJECT_SIZE, "safeMalloc size too big" );
+    return nondet_bool() ? NULL : malloc( size );
+}
diff --git a/FreeRTOS-Plus/Test/CBMC/stubs/freertos_api.c b/FreeRTOS-Plus/Test/CBMC/stubs/freertos_api.c
new file mode 100644
index 000000000..668f8b941
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/stubs/freertos_api.c
@@ -0,0 +1,379 @@
+/* Standard includes. */
+#include <stdint.h>
+#include <stdio.h>
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "queue.h"
+#include "semphr.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_UDP_IP.h"
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_Sockets.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOS_DNS.h"
+#include "NetworkBufferManagement.h"
+
+#include "cbmc.h"
+
+/****************************************************************
+ * This is a collection of abstractions of methods in the FreeRTOS TCP
+ * API.  The abstractions simply perform minimal validation of
+ * function arguments, and return unconstrained values of the
+ * appropriate type.
+ ****************************************************************/
+
+/****************************************************************
+ * Abstract FreeRTOS_socket.
+ * https://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/API/socket.html
+ *
+ * We stub out this function to do nothing but allocate space for a
+ * socket containing unconstrained data or return an error.
+ ****************************************************************/
+
+Socket_t FreeRTOS_socket( BaseType_t xDomain,
+                          BaseType_t xType,
+                          BaseType_t xProtocol )
+{
+    return nondet_bool() ?
+           FREERTOS_INVALID_SOCKET : malloc( sizeof( Socket_t ) );
+}
+
+/****************************************************************
+ * Abstract FreeRTOS_setsockopt.
+ * https://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/API/setsockopt.html
+ ****************************************************************/
+
+BaseType_t FreeRTOS_setsockopt( Socket_t xSocket,
+                                int32_t lLevel,
+                                int32_t lOptionName,
+                                const void * pvOptionValue,
+                                size_t uxOptionLength )
+{
+    __CPROVER_assert( xSocket != NULL,
+                      "FreeRTOS precondition: xSocket != NULL" );
+    __CPROVER_assert( pvOptionValue != NULL,
+                      "FreeRTOS precondition: pvOptionValue != NULL" );
+    return nondet_BaseType();
+}
+
+/****************************************************************
+ * Abstract FreeRTOS_closesocket.
+ * https://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/API/close.html
+ ****************************************************************/
+
+BaseType_t FreeRTOS_closesocket( Socket_t xSocket )
+{
+    __CPROVER_assert( xSocket != NULL,
+                      "FreeRTOS precondition: xSocket != NULL" );
+    return nondet_BaseType();
+}
+
+/****************************************************************
+ * Abstract FreeRTOS_bind.
+ * https://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/API/bind.html
+ ****************************************************************/
+
+BaseType_t FreeRTOS_bind( Socket_t xSocket,
+                          struct freertos_sockaddr * pxAddress,
+                          socklen_t xAddressLength )
+{
+    __CPROVER_assert( xSocket != NULL,
+                      "FreeRTOS precondition: xSocket != NULL" );
+    __CPROVER_assert( pxAddress != NULL,
+                      "FreeRTOS precondition: pxAddress != NULL" );
+    return nondet_BaseType();
+}
+
+/****************************************************************
+ * Abstract FreeRTOS_inet_addr.
+ * https://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/API/inet_addr.html
+ ****************************************************************/
+
+uint32_t FreeRTOS_inet_addr( const char * pcIPAddress )
+{
+    __CPROVER_assert( pcIPAddress != NULL,
+                      "FreeRTOS precondition: pcIPAddress != NULL" );
+    return nondet_uint32();
+}
+
+/****************************************************************
+ * Abstract FreeRTOS_recvfrom.
+ * https://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/API/recvfrom.html
+ *
+ * We stub out this function to do nothing but allocate a buffer of
+ * unconstrained size containing unconstrained data and return the
+ * size (or return the size 0 if the allocation fails).
+ ****************************************************************/
+
+int32_t FreeRTOS_recvfrom( Socket_t xSocket,
+                           void * pvBuffer,
+                           size_t uxBufferLength,
+                           BaseType_t xFlags,
+                           struct freertos_sockaddr * pxSourceAddress,
+                           socklen_t * pxSourceAddressLength )
+
+{
+    /****************************************************************
+     * "If the zero copy calling semantics are used (the ulFlasg
+     * parameter does not have the FREERTOS_ZERO_COPY bit set) then
+     * pvBuffer does not point to a buffer and xBufferLength is not
+     * used."  This is from the documentation.
+     ****************************************************************/
+    __CPROVER_assert( xFlags & FREERTOS_ZERO_COPY, "I can only do ZERO_COPY" );
+
+    __CPROVER_assert( pvBuffer != NULL,
+                      "FreeRTOS precondition: pvBuffer != NULL" );
+
+    /****************************************************************
+     * TODO: We need to check this out.
+     *
+     * The code calls recvfrom with these parameters NULL, it is not
+     * clear from the documentation that this is allowed.
+     ****************************************************************/
+    #if 0
+        __CPROVER_assert( pxSourceAddress != NULL,
+                          "FreeRTOS precondition: pxSourceAddress != NULL" );
+        __CPROVER_assert( pxSourceAddressLength != NULL,
+                          "FreeRTOS precondition: pxSourceAddress != NULL" );
+    #endif
+
+    size_t payload_size;
+    __CPROVER_assume( payload_size + sizeof( UDPPacket_t )
+		      < CBMC_MAX_OBJECT_SIZE );
+
+    /****************************************************************
+     * TODO: We need to make this lower bound explicit in the Makefile.json
+     *
+     * DNSMessage_t is a typedef in FreeRTOS_DNS.c
+     * sizeof(DNSMessage_t) = 6 * sizeof(uint16_t)
+     ****************************************************************/
+    __CPROVER_assume( payload_size >= 6 * sizeof( uint16_t ) );
+
+    #ifdef CBMC_FREERTOS_RECVFROM_BUFFER_BOUND
+        __CPROVER_assume( payload_size <= CBMC_FREERTOS_RECVFROM_BUFFER_BOUND );
+    #endif
+
+    uint32_t buffer_size = payload_size + sizeof( UDPPacket_t );
+    uint8_t *buffer = safeMalloc( buffer_size );
+	
+    if ( buffer == NULL ) {
+      buffer_size = 0;
+    }
+    else
+    {
+      buffer = buffer + sizeof( UDPPacket_t );
+      buffer_size = buffer_size - sizeof( UDPPacket_t );
+    }
+    
+    *( ( uint8_t ** ) pvBuffer ) = buffer;
+    return buffer_size;
+}
+
+/****************************************************************
+ * Abstract FreeRTOS_recvfrom.
+ * https://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/API/sendto.html
+ ****************************************************************/
+
+int32_t FreeRTOS_sendto( Socket_t xSocket,
+                         const void * pvBuffer,
+                         size_t uxTotalDataLength,
+                         BaseType_t xFlags,
+                         const struct freertos_sockaddr * pxDestinationAddress,
+                         socklen_t xDestinationAddressLength )
+{
+    __CPROVER_assert( xSocket != NULL,
+                      "FreeRTOS precondition: xSocket != NULL" );
+    __CPROVER_assert( pvBuffer != NULL,
+                      "FreeRTOS precondition: pvBuffer != NULL" );
+    __CPROVER_assert( pxDestinationAddress != NULL,
+                      "FreeRTOS precondition: pxDestinationAddress != NULL" );
+    return nondet_int32();
+}
+
+/****************************************************************
+ * Abstract FreeRTOS_GetUDPPayloadBuffer
+ * https://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_UDP/API/FreeRTOS_GetUDPPayloadBuffer.html
+ *
+ * We stub out this function to do nothing but allocate a buffer of
+ * unconstrained size containing unconstrained data and return a
+ * pointer to the buffer (or NULL).
+ ****************************************************************/
+
+void * FreeRTOS_GetUDPPayloadBuffer( size_t xRequestedSizeBytes,
+                                     TickType_t xBlockTimeTicks )
+{
+    size_t size;
+
+    __CPROVER_assume( size < CBMC_MAX_OBJECT_SIZE );
+    __CPROVER_assume( size >= sizeof( UDPPacket_t ) );
+
+    uint8_t *buffer = safeMalloc( size );
+    return buffer == NULL ? buffer : buffer + sizeof( UDPPacket_t );
+}
+
+/****************************************************************
+ * Abstract FreeRTOS_GetUDPPayloadBuffer
+ * https://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/API/FreeRTOS_ReleaseUDPPayloadBuffer.html
+ ****************************************************************/
+
+void FreeRTOS_ReleaseUDPPayloadBuffer( void * pvBuffer )
+{
+    __CPROVER_assert( pvBuffer != NULL,
+                      "FreeRTOS precondition: pvBuffer != NULL" );
+    __CPROVER_assert( __CPROVER_POINTER_OFFSET( pvBuffer )
+		      == sizeof( UDPPacket_t ),
+                      "FreeRTOS precondition: pvBuffer offset" );
+
+    free( pvBuffer - sizeof( UDPPacket_t ) );
+}
+
+/****************************************************************
+ * Abstract pxGetNetworkBufferWithDescriptor.
+ * https://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/API/pxGetNetworkBufferWithDescriptor.html
+ *
+ * The real allocator take buffers off a list.
+ ****************************************************************/
+
+uint32_t GetNetworkBuffer_failure_count;
+
+NetworkBufferDescriptor_t * pxGetNetworkBufferWithDescriptor( size_t xRequestedSizeBytes,
+                                                              TickType_t xBlockTimeTicks )
+{
+    __CPROVER_assert(
+        xRequestedSizeBytes + ipBUFFER_PADDING < CBMC_MAX_OBJECT_SIZE,
+        "pxGetNetworkBufferWithDescriptor: request too big" );
+
+    /*
+      * The semantics of this function is to wait until a buffer with
+      * at least the requested number of bytes becomes available.  If a
+      * timeout occurs before the buffer is available, then return a
+      * NULL pointer.
+      */
+
+    NetworkBufferDescriptor_t * desc = safeMalloc( sizeof( *desc ) );
+
+    #ifdef CBMC_GETNETWORKBUFFER_FAILURE_BOUND
+        /*
+          * This interprets the failure bound as being one greater than the
+          * actual number of times GetNetworkBuffer should be allowed to
+          * fail.
+          *
+          * This makes it possible to use the same bound for loop unrolling
+          * which must be one greater than the actual number of times the
+          * loop should be unwound.
+          *
+          * NOTE: Using this bound with --nondet-static requires setting
+          * (or assuming) GetNetworkBuffer_failure_count to a value (like 0)
+          * in the proof harness that won't induce an integer overflow.
+          */
+        GetNetworkBuffer_failure_count++;
+        __CPROVER_assume(
+	    IMPLIES(
+	        GetNetworkBuffer_failure_count >= CBMC_GETNETWORKBUFFER_FAILURE_BOUND,
+		desc != NULL ) );
+    #endif
+
+    if( desc != NULL )
+    {
+        /*
+          * We may want to experiment with allocating space other than
+          * (more than) the exact amount of space requested.
+          */
+
+        size_t size = xRequestedSizeBytes;
+        __CPROVER_assume( size < CBMC_MAX_OBJECT_SIZE );
+
+        desc->pucEthernetBuffer = safeMalloc( size );
+        desc->xDataLength = desc->pucEthernetBuffer == NULL ? 0 : size;
+
+        #ifdef CBMC_REQUIRE_NETWORKBUFFER_ETHERNETBUFFER_NONNULL
+            /* This may be implied by the semantics of the function. */
+            __CPROVER_assume( desc->pucEthernetBuffer != NULL );
+        #endif
+
+	/* Allow method to fail again next time */
+	GetNetworkBuffer_failure_count = 0;
+    }
+
+    return desc;
+}
+
+/****************************************************************
+ * Abstract pxGetNetworkBufferWithDescriptor.
+ * https://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/API/vReleaseNetworkBufferAndDescriptor.html
+ ****************************************************************/
+
+void vReleaseNetworkBufferAndDescriptor( NetworkBufferDescriptor_t * const pxNetworkBuffer )
+{
+    __CPROVER_assert( pxNetworkBuffer != NULL,
+                      "Precondition: pxNetworkBuffer != NULL" );
+
+    if( pxNetworkBuffer->pucEthernetBuffer != NULL )
+    {
+        free( pxNetworkBuffer->pucEthernetBuffer );
+    }
+
+    free( pxNetworkBuffer );
+}
+
+/****************************************************************
+ * Abstract FreeRTOS_GetAddressConfiguration
+ * https://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/API/FreeRTOS_GetAddressConfiguration.html
+ ****************************************************************/
+
+void FreeRTOS_GetAddressConfiguration( uint32_t * pulIPAddress,
+                                       uint32_t * pulNetMask,
+                                       uint32_t * pulGatewayAddress,
+                                       uint32_t * pulDNSServerAddress )
+{
+    if( pulIPAddress != NULL )
+    {
+        *pulIPAddress = nondet_unint32();
+    }
+
+    if( pulNetMask != NULL )
+    {
+        *pulNetMask = nondet_unint32();
+    }
+
+    if( pulGatewayAddress != NULL )
+    {
+        *pulGatewayAddress = nondet_unint32();
+    }
+
+    if( pulDNSServerAddress != NULL )
+    {
+        *pulDNSServerAddress = nondet_unint32();
+    }
+}
+
+/****************************************************************/
+
+/****************************************************************
+ * This is a collection of methods that are defined by the user
+ * application but are invoked by the FreeRTOS API.
+ ****************************************************************/
+
+/****************************************************************
+ * Abstract FreeRTOS_GetAddressConfiguration
+ * https://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/API/vApplicationIPNetworkEventHook.html
+ ****************************************************************/
+
+void vApplicationIPNetworkEventHook( eIPCallbackEvent_t eNetworkEvent )
+{
+}
+
+/****************************************************************
+ * Abstract pcApplicationHostnameHook
+ * https://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/TCP_IP_Configuration.html
+ ****************************************************************/
+
+const char * pcApplicationHostnameHook( void )
+{
+    return "hostname";
+}
+
+/****************************************************************/
diff --git a/FreeRTOS-Plus/Test/CBMC/windows/README.md b/FreeRTOS-Plus/Test/CBMC/windows/README.md
new file mode 100644
index 000000000..e9f415060
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/windows/README.md
@@ -0,0 +1,2 @@
+This directory contains include files used by the CBMC proofs:
+* Windows.h and WinBase.h are include files used to build FreeRTOS (the parts we currently test) on Linux
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/CBMC/windows/WinBase.h b/FreeRTOS-Plus/Test/CBMC/windows/WinBase.h
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/windows/WinBase.h
diff --git a/FreeRTOS-Plus/Test/CBMC/windows/Windows.h b/FreeRTOS-Plus/Test/CBMC/windows/Windows.h
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/windows/Windows.h
diff --git a/FreeRTOS-Plus/Test/CBMC/windows/direct.h b/FreeRTOS-Plus/Test/CBMC/windows/direct.h
new file mode 100644
index 000000000..8b1378917
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/windows/direct.h
@@ -0,0 +1 @@
+
diff --git a/FreeRTOS-Plus/Test/CBMC/windows2/windows.h b/FreeRTOS-Plus/Test/CBMC/windows2/windows.h
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CBMC/windows2/windows.h
diff --git a/FreeRTOS-Plus/Test/CMock/.gitattributes b/FreeRTOS-Plus/Test/CMock/.gitattributes
new file mode 100644
index 000000000..ad952260b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/.gitattributes
@@ -0,0 +1,30 @@
+*           text=auto
+
+# These files are text and should be normalized (convert crlf to lf)
+*.rb        text
+*.test      text
+*.c         text
+*.cpp       text
+*.h         text
+*.txt       text
+*.yml       text
+*.s79       text
+*.bat       text
+*.xcl       text
+*.inc       text
+*.info      text
+*.md        text
+makefile    text
+rakefile    text
+
+
+#These files are binary and should not be normalized
+*.doc       binary
+*.odt       binary
+*.pdf       binary
+*.ewd       binary
+*.eww       binary
+*.dni       binary
+*.wsdt      binary
+*.dbgdt     binary
+*.mac       binary
diff --git a/FreeRTOS-Plus/Test/CMock/.gitignore b/FreeRTOS-Plus/Test/CMock/.gitignore
new file mode 100644
index 000000000..14f99d0e8
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/.gitignore
@@ -0,0 +1,9 @@
+test/system/build
+test/system/generated
+*.sublime-project
+Gemfile.lock
+.rake_t_cache
+.DS_Store
+*.swp
+examples/make_example/build
+examples/temp_sensor/build
diff --git a/FreeRTOS-Plus/Test/CMock/.gitmodules b/FreeRTOS-Plus/Test/CMock/.gitmodules
new file mode 100644
index 000000000..af418942b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/.gitmodules
@@ -0,0 +1,8 @@
+[submodule "vendor/unity"]
+	path = vendor/unity
+	url = https://github.com/throwtheswitch/unity.git
+	branch = master
+[submodule "vendor/c_exception"]
+	path = vendor/c_exception
+	url = https://github.com/throwtheswitch/cexception.git
+	branch = master
diff --git a/FreeRTOS-Plus/Test/CMock/.travis.yml b/FreeRTOS-Plus/Test/CMock/.travis.yml
new file mode 100644
index 000000000..d9e84ad22
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/.travis.yml
@@ -0,0 +1,28 @@
+sudo: required
+language: ruby c
+
+matrix:
+ include:
+    #- os: osx
+    #  compiler: clang
+    #  osx_image: xcode7.3
+    - os: linux
+      dist: trusty
+      rvm: "2.4"
+      compiler: gcc
+    - os: linux
+      dist: xenial
+      rvm: "2.7"
+      compiler: clang
+
+before_install:
+  - sudo apt-get install --assume-yes --quiet gcc-multilib
+
+install:
+  - gem install bundler
+  - bundle install
+  - gem install rspec
+  - gem install rubocop -v 0.57.2
+
+script:
+  - cd test && rake ci
diff --git a/FreeRTOS-Plus/Test/CMock/Gemfile b/FreeRTOS-Plus/Test/CMock/Gemfile
new file mode 100644
index 000000000..96ac06ec6
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/Gemfile
@@ -0,0 +1,8 @@
+source "http://rubygems.org/"
+
+gem "bundler"
+gem "rake"
+gem "minitest"
+gem "require_all"
+gem "constructor"
+gem "diy"
diff --git a/FreeRTOS-Plus/Test/CMock/LICENSE.txt b/FreeRTOS-Plus/Test/CMock/LICENSE.txt
new file mode 100644
index 000000000..98167e40c
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/LICENSE.txt
@@ -0,0 +1,19 @@
+Copyright (c) 2007-14 Mike Karlesky, Mark VanderVoord, Greg Williams
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+THE SOFTWARE.
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/CMock/README.md b/FreeRTOS-Plus/Test/CMock/README.md
new file mode 100644
index 000000000..112007367
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/README.md
@@ -0,0 +1,34 @@
+CMock - Mock/stub generator for C
+=================================
+
+[![CMock Build Status](https://api.travis-ci.org/ThrowTheSwitch/CMock.png?branch=master)](https://travis-ci.org/ThrowTheSwitch/CMock)
+
+Getting Started
+================
+
+If you're using Ceedling, there is no need to install CMock. It will handle it for you.
+For everyone else, the simplest way is to grab it off github. You can also download it
+as a zip if you prefer. The Github method looks something like this:
+
+    > git clone --recursive https://github.com/throwtheswitch/cmock.git
+    > cd cmock
+    > bundle install # Ensures you have all RubyGems needed
+
+If you plan to help with the development of CMock (or just want to verify that it can
+perform its self tests on your system) then you can enter the test directory and then
+ask it to test:
+
+    > cd test
+    > rake # Run all CMock self tests
+
+API Documentation
+=================
+
+* Not sure what you're doing?
+	* [View docs/CMock_Summary.md](docs/CMock_Summary.md)
+* Interested in our MIT-style license?
+	* [View docs/license.txt](docs/license.txt)
+* Are there examples?
+	* They are all in [/examples](examples/)
+* Any other resources to check out?
+	* Definitely! Check out our developer portal on [ThrowTheSwitch.org](http://throwtheswitch.org)
diff --git a/FreeRTOS-Plus/Test/CMock/config/production_environment.rb b/FreeRTOS-Plus/Test/CMock/config/production_environment.rb
new file mode 100644
index 000000000..082b63fde
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/config/production_environment.rb
@@ -0,0 +1,12 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+# Setup our load path:
+[
+  'lib'
+].each do |dir|
+  $:.unshift(File.join(__dir__ + '/../', dir))
+end
diff --git a/FreeRTOS-Plus/Test/CMock/config/test_environment.rb b/FreeRTOS-Plus/Test/CMock/config/test_environment.rb
new file mode 100644
index 000000000..aeae3a342
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/config/test_environment.rb
@@ -0,0 +1,16 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+# Setup our load path:
+[
+  './lib',
+  './vendor/behaviors/lib',
+  './vendor/hardmock/lib',
+  './vendor/unity/auto/',
+  './test/system/'
+].each do |dir|
+  $:.unshift(File.join(File.expand_path(File.dirname(__FILE__) + '/../'), dir))
+end
diff --git a/FreeRTOS-Plus/Test/CMock/docs/CMock_Summary.md b/FreeRTOS-Plus/Test/CMock/docs/CMock_Summary.md
new file mode 100644
index 000000000..fa7904bbe
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/docs/CMock_Summary.md
@@ -0,0 +1,806 @@
+CMock: A Summary
+================
+
+*[ThrowTheSwitch.org](http://throwtheswitch.org)*
+
+*This documentation is released under a Creative Commons 3.0 Attribution Share-Alike License*
+
+
+What Exactly Are We Talking About Here?
+---------------------------------------
+
+CMock is a nice little tool which takes your header files and creates
+a Mock interface for it so that you can more easily unit test modules
+that touch other modules. For each function prototype in your
+header, like this one:
+
+    int DoesSomething(int a, int b);
+
+
+...you get an automatically generated DoesSomething function
+that you can link to instead of your real DoesSomething function.
+By using this Mocked version, you can then verify that it receives
+the data you want, and make it return whatever data you desire,
+make it throw errors when you want, and more... Create these for
+everything your latest real module touches, and you're suddenly
+in a position of power: You can control and verify every detail
+of your latest creation.
+
+To make that easier, CMock also gives you a bunch of functions
+like the ones below, so you can tell that generated DoesSomething
+function how to behave for each test:
+
+    void DoesSomething_ExpectAndReturn(int a, int b, int toReturn);
+    void DoesSomething_ExpectAndThrow(int a, int b, EXCEPTION_T error);
+    void DoesSomething_StubWithCallback(CMOCK_DoesSomething_CALLBACK YourCallback);
+    void DoesSomething_IgnoreAndReturn(int toReturn);
+
+
+You can pile a bunch of these back to back, and it remembers what
+you wanted to pass when, like so:
+
+    test_CallsDoesSomething_ShouldDoJustThat(void)
+    {
+        DoesSomething_ExpectAndReturn(1,2,3);
+        DoesSomething_ExpectAndReturn(4,5,6);
+        DoesSomething_ExpectAndThrow(7,8, STATUS_ERROR_OOPS);
+
+        CallsDoesSomething( );
+    }
+
+
+This test will call CallsDoesSomething, which is the function
+we are testing. We are expecting that function to call DoesSomething
+three times. The first time, we check to make sure it's called
+as DoesSomething(1, 2) and we'll magically return a 3. The second
+time we check for DoesSomething(4, 5) and we'll return a 6. The
+third time we verify DoesSomething(7, 8) and we'll throw an error
+instead of returning anything. If CallsDoesSomething gets
+any of this wrong, it fails the test. It will fail if you didn't
+call DoesSomething enough, or too much, or with the wrong arguments,
+or in the wrong order.
+
+CMock is based on Unity, which it uses for all internal testing.
+It uses Ruby to do all the main work (versions 2.0.0 and above).
+
+
+Installing
+==========
+
+The first thing you need to do to install CMock is to get yourself
+a copy of Ruby. If you're on linux or osx, you probably already
+have it. You can prove it by typing the following:
+
+    ruby --version
+
+
+If it replied in a way that implies ignorance, then you're going to
+need to install it. You can go to [ruby-lang](https://ruby-lang.org)
+to get the latest version. You're also going to need to do that if it
+replied with a version that is older than 2.0.0. Go ahead. We'll wait.
+
+Once you have Ruby, you have three options:
+
+* Clone the latest [CMock repo on github](https://github.com/ThrowTheSwitch/CMock/)
+* Download the latest [CMock zip from github](https://github.com/ThrowTheSwitch/CMock/)
+* Install Ceedling (which has it built in!) through your commandline using `gem install ceedling`.
+
+
+Generated Mock Module Summary
+=============================
+
+In addition to the mocks themselves, CMock will generate the
+following functions for use in your tests. The expect functions
+are always generated. The other functions are only generated
+if those plugins are enabled:
+
+
+Expect:
+-------
+
+Your basic staple Expects which will be used for most of your day
+to day CMock work. By calling this, you are telling CMock that you
+expect that function to be called during your test. It also specifies
+which arguments you expect it to be called with, and what return
+value you want returned when that happens. You can call this function
+multiple times back to back in order to queue up multiple calls.
+
+* `void func(void)` => `void func_Expect(void)`
+* `void func(params)` => `void func_Expect(expected_params)`
+* `retval func(void)` => `void func_ExpectAndReturn(retval_to_return)`
+* `retval func(params)` => `void func_ExpectAndReturn(expected_params, retval_to_return)`
+
+
+ExpectAnyArgs:
+--------------
+
+This behaves just like the Expects calls, except that it doesn't really
+care what the arguments are that the mock gets called with. It still counts
+the number of times the mock is called and it still handles return values
+if there are some. Note that an ExpectAnyArgs call is not generated for
+functions that have no arguments, because it would act exactly like the existing
+Expect and ExpectAndReturn calls.
+
+* `void func(params)` => `void func_ExpectAnyArgs(void)`
+* `retval func(params)` => `void func_ExpectAnyArgsAndReturn(retval_to_return)`
+
+
+Array:
+------
+
+An ExpectWithArray is another variant of Expect. Like expect, it cares about
+the number of times a mock is called, the arguments it is called with, and the
+values it is to return. This variant has another feature, though. For anything
+that resembles a pointer or array, it breaks the argument into TWO arguments.
+The first is the original pointer. The second specify the number of elements
+it is to verify of that array. If you specify 1, it'll check one object. If 2,
+it'll assume your pointer is pointing at the first of two elements in an array.
+If you specify zero elements, it will check just the pointer if
+`:smart` mode is configured or fail if `:compare_data` is set.
+
+* `void func(void)` => (nothing. In fact, an additional function is only generated if the params list contains pointers)
+* `void func(ptr * param, other)` => `void func_ExpectWithArray(ptr* param, int param_depth, other)`
+* `retval func(void)` => (nothing. In fact, an additional function is only generated if the params list contains pointers)
+* `retval func(other, ptr* param)` => `void func_ExpectWithArrayAndReturn(other, ptr* param, int param_depth, retval_to_return)`
+
+
+Ignore:
+-------
+
+Maybe you don't care about the number of times a particular function is called or
+the actual arguments it is called with. In that case, you want to use Ignore. Ignore
+only needs to be called once per test. It will then ignore any further calls to that
+particular mock. The IgnoreAndReturn works similarly, except that it has the added
+benefit of knowing what to return when that call happens. If the mock is called more
+times than IgnoreAndReturn was called, it will keep returning the last value without
+complaint. If it's called fewer times, it will also ignore that. You SAID you didn't
+care how many times it was called, right?
+
+* `void func(void)` => `void func_Ignore(void)`
+* `void func(params)` => `void func_Ignore(void)`
+* `retval func(void)` => `void func_IgnoreAndReturn(retval_to_return)`
+* `retval func(params)` => `void func_IgnoreAndReturn(retval_to_return)`
+
+StopIgnore:
+-------
+
+Maybe you want to ignore a particular function for part of a test but dont want to
+ignore it later on. In that case, you want to use StopIgnore which will cancel the
+previously called Ignore or IgnoreAndReturn requiring you to Expect or otherwise
+handle the call to a function.
+
+* `void func(void)` => `void func_StopIgnore(void)`
+* `void func(params)` => `void func_StopIgnore(void)`
+* `retval func(void)` => `void func_StopIgnore(void)`
+* `retval func(params)` => `void func_StopIgnore(void)`
+
+Ignore Arg:
+------------
+
+Maybe you overall want to use Expect and its similar variations, but you don't care
+what is passed to a particular argument. This is particularly useful when that argument
+is a pointer to a value that is supposed to be filled in by the function. You don't want
+to use ExpectAnyArgs, because you still care about the other arguments. Instead, after
+an Expect call is made, you can call this function. It tells CMock to ignore
+a particular argument for the rest of this test, for this mock function. You may call
+multiple instances of this to ignore multiple arguments after each expectation if
+desired.
+
+* `void func(params)` => `void func_IgnoreArg_paramName(void)`
+
+
+ReturnThruPtr:
+--------------
+
+Another option which operates on a particular argument of a function is the ReturnThruPtr
+plugin. For every argument that resembles a pointer or reference, CMock generates an
+instance of this function. Just as the AndReturn functions support injecting one or more
+return values into a queue, this function lets you specify one or more return values which
+are queued up and copied into the space being pointed at each time the mock is called.
+
+* `void func(param1)` => `void func_ReturnThruPtr_paramName(val_to_return)`
+* => `void func_ReturnArrayThruPtr_paramName(cal_to_return, len)`
+* => `void func_ReturnMemThruPtr_paramName(val_to_return, size)`
+
+
+Callback:
+---------
+
+If all those other options don't work, and you really need to do something custom, you
+still have a choice. As soon as you stub a callback in a test, it will call the callback
+whenever the mock is encountered and return the retval returned from the callback (if any).
+
+* `void func(void)` => `void func_[AddCallback,Stub](CMOCK_func_CALLBACK callback)`
+where `CMOCK_func_CALLBACK` looks like: `void func(int NumCalls)`
+* `void func(params)` => `void func_[AddCallback,Stub](CMOCK_func_CALLBACK callback)`
+where `CMOCK_func_CALLBACK` looks like: `void func(params, int NumCalls)`
+* `retval func(void)` => `void func_[AddCallback,Stub](CMOCK_func_CALLBACK callback)`
+where `CMOCK_func_CALLBACK` looks like: `retval func(int NumCalls)`
+* `retval func(params)` => `void func_[AddCallback,Stub](CMOCK_func_CALLBACK callback)`
+where `CMOCK_func_CALLBACK` looks like: `retval func(params, int NumCalls)`
+
+You can choose from two options:
+
+* `func_AddCallback` tells the mock to check its arguments and calling
+order (based on any Expects you've set up) before calling the callback.
+* `func_Stub` tells the mock to skip all the normal checks and jump directly
+to the callback instead. In this case, you are replacing the normal mock calls
+with your own custom stub function.
+
+There is also an older name, `func_StubWithCallback`, which is just an alias
+for either `func_AddCallback` or `func_Stub` depending on setting of the
+`:callback_after_arg_check` toggle. This is deprecated and we recommend using
+the two options above.
+
+
+Cexception:
+-----------
+
+Finally, if you are using Cexception for error handling, you can use this to throw errors
+from inside mocks. Like Expects, it remembers which call was supposed to throw the error,
+and it still checks parameters first.
+
+* `void func(void)` => `void func_ExpectAndThrow(value_to_throw)`
+* `void func(params)` => `void func_ExpectAndThrow(expected_params, value_to_throw)`
+* `retval func(void)` => `void func_ExpectAndThrow(value_to_throw)`
+* `retval func(params)` => `void func_ExpectAndThrow(expected_params, value_to_throw)`
+
+
+
+Running CMock
+=============
+
+CMock is a Ruby script and class. You can therefore use it directly
+from the command line, or include it in your own scripts or rakefiles.
+
+
+Mocking from the Command Line
+-----------------------------
+
+After unpacking CMock, you will find cmock.rb in the 'lib' directory.
+This is the file that you want to run. It takes a list of header files
+to be mocked, as well as an optional yaml file for a more detailed
+configuration (see config options below).
+
+For example, this will create three mocks using the configuration
+specified in MyConfig.yml:
+
+    ruby cmock.rb -oMyConfig.yml super.h duper.h awesome.h
+
+And this will create two mocks using the default configuration:
+
+    ruby cmock.rb ../mocking/stuff/is/fun.h ../try/it/yourself.h
+
+
+Mocking From Scripts or Rake
+----------------------------
+
+CMock can be used directly from your own scripts or from a rakefile.
+Start by including cmock.rb, then create an instance of CMock.
+When you create your instance, you may initialize it in one of
+three ways.
+
+You may specify nothing, allowing it to run with default settings:
+
+    require 'cmock.rb'
+    cmock = CMock.new
+
+You may specify a YAML file containing the configuration options
+you desire:
+
+    cmock = CMock.new('../MyConfig.yml')
+
+You may specify the options explicitly:
+
+    cmock = Cmock.new(:plugins => [:cexception, :ignore], :mock_path => 'my/mocks/')
+
+Creating Skeletons:
+-------------------
+
+Not only is CMock able to generate mock files from a header file, but it is also able
+to generate (and update) skeleton C files from headers. It does this by creating a
+(mostly) empty implementation for every function that is declared in the header. If you later
+add to that header list, just run this feature again and it will add prototypes for the missing
+functions!
+
+Like the normal usecase for CMock, this feature can be used from the command line
+or from within its ruby API. For example, from the command line, add `--skeleton` to
+generate a skeleton instead:
+
+```
+ruby cmock.rb --skeleton ../create/c/for/this.h
+```
+
+Config Options:
+---------------
+
+The following configuration options can be specified in the
+yaml file or directly when instantiating.
+
+Passed as Ruby, they look like this:
+
+        { :attributes => [“__funky�, “__intrinsic�], :when_ptr => :compare }
+
+Defined in the yaml file, they look more like this:
+
+        :cmock:
+          :attributes:
+            - __funky
+            - __intrinsic
+          :when_ptr: :compare
+
+In all cases, you can just include the things that you want to override
+from the defaults. We've tried to specify what the defaults are below.
+
+* `:attributes`:
+  These are attributes that CMock should ignore for you for testing
+  purposes. Custom compiler extensions and externs are handy things to
+  put here. If your compiler is choking on some extended syntax, this
+  is often a good place to look.
+
+  * defaults: ['__ramfunc', '__irq', '__fiq', 'register', 'extern']
+  * **note:** this option will reinsert these attributes onto the mock's calls.
+    If that isn't what you are looking for, check out :strippables.
+
+* `:c_calling_conventions`:
+  Similarly, CMock may need to understand which C calling conventions
+  might show up in your codebase. If it encounters something it doesn't
+  recognize, it's not going to mock it. We have the most common covered,
+  but there are many compilers out there, and therefore many other options.
+
+  * defaults: ['__stdcall', '__cdecl', '__fastcall']
+  * **note:** this option will reinsert these attributes onto the mock's calls.
+    If that isn't what you are looking for, check out :strippables.
+
+* `:callback_after_arg_check`:
+  Tell `:callback` plugin to do the normal argument checking **before** it
+  calls the callback function by setting this to true. When false, the
+  callback function is called **instead** of the argument verification.
+
+  * default: false
+
+* `:callback_include_count`:
+  Tell `:callback` plugin to include an extra parameter to specify the
+  number of times the callback has been called. If set to false, the
+  callback has the same interface as the mocked function. This can be
+  handy when you're wanting to use callback as a stub.
+
+  * default: true
+
+* `:cexception_include`:
+  Tell `:cexception` plugin where to find CException.h... You only need to
+  define this if it's not in your build path already... which it usually
+  will be for the purpose of your builds.
+
+  * default: *nil*
+
+* `:enforce_strict_ordering`:
+  CMock always enforces the order that you call a particular function,
+  so if you expect GrabNabber(int size) to be called three times, it
+  will verify that the sizes are in the order you specified. You might
+  *also* want to make sure that all different functions are called in a
+  particular order. If so, set this to true.
+
+  * default: false
+
+* `:framework`:
+  Currently the only option is `:unity.` Eventually if we support other
+  unity test frameworks (or if you write one for us), they'll get added
+  here.
+
+  : default: :unity
+
+* `:includes`:
+  An array of additional include files which should be added to the
+  mocks. Useful for global types and definitions used in your project.
+  There are more specific versions if you care WHERE in the mock files
+  the includes get placed. You can define any or all of these options.
+
+  * `:includes`
+  * `:includes_h_pre_orig_header`
+  * `:includes_h_post_orig_header`
+  * `:includes_c_pre_header`
+  * `:includes_c_post_header`
+  * default: nil #for all 5 options
+
+* `:memcmp_if_unknown`:
+  C developers create a lot of types, either through typedef or preprocessor
+  macros. CMock isn't going to automatically know what you were thinking all
+  the time (though it tries its best). If it comes across a type it doesn't
+  recognize, you have a choice on how you want it to handle it. It can either
+  perform a raw memory comparison and report any differences, or it can fail
+  with a meaningful message. Either way, this feature will only happen after
+  all other mechanisms have failed (The thing encountered isn't a standard
+  type. It isn't in the :treat_as list. It isn't in a custom unity_helper).
+
+  * default: true
+
+* `:mock_path`:
+  The directory where you would like the mock files generated to be
+  placed.
+
+  * default: mocks
+
+* `:mock_prefix`:
+  The prefix to prepend to your mock files. For example, if it's `Mock`, a file
+  “USART.h� will get a mock called “MockUSART.c�. This CAN be used with a suffix
+  at the same time.
+
+  * default: Mock
+
+* `:mock_suffix`:
+  The suffix to append to your mock files. For example, it it's `_Mock`, a file
+  "USART.h" will get a mock called "USART_Mock.h". This CAN be used with a prefix
+  at the same time.
+
+  * default: ""
+
+* `:plugins`:
+  An array of which plugins to enable. ':expect' is always active. Also
+  available currently:
+
+  * `:ignore`
+  * `:ignore_arg`
+  * `:expect_any_args`
+  * `:array`
+  * `:cexception`
+  * `:callback`
+  * `:return_thru_ptr`
+
+* `:strippables`:
+  An array containing a list of items to remove from the header
+  before deciding what should be mocked. This can be something simple
+  like a compiler extension CMock wouldn't recognize, or could be a
+  regex to reject certain function name patterns. This is a great way to
+  get rid of compiler extensions when your test compiler doesn't support
+  them. For example, use `:strippables: ['(?:functionName\s*\(+.*?\)+)']`
+  to prevent a function `functionName` from being mocked. By default, it
+  is ignoring all gcc attribute extensions.
+
+  * default: ['(?:__attribute__\s*\(+.*?\)+)']
+
+* `:subdir`:
+  This is a relative subdirectory for your mocks.  Set this to e.g. "sys" in
+  order to create a mock for `sys/types.h` in `(:mock_path)/sys/`.
+
+  * default: ""
+
+* `:treat_as`:
+  The `:treat_as` list is a shortcut for when you have created typedefs
+  of standard types. Why create a custom unity helper for UINT16 when
+  the unity function TEST_ASSERT_EQUAL_HEX16 will work just perfectly?
+  Just add 'UINT16' => 'HEX16' to your list (actually, don't. We already
+  did that one for you). Maybe you have a type that is a pointer to an
+  array of unsigned characters? No problem, just add 'UINT8_T*' =>
+  'HEX8*'
+
+  * NOTE: unlike the other options, your specifications MERGE with the
+    default list. Therefore, if you want to override something, you must
+    reassign it to something else (or to *nil* if you don't want it)
+
+  * default:
+    * 'int': 'INT'
+    * 'char': 'INT8'
+    * 'short': 'INT16'
+    * 'long': 'INT'
+    * 'int8': 'INT8'
+    * 'int16': 'INT16'
+    * 'int32': 'INT'
+    * 'int8_t': 'INT8'
+    * 'int16_t': 'INT16'
+    * 'int32_t': 'INT'
+    * 'INT8_T': 'INT8'
+    * 'INT16_T': 'INT16'
+    * 'INT32_T': 'INT'
+    * 'bool': 'INT'
+    * 'bool_t': 'INT'
+    * 'BOOL': 'INT'
+    * 'BOOL_T': 'INT'
+    * 'unsigned int': 'HEX32'
+    * 'unsigned long': 'HEX32'
+    * 'uint32': 'HEX32'
+    * 'uint32_t': 'HEX32'
+    * 'UINT32': 'HEX32'
+    * 'UINT32_T': 'HEX32'
+    * 'void*': 'HEX8_ARRAY'
+    * 'unsigned short': 'HEX16'
+    * 'uint16': 'HEX16'
+    * 'uint16_t': 'HEX16'
+    * 'UINT16': 'HEX16'
+    * 'UINT16_T': 'HEX16'
+    * 'unsigned char': 'HEX8'
+    * 'uint8': 'HEX8'
+    * 'uint8_t': 'HEX8'
+    * 'UINT8': 'HEX8'
+    * 'UINT8_T': 'HEX8'
+    * 'char*': 'STRING'
+    * 'pCHAR': 'STRING'
+    * 'cstring': 'STRING'
+    * 'CSTRING': 'STRING'
+    * 'float': 'FLOAT'
+    * 'double': 'FLOAT'
+
+* `:treat_as_array`:
+  A specialized sort of `:treat_as` to be used when you've created a
+  typedef of an array type, such as `typedef int TenIntegers[10];`.  This
+  is a hash of typedef name to element type.  For example:
+
+        { "TenIntegers" => "int",
+          "ArrayOfFloat" => "float" }
+
+  Telling CMock about these typedefs allows it to be more intelligent
+  about parameters of such types, so that you can use features like
+  ExpectWithArray and ReturnArrayThruPtr with them.
+
+* `:treat_as_void`:
+  We've seen "fun" legacy systems typedef 'void' with a custom type,
+  like MY_VOID. Add any instances of those to this list to help CMock
+  understand how to deal with your code.
+
+  * default: []
+
+* `:treat_externs`:
+  This specifies how you want CMock to handle functions that have been
+  marked as extern in the header file. Should it mock them?
+
+  * `:include` will mock externed functions
+  * `:exclude` will ignore externed functions (default).
+
+* `:treat_inlines`:
+  This specifies how you want CMock to handle functions that have been
+  marked as inline in the header file. Should it mock them?
+
+  * `:include` will mock inlined functions
+  * `:exclude` will ignore inlined functions (default).
+
+  CMock will look for the following default patterns (simplified from the actual regex):
+  - "static inline"
+  - "inline static"
+  - "inline"
+  - "static"
+  You can override these patterns, check out :inline_function_patterns.
+
+  Enabling this feature does require a change in the build system that
+  is using CMock.  To understand why, we need to give some more info
+  on how we are handling inline functions internally.
+  Let's say we want to mock a header called example.h.  example.h
+  contains inline functions, we cannot include this header in the
+  mocks or test code if we want to mock the inline functions simply
+  because the inline functions contain an implementation that we want
+  to override in our mocks!
+  So, to circumvent this, we generate a new header, also named
+  example.h, in the same directory as mock_example.h/c .  This newly
+  generated header should/is exactly the same as the original header,
+  only difference is the inline functions are transformed to 'normal'
+  functions declarations.  Placing the new header in the same
+  directory as mock_example.h/c ensures that they will include the new
+  header and not the old one.
+  However, CMock has no control in how the build system is configured
+  and which include paths the test code is compiled with.  In order
+  for the test code to also see the newly generated header ,and not
+  the old header with inline functions, the build system has to add
+  the mock folder to the include paths.
+  Furthermore, we need to keep the order of include paths in mind. We
+  have to set the mock folder before the other includes to avoid the
+  test code including the original header instead of the newly
+  generated header (without inline functions).
+
+* `:unity_helper_path`:
+  If you have created a header with your own extensions to unity to
+  handle your own types, you can set this argument to that path. CMock
+  will then automagically pull in your helpers and use them. The only
+  trick is that you make sure you follow the naming convention:
+  `UNITY_TEST_ASSERT_EQUAL_YourType`. If it finds macros of the right
+  shape that match that pattern, it'll use them.
+
+  * default: []
+
+* `:verbosity`:
+  How loud should CMock be?
+
+  * 0 for errors only
+  * 1 for errors and warnings
+  * 2 for normal (default)
+  * 3 for verbose
+
+* `:weak`:
+  When set this to some value, the generated mocks are defined as weak
+  symbols using the configured format. This allows them to be overridden
+  in particular tests.
+
+  * Set to '__attribute ((weak))' for weak mocks when using GCC.
+  * Set to any non-empty string for weak mocks when using IAR.
+  * default: ""
+
+* `:when_no_prototypes`:
+  When you give CMock a header file and ask it to create a mock out of
+  it, it usually contains function prototypes (otherwise what was the
+  point?). You can control what happens when this isn't true. You can
+  set this to `:warn,` `:ignore,` or `:error`
+
+  * default: :warn
+
+* `:when_ptr`:
+  You can customize how CMock deals with pointers (c strings result in
+  string comparisons... we're talking about **other** pointers here). Your
+  options are `:compare_ptr` to just verify the pointers are the same,
+  `:compare_data` or `:smart` to verify that the data is the same.
+  `:compare_data` and `:smart` behaviors will change slightly based on
+  if you have the array plugin enabled. By default, they compare a
+  single element of what is being pointed to. So if you have a pointer
+  to a struct called ORGAN_T, it will compare one ORGAN_T (whatever that
+  is).
+
+  * default: :smart
+
+* `:array_size_type`:
+* `:array_size_name`:
+  When the `:array` plugin is disabled, these options do nothing.
+
+  When the `:array` plugin is enabled, these options allow CMock to recognize
+  functions with parameters that might refer to an array, like the following,
+  and treat them more intelligently:
+
+  * `void GoBananas(Banana * bananas, int num_bananas)`
+  * `int write_data(int fd, const uint8_t * data, uint32_t size)`
+
+  To recognize functions like these, CMock looks for a parameter list
+  containing a pointer (which could be an array) followed by something that
+  could be an array size.  "Something", by default, means an `int` or `size_t`
+  parameter with a name containing "size" or "len".
+
+  `:array_size_type` is a list of additional types (besides `int` and `size_t`)
+  that could be used for an array size parameter.  For example, to get CMock to
+  recognize that `uint32_t size` is an array size, you'd need to say:
+
+        cfg[:array_size_type] = ['uint32_t']
+
+  `:array_size_name` is a regular expression used to match an array size
+  parameter by name.  By default, it's 'size|len'.  To get CMock to recognize a
+  name like `num_bananas`, you could tell it to also accept names containing
+  'num_' like this:
+
+        cfg[:array_size_name] = 'size|len|num_'
+
+  Parameters must match *both* `:array_size_type` and `:array_size_name` (and
+  must come right after a pointer parameter) to be treated as an array size.
+
+  Once you've told it how to recognize your arrays, CMock will give you `_Expect`
+  calls that work more like `_ExpectWithArray`, and compare an array of objects
+  rather than just a single object.
+
+  For example, if you write the following, CMock will check that GoBananas is
+  called and passed an array containing a green banana followed by a yellow
+  banana:
+
+        Banana b[2] = {GreenBanana, YellowBanana};
+        GoBananas_Expect(b, 2);
+
+  In other words, `GoBananas_Expect(b, 2)` now works just the same as:
+
+        GoBananas_ExpectWithArray(b, 2, 2);
+
+* `:fail_on_unexpected_calls`:
+  By default, CMock will fail a test if a mock is called without `_Expect` and `_Ignore`
+  called first. While this forces test writers to be more explicit in their expectations,
+  it can clutter tests with `_Expect` or `_Ignore` calls for functions which are not the focus
+  of the test. While this is a good indicator that this module should be refactored, some
+  users are not fans of the additional noise.
+
+  Therefore, :fail_on_unexpected_calls can be set to false to force all mocks to start with
+  the assumption that they are operating as `_Ignore` unless otherwise specified.
+
+  * default: true
+  * **note:**
+    If this option is disabled, the mocked functions will return
+    a default value (0) when called (and only if they have to return something of course).
+
+* `:inline_function_patterns`:
+  An array containing a list of strings to detect inline functions.
+  This option is only taken into account if you enable :treat_inlines.
+  These strings are interpreted as regex patterns so be sure to escape
+  certain characters. For example, use `:inline_function_patterns: ['static inline __attribute__ \(\(always_inline\)\)']`
+  to recognize `static inline __attribute__ ((always_inline)) int my_func(void)`
+  as an inline function.
+  The default patterns are are:
+
+  * default: ['(static\s+inline|inline\s+static)\s*', '(\bstatic\b|\binline\b)\s*']
+  * **note:**
+    The order of patterns is important here!
+    We go from specific patterns ('static inline') to general patterns ('inline'),
+    otherwise we would miss functions that use 'static inline' iso 'inline'.
+
+
+Compiled Options:
+-----------------
+
+A number of #defines also exist for customizing the cmock experience.
+Feel free to pass these into your compiler or whatever is most
+convenient. CMock will otherwise do its best to guess what you want
+based on other settings, particularly Unity's settings.
+
+* `CMOCK_MEM_STATIC` or `CMOCK_MEM_DYNAMIC`
+  Define one of these to determine if you want to dynamically add
+  memory during tests as required from the heap. If static, you
+  can control the total footprint of Cmock. If dynamic, you will
+  need to make sure you make some heap space available for Cmock.
+
+* `CMOCK_MEM_SIZE`
+  In static mode this is the total amount of memory you are allocating
+  to Cmock. In Dynamic mode this is the size of each chunk allocated
+  at once (larger numbers grab more memory but require fewer mallocs).
+
+* `CMOCK_MEM_ALIGN`
+  The way to align your data to. Not everything is as flexible as
+  a PC, as most embedded designers know. This defaults to 2, meaning
+  align to the closest 2^2 -> 4 bytes (32 bits). You can turn off alignment
+  by setting 0, force alignment to the closest uint16 with 1 or even
+  to the closest uint64 with 3.
+
+* `CMOCK_MEM_PTR_AS_INT`
+  This is used internally to hold pointers... it needs to be big
+  enough. On most processors a pointer is the same as an unsigned
+  long... but maybe that's not true for yours?
+
+* `CMOCK_MEM_INDEX_TYPE`
+  This needs to be something big enough to point anywhere in Cmock's
+  memory space... usually it's a size_t.
+
+Other Tips
+==========
+
+resetTest
+---------
+
+While this isn't strictly a CMock feature, often users of CMock are using
+either the test runner generator scripts in Unity or using Ceedling. In
+either case, there is a handy function called `resetTest` which gets
+generated with your runner. You can then use this handy function in your tests
+themselves. Call it during a test to have CMock validate everything to this point
+and start over clean. This is really useful when wanting to test a function in
+an iterative manner with different arguments.
+
+C++ Support
+---------
+C++ unit test/mocking frameworks often use a completely different approach (vs.
+CMock) that relies on overloading virtual class members and does not support
+directly mocking static class member methods or free functions (i.e., functions
+in plain C). One workaround is to wrap the non-virtual functions in an object
+that exposes them as virtual methods and modify your code to inject mocks at
+run-time... but there is another way!
+
+Simply use CMock to mock the static member methods and a C++ mocking framework
+to handle the virtual methods. (Yes, you can mix mocks from CMock and a C++
+mocking framework together in the same test!)
+
+Keep in mind that since C++ mocking frameworks often link the real object to the
+unit test too, we need to resolve multiple definition errors with something like
+the following in the source of the real implementation for any functions that
+CMock mocks:
+
+    #if defined(TEST)
+        __attribute__((weak))
+    #endif
+
+To address potential issues with re-using the same function name in different
+namespaces/classes, the generated function names include the namespace(s) and
+class. For example:
+
+    namespace MyNamespace {
+        class MyClass {
+            static int DoesSomething(int a, int b);
+        };
+    }
+
+Will generate functions like
+
+    void MyNamespace_MyClass_DoesSomething_ExpectAndReturn(int a, int b, int toReturn);
+
+Examples
+========
+
+You can look in the [examples directory](/examples/) for a couple of examples on how
+you might tool CMock into your build process. You may also want to consider
+using [Ceedling](https://throwtheswitch.org/ceedling). Please note that
+these examples are meant to show how the build process works. They have
+failing tests ON PURPOSE to show what that would look like. Don't be alarmed. ;)
diff --git a/FreeRTOS-Plus/Test/CMock/docs/ThrowTheSwitchCodingStandard.md b/FreeRTOS-Plus/Test/CMock/docs/ThrowTheSwitchCodingStandard.md
new file mode 100644
index 000000000..a85adef3d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/docs/ThrowTheSwitchCodingStandard.md
@@ -0,0 +1,207 @@
+# ThrowTheSwitch.org Coding Standard
+
+Hi. Welcome to the coding standard for ThrowTheSwitch.org. For the most part,
+we try to follow these standards to unify our contributors' code into a cohesive
+unit (puns intended). You might find places where these standards aren't
+followed. We're not perfect. Please be polite where you notice these discrepancies
+and we'll try to be polite when we notice yours.
+
+;)
+
+
+## Why Have A Coding Standard?
+
+Being consistent makes code easier to understand. We've made an attempt to keep
+our standard simple because we also believe that we can only expect someone to
+follow something that is understandable. Please do your best.
+
+
+## Our Philosophy
+
+Before we get into details on syntax, let's take a moment to talk about our
+vision for these tools. We're C developers and embedded software developers.
+These tools are great to test any C code, but catering to embedded software has
+made us more tolerant of compiler quirks. There are a LOT of quirky compilers
+out there. By quirky I mean "doesn't follow standards because they feel like
+they have a license to do as they wish."
+
+Our philosophy is "support every compiler we can". Most often, this means that
+we aim for writing C code that is standards compliant (often C89... that seems
+to be a sweet spot that is almost always compatible). But it also means these
+tools are tolerant of things that aren't common. Some that aren't even
+compliant. There are configuration options to override the size of standard
+types. There are configuration options to force Unity to not use certain
+standard library functions. A lot of Unity is configurable and we have worked
+hard to make it not TOO ugly in the process.
+
+Similarly, our tools that parse C do their best. They aren't full C parsers
+(yet) and, even if they were, they would still have to accept non-standard
+additions like gcc extensions or specifying `@0x1000` to force a variable to
+compile to a particular location. It's just what we do, because we like
+everything to Just Workâ„¢.
+
+Speaking of having things Just Workâ„¢, that's our second philosophy. By that, we
+mean that we do our best to have EVERY configuration option have a logical
+default. We believe that if you're working with a simple compiler and target,
+you shouldn't need to configure very much... we try to make the tools guess as
+much as they can, but give the user the power to override it when it's wrong.
+
+
+## Naming Things
+
+Let's talk about naming things. Programming is all about naming things. We name
+files, functions, variables, and so much more. While we're not always going to
+find the best name for something, we actually put quite a bit of effort into
+finding *What Something WANTS to be Called*â„¢.
+
+When naming things, we more or less follow this hierarchy, the first being the
+most important to us (but we do all four whenever possible):
+1. Readable
+2. Descriptive
+3. Consistent
+4. Memorable
+
+
+#### Readable
+
+We want to read our code. This means we like names and flow that are more
+naturally read. We try to avoid double negatives. We try to avoid cryptic
+abbreviations (sticking to ones we feel are common).
+
+
+#### Descriptive
+
+We like descriptive names for things, especially functions and variables.
+Finding the right name for something is an important endeavor. You might notice
+from poking around our code that this often results in names that are a little
+longer than the average. Guilty. We're okay with a tiny bit more typing if it
+means our code is easier to understand.
+
+There are two exceptions to this rule that we also stick to as religiously as
+possible:
+
+First, while we realize hungarian notation (and similar systems for encoding
+type information into variable names) is providing a more descriptive name, we
+feel that (for the average developer) it takes away from readability and
+therefore is to be avoided.
+
+Second, loop counters and other local throw-away variables often have a purpose
+which is obvious. There's no need, therefore, to get carried away with complex
+naming. We find i, j, and k are better loop counters than loopCounterVar or
+whatnot. We only break this rule when we see that more description could improve
+understanding of an algorithm.
+
+
+#### Consistent
+
+We like consistency, but we're not really obsessed with it. We try to name our
+configuration macros in a consistent fashion... you'll notice a repeated use of
+UNITY_EXCLUDE_BLAH or UNITY_USES_BLAH macros. This helps users avoid having to
+remember each macro's details.
+
+
+#### Memorable
+
+Where ever it doesn't violate the above principles, we try to apply memorable
+names. Sometimes this means using something that is simply descriptive, but
+often we strive for descriptive AND unique... we like quirky names that stand
+out in our memory and are easier to search for. Take a look through the file
+names in Ceedling and you'll get a good idea of what we are talking about here.
+Why use preprocess when you can use preprocessinator? Or what better describes a
+module in charge of invoking tasks during releases than release_invoker? Don't
+get carried away. The names are still descriptive and fulfill the above
+requirements, but they don't feel stale.
+
+
+## C and C++ Details
+
+We don't really want to add to the style battles out there. Tabs or spaces?
+How many spaces? Where do the braces go? These are age-old questions that will
+never be answered... or at least not answered in a way that will make everyone
+happy.
+
+We've decided on our own style preferences. If you'd like to contribute to these
+projects (and we hope that you do), then we ask if you do your best to follow
+the same. It will only hurt a little. We promise.
+
+
+#### Whitespace
+
+Our C-style is to use spaces and to use 4 of them per indent level. It's a nice
+power-of-2 number that looks decent on a wide screen. We have no more reason
+than that. We break that rule when we have lines that wrap (macros or function
+arguments or whatnot). When that happens, we like to indent further to line
+things up in nice tidy columns.
+
+```C
+    if (stuff_happened)
+    {
+        do_something();
+    }
+```
+
+
+#### Case
+
+- Files - all lower case with underscores.
+- Variables - all lower case with underscores
+- Macros - all caps with underscores.
+- Typedefs - all caps with underscores. (also ends with _T).
+- Functions - camel cased. Usually named ModuleName_FuncName
+- Constants and Globals - camel cased.
+
+
+#### Braces
+
+The left brace is on the next line after the declaration. The right brace is
+directly below that. Everything in between in indented one level. If you're
+catching an error and you have a one-line, go ahead and to it on the same line.
+
+```C
+    while (blah)
+    {
+        //Like so. Even if only one line, we use braces.
+    }
+```
+
+
+#### Comments
+
+Do you know what we hate? Old-school C block comments. BUT, we're using them
+anyway. As we mentioned, our goal is to support every compiler we can,
+especially embedded compilers. There are STILL C compilers out there that only
+support old-school block comments. So that is what we're using. We apologize. We
+think they are ugly too.
+
+
+## Ruby Details
+
+Is there really such thing as a Ruby coding standard? Ruby is such a free form
+language, it seems almost sacrilegious to suggest that people should comply to
+one method! We'll keep it really brief!
+
+
+#### Whitespace
+
+Our Ruby style is to use spaces and to use 2 of them per indent level. It's a
+nice power-of-2 number that really grooves with Ruby's compact style. We have no
+more reason than that. We break that rule when we have lines that wrap. When
+that happens, we like to indent further to line things up in nice tidy columns.
+
+
+#### Case
+
+- Files - all lower case with underscores.
+- Variables - all lower case with underscores
+- Classes, Modules, etc - Camel cased.
+- Functions - all lower case with underscores
+- Constants - all upper case with underscores
+
+
+## Documentation
+
+Egad. Really? We use markdown and we like pdf files because they can be made to
+look nice while still being portable. Good enough?
+
+
+*Find The Latest of This And More at [ThrowTheSwitch.org](https://throwtheswitch.org)*
diff --git a/FreeRTOS-Plus/Test/CMock/examples/make_example/Makefile b/FreeRTOS-Plus/Test/CMock/examples/make_example/Makefile
new file mode 100644
index 000000000..a0fe53227
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/make_example/Makefile
@@ -0,0 +1,30 @@
+CC ?= gcc
+export BUILD_DIR ?= ./build
+export SRC_DIR ?= ./src
+export TEST_DIR ?= ./test
+export TEST_BUILD_DIR ?= ${BUILD_DIR}/test
+TEST_MAKEFILE = ${TEST_BUILD_DIR}/MakefileTestSupport
+OBJ ?= ${BUILD_DIR}/obj
+OBJ_DIR = ${OBJ}
+
+default: all
+
+all: setup test ${BUILD_DIR}/main run
+
+setup:
+	mkdir -p ${BUILD_DIR}
+	mkdir -p ${OBJ}
+	ruby ../../scripts/create_makefile.rb --silent
+
+clean:
+	rm -rf ${BUILD_DIR}
+
+${BUILD_DIR}/main: ${SRC_DIR}/main.c ${SRC_DIR}/foo.c
+	${CC} $< -o $@
+
+run:
+	./build/main || true
+
+test: setup
+
+-include ${TEST_MAKEFILE}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/make_example/src/foo.c b/FreeRTOS-Plus/Test/CMock/examples/make_example/src/foo.c
new file mode 100644
index 000000000..5490203d1
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/make_example/src/foo.c
@@ -0,0 +1,5 @@
+#include "foo.h"
+
+void foo_init(void)
+{
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/make_example/src/foo.h b/FreeRTOS-Plus/Test/CMock/examples/make_example/src/foo.h
new file mode 100644
index 000000000..3d2b5fba6
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/make_example/src/foo.h
@@ -0,0 +1,5 @@
+#ifndef _foo_h
+
+void foo_init(void);
+
+#endif
diff --git a/FreeRTOS-Plus/Test/CMock/examples/make_example/src/main.c b/FreeRTOS-Plus/Test/CMock/examples/make_example/src/main.c
new file mode 100644
index 000000000..52e86795a
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/make_example/src/main.c
@@ -0,0 +1,15 @@
+#include <stdio.h>
+#include "foo.h"
+
+int real_main(int argc, char ** argv)
+{
+    printf("Hello world!\n");
+    return 0;
+}
+
+#ifndef TEST
+int main(int argc, char ** argv)
+{
+    return real_main(argc, argv);
+}
+#endif
diff --git a/FreeRTOS-Plus/Test/CMock/examples/make_example/test/test_foo.c b/FreeRTOS-Plus/Test/CMock/examples/make_example/test/test_foo.c
new file mode 100644
index 000000000..80f17f337
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/make_example/test/test_foo.c
@@ -0,0 +1,17 @@
+#include "unity.h"
+#include "foo.h"
+
+void setUp(void)
+{
+}
+
+void tearDown(void)
+{
+}
+
+void test_foo_init_should_initialize_multiplier()
+{
+    foo_init();
+
+    TEST_ASSERT_FALSE(1);
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/make_example/test/test_main.c b/FreeRTOS-Plus/Test/CMock/examples/make_example/test/test_main.c
new file mode 100644
index 000000000..f9b674906
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/make_example/test/test_main.c
@@ -0,0 +1,15 @@
+#include "unity.h"
+#include "mock_foo.h"
+
+void setUp(void)
+{
+}
+
+void tearDown(void)
+{
+}
+
+void test_main_should_initialize_foo(void)
+{
+    TEST_IGNORE_MESSAGE("TODO: Implement main!");
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/gcc.yml b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/gcc.yml
new file mode 100644
index 000000000..f41bf07d3
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/gcc.yml
@@ -0,0 +1,44 @@
+compiler:
+  path: gcc
+  source_path:     'src/'
+  unit_tests_path: &unit_tests_path 'test/'
+  build_path:      &build_path 'build/'
+  options:
+    - -c
+  includes:
+    prefix: '-I'
+    items:
+      - 'src/'
+      - '../../src/'
+      - '../../vendor/unity/src/'
+      - '../../vendor/unity/examples/example_3/helper/'
+      - './build/mocks/'
+      - *unit_tests_path
+  defines:
+    prefix: '-D'
+    items:
+      - __monitor
+  object_files:
+    prefix: '-o'
+    extension: '.o'
+    destination: *build_path
+linker:
+  path: gcc
+  options:
+    - -lm
+  includes:
+    prefix: '-I'
+  object_files:
+    path: *build_path
+    extension: '.o'
+  bin_files:
+    prefix: '-o'
+    extension: '.exe'
+    destination: *build_path
+:cmock:
+  :plugins: []
+  :includes:
+    - Types.h
+  :mock_path: ./build/mocks
+
+colour: true
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/iar_v4.yml b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/iar_v4.yml
new file mode 100644
index 000000000..762175215
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/iar_v4.yml
@@ -0,0 +1,92 @@
+tools_root: &tools_root 'C:\Program Files\IAR Systems\Embedded Workbench 4.0 Kickstart\'
+compiler:
+  path:             [*tools_root, 'arm\bin\iccarm.exe']
+  source_path:      'src\'
+  unit_tests_path:  &unit_tests_path 'test\'
+  build_path:       &build_path 'build\'
+  options:
+    - --dlib_config
+    - [*tools_root, 'arm\lib\dl4tptinl8n.h']
+    - -z3
+    - --no_cse
+    - --no_unroll
+    - --no_inline
+    - --no_code_motion
+    - --no_tbaa
+    - --no_clustering
+    - --no_scheduling
+    - --debug
+    - --cpu_mode thumb
+    - --endian little
+    - --cpu ARM7TDMI
+    - --stack_align 4
+    - --interwork
+    - -e
+    - --silent
+    - --warnings_are_errors
+    - --fpu None
+    - --diag_suppress Pa050
+  includes:
+    prefix: '-I'
+    items:
+      - 'src/'
+      - '../../src/'
+      - '../../vendor/unity/src/'
+      - '../../vendor/unity/examples/example_3/helper/'
+      - './build/mocks/'
+      - [*tools_root, 'arm\inc\']
+      - *unit_tests_path
+  defines:
+    prefix: '-D'
+    items:
+  object_files:
+    prefix: '-o'
+    extension: '.r79'
+    destination: *build_path
+linker:
+  path: [*tools_root, 'common\bin\xlink.exe']
+  options:
+    - -rt
+    - [*tools_root, 'arm\lib\dl4tptinl8n.r79']
+    - -D_L_EXTMEM_START=0
+    - -D_L_EXTMEM_SIZE=0
+    - -D_L_HEAP_SIZE=120
+    - -D_L_STACK_SIZE=32
+    - -e_small_write=_formatted_write
+    - -s
+    - __program_start
+    - -f
+    - [*tools_root, '\arm\config\lnkarm.xcl']
+  includes:
+    prefix: '-I'
+    items:
+      - [*tools_root, 'arm\config\']
+      - [*tools_root, 'arm\lib\']
+  object_files:
+    path: *build_path
+    extension: '.r79'
+  bin_files:
+    prefix: '-o'
+    extension: '.d79'
+    destination: *build_path
+simulator:
+  path: [*tools_root, 'common\bin\CSpyBat.exe']
+  pre_support:
+    - --silent
+    - [*tools_root, 'arm\bin\armproc.dll']
+    - [*tools_root, 'arm\bin\armsim.dll']
+  post_support:
+    - --plugin
+    - [*tools_root, 'arm\bin\armbat.dll']
+    - --backend
+    - -B
+    - -p
+    - [*tools_root, 'arm\config\ioat91sam7X256.ddf']
+    - -d
+    - sim
+:cmock:
+  :plugins: []
+  :includes:
+    - Types.h
+  :mock_path: ./build/mocks
+
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/iar_v5.yml b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/iar_v5.yml
new file mode 100644
index 000000000..01786496a
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/iar_v5.yml
@@ -0,0 +1,81 @@
+tools_root: &tools_root 'C:\Program Files\IAR Systems\Embedded Workbench 5.3\'
+compiler:
+  path:             [*tools_root, 'arm\bin\iccarm.exe']
+  source_path:      'src\'
+  unit_tests_path:  &unit_tests_path 'test\'
+  build_path:       &build_path 'build\'
+  options:
+    - --dlib_config
+    - [*tools_root, 'arm\inc\DLib_Config_Normal.h']
+    - --no_cse
+    - --no_unroll
+    - --no_inline
+    - --no_code_motion
+    - --no_tbaa
+    - --no_clustering
+    - --no_scheduling
+    - --debug
+    - --cpu_mode thumb
+    - --endian=little
+    - --cpu=ARM7TDMI
+    - --interwork
+    - --warnings_are_errors
+    - --fpu=None
+    - --diag_suppress=Pa050
+    - --diag_suppress=Pe111
+    - -e
+    - -On
+  includes:
+    prefix: '-I'
+    items:
+      - 'src/'
+      - '../../src/'
+      - '../../vendor/unity/src/'
+      - '../../vendor/unity/examples/example_3/helper/'
+      - './build/mocks/'
+      - [*tools_root, 'arm\inc\']
+      - *unit_tests_path
+  defines:
+    prefix: '-D'
+    items:
+  object_files:
+    prefix: '-o'
+    extension: '.r79'
+    destination: *build_path
+linker:
+  path: [*tools_root, 'arm\bin\ilinkarm.exe']
+  options:
+    - --redirect _Printf=_PrintfLarge
+    - --redirect _Scanf=_ScanfSmall
+    - --semihosting
+    - --entry __iar_program_start
+    - --config
+    - [*tools_root, 'arm\config\generic.icf']
+  object_files:
+    path: *build_path
+    extension: '.o'
+  bin_files:
+    prefix: '-o'
+    extension: '.out'
+    destination: *build_path
+simulator:
+  path: [*tools_root, 'common\bin\CSpyBat.exe']
+  pre_support:
+    - --silent
+    - [*tools_root, 'arm\bin\armproc.dll']
+    - [*tools_root, 'arm\bin\armsim.dll']
+  post_support:
+    - --plugin
+    - [*tools_root, 'arm\bin\armbat.dll']
+    - --backend
+    - -B
+    - -p
+    - [*tools_root, 'arm\config\debugger\atmel\ioat91sam7X256.ddf']
+    - -d
+    - sim
+:cmock:
+  :plugins: []
+  :includes:
+    - Types.h
+  :mock_path: ./build/mocks
+
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/rakefile.rb b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/rakefile.rb
new file mode 100644
index 000000000..06ab1d51d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/rakefile.rb
@@ -0,0 +1,42 @@
+HERE = __dir__ + '/'
+
+require 'rake'
+require 'rake/clean'
+require 'rake/testtask'
+require './rakefile_helper'
+
+include RakefileHelpers
+
+REQUIRED_DIRS = ['./build', './build/mocks'].freeze
+REQUIRED_DIRS.each do |v|
+  directory v
+end
+
+# Load default configuration, for now
+DEFAULT_CONFIG_FILE = 'gcc.yml'.freeze
+configure_toolchain(DEFAULT_CONFIG_FILE)
+
+task :unit do
+  run_tests(unit_test_files)
+end
+
+desc 'Generate test summary'
+task :summary do
+  report_summary
+end
+
+desc 'Build and test Unity'
+task :all => %i[clean unit summary]
+task :default => REQUIRED_DIRS + %i[clobber all]
+task :ci => [:default]
+task :cruise => [:default]
+
+desc 'Load configuration'
+task :config, :config_file do |_t, args|
+  configure_toolchain(args[:config_file])
+end
+
+desc 'Return error on Failures'
+task :strict do
+  $return_error_on_failures = true
+end
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/rakefile_helper.rb b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/rakefile_helper.rb
new file mode 100644
index 000000000..ce401d371
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/rakefile_helper.rb
@@ -0,0 +1,268 @@
+require 'yaml'
+require 'fileutils'
+require '../../vendor/unity/auto/unity_test_summary'
+require '../../vendor/unity/auto/generate_test_runner'
+require '../../vendor/unity/auto/colour_reporter'
+
+module RakefileHelpers
+  $return_error_on_failures = false
+
+  C_EXTENSION = '.c'.freeze
+
+  def load_configuration(config_file)
+    $cfg_file = config_file
+    $cfg = YAML.load(File.read($cfg_file))
+    $colour_output = false unless $cfg['colour']
+  end
+
+  def configure_clean
+    CLEAN.include($cfg['compiler']['build_path'] + '*.*') unless $cfg['compiler']['build_path'].nil?
+  end
+
+  def configure_toolchain(config_file = DEFAULT_CONFIG_FILE)
+    config_file += '.yml' unless config_file =~ /\.yml$/
+    load_configuration(config_file)
+    configure_clean
+  end
+
+  def unit_test_files
+    path = $cfg['compiler']['unit_tests_path'] + 'Test*' + C_EXTENSION
+    path.tr!('\\', '/')
+    FileList.new(path)
+  end
+
+  def local_include_dirs
+    include_dirs = $cfg['compiler']['includes']['items'].dup
+    include_dirs.delete_if { |dir| dir.is_a?(Array) }
+    include_dirs
+  end
+
+  def extract_headers(filename)
+    includes = []
+    lines = File.readlines(filename)
+    lines.each do |line|
+      m = line.match(/^\s*#include\s+\"\s*(.+\.[hH])\s*\"/)
+      unless m.nil?
+        includes << m[1]
+      end
+    end
+    includes
+  end
+
+  def find_source_file(header, paths)
+    paths.each do |dir|
+      src_file = dir + header.ext(C_EXTENSION)
+      if File.exist?(src_file)
+        return src_file
+      end
+    end
+    nil
+  end
+
+  def tackit(strings)
+    case strings
+    when Array
+      "\"#{strings.join}\""
+    when /^-/
+      strings
+    when /\s/
+      "\"#{strings}\""
+    else
+      strings
+    end
+  end
+
+  def squash(prefix, items)
+    result = ''
+    items.each { |item| result += " #{prefix}#{tackit(item)}" }
+    result
+  end
+
+  def build_compiler_fields
+    command = tackit($cfg['compiler']['path'])
+    defines = if $cfg['compiler']['defines']['items'].nil?
+                ''
+              else
+                squash($cfg['compiler']['defines']['prefix'], $cfg['compiler']['defines']['items'])
+              end
+    options = squash('', $cfg['compiler']['options'])
+    includes = squash($cfg['compiler']['includes']['prefix'], $cfg['compiler']['includes']['items'])
+    includes = includes.gsub(/\\ /, ' ').gsub(/\\\"/, '"').gsub(/\\$/, '') # Remove trailing slashes (for IAR)
+    { :command => command, :defines => defines, :options => options, :includes => includes }
+  end
+
+  def compile(file, _defines = [])
+    compiler = build_compiler_fields
+    cmd_str  = "#{compiler[:command]}#{compiler[:defines]}#{compiler[:options]}#{compiler[:includes]} #{file} " \
+               "#{$cfg['compiler']['object_files']['prefix']}#{$cfg['compiler']['object_files']['destination']}"
+    obj_file = "#{File.basename(file, C_EXTENSION)}#{$cfg['compiler']['object_files']['extension']}"
+    execute(cmd_str + obj_file)
+    obj_file
+  end
+
+  def build_linker_fields
+    command = tackit($cfg['linker']['path'])
+    options = if $cfg['linker']['options'].nil?
+                ''
+              else
+                squash('', $cfg['linker']['options'])
+              end
+    includes = if $cfg['linker']['includes'].nil? || $cfg['linker']['includes']['items'].nil?
+                 ''
+               else
+                 squash($cfg['linker']['includes']['prefix'], $cfg['linker']['includes']['items'])
+               end
+    includes = includes.gsub(/\\ /, ' ').gsub(/\\\"/, '"').gsub(/\\$/, '') # Remove trailing slashes (for IAR)
+    { :command => command, :options => options, :includes => includes }
+  end
+
+  def link_it(exe_name, obj_list)
+    linker = build_linker_fields
+    cmd_str = "#{linker[:command]}#{linker[:includes]} " +
+              (obj_list.map { |obj| "#{$cfg['linker']['object_files']['path']}#{obj} " }).join +
+              $cfg['linker']['bin_files']['prefix'] + ' ' +
+              $cfg['linker']['bin_files']['destination'] +
+              exe_name + $cfg['linker']['bin_files']['extension'] + " #{linker[:options]}"
+    execute(cmd_str)
+  end
+
+  def build_simulator_fields
+    return nil if $cfg['simulator'].nil?
+
+    command = if $cfg['simulator']['path'].nil?
+                ''
+              else
+                (tackit($cfg['simulator']['path']) + ' ')
+              end
+    pre_support = if $cfg['simulator']['pre_support'].nil?
+                    ''
+                  else
+                    squash('', $cfg['simulator']['pre_support'])
+                  end
+    post_support = if $cfg['simulator']['post_support'].nil?
+                     ''
+                   else
+                     squash('', $cfg['simulator']['post_support'])
+                   end
+    { :command => command, :pre_support => pre_support, :post_support => post_support }
+  end
+
+  def execute(command_string, verbose = true, ok_to_fail = false)
+    report command_string
+    output = `#{command_string}`.chomp
+    report(output) if verbose && !output.nil? && !output.empty?
+    unless (!$?.nil? && $?.exitstatus.zero?) || ok_to_fail
+      raise "Command failed. (Returned #{$?.exitstatus})"
+    end
+
+    output
+  end
+
+  def report_summary
+    summary = UnityTestSummary.new
+    summary.root = HERE
+    results_glob = "#{$cfg['compiler']['build_path']}*.test*"
+    results_glob.tr!('\\', '/')
+    results = Dir[results_glob]
+    summary.targets = results
+    report summary.run
+    raise 'There were failures' if (summary.failures > 0) && $return_error_on_failures
+  end
+
+  def run_tests(test_files)
+    report 'Running system tests...'
+
+    # Tack on TEST define for compiling unit tests
+    load_configuration($cfg_file)
+    test_defines = ['TEST']
+    $cfg['compiler']['defines']['items'] = [] if $cfg['compiler']['defines']['items'].nil?
+    $cfg['compiler']['defines']['items'] << 'TEST'
+
+    include_dirs = local_include_dirs
+
+    # Build and execute each unit test
+    test_files.each do |test|
+      obj_list = []
+
+      # Detect dependencies and build required required modules
+      header_list = (extract_headers(test) + ['cmock.h'] + [$cfg[:cmock][:unity_helper_path]]).compact.uniq
+      header_list.each do |header|
+        # create mocks if needed
+        next unless header =~ /Mock/
+
+        require '../../lib/cmock.rb'
+        @cmock ||= CMock.new($cfg_file)
+        @cmock.setup_mocks([$cfg['compiler']['source_path'] + header.gsub('Mock', '')])
+      end
+
+      # compile all mocks
+      header_list.each do |header|
+        # compile source file header if it exists
+        src_file = find_source_file(header, include_dirs)
+        unless src_file.nil?
+          obj_list << compile(src_file, test_defines)
+        end
+      end
+
+      # Build the test runner (generate if configured to do so)
+      test_base = File.basename(test, C_EXTENSION)
+      runner_name = test_base + '_Runner.c'
+      if $cfg['compiler']['runner_path'].nil?
+        runner_path = $cfg['compiler']['build_path'] + runner_name
+        test_gen = UnityTestRunnerGenerator.new($cfg_file)
+        test_gen.run(test, runner_path)
+      else
+        runner_path = $cfg['compiler']['runner_path'] + runner_name
+      end
+
+      obj_list << compile(runner_path, test_defines)
+
+      # Build the test module
+      obj_list << compile(test, test_defines)
+
+      # Link the test executable
+      link_it(test_base, obj_list)
+
+      # Execute unit test and generate results file
+      simulator = build_simulator_fields
+      executable = $cfg['linker']['bin_files']['destination'] + test_base + $cfg['linker']['bin_files']['extension']
+      cmd_str = if simulator.nil?
+                  executable
+                else
+                  "#{simulator[:command]} #{simulator[:pre_support]} #{executable} #{simulator[:post_support]}"
+                end
+      output = execute(cmd_str, true, true)
+      test_results = $cfg['compiler']['build_path'] + test_base
+      test_results += if output.match(/OK$/m).nil?
+                        '.testfail'
+                      else
+                        '.testpass'
+                      end
+      File.open(test_results, 'w') { |f| f.print output }
+    end
+  end
+
+  def build_application(main)
+    report 'Building application...'
+
+    obj_list = []
+    load_configuration($cfg_file)
+    main_path = $cfg['compiler']['source_path'] + main + C_EXTENSION
+
+    # Detect dependencies and build required required modules
+    include_dirs = local_include_dirs
+    extract_headers(main_path).each do |header|
+      src_file = find_source_file(header, include_dirs)
+      unless src_file.nil?
+        obj_list << compile(src_file)
+      end
+    end
+
+    # Build the main source file
+    main_base = File.basename(main_path, C_EXTENSION)
+    obj_list << compile(main_path)
+
+    # Create the executable
+    link_it(main_base, obj_list)
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AT91SAM7X256.h b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AT91SAM7X256.h
new file mode 100644
index 000000000..baa031398
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AT91SAM7X256.h
@@ -0,0 +1,2556 @@
+//  ----------------------------------------------------------------------------
+//          ATMEL Microcontroller Software Support  -  ROUSSET  -
+//  ----------------------------------------------------------------------------
+//  DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+//  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+//  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+//  DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+//  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+//  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+//  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+//  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+//  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//  ----------------------------------------------------------------------------
+// File Name           : AT91SAM7X256.h
+// Object              : AT91SAM7X256 definitions
+// Generated           : AT91 SW Application Group  01/16/2006 (16:36:21)
+// 
+// CVS Reference       : /AT91SAM7X256.pl/1.15/Wed Nov  2 13:56:49 2005//
+// CVS Reference       : /SYS_SAM7X.pl/1.3/Tue Feb  1 17:01:43 2005//
+// CVS Reference       : /MC_SAM7X.pl/1.2/Fri May 20 14:13:04 2005//
+// CVS Reference       : /PMC_SAM7X.pl/1.4/Tue Feb  8 13:58:10 2005//
+// CVS Reference       : /RSTC_SAM7X.pl/1.2/Wed Jul 13 14:57:50 2005//
+// CVS Reference       : /UDP_SAM7X.pl/1.1/Tue May 10 11:35:35 2005//
+// CVS Reference       : /PWM_SAM7X.pl/1.1/Tue May 10 11:53:07 2005//
+// CVS Reference       : /AIC_6075B.pl/1.3/Fri May 20 14:01:30 2005//
+// CVS Reference       : /PIO_6057A.pl/1.2/Thu Feb  3 10:18:28 2005//
+// CVS Reference       : /RTTC_6081A.pl/1.2/Tue Nov  9 14:43:58 2004//
+// CVS Reference       : /PITC_6079A.pl/1.2/Tue Nov  9 14:43:56 2004//
+// CVS Reference       : /WDTC_6080A.pl/1.3/Tue Nov  9 14:44:00 2004//
+// CVS Reference       : /VREG_6085B.pl/1.1/Tue Feb  1 16:05:48 2005//
+// CVS Reference       : /PDC_6074C.pl/1.2/Thu Feb  3 08:48:54 2005//
+// CVS Reference       : /DBGU_6059D.pl/1.1/Mon Jan 31 13:15:32 2005//
+// CVS Reference       : /SPI_6088D.pl/1.3/Fri May 20 14:08:59 2005//
+// CVS Reference       : /US_6089C.pl/1.1/Mon Jul 12 18:23:26 2004//
+// CVS Reference       : /SSC_6078B.pl/1.1/Wed Jul 13 15:19:19 2005//
+// CVS Reference       : /TWI_6061A.pl/1.1/Tue Jul 13 07:38:06 2004//
+// CVS Reference       : /TC_6082A.pl/1.7/Fri Mar 11 12:52:17 2005//
+// CVS Reference       : /CAN_6019B.pl/1.1/Tue Mar  8 12:42:22 2005//
+// CVS Reference       : /EMACB_6119A.pl/1.6/Wed Jul 13 15:05:35 2005//
+// CVS Reference       : /ADC_6051C.pl/1.1/Fri Oct 17 09:12:38 2003//
+//  ----------------------------------------------------------------------------
+
+#ifndef AT91SAM7X256_H
+#define AT91SAM7X256_H
+
+typedef volatile unsigned int AT91_REG;// Hardware register definition
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR System Peripherals
+// *****************************************************************************
+typedef struct _AT91S_SYS {
+    AT91_REG     AIC_SMR[32];     // Source Mode Register
+    AT91_REG     AIC_SVR[32];     // Source Vector Register
+    AT91_REG     AIC_IVR;     // IRQ Vector Register
+    AT91_REG     AIC_FVR;     // FIQ Vector Register
+    AT91_REG     AIC_ISR;     // Interrupt Status Register
+    AT91_REG     AIC_IPR;     // Interrupt Pending Register
+    AT91_REG     AIC_IMR;     // Interrupt Mask Register
+    AT91_REG     AIC_CISR;     // Core Interrupt Status Register
+    AT91_REG     Reserved0[2];     // 
+    AT91_REG     AIC_IECR;     // Interrupt Enable Command Register
+    AT91_REG     AIC_IDCR;     // Interrupt Disable Command Register
+    AT91_REG     AIC_ICCR;     // Interrupt Clear Command Register
+    AT91_REG     AIC_ISCR;     // Interrupt Set Command Register
+    AT91_REG     AIC_EOICR;     // End of Interrupt Command Register
+    AT91_REG     AIC_SPU;     // Spurious Vector Register
+    AT91_REG     AIC_DCR;     // Debug Control Register (Protect)
+    AT91_REG     Reserved1[1];     // 
+    AT91_REG     AIC_FFER;     // Fast Forcing Enable Register
+    AT91_REG     AIC_FFDR;     // Fast Forcing Disable Register
+    AT91_REG     AIC_FFSR;     // Fast Forcing Status Register
+    AT91_REG     Reserved2[45];     // 
+    AT91_REG     DBGU_CR;     // Control Register
+    AT91_REG     DBGU_MR;     // Mode Register
+    AT91_REG     DBGU_IER;     // Interrupt Enable Register
+    AT91_REG     DBGU_IDR;     // Interrupt Disable Register
+    AT91_REG     DBGU_IMR;     // Interrupt Mask Register
+    AT91_REG     DBGU_CSR;     // Channel Status Register
+    AT91_REG     DBGU_RHR;     // Receiver Holding Register
+    AT91_REG     DBGU_THR;     // Transmitter Holding Register
+    AT91_REG     DBGU_BRGR;     // Baud Rate Generator Register
+    AT91_REG     Reserved3[7];     // 
+    AT91_REG     DBGU_CIDR;     // Chip ID Register
+    AT91_REG     DBGU_EXID;     // Chip ID Extension Register
+    AT91_REG     DBGU_FNTR;     // Force NTRST Register
+    AT91_REG     Reserved4[45];     // 
+    AT91_REG     DBGU_RPR;     // Receive Pointer Register
+    AT91_REG     DBGU_RCR;     // Receive Counter Register
+    AT91_REG     DBGU_TPR;     // Transmit Pointer Register
+    AT91_REG     DBGU_TCR;     // Transmit Counter Register
+    AT91_REG     DBGU_RNPR;     // Receive Next Pointer Register
+    AT91_REG     DBGU_RNCR;     // Receive Next Counter Register
+    AT91_REG     DBGU_TNPR;     // Transmit Next Pointer Register
+    AT91_REG     DBGU_TNCR;     // Transmit Next Counter Register
+    AT91_REG     DBGU_PTCR;     // PDC Transfer Control Register
+    AT91_REG     DBGU_PTSR;     // PDC Transfer Status Register
+    AT91_REG     Reserved5[54];     // 
+    AT91_REG     PIOA_PER;     // PIO Enable Register
+    AT91_REG     PIOA_PDR;     // PIO Disable Register
+    AT91_REG     PIOA_PSR;     // PIO Status Register
+    AT91_REG     Reserved6[1];     // 
+    AT91_REG     PIOA_OER;     // Output Enable Register
+    AT91_REG     PIOA_ODR;     // Output Disable Registerr
+    AT91_REG     PIOA_OSR;     // Output Status Register
+    AT91_REG     Reserved7[1];     // 
+    AT91_REG     PIOA_IFER;     // Input Filter Enable Register
+    AT91_REG     PIOA_IFDR;     // Input Filter Disable Register
+    AT91_REG     PIOA_IFSR;     // Input Filter Status Register
+    AT91_REG     Reserved8[1];     // 
+    AT91_REG     PIOA_SODR;     // Set Output Data Register
+    AT91_REG     PIOA_CODR;     // Clear Output Data Register
+    AT91_REG     PIOA_ODSR;     // Output Data Status Register
+    AT91_REG     PIOA_PDSR;     // Pin Data Status Register
+    AT91_REG     PIOA_IER;     // Interrupt Enable Register
+    AT91_REG     PIOA_IDR;     // Interrupt Disable Register
+    AT91_REG     PIOA_IMR;     // Interrupt Mask Register
+    AT91_REG     PIOA_ISR;     // Interrupt Status Register
+    AT91_REG     PIOA_MDER;     // Multi-driver Enable Register
+    AT91_REG     PIOA_MDDR;     // Multi-driver Disable Register
+    AT91_REG     PIOA_MDSR;     // Multi-driver Status Register
+    AT91_REG     Reserved9[1];     // 
+    AT91_REG     PIOA_PPUDR;     // Pull-up Disable Register
+    AT91_REG     PIOA_PPUER;     // Pull-up Enable Register
+    AT91_REG     PIOA_PPUSR;     // Pull-up Status Register
+    AT91_REG     Reserved10[1];     // 
+    AT91_REG     PIOA_ASR;     // Select A Register
+    AT91_REG     PIOA_BSR;     // Select B Register
+    AT91_REG     PIOA_ABSR;     // AB Select Status Register
+    AT91_REG     Reserved11[9];     // 
+    AT91_REG     PIOA_OWER;     // Output Write Enable Register
+    AT91_REG     PIOA_OWDR;     // Output Write Disable Register
+    AT91_REG     PIOA_OWSR;     // Output Write Status Register
+    AT91_REG     Reserved12[85];     // 
+    AT91_REG     PIOB_PER;     // PIO Enable Register
+    AT91_REG     PIOB_PDR;     // PIO Disable Register
+    AT91_REG     PIOB_PSR;     // PIO Status Register
+    AT91_REG     Reserved13[1];     // 
+    AT91_REG     PIOB_OER;     // Output Enable Register
+    AT91_REG     PIOB_ODR;     // Output Disable Registerr
+    AT91_REG     PIOB_OSR;     // Output Status Register
+    AT91_REG     Reserved14[1];     // 
+    AT91_REG     PIOB_IFER;     // Input Filter Enable Register
+    AT91_REG     PIOB_IFDR;     // Input Filter Disable Register
+    AT91_REG     PIOB_IFSR;     // Input Filter Status Register
+    AT91_REG     Reserved15[1];     // 
+    AT91_REG     PIOB_SODR;     // Set Output Data Register
+    AT91_REG     PIOB_CODR;     // Clear Output Data Register
+    AT91_REG     PIOB_ODSR;     // Output Data Status Register
+    AT91_REG     PIOB_PDSR;     // Pin Data Status Register
+    AT91_REG     PIOB_IER;     // Interrupt Enable Register
+    AT91_REG     PIOB_IDR;     // Interrupt Disable Register
+    AT91_REG     PIOB_IMR;     // Interrupt Mask Register
+    AT91_REG     PIOB_ISR;     // Interrupt Status Register
+    AT91_REG     PIOB_MDER;     // Multi-driver Enable Register
+    AT91_REG     PIOB_MDDR;     // Multi-driver Disable Register
+    AT91_REG     PIOB_MDSR;     // Multi-driver Status Register
+    AT91_REG     Reserved16[1];     // 
+    AT91_REG     PIOB_PPUDR;     // Pull-up Disable Register
+    AT91_REG     PIOB_PPUER;     // Pull-up Enable Register
+    AT91_REG     PIOB_PPUSR;     // Pull-up Status Register
+    AT91_REG     Reserved17[1];     // 
+    AT91_REG     PIOB_ASR;     // Select A Register
+    AT91_REG     PIOB_BSR;     // Select B Register
+    AT91_REG     PIOB_ABSR;     // AB Select Status Register
+    AT91_REG     Reserved18[9];     // 
+    AT91_REG     PIOB_OWER;     // Output Write Enable Register
+    AT91_REG     PIOB_OWDR;     // Output Write Disable Register
+    AT91_REG     PIOB_OWSR;     // Output Write Status Register
+    AT91_REG     Reserved19[341];     // 
+    AT91_REG     PMC_SCER;     // System Clock Enable Register
+    AT91_REG     PMC_SCDR;     // System Clock Disable Register
+    AT91_REG     PMC_SCSR;     // System Clock Status Register
+    AT91_REG     Reserved20[1];     // 
+    AT91_REG     PMC_PCER;     // Peripheral Clock Enable Register
+    AT91_REG     PMC_PCDR;     // Peripheral Clock Disable Register
+    AT91_REG     PMC_PCSR;     // Peripheral Clock Status Register
+    AT91_REG     Reserved21[1];     // 
+    AT91_REG     PMC_MOR;     // Main Oscillator Register
+    AT91_REG     PMC_MCFR;     // Main Clock  Frequency Register
+    AT91_REG     Reserved22[1];     // 
+    AT91_REG     PMC_PLLR;     // PLL Register
+    AT91_REG     PMC_MCKR;     // Master Clock Register
+    AT91_REG     Reserved23[3];     // 
+    AT91_REG     PMC_PCKR[4];     // Programmable Clock Register
+    AT91_REG     Reserved24[4];     // 
+    AT91_REG     PMC_IER;     // Interrupt Enable Register
+    AT91_REG     PMC_IDR;     // Interrupt Disable Register
+    AT91_REG     PMC_SR;     // Status Register
+    AT91_REG     PMC_IMR;     // Interrupt Mask Register
+    AT91_REG     Reserved25[36];     // 
+    AT91_REG     RSTC_RCR;     // Reset Control Register
+    AT91_REG     RSTC_RSR;     // Reset Status Register
+    AT91_REG     RSTC_RMR;     // Reset Mode Register
+    AT91_REG     Reserved26[5];     // 
+    AT91_REG     RTTC_RTMR;     // Real-time Mode Register
+    AT91_REG     RTTC_RTAR;     // Real-time Alarm Register
+    AT91_REG     RTTC_RTVR;     // Real-time Value Register
+    AT91_REG     RTTC_RTSR;     // Real-time Status Register
+    AT91_REG     PITC_PIMR;     // Period Interval Mode Register
+    AT91_REG     PITC_PISR;     // Period Interval Status Register
+    AT91_REG     PITC_PIVR;     // Period Interval Value Register
+    AT91_REG     PITC_PIIR;     // Period Interval Image Register
+    AT91_REG     WDTC_WDCR;     // Watchdog Control Register
+    AT91_REG     WDTC_WDMR;     // Watchdog Mode Register
+    AT91_REG     WDTC_WDSR;     // Watchdog Status Register
+    AT91_REG     Reserved27[5];     // 
+    AT91_REG     VREG_MR;     // Voltage Regulator Mode Register
+} AT91S_SYS, *AT91PS_SYS;
+
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Advanced Interrupt Controller
+// *****************************************************************************
+typedef struct _AT91S_AIC {
+    AT91_REG     AIC_SMR[32];     // Source Mode Register
+    AT91_REG     AIC_SVR[32];     // Source Vector Register
+    AT91_REG     AIC_IVR;     // IRQ Vector Register
+    AT91_REG     AIC_FVR;     // FIQ Vector Register
+    AT91_REG     AIC_ISR;     // Interrupt Status Register
+    AT91_REG     AIC_IPR;     // Interrupt Pending Register
+    AT91_REG     AIC_IMR;     // Interrupt Mask Register
+    AT91_REG     AIC_CISR;     // Core Interrupt Status Register
+    AT91_REG     Reserved0[2];     // 
+    AT91_REG     AIC_IECR;     // Interrupt Enable Command Register
+    AT91_REG     AIC_IDCR;     // Interrupt Disable Command Register
+    AT91_REG     AIC_ICCR;     // Interrupt Clear Command Register
+    AT91_REG     AIC_ISCR;     // Interrupt Set Command Register
+    AT91_REG     AIC_EOICR;     // End of Interrupt Command Register
+    AT91_REG     AIC_SPU;     // Spurious Vector Register
+    AT91_REG     AIC_DCR;     // Debug Control Register (Protect)
+    AT91_REG     Reserved1[1];     // 
+    AT91_REG     AIC_FFER;     // Fast Forcing Enable Register
+    AT91_REG     AIC_FFDR;     // Fast Forcing Disable Register
+    AT91_REG     AIC_FFSR;     // Fast Forcing Status Register
+} AT91S_AIC, *AT91PS_AIC;
+
+// -------- AIC_SMR : (AIC Offset: 0x0) Control Register -------- 
+#define AT91C_AIC_PRIOR       ((unsigned int) 0x7 <<  0) // (AIC) Priority Level
+#define     AT91C_AIC_PRIOR_LOWEST               ((unsigned int) 0x0) // (AIC) Lowest priority level
+#define     AT91C_AIC_PRIOR_HIGHEST              ((unsigned int) 0x7) // (AIC) Highest priority level
+#define AT91C_AIC_SRCTYPE     ((unsigned int) 0x3 <<  5) // (AIC) Interrupt Source Type
+#define     AT91C_AIC_SRCTYPE_EXT_LOW_LEVEL        ((unsigned int) 0x0 <<  5) // (AIC) External Sources Code Label Low-level Sensitive
+#define     AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL       ((unsigned int) 0x0 <<  5) // (AIC) Internal Sources Code Label High-level Sensitive
+#define     AT91C_AIC_SRCTYPE_INT_POSITIVE_EDGE    ((unsigned int) 0x1 <<  5) // (AIC) Internal Sources Code Label Positive Edge triggered
+#define     AT91C_AIC_SRCTYPE_EXT_NEGATIVE_EDGE    ((unsigned int) 0x1 <<  5) // (AIC) External Sources Code Label Negative Edge triggered
+#define     AT91C_AIC_SRCTYPE_HIGH_LEVEL           ((unsigned int) 0x2 <<  5) // (AIC) Internal Or External Sources Code Label High-level Sensitive
+#define     AT91C_AIC_SRCTYPE_POSITIVE_EDGE        ((unsigned int) 0x3 <<  5) // (AIC) Internal Or External Sources Code Label Positive Edge triggered
+// -------- AIC_CISR : (AIC Offset: 0x114) AIC Core Interrupt Status Register -------- 
+#define AT91C_AIC_NFIQ        ((unsigned int) 0x1 <<  0) // (AIC) NFIQ Status
+#define AT91C_AIC_NIRQ        ((unsigned int) 0x1 <<  1) // (AIC) NIRQ Status
+// -------- AIC_DCR : (AIC Offset: 0x138) AIC Debug Control Register (Protect) -------- 
+#define AT91C_AIC_DCR_PROT    ((unsigned int) 0x1 <<  0) // (AIC) Protection Mode
+#define AT91C_AIC_DCR_GMSK    ((unsigned int) 0x1 <<  1) // (AIC) General Mask
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Peripheral DMA Controller
+// *****************************************************************************
+typedef struct _AT91S_PDC {
+    AT91_REG     PDC_RPR;     // Receive Pointer Register
+    AT91_REG     PDC_RCR;     // Receive Counter Register
+    AT91_REG     PDC_TPR;     // Transmit Pointer Register
+    AT91_REG     PDC_TCR;     // Transmit Counter Register
+    AT91_REG     PDC_RNPR;     // Receive Next Pointer Register
+    AT91_REG     PDC_RNCR;     // Receive Next Counter Register
+    AT91_REG     PDC_TNPR;     // Transmit Next Pointer Register
+    AT91_REG     PDC_TNCR;     // Transmit Next Counter Register
+    AT91_REG     PDC_PTCR;     // PDC Transfer Control Register
+    AT91_REG     PDC_PTSR;     // PDC Transfer Status Register
+} AT91S_PDC, *AT91PS_PDC;
+
+// -------- PDC_PTCR : (PDC Offset: 0x20) PDC Transfer Control Register -------- 
+#define AT91C_PDC_RXTEN       ((unsigned int) 0x1 <<  0) // (PDC) Receiver Transfer Enable
+#define AT91C_PDC_RXTDIS      ((unsigned int) 0x1 <<  1) // (PDC) Receiver Transfer Disable
+#define AT91C_PDC_TXTEN       ((unsigned int) 0x1 <<  8) // (PDC) Transmitter Transfer Enable
+#define AT91C_PDC_TXTDIS      ((unsigned int) 0x1 <<  9) // (PDC) Transmitter Transfer Disable
+// -------- PDC_PTSR : (PDC Offset: 0x24) PDC Transfer Status Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Debug Unit
+// *****************************************************************************
+typedef struct _AT91S_DBGU {
+    AT91_REG     DBGU_CR;     // Control Register
+    AT91_REG     DBGU_MR;     // Mode Register
+    AT91_REG     DBGU_IER;     // Interrupt Enable Register
+    AT91_REG     DBGU_IDR;     // Interrupt Disable Register
+    AT91_REG     DBGU_IMR;     // Interrupt Mask Register
+    AT91_REG     DBGU_CSR;     // Channel Status Register
+    AT91_REG     DBGU_RHR;     // Receiver Holding Register
+    AT91_REG     DBGU_THR;     // Transmitter Holding Register
+    AT91_REG     DBGU_BRGR;     // Baud Rate Generator Register
+    AT91_REG     Reserved0[7];     // 
+    AT91_REG     DBGU_CIDR;     // Chip ID Register
+    AT91_REG     DBGU_EXID;     // Chip ID Extension Register
+    AT91_REG     DBGU_FNTR;     // Force NTRST Register
+    AT91_REG     Reserved1[45];     // 
+    AT91_REG     DBGU_RPR;     // Receive Pointer Register
+    AT91_REG     DBGU_RCR;     // Receive Counter Register
+    AT91_REG     DBGU_TPR;     // Transmit Pointer Register
+    AT91_REG     DBGU_TCR;     // Transmit Counter Register
+    AT91_REG     DBGU_RNPR;     // Receive Next Pointer Register
+    AT91_REG     DBGU_RNCR;     // Receive Next Counter Register
+    AT91_REG     DBGU_TNPR;     // Transmit Next Pointer Register
+    AT91_REG     DBGU_TNCR;     // Transmit Next Counter Register
+    AT91_REG     DBGU_PTCR;     // PDC Transfer Control Register
+    AT91_REG     DBGU_PTSR;     // PDC Transfer Status Register
+} AT91S_DBGU, *AT91PS_DBGU;
+
+// -------- DBGU_CR : (DBGU Offset: 0x0) Debug Unit Control Register -------- 
+#define AT91C_US_RSTRX        ((unsigned int) 0x1 <<  2) // (DBGU) Reset Receiver
+#define AT91C_US_RSTTX        ((unsigned int) 0x1 <<  3) // (DBGU) Reset Transmitter
+#define AT91C_US_RXEN         ((unsigned int) 0x1 <<  4) // (DBGU) Receiver Enable
+#define AT91C_US_RXDIS        ((unsigned int) 0x1 <<  5) // (DBGU) Receiver Disable
+#define AT91C_US_TXEN         ((unsigned int) 0x1 <<  6) // (DBGU) Transmitter Enable
+#define AT91C_US_TXDIS        ((unsigned int) 0x1 <<  7) // (DBGU) Transmitter Disable
+#define AT91C_US_RSTSTA       ((unsigned int) 0x1 <<  8) // (DBGU) Reset Status Bits
+// -------- DBGU_MR : (DBGU Offset: 0x4) Debug Unit Mode Register -------- 
+#define AT91C_US_PAR          ((unsigned int) 0x7 <<  9) // (DBGU) Parity type
+#define     AT91C_US_PAR_EVEN                 ((unsigned int) 0x0 <<  9) // (DBGU) Even Parity
+#define     AT91C_US_PAR_ODD                  ((unsigned int) 0x1 <<  9) // (DBGU) Odd Parity
+#define     AT91C_US_PAR_SPACE                ((unsigned int) 0x2 <<  9) // (DBGU) Parity forced to 0 (Space)
+#define     AT91C_US_PAR_MARK                 ((unsigned int) 0x3 <<  9) // (DBGU) Parity forced to 1 (Mark)
+#define     AT91C_US_PAR_NONE                 ((unsigned int) 0x4 <<  9) // (DBGU) No Parity
+#define     AT91C_US_PAR_MULTI_DROP           ((unsigned int) 0x6 <<  9) // (DBGU) Multi-drop mode
+#define AT91C_US_CHMODE       ((unsigned int) 0x3 << 14) // (DBGU) Channel Mode
+#define     AT91C_US_CHMODE_NORMAL               ((unsigned int) 0x0 << 14) // (DBGU) Normal Mode: The USART channel operates as an RX/TX USART.
+#define     AT91C_US_CHMODE_AUTO                 ((unsigned int) 0x1 << 14) // (DBGU) Automatic Echo: Receiver Data Input is connected to the TXD pin.
+#define     AT91C_US_CHMODE_LOCAL                ((unsigned int) 0x2 << 14) // (DBGU) Local Loopback: Transmitter Output Signal is connected to Receiver Input Signal.
+#define     AT91C_US_CHMODE_REMOTE               ((unsigned int) 0x3 << 14) // (DBGU) Remote Loopback: RXD pin is internally connected to TXD pin.
+// -------- DBGU_IER : (DBGU Offset: 0x8) Debug Unit Interrupt Enable Register -------- 
+#define AT91C_US_RXRDY        ((unsigned int) 0x1 <<  0) // (DBGU) RXRDY Interrupt
+#define AT91C_US_TXRDY        ((unsigned int) 0x1 <<  1) // (DBGU) TXRDY Interrupt
+#define AT91C_US_ENDRX        ((unsigned int) 0x1 <<  3) // (DBGU) End of Receive Transfer Interrupt
+#define AT91C_US_ENDTX        ((unsigned int) 0x1 <<  4) // (DBGU) End of Transmit Interrupt
+#define AT91C_US_OVRE         ((unsigned int) 0x1 <<  5) // (DBGU) Overrun Interrupt
+#define AT91C_US_FRAME        ((unsigned int) 0x1 <<  6) // (DBGU) Framing Error Interrupt
+#define AT91C_US_PARE         ((unsigned int) 0x1 <<  7) // (DBGU) Parity Error Interrupt
+#define AT91C_US_TXEMPTY      ((unsigned int) 0x1 <<  9) // (DBGU) TXEMPTY Interrupt
+#define AT91C_US_TXBUFE       ((unsigned int) 0x1 << 11) // (DBGU) TXBUFE Interrupt
+#define AT91C_US_RXBUFF       ((unsigned int) 0x1 << 12) // (DBGU) RXBUFF Interrupt
+#define AT91C_US_COMM_TX      ((unsigned int) 0x1 << 30) // (DBGU) COMM_TX Interrupt
+#define AT91C_US_COMM_RX      ((unsigned int) 0x1 << 31) // (DBGU) COMM_RX Interrupt
+// -------- DBGU_IDR : (DBGU Offset: 0xc) Debug Unit Interrupt Disable Register -------- 
+// -------- DBGU_IMR : (DBGU Offset: 0x10) Debug Unit Interrupt Mask Register -------- 
+// -------- DBGU_CSR : (DBGU Offset: 0x14) Debug Unit Channel Status Register -------- 
+// -------- DBGU_FNTR : (DBGU Offset: 0x48) Debug Unit FORCE_NTRST Register -------- 
+#define AT91C_US_FORCE_NTRST  ((unsigned int) 0x1 <<  0) // (DBGU) Force NTRST in JTAG
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Parallel Input Output Controler
+// *****************************************************************************
+typedef struct _AT91S_PIO {
+    AT91_REG     PIO_PER;     // PIO Enable Register
+    AT91_REG     PIO_PDR;     // PIO Disable Register
+    AT91_REG     PIO_PSR;     // PIO Status Register
+    AT91_REG     Reserved0[1];     // 
+    AT91_REG     PIO_OER;     // Output Enable Register
+    AT91_REG     PIO_ODR;     // Output Disable Registerr
+    AT91_REG     PIO_OSR;     // Output Status Register
+    AT91_REG     Reserved1[1];     // 
+    AT91_REG     PIO_IFER;     // Input Filter Enable Register
+    AT91_REG     PIO_IFDR;     // Input Filter Disable Register
+    AT91_REG     PIO_IFSR;     // Input Filter Status Register
+    AT91_REG     Reserved2[1];     // 
+    AT91_REG     PIO_SODR;     // Set Output Data Register
+    AT91_REG     PIO_CODR;     // Clear Output Data Register
+    AT91_REG     PIO_ODSR;     // Output Data Status Register
+    AT91_REG     PIO_PDSR;     // Pin Data Status Register
+    AT91_REG     PIO_IER;     // Interrupt Enable Register
+    AT91_REG     PIO_IDR;     // Interrupt Disable Register
+    AT91_REG     PIO_IMR;     // Interrupt Mask Register
+    AT91_REG     PIO_ISR;     // Interrupt Status Register
+    AT91_REG     PIO_MDER;     // Multi-driver Enable Register
+    AT91_REG     PIO_MDDR;     // Multi-driver Disable Register
+    AT91_REG     PIO_MDSR;     // Multi-driver Status Register
+    AT91_REG     Reserved3[1];     // 
+    AT91_REG     PIO_PPUDR;     // Pull-up Disable Register
+    AT91_REG     PIO_PPUER;     // Pull-up Enable Register
+    AT91_REG     PIO_PPUSR;     // Pull-up Status Register
+    AT91_REG     Reserved4[1];     // 
+    AT91_REG     PIO_ASR;     // Select A Register
+    AT91_REG     PIO_BSR;     // Select B Register
+    AT91_REG     PIO_ABSR;     // AB Select Status Register
+    AT91_REG     Reserved5[9];     // 
+    AT91_REG     PIO_OWER;     // Output Write Enable Register
+    AT91_REG     PIO_OWDR;     // Output Write Disable Register
+    AT91_REG     PIO_OWSR;     // Output Write Status Register
+} AT91S_PIO, *AT91PS_PIO;
+
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Clock Generator Controler
+// *****************************************************************************
+typedef struct _AT91S_CKGR {
+    AT91_REG     CKGR_MOR;     // Main Oscillator Register
+    AT91_REG     CKGR_MCFR;     // Main Clock  Frequency Register
+    AT91_REG     Reserved0[1];     // 
+    AT91_REG     CKGR_PLLR;     // PLL Register
+} AT91S_CKGR, *AT91PS_CKGR;
+
+// -------- CKGR_MOR : (CKGR Offset: 0x0) Main Oscillator Register -------- 
+#define AT91C_CKGR_MOSCEN     ((unsigned int) 0x1 <<  0) // (CKGR) Main Oscillator Enable
+#define AT91C_CKGR_OSCBYPASS  ((unsigned int) 0x1 <<  1) // (CKGR) Main Oscillator Bypass
+#define AT91C_CKGR_OSCOUNT    ((unsigned int) 0xFF <<  8) // (CKGR) Main Oscillator Start-up Time
+// -------- CKGR_MCFR : (CKGR Offset: 0x4) Main Clock Frequency Register -------- 
+#define AT91C_CKGR_MAINF      ((unsigned int) 0xFFFF <<  0) // (CKGR) Main Clock Frequency
+#define AT91C_CKGR_MAINRDY    ((unsigned int) 0x1 << 16) // (CKGR) Main Clock Ready
+// -------- CKGR_PLLR : (CKGR Offset: 0xc) PLL B Register -------- 
+#define AT91C_CKGR_DIV        ((unsigned int) 0xFF <<  0) // (CKGR) Divider Selected
+#define     AT91C_CKGR_DIV_0                    ((unsigned int) 0x0) // (CKGR) Divider output is 0
+#define     AT91C_CKGR_DIV_BYPASS               ((unsigned int) 0x1) // (CKGR) Divider is bypassed
+#define AT91C_CKGR_PLLCOUNT   ((unsigned int) 0x3F <<  8) // (CKGR) PLL Counter
+#define AT91C_CKGR_OUT        ((unsigned int) 0x3 << 14) // (CKGR) PLL Output Frequency Range
+#define     AT91C_CKGR_OUT_0                    ((unsigned int) 0x0 << 14) // (CKGR) Please refer to the PLL datasheet
+#define     AT91C_CKGR_OUT_1                    ((unsigned int) 0x1 << 14) // (CKGR) Please refer to the PLL datasheet
+#define     AT91C_CKGR_OUT_2                    ((unsigned int) 0x2 << 14) // (CKGR) Please refer to the PLL datasheet
+#define     AT91C_CKGR_OUT_3                    ((unsigned int) 0x3 << 14) // (CKGR) Please refer to the PLL datasheet
+#define AT91C_CKGR_MUL        ((unsigned int) 0x7FF << 16) // (CKGR) PLL Multiplier
+#define AT91C_CKGR_USBDIV     ((unsigned int) 0x3 << 28) // (CKGR) Divider for USB Clocks
+#define     AT91C_CKGR_USBDIV_0                    ((unsigned int) 0x0 << 28) // (CKGR) Divider output is PLL clock output
+#define     AT91C_CKGR_USBDIV_1                    ((unsigned int) 0x1 << 28) // (CKGR) Divider output is PLL clock output divided by 2
+#define     AT91C_CKGR_USBDIV_2                    ((unsigned int) 0x2 << 28) // (CKGR) Divider output is PLL clock output divided by 4
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Power Management Controler
+// *****************************************************************************
+typedef struct _AT91S_PMC {
+    AT91_REG     PMC_SCER;     // System Clock Enable Register
+    AT91_REG     PMC_SCDR;     // System Clock Disable Register
+    AT91_REG     PMC_SCSR;     // System Clock Status Register
+    AT91_REG     Reserved0[1];     // 
+    AT91_REG     PMC_PCER;     // Peripheral Clock Enable Register
+    AT91_REG     PMC_PCDR;     // Peripheral Clock Disable Register
+    AT91_REG     PMC_PCSR;     // Peripheral Clock Status Register
+    AT91_REG     Reserved1[1];     // 
+    AT91_REG     PMC_MOR;     // Main Oscillator Register
+    AT91_REG     PMC_MCFR;     // Main Clock  Frequency Register
+    AT91_REG     Reserved2[1];     // 
+    AT91_REG     PMC_PLLR;     // PLL Register
+    AT91_REG     PMC_MCKR;     // Master Clock Register
+    AT91_REG     Reserved3[3];     // 
+    AT91_REG     PMC_PCKR[4];     // Programmable Clock Register
+    AT91_REG     Reserved4[4];     // 
+    AT91_REG     PMC_IER;     // Interrupt Enable Register
+    AT91_REG     PMC_IDR;     // Interrupt Disable Register
+    AT91_REG     PMC_SR;     // Status Register
+    AT91_REG     PMC_IMR;     // Interrupt Mask Register
+} AT91S_PMC, *AT91PS_PMC;
+
+// -------- PMC_SCER : (PMC Offset: 0x0) System Clock Enable Register -------- 
+#define AT91C_PMC_PCK         ((unsigned int) 0x1 <<  0) // (PMC) Processor Clock
+#define AT91C_PMC_UDP         ((unsigned int) 0x1 <<  7) // (PMC) USB Device Port Clock
+#define AT91C_PMC_PCK0        ((unsigned int) 0x1 <<  8) // (PMC) Programmable Clock Output
+#define AT91C_PMC_PCK1        ((unsigned int) 0x1 <<  9) // (PMC) Programmable Clock Output
+#define AT91C_PMC_PCK2        ((unsigned int) 0x1 << 10) // (PMC) Programmable Clock Output
+#define AT91C_PMC_PCK3        ((unsigned int) 0x1 << 11) // (PMC) Programmable Clock Output
+// -------- PMC_SCDR : (PMC Offset: 0x4) System Clock Disable Register -------- 
+// -------- PMC_SCSR : (PMC Offset: 0x8) System Clock Status Register -------- 
+// -------- CKGR_MOR : (PMC Offset: 0x20) Main Oscillator Register -------- 
+// -------- CKGR_MCFR : (PMC Offset: 0x24) Main Clock Frequency Register -------- 
+// -------- CKGR_PLLR : (PMC Offset: 0x2c) PLL B Register -------- 
+// -------- PMC_MCKR : (PMC Offset: 0x30) Master Clock Register -------- 
+#define AT91C_PMC_CSS         ((unsigned int) 0x3 <<  0) // (PMC) Programmable Clock Selection
+#define     AT91C_PMC_CSS_SLOW_CLK             ((unsigned int) 0x0) // (PMC) Slow Clock is selected
+#define     AT91C_PMC_CSS_MAIN_CLK             ((unsigned int) 0x1) // (PMC) Main Clock is selected
+#define     AT91C_PMC_CSS_PLL_CLK              ((unsigned int) 0x3) // (PMC) Clock from PLL is selected
+#define AT91C_PMC_PRES        ((unsigned int) 0x7 <<  2) // (PMC) Programmable Clock Prescaler
+#define     AT91C_PMC_PRES_CLK                  ((unsigned int) 0x0 <<  2) // (PMC) Selected clock
+#define     AT91C_PMC_PRES_CLK_2                ((unsigned int) 0x1 <<  2) // (PMC) Selected clock divided by 2
+#define     AT91C_PMC_PRES_CLK_4                ((unsigned int) 0x2 <<  2) // (PMC) Selected clock divided by 4
+#define     AT91C_PMC_PRES_CLK_8                ((unsigned int) 0x3 <<  2) // (PMC) Selected clock divided by 8
+#define     AT91C_PMC_PRES_CLK_16               ((unsigned int) 0x4 <<  2) // (PMC) Selected clock divided by 16
+#define     AT91C_PMC_PRES_CLK_32               ((unsigned int) 0x5 <<  2) // (PMC) Selected clock divided by 32
+#define     AT91C_PMC_PRES_CLK_64               ((unsigned int) 0x6 <<  2) // (PMC) Selected clock divided by 64
+// -------- PMC_PCKR : (PMC Offset: 0x40) Programmable Clock Register -------- 
+// -------- PMC_IER : (PMC Offset: 0x60) PMC Interrupt Enable Register -------- 
+#define AT91C_PMC_MOSCS       ((unsigned int) 0x1 <<  0) // (PMC) MOSC Status/Enable/Disable/Mask
+#define AT91C_PMC_LOCK        ((unsigned int) 0x1 <<  2) // (PMC) PLL Status/Enable/Disable/Mask
+#define AT91C_PMC_MCKRDY      ((unsigned int) 0x1 <<  3) // (PMC) MCK_RDY Status/Enable/Disable/Mask
+#define AT91C_PMC_PCK0RDY     ((unsigned int) 0x1 <<  8) // (PMC) PCK0_RDY Status/Enable/Disable/Mask
+#define AT91C_PMC_PCK1RDY     ((unsigned int) 0x1 <<  9) // (PMC) PCK1_RDY Status/Enable/Disable/Mask
+#define AT91C_PMC_PCK2RDY     ((unsigned int) 0x1 << 10) // (PMC) PCK2_RDY Status/Enable/Disable/Mask
+#define AT91C_PMC_PCK3RDY     ((unsigned int) 0x1 << 11) // (PMC) PCK3_RDY Status/Enable/Disable/Mask
+// -------- PMC_IDR : (PMC Offset: 0x64) PMC Interrupt Disable Register -------- 
+// -------- PMC_SR : (PMC Offset: 0x68) PMC Status Register -------- 
+// -------- PMC_IMR : (PMC Offset: 0x6c) PMC Interrupt Mask Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Reset Controller Interface
+// *****************************************************************************
+typedef struct _AT91S_RSTC {
+    AT91_REG     RSTC_RCR;     // Reset Control Register
+    AT91_REG     RSTC_RSR;     // Reset Status Register
+    AT91_REG     RSTC_RMR;     // Reset Mode Register
+} AT91S_RSTC, *AT91PS_RSTC;
+
+// -------- RSTC_RCR : (RSTC Offset: 0x0) Reset Control Register -------- 
+#define AT91C_RSTC_PROCRST    ((unsigned int) 0x1 <<  0) // (RSTC) Processor Reset
+#define AT91C_RSTC_PERRST     ((unsigned int) 0x1 <<  2) // (RSTC) Peripheral Reset
+#define AT91C_RSTC_EXTRST     ((unsigned int) 0x1 <<  3) // (RSTC) External Reset
+#define AT91C_RSTC_KEY        ((unsigned int) 0xFF << 24) // (RSTC) Password
+// -------- RSTC_RSR : (RSTC Offset: 0x4) Reset Status Register -------- 
+#define AT91C_RSTC_URSTS      ((unsigned int) 0x1 <<  0) // (RSTC) User Reset Status
+#define AT91C_RSTC_BODSTS     ((unsigned int) 0x1 <<  1) // (RSTC) Brownout Detection Status
+#define AT91C_RSTC_RSTTYP     ((unsigned int) 0x7 <<  8) // (RSTC) Reset Type
+#define     AT91C_RSTC_RSTTYP_POWERUP              ((unsigned int) 0x0 <<  8) // (RSTC) Power-up Reset. VDDCORE rising.
+#define     AT91C_RSTC_RSTTYP_WAKEUP               ((unsigned int) 0x1 <<  8) // (RSTC) WakeUp Reset. VDDCORE rising.
+#define     AT91C_RSTC_RSTTYP_WATCHDOG             ((unsigned int) 0x2 <<  8) // (RSTC) Watchdog Reset. Watchdog overflow occured.
+#define     AT91C_RSTC_RSTTYP_SOFTWARE             ((unsigned int) 0x3 <<  8) // (RSTC) Software Reset. Processor reset required by the software.
+#define     AT91C_RSTC_RSTTYP_USER                 ((unsigned int) 0x4 <<  8) // (RSTC) User Reset. NRST pin detected low.
+#define     AT91C_RSTC_RSTTYP_BROWNOUT             ((unsigned int) 0x5 <<  8) // (RSTC) Brownout Reset occured.
+#define AT91C_RSTC_NRSTL      ((unsigned int) 0x1 << 16) // (RSTC) NRST pin level
+#define AT91C_RSTC_SRCMP      ((unsigned int) 0x1 << 17) // (RSTC) Software Reset Command in Progress.
+// -------- RSTC_RMR : (RSTC Offset: 0x8) Reset Mode Register -------- 
+#define AT91C_RSTC_URSTEN     ((unsigned int) 0x1 <<  0) // (RSTC) User Reset Enable
+#define AT91C_RSTC_URSTIEN    ((unsigned int) 0x1 <<  4) // (RSTC) User Reset Interrupt Enable
+#define AT91C_RSTC_ERSTL      ((unsigned int) 0xF <<  8) // (RSTC) User Reset Length
+#define AT91C_RSTC_BODIEN     ((unsigned int) 0x1 << 16) // (RSTC) Brownout Detection Interrupt Enable
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Real Time Timer Controller Interface
+// *****************************************************************************
+typedef struct _AT91S_RTTC {
+    AT91_REG     RTTC_RTMR;     // Real-time Mode Register
+    AT91_REG     RTTC_RTAR;     // Real-time Alarm Register
+    AT91_REG     RTTC_RTVR;     // Real-time Value Register
+    AT91_REG     RTTC_RTSR;     // Real-time Status Register
+} AT91S_RTTC, *AT91PS_RTTC;
+
+// -------- RTTC_RTMR : (RTTC Offset: 0x0) Real-time Mode Register -------- 
+#define AT91C_RTTC_RTPRES     ((unsigned int) 0xFFFF <<  0) // (RTTC) Real-time Timer Prescaler Value
+#define AT91C_RTTC_ALMIEN     ((unsigned int) 0x1 << 16) // (RTTC) Alarm Interrupt Enable
+#define AT91C_RTTC_RTTINCIEN  ((unsigned int) 0x1 << 17) // (RTTC) Real Time Timer Increment Interrupt Enable
+#define AT91C_RTTC_RTTRST     ((unsigned int) 0x1 << 18) // (RTTC) Real Time Timer Restart
+// -------- RTTC_RTAR : (RTTC Offset: 0x4) Real-time Alarm Register -------- 
+#define AT91C_RTTC_ALMV       ((unsigned int) 0x0 <<  0) // (RTTC) Alarm Value
+// -------- RTTC_RTVR : (RTTC Offset: 0x8) Current Real-time Value Register -------- 
+#define AT91C_RTTC_CRTV       ((unsigned int) 0x0 <<  0) // (RTTC) Current Real-time Value
+// -------- RTTC_RTSR : (RTTC Offset: 0xc) Real-time Status Register -------- 
+#define AT91C_RTTC_ALMS       ((unsigned int) 0x1 <<  0) // (RTTC) Real-time Alarm Status
+#define AT91C_RTTC_RTTINC     ((unsigned int) 0x1 <<  1) // (RTTC) Real-time Timer Increment
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Periodic Interval Timer Controller Interface
+// *****************************************************************************
+typedef struct _AT91S_PITC {
+    AT91_REG     PITC_PIMR;     // Period Interval Mode Register
+    AT91_REG     PITC_PISR;     // Period Interval Status Register
+    AT91_REG     PITC_PIVR;     // Period Interval Value Register
+    AT91_REG     PITC_PIIR;     // Period Interval Image Register
+} AT91S_PITC, *AT91PS_PITC;
+
+// -------- PITC_PIMR : (PITC Offset: 0x0) Periodic Interval Mode Register -------- 
+#define AT91C_PITC_PIV        ((unsigned int) 0xFFFFF <<  0) // (PITC) Periodic Interval Value
+#define AT91C_PITC_PITEN      ((unsigned int) 0x1 << 24) // (PITC) Periodic Interval Timer Enabled
+#define AT91C_PITC_PITIEN     ((unsigned int) 0x1 << 25) // (PITC) Periodic Interval Timer Interrupt Enable
+// -------- PITC_PISR : (PITC Offset: 0x4) Periodic Interval Status Register -------- 
+#define AT91C_PITC_PITS       ((unsigned int) 0x1 <<  0) // (PITC) Periodic Interval Timer Status
+// -------- PITC_PIVR : (PITC Offset: 0x8) Periodic Interval Value Register -------- 
+#define AT91C_PITC_CPIV       ((unsigned int) 0xFFFFF <<  0) // (PITC) Current Periodic Interval Value
+#define AT91C_PITC_PICNT      ((unsigned int) 0xFFF << 20) // (PITC) Periodic Interval Counter
+// -------- PITC_PIIR : (PITC Offset: 0xc) Periodic Interval Image Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Watchdog Timer Controller Interface
+// *****************************************************************************
+typedef struct _AT91S_WDTC {
+    AT91_REG     WDTC_WDCR;     // Watchdog Control Register
+    AT91_REG     WDTC_WDMR;     // Watchdog Mode Register
+    AT91_REG     WDTC_WDSR;     // Watchdog Status Register
+} AT91S_WDTC, *AT91PS_WDTC;
+
+// -------- WDTC_WDCR : (WDTC Offset: 0x0) Periodic Interval Image Register -------- 
+#define AT91C_WDTC_WDRSTT     ((unsigned int) 0x1 <<  0) // (WDTC) Watchdog Restart
+#define AT91C_WDTC_KEY        ((unsigned int) 0xFF << 24) // (WDTC) Watchdog KEY Password
+// -------- WDTC_WDMR : (WDTC Offset: 0x4) Watchdog Mode Register -------- 
+#define AT91C_WDTC_WDV        ((unsigned int) 0xFFF <<  0) // (WDTC) Watchdog Timer Restart
+#define AT91C_WDTC_WDFIEN     ((unsigned int) 0x1 << 12) // (WDTC) Watchdog Fault Interrupt Enable
+#define AT91C_WDTC_WDRSTEN    ((unsigned int) 0x1 << 13) // (WDTC) Watchdog Reset Enable
+#define AT91C_WDTC_WDRPROC    ((unsigned int) 0x1 << 14) // (WDTC) Watchdog Timer Restart
+#define AT91C_WDTC_WDDIS      ((unsigned int) 0x1 << 15) // (WDTC) Watchdog Disable
+#define AT91C_WDTC_WDD        ((unsigned int) 0xFFF << 16) // (WDTC) Watchdog Delta Value
+#define AT91C_WDTC_WDDBGHLT   ((unsigned int) 0x1 << 28) // (WDTC) Watchdog Debug Halt
+#define AT91C_WDTC_WDIDLEHLT  ((unsigned int) 0x1 << 29) // (WDTC) Watchdog Idle Halt
+// -------- WDTC_WDSR : (WDTC Offset: 0x8) Watchdog Status Register -------- 
+#define AT91C_WDTC_WDUNF      ((unsigned int) 0x1 <<  0) // (WDTC) Watchdog Underflow
+#define AT91C_WDTC_WDERR      ((unsigned int) 0x1 <<  1) // (WDTC) Watchdog Error
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Voltage Regulator Mode Controller Interface
+// *****************************************************************************
+typedef struct _AT91S_VREG {
+    AT91_REG     VREG_MR;     // Voltage Regulator Mode Register
+} AT91S_VREG, *AT91PS_VREG;
+
+// -------- VREG_MR : (VREG Offset: 0x0) Voltage Regulator Mode Register -------- 
+#define AT91C_VREG_PSTDBY     ((unsigned int) 0x1 <<  0) // (VREG) Voltage Regulator Power Standby Mode
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Memory Controller Interface
+// *****************************************************************************
+typedef struct _AT91S_MC {
+    AT91_REG     MC_RCR;     // MC Remap Control Register
+    AT91_REG     MC_ASR;     // MC Abort Status Register
+    AT91_REG     MC_AASR;     // MC Abort Address Status Register
+    AT91_REG     Reserved0[21];     // 
+    AT91_REG     MC_FMR;     // MC Flash Mode Register
+    AT91_REG     MC_FCR;     // MC Flash Command Register
+    AT91_REG     MC_FSR;     // MC Flash Status Register
+} AT91S_MC, *AT91PS_MC;
+
+// -------- MC_RCR : (MC Offset: 0x0) MC Remap Control Register -------- 
+#define AT91C_MC_RCB          ((unsigned int) 0x1 <<  0) // (MC) Remap Command Bit
+// -------- MC_ASR : (MC Offset: 0x4) MC Abort Status Register -------- 
+#define AT91C_MC_UNDADD       ((unsigned int) 0x1 <<  0) // (MC) Undefined Addess Abort Status
+#define AT91C_MC_MISADD       ((unsigned int) 0x1 <<  1) // (MC) Misaligned Addess Abort Status
+#define AT91C_MC_ABTSZ        ((unsigned int) 0x3 <<  8) // (MC) Abort Size Status
+#define     AT91C_MC_ABTSZ_BYTE                 ((unsigned int) 0x0 <<  8) // (MC) Byte
+#define     AT91C_MC_ABTSZ_HWORD                ((unsigned int) 0x1 <<  8) // (MC) Half-word
+#define     AT91C_MC_ABTSZ_WORD                 ((unsigned int) 0x2 <<  8) // (MC) Word
+#define AT91C_MC_ABTTYP       ((unsigned int) 0x3 << 10) // (MC) Abort Type Status
+#define     AT91C_MC_ABTTYP_DATAR                ((unsigned int) 0x0 << 10) // (MC) Data Read
+#define     AT91C_MC_ABTTYP_DATAW                ((unsigned int) 0x1 << 10) // (MC) Data Write
+#define     AT91C_MC_ABTTYP_FETCH                ((unsigned int) 0x2 << 10) // (MC) Code Fetch
+#define AT91C_MC_MST0         ((unsigned int) 0x1 << 16) // (MC) Master 0 Abort Source
+#define AT91C_MC_MST1         ((unsigned int) 0x1 << 17) // (MC) Master 1 Abort Source
+#define AT91C_MC_SVMST0       ((unsigned int) 0x1 << 24) // (MC) Saved Master 0 Abort Source
+#define AT91C_MC_SVMST1       ((unsigned int) 0x1 << 25) // (MC) Saved Master 1 Abort Source
+// -------- MC_FMR : (MC Offset: 0x60) MC Flash Mode Register -------- 
+#define AT91C_MC_FRDY         ((unsigned int) 0x1 <<  0) // (MC) Flash Ready
+#define AT91C_MC_LOCKE        ((unsigned int) 0x1 <<  2) // (MC) Lock Error
+#define AT91C_MC_PROGE        ((unsigned int) 0x1 <<  3) // (MC) Programming Error
+#define AT91C_MC_NEBP         ((unsigned int) 0x1 <<  7) // (MC) No Erase Before Programming
+#define AT91C_MC_FWS          ((unsigned int) 0x3 <<  8) // (MC) Flash Wait State
+#define     AT91C_MC_FWS_0FWS                 ((unsigned int) 0x0 <<  8) // (MC) 1 cycle for Read, 2 for Write operations
+#define     AT91C_MC_FWS_1FWS                 ((unsigned int) 0x1 <<  8) // (MC) 2 cycles for Read, 3 for Write operations
+#define     AT91C_MC_FWS_2FWS                 ((unsigned int) 0x2 <<  8) // (MC) 3 cycles for Read, 4 for Write operations
+#define     AT91C_MC_FWS_3FWS                 ((unsigned int) 0x3 <<  8) // (MC) 4 cycles for Read, 4 for Write operations
+#define AT91C_MC_FMCN         ((unsigned int) 0xFF << 16) // (MC) Flash Microsecond Cycle Number
+// -------- MC_FCR : (MC Offset: 0x64) MC Flash Command Register -------- 
+#define AT91C_MC_FCMD         ((unsigned int) 0xF <<  0) // (MC) Flash Command
+#define     AT91C_MC_FCMD_START_PROG           ((unsigned int) 0x1) // (MC) Starts the programming of th epage specified by PAGEN.
+#define     AT91C_MC_FCMD_LOCK                 ((unsigned int) 0x2) // (MC) Starts a lock sequence of the sector defined by the bits 4 to 7 of the field PAGEN.
+#define     AT91C_MC_FCMD_PROG_AND_LOCK        ((unsigned int) 0x3) // (MC) The lock sequence automatically happens after the programming sequence is completed.
+#define     AT91C_MC_FCMD_UNLOCK               ((unsigned int) 0x4) // (MC) Starts an unlock sequence of the sector defined by the bits 4 to 7 of the field PAGEN.
+#define     AT91C_MC_FCMD_ERASE_ALL            ((unsigned int) 0x8) // (MC) Starts the erase of the entire flash.If at least a page is locked, the command is cancelled.
+#define     AT91C_MC_FCMD_SET_GP_NVM           ((unsigned int) 0xB) // (MC) Set General Purpose NVM bits.
+#define     AT91C_MC_FCMD_CLR_GP_NVM           ((unsigned int) 0xD) // (MC) Clear General Purpose NVM bits.
+#define     AT91C_MC_FCMD_SET_SECURITY         ((unsigned int) 0xF) // (MC) Set Security Bit.
+#define AT91C_MC_PAGEN        ((unsigned int) 0x3FF <<  8) // (MC) Page Number
+#define AT91C_MC_KEY          ((unsigned int) 0xFF << 24) // (MC) Writing Protect Key
+// -------- MC_FSR : (MC Offset: 0x68) MC Flash Command Register -------- 
+#define AT91C_MC_SECURITY     ((unsigned int) 0x1 <<  4) // (MC) Security Bit Status
+#define AT91C_MC_GPNVM0       ((unsigned int) 0x1 <<  8) // (MC) Sector 0 Lock Status
+#define AT91C_MC_GPNVM1       ((unsigned int) 0x1 <<  9) // (MC) Sector 1 Lock Status
+#define AT91C_MC_GPNVM2       ((unsigned int) 0x1 << 10) // (MC) Sector 2 Lock Status
+#define AT91C_MC_GPNVM3       ((unsigned int) 0x1 << 11) // (MC) Sector 3 Lock Status
+#define AT91C_MC_GPNVM4       ((unsigned int) 0x1 << 12) // (MC) Sector 4 Lock Status
+#define AT91C_MC_GPNVM5       ((unsigned int) 0x1 << 13) // (MC) Sector 5 Lock Status
+#define AT91C_MC_GPNVM6       ((unsigned int) 0x1 << 14) // (MC) Sector 6 Lock Status
+#define AT91C_MC_GPNVM7       ((unsigned int) 0x1 << 15) // (MC) Sector 7 Lock Status
+#define AT91C_MC_LOCKS0       ((unsigned int) 0x1 << 16) // (MC) Sector 0 Lock Status
+#define AT91C_MC_LOCKS1       ((unsigned int) 0x1 << 17) // (MC) Sector 1 Lock Status
+#define AT91C_MC_LOCKS2       ((unsigned int) 0x1 << 18) // (MC) Sector 2 Lock Status
+#define AT91C_MC_LOCKS3       ((unsigned int) 0x1 << 19) // (MC) Sector 3 Lock Status
+#define AT91C_MC_LOCKS4       ((unsigned int) 0x1 << 20) // (MC) Sector 4 Lock Status
+#define AT91C_MC_LOCKS5       ((unsigned int) 0x1 << 21) // (MC) Sector 5 Lock Status
+#define AT91C_MC_LOCKS6       ((unsigned int) 0x1 << 22) // (MC) Sector 6 Lock Status
+#define AT91C_MC_LOCKS7       ((unsigned int) 0x1 << 23) // (MC) Sector 7 Lock Status
+#define AT91C_MC_LOCKS8       ((unsigned int) 0x1 << 24) // (MC) Sector 8 Lock Status
+#define AT91C_MC_LOCKS9       ((unsigned int) 0x1 << 25) // (MC) Sector 9 Lock Status
+#define AT91C_MC_LOCKS10      ((unsigned int) 0x1 << 26) // (MC) Sector 10 Lock Status
+#define AT91C_MC_LOCKS11      ((unsigned int) 0x1 << 27) // (MC) Sector 11 Lock Status
+#define AT91C_MC_LOCKS12      ((unsigned int) 0x1 << 28) // (MC) Sector 12 Lock Status
+#define AT91C_MC_LOCKS13      ((unsigned int) 0x1 << 29) // (MC) Sector 13 Lock Status
+#define AT91C_MC_LOCKS14      ((unsigned int) 0x1 << 30) // (MC) Sector 14 Lock Status
+#define AT91C_MC_LOCKS15      ((unsigned int) 0x1 << 31) // (MC) Sector 15 Lock Status
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Serial Parallel Interface
+// *****************************************************************************
+typedef struct _AT91S_SPI {
+    AT91_REG     SPI_CR;     // Control Register
+    AT91_REG     SPI_MR;     // Mode Register
+    AT91_REG     SPI_RDR;     // Receive Data Register
+    AT91_REG     SPI_TDR;     // Transmit Data Register
+    AT91_REG     SPI_SR;     // Status Register
+    AT91_REG     SPI_IER;     // Interrupt Enable Register
+    AT91_REG     SPI_IDR;     // Interrupt Disable Register
+    AT91_REG     SPI_IMR;     // Interrupt Mask Register
+    AT91_REG     Reserved0[4];     // 
+    AT91_REG     SPI_CSR[4];     // Chip Select Register
+    AT91_REG     Reserved1[48];     // 
+    AT91_REG     SPI_RPR;     // Receive Pointer Register
+    AT91_REG     SPI_RCR;     // Receive Counter Register
+    AT91_REG     SPI_TPR;     // Transmit Pointer Register
+    AT91_REG     SPI_TCR;     // Transmit Counter Register
+    AT91_REG     SPI_RNPR;     // Receive Next Pointer Register
+    AT91_REG     SPI_RNCR;     // Receive Next Counter Register
+    AT91_REG     SPI_TNPR;     // Transmit Next Pointer Register
+    AT91_REG     SPI_TNCR;     // Transmit Next Counter Register
+    AT91_REG     SPI_PTCR;     // PDC Transfer Control Register
+    AT91_REG     SPI_PTSR;     // PDC Transfer Status Register
+} AT91S_SPI, *AT91PS_SPI;
+
+// -------- SPI_CR : (SPI Offset: 0x0) SPI Control Register -------- 
+#define AT91C_SPI_SPIEN       ((unsigned int) 0x1 <<  0) // (SPI) SPI Enable
+#define AT91C_SPI_SPIDIS      ((unsigned int) 0x1 <<  1) // (SPI) SPI Disable
+#define AT91C_SPI_SWRST       ((unsigned int) 0x1 <<  7) // (SPI) SPI Software reset
+#define AT91C_SPI_LASTXFER    ((unsigned int) 0x1 << 24) // (SPI) SPI Last Transfer
+// -------- SPI_MR : (SPI Offset: 0x4) SPI Mode Register -------- 
+#define AT91C_SPI_MSTR        ((unsigned int) 0x1 <<  0) // (SPI) Master/Slave Mode
+#define AT91C_SPI_PS          ((unsigned int) 0x1 <<  1) // (SPI) Peripheral Select
+#define     AT91C_SPI_PS_FIXED                ((unsigned int) 0x0 <<  1) // (SPI) Fixed Peripheral Select
+#define     AT91C_SPI_PS_VARIABLE             ((unsigned int) 0x1 <<  1) // (SPI) Variable Peripheral Select
+#define AT91C_SPI_PCSDEC      ((unsigned int) 0x1 <<  2) // (SPI) Chip Select Decode
+#define AT91C_SPI_FDIV        ((unsigned int) 0x1 <<  3) // (SPI) Clock Selection
+#define AT91C_SPI_MODFDIS     ((unsigned int) 0x1 <<  4) // (SPI) Mode Fault Detection
+#define AT91C_SPI_LLB         ((unsigned int) 0x1 <<  7) // (SPI) Clock Selection
+#define AT91C_SPI_PCS         ((unsigned int) 0xF << 16) // (SPI) Peripheral Chip Select
+#define AT91C_SPI_DLYBCS      ((unsigned int) 0xFF << 24) // (SPI) Delay Between Chip Selects
+// -------- SPI_RDR : (SPI Offset: 0x8) Receive Data Register -------- 
+#define AT91C_SPI_RD          ((unsigned int) 0xFFFF <<  0) // (SPI) Receive Data
+#define AT91C_SPI_RPCS        ((unsigned int) 0xF << 16) // (SPI) Peripheral Chip Select Status
+// -------- SPI_TDR : (SPI Offset: 0xc) Transmit Data Register -------- 
+#define AT91C_SPI_TD          ((unsigned int) 0xFFFF <<  0) // (SPI) Transmit Data
+#define AT91C_SPI_TPCS        ((unsigned int) 0xF << 16) // (SPI) Peripheral Chip Select Status
+// -------- SPI_SR : (SPI Offset: 0x10) Status Register -------- 
+#define AT91C_SPI_RDRF        ((unsigned int) 0x1 <<  0) // (SPI) Receive Data Register Full
+#define AT91C_SPI_TDRE        ((unsigned int) 0x1 <<  1) // (SPI) Transmit Data Register Empty
+#define AT91C_SPI_MODF        ((unsigned int) 0x1 <<  2) // (SPI) Mode Fault Error
+#define AT91C_SPI_OVRES       ((unsigned int) 0x1 <<  3) // (SPI) Overrun Error Status
+#define AT91C_SPI_ENDRX       ((unsigned int) 0x1 <<  4) // (SPI) End of Receiver Transfer
+#define AT91C_SPI_ENDTX       ((unsigned int) 0x1 <<  5) // (SPI) End of Receiver Transfer
+#define AT91C_SPI_RXBUFF      ((unsigned int) 0x1 <<  6) // (SPI) RXBUFF Interrupt
+#define AT91C_SPI_TXBUFE      ((unsigned int) 0x1 <<  7) // (SPI) TXBUFE Interrupt
+#define AT91C_SPI_NSSR        ((unsigned int) 0x1 <<  8) // (SPI) NSSR Interrupt
+#define AT91C_SPI_TXEMPTY     ((unsigned int) 0x1 <<  9) // (SPI) TXEMPTY Interrupt
+#define AT91C_SPI_SPIENS      ((unsigned int) 0x1 << 16) // (SPI) Enable Status
+// -------- SPI_IER : (SPI Offset: 0x14) Interrupt Enable Register -------- 
+// -------- SPI_IDR : (SPI Offset: 0x18) Interrupt Disable Register -------- 
+// -------- SPI_IMR : (SPI Offset: 0x1c) Interrupt Mask Register -------- 
+// -------- SPI_CSR : (SPI Offset: 0x30) Chip Select Register -------- 
+#define AT91C_SPI_CPOL        ((unsigned int) 0x1 <<  0) // (SPI) Clock Polarity
+#define AT91C_SPI_NCPHA       ((unsigned int) 0x1 <<  1) // (SPI) Clock Phase
+#define AT91C_SPI_CSAAT       ((unsigned int) 0x1 <<  3) // (SPI) Chip Select Active After Transfer
+#define AT91C_SPI_BITS        ((unsigned int) 0xF <<  4) // (SPI) Bits Per Transfer
+#define     AT91C_SPI_BITS_8                    ((unsigned int) 0x0 <<  4) // (SPI) 8 Bits Per transfer
+#define     AT91C_SPI_BITS_9                    ((unsigned int) 0x1 <<  4) // (SPI) 9 Bits Per transfer
+#define     AT91C_SPI_BITS_10                   ((unsigned int) 0x2 <<  4) // (SPI) 10 Bits Per transfer
+#define     AT91C_SPI_BITS_11                   ((unsigned int) 0x3 <<  4) // (SPI) 11 Bits Per transfer
+#define     AT91C_SPI_BITS_12                   ((unsigned int) 0x4 <<  4) // (SPI) 12 Bits Per transfer
+#define     AT91C_SPI_BITS_13                   ((unsigned int) 0x5 <<  4) // (SPI) 13 Bits Per transfer
+#define     AT91C_SPI_BITS_14                   ((unsigned int) 0x6 <<  4) // (SPI) 14 Bits Per transfer
+#define     AT91C_SPI_BITS_15                   ((unsigned int) 0x7 <<  4) // (SPI) 15 Bits Per transfer
+#define     AT91C_SPI_BITS_16                   ((unsigned int) 0x8 <<  4) // (SPI) 16 Bits Per transfer
+#define AT91C_SPI_SCBR        ((unsigned int) 0xFF <<  8) // (SPI) Serial Clock Baud Rate
+#define AT91C_SPI_DLYBS       ((unsigned int) 0xFF << 16) // (SPI) Delay Before SPCK
+#define AT91C_SPI_DLYBCT      ((unsigned int) 0xFF << 24) // (SPI) Delay Between Consecutive Transfers
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Usart
+// *****************************************************************************
+typedef struct _AT91S_USART {
+    AT91_REG     US_CR;     // Control Register
+    AT91_REG     US_MR;     // Mode Register
+    AT91_REG     US_IER;     // Interrupt Enable Register
+    AT91_REG     US_IDR;     // Interrupt Disable Register
+    AT91_REG     US_IMR;     // Interrupt Mask Register
+    AT91_REG     US_CSR;     // Channel Status Register
+    AT91_REG     US_RHR;     // Receiver Holding Register
+    AT91_REG     US_THR;     // Transmitter Holding Register
+    AT91_REG     US_BRGR;     // Baud Rate Generator Register
+    AT91_REG     US_RTOR;     // Receiver Time-out Register
+    AT91_REG     US_TTGR;     // Transmitter Time-guard Register
+    AT91_REG     Reserved0[5];     // 
+    AT91_REG     US_FIDI;     // FI_DI_Ratio Register
+    AT91_REG     US_NER;     // Nb Errors Register
+    AT91_REG     Reserved1[1];     // 
+    AT91_REG     US_IF;     // IRDA_FILTER Register
+    AT91_REG     Reserved2[44];     // 
+    AT91_REG     US_RPR;     // Receive Pointer Register
+    AT91_REG     US_RCR;     // Receive Counter Register
+    AT91_REG     US_TPR;     // Transmit Pointer Register
+    AT91_REG     US_TCR;     // Transmit Counter Register
+    AT91_REG     US_RNPR;     // Receive Next Pointer Register
+    AT91_REG     US_RNCR;     // Receive Next Counter Register
+    AT91_REG     US_TNPR;     // Transmit Next Pointer Register
+    AT91_REG     US_TNCR;     // Transmit Next Counter Register
+    AT91_REG     US_PTCR;     // PDC Transfer Control Register
+    AT91_REG     US_PTSR;     // PDC Transfer Status Register
+} AT91S_USART, *AT91PS_USART;
+
+// -------- US_CR : (USART Offset: 0x0) Debug Unit Control Register -------- 
+#define AT91C_US_STTBRK       ((unsigned int) 0x1 <<  9) // (USART) Start Break
+#define AT91C_US_STPBRK       ((unsigned int) 0x1 << 10) // (USART) Stop Break
+#define AT91C_US_STTTO        ((unsigned int) 0x1 << 11) // (USART) Start Time-out
+#define AT91C_US_SENDA        ((unsigned int) 0x1 << 12) // (USART) Send Address
+#define AT91C_US_RSTIT        ((unsigned int) 0x1 << 13) // (USART) Reset Iterations
+#define AT91C_US_RSTNACK      ((unsigned int) 0x1 << 14) // (USART) Reset Non Acknowledge
+#define AT91C_US_RETTO        ((unsigned int) 0x1 << 15) // (USART) Rearm Time-out
+#define AT91C_US_DTREN        ((unsigned int) 0x1 << 16) // (USART) Data Terminal ready Enable
+#define AT91C_US_DTRDIS       ((unsigned int) 0x1 << 17) // (USART) Data Terminal ready Disable
+#define AT91C_US_RTSEN        ((unsigned int) 0x1 << 18) // (USART) Request to Send enable
+#define AT91C_US_RTSDIS       ((unsigned int) 0x1 << 19) // (USART) Request to Send Disable
+// -------- US_MR : (USART Offset: 0x4) Debug Unit Mode Register -------- 
+#define AT91C_US_USMODE       ((unsigned int) 0xF <<  0) // (USART) Usart mode
+#define     AT91C_US_USMODE_NORMAL               ((unsigned int) 0x0) // (USART) Normal
+#define     AT91C_US_USMODE_RS485                ((unsigned int) 0x1) // (USART) RS485
+#define     AT91C_US_USMODE_HWHSH                ((unsigned int) 0x2) // (USART) Hardware Handshaking
+#define     AT91C_US_USMODE_MODEM                ((unsigned int) 0x3) // (USART) Modem
+#define     AT91C_US_USMODE_ISO7816_0            ((unsigned int) 0x4) // (USART) ISO7816 protocol: T = 0
+#define     AT91C_US_USMODE_ISO7816_1            ((unsigned int) 0x6) // (USART) ISO7816 protocol: T = 1
+#define     AT91C_US_USMODE_IRDA                 ((unsigned int) 0x8) // (USART) IrDA
+#define     AT91C_US_USMODE_SWHSH                ((unsigned int) 0xC) // (USART) Software Handshaking
+#define AT91C_US_CLKS         ((unsigned int) 0x3 <<  4) // (USART) Clock Selection (Baud Rate generator Input Clock
+#define     AT91C_US_CLKS_CLOCK                ((unsigned int) 0x0 <<  4) // (USART) Clock
+#define     AT91C_US_CLKS_FDIV1                ((unsigned int) 0x1 <<  4) // (USART) fdiv1
+#define     AT91C_US_CLKS_SLOW                 ((unsigned int) 0x2 <<  4) // (USART) slow_clock (ARM)
+#define     AT91C_US_CLKS_EXT                  ((unsigned int) 0x3 <<  4) // (USART) External (SCK)
+#define AT91C_US_CHRL         ((unsigned int) 0x3 <<  6) // (USART) Clock Selection (Baud Rate generator Input Clock
+#define     AT91C_US_CHRL_5_BITS               ((unsigned int) 0x0 <<  6) // (USART) Character Length: 5 bits
+#define     AT91C_US_CHRL_6_BITS               ((unsigned int) 0x1 <<  6) // (USART) Character Length: 6 bits
+#define     AT91C_US_CHRL_7_BITS               ((unsigned int) 0x2 <<  6) // (USART) Character Length: 7 bits
+#define     AT91C_US_CHRL_8_BITS               ((unsigned int) 0x3 <<  6) // (USART) Character Length: 8 bits
+#define AT91C_US_SYNC         ((unsigned int) 0x1 <<  8) // (USART) Synchronous Mode Select
+#define AT91C_US_NBSTOP       ((unsigned int) 0x3 << 12) // (USART) Number of Stop bits
+#define     AT91C_US_NBSTOP_1_BIT                ((unsigned int) 0x0 << 12) // (USART) 1 stop bit
+#define     AT91C_US_NBSTOP_15_BIT               ((unsigned int) 0x1 << 12) // (USART) Asynchronous (SYNC=0) 2 stop bits Synchronous (SYNC=1) 2 stop bits
+#define     AT91C_US_NBSTOP_2_BIT                ((unsigned int) 0x2 << 12) // (USART) 2 stop bits
+#define AT91C_US_MSBF         ((unsigned int) 0x1 << 16) // (USART) Bit Order
+#define AT91C_US_MODE9        ((unsigned int) 0x1 << 17) // (USART) 9-bit Character length
+#define AT91C_US_CKLO         ((unsigned int) 0x1 << 18) // (USART) Clock Output Select
+#define AT91C_US_OVER         ((unsigned int) 0x1 << 19) // (USART) Over Sampling Mode
+#define AT91C_US_INACK        ((unsigned int) 0x1 << 20) // (USART) Inhibit Non Acknowledge
+#define AT91C_US_DSNACK       ((unsigned int) 0x1 << 21) // (USART) Disable Successive NACK
+#define AT91C_US_MAX_ITER     ((unsigned int) 0x1 << 24) // (USART) Number of Repetitions
+#define AT91C_US_FILTER       ((unsigned int) 0x1 << 28) // (USART) Receive Line Filter
+// -------- US_IER : (USART Offset: 0x8) Debug Unit Interrupt Enable Register -------- 
+#define AT91C_US_RXBRK        ((unsigned int) 0x1 <<  2) // (USART) Break Received/End of Break
+#define AT91C_US_TIMEOUT      ((unsigned int) 0x1 <<  8) // (USART) Receiver Time-out
+#define AT91C_US_ITERATION    ((unsigned int) 0x1 << 10) // (USART) Max number of Repetitions Reached
+#define AT91C_US_NACK         ((unsigned int) 0x1 << 13) // (USART) Non Acknowledge
+#define AT91C_US_RIIC         ((unsigned int) 0x1 << 16) // (USART) Ring INdicator Input Change Flag
+#define AT91C_US_DSRIC        ((unsigned int) 0x1 << 17) // (USART) Data Set Ready Input Change Flag
+#define AT91C_US_DCDIC        ((unsigned int) 0x1 << 18) // (USART) Data Carrier Flag
+#define AT91C_US_CTSIC        ((unsigned int) 0x1 << 19) // (USART) Clear To Send Input Change Flag
+// -------- US_IDR : (USART Offset: 0xc) Debug Unit Interrupt Disable Register -------- 
+// -------- US_IMR : (USART Offset: 0x10) Debug Unit Interrupt Mask Register -------- 
+// -------- US_CSR : (USART Offset: 0x14) Debug Unit Channel Status Register -------- 
+#define AT91C_US_RI           ((unsigned int) 0x1 << 20) // (USART) Image of RI Input
+#define AT91C_US_DSR          ((unsigned int) 0x1 << 21) // (USART) Image of DSR Input
+#define AT91C_US_DCD          ((unsigned int) 0x1 << 22) // (USART) Image of DCD Input
+#define AT91C_US_CTS          ((unsigned int) 0x1 << 23) // (USART) Image of CTS Input
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Synchronous Serial Controller Interface
+// *****************************************************************************
+typedef struct _AT91S_SSC {
+    AT91_REG     SSC_CR;     // Control Register
+    AT91_REG     SSC_CMR;     // Clock Mode Register
+    AT91_REG     Reserved0[2];     // 
+    AT91_REG     SSC_RCMR;     // Receive Clock ModeRegister
+    AT91_REG     SSC_RFMR;     // Receive Frame Mode Register
+    AT91_REG     SSC_TCMR;     // Transmit Clock Mode Register
+    AT91_REG     SSC_TFMR;     // Transmit Frame Mode Register
+    AT91_REG     SSC_RHR;     // Receive Holding Register
+    AT91_REG     SSC_THR;     // Transmit Holding Register
+    AT91_REG     Reserved1[2];     // 
+    AT91_REG     SSC_RSHR;     // Receive Sync Holding Register
+    AT91_REG     SSC_TSHR;     // Transmit Sync Holding Register
+    AT91_REG     Reserved2[2];     // 
+    AT91_REG     SSC_SR;     // Status Register
+    AT91_REG     SSC_IER;     // Interrupt Enable Register
+    AT91_REG     SSC_IDR;     // Interrupt Disable Register
+    AT91_REG     SSC_IMR;     // Interrupt Mask Register
+    AT91_REG     Reserved3[44];     // 
+    AT91_REG     SSC_RPR;     // Receive Pointer Register
+    AT91_REG     SSC_RCR;     // Receive Counter Register
+    AT91_REG     SSC_TPR;     // Transmit Pointer Register
+    AT91_REG     SSC_TCR;     // Transmit Counter Register
+    AT91_REG     SSC_RNPR;     // Receive Next Pointer Register
+    AT91_REG     SSC_RNCR;     // Receive Next Counter Register
+    AT91_REG     SSC_TNPR;     // Transmit Next Pointer Register
+    AT91_REG     SSC_TNCR;     // Transmit Next Counter Register
+    AT91_REG     SSC_PTCR;     // PDC Transfer Control Register
+    AT91_REG     SSC_PTSR;     // PDC Transfer Status Register
+} AT91S_SSC, *AT91PS_SSC;
+
+// -------- SSC_CR : (SSC Offset: 0x0) SSC Control Register -------- 
+#define AT91C_SSC_RXEN        ((unsigned int) 0x1 <<  0) // (SSC) Receive Enable
+#define AT91C_SSC_RXDIS       ((unsigned int) 0x1 <<  1) // (SSC) Receive Disable
+#define AT91C_SSC_TXEN        ((unsigned int) 0x1 <<  8) // (SSC) Transmit Enable
+#define AT91C_SSC_TXDIS       ((unsigned int) 0x1 <<  9) // (SSC) Transmit Disable
+#define AT91C_SSC_SWRST       ((unsigned int) 0x1 << 15) // (SSC) Software Reset
+// -------- SSC_RCMR : (SSC Offset: 0x10) SSC Receive Clock Mode Register -------- 
+#define AT91C_SSC_CKS         ((unsigned int) 0x3 <<  0) // (SSC) Receive/Transmit Clock Selection
+#define     AT91C_SSC_CKS_DIV                  ((unsigned int) 0x0) // (SSC) Divided Clock
+#define     AT91C_SSC_CKS_TK                   ((unsigned int) 0x1) // (SSC) TK Clock signal
+#define     AT91C_SSC_CKS_RK                   ((unsigned int) 0x2) // (SSC) RK pin
+#define AT91C_SSC_CKO         ((unsigned int) 0x7 <<  2) // (SSC) Receive/Transmit Clock Output Mode Selection
+#define     AT91C_SSC_CKO_NONE                 ((unsigned int) 0x0 <<  2) // (SSC) Receive/Transmit Clock Output Mode: None RK pin: Input-only
+#define     AT91C_SSC_CKO_CONTINOUS            ((unsigned int) 0x1 <<  2) // (SSC) Continuous Receive/Transmit Clock RK pin: Output
+#define     AT91C_SSC_CKO_DATA_TX              ((unsigned int) 0x2 <<  2) // (SSC) Receive/Transmit Clock only during data transfers RK pin: Output
+#define AT91C_SSC_CKI         ((unsigned int) 0x1 <<  5) // (SSC) Receive/Transmit Clock Inversion
+#define AT91C_SSC_CKG         ((unsigned int) 0x3 <<  6) // (SSC) Receive/Transmit Clock Gating Selection
+#define     AT91C_SSC_CKG_NONE                 ((unsigned int) 0x0 <<  6) // (SSC) Receive/Transmit Clock Gating: None, continuous clock
+#define     AT91C_SSC_CKG_LOW                  ((unsigned int) 0x1 <<  6) // (SSC) Receive/Transmit Clock enabled only if RF Low
+#define     AT91C_SSC_CKG_HIGH                 ((unsigned int) 0x2 <<  6) // (SSC) Receive/Transmit Clock enabled only if RF High
+#define AT91C_SSC_START       ((unsigned int) 0xF <<  8) // (SSC) Receive/Transmit Start Selection
+#define     AT91C_SSC_START_CONTINOUS            ((unsigned int) 0x0 <<  8) // (SSC) Continuous, as soon as the receiver is enabled, and immediately after the end of transfer of the previous data.
+#define     AT91C_SSC_START_TX                   ((unsigned int) 0x1 <<  8) // (SSC) Transmit/Receive start
+#define     AT91C_SSC_START_LOW_RF               ((unsigned int) 0x2 <<  8) // (SSC) Detection of a low level on RF input
+#define     AT91C_SSC_START_HIGH_RF              ((unsigned int) 0x3 <<  8) // (SSC) Detection of a high level on RF input
+#define     AT91C_SSC_START_FALL_RF              ((unsigned int) 0x4 <<  8) // (SSC) Detection of a falling edge on RF input
+#define     AT91C_SSC_START_RISE_RF              ((unsigned int) 0x5 <<  8) // (SSC) Detection of a rising edge on RF input
+#define     AT91C_SSC_START_LEVEL_RF             ((unsigned int) 0x6 <<  8) // (SSC) Detection of any level change on RF input
+#define     AT91C_SSC_START_EDGE_RF              ((unsigned int) 0x7 <<  8) // (SSC) Detection of any edge on RF input
+#define     AT91C_SSC_START_0                    ((unsigned int) 0x8 <<  8) // (SSC) Compare 0
+#define AT91C_SSC_STOP        ((unsigned int) 0x1 << 12) // (SSC) Receive Stop Selection
+#define AT91C_SSC_STTDLY      ((unsigned int) 0xFF << 16) // (SSC) Receive/Transmit Start Delay
+#define AT91C_SSC_PERIOD      ((unsigned int) 0xFF << 24) // (SSC) Receive/Transmit Period Divider Selection
+// -------- SSC_RFMR : (SSC Offset: 0x14) SSC Receive Frame Mode Register -------- 
+#define AT91C_SSC_DATLEN      ((unsigned int) 0x1F <<  0) // (SSC) Data Length
+#define AT91C_SSC_LOOP        ((unsigned int) 0x1 <<  5) // (SSC) Loop Mode
+#define AT91C_SSC_MSBF        ((unsigned int) 0x1 <<  7) // (SSC) Most Significant Bit First
+#define AT91C_SSC_DATNB       ((unsigned int) 0xF <<  8) // (SSC) Data Number per Frame
+#define AT91C_SSC_FSLEN       ((unsigned int) 0xF << 16) // (SSC) Receive/Transmit Frame Sync length
+#define AT91C_SSC_FSOS        ((unsigned int) 0x7 << 20) // (SSC) Receive/Transmit Frame Sync Output Selection
+#define     AT91C_SSC_FSOS_NONE                 ((unsigned int) 0x0 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: None RK pin Input-only
+#define     AT91C_SSC_FSOS_NEGATIVE             ((unsigned int) 0x1 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Negative Pulse
+#define     AT91C_SSC_FSOS_POSITIVE             ((unsigned int) 0x2 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Positive Pulse
+#define     AT91C_SSC_FSOS_LOW                  ((unsigned int) 0x3 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Driver Low during data transfer
+#define     AT91C_SSC_FSOS_HIGH                 ((unsigned int) 0x4 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Driver High during data transfer
+#define     AT91C_SSC_FSOS_TOGGLE               ((unsigned int) 0x5 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Toggling at each start of data transfer
+#define AT91C_SSC_FSEDGE      ((unsigned int) 0x1 << 24) // (SSC) Frame Sync Edge Detection
+// -------- SSC_TCMR : (SSC Offset: 0x18) SSC Transmit Clock Mode Register -------- 
+// -------- SSC_TFMR : (SSC Offset: 0x1c) SSC Transmit Frame Mode Register -------- 
+#define AT91C_SSC_DATDEF      ((unsigned int) 0x1 <<  5) // (SSC) Data Default Value
+#define AT91C_SSC_FSDEN       ((unsigned int) 0x1 << 23) // (SSC) Frame Sync Data Enable
+// -------- SSC_SR : (SSC Offset: 0x40) SSC Status Register -------- 
+#define AT91C_SSC_TXRDY       ((unsigned int) 0x1 <<  0) // (SSC) Transmit Ready
+#define AT91C_SSC_TXEMPTY     ((unsigned int) 0x1 <<  1) // (SSC) Transmit Empty
+#define AT91C_SSC_ENDTX       ((unsigned int) 0x1 <<  2) // (SSC) End Of Transmission
+#define AT91C_SSC_TXBUFE      ((unsigned int) 0x1 <<  3) // (SSC) Transmit Buffer Empty
+#define AT91C_SSC_RXRDY       ((unsigned int) 0x1 <<  4) // (SSC) Receive Ready
+#define AT91C_SSC_OVRUN       ((unsigned int) 0x1 <<  5) // (SSC) Receive Overrun
+#define AT91C_SSC_ENDRX       ((unsigned int) 0x1 <<  6) // (SSC) End of Reception
+#define AT91C_SSC_RXBUFF      ((unsigned int) 0x1 <<  7) // (SSC) Receive Buffer Full
+#define AT91C_SSC_CP0         ((unsigned int) 0x1 <<  8) // (SSC) Compare 0
+#define AT91C_SSC_CP1         ((unsigned int) 0x1 <<  9) // (SSC) Compare 1
+#define AT91C_SSC_TXSYN       ((unsigned int) 0x1 << 10) // (SSC) Transmit Sync
+#define AT91C_SSC_RXSYN       ((unsigned int) 0x1 << 11) // (SSC) Receive Sync
+#define AT91C_SSC_TXENA       ((unsigned int) 0x1 << 16) // (SSC) Transmit Enable
+#define AT91C_SSC_RXENA       ((unsigned int) 0x1 << 17) // (SSC) Receive Enable
+// -------- SSC_IER : (SSC Offset: 0x44) SSC Interrupt Enable Register -------- 
+// -------- SSC_IDR : (SSC Offset: 0x48) SSC Interrupt Disable Register -------- 
+// -------- SSC_IMR : (SSC Offset: 0x4c) SSC Interrupt Mask Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Two-wire Interface
+// *****************************************************************************
+typedef struct _AT91S_TWI {
+    AT91_REG     TWI_CR;     // Control Register
+    AT91_REG     TWI_MMR;     // Master Mode Register
+    AT91_REG     Reserved0[1];     // 
+    AT91_REG     TWI_IADR;     // Internal Address Register
+    AT91_REG     TWI_CWGR;     // Clock Waveform Generator Register
+    AT91_REG     Reserved1[3];     // 
+    AT91_REG     TWI_SR;     // Status Register
+    AT91_REG     TWI_IER;     // Interrupt Enable Register
+    AT91_REG     TWI_IDR;     // Interrupt Disable Register
+    AT91_REG     TWI_IMR;     // Interrupt Mask Register
+    AT91_REG     TWI_RHR;     // Receive Holding Register
+    AT91_REG     TWI_THR;     // Transmit Holding Register
+} AT91S_TWI, *AT91PS_TWI;
+
+// -------- TWI_CR : (TWI Offset: 0x0) TWI Control Register -------- 
+#define AT91C_TWI_START       ((unsigned int) 0x1 <<  0) // (TWI) Send a START Condition
+#define AT91C_TWI_STOP        ((unsigned int) 0x1 <<  1) // (TWI) Send a STOP Condition
+#define AT91C_TWI_MSEN        ((unsigned int) 0x1 <<  2) // (TWI) TWI Master Transfer Enabled
+#define AT91C_TWI_MSDIS       ((unsigned int) 0x1 <<  3) // (TWI) TWI Master Transfer Disabled
+#define AT91C_TWI_SWRST       ((unsigned int) 0x1 <<  7) // (TWI) Software Reset
+// -------- TWI_MMR : (TWI Offset: 0x4) TWI Master Mode Register -------- 
+#define AT91C_TWI_IADRSZ      ((unsigned int) 0x3 <<  8) // (TWI) Internal Device Address Size
+#define     AT91C_TWI_IADRSZ_NO                   ((unsigned int) 0x0 <<  8) // (TWI) No internal device address
+#define     AT91C_TWI_IADRSZ_1_BYTE               ((unsigned int) 0x1 <<  8) // (TWI) One-byte internal device address
+#define     AT91C_TWI_IADRSZ_2_BYTE               ((unsigned int) 0x2 <<  8) // (TWI) Two-byte internal device address
+#define     AT91C_TWI_IADRSZ_3_BYTE               ((unsigned int) 0x3 <<  8) // (TWI) Three-byte internal device address
+#define AT91C_TWI_MREAD       ((unsigned int) 0x1 << 12) // (TWI) Master Read Direction
+#define AT91C_TWI_DADR        ((unsigned int) 0x7F << 16) // (TWI) Device Address
+// -------- TWI_CWGR : (TWI Offset: 0x10) TWI Clock Waveform Generator Register -------- 
+#define AT91C_TWI_CLDIV       ((unsigned int) 0xFF <<  0) // (TWI) Clock Low Divider
+#define AT91C_TWI_CHDIV       ((unsigned int) 0xFF <<  8) // (TWI) Clock High Divider
+#define AT91C_TWI_CKDIV       ((unsigned int) 0x7 << 16) // (TWI) Clock Divider
+// -------- TWI_SR : (TWI Offset: 0x20) TWI Status Register -------- 
+#define AT91C_TWI_TXCOMP      ((unsigned int) 0x1 <<  0) // (TWI) Transmission Completed
+#define AT91C_TWI_RXRDY       ((unsigned int) 0x1 <<  1) // (TWI) Receive holding register ReaDY
+#define AT91C_TWI_TXRDY       ((unsigned int) 0x1 <<  2) // (TWI) Transmit holding register ReaDY
+#define AT91C_TWI_OVRE        ((unsigned int) 0x1 <<  6) // (TWI) Overrun Error
+#define AT91C_TWI_UNRE        ((unsigned int) 0x1 <<  7) // (TWI) Underrun Error
+#define AT91C_TWI_NACK        ((unsigned int) 0x1 <<  8) // (TWI) Not Acknowledged
+// -------- TWI_IER : (TWI Offset: 0x24) TWI Interrupt Enable Register -------- 
+// -------- TWI_IDR : (TWI Offset: 0x28) TWI Interrupt Disable Register -------- 
+// -------- TWI_IMR : (TWI Offset: 0x2c) TWI Interrupt Mask Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR PWMC Channel Interface
+// *****************************************************************************
+typedef struct _AT91S_PWMC_CH {
+    AT91_REG     PWMC_CMR;     // Channel Mode Register
+    AT91_REG     PWMC_CDTYR;     // Channel Duty Cycle Register
+    AT91_REG     PWMC_CPRDR;     // Channel Period Register
+    AT91_REG     PWMC_CCNTR;     // Channel Counter Register
+    AT91_REG     PWMC_CUPDR;     // Channel Update Register
+    AT91_REG     PWMC_Reserved[3];     // Reserved
+} AT91S_PWMC_CH, *AT91PS_PWMC_CH;
+
+// -------- PWMC_CMR : (PWMC_CH Offset: 0x0) PWMC Channel Mode Register -------- 
+#define AT91C_PWMC_CPRE       ((unsigned int) 0xF <<  0) // (PWMC_CH) Channel Pre-scaler : PWMC_CLKx
+#define     AT91C_PWMC_CPRE_MCK                  ((unsigned int) 0x0) // (PWMC_CH) 
+#define     AT91C_PWMC_CPRE_MCKA                 ((unsigned int) 0xB) // (PWMC_CH) 
+#define     AT91C_PWMC_CPRE_MCKB                 ((unsigned int) 0xC) // (PWMC_CH) 
+#define AT91C_PWMC_CALG       ((unsigned int) 0x1 <<  8) // (PWMC_CH) Channel Alignment
+#define AT91C_PWMC_CPOL       ((unsigned int) 0x1 <<  9) // (PWMC_CH) Channel Polarity
+#define AT91C_PWMC_CPD        ((unsigned int) 0x1 << 10) // (PWMC_CH) Channel Update Period
+// -------- PWMC_CDTYR : (PWMC_CH Offset: 0x4) PWMC Channel Duty Cycle Register -------- 
+#define AT91C_PWMC_CDTY       ((unsigned int) 0x0 <<  0) // (PWMC_CH) Channel Duty Cycle
+// -------- PWMC_CPRDR : (PWMC_CH Offset: 0x8) PWMC Channel Period Register -------- 
+#define AT91C_PWMC_CPRD       ((unsigned int) 0x0 <<  0) // (PWMC_CH) Channel Period
+// -------- PWMC_CCNTR : (PWMC_CH Offset: 0xc) PWMC Channel Counter Register -------- 
+#define AT91C_PWMC_CCNT       ((unsigned int) 0x0 <<  0) // (PWMC_CH) Channel Counter
+// -------- PWMC_CUPDR : (PWMC_CH Offset: 0x10) PWMC Channel Update Register -------- 
+#define AT91C_PWMC_CUPD       ((unsigned int) 0x0 <<  0) // (PWMC_CH) Channel Update
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Pulse Width Modulation Controller Interface
+// *****************************************************************************
+typedef struct _AT91S_PWMC {
+    AT91_REG     PWMC_MR;     // PWMC Mode Register
+    AT91_REG     PWMC_ENA;     // PWMC Enable Register
+    AT91_REG     PWMC_DIS;     // PWMC Disable Register
+    AT91_REG     PWMC_SR;     // PWMC Status Register
+    AT91_REG     PWMC_IER;     // PWMC Interrupt Enable Register
+    AT91_REG     PWMC_IDR;     // PWMC Interrupt Disable Register
+    AT91_REG     PWMC_IMR;     // PWMC Interrupt Mask Register
+    AT91_REG     PWMC_ISR;     // PWMC Interrupt Status Register
+    AT91_REG     Reserved0[55];     // 
+    AT91_REG     PWMC_VR;     // PWMC Version Register
+    AT91_REG     Reserved1[64];     // 
+    AT91S_PWMC_CH     PWMC_CH[4];     // PWMC Channel
+} AT91S_PWMC, *AT91PS_PWMC;
+
+// -------- PWMC_MR : (PWMC Offset: 0x0) PWMC Mode Register -------- 
+#define AT91C_PWMC_DIVA       ((unsigned int) 0xFF <<  0) // (PWMC) CLKA divide factor.
+#define AT91C_PWMC_PREA       ((unsigned int) 0xF <<  8) // (PWMC) Divider Input Clock Prescaler A
+#define     AT91C_PWMC_PREA_MCK                  ((unsigned int) 0x0 <<  8) // (PWMC) 
+#define AT91C_PWMC_DIVB       ((unsigned int) 0xFF << 16) // (PWMC) CLKB divide factor.
+#define AT91C_PWMC_PREB       ((unsigned int) 0xF << 24) // (PWMC) Divider Input Clock Prescaler B
+#define     AT91C_PWMC_PREB_MCK                  ((unsigned int) 0x0 << 24) // (PWMC) 
+// -------- PWMC_ENA : (PWMC Offset: 0x4) PWMC Enable Register -------- 
+#define AT91C_PWMC_CHID0      ((unsigned int) 0x1 <<  0) // (PWMC) Channel ID 0
+#define AT91C_PWMC_CHID1      ((unsigned int) 0x1 <<  1) // (PWMC) Channel ID 1
+#define AT91C_PWMC_CHID2      ((unsigned int) 0x1 <<  2) // (PWMC) Channel ID 2
+#define AT91C_PWMC_CHID3      ((unsigned int) 0x1 <<  3) // (PWMC) Channel ID 3
+// -------- PWMC_DIS : (PWMC Offset: 0x8) PWMC Disable Register -------- 
+// -------- PWMC_SR : (PWMC Offset: 0xc) PWMC Status Register -------- 
+// -------- PWMC_IER : (PWMC Offset: 0x10) PWMC Interrupt Enable Register -------- 
+// -------- PWMC_IDR : (PWMC Offset: 0x14) PWMC Interrupt Disable Register -------- 
+// -------- PWMC_IMR : (PWMC Offset: 0x18) PWMC Interrupt Mask Register -------- 
+// -------- PWMC_ISR : (PWMC Offset: 0x1c) PWMC Interrupt Status Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR USB Device Interface
+// *****************************************************************************
+typedef struct _AT91S_UDP {
+    AT91_REG     UDP_NUM;     // Frame Number Register
+    AT91_REG     UDP_GLBSTATE;     // Global State Register
+    AT91_REG     UDP_FADDR;     // Function Address Register
+    AT91_REG     Reserved0[1];     // 
+    AT91_REG     UDP_IER;     // Interrupt Enable Register
+    AT91_REG     UDP_IDR;     // Interrupt Disable Register
+    AT91_REG     UDP_IMR;     // Interrupt Mask Register
+    AT91_REG     UDP_ISR;     // Interrupt Status Register
+    AT91_REG     UDP_ICR;     // Interrupt Clear Register
+    AT91_REG     Reserved1[1];     // 
+    AT91_REG     UDP_RSTEP;     // Reset Endpoint Register
+    AT91_REG     Reserved2[1];     // 
+    AT91_REG     UDP_CSR[6];     // Endpoint Control and Status Register
+    AT91_REG     Reserved3[2];     // 
+    AT91_REG     UDP_FDR[6];     // Endpoint FIFO Data Register
+    AT91_REG     Reserved4[3];     // 
+    AT91_REG     UDP_TXVC;     // Transceiver Control Register
+} AT91S_UDP, *AT91PS_UDP;
+
+// -------- UDP_FRM_NUM : (UDP Offset: 0x0) USB Frame Number Register -------- 
+#define AT91C_UDP_FRM_NUM     ((unsigned int) 0x7FF <<  0) // (UDP) Frame Number as Defined in the Packet Field Formats
+#define AT91C_UDP_FRM_ERR     ((unsigned int) 0x1 << 16) // (UDP) Frame Error
+#define AT91C_UDP_FRM_OK      ((unsigned int) 0x1 << 17) // (UDP) Frame OK
+// -------- UDP_GLB_STATE : (UDP Offset: 0x4) USB Global State Register -------- 
+#define AT91C_UDP_FADDEN      ((unsigned int) 0x1 <<  0) // (UDP) Function Address Enable
+#define AT91C_UDP_CONFG       ((unsigned int) 0x1 <<  1) // (UDP) Configured
+#define AT91C_UDP_ESR         ((unsigned int) 0x1 <<  2) // (UDP) Enable Send Resume
+#define AT91C_UDP_RSMINPR     ((unsigned int) 0x1 <<  3) // (UDP) A Resume Has Been Sent to the Host
+#define AT91C_UDP_RMWUPE      ((unsigned int) 0x1 <<  4) // (UDP) Remote Wake Up Enable
+// -------- UDP_FADDR : (UDP Offset: 0x8) USB Function Address Register -------- 
+#define AT91C_UDP_FADD        ((unsigned int) 0xFF <<  0) // (UDP) Function Address Value
+#define AT91C_UDP_FEN         ((unsigned int) 0x1 <<  8) // (UDP) Function Enable
+// -------- UDP_IER : (UDP Offset: 0x10) USB Interrupt Enable Register -------- 
+#define AT91C_UDP_EPINT0      ((unsigned int) 0x1 <<  0) // (UDP) Endpoint 0 Interrupt
+#define AT91C_UDP_EPINT1      ((unsigned int) 0x1 <<  1) // (UDP) Endpoint 0 Interrupt
+#define AT91C_UDP_EPINT2      ((unsigned int) 0x1 <<  2) // (UDP) Endpoint 2 Interrupt
+#define AT91C_UDP_EPINT3      ((unsigned int) 0x1 <<  3) // (UDP) Endpoint 3 Interrupt
+#define AT91C_UDP_EPINT4      ((unsigned int) 0x1 <<  4) // (UDP) Endpoint 4 Interrupt
+#define AT91C_UDP_EPINT5      ((unsigned int) 0x1 <<  5) // (UDP) Endpoint 5 Interrupt
+#define AT91C_UDP_RXSUSP      ((unsigned int) 0x1 <<  8) // (UDP) USB Suspend Interrupt
+#define AT91C_UDP_RXRSM       ((unsigned int) 0x1 <<  9) // (UDP) USB Resume Interrupt
+#define AT91C_UDP_EXTRSM      ((unsigned int) 0x1 << 10) // (UDP) USB External Resume Interrupt
+#define AT91C_UDP_SOFINT      ((unsigned int) 0x1 << 11) // (UDP) USB Start Of frame Interrupt
+#define AT91C_UDP_WAKEUP      ((unsigned int) 0x1 << 13) // (UDP) USB Resume Interrupt
+// -------- UDP_IDR : (UDP Offset: 0x14) USB Interrupt Disable Register -------- 
+// -------- UDP_IMR : (UDP Offset: 0x18) USB Interrupt Mask Register -------- 
+// -------- UDP_ISR : (UDP Offset: 0x1c) USB Interrupt Status Register -------- 
+#define AT91C_UDP_ENDBUSRES   ((unsigned int) 0x1 << 12) // (UDP) USB End Of Bus Reset Interrupt
+// -------- UDP_ICR : (UDP Offset: 0x20) USB Interrupt Clear Register -------- 
+// -------- UDP_RST_EP : (UDP Offset: 0x28) USB Reset Endpoint Register -------- 
+#define AT91C_UDP_EP0         ((unsigned int) 0x1 <<  0) // (UDP) Reset Endpoint 0
+#define AT91C_UDP_EP1         ((unsigned int) 0x1 <<  1) // (UDP) Reset Endpoint 1
+#define AT91C_UDP_EP2         ((unsigned int) 0x1 <<  2) // (UDP) Reset Endpoint 2
+#define AT91C_UDP_EP3         ((unsigned int) 0x1 <<  3) // (UDP) Reset Endpoint 3
+#define AT91C_UDP_EP4         ((unsigned int) 0x1 <<  4) // (UDP) Reset Endpoint 4
+#define AT91C_UDP_EP5         ((unsigned int) 0x1 <<  5) // (UDP) Reset Endpoint 5
+// -------- UDP_CSR : (UDP Offset: 0x30) USB Endpoint Control and Status Register -------- 
+#define AT91C_UDP_TXCOMP      ((unsigned int) 0x1 <<  0) // (UDP) Generates an IN packet with data previously written in the DPR
+#define AT91C_UDP_RX_DATA_BK0 ((unsigned int) 0x1 <<  1) // (UDP) Receive Data Bank 0
+#define AT91C_UDP_RXSETUP     ((unsigned int) 0x1 <<  2) // (UDP) Sends STALL to the Host (Control endpoints)
+#define AT91C_UDP_ISOERROR    ((unsigned int) 0x1 <<  3) // (UDP) Isochronous error (Isochronous endpoints)
+#define AT91C_UDP_TXPKTRDY    ((unsigned int) 0x1 <<  4) // (UDP) Transmit Packet Ready
+#define AT91C_UDP_FORCESTALL  ((unsigned int) 0x1 <<  5) // (UDP) Force Stall (used by Control, Bulk and Isochronous endpoints).
+#define AT91C_UDP_RX_DATA_BK1 ((unsigned int) 0x1 <<  6) // (UDP) Receive Data Bank 1 (only used by endpoints with ping-pong attributes).
+#define AT91C_UDP_DIR         ((unsigned int) 0x1 <<  7) // (UDP) Transfer Direction
+#define AT91C_UDP_EPTYPE      ((unsigned int) 0x7 <<  8) // (UDP) Endpoint type
+#define     AT91C_UDP_EPTYPE_CTRL                 ((unsigned int) 0x0 <<  8) // (UDP) Control
+#define     AT91C_UDP_EPTYPE_ISO_OUT              ((unsigned int) 0x1 <<  8) // (UDP) Isochronous OUT
+#define     AT91C_UDP_EPTYPE_BULK_OUT             ((unsigned int) 0x2 <<  8) // (UDP) Bulk OUT
+#define     AT91C_UDP_EPTYPE_INT_OUT              ((unsigned int) 0x3 <<  8) // (UDP) Interrupt OUT
+#define     AT91C_UDP_EPTYPE_ISO_IN               ((unsigned int) 0x5 <<  8) // (UDP) Isochronous IN
+#define     AT91C_UDP_EPTYPE_BULK_IN              ((unsigned int) 0x6 <<  8) // (UDP) Bulk IN
+#define     AT91C_UDP_EPTYPE_INT_IN               ((unsigned int) 0x7 <<  8) // (UDP) Interrupt IN
+#define AT91C_UDP_DTGLE       ((unsigned int) 0x1 << 11) // (UDP) Data Toggle
+#define AT91C_UDP_EPEDS       ((unsigned int) 0x1 << 15) // (UDP) Endpoint Enable Disable
+#define AT91C_UDP_RXBYTECNT   ((unsigned int) 0x7FF << 16) // (UDP) Number Of Bytes Available in the FIFO
+// -------- UDP_TXVC : (UDP Offset: 0x74) Transceiver Control Register -------- 
+#define AT91C_UDP_TXVDIS      ((unsigned int) 0x1 <<  8) // (UDP) 
+#define AT91C_UDP_PUON        ((unsigned int) 0x1 <<  9) // (UDP) Pull-up ON
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Timer Counter Channel Interface
+// *****************************************************************************
+typedef struct _AT91S_TC {
+    AT91_REG     TC_CCR;     // Channel Control Register
+    AT91_REG     TC_CMR;     // Channel Mode Register (Capture Mode / Waveform Mode)
+    AT91_REG     Reserved0[2];     // 
+    AT91_REG     TC_CV;     // Counter Value
+    AT91_REG     TC_RA;     // Register A
+    AT91_REG     TC_RB;     // Register B
+    AT91_REG     TC_RC;     // Register C
+    AT91_REG     TC_SR;     // Status Register
+    AT91_REG     TC_IER;     // Interrupt Enable Register
+    AT91_REG     TC_IDR;     // Interrupt Disable Register
+    AT91_REG     TC_IMR;     // Interrupt Mask Register
+} AT91S_TC, *AT91PS_TC;
+
+// -------- TC_CCR : (TC Offset: 0x0) TC Channel Control Register -------- 
+#define AT91C_TC_CLKEN        ((unsigned int) 0x1 <<  0) // (TC) Counter Clock Enable Command
+#define AT91C_TC_CLKDIS       ((unsigned int) 0x1 <<  1) // (TC) Counter Clock Disable Command
+#define AT91C_TC_SWTRG        ((unsigned int) 0x1 <<  2) // (TC) Software Trigger Command
+// -------- TC_CMR : (TC Offset: 0x4) TC Channel Mode Register: Capture Mode / Waveform Mode -------- 
+#define AT91C_TC_CLKS         ((unsigned int) 0x7 <<  0) // (TC) Clock Selection
+#define     AT91C_TC_CLKS_TIMER_DIV1_CLOCK     ((unsigned int) 0x0) // (TC) Clock selected: TIMER_DIV1_CLOCK
+#define     AT91C_TC_CLKS_TIMER_DIV2_CLOCK     ((unsigned int) 0x1) // (TC) Clock selected: TIMER_DIV2_CLOCK
+#define     AT91C_TC_CLKS_TIMER_DIV3_CLOCK     ((unsigned int) 0x2) // (TC) Clock selected: TIMER_DIV3_CLOCK
+#define     AT91C_TC_CLKS_TIMER_DIV4_CLOCK     ((unsigned int) 0x3) // (TC) Clock selected: TIMER_DIV4_CLOCK
+#define     AT91C_TC_CLKS_TIMER_DIV5_CLOCK     ((unsigned int) 0x4) // (TC) Clock selected: TIMER_DIV5_CLOCK
+#define     AT91C_TC_CLKS_XC0                  ((unsigned int) 0x5) // (TC) Clock selected: XC0
+#define     AT91C_TC_CLKS_XC1                  ((unsigned int) 0x6) // (TC) Clock selected: XC1
+#define     AT91C_TC_CLKS_XC2                  ((unsigned int) 0x7) // (TC) Clock selected: XC2
+#define AT91C_TC_CLKI         ((unsigned int) 0x1 <<  3) // (TC) Clock Invert
+#define AT91C_TC_BURST        ((unsigned int) 0x3 <<  4) // (TC) Burst Signal Selection
+#define     AT91C_TC_BURST_NONE                 ((unsigned int) 0x0 <<  4) // (TC) The clock is not gated by an external signal
+#define     AT91C_TC_BURST_XC0                  ((unsigned int) 0x1 <<  4) // (TC) XC0 is ANDed with the selected clock
+#define     AT91C_TC_BURST_XC1                  ((unsigned int) 0x2 <<  4) // (TC) XC1 is ANDed with the selected clock
+#define     AT91C_TC_BURST_XC2                  ((unsigned int) 0x3 <<  4) // (TC) XC2 is ANDed with the selected clock
+#define AT91C_TC_CPCSTOP      ((unsigned int) 0x1 <<  6) // (TC) Counter Clock Stopped with RC Compare
+#define AT91C_TC_LDBSTOP      ((unsigned int) 0x1 <<  6) // (TC) Counter Clock Stopped with RB Loading
+#define AT91C_TC_LDBDIS       ((unsigned int) 0x1 <<  7) // (TC) Counter Clock Disabled with RB Loading
+#define AT91C_TC_CPCDIS       ((unsigned int) 0x1 <<  7) // (TC) Counter Clock Disable with RC Compare
+#define AT91C_TC_ETRGEDG      ((unsigned int) 0x3 <<  8) // (TC) External Trigger Edge Selection
+#define     AT91C_TC_ETRGEDG_NONE                 ((unsigned int) 0x0 <<  8) // (TC) Edge: None
+#define     AT91C_TC_ETRGEDG_RISING               ((unsigned int) 0x1 <<  8) // (TC) Edge: rising edge
+#define     AT91C_TC_ETRGEDG_FALLING              ((unsigned int) 0x2 <<  8) // (TC) Edge: falling edge
+#define     AT91C_TC_ETRGEDG_BOTH                 ((unsigned int) 0x3 <<  8) // (TC) Edge: each edge
+#define AT91C_TC_EEVTEDG      ((unsigned int) 0x3 <<  8) // (TC) External Event Edge Selection
+#define     AT91C_TC_EEVTEDG_NONE                 ((unsigned int) 0x0 <<  8) // (TC) Edge: None
+#define     AT91C_TC_EEVTEDG_RISING               ((unsigned int) 0x1 <<  8) // (TC) Edge: rising edge
+#define     AT91C_TC_EEVTEDG_FALLING              ((unsigned int) 0x2 <<  8) // (TC) Edge: falling edge
+#define     AT91C_TC_EEVTEDG_BOTH                 ((unsigned int) 0x3 <<  8) // (TC) Edge: each edge
+#define AT91C_TC_ABETRG       ((unsigned int) 0x1 << 10) // (TC) TIOA or TIOB External Trigger Selection
+#define AT91C_TC_EEVT         ((unsigned int) 0x3 << 10) // (TC) External Event  Selection
+#define     AT91C_TC_EEVT_TIOB                 ((unsigned int) 0x0 << 10) // (TC) Signal selected as external event: TIOB TIOB direction: input
+#define     AT91C_TC_EEVT_XC0                  ((unsigned int) 0x1 << 10) // (TC) Signal selected as external event: XC0 TIOB direction: output
+#define     AT91C_TC_EEVT_XC1                  ((unsigned int) 0x2 << 10) // (TC) Signal selected as external event: XC1 TIOB direction: output
+#define     AT91C_TC_EEVT_XC2                  ((unsigned int) 0x3 << 10) // (TC) Signal selected as external event: XC2 TIOB direction: output
+#define AT91C_TC_ENETRG       ((unsigned int) 0x1 << 12) // (TC) External Event Trigger enable
+#define AT91C_TC_WAVESEL      ((unsigned int) 0x3 << 13) // (TC) Waveform  Selection
+#define     AT91C_TC_WAVESEL_UP                   ((unsigned int) 0x0 << 13) // (TC) UP mode without atomatic trigger on RC Compare
+#define     AT91C_TC_WAVESEL_UPDOWN               ((unsigned int) 0x1 << 13) // (TC) UPDOWN mode without automatic trigger on RC Compare
+#define     AT91C_TC_WAVESEL_UP_AUTO              ((unsigned int) 0x2 << 13) // (TC) UP mode with automatic trigger on RC Compare
+#define     AT91C_TC_WAVESEL_UPDOWN_AUTO          ((unsigned int) 0x3 << 13) // (TC) UPDOWN mode with automatic trigger on RC Compare
+#define AT91C_TC_CPCTRG       ((unsigned int) 0x1 << 14) // (TC) RC Compare Trigger Enable
+#define AT91C_TC_WAVE         ((unsigned int) 0x1 << 15) // (TC) 
+#define AT91C_TC_LDRA         ((unsigned int) 0x3 << 16) // (TC) RA Loading Selection
+#define     AT91C_TC_LDRA_NONE                 ((unsigned int) 0x0 << 16) // (TC) Edge: None
+#define     AT91C_TC_LDRA_RISING               ((unsigned int) 0x1 << 16) // (TC) Edge: rising edge of TIOA
+#define     AT91C_TC_LDRA_FALLING              ((unsigned int) 0x2 << 16) // (TC) Edge: falling edge of TIOA
+#define     AT91C_TC_LDRA_BOTH                 ((unsigned int) 0x3 << 16) // (TC) Edge: each edge of TIOA
+#define AT91C_TC_ACPA         ((unsigned int) 0x3 << 16) // (TC) RA Compare Effect on TIOA
+#define     AT91C_TC_ACPA_NONE                 ((unsigned int) 0x0 << 16) // (TC) Effect: none
+#define     AT91C_TC_ACPA_SET                  ((unsigned int) 0x1 << 16) // (TC) Effect: set
+#define     AT91C_TC_ACPA_CLEAR                ((unsigned int) 0x2 << 16) // (TC) Effect: clear
+#define     AT91C_TC_ACPA_TOGGLE               ((unsigned int) 0x3 << 16) // (TC) Effect: toggle
+#define AT91C_TC_LDRB         ((unsigned int) 0x3 << 18) // (TC) RB Loading Selection
+#define     AT91C_TC_LDRB_NONE                 ((unsigned int) 0x0 << 18) // (TC) Edge: None
+#define     AT91C_TC_LDRB_RISING               ((unsigned int) 0x1 << 18) // (TC) Edge: rising edge of TIOA
+#define     AT91C_TC_LDRB_FALLING              ((unsigned int) 0x2 << 18) // (TC) Edge: falling edge of TIOA
+#define     AT91C_TC_LDRB_BOTH                 ((unsigned int) 0x3 << 18) // (TC) Edge: each edge of TIOA
+#define AT91C_TC_ACPC         ((unsigned int) 0x3 << 18) // (TC) RC Compare Effect on TIOA
+#define     AT91C_TC_ACPC_NONE                 ((unsigned int) 0x0 << 18) // (TC) Effect: none
+#define     AT91C_TC_ACPC_SET                  ((unsigned int) 0x1 << 18) // (TC) Effect: set
+#define     AT91C_TC_ACPC_CLEAR                ((unsigned int) 0x2 << 18) // (TC) Effect: clear
+#define     AT91C_TC_ACPC_TOGGLE               ((unsigned int) 0x3 << 18) // (TC) Effect: toggle
+#define AT91C_TC_AEEVT        ((unsigned int) 0x3 << 20) // (TC) External Event Effect on TIOA
+#define     AT91C_TC_AEEVT_NONE                 ((unsigned int) 0x0 << 20) // (TC) Effect: none
+#define     AT91C_TC_AEEVT_SET                  ((unsigned int) 0x1 << 20) // (TC) Effect: set
+#define     AT91C_TC_AEEVT_CLEAR                ((unsigned int) 0x2 << 20) // (TC) Effect: clear
+#define     AT91C_TC_AEEVT_TOGGLE               ((unsigned int) 0x3 << 20) // (TC) Effect: toggle
+#define AT91C_TC_ASWTRG       ((unsigned int) 0x3 << 22) // (TC) Software Trigger Effect on TIOA
+#define     AT91C_TC_ASWTRG_NONE                 ((unsigned int) 0x0 << 22) // (TC) Effect: none
+#define     AT91C_TC_ASWTRG_SET                  ((unsigned int) 0x1 << 22) // (TC) Effect: set
+#define     AT91C_TC_ASWTRG_CLEAR                ((unsigned int) 0x2 << 22) // (TC) Effect: clear
+#define     AT91C_TC_ASWTRG_TOGGLE               ((unsigned int) 0x3 << 22) // (TC) Effect: toggle
+#define AT91C_TC_BCPB         ((unsigned int) 0x3 << 24) // (TC) RB Compare Effect on TIOB
+#define     AT91C_TC_BCPB_NONE                 ((unsigned int) 0x0 << 24) // (TC) Effect: none
+#define     AT91C_TC_BCPB_SET                  ((unsigned int) 0x1 << 24) // (TC) Effect: set
+#define     AT91C_TC_BCPB_CLEAR                ((unsigned int) 0x2 << 24) // (TC) Effect: clear
+#define     AT91C_TC_BCPB_TOGGLE               ((unsigned int) 0x3 << 24) // (TC) Effect: toggle
+#define AT91C_TC_BCPC         ((unsigned int) 0x3 << 26) // (TC) RC Compare Effect on TIOB
+#define     AT91C_TC_BCPC_NONE                 ((unsigned int) 0x0 << 26) // (TC) Effect: none
+#define     AT91C_TC_BCPC_SET                  ((unsigned int) 0x1 << 26) // (TC) Effect: set
+#define     AT91C_TC_BCPC_CLEAR                ((unsigned int) 0x2 << 26) // (TC) Effect: clear
+#define     AT91C_TC_BCPC_TOGGLE               ((unsigned int) 0x3 << 26) // (TC) Effect: toggle
+#define AT91C_TC_BEEVT        ((unsigned int) 0x3 << 28) // (TC) External Event Effect on TIOB
+#define     AT91C_TC_BEEVT_NONE                 ((unsigned int) 0x0 << 28) // (TC) Effect: none
+#define     AT91C_TC_BEEVT_SET                  ((unsigned int) 0x1 << 28) // (TC) Effect: set
+#define     AT91C_TC_BEEVT_CLEAR                ((unsigned int) 0x2 << 28) // (TC) Effect: clear
+#define     AT91C_TC_BEEVT_TOGGLE               ((unsigned int) 0x3 << 28) // (TC) Effect: toggle
+#define AT91C_TC_BSWTRG       ((unsigned int) 0x3 << 30) // (TC) Software Trigger Effect on TIOB
+#define     AT91C_TC_BSWTRG_NONE                 ((unsigned int) 0x0 << 30) // (TC) Effect: none
+#define     AT91C_TC_BSWTRG_SET                  ((unsigned int) 0x1 << 30) // (TC) Effect: set
+#define     AT91C_TC_BSWTRG_CLEAR                ((unsigned int) 0x2 << 30) // (TC) Effect: clear
+#define     AT91C_TC_BSWTRG_TOGGLE               ((unsigned int) 0x3 << 30) // (TC) Effect: toggle
+// -------- TC_SR : (TC Offset: 0x20) TC Channel Status Register -------- 
+#define AT91C_TC_COVFS        ((unsigned int) 0x1 <<  0) // (TC) Counter Overflow
+#define AT91C_TC_LOVRS        ((unsigned int) 0x1 <<  1) // (TC) Load Overrun
+#define AT91C_TC_CPAS         ((unsigned int) 0x1 <<  2) // (TC) RA Compare
+#define AT91C_TC_CPBS         ((unsigned int) 0x1 <<  3) // (TC) RB Compare
+#define AT91C_TC_CPCS         ((unsigned int) 0x1 <<  4) // (TC) RC Compare
+#define AT91C_TC_LDRAS        ((unsigned int) 0x1 <<  5) // (TC) RA Loading
+#define AT91C_TC_LDRBS        ((unsigned int) 0x1 <<  6) // (TC) RB Loading
+#define AT91C_TC_ETRGS        ((unsigned int) 0x1 <<  7) // (TC) External Trigger
+#define AT91C_TC_CLKSTA       ((unsigned int) 0x1 << 16) // (TC) Clock Enabling
+#define AT91C_TC_MTIOA        ((unsigned int) 0x1 << 17) // (TC) TIOA Mirror
+#define AT91C_TC_MTIOB        ((unsigned int) 0x1 << 18) // (TC) TIOA Mirror
+// -------- TC_IER : (TC Offset: 0x24) TC Channel Interrupt Enable Register -------- 
+// -------- TC_IDR : (TC Offset: 0x28) TC Channel Interrupt Disable Register -------- 
+// -------- TC_IMR : (TC Offset: 0x2c) TC Channel Interrupt Mask Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Timer Counter Interface
+// *****************************************************************************
+typedef struct _AT91S_TCB {
+    AT91S_TC     TCB_TC0;     // TC Channel 0
+    AT91_REG     Reserved0[4];     // 
+    AT91S_TC     TCB_TC1;     // TC Channel 1
+    AT91_REG     Reserved1[4];     // 
+    AT91S_TC     TCB_TC2;     // TC Channel 2
+    AT91_REG     Reserved2[4];     // 
+    AT91_REG     TCB_BCR;     // TC Block Control Register
+    AT91_REG     TCB_BMR;     // TC Block Mode Register
+} AT91S_TCB, *AT91PS_TCB;
+
+// -------- TCB_BCR : (TCB Offset: 0xc0) TC Block Control Register -------- 
+#define AT91C_TCB_SYNC        ((unsigned int) 0x1 <<  0) // (TCB) Synchro Command
+// -------- TCB_BMR : (TCB Offset: 0xc4) TC Block Mode Register -------- 
+#define AT91C_TCB_TC0XC0S     ((unsigned int) 0x3 <<  0) // (TCB) External Clock Signal 0 Selection
+#define     AT91C_TCB_TC0XC0S_TCLK0                ((unsigned int) 0x0) // (TCB) TCLK0 connected to XC0
+#define     AT91C_TCB_TC0XC0S_NONE                 ((unsigned int) 0x1) // (TCB) None signal connected to XC0
+#define     AT91C_TCB_TC0XC0S_TIOA1                ((unsigned int) 0x2) // (TCB) TIOA1 connected to XC0
+#define     AT91C_TCB_TC0XC0S_TIOA2                ((unsigned int) 0x3) // (TCB) TIOA2 connected to XC0
+#define AT91C_TCB_TC1XC1S     ((unsigned int) 0x3 <<  2) // (TCB) External Clock Signal 1 Selection
+#define     AT91C_TCB_TC1XC1S_TCLK1                ((unsigned int) 0x0 <<  2) // (TCB) TCLK1 connected to XC1
+#define     AT91C_TCB_TC1XC1S_NONE                 ((unsigned int) 0x1 <<  2) // (TCB) None signal connected to XC1
+#define     AT91C_TCB_TC1XC1S_TIOA0                ((unsigned int) 0x2 <<  2) // (TCB) TIOA0 connected to XC1
+#define     AT91C_TCB_TC1XC1S_TIOA2                ((unsigned int) 0x3 <<  2) // (TCB) TIOA2 connected to XC1
+#define AT91C_TCB_TC2XC2S     ((unsigned int) 0x3 <<  4) // (TCB) External Clock Signal 2 Selection
+#define     AT91C_TCB_TC2XC2S_TCLK2                ((unsigned int) 0x0 <<  4) // (TCB) TCLK2 connected to XC2
+#define     AT91C_TCB_TC2XC2S_NONE                 ((unsigned int) 0x1 <<  4) // (TCB) None signal connected to XC2
+#define     AT91C_TCB_TC2XC2S_TIOA0                ((unsigned int) 0x2 <<  4) // (TCB) TIOA0 connected to XC2
+#define     AT91C_TCB_TC2XC2S_TIOA1                ((unsigned int) 0x3 <<  4) // (TCB) TIOA2 connected to XC2
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Control Area Network MailBox Interface
+// *****************************************************************************
+typedef struct _AT91S_CAN_MB {
+    AT91_REG     CAN_MB_MMR;     // MailBox Mode Register
+    AT91_REG     CAN_MB_MAM;     // MailBox Acceptance Mask Register
+    AT91_REG     CAN_MB_MID;     // MailBox ID Register
+    AT91_REG     CAN_MB_MFID;     // MailBox Family ID Register
+    AT91_REG     CAN_MB_MSR;     // MailBox Status Register
+    AT91_REG     CAN_MB_MDL;     // MailBox Data Low Register
+    AT91_REG     CAN_MB_MDH;     // MailBox Data High Register
+    AT91_REG     CAN_MB_MCR;     // MailBox Control Register
+} AT91S_CAN_MB, *AT91PS_CAN_MB;
+
+// -------- CAN_MMR : (CAN_MB Offset: 0x0) CAN Message Mode Register -------- 
+#define AT91C_CAN_MTIMEMARK   ((unsigned int) 0xFFFF <<  0) // (CAN_MB) Mailbox Timemark
+#define AT91C_CAN_PRIOR       ((unsigned int) 0xF << 16) // (CAN_MB) Mailbox Priority
+#define AT91C_CAN_MOT         ((unsigned int) 0x7 << 24) // (CAN_MB) Mailbox Object Type
+#define     AT91C_CAN_MOT_DIS                  ((unsigned int) 0x0 << 24) // (CAN_MB) 
+#define     AT91C_CAN_MOT_RX                   ((unsigned int) 0x1 << 24) // (CAN_MB) 
+#define     AT91C_CAN_MOT_RXOVERWRITE          ((unsigned int) 0x2 << 24) // (CAN_MB) 
+#define     AT91C_CAN_MOT_TX                   ((unsigned int) 0x3 << 24) // (CAN_MB) 
+#define     AT91C_CAN_MOT_CONSUMER             ((unsigned int) 0x4 << 24) // (CAN_MB) 
+#define     AT91C_CAN_MOT_PRODUCER             ((unsigned int) 0x5 << 24) // (CAN_MB) 
+// -------- CAN_MAM : (CAN_MB Offset: 0x4) CAN Message Acceptance Mask Register -------- 
+#define AT91C_CAN_MIDvB       ((unsigned int) 0x3FFFF <<  0) // (CAN_MB) Complementary bits for identifier in extended mode
+#define AT91C_CAN_MIDvA       ((unsigned int) 0x7FF << 18) // (CAN_MB) Identifier for standard frame mode
+#define AT91C_CAN_MIDE        ((unsigned int) 0x1 << 29) // (CAN_MB) Identifier Version
+// -------- CAN_MID : (CAN_MB Offset: 0x8) CAN Message ID Register -------- 
+// -------- CAN_MFID : (CAN_MB Offset: 0xc) CAN Message Family ID Register -------- 
+// -------- CAN_MSR : (CAN_MB Offset: 0x10) CAN Message Status Register -------- 
+#define AT91C_CAN_MTIMESTAMP  ((unsigned int) 0xFFFF <<  0) // (CAN_MB) Timer Value
+#define AT91C_CAN_MDLC        ((unsigned int) 0xF << 16) // (CAN_MB) Mailbox Data Length Code
+#define AT91C_CAN_MRTR        ((unsigned int) 0x1 << 20) // (CAN_MB) Mailbox Remote Transmission Request
+#define AT91C_CAN_MABT        ((unsigned int) 0x1 << 22) // (CAN_MB) Mailbox Message Abort
+#define AT91C_CAN_MRDY        ((unsigned int) 0x1 << 23) // (CAN_MB) Mailbox Ready
+#define AT91C_CAN_MMI         ((unsigned int) 0x1 << 24) // (CAN_MB) Mailbox Message Ignored
+// -------- CAN_MDL : (CAN_MB Offset: 0x14) CAN Message Data Low Register -------- 
+// -------- CAN_MDH : (CAN_MB Offset: 0x18) CAN Message Data High Register -------- 
+// -------- CAN_MCR : (CAN_MB Offset: 0x1c) CAN Message Control Register -------- 
+#define AT91C_CAN_MACR        ((unsigned int) 0x1 << 22) // (CAN_MB) Abort Request for Mailbox
+#define AT91C_CAN_MTCR        ((unsigned int) 0x1 << 23) // (CAN_MB) Mailbox Transfer Command
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Control Area Network Interface
+// *****************************************************************************
+typedef struct _AT91S_CAN {
+    AT91_REG     CAN_MR;     // Mode Register
+    AT91_REG     CAN_IER;     // Interrupt Enable Register
+    AT91_REG     CAN_IDR;     // Interrupt Disable Register
+    AT91_REG     CAN_IMR;     // Interrupt Mask Register
+    AT91_REG     CAN_SR;     // Status Register
+    AT91_REG     CAN_BR;     // Baudrate Register
+    AT91_REG     CAN_TIM;     // Timer Register
+    AT91_REG     CAN_TIMESTP;     // Time Stamp Register
+    AT91_REG     CAN_ECR;     // Error Counter Register
+    AT91_REG     CAN_TCR;     // Transfer Command Register
+    AT91_REG     CAN_ACR;     // Abort Command Register
+    AT91_REG     Reserved0[52];     // 
+    AT91_REG     CAN_VR;     // Version Register
+    AT91_REG     Reserved1[64];     // 
+    AT91S_CAN_MB     CAN_MB0;     // CAN Mailbox 0
+    AT91S_CAN_MB     CAN_MB1;     // CAN Mailbox 1
+    AT91S_CAN_MB     CAN_MB2;     // CAN Mailbox 2
+    AT91S_CAN_MB     CAN_MB3;     // CAN Mailbox 3
+    AT91S_CAN_MB     CAN_MB4;     // CAN Mailbox 4
+    AT91S_CAN_MB     CAN_MB5;     // CAN Mailbox 5
+    AT91S_CAN_MB     CAN_MB6;     // CAN Mailbox 6
+    AT91S_CAN_MB     CAN_MB7;     // CAN Mailbox 7
+    AT91S_CAN_MB     CAN_MB8;     // CAN Mailbox 8
+    AT91S_CAN_MB     CAN_MB9;     // CAN Mailbox 9
+    AT91S_CAN_MB     CAN_MB10;     // CAN Mailbox 10
+    AT91S_CAN_MB     CAN_MB11;     // CAN Mailbox 11
+    AT91S_CAN_MB     CAN_MB12;     // CAN Mailbox 12
+    AT91S_CAN_MB     CAN_MB13;     // CAN Mailbox 13
+    AT91S_CAN_MB     CAN_MB14;     // CAN Mailbox 14
+    AT91S_CAN_MB     CAN_MB15;     // CAN Mailbox 15
+} AT91S_CAN, *AT91PS_CAN;
+
+// -------- CAN_MR : (CAN Offset: 0x0) CAN Mode Register -------- 
+#define AT91C_CAN_CANEN       ((unsigned int) 0x1 <<  0) // (CAN) CAN Controller Enable
+#define AT91C_CAN_LPM         ((unsigned int) 0x1 <<  1) // (CAN) Disable/Enable Low Power Mode
+#define AT91C_CAN_ABM         ((unsigned int) 0x1 <<  2) // (CAN) Disable/Enable Autobaud/Listen Mode
+#define AT91C_CAN_OVL         ((unsigned int) 0x1 <<  3) // (CAN) Disable/Enable Overload Frame
+#define AT91C_CAN_TEOF        ((unsigned int) 0x1 <<  4) // (CAN) Time Stamp messages at each end of Frame
+#define AT91C_CAN_TTM         ((unsigned int) 0x1 <<  5) // (CAN) Disable/Enable Time Trigger Mode
+#define AT91C_CAN_TIMFRZ      ((unsigned int) 0x1 <<  6) // (CAN) Enable Timer Freeze
+#define AT91C_CAN_DRPT        ((unsigned int) 0x1 <<  7) // (CAN) Disable Repeat
+// -------- CAN_IER : (CAN Offset: 0x4) CAN Interrupt Enable Register -------- 
+#define AT91C_CAN_MB0         ((unsigned int) 0x1 <<  0) // (CAN) Mailbox 0 Flag
+#define AT91C_CAN_MB1         ((unsigned int) 0x1 <<  1) // (CAN) Mailbox 1 Flag
+#define AT91C_CAN_MB2         ((unsigned int) 0x1 <<  2) // (CAN) Mailbox 2 Flag
+#define AT91C_CAN_MB3         ((unsigned int) 0x1 <<  3) // (CAN) Mailbox 3 Flag
+#define AT91C_CAN_MB4         ((unsigned int) 0x1 <<  4) // (CAN) Mailbox 4 Flag
+#define AT91C_CAN_MB5         ((unsigned int) 0x1 <<  5) // (CAN) Mailbox 5 Flag
+#define AT91C_CAN_MB6         ((unsigned int) 0x1 <<  6) // (CAN) Mailbox 6 Flag
+#define AT91C_CAN_MB7         ((unsigned int) 0x1 <<  7) // (CAN) Mailbox 7 Flag
+#define AT91C_CAN_MB8         ((unsigned int) 0x1 <<  8) // (CAN) Mailbox 8 Flag
+#define AT91C_CAN_MB9         ((unsigned int) 0x1 <<  9) // (CAN) Mailbox 9 Flag
+#define AT91C_CAN_MB10        ((unsigned int) 0x1 << 10) // (CAN) Mailbox 10 Flag
+#define AT91C_CAN_MB11        ((unsigned int) 0x1 << 11) // (CAN) Mailbox 11 Flag
+#define AT91C_CAN_MB12        ((unsigned int) 0x1 << 12) // (CAN) Mailbox 12 Flag
+#define AT91C_CAN_MB13        ((unsigned int) 0x1 << 13) // (CAN) Mailbox 13 Flag
+#define AT91C_CAN_MB14        ((unsigned int) 0x1 << 14) // (CAN) Mailbox 14 Flag
+#define AT91C_CAN_MB15        ((unsigned int) 0x1 << 15) // (CAN) Mailbox 15 Flag
+#define AT91C_CAN_ERRA        ((unsigned int) 0x1 << 16) // (CAN) Error Active Mode Flag
+#define AT91C_CAN_WARN        ((unsigned int) 0x1 << 17) // (CAN) Warning Limit Flag
+#define AT91C_CAN_ERRP        ((unsigned int) 0x1 << 18) // (CAN) Error Passive Mode Flag
+#define AT91C_CAN_BOFF        ((unsigned int) 0x1 << 19) // (CAN) Bus Off Mode Flag
+#define AT91C_CAN_SLEEP       ((unsigned int) 0x1 << 20) // (CAN) Sleep Flag
+#define AT91C_CAN_WAKEUP      ((unsigned int) 0x1 << 21) // (CAN) Wakeup Flag
+#define AT91C_CAN_TOVF        ((unsigned int) 0x1 << 22) // (CAN) Timer Overflow Flag
+#define AT91C_CAN_TSTP        ((unsigned int) 0x1 << 23) // (CAN) Timestamp Flag
+#define AT91C_CAN_CERR        ((unsigned int) 0x1 << 24) // (CAN) CRC Error
+#define AT91C_CAN_SERR        ((unsigned int) 0x1 << 25) // (CAN) Stuffing Error
+#define AT91C_CAN_AERR        ((unsigned int) 0x1 << 26) // (CAN) Acknowledgment Error
+#define AT91C_CAN_FERR        ((unsigned int) 0x1 << 27) // (CAN) Form Error
+#define AT91C_CAN_BERR        ((unsigned int) 0x1 << 28) // (CAN) Bit Error
+// -------- CAN_IDR : (CAN Offset: 0x8) CAN Interrupt Disable Register -------- 
+// -------- CAN_IMR : (CAN Offset: 0xc) CAN Interrupt Mask Register -------- 
+// -------- CAN_SR : (CAN Offset: 0x10) CAN Status Register -------- 
+#define AT91C_CAN_RBSY        ((unsigned int) 0x1 << 29) // (CAN) Receiver Busy
+#define AT91C_CAN_TBSY        ((unsigned int) 0x1 << 30) // (CAN) Transmitter Busy
+#define AT91C_CAN_OVLY        ((unsigned int) 0x1 << 31) // (CAN) Overload Busy
+// -------- CAN_BR : (CAN Offset: 0x14) CAN Baudrate Register -------- 
+#define AT91C_CAN_PHASE2      ((unsigned int) 0x7 <<  0) // (CAN) Phase 2 segment
+#define AT91C_CAN_PHASE1      ((unsigned int) 0x7 <<  4) // (CAN) Phase 1 segment
+#define AT91C_CAN_PROPAG      ((unsigned int) 0x7 <<  8) // (CAN) Programmation time segment
+#define AT91C_CAN_SYNC        ((unsigned int) 0x3 << 12) // (CAN) Re-synchronization jump width segment
+#define AT91C_CAN_BRP         ((unsigned int) 0x7F << 16) // (CAN) Baudrate Prescaler
+#define AT91C_CAN_SMP         ((unsigned int) 0x1 << 24) // (CAN) Sampling mode
+// -------- CAN_TIM : (CAN Offset: 0x18) CAN Timer Register -------- 
+#define AT91C_CAN_TIMER       ((unsigned int) 0xFFFF <<  0) // (CAN) Timer field
+// -------- CAN_TIMESTP : (CAN Offset: 0x1c) CAN Timestamp Register -------- 
+// -------- CAN_ECR : (CAN Offset: 0x20) CAN Error Counter Register -------- 
+#define AT91C_CAN_REC         ((unsigned int) 0xFF <<  0) // (CAN) Receive Error Counter
+#define AT91C_CAN_TEC         ((unsigned int) 0xFF << 16) // (CAN) Transmit Error Counter
+// -------- CAN_TCR : (CAN Offset: 0x24) CAN Transfer Command Register -------- 
+#define AT91C_CAN_TIMRST      ((unsigned int) 0x1 << 31) // (CAN) Timer Reset Field
+// -------- CAN_ACR : (CAN Offset: 0x28) CAN Abort Command Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Ethernet MAC 10/100
+// *****************************************************************************
+typedef struct _AT91S_EMAC {
+    AT91_REG     EMAC_NCR;     // Network Control Register
+    AT91_REG     EMAC_NCFGR;     // Network Configuration Register
+    AT91_REG     EMAC_NSR;     // Network Status Register
+    AT91_REG     Reserved0[2];     // 
+    AT91_REG     EMAC_TSR;     // Transmit Status Register
+    AT91_REG     EMAC_RBQP;     // Receive Buffer Queue Pointer
+    AT91_REG     EMAC_TBQP;     // Transmit Buffer Queue Pointer
+    AT91_REG     EMAC_RSR;     // Receive Status Register
+    AT91_REG     EMAC_ISR;     // Interrupt Status Register
+    AT91_REG     EMAC_IER;     // Interrupt Enable Register
+    AT91_REG     EMAC_IDR;     // Interrupt Disable Register
+    AT91_REG     EMAC_IMR;     // Interrupt Mask Register
+    AT91_REG     EMAC_MAN;     // PHY Maintenance Register
+    AT91_REG     EMAC_PTR;     // Pause Time Register
+    AT91_REG     EMAC_PFR;     // Pause Frames received Register
+    AT91_REG     EMAC_FTO;     // Frames Transmitted OK Register
+    AT91_REG     EMAC_SCF;     // Single Collision Frame Register
+    AT91_REG     EMAC_MCF;     // Multiple Collision Frame Register
+    AT91_REG     EMAC_FRO;     // Frames Received OK Register
+    AT91_REG     EMAC_FCSE;     // Frame Check Sequence Error Register
+    AT91_REG     EMAC_ALE;     // Alignment Error Register
+    AT91_REG     EMAC_DTF;     // Deferred Transmission Frame Register
+    AT91_REG     EMAC_LCOL;     // Late Collision Register
+    AT91_REG     EMAC_ECOL;     // Excessive Collision Register
+    AT91_REG     EMAC_TUND;     // Transmit Underrun Error Register
+    AT91_REG     EMAC_CSE;     // Carrier Sense Error Register
+    AT91_REG     EMAC_RRE;     // Receive Ressource Error Register
+    AT91_REG     EMAC_ROV;     // Receive Overrun Errors Register
+    AT91_REG     EMAC_RSE;     // Receive Symbol Errors Register
+    AT91_REG     EMAC_ELE;     // Excessive Length Errors Register
+    AT91_REG     EMAC_RJA;     // Receive Jabbers Register
+    AT91_REG     EMAC_USF;     // Undersize Frames Register
+    AT91_REG     EMAC_STE;     // SQE Test Error Register
+    AT91_REG     EMAC_RLE;     // Receive Length Field Mismatch Register
+    AT91_REG     EMAC_TPF;     // Transmitted Pause Frames Register
+    AT91_REG     EMAC_HRB;     // Hash Address Bottom[31:0]
+    AT91_REG     EMAC_HRT;     // Hash Address Top[63:32]
+    AT91_REG     EMAC_SA1L;     // Specific Address 1 Bottom, First 4 bytes
+    AT91_REG     EMAC_SA1H;     // Specific Address 1 Top, Last 2 bytes
+    AT91_REG     EMAC_SA2L;     // Specific Address 2 Bottom, First 4 bytes
+    AT91_REG     EMAC_SA2H;     // Specific Address 2 Top, Last 2 bytes
+    AT91_REG     EMAC_SA3L;     // Specific Address 3 Bottom, First 4 bytes
+    AT91_REG     EMAC_SA3H;     // Specific Address 3 Top, Last 2 bytes
+    AT91_REG     EMAC_SA4L;     // Specific Address 4 Bottom, First 4 bytes
+    AT91_REG     EMAC_SA4H;     // Specific Address 4 Top, Last 2 bytes
+    AT91_REG     EMAC_TID;     // Type ID Checking Register
+    AT91_REG     EMAC_TPQ;     // Transmit Pause Quantum Register
+    AT91_REG     EMAC_USRIO;     // USER Input/Output Register
+    AT91_REG     EMAC_WOL;     // Wake On LAN Register
+    AT91_REG     Reserved1[13];     // 
+    AT91_REG     EMAC_REV;     // Revision Register
+} AT91S_EMAC, *AT91PS_EMAC;
+
+// -------- EMAC_NCR : (EMAC Offset: 0x0)  -------- 
+#define AT91C_EMAC_LB         ((unsigned int) 0x1 <<  0) // (EMAC) Loopback. Optional. When set, loopback signal is at high level.
+#define AT91C_EMAC_LLB        ((unsigned int) 0x1 <<  1) // (EMAC) Loopback local. 
+#define AT91C_EMAC_RE         ((unsigned int) 0x1 <<  2) // (EMAC) Receive enable. 
+#define AT91C_EMAC_TE         ((unsigned int) 0x1 <<  3) // (EMAC) Transmit enable. 
+#define AT91C_EMAC_MPE        ((unsigned int) 0x1 <<  4) // (EMAC) Management port enable. 
+#define AT91C_EMAC_CLRSTAT    ((unsigned int) 0x1 <<  5) // (EMAC) Clear statistics registers. 
+#define AT91C_EMAC_INCSTAT    ((unsigned int) 0x1 <<  6) // (EMAC) Increment statistics registers. 
+#define AT91C_EMAC_WESTAT     ((unsigned int) 0x1 <<  7) // (EMAC) Write enable for statistics registers. 
+#define AT91C_EMAC_BP         ((unsigned int) 0x1 <<  8) // (EMAC) Back pressure. 
+#define AT91C_EMAC_TSTART     ((unsigned int) 0x1 <<  9) // (EMAC) Start Transmission. 
+#define AT91C_EMAC_THALT      ((unsigned int) 0x1 << 10) // (EMAC) Transmission Halt. 
+#define AT91C_EMAC_TPFR       ((unsigned int) 0x1 << 11) // (EMAC) Transmit pause frame 
+#define AT91C_EMAC_TZQ        ((unsigned int) 0x1 << 12) // (EMAC) Transmit zero quantum pause frame
+// -------- EMAC_NCFGR : (EMAC Offset: 0x4) Network Configuration Register -------- 
+#define AT91C_EMAC_SPD        ((unsigned int) 0x1 <<  0) // (EMAC) Speed. 
+#define AT91C_EMAC_FD         ((unsigned int) 0x1 <<  1) // (EMAC) Full duplex. 
+#define AT91C_EMAC_JFRAME     ((unsigned int) 0x1 <<  3) // (EMAC) Jumbo Frames. 
+#define AT91C_EMAC_CAF        ((unsigned int) 0x1 <<  4) // (EMAC) Copy all frames. 
+#define AT91C_EMAC_NBC        ((unsigned int) 0x1 <<  5) // (EMAC) No broadcast. 
+#define AT91C_EMAC_MTI        ((unsigned int) 0x1 <<  6) // (EMAC) Multicast hash event enable
+#define AT91C_EMAC_UNI        ((unsigned int) 0x1 <<  7) // (EMAC) Unicast hash enable. 
+#define AT91C_EMAC_BIG        ((unsigned int) 0x1 <<  8) // (EMAC) Receive 1522 bytes. 
+#define AT91C_EMAC_EAE        ((unsigned int) 0x1 <<  9) // (EMAC) External address match enable. 
+#define AT91C_EMAC_CLK        ((unsigned int) 0x3 << 10) // (EMAC) 
+#define     AT91C_EMAC_CLK_HCLK_8               ((unsigned int) 0x0 << 10) // (EMAC) HCLK divided by 8
+#define     AT91C_EMAC_CLK_HCLK_16              ((unsigned int) 0x1 << 10) // (EMAC) HCLK divided by 16
+#define     AT91C_EMAC_CLK_HCLK_32              ((unsigned int) 0x2 << 10) // (EMAC) HCLK divided by 32
+#define     AT91C_EMAC_CLK_HCLK_64              ((unsigned int) 0x3 << 10) // (EMAC) HCLK divided by 64
+#define AT91C_EMAC_RTY        ((unsigned int) 0x1 << 12) // (EMAC) 
+#define AT91C_EMAC_PAE        ((unsigned int) 0x1 << 13) // (EMAC) 
+#define AT91C_EMAC_RBOF       ((unsigned int) 0x3 << 14) // (EMAC) 
+#define     AT91C_EMAC_RBOF_OFFSET_0             ((unsigned int) 0x0 << 14) // (EMAC) no offset from start of receive buffer
+#define     AT91C_EMAC_RBOF_OFFSET_1             ((unsigned int) 0x1 << 14) // (EMAC) one byte offset from start of receive buffer
+#define     AT91C_EMAC_RBOF_OFFSET_2             ((unsigned int) 0x2 << 14) // (EMAC) two bytes offset from start of receive buffer
+#define     AT91C_EMAC_RBOF_OFFSET_3             ((unsigned int) 0x3 << 14) // (EMAC) three bytes offset from start of receive buffer
+#define AT91C_EMAC_RLCE       ((unsigned int) 0x1 << 16) // (EMAC) Receive Length field Checking Enable
+#define AT91C_EMAC_DRFCS      ((unsigned int) 0x1 << 17) // (EMAC) Discard Receive FCS
+#define AT91C_EMAC_EFRHD      ((unsigned int) 0x1 << 18) // (EMAC) 
+#define AT91C_EMAC_IRXFCS     ((unsigned int) 0x1 << 19) // (EMAC) Ignore RX FCS
+// -------- EMAC_NSR : (EMAC Offset: 0x8) Network Status Register -------- 
+#define AT91C_EMAC_LINKR      ((unsigned int) 0x1 <<  0) // (EMAC) 
+#define AT91C_EMAC_MDIO       ((unsigned int) 0x1 <<  1) // (EMAC) 
+#define AT91C_EMAC_IDLE       ((unsigned int) 0x1 <<  2) // (EMAC) 
+// -------- EMAC_TSR : (EMAC Offset: 0x14) Transmit Status Register -------- 
+#define AT91C_EMAC_UBR        ((unsigned int) 0x1 <<  0) // (EMAC) 
+#define AT91C_EMAC_COL        ((unsigned int) 0x1 <<  1) // (EMAC) 
+#define AT91C_EMAC_RLES       ((unsigned int) 0x1 <<  2) // (EMAC) 
+#define AT91C_EMAC_TGO        ((unsigned int) 0x1 <<  3) // (EMAC) Transmit Go
+#define AT91C_EMAC_BEX        ((unsigned int) 0x1 <<  4) // (EMAC) Buffers exhausted mid frame
+#define AT91C_EMAC_COMP       ((unsigned int) 0x1 <<  5) // (EMAC) 
+#define AT91C_EMAC_UND        ((unsigned int) 0x1 <<  6) // (EMAC) 
+// -------- EMAC_RSR : (EMAC Offset: 0x20) Receive Status Register -------- 
+#define AT91C_EMAC_BNA        ((unsigned int) 0x1 <<  0) // (EMAC) 
+#define AT91C_EMAC_REC        ((unsigned int) 0x1 <<  1) // (EMAC) 
+#define AT91C_EMAC_OVR        ((unsigned int) 0x1 <<  2) // (EMAC) 
+// -------- EMAC_ISR : (EMAC Offset: 0x24) Interrupt Status Register -------- 
+#define AT91C_EMAC_MFD        ((unsigned int) 0x1 <<  0) // (EMAC) 
+#define AT91C_EMAC_RCOMP      ((unsigned int) 0x1 <<  1) // (EMAC) 
+#define AT91C_EMAC_RXUBR      ((unsigned int) 0x1 <<  2) // (EMAC) 
+#define AT91C_EMAC_TXUBR      ((unsigned int) 0x1 <<  3) // (EMAC) 
+#define AT91C_EMAC_TUNDR      ((unsigned int) 0x1 <<  4) // (EMAC) 
+#define AT91C_EMAC_RLEX       ((unsigned int) 0x1 <<  5) // (EMAC) 
+#define AT91C_EMAC_TXERR      ((unsigned int) 0x1 <<  6) // (EMAC) 
+#define AT91C_EMAC_TCOMP      ((unsigned int) 0x1 <<  7) // (EMAC) 
+#define AT91C_EMAC_LINK       ((unsigned int) 0x1 <<  9) // (EMAC) 
+#define AT91C_EMAC_ROVR       ((unsigned int) 0x1 << 10) // (EMAC) 
+#define AT91C_EMAC_HRESP      ((unsigned int) 0x1 << 11) // (EMAC) 
+#define AT91C_EMAC_PFRE       ((unsigned int) 0x1 << 12) // (EMAC) 
+#define AT91C_EMAC_PTZ        ((unsigned int) 0x1 << 13) // (EMAC) 
+// -------- EMAC_IER : (EMAC Offset: 0x28) Interrupt Enable Register -------- 
+// -------- EMAC_IDR : (EMAC Offset: 0x2c) Interrupt Disable Register -------- 
+// -------- EMAC_IMR : (EMAC Offset: 0x30) Interrupt Mask Register -------- 
+// -------- EMAC_MAN : (EMAC Offset: 0x34) PHY Maintenance Register -------- 
+#define AT91C_EMAC_DATA       ((unsigned int) 0xFFFF <<  0) // (EMAC) 
+#define AT91C_EMAC_CODE       ((unsigned int) 0x3 << 16) // (EMAC) 
+#define AT91C_EMAC_REGA       ((unsigned int) 0x1F << 18) // (EMAC) 
+#define AT91C_EMAC_PHYA       ((unsigned int) 0x1F << 23) // (EMAC) 
+#define AT91C_EMAC_RW         ((unsigned int) 0x3 << 28) // (EMAC) 
+#define AT91C_EMAC_SOF        ((unsigned int) 0x3 << 30) // (EMAC) 
+// -------- EMAC_USRIO : (EMAC Offset: 0xc0) USER Input Output Register -------- 
+#define AT91C_EMAC_RMII       ((unsigned int) 0x1 <<  0) // (EMAC) Reduce MII
+#define AT91C_EMAC_CLKEN      ((unsigned int) 0x1 <<  1) // (EMAC) Clock Enable
+// -------- EMAC_WOL : (EMAC Offset: 0xc4) Wake On LAN Register -------- 
+#define AT91C_EMAC_IP         ((unsigned int) 0xFFFF <<  0) // (EMAC) ARP request IP address
+#define AT91C_EMAC_MAG        ((unsigned int) 0x1 << 16) // (EMAC) Magic packet event enable
+#define AT91C_EMAC_ARP        ((unsigned int) 0x1 << 17) // (EMAC) ARP request event enable
+#define AT91C_EMAC_SA1        ((unsigned int) 0x1 << 18) // (EMAC) Specific address register 1 event enable
+// -------- EMAC_REV : (EMAC Offset: 0xfc) Revision Register -------- 
+#define AT91C_EMAC_REVREF     ((unsigned int) 0xFFFF <<  0) // (EMAC) 
+#define AT91C_EMAC_PARTREF    ((unsigned int) 0xFFFF << 16) // (EMAC) 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Analog to Digital Convertor
+// *****************************************************************************
+typedef struct _AT91S_ADC {
+    AT91_REG     ADC_CR;     // ADC Control Register
+    AT91_REG     ADC_MR;     // ADC Mode Register
+    AT91_REG     Reserved0[2];     // 
+    AT91_REG     ADC_CHER;     // ADC Channel Enable Register
+    AT91_REG     ADC_CHDR;     // ADC Channel Disable Register
+    AT91_REG     ADC_CHSR;     // ADC Channel Status Register
+    AT91_REG     ADC_SR;     // ADC Status Register
+    AT91_REG     ADC_LCDR;     // ADC Last Converted Data Register
+    AT91_REG     ADC_IER;     // ADC Interrupt Enable Register
+    AT91_REG     ADC_IDR;     // ADC Interrupt Disable Register
+    AT91_REG     ADC_IMR;     // ADC Interrupt Mask Register
+    AT91_REG     ADC_CDR0;     // ADC Channel Data Register 0
+    AT91_REG     ADC_CDR1;     // ADC Channel Data Register 1
+    AT91_REG     ADC_CDR2;     // ADC Channel Data Register 2
+    AT91_REG     ADC_CDR3;     // ADC Channel Data Register 3
+    AT91_REG     ADC_CDR4;     // ADC Channel Data Register 4
+    AT91_REG     ADC_CDR5;     // ADC Channel Data Register 5
+    AT91_REG     ADC_CDR6;     // ADC Channel Data Register 6
+    AT91_REG     ADC_CDR7;     // ADC Channel Data Register 7
+    AT91_REG     Reserved1[44];     // 
+    AT91_REG     ADC_RPR;     // Receive Pointer Register
+    AT91_REG     ADC_RCR;     // Receive Counter Register
+    AT91_REG     ADC_TPR;     // Transmit Pointer Register
+    AT91_REG     ADC_TCR;     // Transmit Counter Register
+    AT91_REG     ADC_RNPR;     // Receive Next Pointer Register
+    AT91_REG     ADC_RNCR;     // Receive Next Counter Register
+    AT91_REG     ADC_TNPR;     // Transmit Next Pointer Register
+    AT91_REG     ADC_TNCR;     // Transmit Next Counter Register
+    AT91_REG     ADC_PTCR;     // PDC Transfer Control Register
+    AT91_REG     ADC_PTSR;     // PDC Transfer Status Register
+} AT91S_ADC, *AT91PS_ADC;
+
+// -------- ADC_CR : (ADC Offset: 0x0) ADC Control Register -------- 
+#define AT91C_ADC_SWRST       ((unsigned int) 0x1 <<  0) // (ADC) Software Reset
+#define AT91C_ADC_START       ((unsigned int) 0x1 <<  1) // (ADC) Start Conversion
+// -------- ADC_MR : (ADC Offset: 0x4) ADC Mode Register -------- 
+#define AT91C_ADC_TRGEN       ((unsigned int) 0x1 <<  0) // (ADC) Trigger Enable
+#define     AT91C_ADC_TRGEN_DIS                  ((unsigned int) 0x0) // (ADC) Hradware triggers are disabled. Starting a conversion is only possible by software
+#define     AT91C_ADC_TRGEN_EN                   ((unsigned int) 0x1) // (ADC) Hardware trigger selected by TRGSEL field is enabled.
+#define AT91C_ADC_TRGSEL      ((unsigned int) 0x7 <<  1) // (ADC) Trigger Selection
+#define     AT91C_ADC_TRGSEL_TIOA0                ((unsigned int) 0x0 <<  1) // (ADC) Selected TRGSEL = TIAO0
+#define     AT91C_ADC_TRGSEL_TIOA1                ((unsigned int) 0x1 <<  1) // (ADC) Selected TRGSEL = TIAO1
+#define     AT91C_ADC_TRGSEL_TIOA2                ((unsigned int) 0x2 <<  1) // (ADC) Selected TRGSEL = TIAO2
+#define     AT91C_ADC_TRGSEL_TIOA3                ((unsigned int) 0x3 <<  1) // (ADC) Selected TRGSEL = TIAO3
+#define     AT91C_ADC_TRGSEL_TIOA4                ((unsigned int) 0x4 <<  1) // (ADC) Selected TRGSEL = TIAO4
+#define     AT91C_ADC_TRGSEL_TIOA5                ((unsigned int) 0x5 <<  1) // (ADC) Selected TRGSEL = TIAO5
+#define     AT91C_ADC_TRGSEL_EXT                  ((unsigned int) 0x6 <<  1) // (ADC) Selected TRGSEL = External Trigger
+#define AT91C_ADC_LOWRES      ((unsigned int) 0x1 <<  4) // (ADC) Resolution.
+#define     AT91C_ADC_LOWRES_10_BIT               ((unsigned int) 0x0 <<  4) // (ADC) 10-bit resolution
+#define     AT91C_ADC_LOWRES_8_BIT                ((unsigned int) 0x1 <<  4) // (ADC) 8-bit resolution
+#define AT91C_ADC_SLEEP       ((unsigned int) 0x1 <<  5) // (ADC) Sleep Mode
+#define     AT91C_ADC_SLEEP_NORMAL_MODE          ((unsigned int) 0x0 <<  5) // (ADC) Normal Mode
+#define     AT91C_ADC_SLEEP_MODE                 ((unsigned int) 0x1 <<  5) // (ADC) Sleep Mode
+#define AT91C_ADC_PRESCAL     ((unsigned int) 0x3F <<  8) // (ADC) Prescaler rate selection
+#define AT91C_ADC_STARTUP     ((unsigned int) 0x1F << 16) // (ADC) Startup Time
+#define AT91C_ADC_SHTIM       ((unsigned int) 0xF << 24) // (ADC) Sample & Hold Time
+// --------     ADC_CHER : (ADC Offset: 0x10) ADC Channel Enable Register -------- 
+#define AT91C_ADC_CH0         ((unsigned int) 0x1 <<  0) // (ADC) Channel 0
+#define AT91C_ADC_CH1         ((unsigned int) 0x1 <<  1) // (ADC) Channel 1
+#define AT91C_ADC_CH2         ((unsigned int) 0x1 <<  2) // (ADC) Channel 2
+#define AT91C_ADC_CH3         ((unsigned int) 0x1 <<  3) // (ADC) Channel 3
+#define AT91C_ADC_CH4         ((unsigned int) 0x1 <<  4) // (ADC) Channel 4
+#define AT91C_ADC_CH5         ((unsigned int) 0x1 <<  5) // (ADC) Channel 5
+#define AT91C_ADC_CH6         ((unsigned int) 0x1 <<  6) // (ADC) Channel 6
+#define AT91C_ADC_CH7         ((unsigned int) 0x1 <<  7) // (ADC) Channel 7
+// --------     ADC_CHDR : (ADC Offset: 0x14) ADC Channel Disable Register -------- 
+// --------     ADC_CHSR : (ADC Offset: 0x18) ADC Channel Status Register -------- 
+// -------- ADC_SR : (ADC Offset: 0x1c) ADC Status Register -------- 
+#define AT91C_ADC_EOC0        ((unsigned int) 0x1 <<  0) // (ADC) End of Conversion
+#define AT91C_ADC_EOC1        ((unsigned int) 0x1 <<  1) // (ADC) End of Conversion
+#define AT91C_ADC_EOC2        ((unsigned int) 0x1 <<  2) // (ADC) End of Conversion
+#define AT91C_ADC_EOC3        ((unsigned int) 0x1 <<  3) // (ADC) End of Conversion
+#define AT91C_ADC_EOC4        ((unsigned int) 0x1 <<  4) // (ADC) End of Conversion
+#define AT91C_ADC_EOC5        ((unsigned int) 0x1 <<  5) // (ADC) End of Conversion
+#define AT91C_ADC_EOC6        ((unsigned int) 0x1 <<  6) // (ADC) End of Conversion
+#define AT91C_ADC_EOC7        ((unsigned int) 0x1 <<  7) // (ADC) End of Conversion
+#define AT91C_ADC_OVRE0       ((unsigned int) 0x1 <<  8) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE1       ((unsigned int) 0x1 <<  9) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE2       ((unsigned int) 0x1 << 10) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE3       ((unsigned int) 0x1 << 11) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE4       ((unsigned int) 0x1 << 12) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE5       ((unsigned int) 0x1 << 13) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE6       ((unsigned int) 0x1 << 14) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE7       ((unsigned int) 0x1 << 15) // (ADC) Overrun Error
+#define AT91C_ADC_DRDY        ((unsigned int) 0x1 << 16) // (ADC) Data Ready
+#define AT91C_ADC_GOVRE       ((unsigned int) 0x1 << 17) // (ADC) General Overrun
+#define AT91C_ADC_ENDRX       ((unsigned int) 0x1 << 18) // (ADC) End of Receiver Transfer
+#define AT91C_ADC_RXBUFF      ((unsigned int) 0x1 << 19) // (ADC) RXBUFF Interrupt
+// -------- ADC_LCDR : (ADC Offset: 0x20) ADC Last Converted Data Register -------- 
+#define AT91C_ADC_LDATA       ((unsigned int) 0x3FF <<  0) // (ADC) Last Data Converted
+// -------- ADC_IER : (ADC Offset: 0x24) ADC Interrupt Enable Register -------- 
+// -------- ADC_IDR : (ADC Offset: 0x28) ADC Interrupt Disable Register -------- 
+// -------- ADC_IMR : (ADC Offset: 0x2c) ADC Interrupt Mask Register -------- 
+// -------- ADC_CDR0 : (ADC Offset: 0x30) ADC Channel Data Register 0 -------- 
+#define AT91C_ADC_DATA        ((unsigned int) 0x3FF <<  0) // (ADC) Converted Data
+// -------- ADC_CDR1 : (ADC Offset: 0x34) ADC Channel Data Register 1 -------- 
+// -------- ADC_CDR2 : (ADC Offset: 0x38) ADC Channel Data Register 2 -------- 
+// -------- ADC_CDR3 : (ADC Offset: 0x3c) ADC Channel Data Register 3 -------- 
+// -------- ADC_CDR4 : (ADC Offset: 0x40) ADC Channel Data Register 4 -------- 
+// -------- ADC_CDR5 : (ADC Offset: 0x44) ADC Channel Data Register 5 -------- 
+// -------- ADC_CDR6 : (ADC Offset: 0x48) ADC Channel Data Register 6 -------- 
+// -------- ADC_CDR7 : (ADC Offset: 0x4c) ADC Channel Data Register 7 -------- 
+
+// *****************************************************************************
+//               REGISTER ADDRESS DEFINITION FOR AT91SAM7X256
+// *****************************************************************************
+// ========== Register definition for SYS peripheral ========== 
+// ========== Register definition for AIC peripheral ========== 
+#define AT91C_AIC_ICCR  ((AT91_REG *)     0xFFFFF128) // (AIC) Interrupt Clear Command Register
+#define AT91C_AIC_IECR  ((AT91_REG *)     0xFFFFF120) // (AIC) Interrupt Enable Command Register
+#define AT91C_AIC_SMR   ((AT91_REG *)     0xFFFFF000) // (AIC) Source Mode Register
+#define AT91C_AIC_ISCR  ((AT91_REG *)     0xFFFFF12C) // (AIC) Interrupt Set Command Register
+#define AT91C_AIC_EOICR ((AT91_REG *)     0xFFFFF130) // (AIC) End of Interrupt Command Register
+#define AT91C_AIC_DCR   ((AT91_REG *)     0xFFFFF138) // (AIC) Debug Control Register (Protect)
+#define AT91C_AIC_FFER  ((AT91_REG *)     0xFFFFF140) // (AIC) Fast Forcing Enable Register
+#define AT91C_AIC_SVR   ((AT91_REG *)     0xFFFFF080) // (AIC) Source Vector Register
+#define AT91C_AIC_SPU   ((AT91_REG *)     0xFFFFF134) // (AIC) Spurious Vector Register
+#define AT91C_AIC_FFDR  ((AT91_REG *)     0xFFFFF144) // (AIC) Fast Forcing Disable Register
+#define AT91C_AIC_FVR   ((AT91_REG *)     0xFFFFF104) // (AIC) FIQ Vector Register
+#define AT91C_AIC_FFSR  ((AT91_REG *)     0xFFFFF148) // (AIC) Fast Forcing Status Register
+#define AT91C_AIC_IMR   ((AT91_REG *)     0xFFFFF110) // (AIC) Interrupt Mask Register
+#define AT91C_AIC_ISR   ((AT91_REG *)     0xFFFFF108) // (AIC) Interrupt Status Register
+#define AT91C_AIC_IVR   ((AT91_REG *)     0xFFFFF100) // (AIC) IRQ Vector Register
+#define AT91C_AIC_IDCR  ((AT91_REG *)     0xFFFFF124) // (AIC) Interrupt Disable Command Register
+#define AT91C_AIC_CISR  ((AT91_REG *)     0xFFFFF114) // (AIC) Core Interrupt Status Register
+#define AT91C_AIC_IPR   ((AT91_REG *)     0xFFFFF10C) // (AIC) Interrupt Pending Register
+// ========== Register definition for PDC_DBGU peripheral ========== 
+#define AT91C_DBGU_TNCR ((AT91_REG *)     0xFFFFF31C) // (PDC_DBGU) Transmit Next Counter Register
+#define AT91C_DBGU_RNCR ((AT91_REG *)     0xFFFFF314) // (PDC_DBGU) Receive Next Counter Register
+#define AT91C_DBGU_PTCR ((AT91_REG *)     0xFFFFF320) // (PDC_DBGU) PDC Transfer Control Register
+#define AT91C_DBGU_PTSR ((AT91_REG *)     0xFFFFF324) // (PDC_DBGU) PDC Transfer Status Register
+#define AT91C_DBGU_RCR  ((AT91_REG *)     0xFFFFF304) // (PDC_DBGU) Receive Counter Register
+#define AT91C_DBGU_TCR  ((AT91_REG *)     0xFFFFF30C) // (PDC_DBGU) Transmit Counter Register
+#define AT91C_DBGU_RPR  ((AT91_REG *)     0xFFFFF300) // (PDC_DBGU) Receive Pointer Register
+#define AT91C_DBGU_TPR  ((AT91_REG *)     0xFFFFF308) // (PDC_DBGU) Transmit Pointer Register
+#define AT91C_DBGU_RNPR ((AT91_REG *)     0xFFFFF310) // (PDC_DBGU) Receive Next Pointer Register
+#define AT91C_DBGU_TNPR ((AT91_REG *)     0xFFFFF318) // (PDC_DBGU) Transmit Next Pointer Register
+// ========== Register definition for DBGU peripheral ========== 
+#define AT91C_DBGU_EXID ((AT91_REG *)     0xFFFFF244) // (DBGU) Chip ID Extension Register
+#define AT91C_DBGU_THR  ((AT91_REG *)     0xFFFFF21C) // (DBGU) Transmitter Holding Register
+#define AT91C_DBGU_CSR  ((AT91_REG *)     0xFFFFF214) // (DBGU) Channel Status Register
+#define AT91C_DBGU_IDR  ((AT91_REG *)     0xFFFFF20C) // (DBGU) Interrupt Disable Register
+#define AT91C_DBGU_MR   ((AT91_REG *)     0xFFFFF204) // (DBGU) Mode Register
+#define AT91C_DBGU_FNTR ((AT91_REG *)     0xFFFFF248) // (DBGU) Force NTRST Register
+#define AT91C_DBGU_CIDR ((AT91_REG *)     0xFFFFF240) // (DBGU) Chip ID Register
+#define AT91C_DBGU_BRGR ((AT91_REG *)     0xFFFFF220) // (DBGU) Baud Rate Generator Register
+#define AT91C_DBGU_RHR  ((AT91_REG *)     0xFFFFF218) // (DBGU) Receiver Holding Register
+#define AT91C_DBGU_IMR  ((AT91_REG *)     0xFFFFF210) // (DBGU) Interrupt Mask Register
+#define AT91C_DBGU_IER  ((AT91_REG *)     0xFFFFF208) // (DBGU) Interrupt Enable Register
+#define AT91C_DBGU_CR   ((AT91_REG *)     0xFFFFF200) // (DBGU) Control Register
+// ========== Register definition for PIOA peripheral ========== 
+#define AT91C_PIOA_IMR  ((AT91_REG *)     0xFFFFF448) // (PIOA) Interrupt Mask Register
+#define AT91C_PIOA_IER  ((AT91_REG *)     0xFFFFF440) // (PIOA) Interrupt Enable Register
+#define AT91C_PIOA_OWDR ((AT91_REG *)     0xFFFFF4A4) // (PIOA) Output Write Disable Register
+#define AT91C_PIOA_ISR  ((AT91_REG *)     0xFFFFF44C) // (PIOA) Interrupt Status Register
+#define AT91C_PIOA_PPUDR ((AT91_REG *)     0xFFFFF460) // (PIOA) Pull-up Disable Register
+#define AT91C_PIOA_MDSR ((AT91_REG *)     0xFFFFF458) // (PIOA) Multi-driver Status Register
+#define AT91C_PIOA_MDER ((AT91_REG *)     0xFFFFF450) // (PIOA) Multi-driver Enable Register
+#define AT91C_PIOA_PER  ((AT91_REG *)     0xFFFFF400) // (PIOA) PIO Enable Register
+#define AT91C_PIOA_PSR  ((AT91_REG *)     0xFFFFF408) // (PIOA) PIO Status Register
+#define AT91C_PIOA_OER  ((AT91_REG *)     0xFFFFF410) // (PIOA) Output Enable Register
+#define AT91C_PIOA_BSR  ((AT91_REG *)     0xFFFFF474) // (PIOA) Select B Register
+#define AT91C_PIOA_PPUER ((AT91_REG *)     0xFFFFF464) // (PIOA) Pull-up Enable Register
+#define AT91C_PIOA_MDDR ((AT91_REG *)     0xFFFFF454) // (PIOA) Multi-driver Disable Register
+#define AT91C_PIOA_PDR  ((AT91_REG *)     0xFFFFF404) // (PIOA) PIO Disable Register
+#define AT91C_PIOA_ODR  ((AT91_REG *)     0xFFFFF414) // (PIOA) Output Disable Registerr
+#define AT91C_PIOA_IFDR ((AT91_REG *)     0xFFFFF424) // (PIOA) Input Filter Disable Register
+#define AT91C_PIOA_ABSR ((AT91_REG *)     0xFFFFF478) // (PIOA) AB Select Status Register
+#define AT91C_PIOA_ASR  ((AT91_REG *)     0xFFFFF470) // (PIOA) Select A Register
+#define AT91C_PIOA_PPUSR ((AT91_REG *)     0xFFFFF468) // (PIOA) Pull-up Status Register
+#define AT91C_PIOA_ODSR ((AT91_REG *)     0xFFFFF438) // (PIOA) Output Data Status Register
+#define AT91C_PIOA_SODR ((AT91_REG *)     0xFFFFF430) // (PIOA) Set Output Data Register
+#define AT91C_PIOA_IFSR ((AT91_REG *)     0xFFFFF428) // (PIOA) Input Filter Status Register
+#define AT91C_PIOA_IFER ((AT91_REG *)     0xFFFFF420) // (PIOA) Input Filter Enable Register
+#define AT91C_PIOA_OSR  ((AT91_REG *)     0xFFFFF418) // (PIOA) Output Status Register
+#define AT91C_PIOA_IDR  ((AT91_REG *)     0xFFFFF444) // (PIOA) Interrupt Disable Register
+#define AT91C_PIOA_PDSR ((AT91_REG *)     0xFFFFF43C) // (PIOA) Pin Data Status Register
+#define AT91C_PIOA_CODR ((AT91_REG *)     0xFFFFF434) // (PIOA) Clear Output Data Register
+#define AT91C_PIOA_OWSR ((AT91_REG *)     0xFFFFF4A8) // (PIOA) Output Write Status Register
+#define AT91C_PIOA_OWER ((AT91_REG *)     0xFFFFF4A0) // (PIOA) Output Write Enable Register
+// ========== Register definition for PIOB peripheral ========== 
+#define AT91C_PIOB_OWSR ((AT91_REG *)     0xFFFFF6A8) // (PIOB) Output Write Status Register
+#define AT91C_PIOB_PPUSR ((AT91_REG *)     0xFFFFF668) // (PIOB) Pull-up Status Register
+#define AT91C_PIOB_PPUDR ((AT91_REG *)     0xFFFFF660) // (PIOB) Pull-up Disable Register
+#define AT91C_PIOB_MDSR ((AT91_REG *)     0xFFFFF658) // (PIOB) Multi-driver Status Register
+#define AT91C_PIOB_MDER ((AT91_REG *)     0xFFFFF650) // (PIOB) Multi-driver Enable Register
+#define AT91C_PIOB_IMR  ((AT91_REG *)     0xFFFFF648) // (PIOB) Interrupt Mask Register
+#define AT91C_PIOB_OSR  ((AT91_REG *)     0xFFFFF618) // (PIOB) Output Status Register
+#define AT91C_PIOB_OER  ((AT91_REG *)     0xFFFFF610) // (PIOB) Output Enable Register
+#define AT91C_PIOB_PSR  ((AT91_REG *)     0xFFFFF608) // (PIOB) PIO Status Register
+#define AT91C_PIOB_PER  ((AT91_REG *)     0xFFFFF600) // (PIOB) PIO Enable Register
+#define AT91C_PIOB_BSR  ((AT91_REG *)     0xFFFFF674) // (PIOB) Select B Register
+#define AT91C_PIOB_PPUER ((AT91_REG *)     0xFFFFF664) // (PIOB) Pull-up Enable Register
+#define AT91C_PIOB_IFDR ((AT91_REG *)     0xFFFFF624) // (PIOB) Input Filter Disable Register
+#define AT91C_PIOB_ODR  ((AT91_REG *)     0xFFFFF614) // (PIOB) Output Disable Registerr
+#define AT91C_PIOB_ABSR ((AT91_REG *)     0xFFFFF678) // (PIOB) AB Select Status Register
+#define AT91C_PIOB_ASR  ((AT91_REG *)     0xFFFFF670) // (PIOB) Select A Register
+#define AT91C_PIOB_IFER ((AT91_REG *)     0xFFFFF620) // (PIOB) Input Filter Enable Register
+#define AT91C_PIOB_IFSR ((AT91_REG *)     0xFFFFF628) // (PIOB) Input Filter Status Register
+#define AT91C_PIOB_SODR ((AT91_REG *)     0xFFFFF630) // (PIOB) Set Output Data Register
+#define AT91C_PIOB_ODSR ((AT91_REG *)     0xFFFFF638) // (PIOB) Output Data Status Register
+#define AT91C_PIOB_CODR ((AT91_REG *)     0xFFFFF634) // (PIOB) Clear Output Data Register
+#define AT91C_PIOB_PDSR ((AT91_REG *)     0xFFFFF63C) // (PIOB) Pin Data Status Register
+#define AT91C_PIOB_OWER ((AT91_REG *)     0xFFFFF6A0) // (PIOB) Output Write Enable Register
+#define AT91C_PIOB_IER  ((AT91_REG *)     0xFFFFF640) // (PIOB) Interrupt Enable Register
+#define AT91C_PIOB_OWDR ((AT91_REG *)     0xFFFFF6A4) // (PIOB) Output Write Disable Register
+#define AT91C_PIOB_MDDR ((AT91_REG *)     0xFFFFF654) // (PIOB) Multi-driver Disable Register
+#define AT91C_PIOB_ISR  ((AT91_REG *)     0xFFFFF64C) // (PIOB) Interrupt Status Register
+#define AT91C_PIOB_IDR  ((AT91_REG *)     0xFFFFF644) // (PIOB) Interrupt Disable Register
+#define AT91C_PIOB_PDR  ((AT91_REG *)     0xFFFFF604) // (PIOB) PIO Disable Register
+// ========== Register definition for CKGR peripheral ========== 
+#define AT91C_CKGR_PLLR ((AT91_REG *)     0xFFFFFC2C) // (CKGR) PLL Register
+#define AT91C_CKGR_MCFR ((AT91_REG *)     0xFFFFFC24) // (CKGR) Main Clock  Frequency Register
+#define AT91C_CKGR_MOR  ((AT91_REG *)     0xFFFFFC20) // (CKGR) Main Oscillator Register
+// ========== Register definition for PMC peripheral ========== 
+#define AT91C_PMC_SCSR  ((AT91_REG *)     0xFFFFFC08) // (PMC) System Clock Status Register
+#define AT91C_PMC_SCER  ((AT91_REG *)     0xFFFFFC00) // (PMC) System Clock Enable Register
+#define AT91C_PMC_IMR   ((AT91_REG *)     0xFFFFFC6C) // (PMC) Interrupt Mask Register
+#define AT91C_PMC_IDR   ((AT91_REG *)     0xFFFFFC64) // (PMC) Interrupt Disable Register
+#define AT91C_PMC_PCDR  ((AT91_REG *)     0xFFFFFC14) // (PMC) Peripheral Clock Disable Register
+#define AT91C_PMC_SCDR  ((AT91_REG *)     0xFFFFFC04) // (PMC) System Clock Disable Register
+#define AT91C_PMC_SR    ((AT91_REG *)     0xFFFFFC68) // (PMC) Status Register
+#define AT91C_PMC_IER   ((AT91_REG *)     0xFFFFFC60) // (PMC) Interrupt Enable Register
+#define AT91C_PMC_MCKR  ((AT91_REG *)     0xFFFFFC30) // (PMC) Master Clock Register
+#define AT91C_PMC_MOR   ((AT91_REG *)     0xFFFFFC20) // (PMC) Main Oscillator Register
+#define AT91C_PMC_PCER  ((AT91_REG *)     0xFFFFFC10) // (PMC) Peripheral Clock Enable Register
+#define AT91C_PMC_PCSR  ((AT91_REG *)     0xFFFFFC18) // (PMC) Peripheral Clock Status Register
+#define AT91C_PMC_PLLR  ((AT91_REG *)     0xFFFFFC2C) // (PMC) PLL Register
+#define AT91C_PMC_MCFR  ((AT91_REG *)     0xFFFFFC24) // (PMC) Main Clock  Frequency Register
+#define AT91C_PMC_PCKR  ((AT91_REG *)     0xFFFFFC40) // (PMC) Programmable Clock Register
+// ========== Register definition for RSTC peripheral ========== 
+#define AT91C_RSTC_RSR  ((AT91_REG *)     0xFFFFFD04) // (RSTC) Reset Status Register
+#define AT91C_RSTC_RMR  ((AT91_REG *)     0xFFFFFD08) // (RSTC) Reset Mode Register
+#define AT91C_RSTC_RCR  ((AT91_REG *)     0xFFFFFD00) // (RSTC) Reset Control Register
+// ========== Register definition for RTTC peripheral ========== 
+#define AT91C_RTTC_RTSR ((AT91_REG *)     0xFFFFFD2C) // (RTTC) Real-time Status Register
+#define AT91C_RTTC_RTAR ((AT91_REG *)     0xFFFFFD24) // (RTTC) Real-time Alarm Register
+#define AT91C_RTTC_RTVR ((AT91_REG *)     0xFFFFFD28) // (RTTC) Real-time Value Register
+#define AT91C_RTTC_RTMR ((AT91_REG *)     0xFFFFFD20) // (RTTC) Real-time Mode Register
+// ========== Register definition for PITC peripheral ========== 
+#define AT91C_PITC_PIIR ((AT91_REG *)     0xFFFFFD3C) // (PITC) Period Interval Image Register
+#define AT91C_PITC_PISR ((AT91_REG *)     0xFFFFFD34) // (PITC) Period Interval Status Register
+#define AT91C_PITC_PIVR ((AT91_REG *)     0xFFFFFD38) // (PITC) Period Interval Value Register
+#define AT91C_PITC_PIMR ((AT91_REG *)     0xFFFFFD30) // (PITC) Period Interval Mode Register
+// ========== Register definition for WDTC peripheral ========== 
+#define AT91C_WDTC_WDMR ((AT91_REG *)     0xFFFFFD44) // (WDTC) Watchdog Mode Register
+#define AT91C_WDTC_WDSR ((AT91_REG *)     0xFFFFFD48) // (WDTC) Watchdog Status Register
+#define AT91C_WDTC_WDCR ((AT91_REG *)     0xFFFFFD40) // (WDTC) Watchdog Control Register
+// ========== Register definition for VREG peripheral ========== 
+#define AT91C_VREG_MR   ((AT91_REG *)     0xFFFFFD60) // (VREG) Voltage Regulator Mode Register
+// ========== Register definition for MC peripheral ========== 
+#define AT91C_MC_FCR    ((AT91_REG *)     0xFFFFFF64) // (MC) MC Flash Command Register
+#define AT91C_MC_ASR    ((AT91_REG *)     0xFFFFFF04) // (MC) MC Abort Status Register
+#define AT91C_MC_FSR    ((AT91_REG *)     0xFFFFFF68) // (MC) MC Flash Status Register
+#define AT91C_MC_FMR    ((AT91_REG *)     0xFFFFFF60) // (MC) MC Flash Mode Register
+#define AT91C_MC_AASR   ((AT91_REG *)     0xFFFFFF08) // (MC) MC Abort Address Status Register
+#define AT91C_MC_RCR    ((AT91_REG *)     0xFFFFFF00) // (MC) MC Remap Control Register
+// ========== Register definition for PDC_SPI1 peripheral ========== 
+#define AT91C_SPI1_RNPR ((AT91_REG *)     0xFFFE4110) // (PDC_SPI1) Receive Next Pointer Register
+#define AT91C_SPI1_TPR  ((AT91_REG *)     0xFFFE4108) // (PDC_SPI1) Transmit Pointer Register
+#define AT91C_SPI1_RPR  ((AT91_REG *)     0xFFFE4100) // (PDC_SPI1) Receive Pointer Register
+#define AT91C_SPI1_PTSR ((AT91_REG *)     0xFFFE4124) // (PDC_SPI1) PDC Transfer Status Register
+#define AT91C_SPI1_RCR  ((AT91_REG *)     0xFFFE4104) // (PDC_SPI1) Receive Counter Register
+#define AT91C_SPI1_TCR  ((AT91_REG *)     0xFFFE410C) // (PDC_SPI1) Transmit Counter Register
+#define AT91C_SPI1_RNCR ((AT91_REG *)     0xFFFE4114) // (PDC_SPI1) Receive Next Counter Register
+#define AT91C_SPI1_TNCR ((AT91_REG *)     0xFFFE411C) // (PDC_SPI1) Transmit Next Counter Register
+#define AT91C_SPI1_TNPR ((AT91_REG *)     0xFFFE4118) // (PDC_SPI1) Transmit Next Pointer Register
+#define AT91C_SPI1_PTCR ((AT91_REG *)     0xFFFE4120) // (PDC_SPI1) PDC Transfer Control Register
+// ========== Register definition for SPI1 peripheral ========== 
+#define AT91C_SPI1_CSR  ((AT91_REG *)     0xFFFE4030) // (SPI1) Chip Select Register
+#define AT91C_SPI1_IDR  ((AT91_REG *)     0xFFFE4018) // (SPI1) Interrupt Disable Register
+#define AT91C_SPI1_SR   ((AT91_REG *)     0xFFFE4010) // (SPI1) Status Register
+#define AT91C_SPI1_RDR  ((AT91_REG *)     0xFFFE4008) // (SPI1) Receive Data Register
+#define AT91C_SPI1_CR   ((AT91_REG *)     0xFFFE4000) // (SPI1) Control Register
+#define AT91C_SPI1_IMR  ((AT91_REG *)     0xFFFE401C) // (SPI1) Interrupt Mask Register
+#define AT91C_SPI1_IER  ((AT91_REG *)     0xFFFE4014) // (SPI1) Interrupt Enable Register
+#define AT91C_SPI1_TDR  ((AT91_REG *)     0xFFFE400C) // (SPI1) Transmit Data Register
+#define AT91C_SPI1_MR   ((AT91_REG *)     0xFFFE4004) // (SPI1) Mode Register
+// ========== Register definition for PDC_SPI0 peripheral ========== 
+#define AT91C_SPI0_PTCR ((AT91_REG *)     0xFFFE0120) // (PDC_SPI0) PDC Transfer Control Register
+#define AT91C_SPI0_TNPR ((AT91_REG *)     0xFFFE0118) // (PDC_SPI0) Transmit Next Pointer Register
+#define AT91C_SPI0_RNPR ((AT91_REG *)     0xFFFE0110) // (PDC_SPI0) Receive Next Pointer Register
+#define AT91C_SPI0_TPR  ((AT91_REG *)     0xFFFE0108) // (PDC_SPI0) Transmit Pointer Register
+#define AT91C_SPI0_RPR  ((AT91_REG *)     0xFFFE0100) // (PDC_SPI0) Receive Pointer Register
+#define AT91C_SPI0_PTSR ((AT91_REG *)     0xFFFE0124) // (PDC_SPI0) PDC Transfer Status Register
+#define AT91C_SPI0_TNCR ((AT91_REG *)     0xFFFE011C) // (PDC_SPI0) Transmit Next Counter Register
+#define AT91C_SPI0_RNCR ((AT91_REG *)     0xFFFE0114) // (PDC_SPI0) Receive Next Counter Register
+#define AT91C_SPI0_TCR  ((AT91_REG *)     0xFFFE010C) // (PDC_SPI0) Transmit Counter Register
+#define AT91C_SPI0_RCR  ((AT91_REG *)     0xFFFE0104) // (PDC_SPI0) Receive Counter Register
+// ========== Register definition for SPI0 peripheral ========== 
+#define AT91C_SPI0_CSR  ((AT91_REG *)     0xFFFE0030) // (SPI0) Chip Select Register
+#define AT91C_SPI0_IDR  ((AT91_REG *)     0xFFFE0018) // (SPI0) Interrupt Disable Register
+#define AT91C_SPI0_SR   ((AT91_REG *)     0xFFFE0010) // (SPI0) Status Register
+#define AT91C_SPI0_RDR  ((AT91_REG *)     0xFFFE0008) // (SPI0) Receive Data Register
+#define AT91C_SPI0_CR   ((AT91_REG *)     0xFFFE0000) // (SPI0) Control Register
+#define AT91C_SPI0_IMR  ((AT91_REG *)     0xFFFE001C) // (SPI0) Interrupt Mask Register
+#define AT91C_SPI0_IER  ((AT91_REG *)     0xFFFE0014) // (SPI0) Interrupt Enable Register
+#define AT91C_SPI0_TDR  ((AT91_REG *)     0xFFFE000C) // (SPI0) Transmit Data Register
+#define AT91C_SPI0_MR   ((AT91_REG *)     0xFFFE0004) // (SPI0) Mode Register
+// ========== Register definition for PDC_US1 peripheral ========== 
+#define AT91C_US1_PTSR  ((AT91_REG *)     0xFFFC4124) // (PDC_US1) PDC Transfer Status Register
+#define AT91C_US1_TNCR  ((AT91_REG *)     0xFFFC411C) // (PDC_US1) Transmit Next Counter Register
+#define AT91C_US1_RNCR  ((AT91_REG *)     0xFFFC4114) // (PDC_US1) Receive Next Counter Register
+#define AT91C_US1_TCR   ((AT91_REG *)     0xFFFC410C) // (PDC_US1) Transmit Counter Register
+#define AT91C_US1_RCR   ((AT91_REG *)     0xFFFC4104) // (PDC_US1) Receive Counter Register
+#define AT91C_US1_PTCR  ((AT91_REG *)     0xFFFC4120) // (PDC_US1) PDC Transfer Control Register
+#define AT91C_US1_TNPR  ((AT91_REG *)     0xFFFC4118) // (PDC_US1) Transmit Next Pointer Register
+#define AT91C_US1_RNPR  ((AT91_REG *)     0xFFFC4110) // (PDC_US1) Receive Next Pointer Register
+#define AT91C_US1_TPR   ((AT91_REG *)     0xFFFC4108) // (PDC_US1) Transmit Pointer Register
+#define AT91C_US1_RPR   ((AT91_REG *)     0xFFFC4100) // (PDC_US1) Receive Pointer Register
+// ========== Register definition for US1 peripheral ========== 
+#define AT91C_US1_RHR   ((AT91_REG *)     0xFFFC4018) // (US1) Receiver Holding Register
+#define AT91C_US1_IMR   ((AT91_REG *)     0xFFFC4010) // (US1) Interrupt Mask Register
+#define AT91C_US1_IER   ((AT91_REG *)     0xFFFC4008) // (US1) Interrupt Enable Register
+#define AT91C_US1_CR    ((AT91_REG *)     0xFFFC4000) // (US1) Control Register
+#define AT91C_US1_RTOR  ((AT91_REG *)     0xFFFC4024) // (US1) Receiver Time-out Register
+#define AT91C_US1_THR   ((AT91_REG *)     0xFFFC401C) // (US1) Transmitter Holding Register
+#define AT91C_US1_CSR   ((AT91_REG *)     0xFFFC4014) // (US1) Channel Status Register
+#define AT91C_US1_IDR   ((AT91_REG *)     0xFFFC400C) // (US1) Interrupt Disable Register
+#define AT91C_US1_FIDI  ((AT91_REG *)     0xFFFC4040) // (US1) FI_DI_Ratio Register
+#define AT91C_US1_BRGR  ((AT91_REG *)     0xFFFC4020) // (US1) Baud Rate Generator Register
+#define AT91C_US1_TTGR  ((AT91_REG *)     0xFFFC4028) // (US1) Transmitter Time-guard Register
+#define AT91C_US1_IF    ((AT91_REG *)     0xFFFC404C) // (US1) IRDA_FILTER Register
+#define AT91C_US1_NER   ((AT91_REG *)     0xFFFC4044) // (US1) Nb Errors Register
+#define AT91C_US1_MR    ((AT91_REG *)     0xFFFC4004) // (US1) Mode Register
+// ========== Register definition for PDC_US0 peripheral ========== 
+#define AT91C_US0_PTCR  ((AT91_REG *)     0xFFFC0120) // (PDC_US0) PDC Transfer Control Register
+#define AT91C_US0_TNPR  ((AT91_REG *)     0xFFFC0118) // (PDC_US0) Transmit Next Pointer Register
+#define AT91C_US0_RNPR  ((AT91_REG *)     0xFFFC0110) // (PDC_US0) Receive Next Pointer Register
+#define AT91C_US0_TPR   ((AT91_REG *)     0xFFFC0108) // (PDC_US0) Transmit Pointer Register
+#define AT91C_US0_RPR   ((AT91_REG *)     0xFFFC0100) // (PDC_US0) Receive Pointer Register
+#define AT91C_US0_PTSR  ((AT91_REG *)     0xFFFC0124) // (PDC_US0) PDC Transfer Status Register
+#define AT91C_US0_TNCR  ((AT91_REG *)     0xFFFC011C) // (PDC_US0) Transmit Next Counter Register
+#define AT91C_US0_RNCR  ((AT91_REG *)     0xFFFC0114) // (PDC_US0) Receive Next Counter Register
+#define AT91C_US0_TCR   ((AT91_REG *)     0xFFFC010C) // (PDC_US0) Transmit Counter Register
+#define AT91C_US0_RCR   ((AT91_REG *)     0xFFFC0104) // (PDC_US0) Receive Counter Register
+// ========== Register definition for US0 peripheral ========== 
+#define AT91C_US0_TTGR  ((AT91_REG *)     0xFFFC0028) // (US0) Transmitter Time-guard Register
+#define AT91C_US0_BRGR  ((AT91_REG *)     0xFFFC0020) // (US0) Baud Rate Generator Register
+#define AT91C_US0_RHR   ((AT91_REG *)     0xFFFC0018) // (US0) Receiver Holding Register
+#define AT91C_US0_IMR   ((AT91_REG *)     0xFFFC0010) // (US0) Interrupt Mask Register
+#define AT91C_US0_NER   ((AT91_REG *)     0xFFFC0044) // (US0) Nb Errors Register
+#define AT91C_US0_RTOR  ((AT91_REG *)     0xFFFC0024) // (US0) Receiver Time-out Register
+#define AT91C_US0_FIDI  ((AT91_REG *)     0xFFFC0040) // (US0) FI_DI_Ratio Register
+#define AT91C_US0_CR    ((AT91_REG *)     0xFFFC0000) // (US0) Control Register
+#define AT91C_US0_IER   ((AT91_REG *)     0xFFFC0008) // (US0) Interrupt Enable Register
+#define AT91C_US0_IF    ((AT91_REG *)     0xFFFC004C) // (US0) IRDA_FILTER Register
+#define AT91C_US0_MR    ((AT91_REG *)     0xFFFC0004) // (US0) Mode Register
+#define AT91C_US0_IDR   ((AT91_REG *)     0xFFFC000C) // (US0) Interrupt Disable Register
+#define AT91C_US0_CSR   ((AT91_REG *)     0xFFFC0014) // (US0) Channel Status Register
+#define AT91C_US0_THR   ((AT91_REG *)     0xFFFC001C) // (US0) Transmitter Holding Register
+// ========== Register definition for PDC_SSC peripheral ========== 
+#define AT91C_SSC_PTCR  ((AT91_REG *)     0xFFFD4120) // (PDC_SSC) PDC Transfer Control Register
+#define AT91C_SSC_TNPR  ((AT91_REG *)     0xFFFD4118) // (PDC_SSC) Transmit Next Pointer Register
+#define AT91C_SSC_RNPR  ((AT91_REG *)     0xFFFD4110) // (PDC_SSC) Receive Next Pointer Register
+#define AT91C_SSC_TPR   ((AT91_REG *)     0xFFFD4108) // (PDC_SSC) Transmit Pointer Register
+#define AT91C_SSC_RPR   ((AT91_REG *)     0xFFFD4100) // (PDC_SSC) Receive Pointer Register
+#define AT91C_SSC_PTSR  ((AT91_REG *)     0xFFFD4124) // (PDC_SSC) PDC Transfer Status Register
+#define AT91C_SSC_TNCR  ((AT91_REG *)     0xFFFD411C) // (PDC_SSC) Transmit Next Counter Register
+#define AT91C_SSC_RNCR  ((AT91_REG *)     0xFFFD4114) // (PDC_SSC) Receive Next Counter Register
+#define AT91C_SSC_TCR   ((AT91_REG *)     0xFFFD410C) // (PDC_SSC) Transmit Counter Register
+#define AT91C_SSC_RCR   ((AT91_REG *)     0xFFFD4104) // (PDC_SSC) Receive Counter Register
+// ========== Register definition for SSC peripheral ========== 
+#define AT91C_SSC_RFMR  ((AT91_REG *)     0xFFFD4014) // (SSC) Receive Frame Mode Register
+#define AT91C_SSC_CMR   ((AT91_REG *)     0xFFFD4004) // (SSC) Clock Mode Register
+#define AT91C_SSC_IDR   ((AT91_REG *)     0xFFFD4048) // (SSC) Interrupt Disable Register
+#define AT91C_SSC_SR    ((AT91_REG *)     0xFFFD4040) // (SSC) Status Register
+#define AT91C_SSC_RSHR  ((AT91_REG *)     0xFFFD4030) // (SSC) Receive Sync Holding Register
+#define AT91C_SSC_RHR   ((AT91_REG *)     0xFFFD4020) // (SSC) Receive Holding Register
+#define AT91C_SSC_TCMR  ((AT91_REG *)     0xFFFD4018) // (SSC) Transmit Clock Mode Register
+#define AT91C_SSC_RCMR  ((AT91_REG *)     0xFFFD4010) // (SSC) Receive Clock ModeRegister
+#define AT91C_SSC_CR    ((AT91_REG *)     0xFFFD4000) // (SSC) Control Register
+#define AT91C_SSC_IMR   ((AT91_REG *)     0xFFFD404C) // (SSC) Interrupt Mask Register
+#define AT91C_SSC_IER   ((AT91_REG *)     0xFFFD4044) // (SSC) Interrupt Enable Register
+#define AT91C_SSC_TSHR  ((AT91_REG *)     0xFFFD4034) // (SSC) Transmit Sync Holding Register
+#define AT91C_SSC_THR   ((AT91_REG *)     0xFFFD4024) // (SSC) Transmit Holding Register
+#define AT91C_SSC_TFMR  ((AT91_REG *)     0xFFFD401C) // (SSC) Transmit Frame Mode Register
+// ========== Register definition for TWI peripheral ========== 
+#define AT91C_TWI_RHR   ((AT91_REG *)     0xFFFB8030) // (TWI) Receive Holding Register
+#define AT91C_TWI_IDR   ((AT91_REG *)     0xFFFB8028) // (TWI) Interrupt Disable Register
+#define AT91C_TWI_SR    ((AT91_REG *)     0xFFFB8020) // (TWI) Status Register
+#define AT91C_TWI_CWGR  ((AT91_REG *)     0xFFFB8010) // (TWI) Clock Waveform Generator Register
+#define AT91C_TWI_CR    ((AT91_REG *)     0xFFFB8000) // (TWI) Control Register
+#define AT91C_TWI_THR   ((AT91_REG *)     0xFFFB8034) // (TWI) Transmit Holding Register
+#define AT91C_TWI_IMR   ((AT91_REG *)     0xFFFB802C) // (TWI) Interrupt Mask Register
+#define AT91C_TWI_IER   ((AT91_REG *)     0xFFFB8024) // (TWI) Interrupt Enable Register
+#define AT91C_TWI_IADR  ((AT91_REG *)     0xFFFB800C) // (TWI) Internal Address Register
+#define AT91C_TWI_MMR   ((AT91_REG *)     0xFFFB8004) // (TWI) Master Mode Register
+// ========== Register definition for PWMC_CH3 peripheral ========== 
+#define AT91C_PWMC_CH3_CUPDR ((AT91_REG *)     0xFFFCC270) // (PWMC_CH3) Channel Update Register
+#define AT91C_PWMC_CH3_CPRDR ((AT91_REG *)     0xFFFCC268) // (PWMC_CH3) Channel Period Register
+#define AT91C_PWMC_CH3_CMR ((AT91_REG *)     0xFFFCC260) // (PWMC_CH3) Channel Mode Register
+#define AT91C_PWMC_CH3_Reserved ((AT91_REG *)     0xFFFCC274) // (PWMC_CH3) Reserved
+#define AT91C_PWMC_CH3_CCNTR ((AT91_REG *)     0xFFFCC26C) // (PWMC_CH3) Channel Counter Register
+#define AT91C_PWMC_CH3_CDTYR ((AT91_REG *)     0xFFFCC264) // (PWMC_CH3) Channel Duty Cycle Register
+// ========== Register definition for PWMC_CH2 peripheral ========== 
+#define AT91C_PWMC_CH2_CUPDR ((AT91_REG *)     0xFFFCC250) // (PWMC_CH2) Channel Update Register
+#define AT91C_PWMC_CH2_CPRDR ((AT91_REG *)     0xFFFCC248) // (PWMC_CH2) Channel Period Register
+#define AT91C_PWMC_CH2_CMR ((AT91_REG *)     0xFFFCC240) // (PWMC_CH2) Channel Mode Register
+#define AT91C_PWMC_CH2_Reserved ((AT91_REG *)     0xFFFCC254) // (PWMC_CH2) Reserved
+#define AT91C_PWMC_CH2_CCNTR ((AT91_REG *)     0xFFFCC24C) // (PWMC_CH2) Channel Counter Register
+#define AT91C_PWMC_CH2_CDTYR ((AT91_REG *)     0xFFFCC244) // (PWMC_CH2) Channel Duty Cycle Register
+// ========== Register definition for PWMC_CH1 peripheral ========== 
+#define AT91C_PWMC_CH1_CUPDR ((AT91_REG *)     0xFFFCC230) // (PWMC_CH1) Channel Update Register
+#define AT91C_PWMC_CH1_CPRDR ((AT91_REG *)     0xFFFCC228) // (PWMC_CH1) Channel Period Register
+#define AT91C_PWMC_CH1_CMR ((AT91_REG *)     0xFFFCC220) // (PWMC_CH1) Channel Mode Register
+#define AT91C_PWMC_CH1_Reserved ((AT91_REG *)     0xFFFCC234) // (PWMC_CH1) Reserved
+#define AT91C_PWMC_CH1_CCNTR ((AT91_REG *)     0xFFFCC22C) // (PWMC_CH1) Channel Counter Register
+#define AT91C_PWMC_CH1_CDTYR ((AT91_REG *)     0xFFFCC224) // (PWMC_CH1) Channel Duty Cycle Register
+// ========== Register definition for PWMC_CH0 peripheral ========== 
+#define AT91C_PWMC_CH0_CUPDR ((AT91_REG *)     0xFFFCC210) // (PWMC_CH0) Channel Update Register
+#define AT91C_PWMC_CH0_CPRDR ((AT91_REG *)     0xFFFCC208) // (PWMC_CH0) Channel Period Register
+#define AT91C_PWMC_CH0_CMR ((AT91_REG *)     0xFFFCC200) // (PWMC_CH0) Channel Mode Register
+#define AT91C_PWMC_CH0_Reserved ((AT91_REG *)     0xFFFCC214) // (PWMC_CH0) Reserved
+#define AT91C_PWMC_CH0_CCNTR ((AT91_REG *)     0xFFFCC20C) // (PWMC_CH0) Channel Counter Register
+#define AT91C_PWMC_CH0_CDTYR ((AT91_REG *)     0xFFFCC204) // (PWMC_CH0) Channel Duty Cycle Register
+// ========== Register definition for PWMC peripheral ========== 
+#define AT91C_PWMC_VR   ((AT91_REG *)     0xFFFCC0FC) // (PWMC) PWMC Version Register
+#define AT91C_PWMC_ISR  ((AT91_REG *)     0xFFFCC01C) // (PWMC) PWMC Interrupt Status Register
+#define AT91C_PWMC_IDR  ((AT91_REG *)     0xFFFCC014) // (PWMC) PWMC Interrupt Disable Register
+#define AT91C_PWMC_SR   ((AT91_REG *)     0xFFFCC00C) // (PWMC) PWMC Status Register
+#define AT91C_PWMC_ENA  ((AT91_REG *)     0xFFFCC004) // (PWMC) PWMC Enable Register
+#define AT91C_PWMC_IMR  ((AT91_REG *)     0xFFFCC018) // (PWMC) PWMC Interrupt Mask Register
+#define AT91C_PWMC_MR   ((AT91_REG *)     0xFFFCC000) // (PWMC) PWMC Mode Register
+#define AT91C_PWMC_DIS  ((AT91_REG *)     0xFFFCC008) // (PWMC) PWMC Disable Register
+#define AT91C_PWMC_IER  ((AT91_REG *)     0xFFFCC010) // (PWMC) PWMC Interrupt Enable Register
+// ========== Register definition for UDP peripheral ========== 
+#define AT91C_UDP_TXVC  ((AT91_REG *)     0xFFFB0074) // (UDP) Transceiver Control Register
+#define AT91C_UDP_ISR   ((AT91_REG *)     0xFFFB001C) // (UDP) Interrupt Status Register
+#define AT91C_UDP_IDR   ((AT91_REG *)     0xFFFB0014) // (UDP) Interrupt Disable Register
+#define AT91C_UDP_CSR   ((AT91_REG *)     0xFFFB0030) // (UDP) Endpoint Control and Status Register
+#define AT91C_UDP_RSTEP ((AT91_REG *)     0xFFFB0028) // (UDP) Reset Endpoint Register
+#define AT91C_UDP_ICR   ((AT91_REG *)     0xFFFB0020) // (UDP) Interrupt Clear Register
+#define AT91C_UDP_GLBSTATE ((AT91_REG *)     0xFFFB0004) // (UDP) Global State Register
+#define AT91C_UDP_NUM   ((AT91_REG *)     0xFFFB0000) // (UDP) Frame Number Register
+#define AT91C_UDP_FADDR ((AT91_REG *)     0xFFFB0008) // (UDP) Function Address Register
+#define AT91C_UDP_IER   ((AT91_REG *)     0xFFFB0010) // (UDP) Interrupt Enable Register
+#define AT91C_UDP_IMR   ((AT91_REG *)     0xFFFB0018) // (UDP) Interrupt Mask Register
+#define AT91C_UDP_FDR   ((AT91_REG *)     0xFFFB0050) // (UDP) Endpoint FIFO Data Register
+// ========== Register definition for TC0 peripheral ========== 
+#define AT91C_TC0_IMR   ((AT91_REG *)     0xFFFA002C) // (TC0) Interrupt Mask Register
+#define AT91C_TC0_IER   ((AT91_REG *)     0xFFFA0024) // (TC0) Interrupt Enable Register
+#define AT91C_TC0_RC    ((AT91_REG *)     0xFFFA001C) // (TC0) Register C
+#define AT91C_TC0_RA    ((AT91_REG *)     0xFFFA0014) // (TC0) Register A
+#define AT91C_TC0_CMR   ((AT91_REG *)     0xFFFA0004) // (TC0) Channel Mode Register (Capture Mode / Waveform Mode)
+#define AT91C_TC0_IDR   ((AT91_REG *)     0xFFFA0028) // (TC0) Interrupt Disable Register
+#define AT91C_TC0_SR    ((AT91_REG *)     0xFFFA0020) // (TC0) Status Register
+#define AT91C_TC0_RB    ((AT91_REG *)     0xFFFA0018) // (TC0) Register B
+#define AT91C_TC0_CV    ((AT91_REG *)     0xFFFA0010) // (TC0) Counter Value
+#define AT91C_TC0_CCR   ((AT91_REG *)     0xFFFA0000) // (TC0) Channel Control Register
+// ========== Register definition for TC1 peripheral ========== 
+#define AT91C_TC1_IMR   ((AT91_REG *)     0xFFFA006C) // (TC1) Interrupt Mask Register
+#define AT91C_TC1_IER   ((AT91_REG *)     0xFFFA0064) // (TC1) Interrupt Enable Register
+#define AT91C_TC1_RC    ((AT91_REG *)     0xFFFA005C) // (TC1) Register C
+#define AT91C_TC1_RA    ((AT91_REG *)     0xFFFA0054) // (TC1) Register A
+#define AT91C_TC1_CMR   ((AT91_REG *)     0xFFFA0044) // (TC1) Channel Mode Register (Capture Mode / Waveform Mode)
+#define AT91C_TC1_IDR   ((AT91_REG *)     0xFFFA0068) // (TC1) Interrupt Disable Register
+#define AT91C_TC1_SR    ((AT91_REG *)     0xFFFA0060) // (TC1) Status Register
+#define AT91C_TC1_RB    ((AT91_REG *)     0xFFFA0058) // (TC1) Register B
+#define AT91C_TC1_CV    ((AT91_REG *)     0xFFFA0050) // (TC1) Counter Value
+#define AT91C_TC1_CCR   ((AT91_REG *)     0xFFFA0040) // (TC1) Channel Control Register
+// ========== Register definition for TC2 peripheral ========== 
+#define AT91C_TC2_IMR   ((AT91_REG *)     0xFFFA00AC) // (TC2) Interrupt Mask Register
+#define AT91C_TC2_IER   ((AT91_REG *)     0xFFFA00A4) // (TC2) Interrupt Enable Register
+#define AT91C_TC2_RC    ((AT91_REG *)     0xFFFA009C) // (TC2) Register C
+#define AT91C_TC2_RA    ((AT91_REG *)     0xFFFA0094) // (TC2) Register A
+#define AT91C_TC2_CMR   ((AT91_REG *)     0xFFFA0084) // (TC2) Channel Mode Register (Capture Mode / Waveform Mode)
+#define AT91C_TC2_IDR   ((AT91_REG *)     0xFFFA00A8) // (TC2) Interrupt Disable Register
+#define AT91C_TC2_SR    ((AT91_REG *)     0xFFFA00A0) // (TC2) Status Register
+#define AT91C_TC2_RB    ((AT91_REG *)     0xFFFA0098) // (TC2) Register B
+#define AT91C_TC2_CV    ((AT91_REG *)     0xFFFA0090) // (TC2) Counter Value
+#define AT91C_TC2_CCR   ((AT91_REG *)     0xFFFA0080) // (TC2) Channel Control Register
+// ========== Register definition for TCB peripheral ========== 
+#define AT91C_TCB_BMR   ((AT91_REG *)     0xFFFA00C4) // (TCB) TC Block Mode Register
+#define AT91C_TCB_BCR   ((AT91_REG *)     0xFFFA00C0) // (TCB) TC Block Control Register
+// ========== Register definition for CAN_MB0 peripheral ========== 
+#define AT91C_CAN_MB0_MCR ((AT91_REG *)     0xFFFD021C) // (CAN_MB0) MailBox Control Register
+#define AT91C_CAN_MB0_MDL ((AT91_REG *)     0xFFFD0214) // (CAN_MB0) MailBox Data Low Register
+#define AT91C_CAN_MB0_MFID ((AT91_REG *)     0xFFFD020C) // (CAN_MB0) MailBox Family ID Register
+#define AT91C_CAN_MB0_MAM ((AT91_REG *)     0xFFFD0204) // (CAN_MB0) MailBox Acceptance Mask Register
+#define AT91C_CAN_MB0_MDH ((AT91_REG *)     0xFFFD0218) // (CAN_MB0) MailBox Data High Register
+#define AT91C_CAN_MB0_MSR ((AT91_REG *)     0xFFFD0210) // (CAN_MB0) MailBox Status Register
+#define AT91C_CAN_MB0_MID ((AT91_REG *)     0xFFFD0208) // (CAN_MB0) MailBox ID Register
+#define AT91C_CAN_MB0_MMR ((AT91_REG *)     0xFFFD0200) // (CAN_MB0) MailBox Mode Register
+// ========== Register definition for CAN_MB1 peripheral ========== 
+#define AT91C_CAN_MB1_MCR ((AT91_REG *)     0xFFFD023C) // (CAN_MB1) MailBox Control Register
+#define AT91C_CAN_MB1_MDL ((AT91_REG *)     0xFFFD0234) // (CAN_MB1) MailBox Data Low Register
+#define AT91C_CAN_MB1_MFID ((AT91_REG *)     0xFFFD022C) // (CAN_MB1) MailBox Family ID Register
+#define AT91C_CAN_MB1_MAM ((AT91_REG *)     0xFFFD0224) // (CAN_MB1) MailBox Acceptance Mask Register
+#define AT91C_CAN_MB1_MDH ((AT91_REG *)     0xFFFD0238) // (CAN_MB1) MailBox Data High Register
+#define AT91C_CAN_MB1_MSR ((AT91_REG *)     0xFFFD0230) // (CAN_MB1) MailBox Status Register
+#define AT91C_CAN_MB1_MID ((AT91_REG *)     0xFFFD0228) // (CAN_MB1) MailBox ID Register
+#define AT91C_CAN_MB1_MMR ((AT91_REG *)     0xFFFD0220) // (CAN_MB1) MailBox Mode Register
+// ========== Register definition for CAN_MB2 peripheral ========== 
+#define AT91C_CAN_MB2_MCR ((AT91_REG *)     0xFFFD025C) // (CAN_MB2) MailBox Control Register
+#define AT91C_CAN_MB2_MDL ((AT91_REG *)     0xFFFD0254) // (CAN_MB2) MailBox Data Low Register
+#define AT91C_CAN_MB2_MFID ((AT91_REG *)     0xFFFD024C) // (CAN_MB2) MailBox Family ID Register
+#define AT91C_CAN_MB2_MAM ((AT91_REG *)     0xFFFD0244) // (CAN_MB2) MailBox Acceptance Mask Register
+#define AT91C_CAN_MB2_MDH ((AT91_REG *)     0xFFFD0258) // (CAN_MB2) MailBox Data High Register
+#define AT91C_CAN_MB2_MSR ((AT91_REG *)     0xFFFD0250) // (CAN_MB2) MailBox Status Register
+#define AT91C_CAN_MB2_MID ((AT91_REG *)     0xFFFD0248) // (CAN_MB2) MailBox ID Register
+#define AT91C_CAN_MB2_MMR ((AT91_REG *)     0xFFFD0240) // (CAN_MB2) MailBox Mode Register
+// ========== Register definition for CAN_MB3 peripheral ========== 
+#define AT91C_CAN_MB3_MCR ((AT91_REG *)     0xFFFD027C) // (CAN_MB3) MailBox Control Register
+#define AT91C_CAN_MB3_MDL ((AT91_REG *)     0xFFFD0274) // (CAN_MB3) MailBox Data Low Register
+#define AT91C_CAN_MB3_MFID ((AT91_REG *)     0xFFFD026C) // (CAN_MB3) MailBox Family ID Register
+#define AT91C_CAN_MB3_MAM ((AT91_REG *)     0xFFFD0264) // (CAN_MB3) MailBox Acceptance Mask Register
+#define AT91C_CAN_MB3_MDH ((AT91_REG *)     0xFFFD0278) // (CAN_MB3) MailBox Data High Register
+#define AT91C_CAN_MB3_MSR ((AT91_REG *)     0xFFFD0270) // (CAN_MB3) MailBox Status Register
+#define AT91C_CAN_MB3_MID ((AT91_REG *)     0xFFFD0268) // (CAN_MB3) MailBox ID Register
+#define AT91C_CAN_MB3_MMR ((AT91_REG *)     0xFFFD0260) // (CAN_MB3) MailBox Mode Register
+// ========== Register definition for CAN_MB4 peripheral ========== 
+#define AT91C_CAN_MB4_MCR ((AT91_REG *)     0xFFFD029C) // (CAN_MB4) MailBox Control Register
+#define AT91C_CAN_MB4_MDL ((AT91_REG *)     0xFFFD0294) // (CAN_MB4) MailBox Data Low Register
+#define AT91C_CAN_MB4_MFID ((AT91_REG *)     0xFFFD028C) // (CAN_MB4) MailBox Family ID Register
+#define AT91C_CAN_MB4_MAM ((AT91_REG *)     0xFFFD0284) // (CAN_MB4) MailBox Acceptance Mask Register
+#define AT91C_CAN_MB4_MDH ((AT91_REG *)     0xFFFD0298) // (CAN_MB4) MailBox Data High Register
+#define AT91C_CAN_MB4_MSR ((AT91_REG *)     0xFFFD0290) // (CAN_MB4) MailBox Status Register
+#define AT91C_CAN_MB4_MID ((AT91_REG *)     0xFFFD0288) // (CAN_MB4) MailBox ID Register
+#define AT91C_CAN_MB4_MMR ((AT91_REG *)     0xFFFD0280) // (CAN_MB4) MailBox Mode Register
+// ========== Register definition for CAN_MB5 peripheral ========== 
+#define AT91C_CAN_MB5_MCR ((AT91_REG *)     0xFFFD02BC) // (CAN_MB5) MailBox Control Register
+#define AT91C_CAN_MB5_MDL ((AT91_REG *)     0xFFFD02B4) // (CAN_MB5) MailBox Data Low Register
+#define AT91C_CAN_MB5_MFID ((AT91_REG *)     0xFFFD02AC) // (CAN_MB5) MailBox Family ID Register
+#define AT91C_CAN_MB5_MAM ((AT91_REG *)     0xFFFD02A4) // (CAN_MB5) MailBox Acceptance Mask Register
+#define AT91C_CAN_MB5_MDH ((AT91_REG *)     0xFFFD02B8) // (CAN_MB5) MailBox Data High Register
+#define AT91C_CAN_MB5_MSR ((AT91_REG *)     0xFFFD02B0) // (CAN_MB5) MailBox Status Register
+#define AT91C_CAN_MB5_MID ((AT91_REG *)     0xFFFD02A8) // (CAN_MB5) MailBox ID Register
+#define AT91C_CAN_MB5_MMR ((AT91_REG *)     0xFFFD02A0) // (CAN_MB5) MailBox Mode Register
+// ========== Register definition for CAN_MB6 peripheral ========== 
+#define AT91C_CAN_MB6_MAM ((AT91_REG *)     0xFFFD02C4) // (CAN_MB6) MailBox Acceptance Mask Register
+#define AT91C_CAN_MB6_MDH ((AT91_REG *)     0xFFFD02D8) // (CAN_MB6) MailBox Data High Register
+#define AT91C_CAN_MB6_MSR ((AT91_REG *)     0xFFFD02D0) // (CAN_MB6) MailBox Status Register
+#define AT91C_CAN_MB6_MID ((AT91_REG *)     0xFFFD02C8) // (CAN_MB6) MailBox ID Register
+#define AT91C_CAN_MB6_MMR ((AT91_REG *)     0xFFFD02C0) // (CAN_MB6) MailBox Mode Register
+#define AT91C_CAN_MB6_MCR ((AT91_REG *)     0xFFFD02DC) // (CAN_MB6) MailBox Control Register
+#define AT91C_CAN_MB6_MDL ((AT91_REG *)     0xFFFD02D4) // (CAN_MB6) MailBox Data Low Register
+#define AT91C_CAN_MB6_MFID ((AT91_REG *)     0xFFFD02CC) // (CAN_MB6) MailBox Family ID Register
+// ========== Register definition for CAN_MB7 peripheral ========== 
+#define AT91C_CAN_MB7_MDH ((AT91_REG *)     0xFFFD02F8) // (CAN_MB7) MailBox Data High Register
+#define AT91C_CAN_MB7_MSR ((AT91_REG *)     0xFFFD02F0) // (CAN_MB7) MailBox Status Register
+#define AT91C_CAN_MB7_MID ((AT91_REG *)     0xFFFD02E8) // (CAN_MB7) MailBox ID Register
+#define AT91C_CAN_MB7_MMR ((AT91_REG *)     0xFFFD02E0) // (CAN_MB7) MailBox Mode Register
+#define AT91C_CAN_MB7_MCR ((AT91_REG *)     0xFFFD02FC) // (CAN_MB7) MailBox Control Register
+#define AT91C_CAN_MB7_MDL ((AT91_REG *)     0xFFFD02F4) // (CAN_MB7) MailBox Data Low Register
+#define AT91C_CAN_MB7_MFID ((AT91_REG *)     0xFFFD02EC) // (CAN_MB7) MailBox Family ID Register
+#define AT91C_CAN_MB7_MAM ((AT91_REG *)     0xFFFD02E4) // (CAN_MB7) MailBox Acceptance Mask Register
+// ========== Register definition for CAN peripheral ========== 
+#define AT91C_CAN_IMR   ((AT91_REG *)     0xFFFD000C) // (CAN) Interrupt Mask Register
+#define AT91C_CAN_IER   ((AT91_REG *)     0xFFFD0004) // (CAN) Interrupt Enable Register
+#define AT91C_CAN_ECR   ((AT91_REG *)     0xFFFD0020) // (CAN) Error Counter Register
+#define AT91C_CAN_TIM   ((AT91_REG *)     0xFFFD0018) // (CAN) Timer Register
+#define AT91C_CAN_SR    ((AT91_REG *)     0xFFFD0010) // (CAN) Status Register
+#define AT91C_CAN_IDR   ((AT91_REG *)     0xFFFD0008) // (CAN) Interrupt Disable Register
+#define AT91C_CAN_MR    ((AT91_REG *)     0xFFFD0000) // (CAN) Mode Register
+#define AT91C_CAN_BR    ((AT91_REG *)     0xFFFD0014) // (CAN) Baudrate Register
+#define AT91C_CAN_TIMESTP ((AT91_REG *)     0xFFFD001C) // (CAN) Time Stamp Register
+#define AT91C_CAN_TCR   ((AT91_REG *)     0xFFFD0024) // (CAN) Transfer Command Register
+#define AT91C_CAN_ACR   ((AT91_REG *)     0xFFFD0028) // (CAN) Abort Command Register
+#define AT91C_CAN_VR    ((AT91_REG *)     0xFFFD00FC) // (CAN) Version Register
+// ========== Register definition for EMAC peripheral ========== 
+#define AT91C_EMAC_TID  ((AT91_REG *)     0xFFFDC0B8) // (EMAC) Type ID Checking Register
+#define AT91C_EMAC_SA3L ((AT91_REG *)     0xFFFDC0A8) // (EMAC) Specific Address 3 Bottom, First 4 bytes
+#define AT91C_EMAC_STE  ((AT91_REG *)     0xFFFDC084) // (EMAC) SQE Test Error Register
+#define AT91C_EMAC_RSE  ((AT91_REG *)     0xFFFDC074) // (EMAC) Receive Symbol Errors Register
+#define AT91C_EMAC_IDR  ((AT91_REG *)     0xFFFDC02C) // (EMAC) Interrupt Disable Register
+#define AT91C_EMAC_TBQP ((AT91_REG *)     0xFFFDC01C) // (EMAC) Transmit Buffer Queue Pointer
+#define AT91C_EMAC_TPQ  ((AT91_REG *)     0xFFFDC0BC) // (EMAC) Transmit Pause Quantum Register
+#define AT91C_EMAC_SA1L ((AT91_REG *)     0xFFFDC098) // (EMAC) Specific Address 1 Bottom, First 4 bytes
+#define AT91C_EMAC_RLE  ((AT91_REG *)     0xFFFDC088) // (EMAC) Receive Length Field Mismatch Register
+#define AT91C_EMAC_IMR  ((AT91_REG *)     0xFFFDC030) // (EMAC) Interrupt Mask Register
+#define AT91C_EMAC_SA1H ((AT91_REG *)     0xFFFDC09C) // (EMAC) Specific Address 1 Top, Last 2 bytes
+#define AT91C_EMAC_PFR  ((AT91_REG *)     0xFFFDC03C) // (EMAC) Pause Frames received Register
+#define AT91C_EMAC_FCSE ((AT91_REG *)     0xFFFDC050) // (EMAC) Frame Check Sequence Error Register
+#define AT91C_EMAC_FTO  ((AT91_REG *)     0xFFFDC040) // (EMAC) Frames Transmitted OK Register
+#define AT91C_EMAC_TUND ((AT91_REG *)     0xFFFDC064) // (EMAC) Transmit Underrun Error Register
+#define AT91C_EMAC_ALE  ((AT91_REG *)     0xFFFDC054) // (EMAC) Alignment Error Register
+#define AT91C_EMAC_SCF  ((AT91_REG *)     0xFFFDC044) // (EMAC) Single Collision Frame Register
+#define AT91C_EMAC_SA3H ((AT91_REG *)     0xFFFDC0AC) // (EMAC) Specific Address 3 Top, Last 2 bytes
+#define AT91C_EMAC_ELE  ((AT91_REG *)     0xFFFDC078) // (EMAC) Excessive Length Errors Register
+#define AT91C_EMAC_CSE  ((AT91_REG *)     0xFFFDC068) // (EMAC) Carrier Sense Error Register
+#define AT91C_EMAC_DTF  ((AT91_REG *)     0xFFFDC058) // (EMAC) Deferred Transmission Frame Register
+#define AT91C_EMAC_RSR  ((AT91_REG *)     0xFFFDC020) // (EMAC) Receive Status Register
+#define AT91C_EMAC_USRIO ((AT91_REG *)     0xFFFDC0C0) // (EMAC) USER Input/Output Register
+#define AT91C_EMAC_SA4L ((AT91_REG *)     0xFFFDC0B0) // (EMAC) Specific Address 4 Bottom, First 4 bytes
+#define AT91C_EMAC_RRE  ((AT91_REG *)     0xFFFDC06C) // (EMAC) Receive Ressource Error Register
+#define AT91C_EMAC_RJA  ((AT91_REG *)     0xFFFDC07C) // (EMAC) Receive Jabbers Register
+#define AT91C_EMAC_TPF  ((AT91_REG *)     0xFFFDC08C) // (EMAC) Transmitted Pause Frames Register
+#define AT91C_EMAC_ISR  ((AT91_REG *)     0xFFFDC024) // (EMAC) Interrupt Status Register
+#define AT91C_EMAC_MAN  ((AT91_REG *)     0xFFFDC034) // (EMAC) PHY Maintenance Register
+#define AT91C_EMAC_WOL  ((AT91_REG *)     0xFFFDC0C4) // (EMAC) Wake On LAN Register
+#define AT91C_EMAC_USF  ((AT91_REG *)     0xFFFDC080) // (EMAC) Undersize Frames Register
+#define AT91C_EMAC_HRB  ((AT91_REG *)     0xFFFDC090) // (EMAC) Hash Address Bottom[31:0]
+#define AT91C_EMAC_PTR  ((AT91_REG *)     0xFFFDC038) // (EMAC) Pause Time Register
+#define AT91C_EMAC_HRT  ((AT91_REG *)     0xFFFDC094) // (EMAC) Hash Address Top[63:32]
+#define AT91C_EMAC_REV  ((AT91_REG *)     0xFFFDC0FC) // (EMAC) Revision Register
+#define AT91C_EMAC_MCF  ((AT91_REG *)     0xFFFDC048) // (EMAC) Multiple Collision Frame Register
+#define AT91C_EMAC_SA2L ((AT91_REG *)     0xFFFDC0A0) // (EMAC) Specific Address 2 Bottom, First 4 bytes
+#define AT91C_EMAC_NCR  ((AT91_REG *)     0xFFFDC000) // (EMAC) Network Control Register
+#define AT91C_EMAC_FRO  ((AT91_REG *)     0xFFFDC04C) // (EMAC) Frames Received OK Register
+#define AT91C_EMAC_LCOL ((AT91_REG *)     0xFFFDC05C) // (EMAC) Late Collision Register
+#define AT91C_EMAC_SA4H ((AT91_REG *)     0xFFFDC0B4) // (EMAC) Specific Address 4 Top, Last 2 bytes
+#define AT91C_EMAC_NCFGR ((AT91_REG *)     0xFFFDC004) // (EMAC) Network Configuration Register
+#define AT91C_EMAC_TSR  ((AT91_REG *)     0xFFFDC014) // (EMAC) Transmit Status Register
+#define AT91C_EMAC_SA2H ((AT91_REG *)     0xFFFDC0A4) // (EMAC) Specific Address 2 Top, Last 2 bytes
+#define AT91C_EMAC_ECOL ((AT91_REG *)     0xFFFDC060) // (EMAC) Excessive Collision Register
+#define AT91C_EMAC_ROV  ((AT91_REG *)     0xFFFDC070) // (EMAC) Receive Overrun Errors Register
+#define AT91C_EMAC_NSR  ((AT91_REG *)     0xFFFDC008) // (EMAC) Network Status Register
+#define AT91C_EMAC_RBQP ((AT91_REG *)     0xFFFDC018) // (EMAC) Receive Buffer Queue Pointer
+#define AT91C_EMAC_IER  ((AT91_REG *)     0xFFFDC028) // (EMAC) Interrupt Enable Register
+// ========== Register definition for PDC_ADC peripheral ========== 
+#define AT91C_ADC_PTCR  ((AT91_REG *)     0xFFFD8120) // (PDC_ADC) PDC Transfer Control Register
+#define AT91C_ADC_TNPR  ((AT91_REG *)     0xFFFD8118) // (PDC_ADC) Transmit Next Pointer Register
+#define AT91C_ADC_RNPR  ((AT91_REG *)     0xFFFD8110) // (PDC_ADC) Receive Next Pointer Register
+#define AT91C_ADC_TPR   ((AT91_REG *)     0xFFFD8108) // (PDC_ADC) Transmit Pointer Register
+#define AT91C_ADC_RPR   ((AT91_REG *)     0xFFFD8100) // (PDC_ADC) Receive Pointer Register
+#define AT91C_ADC_PTSR  ((AT91_REG *)     0xFFFD8124) // (PDC_ADC) PDC Transfer Status Register
+#define AT91C_ADC_TNCR  ((AT91_REG *)     0xFFFD811C) // (PDC_ADC) Transmit Next Counter Register
+#define AT91C_ADC_RNCR  ((AT91_REG *)     0xFFFD8114) // (PDC_ADC) Receive Next Counter Register
+#define AT91C_ADC_TCR   ((AT91_REG *)     0xFFFD810C) // (PDC_ADC) Transmit Counter Register
+#define AT91C_ADC_RCR   ((AT91_REG *)     0xFFFD8104) // (PDC_ADC) Receive Counter Register
+// ========== Register definition for ADC peripheral ========== 
+#define AT91C_ADC_IMR   ((AT91_REG *)     0xFFFD802C) // (ADC) ADC Interrupt Mask Register
+#define AT91C_ADC_CDR4  ((AT91_REG *)     0xFFFD8040) // (ADC) ADC Channel Data Register 4
+#define AT91C_ADC_CDR2  ((AT91_REG *)     0xFFFD8038) // (ADC) ADC Channel Data Register 2
+#define AT91C_ADC_CDR0  ((AT91_REG *)     0xFFFD8030) // (ADC) ADC Channel Data Register 0
+#define AT91C_ADC_CDR7  ((AT91_REG *)     0xFFFD804C) // (ADC) ADC Channel Data Register 7
+#define AT91C_ADC_CDR1  ((AT91_REG *)     0xFFFD8034) // (ADC) ADC Channel Data Register 1
+#define AT91C_ADC_CDR3  ((AT91_REG *)     0xFFFD803C) // (ADC) ADC Channel Data Register 3
+#define AT91C_ADC_CDR5  ((AT91_REG *)     0xFFFD8044) // (ADC) ADC Channel Data Register 5
+#define AT91C_ADC_MR    ((AT91_REG *)     0xFFFD8004) // (ADC) ADC Mode Register
+#define AT91C_ADC_CDR6  ((AT91_REG *)     0xFFFD8048) // (ADC) ADC Channel Data Register 6
+#define AT91C_ADC_CR    ((AT91_REG *)     0xFFFD8000) // (ADC) ADC Control Register
+#define AT91C_ADC_CHER  ((AT91_REG *)     0xFFFD8010) // (ADC) ADC Channel Enable Register
+#define AT91C_ADC_CHSR  ((AT91_REG *)     0xFFFD8018) // (ADC) ADC Channel Status Register
+#define AT91C_ADC_IER   ((AT91_REG *)     0xFFFD8024) // (ADC) ADC Interrupt Enable Register
+#define AT91C_ADC_SR    ((AT91_REG *)     0xFFFD801C) // (ADC) ADC Status Register
+#define AT91C_ADC_CHDR  ((AT91_REG *)     0xFFFD8014) // (ADC) ADC Channel Disable Register
+#define AT91C_ADC_IDR   ((AT91_REG *)     0xFFFD8028) // (ADC) ADC Interrupt Disable Register
+#define AT91C_ADC_LCDR  ((AT91_REG *)     0xFFFD8020) // (ADC) ADC Last Converted Data Register
+
+// *****************************************************************************
+//               PIO DEFINITIONS FOR AT91SAM7X256
+// *****************************************************************************
+#define AT91C_PIO_PA0        ((unsigned int) 1 <<  0) // Pin Controlled by PA0
+#define AT91C_PA0_RXD0     ((unsigned int) AT91C_PIO_PA0) //  USART 0 Receive Data
+#define AT91C_PIO_PA1        ((unsigned int) 1 <<  1) // Pin Controlled by PA1
+#define AT91C_PA1_TXD0     ((unsigned int) AT91C_PIO_PA1) //  USART 0 Transmit Data
+#define AT91C_PIO_PA10       ((unsigned int) 1 << 10) // Pin Controlled by PA10
+#define AT91C_PA10_TWD      ((unsigned int) AT91C_PIO_PA10) //  TWI Two-wire Serial Data
+#define AT91C_PIO_PA11       ((unsigned int) 1 << 11) // Pin Controlled by PA11
+#define AT91C_PA11_TWCK     ((unsigned int) AT91C_PIO_PA11) //  TWI Two-wire Serial Clock
+#define AT91C_PIO_PA12       ((unsigned int) 1 << 12) // Pin Controlled by PA12
+#define AT91C_PA12_SPI0_NPCS0 ((unsigned int) AT91C_PIO_PA12) //  SPI 0 Peripheral Chip Select 0
+#define AT91C_PIO_PA13       ((unsigned int) 1 << 13) // Pin Controlled by PA13
+#define AT91C_PA13_SPI0_NPCS1 ((unsigned int) AT91C_PIO_PA13) //  SPI 0 Peripheral Chip Select 1
+#define AT91C_PA13_PCK1     ((unsigned int) AT91C_PIO_PA13) //  PMC Programmable Clock Output 1
+#define AT91C_PIO_PA14       ((unsigned int) 1 << 14) // Pin Controlled by PA14
+#define AT91C_PA14_SPI0_NPCS2 ((unsigned int) AT91C_PIO_PA14) //  SPI 0 Peripheral Chip Select 2
+#define AT91C_PA14_IRQ1     ((unsigned int) AT91C_PIO_PA14) //  External Interrupt 1
+#define AT91C_PIO_PA15       ((unsigned int) 1 << 15) // Pin Controlled by PA15
+#define AT91C_PA15_SPI0_NPCS3 ((unsigned int) AT91C_PIO_PA15) //  SPI 0 Peripheral Chip Select 3
+#define AT91C_PA15_TCLK2    ((unsigned int) AT91C_PIO_PA15) //  Timer Counter 2 external clock input
+#define AT91C_PIO_PA16       ((unsigned int) 1 << 16) // Pin Controlled by PA16
+#define AT91C_PA16_SPI0_MISO ((unsigned int) AT91C_PIO_PA16) //  SPI 0 Master In Slave
+#define AT91C_PIO_PA17       ((unsigned int) 1 << 17) // Pin Controlled by PA17
+#define AT91C_PA17_SPI0_MOSI ((unsigned int) AT91C_PIO_PA17) //  SPI 0 Master Out Slave
+#define AT91C_PIO_PA18       ((unsigned int) 1 << 18) // Pin Controlled by PA18
+#define AT91C_PA18_SPI0_SPCK ((unsigned int) AT91C_PIO_PA18) //  SPI 0 Serial Clock
+#define AT91C_PIO_PA19       ((unsigned int) 1 << 19) // Pin Controlled by PA19
+#define AT91C_PA19_CANRX    ((unsigned int) AT91C_PIO_PA19) //  CAN Receive
+#define AT91C_PIO_PA2        ((unsigned int) 1 <<  2) // Pin Controlled by PA2
+#define AT91C_PA2_SCK0     ((unsigned int) AT91C_PIO_PA2) //  USART 0 Serial Clock
+#define AT91C_PA2_SPI1_NPCS1 ((unsigned int) AT91C_PIO_PA2) //  SPI 1 Peripheral Chip Select 1
+#define AT91C_PIO_PA20       ((unsigned int) 1 << 20) // Pin Controlled by PA20
+#define AT91C_PA20_CANTX    ((unsigned int) AT91C_PIO_PA20) //  CAN Transmit
+#define AT91C_PIO_PA21       ((unsigned int) 1 << 21) // Pin Controlled by PA21
+#define AT91C_PA21_TF       ((unsigned int) AT91C_PIO_PA21) //  SSC Transmit Frame Sync
+#define AT91C_PA21_SPI1_NPCS0 ((unsigned int) AT91C_PIO_PA21) //  SPI 1 Peripheral Chip Select 0
+#define AT91C_PIO_PA22       ((unsigned int) 1 << 22) // Pin Controlled by PA22
+#define AT91C_PA22_TK       ((unsigned int) AT91C_PIO_PA22) //  SSC Transmit Clock
+#define AT91C_PA22_SPI1_SPCK ((unsigned int) AT91C_PIO_PA22) //  SPI 1 Serial Clock
+#define AT91C_PIO_PA23       ((unsigned int) 1 << 23) // Pin Controlled by PA23
+#define AT91C_PA23_TD       ((unsigned int) AT91C_PIO_PA23) //  SSC Transmit data
+#define AT91C_PA23_SPI1_MOSI ((unsigned int) AT91C_PIO_PA23) //  SPI 1 Master Out Slave
+#define AT91C_PIO_PA24       ((unsigned int) 1 << 24) // Pin Controlled by PA24
+#define AT91C_PA24_RD       ((unsigned int) AT91C_PIO_PA24) //  SSC Receive Data
+#define AT91C_PA24_SPI1_MISO ((unsigned int) AT91C_PIO_PA24) //  SPI 1 Master In Slave
+#define AT91C_PIO_PA25       ((unsigned int) 1 << 25) // Pin Controlled by PA25
+#define AT91C_PA25_RK       ((unsigned int) AT91C_PIO_PA25) //  SSC Receive Clock
+#define AT91C_PA25_SPI1_NPCS1 ((unsigned int) AT91C_PIO_PA25) //  SPI 1 Peripheral Chip Select 1
+#define AT91C_PIO_PA26       ((unsigned int) 1 << 26) // Pin Controlled by PA26
+#define AT91C_PA26_RF       ((unsigned int) AT91C_PIO_PA26) //  SSC Receive Frame Sync
+#define AT91C_PA26_SPI1_NPCS2 ((unsigned int) AT91C_PIO_PA26) //  SPI 1 Peripheral Chip Select 2
+#define AT91C_PIO_PA27       ((unsigned int) 1 << 27) // Pin Controlled by PA27
+#define AT91C_PA27_DRXD     ((unsigned int) AT91C_PIO_PA27) //  DBGU Debug Receive Data
+#define AT91C_PA27_PCK3     ((unsigned int) AT91C_PIO_PA27) //  PMC Programmable Clock Output 3
+#define AT91C_PIO_PA28       ((unsigned int) 1 << 28) // Pin Controlled by PA28
+#define AT91C_PA28_DTXD     ((unsigned int) AT91C_PIO_PA28) //  DBGU Debug Transmit Data
+#define AT91C_PIO_PA29       ((unsigned int) 1 << 29) // Pin Controlled by PA29
+#define AT91C_PA29_FIQ      ((unsigned int) AT91C_PIO_PA29) //  AIC Fast Interrupt Input
+#define AT91C_PA29_SPI1_NPCS3 ((unsigned int) AT91C_PIO_PA29) //  SPI 1 Peripheral Chip Select 3
+#define AT91C_PIO_PA3        ((unsigned int) 1 <<  3) // Pin Controlled by PA3
+#define AT91C_PA3_RTS0     ((unsigned int) AT91C_PIO_PA3) //  USART 0 Ready To Send
+#define AT91C_PA3_SPI1_NPCS2 ((unsigned int) AT91C_PIO_PA3) //  SPI 1 Peripheral Chip Select 2
+#define AT91C_PIO_PA30       ((unsigned int) 1 << 30) // Pin Controlled by PA30
+#define AT91C_PA30_IRQ0     ((unsigned int) AT91C_PIO_PA30) //  External Interrupt 0
+#define AT91C_PA30_PCK2     ((unsigned int) AT91C_PIO_PA30) //  PMC Programmable Clock Output 2
+#define AT91C_PIO_PA4        ((unsigned int) 1 <<  4) // Pin Controlled by PA4
+#define AT91C_PA4_CTS0     ((unsigned int) AT91C_PIO_PA4) //  USART 0 Clear To Send
+#define AT91C_PA4_SPI1_NPCS3 ((unsigned int) AT91C_PIO_PA4) //  SPI 1 Peripheral Chip Select 3
+#define AT91C_PIO_PA5        ((unsigned int) 1 <<  5) // Pin Controlled by PA5
+#define AT91C_PA5_RXD1     ((unsigned int) AT91C_PIO_PA5) //  USART 1 Receive Data
+#define AT91C_PIO_PA6        ((unsigned int) 1 <<  6) // Pin Controlled by PA6
+#define AT91C_PA6_TXD1     ((unsigned int) AT91C_PIO_PA6) //  USART 1 Transmit Data
+#define AT91C_PIO_PA7        ((unsigned int) 1 <<  7) // Pin Controlled by PA7
+#define AT91C_PA7_SCK1     ((unsigned int) AT91C_PIO_PA7) //  USART 1 Serial Clock
+#define AT91C_PA7_SPI0_NPCS1 ((unsigned int) AT91C_PIO_PA7) //  SPI 0 Peripheral Chip Select 1
+#define AT91C_PIO_PA8        ((unsigned int) 1 <<  8) // Pin Controlled by PA8
+#define AT91C_PA8_RTS1     ((unsigned int) AT91C_PIO_PA8) //  USART 1 Ready To Send
+#define AT91C_PA8_SPI0_NPCS2 ((unsigned int) AT91C_PIO_PA8) //  SPI 0 Peripheral Chip Select 2
+#define AT91C_PIO_PA9        ((unsigned int) 1 <<  9) // Pin Controlled by PA9
+#define AT91C_PA9_CTS1     ((unsigned int) AT91C_PIO_PA9) //  USART 1 Clear To Send
+#define AT91C_PA9_SPI0_NPCS3 ((unsigned int) AT91C_PIO_PA9) //  SPI 0 Peripheral Chip Select 3
+#define AT91C_PIO_PB0        ((unsigned int) 1 <<  0) // Pin Controlled by PB0
+#define AT91C_PB0_ETXCK_EREFCK ((unsigned int) AT91C_PIO_PB0) //  Ethernet MAC Transmit Clock/Reference Clock
+#define AT91C_PB0_PCK0     ((unsigned int) AT91C_PIO_PB0) //  PMC Programmable Clock Output 0
+#define AT91C_PIO_PB1        ((unsigned int) 1 <<  1) // Pin Controlled by PB1
+#define AT91C_PB1_ETXEN    ((unsigned int) AT91C_PIO_PB1) //  Ethernet MAC Transmit Enable
+#define AT91C_PIO_PB10       ((unsigned int) 1 << 10) // Pin Controlled by PB10
+#define AT91C_PB10_ETX2     ((unsigned int) AT91C_PIO_PB10) //  Ethernet MAC Transmit Data 2
+#define AT91C_PB10_SPI1_NPCS1 ((unsigned int) AT91C_PIO_PB10) //  SPI 1 Peripheral Chip Select 1
+#define AT91C_PIO_PB11       ((unsigned int) 1 << 11) // Pin Controlled by PB11
+#define AT91C_PB11_ETX3     ((unsigned int) AT91C_PIO_PB11) //  Ethernet MAC Transmit Data 3
+#define AT91C_PB11_SPI1_NPCS2 ((unsigned int) AT91C_PIO_PB11) //  SPI 1 Peripheral Chip Select 2
+#define AT91C_PIO_PB12       ((unsigned int) 1 << 12) // Pin Controlled by PB12
+#define AT91C_PB12_ETXER    ((unsigned int) AT91C_PIO_PB12) //  Ethernet MAC Transmikt Coding Error
+#define AT91C_PB12_TCLK0    ((unsigned int) AT91C_PIO_PB12) //  Timer Counter 0 external clock input
+#define AT91C_PIO_PB13       ((unsigned int) 1 << 13) // Pin Controlled by PB13
+#define AT91C_PB13_ERX2     ((unsigned int) AT91C_PIO_PB13) //  Ethernet MAC Receive Data 2
+#define AT91C_PB13_SPI0_NPCS1 ((unsigned int) AT91C_PIO_PB13) //  SPI 0 Peripheral Chip Select 1
+#define AT91C_PIO_PB14       ((unsigned int) 1 << 14) // Pin Controlled by PB14
+#define AT91C_PB14_ERX3     ((unsigned int) AT91C_PIO_PB14) //  Ethernet MAC Receive Data 3
+#define AT91C_PB14_SPI0_NPCS2 ((unsigned int) AT91C_PIO_PB14) //  SPI 0 Peripheral Chip Select 2
+#define AT91C_PIO_PB15       ((unsigned int) 1 << 15) // Pin Controlled by PB15
+#define AT91C_PB15_ERXDV_ECRSDV ((unsigned int) AT91C_PIO_PB15) //  Ethernet MAC Receive Data Valid
+#define AT91C_PIO_PB16       ((unsigned int) 1 << 16) // Pin Controlled by PB16
+#define AT91C_PB16_ECOL     ((unsigned int) AT91C_PIO_PB16) //  Ethernet MAC Collision Detected
+#define AT91C_PB16_SPI1_NPCS3 ((unsigned int) AT91C_PIO_PB16) //  SPI 1 Peripheral Chip Select 3
+#define AT91C_PIO_PB17       ((unsigned int) 1 << 17) // Pin Controlled by PB17
+#define AT91C_PB17_ERXCK    ((unsigned int) AT91C_PIO_PB17) //  Ethernet MAC Receive Clock
+#define AT91C_PB17_SPI0_NPCS3 ((unsigned int) AT91C_PIO_PB17) //  SPI 0 Peripheral Chip Select 3
+#define AT91C_PIO_PB18       ((unsigned int) 1 << 18) // Pin Controlled by PB18
+#define AT91C_PB18_EF100    ((unsigned int) AT91C_PIO_PB18) //  Ethernet MAC Force 100 Mbits/sec
+#define AT91C_PB18_ADTRG    ((unsigned int) AT91C_PIO_PB18) //  ADC External Trigger
+#define AT91C_PIO_PB19       ((unsigned int) 1 << 19) // Pin Controlled by PB19
+#define AT91C_PB19_PWM0     ((unsigned int) AT91C_PIO_PB19) //  PWM Channel 0
+#define AT91C_PB19_TCLK1    ((unsigned int) AT91C_PIO_PB19) //  Timer Counter 1 external clock input
+#define AT91C_PIO_PB2        ((unsigned int) 1 <<  2) // Pin Controlled by PB2
+#define AT91C_PB2_ETX0     ((unsigned int) AT91C_PIO_PB2) //  Ethernet MAC Transmit Data 0
+#define AT91C_PIO_PB20       ((unsigned int) 1 << 20) // Pin Controlled by PB20
+#define AT91C_PB20_PWM1     ((unsigned int) AT91C_PIO_PB20) //  PWM Channel 1
+#define AT91C_PB20_PCK0     ((unsigned int) AT91C_PIO_PB20) //  PMC Programmable Clock Output 0
+#define AT91C_PIO_PB21       ((unsigned int) 1 << 21) // Pin Controlled by PB21
+#define AT91C_PB21_PWM2     ((unsigned int) AT91C_PIO_PB21) //  PWM Channel 2
+#define AT91C_PB21_PCK1     ((unsigned int) AT91C_PIO_PB21) //  PMC Programmable Clock Output 1
+#define AT91C_PIO_PB22       ((unsigned int) 1 << 22) // Pin Controlled by PB22
+#define AT91C_PB22_PWM3     ((unsigned int) AT91C_PIO_PB22) //  PWM Channel 3
+#define AT91C_PB22_PCK2     ((unsigned int) AT91C_PIO_PB22) //  PMC Programmable Clock Output 2
+#define AT91C_PIO_PB23       ((unsigned int) 1 << 23) // Pin Controlled by PB23
+#define AT91C_PB23_TIOA0    ((unsigned int) AT91C_PIO_PB23) //  Timer Counter 0 Multipurpose Timer I/O Pin A
+#define AT91C_PB23_DCD1     ((unsigned int) AT91C_PIO_PB23) //  USART 1 Data Carrier Detect
+#define AT91C_PIO_PB24       ((unsigned int) 1 << 24) // Pin Controlled by PB24
+#define AT91C_PB24_TIOB0    ((unsigned int) AT91C_PIO_PB24) //  Timer Counter 0 Multipurpose Timer I/O Pin B
+#define AT91C_PB24_DSR1     ((unsigned int) AT91C_PIO_PB24) //  USART 1 Data Set ready
+#define AT91C_PIO_PB25       ((unsigned int) 1 << 25) // Pin Controlled by PB25
+#define AT91C_PB25_TIOA1    ((unsigned int) AT91C_PIO_PB25) //  Timer Counter 1 Multipurpose Timer I/O Pin A
+#define AT91C_PB25_DTR1     ((unsigned int) AT91C_PIO_PB25) //  USART 1 Data Terminal ready
+#define AT91C_PIO_PB26       ((unsigned int) 1 << 26) // Pin Controlled by PB26
+#define AT91C_PB26_TIOB1    ((unsigned int) AT91C_PIO_PB26) //  Timer Counter 1 Multipurpose Timer I/O Pin B
+#define AT91C_PB26_RI1      ((unsigned int) AT91C_PIO_PB26) //  USART 1 Ring Indicator
+#define AT91C_PIO_PB27       ((unsigned int) 1 << 27) // Pin Controlled by PB27
+#define AT91C_PB27_TIOA2    ((unsigned int) AT91C_PIO_PB27) //  Timer Counter 2 Multipurpose Timer I/O Pin A
+#define AT91C_PB27_PWM0     ((unsigned int) AT91C_PIO_PB27) //  PWM Channel 0
+#define AT91C_PIO_PB28       ((unsigned int) 1 << 28) // Pin Controlled by PB28
+#define AT91C_PB28_TIOB2    ((unsigned int) AT91C_PIO_PB28) //  Timer Counter 2 Multipurpose Timer I/O Pin B
+#define AT91C_PB28_PWM1     ((unsigned int) AT91C_PIO_PB28) //  PWM Channel 1
+#define AT91C_PIO_PB29       ((unsigned int) 1 << 29) // Pin Controlled by PB29
+#define AT91C_PB29_PCK1     ((unsigned int) AT91C_PIO_PB29) //  PMC Programmable Clock Output 1
+#define AT91C_PB29_PWM2     ((unsigned int) AT91C_PIO_PB29) //  PWM Channel 2
+#define AT91C_PIO_PB3        ((unsigned int) 1 <<  3) // Pin Controlled by PB3
+#define AT91C_PB3_ETX1     ((unsigned int) AT91C_PIO_PB3) //  Ethernet MAC Transmit Data 1
+#define AT91C_PIO_PB30       ((unsigned int) 1 << 30) // Pin Controlled by PB30
+#define AT91C_PB30_PCK2     ((unsigned int) AT91C_PIO_PB30) //  PMC Programmable Clock Output 2
+#define AT91C_PB30_PWM3     ((unsigned int) AT91C_PIO_PB30) //  PWM Channel 3
+#define AT91C_PIO_PB4        ((unsigned int) 1 <<  4) // Pin Controlled by PB4
+#define AT91C_PB4_ECRS     ((unsigned int) AT91C_PIO_PB4) //  Ethernet MAC Carrier Sense/Carrier Sense and Data Valid
+#define AT91C_PIO_PB5        ((unsigned int) 1 <<  5) // Pin Controlled by PB5
+#define AT91C_PB5_ERX0     ((unsigned int) AT91C_PIO_PB5) //  Ethernet MAC Receive Data 0
+#define AT91C_PIO_PB6        ((unsigned int) 1 <<  6) // Pin Controlled by PB6
+#define AT91C_PB6_ERX1     ((unsigned int) AT91C_PIO_PB6) //  Ethernet MAC Receive Data 1
+#define AT91C_PIO_PB7        ((unsigned int) 1 <<  7) // Pin Controlled by PB7
+#define AT91C_PB7_ERXER    ((unsigned int) AT91C_PIO_PB7) //  Ethernet MAC Receive Error
+#define AT91C_PIO_PB8        ((unsigned int) 1 <<  8) // Pin Controlled by PB8
+#define AT91C_PB8_EMDC     ((unsigned int) AT91C_PIO_PB8) //  Ethernet MAC Management Data Clock
+#define AT91C_PIO_PB9        ((unsigned int) 1 <<  9) // Pin Controlled by PB9
+#define AT91C_PB9_EMDIO    ((unsigned int) AT91C_PIO_PB9) //  Ethernet MAC Management Data Input/Output
+
+// *****************************************************************************
+//               PERIPHERAL ID DEFINITIONS FOR AT91SAM7X256
+// *****************************************************************************
+#define AT91C_ID_FIQ    ((unsigned int)  0) // Advanced Interrupt Controller (FIQ)
+#define AT91C_ID_SYS    ((unsigned int)  1) // System Peripheral
+#define AT91C_ID_PIOA   ((unsigned int)  2) // Parallel IO Controller A
+#define AT91C_ID_PIOB   ((unsigned int)  3) // Parallel IO Controller B
+#define AT91C_ID_SPI0   ((unsigned int)  4) // Serial Peripheral Interface 0
+#define AT91C_ID_SPI1   ((unsigned int)  5) // Serial Peripheral Interface 1
+#define AT91C_ID_US0    ((unsigned int)  6) // USART 0
+#define AT91C_ID_US1    ((unsigned int)  7) // USART 1
+#define AT91C_ID_SSC    ((unsigned int)  8) // Serial Synchronous Controller
+#define AT91C_ID_TWI    ((unsigned int)  9) // Two-Wire Interface
+#define AT91C_ID_PWMC   ((unsigned int) 10) // PWM Controller
+#define AT91C_ID_UDP    ((unsigned int) 11) // USB Device Port
+#define AT91C_ID_TC0    ((unsigned int) 12) // Timer Counter 0
+#define AT91C_ID_TC1    ((unsigned int) 13) // Timer Counter 1
+#define AT91C_ID_TC2    ((unsigned int) 14) // Timer Counter 2
+#define AT91C_ID_CAN    ((unsigned int) 15) // Control Area Network Controller
+#define AT91C_ID_EMAC   ((unsigned int) 16) // Ethernet MAC
+#define AT91C_ID_ADC    ((unsigned int) 17) // Analog-to-Digital Converter
+#define AT91C_ID_18_Reserved ((unsigned int) 18) // Reserved
+#define AT91C_ID_19_Reserved ((unsigned int) 19) // Reserved
+#define AT91C_ID_20_Reserved ((unsigned int) 20) // Reserved
+#define AT91C_ID_21_Reserved ((unsigned int) 21) // Reserved
+#define AT91C_ID_22_Reserved ((unsigned int) 22) // Reserved
+#define AT91C_ID_23_Reserved ((unsigned int) 23) // Reserved
+#define AT91C_ID_24_Reserved ((unsigned int) 24) // Reserved
+#define AT91C_ID_25_Reserved ((unsigned int) 25) // Reserved
+#define AT91C_ID_26_Reserved ((unsigned int) 26) // Reserved
+#define AT91C_ID_27_Reserved ((unsigned int) 27) // Reserved
+#define AT91C_ID_28_Reserved ((unsigned int) 28) // Reserved
+#define AT91C_ID_29_Reserved ((unsigned int) 29) // Reserved
+#define AT91C_ID_IRQ0   ((unsigned int) 30) // Advanced Interrupt Controller (IRQ0)
+#define AT91C_ID_IRQ1   ((unsigned int) 31) // Advanced Interrupt Controller (IRQ1)
+#define AT91C_ALL_INT   ((unsigned int) 0xC003FFFF) // ALL VALID INTERRUPTS
+
+// *****************************************************************************
+//               BASE ADDRESS DEFINITIONS FOR AT91SAM7X256
+// *****************************************************************************
+
+#ifdef TEST
+
+extern AT91S_AIC    AicPeripheral;
+extern AT91S_PIO    PioAPeripheral;
+extern AT91S_PIO    PioBPeripheral;
+extern AT91S_PMC    PmcPeripheral;
+extern AT91S_USART  Usart0Peripheral;
+extern AT91S_TC     TimerCounter0Peripheral;
+extern AT91S_ADC    AdcPeripheral;
+
+#define AIC_ADDR    &AicPeripheral
+#define PIOA_ADDR   &PioAPeripheral
+#define PIOB_ADDR   &PioBPeripheral
+#define PMC_ADDR    &PmcPeripheral
+#define US0_ADDR    &Usart0Peripheral
+#define TC0_ADDR    &TimerCounter0Peripheral
+#define ADC_ADDR    &AdcPeripheral
+
+#else
+  
+#define AIC_ADDR    0xFFFFF000
+#define PIOA_ADDR   0xFFFFF400
+#define PIOB_ADDR   0xFFFFF600
+#define PMC_ADDR    0xFFFFFC00
+#define US0_ADDR    0xFFFC0000
+#define TC0_ADDR    0xFFFA0000
+#define ADC_ADDR    0xFFFD8000
+
+#endif // TEST
+
+#define AT91C_BASE_SYS       ((AT91PS_SYS)      0xFFFFF000) // (SYS) Base Address
+#define AT91C_BASE_AIC       ((AT91PS_AIC)      AIC_ADDR)   // (AIC) Base Address
+#define AT91C_BASE_PDC_DBGU  ((AT91PS_PDC)      0xFFFFF300) // (PDC_DBGU) Base Address
+#define AT91C_BASE_DBGU      ((AT91PS_DBGU)     0xFFFFF200) // (DBGU) Base Address
+#define AT91C_BASE_PIOA      ((AT91PS_PIO)      PIOA_ADDR)  // (PIOA) Base Address
+#define AT91C_BASE_PIOB      ((AT91PS_PIO)      PIOB_ADDR)  // (PIOB) Base Address
+#define AT91C_BASE_PMC       ((AT91PS_PMC)      PMC_ADDR)   // (PMC) Base Address
+#define AT91C_BASE_CKGR      ((AT91PS_CKGR)     0xFFFFFC20) // (CKGR) Base Address
+#define AT91C_BASE_RSTC      ((AT91PS_RSTC)     0xFFFFFD00) // (RSTC) Base Address
+#define AT91C_BASE_RTTC      ((AT91PS_RTTC)     0xFFFFFD20) // (RTTC) Base Address
+#define AT91C_BASE_PITC      ((AT91PS_PITC)     0xFFFFFD30) // (PITC) Base Address
+#define AT91C_BASE_WDTC      ((AT91PS_WDTC)     0xFFFFFD40) // (WDTC) Base Address
+#define AT91C_BASE_VREG      ((AT91PS_VREG)     0xFFFFFD60) // (VREG) Base Address
+#define AT91C_BASE_MC        ((AT91PS_MC)       0xFFFFFF00) // (MC) Base Address
+#define AT91C_BASE_PDC_SPI1  ((AT91PS_PDC)      0xFFFE4100) // (PDC_SPI1) Base Address
+#define AT91C_BASE_SPI1      ((AT91PS_SPI)      0xFFFE4000) // (SPI1) Base Address
+#define AT91C_BASE_PDC_SPI0  ((AT91PS_PDC)      0xFFFE0100) // (PDC_SPI0) Base Address
+#define AT91C_BASE_SPI0      ((AT91PS_SPI)      0xFFFE0000) // (SPI0) Base Address
+#define AT91C_BASE_PDC_US1   ((AT91PS_PDC)      0xFFFC4100) // (PDC_US1) Base Address
+#define AT91C_BASE_US1       ((AT91PS_USART)    0xFFFC4000) // (US1) Base Address
+#define AT91C_BASE_PDC_US0   ((AT91PS_PDC)      0xFFFC0100) // (PDC_US0) Base Address
+#define AT91C_BASE_US0       ((AT91PS_USART)    US0_ADDR)   // (US0) Base Address
+#define AT91C_BASE_PDC_SSC   ((AT91PS_PDC)      0xFFFD4100) // (PDC_SSC) Base Address
+#define AT91C_BASE_SSC       ((AT91PS_SSC)      0xFFFD4000) // (SSC) Base Address
+#define AT91C_BASE_TWI       ((AT91PS_TWI)      0xFFFB8000) // (TWI) Base Address
+#define AT91C_BASE_PWMC_CH3  ((AT91PS_PWMC_CH)  0xFFFCC260) // (PWMC_CH3) Base Address
+#define AT91C_BASE_PWMC_CH2  ((AT91PS_PWMC_CH)  0xFFFCC240) // (PWMC_CH2) Base Address
+#define AT91C_BASE_PWMC_CH1  ((AT91PS_PWMC_CH)  0xFFFCC220) // (PWMC_CH1) Base Address
+#define AT91C_BASE_PWMC_CH0  ((AT91PS_PWMC_CH)  0xFFFCC200) // (PWMC_CH0) Base Address
+#define AT91C_BASE_PWMC      ((AT91PS_PWMC)     0xFFFCC000) // (PWMC) Base Address
+#define AT91C_BASE_UDP       ((AT91PS_UDP)      0xFFFB0000) // (UDP) Base Address
+#define AT91C_BASE_TC0       ((AT91PS_TC)       TC0_ADDR)   // (TC0) Base Address
+#define AT91C_BASE_TC1       ((AT91PS_TC)       0xFFFA0040) // (TC1) Base Address
+#define AT91C_BASE_TC2       ((AT91PS_TC)       0xFFFA0080) // (TC2) Base Address
+#define AT91C_BASE_TCB       ((AT91PS_TCB)      0xFFFA0000) // (TCB) Base Address
+#define AT91C_BASE_CAN_MB0   ((AT91PS_CAN_MB)   0xFFFD0200) // (CAN_MB0) Base Address
+#define AT91C_BASE_CAN_MB1   ((AT91PS_CAN_MB)   0xFFFD0220) // (CAN_MB1) Base Address
+#define AT91C_BASE_CAN_MB2   ((AT91PS_CAN_MB)   0xFFFD0240) // (CAN_MB2) Base Address
+#define AT91C_BASE_CAN_MB3   ((AT91PS_CAN_MB)   0xFFFD0260) // (CAN_MB3) Base Address
+#define AT91C_BASE_CAN_MB4   ((AT91PS_CAN_MB)   0xFFFD0280) // (CAN_MB4) Base Address
+#define AT91C_BASE_CAN_MB5   ((AT91PS_CAN_MB)   0xFFFD02A0) // (CAN_MB5) Base Address
+#define AT91C_BASE_CAN_MB6   ((AT91PS_CAN_MB)   0xFFFD02C0) // (CAN_MB6) Base Address
+#define AT91C_BASE_CAN_MB7   ((AT91PS_CAN_MB)   0xFFFD02E0) // (CAN_MB7) Base Address
+#define AT91C_BASE_CAN       ((AT91PS_CAN)      0xFFFD0000) // (CAN) Base Address
+#define AT91C_BASE_ADC       ((AT91PS_ADC)      ADC_ADDR)   // (ADC) Base Address
+#define AT91C_BASE_EMAC      ((AT91PS_EMAC)     0xFFFDC000) // (EMAC) Base Address
+#define AT91C_BASE_PDC_ADC   ((AT91PS_PDC)      0xFFFD8100) // (PDC_ADC) Base Address
+
+// *****************************************************************************
+//               MEMORY MAPPING DEFINITIONS FOR AT91SAM7X256
+// *****************************************************************************
+// ISRAM
+#define AT91C_ISRAM                   ((char *)       0x00200000) // Internal SRAM base address
+#define AT91C_ISRAM_SIZE              ((unsigned int) 0x00010000) // Internal SRAM size in byte (64 Kbytes)
+// IFLASH
+#define AT91C_IFLASH                  ((char *)       0x00100000) // Internal FLASH base address
+#define AT91C_IFLASH_SIZE             ((unsigned int) 0x00040000) // Internal FLASH size in byte (256 Kbytes)
+#define AT91C_IFLASH_PAGE_SIZE        ((unsigned int) 256) // Internal FLASH Page Size: 256 bytes
+#define AT91C_IFLASH_LOCK_REGION_SIZE ((unsigned int) 16384) // Internal FLASH Lock Region Size: 16 Kbytes
+#define AT91C_IFLASH_NB_OF_PAGES      ((unsigned int) 1024) // Internal FLASH Number of Pages: 1024 bytes
+#define AT91C_IFLASH_NB_OF_LOCK_BITS  ((unsigned int) 16) // Internal FLASH Number of Lock Bits: 16 bytes
+
+#endif
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcConductor.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcConductor.c
new file mode 100644
index 000000000..28d9d20cf
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcConductor.c
@@ -0,0 +1,42 @@
+#include "Types.h"
+#include "AdcConductor.h"
+#include "AdcModel.h"
+#include "AdcHardware.h"
+
+void AdcConductor_Init(void)
+{
+  AdcHardware_Init();
+}
+
+void AdcConductor_Run(void)
+{
+  if (AdcModel_DoGetSample() && AdcHardware_GetSampleComplete())
+  {
+    AdcModel_ProcessInput(AdcHardware_GetSample());
+    AdcHardware_StartConversion();
+  }
+}
+
+bool AdcConductor_JustHereToTest(void)
+{
+    EXAMPLE_STRUCT_T ExampleStruct;
+    ExampleStruct.x = 5;
+    ExampleStruct.y = 7;
+
+    return AdcModel_DoNothingExceptTestASpecialType(ExampleStruct);
+}
+
+bool AdcConductor_AlsoHereToTest(void)
+{
+    EXAMPLE_STRUCT_T example = AdcModel_DoNothingExceptReturnASpecialType();
+
+    return ((example.x == 99) && (example.y == 1));
+}
+
+bool AdcConductor_YetAnotherTest(void)
+{
+    uint32 example = 3;
+
+    return AdModel_DoNothingExceptTestPointers(&example);
+}
+
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcConductor.h b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcConductor.h
new file mode 100644
index 000000000..4280da3cf
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcConductor.h
@@ -0,0 +1,11 @@
+#ifndef _ADCCONDUCTOR_H
+#define _ADCCONDUCTOR_H
+
+void AdcConductor_Init(void);
+void AdcConductor_Run(void);
+
+bool AdcConductor_JustHereToTest(void);
+bool AdcConductor_AlsoHereToTest(void);
+bool AdcConductor_YetAnotherTest(void);
+
+#endif // _ADCCONDUCTOR_H
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcHardware.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcHardware.c
new file mode 100644
index 000000000..980764117
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcHardware.c
@@ -0,0 +1,27 @@
+#include "Types.h"
+#include "AdcHardware.h"
+#include "AdcHardwareConfigurator.h"
+#include "AdcTemperatureSensor.h"
+
+void AdcHardware_Init(void)
+{
+  Adc_Reset();
+  Adc_ConfigureMode();
+  Adc_EnableTemperatureChannel();
+  Adc_StartTemperatureSensorConversion();
+}
+
+void AdcHardware_StartConversion(void)
+{
+  Adc_StartTemperatureSensorConversion();
+}
+
+bool AdcHardware_GetSampleComplete(void)
+{
+  return Adc_TemperatureSensorSampleReady();
+}
+
+uint16 AdcHardware_GetSample(void)
+{
+  return Adc_ReadTemperatureSensor();
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcHardware.h b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcHardware.h
new file mode 100644
index 000000000..3209a4c2a
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcHardware.h
@@ -0,0 +1,9 @@
+#ifndef _ADCHARDWARE_H
+#define _ADCHARDWARE_H
+
+void AdcHardware_Init(void);
+void AdcHardware_StartConversion(void);
+bool AdcHardware_GetSampleComplete(void);
+uint16 AdcHardware_GetSample(void);
+
+#endif // _ADCHARDWARE_H
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcHardwareConfigurator.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcHardwareConfigurator.c
new file mode 100644
index 000000000..f7e08a239
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcHardwareConfigurator.c
@@ -0,0 +1,18 @@
+#include "Types.h"
+#include "AdcHardwareConfigurator.h"
+#include "ModelConfig.h"
+
+void Adc_Reset(void)
+{
+  AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
+}
+
+void Adc_ConfigureMode(void)
+{
+  AT91C_BASE_ADC->ADC_MR = (((uint32)11) << 8) | (((uint32)4) << 16);
+}
+
+void Adc_EnableTemperatureChannel(void)
+{
+  AT91C_BASE_ADC->ADC_CHER = 0x10;
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcHardwareConfigurator.h b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcHardwareConfigurator.h
new file mode 100644
index 000000000..78b9e9fcf
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcHardwareConfigurator.h
@@ -0,0 +1,10 @@
+#ifndef _ADCHARDWARECONFIGURATOR_H
+#define _ADCHARDWARECONFIGURATOR_H
+
+#include "Types.h"
+
+void Adc_Reset(void);
+void Adc_ConfigureMode(void);
+void Adc_EnableTemperatureChannel(void);
+
+#endif // _ADCHARDWARECONFIGURATOR_H
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcModel.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcModel.c
new file mode 100644
index 000000000..ad9111d2c
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcModel.c
@@ -0,0 +1,33 @@
+#include "AdcModel.h"
+#include "TaskScheduler.h"
+#include "TemperatureCalculator.h"
+#include "TemperatureFilter.h"
+
+bool AdcModel_DoGetSample(void)
+{
+  return TaskScheduler_DoAdc();
+}
+
+void AdcModel_ProcessInput(uint16 millivolts)
+{
+  TemperatureFilter_ProcessInput(TemperatureCalculator_Calculate(millivolts));
+}
+
+bool AdcModel_DoNothingExceptTestASpecialType(EXAMPLE_STRUCT_T ExampleStruct)
+{
+    //This doesn't really do anything. it's only here to make sure I can compare a struct.
+    return FALSE;
+}
+bool AdModel_DoNothingExceptTestPointers(uint32* pExample)
+{
+    //This doesn't really do anything. it's only here to make sure I can compare a pointer value.
+    return FALSE;
+}
+
+EXAMPLE_STRUCT_T AdcModel_DoNothingExceptReturnASpecialType(void)
+{
+    EXAMPLE_STRUCT_T example; //again, this just is here to test that I can return a struct
+    example.x = 99;
+    example.y = 1;
+    return example;
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcModel.h b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcModel.h
new file mode 100644
index 000000000..6b871fdbf
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcModel.h
@@ -0,0 +1,13 @@
+#ifndef _ADCMODEL_H
+#define _ADCMODEL_H
+
+#include "Types.h"
+
+bool AdcModel_DoGetSample(void);
+void AdcModel_ProcessInput(uint16 millivolts);
+
+bool AdcModel_DoNothingExceptTestASpecialType(EXAMPLE_STRUCT_T ExampleStruct);
+bool AdModel_DoNothingExceptTestPointers(uint32* pExample);
+EXAMPLE_STRUCT_T AdcModel_DoNothingExceptReturnASpecialType(void);
+
+#endif // _ADCMODEL_H
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcTemperatureSensor.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcTemperatureSensor.c
new file mode 100644
index 000000000..b2a3f2c13
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcTemperatureSensor.c
@@ -0,0 +1,51 @@
+#include "Types.h"
+#include "AdcTemperatureSensor.h"
+
+static inline uint32 ConvertAdcCountsToPicovolts(uint32 counts); 
+static inline uint16 ConvertPicovoltsToMillivolts(uint32 picovolts);
+
+//
+// PUBLIC METHODS
+//
+
+void Adc_StartTemperatureSensorConversion(void)
+{
+  AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
+}
+
+bool Adc_TemperatureSensorSampleReady(void)
+{
+  return ((AT91C_BASE_ADC->ADC_SR & AT91C_ADC_EOC4) == AT91C_ADC_EOC4);
+}
+
+uint16 Adc_ReadTemperatureSensor(void)
+{
+  uint32 picovolts = ConvertAdcCountsToPicovolts(AT91C_BASE_ADC->ADC_CDR4);
+  return ConvertPicovoltsToMillivolts(picovolts);
+}
+
+//
+// PRIVATE HELPERS
+//
+
+static inline uint32 ConvertAdcCountsToPicovolts(uint32 counts)
+{
+  // ADC bit weight at 10-bit resolution with 3.0V reference = 2.9296875 mV/LSB
+  uint32 picovoltsPerAdcCount = 2929688;
+
+  // Shift decimal point by 6 places to preserve accuracy in fixed-point math
+  return counts * picovoltsPerAdcCount;
+}
+
+static inline uint16 ConvertPicovoltsToMillivolts(uint32 picovolts)
+{
+  const uint32 halfMillivoltInPicovolts = 500000;
+  const uint32 picovoltsPerMillivolt = 1000000;
+    
+  // Add 0.5 mV to result so that truncation yields properly rounded result
+  picovolts += halfMillivoltInPicovolts;
+
+  // Divide appropriately to convert to millivolts
+  return (uint16)(picovolts / picovoltsPerMillivolt);
+}
+
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcTemperatureSensor.h b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcTemperatureSensor.h
new file mode 100644
index 000000000..bf2cc5b0d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/AdcTemperatureSensor.h
@@ -0,0 +1,10 @@
+#ifndef _ADCTEMPERATURESENSOR_H
+#define _ADCTEMPERATURESENSOR_H
+
+#include "Types.h"
+
+void Adc_StartTemperatureSensorConversion(void);
+bool Adc_TemperatureSensorSampleReady(void);
+uint16 Adc_ReadTemperatureSensor(void);
+
+#endif // _ADCTEMPERATURESENSOR_H
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/Executor.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/Executor.c
new file mode 100644
index 000000000..7e45c3e57
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/Executor.c
@@ -0,0 +1,25 @@
+#include "Types.h"
+#include "Executor.h"
+#include "Model.h"
+#include "UsartConductor.h"
+#include "TimerConductor.h"
+#include "AdcConductor.h"
+#include "IntrinsicsWrapper.h"
+
+
+void Executor_Init(void)
+{
+  Model_Init();
+  UsartConductor_Init();
+  AdcConductor_Init();
+  TimerConductor_Init();
+  Interrupt_Enable();
+}
+
+bool Executor_Run(void)
+{
+  UsartConductor_Run();
+  TimerConductor_Run();
+  AdcConductor_Run();
+  return TRUE;
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/Executor.h b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/Executor.h
new file mode 100644
index 000000000..51a61a97e
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/Executor.h
@@ -0,0 +1,9 @@
+#ifndef _EXECUTOR_H
+#define _EXECUTOR_H
+
+#include "Types.h"
+
+void Executor_Init(void);
+bool Executor_Run(void);
+
+#endif // _EXECUTOR_H
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/IntrinsicsWrapper.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/IntrinsicsWrapper.c
new file mode 100644
index 000000000..8b082aef4
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/IntrinsicsWrapper.c
@@ -0,0 +1,18 @@
+#include "IntrinsicsWrapper.h"
+#ifdef __ICCARM__
+#include <intrinsics.h>
+#endif
+
+void Interrupt_Enable(void)
+{
+#ifdef __ICCARM__
+  __enable_interrupt();
+#endif
+}
+
+void Interrupt_Disable(void)
+{
+#ifdef __ICCARM__
+  __disable_interrupt();
+#endif
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/IntrinsicsWrapper.h b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/IntrinsicsWrapper.h
new file mode 100644
index 000000000..9273317cd
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/IntrinsicsWrapper.h
@@ -0,0 +1,7 @@
+#ifndef _INTRINSICS_WRAPPER_H
+#define _INTRINSICS_WRAPPER_H
+
+void Interrupt_Enable(void);
+void Interrupt_Disable(void);
+
+#endif // _INTRINSICS_WRAPPER_H
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/Main.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/Main.c
new file mode 100644
index 000000000..a784f4759
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/Main.c
@@ -0,0 +1,46 @@
+#include "Types.h"
+
+#include "IntrinsicsWrapper.h"
+#include "Executor.h"
+
+#include "Model.h"
+#include "TaskScheduler.h"
+#include "TemperatureCalculator.h"
+#include "TemperatureFilter.h"
+
+#include "UsartConductor.h"
+#include "UsartHardware.h"
+#include "UsartConfigurator.h"
+#include "UsartPutChar.h"
+#include "UsartModel.h"
+#include "UsartBaudRateRegisterCalculator.h"
+#include "UsartTransmitBufferStatus.h"
+
+#include "TimerConductor.h"
+#include "TimerHardware.h"
+#include "TimerConfigurator.h"
+#include "TimerInterruptConfigurator.h"
+#include "TimerInterruptHandler.h"
+#include "TimerModel.h"
+
+#include "AdcConductor.h"
+#include "AdcHardware.h"
+#include "AdcHardwareConfigurator.h"
+#include "AdcTemperatureSensor.h"
+#include "AdcModel.h"
+
+int AppMain(void)
+{
+  Executor_Init();
+
+  while(Executor_Run());
+  
+  return 0;
+}
+
+#ifndef TEST
+int main(void)
+{
+  return AppMain();
+}
+#endif // TEST
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/Main.h b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/Main.h
new file mode 100644
index 000000000..6cbe5f43a
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/Main.h
@@ -0,0 +1,7 @@
+#ifndef _MAIN_H_
+#define _MAIN_H_
+
+int AppMain(void);
+int main(void);
+
+#endif // _MAIN_H_
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/Model.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/Model.c
new file mode 100644
index 000000000..5b34c40cd
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/Model.c
@@ -0,0 +1,10 @@
+#include "Model.h"
+#include "TaskScheduler.h"
+#include "TemperatureFilter.h"
+
+void Model_Init(void)
+{
+  TaskScheduler_Init();
+  TemperatureFilter_Init();
+}
+
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/Model.h b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/Model.h
new file mode 100644
index 000000000..d1309387d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/Model.h
@@ -0,0 +1,8 @@
+#ifndef _MODEL_H
+#define _MODEL_H
+
+#include "Types.h"
+
+void Model_Init(void);
+
+#endif // _MODEL_H
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/ModelConfig.h b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/ModelConfig.h
new file mode 100644
index 000000000..edc8e8d4b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/ModelConfig.h
@@ -0,0 +1,7 @@
+#ifndef _MODELCONFIG_H
+#define _MODELCONFIG_H
+
+#define MASTER_CLOCK    48054857  // Master Clock
+#define USART0_BAUDRATE 115200    // USART Baudrate
+
+#endif // _MODELCONFIG_H
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TaskScheduler.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TaskScheduler.c
new file mode 100644
index 000000000..bcc0e6436
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TaskScheduler.c
@@ -0,0 +1,72 @@
+#include "Types.h"
+#include "TaskScheduler.h"
+
+typedef struct _Task
+{
+  bool    doIt;
+  uint32  period;
+  uint32  startTime;
+} Task;
+
+typedef struct _TaskSchedulerInstance
+{
+  Task usart;
+  Task adc;
+} TaskSchedulerInstance;
+
+static TaskSchedulerInstance this;
+
+void TaskScheduler_Init(void)
+{
+  this.usart.doIt = FALSE;
+  this.usart.startTime = 0;
+
+  //The correct period
+  this.usart.period = 1000;
+
+  this.adc.doIt = FALSE;
+  this.adc.startTime = 0;
+  this.adc.period = 100;
+}
+
+void TaskScheduler_Update(uint32 time)
+{
+  if ((time - this.usart.startTime) >= this.usart.period)
+  {
+    this.usart.doIt = TRUE;
+    this.usart.startTime = time - (time % this.usart.period);
+  }
+
+  if ((time - this.adc.startTime) >= this.adc.period)
+  {
+    this.adc.doIt = TRUE;
+    this.adc.startTime = time - (time % this.adc.period);
+  }
+}
+
+bool TaskScheduler_DoUsart(void)
+{
+  bool doIt = FALSE;
+
+  if (this.usart.doIt)
+  {
+    doIt = TRUE;
+    this.usart.doIt = FALSE;
+  }
+
+  return doIt;
+}
+
+bool TaskScheduler_DoAdc(void)
+{
+  bool doIt = FALSE;
+
+  if (this.adc.doIt)
+  {
+    doIt = TRUE;
+    this.adc.doIt = FALSE;
+  }
+
+  return doIt;
+}
+
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TaskScheduler.h b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TaskScheduler.h
new file mode 100644
index 000000000..cc58342c5
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TaskScheduler.h
@@ -0,0 +1,11 @@
+#ifndef _TASKSCHEDULER_H
+#define _TASKSCHEDULER_H
+
+#include "Types.h"
+
+void TaskScheduler_Init(void);
+void TaskScheduler_Update(uint32 time);
+bool TaskScheduler_DoUsart(void);
+bool TaskScheduler_DoAdc(void);
+
+#endif // _TASKSCHEDULER_H
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TemperatureCalculator.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TemperatureCalculator.c
new file mode 100644
index 000000000..04cec59d4
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TemperatureCalculator.c
@@ -0,0 +1,27 @@
+#include "Types.h"
+#include "TemperatureCalculator.h"
+#include <math.h>
+
+#ifndef logl
+#define logl log
+#endif
+
+float TemperatureCalculator_Calculate(uint16 millivolts)
+{
+  const double supply_voltage = 3.0;
+  const double series_resistance = 5000;
+  const double coefficient_A = 316589.698;
+  const double coefficient_B = -0.1382009;
+  double sensor_voltage = ((double)millivolts / 1000);
+  double resistance;
+  
+  if (millivolts == 0)
+  {
+    return -INFINITY;
+  }
+
+  // Series resistor is 5k Ohms; Reference voltage is 3.0V
+  // R(t) = A * e^(B*t); R is resistance of thermisor; t is temperature in C
+  resistance = ((supply_voltage * series_resistance) / sensor_voltage) - series_resistance;
+  return (float)(logl(resistance / coefficient_A) / coefficient_B);
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TemperatureCalculator.h b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TemperatureCalculator.h
new file mode 100644
index 000000000..b606c2d40
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TemperatureCalculator.h
@@ -0,0 +1,6 @@
+#ifndef _TEMPERATURECALCULATOR_H
+#define _TEMPERATURECALCULATOR_H
+
+float TemperatureCalculator_Calculate(uint16 millivolts);
+
+#endif // _TEMPERATURECALCULATOR_H
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TemperatureFilter.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TemperatureFilter.c
new file mode 100644
index 000000000..02fc04506
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TemperatureFilter.c
@@ -0,0 +1,39 @@
+#include "Types.h"
+#include "TemperatureFilter.h"
+#include <math.h>
+
+static bool initialized;
+static float temperatureInCelcius;
+
+void TemperatureFilter_Init(void)
+{
+  initialized = FALSE;
+  temperatureInCelcius = -INFINITY;
+}
+
+float TemperatureFilter_GetTemperatureInCelcius(void)
+{
+  return temperatureInCelcius;
+}
+
+void TemperatureFilter_ProcessInput(float temperature)
+{
+  if (!initialized)
+  {
+    temperatureInCelcius = temperature;
+    initialized = TRUE;
+  }
+  else
+  {
+    if (temperature == +INFINITY ||
+        temperature == -INFINITY ||
+        temperature == +NAN ||
+        temperature == -NAN)
+    {
+      initialized = FALSE;
+      temperature = -INFINITY;
+    }
+    
+    temperatureInCelcius = (temperatureInCelcius * 0.75f) + (temperature * 0.25);
+  }
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TemperatureFilter.h b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TemperatureFilter.h
new file mode 100644
index 000000000..31413f491
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TemperatureFilter.h
@@ -0,0 +1,10 @@
+#ifndef _TEMPERATUREFILTER_H
+#define _TEMPERATUREFILTER_H
+
+#include "Types.h"
+
+void TemperatureFilter_Init(void);
+float TemperatureFilter_GetTemperatureInCelcius(void);
+void TemperatureFilter_ProcessInput(float temperature);
+
+#endif // _TEMPERATUREFILTER_H
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerConductor.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerConductor.c
new file mode 100644
index 000000000..569b489a0
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerConductor.c
@@ -0,0 +1,15 @@
+#include "Types.h"
+#include "TimerConductor.h"
+#include "TimerModel.h"
+#include "TimerHardware.h"
+#include "TimerInterruptHandler.h"
+
+void TimerConductor_Init(void)
+{
+  TimerHardware_Init();
+}
+
+void TimerConductor_Run(void)
+{
+  TimerModel_UpdateTime(Timer_GetSystemTime());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerConductor.h b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerConductor.h
new file mode 100644
index 000000000..7cd410970
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerConductor.h
@@ -0,0 +1,9 @@
+#ifndef _TIMERCONDUCTOR_H
+#define _TIMERCONDUCTOR_H
+
+#include "Types.h"
+
+void TimerConductor_Init(void);
+void TimerConductor_Run(void);
+
+#endif // _TIMERCONDUCTOR_H
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerConfigurator.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerConfigurator.c
new file mode 100644
index 000000000..996cedefb
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerConfigurator.c
@@ -0,0 +1,51 @@
+#include "Types.h"
+#include "TimerConfigurator.h"
+#include "TimerInterruptConfigurator.h"
+
+void Timer_EnablePeripheralClocks(void)
+{
+  AT91C_BASE_PMC->PMC_PCER = TIMER0_CLOCK_ENABLE | PIOB_CLOCK_ENABLE;
+}
+
+void Timer_Reset(void)
+{
+  uint32 dummy;
+  AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKDIS;
+  AT91C_BASE_TC0->TC_IDR = 0xffffffff;
+  dummy = AT91C_BASE_TC0->TC_SR;
+  dummy = dummy;
+}
+
+void Timer_ConfigureMode(void)
+{
+  AT91C_BASE_TC0->TC_CMR = 0x000CC004; // ACPC=toggle TIOA on RC compare; mode=WAVE; WAVE_SEL=UP w/auto-trigger on RC compare; clock=MCK/1024
+}
+
+void Timer_ConfigurePeriod(void)
+{
+  AT91C_BASE_TC0->TC_RC = 469; // 10ms period for timer clock source of MCK/1024 with MCK=48054857
+}
+
+void Timer_EnableOutputPin(void)
+{
+  AT91C_BASE_PIOB->PIO_PDR = TIOA0_PIN_MASK;
+}
+
+void Timer_Enable(void)
+{
+  AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN;
+}
+
+void Timer_ConfigureInterruptHandler(void)
+{
+  Timer_DisableInterrupt();
+  Timer_ResetSystemTime();
+  Timer_ConfigureInterrupt();
+  Timer_EnableInterrupt();
+}
+
+void Timer_Start(void)
+{
+  AT91C_BASE_TC0->TC_CCR = AT91C_TC_SWTRG;
+}
+
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerConfigurator.h b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerConfigurator.h
new file mode 100644
index 000000000..d078c54e6
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerConfigurator.h
@@ -0,0 +1,15 @@
+#ifndef _TIMERCONFIGURATOR_H
+#define _TIMERCONFIGURATOR_H
+
+#include "Types.h"
+
+void Timer_EnablePeripheralClocks(void);
+void Timer_Reset(void);
+void Timer_ConfigureMode(void);
+void Timer_ConfigurePeriod(void);
+void Timer_EnableOutputPin(void);
+void Timer_Enable(void);
+void Timer_ConfigureInterruptHandler(void);
+void Timer_Start(void);
+
+#endif // _TIMERCONFIGURATOR_H
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerHardware.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerHardware.c
new file mode 100644
index 000000000..d5e983ff5
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerHardware.c
@@ -0,0 +1,15 @@
+#include "Types.h"
+#include "TimerHardware.h"
+#include "TimerConfigurator.h"
+
+void TimerHardware_Init(void)
+{
+  Timer_EnablePeripheralClocks();
+  Timer_Reset();
+  Timer_ConfigureMode();
+  Timer_ConfigurePeriod();
+  Timer_EnableOutputPin();
+  Timer_Enable();
+  Timer_ConfigureInterruptHandler();
+  Timer_Start();
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerHardware.h b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerHardware.h
new file mode 100644
index 000000000..92fa28710
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerHardware.h
@@ -0,0 +1,8 @@
+#ifndef _TIMERHARDWARE_H
+#define _TIMERHARDWARE_H
+
+#include "Types.h"
+
+void TimerHardware_Init(void);
+
+#endif // _TIMERHARDWARE_H
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerInterruptConfigurator.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerInterruptConfigurator.c
new file mode 100644
index 000000000..fe603ef32
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerInterruptConfigurator.c
@@ -0,0 +1,55 @@
+#include "Types.h"
+#include "TimerInterruptConfigurator.h"
+#include "TimerInterruptHandler.h"
+
+static inline void SetInterruptHandler(void);
+static inline void ConfigureInterruptSourceModeRegister(void);
+static inline void ClearInterrupt(void);
+static inline void EnableCompareInterruptForRegisterC(void);
+
+void Timer_DisableInterrupt(void)
+{
+  AT91C_BASE_AIC->AIC_IDCR = TIMER0_ID_MASK;
+}
+
+void Timer_ResetSystemTime(void)
+{
+  Timer_SetSystemTime(0);
+}
+
+void Timer_ConfigureInterrupt(void)
+{
+  SetInterruptHandler();
+  ConfigureInterruptSourceModeRegister();
+  ClearInterrupt();
+  EnableCompareInterruptForRegisterC();
+}
+
+void Timer_EnableInterrupt(void)
+{
+  AT91C_BASE_AIC->AIC_IECR = TIMER0_ID_MASK;
+}
+
+//
+// Helpers
+//
+
+static inline void SetInterruptHandler(void)
+{
+  AT91C_BASE_AIC->AIC_SVR[AT91C_ID_TC0] = (uint32)Timer_InterruptHandler;
+}
+
+static inline void ConfigureInterruptSourceModeRegister(void)
+{
+  AT91C_BASE_AIC->AIC_SMR[AT91C_ID_TC0] = 1;
+}
+
+static inline void ClearInterrupt(void)
+{
+  AT91C_BASE_AIC->AIC_ICCR = TIMER0_ID_MASK;
+}
+
+static inline void EnableCompareInterruptForRegisterC(void)
+{
+  AT91C_BASE_TC0->TC_IER = AT91C_TC_CPCS;
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerInterruptConfigurator.h b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerInterruptConfigurator.h
new file mode 100644
index 000000000..bdf64718d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerInterruptConfigurator.h
@@ -0,0 +1,13 @@
+#ifndef _TIMERINTERRUPTCONFIGURATOR_H
+#define _TIMERINTERRUPTCONFIGURATOR_H
+
+#include "Types.h"
+
+#define TIMER0_ID_MASK (((uint32)0x1) << AT91C_ID_TC0)
+
+void Timer_DisableInterrupt(void);
+void Timer_ResetSystemTime(void);
+void Timer_ConfigureInterrupt(void);
+void Timer_EnableInterrupt(void);
+
+#endif // _TIMERINTERRUPTCONFIGURATOR_H
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerInterruptHandler.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerInterruptHandler.c
new file mode 100644
index 000000000..ebb543d44
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerInterruptHandler.c
@@ -0,0 +1,25 @@
+#include "Types.h"
+#include "TimerInterruptHandler.h"
+#include "TimerInterruptConfigurator.h"
+
+static uint32 systemTime;
+
+void Timer_SetSystemTime(uint32 time)
+{
+  systemTime = time;
+}
+
+uint32 Timer_GetSystemTime(void)
+{
+  return systemTime;
+}
+
+void Timer_InterruptHandler(void)
+{
+  uint32 status = AT91C_BASE_TC0->TC_SR;
+  if (status & AT91C_TC_CPCS)
+  {
+    systemTime += 10;
+  }
+}
+
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerInterruptHandler.h b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerInterruptHandler.h
new file mode 100644
index 000000000..29c0413bb
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerInterruptHandler.h
@@ -0,0 +1,10 @@
+#ifndef _TIMERINTERRUPTHANDLER_H
+#define _TIMERINTERRUPTHANDLER_H
+
+#include "Types.h"
+
+void Timer_SetSystemTime(uint32 time);
+uint32 Timer_GetSystemTime(void);
+void Timer_InterruptHandler(void);
+
+#endif // _TIMERINTERRUPTHANDLER_H
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerModel.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerModel.c
new file mode 100644
index 000000000..fcc9db9bd
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerModel.c
@@ -0,0 +1,9 @@
+#include "Types.h"
+#include "TimerModel.h"
+#include "TaskScheduler.h"
+
+void TimerModel_UpdateTime(uint32 systemTime)
+{
+  TaskScheduler_Update(systemTime);
+}
+
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerModel.h b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerModel.h
new file mode 100644
index 000000000..54be21a47
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/TimerModel.h
@@ -0,0 +1,8 @@
+#ifndef _TIMERMODEL_H
+#define _TIMERMODEL_H
+
+#include "Types.h"
+
+void TimerModel_UpdateTime(uint32 systemTime);
+
+#endif // _TIMERMODEL_H
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/Types.h b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/Types.h
new file mode 100644
index 000000000..6a0f8247f
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/Types.h
@@ -0,0 +1,103 @@
+#ifndef _MYTYPES_H_
+#define _MYTYPES_H_
+
+#include "AT91SAM7X256.h"
+#include <math.h>
+
+#ifndef __monitor
+#define __monitor
+#endif
+
+// Peripheral Helper Definitions
+#define USART0_CLOCK_ENABLE (AT91C_ID_US0)
+#define USART0_TX_PIN       (AT91C_PA1_TXD0)
+#define TIMER0_CLOCK_ENABLE (((uint32)0x1) << AT91C_ID_TC0)
+#define PIOA_CLOCK_ENABLE   (((uint32)0x1) << AT91C_ID_PIOA)
+#define PIOB_CLOCK_ENABLE   (((uint32)0x1) << AT91C_ID_PIOB)
+#define TIOA0_PIN_MASK      (((uint32)0x1) << 23) // Timer/Counter Output Pin
+
+// Application Type Definitions
+typedef unsigned int uint32;
+typedef int int32;
+typedef unsigned short uint16;
+typedef short int16;
+typedef unsigned char uint8;
+typedef char int8;
+typedef char bool;
+
+// Application Special Value Definitions
+#ifndef TRUE
+#define TRUE      (1)
+#endif
+#ifndef FALSE
+#define FALSE     (0)
+#endif
+#ifndef NULL
+#define NULL      (0)
+#endif // NULL
+#define DONT_CARE (0)
+
+#ifndef INFINITY
+#define INFINITY (1.0 / 0.0)
+#endif
+
+#ifndef NAN
+#define NAN (0.0 / 0.0)
+#endif
+
+// MIN/MAX Definitions for Standard Types
+#ifndef INT8_MAX
+#define INT8_MAX 127
+#endif
+
+#ifndef INT8_MIN
+#define INT8_MIN (-128)
+#endif
+
+#ifndef UINT8_MAX
+#define UINT8_MAX 0xFFU
+#endif
+
+#ifndef UINT8_MIN
+#define UINT8_MIN 0x00U
+#endif
+
+#ifndef INT16_MAX
+#define INT16_MAX 32767
+#endif
+
+#ifndef INT16_MIN
+#define INT16_MIN (-32768)
+#endif
+
+#ifndef UINT16_MAX
+#define UINT16_MAX 0xFFFFU
+#endif
+
+#ifndef UINT16_MIN
+#define UINT16_MIN 0x0000U
+#endif
+
+#ifndef INT32_MAX
+#define INT32_MAX 0x7FFFFFFF
+#endif
+
+#ifndef INT32_MIN
+#define INT32_MIN (-INT32_MAX - 1)
+#endif
+
+#ifndef UINT32_MAX
+#define UINT32_MAX 0xFFFFFFFFU
+#endif
+
+#ifndef UINT32_MIN
+#define UINT32_MIN 0x00000000U
+#endif
+
+typedef struct _EXAMPLE_STRUCT_T
+{
+    int x;
+    int y;
+} EXAMPLE_STRUCT_T;
+
+#endif // _MYTYPES_H_
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartBaudRateRegisterCalculator.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartBaudRateRegisterCalculator.c
new file mode 100644
index 000000000..f4ad1470f
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartBaudRateRegisterCalculator.c
@@ -0,0 +1,18 @@
+#include "Types.h"
+#include "UsartBaudRateRegisterCalculator.h"
+
+uint8 UsartModel_CalculateBaudRateRegisterSetting(uint32 masterClock, uint32 baudRate)
+{
+  uint32 registerSetting = ((masterClock * 10) / (baudRate * 16));
+
+  if ((registerSetting % 10) >= 5)
+  {
+    registerSetting = (registerSetting / 10) + 1;
+  }
+  else
+  {
+    registerSetting /= 10;
+  }
+
+  return (uint8)registerSetting;
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartBaudRateRegisterCalculator.h b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartBaudRateRegisterCalculator.h
new file mode 100644
index 000000000..50e904875
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartBaudRateRegisterCalculator.h
@@ -0,0 +1,6 @@
+#ifndef _USARTBAUDRATEREGISTERCALCULATOR_H
+#define _USARTBAUDRATEREGISTERCALCULATOR_H
+
+uint8 UsartModel_CalculateBaudRateRegisterSetting(uint32 masterClock, uint32 baudRate);
+
+#endif // _USARTBAUDRATEREGISTERCALCULATOR_H
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartConductor.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartConductor.c
new file mode 100644
index 000000000..3eeec3c1b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartConductor.c
@@ -0,0 +1,21 @@
+#include "Types.h"
+#include "UsartConductor.h"
+#include "UsartHardware.h"
+#include "UsartModel.h"
+#include "TaskScheduler.h"
+
+void UsartConductor_Init(void)
+{
+  UsartHardware_Init(UsartModel_GetBaudRateRegisterSetting());
+  UsartHardware_TransmitString(UsartModel_GetWakeupMessage());
+}
+
+void UsartConductor_Run(void)
+{
+  char* temp;
+  if (TaskScheduler_DoUsart())
+  {
+    temp = UsartModel_GetFormattedTemperature();
+    UsartHardware_TransmitString(temp);
+  }
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartConductor.h b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartConductor.h
new file mode 100644
index 000000000..f4207365f
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartConductor.h
@@ -0,0 +1,7 @@
+#ifndef _USARTCONDUCTOR_H
+#define _USARTCONDUCTOR_H
+
+void UsartConductor_Init(void);
+void UsartConductor_Run(void);
+
+#endif // _USARTCONDUCTOR_H
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartConfigurator.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartConfigurator.c
new file mode 100644
index 000000000..b8c2cdc73
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartConfigurator.c
@@ -0,0 +1,39 @@
+#include "Types.h"
+#include "UsartConfigurator.h"
+
+void Usart_ConfigureUsartIO(void)
+{
+  AT91C_BASE_PIOA->PIO_ASR = USART0_TX_PIN;
+  AT91C_BASE_PIOA->PIO_BSR = 0;
+  AT91C_BASE_PIOA->PIO_PDR = USART0_TX_PIN;
+}
+
+void Usart_EnablePeripheralClock(void)
+{
+  AT91C_BASE_PMC->PMC_PCER = ((uint32)1) << USART0_CLOCK_ENABLE;
+}
+
+void Usart_Reset(void)
+{
+  AT91C_BASE_US0->US_IDR = 0xffffffff;
+  AT91C_BASE_US0->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RXDIS | AT91C_US_TXDIS;
+}
+
+void Usart_ConfigureMode(void)
+{
+  AT91C_BASE_US0->US_MR = AT91C_US_USMODE_NORMAL |
+                          AT91C_US_NBSTOP_1_BIT |
+                          AT91C_US_PAR_NONE |
+                          AT91C_US_CHRL_8_BITS |
+                          AT91C_US_CLKS_CLOCK;
+}
+
+void Usart_SetBaudRateRegister(uint8 baudRateRegisterSetting)
+{
+  AT91C_BASE_US0->US_BRGR = baudRateRegisterSetting;
+}
+
+void Usart_Enable(void)
+{
+  AT91C_BASE_US0->US_CR = AT91C_US_TXEN;
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartConfigurator.h b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartConfigurator.h
new file mode 100644
index 000000000..02bede2ab
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartConfigurator.h
@@ -0,0 +1,13 @@
+#ifndef _USARTCONFIGURATOR_H
+#define _USARTCONFIGURATOR_H
+
+#include "Types.h"
+
+void Usart_ConfigureUsartIO(void);
+void Usart_EnablePeripheralClock(void);
+void Usart_Reset(void);
+void Usart_ConfigureMode(void);
+void Usart_SetBaudRateRegister(uint8 baudRateRegisterSetting);
+void Usart_Enable(void);
+
+#endif // _USARTCONFIGURATOR_H
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartHardware.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartHardware.c
new file mode 100644
index 000000000..e37c2c606
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartHardware.c
@@ -0,0 +1,22 @@
+#include "Types.h"
+#include "UsartHardware.h"
+#include "UsartConfigurator.h"
+#include "UsartPutChar.h"
+
+void UsartHardware_Init(uint8 baudRateRegisterSetting)
+{
+  Usart_ConfigureUsartIO();
+  Usart_EnablePeripheralClock();
+  Usart_Reset();
+  Usart_ConfigureMode();
+  Usart_SetBaudRateRegister(baudRateRegisterSetting);
+  Usart_Enable();
+}
+
+void UsartHardware_TransmitString(char* data)
+{
+  while(*data != NULL)
+  {
+    Usart_PutChar(*data++);
+  }
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartHardware.h b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartHardware.h
new file mode 100644
index 000000000..041e28086
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartHardware.h
@@ -0,0 +1,9 @@
+#ifndef _USARTHARDWARE_H
+#define _USARTHARDWARE_H
+
+#include "Types.h"
+
+void UsartHardware_Init(uint8 baudRateRegisterSetting);
+void UsartHardware_TransmitString(char* data);
+
+#endif // _USARTHARDWARE_H
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartModel.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartModel.c
new file mode 100644
index 000000000..d722a2f3e
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartModel.c
@@ -0,0 +1,34 @@
+#include "Types.h"
+#include "UsartModel.h"
+#include "ModelConfig.h"
+#include "UsartBaudRateRegisterCalculator.h"
+#include "TemperatureFilter.h"
+#include <stdio.h>
+#include <math.h>
+
+char formattedTemperature[32];
+char* wakeup = "It's Awesome Time!\n";
+
+uint8 UsartModel_GetBaudRateRegisterSetting(void)
+{
+  return UsartModel_CalculateBaudRateRegisterSetting(MASTER_CLOCK, USART0_BAUDRATE);
+}
+
+char* UsartModel_GetFormattedTemperature(void)
+{
+  float temperature = TemperatureFilter_GetTemperatureInCelcius();
+  if (temperature == -INFINITY)
+  {
+    sprintf(formattedTemperature, "%s", "Temperature sensor failure!\n");
+  }
+  else
+  {
+    sprintf(formattedTemperature, "%.1f C\n", temperature);
+  }
+  return formattedTemperature;
+}
+
+char* UsartModel_GetWakeupMessage(void)
+{
+  return wakeup;
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartModel.h b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartModel.h
new file mode 100644
index 000000000..7d9485440
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartModel.h
@@ -0,0 +1,10 @@
+#ifndef _USARTMODEL_H
+#define _USARTMODEL_H
+
+#include "Types.h"
+
+uint8 UsartModel_GetBaudRateRegisterSetting(void);
+char* UsartModel_GetFormattedTemperature(void);
+char* UsartModel_GetWakeupMessage(void);
+
+#endif // _USARTMODEL_H
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartPutChar.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartPutChar.c
new file mode 100644
index 000000000..9e3ce2c8b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartPutChar.c
@@ -0,0 +1,16 @@
+#include "Types.h"
+#include "UsartPutChar.h"
+#include "UsartTransmitBufferStatus.h"
+#ifdef SIMULATE
+#include <stdio.h>
+#endif
+
+void Usart_PutChar(char data)
+{
+  while(!Usart_ReadyToTransmit());
+#ifdef SIMULATE
+  printf("%c", data);
+#else
+  AT91C_BASE_US0->US_THR = data;
+#endif
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartPutChar.h b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartPutChar.h
new file mode 100644
index 000000000..924446ab9
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartPutChar.h
@@ -0,0 +1,8 @@
+#ifndef _USARTPUT_HAR_H
+#define _USARTPUT_HAR_H
+
+#include "Types.h"
+
+void Usart_PutChar(char data);
+
+#endif // _USARTPUT_HAR_H
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartTransmitBufferStatus.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartTransmitBufferStatus.c
new file mode 100644
index 000000000..914b2e147
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartTransmitBufferStatus.c
@@ -0,0 +1,7 @@
+#include "Types.h"
+#include "UsartTransmitBufferStatus.h"
+
+bool Usart_ReadyToTransmit(void)
+{
+  return (AT91C_BASE_US0->US_CSR & AT91C_US_TXRDY) > 0;
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartTransmitBufferStatus.h b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartTransmitBufferStatus.h
new file mode 100644
index 000000000..b5925ba21
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/src/UsartTransmitBufferStatus.h
@@ -0,0 +1,8 @@
+#ifndef _USARTTRANSMITBUFFERSTATUS_H
+#define _USARTTRANSMITBUFFERSTATUS_H
+
+#include "Types.h"
+
+bool Usart_ReadyToTransmit(void);
+
+#endif // _USARTTRANSMITBUFFERSTATUS_H
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestAdcConductor.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestAdcConductor.c
new file mode 100644
index 000000000..a15d7d1b4
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestAdcConductor.c
@@ -0,0 +1,121 @@
+#include "unity.h"
+#include "UnityHelper.h"
+#include "Types.h"
+#include "Types.h"
+#include "AdcConductor.h"
+#include "MockAdcModel.h"
+#include "MockAdcHardware.h"
+
+void setUp(void)
+{
+}
+
+void tearDown(void)
+{
+}
+
+void testInitShouldCallHardwareInit(void)
+{
+  AdcHardware_Init_Expect();
+  AdcConductor_Init();
+}
+
+void testRunShouldNotDoAnythingIfItIsNotTime(void)
+{
+  AdcModel_DoGetSample_ExpectAndReturn(FALSE);
+
+  AdcConductor_Run();
+}
+
+void testRunShouldNotPassAdcResultToModelIfSampleIsNotComplete(void)
+{
+  AdcModel_DoGetSample_ExpectAndReturn(TRUE);
+  AdcHardware_GetSampleComplete_ExpectAndReturn(FALSE);
+
+  AdcConductor_Run();
+}
+
+void testRunShouldGetLatestSampleFromAdcAndPassItToModelAndStartNewConversionWhenItIsTime(void)
+{
+  AdcModel_DoGetSample_ExpectAndReturn(TRUE);
+  AdcHardware_GetSampleComplete_ExpectAndReturn(TRUE);
+  AdcHardware_GetSample_ExpectAndReturn(293U);
+  AdcModel_ProcessInput_Expect(293U);
+  AdcHardware_StartConversion_Expect();
+
+  AdcConductor_Run();
+}
+
+void testJustHereToTest_Should_ProperlyPassAStructAndVerifyIt(void)
+{
+    EXAMPLE_STRUCT_T TestStruct;
+    TestStruct.x = 5;
+    TestStruct.y = 7;
+
+    AdcModel_DoNothingExceptTestASpecialType_ExpectAndReturn(TestStruct, TRUE);
+
+    TEST_ASSERT_TRUE(AdcConductor_JustHereToTest());
+}
+
+//void testJustHereToTest_Should_FailThisTestIfYouUncommentXIsBecauseItsWrong(void)
+//{
+//    EXAMPLE_STRUCT_T TestStruct;
+//    TestStruct.x = 6;
+//    TestStruct.y = 7;
+//
+//    AdcModel_DoNothingExceptTestASpecialType_ExpectAndReturn(TestStruct, TRUE);
+//
+//    TEST_ASSERT_TRUE(AdcConductor_JustHereToTest());
+//}
+//
+//void testJustHereToTest_Should_FailThisTestIfYouUncommentYIsBecauseItsWrong(void)
+//{
+//    EXAMPLE_STRUCT_T TestStruct;
+//    TestStruct.x = 5;
+//    TestStruct.y = 8;
+//
+//    AdcModel_DoNothingExceptTestASpecialType_ExpectAndReturn(TestStruct, TRUE);
+//
+//    TEST_ASSERT_TRUE(AdcConductor_JustHereToTest());
+//}
+
+void test_AdcConductor_AlsoHereToTest_Should_ProperlyReturnAStructAsExpected1(void)
+{
+    EXAMPLE_STRUCT_T TestStruct;
+    TestStruct.x = 99;
+    TestStruct.y = 1;
+
+    AdcModel_DoNothingExceptReturnASpecialType_ExpectAndReturn(TestStruct);
+
+    TEST_ASSERT_TRUE(AdcConductor_AlsoHereToTest());
+}
+
+void test_AdcConductor_AlsoHereToTest_Should_ProperlyReturnAStructAsExpected2(void)
+{
+    EXAMPLE_STRUCT_T TestStruct;
+    TestStruct.x = 98;
+    TestStruct.y = 1;
+
+    AdcModel_DoNothingExceptReturnASpecialType_ExpectAndReturn(TestStruct);
+
+    TEST_ASSERT_FALSE(AdcConductor_AlsoHereToTest());
+}
+
+void test_AdcConductor_YetAnotherTest_Should_VerifyThatPointersToStructsAreTestable(void)
+{
+    uint32 TestNum = 3;
+
+    AdModel_DoNothingExceptTestPointers_ExpectAndReturn(&TestNum, TRUE);
+
+    TEST_ASSERT_TRUE(AdcConductor_YetAnotherTest());
+}
+
+//void test_AdcConductor_YetAnotherTest_Should_FailIfYouUncommentThisTestBecauseTheValuePointedToIsWrong(void)
+//{
+//    uint32 TestNum = 7;
+//
+//    AdModel_DoNothingExceptTestPointers_ExpectAndReturn(&TestNum, FALSE);
+//
+//    TEST_ASSERT_FALSE(AdcConductor_YetAnotherTest());
+//}
+
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestAdcHardware.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestAdcHardware.c
new file mode 100644
index 000000000..7aabaa759
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestAdcHardware.c
@@ -0,0 +1,44 @@
+#include "unity.h"
+#include "Types.h"
+#include "AdcHardware.h"
+#include "MockAdcHardwareConfigurator.h"
+#include "MockAdcTemperatureSensor.h"
+
+void setUp(void)
+{
+}
+
+void tearDown(void)
+{
+}
+
+void testInitShouldDelegateToConfiguratorAndTemperatureSensor(void)
+{
+  Adc_Reset_Expect();
+  Adc_ConfigureMode_Expect();
+  Adc_EnableTemperatureChannel_Expect();
+  Adc_StartTemperatureSensorConversion_Expect();
+
+  AdcHardware_Init();
+}
+
+void testGetSampleCompleteShouldReturn_FALSE_WhenTemperatureSensorSampleReadyReturns_FALSE(void)
+{
+  Adc_TemperatureSensorSampleReady_ExpectAndReturn(FALSE);
+  TEST_ASSERT(!AdcHardware_GetSampleComplete());
+}
+
+void testGetSampleCompleteShouldReturn_TRUE_WhenTemperatureSensorSampleReadyReturns_TRUE(void)
+{
+  Adc_TemperatureSensorSampleReady_ExpectAndReturn(TRUE);
+  TEST_ASSERT(AdcHardware_GetSampleComplete());
+}
+
+void testGetSampleShouldDelegateToAdcTemperatureSensor(void)
+{
+  uint16 sample;
+  Adc_ReadTemperatureSensor_ExpectAndReturn(847);
+
+  sample = AdcHardware_GetSample();
+  TEST_ASSERT_EQUAL(847, sample);
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestAdcHardwareConfigurator.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestAdcHardwareConfigurator.c
new file mode 100644
index 000000000..c1feceb71
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestAdcHardwareConfigurator.c
@@ -0,0 +1,43 @@
+#include "unity.h"
+#include "Types.h"
+#include "AdcHardwareConfigurator.h"
+#include "AT91SAM7X256.h"
+#include "ModelConfig.h"
+
+AT91S_ADC AdcPeripheral;
+
+void setUp(void)
+{
+
+}
+
+void tearDown(void)
+{
+}
+
+void testResetShouldResetTheAdcConverterPeripheral(void)
+{
+  AT91C_BASE_ADC->ADC_CR = 0;
+  Adc_Reset();
+  TEST_ASSERT_EQUAL(AT91C_ADC_SWRST, AT91C_BASE_ADC->ADC_CR);
+}
+
+void testConfigureModeShouldSetAdcModeRegisterAppropriately(void)
+{
+  uint32 prescaler = (MASTER_CLOCK / (2 * 2000000)) - 1; // 5MHz ADC clock
+
+  AT91C_BASE_ADC->ADC_MR = 0;
+
+  Adc_ConfigureMode();
+
+  TEST_ASSERT_EQUAL(prescaler, (AT91C_BASE_ADC->ADC_MR & AT91C_ADC_PRESCAL) >> 8);
+}
+
+void testEnableTemperatureChannelShouldEnableTheAppropriateAdcInput(void)
+{
+  AT91C_BASE_ADC->ADC_CHER = 0;
+
+  Adc_EnableTemperatureChannel();
+
+  TEST_ASSERT_EQUAL(0x1 << 4, AT91C_BASE_ADC->ADC_CHER);
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestAdcModel.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestAdcModel.c
new file mode 100644
index 000000000..f1dcb4aae
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestAdcModel.c
@@ -0,0 +1,33 @@
+#include "unity.h"
+#include "Types.h"
+#include "AdcModel.h"
+#include "MockTaskScheduler.h"
+#include "MockTemperatureCalculator.h"
+#include "MockTemperatureFilter.h"
+
+void setUp(void)
+{
+}
+
+void tearDown(void)
+{
+}
+
+void testDoGetSampleShouldReturn_FALSE_WhenTaskSchedulerReturns_FALSE(void)
+{
+  TaskScheduler_DoAdc_ExpectAndReturn(FALSE);
+  TEST_ASSERT_EQUAL(FALSE, AdcModel_DoGetSample());
+}
+
+void testDoGetSampleShouldReturn_TRUE_WhenTaskSchedulerReturns_TRUE(void)
+{
+  TaskScheduler_DoAdc_ExpectAndReturn(TRUE);
+  TEST_ASSERT_EQUAL(TRUE, AdcModel_DoGetSample());
+}
+
+void testProcessInputShouldDelegateToTemperatureCalculatorAndPassResultToFilter(void)
+{
+  TemperatureCalculator_Calculate_ExpectAndReturn(21473, 23.5f);
+  TemperatureFilter_ProcessInput_Expect(23.5f);
+  AdcModel_ProcessInput(21473);
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestAdcTemperatureSensor.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestAdcTemperatureSensor.c
new file mode 100644
index 000000000..0be339ff2
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestAdcTemperatureSensor.c
@@ -0,0 +1,47 @@
+#include "unity.h"
+#include "Types.h"
+#include "AdcTemperatureSensor.h"
+#include "AT91SAM7X256.h"
+
+AT91S_ADC AdcPeripheral;
+
+void setUp(void)
+{
+}
+
+void tearDown(void)
+{
+}
+
+void testShouldStartTemperatureSensorConversionWhenTriggered(void)
+{
+  AT91C_BASE_ADC->ADC_CR = 0;
+  Adc_StartTemperatureSensorConversion();
+  TEST_ASSERT_EQUAL(AT91C_ADC_START, AT91C_BASE_ADC->ADC_CR);
+}
+
+void testTemperatureSensorSampleReadyShouldReturnChannelConversionCompletionStatus(void)
+{
+  AT91C_BASE_ADC->ADC_SR = 0;
+  TEST_ASSERT_EQUAL(FALSE, Adc_TemperatureSensorSampleReady());
+  AT91C_BASE_ADC->ADC_SR = ~AT91C_ADC_EOC4;
+  TEST_ASSERT_EQUAL(FALSE, Adc_TemperatureSensorSampleReady());
+  AT91C_BASE_ADC->ADC_SR = AT91C_ADC_EOC4;
+  TEST_ASSERT_EQUAL(TRUE, Adc_TemperatureSensorSampleReady());
+  AT91C_BASE_ADC->ADC_SR = 0xffffffff;
+  TEST_ASSERT_EQUAL(TRUE, Adc_TemperatureSensorSampleReady());
+}
+
+void testReadTemperatureSensorShouldFetchAndTranslateLatestReadingToMillivolts(void)
+{
+  uint16 result;
+
+  // ADC bit weight at 10-bit resolution with 3.0V reference = 2.9296875 mV/LSB
+  AT91C_BASE_ADC->ADC_CDR4 = 138;
+  result = Adc_ReadTemperatureSensor();
+  TEST_ASSERT_EQUAL(404, result);
+
+  AT91C_BASE_ADC->ADC_CDR4 = 854;
+  result = Adc_ReadTemperatureSensor();
+  TEST_ASSERT_EQUAL(2502, result);
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestExecutor.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestExecutor.c
new file mode 100644
index 000000000..8e4832620
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestExecutor.c
@@ -0,0 +1,36 @@
+#include "unity.h"
+#include "Types.h"
+#include "Executor.h"
+#include "MockModel.h"
+#include "MockUsartConductor.h"
+#include "MockAdcConductor.h"
+#include "MockTimerConductor.h"
+#include "MockIntrinsicsWrapper.h"
+
+void setUp(void)
+{
+}
+
+void tearDown(void)
+{
+}
+
+void testInitShouldCallInitOfAllConductorsAndTheModel(void)
+{
+  Model_Init_Expect();
+  UsartConductor_Init_Expect();
+  AdcConductor_Init_Expect();
+  TimerConductor_Init_Expect();
+  Interrupt_Enable_Expect();
+  
+  Executor_Init();
+}
+
+void testRunShouldCallRunForEachConductorAndReturnTrueAlways(void)
+{
+  UsartConductor_Run_Expect();
+  TimerConductor_Run_Expect();
+  AdcConductor_Run_Expect();
+
+  TEST_ASSERT_EQUAL(TRUE, Executor_Run());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestMain.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestMain.c
new file mode 100644
index 000000000..baf338290
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestMain.c
@@ -0,0 +1,24 @@
+#include "unity.h"
+#include "Types.h"
+#include "MockExecutor.h"
+#include "Main.h"
+
+void setUp(void)
+{
+}
+
+void tearDown(void)
+{
+}
+
+void testMainShouldCallExecutorInitAndContinueToCallExecutorRunUntilHalted(void)
+{
+  Executor_Init_Expect();
+  Executor_Run_ExpectAndReturn(TRUE);
+  Executor_Run_ExpectAndReturn(TRUE);
+  Executor_Run_ExpectAndReturn(TRUE);
+  Executor_Run_ExpectAndReturn(TRUE);
+  Executor_Run_ExpectAndReturn(FALSE);
+  
+  AppMain();
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestModel.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestModel.c
new file mode 100644
index 000000000..59dda1dc7
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestModel.c
@@ -0,0 +1,20 @@
+#include "unity.h"
+#include "Types.h"
+#include "Model.h"
+#include "MockTaskScheduler.h"
+#include "MockTemperatureFilter.h"
+
+void setUp(void)
+{
+}
+
+void tearDown(void)
+{
+}
+
+void testInitShouldCallSchedulerAndTemperatureFilterInit(void)
+{
+  TaskScheduler_Init_Expect();
+  TemperatureFilter_Init_Expect();
+  Model_Init();
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestTaskScheduler.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestTaskScheduler.c
new file mode 100644
index 000000000..29d1edf1d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestTaskScheduler.c
@@ -0,0 +1,104 @@
+#include "unity.h"
+#include "Types.h"
+#include "TaskScheduler.h"
+
+void setUp(void)
+{
+  TaskScheduler_Init();
+}
+
+void tearDown(void)
+{
+}
+
+void testShouldScheduleUsartTaskAfter1000ms(void)
+{
+  TEST_ASSERT_EQUAL(FALSE, TaskScheduler_DoUsart());
+
+  TaskScheduler_Update(999);
+  TEST_ASSERT_EQUAL(FALSE, TaskScheduler_DoUsart());
+
+  TaskScheduler_Update(1000);
+  TEST_ASSERT_EQUAL(TRUE, TaskScheduler_DoUsart());
+}
+
+void testShouldClearUsartDoFlagAfterReported(void)
+{
+  TEST_ASSERT_EQUAL(FALSE, TaskScheduler_DoUsart());
+  TaskScheduler_Update(1000);
+  TEST_ASSERT_EQUAL(TRUE, TaskScheduler_DoUsart());
+  TEST_ASSERT_EQUAL(FALSE, TaskScheduler_DoUsart());
+}
+
+void testShouldScheduleUsartTaskEvery1000ms(void)
+{
+  TEST_ASSERT_EQUAL(FALSE, TaskScheduler_DoUsart());
+
+  TaskScheduler_Update(1300);
+  TEST_ASSERT_EQUAL(TRUE, TaskScheduler_DoUsart());
+
+  TaskScheduler_Update(2000);
+  TEST_ASSERT_EQUAL(TRUE, TaskScheduler_DoUsart());
+
+  TaskScheduler_Update(3100);
+  TEST_ASSERT_EQUAL(TRUE, TaskScheduler_DoUsart());
+}
+
+void testShouldScheduleUsartTaskOnlyOncePerPeriod(void)
+{
+  TEST_ASSERT_EQUAL(FALSE, TaskScheduler_DoUsart());
+  TaskScheduler_Update(1000);
+  TEST_ASSERT_EQUAL(TRUE, TaskScheduler_DoUsart());
+  TaskScheduler_Update(1001);
+  TEST_ASSERT_EQUAL(FALSE, TaskScheduler_DoUsart());
+  TaskScheduler_Update(1999);
+  TEST_ASSERT_EQUAL(FALSE, TaskScheduler_DoUsart());
+  TaskScheduler_Update(2000);
+  TEST_ASSERT_EQUAL(TRUE, TaskScheduler_DoUsart());
+}
+
+void testShouldScheduleAdcTaskAfter100ms(void)
+{
+  TEST_ASSERT_EQUAL(FALSE, TaskScheduler_DoAdc());
+
+  TaskScheduler_Update(99);
+  TEST_ASSERT_EQUAL(FALSE, TaskScheduler_DoAdc());
+
+  TaskScheduler_Update(100);
+  TEST_ASSERT_EQUAL(TRUE, TaskScheduler_DoAdc());
+}
+
+void testShouldClearAdcDoFlagAfterReported(void)
+{
+  TEST_ASSERT_EQUAL(FALSE, TaskScheduler_DoAdc());
+  TaskScheduler_Update(100);
+  TEST_ASSERT_EQUAL(TRUE, TaskScheduler_DoAdc());
+  TEST_ASSERT_EQUAL(FALSE, TaskScheduler_DoAdc());
+}
+
+void testShouldScheduleAdcTaskEvery100ms(void)
+{
+  TEST_ASSERT_EQUAL(FALSE, TaskScheduler_DoAdc());
+
+  TaskScheduler_Update(121);
+  TEST_ASSERT_EQUAL(TRUE, TaskScheduler_DoAdc());
+
+  TaskScheduler_Update(200);
+  TEST_ASSERT_EQUAL(TRUE, TaskScheduler_DoAdc());
+
+  TaskScheduler_Update(356);
+  TEST_ASSERT_EQUAL(TRUE, TaskScheduler_DoAdc());
+}
+
+void testShouldScheduleAdcTaskOnlyOncePerPeriod(void)
+{
+  TEST_ASSERT_EQUAL(FALSE, TaskScheduler_DoAdc());
+  TaskScheduler_Update(100);
+  TEST_ASSERT_EQUAL(TRUE, TaskScheduler_DoAdc());
+  TaskScheduler_Update(101);
+  TEST_ASSERT_EQUAL(FALSE, TaskScheduler_DoAdc());
+  TaskScheduler_Update(199);
+  TEST_ASSERT_EQUAL(FALSE, TaskScheduler_DoAdc());
+  TaskScheduler_Update(200);
+  TEST_ASSERT_EQUAL(TRUE, TaskScheduler_DoAdc());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestTemperatureCalculator.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestTemperatureCalculator.c
new file mode 100644
index 000000000..dbb7dea06
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestTemperatureCalculator.c
@@ -0,0 +1,33 @@
+#include "unity.h"
+#include "Types.h"
+#include "TemperatureCalculator.h"
+#include <math.h>
+
+void setUp(void)
+{
+}
+
+void tearDown(void)
+{
+}
+
+void testTemperatureCalculatorShouldCalculateTemperatureFromMillivolts(void)
+{
+  float result;
+
+  // Series resistor is 5k Ohms; Reference voltage is 3.0V
+  // R(t) = A * e^(B*t); R is resistance of thermisor; t is temperature in C
+  result = TemperatureCalculator_Calculate(1000);
+  TEST_ASSERT_FLOAT_WITHIN(0.01f, 25.0f, result);
+
+  result = TemperatureCalculator_Calculate(2985);
+  TEST_ASSERT_FLOAT_WITHIN(0.01f, 68.317f, result);
+
+  result = TemperatureCalculator_Calculate(3);
+  TEST_ASSERT_FLOAT_WITHIN(0.01f, -19.96f, result);
+}
+
+void testShouldReturnNegativeInfinityWhen_0_millivoltsInput(void)
+{
+  TEST_ASSERT_FLOAT_WITHIN(0.0000001f, -INFINITY, TemperatureCalculator_Calculate(0));
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestTemperatureFilter.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestTemperatureFilter.c
new file mode 100644
index 000000000..58fb178f1
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestTemperatureFilter.c
@@ -0,0 +1,69 @@
+#include "unity.h"
+#include "Types.h"
+#include "TemperatureFilter.h"
+#include <math.h>
+
+void setUp(void)
+{
+  TemperatureFilter_Init();
+}
+
+void tearDown(void)
+{
+}
+
+void testShouldInitializeTemeratureToInvalidValue(void)
+{
+  TemperatureFilter_Init();
+  TEST_ASSERT_FLOAT_WITHIN(0.0001f, -INFINITY, TemperatureFilter_GetTemperatureInCelcius());
+}
+
+void testShouldInitializeTemperatureAfterCallToInit(void)
+{
+  TemperatureFilter_Init();
+  TemperatureFilter_ProcessInput(17.8f);
+  TEST_ASSERT_FLOAT_WITHIN(0.0001f, 17.8f, TemperatureFilter_GetTemperatureInCelcius());
+
+  TemperatureFilter_Init();
+  TemperatureFilter_ProcessInput(32.6f);
+  TEST_ASSERT_FLOAT_WITHIN(0.0001f, 32.6f, TemperatureFilter_GetTemperatureInCelcius());
+}
+
+void setValueAndVerifyResponse(float input, float response)
+{
+  float actual;
+  TemperatureFilter_ProcessInput(input);
+  actual = TemperatureFilter_GetTemperatureInCelcius();
+  TEST_ASSERT_FLOAT_WITHIN(0.0001f, response, actual);
+}
+
+void testShouldWeightEachSubsequentValueBy25PercentAfterInitialValue(void)
+{
+  TemperatureFilter_Init();
+  setValueAndVerifyResponse(0.0f, 0.0f);
+  setValueAndVerifyResponse(10.0f, 2.5f);
+  setValueAndVerifyResponse(10.0f, 4.375f);
+  setValueAndVerifyResponse(10.0f, 5.78125f);
+
+  TemperatureFilter_Init();
+  setValueAndVerifyResponse(100.0f, 100.0f);
+  setValueAndVerifyResponse(0.0f, 75.0f);
+  setValueAndVerifyResponse(0.0f, 56.25f);
+  setValueAndVerifyResponse(0.0f, 42.1875f);
+}
+
+void setInvalidTemperatureAndVerifyReinitialized(float invalidTemperature)
+{
+  TemperatureFilter_Init();
+  setValueAndVerifyResponse(100.0f, 100.0f);
+  setValueAndVerifyResponse(invalidTemperature, -INFINITY);
+  setValueAndVerifyResponse(14.3f, 14.3f);
+}
+
+void testShouldResetAverageIfPassedInfinityOrInvalidValue(void)
+{
+  setInvalidTemperatureAndVerifyReinitialized(-INFINITY);
+  setInvalidTemperatureAndVerifyReinitialized(+INFINITY);
+  setInvalidTemperatureAndVerifyReinitialized(+NAN);
+  setInvalidTemperatureAndVerifyReinitialized(-NAN);
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestTimerConductor.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestTimerConductor.c
new file mode 100644
index 000000000..8064a8c51
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestTimerConductor.c
@@ -0,0 +1,32 @@
+#include "unity.h"
+#include "Types.h"
+#include "TimerConductor.h"
+#include "MockTimerHardware.h"
+#include "MockTimerModel.h"
+#include "MockTimerInterruptHandler.h"
+
+void setUp(void)
+{
+}
+
+void tearDown(void)
+{
+}
+
+void testInitShouldCallHardwareInit(void)
+{
+  TimerHardware_Init_Expect();
+
+  TimerConductor_Init();
+}
+
+void testRunShouldGetSystemTimeAndPassOnToModelForEventScheduling(void)
+{
+  Timer_GetSystemTime_ExpectAndReturn(1230);
+  TimerModel_UpdateTime_Expect(1230);
+  TimerConductor_Run();
+
+  Timer_GetSystemTime_ExpectAndReturn(837460);
+  TimerModel_UpdateTime_Expect(837460);
+  TimerConductor_Run();
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestTimerConfigurator.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestTimerConfigurator.c
new file mode 100644
index 000000000..5c7d4e044
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestTimerConfigurator.c
@@ -0,0 +1,112 @@
+#include "unity.h"
+#include "Types.h"
+#include "TimerConfigurator.h"
+#include "AT91SAM7X256.h"
+#include "MockTimerInterruptConfigurator.h"
+
+AT91S_PMC PmcPeripheral;
+AT91S_TC  TimerCounter0Peripheral;
+AT91S_PIO PioBPeripheral;
+
+void setUp(void)
+{
+}
+
+void tearDown(void)
+{
+}
+
+void testEnablePeripheralClocksShouldEnableClockToTimer0Peripheral(void)
+{
+  AT91C_BASE_PMC->PMC_PCER = 0;
+  Timer_EnablePeripheralClocks();
+  TEST_ASSERT_EQUAL(
+      TIMER0_CLOCK_ENABLE, 
+      AT91C_BASE_PMC->PMC_PCER & TIMER0_CLOCK_ENABLE);
+}
+
+void testEnablePeripheralClocksShouldEnableClockToPIOBPeripheral(void)
+{
+  AT91C_BASE_PMC->PMC_PCER = 0;
+  Timer_EnablePeripheralClocks();
+  TEST_ASSERT_EQUAL(
+      PIOB_CLOCK_ENABLE, 
+      AT91C_BASE_PMC->PMC_PCER & PIOB_CLOCK_ENABLE);
+}
+
+void testResetShouldSetTimer0ClockDisableBit_DisableTimer0Interrupts_ClearStatusRegister(void)
+{
+  AT91C_BASE_TC0->TC_CCR = 0;
+  AT91C_BASE_TC0->TC_IDR = 0;
+  AT91C_BASE_TC0->TC_SR = 0xFFFFFFFF;
+  Timer_Reset();
+  TEST_ASSERT_EQUAL(0x00000002, AT91C_BASE_TC0->TC_CCR);
+  TEST_ASSERT_EQUAL(0xffffffff, AT91C_BASE_TC0->TC_IDR);
+  // CANNOT BE VERIFIED!! TEST_ASSERT_EQUAL(0X00000000, AT91C_BASE_TC0->TC_SR);
+}
+
+void testEnableOutputPinShouldEnable_TIOA0_DigitalOutput(void)
+{
+  AT91C_BASE_PIOB->PIO_PDR = 0;
+  Timer_EnableOutputPin();
+  TEST_ASSERT_EQUAL(TIOA0_PIN_MASK, AT91C_BASE_PIOB->PIO_PDR);
+}
+
+void testConfigureModeShouldConfigureTimer0ClockSourceForMasterClockDividedBy1024(void)
+{
+  AT91C_BASE_TC0->TC_CMR = 0;
+  Timer_ConfigureMode();
+  TEST_ASSERT_EQUAL(0x00000004, AT91C_BASE_TC0->TC_CMR & 0x00000007);
+}
+
+void testConfigureModeShouldConfigureTimer0ForWaveGeneration(void)
+{
+  AT91C_BASE_TC0->TC_CMR = 0;
+  Timer_ConfigureMode();
+  TEST_ASSERT_EQUAL(0x00008000, AT91C_BASE_TC0->TC_CMR & 0x00008000);
+}
+
+void testConfigureModeShouldConfigureTimer0ForUpModeWithAutomaticTriggerOnRCCompare(void)
+{
+  AT91C_BASE_TC0->TC_CMR = 0;
+  Timer_ConfigureMode();
+  TEST_ASSERT_EQUAL(0x00004000, AT91C_BASE_TC0->TC_CMR & 0x00006000);
+}
+
+void testConfigureModeShouldConfigureTimer0ToToggleTIOAOnRCCompare(void)
+{
+  AT91C_BASE_TC0->TC_CMR = 0;
+  Timer_ConfigureMode();
+  TEST_ASSERT_EQUAL(0x000C0000, AT91C_BASE_TC0->TC_CMR & 0x000C0000);
+}
+
+void testConfigurePeriodShouldConfigureRegisterCFor10msInterval(void)
+{
+  AT91C_BASE_TC0->TC_RC = 0;
+  Timer_ConfigurePeriod();
+  TEST_ASSERT_EQUAL(469, AT91C_BASE_TC0->TC_RC);
+}
+
+void testEnableShouldSetEnableFlagForTimer0(void)
+{
+  AT91C_BASE_TC0->TC_CCR = 0;
+  Timer_Enable();
+  TEST_ASSERT_EQUAL_INT(1, AT91C_BASE_TC0->TC_CCR);
+}
+
+void testConfigureInterruptHandler(void)
+{
+  Timer_DisableInterrupt_Expect();
+  Timer_ResetSystemTime_Expect();
+  Timer_ConfigureInterrupt_Expect();
+  Timer_EnableInterrupt_Expect();
+
+  Timer_ConfigureInterruptHandler();
+}
+
+void testStartShouldSetSoftwareTriggerFlag(void)
+{
+  AT91C_BASE_TC0->TC_CCR = 0;
+  Timer_Start();
+  TEST_ASSERT_EQUAL(0x04, AT91C_BASE_TC0->TC_CCR);
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestTimerHardware.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestTimerHardware.c
new file mode 100644
index 000000000..16339d0ca
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestTimerHardware.c
@@ -0,0 +1,26 @@
+#include "unity.h"
+#include "Types.h"
+#include "TimerHardware.h"
+#include "MockTimerConfigurator.h"
+
+void setUp(void)
+{
+}
+
+void tearDown(void)
+{
+}
+
+void testInitShouldDelegateAppropriatelyToConfigurator(void)
+{
+  Timer_EnablePeripheralClocks_Expect();
+  Timer_Reset_Expect();
+  Timer_ConfigureMode_Expect();
+  Timer_ConfigurePeriod_Expect();
+  Timer_EnableOutputPin_Expect();
+  Timer_Enable_Expect();
+  Timer_ConfigureInterruptHandler_Expect();
+  Timer_Start_Expect();
+
+  TimerHardware_Init();
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestTimerInterruptConfigurator.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestTimerInterruptConfigurator.c
new file mode 100644
index 000000000..13c35f444
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestTimerInterruptConfigurator.c
@@ -0,0 +1,78 @@
+#include "unity.h"
+#include "Types.h"
+#include "TimerInterruptConfigurator.h"
+#include "MockTimerInterruptHandler.h"
+#include "AT91SAM7X256.h"
+
+AT91S_AIC AicPeripheral;
+AT91S_TC  TimerCounter0Peripheral;
+
+void setUp(void)
+{
+}
+
+void tearDown(void)
+{
+}
+
+void test_TIMER0_ID_MASK_ShouldBeCorrect(void)
+{
+  TEST_ASSERT_EQUAL(((uint32)0x1) << AT91C_ID_TC0, TIMER0_ID_MASK);
+}
+
+void testDisableInterruptDisablesTimer0InterruptInTheInterruptController(void)
+{
+  AT91C_BASE_AIC->AIC_IDCR = 0;
+  Timer_DisableInterrupt();
+  TEST_ASSERT_EQUAL(TIMER0_ID_MASK, AT91C_BASE_AIC->AIC_IDCR);
+}
+
+void testResetSystemTimeDelegatesTo_Timer_SetSystemTime_Appropriately(void)
+{
+  Timer_SetSystemTime_Expect(0);
+  Timer_ResetSystemTime();
+}
+
+void testConfigureInterruptShouldSetInterruptHandlerAppropriately(void)
+{
+  AT91C_BASE_AIC->AIC_SVR[AT91C_ID_TC0] = (uint32)NULL;
+  Timer_ConfigureInterrupt();
+  TEST_ASSERT_EQUAL((uint32)Timer_InterruptHandler, AT91C_BASE_AIC->AIC_SVR[AT91C_ID_TC0]);
+}
+
+void testConfigureInterruptShouldSetInterruptLevelInSourceModeRegisterAppropriately(void)
+{
+  AT91C_BASE_AIC->AIC_SMR[AT91C_ID_TC0] = 0;
+  Timer_ConfigureInterrupt();
+  TEST_ASSERT_EQUAL(
+      AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL, 
+      AT91C_BASE_AIC->AIC_SMR[AT91C_ID_TC0] & 0x00000060);
+}
+
+void testConfigureInterruptShouldSetInterruptPriorityInSourceModeRegisterAppropriately(void)
+{
+  AT91C_BASE_AIC->AIC_SMR[AT91C_ID_TC0] = 0;
+  Timer_ConfigureInterrupt();
+  TEST_ASSERT_EQUAL(1, AT91C_BASE_AIC->AIC_SMR[AT91C_ID_TC0] & 0x00000007);
+}
+
+void testConfigureInterruptShouldClearTimer0InterruptOnTheInterruptController(void)
+{
+  AT91C_BASE_AIC->AIC_ICCR = 0;
+  Timer_ConfigureInterrupt();
+  TEST_ASSERT_EQUAL(TIMER0_ID_MASK, AT91C_BASE_AIC->AIC_ICCR);
+}
+
+void testConfigureInterruptShouldEnableCompareInterruptForRegisterC(void)
+{
+  AT91C_BASE_TC0->TC_IER = 0;
+  Timer_ConfigureInterrupt();
+  TEST_ASSERT_EQUAL(AT91C_TC_CPCS, AT91C_BASE_TC0->TC_IER);
+}
+
+void testEnableInterruptShouldEnableTimer0InterruptsInInterruptCotroller(void)
+{
+  AT91C_BASE_AIC->AIC_IECR = 0;
+  Timer_EnableInterrupt();
+  TEST_ASSERT_EQUAL(TIMER0_ID_MASK, AT91C_BASE_AIC->AIC_IECR);
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestTimerInterruptHandler.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestTimerInterruptHandler.c
new file mode 100644
index 000000000..8e2e64e9d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestTimerInterruptHandler.c
@@ -0,0 +1,66 @@
+#include "unity.h"
+#include "Types.h"
+#include "TimerInterruptHandler.h"
+#include "AT91SAM7X256.h"
+
+AT91S_TC  TimerCounter0Peripheral;
+
+void setUp(void)
+{
+}
+
+void tearDown(void)
+{
+}
+
+void testSetAndGetSystemTime(void)
+{
+  Timer_SetSystemTime(0);
+  TEST_ASSERT_EQUAL(0, Timer_GetSystemTime());
+
+  Timer_SetSystemTime(129837);
+  TEST_ASSERT_EQUAL(129837, Timer_GetSystemTime());
+
+  Timer_SetSystemTime(UINT32_MAX);
+  TEST_ASSERT_EQUAL(UINT32_MAX, Timer_GetSystemTime());
+}
+
+void testInterruptHandlerShouldIncrementSystemTimeOnlyIfStatusHasCompareRegisterCOverflowBitSet(void)
+{
+  Timer_SetSystemTime(0);
+  AT91C_BASE_TC0->TC_SR = 0;
+  Timer_InterruptHandler();
+  TEST_ASSERT_EQUAL(0, Timer_GetSystemTime());
+
+  Timer_SetSystemTime(0);
+  AT91C_BASE_TC0->TC_SR = ~AT91C_TC_CPCS;
+  Timer_InterruptHandler();
+  TEST_ASSERT_EQUAL(0, Timer_GetSystemTime());
+
+  Timer_SetSystemTime(0);
+  AT91C_BASE_TC0->TC_SR = AT91C_TC_CPCS;
+  Timer_InterruptHandler();
+  TEST_ASSERT(Timer_GetSystemTime() > 0);
+
+  Timer_SetSystemTime(0);
+  AT91C_BASE_TC0->TC_SR = 0xffffffff;
+  Timer_InterruptHandler();
+  TEST_ASSERT(Timer_GetSystemTime() > 0);
+}
+
+void testInterruptHandlerShouldIncrementSystemTimerBy_10(void)
+{
+  Timer_SetSystemTime(0);
+  AT91C_BASE_TC0->TC_SR = AT91C_TC_CPCS;
+  Timer_InterruptHandler();
+  TEST_ASSERT_EQUAL(10, Timer_GetSystemTime());
+
+  AT91C_BASE_TC0->TC_SR = AT91C_TC_CPCS;
+  Timer_InterruptHandler();
+  TEST_ASSERT_EQUAL(20, Timer_GetSystemTime());
+
+  Timer_SetSystemTime(39426857);
+  AT91C_BASE_TC0->TC_SR = AT91C_TC_CPCS;
+  Timer_InterruptHandler();
+  TEST_ASSERT_EQUAL(39426867, Timer_GetSystemTime());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestTimerModel.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestTimerModel.c
new file mode 100644
index 000000000..e92a96aa8
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestTimerModel.c
@@ -0,0 +1,18 @@
+#include "unity.h"
+#include "Types.h"
+#include "TimerModel.h"
+#include "MockTaskScheduler.h"
+
+void setUp(void)
+{
+}
+
+void tearDown(void)
+{
+}
+
+void testUpdateTimeShouldDelegateToTaskScheduler(void)
+{
+  TaskScheduler_Update_Expect(19387L);
+  TimerModel_UpdateTime(19387L);
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestUsartBaudRateRegisterCalculator.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestUsartBaudRateRegisterCalculator.c
new file mode 100644
index 000000000..08dc04591
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestUsartBaudRateRegisterCalculator.c
@@ -0,0 +1,21 @@
+#include "unity.h"
+#include "Types.h"
+#include "UsartBaudRateRegisterCalculator.h"
+
+void setUp(void)
+{
+}
+
+void tearDown(void)
+{
+}
+
+void testCalculateBaudRateRegisterSettingShouldCalculateRegisterSettingAppropriately(void)
+{
+  // BaudRate = MCK / (CD x 16) - per datasheet section 30.6.1.2 "Baud Rate Calculation Example"
+  TEST_ASSERT_EQUAL(26, UsartModel_CalculateBaudRateRegisterSetting(48000000, 115200));
+  TEST_ASSERT_EQUAL(6,  UsartModel_CalculateBaudRateRegisterSetting(3686400,  38400));
+  TEST_ASSERT_EQUAL(23, UsartModel_CalculateBaudRateRegisterSetting(14318180, 38400));
+  TEST_ASSERT_EQUAL(20, UsartModel_CalculateBaudRateRegisterSetting(12000000, 38400));
+  TEST_ASSERT_EQUAL(13, UsartModel_CalculateBaudRateRegisterSetting(12000000, 56800));
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestUsartConductor.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestUsartConductor.c
new file mode 100644
index 000000000..fd6de6eb7
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestUsartConductor.c
@@ -0,0 +1,40 @@
+#include "unity.h"
+#include "Types.h"
+#include "UsartConductor.h"
+#include "MockUsartModel.h"
+#include "MockUsartHardware.h"
+#include "MockTaskScheduler.h"
+
+void setUp(void)
+{
+}
+
+void tearDown(void)
+{
+}
+
+void testShouldInitializeHardwareWhenInitCalled(void)
+{
+  UsartModel_GetBaudRateRegisterSetting_ExpectAndReturn(4);
+  UsartModel_GetWakeupMessage_ExpectAndReturn("Hey there!");
+  UsartHardware_TransmitString_Expect("Hey there!");
+  UsartHardware_Init_Expect(4);
+
+  UsartConductor_Init();
+}
+
+void testRunShouldNotDoAnythingIfSchedulerSaysItIsNotTimeYet(void)
+{
+  TaskScheduler_DoUsart_ExpectAndReturn(FALSE);
+
+  UsartConductor_Run();
+}
+
+void testRunShouldGetCurrentTemperatureAndTransmitIfSchedulerSaysItIsTime(void)
+{
+  TaskScheduler_DoUsart_ExpectAndReturn(TRUE);
+  UsartModel_GetFormattedTemperature_ExpectAndReturn("hey there");
+  UsartHardware_TransmitString_Expect("hey there");
+
+  UsartConductor_Run();
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestUsartConfigurator.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestUsartConfigurator.c
new file mode 100644
index 000000000..b23029e9b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestUsartConfigurator.c
@@ -0,0 +1,77 @@
+#include "unity.h"
+#include "Types.h"
+#include "UsartConfigurator.h"
+
+AT91S_PIO PioAPeripheral;
+AT91S_PMC PmcPeripheral;
+AT91S_USART Usart0Peripheral;
+
+void setUp(void)
+{
+}
+
+void tearDown(void)
+{
+}
+
+void testConfigureUsartIOShouldConfigureUsartTxPinfForPeripheralIO(void)
+{
+  AT91C_BASE_PIOA->PIO_ASR = 0;
+  AT91C_BASE_PIOA->PIO_BSR = 0xffffffff;
+  AT91C_BASE_PIOA->PIO_PDR = 0;
+  Usart_ConfigureUsartIO();
+  TEST_ASSERT_EQUAL(USART0_TX_PIN, AT91C_BASE_PIOA->PIO_ASR);
+  TEST_ASSERT_EQUAL(0, AT91C_BASE_PIOA->PIO_BSR);
+  TEST_ASSERT_EQUAL(USART0_TX_PIN, AT91C_BASE_PIOA->PIO_PDR);
+}
+
+void testEnablePeripheralClockShouldEnableClockToUsartPeripheral(void)
+{
+  AT91C_BASE_PMC->PMC_PCER = 0;
+  Usart_EnablePeripheralClock();
+  TEST_ASSERT_EQUAL(((uint32)1) << USART0_CLOCK_ENABLE, AT91C_BASE_PMC->PMC_PCER);
+}
+
+void testResetShouldDisableAllUsartInterrupts(void)
+{
+  AT91C_BASE_US0->US_IDR = 0;
+  Usart_Reset();
+  TEST_ASSERT_EQUAL(0xffffffff, AT91C_BASE_US0->US_IDR);
+}
+
+void testResetShouldResetUsartTransmitterAndReceiver(void)
+{
+  AT91C_BASE_US0->US_CR = 0;
+  Usart_Reset();
+  TEST_ASSERT_EQUAL(AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RXDIS | AT91C_US_TXDIS, AT91C_BASE_US0->US_CR);
+}
+
+void testConfigureModeShouldSetUsartModeToAsynchronous(void)
+{
+  uint32 asyncMode =  (AT91C_US_USMODE_NORMAL |
+                        AT91C_US_NBSTOP_1_BIT |
+                        AT91C_US_PAR_NONE |
+                        AT91C_US_CHRL_8_BITS |
+                        AT91C_US_CLKS_CLOCK);
+
+  AT91C_BASE_US0->US_MR = ~asyncMode;
+  Usart_ConfigureMode();
+  TEST_ASSERT_EQUAL(asyncMode, AT91C_BASE_US0->US_MR);
+}
+
+void testSetBaudRateRegisterShouldSetUsartBaudRateRegisterToValuePassedAsParameter(void)
+{
+  AT91C_BASE_US0->US_BRGR = 0;
+  Usart_SetBaudRateRegister(3);
+  TEST_ASSERT_EQUAL(3, AT91C_BASE_US0->US_BRGR);
+  Usart_SetBaudRateRegister(251);
+  TEST_ASSERT_EQUAL(251, AT91C_BASE_US0->US_BRGR);
+}
+
+
+void testEnableShouldEnableUsart0Transmitter(void)
+{
+  AT91C_BASE_US0->US_CR = 0;
+  Usart_Enable();
+  TEST_ASSERT_EQUAL(AT91C_US_TXEN, AT91C_BASE_US0->US_CR);
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestUsartHardware.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestUsartHardware.c
new file mode 100644
index 000000000..b4a0d0ca7
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestUsartHardware.c
@@ -0,0 +1,37 @@
+#include "unity.h"
+#include "Types.h"
+#include "UsartHardware.h"
+#include "AT91SAM7X256.h"
+#include "MockUsartConfigurator.h"
+#include "MockUsartPutChar.h"
+
+void setUp(void)
+{
+}
+
+void tearDown(void)
+{
+}
+
+void testInitShouldConfigureUsartPeripheralByCallingConfiguratorAppropriately(void)
+{
+  Usart_ConfigureUsartIO_Expect();
+  Usart_EnablePeripheralClock_Expect();
+  Usart_Reset_Expect();
+  Usart_ConfigureMode_Expect();
+  Usart_SetBaudRateRegister_Expect(73);
+  Usart_Enable_Expect();
+
+  UsartHardware_Init(73);
+}
+
+void testTransmitStringShouldSendDesiredStringOutUsingUsart(void)
+{
+  Usart_PutChar_Expect('h');
+  Usart_PutChar_Expect('e');
+  Usart_PutChar_Expect('l');
+  Usart_PutChar_Expect('l');
+  Usart_PutChar_Expect('o');
+  
+  UsartHardware_TransmitString("hello");
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestUsartModel.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestUsartModel.c
new file mode 100644
index 000000000..6ab23bc0f
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestUsartModel.c
@@ -0,0 +1,40 @@
+#include "unity.h"
+#include "Types.h"
+#include "UsartModel.h"
+#include "ModelConfig.h"
+#include "MockTemperatureFilter.h"
+#include "MockUsartBaudRateRegisterCalculator.h"
+#include <math.h>
+
+void setUp(void)
+{
+}
+
+void tearDown(void)
+{
+}
+
+void testGetBaudRateRegisterSettingShouldReturnAppropriateBaudRateRegisterSetting(void)
+{
+  uint8 dummyRegisterSetting = 17;
+  UsartModel_CalculateBaudRateRegisterSetting_ExpectAndReturn(MASTER_CLOCK, USART0_BAUDRATE, dummyRegisterSetting);
+
+  TEST_ASSERT_EQUAL(dummyRegisterSetting, UsartModel_GetBaudRateRegisterSetting());
+}
+
+void testGetFormattedTemperatureFormatsTemperatureFromCalculatorAppropriately(void)
+{
+  TemperatureFilter_GetTemperatureInCelcius_ExpectAndReturn(25.0f);
+  TEST_ASSERT_EQUAL_STRING("25.0 C\n", UsartModel_GetFormattedTemperature());
+}
+
+void testShouldReturnErrorMessageUponInvalidTemperatureValue(void)
+{
+  TemperatureFilter_GetTemperatureInCelcius_ExpectAndReturn(-INFINITY);
+  TEST_ASSERT_EQUAL_STRING("Temperature sensor failure!\n", UsartModel_GetFormattedTemperature());
+}
+
+void testShouldReturnWakeupMessage(void)
+{
+  TEST_ASSERT_EQUAL_STRING("It's Awesome Time!\n", UsartModel_GetWakeupMessage());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestUsartPutChar.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestUsartPutChar.c
new file mode 100644
index 000000000..766a88901
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestUsartPutChar.c
@@ -0,0 +1,43 @@
+#include "unity.h"
+#include "Types.h"
+#include "UsartPutChar.h"
+#include "MockUsartTransmitBufferStatus.h"
+
+AT91S_USART Usart0Peripheral;
+
+void setUp(void)
+{
+}
+
+void tearDown(void)
+{
+}
+
+void testPutCharShouldWriteDesiredCharacterToUsartTransmitBuffer(void)
+{
+  AT91C_BASE_US0->US_THR = 0;
+  
+  Usart_ReadyToTransmit_ExpectAndReturn(TRUE);
+  Usart_PutChar('x');
+  TEST_ASSERT_EQUAL('x', AT91C_BASE_US0->US_THR);
+  
+  Usart_ReadyToTransmit_ExpectAndReturn(TRUE);
+  Usart_PutChar('1');
+  TEST_ASSERT_EQUAL('1', AT91C_BASE_US0->US_THR);
+  
+  Usart_ReadyToTransmit_ExpectAndReturn(TRUE);
+  Usart_PutChar(':');
+  TEST_ASSERT_EQUAL(':', AT91C_BASE_US0->US_THR);
+}
+
+void testPutCharShouldWaitUntilReadyToTransmitBeforeLoadingTransmitBufffer(void)
+{
+  AT91C_BASE_US0->US_THR = 0;
+  
+  Usart_ReadyToTransmit_ExpectAndReturn(FALSE);
+  Usart_ReadyToTransmit_ExpectAndReturn(FALSE);
+  Usart_ReadyToTransmit_ExpectAndReturn(FALSE);
+  Usart_ReadyToTransmit_ExpectAndReturn(TRUE);
+  Usart_PutChar('x');
+  TEST_ASSERT_EQUAL('x', AT91C_BASE_US0->US_THR);
+}
diff --git a/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestUsartTransmitBufferStatus.c b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestUsartTransmitBufferStatus.c
new file mode 100644
index 000000000..c06084f32
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/examples/temp_sensor/test/TestUsartTransmitBufferStatus.c
@@ -0,0 +1,22 @@
+#include "unity.h"
+#include "Types.h"
+#include "UsartTransmitBufferStatus.h"
+
+AT91S_USART Usart0Peripheral;
+
+void setUp(void)
+{
+}
+
+void tearDown(void)
+{
+}
+
+void testReadyToTransmitShouldReturnStatusPerTransmitBufferReadyStatus(void)
+{
+  AT91C_BASE_US0->US_CSR = 0;
+  TEST_ASSERT(!Usart_ReadyToTransmit());
+  
+  AT91C_BASE_US0->US_CSR = AT91C_US_TXRDY;
+  TEST_ASSERT(Usart_ReadyToTransmit());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/lib/cmock.rb b/FreeRTOS-Plus/Test/CMock/lib/cmock.rb
new file mode 100644
index 000000000..b4dbab57d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/lib/cmock.rb
@@ -0,0 +1,104 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+['../config/production_environment',
+ 'cmock_header_parser',
+ 'cmock_generator',
+ 'cmock_file_writer',
+ 'cmock_config',
+ 'cmock_plugin_manager',
+ 'cmock_generator_utils',
+ 'cmock_unityhelper_parser'].each { |req| require "#{__dir__}/#{req}" }
+
+class CMock
+  def initialize(options = nil)
+    cm_config      = CMockConfig.new(options)
+    cm_unityhelper = CMockUnityHelperParser.new(cm_config)
+    cm_writer      = CMockFileWriter.new(cm_config)
+    cm_gen_utils   = CMockGeneratorUtils.new(cm_config, :unity_helper => cm_unityhelper)
+    cm_gen_plugins = CMockPluginManager.new(cm_config, cm_gen_utils)
+    @cm_parser     = CMockHeaderParser.new(cm_config)
+    @cm_generator  = CMockGenerator.new(cm_config, cm_writer, cm_gen_utils, cm_gen_plugins)
+    @silent        = (cm_config.verbosity < 2)
+  end
+
+  def setup_mocks(files)
+    [files].flatten.each do |src|
+      generate_mock src
+    end
+  end
+
+  def setup_skeletons(files)
+    [files].flatten.each do |src|
+      generate_skeleton src
+    end
+  end
+
+  private ###############################
+
+  def generate_mock(src)
+    name = File.basename(src, '.*')
+    ext = File.extname(src)
+    puts "Creating mock for #{name}..." unless @silent
+    @cm_generator.create_mock(name, @cm_parser.parse(name, File.read(src)), ext)
+  end
+
+  def generate_skeleton(src)
+    name = File.basename(src, '.*')
+    puts "Creating skeleton for #{name}..." unless @silent
+    @cm_generator.create_skeleton(name, @cm_parser.parse(name, File.read(src)))
+  end
+end
+
+def option_maker(options, key, val)
+  options ||= {}
+  options[key.to_sym] =
+    if val.chr == ':'
+      val[1..-1].to_sym
+    elsif val.include? ';'
+      val.split(';')
+    elsif val == 'true'
+      true
+    elsif val == 'false'
+      false
+    elsif val =~ /^\d+$/
+      val.to_i
+    else
+      val
+    end
+  options
+end
+
+# Command Line Support ###############################
+
+if $0 == __FILE__
+  usage = "usage: ruby #{__FILE__} (-oOptionsFile) File(s)ToMock"
+
+  unless ARGV[0]
+    puts usage
+    exit 1
+  end
+
+  options = {}
+  filelist = []
+  ARGV.each do |arg|
+    if arg =~ /^-o\"?([a-zA-Z0-9._\\\/:\s]+)\"?/
+      options.merge! CMockConfig.load_config_file_from_yaml(arg.gsub(/^-o/, ''))
+    elsif arg == '--skeleton'
+      options[:skeleton] = true
+    elsif arg =~ /^--([a-zA-Z0-9._\\\/:\s]+)=\"?([a-zA-Z0-9._\-\\\/:\s\;]+)\"?/
+      options = option_maker(options, Regexp.last_match(1), Regexp.last_match(2))
+    else
+      filelist << arg
+    end
+  end
+
+  if options[:skeleton]
+    CMock.new(options).setup_skeletons(filelist)
+  else
+    CMock.new(options).setup_mocks(filelist)
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/lib/cmock_config.rb b/FreeRTOS-Plus/Test/CMock/lib/cmock_config.rb
new file mode 100644
index 000000000..9515481c9
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/lib/cmock_config.rb
@@ -0,0 +1,173 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+class CMockConfig
+  CMOCK_DEFAULT_OPTIONS =
+    {
+      :framework                   => :unity,
+      :mock_path                   => 'mocks',
+      :mock_prefix                 => 'Mock',
+      :mock_suffix                 => '',
+      :skeleton_path               => '',
+      :weak                        => '',
+      :subdir                      => nil,
+      :plugins                     => [],
+      :strippables                 => ['(?:__attribute__\s*\(+.*?\)+)'],
+      :attributes                  => %w[__ramfunc __irq __fiq register extern],
+      :c_calling_conventions       => %w[__stdcall __cdecl __fastcall],
+      :enforce_strict_ordering     => false,
+      :fail_on_unexpected_calls    => true,
+      :unity_helper_path           => false,
+      :treat_as                    => {},
+      :treat_as_array              => {},
+      :treat_as_void               => [],
+      :memcmp_if_unknown           => true,
+      :when_no_prototypes          => :warn,           # the options being :ignore, :warn, or :error
+      :when_ptr                    => :compare_data,   # the options being :compare_ptr, :compare_data, or :smart
+      :verbosity                   => 2,               # the options being 0 errors only, 1 warnings and errors, 2 normal info, 3 verbose
+      :treat_externs               => :exclude,        # the options being :include or :exclude
+      :treat_inlines               => :exclude,        # the options being :include or :exclude
+      :callback_include_count      => true,
+      :callback_after_arg_check    => false,
+      :includes                    => nil,
+      :includes_h_pre_orig_header  => nil,
+      :includes_h_post_orig_header => nil,
+      :includes_c_pre_header       => nil,
+      :includes_c_post_header      => nil,
+      :orig_header_include_fmt     => '#include "%s"',
+      :array_size_type             => [],
+      :array_size_name             => 'size|len',
+      :skeleton                    => false,
+
+      # Format to look for inline functions.
+      # This is a combination of "static" and "inline" keywords ("static inline", "inline static", "inline", "static")
+      # There are several possibilities:
+      # - sometimes they appear together, sometimes individually,
+      # - The keywords can appear before or after the return type (this is a compiler warning but people do weird stuff),
+      #   so we check for word boundaries when searching for them
+      # - We first remove "static inline" combinations and boil down to single inline or static statements
+      :inline_function_patterns    => ['(static\s+inline|inline\s+static)\s*', '(\bstatic\b|\binline\b)\s*'] # Last part (\s*) is just to remove whitespaces (only to prettify the output)
+    }.freeze
+
+  def initialize(options = nil)
+    case options
+    when NilClass then options = CMOCK_DEFAULT_OPTIONS.dup
+    when String   then options = CMOCK_DEFAULT_OPTIONS.dup.merge(load_config_file_from_yaml(options))
+    when Hash     then options = CMOCK_DEFAULT_OPTIONS.dup.merge(options)
+    else raise 'If you specify arguments, it should be a filename or a hash of options'
+    end
+
+    # do some quick type verification
+    %i[plugins attributes treat_as_void].each do |opt|
+      unless options[opt].class == Array
+        options[opt] = []
+        puts "WARNING: :#{opt} should be an array." unless options[:verbosity] < 1
+      end
+    end
+    %i[includes includes_h_pre_orig_header includes_h_post_orig_header includes_c_pre_header includes_c_post_header].each do |opt|
+      unless options[opt].nil? || (options[opt].class == Array)
+        options[opt] = []
+        puts "WARNING: :#{opt} should be an array." unless options[:verbosity] < 1
+      end
+    end
+    options[:unity_helper_path] ||= options[:unity_helper]
+    options[:unity_helper_path] = [options[:unity_helper_path]] if options[:unity_helper_path].is_a? String
+
+    if options[:unity_helper_path]
+      require 'pathname'
+      includes1 = options[:includes_c_post_header] || []
+      includes2 = options[:unity_helper_path].map do |path|
+        Pathname(path).relative_path_from(Pathname(options[:mock_path])).to_s
+      end
+      options[:includes_c_post_header] = (includes1 + includes2).uniq
+    end
+
+    options[:plugins].compact!
+    options[:plugins].map!(&:to_sym)
+    @options = options
+
+    treat_as_map = standard_treat_as_map # .clone
+    treat_as_map.merge!(@options[:treat_as])
+    @options[:treat_as] = treat_as_map
+
+    @options.each_key do |key|
+      unless methods.include?(key)
+        eval("def #{key}() return @options[:#{key}] end")
+      end
+    end
+  end
+
+  def load_config_file_from_yaml(yaml_filename)
+    self.class.load_config_file_from_yaml yaml_filename
+  end
+
+  def self.load_config_file_from_yaml(yaml_filename)
+    require 'yaml'
+    require 'fileutils'
+    YAML.load_file(yaml_filename)[:cmock]
+  end
+
+  def path(new_path)
+    @src_path = new_path
+  end
+
+  def load_unity_helper
+    return nil unless @options[:unity_helper_path]
+
+    @options[:unity_helper_path].inject('') do |unity_helper, filename|
+      unity_helper + "\n" + File.new(filename).read
+    end
+  end
+
+  def standard_treat_as_map
+    {
+      'int'             => 'INT',
+      'char'            => 'INT8',
+      'short'           => 'INT16',
+      'long'            => 'INT',
+      'int8'            => 'INT8',
+      'int16'           => 'INT16',
+      'int32'           => 'INT',
+      'int8_t'          => 'INT8',
+      'int16_t'         => 'INT16',
+      'int32_t'         => 'INT',
+      'INT8_T'          => 'INT8',
+      'INT16_T'         => 'INT16',
+      'INT32_T'         => 'INT',
+      'bool'            => 'INT',
+      'bool_t'          => 'INT',
+      'BOOL'            => 'INT',
+      'BOOL_T'          => 'INT',
+      'unsigned int'    => 'HEX32',
+      'unsigned long'   => 'HEX32',
+      'uint32'          => 'HEX32',
+      'uint32_t'        => 'HEX32',
+      'UINT32'          => 'HEX32',
+      'UINT32_T'        => 'HEX32',
+      'void*'           => 'HEX8_ARRAY',
+      'void const*'     => 'HEX8_ARRAY',
+      'const void*'     => 'HEX8_ARRAY',
+      'unsigned short'  => 'HEX16',
+      'uint16'          => 'HEX16',
+      'uint16_t'        => 'HEX16',
+      'UINT16'          => 'HEX16',
+      'UINT16_T'        => 'HEX16',
+      'unsigned char'   => 'HEX8',
+      'uint8'           => 'HEX8',
+      'uint8_t'         => 'HEX8',
+      'UINT8'           => 'HEX8',
+      'UINT8_T'         => 'HEX8',
+      'char*'           => 'STRING',
+      'char const*'     => 'STRING',
+      'const char*'     => 'STRING',
+      'pCHAR'           => 'STRING',
+      'cstring'         => 'STRING',
+      'CSTRING'         => 'STRING',
+      'float'           => 'FLOAT',
+      'double'          => 'FLOAT'
+    }
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/lib/cmock_file_writer.rb b/FreeRTOS-Plus/Test/CMock/lib/cmock_file_writer.rb
new file mode 100644
index 000000000..787d688e1
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/lib/cmock_file_writer.rb
@@ -0,0 +1,48 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+class CMockFileWriter
+  attr_reader :config
+
+  def initialize(config)
+    @config = config
+  end
+
+  def create_subdir(subdir)
+    require 'fileutils'
+    FileUtils.mkdir_p "#{@config.mock_path}/" unless Dir.exist?("#{@config.mock_path}/")
+    FileUtils.mkdir_p "#{@config.mock_path}/#{subdir + '/' if subdir}" if subdir && !Dir.exist?("#{@config.mock_path}/#{subdir + '/' if subdir}")
+  end
+
+  def create_file(filename, subdir)
+    raise "Where's the block of data to create?" unless block_given?
+
+    full_file_name_temp = "#{@config.mock_path}/#{subdir + '/' if subdir}#{filename}.new"
+    full_file_name_done = "#{@config.mock_path}/#{subdir + '/' if subdir}#{filename}"
+    File.open(full_file_name_temp, 'w') do |file|
+      yield(file, filename)
+    end
+    update_file(full_file_name_done, full_file_name_temp)
+  end
+
+  def append_file(filename, subdir)
+    raise "Where's the block of data to create?" unless block_given?
+
+    full_file_name = "#{@config.skeleton_path}/#{subdir + '/' if subdir}#{filename}"
+    File.open(full_file_name, 'a') do |file|
+      yield(file, filename)
+    end
+  end
+
+  private ###################################
+
+  def update_file(dest, src)
+    require 'fileutils'
+    FileUtils.rm(dest) if File.exist?(dest)
+    FileUtils.cp(src, dest)
+    FileUtils.rm(src)
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/lib/cmock_generator.rb b/FreeRTOS-Plus/Test/CMock/lib/cmock_generator.rb
new file mode 100644
index 000000000..f08cadd77
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/lib/cmock_generator.rb
@@ -0,0 +1,333 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+class CMockGenerator
+  attr_accessor :config, :file_writer, :module_name, :module_ext, :clean_mock_name, :mock_name, :utils, :plugins, :weak, :ordered
+
+  def initialize(config, file_writer, utils, plugins)
+    @file_writer = file_writer
+    @utils       = utils
+    @plugins     = plugins
+    @config      = config
+    @prefix      = @config.mock_prefix
+    @suffix      = @config.mock_suffix
+    @weak        = @config.weak
+    @include_inline = @config.treat_inlines
+    @ordered = @config.enforce_strict_ordering
+    @framework = @config.framework.to_s
+    @fail_on_unexpected_calls = @config.fail_on_unexpected_calls
+
+    @subdir = @config.subdir
+
+    @includes_h_pre_orig_header  = (@config.includes || @config.includes_h_pre_orig_header || []).map { |h| h =~ /</ ? h : "\"#{h}\"" }
+    @includes_h_post_orig_header = (@config.includes_h_post_orig_header || []).map { |h| h =~ /</ ? h : "\"#{h}\"" }
+    @includes_c_pre_header       = (@config.includes_c_pre_header || []).map { |h| h =~ /</ ? h : "\"#{h}\"" }
+    @includes_c_post_header      = (@config.includes_c_post_header || []).map { |h| h =~ /</ ? h : "\"#{h}\"" }
+
+    here = File.dirname __FILE__
+    unity_path_in_ceedling = "#{here}/../../unity" # path to Unity from within Ceedling
+    unity_path_in_cmock = "#{here}/../vendor/unity" # path to Unity from within CMock
+    # path to Unity as specified by env var
+    unity_path_in_env = ENV.key?('UNITY_DIR') ? File.expand_path(ENV.fetch('UNITY_DIR')) : nil
+
+    if unity_path_in_env && File.exist?(unity_path_in_env)
+      require "#{unity_path_in_env}/auto/type_sanitizer"
+    elsif File.exist? unity_path_in_ceedling
+      require "#{unity_path_in_ceedling}/auto/type_sanitizer"
+    elsif File.exist? unity_path_in_cmock
+      require "#{unity_path_in_cmock}/auto/type_sanitizer"
+    else
+      raise 'Failed to find an instance of Unity to pull in type_sanitizer module!'
+    end
+  end
+
+  def create_mock(module_name, parsed_stuff, module_ext = nil)
+    @module_name = module_name
+    @module_ext  = module_ext || '.h'
+    @mock_name   = @prefix + @module_name + @suffix
+    @clean_mock_name = TypeSanitizer.sanitize_c_identifier(@mock_name)
+    create_mock_subdir
+    create_mock_header_file(parsed_stuff)
+    create_mock_source_file(parsed_stuff)
+  end
+
+  def create_skeleton(module_name, parsed_stuff)
+    @module_name = module_name
+    create_skeleton_source_file(parsed_stuff)
+  end
+
+  private if $ThisIsOnlyATest.nil? ##############################
+
+  def create_mock_subdir
+    @file_writer.create_subdir(@subdir)
+  end
+
+  def create_using_statement(file, function)
+    file << "using namespace #{function[:namespace].join('::')};\n" unless function[:namespace].empty?
+  end
+
+  def create_mock_header_file(parsed_stuff)
+    if @include_inline == :include
+      @file_writer.create_file(@module_name + (@module_ext || '.h'), @subdir) do |file, _filename|
+        file << parsed_stuff[:normalized_source]
+      end
+    end
+
+    @file_writer.create_file(@mock_name + (@module_ext || '.h'), @subdir) do |file, filename|
+      create_mock_header_header(file, filename)
+      create_mock_header_service_call_declarations(file)
+      create_typedefs(file, parsed_stuff[:typedefs])
+      parsed_stuff[:functions].each do |function|
+        create_using_statement(file, function)
+        file << @plugins.run(:mock_function_declarations, function)
+      end
+      create_mock_header_footer(file)
+    end
+  end
+
+  def create_mock_source_file(parsed_stuff)
+    @file_writer.create_file(@mock_name + '.c', @subdir) do |file, filename|
+      create_source_header_section(file, filename, parsed_stuff[:functions])
+      create_instance_structure(file, parsed_stuff[:functions])
+      create_extern_declarations(file)
+      create_mock_verify_function(file, parsed_stuff[:functions])
+      create_mock_init_function(file)
+      create_mock_destroy_function(file, parsed_stuff[:functions])
+      parsed_stuff[:functions].each do |function|
+        create_mock_implementation(file, function)
+        create_mock_interfaces(file, function)
+      end
+    end
+  end
+
+  def create_skeleton_source_file(parsed_stuff)
+    filename = "#{@config.mock_path}/#{@subdir + '/' if @subdir}#{module_name}.c"
+    existing = File.exist?(filename) ? File.read(filename) : ''
+    @file_writer.append_file(@module_name + '.c', @subdir) do |file, fullname|
+      create_source_header_section(file, fullname, []) if existing.empty?
+      parsed_stuff[:functions].each do |function|
+        create_function_skeleton(file, function, existing)
+      end
+    end
+  end
+
+  def create_mock_header_header(file, _filename)
+    define_name   = @clean_mock_name.upcase
+    orig_filename = (@subdir ? @subdir + '/' : '') + @module_name + (@module_ext || '.h')
+    file << "/* AUTOGENERATED FILE. DO NOT EDIT. */\n"
+    file << "#ifndef _#{define_name}_H\n"
+    file << "#define _#{define_name}_H\n\n"
+    file << "#include \"#{@framework}.h\"\n"
+    @includes_h_pre_orig_header.each { |inc| file << "#include #{inc}\n" }
+    file << @config.orig_header_include_fmt.gsub(/%s/, orig_filename.to_s) + "\n"
+    @includes_h_post_orig_header.each { |inc| file << "#include #{inc}\n" }
+    plugin_includes = @plugins.run(:include_files)
+    file << plugin_includes unless plugin_includes.empty?
+    file << "\n"
+    file << "/* Ignore the following warnings, since we are copying code */\n"
+    file << "#if defined(__GNUC__) && !defined(__ICC) && !defined(__TMS470__)\n"
+    file << "#if __GNUC__ > 4 || (__GNUC__ == 4 && (__GNUC_MINOR__ > 6 || (__GNUC_MINOR__ == 6 && __GNUC_PATCHLEVEL__ > 0)))\n"
+    file << "#pragma GCC diagnostic push\n"
+    file << "#endif\n"
+    file << "#if !defined(__clang__)\n"
+    file << "#pragma GCC diagnostic ignored \"-Wpragmas\"\n"
+    file << "#endif\n"
+    file << "#pragma GCC diagnostic ignored \"-Wunknown-pragmas\"\n"
+    file << "#pragma GCC diagnostic ignored \"-Wduplicate-decl-specifier\"\n"
+    file << "#endif\n"
+    file << "\n"
+  end
+
+  def create_typedefs(file, typedefs)
+    file << "\n"
+    typedefs.each { |typedef| file << "#{typedef}\n" }
+    file << "\n\n"
+  end
+
+  def create_mock_header_service_call_declarations(file)
+    file << "void #{@clean_mock_name}_Init(void);\n"
+    file << "void #{@clean_mock_name}_Destroy(void);\n"
+    file << "void #{@clean_mock_name}_Verify(void);\n\n"
+  end
+
+  def create_mock_header_footer(header)
+    header << "\n"
+    header << "#if defined(__GNUC__) && !defined(__ICC) && !defined(__TMS470__)\n"
+    header << "#if __GNUC__ > 4 || (__GNUC__ == 4 && (__GNUC_MINOR__ > 6 || (__GNUC_MINOR__ == 6 && __GNUC_PATCHLEVEL__ > 0)))\n"
+    header << "#pragma GCC diagnostic pop\n"
+    header << "#endif\n"
+    header << "#endif\n"
+    header << "\n"
+    header << "#endif\n"
+  end
+
+  def create_source_header_section(file, filename, functions)
+    header_file = (@subdir ? @subdir + '/' : '') + filename.gsub('.c', (@module_ext || '.h'))
+    file << "/* AUTOGENERATED FILE. DO NOT EDIT. */\n" unless functions.empty?
+    file << "#include <string.h>\n"
+    file << "#include <stdlib.h>\n"
+    file << "#include <setjmp.h>\n"
+    file << "#include \"cmock.h\"\n"
+    @includes_c_pre_header.each { |inc| file << "#include #{inc}\n" }
+    file << "#include \"#{header_file}\"\n"
+    @includes_c_post_header.each { |inc| file << "#include #{inc}\n" }
+    file << "\n"
+    strs = []
+    functions.each do |func|
+      strs << func[:name]
+      func[:args].each { |arg| strs << arg[:name] }
+    end
+    strs.uniq.sort.each do |str|
+      file << "static const char* CMockString_#{str} = \"#{str}\";\n"
+    end
+    file << "\n"
+  end
+
+  def create_instance_structure(file, functions)
+    functions.each do |function|
+      file << "typedef struct _CMOCK_#{function[:name]}_CALL_INSTANCE\n{\n"
+      file << "  UNITY_LINE_TYPE LineNumber;\n"
+      file << @plugins.run(:instance_typedefs, function)
+      file << "\n} CMOCK_#{function[:name]}_CALL_INSTANCE;\n\n"
+    end
+    file << "static struct #{@clean_mock_name}Instance\n{\n"
+    if functions.empty?
+      file << "  unsigned char placeHolder;\n"
+    end
+    functions.each do |function|
+      file << @plugins.run(:instance_structure, function)
+      file << "  CMOCK_MEM_INDEX_TYPE #{function[:name]}_CallInstance;\n"
+    end
+    file << "} Mock;\n\n"
+  end
+
+  def create_extern_declarations(file)
+    file << "extern jmp_buf AbortFrame;\n"
+    if @ordered
+      file << "extern int GlobalExpectCount;\n"
+      file << "extern int GlobalVerifyOrder;\n"
+    end
+    file << "\n"
+  end
+
+  def create_mock_verify_function(file, functions)
+    file << "void #{@clean_mock_name}_Verify(void)\n{\n"
+    verifications = functions.collect do |function|
+      v = @plugins.run(:mock_verify, function)
+      v.empty? ? v : ["  call_instance = Mock.#{function[:name]}_CallInstance;\n", v]
+    end.join
+    unless verifications.empty?
+      file << "  UNITY_LINE_TYPE cmock_line = TEST_LINE_NUM;\n"
+      file << "  CMOCK_MEM_INDEX_TYPE call_instance;\n"
+      file << verifications
+    end
+    file << "}\n\n"
+  end
+
+  def create_mock_init_function(file)
+    file << "void #{@clean_mock_name}_Init(void)\n{\n"
+    file << "  #{@clean_mock_name}_Destroy();\n"
+    file << "}\n\n"
+  end
+
+  def create_mock_destroy_function(file, functions)
+    file << "void #{@clean_mock_name}_Destroy(void)\n{\n"
+    file << "  CMock_Guts_MemFreeAll();\n"
+    file << "  memset(&Mock, 0, sizeof(Mock));\n"
+    file << functions.collect { |function| @plugins.run(:mock_destroy, function) }.join
+
+    unless @fail_on_unexpected_calls
+      file << functions.collect { |function| @plugins.run(:mock_ignore, function) }.join
+    end
+
+    if @ordered
+      file << "  GlobalExpectCount = 0;\n"
+      file << "  GlobalVerifyOrder = 0;\n"
+    end
+    file << "}\n\n"
+  end
+
+  def create_mock_implementation(file, function)
+    # prepare return value and arguments
+    function_mod_and_rettype = (function[:modifier].empty? ? '' : "#{function[:modifier]} ") +
+                               (function[:return][:type]) +
+                               (function[:c_calling_convention] ? " #{function[:c_calling_convention]}" : '')
+    args_string = function[:args_string]
+    args_string += (', ' + function[:var_arg]) unless function[:var_arg].nil?
+
+    # Encapsulate in namespace(s) if applicable
+    function[:namespace].each do |ns|
+      file << "namespace #{ns} {\n"
+    end
+
+    # Determine class prefix (if any)
+    cls_pre = ''
+    unless function[:class].nil?
+      cls_pre = "#{function[:class]}::"
+    end
+
+    # Create mock function
+    unless @weak.empty?
+      file << "#if defined (__IAR_SYSTEMS_ICC__)\n"
+      file << "#pragma weak #{function[:unscoped_name]}\n"
+      file << "#else\n"
+      file << "#{function_mod_and_rettype} #{function[:unscoped_name]}(#{args_string}) #{weak};\n"
+      file << "#endif\n\n"
+    end
+    file << "#{function_mod_and_rettype} #{cls_pre}#{function[:unscoped_name]}(#{args_string})\n"
+    file << "{\n"
+    file << "  UNITY_LINE_TYPE cmock_line = TEST_LINE_NUM;\n"
+    file << "  CMOCK_#{function[:name]}_CALL_INSTANCE* cmock_call_instance;\n"
+    file << "  UNITY_SET_DETAIL(CMockString_#{function[:name]});\n"
+    file << "  cmock_call_instance = (CMOCK_#{function[:name]}_CALL_INSTANCE*)CMock_Guts_GetAddressFor(Mock.#{function[:name]}_CallInstance);\n"
+    file << "  Mock.#{function[:name]}_CallInstance = CMock_Guts_MemNext(Mock.#{function[:name]}_CallInstance);\n"
+    file << @plugins.run(:mock_implementation_precheck, function)
+    file << "  UNITY_TEST_ASSERT_NOT_NULL(cmock_call_instance, cmock_line, CMockStringCalledMore);\n"
+    file << "  cmock_line = cmock_call_instance->LineNumber;\n"
+    if @ordered
+      file << "  if (cmock_call_instance->CallOrder > ++GlobalVerifyOrder)\n"
+      file << "    UNITY_TEST_FAIL(cmock_line, CMockStringCalledEarly);\n"
+      file << "  if (cmock_call_instance->CallOrder < GlobalVerifyOrder)\n"
+      file << "    UNITY_TEST_FAIL(cmock_line, CMockStringCalledLate);\n"
+    end
+    file << @plugins.run(:mock_implementation, function)
+    file << "  UNITY_CLR_DETAILS();\n"
+    file << "  return cmock_call_instance->ReturnVal;\n" unless function[:return][:void?]
+    file << "}\n"
+
+    # Close any namespace(s) opened above
+    function[:namespace].each do
+      file << "}\n"
+    end
+
+    file << "\n"
+  end
+
+  def create_mock_interfaces(file, function)
+    file << @utils.code_add_argument_loader(function)
+    file << @plugins.run(:mock_interfaces, function)
+  end
+
+  def create_function_skeleton(file, function, existing)
+    # prepare return value and arguments
+    function_mod_and_rettype = (function[:modifier].empty? ? '' : "#{function[:modifier]} ") +
+                               (function[:return][:type]) +
+                               (function[:c_calling_convention] ? " #{function[:c_calling_convention]}" : '')
+    args_string = function[:args_string]
+    args_string += (', ' + function[:var_arg]) unless function[:var_arg].nil?
+
+    decl = "#{function_mod_and_rettype} #{function[:name]}(#{args_string})"
+
+    return if existing.include?(decl)
+
+    file << "#{decl}\n"
+    file << "{\n"
+    file << "  /*TODO: Implement Me!*/\n"
+    function[:args].each { |arg| file << "  (void)#{arg[:name]};\n" }
+    file << "  return (#{(function[:return][:type])})0;\n" unless function[:return][:void?]
+    file << "}\n\n"
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/lib/cmock_generator_plugin_array.rb b/FreeRTOS-Plus/Test/CMock/lib/cmock_generator_plugin_array.rb
new file mode 100644
index 000000000..a9864ab74
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/lib/cmock_generator_plugin_array.rb
@@ -0,0 +1,63 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+class CMockGeneratorPluginArray
+  attr_reader :priority
+  attr_accessor :config, :utils, :unity_helper, :ordered
+  def initialize(config, utils)
+    @config       = config
+    @ptr_handling = @config.when_ptr
+    @ordered      = @config.enforce_strict_ordering
+    @utils        = utils
+    @unity_helper = @utils.helpers[:unity_helper]
+    @priority     = 8
+  end
+
+  def instance_typedefs(function)
+    function[:args].inject('') do |all, arg|
+      arg[:ptr?] ? all + "  int Expected_#{arg[:name]}_Depth;\n" : all
+    end
+  end
+
+  def mock_function_declarations(function)
+    return nil unless function[:contains_ptr?]
+
+    args_call   = function[:args].map { |m| m[:ptr?] ? "#{m[:name]}, #{m[:name]}_Depth" : (m[:name]).to_s }.join(', ')
+    args_string = function[:args].map do |m|
+      type = @utils.arg_type_with_const(m)
+      m[:ptr?] ? "#{type} #{m[:name]}, int #{m[:name]}_Depth" : "#{type} #{m[:name]}"
+    end.join(', ')
+    if function[:return][:void?]
+      return "#define #{function[:name]}_ExpectWithArray(#{args_call}) #{function[:name]}_CMockExpectWithArray(__LINE__, #{args_call})\n" \
+             "void #{function[:name]}_CMockExpectWithArray(UNITY_LINE_TYPE cmock_line, #{args_string});\n"
+    else
+      return "#define #{function[:name]}_ExpectWithArrayAndReturn(#{args_call}, cmock_retval) #{function[:name]}_CMockExpectWithArrayAndReturn(__LINE__, #{args_call}, cmock_retval)\n" \
+             "void #{function[:name]}_CMockExpectWithArrayAndReturn(UNITY_LINE_TYPE cmock_line, #{args_string}, #{function[:return][:str]});\n"
+    end
+  end
+
+  def mock_interfaces(function)
+    return nil unless function[:contains_ptr?]
+
+    lines = []
+    func_name = function[:name]
+    args_string = function[:args].map do |m|
+      type = @utils.arg_type_with_const(m)
+      m[:ptr?] ? "#{type} #{m[:name]}, int #{m[:name]}_Depth" : "#{type} #{m[:name]}"
+    end.join(', ')
+    call_string = function[:args].map { |m| m[:ptr?] ? "#{m[:name]}, #{m[:name]}_Depth" : m[:name] }.join(', ')
+    lines << if function[:return][:void?]
+               "void #{func_name}_CMockExpectWithArray(UNITY_LINE_TYPE cmock_line, #{args_string})\n"
+             else
+               "void #{func_name}_CMockExpectWithArrayAndReturn(UNITY_LINE_TYPE cmock_line, #{args_string}, #{function[:return][:str]})\n"
+             end
+    lines << "{\n"
+    lines << @utils.code_add_base_expectation(func_name)
+    lines << "  CMockExpectParameters_#{func_name}(cmock_call_instance, #{call_string});\n"
+    lines << "  cmock_call_instance->ReturnVal = cmock_to_return;\n" unless function[:return][:void?]
+    lines << "}\n\n"
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/lib/cmock_generator_plugin_callback.rb b/FreeRTOS-Plus/Test/CMock/lib/cmock_generator_plugin_callback.rb
new file mode 100644
index 000000000..6ba8e9bd9
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/lib/cmock_generator_plugin_callback.rb
@@ -0,0 +1,88 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+class CMockGeneratorPluginCallback
+  attr_accessor :include_count
+  attr_reader :priority
+  attr_reader :config, :utils
+
+  def initialize(config, utils)
+    @config = config
+    @utils = utils
+    @priority = 6
+
+    @include_count = @config.callback_include_count
+  end
+
+  def instance_structure(function)
+    func_name = function[:name]
+    "  char #{func_name}_CallbackBool;\n" \
+    "  CMOCK_#{func_name}_CALLBACK #{func_name}_CallbackFunctionPointer;\n" \
+    "  int #{func_name}_CallbackCalls;\n"
+  end
+
+  def mock_function_declarations(function)
+    func_name = function[:name]
+    return_type = function[:return][:type]
+    action = @config.callback_after_arg_check ? 'AddCallback' : 'Stub'
+    style  = (@include_count ? 1 : 0) | (function[:args].empty? ? 0 : 2)
+    styles = ['void', 'int cmock_num_calls', function[:args_string], "#{function[:args_string]}, int cmock_num_calls"]
+    "typedef #{return_type} (* CMOCK_#{func_name}_CALLBACK)(#{styles[style]});\n" \
+    "void #{func_name}_AddCallback(CMOCK_#{func_name}_CALLBACK Callback);\n" \
+    "void #{func_name}_Stub(CMOCK_#{func_name}_CALLBACK Callback);\n" \
+    "#define #{func_name}_StubWithCallback #{func_name}_#{action}\n"
+  end
+
+  def generate_call(function)
+    args = function[:args].map { |m| m[:name] }
+    args << "Mock.#{function[:name]}_CallbackCalls++" if @include_count
+    "Mock.#{function[:name]}_CallbackFunctionPointer(#{args.join(', ')})"
+  end
+
+  def mock_implementation(function)
+    "  if (Mock.#{function[:name]}_CallbackFunctionPointer != NULL)\n  {\n" +
+      if function[:return][:void?]
+        "    #{generate_call(function)};\n  }\n"
+      else
+        "    cmock_call_instance->ReturnVal = #{generate_call(function)};\n  }\n"
+      end
+  end
+
+  def mock_implementation_precheck(function)
+    "  if (!Mock.#{function[:name]}_CallbackBool &&\n" \
+    "      Mock.#{function[:name]}_CallbackFunctionPointer != NULL)\n  {\n" +
+      if function[:return][:void?]
+        "    #{generate_call(function)};\n" \
+        "    UNITY_CLR_DETAILS();\n" \
+        "    return;\n  }\n"
+      else
+        "    #{function[:return][:type]} cmock_cb_ret = #{generate_call(function)};\n" \
+        "    UNITY_CLR_DETAILS();\n" \
+        "    return cmock_cb_ret;\n  }\n"
+      end
+  end
+
+  def mock_interfaces(function)
+    func_name = function[:name]
+    has_ignore = @config.plugins.include? :ignore
+    lines = ''
+    lines << "void #{func_name}_AddCallback(CMOCK_#{func_name}_CALLBACK Callback)\n{\n"
+    lines << "  Mock.#{func_name}_IgnoreBool = (char)0;\n" if has_ignore
+    lines << "  Mock.#{func_name}_CallbackBool = (char)1;\n"
+    lines << "  Mock.#{func_name}_CallbackFunctionPointer = Callback;\n}\n\n"
+    lines << "void #{func_name}_Stub(CMOCK_#{func_name}_CALLBACK Callback)\n{\n"
+    lines << "  Mock.#{func_name}_IgnoreBool = (char)0;\n" if has_ignore
+    lines << "  Mock.#{func_name}_CallbackBool = (char)0;\n"
+    lines << "  Mock.#{func_name}_CallbackFunctionPointer = Callback;\n}\n\n"
+  end
+
+  def mock_verify(function)
+    func_name = function[:name]
+    "  if (Mock.#{func_name}_CallbackFunctionPointer != NULL)\n  {\n" \
+    "    call_instance = CMOCK_GUTS_NONE;\n" \
+    "    (void)call_instance;\n  }\n"
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/lib/cmock_generator_plugin_cexception.rb b/FreeRTOS-Plus/Test/CMock/lib/cmock_generator_plugin_cexception.rb
new file mode 100644
index 000000000..a757669e6
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/lib/cmock_generator_plugin_cexception.rb
@@ -0,0 +1,49 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+class CMockGeneratorPluginCexception
+  attr_reader :priority
+  attr_reader :config, :utils
+
+  def initialize(config, utils)
+    @config = config
+    @utils = utils
+    @priority = 7
+  end
+
+  def include_files
+    "#include \"CException.h\"\n"
+  end
+
+  def instance_typedefs(_function)
+    "  CEXCEPTION_T ExceptionToThrow;\n"
+  end
+
+  def mock_function_declarations(function)
+    if function[:args_string] == 'void'
+      "#define #{function[:name]}_ExpectAndThrow(cmock_to_throw) #{function[:name]}_CMockExpectAndThrow(__LINE__, cmock_to_throw)\n" \
+             "void #{function[:name]}_CMockExpectAndThrow(UNITY_LINE_TYPE cmock_line, CEXCEPTION_T cmock_to_throw);\n"
+    else
+      "#define #{function[:name]}_ExpectAndThrow(#{function[:args_call]}, cmock_to_throw) #{function[:name]}_CMockExpectAndThrow(__LINE__, #{function[:args_call]}, cmock_to_throw)\n" \
+             "void #{function[:name]}_CMockExpectAndThrow(UNITY_LINE_TYPE cmock_line, #{function[:args_string]}, CEXCEPTION_T cmock_to_throw);\n"
+    end
+  end
+
+  def mock_implementation(_function)
+    "  if (cmock_call_instance->ExceptionToThrow != CEXCEPTION_NONE)\n  {\n" \
+      "    UNITY_CLR_DETAILS();\n" \
+      "    Throw(cmock_call_instance->ExceptionToThrow);\n  }\n"
+  end
+
+  def mock_interfaces(function)
+    arg_insert = function[:args_string] == 'void' ? '' : "#{function[:args_string]}, "
+    ["void #{function[:name]}_CMockExpectAndThrow(UNITY_LINE_TYPE cmock_line, #{arg_insert}CEXCEPTION_T cmock_to_throw)\n{\n",
+     @utils.code_add_base_expectation(function[:name]),
+     @utils.code_call_argument_loader(function),
+     "  cmock_call_instance->ExceptionToThrow = cmock_to_throw;\n",
+     "}\n\n"].join
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/lib/cmock_generator_plugin_expect.rb b/FreeRTOS-Plus/Test/CMock/lib/cmock_generator_plugin_expect.rb
new file mode 100644
index 000000000..3a79c1a4d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/lib/cmock_generator_plugin_expect.rb
@@ -0,0 +1,100 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+class CMockGeneratorPluginExpect
+  attr_reader :priority
+  attr_accessor :config, :utils, :unity_helper, :ordered
+
+  def initialize(config, utils)
+    @config       = config
+    @ptr_handling = @config.when_ptr
+    @ordered      = @config.enforce_strict_ordering
+    @utils        = utils
+    @unity_helper = @utils.helpers[:unity_helper]
+    @priority     = 5
+
+    if @config.plugins.include? :expect_any_args
+      alias :mock_implementation :mock_implementation_might_check_args
+    else
+      alias :mock_implementation :mock_implementation_always_check_args
+    end
+  end
+
+  def instance_typedefs(function)
+    lines = ''
+    lines << "  #{function[:return][:type]} ReturnVal;\n"  unless function[:return][:void?]
+    lines << "  int CallOrder;\n"                          if @ordered
+    function[:args].each do |arg|
+      lines << "  #{arg[:type]} Expected_#{arg[:name]};\n"
+    end
+    lines
+  end
+
+  def mock_function_declarations(function)
+    if function[:args].empty?
+      if function[:return][:void?]
+        "#define #{function[:name]}_Expect() #{function[:name]}_CMockExpect(__LINE__)\n" \
+               "void #{function[:name]}_CMockExpect(UNITY_LINE_TYPE cmock_line);\n"
+      else
+        "#define #{function[:name]}_ExpectAndReturn(cmock_retval) #{function[:name]}_CMockExpectAndReturn(__LINE__, cmock_retval)\n" \
+               "void #{function[:name]}_CMockExpectAndReturn(UNITY_LINE_TYPE cmock_line, #{function[:return][:str]});\n"
+      end
+    elsif function[:return][:void?]
+      "#define #{function[:name]}_Expect(#{function[:args_call]}) #{function[:name]}_CMockExpect(__LINE__, #{function[:args_call]})\n" \
+             "void #{function[:name]}_CMockExpect(UNITY_LINE_TYPE cmock_line, #{function[:args_string]});\n"
+    else
+      "#define #{function[:name]}_ExpectAndReturn(#{function[:args_call]}, cmock_retval) #{function[:name]}_CMockExpectAndReturn(__LINE__, #{function[:args_call]}, cmock_retval)\n" \
+             "void #{function[:name]}_CMockExpectAndReturn(UNITY_LINE_TYPE cmock_line, #{function[:args_string]}, #{function[:return][:str]});\n"
+    end
+  end
+
+  def mock_implementation_always_check_args(function)
+    lines = ''
+    function[:args].each do |arg|
+      lines << @utils.code_verify_an_arg_expectation(function, arg)
+    end
+    lines
+  end
+
+  def mock_implementation_might_check_args(function)
+    return '' if function[:args].empty?
+
+    lines = "  if (!cmock_call_instance->ExpectAnyArgsBool)\n  {\n"
+    function[:args].each do |arg|
+      lines << @utils.code_verify_an_arg_expectation(function, arg)
+    end
+    lines << "  }\n"
+    lines
+  end
+
+  def mock_interfaces(function)
+    lines = ''
+    func_name = function[:name]
+    lines << if function[:return][:void?]
+               if function[:args_string] == 'void'
+                 "void #{func_name}_CMockExpect(UNITY_LINE_TYPE cmock_line)\n{\n"
+               else
+                 "void #{func_name}_CMockExpect(UNITY_LINE_TYPE cmock_line, #{function[:args_string]})\n{\n"
+               end
+             elsif function[:args_string] == 'void'
+               "void #{func_name}_CMockExpectAndReturn(UNITY_LINE_TYPE cmock_line, #{function[:return][:str]})\n{\n"
+             else
+               "void #{func_name}_CMockExpectAndReturn(UNITY_LINE_TYPE cmock_line, #{function[:args_string]}, #{function[:return][:str]})\n{\n"
+             end
+    lines << @utils.code_add_base_expectation(func_name)
+    lines << @utils.code_call_argument_loader(function)
+    lines << @utils.code_assign_argument_quickly('cmock_call_instance->ReturnVal', function[:return]) unless function[:return][:void?]
+    lines << "}\n\n"
+  end
+
+  def mock_verify(function)
+    "  if (CMOCK_GUTS_NONE != call_instance)\n" \
+    "  {\n" \
+    "    UNITY_SET_DETAIL(CMockString_#{function[:name]});\n" \
+    "    UNITY_TEST_FAIL(cmock_line, CMockStringCalledLess);\n" \
+    "  }\n"
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/lib/cmock_generator_plugin_expect_any_args.rb b/FreeRTOS-Plus/Test/CMock/lib/cmock_generator_plugin_expect_any_args.rb
new file mode 100644
index 000000000..0fc88e124
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/lib/cmock_generator_plugin_expect_any_args.rb
@@ -0,0 +1,50 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+class CMockGeneratorPluginExpectAnyArgs
+  attr_reader :priority
+  attr_reader :config, :utils
+
+  def initialize(config, utils)
+    @config = config
+    @utils = utils
+    @priority = 3
+  end
+
+  def instance_typedefs(_function)
+    "  char ExpectAnyArgsBool;\n"
+  end
+
+  def mock_function_declarations(function)
+    if function[:args].empty?
+      ''
+    elsif function[:return][:void?]
+      "#define #{function[:name]}_ExpectAnyArgs() #{function[:name]}_CMockExpectAnyArgs(__LINE__)\n" \
+             "void #{function[:name]}_CMockExpectAnyArgs(UNITY_LINE_TYPE cmock_line);\n"
+    else
+      "#define #{function[:name]}_ExpectAnyArgsAndReturn(cmock_retval) #{function[:name]}_CMockExpectAnyArgsAndReturn(__LINE__, cmock_retval)\n" \
+             "void #{function[:name]}_CMockExpectAnyArgsAndReturn(UNITY_LINE_TYPE cmock_line, #{function[:return][:str]});\n"
+    end
+  end
+
+  def mock_interfaces(function)
+    lines = ''
+    unless function[:args].empty?
+      lines << if function[:return][:void?]
+                 "void #{function[:name]}_CMockExpectAnyArgs(UNITY_LINE_TYPE cmock_line)\n{\n"
+               else
+                 "void #{function[:name]}_CMockExpectAnyArgsAndReturn(UNITY_LINE_TYPE cmock_line, #{function[:return][:str]})\n{\n"
+               end
+      lines << @utils.code_add_base_expectation(function[:name], true)
+      unless function[:return][:void?]
+        lines << "  cmock_call_instance->ReturnVal = cmock_to_return;\n"
+      end
+      lines << "  cmock_call_instance->ExpectAnyArgsBool = (char)1;\n"
+      lines << "}\n\n"
+    end
+    lines
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/lib/cmock_generator_plugin_ignore.rb b/FreeRTOS-Plus/Test/CMock/lib/cmock_generator_plugin_ignore.rb
new file mode 100644
index 000000000..b292f3d4f
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/lib/cmock_generator_plugin_ignore.rb
@@ -0,0 +1,88 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+class CMockGeneratorPluginIgnore
+  attr_reader :priority
+  attr_reader :config, :utils
+
+  def initialize(config, utils)
+    @config = config
+    @utils = utils
+    @priority = 2
+  end
+
+  def instance_structure(function)
+    if function[:return][:void?]
+      "  char #{function[:name]}_IgnoreBool;\n"
+    else
+      "  char #{function[:name]}_IgnoreBool;\n  #{function[:return][:type]} #{function[:name]}_FinalReturn;\n"
+    end
+  end
+
+  def mock_function_declarations(function)
+    lines = if function[:return][:void?]
+              "#define #{function[:name]}_Ignore() #{function[:name]}_CMockIgnore()\n" \
+              "void #{function[:name]}_CMockIgnore(void);\n"
+            else
+              "#define #{function[:name]}_IgnoreAndReturn(cmock_retval) #{function[:name]}_CMockIgnoreAndReturn(__LINE__, cmock_retval)\n" \
+              "void #{function[:name]}_CMockIgnoreAndReturn(UNITY_LINE_TYPE cmock_line, #{function[:return][:str]});\n"
+            end
+
+    # Add stop ignore function. it does not matter if there are any args
+    lines << "#define #{function[:name]}_StopIgnore() #{function[:name]}_CMockStopIgnore()\n" \
+                "void #{function[:name]}_CMockStopIgnore(void);\n"
+    lines
+  end
+
+  def mock_implementation_precheck(function)
+    lines = "  if (Mock.#{function[:name]}_IgnoreBool)\n  {\n"
+    lines << "    UNITY_CLR_DETAILS();\n"
+    if function[:return][:void?]
+      lines << "    return;\n  }\n"
+    else
+      retval = function[:return].merge(:name => 'cmock_call_instance->ReturnVal')
+      lines << "    if (cmock_call_instance == NULL)\n      return Mock.#{function[:name]}_FinalReturn;\n"
+      lines << '  ' + @utils.code_assign_argument_quickly("Mock.#{function[:name]}_FinalReturn", retval) unless retval[:void?]
+      lines << "    return cmock_call_instance->ReturnVal;\n  }\n"
+    end
+    lines
+  end
+
+  def mock_interfaces(function)
+    lines = ''
+    lines << if function[:return][:void?]
+               "void #{function[:name]}_CMockIgnore(void)\n{\n"
+             else
+               "void #{function[:name]}_CMockIgnoreAndReturn(UNITY_LINE_TYPE cmock_line, #{function[:return][:str]})\n{\n"
+             end
+    unless function[:return][:void?]
+      lines << @utils.code_add_base_expectation(function[:name], false)
+    end
+    unless function[:return][:void?]
+      lines << "  cmock_call_instance->ReturnVal = cmock_to_return;\n"
+    end
+    lines << "  Mock.#{function[:name]}_IgnoreBool = (char)1;\n"
+    lines << "}\n\n"
+
+    # Add stop ignore function. it does not matter if there are any args
+    lines << "void #{function[:name]}_CMockStopIgnore(void)\n{\n"
+    unless function[:return][:void?]
+      lines << "  if(Mock.#{function[:name]}_IgnoreBool)\n"
+      lines << "    Mock.#{function[:name]}_CallInstance = CMock_Guts_MemNext(Mock.#{function[:name]}_CallInstance);\n"
+    end
+    lines << "  Mock.#{function[:name]}_IgnoreBool = (char)0;\n"
+    lines << "}\n\n"
+  end
+
+  def mock_ignore(function)
+    "  Mock.#{function[:name]}_IgnoreBool = (char) 1;\n"
+  end
+
+  def mock_verify(function)
+    func_name = function[:name]
+    "  if (Mock.#{func_name}_IgnoreBool)\n    call_instance = CMOCK_GUTS_NONE;\n"
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/lib/cmock_generator_plugin_ignore_arg.rb b/FreeRTOS-Plus/Test/CMock/lib/cmock_generator_plugin_ignore_arg.rb
new file mode 100644
index 000000000..d55e84c25
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/lib/cmock_generator_plugin_ignore_arg.rb
@@ -0,0 +1,42 @@
+class CMockGeneratorPluginIgnoreArg
+  attr_reader :priority
+  attr_accessor :utils
+
+  def initialize(_config, utils)
+    @utils        = utils
+    @priority     = 10
+  end
+
+  def instance_typedefs(function)
+    lines = ''
+    function[:args].each do |arg|
+      lines << "  char IgnoreArg_#{arg[:name]};\n"
+    end
+    lines
+  end
+
+  def mock_function_declarations(function)
+    lines = ''
+    function[:args].each do |arg|
+      lines << "#define #{function[:name]}_IgnoreArg_#{arg[:name]}()"
+      lines << " #{function[:name]}_CMockIgnoreArg_#{arg[:name]}(__LINE__)\n"
+      lines << "void #{function[:name]}_CMockIgnoreArg_#{arg[:name]}(UNITY_LINE_TYPE cmock_line);\n"
+    end
+    lines
+  end
+
+  def mock_interfaces(function)
+    lines = []
+    func_name = function[:name]
+    function[:args].each do |arg|
+      lines << "void #{func_name}_CMockIgnoreArg_#{arg[:name]}(UNITY_LINE_TYPE cmock_line)\n"
+      lines << "{\n"
+      lines << "  CMOCK_#{func_name}_CALL_INSTANCE* cmock_call_instance = " \
+               "(CMOCK_#{func_name}_CALL_INSTANCE*)CMock_Guts_GetAddressFor(CMock_Guts_MemEndOfChain(Mock.#{func_name}_CallInstance));\n"
+      lines << "  UNITY_TEST_ASSERT_NOT_NULL(cmock_call_instance, cmock_line, CMockStringIgnPreExp);\n"
+      lines << "  cmock_call_instance->IgnoreArg_#{arg[:name]} = 1;\n"
+      lines << "}\n\n"
+    end
+    lines
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/lib/cmock_generator_plugin_return_thru_ptr.rb b/FreeRTOS-Plus/Test/CMock/lib/cmock_generator_plugin_return_thru_ptr.rb
new file mode 100644
index 000000000..932155936
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/lib/cmock_generator_plugin_return_thru_ptr.rb
@@ -0,0 +1,79 @@
+class CMockGeneratorPluginReturnThruPtr
+  attr_reader :priority
+  attr_accessor :utils
+
+  def initialize(_config, utils)
+    @utils        = utils
+    @priority     = 9
+  end
+
+  def instance_typedefs(function)
+    lines = ''
+    function[:args].each do |arg|
+      next unless @utils.ptr_or_str?(arg[:type]) && !(arg[:const?])
+
+      lines << "  char ReturnThruPtr_#{arg[:name]}_Used;\n"
+      lines << "  #{arg[:type]} ReturnThruPtr_#{arg[:name]}_Val;\n"
+      lines << "  int ReturnThruPtr_#{arg[:name]}_Size;\n"
+    end
+    lines
+  end
+
+  def mock_function_declarations(function)
+    lines = ''
+    function[:args].each do |arg|
+      next unless @utils.ptr_or_str?(arg[:type]) && !(arg[:const?])
+
+      lines << "#define #{function[:name]}_ReturnThruPtr_#{arg[:name]}(#{arg[:name]})"
+      # If the pointer type actually contains an asterisk, we can do sizeof the type (super safe), otherwise
+      # we need to do a sizeof the dereferenced pointer (which could be a problem if give the wrong size
+      lines << if arg[:type][-1] == '*'
+                 " #{function[:name]}_CMockReturnMemThruPtr_#{arg[:name]}(__LINE__, #{arg[:name]}, sizeof(#{arg[:type][0..-2]}))\n"
+               else
+                 " #{function[:name]}_CMockReturnMemThruPtr_#{arg[:name]}(__LINE__, #{arg[:name]}, sizeof(*#{arg[:name]}))\n"
+               end
+      lines << "#define #{function[:name]}_ReturnArrayThruPtr_#{arg[:name]}(#{arg[:name]}, cmock_len)"
+      lines << " #{function[:name]}_CMockReturnMemThruPtr_#{arg[:name]}(__LINE__, #{arg[:name]}, (int)(cmock_len * (int)sizeof(*#{arg[:name]})))\n"
+      lines << "#define #{function[:name]}_ReturnMemThruPtr_#{arg[:name]}(#{arg[:name]}, cmock_size)"
+      lines << " #{function[:name]}_CMockReturnMemThruPtr_#{arg[:name]}(__LINE__, #{arg[:name]}, cmock_size)\n"
+      lines << "void #{function[:name]}_CMockReturnMemThruPtr_#{arg[:name]}(UNITY_LINE_TYPE cmock_line, #{arg[:type]} #{arg[:name]}, int cmock_size);\n"
+    end
+    lines
+  end
+
+  def mock_interfaces(function)
+    lines = []
+    func_name = function[:name]
+    function[:args].each do |arg|
+      arg_name = arg[:name]
+      next unless @utils.ptr_or_str?(arg[:type]) && !(arg[:const?])
+
+      lines << "void #{func_name}_CMockReturnMemThruPtr_#{arg_name}(UNITY_LINE_TYPE cmock_line, #{arg[:type]} #{arg_name}, int cmock_size)\n"
+      lines << "{\n"
+      lines << "  CMOCK_#{func_name}_CALL_INSTANCE* cmock_call_instance = " \
+               "(CMOCK_#{func_name}_CALL_INSTANCE*)CMock_Guts_GetAddressFor(CMock_Guts_MemEndOfChain(Mock.#{func_name}_CallInstance));\n"
+      lines << "  UNITY_TEST_ASSERT_NOT_NULL(cmock_call_instance, cmock_line, CMockStringPtrPreExp);\n"
+      lines << "  cmock_call_instance->ReturnThruPtr_#{arg_name}_Used = 1;\n"
+      lines << "  cmock_call_instance->ReturnThruPtr_#{arg_name}_Val = #{arg_name};\n"
+      lines << "  cmock_call_instance->ReturnThruPtr_#{arg_name}_Size = cmock_size;\n"
+      lines << "}\n\n"
+    end
+    lines
+  end
+
+  def mock_implementation(function)
+    lines = []
+    function[:args].each do |arg|
+      arg_name = arg[:name]
+      next unless @utils.ptr_or_str?(arg[:type]) && !(arg[:const?])
+
+      lines << "  if (cmock_call_instance->ReturnThruPtr_#{arg_name}_Used)\n"
+      lines << "  {\n"
+      lines << "    UNITY_TEST_ASSERT_NOT_NULL(#{arg_name}, cmock_line, CMockStringPtrIsNULL);\n"
+      lines << "    memcpy((void*)#{arg_name}, (void*)cmock_call_instance->ReturnThruPtr_#{arg_name}_Val,\n"
+      lines << "      cmock_call_instance->ReturnThruPtr_#{arg_name}_Size);\n"
+      lines << "  }\n"
+    end
+    lines
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/lib/cmock_generator_utils.rb b/FreeRTOS-Plus/Test/CMock/lib/cmock_generator_utils.rb
new file mode 100644
index 000000000..11225d6ee
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/lib/cmock_generator_utils.rb
@@ -0,0 +1,247 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+class CMockGeneratorUtils
+  attr_accessor :config, :helpers, :ordered, :ptr_handling, :arrays, :cexception
+
+  def initialize(config, helpers = {})
+    @config = config
+    @ptr_handling = @config.when_ptr
+    @ordered      = @config.enforce_strict_ordering
+    @arrays       = @config.plugins.include? :array
+    @cexception   = @config.plugins.include? :cexception
+    @expect_any   = @config.plugins.include? :expect_any_args
+    @return_thru_ptr = @config.plugins.include? :return_thru_ptr
+    @ignore_arg = @config.plugins.include? :ignore_arg
+    @ignore = @config.plugins.include? :ignore
+    @treat_as = @config.treat_as
+    @helpers = helpers
+  end
+
+  def self.arg_type_with_const(arg)
+    # Restore any "const" that was removed in header parsing
+    if arg[:type].include?('*')
+      arg[:const_ptr?] ? "#{arg[:type]} const" : arg[:type]
+    else
+      arg[:const?] ? "const #{arg[:type]}" : arg[:type]
+    end
+  end
+
+  def arg_type_with_const(arg)
+    self.class.arg_type_with_const(arg)
+  end
+
+  def code_verify_an_arg_expectation(function, arg)
+    if @arrays
+      case @ptr_handling
+      when :smart        then code_verify_an_arg_expectation_with_smart_arrays(function, arg)
+      when :compare_data then code_verify_an_arg_expectation_with_normal_arrays(function, arg)
+      when :compare_ptr  then raise "ERROR: the array plugin doesn't enjoy working with :compare_ptr only.  Disable one option."
+      end
+    else
+      code_verify_an_arg_expectation_with_no_arrays(function, arg)
+    end
+  end
+
+  def code_add_base_expectation(func_name, global_ordering_supported = true)
+    lines =  "  CMOCK_MEM_INDEX_TYPE cmock_guts_index = CMock_Guts_MemNew(sizeof(CMOCK_#{func_name}_CALL_INSTANCE));\n"
+    lines << "  CMOCK_#{func_name}_CALL_INSTANCE* cmock_call_instance = (CMOCK_#{func_name}_CALL_INSTANCE*)CMock_Guts_GetAddressFor(cmock_guts_index);\n"
+    lines << "  UNITY_TEST_ASSERT_NOT_NULL(cmock_call_instance, cmock_line, CMockStringOutOfMemory);\n"
+    lines << "  memset(cmock_call_instance, 0, sizeof(*cmock_call_instance));\n"
+    lines << "  Mock.#{func_name}_CallInstance = CMock_Guts_MemChain(Mock.#{func_name}_CallInstance, cmock_guts_index);\n"
+    lines << "  Mock.#{func_name}_IgnoreBool = (char)0;\n" if @ignore
+    lines << "  cmock_call_instance->LineNumber = cmock_line;\n"
+    lines << "  cmock_call_instance->CallOrder = ++GlobalExpectCount;\n" if @ordered && global_ordering_supported
+    lines << "  cmock_call_instance->ExceptionToThrow = CEXCEPTION_NONE;\n" if @cexception
+    lines << "  cmock_call_instance->ExpectAnyArgsBool = (char)0;\n" if @expect_any
+    lines
+  end
+
+  def code_add_an_arg_expectation(arg, depth = 1)
+    lines =  code_assign_argument_quickly("cmock_call_instance->Expected_#{arg[:name]}", arg)
+    lines << "  cmock_call_instance->Expected_#{arg[:name]}_Depth = #{arg[:name]}_Depth;\n" if @arrays && (depth.class == String)
+    lines << "  cmock_call_instance->IgnoreArg_#{arg[:name]} = 0;\n" if @ignore_arg
+    lines << "  cmock_call_instance->ReturnThruPtr_#{arg[:name]}_Used = 0;\n" if @return_thru_ptr && ptr_or_str?(arg[:type]) && !(arg[:const?])
+    lines
+  end
+
+  def code_assign_argument_quickly(dest, arg)
+    if arg[:ptr?] || @treat_as.include?(arg[:type])
+      "  #{dest} = #{arg[:name]};\n"
+    else
+      assert_expr = "sizeof(#{arg[:name]}) == sizeof(#{arg[:type]}) ? 1 : -1"
+      comment = "/* add #{arg[:type]} to :treat_as_array if this causes an error */"
+      "  memcpy((void*)(&#{dest}), (void*)(&#{arg[:name]}),\n" \
+        "         sizeof(#{arg[:type]}[#{assert_expr}])); #{comment}\n"
+    end
+  end
+
+  def code_add_argument_loader(function)
+    if function[:args_string] != 'void'
+      if @arrays
+        args_string = function[:args].map do |m|
+          type = arg_type_with_const(m)
+          m[:ptr?] ? "#{type} #{m[:name]}, int #{m[:name]}_Depth" : "#{type} #{m[:name]}"
+        end.join(', ')
+        "void CMockExpectParameters_#{function[:name]}(CMOCK_#{function[:name]}_CALL_INSTANCE* cmock_call_instance, #{args_string})\n{\n" +
+          function[:args].inject('') { |all, arg| all + code_add_an_arg_expectation(arg, (arg[:ptr?] ? "#{arg[:name]}_Depth" : 1)) } +
+          "}\n\n"
+      else
+        "void CMockExpectParameters_#{function[:name]}(CMOCK_#{function[:name]}_CALL_INSTANCE* cmock_call_instance, #{function[:args_string]})\n{\n" +
+          function[:args].inject('') { |all, arg| all + code_add_an_arg_expectation(arg) } +
+          "}\n\n"
+      end
+    else
+      ''
+    end
+  end
+
+  def code_call_argument_loader(function)
+    if function[:args_string] != 'void'
+      args = function[:args].map do |m|
+        if @arrays && m[:ptr?] && !(m[:array_data?])
+          "#{m[:name]}, 1"
+        elsif @arrays && m[:array_size?]
+          "#{m[:name]}, #{m[:name]}"
+        else
+          m[:name]
+        end
+      end
+      "  CMockExpectParameters_#{function[:name]}(cmock_call_instance, #{args.join(', ')});\n"
+    else
+      ''
+    end
+  end
+
+  def ptr_or_str?(arg_type)
+    (arg_type.include?('*') ||
+            @treat_as.fetch(arg_type, '').include?('*'))
+  end
+
+  # private ######################
+
+  def lookup_expect_type(_function, arg)
+    c_type     = arg[:type]
+    arg_name   = arg[:name]
+    expected   = "cmock_call_instance->Expected_#{arg_name}"
+    ignore     = "cmock_call_instance->IgnoreArg_#{arg_name}"
+    unity_func = if (arg[:ptr?]) && ((c_type =~ /\*\*/) || (@ptr_handling == :compare_ptr))
+                   ['UNITY_TEST_ASSERT_EQUAL_PTR', '']
+                 else
+                   @helpers.nil? || @helpers[:unity_helper].nil? ? ['UNITY_TEST_ASSERT_EQUAL', ''] : @helpers[:unity_helper].get_helper(c_type)
+                 end
+    [c_type, arg_name, expected, ignore, unity_func[0], unity_func[1]]
+  end
+
+  def code_verify_an_arg_expectation_with_no_arrays(function, arg)
+    c_type, arg_name, expected, ignore, unity_func, pre = lookup_expect_type(function, arg)
+    lines = ''
+    lines << "  if (!#{ignore})\n" if @ignore_arg
+    lines << "  {\n"
+    lines << "    UNITY_SET_DETAILS(CMockString_#{function[:name]},CMockString_#{arg_name});\n"
+    case unity_func
+    when 'UNITY_TEST_ASSERT_EQUAL_MEMORY'
+      c_type_local = c_type.gsub(/\*$/, '')
+      lines << "    UNITY_TEST_ASSERT_EQUAL_MEMORY((void*)(#{pre}#{expected}), (void*)(#{pre}#{arg_name}), sizeof(#{c_type_local}), cmock_line, CMockStringMismatch);\n"
+    when 'UNITY_TEST_ASSERT_EQUAL_MEMORY_ARRAY'
+      if pre == '&'
+        lines << "    UNITY_TEST_ASSERT_EQUAL_MEMORY((void*)(#{pre}#{expected}), (void*)(#{pre}#{arg_name}), sizeof(#{c_type.sub('*', '')}), cmock_line, CMockStringMismatch);\n"
+      else
+        lines << "    if (#{pre}#{expected} == NULL)\n"
+        lines << "      { UNITY_TEST_ASSERT_NULL(#{pre}#{arg_name}, cmock_line, CMockStringExpNULL); }\n"
+        lines << "    else\n"
+        lines << "      { UNITY_TEST_ASSERT_EQUAL_MEMORY((void*)(#{pre}#{expected}), (void*)(#{pre}#{arg_name}), sizeof(#{c_type.sub('*', '')}), cmock_line, CMockStringMismatch); }\n"
+      end
+    when /_ARRAY/
+      if pre == '&'
+        lines << "    #{unity_func}(#{pre}#{expected}, #{pre}#{arg_name}, 1, cmock_line, CMockStringMismatch);\n"
+      else
+        lines << "    if (#{pre}#{expected} == NULL)\n"
+        lines << "      { UNITY_TEST_ASSERT_NULL(#{pre}#{arg_name}, cmock_line, CMockStringExpNULL); }\n"
+        lines << "    else\n"
+        lines << "      { #{unity_func}(#{pre}#{expected}, #{pre}#{arg_name}, 1, cmock_line, CMockStringMismatch); }\n"
+      end
+    else
+      lines << "    #{unity_func}(#{pre}#{expected}, #{pre}#{arg_name}, cmock_line, CMockStringMismatch);\n"
+    end
+    lines << "  }\n"
+    lines
+  end
+
+  def code_verify_an_arg_expectation_with_normal_arrays(function, arg)
+    c_type, arg_name, expected, ignore, unity_func, pre = lookup_expect_type(function, arg)
+    depth_name = arg[:ptr?] ? "cmock_call_instance->Expected_#{arg_name}_Depth" : 1
+    lines = ''
+    lines << "  if (!#{ignore})\n" if @ignore_arg
+    lines << "  {\n"
+    lines << "    UNITY_SET_DETAILS(CMockString_#{function[:name]},CMockString_#{arg_name});\n"
+    case unity_func
+    when 'UNITY_TEST_ASSERT_EQUAL_MEMORY'
+      c_type_local = c_type.gsub(/\*$/, '')
+      lines << "    UNITY_TEST_ASSERT_EQUAL_MEMORY((void*)(#{pre}#{expected}), (void*)(#{pre}#{arg_name}), sizeof(#{c_type_local}), cmock_line, CMockStringMismatch);\n"
+    when 'UNITY_TEST_ASSERT_EQUAL_MEMORY_ARRAY'
+      if pre == '&'
+        lines << "    UNITY_TEST_ASSERT_EQUAL_MEMORY((void*)(#{pre}#{expected}), (void*)(#{pre}#{arg_name}), sizeof(#{c_type.sub('*', '')}), cmock_line, CMockStringMismatch);\n"
+      else
+        lines << "    if (#{pre}#{expected} == NULL)\n"
+        lines << "      { UNITY_TEST_ASSERT_NULL(#{pre}#{arg_name}, cmock_line, CMockStringExpNULL); }\n"
+        lines << "    else\n"
+        lines << "      { UNITY_TEST_ASSERT_EQUAL_MEMORY_ARRAY((void*)(#{pre}#{expected}), (void*)(#{pre}#{arg_name}), sizeof(#{c_type.sub('*', '')}), #{depth_name}, cmock_line, CMockStringMismatch); }\n"
+      end
+    when /_ARRAY/
+      if pre == '&'
+        lines << "    #{unity_func}(#{pre}#{expected}, #{pre}#{arg_name}, #{depth_name}, cmock_line, CMockStringMismatch);\n"
+      else
+        lines << "    if (#{pre}#{expected} == NULL)\n"
+        lines << "      { UNITY_TEST_ASSERT_NULL(#{pre}#{arg_name}, cmock_line, CMockStringExpNULL); }\n"
+        lines << "    else\n"
+        lines << "      { #{unity_func}(#{pre}#{expected}, #{pre}#{arg_name}, #{depth_name}, cmock_line, CMockStringMismatch); }\n"
+      end
+    else
+      lines << "    #{unity_func}(#{pre}#{expected}, #{pre}#{arg_name}, cmock_line, CMockStringMismatch);\n"
+    end
+    lines << "  }\n"
+    lines
+  end
+
+  def code_verify_an_arg_expectation_with_smart_arrays(function, arg)
+    c_type, arg_name, expected, ignore, unity_func, pre = lookup_expect_type(function, arg)
+    depth_name = arg[:ptr?] ? "cmock_call_instance->Expected_#{arg_name}_Depth" : 1
+    lines = ''
+    lines << "  if (!#{ignore})\n" if @ignore_arg
+    lines << "  {\n"
+    lines << "    UNITY_SET_DETAILS(CMockString_#{function[:name]},CMockString_#{arg_name});\n"
+    case unity_func
+    when 'UNITY_TEST_ASSERT_EQUAL_MEMORY'
+      c_type_local = c_type.gsub(/\*$/, '')
+      lines << "    UNITY_TEST_ASSERT_EQUAL_MEMORY((void*)(#{pre}#{expected}), (void*)(#{pre}#{arg_name}), sizeof(#{c_type_local}), cmock_line, CMockStringMismatch);\n"
+    when 'UNITY_TEST_ASSERT_EQUAL_MEMORY_ARRAY'
+      if pre == '&'
+        lines << "    UNITY_TEST_ASSERT_EQUAL_MEMORY_ARRAY((void*)(#{pre}#{expected}), (void*)(#{pre}#{arg_name}), sizeof(#{c_type.sub('*', '')}), #{depth_name}, cmock_line, CMockStringMismatch);\n"
+      else
+        lines << "    if (#{pre}#{expected} == NULL)\n"
+        lines << "      { UNITY_TEST_ASSERT_NULL(#{arg_name}, cmock_line, CMockStringExpNULL); }\n"
+        lines << (depth_name != 1 ? "    else if (#{depth_name} == 0)\n      { UNITY_TEST_ASSERT_EQUAL_PTR(#{pre}#{expected}, #{pre}#{arg_name}, cmock_line, CMockStringMismatch); }\n" : '')
+        lines << "    else\n"
+        lines << "      { UNITY_TEST_ASSERT_EQUAL_MEMORY_ARRAY((void*)(#{pre}#{expected}), (void*)(#{pre}#{arg_name}), sizeof(#{c_type.sub('*', '')}), #{depth_name}, cmock_line, CMockStringMismatch); }\n"
+      end
+    when /_ARRAY/
+      if pre == '&'
+        lines << "    #{unity_func}(#{pre}#{expected}, #{pre}#{arg_name}, #{depth_name}, cmock_line, CMockStringMismatch);\n"
+      else
+        lines << "    if (#{pre}#{expected} == NULL)\n"
+        lines << "      { UNITY_TEST_ASSERT_NULL(#{pre}#{arg_name}, cmock_line, CMockStringExpNULL); }\n"
+        lines << (depth_name != 1 ? "    else if (#{depth_name} == 0)\n      { UNITY_TEST_ASSERT_EQUAL_PTR(#{pre}#{expected}, #{pre}#{arg_name}, cmock_line, CMockStringMismatch); }\n" : '')
+        lines << "    else\n"
+        lines << "      { #{unity_func}(#{pre}#{expected}, #{pre}#{arg_name}, #{depth_name}, cmock_line, CMockStringMismatch); }\n"
+      end
+    else
+      lines << "    #{unity_func}(#{pre}#{expected}, #{pre}#{arg_name}, cmock_line, CMockStringMismatch);\n"
+    end
+    lines << "  }\n"
+    lines
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/lib/cmock_header_parser.rb b/FreeRTOS-Plus/Test/CMock/lib/cmock_header_parser.rb
new file mode 100644
index 000000000..8638a04f9
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/lib/cmock_header_parser.rb
@@ -0,0 +1,595 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+class CMockHeaderParser
+  attr_accessor :funcs, :c_attr_noconst, :c_attributes, :treat_as_void, :treat_externs, :treat_inlines, :inline_function_patterns
+
+  def initialize(cfg)
+    @funcs = []
+    @c_strippables = cfg.strippables
+    @c_attr_noconst = cfg.attributes.uniq - ['const']
+    @c_attributes = ['const'] + c_attr_noconst
+    @c_calling_conventions = cfg.c_calling_conventions.uniq
+    @treat_as_array = cfg.treat_as_array
+    @treat_as_void = (['void'] + cfg.treat_as_void).uniq
+    @function_declaration_parse_base_match = '([\w\s\*\(\),\[\]]+??)\(([\w\s\*\(\),\.\[\]+\-\/]*)\)'
+    @declaration_parse_matcher = /#{@function_declaration_parse_base_match}$/m
+    @standards = (%w[int short char long unsigned signed] + cfg.treat_as.keys).uniq
+    @array_size_name = cfg.array_size_name
+    @array_size_type = (%w[int size_t] + cfg.array_size_type).uniq
+    @when_no_prototypes = cfg.when_no_prototypes
+    @local_as_void = @treat_as_void
+    @verbosity = cfg.verbosity
+    @treat_externs = cfg.treat_externs
+    @treat_inlines = cfg.treat_inlines
+    @inline_function_patterns = cfg.inline_function_patterns
+    @c_strippables += ['extern'] if @treat_externs == :include # we'll need to remove the attribute if we're allowing externs
+    @c_strippables += ['inline'] if @treat_inlines == :include # we'll need to remove the attribute if we're allowing inlines
+  end
+
+  def parse(name, source)
+    @module_name = name.gsub(/\W/, '')
+    @typedefs = []
+    @funcs = []
+    @normalized_source = nil
+    function_names = []
+
+    all_funcs = parse_functions(import_source(source)).map { |item| [item] }
+    all_funcs += parse_cpp_functions(import_source(source, true))
+    all_funcs.map do |decl|
+      func = parse_declaration(*decl)
+      unless function_names.include? func[:name]
+        @funcs << func
+        function_names << func[:name]
+      end
+    end
+
+    @normalized_source = if @treat_inlines == :include
+                           transform_inline_functions(source)
+                         else
+                           ''
+                         end
+
+    { :includes  => nil,
+      :functions => @funcs,
+      :typedefs  => @typedefs,
+      :normalized_source    => @normalized_source }
+  end
+
+  private if $ThisIsOnlyATest.nil? ################
+
+  def remove_nested_pairs_of_braces(source)
+    # remove nested pairs of braces because no function declarations will be inside of them (leave outer pair for function definition detection)
+    if RUBY_VERSION.split('.')[0].to_i > 1
+      # we assign a string first because (no joke) if Ruby 1.9.3 sees this line as a regex, it will crash.
+      r = '\\{([^\\{\\}]*|\\g<0>)*\\}'
+      source.gsub!(/#{r}/m, '{ }')
+    else
+      while source.gsub!(/\{[^\{\}]*\{[^\{\}]*\}[^\{\}]*\}/m, '{ }')
+      end
+    end
+
+    source
+  end
+
+  # Return the number of pairs of braces/square brackets in the function provided by the user
+  # +source+:: String containing the function to be processed
+  def count_number_of_pairs_of_braces_in_function(source)
+    is_function_start_found = false
+    curr_level = 0
+    total_pairs = 0
+
+    source.each_char do |c|
+      if c == '{'
+        curr_level += 1
+        total_pairs += 1
+        is_function_start_found = true
+      elsif c == '}'
+        curr_level -= 1
+      end
+
+      break if is_function_start_found && curr_level == 0 # We reached the end of the inline function body
+    end
+
+    if curr_level != 0
+      total_pairs = 0 # Something is fishy about this source, not enough closing braces?
+    end
+
+    total_pairs
+  end
+
+  # Transform inline functions to regular functions in the source by the user
+  # +source+:: String containing the source to be processed
+  def transform_inline_functions(source)
+    inline_function_regex_formats = []
+    square_bracket_pair_regex_format = /\{[^\{\}]*\}/ # Regex to match one whole block enclosed by two square brackets
+
+    # Convert user provided string patterns to regex
+    # Use word bounderies before and after the user regex to limit matching to actual word iso part of a word
+    @inline_function_patterns.each do |user_format_string|
+      user_regex = Regexp.new(user_format_string)
+      word_boundary_before_user_regex = /\b/
+      cleanup_spaces_after_user_regex = /[ ]*\b/
+      inline_function_regex_formats << Regexp.new(word_boundary_before_user_regex.source + user_regex.source + cleanup_spaces_after_user_regex.source)
+    end
+
+    # let's clean up the encoding in case they've done anything weird with the characters we might find
+    source = source.force_encoding('ISO-8859-1').encode('utf-8', :replace => nil)
+
+    # smush multiline macros into single line (checking for continuation character at end of line '\')
+    # If the user uses a macro to declare an inline function,
+    # smushing the macros makes it easier to recognize them as a macro and if required,
+    # remove them later on in this function
+    source.gsub!(/\s*\\\s*/m, ' ')
+
+    # Just looking for static|inline in the gsub is a bit too aggressive (functions that are named like this, ...), so we try to be a bit smarter
+    # Instead, look for an inline pattern (f.e. "static inline") and parse it.
+    # Below is a small explanation on how the general mechanism works:
+    #  - Everything before the match should just be copied, we don't want
+    #    to touch anything but the inline functions.
+    #  - Remove the implementation of the inline function (this is enclosed
+    #    in square brackets) and replace it with ";" to complete the
+    #    transformation to normal/non-inline function.
+    #    To ensure proper removal of the function body, we count the number of square-bracket pairs
+    #    and remove the pairs one-by-one.
+    #  - Copy everything after the inline function implementation and start the parsing of the next inline function
+    # There are ofcourse some special cases (inline macro declarations, inline function declarations, ...) which are handled and explained below
+    inline_function_regex_formats.each do |format|
+      loop do
+        inline_function_match = source.match(/#{format}/) # Search for inline function declaration
+
+        break if inline_function_match.nil? # No inline functions so nothing to do
+
+        # 1. Determine if we are dealing with a user defined macro to declare inline functions
+        # If the end of the pre-match string is a macro-declaration-like string,
+        # we are dealing with a user defined macro to declare inline functions
+        if /(#define\s*)\z/ =~ inline_function_match.pre_match
+          # Remove the macro from the source
+          stripped_pre_match = inline_function_match.pre_match.sub(/(#define\s*)\z/, '')
+          stripped_post_match = inline_function_match.post_match.sub(/\A(.*[\n]?)/, '')
+          source = stripped_pre_match + stripped_post_match
+          next
+        end
+
+        # 2. Determine if we are dealing with an inline function declaration iso function definition
+        # If the start of the post-match string is a function-declaration-like string (something ending with semicolon after the function arguments),
+        # we are dealing with a inline function declaration
+        if /\A#{@function_declaration_parse_base_match}\s*;/m =~ inline_function_match.post_match
+          # Only remove the inline part from the function declaration, leaving the function declaration won't do any harm
+          source = inline_function_match.pre_match + inline_function_match.post_match
+          next
+        end
+
+        # 3. If we get here, we found an inline function declaration AND inline function body.
+        #    Remove the function body to transform it into a 'normal' function.
+        total_pairs_to_remove = count_number_of_pairs_of_braces_in_function(inline_function_match.post_match)
+
+        break if total_pairs_to_remove == 0 # Bad source?
+
+        inline_function_stripped = inline_function_match.post_match
+
+        total_pairs_to_remove.times do
+          inline_function_stripped.sub!(/\s*#{square_bracket_pair_regex_format}/, ';') # Remove inline implementation (+ some whitespace because it's prettier)
+        end
+
+        source = inline_function_match.pre_match + inline_function_stripped # Make new source with the inline function removed and move on to the next
+      end
+    end
+
+    source
+  end
+
+  def import_source(source, cpp = false)
+    # let's clean up the encoding in case they've done anything weird with the characters we might find
+    source = source.force_encoding('ISO-8859-1').encode('utf-8', :replace => nil)
+
+    # void must be void for cmock _ExpectAndReturn calls to process properly, not some weird typedef which equates to void
+    # to a certain extent, this action assumes we're chewing on pre-processed header files, otherwise we'll most likely just get stuff from @treat_as_void
+    @local_as_void = @treat_as_void
+    void_types = source.scan(/typedef\s+(?:\(\s*)?void(?:\s*\))?\s+([\w]+)\s*;/)
+    if void_types
+      @local_as_void += void_types.flatten.uniq.compact
+    end
+
+    # If user wants to mock inline functions,
+    # remove the (user specific) inline keywords before removing anything else to avoid missing an inline function
+    if @treat_inlines == :include
+      @inline_function_patterns.each do |user_format_string|
+        source.gsub!(/#{user_format_string}/, '') # remove user defined inline function patterns
+      end
+    end
+
+    # smush multiline macros into single line (checking for continuation character at end of line '\')
+    source.gsub!(/\s*\\\s*/m, ' ')
+
+    # remove comments (block and line, in three steps to ensure correct precedence)
+    source.gsub!(/(?<!\*)\/\/(?:.+\/\*|\*(?:$|[^\/])).*$/, '')  # remove line comments that comment out the start of blocks
+    source.gsub!(/\/\*.*?\*\//m, '')                            # remove block comments
+    source.gsub!(/\/\/.*$/, '')                                 # remove line comments (all that remain)
+
+    # remove assembler pragma sections
+    source.gsub!(/^\s*#\s*pragma\s+asm\s+.*?#\s*pragma\s+endasm/m, '')
+
+    # remove gcc's __attribute__ tags
+    source.gsub!(/__attribute(?:__)?\s*\(\(+.*\)\)+/, '')
+
+    # remove preprocessor statements and extern "C"
+    source.gsub!(/^\s*#.*/, '')
+    source.gsub!(/extern\s+\"C\"\s*\{/, '')
+
+    # enums, unions, structs, and typedefs can all contain things (e.g. function pointers) that parse like function prototypes, so yank them
+    # forward declared structs are removed before struct definitions so they don't mess up real thing later. we leave structs keywords in function prototypes
+    source.gsub!(/^[\w\s]*struct[^;\{\}\(\)]+;/m, '')                                      # remove forward declared structs
+    source.gsub!(/^[\w\s]*(enum|union|struct|typedef)[\w\s]*\{[^\}]+\}[\w\s\*\,]*;/m, '')  # remove struct, union, and enum definitions and typedefs with braces
+    # remove problem keywords
+    source.gsub!(/(\W)(?:register|auto|restrict)(\W)/, '\1\2')
+    source.gsub!(/(\W)(?:static)(\W)/, '\1\2') unless cpp
+
+    source.gsub!(/\s*=\s*['"a-zA-Z0-9_\.]+\s*/, '')                                        # remove default value statements from argument lists
+    source.gsub!(/^(?:[\w\s]*\W)?typedef\W[^;]*/m, '')                                     # remove typedef statements
+    source.gsub!(/\)(\w)/, ') \1')                                                         # add space between parenthese and alphanumeric
+    source.gsub!(/(^|\W+)(?:#{@c_strippables.join('|')})(?=$|\W+)/, '\1') unless @c_strippables.empty? # remove known attributes slated to be stripped
+
+    # scan standalone function pointers and remove them, because they can just be ignored
+    source.gsub!(/\w+\s*\(\s*\*\s*\w+\s*\)\s*\([^)]*\)\s*;/, ';')
+
+    # scan for functions which return function pointers, because they are a pain
+    source.gsub!(/([\w\s\*]+)\(*\(\s*\*([\w\s\*]+)\s*\(([\w\s\*,]*)\)\)\s*\(([\w\s\*,]*)\)\)*/) do |_m|
+      functype = "cmock_#{@module_name}_func_ptr#{@typedefs.size + 1}"
+      unless cpp # only collect once
+        @typedefs << "typedef #{Regexp.last_match(1).strip}(*#{functype})(#{Regexp.last_match(4)});"
+        "#{functype} #{Regexp.last_match(2).strip}(#{Regexp.last_match(3)});"
+      end
+    end
+
+    source = remove_nested_pairs_of_braces(source) unless cpp
+
+    if @treat_inlines == :include
+      # Functions having "{ }" at this point are/were inline functions,
+      # User wants them in so 'disguise' them as normal functions with the ";"
+      source.gsub!('{ }', ';')
+    end
+
+    # remove function definitions by stripping off the arguments right now
+    source.gsub!(/\([^\)]*\)\s*\{[^\}]*\}/m, ';')
+
+    # drop extra white space to make the rest go faster
+    source.gsub!(/^\s+/, '')          # remove extra white space from beginning of line
+    source.gsub!(/\s+$/, '')          # remove extra white space from end of line
+    source.gsub!(/\s*\(\s*/, '(')     # remove extra white space from before left parens
+    source.gsub!(/\s*\)\s*/, ')')     # remove extra white space from before right parens
+    source.gsub!(/\s+/, ' ')          # remove remaining extra white space
+
+    # split lines on semicolons and remove things that are obviously not what we are looking for
+    src_lines = source.split(/\s*;\s*/)
+    src_lines = src_lines.uniq unless cpp # must retain closing braces for class/namespace
+    src_lines.delete_if { |line| line.strip.empty? } # remove blank lines
+    src_lines.delete_if { |line| !(line =~ /[\w\s\*]+\(+\s*\*[\*\s]*[\w\s]+(?:\[[\w\s]*\]\s*)+\)+\s*\((?:[\w\s\*]*,?)*\s*\)/).nil? } # remove function pointer arrays
+
+    unless @treat_externs == :include
+      src_lines.delete_if { |line| !(line =~ /(?:^|\s+)(?:extern)\s+/).nil? } # remove extern functions
+    end
+
+    unless @treat_inlines == :include
+      src_lines.delete_if { |line| !(line =~ /(?:^|\s+)(?:inline)\s+/).nil? } # remove inline functions
+    end
+
+    src_lines.delete_if(&:empty?) # drop empty lines
+  end
+
+  # Rudimentary C++ parser - does not handle all situations - e.g.:
+  #  * A namespace function appears after a class with private members (should be parsed)
+  #  * Anonymous namespace (shouldn't parse anything - no matter how nested - within it)
+  #  * A class nested within another class
+  def parse_cpp_functions(source)
+    funcs = []
+
+    ns = []
+    pub = false
+    source.each do |line|
+      # Search for namespace, class, opening and closing braces
+      line.scan(/(?:(?:\b(?:namespace|class)\s+(?:\S+)\s*)?{)|}/).each do |item|
+        if item == '}'
+          ns.pop
+        else
+          token = item.strip.sub(/\s+/, ' ')
+          ns << token
+
+          pub = false if token.start_with? 'class'
+          pub = true if token.start_with? 'namespace'
+        end
+      end
+
+      pub = true if line =~ /public:/
+      pub = false if line =~ /private:/ || line =~ /protected:/
+
+      # ignore non-public and non-static
+      next unless pub
+      next unless line =~ /\bstatic\b/
+
+      line.sub!(/^.*static/, '')
+      next unless line =~ @declaration_parse_matcher
+
+      tmp = ns.reject { |item| item == '{' }
+
+      # Identify class name, if any
+      cls = nil
+      if tmp[-1].start_with? 'class '
+        cls = tmp.pop.sub(/class (\S+) {/, '\1')
+      end
+
+      # Assemble list of namespaces
+      tmp.each { |item| item.sub!(/(?:namespace|class) (\S+) {/, '\1') }
+
+      funcs << [line.strip.gsub(/\s+/, ' '), tmp, cls]
+    end
+    funcs
+  end
+
+  def parse_functions(source)
+    funcs = []
+    source.each { |line| funcs << line.strip.gsub(/\s+/, ' ') if line =~ @declaration_parse_matcher }
+    if funcs.empty?
+      case @when_no_prototypes
+      when :error
+        raise 'ERROR: No function prototypes found!'
+      when :warn
+        puts 'WARNING: No function prototypes found!' unless @verbosity < 1
+      end
+    end
+    funcs
+  end
+
+  def parse_type_and_name(arg)
+    # Split up words and remove known attributes.  For pointer types, make sure
+    # to remove 'const' only when it applies to the pointer itself, not when it
+    # applies to the type pointed to.  For non-pointer types, remove any
+    # occurrence of 'const'.
+    arg.gsub!(/(\w)\*/, '\1 *') # pull asterisks away from preceding word
+    arg.gsub!(/\*(\w)/, '* \1') # pull asterisks away from following word
+    arg_array = arg.split
+    arg_info = divine_ptr_and_const(arg)
+    arg_info[:name] = arg_array[-1]
+
+    attributes = arg.include?('*') ? @c_attr_noconst : @c_attributes
+    attr_array = []
+    type_array = []
+
+    arg_array[0..-2].each do |word|
+      if attributes.include?(word)
+        attr_array << word
+      elsif @c_calling_conventions.include?(word)
+        arg_info[:c_calling_convention] = word
+      else
+        type_array << word
+      end
+    end
+
+    if arg_info[:const_ptr?]
+      attr_array << 'const'
+      type_array.delete_at(type_array.rindex('const'))
+    end
+
+    arg_info[:modifier] = attr_array.join(' ')
+    arg_info[:type] = type_array.join(' ').gsub(/\s+\*/, '*') # remove space before asterisks
+    arg_info
+  end
+
+  def parse_args(arg_list)
+    args = []
+    arg_list.split(',').each do |arg|
+      arg.strip!
+      return args if arg =~ /^\s*((\.\.\.)|(void))\s*$/ # we're done if we reach void by itself or ...
+
+      arg_info = parse_type_and_name(arg)
+      arg_info.delete(:modifier)             # don't care about this
+      arg_info.delete(:c_calling_convention) # don't care about this
+
+      # in C, array arguments implicitly degrade to pointers
+      # make the translation explicit here to simplify later logic
+      if @treat_as_array[arg_info[:type]] && !(arg_info[:ptr?])
+        arg_info[:type] = "#{@treat_as_array[arg_info[:type]]}*"
+        arg_info[:type] = "const #{arg_info[:type]}" if arg_info[:const?]
+        arg_info[:ptr?] = true
+      end
+
+      args << arg_info
+    end
+
+    # Try to find array pair in parameters following this pattern : <type> * <name>, <@array_size_type> <@array_size_name>
+    args.each_with_index do |val, index|
+      next_index = index + 1
+      next unless args.length > next_index
+
+      if (val[:ptr?] == true) && args[next_index][:name].match(@array_size_name) && @array_size_type.include?(args[next_index][:type])
+        val[:array_data?] = true
+        args[next_index][:array_size?] = true
+      end
+    end
+
+    args
+  end
+
+  def divine_ptr(arg)
+    return false unless arg.include? '*'
+    # treat "const char *" and similar as a string, not a pointer
+    return false if /(^|\s)(const\s+)?char(\s+const)?\s*\*(?!.*\*)/ =~ arg
+
+    true
+  end
+
+  def divine_const(arg)
+    # a non-pointer arg containing "const" is a constant
+    # an arg containing "const" before the last * is a pointer to a constant
+    if arg.include?('*') ? (/(^|\s|\*)const(\s(\w|\s)*)?\*(?!.*\*)/ =~ arg) : (/(^|\s)const(\s|$)/ =~ arg)
+      true
+    else
+      false
+    end
+  end
+
+  def divine_ptr_and_const(arg)
+    divination = {}
+
+    divination[:ptr?] = divine_ptr(arg)
+    divination[:const?] = divine_const(arg)
+
+    # an arg containing "const" after the last * is a constant pointer
+    divination[:const_ptr?] = /\*(?!.*\*)\s*const(\s|$)/ =~ arg ? true : false
+
+    divination
+  end
+
+  def clean_args(arg_list)
+    if @local_as_void.include?(arg_list.strip) || arg_list.empty?
+      'void'
+    else
+      c = 0
+      # magically turn brackets into asterisks, also match for parentheses that come from macros
+      arg_list.gsub!(/(\w+)(?:\s*\[[^\[\]]*\])+/, '*\1')
+      # remove space to place asterisks with type (where they belong)
+      arg_list.gsub!(/\s+\*/, '*')
+      # pull asterisks away from arg to place asterisks with type (where they belong)
+      arg_list.gsub!(/\*(\w)/, '* \1')
+
+      # scan argument list for function pointers and replace them with custom types
+      arg_list.gsub!(/([\w\s\*]+)\(+\s*\*[\*\s]*([\w\s]*)\s*\)+\s*\(((?:[\w\s\*]*,?)*)\s*\)*/) do |_m|
+        functype = "cmock_#{@module_name}_func_ptr#{@typedefs.size + 1}"
+        funcret  = Regexp.last_match(1).strip
+        funcname = Regexp.last_match(2).strip
+        funcargs = Regexp.last_match(3).strip
+        funconst = ''
+        if funcname.include? 'const'
+          funcname.gsub!('const', '').strip!
+          funconst = 'const '
+        end
+        @typedefs << "typedef #{funcret}(*#{functype})(#{funcargs});"
+        funcname = "cmock_arg#{c += 1}" if funcname.empty?
+        "#{functype} #{funconst}#{funcname}"
+      end
+
+      # scan argument list for function pointers with shorthand notation and replace them with custom types
+      arg_list.gsub!(/([\w\s\*]+)+\s+(\w+)\s*\(((?:[\w\s\*]*,?)*)\s*\)*/) do |_m|
+        functype = "cmock_#{@module_name}_func_ptr#{@typedefs.size + 1}"
+        funcret  = Regexp.last_match(1).strip
+        funcname = Regexp.last_match(2).strip
+        funcargs = Regexp.last_match(3).strip
+        funconst = ''
+        if funcname.include? 'const'
+          funcname.gsub!('const', '').strip!
+          funconst = 'const '
+        end
+        @typedefs << "typedef #{funcret}(*#{functype})(#{funcargs});"
+        funcname = "cmock_arg#{c += 1}" if funcname.empty?
+        "#{functype} #{funconst}#{funcname}"
+      end
+
+      # automatically name unnamed arguments (those that only had a type)
+      arg_list.split(/\s*,\s*/).map do |arg|
+        parts = (arg.split - ['struct', 'union', 'enum', 'const', 'const*'])
+        if (parts.size < 2) || (parts[-1][-1].chr == '*') || @standards.include?(parts[-1])
+          "#{arg} cmock_arg#{c += 1}"
+        else
+          arg
+        end
+      end.join(', ')
+    end
+  end
+
+  def parse_declaration(declaration, namespace = [], classname = nil)
+    decl = {}
+    decl[:namespace] = namespace
+    decl[:class] = classname
+
+    regex_match = @declaration_parse_matcher.match(declaration)
+    raise "Failed parsing function declaration: '#{declaration}'" if regex_match.nil?
+
+    # grab argument list
+    args = regex_match[2].strip
+
+    # process function attributes, return type, and name
+    parsed = parse_type_and_name(regex_match[1])
+
+    # Record original name without scope prefix
+    decl[:unscoped_name] = parsed[:name]
+
+    # Prefix name with namespace scope (if any) and then class
+    decl[:name] = namespace.join('_')
+    unless classname.nil?
+      decl[:name] << '_' unless decl[:name].empty?
+      decl[:name] << classname
+    end
+    # Add original name to complete fully scoped name
+    decl[:name] << '_' unless decl[:name].empty?
+    decl[:name] << decl[:unscoped_name]
+
+    decl[:modifier] = parsed[:modifier]
+    unless parsed[:c_calling_convention].nil?
+      decl[:c_calling_convention] = parsed[:c_calling_convention]
+    end
+
+    rettype = parsed[:type]
+    rettype = 'void' if @local_as_void.include?(rettype.strip)
+    decl[:return] = { :type       => rettype,
+                      :name       => 'cmock_to_return',
+                      :str        => "#{rettype} cmock_to_return",
+                      :void?      => (rettype == 'void'),
+                      :ptr?       => parsed[:ptr?]       || false,
+                      :const?     => parsed[:const?]     || false,
+                      :const_ptr? => parsed[:const_ptr?] || false }
+
+    # remove default argument statements from mock definitions
+    args.gsub!(/=\s*[a-zA-Z0-9_\.]+\s*/, ' ')
+
+    # check for var args
+    if args =~ /\.\.\./
+      decl[:var_arg] = args.match(/[\w\s]*\.\.\./).to_s.strip
+      args = if args =~ /\,[\w\s]*\.\.\./
+               args.gsub!(/\,[\w\s]*\.\.\./, '')
+             else
+               'void'
+             end
+    else
+      decl[:var_arg] = nil
+    end
+    args = clean_args(args)
+    decl[:args_string] = args
+    decl[:args] = parse_args(args)
+    decl[:args_call] = decl[:args].map { |a| a[:name] }.join(', ')
+    decl[:contains_ptr?] = decl[:args].inject(false) { |ptr, arg| arg[:ptr?] ? true : ptr }
+
+    if decl[:return][:type].nil? || decl[:name].nil? || decl[:args].nil? ||
+       decl[:return][:type].empty? || decl[:name].empty?
+      raise "Failed Parsing Declaration Prototype!\n" \
+            "  declaration: '#{declaration}'\n" \
+            "  modifier: '#{decl[:modifier]}'\n" \
+            "  return: #{prototype_inspect_hash(decl[:return])}\n" \
+            "  function: '#{decl[:name]}'\n" \
+            "  args: #{prototype_inspect_array_of_hashes(decl[:args])}\n"
+    end
+
+    decl
+  end
+
+  def prototype_inspect_hash(hash)
+    pairs = []
+    hash.each_pair { |name, value| pairs << ":#{name} => #{"'" if value.class == String}#{value}#{"'" if value.class == String}" }
+    "{#{pairs.join(', ')}}"
+  end
+
+  def prototype_inspect_array_of_hashes(array)
+    hashes = []
+    array.each { |hash| hashes << prototype_inspect_hash(hash) }
+    case array.size
+    when 0
+      return '[]'
+    when 1
+      return "[#{hashes[0]}]"
+    else
+      return "[\n    #{hashes.join("\n    ")}\n  ]\n"
+    end
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/lib/cmock_plugin_manager.rb b/FreeRTOS-Plus/Test/CMock/lib/cmock_plugin_manager.rb
new file mode 100644
index 000000000..342014e22
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/lib/cmock_plugin_manager.rb
@@ -0,0 +1,50 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+class CMockPluginManager
+  attr_accessor :plugins
+
+  def initialize(config, utils)
+    @plugins = []
+    plugins_to_load = [:expect, config.plugins].flatten.uniq.compact
+    plugins_to_load.each do |plugin|
+      plugin_name = plugin.to_s
+      object_name = 'CMockGeneratorPlugin' + camelize(plugin_name)
+      self.class.mutex.synchronize { load_plugin(plugin_name, object_name, config, utils) }
+    end
+    @plugins.sort! { |a, b| a.priority <=> b.priority }
+  end
+
+  def run(method, args = nil)
+    if args.nil?
+      @plugins.collect { |plugin| plugin.send(method) if plugin.respond_to?(method) }.flatten.join
+    else
+      @plugins.collect { |plugin| plugin.send(method, args) if plugin.respond_to?(method) }.flatten.join
+    end
+  end
+
+  def camelize(lower_case_and_underscored_word)
+    lower_case_and_underscored_word.gsub(/\/(.?)/) { '::' + Regexp.last_match(1).upcase }.gsub(/(^|_)(.)/) { Regexp.last_match(2).upcase }
+  end
+
+  def self.mutex
+    @mutex ||= Mutex.new
+  end
+
+  private
+
+  def load_plugin(plugin_name, object_name, config, utils)
+    unless Object.const_defined? object_name
+      file_name = "#{__dir__}/cmock_generator_plugin_#{plugin_name.downcase}.rb"
+      require file_name
+    end
+    class_name = Object.const_get(object_name)
+    @plugins << class_name.new(config, utils)
+  rescue StandardError
+    file_name = "#{__dir__}/cmock_generator_plugin_#{plugin_name.downcase}.rb"
+    raise "ERROR: CMock unable to load plugin '#{plugin_name}' '#{object_name}' #{file_name}"
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/lib/cmock_unityhelper_parser.rb b/FreeRTOS-Plus/Test/CMock/lib/cmock_unityhelper_parser.rb
new file mode 100644
index 000000000..9f4beb770
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/lib/cmock_unityhelper_parser.rb
@@ -0,0 +1,77 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+class CMockUnityHelperParser
+  attr_accessor :c_types
+
+  def initialize(config)
+    @config = config
+    @fallback = @config.plugins.include?(:array) ? 'UNITY_TEST_ASSERT_EQUAL_MEMORY_ARRAY' : 'UNITY_TEST_ASSERT_EQUAL_MEMORY'
+    @c_types = map_c_types.merge(import_source)
+  end
+
+  def get_helper(ctype)
+    lookup = ctype.gsub(/(?:^|(\S?)(\s*)|(\W))const(?:$|(\s*)(\S)|(\W))/, '\1\3\5\6').strip.gsub(/\s+/, '_')
+    return [@c_types[lookup], ''] if @c_types[lookup]
+
+    if lookup =~ /\*$/
+      lookup = lookup.gsub(/\*$/, '')
+      return [@c_types[lookup], '*'] if @c_types[lookup]
+    else
+      lookup += '*'
+      return [@c_types[lookup], '&'] if @c_types[lookup]
+    end
+    return ['UNITY_TEST_ASSERT_EQUAL_PTR', ''] if ctype =~ /cmock_\w+_ptr\d+/
+    raise("Don't know how to test #{ctype} and memory tests are disabled!") unless @config.memcmp_if_unknown
+
+    lookup =~ /\*$/ ? [@fallback, '&'] : [@fallback, '']
+  end
+
+  private ###########################
+
+  def map_c_types
+    c_types = {}
+    @config.treat_as.each_pair do |ctype, expecttype|
+      c_type = ctype.gsub(/\s+/, '_')
+      if expecttype =~ /\*/
+        c_types[c_type] = "UNITY_TEST_ASSERT_EQUAL_#{expecttype.delete('*')}_ARRAY"
+      else
+        c_types[c_type] = "UNITY_TEST_ASSERT_EQUAL_#{expecttype}"
+        c_types[c_type + '*'] ||= "UNITY_TEST_ASSERT_EQUAL_#{expecttype}_ARRAY"
+      end
+    end
+    c_types
+  end
+
+  def import_source
+    source = @config.load_unity_helper
+    return {} if source.nil?
+
+    c_types = {}
+    source = source.gsub(/\/\/.*$/, '') # remove line comments
+    source = source.gsub(/\/\*.*?\*\//m, '') # remove block comments
+
+    # scan for comparison helpers
+    match_regex = Regexp.new('^\s*#define\s+(UNITY_TEST_ASSERT_EQUAL_(\w+))\s*\(' + Array.new(4, '\s*\w+\s*').join(',') + '\)')
+    pairs = source.scan(match_regex).flatten.compact
+    (pairs.size / 2).times do |i|
+      expect = pairs[i * 2]
+      ctype = pairs[(i * 2) + 1]
+      c_types[ctype] = expect unless expect.include?('_ARRAY')
+    end
+
+    # scan for array variants of those helpers
+    match_regex = Regexp.new('^\s*#define\s+(UNITY_TEST_ASSERT_EQUAL_(\w+_ARRAY))\s*\(' + Array.new(5, '\s*\w+\s*').join(',') + '\)')
+    pairs = source.scan(match_regex).flatten.compact
+    (pairs.size / 2).times do |i|
+      expect = pairs[i * 2]
+      ctype = pairs[(i * 2) + 1]
+      c_types[ctype.gsub('_ARRAY', '*')] = expect
+    end
+
+    c_types
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/meson.build b/FreeRTOS-Plus/Test/CMock/meson.build
new file mode 100755
index 000000000..e29864f46
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/meson.build
@@ -0,0 +1,53 @@
+#
+# build script written by : Michael Brockus.
+# github repo author: Mike Karlesky, Mark VanderVoord, Greg Williams.
+#
+# license: MIT
+#
+project('cmock', 'c',
+    license: 'MIT',
+    meson_version: '>=0.53.0',
+    subproject_dir : 'vendor',
+    default_options: ['layout=flat', 'warning_level=3', 'werror=true', 'c_std=c11']
+)
+lang = 'c'
+cc = meson.get_compiler(lang)
+
+
+#
+# Meson: Add compiler flags
+#
+if cc.get_id() == 'clang'
+    add_project_arguments(cc.get_supported_arguments(
+            [
+                '-Wexit-time-destructors',
+                '-Wglobal-constructors',
+                '-Wmissing-prototypes',
+                '-Wmissing-noreturn',
+                '-Wno-missing-braces',
+                '-Wold-style-cast', '-Wpointer-arith', '-Wweak-vtables',
+                '-Wcast-align', '-Wconversion', '-Wcast-qual', '-Wshadow'
+            ]
+        ), language: lang)
+endif
+
+if cc.get_argument_syntax() == 'gcc'
+    add_project_arguments(cc.get_supported_arguments(
+            [
+                '-Wformat', '-Waddress', '-Winit-self', '-Wno-multichar',
+                '-Wpointer-arith'       , '-Wwrite-strings'              ,
+                '-Wno-parentheses'      , '-Wno-type-limits'             ,
+                '-Wformat-security'     , '-Wunreachable-code'           ,
+                '-Waggregate-return'    , '-Wformat-nonliteral'          ,
+                '-Wmissing-declarations', '-Wmissing-include-dirs'       ,
+                '-Wno-unused-parameter'
+            ]
+        ), language: lang)
+endif
+
+unity_dep = dependency('unity', fallback: ['unity', 'unity_dep'])
+
+#
+# Sub directory to project source code
+subdir('src')
+cmock_dep = declare_dependency(link_with: cmock_lib, include_directories: cmock_dir)
diff --git a/FreeRTOS-Plus/Test/CMock/scripts/create_makefile.rb b/FreeRTOS-Plus/Test/CMock/scripts/create_makefile.rb
new file mode 100644
index 000000000..56cb78e90
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/scripts/create_makefile.rb
@@ -0,0 +1,203 @@
+require 'fileutils'
+ABS_ROOT = FileUtils.pwd
+CMOCK_DIR = File.expand_path(ENV.fetch('CMOCK_DIR', File.join(ABS_ROOT, '..', '..')))
+require "#{CMOCK_DIR}/lib/cmock"
+UNITY_DIR = File.join(CMOCK_DIR, 'vendor', 'unity')
+require "#{UNITY_DIR}/auto/generate_test_runner"
+
+SRC_DIR =  ENV.fetch('SRC_DIR',  './src')
+TEST_DIR = ENV.fetch('TEST_DIR', './test')
+UNITY_SRC = File.join(UNITY_DIR, 'src')
+CMOCK_SRC = File.join(CMOCK_DIR, 'src')
+BUILD_DIR = ENV.fetch('BUILD_DIR', './build')
+TEST_BUILD_DIR = ENV.fetch('TEST_BUILD_DIR', File.join(BUILD_DIR, 'test'))
+OBJ_DIR = File.join(TEST_BUILD_DIR, 'obj')
+UNITY_OBJ = File.join(OBJ_DIR, 'unity.o')
+CMOCK_OBJ = File.join(OBJ_DIR, 'cmock.o')
+RUNNERS_DIR = File.join(TEST_BUILD_DIR, 'runners')
+MOCKS_DIR = File.join(TEST_BUILD_DIR, 'mocks')
+TEST_BIN_DIR = TEST_BUILD_DIR
+MOCK_PREFIX = ENV.fetch('TEST_MOCK_PREFIX', 'mock_')
+MOCK_SUFFIX = ENV.fetch('TEST_MOCK_SUFFIX', '')
+TEST_MAKEFILE = ENV.fetch('TEST_MAKEFILE', File.join(TEST_BUILD_DIR, 'MakefileTestSupport'))
+MOCK_MATCHER = /#{MOCK_PREFIX}[A-Za-z_][A-Za-z0-9_\-\.]+#{MOCK_SUFFIX}/
+
+[TEST_BUILD_DIR, OBJ_DIR, RUNNERS_DIR, MOCKS_DIR, TEST_BIN_DIR].each do |dir|
+  FileUtils.mkdir_p dir
+end
+
+all_headers_to_mock = []
+
+suppress_error = !ARGV.nil? && !ARGV.empty? && (ARGV[0].casecmp('--SILENT') == 0)
+
+File.open(TEST_MAKEFILE, 'w') do |mkfile|
+  # Define make variables
+  mkfile.puts 'CC ?= gcc'
+  mkfile.puts "BUILD_DIR = #{BUILD_DIR}"
+  mkfile.puts "SRC_DIR = #{SRC_DIR}"
+  mkfile.puts "TEST_DIR = #{TEST_DIR}"
+  mkfile.puts 'TEST_CFLAGS ?= -DTEST'
+  mkfile.puts "CMOCK_DIR ?= #{CMOCK_DIR}"
+  mkfile.puts "UNITY_DIR ?= #{UNITY_DIR}"
+  mkfile.puts 'TEST_BUILD_DIR ?= ${BUILD_DIR}/test'
+  mkfile.puts 'TEST_MAKEFILE = ${TEST_BUILD_DIR}/MakefileTestSupport'
+  mkfile.puts 'OBJ ?= ${BUILD_DIR}/obj'
+  mkfile.puts 'OBJ_DIR = ${OBJ}'
+  mkfile.puts ''
+
+  # Build Unity
+  mkfile.puts "#{UNITY_OBJ}: #{UNITY_SRC}/unity.c"
+  mkfile.puts "\t${CC} -o $@ -c $< -I #{UNITY_SRC}"
+  mkfile.puts ''
+
+  # Build CMock
+  mkfile.puts "#{CMOCK_OBJ}: #{CMOCK_SRC}/cmock.c"
+  mkfile.puts "\t${CC} -o $@ -c $< -I #{UNITY_SRC} -I #{CMOCK_SRC}"
+  mkfile.puts ''
+
+  test_sources = Dir["#{TEST_DIR}/**/test_*.c"]
+  test_targets = []
+  generator = UnityTestRunnerGenerator.new
+
+  # headers that begin with prefix or end with suffix are not included
+  all_headers = Dir["#{SRC_DIR}/**/*.h*"]
+
+  def reject_mock_files(file)
+    extn = File.extname file
+    filename = File.basename file, extn
+    if MOCK_SUFFIX.empty?
+      return filename.start_with? MOCK_PREFIX
+    end
+
+    (filename.start_with?(MOCK_PREFIX) || filename.end_with?(MOCK_SUFFIX))
+  end
+
+  all_headers = all_headers.reject { |f| reject_mock_files(f) }
+
+  makefile_targets = []
+
+  test_sources.each do |test|
+    module_name = File.basename(test, '.c')
+    src_module_name = module_name.sub(/^test_/, '')
+    test_obj = File.join(OBJ_DIR, "#{module_name}.o")
+    runner_source = File.join(RUNNERS_DIR, "runner_#{module_name}.c")
+    runner_obj = File.join(OBJ_DIR, "runner_#{module_name}.o")
+    test_bin = File.join(TEST_BIN_DIR, module_name)
+    test_results = File.join(TEST_BIN_DIR, module_name + '.testresult')
+
+    cfg = {
+      src: test,
+      includes: generator.find_includes(File.readlines(test).join(''))
+    }
+
+    # Build main project modules, with TEST defined
+    module_src = File.join(SRC_DIR, "#{src_module_name}.c")
+    module_obj = File.join(OBJ_DIR, "#{src_module_name}.o")
+    unless makefile_targets.include? module_obj
+      makefile_targets.push(module_obj)
+      mkfile.puts "#{module_obj}: #{module_src}"
+      mkfile.puts "\t${CC} -o $@ -c $< ${TEST_CFLAGS} -I ${SRC_DIR} ${INCLUDE_PATH}"
+      mkfile.puts ''
+    end
+
+    # process link-only files
+    linkonly = cfg[:includes][:linkonly]
+    linkonly_objs = []
+    linkonly.each do |linkonlyfile|
+      linkonlybase = File.basename(linkonlyfile, '.*')
+      linkonlymodule_src = File.join(SRC_DIR, linkonlyfile.to_s)
+      linkonlymodule_obj = File.join(OBJ_DIR, "#{linkonlybase}.o")
+      linkonly_objs.push(linkonlymodule_obj)
+      # only create the target if we didn't already
+      next if makefile_targets.include? linkonlymodule_obj
+
+      makefile_targets.push(linkonlymodule_obj)
+      mkfile.puts "#{linkonlymodule_obj}: #{linkonlymodule_src}"
+      mkfile.puts "\t${CC} -o $@ -c $< ${TEST_CFLAGS} -I ${SRC_DIR} ${INCLUDE_PATH}"
+      mkfile.puts ''
+    end
+
+    # Create runners
+    mkfile.puts "#{runner_source}: #{test}"
+    mkfile.puts "\t@UNITY_DIR=${UNITY_DIR} ruby ${CMOCK_DIR}/scripts/create_runner.rb #{test} #{runner_source}"
+    mkfile.puts ''
+
+    # Build runner
+    mkfile.puts "#{runner_obj}: #{runner_source}"
+    mkfile.puts "\t${CC} -o $@ -c $< ${TEST_CFLAGS} -I #{SRC_DIR} -I #{MOCKS_DIR} -I #{UNITY_SRC} -I #{CMOCK_SRC} ${INCLUDE_PATH}"
+    mkfile.puts ''
+
+    # Collect mocks to generate
+    system_mocks = cfg[:includes][:system].select { |name| name =~ MOCK_MATCHER }
+    raise 'Mocking of system headers is not yet supported!' unless system_mocks.empty?
+
+    local_mocks = cfg[:includes][:local].select { |name| name =~ MOCK_MATCHER }
+
+    module_names_to_mock = local_mocks.map { |name| name.sub(/#{MOCK_PREFIX}/, '').to_s }
+    headers_to_mock = []
+    module_names_to_mock.each do |name|
+      header_to_mock = nil
+      all_headers.each do |header|
+        if header =~ /[\/\\]?#{name}$/
+          header_to_mock = header
+          break
+        end
+      end
+      raise "Module header '#{name}' not found to mock!" unless header_to_mock
+
+      headers_to_mock << header_to_mock
+    end
+
+    all_headers_to_mock += headers_to_mock
+    mock_objs = headers_to_mock.map do |hdr|
+      mock_name = MOCK_PREFIX + File.basename(hdr, '.*')
+      File.join(MOCKS_DIR, mock_name + '.o')
+    end
+    all_headers_to_mock.uniq!
+
+    # Build test suite
+    mkfile.puts "#{test_obj}: #{test} #{module_obj} #{mock_objs.join(' ')}"
+    mkfile.puts "\t${CC} -o $@ -c $< ${TEST_CFLAGS} -I #{SRC_DIR} -I #{UNITY_SRC} -I #{CMOCK_SRC} -I #{MOCKS_DIR} ${INCLUDE_PATH}"
+    mkfile.puts ''
+
+    # Build test suite executable
+    test_objs = "#{test_obj} #{runner_obj} #{module_obj} #{mock_objs.join(' ')} #{linkonly_objs.join(' ')} #{UNITY_OBJ} #{CMOCK_OBJ}"
+    mkfile.puts "#{test_bin}: #{test_objs}"
+    mkfile.puts "\t${CC} -o $@ ${LDFLAGS} #{test_objs}"
+    mkfile.puts ''
+
+    # Run test suite and generate report
+    mkfile.puts "#{test_results}: #{test_bin}"
+    mkfile.puts "\t-#{test_bin} > #{test_results} 2>&1"
+    mkfile.puts ''
+
+    test_targets << test_bin
+  end
+
+  # Generate and build mocks
+  all_headers_to_mock.each do |hdr|
+    mock_name = MOCK_PREFIX + File.basename(hdr, '.*')
+    mock_header = File.join(MOCKS_DIR, mock_name + File.extname(hdr))
+    mock_src = File.join(MOCKS_DIR, mock_name + '.c')
+    mock_obj = File.join(MOCKS_DIR, mock_name + '.o')
+
+    mkfile.puts "#{mock_src}: #{hdr}"
+    mkfile.puts "\t@CMOCK_DIR=${CMOCK_DIR} ruby ${CMOCK_DIR}/scripts/create_mock.rb #{hdr}"
+    mkfile.puts ''
+
+    mkfile.puts "#{mock_obj}: #{mock_src} #{mock_header}"
+    mkfile.puts "\t${CC} -o $@ -c $< ${TEST_CFLAGS} -I #{MOCKS_DIR} -I #{SRC_DIR} -I #{UNITY_SRC} -I #{CMOCK_SRC} ${INCLUDE_PATH}"
+    mkfile.puts ''
+  end
+
+  # Create test summary task
+  mkfile.puts 'test_summary:'
+  mkfile.puts "\t@UNITY_DIR=${UNITY_DIR} ruby ${CMOCK_DIR}/scripts/test_summary.rb #{suppress_error ? '--silent' : ''}"
+  mkfile.puts ''
+  mkfile.puts '.PHONY: test_summary'
+  mkfile.puts ''
+
+  # Create target to run all tests
+  mkfile.puts "test: #{test_targets.map { |t| t + '.testresult' }.join(' ')} test_summary"
+  mkfile.puts ''
+end
diff --git a/FreeRTOS-Plus/Test/CMock/scripts/create_mock.rb b/FreeRTOS-Plus/Test/CMock/scripts/create_mock.rb
new file mode 100644
index 000000000..93107a942
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/scripts/create_mock.rb
@@ -0,0 +1,8 @@
+require "#{ENV['CMOCK_DIR']}/lib/cmock"
+
+raise 'Header file to mock must be specified!' unless ARGV.length >= 1
+
+mock_out = ENV.fetch('MOCK_OUT', './build/test/mocks')
+mock_prefix = ENV.fetch('MOCK_PREFIX', 'mock_')
+cmock = CMock.new(:plugins => %i[ignore return_thru_ptr], :mock_prefix => mock_prefix, :mock_path => mock_out)
+cmock.setup_mocks(ARGV[0])
diff --git a/FreeRTOS-Plus/Test/CMock/scripts/create_runner.rb b/FreeRTOS-Plus/Test/CMock/scripts/create_runner.rb
new file mode 100644
index 000000000..621980507
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/scripts/create_runner.rb
@@ -0,0 +1,18 @@
+if $0 == __FILE__
+
+  # make sure there is at least one parameter left (the input file)
+  if ARGV.length < 2
+    puts ["\nusage: ruby #{__FILE__} input_test_file (output)",
+          '',
+          '  input_test_file         - this is the C file you want to create a runner for',
+          '  output                  - this is the name of the runner file to generate',
+          '                            defaults to (input_test_file)_Runner'].join("\n")
+    exit 1
+  end
+
+  require "#{ENV['UNITY_DIR']}/auto/generate_test_runner"
+
+  test = ARGV[0]
+  runner = ARGV[1]
+  UnityTestRunnerGenerator.new.run(test, runner)
+end
diff --git a/FreeRTOS-Plus/Test/CMock/scripts/test_summary.rb b/FreeRTOS-Plus/Test/CMock/scripts/test_summary.rb
new file mode 100644
index 000000000..cbcbaf8b1
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/scripts/test_summary.rb
@@ -0,0 +1,18 @@
+suppress_error = !ARGV.nil? && !ARGV.empty? && (ARGV[0].casecmp('--SILENT') == 0)
+
+begin
+  require "#{ENV['UNITY_DIR']}/auto/unity_test_summary.rb"
+
+  build_dir = ENV.fetch('BUILD_DIR', './build')
+  test_build_dir = ENV.fetch('TEST_BUILD_DIR', File.join(build_dir, 'test'))
+
+  results = Dir["#{test_build_dir}/*.testresult"]
+  parser = UnityTestSummary.new
+  parser.targets = results
+  parser.run
+  puts parser.report
+rescue StandardError => e
+  raise e unless suppress_error
+end
+
+exit(parser.failures) unless suppress_error
diff --git a/FreeRTOS-Plus/Test/CMock/src/cmock.c b/FreeRTOS-Plus/Test/CMock/src/cmock.c
new file mode 100644
index 000000000..88f2c2b25
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/src/cmock.c
@@ -0,0 +1,216 @@
+/* ==========================================
+    CMock Project - Automatic Mock Generation for C
+    Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+========================================== */
+
+#include "cmock.h"
+
+/* public constants to be used by mocks */
+const char* CMockStringOutOfMemory = "CMock has run out of memory. Please allocate more.";
+const char* CMockStringCalledMore  = "Called more times than expected.";
+const char* CMockStringCalledLess  = "Called fewer times than expected.";
+const char* CMockStringCalledEarly = "Called earlier than expected.";
+const char* CMockStringCalledLate  = "Called later than expected.";
+const char* CMockStringCallOrder   = "Called out of order.";
+const char* CMockStringIgnPreExp   = "IgnoreArg called before Expect.";
+const char* CMockStringPtrPreExp   = "ReturnThruPtr called before Expect.";
+const char* CMockStringPtrIsNULL   = "Pointer is NULL.";
+const char* CMockStringExpNULL     = "Expected NULL.";
+const char* CMockStringMismatch    = "Function called with unexpected argument value.";
+
+/* private variables */
+#ifdef CMOCK_MEM_DYNAMIC
+static unsigned char*         CMock_Guts_Buffer = NULL;
+static CMOCK_MEM_INDEX_TYPE   CMock_Guts_BufferSize = CMOCK_MEM_ALIGN_SIZE;
+static CMOCK_MEM_INDEX_TYPE   CMock_Guts_FreePtr = CMOCK_MEM_ALIGN_SIZE;
+#else
+static unsigned char          CMock_Guts_Buffer[CMOCK_MEM_SIZE + CMOCK_MEM_ALIGN_SIZE];
+static CMOCK_MEM_INDEX_TYPE   CMock_Guts_BufferSize = CMOCK_MEM_SIZE + CMOCK_MEM_ALIGN_SIZE;
+static CMOCK_MEM_INDEX_TYPE   CMock_Guts_FreePtr = CMOCK_MEM_ALIGN_SIZE;
+#endif
+
+/*-------------------------------------------------------
+ * CMock_Guts_MemNew
+ *-------------------------------------------------------*/
+CMOCK_MEM_INDEX_TYPE CMock_Guts_MemNew(CMOCK_MEM_INDEX_TYPE size)
+{
+  CMOCK_MEM_INDEX_TYPE index;
+
+  /* verify arguments valid (we must be allocating space for at least 1 byte, and the existing chain must be in memory somewhere) */
+  if (size < 1)
+    return CMOCK_GUTS_NONE;
+
+  /* verify we have enough room */
+  size = size + CMOCK_MEM_INDEX_SIZE;
+  if (size & CMOCK_MEM_ALIGN_MASK)
+    size = (size + CMOCK_MEM_ALIGN_MASK) & ~CMOCK_MEM_ALIGN_MASK;
+  if ((CMock_Guts_BufferSize - CMock_Guts_FreePtr) < size)
+  {
+#ifndef CMOCK_MEM_DYNAMIC
+    return CMOCK_GUTS_NONE; /* nothing we can do; our static buffer is out of memory */
+#else
+    /* our dynamic buffer does not have enough room; request more via realloc() */
+    CMOCK_MEM_INDEX_TYPE new_buffersize = CMock_Guts_BufferSize + CMOCK_MEM_SIZE + size;
+    unsigned char* new_buffer = realloc(CMock_Guts_Buffer, (size_t)new_buffersize);
+    if (new_buffer == NULL)
+      return CMOCK_GUTS_NONE; /* realloc() failed; out of memory */
+    CMock_Guts_Buffer = new_buffer;
+    CMock_Guts_BufferSize = new_buffersize;
+#endif
+  }
+
+  /* determine where we're putting this new block, and init its pointer to be the end of the line */
+  index = CMock_Guts_FreePtr + CMOCK_MEM_INDEX_SIZE;
+  *(CMOCK_MEM_INDEX_TYPE*)(&CMock_Guts_Buffer[CMock_Guts_FreePtr]) = CMOCK_GUTS_NONE;
+  CMock_Guts_FreePtr += size;
+
+  return index;
+}
+
+/*-------------------------------------------------------
+ * CMock_Guts_MemChain
+ *-------------------------------------------------------*/
+CMOCK_MEM_INDEX_TYPE CMock_Guts_MemChain(CMOCK_MEM_INDEX_TYPE root_index, CMOCK_MEM_INDEX_TYPE obj_index)
+{
+  CMOCK_MEM_INDEX_TYPE index;
+  void* root;
+  void* obj;
+  void* next;
+
+  if (root_index == CMOCK_GUTS_NONE)
+  {
+    /* if there is no root currently, we return this object as the root of the chain */
+    return obj_index;
+  }
+  else
+  {
+    /* reject illegal nodes */
+    if ((root_index < CMOCK_MEM_ALIGN_SIZE) || (root_index >= CMock_Guts_FreePtr))
+    {
+      return CMOCK_GUTS_NONE;
+    }
+    if ((obj_index < CMOCK_MEM_ALIGN_SIZE) || (obj_index >= CMock_Guts_FreePtr))
+    {
+      return CMOCK_GUTS_NONE;
+    }
+
+    root = (void*)(&CMock_Guts_Buffer[root_index]);
+    obj  = (void*)(&CMock_Guts_Buffer[obj_index]);
+
+    /* find the end of the existing chain and add us */
+    next = root;
+    do {
+      index = *(CMOCK_MEM_INDEX_TYPE*)((CMOCK_MEM_PTR_AS_INT)next - CMOCK_MEM_INDEX_SIZE);
+      if (index >= CMock_Guts_FreePtr)
+        return CMOCK_GUTS_NONE;
+      if (index > 0)
+        next = (void*)(&CMock_Guts_Buffer[index]);
+    } while (index > 0);
+    *(CMOCK_MEM_INDEX_TYPE*)((CMOCK_MEM_PTR_AS_INT)next - CMOCK_MEM_INDEX_SIZE) = (CMOCK_MEM_INDEX_TYPE)((CMOCK_MEM_PTR_AS_INT)obj - (CMOCK_MEM_PTR_AS_INT)CMock_Guts_Buffer);
+    return root_index;
+  }
+}
+
+/*-------------------------------------------------------
+ * CMock_Guts_MemNext
+ *-------------------------------------------------------*/
+CMOCK_MEM_INDEX_TYPE CMock_Guts_MemNext(CMOCK_MEM_INDEX_TYPE previous_item_index)
+{
+  CMOCK_MEM_INDEX_TYPE index;
+  void* previous_item;
+
+  /* There is nothing "next" if the pointer isn't from our buffer */
+  if ((previous_item_index < CMOCK_MEM_ALIGN_SIZE) || (previous_item_index  >= CMock_Guts_FreePtr))
+    return CMOCK_GUTS_NONE;
+  previous_item = (void*)(&CMock_Guts_Buffer[previous_item_index]);
+
+  /* if the pointer is good, then use it to look up the next index
+   * (we know the first element always goes in zero, so NEXT must always be > 1) */
+  index = *(CMOCK_MEM_INDEX_TYPE*)((CMOCK_MEM_PTR_AS_INT)previous_item - CMOCK_MEM_INDEX_SIZE);
+  if ((index > 1) && (index < CMock_Guts_FreePtr))
+    return index;
+  else
+    return CMOCK_GUTS_NONE;
+}
+
+/*-------------------------------------------------------
+ * CMock_Guts_MemEndOfChain
+ *-------------------------------------------------------*/
+CMOCK_MEM_INDEX_TYPE CMock_Guts_MemEndOfChain(CMOCK_MEM_INDEX_TYPE root_index)
+{
+  CMOCK_MEM_INDEX_TYPE index = root_index;
+  CMOCK_MEM_INDEX_TYPE next_index;
+
+  for (next_index = root_index;
+       next_index != CMOCK_GUTS_NONE;
+       next_index = CMock_Guts_MemNext(index))
+  {
+    index = next_index;
+  }
+
+  return index;
+}
+
+/*-------------------------------------------------------
+ * CMock_GetAddressFor
+ *-------------------------------------------------------*/
+void* CMock_Guts_GetAddressFor(CMOCK_MEM_INDEX_TYPE index)
+{
+  if ((index >= CMOCK_MEM_ALIGN_SIZE) && (index < CMock_Guts_FreePtr))
+  {
+    return (void*)(&CMock_Guts_Buffer[index]);
+  }
+  else
+  {
+    return NULL;
+  }
+}
+
+/*-------------------------------------------------------
+ * CMock_Guts_MemBytesCapacity
+ *-------------------------------------------------------*/
+CMOCK_MEM_INDEX_TYPE CMock_Guts_MemBytesCapacity(void)
+{
+  return (sizeof(CMock_Guts_Buffer) - CMOCK_MEM_ALIGN_SIZE);
+}
+
+/*-------------------------------------------------------
+ * CMock_Guts_MemBytesFree
+ *-------------------------------------------------------*/
+CMOCK_MEM_INDEX_TYPE CMock_Guts_MemBytesFree(void)
+{
+  return CMock_Guts_BufferSize - CMock_Guts_FreePtr;
+}
+
+/*-------------------------------------------------------
+ * CMock_Guts_MemBytesUsed
+ *-------------------------------------------------------*/
+CMOCK_MEM_INDEX_TYPE CMock_Guts_MemBytesUsed(void)
+{
+  return CMock_Guts_FreePtr - CMOCK_MEM_ALIGN_SIZE;
+}
+
+/*-------------------------------------------------------
+ * CMock_Guts_MemFreeAll
+ *-------------------------------------------------------*/
+void CMock_Guts_MemFreeAll(void)
+{
+  CMock_Guts_FreePtr = CMOCK_MEM_ALIGN_SIZE; /* skip the very beginning */
+}
+
+/*-------------------------------------------------------
+ * CMock_Guts_MemFreeFinal
+ *-------------------------------------------------------*/
+void CMock_Guts_MemFreeFinal(void)
+{
+  CMock_Guts_FreePtr = CMOCK_MEM_ALIGN_SIZE;
+#ifdef CMOCK_MEM_DYNAMIC
+  if (CMock_Guts_Buffer)
+  {
+    free(CMock_Guts_Buffer);
+    CMock_Guts_Buffer = NULL;
+  }
+#endif
+}
+
diff --git a/FreeRTOS-Plus/Test/CMock/src/cmock.h b/FreeRTOS-Plus/Test/CMock/src/cmock.h
new file mode 100644
index 000000000..21123e925
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/src/cmock.h
@@ -0,0 +1,41 @@
+/* ==========================================
+    CMock Project - Automatic Mock Generation for C
+    Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+========================================== */
+
+#ifndef CMOCK_FRAMEWORK_H
+#define CMOCK_FRAMEWORK_H
+
+#include "cmock_internals.h"
+
+#define CMOCK_VERSION_MAJOR    2
+#define CMOCK_VERSION_MINOR    5
+#define CMOCK_VERSION_BUILD    2
+#define CMOCK_VERSION          ((CMOCK_VERSION_MAJOR << 16) | (CMOCK_VERSION_MINOR << 8) | CMOCK_VERSION_BUILD)
+
+/* should be big enough to index full range of CMOCK_MEM_MAX */
+#ifndef CMOCK_MEM_INDEX_TYPE
+#include <stddef.h>
+#define CMOCK_MEM_INDEX_TYPE  size_t
+#endif
+
+#define CMOCK_GUTS_NONE   (0)
+
+/*-------------------------------------------------------
+ * Memory API
+ *-------------------------------------------------------*/
+CMOCK_MEM_INDEX_TYPE  CMock_Guts_MemNew(CMOCK_MEM_INDEX_TYPE size);
+CMOCK_MEM_INDEX_TYPE  CMock_Guts_MemChain(CMOCK_MEM_INDEX_TYPE root_index, CMOCK_MEM_INDEX_TYPE obj_index);
+CMOCK_MEM_INDEX_TYPE  CMock_Guts_MemNext(CMOCK_MEM_INDEX_TYPE previous_item_index);
+CMOCK_MEM_INDEX_TYPE  CMock_Guts_MemEndOfChain(CMOCK_MEM_INDEX_TYPE root_index);
+
+void*                 CMock_Guts_GetAddressFor(CMOCK_MEM_INDEX_TYPE index);
+
+CMOCK_MEM_INDEX_TYPE CMock_Guts_MemBytesCapacity(void);
+CMOCK_MEM_INDEX_TYPE  CMock_Guts_MemBytesFree(void);
+CMOCK_MEM_INDEX_TYPE  CMock_Guts_MemBytesUsed(void);
+void                  CMock_Guts_MemFreeAll(void);
+void                  CMock_Guts_MemFreeFinal(void);
+
+#endif /* end of CMOCK_FRAMEWORK_H */
diff --git a/FreeRTOS-Plus/Test/CMock/src/cmock_internals.h b/FreeRTOS-Plus/Test/CMock/src/cmock_internals.h
new file mode 100644
index 000000000..56fb33b1a
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/src/cmock_internals.h
@@ -0,0 +1,91 @@
+/* ==========================================
+    CMock Project - Automatic Mock Generation for C
+    Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+========================================== */
+
+#ifndef CMOCK_FRAMEWORK_INTERNALS_H
+#define CMOCK_FRAMEWORK_INTERNALS_H
+
+#include "unity.h"
+
+/* These are constants that the generated mocks have access to */
+extern const char* CMockStringOutOfMemory;
+extern const char* CMockStringCalledMore;
+extern const char* CMockStringCalledLess;
+extern const char* CMockStringCalledEarly;
+extern const char* CMockStringCalledLate;
+extern const char* CMockStringCallOrder;
+extern const char* CMockStringIgnPreExp;
+extern const char* CMockStringPtrPreExp;
+extern const char* CMockStringPtrIsNULL;
+extern const char* CMockStringExpNULL;
+extern const char* CMockStringMismatch;
+
+/* define CMOCK_MEM_DYNAMIC to grab memory as needed with malloc
+ * when you do that, CMOCK_MEM_SIZE is used for incremental size instead of total */
+#ifdef CMOCK_MEM_STATIC
+#undef CMOCK_MEM_DYNAMIC
+#endif
+
+#ifdef CMOCK_MEM_DYNAMIC
+#include <stdlib.h>
+#endif
+
+/* this is used internally during pointer arithmetic. make sure this type is the same size as the target's pointer type */
+#ifndef CMOCK_MEM_PTR_AS_INT
+#ifdef UNITY_POINTER_WIDTH
+#ifdef UNITY_INT_WIDTH
+#if UNITY_POINTER_WIDTH == UNITY_INT_WIDTH
+#define CMOCK_MEM_PTR_AS_INT unsigned int
+#endif
+#endif
+#endif
+#endif
+
+#ifndef CMOCK_MEM_PTR_AS_INT
+#ifdef UNITY_POINTER_WIDTH
+#ifdef UNITY_LONG_WIDTH
+#if UNITY_POINTER_WIDTH == UNITY_LONG_WIDTH
+#define CMOCK_MEM_PTR_AS_INT unsigned long
+#endif
+#if UNITY_POINTER_WIDTH > UNITY_LONG_WIDTH
+#define CMOCK_MEM_PTR_AS_INT unsigned long long
+#endif
+#endif
+#endif
+#endif
+
+#ifndef CMOCK_MEM_PTR_AS_INT
+#define CMOCK_MEM_PTR_AS_INT unsigned long
+#endif
+
+/* 0 for no alignment, 1 for 16-bit, 2 for 32-bit, 3 for 64-bit */
+#ifndef CMOCK_MEM_ALIGN
+  #ifdef UNITY_LONG_WIDTH
+    #if (UNITY_LONG_WIDTH == 16)
+      #define CMOCK_MEM_ALIGN (1)
+    #elif (UNITY_LONG_WIDTH == 32)
+      #define CMOCK_MEM_ALIGN (2)
+    #elif (UNITY_LONG_WIDTH == 64)
+      #define CMOCK_MEM_ALIGN (3)
+    #else
+      #define CMOCK_MEM_ALIGN (2)
+    #endif
+  #else
+    #define CMOCK_MEM_ALIGN (2)
+  #endif
+#endif
+
+/* amount of memory to allow cmock to use in its internal heap */
+#ifndef CMOCK_MEM_SIZE
+#define CMOCK_MEM_SIZE (32768)
+#endif
+
+/* automatically calculated defs for easier reading */
+#define CMOCK_MEM_ALIGN_SIZE  (CMOCK_MEM_INDEX_TYPE)(1u << CMOCK_MEM_ALIGN)
+#define CMOCK_MEM_ALIGN_MASK  (CMOCK_MEM_INDEX_TYPE)(CMOCK_MEM_ALIGN_SIZE - 1)
+#define CMOCK_MEM_INDEX_SIZE  (CMOCK_MEM_INDEX_TYPE)(CMOCK_MEM_PTR_AS_INT)((sizeof(CMOCK_MEM_INDEX_TYPE) > CMOCK_MEM_ALIGN_SIZE) ? sizeof(CMOCK_MEM_INDEX_TYPE) : CMOCK_MEM_ALIGN_SIZE)
+
+
+#endif /* end of CMOCK_FRAMEWORK_INTERNALS_H */
diff --git a/FreeRTOS-Plus/Test/CMock/src/meson.build b/FreeRTOS-Plus/Test/CMock/src/meson.build
new file mode 100644
index 000000000..0273afece
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/src/meson.build
@@ -0,0 +1,12 @@
+#
+# build script written by : Michael Brockus.
+# github repo author: Mike Karlesky, Mark VanderVoord, Greg Williams.
+#
+# license: MIT
+#
+cmock_dir = include_directories('.')
+
+cmock_lib = static_library(meson.project_name(), 
+    sources: ['cmock.c'],
+    dependencies: [unity_dep],
+    include_directories: cmock_dir)
diff --git a/FreeRTOS-Plus/Test/CMock/test/c/TestCMockC.c b/FreeRTOS-Plus/Test/CMock/test/c/TestCMockC.c
new file mode 100644
index 000000000..769a2b31d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/c/TestCMockC.c
@@ -0,0 +1,333 @@
+/* ==========================================
+    CMock Project - Automatic Mock Generation for C
+    Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+========================================== */
+
+#include "unity.h"
+#include "cmock.h"
+
+#define TEST_MEM_INDEX_SIZE  (sizeof(CMOCK_MEM_INDEX_TYPE))
+
+void setUp(void)
+{
+  CMock_Guts_MemFreeAll();
+}
+
+void tearDown(void)
+{
+}
+
+void test_MemNewWillReturnNullIfGivenIllegalSizes(void)
+{
+  TEST_ASSERT_EQUAL_HEX( CMOCK_GUTS_NONE, CMock_Guts_MemNew(0) );
+  TEST_ASSERT_EQUAL_HEX( CMOCK_GUTS_NONE, CMock_Guts_MemNew(CMOCK_MEM_SIZE - TEST_MEM_INDEX_SIZE + 1) );
+  TEST_ASSERT_NULL( CMock_Guts_GetAddressFor(CMOCK_GUTS_NONE) );
+
+  //verify we're cleared still
+  TEST_ASSERT_LESS_OR_EQUAL_UINT32(CMOCK_MEM_SIZE, CMock_Guts_MemBytesCapacity());
+  TEST_ASSERT_EQUAL_UINT32(0, CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_LESS_OR_EQUAL_UINT32(CMOCK_MEM_SIZE, CMock_Guts_MemBytesFree());
+}
+
+void test_MemShouldProtectAgainstMemoryOverflow(void)
+{
+  (void)CMock_Guts_MemNew(CMOCK_MEM_SIZE - TEST_MEM_INDEX_SIZE);
+
+  //verify we've used all the memory
+  TEST_ASSERT_LESS_OR_EQUAL_UINT32(TEST_MEM_INDEX_SIZE, CMock_Guts_MemBytesFree());
+  TEST_ASSERT_GREATER_OR_EQUAL_UINT32(CMOCK_MEM_SIZE, CMock_Guts_MemBytesUsed());
+}
+
+void test_MemChainWillReturnNullAndDoNothingIfGivenIllegalInformation(void)
+{
+  CMOCK_MEM_INDEX_TYPE next = CMock_Guts_MemNew(4);
+  TEST_ASSERT_EQUAL(4 + TEST_MEM_INDEX_SIZE, CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_EQUAL(CMOCK_MEM_SIZE - 4 - TEST_MEM_INDEX_SIZE, CMock_Guts_MemBytesFree());
+
+  TEST_ASSERT_EQUAL_HEX( CMOCK_GUTS_NONE, CMock_Guts_MemChain(next + CMOCK_MEM_SIZE, next) );
+  TEST_ASSERT_EQUAL_HEX( CMOCK_GUTS_NONE, CMock_Guts_MemChain(next, next + CMOCK_MEM_SIZE) );
+
+  //verify we're still the same
+  TEST_ASSERT_EQUAL(4 + TEST_MEM_INDEX_SIZE, CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_EQUAL(CMOCK_MEM_SIZE - 4 - TEST_MEM_INDEX_SIZE, CMock_Guts_MemBytesFree());
+}
+
+void test_MemNextWillReturnNullIfGivenABadRoot(void)
+{
+  TEST_ASSERT_EQUAL_HEX( CMOCK_GUTS_NONE, CMock_Guts_MemNext(0) );
+  TEST_ASSERT_EQUAL_HEX( CMOCK_GUTS_NONE, CMock_Guts_MemNext(2) );
+  TEST_ASSERT_EQUAL_HEX( CMOCK_GUTS_NONE, CMock_Guts_MemNext(CMOCK_MEM_SIZE - 4) );
+
+  //verify we're cleared still
+  TEST_ASSERT_EQUAL(0, CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_EQUAL(CMOCK_MEM_SIZE, CMock_Guts_MemBytesFree());
+}
+
+void test_ThatWeCanClaimAndChainAFewElementsTogether(void)
+{
+  unsigned int  i;
+  CMOCK_MEM_INDEX_TYPE next;
+  CMOCK_MEM_INDEX_TYPE first = CMOCK_GUTS_NONE;
+  CMOCK_MEM_INDEX_TYPE element[4];
+
+  //verify we're cleared first
+  TEST_ASSERT_EQUAL(0, CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_EQUAL(CMOCK_MEM_SIZE, CMock_Guts_MemBytesFree());
+
+  //first element
+  element[0] = CMock_Guts_MemNew(sizeof(unsigned int));
+  TEST_ASSERT_MESSAGE(element[0] != CMOCK_GUTS_NONE, "Should Not Have Returned CMOCK_GUTS_NONE");
+  first = CMock_Guts_MemChain(first, element[0]);
+  TEST_ASSERT_EQUAL(element[0], first);
+  *((unsigned int*)CMock_Guts_GetAddressFor(element[0])) = 0;
+
+  //verify we're using the right amount of memory
+  TEST_ASSERT_EQUAL(1 * (TEST_MEM_INDEX_SIZE + sizeof(unsigned int)), CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_EQUAL(CMOCK_MEM_SIZE - 1 * (TEST_MEM_INDEX_SIZE + sizeof(unsigned int)), CMock_Guts_MemBytesFree());
+
+  //second element
+  element[1] = CMock_Guts_MemNew(sizeof(unsigned int));
+  TEST_ASSERT_MESSAGE(element[1] != CMOCK_GUTS_NONE, "Should Not Have Returned CMOCK_GUTS_NONE");
+  TEST_ASSERT_NOT_EQUAL(element[0], element[1]);
+  TEST_ASSERT_EQUAL(first, CMock_Guts_MemChain(first, element[1]));
+  *((unsigned int*)CMock_Guts_GetAddressFor(element[1])) = 1;
+
+  //verify we're using the right amount of memory
+  TEST_ASSERT_EQUAL(2 * (TEST_MEM_INDEX_SIZE + sizeof(unsigned int)), CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_EQUAL(CMOCK_MEM_SIZE - 2 * (TEST_MEM_INDEX_SIZE + sizeof(unsigned int)), CMock_Guts_MemBytesFree());
+
+  //third element
+  element[2] = CMock_Guts_MemNew(sizeof(unsigned int));
+  TEST_ASSERT_MESSAGE(element[2] != CMOCK_GUTS_NONE, "Should Not Have Returned CMOCK_GUTS_NONE");
+  TEST_ASSERT_NOT_EQUAL(element[0], element[2]);
+  TEST_ASSERT_NOT_EQUAL(element[1], element[2]);
+  TEST_ASSERT_EQUAL(first, CMock_Guts_MemChain(first, element[2]));
+  *((unsigned int*)CMock_Guts_GetAddressFor(element[2])) = 2;
+
+  //verify we're using the right amount of memory
+  TEST_ASSERT_EQUAL(3 * (TEST_MEM_INDEX_SIZE + sizeof(unsigned int)), CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_EQUAL(CMOCK_MEM_SIZE - 3 * (TEST_MEM_INDEX_SIZE + sizeof(unsigned int)), CMock_Guts_MemBytesFree());
+
+  //fourth element
+  element[3] = CMock_Guts_MemNew(sizeof(unsigned int));
+  TEST_ASSERT_MESSAGE(element[3] != CMOCK_GUTS_NONE, "Should Not Have Returned CMOCK_GUTS_NONE");
+  TEST_ASSERT_NOT_EQUAL(element[0], element[3]);
+  TEST_ASSERT_NOT_EQUAL(element[1], element[3]);
+  TEST_ASSERT_NOT_EQUAL(element[2], element[3]);
+  TEST_ASSERT_EQUAL(first, CMock_Guts_MemChain(first, element[3]));
+  *((unsigned int*)CMock_Guts_GetAddressFor(element[3])) = 3;
+
+  //verify we're using the right amount of memory
+  TEST_ASSERT_EQUAL(4 * (TEST_MEM_INDEX_SIZE + sizeof(unsigned int)), CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_EQUAL(CMOCK_MEM_SIZE - 4 * (TEST_MEM_INDEX_SIZE + sizeof(unsigned int)), CMock_Guts_MemBytesFree());
+
+  //traverse list
+  next = first;
+  for (i = 0; i < 4; i++)
+  {
+    TEST_ASSERT_EQUAL(element[i], next);
+    TEST_ASSERT_EQUAL(i, *((unsigned int*)CMock_Guts_GetAddressFor(element[i])));
+    next = CMock_Guts_MemNext(next);
+  }
+
+  //verify we get a null at the end of the list
+  TEST_ASSERT_EQUAL_HEX(CMOCK_GUTS_NONE, next);
+
+  //verify we're using the right amount of memory
+  TEST_ASSERT_EQUAL(4 * (TEST_MEM_INDEX_SIZE + sizeof(unsigned int)), CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_EQUAL(CMOCK_MEM_SIZE - 4 * (TEST_MEM_INDEX_SIZE + sizeof(unsigned int)), CMock_Guts_MemBytesFree());
+
+  //Free it all
+  CMock_Guts_MemFreeAll();
+
+  //verify we're cleared
+  TEST_ASSERT_EQUAL(0, CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_EQUAL(CMOCK_MEM_SIZE, CMock_Guts_MemBytesFree());
+}
+
+void test_ThatCMockStopsReturningMoreDataWhenItRunsOutOfMemory(void)
+{
+  unsigned int  i;
+  CMOCK_MEM_INDEX_TYPE first = CMOCK_GUTS_NONE;
+  CMOCK_MEM_INDEX_TYPE next;
+
+  //even though we are asking for one byte, we've told it to align to closest CMOCK_MEM_ALIGN_SIZE bytes, therefore it will waste a byte each time
+  //so each call will use (CMOCK_MEM_INDEX_SIZE + CMOCK_MEM_ALIGN_SIZE) bytes (CMOCK_MEM_INDEX_SIZE for the index, 1 for the data, and (CMOCK_MEM_ALIGN_SIZE - 1) wasted).
+  //therefore we can safely allocated total/(CMOCK_MEM_INDEX_SIZE + CMOCK_MEM_ALIGN_SIZE) times.
+  for (i = 0; i < (CMOCK_MEM_SIZE / (CMOCK_MEM_INDEX_SIZE + CMOCK_MEM_ALIGN_SIZE)); i++)
+  {
+    TEST_ASSERT_EQUAL(i*(CMOCK_MEM_INDEX_SIZE + CMOCK_MEM_ALIGN_SIZE), CMock_Guts_MemBytesUsed());
+    TEST_ASSERT_EQUAL(CMOCK_MEM_SIZE - i*(CMOCK_MEM_INDEX_SIZE + CMOCK_MEM_ALIGN_SIZE), CMock_Guts_MemBytesFree());
+
+    next = CMock_Guts_MemNew(1);
+    TEST_ASSERT_MESSAGE(next != CMOCK_GUTS_NONE, "Should Not Have Returned CMOCK_GUTS_NONE");
+
+    first = CMock_Guts_MemChain(first, next);
+    TEST_ASSERT_MESSAGE(first != CMOCK_GUTS_NONE, "Should Not Have Returned CMOCK_GUTS_NONE");
+  }
+
+  //verify we're at top of memory
+  TEST_ASSERT_EQUAL(CMOCK_MEM_SIZE, CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_EQUAL(0, CMock_Guts_MemBytesFree());
+
+  //The very next call will return a NULL, and any after that
+  TEST_ASSERT_EQUAL_HEX(CMOCK_GUTS_NONE, CMock_Guts_MemNew(1));
+  TEST_ASSERT_EQUAL_HEX(CMOCK_GUTS_NONE, CMock_Guts_MemNew(1));
+  TEST_ASSERT_EQUAL_HEX(CMOCK_GUTS_NONE, CMock_Guts_MemNew(1));
+
+  //verify nothing has changed
+  TEST_ASSERT_EQUAL(CMOCK_MEM_SIZE, CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_EQUAL(0, CMock_Guts_MemBytesFree());
+
+  //verify we can still walk through the elements allocated
+  next = first;
+  for (i = 0; i < (CMOCK_MEM_SIZE / (CMOCK_MEM_INDEX_SIZE + CMOCK_MEM_ALIGN_SIZE)); i++)
+  {
+    TEST_ASSERT_MESSAGE(next != CMOCK_GUTS_NONE, "Should Not Have Returned CMOCK_GUTS_NONE");
+    next = CMock_Guts_MemNext(next);
+  }
+
+  //there aren't any after that
+  TEST_ASSERT_EQUAL_HEX(CMOCK_GUTS_NONE, (UNITY_UINT32)next);
+}
+
+void test_ThatCMockStopsReturningMoreDataWhenAskForMoreThanItHasLeftEvenIfNotAtExactEnd(void)
+{
+  unsigned int  i;
+  CMOCK_MEM_INDEX_TYPE first = CMOCK_GUTS_NONE;
+  CMOCK_MEM_INDEX_TYPE next;
+
+  //we're asking for (CMOCK_MEM_INDEX_SIZE + 8) bytes each time now (CMOCK_MEM_INDEX_SIZE for index, 8 for data).
+  //CMOCK_MEM_SIZE/(CMOCK_MEM_INDEX_SIZE + 8) requests will request as much data as possible, while ensuring that there isn't enough
+  //memory for the next request
+  for (i = 0; i < CMOCK_MEM_SIZE/(CMOCK_MEM_INDEX_SIZE + 8); i++)
+  {
+    TEST_ASSERT_EQUAL(i*(CMOCK_MEM_INDEX_SIZE + 8), CMock_Guts_MemBytesUsed());
+    TEST_ASSERT_EQUAL(CMOCK_MEM_SIZE - i*(CMOCK_MEM_INDEX_SIZE + 8), CMock_Guts_MemBytesFree());
+
+    next = CMock_Guts_MemNew(8);
+    TEST_ASSERT_MESSAGE(next != CMOCK_GUTS_NONE, "Should Not Have Returned CMOCK_GUTS_NONE");
+
+    first = CMock_Guts_MemChain(first, next);
+    TEST_ASSERT_MESSAGE(first != CMOCK_GUTS_NONE, "Should Not Have Returned CMOCK_GUTS_NONE");
+
+    //verify writing data won't screw us up
+    *((unsigned int*)CMock_Guts_GetAddressFor(next)) = i;
+  }
+
+  //verify we're at top of memory
+  TEST_ASSERT_EQUAL(CMOCK_MEM_SIZE - CMOCK_MEM_SIZE % (CMOCK_MEM_INDEX_SIZE + 8), CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_EQUAL(CMOCK_MEM_SIZE % (CMOCK_MEM_INDEX_SIZE + 8), CMock_Guts_MemBytesFree());
+
+  //The very next call will return a NONE, and any after that
+  TEST_ASSERT_EQUAL_HEX(CMOCK_GUTS_NONE, CMock_Guts_MemNew(8));
+  TEST_ASSERT_EQUAL_HEX(CMOCK_GUTS_NONE, CMock_Guts_MemNew(5));
+
+  //verify nothing has changed
+  TEST_ASSERT_EQUAL(CMOCK_MEM_SIZE - CMOCK_MEM_SIZE % (CMOCK_MEM_INDEX_SIZE + 8), CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_EQUAL(CMOCK_MEM_SIZE % (CMOCK_MEM_INDEX_SIZE + 8), CMock_Guts_MemBytesFree());
+
+  //verify we can still walk through the elements allocated
+  next = first;
+  for (i = 0; i < CMOCK_MEM_SIZE/(CMOCK_MEM_INDEX_SIZE + 8); i++)
+  {
+    TEST_ASSERT_MESSAGE(next != CMOCK_GUTS_NONE, "Should Not Have Returned CMOCK_GUTS_NONE");
+    TEST_ASSERT_EQUAL(i, *((unsigned int*)CMock_Guts_GetAddressFor(next)));
+    next = CMock_Guts_MemNext(next);
+  }
+
+  //there aren't any after that
+  TEST_ASSERT_EQUAL_HEX(CMOCK_GUTS_NONE, next);
+}
+
+void test_ThatWeCanAskForAllSortsOfSizes(void)
+{
+#if CMOCK_MEM_ALIGN != 2
+  TEST_IGNORE_MESSAGE("Test relies on a particular environmental setup, which is not present");
+#else
+
+  unsigned int  i;
+  CMOCK_MEM_INDEX_TYPE first = CMOCK_GUTS_NONE;
+  CMOCK_MEM_INDEX_TYPE next;
+  CMOCK_MEM_INDEX_TYPE sizes[5] = {3, 1, 80, 5, 4};
+  CMOCK_MEM_INDEX_TYPE sizes_buffered[5] = {4, 4, 80, 8, 4};
+  CMOCK_MEM_INDEX_TYPE sum = 0;
+
+  for (i = 0; i < 5; i++)
+  {
+    next = CMock_Guts_MemNew(sizes[i]);
+    TEST_ASSERT_MESSAGE(next != CMOCK_GUTS_NONE, "Should Not Have Returned CMOCK_GUTS_NONE");
+
+    first = CMock_Guts_MemChain(first, next);
+    TEST_ASSERT_MESSAGE(first != CMOCK_GUTS_NONE, "Should Not Have Returned CMOCK_GUTS_NONE");
+
+    sum += sizes_buffered[i] + 4;
+    TEST_ASSERT_EQUAL(sum, CMock_Guts_MemBytesUsed());
+    TEST_ASSERT_EQUAL(CMOCK_MEM_SIZE - sum, CMock_Guts_MemBytesFree());
+  }
+
+  //show that we can't ask for too much memory
+  TEST_ASSERT_EQUAL_HEX(CMOCK_GUTS_NONE, CMock_Guts_MemNew(CMOCK_MEM_SIZE - sum + 8));
+  TEST_ASSERT_EQUAL_HEX(CMOCK_GUTS_NONE, CMock_Guts_MemNew(CMOCK_MEM_SIZE - sum + 1));
+
+  //but we CAN ask for something that will still fit
+  next = CMock_Guts_MemNew(CMOCK_MEM_SIZE - sum - 4);
+  TEST_ASSERT_MESSAGE(next != CMOCK_GUTS_NONE, "Should Not Have Returned CMOCK_GUTS_NONE");
+
+  first = CMock_Guts_MemChain(first, next);
+  TEST_ASSERT_MESSAGE(first != CMOCK_GUTS_NONE, "Should Not Have Returned CMOCK_GUTS_NONE");
+
+  //verify we're used up now
+  TEST_ASSERT_EQUAL(CMOCK_MEM_SIZE, CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_EQUAL(0, CMock_Guts_MemBytesFree());
+
+  //verify we can still walk through the elements allocated
+  next = first;
+  for (i = 0; i < 6; i++)
+  {
+    TEST_ASSERT_MESSAGE(next != CMOCK_GUTS_NONE, "Should Not Have Returned CMOCK_GUTS_NONE");
+    next = CMock_Guts_MemNext(next);
+  }
+
+  //there aren't any after that
+  TEST_ASSERT_EQUAL_HEX(CMOCK_GUTS_NONE, next);
+#endif
+}
+
+void test_MemEndOfChain(void)
+{
+  CMOCK_MEM_INDEX_TYPE first = CMOCK_GUTS_NONE;
+  CMOCK_MEM_INDEX_TYPE element[4];
+
+  //verify we're cleared first
+  TEST_ASSERT_EQUAL(0, CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_EQUAL(CMOCK_MEM_SIZE, CMock_Guts_MemBytesFree());
+
+  //first element
+  element[0] = CMock_Guts_MemNew(sizeof(unsigned int));
+  first = CMock_Guts_MemChain(first, element[0]);
+  TEST_ASSERT_MESSAGE(element[0] == CMock_Guts_MemEndOfChain(first), "Should have returned element[0]");
+
+  //second element
+  element[1] = CMock_Guts_MemNew(sizeof(unsigned int));
+  CMock_Guts_MemChain(first, element[1]);
+  TEST_ASSERT_MESSAGE(element[1] == CMock_Guts_MemEndOfChain(first), "Should have returned element[1]");
+
+  //third element
+  element[2] = CMock_Guts_MemNew(sizeof(unsigned int));
+  CMock_Guts_MemChain(first, element[2]);
+  TEST_ASSERT_MESSAGE(element[2] == CMock_Guts_MemEndOfChain(first), "Should have returned element[2]");
+
+  //fourth element
+  element[3] = CMock_Guts_MemNew(sizeof(unsigned int));
+  CMock_Guts_MemChain(first, element[3]);
+  TEST_ASSERT_MESSAGE(element[3] == CMock_Guts_MemEndOfChain(first), "Should have returned element[3]");
+
+  //Free it all
+  CMock_Guts_MemFreeAll();
+
+  //verify we're cleared
+  TEST_ASSERT_EQUAL(0, CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_EQUAL(CMOCK_MEM_SIZE, CMock_Guts_MemBytesFree());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/test/c/TestCMockC.yml b/FreeRTOS-Plus/Test/CMock/test/c/TestCMockC.yml
new file mode 100644
index 000000000..06067b161
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/c/TestCMockC.yml
@@ -0,0 +1,14 @@
+---
+:files:
+  - '../src/cmock.c'
+  - './c/TestCMockC.c'
+  - './c/TestCMockC_Runner.c'
+  - '../vendor/unity/src/unity.c'
+:options:
+  - 'TEST'
+  - 'CMOCK_MEM_STATIC'
+  - 'CMOCK_MEM_SIZE=128'
+  #- 'CMOCK_MEM_SIZE=40000'
+  - 'CMOCK_MEM_ALIGN=2'
+  - 'CMOCK_MEM_INDEX_TYPE=int'
+
diff --git a/FreeRTOS-Plus/Test/CMock/test/c/TestCMockCDynamic.c b/FreeRTOS-Plus/Test/CMock/test/c/TestCMockCDynamic.c
new file mode 100644
index 000000000..b81d9d0b2
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/c/TestCMockCDynamic.c
@@ -0,0 +1,186 @@
+/* ==========================================
+    CMock Project - Automatic Mock Generation for C
+    Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+========================================== */
+
+#include "unity.h"
+#include "cmock.h"
+
+#define TEST_MEM_INDEX_SIZE  (CMOCK_MEM_INDEX_TYPE)(sizeof(CMOCK_MEM_INDEX_TYPE))
+#define TEST_MEM_INDEX_PAD   (CMOCK_MEM_INDEX_TYPE)(((CMOCK_MEM_INDEX_TYPE)sizeof(CMOCK_MEM_INDEX_TYPE) + 7) & ~7) //round up to nearest 4 byte boundary
+
+CMOCK_MEM_INDEX_TYPE StartingSize;
+
+void setUp(void)
+{
+  CMock_Guts_MemFreeAll();
+  StartingSize = CMock_Guts_MemBytesFree();
+  TEST_ASSERT_EQUAL(0, CMock_Guts_MemBytesUsed());
+}
+
+void tearDown(void)
+{
+}
+
+void test_MemNewWillReturnNullIfGivenIllegalSizes(void)
+{
+  TEST_ASSERT_EQUAL_HEX( CMOCK_GUTS_NONE, CMock_Guts_MemNew(0) );
+
+  //verify we're cleared still
+  TEST_ASSERT_EQUAL(0, CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_EQUAL(0, CMock_Guts_MemBytesFree());
+}
+
+void test_MemNewWillNowSupportSizesGreaterThanTheDefinesCMockSize(void)
+{
+    TEST_ASSERT_EQUAL(0, CMock_Guts_MemBytesFree());
+
+    TEST_ASSERT_MESSAGE(CMock_Guts_MemNew(CMOCK_MEM_SIZE - TEST_MEM_INDEX_SIZE + 1) != CMOCK_GUTS_NONE, "Should Not Have Returned CMOCK_GUTS_NONE");
+
+    TEST_ASSERT_EQUAL(((CMOCK_MEM_INDEX_TYPE)CMOCK_MEM_SIZE + TEST_MEM_INDEX_PAD), CMock_Guts_MemBytesUsed());
+    TEST_ASSERT_EQUAL((CMOCK_MEM_INDEX_TYPE)CMOCK_MEM_SIZE, CMock_Guts_MemBytesFree());
+}
+
+void test_MemChainWillReturnNullAndDoNothingIfGivenIllegalInformation(void)
+{
+  CMOCK_MEM_INDEX_TYPE next = CMock_Guts_MemNew(8);
+  TEST_ASSERT_EQUAL(8 + TEST_MEM_INDEX_PAD, CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_EQUAL(StartingSize - 8 - TEST_MEM_INDEX_PAD, CMock_Guts_MemBytesFree());
+
+  TEST_ASSERT_EQUAL_HEX( CMOCK_GUTS_NONE, CMock_Guts_MemChain(next + CMOCK_MEM_SIZE, next) );
+  TEST_ASSERT_EQUAL_HEX( CMOCK_GUTS_NONE, CMock_Guts_MemChain(next, next + CMOCK_MEM_SIZE) );
+
+  //verify we're still the same
+  TEST_ASSERT_EQUAL(8 + TEST_MEM_INDEX_PAD, CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_EQUAL(StartingSize - 8 - TEST_MEM_INDEX_PAD, CMock_Guts_MemBytesFree());
+}
+
+void test_MemNextWillReturnNullIfGivenABadRoot(void)
+{
+  TEST_ASSERT_EQUAL_HEX( CMOCK_GUTS_NONE, CMock_Guts_MemNext(0) );
+  TEST_ASSERT_EQUAL_HEX( CMOCK_GUTS_NONE, CMock_Guts_MemNext(2) );
+  TEST_ASSERT_EQUAL_HEX( CMOCK_GUTS_NONE, CMock_Guts_MemNext( CMOCK_MEM_SIZE - 4 ) );
+
+  //verify we're cleared still
+  TEST_ASSERT_EQUAL(0, CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_EQUAL(StartingSize, CMock_Guts_MemBytesFree());
+}
+
+void test_ThatWeCanClaimAndChainAFewElementsTogether(void)
+{
+  unsigned int  i;
+  CMOCK_MEM_INDEX_TYPE first = CMOCK_GUTS_NONE;
+  CMOCK_MEM_INDEX_TYPE next;
+  CMOCK_MEM_INDEX_TYPE element[4];
+
+  //verify we're cleared first
+  TEST_ASSERT_EQUAL(0, CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_EQUAL(StartingSize, CMock_Guts_MemBytesFree());
+
+  //first element
+  element[0] = CMock_Guts_MemNew(sizeof(unsigned int));
+  TEST_ASSERT_MESSAGE(element[0] != CMOCK_GUTS_NONE, "Should Not Have Returned CMOCK_GUTS_NONE");
+  first = CMock_Guts_MemChain(first, element[0]);
+  TEST_ASSERT_EQUAL(element[0], first);
+  *((unsigned int*)CMock_Guts_GetAddressFor(element[0])) = 0;
+
+  //verify we're using the right amount of memory
+  TEST_ASSERT_EQUAL(1 * (TEST_MEM_INDEX_PAD + 8), CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_EQUAL(StartingSize - 1 * (TEST_MEM_INDEX_PAD + 8), CMock_Guts_MemBytesFree());
+
+  //second element
+  element[1] = CMock_Guts_MemNew(sizeof(unsigned int));
+  TEST_ASSERT_MESSAGE(element[1] != CMOCK_GUTS_NONE, "Should Not Have Returned CMOCK_GUTS_NONE");
+  TEST_ASSERT_NOT_EQUAL(element[0], element[1]);
+  TEST_ASSERT_EQUAL(first, CMock_Guts_MemChain(first, element[1]));
+  *((unsigned int*)CMock_Guts_GetAddressFor(element[1])) = 1;
+
+  //verify we're using the right amount of memory
+  TEST_ASSERT_EQUAL(2 * (TEST_MEM_INDEX_PAD + 8), CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_EQUAL(StartingSize - 2 * (TEST_MEM_INDEX_PAD + 8), CMock_Guts_MemBytesFree());
+
+  //third element
+  element[2] = CMock_Guts_MemNew(sizeof(unsigned int));
+  TEST_ASSERT_MESSAGE(element[2] != CMOCK_GUTS_NONE, "Should Not Have Returned CMOCK_GUTS_NONE");
+  TEST_ASSERT_NOT_EQUAL(element[0], element[2]);
+  TEST_ASSERT_NOT_EQUAL(element[1], element[2]);
+  TEST_ASSERT_EQUAL(first, CMock_Guts_MemChain(first, element[2]));
+  *((unsigned int*)CMock_Guts_GetAddressFor(element[2])) = 2;
+
+  //verify we're using the right amount of memory
+  TEST_ASSERT_EQUAL(3 * (TEST_MEM_INDEX_PAD + 8), CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_EQUAL(StartingSize - 3 * (TEST_MEM_INDEX_PAD + 8), CMock_Guts_MemBytesFree());
+
+  //fourth element
+  element[3] = CMock_Guts_MemNew(sizeof(unsigned int));
+  TEST_ASSERT_MESSAGE(element[3] != CMOCK_GUTS_NONE, "Should Not Have Returned CMOCK_GUTS_NONE");
+  TEST_ASSERT_NOT_EQUAL(element[0], element[3]);
+  TEST_ASSERT_NOT_EQUAL(element[1], element[3]);
+  TEST_ASSERT_NOT_EQUAL(element[2], element[3]);
+  TEST_ASSERT_EQUAL(first, CMock_Guts_MemChain(first, element[3]));
+  *((unsigned int*)CMock_Guts_GetAddressFor(element[3])) = 3;
+
+  //verify we're using the right amount of memory
+  TEST_ASSERT_EQUAL(4 * (TEST_MEM_INDEX_PAD + 8), CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_EQUAL(StartingSize - 4 * (TEST_MEM_INDEX_PAD + 8), CMock_Guts_MemBytesFree());
+
+  //traverse list
+  next = first;
+  for (i = 0; i < 4; i++)
+  {
+    TEST_ASSERT_EQUAL(element[i], next);
+    TEST_ASSERT_EQUAL(i, *((unsigned int*)CMock_Guts_GetAddressFor(element[i])));
+    next = CMock_Guts_MemNext(next);
+  }
+
+  //verify we get a null at the end of the list
+  TEST_ASSERT_EQUAL_HEX( CMOCK_GUTS_NONE, next);
+
+  //verify we're using the right amount of memory
+  TEST_ASSERT_EQUAL(4 * (TEST_MEM_INDEX_PAD + 8), CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_EQUAL(StartingSize - 4 * (TEST_MEM_INDEX_PAD + 8), CMock_Guts_MemBytesFree());
+
+  //Free it all
+  CMock_Guts_MemFreeAll();
+
+  //verify we're cleared
+  TEST_ASSERT_EQUAL(0, CMock_Guts_MemBytesUsed());
+  TEST_ASSERT_EQUAL(StartingSize, CMock_Guts_MemBytesFree());
+}
+
+void test_ThatWeCanAskForAllSortsOfSizes(void)
+{
+  CMOCK_MEM_INDEX_TYPE i;
+  CMOCK_MEM_INDEX_TYPE first = CMOCK_GUTS_NONE;
+  CMOCK_MEM_INDEX_TYPE next;
+  CMOCK_MEM_INDEX_TYPE sizes[10]          = {3,  1,  80,  5,  8,  31, 7,  911, 2,  80};
+  CMOCK_MEM_INDEX_TYPE sizes_buffered[10] = {16, 16, 88,  16, 16, 40, 16, 920, 16, 88}; //includes counter
+  CMOCK_MEM_INDEX_TYPE sum = 0;
+  CMOCK_MEM_INDEX_TYPE cap;
+
+  for (i = 0; i < 10; i++)
+  {
+    next = CMock_Guts_MemNew(sizes[i]);
+    TEST_ASSERT_MESSAGE(next != CMOCK_GUTS_NONE, "Should Not Have Returned CMOCK_GUTS_NONE");
+
+    first = CMock_Guts_MemChain(first, next);
+    TEST_ASSERT_MESSAGE(first != CMOCK_GUTS_NONE, "Should Not Have Returned CMOCK_GUTS_NONE");
+
+    sum += sizes_buffered[i];
+    cap = (StartingSize > (sum + CMOCK_MEM_SIZE)) ? StartingSize : (sum + CMOCK_MEM_SIZE);
+    TEST_ASSERT_EQUAL(sum, CMock_Guts_MemBytesUsed());
+    TEST_ASSERT(cap >= CMock_Guts_MemBytesFree());
+  }
+
+  //verify we can still walk through the elements allocated
+  next = first;
+  for (i = 0; i < 10; i++)
+  {
+    TEST_ASSERT_MESSAGE(next != CMOCK_GUTS_NONE, "Should Not Have Returned CMOCK_GUTS_NONE");
+    next = CMock_Guts_MemNext(next);
+  }
+
+  //there aren't any after that
+  TEST_ASSERT_EQUAL_HEX( CMOCK_GUTS_NONE, next);
+}
diff --git a/FreeRTOS-Plus/Test/CMock/test/c/TestCMockCDynamic.yml b/FreeRTOS-Plus/Test/CMock/test/c/TestCMockCDynamic.yml
new file mode 100644
index 000000000..393d8dd86
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/c/TestCMockCDynamic.yml
@@ -0,0 +1,12 @@
+---
+:files:
+  - '../src/cmock.c'
+  - './c/TestCMockCDynamic.c'
+  - './c/TestCMockCDynamic_Runner.c'
+  - '../vendor/unity/src/unity.c'
+:options:
+  - 'TEST'
+  - 'CMOCK_MEM_DYNAMIC'
+  - 'CMOCK_MEM_SIZE=64'
+  - 'CMOCK_MEM_ALIGN=3'
+  - 'CMOCK_MEM_INDEX_TYPE=short'
diff --git a/FreeRTOS-Plus/Test/CMock/test/c/TestCMockCDynamic_Runner.c b/FreeRTOS-Plus/Test/CMock/test/c/TestCMockCDynamic_Runner.c
new file mode 100644
index 000000000..d68608091
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/c/TestCMockCDynamic_Runner.c
@@ -0,0 +1,36 @@
+/* ==========================================
+    CMock Project - Automatic Mock Generation for C
+    Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+========================================== */
+
+#include "unity.h"
+#include "cmock.h"
+#include <setjmp.h>
+#include <stdio.h>
+
+extern void setUp(void);
+extern void tearDown(void);
+
+extern void test_MemNewWillReturnNullIfGivenIllegalSizes(void);
+extern void test_MemNewWillNowSupportSizesGreaterThanTheDefinesCMockSize(void);
+extern void test_MemChainWillReturnNullAndDoNothingIfGivenIllegalInformation(void);
+extern void test_MemNextWillReturnNullIfGivenABadRoot(void);
+extern void test_ThatWeCanClaimAndChainAFewElementsTogether(void);
+extern void test_ThatWeCanAskForAllSortsOfSizes(void);
+
+int main(void)
+{
+  UnityBegin("TestCMockDynamic.c");
+
+  RUN_TEST(test_MemNewWillReturnNullIfGivenIllegalSizes, 26);
+  RUN_TEST(test_MemNewWillNowSupportSizesGreaterThanTheDefinesCMockSize, 35);
+  RUN_TEST(test_MemChainWillReturnNullAndDoNothingIfGivenIllegalInformation, 45);
+  RUN_TEST(test_MemNextWillReturnNullIfGivenABadRoot, 59);
+  RUN_TEST(test_ThatWeCanClaimAndChainAFewElementsTogether, 70);
+  RUN_TEST(test_ThatWeCanAskForAllSortsOfSizes, 152);
+
+  UnityEnd();
+  CMock_Guts_MemFreeFinal();
+  return 0;
+}
diff --git a/FreeRTOS-Plus/Test/CMock/test/c/TestCMockC_Runner.c b/FreeRTOS-Plus/Test/CMock/test/c/TestCMockC_Runner.c
new file mode 100644
index 000000000..af559d8f4
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/c/TestCMockC_Runner.c
@@ -0,0 +1,41 @@
+/* ==========================================
+    CMock Project - Automatic Mock Generation for C
+    Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+========================================== */
+
+#include "unity.h"
+#include <setjmp.h>
+#include <stdio.h>
+
+extern void setUp(void);
+extern void tearDown(void);
+
+extern void test_MemNewWillReturnNullIfGivenIllegalSizes(void);
+extern void test_MemShouldProtectAgainstMemoryOverflow(void);
+extern void test_MemChainWillReturnNullAndDoNothingIfGivenIllegalInformation(void);
+extern void test_MemNextWillReturnNullIfGivenABadRoot(void);
+extern void test_ThatWeCanClaimAndChainAFewElementsTogether(void);
+extern void test_MemEndOfChain(void);
+extern void test_ThatCMockStopsReturningMoreDataWhenItRunsOutOfMemory(void);
+extern void test_ThatCMockStopsReturningMoreDataWhenAskForMoreThanItHasLeftEvenIfNotAtExactEnd(void);
+extern void test_ThatWeCanAskForAllSortsOfSizes(void);
+
+int main(void)
+{
+  Unity.TestFile = "TestCMock.c";
+  UnityBegin(Unity.TestFile);
+
+  RUN_TEST(test_MemNewWillReturnNullIfGivenIllegalSizes, 21);
+  RUN_TEST(test_MemShouldProtectAgainstMemoryOverflow, 33);
+  RUN_TEST(test_MemChainWillReturnNullAndDoNothingIfGivenIllegalInformation, 42);
+  RUN_TEST(test_MemNextWillReturnNullIfGivenABadRoot, 56);
+  RUN_TEST(test_ThatWeCanClaimAndChainAFewElementsTogether, 67);
+  RUN_TEST(test_MemEndOfChain, 149);
+  RUN_TEST(test_ThatCMockStopsReturningMoreDataWhenItRunsOutOfMemory, 195);
+  RUN_TEST(test_ThatCMockStopsReturningMoreDataWhenAskForMoreThanItHasLeftEvenIfNotAtExactEnd, 244);
+  RUN_TEST(test_ThatWeCanAskForAllSortsOfSizes, 298);
+
+  UnityEnd();
+  return 0;
+}
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/Resource/SAM7_FLASH.mac b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/Resource/SAM7_FLASH.mac
new file mode 100644
index 000000000..7c4021aad
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/Resource/SAM7_FLASH.mac
@@ -0,0 +1,71 @@
+//  ----------------------------------------------------------------------------

+//          ATMEL Microcontroller Software Support  -  ROUSSET  -

+//  ----------------------------------------------------------------------------

+//  DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR

+//  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF

+//  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE

+//  DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,

+//  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT

+//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,

+//  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF

+//  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING

+//  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,

+//  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+//  ----------------------------------------------------------------------------

+//  File Name           : SAM7_FLASH.mac

+//  Object              : Generic Macro File for IAR

+//  1.0 17/Aug/05 FBr   : Creation

+//  ----------------------------------------------------------------------------

+

+/*********************************************************************

+*

+*       _InitRSTC()

+*

+* Function description

+*   Initializes the RSTC (Reset controller).

+*   This makes sense since the default is to not allow user resets, which makes it impossible to

+*   apply a second RESET via J-Link

+*/

+_InitRSTC() {

+    __writeMemory32(0xA5000001, 0xFFFFFD08,"Memory");    // Allow user reset

+}

+

+/*********************************************************************

+*

+*       _InitPLL()

+* Function description

+*   Initializes the PMC.

+*   1. Enable the Main Oscillator

+*   2. Configure PLL to 96MHz

+*   3. Switch Master Clock (MCK) on PLL/2 = 48MHz

+*/

+    _InitPLL() {

+

+    __message "Enable Main Oscillator";

+    __writeMemory32(0x00000601,0xFFFFFc20,"Memory");    // MOSC

+    while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x1)  );

+

+    __message "Set PLL to 96MHz";

+    __writeMemory32(0x10191c05,0xFFFFFc2c,"Memory");    // LOCK

+    while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x4)  );

+

+    __message "Set Master Clock to 48MHz";

+    __writeMemory32(0x00000004,0xFFFFFc30,"Memory");    // MCKRDY

+    while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x8)  );

+    __writeMemory32(0x00000007,0xFFFFFc30,"Memory");    // MCKRDY

+    while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x8)  );

+}

+

+/*********************************************************************

+*

+*       execUserReset() : JTAG set initially to Full Speed

+*/

+execUserReset() {

+    __message "execUserReset()";

+    __emulatorSpeed(30000);             // Set JTAG speed to 30kHz to make a hardware reset

+    __hwReset(0);                       // Hardware Reset: CPU is automatically halted after the reset (JTAG is already configured to 32kHz)

+    _InitPLL();                         // Allow to debug at JTAG Full Speed

+    _InitRSTC();                        // Enable User Reset to allow execUserReset() execution

+    __emulatorSpeed(0);                 // Set JTAG speed to full speed

+}

+

diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/Resource/SAM7_RAM.mac b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/Resource/SAM7_RAM.mac
new file mode 100644
index 000000000..a1bf81dc7
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/Resource/SAM7_RAM.mac
@@ -0,0 +1,94 @@
+//  ----------------------------------------------------------------------------

+//          ATMEL Microcontroller Software Support  -  ROUSSET  -

+//  ----------------------------------------------------------------------------

+//  DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR

+//  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF

+//  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE

+//  DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,

+//  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT

+//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,

+//  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF

+//  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING

+//  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,

+//  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+//  ----------------------------------------------------------------------------

+//  File Name           : SAM7_RAM.mac

+//  Object              : Generic Macro File for IAR

+//  1.0 17/Aug/05 FBr   : Creation

+//  ----------------------------------------------------------------------------

+

+/*********************************************************************

+*

+*       _MapRAMAt0()

+*

+* Function description

+*   Maps RAM at 0.

+*/

+_MapRAMAt0(){

+    __message "Changing mapping: RAM mapped to 0";

+    __writeMemory32(0x00000001,0xFFFFFF00,"Memory");

+}

+

+/*********************************************************************

+*

+*       _InitRSTC()

+*

+* Function description

+*   Initializes the RSTC (Reset controller).

+*   This makes sense since the default is to not allow user resets, which makes it impossible to

+*   apply a second RESET via J-Link

+*/

+_InitRSTC() {

+    __writeMemory32(0xA5000001, 0xFFFFFD08,"Memory");    // Allow user reset

+}

+

+/*********************************************************************

+*

+*       _InitPLL()

+* Function description

+*   Initializes the PMC.

+*   1. Enable the Main Oscillator

+*   2. Configure PLL to 96MHz

+*   3. Switch Master Clock (MCK) on PLL/2 = 48MHz

+*/

+    _InitPLL() {

+

+    __message "Set Main Oscillator";

+    __writeMemory32(0x00004001,0xFFFFFc20,"Memory");    // MOSC

+    while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x1)  );

+

+    __message "Set PLL to 96MHz";

+    __writeMemory32(0x10483f0e,0xFFFFFc2c,"Memory");    // LOCK

+    while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x4)  );

+

+    __message "Set Master Clock to 48MHz";

+    __writeMemory32(0x00000004,0xFFFFFc30,"Memory");    // MCKRDY

+    while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x8)  );

+    __writeMemory32(0x00000007,0xFFFFFc30,"Memory");    // MCKRDY

+    while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x8)  );

+}

+

+/*********************************************************************

+*

+*       execUserReset() : JTAG set initially to Full Speed

+*/

+execUserReset() {

+    __message "execUserReset()";

+    __emulatorSpeed(30000);             // Set JTAG speed to 30kHz to make a hardware reset

+    __hwReset(0);                       // Hardware Reset: CPU is automatically halted after the reset

+    _InitPLL();                         // Allow to debug at JTAG Full Speed

+    _MapRAMAt0();                       // Remap RAM to address 0

+    __emulatorSpeed(0);                 // Set JTAG speed to full speed

+}

+

+/*********************************************************************

+*

+*       execUserPreload() : JTAG set initially to 32kHz

+*/

+execUserPreload() {

+    __message "execUserPreload()";

+    __hwReset(0);                       // Hardware Reset: CPU is automatically halted after the reset (JTAG is already configured to 32kHz)

+    _InitPLL();                         // Allow to load Code at JTAG Full Speed

+    _MapRAMAt0();                       // Remap RAM to address 0

+    _InitRSTC();                        // Enable User Reset to allow execUserReset() execution

+}

diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/Resource/SAM7_SIM.mac b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/Resource/SAM7_SIM.mac
new file mode 100644
index 000000000..2be1a4c9b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/Resource/SAM7_SIM.mac
@@ -0,0 +1,67 @@
+//=========================================================

+// Simulation setup file for esc07_demo project

+//=========================================================

+

+__var _timer0_interrupt_ID;

+

+irqBreak()

+{

+  __var __AIC_SMR;

+  __var __AIC_IECR;

+  __var __AIC_IVR;

+

+  // read AIC_IECR instead, since not fully supported by simulator

+  __AIC_IECR = __readMemory32(0xFFFFF120, "Memory");

+  if(__AIC_IECR & 0x1000)

+  {

+    __AIC_SMR = __readMemory32(0xFFFFF060, "Memory");

+    __AIC_IVR = __readMemory32(0xFFFFF0B0, "Memory"); //AIC_IVR = AIC_SVR[x]

+    __writeMemory32(__AIC_IVR, 0xFFFFF100, "Memory"); //AIC_IVR

+    __writeMemory32(0x1000, 0xFFFFF10C, "Memory");    //AIC_IPR

+    __writeMemory32(0x2, 0xFFFFF114, "Memory");       //AIC_CISR

+  }

+

+  return 0;

+}

+

+setupProcessorRegisters()

+{

+  // Write TC0_SR.CPCS with correct status for ISR (Clock enabled; RC Compare Flag = TRUE)

+  __writeMemory32(0x00010010, 0xfffa0020, "Memory");

+

+  // Set TX ready flag in USART0 status register

+  // USART0_BASE->US_CSR = AT91C_US_TXRDY

+  __writeMemory32(0x00000002, 0xfffc0014, "Memory");

+}

+

+configureTimer0Interrupt()

+{

+  __var _master_clock_frequency;

+  __var _timer0_period_cycles;

+

+  // Calculate timer0 frequency in master clock cycles

+  _master_clock_frequency = 48054857;

+  _timer0_period_cycles = _master_clock_frequency / 100;

+  if((_master_clock_frequency % 100) >= 50)

+  {

+    _timer0_period_cycles++;

+  }

+

+  __cancelAllInterrupts();

+  __enableInterrupts();

+

+  _timer0_interrupt_ID = __orderInterrupt("IRQ", _timer0_period_cycles, _timer0_period_cycles, 0, 0, 0, 100);

+

+  if(-1 == _timer0_interrupt_ID)

+  {

+    __message "ERROR: failed to order timer 0 interrupt";

+  }

+

+  __setCodeBreak("0x18", 0, "irqBreak()", "TRUE", "");

+}

+

+execUserReset()

+{

+  setupProcessorRegisters();

+  configureTimer0Interrupt();

+}

diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/Resource/at91SAM7X256_FLASH.xcl b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/Resource/at91SAM7X256_FLASH.xcl
new file mode 100644
index 000000000..02eaec7dc
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/Resource/at91SAM7X256_FLASH.xcl
@@ -0,0 +1,185 @@
+//  ----------------------------------------------------------------------------
+//          ATMEL Microcontroller Software Support  -  ROUSSET  -
+//  ----------------------------------------------------------------------------
+//  DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+//  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+//  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+//  DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+//  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+//  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+//  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+//  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+//  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//  ----------------------------------------------------------------------------
+//  File Name           : at91SAM7X256_FLASH.xcl
+//  Object              : Generic Linker Command File for IAR
+//  1.0 30/Aug/05 FBr   : Creation for 4.30A
+//  ----------------------------------------------------------------------------
+
+//*************************************************************************
+// XLINK command file template for EWARM/ICCARM
+//
+// Usage:  xlink  -f lnkarm  <your_object_file(s)>
+//                -s <program start label>  <C/C++ runtime library>
+//*************************************************************************
+//
+// -------------
+// Code segments - may be placed anywhere in memory.
+// -------------
+//
+//   INTVEC     -- Exception vector table.
+//   SWITAB     -- Software interrupt vector table.
+//   ICODE      -- Startup (cstartup) and exception code.
+//   DIFUNCT    -- Dynamic initialization vectors used by C++.
+//   CODE       -- Compiler generated code.
+//   CODE_I     -- Compiler generated code declared __ramfunc (executes in RAM)
+//   CODE_ID    -- Initializer for CODE_I (ROM).
+//
+// -------------
+// Data segments - may be placed anywhere in memory.
+// -------------
+//
+//   CSTACK     -- The stack used by C/C++ programs (system and user mode).
+//   IRQ_STACK  -- The stack used by IRQ service routines.
+//   SVC_STACK  -- The stack used in supervisor mode
+//                 (Define other exception stacks as needed for
+//                 FIQ, ABT, UND).
+//   HEAP       -- The heap used by malloc and free in C and new and
+//                 delete in C++.
+//   INITTAB    -- Table containing addresses and sizes of segments that
+//                 need to be initialized at startup (by cstartup).
+//   CHECKSUM   -- The linker places checksum byte(s) in this segment,
+//                 when the -J linker command line option is used.
+//   DATA_y     -- Data objects.
+//
+// Where _y can be one of:
+//
+//   _AN        -- Holds uninitialized located objects, i.e. objects with
+//                 an absolute location given by the @ operator or the
+//                 #pragma location directive. Since these segments
+//                 contain objects which already have a fixed address,
+//                 they should not be mentioned in this linker command
+//                 file.
+//   _C         -- Constants (ROM).
+//   _I         -- Initialized data (RAM).
+//   _ID        -- The original content of _I (copied to _I by cstartup) (ROM).
+//   _N         -- Uninitialized data (RAM).
+//   _Z         -- Zero initialized data (RAM).
+//
+// Note:  Be sure to use end values for the defined address ranges.
+//        Otherwise, the linker may allocate space outside the
+//        intended memory range.
+//*************************************************************************
+
+//*************************************************************************
+// Inform the linker about the CPU family used.
+// AT91SAM7X256 Memory mapping
+// No remap
+//  ROMSTART
+//  Start address 0x0000 0000
+//  Size 256 Kbo  0x0004 0000
+//  RAMSTART
+//  Start address 0x0020 0000
+//  Size  64 Kbo  0x0001 0000
+// Remap done
+//  RAMSTART
+//  Start address 0x0000 0000
+//  Size  64 Kbo  0x0001 0000
+//  ROMSTART
+//  Start address 0x0010 0000
+//  Size 256 Kbo  0x0004 0000
+
+//*************************************************************************
+-carm
+
+//*************************************************************************
+// Internal Ram segments mapped AFTER REMAP 64 K.
+//*************************************************************************
+-Z(CONST)INTRAMSTART_REMAP=00200000
+-Z(CONST)INTRAMEND_REMAP=0020FFFF
+
+//*************************************************************************
+// Read-only segments mapped to Flash 256 K.
+//*************************************************************************
+-DROMSTART=00000000
+-DROMEND=0003FFFF
+//*************************************************************************
+// Read/write segments mapped to 64 K RAM.
+//*************************************************************************
+-DRAMSTART=00200000
+-DRAMEND=0020FFFF
+
+//*************************************************************************
+// Address range for reset and exception
+// vectors (INTVEC).
+// The vector area is 32 bytes,
+// an additional 32 bytes is allocated for the
+// constant table used by ldr PC in cstartup.s79.
+//*************************************************************************
+-Z(CODE)INTVEC=00-3F
+
+//*************************************************************************
+// Startup code and exception routines (ICODE).
+//*************************************************************************
+-Z(CODE)ICODE,DIFUNCT=ROMSTART-ROMEND
+-Z(CODE)SWITAB=ROMSTART-ROMEND
+
+//*************************************************************************
+// Code segments may be placed anywhere.
+//*************************************************************************
+-Z(CODE)CODE=ROMSTART-ROMEND
+
+//*************************************************************************
+// Various constants and initializers.
+//*************************************************************************
+-Z(CONST)INITTAB,DATA_ID,DATA_C=ROMSTART-ROMEND
+-Z(CONST)CHECKSUM=ROMSTART-ROMEND
+
+//*************************************************************************
+// Data segments.
+//*************************************************************************
+-Z(DATA)DATA_I,DATA_Z,DATA_N=RAMSTART-RAMEND
+
+//*************************************************************************
+// __ramfunc code copied to and executed from RAM.
+//*************************************************************************
+-Z(DATA)CODE_I=RAMSTART-RAMEND
+-Z(CONST)CODE_ID=ROMSTART-ROMEND // Initializer for
+-QCODE_I=CODE_ID
+
+//*************************************************************************
+// ICCARM produces code for __ramfunc functions in
+// CODE_I segments. The -Q XLINK command line
+// option redirects XLINK to emit the code in the
+// debug information associated with the CODE_I
+// segment, where the code will execute.
+//*************************************************************************
+
+//*************************************************************************
+// Stack and heap segments.
+//*************************************************************************
+-D_CSTACK_SIZE=(100*4)
+-D_IRQ_STACK_SIZE=(3*8*4)
+-D_HEAP_SIZE=(1024*1)
+
+-Z(DATA)CSTACK+_CSTACK_SIZE=RAMSTART-RAMEND
+-Z(DATA)IRQ_STACK+_IRQ_STACK_SIZE=RAMSTART-RAMEND
+-Z(DATA)HEAP+_HEAP_SIZE=RAMSTART-RAMEND
+
+//*************************************************************************
+// ELF/DWARF support.
+//
+// Uncomment the line "-Felf" below to generate ELF/DWARF output.
+// Available format specifiers are:
+//
+//   "-yn": Suppress DWARF debug output
+//   "-yp": Multiple ELF program sections
+//   "-yas": Format suitable for debuggers from ARM Ltd (also sets -p flag)
+//
+// "-Felf" and the format specifiers can also be supplied directly as
+// command line options, or selected from the Xlink Output tab in the
+// IAR Embedded Workbench.
+//*************************************************************************
+
+// -Felf
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/Resource/at91SAM7X256_RAM.xcl b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/Resource/at91SAM7X256_RAM.xcl
new file mode 100644
index 000000000..adcec108e
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/Resource/at91SAM7X256_RAM.xcl
@@ -0,0 +1,185 @@
+//  ----------------------------------------------------------------------------
+//          ATMEL Microcontroller Software Support  -  ROUSSET  -
+//  ----------------------------------------------------------------------------
+//  DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+//  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+//  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+//  DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+//  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+//  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+//  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+//  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+//  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//  ----------------------------------------------------------------------------
+//  File Name           : at91SAM7X256_RAM.xcl
+//  Object              : Generic Linker Command File for IAR
+//  1.0 30/Aug/05 FBr   : Creation for 4.30A
+//  ----------------------------------------------------------------------------
+
+//*************************************************************************
+// XLINK command file template for EWARM/ICCARM
+//
+// Usage:  xlink  -f lnkarm  <your_object_file(s)>
+//                -s <program start label>  <C/C++ runtime library>
+//*************************************************************************
+//
+// -------------
+// Code segments - may be placed anywhere in memory.
+// -------------
+//
+//   INTVEC     -- Exception vector table.
+//   SWITAB     -- Software interrupt vector table.
+//   ICODE      -- Startup (cstartup) and exception code.
+//   DIFUNCT    -- Dynamic initialization vectors used by C++.
+//   CODE       -- Compiler generated code.
+//   CODE_I     -- Compiler generated code declared __ramfunc (executes in RAM)
+//   CODE_ID    -- Initializer for CODE_I (ROM).
+//
+// -------------
+// Data segments - may be placed anywhere in memory.
+// -------------
+//
+//   CSTACK     -- The stack used by C/C++ programs (system and user mode).
+//   IRQ_STACK  -- The stack used by IRQ service routines.
+//   SVC_STACK  -- The stack used in supervisor mode
+//                 (Define other exception stacks as needed for
+//                 FIQ, ABT, UND).
+//   HEAP       -- The heap used by malloc and free in C and new and
+//                 delete in C++.
+//   INITTAB    -- Table containing addresses and sizes of segments that
+//                 need to be initialized at startup (by cstartup).
+//   CHECKSUM   -- The linker places checksum byte(s) in this segment,
+//                 when the -J linker command line option is used.
+//   DATA_y     -- Data objects.
+//
+// Where _y can be one of:
+//
+//   _AN        -- Holds uninitialized located objects, i.e. objects with
+//                 an absolute location given by the @ operator or the
+//                 #pragma location directive. Since these segments
+//                 contain objects which already have a fixed address,
+//                 they should not be mentioned in this linker command
+//                 file.
+//   _C         -- Constants (ROM).
+//   _I         -- Initialized data (RAM).
+//   _ID        -- The original content of _I (copied to _I by cstartup) (ROM).
+//   _N         -- Uninitialized data (RAM).
+//   _Z         -- Zero initialized data (RAM).
+//
+// Note:  Be sure to use end values for the defined address ranges.
+//        Otherwise, the linker may allocate space outside the
+//        intended memory range.
+//*************************************************************************
+
+//*************************************************************************
+// Inform the linker about the CPU family used.
+// AT91SAM7X256 Memory mapping
+// No remap
+//  ROMSTART
+//  Start address 0x0000 0000
+//  Size 256 Kbo  0x0004 0000
+//  RAMSTART
+//  Start address 0x0020 0000
+//  Size  64 Kbo  0x0001 0000
+// Remap done
+//  RAMSTART
+//  Start address 0x0000 0000
+//  Size  64 Kbo  0x0001 0000
+//  ROMSTART
+//  Start address 0x0010 0000
+//  Size 256 Kbo  0x0004 0000
+
+//*************************************************************************
+-carm
+
+//*************************************************************************
+// Internal Ram segments mapped AFTER REMAP 64 K.
+//*************************************************************************
+-Z(CONST)INTRAMSTART_REMAP=00000000
+-Z(CONST)INTRAMEND_REMAP=0000FFFF
+
+//*************************************************************************
+// Read-only segments mapped to Flash 256 K.
+//*************************************************************************
+-DROMSTART=00000000
+-DROMEND=0003FFFF
+//*************************************************************************
+// Read/write segments mapped to 64 K RAM.
+//*************************************************************************
+-DRAMSTART=00000000
+-DRAMEND=0000FFFF
+
+//*************************************************************************
+// Address range for reset and exception
+// vectors (INTVEC).
+// The vector area is 32 bytes,
+// an additional 32 bytes is allocated for the
+// constant table used by ldr PC in cstartup.s79.
+//*************************************************************************
+-Z(CODE)INTVEC=00-3F
+
+//*************************************************************************
+// Startup code and exception routines (ICODE).
+//*************************************************************************
+-Z(CODE)ICODE,DIFUNCT=ROMSTART-ROMEND
+-Z(CODE)SWITAB=ROMSTART-ROMEND
+
+//*************************************************************************
+// Code segments may be placed anywhere.
+//*************************************************************************
+-Z(CODE)CODE=ROMSTART-ROMEND
+
+//*************************************************************************
+// Various constants and initializers.
+//*************************************************************************
+-Z(CONST)INITTAB,DATA_ID,DATA_C=ROMSTART-ROMEND
+-Z(CONST)CHECKSUM=ROMSTART-ROMEND
+
+//*************************************************************************
+// Data segments.
+//*************************************************************************
+-Z(DATA)DATA_I,DATA_Z,DATA_N=RAMSTART-RAMEND
+
+//*************************************************************************
+// __ramfunc code copied to and executed from RAM.
+//*************************************************************************
+-Z(DATA)CODE_I=RAMSTART-RAMEND
+-Z(CONST)CODE_ID=ROMSTART-ROMEND // Initializer for
+-QCODE_I=CODE_ID
+
+//*************************************************************************
+// ICCARM produces code for __ramfunc functions in
+// CODE_I segments. The -Q XLINK command line
+// option redirects XLINK to emit the code in the
+// debug information associated with the CODE_I
+// segment, where the code will execute.
+//*************************************************************************
+
+//*************************************************************************
+// Stack and heap segments.
+//*************************************************************************
+-D_CSTACK_SIZE=(100*4)
+-D_IRQ_STACK_SIZE=(3*8*4)
+-D_HEAP_SIZE=(1024*2)
+
+-Z(DATA)CSTACK+_CSTACK_SIZE=RAMSTART-RAMEND
+-Z(DATA)IRQ_STACK+_IRQ_STACK_SIZE=RAMSTART-RAMEND
+-Z(DATA)HEAP+_HEAP_SIZE=RAMSTART-RAMEND
+
+//*************************************************************************
+// ELF/DWARF support.
+//
+// Uncomment the line "-Felf" below to generate ELF/DWARF output.
+// Available format specifiers are:
+//
+//   "-yn": Suppress DWARF debug output
+//   "-yp": Multiple ELF program sections
+//   "-yas": Format suitable for debuggers from ARM Ltd (also sets -p flag)
+//
+// "-Felf" and the format specifiers can also be supplied directly as
+// command line options, or selected from the Xlink Output tab in the
+// IAR Embedded Workbench.
+//*************************************************************************
+
+// -Felf
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/Resource/ioat91sam7x256.ddf b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/Resource/ioat91sam7x256.ddf
new file mode 100644
index 000000000..c9fcf323f
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/Resource/ioat91sam7x256.ddf
@@ -0,0 +1,2259 @@
+; ----------------------------------------------------------------------------
+;          ATMEL Microcontroller Software Support  -  ROUSSET  -
+; ----------------------------------------------------------------------------
+;  DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+;  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+;  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+;  DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+;  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+;  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+;  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+;  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+;  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+; ----------------------------------------------------------------------------
+; File Name           : AT91SAM7X256.ddf
+; Object              : AT91SAM7X256 definitions
+; Generated           : AT91 SW Application Group  11/02/2005 (15:17:30)
+; 
+; CVS Reference       : /AT91SAM7X256.pl/1.14/Tue Sep 13 15:06:52 2005//
+; CVS Reference       : /SYS_SAM7X.pl/1.3/Tue Feb  1 17:01:43 2005//
+; CVS Reference       : /MC_SAM7X.pl/1.2/Fri May 20 14:13:04 2005//
+; CVS Reference       : /PMC_SAM7X.pl/1.4/Tue Feb  8 13:58:10 2005//
+; CVS Reference       : /RSTC_SAM7X.pl/1.2/Wed Jul 13 14:57:50 2005//
+; CVS Reference       : /UDP_SAM7X.pl/1.1/Tue May 10 11:35:35 2005//
+; CVS Reference       : /PWM_SAM7X.pl/1.1/Tue May 10 11:53:07 2005//
+; CVS Reference       : /AIC_6075B.pl/1.3/Fri May 20 14:01:30 2005//
+; CVS Reference       : /PIO_6057A.pl/1.2/Thu Feb  3 10:18:28 2005//
+; CVS Reference       : /RTTC_6081A.pl/1.2/Tue Nov  9 14:43:58 2004//
+; CVS Reference       : /PITC_6079A.pl/1.2/Tue Nov  9 14:43:56 2004//
+; CVS Reference       : /WDTC_6080A.pl/1.3/Tue Nov  9 14:44:00 2004//
+; CVS Reference       : /VREG_6085B.pl/1.1/Tue Feb  1 16:05:48 2005//
+; CVS Reference       : /PDC_6074C.pl/1.2/Thu Feb  3 08:48:54 2005//
+; CVS Reference       : /DBGU_6059D.pl/1.1/Mon Jan 31 13:15:32 2005//
+; CVS Reference       : /SPI_6088D.pl/1.3/Fri May 20 14:08:59 2005//
+; CVS Reference       : /US_6089C.pl/1.1/Mon Jul 12 18:23:26 2004//
+; CVS Reference       : /SSC_6078B.pl/1.1/Wed Jul 13 15:19:19 2005//
+; CVS Reference       : /TWI_6061A.pl/1.1/Tue Jul 13 07:38:06 2004//
+; CVS Reference       : /TC_6082A.pl/1.7/Fri Mar 11 12:52:17 2005//
+; CVS Reference       : /CAN_6019B.pl/1.1/Tue Mar  8 12:42:22 2005//
+; CVS Reference       : /EMACB_6119A.pl/1.6/Wed Jul 13 15:05:35 2005//
+; CVS Reference       : /ADC_6051C.pl/1.1/Fri Oct 17 09:12:38 2003//
+; ----------------------------------------------------------------------------
+
+[Sfr]
+
+; ========== Register definition for SYS peripheral ========== 
+; ========== Register definition for AIC peripheral ========== 
+sfr = "AIC_SMR", 	"Memory", 0xfffff000, 4, base=16
+sfr = "AIC_SMR.PRIOR", 	"Memory", 0xfffff000, 4, base=16, bitRange=0-2
+sfr = "AIC_SMR.SRCTYPE", 	"Memory", 0xfffff000, 4, base=16, bitRange=5-6
+sfr = "AIC_SVR", 	"Memory", 0xfffff080, 4, base=16
+sfr = "AIC_IVR", 	"Memory", 0xfffff100, 4, base=16
+sfr = "AIC_FVR", 	"Memory", 0xfffff104, 4, base=16
+sfr = "AIC_ISR", 	"Memory", 0xfffff108, 4, base=16
+sfr = "AIC_IPR", 	"Memory", 0xfffff10c, 4, base=16
+sfr = "AIC_IMR", 	"Memory", 0xfffff110, 4, base=16
+sfr = "AIC_CISR", 	"Memory", 0xfffff114, 4, base=16
+sfr = "AIC_CISR.NFIQ", 	"Memory", 0xfffff114, 4, base=16, bitRange=0
+sfr = "AIC_CISR.NIRQ", 	"Memory", 0xfffff114, 4, base=16, bitRange=1
+sfr = "AIC_IECR", 	"Memory", 0xfffff120, 4, base=16
+sfr = "AIC_IDCR", 	"Memory", 0xfffff124, 4, base=16
+sfr = "AIC_ICCR", 	"Memory", 0xfffff128, 4, base=16
+sfr = "AIC_ISCR", 	"Memory", 0xfffff12c, 4, base=16
+sfr = "AIC_EOICR", 	"Memory", 0xfffff130, 4, base=16
+sfr = "AIC_SPU", 	"Memory", 0xfffff134, 4, base=16
+sfr = "AIC_DCR", 	"Memory", 0xfffff138, 4, base=16
+sfr = "AIC_DCR.PROT", 	"Memory", 0xfffff138, 4, base=16, bitRange=0
+sfr = "AIC_DCR.GMSK", 	"Memory", 0xfffff138, 4, base=16, bitRange=1
+sfr = "AIC_FFER", 	"Memory", 0xfffff140, 4, base=16
+sfr = "AIC_FFDR", 	"Memory", 0xfffff144, 4, base=16
+sfr = "AIC_FFSR", 	"Memory", 0xfffff148, 4, base=16
+; ========== Register definition for PDC_DBGU peripheral ========== 
+sfr = "DBGU_RPR", 	"Memory", 0xfffff300, 4, base=16
+sfr = "DBGU_RCR", 	"Memory", 0xfffff304, 4, base=16
+sfr = "DBGU_TPR", 	"Memory", 0xfffff308, 4, base=16
+sfr = "DBGU_TCR", 	"Memory", 0xfffff30c, 4, base=16
+sfr = "DBGU_RNPR", 	"Memory", 0xfffff310, 4, base=16
+sfr = "DBGU_RNCR", 	"Memory", 0xfffff314, 4, base=16
+sfr = "DBGU_TNPR", 	"Memory", 0xfffff318, 4, base=16
+sfr = "DBGU_TNCR", 	"Memory", 0xfffff31c, 4, base=16
+sfr = "DBGU_PTCR", 	"Memory", 0xfffff320, 4, base=16
+sfr = "DBGU_PTCR.RXTEN", 	"Memory", 0xfffff320, 4, base=16, bitRange=0
+sfr = "DBGU_PTCR.RXTDIS", 	"Memory", 0xfffff320, 4, base=16, bitRange=1
+sfr = "DBGU_PTCR.TXTEN", 	"Memory", 0xfffff320, 4, base=16, bitRange=8
+sfr = "DBGU_PTCR.TXTDIS", 	"Memory", 0xfffff320, 4, base=16, bitRange=9
+sfr = "DBGU_PTSR", 	"Memory", 0xfffff324, 4, base=16
+sfr = "DBGU_PTSR.RXTEN", 	"Memory", 0xfffff324, 4, base=16, bitRange=0
+sfr = "DBGU_PTSR.TXTEN", 	"Memory", 0xfffff324, 4, base=16, bitRange=8
+; ========== Register definition for DBGU peripheral ========== 
+sfr = "DBGU_CR", 	"Memory", 0xfffff200, 4, base=16
+sfr = "DBGU_CR.RSTRX", 	"Memory", 0xfffff200, 4, base=16, bitRange=2
+sfr = "DBGU_CR.RSTTX", 	"Memory", 0xfffff200, 4, base=16, bitRange=3
+sfr = "DBGU_CR.RXEN", 	"Memory", 0xfffff200, 4, base=16, bitRange=4
+sfr = "DBGU_CR.RXDIS", 	"Memory", 0xfffff200, 4, base=16, bitRange=5
+sfr = "DBGU_CR.TXEN", 	"Memory", 0xfffff200, 4, base=16, bitRange=6
+sfr = "DBGU_CR.TXDIS", 	"Memory", 0xfffff200, 4, base=16, bitRange=7
+sfr = "DBGU_CR.RSTSTA", 	"Memory", 0xfffff200, 4, base=16, bitRange=8
+sfr = "DBGU_MR", 	"Memory", 0xfffff204, 4, base=16
+sfr = "DBGU_MR.PAR", 	"Memory", 0xfffff204, 4, base=16, bitRange=9-11
+sfr = "DBGU_MR.CHMODE", 	"Memory", 0xfffff204, 4, base=16, bitRange=14-15
+sfr = "DBGU_IER", 	"Memory", 0xfffff208, 4, base=16
+sfr = "DBGU_IER.RXRDY", 	"Memory", 0xfffff208, 4, base=16, bitRange=0
+sfr = "DBGU_IER.TXRDY", 	"Memory", 0xfffff208, 4, base=16, bitRange=1
+sfr = "DBGU_IER.ENDRX", 	"Memory", 0xfffff208, 4, base=16, bitRange=3
+sfr = "DBGU_IER.ENDTX", 	"Memory", 0xfffff208, 4, base=16, bitRange=4
+sfr = "DBGU_IER.OVRE", 	"Memory", 0xfffff208, 4, base=16, bitRange=5
+sfr = "DBGU_IER.FRAME", 	"Memory", 0xfffff208, 4, base=16, bitRange=6
+sfr = "DBGU_IER.PARE", 	"Memory", 0xfffff208, 4, base=16, bitRange=7
+sfr = "DBGU_IER.TXEMPTY", 	"Memory", 0xfffff208, 4, base=16, bitRange=9
+sfr = "DBGU_IER.TXBUFE", 	"Memory", 0xfffff208, 4, base=16, bitRange=11
+sfr = "DBGU_IER.RXBUFF", 	"Memory", 0xfffff208, 4, base=16, bitRange=12
+sfr = "DBGU_IER.TX", 	"Memory", 0xfffff208, 4, base=16, bitRange=30
+sfr = "DBGU_IER.RX", 	"Memory", 0xfffff208, 4, base=16, bitRange=31
+sfr = "DBGU_IDR", 	"Memory", 0xfffff20c, 4, base=16
+sfr = "DBGU_IDR.RXRDY", 	"Memory", 0xfffff20c, 4, base=16, bitRange=0
+sfr = "DBGU_IDR.TXRDY", 	"Memory", 0xfffff20c, 4, base=16, bitRange=1
+sfr = "DBGU_IDR.ENDRX", 	"Memory", 0xfffff20c, 4, base=16, bitRange=3
+sfr = "DBGU_IDR.ENDTX", 	"Memory", 0xfffff20c, 4, base=16, bitRange=4
+sfr = "DBGU_IDR.OVRE", 	"Memory", 0xfffff20c, 4, base=16, bitRange=5
+sfr = "DBGU_IDR.FRAME", 	"Memory", 0xfffff20c, 4, base=16, bitRange=6
+sfr = "DBGU_IDR.PARE", 	"Memory", 0xfffff20c, 4, base=16, bitRange=7
+sfr = "DBGU_IDR.TXEMPTY", 	"Memory", 0xfffff20c, 4, base=16, bitRange=9
+sfr = "DBGU_IDR.TXBUFE", 	"Memory", 0xfffff20c, 4, base=16, bitRange=11
+sfr = "DBGU_IDR.RXBUFF", 	"Memory", 0xfffff20c, 4, base=16, bitRange=12
+sfr = "DBGU_IDR.TX", 	"Memory", 0xfffff20c, 4, base=16, bitRange=30
+sfr = "DBGU_IDR.RX", 	"Memory", 0xfffff20c, 4, base=16, bitRange=31
+sfr = "DBGU_IMR", 	"Memory", 0xfffff210, 4, base=16
+sfr = "DBGU_IMR.RXRDY", 	"Memory", 0xfffff210, 4, base=16, bitRange=0
+sfr = "DBGU_IMR.TXRDY", 	"Memory", 0xfffff210, 4, base=16, bitRange=1
+sfr = "DBGU_IMR.ENDRX", 	"Memory", 0xfffff210, 4, base=16, bitRange=3
+sfr = "DBGU_IMR.ENDTX", 	"Memory", 0xfffff210, 4, base=16, bitRange=4
+sfr = "DBGU_IMR.OVRE", 	"Memory", 0xfffff210, 4, base=16, bitRange=5
+sfr = "DBGU_IMR.FRAME", 	"Memory", 0xfffff210, 4, base=16, bitRange=6
+sfr = "DBGU_IMR.PARE", 	"Memory", 0xfffff210, 4, base=16, bitRange=7
+sfr = "DBGU_IMR.TXEMPTY", 	"Memory", 0xfffff210, 4, base=16, bitRange=9
+sfr = "DBGU_IMR.TXBUFE", 	"Memory", 0xfffff210, 4, base=16, bitRange=11
+sfr = "DBGU_IMR.RXBUFF", 	"Memory", 0xfffff210, 4, base=16, bitRange=12
+sfr = "DBGU_IMR.TX", 	"Memory", 0xfffff210, 4, base=16, bitRange=30
+sfr = "DBGU_IMR.RX", 	"Memory", 0xfffff210, 4, base=16, bitRange=31
+sfr = "DBGU_CSR", 	"Memory", 0xfffff214, 4, base=16
+sfr = "DBGU_CSR.RXRDY", 	"Memory", 0xfffff214, 4, base=16, bitRange=0
+sfr = "DBGU_CSR.TXRDY", 	"Memory", 0xfffff214, 4, base=16, bitRange=1
+sfr = "DBGU_CSR.ENDRX", 	"Memory", 0xfffff214, 4, base=16, bitRange=3
+sfr = "DBGU_CSR.ENDTX", 	"Memory", 0xfffff214, 4, base=16, bitRange=4
+sfr = "DBGU_CSR.OVRE", 	"Memory", 0xfffff214, 4, base=16, bitRange=5
+sfr = "DBGU_CSR.FRAME", 	"Memory", 0xfffff214, 4, base=16, bitRange=6
+sfr = "DBGU_CSR.PARE", 	"Memory", 0xfffff214, 4, base=16, bitRange=7
+sfr = "DBGU_CSR.TXEMPTY", 	"Memory", 0xfffff214, 4, base=16, bitRange=9
+sfr = "DBGU_CSR.TXBUFE", 	"Memory", 0xfffff214, 4, base=16, bitRange=11
+sfr = "DBGU_CSR.RXBUFF", 	"Memory", 0xfffff214, 4, base=16, bitRange=12
+sfr = "DBGU_CSR.TX", 	"Memory", 0xfffff214, 4, base=16, bitRange=30
+sfr = "DBGU_CSR.RX", 	"Memory", 0xfffff214, 4, base=16, bitRange=31
+sfr = "DBGU_RHR", 	"Memory", 0xfffff218, 4, base=16
+sfr = "DBGU_THR", 	"Memory", 0xfffff21c, 4, base=16
+sfr = "DBGU_BRGR", 	"Memory", 0xfffff220, 4, base=16
+sfr = "DBGU_CIDR", 	"Memory", 0xfffff240, 4, base=16
+sfr = "DBGU_EXID", 	"Memory", 0xfffff244, 4, base=16
+sfr = "DBGU_FNTR", 	"Memory", 0xfffff248, 4, base=16
+sfr = "DBGU_FNTR.NTRST", 	"Memory", 0xfffff248, 4, base=16, bitRange=0
+; ========== Register definition for PIOA peripheral ========== 
+sfr = "PIOA_PER", 	"Memory", 0xfffff400, 4, base=16
+sfr = "PIOA_PDR", 	"Memory", 0xfffff404, 4, base=16
+sfr = "PIOA_PSR", 	"Memory", 0xfffff408, 4, base=16
+sfr = "PIOA_OER", 	"Memory", 0xfffff410, 4, base=16
+sfr = "PIOA_ODR", 	"Memory", 0xfffff414, 4, base=16
+sfr = "PIOA_OSR", 	"Memory", 0xfffff418, 4, base=16
+sfr = "PIOA_IFER", 	"Memory", 0xfffff420, 4, base=16
+sfr = "PIOA_IFDR", 	"Memory", 0xfffff424, 4, base=16
+sfr = "PIOA_IFSR", 	"Memory", 0xfffff428, 4, base=16
+sfr = "PIOA_SODR", 	"Memory", 0xfffff430, 4, base=16
+sfr = "PIOA_CODR", 	"Memory", 0xfffff434, 4, base=16
+sfr = "PIOA_ODSR", 	"Memory", 0xfffff438, 4, base=16
+sfr = "PIOA_PDSR", 	"Memory", 0xfffff43c, 4, base=16
+sfr = "PIOA_IER", 	"Memory", 0xfffff440, 4, base=16
+sfr = "PIOA_IDR", 	"Memory", 0xfffff444, 4, base=16
+sfr = "PIOA_IMR", 	"Memory", 0xfffff448, 4, base=16
+sfr = "PIOA_ISR", 	"Memory", 0xfffff44c, 4, base=16
+sfr = "PIOA_MDER", 	"Memory", 0xfffff450, 4, base=16
+sfr = "PIOA_MDDR", 	"Memory", 0xfffff454, 4, base=16
+sfr = "PIOA_MDSR", 	"Memory", 0xfffff458, 4, base=16
+sfr = "PIOA_PPUDR", 	"Memory", 0xfffff460, 4, base=16
+sfr = "PIOA_PPUER", 	"Memory", 0xfffff464, 4, base=16
+sfr = "PIOA_PPUSR", 	"Memory", 0xfffff468, 4, base=16
+sfr = "PIOA_ASR", 	"Memory", 0xfffff470, 4, base=16
+sfr = "PIOA_BSR", 	"Memory", 0xfffff474, 4, base=16
+sfr = "PIOA_ABSR", 	"Memory", 0xfffff478, 4, base=16
+sfr = "PIOA_OWER", 	"Memory", 0xfffff4a0, 4, base=16
+sfr = "PIOA_OWDR", 	"Memory", 0xfffff4a4, 4, base=16
+sfr = "PIOA_OWSR", 	"Memory", 0xfffff4a8, 4, base=16
+; ========== Register definition for PIOB peripheral ========== 
+sfr = "PIOB_PER", 	"Memory", 0xfffff600, 4, base=16
+sfr = "PIOB_PDR", 	"Memory", 0xfffff604, 4, base=16
+sfr = "PIOB_PSR", 	"Memory", 0xfffff608, 4, base=16
+sfr = "PIOB_OER", 	"Memory", 0xfffff610, 4, base=16
+sfr = "PIOB_ODR", 	"Memory", 0xfffff614, 4, base=16
+sfr = "PIOB_OSR", 	"Memory", 0xfffff618, 4, base=16
+sfr = "PIOB_IFER", 	"Memory", 0xfffff620, 4, base=16
+sfr = "PIOB_IFDR", 	"Memory", 0xfffff624, 4, base=16
+sfr = "PIOB_IFSR", 	"Memory", 0xfffff628, 4, base=16
+sfr = "PIOB_SODR", 	"Memory", 0xfffff630, 4, base=16
+sfr = "PIOB_CODR", 	"Memory", 0xfffff634, 4, base=16
+sfr = "PIOB_ODSR", 	"Memory", 0xfffff638, 4, base=16
+sfr = "PIOB_PDSR", 	"Memory", 0xfffff63c, 4, base=16
+sfr = "PIOB_IER", 	"Memory", 0xfffff640, 4, base=16
+sfr = "PIOB_IDR", 	"Memory", 0xfffff644, 4, base=16
+sfr = "PIOB_IMR", 	"Memory", 0xfffff648, 4, base=16
+sfr = "PIOB_ISR", 	"Memory", 0xfffff64c, 4, base=16
+sfr = "PIOB_MDER", 	"Memory", 0xfffff650, 4, base=16
+sfr = "PIOB_MDDR", 	"Memory", 0xfffff654, 4, base=16
+sfr = "PIOB_MDSR", 	"Memory", 0xfffff658, 4, base=16
+sfr = "PIOB_PPUDR", 	"Memory", 0xfffff660, 4, base=16
+sfr = "PIOB_PPUER", 	"Memory", 0xfffff664, 4, base=16
+sfr = "PIOB_PPUSR", 	"Memory", 0xfffff668, 4, base=16
+sfr = "PIOB_ASR", 	"Memory", 0xfffff670, 4, base=16
+sfr = "PIOB_BSR", 	"Memory", 0xfffff674, 4, base=16
+sfr = "PIOB_ABSR", 	"Memory", 0xfffff678, 4, base=16
+sfr = "PIOB_OWER", 	"Memory", 0xfffff6a0, 4, base=16
+sfr = "PIOB_OWDR", 	"Memory", 0xfffff6a4, 4, base=16
+sfr = "PIOB_OWSR", 	"Memory", 0xfffff6a8, 4, base=16
+; ========== Register definition for CKGR peripheral ========== 
+sfr = "CKGR_MOR", 	"Memory", 0xfffffc20, 4, base=16
+sfr = "CKGR_MOR.MOSCEN", 	"Memory", 0xfffffc20, 4, base=16, bitRange=0
+sfr = "CKGR_MOR.OSCBYPASS", 	"Memory", 0xfffffc20, 4, base=16, bitRange=1
+sfr = "CKGR_MOR.OSCOUNT", 	"Memory", 0xfffffc20, 4, base=16, bitRange=8-15
+sfr = "CKGR_MCFR", 	"Memory", 0xfffffc24, 4, base=16
+sfr = "CKGR_MCFR.MAINF", 	"Memory", 0xfffffc24, 4, base=16, bitRange=0-15
+sfr = "CKGR_MCFR.MAINRDY", 	"Memory", 0xfffffc24, 4, base=16, bitRange=16
+sfr = "CKGR_PLLR", 	"Memory", 0xfffffc2c, 4, base=16
+sfr = "CKGR_PLLR.DIV", 	"Memory", 0xfffffc2c, 4, base=16, bitRange=0-7
+sfr = "CKGR_PLLR.PLLCOUNT", 	"Memory", 0xfffffc2c, 4, base=16, bitRange=8-13
+sfr = "CKGR_PLLR.OUT", 	"Memory", 0xfffffc2c, 4, base=16, bitRange=14-15
+sfr = "CKGR_PLLR.MUL", 	"Memory", 0xfffffc2c, 4, base=16, bitRange=16-26
+sfr = "CKGR_PLLR.USBDIV", 	"Memory", 0xfffffc2c, 4, base=16, bitRange=28-29
+; ========== Register definition for PMC peripheral ========== 
+sfr = "PMC_SCER", 	"Memory", 0xfffffc00, 4, base=16
+sfr = "PMC_SCER.PCK", 	"Memory", 0xfffffc00, 4, base=16, bitRange=0
+sfr = "PMC_SCER.UDP", 	"Memory", 0xfffffc00, 4, base=16, bitRange=7
+sfr = "PMC_SCER.PCK0", 	"Memory", 0xfffffc00, 4, base=16, bitRange=8
+sfr = "PMC_SCER.PCK1", 	"Memory", 0xfffffc00, 4, base=16, bitRange=9
+sfr = "PMC_SCER.PCK2", 	"Memory", 0xfffffc00, 4, base=16, bitRange=10
+sfr = "PMC_SCER.PCK3", 	"Memory", 0xfffffc00, 4, base=16, bitRange=11
+sfr = "PMC_SCDR", 	"Memory", 0xfffffc04, 4, base=16
+sfr = "PMC_SCDR.PCK", 	"Memory", 0xfffffc04, 4, base=16, bitRange=0
+sfr = "PMC_SCDR.UDP", 	"Memory", 0xfffffc04, 4, base=16, bitRange=7
+sfr = "PMC_SCDR.PCK0", 	"Memory", 0xfffffc04, 4, base=16, bitRange=8
+sfr = "PMC_SCDR.PCK1", 	"Memory", 0xfffffc04, 4, base=16, bitRange=9
+sfr = "PMC_SCDR.PCK2", 	"Memory", 0xfffffc04, 4, base=16, bitRange=10
+sfr = "PMC_SCDR.PCK3", 	"Memory", 0xfffffc04, 4, base=16, bitRange=11
+sfr = "PMC_SCSR", 	"Memory", 0xfffffc08, 4, base=16
+sfr = "PMC_SCSR.PCK", 	"Memory", 0xfffffc08, 4, base=16, bitRange=0
+sfr = "PMC_SCSR.UDP", 	"Memory", 0xfffffc08, 4, base=16, bitRange=7
+sfr = "PMC_SCSR.PCK0", 	"Memory", 0xfffffc08, 4, base=16, bitRange=8
+sfr = "PMC_SCSR.PCK1", 	"Memory", 0xfffffc08, 4, base=16, bitRange=9
+sfr = "PMC_SCSR.PCK2", 	"Memory", 0xfffffc08, 4, base=16, bitRange=10
+sfr = "PMC_SCSR.PCK3", 	"Memory", 0xfffffc08, 4, base=16, bitRange=11
+sfr = "PMC_PCER", 	"Memory", 0xfffffc10, 4, base=16
+sfr = "PMC_PCDR", 	"Memory", 0xfffffc14, 4, base=16
+sfr = "PMC_PCSR", 	"Memory", 0xfffffc18, 4, base=16
+sfr = "PMC_MOR", 	"Memory", 0xfffffc20, 4, base=16
+sfr = "PMC_MOR.MOSCEN", 	"Memory", 0xfffffc20, 4, base=16, bitRange=0
+sfr = "PMC_MOR.OSCBYPASS", 	"Memory", 0xfffffc20, 4, base=16, bitRange=1
+sfr = "PMC_MOR.OSCOUNT", 	"Memory", 0xfffffc20, 4, base=16, bitRange=8-15
+sfr = "PMC_MCFR", 	"Memory", 0xfffffc24, 4, base=16
+sfr = "PMC_MCFR.MAINF", 	"Memory", 0xfffffc24, 4, base=16, bitRange=0-15
+sfr = "PMC_MCFR.MAINRDY", 	"Memory", 0xfffffc24, 4, base=16, bitRange=16
+sfr = "PMC_PLLR", 	"Memory", 0xfffffc2c, 4, base=16
+sfr = "PMC_PLLR.DIV", 	"Memory", 0xfffffc2c, 4, base=16, bitRange=0-7
+sfr = "PMC_PLLR.PLLCOUNT", 	"Memory", 0xfffffc2c, 4, base=16, bitRange=8-13
+sfr = "PMC_PLLR.OUT", 	"Memory", 0xfffffc2c, 4, base=16, bitRange=14-15
+sfr = "PMC_PLLR.MUL", 	"Memory", 0xfffffc2c, 4, base=16, bitRange=16-26
+sfr = "PMC_PLLR.USBDIV", 	"Memory", 0xfffffc2c, 4, base=16, bitRange=28-29
+sfr = "PMC_MCKR", 	"Memory", 0xfffffc30, 4, base=16
+sfr = "PMC_MCKR.CSS", 	"Memory", 0xfffffc30, 4, base=16, bitRange=0-1
+sfr = "PMC_MCKR.PRES", 	"Memory", 0xfffffc30, 4, base=16, bitRange=2-4
+sfr = "PMC_PCKR", 	"Memory", 0xfffffc40, 4, base=16
+sfr = "PMC_PCKR.CSS", 	"Memory", 0xfffffc40, 4, base=16, bitRange=0-1
+sfr = "PMC_PCKR.PRES", 	"Memory", 0xfffffc40, 4, base=16, bitRange=2-4
+sfr = "PMC_IER", 	"Memory", 0xfffffc60, 4, base=16
+sfr = "PMC_IER.MOSCS", 	"Memory", 0xfffffc60, 4, base=16, bitRange=0
+sfr = "PMC_IER.LOCK", 	"Memory", 0xfffffc60, 4, base=16, bitRange=2
+sfr = "PMC_IER.MCKRDY", 	"Memory", 0xfffffc60, 4, base=16, bitRange=3
+sfr = "PMC_IER.PCK0RDY", 	"Memory", 0xfffffc60, 4, base=16, bitRange=8
+sfr = "PMC_IER.PCK1RDY", 	"Memory", 0xfffffc60, 4, base=16, bitRange=9
+sfr = "PMC_IER.PCK2RDY", 	"Memory", 0xfffffc60, 4, base=16, bitRange=10
+sfr = "PMC_IER.PCK3RDY", 	"Memory", 0xfffffc60, 4, base=16, bitRange=11
+sfr = "PMC_IDR", 	"Memory", 0xfffffc64, 4, base=16
+sfr = "PMC_IDR.MOSCS", 	"Memory", 0xfffffc64, 4, base=16, bitRange=0
+sfr = "PMC_IDR.LOCK", 	"Memory", 0xfffffc64, 4, base=16, bitRange=2
+sfr = "PMC_IDR.MCKRDY", 	"Memory", 0xfffffc64, 4, base=16, bitRange=3
+sfr = "PMC_IDR.PCK0RDY", 	"Memory", 0xfffffc64, 4, base=16, bitRange=8
+sfr = "PMC_IDR.PCK1RDY", 	"Memory", 0xfffffc64, 4, base=16, bitRange=9
+sfr = "PMC_IDR.PCK2RDY", 	"Memory", 0xfffffc64, 4, base=16, bitRange=10
+sfr = "PMC_IDR.PCK3RDY", 	"Memory", 0xfffffc64, 4, base=16, bitRange=11
+sfr = "PMC_SR", 	"Memory", 0xfffffc68, 4, base=16
+sfr = "PMC_SR.MOSCS", 	"Memory", 0xfffffc68, 4, base=16, bitRange=0
+sfr = "PMC_SR.LOCK", 	"Memory", 0xfffffc68, 4, base=16, bitRange=2
+sfr = "PMC_SR.MCKRDY", 	"Memory", 0xfffffc68, 4, base=16, bitRange=3
+sfr = "PMC_SR.PCK0RDY", 	"Memory", 0xfffffc68, 4, base=16, bitRange=8
+sfr = "PMC_SR.PCK1RDY", 	"Memory", 0xfffffc68, 4, base=16, bitRange=9
+sfr = "PMC_SR.PCK2RDY", 	"Memory", 0xfffffc68, 4, base=16, bitRange=10
+sfr = "PMC_SR.PCK3RDY", 	"Memory", 0xfffffc68, 4, base=16, bitRange=11
+sfr = "PMC_IMR", 	"Memory", 0xfffffc6c, 4, base=16
+sfr = "PMC_IMR.MOSCS", 	"Memory", 0xfffffc6c, 4, base=16, bitRange=0
+sfr = "PMC_IMR.LOCK", 	"Memory", 0xfffffc6c, 4, base=16, bitRange=2
+sfr = "PMC_IMR.MCKRDY", 	"Memory", 0xfffffc6c, 4, base=16, bitRange=3
+sfr = "PMC_IMR.PCK0RDY", 	"Memory", 0xfffffc6c, 4, base=16, bitRange=8
+sfr = "PMC_IMR.PCK1RDY", 	"Memory", 0xfffffc6c, 4, base=16, bitRange=9
+sfr = "PMC_IMR.PCK2RDY", 	"Memory", 0xfffffc6c, 4, base=16, bitRange=10
+sfr = "PMC_IMR.PCK3RDY", 	"Memory", 0xfffffc6c, 4, base=16, bitRange=11
+; ========== Register definition for RSTC peripheral ========== 
+sfr = "RSTC_RCR", 	"Memory", 0xfffffd00, 4, base=16
+sfr = "RSTC_RCR.PROCRST", 	"Memory", 0xfffffd00, 4, base=16, bitRange=0
+sfr = "RSTC_RCR.PERRST", 	"Memory", 0xfffffd00, 4, base=16, bitRange=2
+sfr = "RSTC_RCR.EXTRST", 	"Memory", 0xfffffd00, 4, base=16, bitRange=3
+sfr = "RSTC_RCR.KEY", 	"Memory", 0xfffffd00, 4, base=16, bitRange=24-31
+sfr = "RSTC_RSR", 	"Memory", 0xfffffd04, 4, base=16
+sfr = "RSTC_RSR.URSTS", 	"Memory", 0xfffffd04, 4, base=16, bitRange=0
+sfr = "RSTC_RSR.BODSTS", 	"Memory", 0xfffffd04, 4, base=16, bitRange=1
+sfr = "RSTC_RSR.RSTTYP", 	"Memory", 0xfffffd04, 4, base=16, bitRange=8-10
+sfr = "RSTC_RSR.NRSTL", 	"Memory", 0xfffffd04, 4, base=16, bitRange=16
+sfr = "RSTC_RSR.SRCMP", 	"Memory", 0xfffffd04, 4, base=16, bitRange=17
+sfr = "RSTC_RMR", 	"Memory", 0xfffffd08, 4, base=16
+sfr = "RSTC_RMR.URSTEN", 	"Memory", 0xfffffd08, 4, base=16, bitRange=0
+sfr = "RSTC_RMR.URSTIEN", 	"Memory", 0xfffffd08, 4, base=16, bitRange=4
+sfr = "RSTC_RMR.ERSTL", 	"Memory", 0xfffffd08, 4, base=16, bitRange=8-11
+sfr = "RSTC_RMR.BODIEN", 	"Memory", 0xfffffd08, 4, base=16, bitRange=16
+sfr = "RSTC_RMR.KEY", 	"Memory", 0xfffffd08, 4, base=16, bitRange=24-31
+; ========== Register definition for RTTC peripheral ========== 
+sfr = "RTTC_RTMR", 	"Memory", 0xfffffd20, 4, base=16
+sfr = "RTTC_RTMR.RTPRES", 	"Memory", 0xfffffd20, 4, base=16, bitRange=0-15
+sfr = "RTTC_RTMR.ALMIEN", 	"Memory", 0xfffffd20, 4, base=16, bitRange=16
+sfr = "RTTC_RTMR.RTTINCIEN", 	"Memory", 0xfffffd20, 4, base=16, bitRange=17
+sfr = "RTTC_RTMR.RTTRST", 	"Memory", 0xfffffd20, 4, base=16, bitRange=18
+sfr = "RTTC_RTAR", 	"Memory", 0xfffffd24, 4, base=16
+sfr = "RTTC_RTAR.ALMV", 	"Memory", 0xfffffd24, 4, base=16, bitRange=0-31
+sfr = "RTTC_RTVR", 	"Memory", 0xfffffd28, 4, base=16
+sfr = "RTTC_RTVR.CRTV", 	"Memory", 0xfffffd28, 4, base=16, bitRange=0-31
+sfr = "RTTC_RTSR", 	"Memory", 0xfffffd2c, 4, base=16
+sfr = "RTTC_RTSR.ALMS", 	"Memory", 0xfffffd2c, 4, base=16, bitRange=0
+sfr = "RTTC_RTSR.RTTINC", 	"Memory", 0xfffffd2c, 4, base=16, bitRange=1
+; ========== Register definition for PITC peripheral ========== 
+sfr = "PITC_PIMR", 	"Memory", 0xfffffd30, 4, base=16
+sfr = "PITC_PIMR.PIV", 	"Memory", 0xfffffd30, 4, base=16, bitRange=0-19
+sfr = "PITC_PIMR.PITEN", 	"Memory", 0xfffffd30, 4, base=16, bitRange=24
+sfr = "PITC_PIMR.PITIEN", 	"Memory", 0xfffffd30, 4, base=16, bitRange=25
+sfr = "PITC_PISR", 	"Memory", 0xfffffd34, 4, base=16
+sfr = "PITC_PISR.PITS", 	"Memory", 0xfffffd34, 4, base=16, bitRange=0
+sfr = "PITC_PIVR", 	"Memory", 0xfffffd38, 4, base=16
+sfr = "PITC_PIVR.CPIV", 	"Memory", 0xfffffd38, 4, base=16, bitRange=0-19
+sfr = "PITC_PIVR.PICNT", 	"Memory", 0xfffffd38, 4, base=16, bitRange=20-31
+sfr = "PITC_PIIR", 	"Memory", 0xfffffd3c, 4, base=16
+sfr = "PITC_PIIR.CPIV", 	"Memory", 0xfffffd3c, 4, base=16, bitRange=0-19
+sfr = "PITC_PIIR.PICNT", 	"Memory", 0xfffffd3c, 4, base=16, bitRange=20-31
+; ========== Register definition for WDTC peripheral ========== 
+sfr = "WDTC_WDCR", 	"Memory", 0xfffffd40, 4, base=16
+sfr = "WDTC_WDCR.WDRSTT", 	"Memory", 0xfffffd40, 4, base=16, bitRange=0
+sfr = "WDTC_WDCR.KEY", 	"Memory", 0xfffffd40, 4, base=16, bitRange=24-31
+sfr = "WDTC_WDMR", 	"Memory", 0xfffffd44, 4, base=16
+sfr = "WDTC_WDMR.WDV", 	"Memory", 0xfffffd44, 4, base=16, bitRange=0-11
+sfr = "WDTC_WDMR.WDFIEN", 	"Memory", 0xfffffd44, 4, base=16, bitRange=12
+sfr = "WDTC_WDMR.WDRSTEN", 	"Memory", 0xfffffd44, 4, base=16, bitRange=13
+sfr = "WDTC_WDMR.WDRPROC", 	"Memory", 0xfffffd44, 4, base=16, bitRange=14
+sfr = "WDTC_WDMR.WDDIS", 	"Memory", 0xfffffd44, 4, base=16, bitRange=15
+sfr = "WDTC_WDMR.WDD", 	"Memory", 0xfffffd44, 4, base=16, bitRange=16-27
+sfr = "WDTC_WDMR.WDDBGHLT", 	"Memory", 0xfffffd44, 4, base=16, bitRange=28
+sfr = "WDTC_WDMR.WDIDLEHLT", 	"Memory", 0xfffffd44, 4, base=16, bitRange=29
+sfr = "WDTC_WDSR", 	"Memory", 0xfffffd48, 4, base=16
+sfr = "WDTC_WDSR.WDUNF", 	"Memory", 0xfffffd48, 4, base=16, bitRange=0
+sfr = "WDTC_WDSR.WDERR", 	"Memory", 0xfffffd48, 4, base=16, bitRange=1
+; ========== Register definition for VREG peripheral ========== 
+sfr = "VREG_MR", 	"Memory", 0xfffffd60, 4, base=16
+sfr = "VREG_MR.PSTDBY", 	"Memory", 0xfffffd60, 4, base=16, bitRange=0
+; ========== Register definition for MC peripheral ========== 
+sfr = "MC_RCR", 	"Memory", 0xffffff00, 4, base=16
+sfr = "MC_RCR.RCB", 	"Memory", 0xffffff00, 4, base=16, bitRange=0
+sfr = "MC_ASR", 	"Memory", 0xffffff04, 4, base=16
+sfr = "MC_ASR.UNDADD", 	"Memory", 0xffffff04, 4, base=16, bitRange=0
+sfr = "MC_ASR.MISADD", 	"Memory", 0xffffff04, 4, base=16, bitRange=1
+sfr = "MC_ASR.ABTSZ", 	"Memory", 0xffffff04, 4, base=16, bitRange=8-9
+sfr = "MC_ASR.ABTTYP", 	"Memory", 0xffffff04, 4, base=16, bitRange=10-11
+sfr = "MC_ASR.MST0", 	"Memory", 0xffffff04, 4, base=16, bitRange=16
+sfr = "MC_ASR.MST1", 	"Memory", 0xffffff04, 4, base=16, bitRange=17
+sfr = "MC_ASR.SVMST0", 	"Memory", 0xffffff04, 4, base=16, bitRange=24
+sfr = "MC_ASR.SVMST1", 	"Memory", 0xffffff04, 4, base=16, bitRange=25
+sfr = "MC_AASR", 	"Memory", 0xffffff08, 4, base=16
+sfr = "MC_FMR", 	"Memory", 0xffffff60, 4, base=16
+sfr = "MC_FMR.FRDY", 	"Memory", 0xffffff60, 4, base=16, bitRange=0
+sfr = "MC_FMR.LOCKE", 	"Memory", 0xffffff60, 4, base=16, bitRange=2
+sfr = "MC_FMR.PROGE", 	"Memory", 0xffffff60, 4, base=16, bitRange=3
+sfr = "MC_FMR.NEBP", 	"Memory", 0xffffff60, 4, base=16, bitRange=7
+sfr = "MC_FMR.FWS", 	"Memory", 0xffffff60, 4, base=16, bitRange=8-9
+sfr = "MC_FMR.FMCN", 	"Memory", 0xffffff60, 4, base=16, bitRange=16-23
+sfr = "MC_FCR", 	"Memory", 0xffffff64, 4, base=16
+sfr = "MC_FCR.FCMD", 	"Memory", 0xffffff64, 4, base=16, bitRange=0-3
+sfr = "MC_FCR.PAGEN", 	"Memory", 0xffffff64, 4, base=16, bitRange=8-17
+sfr = "MC_FCR.KEY", 	"Memory", 0xffffff64, 4, base=16, bitRange=24-31
+sfr = "MC_FSR", 	"Memory", 0xffffff68, 4, base=16
+sfr = "MC_FSR.FRDY", 	"Memory", 0xffffff68, 4, base=16, bitRange=0
+sfr = "MC_FSR.LOCKE", 	"Memory", 0xffffff68, 4, base=16, bitRange=2
+sfr = "MC_FSR.PROGE", 	"Memory", 0xffffff68, 4, base=16, bitRange=3
+sfr = "MC_FSR.SECURITY", 	"Memory", 0xffffff68, 4, base=16, bitRange=4
+sfr = "MC_FSR.GPNVM0", 	"Memory", 0xffffff68, 4, base=16, bitRange=8
+sfr = "MC_FSR.GPNVM1", 	"Memory", 0xffffff68, 4, base=16, bitRange=9
+sfr = "MC_FSR.GPNVM2", 	"Memory", 0xffffff68, 4, base=16, bitRange=10
+sfr = "MC_FSR.GPNVM3", 	"Memory", 0xffffff68, 4, base=16, bitRange=11
+sfr = "MC_FSR.GPNVM4", 	"Memory", 0xffffff68, 4, base=16, bitRange=12
+sfr = "MC_FSR.GPNVM5", 	"Memory", 0xffffff68, 4, base=16, bitRange=13
+sfr = "MC_FSR.GPNVM6", 	"Memory", 0xffffff68, 4, base=16, bitRange=14
+sfr = "MC_FSR.GPNVM7", 	"Memory", 0xffffff68, 4, base=16, bitRange=15
+sfr = "MC_FSR.LOCKS0", 	"Memory", 0xffffff68, 4, base=16, bitRange=16
+sfr = "MC_FSR.LOCKS1", 	"Memory", 0xffffff68, 4, base=16, bitRange=17
+sfr = "MC_FSR.LOCKS2", 	"Memory", 0xffffff68, 4, base=16, bitRange=18
+sfr = "MC_FSR.LOCKS3", 	"Memory", 0xffffff68, 4, base=16, bitRange=19
+sfr = "MC_FSR.LOCKS4", 	"Memory", 0xffffff68, 4, base=16, bitRange=20
+sfr = "MC_FSR.LOCKS5", 	"Memory", 0xffffff68, 4, base=16, bitRange=21
+sfr = "MC_FSR.LOCKS6", 	"Memory", 0xffffff68, 4, base=16, bitRange=22
+sfr = "MC_FSR.LOCKS7", 	"Memory", 0xffffff68, 4, base=16, bitRange=23
+sfr = "MC_FSR.LOCKS8", 	"Memory", 0xffffff68, 4, base=16, bitRange=24
+sfr = "MC_FSR.LOCKS9", 	"Memory", 0xffffff68, 4, base=16, bitRange=25
+sfr = "MC_FSR.LOCKS10", 	"Memory", 0xffffff68, 4, base=16, bitRange=26
+sfr = "MC_FSR.LOCKS11", 	"Memory", 0xffffff68, 4, base=16, bitRange=27
+sfr = "MC_FSR.LOCKS12", 	"Memory", 0xffffff68, 4, base=16, bitRange=28
+sfr = "MC_FSR.LOCKS13", 	"Memory", 0xffffff68, 4, base=16, bitRange=29
+sfr = "MC_FSR.LOCKS14", 	"Memory", 0xffffff68, 4, base=16, bitRange=30
+sfr = "MC_FSR.LOCKS15", 	"Memory", 0xffffff68, 4, base=16, bitRange=31
+; ========== Register definition for PDC_SPI1 peripheral ========== 
+sfr = "SPI1_RPR", 	"Memory", 0xfffe4100, 4, base=16
+sfr = "SPI1_RCR", 	"Memory", 0xfffe4104, 4, base=16
+sfr = "SPI1_TPR", 	"Memory", 0xfffe4108, 4, base=16
+sfr = "SPI1_TCR", 	"Memory", 0xfffe410c, 4, base=16
+sfr = "SPI1_RNPR", 	"Memory", 0xfffe4110, 4, base=16
+sfr = "SPI1_RNCR", 	"Memory", 0xfffe4114, 4, base=16
+sfr = "SPI1_TNPR", 	"Memory", 0xfffe4118, 4, base=16
+sfr = "SPI1_TNCR", 	"Memory", 0xfffe411c, 4, base=16
+sfr = "SPI1_PTCR", 	"Memory", 0xfffe4120, 4, base=16
+sfr = "SPI1_PTCR.RXTEN", 	"Memory", 0xfffe4120, 4, base=16, bitRange=0
+sfr = "SPI1_PTCR.RXTDIS", 	"Memory", 0xfffe4120, 4, base=16, bitRange=1
+sfr = "SPI1_PTCR.TXTEN", 	"Memory", 0xfffe4120, 4, base=16, bitRange=8
+sfr = "SPI1_PTCR.TXTDIS", 	"Memory", 0xfffe4120, 4, base=16, bitRange=9
+sfr = "SPI1_PTSR", 	"Memory", 0xfffe4124, 4, base=16
+sfr = "SPI1_PTSR.RXTEN", 	"Memory", 0xfffe4124, 4, base=16, bitRange=0
+sfr = "SPI1_PTSR.TXTEN", 	"Memory", 0xfffe4124, 4, base=16, bitRange=8
+; ========== Register definition for SPI1 peripheral ========== 
+sfr = "SPI1_CR", 	"Memory", 0xfffe4000, 4, base=16
+sfr = "SPI1_CR.SPIEN", 	"Memory", 0xfffe4000, 4, base=16, bitRange=0
+sfr = "SPI1_CR.SPIDIS", 	"Memory", 0xfffe4000, 4, base=16, bitRange=1
+sfr = "SPI1_CR.SWRST", 	"Memory", 0xfffe4000, 4, base=16, bitRange=7
+sfr = "SPI1_CR.LASTXFER", 	"Memory", 0xfffe4000, 4, base=16, bitRange=24
+sfr = "SPI1_MR", 	"Memory", 0xfffe4004, 4, base=16
+sfr = "SPI1_MR.MSTR", 	"Memory", 0xfffe4004, 4, base=16, bitRange=0
+sfr = "SPI1_MR.PS", 	"Memory", 0xfffe4004, 4, base=16, bitRange=1
+sfr = "SPI1_MR.PCSDEC", 	"Memory", 0xfffe4004, 4, base=16, bitRange=2
+sfr = "SPI1_MR.FDIV", 	"Memory", 0xfffe4004, 4, base=16, bitRange=3
+sfr = "SPI1_MR.MODFDIS", 	"Memory", 0xfffe4004, 4, base=16, bitRange=4
+sfr = "SPI1_MR.LLB", 	"Memory", 0xfffe4004, 4, base=16, bitRange=7
+sfr = "SPI1_MR.PCS", 	"Memory", 0xfffe4004, 4, base=16, bitRange=16-19
+sfr = "SPI1_MR.DLYBCS", 	"Memory", 0xfffe4004, 4, base=16, bitRange=24-31
+sfr = "SPI1_RDR", 	"Memory", 0xfffe4008, 4, base=16
+sfr = "SPI1_RDR.RD", 	"Memory", 0xfffe4008, 4, base=16, bitRange=0-15
+sfr = "SPI1_RDR.RPCS", 	"Memory", 0xfffe4008, 4, base=16, bitRange=16-19
+sfr = "SPI1_TDR", 	"Memory", 0xfffe400c, 4, base=16
+sfr = "SPI1_TDR.TD", 	"Memory", 0xfffe400c, 4, base=16, bitRange=0-15
+sfr = "SPI1_TDR.TPCS", 	"Memory", 0xfffe400c, 4, base=16, bitRange=16-19
+sfr = "SPI1_TDR.LASTXFER", 	"Memory", 0xfffe400c, 4, base=16, bitRange=24
+sfr = "SPI1_SR", 	"Memory", 0xfffe4010, 4, base=16
+sfr = "SPI1_SR.RDRF", 	"Memory", 0xfffe4010, 4, base=16, bitRange=0
+sfr = "SPI1_SR.TDRE", 	"Memory", 0xfffe4010, 4, base=16, bitRange=1
+sfr = "SPI1_SR.MODF", 	"Memory", 0xfffe4010, 4, base=16, bitRange=2
+sfr = "SPI1_SR.OVRES", 	"Memory", 0xfffe4010, 4, base=16, bitRange=3
+sfr = "SPI1_SR.ENDRX", 	"Memory", 0xfffe4010, 4, base=16, bitRange=4
+sfr = "SPI1_SR.ENDTX", 	"Memory", 0xfffe4010, 4, base=16, bitRange=5
+sfr = "SPI1_SR.RXBUFF", 	"Memory", 0xfffe4010, 4, base=16, bitRange=6
+sfr = "SPI1_SR.TXBUFE", 	"Memory", 0xfffe4010, 4, base=16, bitRange=7
+sfr = "SPI1_SR.NSSR", 	"Memory", 0xfffe4010, 4, base=16, bitRange=8
+sfr = "SPI1_SR.TXEMPTY", 	"Memory", 0xfffe4010, 4, base=16, bitRange=9
+sfr = "SPI1_SR.SPIENS", 	"Memory", 0xfffe4010, 4, base=16, bitRange=16
+sfr = "SPI1_IER", 	"Memory", 0xfffe4014, 4, base=16
+sfr = "SPI1_IER.RDRF", 	"Memory", 0xfffe4014, 4, base=16, bitRange=0
+sfr = "SPI1_IER.TDRE", 	"Memory", 0xfffe4014, 4, base=16, bitRange=1
+sfr = "SPI1_IER.MODF", 	"Memory", 0xfffe4014, 4, base=16, bitRange=2
+sfr = "SPI1_IER.OVRES", 	"Memory", 0xfffe4014, 4, base=16, bitRange=3
+sfr = "SPI1_IER.ENDRX", 	"Memory", 0xfffe4014, 4, base=16, bitRange=4
+sfr = "SPI1_IER.ENDTX", 	"Memory", 0xfffe4014, 4, base=16, bitRange=5
+sfr = "SPI1_IER.RXBUFF", 	"Memory", 0xfffe4014, 4, base=16, bitRange=6
+sfr = "SPI1_IER.TXBUFE", 	"Memory", 0xfffe4014, 4, base=16, bitRange=7
+sfr = "SPI1_IER.NSSR", 	"Memory", 0xfffe4014, 4, base=16, bitRange=8
+sfr = "SPI1_IER.TXEMPTY", 	"Memory", 0xfffe4014, 4, base=16, bitRange=9
+sfr = "SPI1_IDR", 	"Memory", 0xfffe4018, 4, base=16
+sfr = "SPI1_IDR.RDRF", 	"Memory", 0xfffe4018, 4, base=16, bitRange=0
+sfr = "SPI1_IDR.TDRE", 	"Memory", 0xfffe4018, 4, base=16, bitRange=1
+sfr = "SPI1_IDR.MODF", 	"Memory", 0xfffe4018, 4, base=16, bitRange=2
+sfr = "SPI1_IDR.OVRES", 	"Memory", 0xfffe4018, 4, base=16, bitRange=3
+sfr = "SPI1_IDR.ENDRX", 	"Memory", 0xfffe4018, 4, base=16, bitRange=4
+sfr = "SPI1_IDR.ENDTX", 	"Memory", 0xfffe4018, 4, base=16, bitRange=5
+sfr = "SPI1_IDR.RXBUFF", 	"Memory", 0xfffe4018, 4, base=16, bitRange=6
+sfr = "SPI1_IDR.TXBUFE", 	"Memory", 0xfffe4018, 4, base=16, bitRange=7
+sfr = "SPI1_IDR.NSSR", 	"Memory", 0xfffe4018, 4, base=16, bitRange=8
+sfr = "SPI1_IDR.TXEMPTY", 	"Memory", 0xfffe4018, 4, base=16, bitRange=9
+sfr = "SPI1_IMR", 	"Memory", 0xfffe401c, 4, base=16
+sfr = "SPI1_IMR.RDRF", 	"Memory", 0xfffe401c, 4, base=16, bitRange=0
+sfr = "SPI1_IMR.TDRE", 	"Memory", 0xfffe401c, 4, base=16, bitRange=1
+sfr = "SPI1_IMR.MODF", 	"Memory", 0xfffe401c, 4, base=16, bitRange=2
+sfr = "SPI1_IMR.OVRES", 	"Memory", 0xfffe401c, 4, base=16, bitRange=3
+sfr = "SPI1_IMR.ENDRX", 	"Memory", 0xfffe401c, 4, base=16, bitRange=4
+sfr = "SPI1_IMR.ENDTX", 	"Memory", 0xfffe401c, 4, base=16, bitRange=5
+sfr = "SPI1_IMR.RXBUFF", 	"Memory", 0xfffe401c, 4, base=16, bitRange=6
+sfr = "SPI1_IMR.TXBUFE", 	"Memory", 0xfffe401c, 4, base=16, bitRange=7
+sfr = "SPI1_IMR.NSSR", 	"Memory", 0xfffe401c, 4, base=16, bitRange=8
+sfr = "SPI1_IMR.TXEMPTY", 	"Memory", 0xfffe401c, 4, base=16, bitRange=9
+sfr = "SPI1_CSR", 	"Memory", 0xfffe4030, 4, base=16
+sfr = "SPI1_CSR.CPOL", 	"Memory", 0xfffe4030, 4, base=16, bitRange=0
+sfr = "SPI1_CSR.NCPHA", 	"Memory", 0xfffe4030, 4, base=16, bitRange=1
+sfr = "SPI1_CSR.CSAAT", 	"Memory", 0xfffe4030, 4, base=16, bitRange=3
+sfr = "SPI1_CSR.BITS", 	"Memory", 0xfffe4030, 4, base=16, bitRange=4-7
+sfr = "SPI1_CSR.SCBR", 	"Memory", 0xfffe4030, 4, base=16, bitRange=8-15
+sfr = "SPI1_CSR.DLYBS", 	"Memory", 0xfffe4030, 4, base=16, bitRange=16-23
+sfr = "SPI1_CSR.DLYBCT", 	"Memory", 0xfffe4030, 4, base=16, bitRange=24-31
+; ========== Register definition for PDC_SPI0 peripheral ========== 
+sfr = "SPI0_RPR", 	"Memory", 0xfffe0100, 4, base=16
+sfr = "SPI0_RCR", 	"Memory", 0xfffe0104, 4, base=16
+sfr = "SPI0_TPR", 	"Memory", 0xfffe0108, 4, base=16
+sfr = "SPI0_TCR", 	"Memory", 0xfffe010c, 4, base=16
+sfr = "SPI0_RNPR", 	"Memory", 0xfffe0110, 4, base=16
+sfr = "SPI0_RNCR", 	"Memory", 0xfffe0114, 4, base=16
+sfr = "SPI0_TNPR", 	"Memory", 0xfffe0118, 4, base=16
+sfr = "SPI0_TNCR", 	"Memory", 0xfffe011c, 4, base=16
+sfr = "SPI0_PTCR", 	"Memory", 0xfffe0120, 4, base=16
+sfr = "SPI0_PTCR.RXTEN", 	"Memory", 0xfffe0120, 4, base=16, bitRange=0
+sfr = "SPI0_PTCR.RXTDIS", 	"Memory", 0xfffe0120, 4, base=16, bitRange=1
+sfr = "SPI0_PTCR.TXTEN", 	"Memory", 0xfffe0120, 4, base=16, bitRange=8
+sfr = "SPI0_PTCR.TXTDIS", 	"Memory", 0xfffe0120, 4, base=16, bitRange=9
+sfr = "SPI0_PTSR", 	"Memory", 0xfffe0124, 4, base=16
+sfr = "SPI0_PTSR.RXTEN", 	"Memory", 0xfffe0124, 4, base=16, bitRange=0
+sfr = "SPI0_PTSR.TXTEN", 	"Memory", 0xfffe0124, 4, base=16, bitRange=8
+; ========== Register definition for SPI0 peripheral ========== 
+sfr = "SPI0_CR", 	"Memory", 0xfffe0000, 4, base=16
+sfr = "SPI0_CR.SPIEN", 	"Memory", 0xfffe0000, 4, base=16, bitRange=0
+sfr = "SPI0_CR.SPIDIS", 	"Memory", 0xfffe0000, 4, base=16, bitRange=1
+sfr = "SPI0_CR.SWRST", 	"Memory", 0xfffe0000, 4, base=16, bitRange=7
+sfr = "SPI0_CR.LASTXFER", 	"Memory", 0xfffe0000, 4, base=16, bitRange=24
+sfr = "SPI0_MR", 	"Memory", 0xfffe0004, 4, base=16
+sfr = "SPI0_MR.MSTR", 	"Memory", 0xfffe0004, 4, base=16, bitRange=0
+sfr = "SPI0_MR.PS", 	"Memory", 0xfffe0004, 4, base=16, bitRange=1
+sfr = "SPI0_MR.PCSDEC", 	"Memory", 0xfffe0004, 4, base=16, bitRange=2
+sfr = "SPI0_MR.FDIV", 	"Memory", 0xfffe0004, 4, base=16, bitRange=3
+sfr = "SPI0_MR.MODFDIS", 	"Memory", 0xfffe0004, 4, base=16, bitRange=4
+sfr = "SPI0_MR.LLB", 	"Memory", 0xfffe0004, 4, base=16, bitRange=7
+sfr = "SPI0_MR.PCS", 	"Memory", 0xfffe0004, 4, base=16, bitRange=16-19
+sfr = "SPI0_MR.DLYBCS", 	"Memory", 0xfffe0004, 4, base=16, bitRange=24-31
+sfr = "SPI0_RDR", 	"Memory", 0xfffe0008, 4, base=16
+sfr = "SPI0_RDR.RD", 	"Memory", 0xfffe0008, 4, base=16, bitRange=0-15
+sfr = "SPI0_RDR.RPCS", 	"Memory", 0xfffe0008, 4, base=16, bitRange=16-19
+sfr = "SPI0_TDR", 	"Memory", 0xfffe000c, 4, base=16
+sfr = "SPI0_TDR.TD", 	"Memory", 0xfffe000c, 4, base=16, bitRange=0-15
+sfr = "SPI0_TDR.TPCS", 	"Memory", 0xfffe000c, 4, base=16, bitRange=16-19
+sfr = "SPI0_TDR.LASTXFER", 	"Memory", 0xfffe000c, 4, base=16, bitRange=24
+sfr = "SPI0_SR", 	"Memory", 0xfffe0010, 4, base=16
+sfr = "SPI0_SR.RDRF", 	"Memory", 0xfffe0010, 4, base=16, bitRange=0
+sfr = "SPI0_SR.TDRE", 	"Memory", 0xfffe0010, 4, base=16, bitRange=1
+sfr = "SPI0_SR.MODF", 	"Memory", 0xfffe0010, 4, base=16, bitRange=2
+sfr = "SPI0_SR.OVRES", 	"Memory", 0xfffe0010, 4, base=16, bitRange=3
+sfr = "SPI0_SR.ENDRX", 	"Memory", 0xfffe0010, 4, base=16, bitRange=4
+sfr = "SPI0_SR.ENDTX", 	"Memory", 0xfffe0010, 4, base=16, bitRange=5
+sfr = "SPI0_SR.RXBUFF", 	"Memory", 0xfffe0010, 4, base=16, bitRange=6
+sfr = "SPI0_SR.TXBUFE", 	"Memory", 0xfffe0010, 4, base=16, bitRange=7
+sfr = "SPI0_SR.NSSR", 	"Memory", 0xfffe0010, 4, base=16, bitRange=8
+sfr = "SPI0_SR.TXEMPTY", 	"Memory", 0xfffe0010, 4, base=16, bitRange=9
+sfr = "SPI0_SR.SPIENS", 	"Memory", 0xfffe0010, 4, base=16, bitRange=16
+sfr = "SPI0_IER", 	"Memory", 0xfffe0014, 4, base=16
+sfr = "SPI0_IER.RDRF", 	"Memory", 0xfffe0014, 4, base=16, bitRange=0
+sfr = "SPI0_IER.TDRE", 	"Memory", 0xfffe0014, 4, base=16, bitRange=1
+sfr = "SPI0_IER.MODF", 	"Memory", 0xfffe0014, 4, base=16, bitRange=2
+sfr = "SPI0_IER.OVRES", 	"Memory", 0xfffe0014, 4, base=16, bitRange=3
+sfr = "SPI0_IER.ENDRX", 	"Memory", 0xfffe0014, 4, base=16, bitRange=4
+sfr = "SPI0_IER.ENDTX", 	"Memory", 0xfffe0014, 4, base=16, bitRange=5
+sfr = "SPI0_IER.RXBUFF", 	"Memory", 0xfffe0014, 4, base=16, bitRange=6
+sfr = "SPI0_IER.TXBUFE", 	"Memory", 0xfffe0014, 4, base=16, bitRange=7
+sfr = "SPI0_IER.NSSR", 	"Memory", 0xfffe0014, 4, base=16, bitRange=8
+sfr = "SPI0_IER.TXEMPTY", 	"Memory", 0xfffe0014, 4, base=16, bitRange=9
+sfr = "SPI0_IDR", 	"Memory", 0xfffe0018, 4, base=16
+sfr = "SPI0_IDR.RDRF", 	"Memory", 0xfffe0018, 4, base=16, bitRange=0
+sfr = "SPI0_IDR.TDRE", 	"Memory", 0xfffe0018, 4, base=16, bitRange=1
+sfr = "SPI0_IDR.MODF", 	"Memory", 0xfffe0018, 4, base=16, bitRange=2
+sfr = "SPI0_IDR.OVRES", 	"Memory", 0xfffe0018, 4, base=16, bitRange=3
+sfr = "SPI0_IDR.ENDRX", 	"Memory", 0xfffe0018, 4, base=16, bitRange=4
+sfr = "SPI0_IDR.ENDTX", 	"Memory", 0xfffe0018, 4, base=16, bitRange=5
+sfr = "SPI0_IDR.RXBUFF", 	"Memory", 0xfffe0018, 4, base=16, bitRange=6
+sfr = "SPI0_IDR.TXBUFE", 	"Memory", 0xfffe0018, 4, base=16, bitRange=7
+sfr = "SPI0_IDR.NSSR", 	"Memory", 0xfffe0018, 4, base=16, bitRange=8
+sfr = "SPI0_IDR.TXEMPTY", 	"Memory", 0xfffe0018, 4, base=16, bitRange=9
+sfr = "SPI0_IMR", 	"Memory", 0xfffe001c, 4, base=16
+sfr = "SPI0_IMR.RDRF", 	"Memory", 0xfffe001c, 4, base=16, bitRange=0
+sfr = "SPI0_IMR.TDRE", 	"Memory", 0xfffe001c, 4, base=16, bitRange=1
+sfr = "SPI0_IMR.MODF", 	"Memory", 0xfffe001c, 4, base=16, bitRange=2
+sfr = "SPI0_IMR.OVRES", 	"Memory", 0xfffe001c, 4, base=16, bitRange=3
+sfr = "SPI0_IMR.ENDRX", 	"Memory", 0xfffe001c, 4, base=16, bitRange=4
+sfr = "SPI0_IMR.ENDTX", 	"Memory", 0xfffe001c, 4, base=16, bitRange=5
+sfr = "SPI0_IMR.RXBUFF", 	"Memory", 0xfffe001c, 4, base=16, bitRange=6
+sfr = "SPI0_IMR.TXBUFE", 	"Memory", 0xfffe001c, 4, base=16, bitRange=7
+sfr = "SPI0_IMR.NSSR", 	"Memory", 0xfffe001c, 4, base=16, bitRange=8
+sfr = "SPI0_IMR.TXEMPTY", 	"Memory", 0xfffe001c, 4, base=16, bitRange=9
+sfr = "SPI0_CSR", 	"Memory", 0xfffe0030, 4, base=16
+sfr = "SPI0_CSR.CPOL", 	"Memory", 0xfffe0030, 4, base=16, bitRange=0
+sfr = "SPI0_CSR.NCPHA", 	"Memory", 0xfffe0030, 4, base=16, bitRange=1
+sfr = "SPI0_CSR.CSAAT", 	"Memory", 0xfffe0030, 4, base=16, bitRange=3
+sfr = "SPI0_CSR.BITS", 	"Memory", 0xfffe0030, 4, base=16, bitRange=4-7
+sfr = "SPI0_CSR.SCBR", 	"Memory", 0xfffe0030, 4, base=16, bitRange=8-15
+sfr = "SPI0_CSR.DLYBS", 	"Memory", 0xfffe0030, 4, base=16, bitRange=16-23
+sfr = "SPI0_CSR.DLYBCT", 	"Memory", 0xfffe0030, 4, base=16, bitRange=24-31
+; ========== Register definition for PDC_US1 peripheral ========== 
+sfr = "US1_RPR", 	"Memory", 0xfffc4100, 4, base=16
+sfr = "US1_RCR", 	"Memory", 0xfffc4104, 4, base=16
+sfr = "US1_TPR", 	"Memory", 0xfffc4108, 4, base=16
+sfr = "US1_TCR", 	"Memory", 0xfffc410c, 4, base=16
+sfr = "US1_RNPR", 	"Memory", 0xfffc4110, 4, base=16
+sfr = "US1_RNCR", 	"Memory", 0xfffc4114, 4, base=16
+sfr = "US1_TNPR", 	"Memory", 0xfffc4118, 4, base=16
+sfr = "US1_TNCR", 	"Memory", 0xfffc411c, 4, base=16
+sfr = "US1_PTCR", 	"Memory", 0xfffc4120, 4, base=16
+sfr = "US1_PTCR.RXTEN", 	"Memory", 0xfffc4120, 4, base=16, bitRange=0
+sfr = "US1_PTCR.RXTDIS", 	"Memory", 0xfffc4120, 4, base=16, bitRange=1
+sfr = "US1_PTCR.TXTEN", 	"Memory", 0xfffc4120, 4, base=16, bitRange=8
+sfr = "US1_PTCR.TXTDIS", 	"Memory", 0xfffc4120, 4, base=16, bitRange=9
+sfr = "US1_PTSR", 	"Memory", 0xfffc4124, 4, base=16
+sfr = "US1_PTSR.RXTEN", 	"Memory", 0xfffc4124, 4, base=16, bitRange=0
+sfr = "US1_PTSR.TXTEN", 	"Memory", 0xfffc4124, 4, base=16, bitRange=8
+; ========== Register definition for US1 peripheral ========== 
+sfr = "US1_CR", 	"Memory", 0xfffc4000, 4, base=16
+sfr = "US1_CR.RSTRX", 	"Memory", 0xfffc4000, 4, base=16, bitRange=2
+sfr = "US1_CR.RSTTX", 	"Memory", 0xfffc4000, 4, base=16, bitRange=3
+sfr = "US1_CR.RXEN", 	"Memory", 0xfffc4000, 4, base=16, bitRange=4
+sfr = "US1_CR.RXDIS", 	"Memory", 0xfffc4000, 4, base=16, bitRange=5
+sfr = "US1_CR.TXEN", 	"Memory", 0xfffc4000, 4, base=16, bitRange=6
+sfr = "US1_CR.TXDIS", 	"Memory", 0xfffc4000, 4, base=16, bitRange=7
+sfr = "US1_CR.RSTSTA", 	"Memory", 0xfffc4000, 4, base=16, bitRange=8
+sfr = "US1_CR.STTBRK", 	"Memory", 0xfffc4000, 4, base=16, bitRange=9
+sfr = "US1_CR.STPBRK", 	"Memory", 0xfffc4000, 4, base=16, bitRange=10
+sfr = "US1_CR.STTTO", 	"Memory", 0xfffc4000, 4, base=16, bitRange=11
+sfr = "US1_CR.SENDA", 	"Memory", 0xfffc4000, 4, base=16, bitRange=12
+sfr = "US1_CR.RSTIT", 	"Memory", 0xfffc4000, 4, base=16, bitRange=13
+sfr = "US1_CR.RSTNACK", 	"Memory", 0xfffc4000, 4, base=16, bitRange=14
+sfr = "US1_CR.RETTO", 	"Memory", 0xfffc4000, 4, base=16, bitRange=15
+sfr = "US1_CR.DTREN", 	"Memory", 0xfffc4000, 4, base=16, bitRange=16
+sfr = "US1_CR.DTRDIS", 	"Memory", 0xfffc4000, 4, base=16, bitRange=17
+sfr = "US1_CR.RTSEN", 	"Memory", 0xfffc4000, 4, base=16, bitRange=18
+sfr = "US1_CR.RTSDIS", 	"Memory", 0xfffc4000, 4, base=16, bitRange=19
+sfr = "US1_MR", 	"Memory", 0xfffc4004, 4, base=16
+sfr = "US1_MR.USMODE", 	"Memory", 0xfffc4004, 4, base=16, bitRange=0-3
+sfr = "US1_MR.CLKS", 	"Memory", 0xfffc4004, 4, base=16, bitRange=4-5
+sfr = "US1_MR.CHRL", 	"Memory", 0xfffc4004, 4, base=16, bitRange=6-7
+sfr = "US1_MR.SYNC", 	"Memory", 0xfffc4004, 4, base=16, bitRange=8
+sfr = "US1_MR.PAR", 	"Memory", 0xfffc4004, 4, base=16, bitRange=9-11
+sfr = "US1_MR.NBSTOP", 	"Memory", 0xfffc4004, 4, base=16, bitRange=12-13
+sfr = "US1_MR.CHMODE", 	"Memory", 0xfffc4004, 4, base=16, bitRange=14-15
+sfr = "US1_MR.MSBF", 	"Memory", 0xfffc4004, 4, base=16, bitRange=16
+sfr = "US1_MR.MODE9", 	"Memory", 0xfffc4004, 4, base=16, bitRange=17
+sfr = "US1_MR.CKLO", 	"Memory", 0xfffc4004, 4, base=16, bitRange=18
+sfr = "US1_MR.OVER", 	"Memory", 0xfffc4004, 4, base=16, bitRange=19
+sfr = "US1_MR.INACK", 	"Memory", 0xfffc4004, 4, base=16, bitRange=20
+sfr = "US1_MR.DSNACK", 	"Memory", 0xfffc4004, 4, base=16, bitRange=21
+sfr = "US1_MR.ITER", 	"Memory", 0xfffc4004, 4, base=16, bitRange=24
+sfr = "US1_MR.FILTER", 	"Memory", 0xfffc4004, 4, base=16, bitRange=28
+sfr = "US1_IER", 	"Memory", 0xfffc4008, 4, base=16
+sfr = "US1_IER.RXRDY", 	"Memory", 0xfffc4008, 4, base=16, bitRange=0
+sfr = "US1_IER.TXRDY", 	"Memory", 0xfffc4008, 4, base=16, bitRange=1
+sfr = "US1_IER.RXBRK", 	"Memory", 0xfffc4008, 4, base=16, bitRange=2
+sfr = "US1_IER.ENDRX", 	"Memory", 0xfffc4008, 4, base=16, bitRange=3
+sfr = "US1_IER.ENDTX", 	"Memory", 0xfffc4008, 4, base=16, bitRange=4
+sfr = "US1_IER.OVRE", 	"Memory", 0xfffc4008, 4, base=16, bitRange=5
+sfr = "US1_IER.FRAME", 	"Memory", 0xfffc4008, 4, base=16, bitRange=6
+sfr = "US1_IER.PARE", 	"Memory", 0xfffc4008, 4, base=16, bitRange=7
+sfr = "US1_IER.TIMEOUT", 	"Memory", 0xfffc4008, 4, base=16, bitRange=8
+sfr = "US1_IER.TXEMPTY", 	"Memory", 0xfffc4008, 4, base=16, bitRange=9
+sfr = "US1_IER.ITERATION", 	"Memory", 0xfffc4008, 4, base=16, bitRange=10
+sfr = "US1_IER.TXBUFE", 	"Memory", 0xfffc4008, 4, base=16, bitRange=11
+sfr = "US1_IER.RXBUFF", 	"Memory", 0xfffc4008, 4, base=16, bitRange=12
+sfr = "US1_IER.NACK", 	"Memory", 0xfffc4008, 4, base=16, bitRange=13
+sfr = "US1_IER.RIIC", 	"Memory", 0xfffc4008, 4, base=16, bitRange=16
+sfr = "US1_IER.DSRIC", 	"Memory", 0xfffc4008, 4, base=16, bitRange=17
+sfr = "US1_IER.DCDIC", 	"Memory", 0xfffc4008, 4, base=16, bitRange=18
+sfr = "US1_IER.CTSIC", 	"Memory", 0xfffc4008, 4, base=16, bitRange=19
+sfr = "US1_IDR", 	"Memory", 0xfffc400c, 4, base=16
+sfr = "US1_IDR.RXRDY", 	"Memory", 0xfffc400c, 4, base=16, bitRange=0
+sfr = "US1_IDR.TXRDY", 	"Memory", 0xfffc400c, 4, base=16, bitRange=1
+sfr = "US1_IDR.RXBRK", 	"Memory", 0xfffc400c, 4, base=16, bitRange=2
+sfr = "US1_IDR.ENDRX", 	"Memory", 0xfffc400c, 4, base=16, bitRange=3
+sfr = "US1_IDR.ENDTX", 	"Memory", 0xfffc400c, 4, base=16, bitRange=4
+sfr = "US1_IDR.OVRE", 	"Memory", 0xfffc400c, 4, base=16, bitRange=5
+sfr = "US1_IDR.FRAME", 	"Memory", 0xfffc400c, 4, base=16, bitRange=6
+sfr = "US1_IDR.PARE", 	"Memory", 0xfffc400c, 4, base=16, bitRange=7
+sfr = "US1_IDR.TIMEOUT", 	"Memory", 0xfffc400c, 4, base=16, bitRange=8
+sfr = "US1_IDR.TXEMPTY", 	"Memory", 0xfffc400c, 4, base=16, bitRange=9
+sfr = "US1_IDR.ITERATION", 	"Memory", 0xfffc400c, 4, base=16, bitRange=10
+sfr = "US1_IDR.TXBUFE", 	"Memory", 0xfffc400c, 4, base=16, bitRange=11
+sfr = "US1_IDR.RXBUFF", 	"Memory", 0xfffc400c, 4, base=16, bitRange=12
+sfr = "US1_IDR.NACK", 	"Memory", 0xfffc400c, 4, base=16, bitRange=13
+sfr = "US1_IDR.RIIC", 	"Memory", 0xfffc400c, 4, base=16, bitRange=16
+sfr = "US1_IDR.DSRIC", 	"Memory", 0xfffc400c, 4, base=16, bitRange=17
+sfr = "US1_IDR.DCDIC", 	"Memory", 0xfffc400c, 4, base=16, bitRange=18
+sfr = "US1_IDR.CTSIC", 	"Memory", 0xfffc400c, 4, base=16, bitRange=19
+sfr = "US1_IMR", 	"Memory", 0xfffc4010, 4, base=16
+sfr = "US1_IMR.RXRDY", 	"Memory", 0xfffc4010, 4, base=16, bitRange=0
+sfr = "US1_IMR.TXRDY", 	"Memory", 0xfffc4010, 4, base=16, bitRange=1
+sfr = "US1_IMR.RXBRK", 	"Memory", 0xfffc4010, 4, base=16, bitRange=2
+sfr = "US1_IMR.ENDRX", 	"Memory", 0xfffc4010, 4, base=16, bitRange=3
+sfr = "US1_IMR.ENDTX", 	"Memory", 0xfffc4010, 4, base=16, bitRange=4
+sfr = "US1_IMR.OVRE", 	"Memory", 0xfffc4010, 4, base=16, bitRange=5
+sfr = "US1_IMR.FRAME", 	"Memory", 0xfffc4010, 4, base=16, bitRange=6
+sfr = "US1_IMR.PARE", 	"Memory", 0xfffc4010, 4, base=16, bitRange=7
+sfr = "US1_IMR.TIMEOUT", 	"Memory", 0xfffc4010, 4, base=16, bitRange=8
+sfr = "US1_IMR.TXEMPTY", 	"Memory", 0xfffc4010, 4, base=16, bitRange=9
+sfr = "US1_IMR.ITERATION", 	"Memory", 0xfffc4010, 4, base=16, bitRange=10
+sfr = "US1_IMR.TXBUFE", 	"Memory", 0xfffc4010, 4, base=16, bitRange=11
+sfr = "US1_IMR.RXBUFF", 	"Memory", 0xfffc4010, 4, base=16, bitRange=12
+sfr = "US1_IMR.NACK", 	"Memory", 0xfffc4010, 4, base=16, bitRange=13
+sfr = "US1_IMR.RIIC", 	"Memory", 0xfffc4010, 4, base=16, bitRange=16
+sfr = "US1_IMR.DSRIC", 	"Memory", 0xfffc4010, 4, base=16, bitRange=17
+sfr = "US1_IMR.DCDIC", 	"Memory", 0xfffc4010, 4, base=16, bitRange=18
+sfr = "US1_IMR.CTSIC", 	"Memory", 0xfffc4010, 4, base=16, bitRange=19
+sfr = "US1_CSR", 	"Memory", 0xfffc4014, 4, base=16
+sfr = "US1_CSR.RXRDY", 	"Memory", 0xfffc4014, 4, base=16, bitRange=0
+sfr = "US1_CSR.TXRDY", 	"Memory", 0xfffc4014, 4, base=16, bitRange=1
+sfr = "US1_CSR.RXBRK", 	"Memory", 0xfffc4014, 4, base=16, bitRange=2
+sfr = "US1_CSR.ENDRX", 	"Memory", 0xfffc4014, 4, base=16, bitRange=3
+sfr = "US1_CSR.ENDTX", 	"Memory", 0xfffc4014, 4, base=16, bitRange=4
+sfr = "US1_CSR.OVRE", 	"Memory", 0xfffc4014, 4, base=16, bitRange=5
+sfr = "US1_CSR.FRAME", 	"Memory", 0xfffc4014, 4, base=16, bitRange=6
+sfr = "US1_CSR.PARE", 	"Memory", 0xfffc4014, 4, base=16, bitRange=7
+sfr = "US1_CSR.TIMEOUT", 	"Memory", 0xfffc4014, 4, base=16, bitRange=8
+sfr = "US1_CSR.TXEMPTY", 	"Memory", 0xfffc4014, 4, base=16, bitRange=9
+sfr = "US1_CSR.ITERATION", 	"Memory", 0xfffc4014, 4, base=16, bitRange=10
+sfr = "US1_CSR.TXBUFE", 	"Memory", 0xfffc4014, 4, base=16, bitRange=11
+sfr = "US1_CSR.RXBUFF", 	"Memory", 0xfffc4014, 4, base=16, bitRange=12
+sfr = "US1_CSR.NACK", 	"Memory", 0xfffc4014, 4, base=16, bitRange=13
+sfr = "US1_CSR.RIIC", 	"Memory", 0xfffc4014, 4, base=16, bitRange=16
+sfr = "US1_CSR.DSRIC", 	"Memory", 0xfffc4014, 4, base=16, bitRange=17
+sfr = "US1_CSR.DCDIC", 	"Memory", 0xfffc4014, 4, base=16, bitRange=18
+sfr = "US1_CSR.CTSIC", 	"Memory", 0xfffc4014, 4, base=16, bitRange=19
+sfr = "US1_CSR.RI", 	"Memory", 0xfffc4014, 4, base=16, bitRange=20
+sfr = "US1_CSR.DSR", 	"Memory", 0xfffc4014, 4, base=16, bitRange=21
+sfr = "US1_CSR.DCD", 	"Memory", 0xfffc4014, 4, base=16, bitRange=22
+sfr = "US1_CSR.CTS", 	"Memory", 0xfffc4014, 4, base=16, bitRange=23
+sfr = "US1_RHR", 	"Memory", 0xfffc4018, 4, base=16
+sfr = "US1_THR", 	"Memory", 0xfffc401c, 4, base=16
+sfr = "US1_BRGR", 	"Memory", 0xfffc4020, 4, base=16
+sfr = "US1_RTOR", 	"Memory", 0xfffc4024, 4, base=16
+sfr = "US1_TTGR", 	"Memory", 0xfffc4028, 4, base=16
+sfr = "US1_FIDI", 	"Memory", 0xfffc4040, 4, base=16
+sfr = "US1_NER", 	"Memory", 0xfffc4044, 4, base=16
+sfr = "US1_IF", 	"Memory", 0xfffc404c, 4, base=16
+; ========== Register definition for PDC_US0 peripheral ========== 
+sfr = "US0_RPR", 	"Memory", 0xfffc0100, 4, base=16
+sfr = "US0_RCR", 	"Memory", 0xfffc0104, 4, base=16
+sfr = "US0_TPR", 	"Memory", 0xfffc0108, 4, base=16
+sfr = "US0_TCR", 	"Memory", 0xfffc010c, 4, base=16
+sfr = "US0_RNPR", 	"Memory", 0xfffc0110, 4, base=16
+sfr = "US0_RNCR", 	"Memory", 0xfffc0114, 4, base=16
+sfr = "US0_TNPR", 	"Memory", 0xfffc0118, 4, base=16
+sfr = "US0_TNCR", 	"Memory", 0xfffc011c, 4, base=16
+sfr = "US0_PTCR", 	"Memory", 0xfffc0120, 4, base=16
+sfr = "US0_PTCR.RXTEN", 	"Memory", 0xfffc0120, 4, base=16, bitRange=0
+sfr = "US0_PTCR.RXTDIS", 	"Memory", 0xfffc0120, 4, base=16, bitRange=1
+sfr = "US0_PTCR.TXTEN", 	"Memory", 0xfffc0120, 4, base=16, bitRange=8
+sfr = "US0_PTCR.TXTDIS", 	"Memory", 0xfffc0120, 4, base=16, bitRange=9
+sfr = "US0_PTSR", 	"Memory", 0xfffc0124, 4, base=16
+sfr = "US0_PTSR.RXTEN", 	"Memory", 0xfffc0124, 4, base=16, bitRange=0
+sfr = "US0_PTSR.TXTEN", 	"Memory", 0xfffc0124, 4, base=16, bitRange=8
+; ========== Register definition for US0 peripheral ========== 
+sfr = "US0_CR", 	"Memory", 0xfffc0000, 4, base=16
+sfr = "US0_CR.RSTRX", 	"Memory", 0xfffc0000, 4, base=16, bitRange=2
+sfr = "US0_CR.RSTTX", 	"Memory", 0xfffc0000, 4, base=16, bitRange=3
+sfr = "US0_CR.RXEN", 	"Memory", 0xfffc0000, 4, base=16, bitRange=4
+sfr = "US0_CR.RXDIS", 	"Memory", 0xfffc0000, 4, base=16, bitRange=5
+sfr = "US0_CR.TXEN", 	"Memory", 0xfffc0000, 4, base=16, bitRange=6
+sfr = "US0_CR.TXDIS", 	"Memory", 0xfffc0000, 4, base=16, bitRange=7
+sfr = "US0_CR.RSTSTA", 	"Memory", 0xfffc0000, 4, base=16, bitRange=8
+sfr = "US0_CR.STTBRK", 	"Memory", 0xfffc0000, 4, base=16, bitRange=9
+sfr = "US0_CR.STPBRK", 	"Memory", 0xfffc0000, 4, base=16, bitRange=10
+sfr = "US0_CR.STTTO", 	"Memory", 0xfffc0000, 4, base=16, bitRange=11
+sfr = "US0_CR.SENDA", 	"Memory", 0xfffc0000, 4, base=16, bitRange=12
+sfr = "US0_CR.RSTIT", 	"Memory", 0xfffc0000, 4, base=16, bitRange=13
+sfr = "US0_CR.RSTNACK", 	"Memory", 0xfffc0000, 4, base=16, bitRange=14
+sfr = "US0_CR.RETTO", 	"Memory", 0xfffc0000, 4, base=16, bitRange=15
+sfr = "US0_CR.DTREN", 	"Memory", 0xfffc0000, 4, base=16, bitRange=16
+sfr = "US0_CR.DTRDIS", 	"Memory", 0xfffc0000, 4, base=16, bitRange=17
+sfr = "US0_CR.RTSEN", 	"Memory", 0xfffc0000, 4, base=16, bitRange=18
+sfr = "US0_CR.RTSDIS", 	"Memory", 0xfffc0000, 4, base=16, bitRange=19
+sfr = "US0_MR", 	"Memory", 0xfffc0004, 4, base=16
+sfr = "US0_MR.USMODE", 	"Memory", 0xfffc0004, 4, base=16, bitRange=0-3
+sfr = "US0_MR.CLKS", 	"Memory", 0xfffc0004, 4, base=16, bitRange=4-5
+sfr = "US0_MR.CHRL", 	"Memory", 0xfffc0004, 4, base=16, bitRange=6-7
+sfr = "US0_MR.SYNC", 	"Memory", 0xfffc0004, 4, base=16, bitRange=8
+sfr = "US0_MR.PAR", 	"Memory", 0xfffc0004, 4, base=16, bitRange=9-11
+sfr = "US0_MR.NBSTOP", 	"Memory", 0xfffc0004, 4, base=16, bitRange=12-13
+sfr = "US0_MR.CHMODE", 	"Memory", 0xfffc0004, 4, base=16, bitRange=14-15
+sfr = "US0_MR.MSBF", 	"Memory", 0xfffc0004, 4, base=16, bitRange=16
+sfr = "US0_MR.MODE9", 	"Memory", 0xfffc0004, 4, base=16, bitRange=17
+sfr = "US0_MR.CKLO", 	"Memory", 0xfffc0004, 4, base=16, bitRange=18
+sfr = "US0_MR.OVER", 	"Memory", 0xfffc0004, 4, base=16, bitRange=19
+sfr = "US0_MR.INACK", 	"Memory", 0xfffc0004, 4, base=16, bitRange=20
+sfr = "US0_MR.DSNACK", 	"Memory", 0xfffc0004, 4, base=16, bitRange=21
+sfr = "US0_MR.ITER", 	"Memory", 0xfffc0004, 4, base=16, bitRange=24
+sfr = "US0_MR.FILTER", 	"Memory", 0xfffc0004, 4, base=16, bitRange=28
+sfr = "US0_IER", 	"Memory", 0xfffc0008, 4, base=16
+sfr = "US0_IER.RXRDY", 	"Memory", 0xfffc0008, 4, base=16, bitRange=0
+sfr = "US0_IER.TXRDY", 	"Memory", 0xfffc0008, 4, base=16, bitRange=1
+sfr = "US0_IER.RXBRK", 	"Memory", 0xfffc0008, 4, base=16, bitRange=2
+sfr = "US0_IER.ENDRX", 	"Memory", 0xfffc0008, 4, base=16, bitRange=3
+sfr = "US0_IER.ENDTX", 	"Memory", 0xfffc0008, 4, base=16, bitRange=4
+sfr = "US0_IER.OVRE", 	"Memory", 0xfffc0008, 4, base=16, bitRange=5
+sfr = "US0_IER.FRAME", 	"Memory", 0xfffc0008, 4, base=16, bitRange=6
+sfr = "US0_IER.PARE", 	"Memory", 0xfffc0008, 4, base=16, bitRange=7
+sfr = "US0_IER.TIMEOUT", 	"Memory", 0xfffc0008, 4, base=16, bitRange=8
+sfr = "US0_IER.TXEMPTY", 	"Memory", 0xfffc0008, 4, base=16, bitRange=9
+sfr = "US0_IER.ITERATION", 	"Memory", 0xfffc0008, 4, base=16, bitRange=10
+sfr = "US0_IER.TXBUFE", 	"Memory", 0xfffc0008, 4, base=16, bitRange=11
+sfr = "US0_IER.RXBUFF", 	"Memory", 0xfffc0008, 4, base=16, bitRange=12
+sfr = "US0_IER.NACK", 	"Memory", 0xfffc0008, 4, base=16, bitRange=13
+sfr = "US0_IER.RIIC", 	"Memory", 0xfffc0008, 4, base=16, bitRange=16
+sfr = "US0_IER.DSRIC", 	"Memory", 0xfffc0008, 4, base=16, bitRange=17
+sfr = "US0_IER.DCDIC", 	"Memory", 0xfffc0008, 4, base=16, bitRange=18
+sfr = "US0_IER.CTSIC", 	"Memory", 0xfffc0008, 4, base=16, bitRange=19
+sfr = "US0_IDR", 	"Memory", 0xfffc000c, 4, base=16
+sfr = "US0_IDR.RXRDY", 	"Memory", 0xfffc000c, 4, base=16, bitRange=0
+sfr = "US0_IDR.TXRDY", 	"Memory", 0xfffc000c, 4, base=16, bitRange=1
+sfr = "US0_IDR.RXBRK", 	"Memory", 0xfffc000c, 4, base=16, bitRange=2
+sfr = "US0_IDR.ENDRX", 	"Memory", 0xfffc000c, 4, base=16, bitRange=3
+sfr = "US0_IDR.ENDTX", 	"Memory", 0xfffc000c, 4, base=16, bitRange=4
+sfr = "US0_IDR.OVRE", 	"Memory", 0xfffc000c, 4, base=16, bitRange=5
+sfr = "US0_IDR.FRAME", 	"Memory", 0xfffc000c, 4, base=16, bitRange=6
+sfr = "US0_IDR.PARE", 	"Memory", 0xfffc000c, 4, base=16, bitRange=7
+sfr = "US0_IDR.TIMEOUT", 	"Memory", 0xfffc000c, 4, base=16, bitRange=8
+sfr = "US0_IDR.TXEMPTY", 	"Memory", 0xfffc000c, 4, base=16, bitRange=9
+sfr = "US0_IDR.ITERATION", 	"Memory", 0xfffc000c, 4, base=16, bitRange=10
+sfr = "US0_IDR.TXBUFE", 	"Memory", 0xfffc000c, 4, base=16, bitRange=11
+sfr = "US0_IDR.RXBUFF", 	"Memory", 0xfffc000c, 4, base=16, bitRange=12
+sfr = "US0_IDR.NACK", 	"Memory", 0xfffc000c, 4, base=16, bitRange=13
+sfr = "US0_IDR.RIIC", 	"Memory", 0xfffc000c, 4, base=16, bitRange=16
+sfr = "US0_IDR.DSRIC", 	"Memory", 0xfffc000c, 4, base=16, bitRange=17
+sfr = "US0_IDR.DCDIC", 	"Memory", 0xfffc000c, 4, base=16, bitRange=18
+sfr = "US0_IDR.CTSIC", 	"Memory", 0xfffc000c, 4, base=16, bitRange=19
+sfr = "US0_IMR", 	"Memory", 0xfffc0010, 4, base=16
+sfr = "US0_IMR.RXRDY", 	"Memory", 0xfffc0010, 4, base=16, bitRange=0
+sfr = "US0_IMR.TXRDY", 	"Memory", 0xfffc0010, 4, base=16, bitRange=1
+sfr = "US0_IMR.RXBRK", 	"Memory", 0xfffc0010, 4, base=16, bitRange=2
+sfr = "US0_IMR.ENDRX", 	"Memory", 0xfffc0010, 4, base=16, bitRange=3
+sfr = "US0_IMR.ENDTX", 	"Memory", 0xfffc0010, 4, base=16, bitRange=4
+sfr = "US0_IMR.OVRE", 	"Memory", 0xfffc0010, 4, base=16, bitRange=5
+sfr = "US0_IMR.FRAME", 	"Memory", 0xfffc0010, 4, base=16, bitRange=6
+sfr = "US0_IMR.PARE", 	"Memory", 0xfffc0010, 4, base=16, bitRange=7
+sfr = "US0_IMR.TIMEOUT", 	"Memory", 0xfffc0010, 4, base=16, bitRange=8
+sfr = "US0_IMR.TXEMPTY", 	"Memory", 0xfffc0010, 4, base=16, bitRange=9
+sfr = "US0_IMR.ITERATION", 	"Memory", 0xfffc0010, 4, base=16, bitRange=10
+sfr = "US0_IMR.TXBUFE", 	"Memory", 0xfffc0010, 4, base=16, bitRange=11
+sfr = "US0_IMR.RXBUFF", 	"Memory", 0xfffc0010, 4, base=16, bitRange=12
+sfr = "US0_IMR.NACK", 	"Memory", 0xfffc0010, 4, base=16, bitRange=13
+sfr = "US0_IMR.RIIC", 	"Memory", 0xfffc0010, 4, base=16, bitRange=16
+sfr = "US0_IMR.DSRIC", 	"Memory", 0xfffc0010, 4, base=16, bitRange=17
+sfr = "US0_IMR.DCDIC", 	"Memory", 0xfffc0010, 4, base=16, bitRange=18
+sfr = "US0_IMR.CTSIC", 	"Memory", 0xfffc0010, 4, base=16, bitRange=19
+sfr = "US0_CSR", 	"Memory", 0xfffc0014, 4, base=16
+sfr = "US0_CSR.RXRDY", 	"Memory", 0xfffc0014, 4, base=16, bitRange=0
+sfr = "US0_CSR.TXRDY", 	"Memory", 0xfffc0014, 4, base=16, bitRange=1
+sfr = "US0_CSR.RXBRK", 	"Memory", 0xfffc0014, 4, base=16, bitRange=2
+sfr = "US0_CSR.ENDRX", 	"Memory", 0xfffc0014, 4, base=16, bitRange=3
+sfr = "US0_CSR.ENDTX", 	"Memory", 0xfffc0014, 4, base=16, bitRange=4
+sfr = "US0_CSR.OVRE", 	"Memory", 0xfffc0014, 4, base=16, bitRange=5
+sfr = "US0_CSR.FRAME", 	"Memory", 0xfffc0014, 4, base=16, bitRange=6
+sfr = "US0_CSR.PARE", 	"Memory", 0xfffc0014, 4, base=16, bitRange=7
+sfr = "US0_CSR.TIMEOUT", 	"Memory", 0xfffc0014, 4, base=16, bitRange=8
+sfr = "US0_CSR.TXEMPTY", 	"Memory", 0xfffc0014, 4, base=16, bitRange=9
+sfr = "US0_CSR.ITERATION", 	"Memory", 0xfffc0014, 4, base=16, bitRange=10
+sfr = "US0_CSR.TXBUFE", 	"Memory", 0xfffc0014, 4, base=16, bitRange=11
+sfr = "US0_CSR.RXBUFF", 	"Memory", 0xfffc0014, 4, base=16, bitRange=12
+sfr = "US0_CSR.NACK", 	"Memory", 0xfffc0014, 4, base=16, bitRange=13
+sfr = "US0_CSR.RIIC", 	"Memory", 0xfffc0014, 4, base=16, bitRange=16
+sfr = "US0_CSR.DSRIC", 	"Memory", 0xfffc0014, 4, base=16, bitRange=17
+sfr = "US0_CSR.DCDIC", 	"Memory", 0xfffc0014, 4, base=16, bitRange=18
+sfr = "US0_CSR.CTSIC", 	"Memory", 0xfffc0014, 4, base=16, bitRange=19
+sfr = "US0_CSR.RI", 	"Memory", 0xfffc0014, 4, base=16, bitRange=20
+sfr = "US0_CSR.DSR", 	"Memory", 0xfffc0014, 4, base=16, bitRange=21
+sfr = "US0_CSR.DCD", 	"Memory", 0xfffc0014, 4, base=16, bitRange=22
+sfr = "US0_CSR.CTS", 	"Memory", 0xfffc0014, 4, base=16, bitRange=23
+sfr = "US0_RHR", 	"Memory", 0xfffc0018, 4, base=16
+sfr = "US0_THR", 	"Memory", 0xfffc001c, 4, base=16
+sfr = "US0_BRGR", 	"Memory", 0xfffc0020, 4, base=16
+sfr = "US0_RTOR", 	"Memory", 0xfffc0024, 4, base=16
+sfr = "US0_TTGR", 	"Memory", 0xfffc0028, 4, base=16
+sfr = "US0_FIDI", 	"Memory", 0xfffc0040, 4, base=16
+sfr = "US0_NER", 	"Memory", 0xfffc0044, 4, base=16
+sfr = "US0_IF", 	"Memory", 0xfffc004c, 4, base=16
+; ========== Register definition for PDC_SSC peripheral ========== 
+sfr = "SSC_RPR", 	"Memory", 0xfffd4100, 4, base=16
+sfr = "SSC_RCR", 	"Memory", 0xfffd4104, 4, base=16
+sfr = "SSC_TPR", 	"Memory", 0xfffd4108, 4, base=16
+sfr = "SSC_TCR", 	"Memory", 0xfffd410c, 4, base=16
+sfr = "SSC_RNPR", 	"Memory", 0xfffd4110, 4, base=16
+sfr = "SSC_RNCR", 	"Memory", 0xfffd4114, 4, base=16
+sfr = "SSC_TNPR", 	"Memory", 0xfffd4118, 4, base=16
+sfr = "SSC_TNCR", 	"Memory", 0xfffd411c, 4, base=16
+sfr = "SSC_PTCR", 	"Memory", 0xfffd4120, 4, base=16
+sfr = "SSC_PTCR.RXTEN", 	"Memory", 0xfffd4120, 4, base=16, bitRange=0
+sfr = "SSC_PTCR.RXTDIS", 	"Memory", 0xfffd4120, 4, base=16, bitRange=1
+sfr = "SSC_PTCR.TXTEN", 	"Memory", 0xfffd4120, 4, base=16, bitRange=8
+sfr = "SSC_PTCR.TXTDIS", 	"Memory", 0xfffd4120, 4, base=16, bitRange=9
+sfr = "SSC_PTSR", 	"Memory", 0xfffd4124, 4, base=16
+sfr = "SSC_PTSR.RXTEN", 	"Memory", 0xfffd4124, 4, base=16, bitRange=0
+sfr = "SSC_PTSR.TXTEN", 	"Memory", 0xfffd4124, 4, base=16, bitRange=8
+; ========== Register definition for SSC peripheral ========== 
+sfr = "SSC_CR", 	"Memory", 0xfffd4000, 4, base=16
+sfr = "SSC_CR.RXEN", 	"Memory", 0xfffd4000, 4, base=16, bitRange=0
+sfr = "SSC_CR.RXDIS", 	"Memory", 0xfffd4000, 4, base=16, bitRange=1
+sfr = "SSC_CR.TXEN", 	"Memory", 0xfffd4000, 4, base=16, bitRange=8
+sfr = "SSC_CR.TXDIS", 	"Memory", 0xfffd4000, 4, base=16, bitRange=9
+sfr = "SSC_CR.SWRST", 	"Memory", 0xfffd4000, 4, base=16, bitRange=15
+sfr = "SSC_CMR", 	"Memory", 0xfffd4004, 4, base=16
+sfr = "SSC_RCMR", 	"Memory", 0xfffd4010, 4, base=16
+sfr = "SSC_RCMR.CKS", 	"Memory", 0xfffd4010, 4, base=16, bitRange=0-1
+sfr = "SSC_RCMR.CKO", 	"Memory", 0xfffd4010, 4, base=16, bitRange=2-4
+sfr = "SSC_RCMR.CKI", 	"Memory", 0xfffd4010, 4, base=16, bitRange=5
+sfr = "SSC_RCMR.CKG", 	"Memory", 0xfffd4010, 4, base=16, bitRange=6-7
+sfr = "SSC_RCMR.START", 	"Memory", 0xfffd4010, 4, base=16, bitRange=8-11
+sfr = "SSC_RCMR.STOP", 	"Memory", 0xfffd4010, 4, base=16, bitRange=12
+sfr = "SSC_RCMR.STTDLY", 	"Memory", 0xfffd4010, 4, base=16, bitRange=16-23
+sfr = "SSC_RCMR.PERIOD", 	"Memory", 0xfffd4010, 4, base=16, bitRange=24-31
+sfr = "SSC_RFMR", 	"Memory", 0xfffd4014, 4, base=16
+sfr = "SSC_RFMR.DATLEN", 	"Memory", 0xfffd4014, 4, base=16, bitRange=0-4
+sfr = "SSC_RFMR.LOOP", 	"Memory", 0xfffd4014, 4, base=16, bitRange=5
+sfr = "SSC_RFMR.MSBF", 	"Memory", 0xfffd4014, 4, base=16, bitRange=7
+sfr = "SSC_RFMR.DATNB", 	"Memory", 0xfffd4014, 4, base=16, bitRange=8-11
+sfr = "SSC_RFMR.FSLEN", 	"Memory", 0xfffd4014, 4, base=16, bitRange=16-19
+sfr = "SSC_RFMR.FSOS", 	"Memory", 0xfffd4014, 4, base=16, bitRange=20-22
+sfr = "SSC_RFMR.FSEDGE", 	"Memory", 0xfffd4014, 4, base=16, bitRange=24
+sfr = "SSC_TCMR", 	"Memory", 0xfffd4018, 4, base=16
+sfr = "SSC_TCMR.CKS", 	"Memory", 0xfffd4018, 4, base=16, bitRange=0-1
+sfr = "SSC_TCMR.CKO", 	"Memory", 0xfffd4018, 4, base=16, bitRange=2-4
+sfr = "SSC_TCMR.CKI", 	"Memory", 0xfffd4018, 4, base=16, bitRange=5
+sfr = "SSC_TCMR.CKG", 	"Memory", 0xfffd4018, 4, base=16, bitRange=6-7
+sfr = "SSC_TCMR.START", 	"Memory", 0xfffd4018, 4, base=16, bitRange=8-11
+sfr = "SSC_TCMR.STTDLY", 	"Memory", 0xfffd4018, 4, base=16, bitRange=16-23
+sfr = "SSC_TCMR.PERIOD", 	"Memory", 0xfffd4018, 4, base=16, bitRange=24-31
+sfr = "SSC_TFMR", 	"Memory", 0xfffd401c, 4, base=16
+sfr = "SSC_TFMR.DATLEN", 	"Memory", 0xfffd401c, 4, base=16, bitRange=0-4
+sfr = "SSC_TFMR.DATDEF", 	"Memory", 0xfffd401c, 4, base=16, bitRange=5
+sfr = "SSC_TFMR.MSBF", 	"Memory", 0xfffd401c, 4, base=16, bitRange=7
+sfr = "SSC_TFMR.DATNB", 	"Memory", 0xfffd401c, 4, base=16, bitRange=8-11
+sfr = "SSC_TFMR.FSLEN", 	"Memory", 0xfffd401c, 4, base=16, bitRange=16-19
+sfr = "SSC_TFMR.FSOS", 	"Memory", 0xfffd401c, 4, base=16, bitRange=20-22
+sfr = "SSC_TFMR.FSDEN", 	"Memory", 0xfffd401c, 4, base=16, bitRange=23
+sfr = "SSC_TFMR.FSEDGE", 	"Memory", 0xfffd401c, 4, base=16, bitRange=24
+sfr = "SSC_RHR", 	"Memory", 0xfffd4020, 4, base=16
+sfr = "SSC_THR", 	"Memory", 0xfffd4024, 4, base=16
+sfr = "SSC_RSHR", 	"Memory", 0xfffd4030, 4, base=16
+sfr = "SSC_TSHR", 	"Memory", 0xfffd4034, 4, base=16
+sfr = "SSC_SR", 	"Memory", 0xfffd4040, 4, base=16
+sfr = "SSC_SR.TXRDY", 	"Memory", 0xfffd4040, 4, base=16, bitRange=0
+sfr = "SSC_SR.TXEMPTY", 	"Memory", 0xfffd4040, 4, base=16, bitRange=1
+sfr = "SSC_SR.ENDTX", 	"Memory", 0xfffd4040, 4, base=16, bitRange=2
+sfr = "SSC_SR.TXBUFE", 	"Memory", 0xfffd4040, 4, base=16, bitRange=3
+sfr = "SSC_SR.RXRDY", 	"Memory", 0xfffd4040, 4, base=16, bitRange=4
+sfr = "SSC_SR.OVRUN", 	"Memory", 0xfffd4040, 4, base=16, bitRange=5
+sfr = "SSC_SR.ENDRX", 	"Memory", 0xfffd4040, 4, base=16, bitRange=6
+sfr = "SSC_SR.RXBUFF", 	"Memory", 0xfffd4040, 4, base=16, bitRange=7
+sfr = "SSC_SR.CP0", 	"Memory", 0xfffd4040, 4, base=16, bitRange=8
+sfr = "SSC_SR.CP1", 	"Memory", 0xfffd4040, 4, base=16, bitRange=9
+sfr = "SSC_SR.TXSYN", 	"Memory", 0xfffd4040, 4, base=16, bitRange=10
+sfr = "SSC_SR.RXSYN", 	"Memory", 0xfffd4040, 4, base=16, bitRange=11
+sfr = "SSC_SR.TXENA", 	"Memory", 0xfffd4040, 4, base=16, bitRange=16
+sfr = "SSC_SR.RXENA", 	"Memory", 0xfffd4040, 4, base=16, bitRange=17
+sfr = "SSC_IER", 	"Memory", 0xfffd4044, 4, base=16
+sfr = "SSC_IER.TXRDY", 	"Memory", 0xfffd4044, 4, base=16, bitRange=0
+sfr = "SSC_IER.TXEMPTY", 	"Memory", 0xfffd4044, 4, base=16, bitRange=1
+sfr = "SSC_IER.ENDTX", 	"Memory", 0xfffd4044, 4, base=16, bitRange=2
+sfr = "SSC_IER.TXBUFE", 	"Memory", 0xfffd4044, 4, base=16, bitRange=3
+sfr = "SSC_IER.RXRDY", 	"Memory", 0xfffd4044, 4, base=16, bitRange=4
+sfr = "SSC_IER.OVRUN", 	"Memory", 0xfffd4044, 4, base=16, bitRange=5
+sfr = "SSC_IER.ENDRX", 	"Memory", 0xfffd4044, 4, base=16, bitRange=6
+sfr = "SSC_IER.RXBUFF", 	"Memory", 0xfffd4044, 4, base=16, bitRange=7
+sfr = "SSC_IER.CP0", 	"Memory", 0xfffd4044, 4, base=16, bitRange=8
+sfr = "SSC_IER.CP1", 	"Memory", 0xfffd4044, 4, base=16, bitRange=9
+sfr = "SSC_IER.TXSYN", 	"Memory", 0xfffd4044, 4, base=16, bitRange=10
+sfr = "SSC_IER.RXSYN", 	"Memory", 0xfffd4044, 4, base=16, bitRange=11
+sfr = "SSC_IDR", 	"Memory", 0xfffd4048, 4, base=16
+sfr = "SSC_IDR.TXRDY", 	"Memory", 0xfffd4048, 4, base=16, bitRange=0
+sfr = "SSC_IDR.TXEMPTY", 	"Memory", 0xfffd4048, 4, base=16, bitRange=1
+sfr = "SSC_IDR.ENDTX", 	"Memory", 0xfffd4048, 4, base=16, bitRange=2
+sfr = "SSC_IDR.TXBUFE", 	"Memory", 0xfffd4048, 4, base=16, bitRange=3
+sfr = "SSC_IDR.RXRDY", 	"Memory", 0xfffd4048, 4, base=16, bitRange=4
+sfr = "SSC_IDR.OVRUN", 	"Memory", 0xfffd4048, 4, base=16, bitRange=5
+sfr = "SSC_IDR.ENDRX", 	"Memory", 0xfffd4048, 4, base=16, bitRange=6
+sfr = "SSC_IDR.RXBUFF", 	"Memory", 0xfffd4048, 4, base=16, bitRange=7
+sfr = "SSC_IDR.CP0", 	"Memory", 0xfffd4048, 4, base=16, bitRange=8
+sfr = "SSC_IDR.CP1", 	"Memory", 0xfffd4048, 4, base=16, bitRange=9
+sfr = "SSC_IDR.TXSYN", 	"Memory", 0xfffd4048, 4, base=16, bitRange=10
+sfr = "SSC_IDR.RXSYN", 	"Memory", 0xfffd4048, 4, base=16, bitRange=11
+sfr = "SSC_IMR", 	"Memory", 0xfffd404c, 4, base=16
+sfr = "SSC_IMR.TXRDY", 	"Memory", 0xfffd404c, 4, base=16, bitRange=0
+sfr = "SSC_IMR.TXEMPTY", 	"Memory", 0xfffd404c, 4, base=16, bitRange=1
+sfr = "SSC_IMR.ENDTX", 	"Memory", 0xfffd404c, 4, base=16, bitRange=2
+sfr = "SSC_IMR.TXBUFE", 	"Memory", 0xfffd404c, 4, base=16, bitRange=3
+sfr = "SSC_IMR.RXRDY", 	"Memory", 0xfffd404c, 4, base=16, bitRange=4
+sfr = "SSC_IMR.OVRUN", 	"Memory", 0xfffd404c, 4, base=16, bitRange=5
+sfr = "SSC_IMR.ENDRX", 	"Memory", 0xfffd404c, 4, base=16, bitRange=6
+sfr = "SSC_IMR.RXBUFF", 	"Memory", 0xfffd404c, 4, base=16, bitRange=7
+sfr = "SSC_IMR.CP0", 	"Memory", 0xfffd404c, 4, base=16, bitRange=8
+sfr = "SSC_IMR.CP1", 	"Memory", 0xfffd404c, 4, base=16, bitRange=9
+sfr = "SSC_IMR.TXSYN", 	"Memory", 0xfffd404c, 4, base=16, bitRange=10
+sfr = "SSC_IMR.RXSYN", 	"Memory", 0xfffd404c, 4, base=16, bitRange=11
+; ========== Register definition for TWI peripheral ========== 
+sfr = "TWI_CR", 	"Memory", 0xfffb8000, 4, base=16
+sfr = "TWI_CR.START", 	"Memory", 0xfffb8000, 4, base=16, bitRange=0
+sfr = "TWI_CR.STOP", 	"Memory", 0xfffb8000, 4, base=16, bitRange=1
+sfr = "TWI_CR.MSEN", 	"Memory", 0xfffb8000, 4, base=16, bitRange=2
+sfr = "TWI_CR.MSDIS", 	"Memory", 0xfffb8000, 4, base=16, bitRange=3
+sfr = "TWI_CR.SWRST", 	"Memory", 0xfffb8000, 4, base=16, bitRange=7
+sfr = "TWI_MMR", 	"Memory", 0xfffb8004, 4, base=16
+sfr = "TWI_MMR.IADRSZ", 	"Memory", 0xfffb8004, 4, base=16, bitRange=8-9
+sfr = "TWI_MMR.MREAD", 	"Memory", 0xfffb8004, 4, base=16, bitRange=12
+sfr = "TWI_MMR.DADR", 	"Memory", 0xfffb8004, 4, base=16, bitRange=16-22
+sfr = "TWI_IADR", 	"Memory", 0xfffb800c, 4, base=16
+sfr = "TWI_CWGR", 	"Memory", 0xfffb8010, 4, base=16
+sfr = "TWI_CWGR.CLDIV", 	"Memory", 0xfffb8010, 4, base=16, bitRange=0-7
+sfr = "TWI_CWGR.CHDIV", 	"Memory", 0xfffb8010, 4, base=16, bitRange=8-15
+sfr = "TWI_CWGR.CKDIV", 	"Memory", 0xfffb8010, 4, base=16, bitRange=16-18
+sfr = "TWI_SR", 	"Memory", 0xfffb8020, 4, base=16
+sfr = "TWI_SR.TXCOMP", 	"Memory", 0xfffb8020, 4, base=16, bitRange=0
+sfr = "TWI_SR.RXRDY", 	"Memory", 0xfffb8020, 4, base=16, bitRange=1
+sfr = "TWI_SR.TXRDY", 	"Memory", 0xfffb8020, 4, base=16, bitRange=2
+sfr = "TWI_SR.OVRE", 	"Memory", 0xfffb8020, 4, base=16, bitRange=6
+sfr = "TWI_SR.UNRE", 	"Memory", 0xfffb8020, 4, base=16, bitRange=7
+sfr = "TWI_SR.NACK", 	"Memory", 0xfffb8020, 4, base=16, bitRange=8
+sfr = "TWI_IER", 	"Memory", 0xfffb8024, 4, base=16
+sfr = "TWI_IER.TXCOMP", 	"Memory", 0xfffb8024, 4, base=16, bitRange=0
+sfr = "TWI_IER.RXRDY", 	"Memory", 0xfffb8024, 4, base=16, bitRange=1
+sfr = "TWI_IER.TXRDY", 	"Memory", 0xfffb8024, 4, base=16, bitRange=2
+sfr = "TWI_IER.OVRE", 	"Memory", 0xfffb8024, 4, base=16, bitRange=6
+sfr = "TWI_IER.UNRE", 	"Memory", 0xfffb8024, 4, base=16, bitRange=7
+sfr = "TWI_IER.NACK", 	"Memory", 0xfffb8024, 4, base=16, bitRange=8
+sfr = "TWI_IDR", 	"Memory", 0xfffb8028, 4, base=16
+sfr = "TWI_IDR.TXCOMP", 	"Memory", 0xfffb8028, 4, base=16, bitRange=0
+sfr = "TWI_IDR.RXRDY", 	"Memory", 0xfffb8028, 4, base=16, bitRange=1
+sfr = "TWI_IDR.TXRDY", 	"Memory", 0xfffb8028, 4, base=16, bitRange=2
+sfr = "TWI_IDR.OVRE", 	"Memory", 0xfffb8028, 4, base=16, bitRange=6
+sfr = "TWI_IDR.UNRE", 	"Memory", 0xfffb8028, 4, base=16, bitRange=7
+sfr = "TWI_IDR.NACK", 	"Memory", 0xfffb8028, 4, base=16, bitRange=8
+sfr = "TWI_IMR", 	"Memory", 0xfffb802c, 4, base=16
+sfr = "TWI_IMR.TXCOMP", 	"Memory", 0xfffb802c, 4, base=16, bitRange=0
+sfr = "TWI_IMR.RXRDY", 	"Memory", 0xfffb802c, 4, base=16, bitRange=1
+sfr = "TWI_IMR.TXRDY", 	"Memory", 0xfffb802c, 4, base=16, bitRange=2
+sfr = "TWI_IMR.OVRE", 	"Memory", 0xfffb802c, 4, base=16, bitRange=6
+sfr = "TWI_IMR.UNRE", 	"Memory", 0xfffb802c, 4, base=16, bitRange=7
+sfr = "TWI_IMR.NACK", 	"Memory", 0xfffb802c, 4, base=16, bitRange=8
+sfr = "TWI_RHR", 	"Memory", 0xfffb8030, 4, base=16
+sfr = "TWI_THR", 	"Memory", 0xfffb8034, 4, base=16
+; ========== Register definition for PWMC_CH3 peripheral ========== 
+sfr = "PWMC_CH3_CMR", 	"Memory", 0xfffcc260, 4, base=16
+sfr = "PWMC_CH3_CMR.CPRE", 	"Memory", 0xfffcc260, 4, base=16, bitRange=0-3
+sfr = "PWMC_CH3_CMR.CALG", 	"Memory", 0xfffcc260, 4, base=16, bitRange=8
+sfr = "PWMC_CH3_CMR.CPOL", 	"Memory", 0xfffcc260, 4, base=16, bitRange=9
+sfr = "PWMC_CH3_CMR.CPD", 	"Memory", 0xfffcc260, 4, base=16, bitRange=10
+sfr = "PWMC_CH3_CDTYR", 	"Memory", 0xfffcc264, 4, base=16
+sfr = "PWMC_CH3_CDTYR.CDTY", 	"Memory", 0xfffcc264, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH3_CPRDR", 	"Memory", 0xfffcc268, 4, base=16
+sfr = "PWMC_CH3_CPRDR.CPRD", 	"Memory", 0xfffcc268, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH3_CCNTR", 	"Memory", 0xfffcc26c, 4, base=16
+sfr = "PWMC_CH3_CCNTR.CCNT", 	"Memory", 0xfffcc26c, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH3_CUPDR", 	"Memory", 0xfffcc270, 4, base=16
+sfr = "PWMC_CH3_CUPDR.CUPD", 	"Memory", 0xfffcc270, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH3_Reserved", 	"Memory", 0xfffcc274, 4, base=16
+; ========== Register definition for PWMC_CH2 peripheral ========== 
+sfr = "PWMC_CH2_CMR", 	"Memory", 0xfffcc240, 4, base=16
+sfr = "PWMC_CH2_CMR.CPRE", 	"Memory", 0xfffcc240, 4, base=16, bitRange=0-3
+sfr = "PWMC_CH2_CMR.CALG", 	"Memory", 0xfffcc240, 4, base=16, bitRange=8
+sfr = "PWMC_CH2_CMR.CPOL", 	"Memory", 0xfffcc240, 4, base=16, bitRange=9
+sfr = "PWMC_CH2_CMR.CPD", 	"Memory", 0xfffcc240, 4, base=16, bitRange=10
+sfr = "PWMC_CH2_CDTYR", 	"Memory", 0xfffcc244, 4, base=16
+sfr = "PWMC_CH2_CDTYR.CDTY", 	"Memory", 0xfffcc244, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH2_CPRDR", 	"Memory", 0xfffcc248, 4, base=16
+sfr = "PWMC_CH2_CPRDR.CPRD", 	"Memory", 0xfffcc248, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH2_CCNTR", 	"Memory", 0xfffcc24c, 4, base=16
+sfr = "PWMC_CH2_CCNTR.CCNT", 	"Memory", 0xfffcc24c, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH2_CUPDR", 	"Memory", 0xfffcc250, 4, base=16
+sfr = "PWMC_CH2_CUPDR.CUPD", 	"Memory", 0xfffcc250, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH2_Reserved", 	"Memory", 0xfffcc254, 4, base=16
+; ========== Register definition for PWMC_CH1 peripheral ========== 
+sfr = "PWMC_CH1_CMR", 	"Memory", 0xfffcc220, 4, base=16
+sfr = "PWMC_CH1_CMR.CPRE", 	"Memory", 0xfffcc220, 4, base=16, bitRange=0-3
+sfr = "PWMC_CH1_CMR.CALG", 	"Memory", 0xfffcc220, 4, base=16, bitRange=8
+sfr = "PWMC_CH1_CMR.CPOL", 	"Memory", 0xfffcc220, 4, base=16, bitRange=9
+sfr = "PWMC_CH1_CMR.CPD", 	"Memory", 0xfffcc220, 4, base=16, bitRange=10
+sfr = "PWMC_CH1_CDTYR", 	"Memory", 0xfffcc224, 4, base=16
+sfr = "PWMC_CH1_CDTYR.CDTY", 	"Memory", 0xfffcc224, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH1_CPRDR", 	"Memory", 0xfffcc228, 4, base=16
+sfr = "PWMC_CH1_CPRDR.CPRD", 	"Memory", 0xfffcc228, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH1_CCNTR", 	"Memory", 0xfffcc22c, 4, base=16
+sfr = "PWMC_CH1_CCNTR.CCNT", 	"Memory", 0xfffcc22c, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH1_CUPDR", 	"Memory", 0xfffcc230, 4, base=16
+sfr = "PWMC_CH1_CUPDR.CUPD", 	"Memory", 0xfffcc230, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH1_Reserved", 	"Memory", 0xfffcc234, 4, base=16
+; ========== Register definition for PWMC_CH0 peripheral ========== 
+sfr = "PWMC_CH0_CMR", 	"Memory", 0xfffcc200, 4, base=16
+sfr = "PWMC_CH0_CMR.CPRE", 	"Memory", 0xfffcc200, 4, base=16, bitRange=0-3
+sfr = "PWMC_CH0_CMR.CALG", 	"Memory", 0xfffcc200, 4, base=16, bitRange=8
+sfr = "PWMC_CH0_CMR.CPOL", 	"Memory", 0xfffcc200, 4, base=16, bitRange=9
+sfr = "PWMC_CH0_CMR.CPD", 	"Memory", 0xfffcc200, 4, base=16, bitRange=10
+sfr = "PWMC_CH0_CDTYR", 	"Memory", 0xfffcc204, 4, base=16
+sfr = "PWMC_CH0_CDTYR.CDTY", 	"Memory", 0xfffcc204, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH0_CPRDR", 	"Memory", 0xfffcc208, 4, base=16
+sfr = "PWMC_CH0_CPRDR.CPRD", 	"Memory", 0xfffcc208, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH0_CCNTR", 	"Memory", 0xfffcc20c, 4, base=16
+sfr = "PWMC_CH0_CCNTR.CCNT", 	"Memory", 0xfffcc20c, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH0_CUPDR", 	"Memory", 0xfffcc210, 4, base=16
+sfr = "PWMC_CH0_CUPDR.CUPD", 	"Memory", 0xfffcc210, 4, base=16, bitRange=0-31
+sfr = "PWMC_CH0_Reserved", 	"Memory", 0xfffcc214, 4, base=16
+; ========== Register definition for PWMC peripheral ========== 
+sfr = "PWMC_MR", 	"Memory", 0xfffcc000, 4, base=16
+sfr = "PWMC_MR.DIVA", 	"Memory", 0xfffcc000, 4, base=16, bitRange=0-7
+sfr = "PWMC_MR.PREA", 	"Memory", 0xfffcc000, 4, base=16, bitRange=8-11
+sfr = "PWMC_MR.DIVB", 	"Memory", 0xfffcc000, 4, base=16, bitRange=16-23
+sfr = "PWMC_MR.PREB", 	"Memory", 0xfffcc000, 4, base=16, bitRange=24-27
+sfr = "PWMC_ENA", 	"Memory", 0xfffcc004, 4, base=16
+sfr = "PWMC_ENA.CHID0", 	"Memory", 0xfffcc004, 4, base=16, bitRange=0
+sfr = "PWMC_ENA.CHID1", 	"Memory", 0xfffcc004, 4, base=16, bitRange=1
+sfr = "PWMC_ENA.CHID2", 	"Memory", 0xfffcc004, 4, base=16, bitRange=2
+sfr = "PWMC_ENA.CHID3", 	"Memory", 0xfffcc004, 4, base=16, bitRange=3
+sfr = "PWMC_DIS", 	"Memory", 0xfffcc008, 4, base=16
+sfr = "PWMC_DIS.CHID0", 	"Memory", 0xfffcc008, 4, base=16, bitRange=0
+sfr = "PWMC_DIS.CHID1", 	"Memory", 0xfffcc008, 4, base=16, bitRange=1
+sfr = "PWMC_DIS.CHID2", 	"Memory", 0xfffcc008, 4, base=16, bitRange=2
+sfr = "PWMC_DIS.CHID3", 	"Memory", 0xfffcc008, 4, base=16, bitRange=3
+sfr = "PWMC_SR", 	"Memory", 0xfffcc00c, 4, base=16
+sfr = "PWMC_SR.CHID0", 	"Memory", 0xfffcc00c, 4, base=16, bitRange=0
+sfr = "PWMC_SR.CHID1", 	"Memory", 0xfffcc00c, 4, base=16, bitRange=1
+sfr = "PWMC_SR.CHID2", 	"Memory", 0xfffcc00c, 4, base=16, bitRange=2
+sfr = "PWMC_SR.CHID3", 	"Memory", 0xfffcc00c, 4, base=16, bitRange=3
+sfr = "PWMC_IER", 	"Memory", 0xfffcc010, 4, base=16
+sfr = "PWMC_IER.CHID0", 	"Memory", 0xfffcc010, 4, base=16, bitRange=0
+sfr = "PWMC_IER.CHID1", 	"Memory", 0xfffcc010, 4, base=16, bitRange=1
+sfr = "PWMC_IER.CHID2", 	"Memory", 0xfffcc010, 4, base=16, bitRange=2
+sfr = "PWMC_IER.CHID3", 	"Memory", 0xfffcc010, 4, base=16, bitRange=3
+sfr = "PWMC_IDR", 	"Memory", 0xfffcc014, 4, base=16
+sfr = "PWMC_IDR.CHID0", 	"Memory", 0xfffcc014, 4, base=16, bitRange=0
+sfr = "PWMC_IDR.CHID1", 	"Memory", 0xfffcc014, 4, base=16, bitRange=1
+sfr = "PWMC_IDR.CHID2", 	"Memory", 0xfffcc014, 4, base=16, bitRange=2
+sfr = "PWMC_IDR.CHID3", 	"Memory", 0xfffcc014, 4, base=16, bitRange=3
+sfr = "PWMC_IMR", 	"Memory", 0xfffcc018, 4, base=16
+sfr = "PWMC_IMR.CHID0", 	"Memory", 0xfffcc018, 4, base=16, bitRange=0
+sfr = "PWMC_IMR.CHID1", 	"Memory", 0xfffcc018, 4, base=16, bitRange=1
+sfr = "PWMC_IMR.CHID2", 	"Memory", 0xfffcc018, 4, base=16, bitRange=2
+sfr = "PWMC_IMR.CHID3", 	"Memory", 0xfffcc018, 4, base=16, bitRange=3
+sfr = "PWMC_ISR", 	"Memory", 0xfffcc01c, 4, base=16
+sfr = "PWMC_ISR.CHID0", 	"Memory", 0xfffcc01c, 4, base=16, bitRange=0
+sfr = "PWMC_ISR.CHID1", 	"Memory", 0xfffcc01c, 4, base=16, bitRange=1
+sfr = "PWMC_ISR.CHID2", 	"Memory", 0xfffcc01c, 4, base=16, bitRange=2
+sfr = "PWMC_ISR.CHID3", 	"Memory", 0xfffcc01c, 4, base=16, bitRange=3
+sfr = "PWMC_VR", 	"Memory", 0xfffcc0fc, 4, base=16
+; ========== Register definition for UDP peripheral ========== 
+sfr = "UDP_NUM", 	"Memory", 0xfffb0000, 4, base=16
+sfr = "UDP_NUM.NUM", 	"Memory", 0xfffb0000, 4, base=16, bitRange=0-10
+sfr = "UDP_NUM.ERR", 	"Memory", 0xfffb0000, 4, base=16, bitRange=16
+sfr = "UDP_NUM.OK", 	"Memory", 0xfffb0000, 4, base=16, bitRange=17
+sfr = "UDP_GLBSTATE", 	"Memory", 0xfffb0004, 4, base=16
+sfr = "UDP_GLBSTATE.FADDEN", 	"Memory", 0xfffb0004, 4, base=16, bitRange=0
+sfr = "UDP_GLBSTATE.CONFG", 	"Memory", 0xfffb0004, 4, base=16, bitRange=1
+sfr = "UDP_GLBSTATE.ESR", 	"Memory", 0xfffb0004, 4, base=16, bitRange=2
+sfr = "UDP_GLBSTATE.RSMINPR", 	"Memory", 0xfffb0004, 4, base=16, bitRange=3
+sfr = "UDP_GLBSTATE.RMWUPE", 	"Memory", 0xfffb0004, 4, base=16, bitRange=4
+sfr = "UDP_FADDR", 	"Memory", 0xfffb0008, 4, base=16
+sfr = "UDP_FADDR.FADD", 	"Memory", 0xfffb0008, 4, base=16, bitRange=0-7
+sfr = "UDP_FADDR.FEN", 	"Memory", 0xfffb0008, 4, base=16, bitRange=8
+sfr = "UDP_IER", 	"Memory", 0xfffb0010, 4, base=16
+sfr = "UDP_IER.EPINT0", 	"Memory", 0xfffb0010, 4, base=16, bitRange=0
+sfr = "UDP_IER.EPINT1", 	"Memory", 0xfffb0010, 4, base=16, bitRange=1
+sfr = "UDP_IER.EPINT2", 	"Memory", 0xfffb0010, 4, base=16, bitRange=2
+sfr = "UDP_IER.EPINT3", 	"Memory", 0xfffb0010, 4, base=16, bitRange=3
+sfr = "UDP_IER.EPINT4", 	"Memory", 0xfffb0010, 4, base=16, bitRange=4
+sfr = "UDP_IER.EPINT5", 	"Memory", 0xfffb0010, 4, base=16, bitRange=5
+sfr = "UDP_IER.RXSUSP", 	"Memory", 0xfffb0010, 4, base=16, bitRange=8
+sfr = "UDP_IER.RXRSM", 	"Memory", 0xfffb0010, 4, base=16, bitRange=9
+sfr = "UDP_IER.EXTRSM", 	"Memory", 0xfffb0010, 4, base=16, bitRange=10
+sfr = "UDP_IER.SOFINT", 	"Memory", 0xfffb0010, 4, base=16, bitRange=11
+sfr = "UDP_IER.WAKEUP", 	"Memory", 0xfffb0010, 4, base=16, bitRange=13
+sfr = "UDP_IDR", 	"Memory", 0xfffb0014, 4, base=16
+sfr = "UDP_IDR.EPINT0", 	"Memory", 0xfffb0014, 4, base=16, bitRange=0
+sfr = "UDP_IDR.EPINT1", 	"Memory", 0xfffb0014, 4, base=16, bitRange=1
+sfr = "UDP_IDR.EPINT2", 	"Memory", 0xfffb0014, 4, base=16, bitRange=2
+sfr = "UDP_IDR.EPINT3", 	"Memory", 0xfffb0014, 4, base=16, bitRange=3
+sfr = "UDP_IDR.EPINT4", 	"Memory", 0xfffb0014, 4, base=16, bitRange=4
+sfr = "UDP_IDR.EPINT5", 	"Memory", 0xfffb0014, 4, base=16, bitRange=5
+sfr = "UDP_IDR.RXSUSP", 	"Memory", 0xfffb0014, 4, base=16, bitRange=8
+sfr = "UDP_IDR.RXRSM", 	"Memory", 0xfffb0014, 4, base=16, bitRange=9
+sfr = "UDP_IDR.EXTRSM", 	"Memory", 0xfffb0014, 4, base=16, bitRange=10
+sfr = "UDP_IDR.SOFINT", 	"Memory", 0xfffb0014, 4, base=16, bitRange=11
+sfr = "UDP_IDR.WAKEUP", 	"Memory", 0xfffb0014, 4, base=16, bitRange=13
+sfr = "UDP_IMR", 	"Memory", 0xfffb0018, 4, base=16
+sfr = "UDP_IMR.EPINT0", 	"Memory", 0xfffb0018, 4, base=16, bitRange=0
+sfr = "UDP_IMR.EPINT1", 	"Memory", 0xfffb0018, 4, base=16, bitRange=1
+sfr = "UDP_IMR.EPINT2", 	"Memory", 0xfffb0018, 4, base=16, bitRange=2
+sfr = "UDP_IMR.EPINT3", 	"Memory", 0xfffb0018, 4, base=16, bitRange=3
+sfr = "UDP_IMR.EPINT4", 	"Memory", 0xfffb0018, 4, base=16, bitRange=4
+sfr = "UDP_IMR.EPINT5", 	"Memory", 0xfffb0018, 4, base=16, bitRange=5
+sfr = "UDP_IMR.RXSUSP", 	"Memory", 0xfffb0018, 4, base=16, bitRange=8
+sfr = "UDP_IMR.RXRSM", 	"Memory", 0xfffb0018, 4, base=16, bitRange=9
+sfr = "UDP_IMR.EXTRSM", 	"Memory", 0xfffb0018, 4, base=16, bitRange=10
+sfr = "UDP_IMR.SOFINT", 	"Memory", 0xfffb0018, 4, base=16, bitRange=11
+sfr = "UDP_IMR.WAKEUP", 	"Memory", 0xfffb0018, 4, base=16, bitRange=13
+sfr = "UDP_ISR", 	"Memory", 0xfffb001c, 4, base=16
+sfr = "UDP_ISR.EPINT0", 	"Memory", 0xfffb001c, 4, base=16, bitRange=0
+sfr = "UDP_ISR.EPINT1", 	"Memory", 0xfffb001c, 4, base=16, bitRange=1
+sfr = "UDP_ISR.EPINT2", 	"Memory", 0xfffb001c, 4, base=16, bitRange=2
+sfr = "UDP_ISR.EPINT3", 	"Memory", 0xfffb001c, 4, base=16, bitRange=3
+sfr = "UDP_ISR.EPINT4", 	"Memory", 0xfffb001c, 4, base=16, bitRange=4
+sfr = "UDP_ISR.EPINT5", 	"Memory", 0xfffb001c, 4, base=16, bitRange=5
+sfr = "UDP_ISR.RXSUSP", 	"Memory", 0xfffb001c, 4, base=16, bitRange=8
+sfr = "UDP_ISR.RXRSM", 	"Memory", 0xfffb001c, 4, base=16, bitRange=9
+sfr = "UDP_ISR.EXTRSM", 	"Memory", 0xfffb001c, 4, base=16, bitRange=10
+sfr = "UDP_ISR.SOFINT", 	"Memory", 0xfffb001c, 4, base=16, bitRange=11
+sfr = "UDP_ISR.ENDBUSRES", 	"Memory", 0xfffb001c, 4, base=16, bitRange=12
+sfr = "UDP_ISR.WAKEUP", 	"Memory", 0xfffb001c, 4, base=16, bitRange=13
+sfr = "UDP_ICR", 	"Memory", 0xfffb0020, 4, base=16
+sfr = "UDP_ICR.EPINT0", 	"Memory", 0xfffb0020, 4, base=16, bitRange=0
+sfr = "UDP_ICR.EPINT1", 	"Memory", 0xfffb0020, 4, base=16, bitRange=1
+sfr = "UDP_ICR.EPINT2", 	"Memory", 0xfffb0020, 4, base=16, bitRange=2
+sfr = "UDP_ICR.EPINT3", 	"Memory", 0xfffb0020, 4, base=16, bitRange=3
+sfr = "UDP_ICR.EPINT4", 	"Memory", 0xfffb0020, 4, base=16, bitRange=4
+sfr = "UDP_ICR.EPINT5", 	"Memory", 0xfffb0020, 4, base=16, bitRange=5
+sfr = "UDP_ICR.RXSUSP", 	"Memory", 0xfffb0020, 4, base=16, bitRange=8
+sfr = "UDP_ICR.RXRSM", 	"Memory", 0xfffb0020, 4, base=16, bitRange=9
+sfr = "UDP_ICR.EXTRSM", 	"Memory", 0xfffb0020, 4, base=16, bitRange=10
+sfr = "UDP_ICR.SOFINT", 	"Memory", 0xfffb0020, 4, base=16, bitRange=11
+sfr = "UDP_ICR.WAKEUP", 	"Memory", 0xfffb0020, 4, base=16, bitRange=13
+sfr = "UDP_RSTEP", 	"Memory", 0xfffb0028, 4, base=16
+sfr = "UDP_RSTEP.EP0", 	"Memory", 0xfffb0028, 4, base=16, bitRange=0
+sfr = "UDP_RSTEP.EP1", 	"Memory", 0xfffb0028, 4, base=16, bitRange=1
+sfr = "UDP_RSTEP.EP2", 	"Memory", 0xfffb0028, 4, base=16, bitRange=2
+sfr = "UDP_RSTEP.EP3", 	"Memory", 0xfffb0028, 4, base=16, bitRange=3
+sfr = "UDP_RSTEP.EP4", 	"Memory", 0xfffb0028, 4, base=16, bitRange=4
+sfr = "UDP_RSTEP.EP5", 	"Memory", 0xfffb0028, 4, base=16, bitRange=5
+sfr = "UDP_CSR", 	"Memory", 0xfffb0030, 4, base=16
+sfr = "UDP_CSR.TXCOMP", 	"Memory", 0xfffb0030, 4, base=16, bitRange=0
+sfr = "UDP_CSR.BK0", 	"Memory", 0xfffb0030, 4, base=16, bitRange=1
+sfr = "UDP_CSR.RXSETUP", 	"Memory", 0xfffb0030, 4, base=16, bitRange=2
+sfr = "UDP_CSR.ISOERROR", 	"Memory", 0xfffb0030, 4, base=16, bitRange=3
+sfr = "UDP_CSR.TXPKTRDY", 	"Memory", 0xfffb0030, 4, base=16, bitRange=4
+sfr = "UDP_CSR.FORCESTALL", 	"Memory", 0xfffb0030, 4, base=16, bitRange=5
+sfr = "UDP_CSR.BK1", 	"Memory", 0xfffb0030, 4, base=16, bitRange=6
+sfr = "UDP_CSR.DIR", 	"Memory", 0xfffb0030, 4, base=16, bitRange=7
+sfr = "UDP_CSR.EPTYPE", 	"Memory", 0xfffb0030, 4, base=16, bitRange=8-10
+sfr = "UDP_CSR.DTGLE", 	"Memory", 0xfffb0030, 4, base=16, bitRange=11
+sfr = "UDP_CSR.EPEDS", 	"Memory", 0xfffb0030, 4, base=16, bitRange=15
+sfr = "UDP_CSR.RXBYTECNT", 	"Memory", 0xfffb0030, 4, base=16, bitRange=16-26
+sfr = "UDP_FDR", 	"Memory", 0xfffb0050, 4, base=16
+sfr = "UDP_TXVC", 	"Memory", 0xfffb0074, 4, base=16
+sfr = "UDP_TXVC.TXVDIS", 	"Memory", 0xfffb0074, 4, base=16, bitRange=8
+sfr = "UDP_TXVC.PUON", 	"Memory", 0xfffb0074, 4, base=16, bitRange=9
+; ========== Register definition for TC0 peripheral ========== 
+sfr = "TC0_CCR", 	"Memory", 0xfffa0000, 4, base=16
+sfr = "TC0_CCR.CLKEN", 	"Memory", 0xfffa0000, 4, base=16, bitRange=0
+sfr = "TC0_CCR.CLKDIS", 	"Memory", 0xfffa0000, 4, base=16, bitRange=1
+sfr = "TC0_CCR.SWTRG", 	"Memory", 0xfffa0000, 4, base=16, bitRange=2
+sfr = "TC0_CMR", 	"Memory", 0xfffa0004, 4, base=16
+sfr = "TC0_CMR.CLKS", 	"Memory", 0xfffa0004, 4, base=16, bitRange=0-2
+sfr = "TC0_CMR.CLKI", 	"Memory", 0xfffa0004, 4, base=16, bitRange=3
+sfr = "TC0_CMR.BURST", 	"Memory", 0xfffa0004, 4, base=16, bitRange=4-5
+sfr = "TC0_CMR.CPCSTOP", 	"Memory", 0xfffa0004, 4, base=16, bitRange=6
+sfr = "TC0_CMR.LDBSTOP", 	"Memory", 0xfffa0004, 4, base=16, bitRange=6
+sfr = "TC0_CMR.CPCDIS", 	"Memory", 0xfffa0004, 4, base=16, bitRange=7
+sfr = "TC0_CMR.LDBDIS", 	"Memory", 0xfffa0004, 4, base=16, bitRange=7
+sfr = "TC0_CMR.ETRGEDG", 	"Memory", 0xfffa0004, 4, base=16, bitRange=8-9
+sfr = "TC0_CMR.EEVTEDG", 	"Memory", 0xfffa0004, 4, base=16, bitRange=8-9
+sfr = "TC0_CMR.EEVT", 	"Memory", 0xfffa0004, 4, base=16, bitRange=10-11
+sfr = "TC0_CMR.ABETRG", 	"Memory", 0xfffa0004, 4, base=16, bitRange=10
+sfr = "TC0_CMR.ENETRG", 	"Memory", 0xfffa0004, 4, base=16, bitRange=12
+sfr = "TC0_CMR.WAVESEL", 	"Memory", 0xfffa0004, 4, base=16, bitRange=13-14
+sfr = "TC0_CMR.CPCTRG", 	"Memory", 0xfffa0004, 4, base=16, bitRange=14
+sfr = "TC0_CMR.WAVE", 	"Memory", 0xfffa0004, 4, base=16, bitRange=15
+sfr = "TC0_CMR.ACPA", 	"Memory", 0xfffa0004, 4, base=16, bitRange=16-17
+sfr = "TC0_CMR.LDRA", 	"Memory", 0xfffa0004, 4, base=16, bitRange=16-17
+sfr = "TC0_CMR.ACPC", 	"Memory", 0xfffa0004, 4, base=16, bitRange=18-19
+sfr = "TC0_CMR.LDRB", 	"Memory", 0xfffa0004, 4, base=16, bitRange=18-19
+sfr = "TC0_CMR.AEEVT", 	"Memory", 0xfffa0004, 4, base=16, bitRange=20-21
+sfr = "TC0_CMR.ASWTRG", 	"Memory", 0xfffa0004, 4, base=16, bitRange=22-23
+sfr = "TC0_CMR.BCPB", 	"Memory", 0xfffa0004, 4, base=16, bitRange=24-25
+sfr = "TC0_CMR.BCPC", 	"Memory", 0xfffa0004, 4, base=16, bitRange=26-27
+sfr = "TC0_CMR.BEEVT", 	"Memory", 0xfffa0004, 4, base=16, bitRange=28-29
+sfr = "TC0_CMR.BSWTRG", 	"Memory", 0xfffa0004, 4, base=16, bitRange=30-31
+sfr = "TC0_CV", 	"Memory", 0xfffa0010, 4, base=16
+sfr = "TC0_RA", 	"Memory", 0xfffa0014, 4, base=16
+sfr = "TC0_RB", 	"Memory", 0xfffa0018, 4, base=16
+sfr = "TC0_RC", 	"Memory", 0xfffa001c, 4, base=16
+sfr = "TC0_SR", 	"Memory", 0xfffa0020, 4, base=16
+sfr = "TC0_SR.COVFS", 	"Memory", 0xfffa0020, 4, base=16, bitRange=0
+sfr = "TC0_SR.LOVRS", 	"Memory", 0xfffa0020, 4, base=16, bitRange=1
+sfr = "TC0_SR.CPAS", 	"Memory", 0xfffa0020, 4, base=16, bitRange=2
+sfr = "TC0_SR.CPBS", 	"Memory", 0xfffa0020, 4, base=16, bitRange=3
+sfr = "TC0_SR.CPCS", 	"Memory", 0xfffa0020, 4, base=16, bitRange=4
+sfr = "TC0_SR.LDRAS", 	"Memory", 0xfffa0020, 4, base=16, bitRange=5
+sfr = "TC0_SR.LDRBS", 	"Memory", 0xfffa0020, 4, base=16, bitRange=6
+sfr = "TC0_SR.ETRGS", 	"Memory", 0xfffa0020, 4, base=16, bitRange=7
+sfr = "TC0_SR.CLKSTA", 	"Memory", 0xfffa0020, 4, base=16, bitRange=16
+sfr = "TC0_SR.MTIOA", 	"Memory", 0xfffa0020, 4, base=16, bitRange=17
+sfr = "TC0_SR.MTIOB", 	"Memory", 0xfffa0020, 4, base=16, bitRange=18
+sfr = "TC0_IER", 	"Memory", 0xfffa0024, 4, base=16
+sfr = "TC0_IER.COVFS", 	"Memory", 0xfffa0024, 4, base=16, bitRange=0
+sfr = "TC0_IER.LOVRS", 	"Memory", 0xfffa0024, 4, base=16, bitRange=1
+sfr = "TC0_IER.CPAS", 	"Memory", 0xfffa0024, 4, base=16, bitRange=2
+sfr = "TC0_IER.CPBS", 	"Memory", 0xfffa0024, 4, base=16, bitRange=3
+sfr = "TC0_IER.CPCS", 	"Memory", 0xfffa0024, 4, base=16, bitRange=4
+sfr = "TC0_IER.LDRAS", 	"Memory", 0xfffa0024, 4, base=16, bitRange=5
+sfr = "TC0_IER.LDRBS", 	"Memory", 0xfffa0024, 4, base=16, bitRange=6
+sfr = "TC0_IER.ETRGS", 	"Memory", 0xfffa0024, 4, base=16, bitRange=7
+sfr = "TC0_IDR", 	"Memory", 0xfffa0028, 4, base=16
+sfr = "TC0_IDR.COVFS", 	"Memory", 0xfffa0028, 4, base=16, bitRange=0
+sfr = "TC0_IDR.LOVRS", 	"Memory", 0xfffa0028, 4, base=16, bitRange=1
+sfr = "TC0_IDR.CPAS", 	"Memory", 0xfffa0028, 4, base=16, bitRange=2
+sfr = "TC0_IDR.CPBS", 	"Memory", 0xfffa0028, 4, base=16, bitRange=3
+sfr = "TC0_IDR.CPCS", 	"Memory", 0xfffa0028, 4, base=16, bitRange=4
+sfr = "TC0_IDR.LDRAS", 	"Memory", 0xfffa0028, 4, base=16, bitRange=5
+sfr = "TC0_IDR.LDRBS", 	"Memory", 0xfffa0028, 4, base=16, bitRange=6
+sfr = "TC0_IDR.ETRGS", 	"Memory", 0xfffa0028, 4, base=16, bitRange=7
+sfr = "TC0_IMR", 	"Memory", 0xfffa002c, 4, base=16
+sfr = "TC0_IMR.COVFS", 	"Memory", 0xfffa002c, 4, base=16, bitRange=0
+sfr = "TC0_IMR.LOVRS", 	"Memory", 0xfffa002c, 4, base=16, bitRange=1
+sfr = "TC0_IMR.CPAS", 	"Memory", 0xfffa002c, 4, base=16, bitRange=2
+sfr = "TC0_IMR.CPBS", 	"Memory", 0xfffa002c, 4, base=16, bitRange=3
+sfr = "TC0_IMR.CPCS", 	"Memory", 0xfffa002c, 4, base=16, bitRange=4
+sfr = "TC0_IMR.LDRAS", 	"Memory", 0xfffa002c, 4, base=16, bitRange=5
+sfr = "TC0_IMR.LDRBS", 	"Memory", 0xfffa002c, 4, base=16, bitRange=6
+sfr = "TC0_IMR.ETRGS", 	"Memory", 0xfffa002c, 4, base=16, bitRange=7
+; ========== Register definition for TC1 peripheral ========== 
+sfr = "TC1_CCR", 	"Memory", 0xfffa0040, 4, base=16
+sfr = "TC1_CCR.CLKEN", 	"Memory", 0xfffa0040, 4, base=16, bitRange=0
+sfr = "TC1_CCR.CLKDIS", 	"Memory", 0xfffa0040, 4, base=16, bitRange=1
+sfr = "TC1_CCR.SWTRG", 	"Memory", 0xfffa0040, 4, base=16, bitRange=2
+sfr = "TC1_CMR", 	"Memory", 0xfffa0044, 4, base=16
+sfr = "TC1_CMR.CLKS", 	"Memory", 0xfffa0044, 4, base=16, bitRange=0-2
+sfr = "TC1_CMR.CLKI", 	"Memory", 0xfffa0044, 4, base=16, bitRange=3
+sfr = "TC1_CMR.BURST", 	"Memory", 0xfffa0044, 4, base=16, bitRange=4-5
+sfr = "TC1_CMR.CPCSTOP", 	"Memory", 0xfffa0044, 4, base=16, bitRange=6
+sfr = "TC1_CMR.LDBSTOP", 	"Memory", 0xfffa0044, 4, base=16, bitRange=6
+sfr = "TC1_CMR.CPCDIS", 	"Memory", 0xfffa0044, 4, base=16, bitRange=7
+sfr = "TC1_CMR.LDBDIS", 	"Memory", 0xfffa0044, 4, base=16, bitRange=7
+sfr = "TC1_CMR.ETRGEDG", 	"Memory", 0xfffa0044, 4, base=16, bitRange=8-9
+sfr = "TC1_CMR.EEVTEDG", 	"Memory", 0xfffa0044, 4, base=16, bitRange=8-9
+sfr = "TC1_CMR.EEVT", 	"Memory", 0xfffa0044, 4, base=16, bitRange=10-11
+sfr = "TC1_CMR.ABETRG", 	"Memory", 0xfffa0044, 4, base=16, bitRange=10
+sfr = "TC1_CMR.ENETRG", 	"Memory", 0xfffa0044, 4, base=16, bitRange=12
+sfr = "TC1_CMR.WAVESEL", 	"Memory", 0xfffa0044, 4, base=16, bitRange=13-14
+sfr = "TC1_CMR.CPCTRG", 	"Memory", 0xfffa0044, 4, base=16, bitRange=14
+sfr = "TC1_CMR.WAVE", 	"Memory", 0xfffa0044, 4, base=16, bitRange=15
+sfr = "TC1_CMR.ACPA", 	"Memory", 0xfffa0044, 4, base=16, bitRange=16-17
+sfr = "TC1_CMR.LDRA", 	"Memory", 0xfffa0044, 4, base=16, bitRange=16-17
+sfr = "TC1_CMR.ACPC", 	"Memory", 0xfffa0044, 4, base=16, bitRange=18-19
+sfr = "TC1_CMR.LDRB", 	"Memory", 0xfffa0044, 4, base=16, bitRange=18-19
+sfr = "TC1_CMR.AEEVT", 	"Memory", 0xfffa0044, 4, base=16, bitRange=20-21
+sfr = "TC1_CMR.ASWTRG", 	"Memory", 0xfffa0044, 4, base=16, bitRange=22-23
+sfr = "TC1_CMR.BCPB", 	"Memory", 0xfffa0044, 4, base=16, bitRange=24-25
+sfr = "TC1_CMR.BCPC", 	"Memory", 0xfffa0044, 4, base=16, bitRange=26-27
+sfr = "TC1_CMR.BEEVT", 	"Memory", 0xfffa0044, 4, base=16, bitRange=28-29
+sfr = "TC1_CMR.BSWTRG", 	"Memory", 0xfffa0044, 4, base=16, bitRange=30-31
+sfr = "TC1_CV", 	"Memory", 0xfffa0050, 4, base=16
+sfr = "TC1_RA", 	"Memory", 0xfffa0054, 4, base=16
+sfr = "TC1_RB", 	"Memory", 0xfffa0058, 4, base=16
+sfr = "TC1_RC", 	"Memory", 0xfffa005c, 4, base=16
+sfr = "TC1_SR", 	"Memory", 0xfffa0060, 4, base=16
+sfr = "TC1_SR.COVFS", 	"Memory", 0xfffa0060, 4, base=16, bitRange=0
+sfr = "TC1_SR.LOVRS", 	"Memory", 0xfffa0060, 4, base=16, bitRange=1
+sfr = "TC1_SR.CPAS", 	"Memory", 0xfffa0060, 4, base=16, bitRange=2
+sfr = "TC1_SR.CPBS", 	"Memory", 0xfffa0060, 4, base=16, bitRange=3
+sfr = "TC1_SR.CPCS", 	"Memory", 0xfffa0060, 4, base=16, bitRange=4
+sfr = "TC1_SR.LDRAS", 	"Memory", 0xfffa0060, 4, base=16, bitRange=5
+sfr = "TC1_SR.LDRBS", 	"Memory", 0xfffa0060, 4, base=16, bitRange=6
+sfr = "TC1_SR.ETRGS", 	"Memory", 0xfffa0060, 4, base=16, bitRange=7
+sfr = "TC1_SR.CLKSTA", 	"Memory", 0xfffa0060, 4, base=16, bitRange=16
+sfr = "TC1_SR.MTIOA", 	"Memory", 0xfffa0060, 4, base=16, bitRange=17
+sfr = "TC1_SR.MTIOB", 	"Memory", 0xfffa0060, 4, base=16, bitRange=18
+sfr = "TC1_IER", 	"Memory", 0xfffa0064, 4, base=16
+sfr = "TC1_IER.COVFS", 	"Memory", 0xfffa0064, 4, base=16, bitRange=0
+sfr = "TC1_IER.LOVRS", 	"Memory", 0xfffa0064, 4, base=16, bitRange=1
+sfr = "TC1_IER.CPAS", 	"Memory", 0xfffa0064, 4, base=16, bitRange=2
+sfr = "TC1_IER.CPBS", 	"Memory", 0xfffa0064, 4, base=16, bitRange=3
+sfr = "TC1_IER.CPCS", 	"Memory", 0xfffa0064, 4, base=16, bitRange=4
+sfr = "TC1_IER.LDRAS", 	"Memory", 0xfffa0064, 4, base=16, bitRange=5
+sfr = "TC1_IER.LDRBS", 	"Memory", 0xfffa0064, 4, base=16, bitRange=6
+sfr = "TC1_IER.ETRGS", 	"Memory", 0xfffa0064, 4, base=16, bitRange=7
+sfr = "TC1_IDR", 	"Memory", 0xfffa0068, 4, base=16
+sfr = "TC1_IDR.COVFS", 	"Memory", 0xfffa0068, 4, base=16, bitRange=0
+sfr = "TC1_IDR.LOVRS", 	"Memory", 0xfffa0068, 4, base=16, bitRange=1
+sfr = "TC1_IDR.CPAS", 	"Memory", 0xfffa0068, 4, base=16, bitRange=2
+sfr = "TC1_IDR.CPBS", 	"Memory", 0xfffa0068, 4, base=16, bitRange=3
+sfr = "TC1_IDR.CPCS", 	"Memory", 0xfffa0068, 4, base=16, bitRange=4
+sfr = "TC1_IDR.LDRAS", 	"Memory", 0xfffa0068, 4, base=16, bitRange=5
+sfr = "TC1_IDR.LDRBS", 	"Memory", 0xfffa0068, 4, base=16, bitRange=6
+sfr = "TC1_IDR.ETRGS", 	"Memory", 0xfffa0068, 4, base=16, bitRange=7
+sfr = "TC1_IMR", 	"Memory", 0xfffa006c, 4, base=16
+sfr = "TC1_IMR.COVFS", 	"Memory", 0xfffa006c, 4, base=16, bitRange=0
+sfr = "TC1_IMR.LOVRS", 	"Memory", 0xfffa006c, 4, base=16, bitRange=1
+sfr = "TC1_IMR.CPAS", 	"Memory", 0xfffa006c, 4, base=16, bitRange=2
+sfr = "TC1_IMR.CPBS", 	"Memory", 0xfffa006c, 4, base=16, bitRange=3
+sfr = "TC1_IMR.CPCS", 	"Memory", 0xfffa006c, 4, base=16, bitRange=4
+sfr = "TC1_IMR.LDRAS", 	"Memory", 0xfffa006c, 4, base=16, bitRange=5
+sfr = "TC1_IMR.LDRBS", 	"Memory", 0xfffa006c, 4, base=16, bitRange=6
+sfr = "TC1_IMR.ETRGS", 	"Memory", 0xfffa006c, 4, base=16, bitRange=7
+; ========== Register definition for TC2 peripheral ========== 
+sfr = "TC2_CCR", 	"Memory", 0xfffa0080, 4, base=16
+sfr = "TC2_CCR.CLKEN", 	"Memory", 0xfffa0080, 4, base=16, bitRange=0
+sfr = "TC2_CCR.CLKDIS", 	"Memory", 0xfffa0080, 4, base=16, bitRange=1
+sfr = "TC2_CCR.SWTRG", 	"Memory", 0xfffa0080, 4, base=16, bitRange=2
+sfr = "TC2_CMR", 	"Memory", 0xfffa0084, 4, base=16
+sfr = "TC2_CMR.CLKS", 	"Memory", 0xfffa0084, 4, base=16, bitRange=0-2
+sfr = "TC2_CMR.CLKI", 	"Memory", 0xfffa0084, 4, base=16, bitRange=3
+sfr = "TC2_CMR.BURST", 	"Memory", 0xfffa0084, 4, base=16, bitRange=4-5
+sfr = "TC2_CMR.CPCSTOP", 	"Memory", 0xfffa0084, 4, base=16, bitRange=6
+sfr = "TC2_CMR.LDBSTOP", 	"Memory", 0xfffa0084, 4, base=16, bitRange=6
+sfr = "TC2_CMR.CPCDIS", 	"Memory", 0xfffa0084, 4, base=16, bitRange=7
+sfr = "TC2_CMR.LDBDIS", 	"Memory", 0xfffa0084, 4, base=16, bitRange=7
+sfr = "TC2_CMR.ETRGEDG", 	"Memory", 0xfffa0084, 4, base=16, bitRange=8-9
+sfr = "TC2_CMR.EEVTEDG", 	"Memory", 0xfffa0084, 4, base=16, bitRange=8-9
+sfr = "TC2_CMR.EEVT", 	"Memory", 0xfffa0084, 4, base=16, bitRange=10-11
+sfr = "TC2_CMR.ABETRG", 	"Memory", 0xfffa0084, 4, base=16, bitRange=10
+sfr = "TC2_CMR.ENETRG", 	"Memory", 0xfffa0084, 4, base=16, bitRange=12
+sfr = "TC2_CMR.WAVESEL", 	"Memory", 0xfffa0084, 4, base=16, bitRange=13-14
+sfr = "TC2_CMR.CPCTRG", 	"Memory", 0xfffa0084, 4, base=16, bitRange=14
+sfr = "TC2_CMR.WAVE", 	"Memory", 0xfffa0084, 4, base=16, bitRange=15
+sfr = "TC2_CMR.ACPA", 	"Memory", 0xfffa0084, 4, base=16, bitRange=16-17
+sfr = "TC2_CMR.LDRA", 	"Memory", 0xfffa0084, 4, base=16, bitRange=16-17
+sfr = "TC2_CMR.ACPC", 	"Memory", 0xfffa0084, 4, base=16, bitRange=18-19
+sfr = "TC2_CMR.LDRB", 	"Memory", 0xfffa0084, 4, base=16, bitRange=18-19
+sfr = "TC2_CMR.AEEVT", 	"Memory", 0xfffa0084, 4, base=16, bitRange=20-21
+sfr = "TC2_CMR.ASWTRG", 	"Memory", 0xfffa0084, 4, base=16, bitRange=22-23
+sfr = "TC2_CMR.BCPB", 	"Memory", 0xfffa0084, 4, base=16, bitRange=24-25
+sfr = "TC2_CMR.BCPC", 	"Memory", 0xfffa0084, 4, base=16, bitRange=26-27
+sfr = "TC2_CMR.BEEVT", 	"Memory", 0xfffa0084, 4, base=16, bitRange=28-29
+sfr = "TC2_CMR.BSWTRG", 	"Memory", 0xfffa0084, 4, base=16, bitRange=30-31
+sfr = "TC2_CV", 	"Memory", 0xfffa0090, 4, base=16
+sfr = "TC2_RA", 	"Memory", 0xfffa0094, 4, base=16
+sfr = "TC2_RB", 	"Memory", 0xfffa0098, 4, base=16
+sfr = "TC2_RC", 	"Memory", 0xfffa009c, 4, base=16
+sfr = "TC2_SR", 	"Memory", 0xfffa00a0, 4, base=16
+sfr = "TC2_SR.COVFS", 	"Memory", 0xfffa00a0, 4, base=16, bitRange=0
+sfr = "TC2_SR.LOVRS", 	"Memory", 0xfffa00a0, 4, base=16, bitRange=1
+sfr = "TC2_SR.CPAS", 	"Memory", 0xfffa00a0, 4, base=16, bitRange=2
+sfr = "TC2_SR.CPBS", 	"Memory", 0xfffa00a0, 4, base=16, bitRange=3
+sfr = "TC2_SR.CPCS", 	"Memory", 0xfffa00a0, 4, base=16, bitRange=4
+sfr = "TC2_SR.LDRAS", 	"Memory", 0xfffa00a0, 4, base=16, bitRange=5
+sfr = "TC2_SR.LDRBS", 	"Memory", 0xfffa00a0, 4, base=16, bitRange=6
+sfr = "TC2_SR.ETRGS", 	"Memory", 0xfffa00a0, 4, base=16, bitRange=7
+sfr = "TC2_SR.CLKSTA", 	"Memory", 0xfffa00a0, 4, base=16, bitRange=16
+sfr = "TC2_SR.MTIOA", 	"Memory", 0xfffa00a0, 4, base=16, bitRange=17
+sfr = "TC2_SR.MTIOB", 	"Memory", 0xfffa00a0, 4, base=16, bitRange=18
+sfr = "TC2_IER", 	"Memory", 0xfffa00a4, 4, base=16
+sfr = "TC2_IER.COVFS", 	"Memory", 0xfffa00a4, 4, base=16, bitRange=0
+sfr = "TC2_IER.LOVRS", 	"Memory", 0xfffa00a4, 4, base=16, bitRange=1
+sfr = "TC2_IER.CPAS", 	"Memory", 0xfffa00a4, 4, base=16, bitRange=2
+sfr = "TC2_IER.CPBS", 	"Memory", 0xfffa00a4, 4, base=16, bitRange=3
+sfr = "TC2_IER.CPCS", 	"Memory", 0xfffa00a4, 4, base=16, bitRange=4
+sfr = "TC2_IER.LDRAS", 	"Memory", 0xfffa00a4, 4, base=16, bitRange=5
+sfr = "TC2_IER.LDRBS", 	"Memory", 0xfffa00a4, 4, base=16, bitRange=6
+sfr = "TC2_IER.ETRGS", 	"Memory", 0xfffa00a4, 4, base=16, bitRange=7
+sfr = "TC2_IDR", 	"Memory", 0xfffa00a8, 4, base=16
+sfr = "TC2_IDR.COVFS", 	"Memory", 0xfffa00a8, 4, base=16, bitRange=0
+sfr = "TC2_IDR.LOVRS", 	"Memory", 0xfffa00a8, 4, base=16, bitRange=1
+sfr = "TC2_IDR.CPAS", 	"Memory", 0xfffa00a8, 4, base=16, bitRange=2
+sfr = "TC2_IDR.CPBS", 	"Memory", 0xfffa00a8, 4, base=16, bitRange=3
+sfr = "TC2_IDR.CPCS", 	"Memory", 0xfffa00a8, 4, base=16, bitRange=4
+sfr = "TC2_IDR.LDRAS", 	"Memory", 0xfffa00a8, 4, base=16, bitRange=5
+sfr = "TC2_IDR.LDRBS", 	"Memory", 0xfffa00a8, 4, base=16, bitRange=6
+sfr = "TC2_IDR.ETRGS", 	"Memory", 0xfffa00a8, 4, base=16, bitRange=7
+sfr = "TC2_IMR", 	"Memory", 0xfffa00ac, 4, base=16
+sfr = "TC2_IMR.COVFS", 	"Memory", 0xfffa00ac, 4, base=16, bitRange=0
+sfr = "TC2_IMR.LOVRS", 	"Memory", 0xfffa00ac, 4, base=16, bitRange=1
+sfr = "TC2_IMR.CPAS", 	"Memory", 0xfffa00ac, 4, base=16, bitRange=2
+sfr = "TC2_IMR.CPBS", 	"Memory", 0xfffa00ac, 4, base=16, bitRange=3
+sfr = "TC2_IMR.CPCS", 	"Memory", 0xfffa00ac, 4, base=16, bitRange=4
+sfr = "TC2_IMR.LDRAS", 	"Memory", 0xfffa00ac, 4, base=16, bitRange=5
+sfr = "TC2_IMR.LDRBS", 	"Memory", 0xfffa00ac, 4, base=16, bitRange=6
+sfr = "TC2_IMR.ETRGS", 	"Memory", 0xfffa00ac, 4, base=16, bitRange=7
+; ========== Register definition for TCB peripheral ========== 
+sfr = "TCB_BCR", 	"Memory", 0xfffa00c0, 4, base=16
+sfr = "TCB_BCR.SYNC", 	"Memory", 0xfffa00c0, 4, base=16, bitRange=0
+sfr = "TCB_BMR", 	"Memory", 0xfffa00c4, 4, base=16
+sfr = "TCB_BMR.TC0XC0S", 	"Memory", 0xfffa00c4, 4, base=16, bitRange=0-1
+sfr = "TCB_BMR.TC1XC1S", 	"Memory", 0xfffa00c4, 4, base=16, bitRange=2-3
+sfr = "TCB_BMR.TC2XC2S", 	"Memory", 0xfffa00c4, 4, base=16, bitRange=4-5
+; ========== Register definition for CAN_MB0 peripheral ========== 
+sfr = "CAN_MB0_MMR", 	"Memory", 0xfffd0200, 4, base=16
+sfr = "CAN_MB0_MMR.MTIMEMARK", 	"Memory", 0xfffd0200, 4, base=16, bitRange=0-15
+sfr = "CAN_MB0_MMR.PRIOR", 	"Memory", 0xfffd0200, 4, base=16, bitRange=16-19
+sfr = "CAN_MB0_MMR.MOT", 	"Memory", 0xfffd0200, 4, base=16, bitRange=24-26
+sfr = "CAN_MB0_MAM", 	"Memory", 0xfffd0204, 4, base=16
+sfr = "CAN_MB0_MAM.MIDvB", 	"Memory", 0xfffd0204, 4, base=16, bitRange=0-17
+sfr = "CAN_MB0_MAM.MIDvA", 	"Memory", 0xfffd0204, 4, base=16, bitRange=18-28
+sfr = "CAN_MB0_MAM.MIDE", 	"Memory", 0xfffd0204, 4, base=16, bitRange=29
+sfr = "CAN_MB0_MID", 	"Memory", 0xfffd0208, 4, base=16
+sfr = "CAN_MB0_MID.MIDvB", 	"Memory", 0xfffd0208, 4, base=16, bitRange=0-17
+sfr = "CAN_MB0_MID.MIDvA", 	"Memory", 0xfffd0208, 4, base=16, bitRange=18-28
+sfr = "CAN_MB0_MID.MIDE", 	"Memory", 0xfffd0208, 4, base=16, bitRange=29
+sfr = "CAN_MB0_MFID", 	"Memory", 0xfffd020c, 4, base=16
+sfr = "CAN_MB0_MSR", 	"Memory", 0xfffd0210, 4, base=16
+sfr = "CAN_MB0_MSR.MTIMESTAMP", 	"Memory", 0xfffd0210, 4, base=16, bitRange=0-15
+sfr = "CAN_MB0_MSR.MDLC", 	"Memory", 0xfffd0210, 4, base=16, bitRange=16-19
+sfr = "CAN_MB0_MSR.MRTR", 	"Memory", 0xfffd0210, 4, base=16, bitRange=20
+sfr = "CAN_MB0_MSR.MABT", 	"Memory", 0xfffd0210, 4, base=16, bitRange=22
+sfr = "CAN_MB0_MSR.MRDY", 	"Memory", 0xfffd0210, 4, base=16, bitRange=23
+sfr = "CAN_MB0_MSR.MMI", 	"Memory", 0xfffd0210, 4, base=16, bitRange=24
+sfr = "CAN_MB0_MDL", 	"Memory", 0xfffd0214, 4, base=16
+sfr = "CAN_MB0_MDH", 	"Memory", 0xfffd0218, 4, base=16
+sfr = "CAN_MB0_MCR", 	"Memory", 0xfffd021c, 4, base=16
+sfr = "CAN_MB0_MCR.MDLC", 	"Memory", 0xfffd021c, 4, base=16, bitRange=16-19
+sfr = "CAN_MB0_MCR.MRTR", 	"Memory", 0xfffd021c, 4, base=16, bitRange=20
+sfr = "CAN_MB0_MCR.MACR", 	"Memory", 0xfffd021c, 4, base=16, bitRange=22
+sfr = "CAN_MB0_MCR.MTCR", 	"Memory", 0xfffd021c, 4, base=16, bitRange=23
+; ========== Register definition for CAN_MB1 peripheral ========== 
+sfr = "CAN_MB1_MMR", 	"Memory", 0xfffd0220, 4, base=16
+sfr = "CAN_MB1_MMR.MTIMEMARK", 	"Memory", 0xfffd0220, 4, base=16, bitRange=0-15
+sfr = "CAN_MB1_MMR.PRIOR", 	"Memory", 0xfffd0220, 4, base=16, bitRange=16-19
+sfr = "CAN_MB1_MMR.MOT", 	"Memory", 0xfffd0220, 4, base=16, bitRange=24-26
+sfr = "CAN_MB1_MAM", 	"Memory", 0xfffd0224, 4, base=16
+sfr = "CAN_MB1_MAM.MIDvB", 	"Memory", 0xfffd0224, 4, base=16, bitRange=0-17
+sfr = "CAN_MB1_MAM.MIDvA", 	"Memory", 0xfffd0224, 4, base=16, bitRange=18-28
+sfr = "CAN_MB1_MAM.MIDE", 	"Memory", 0xfffd0224, 4, base=16, bitRange=29
+sfr = "CAN_MB1_MID", 	"Memory", 0xfffd0228, 4, base=16
+sfr = "CAN_MB1_MID.MIDvB", 	"Memory", 0xfffd0228, 4, base=16, bitRange=0-17
+sfr = "CAN_MB1_MID.MIDvA", 	"Memory", 0xfffd0228, 4, base=16, bitRange=18-28
+sfr = "CAN_MB1_MID.MIDE", 	"Memory", 0xfffd0228, 4, base=16, bitRange=29
+sfr = "CAN_MB1_MFID", 	"Memory", 0xfffd022c, 4, base=16
+sfr = "CAN_MB1_MSR", 	"Memory", 0xfffd0230, 4, base=16
+sfr = "CAN_MB1_MSR.MTIMESTAMP", 	"Memory", 0xfffd0230, 4, base=16, bitRange=0-15
+sfr = "CAN_MB1_MSR.MDLC", 	"Memory", 0xfffd0230, 4, base=16, bitRange=16-19
+sfr = "CAN_MB1_MSR.MRTR", 	"Memory", 0xfffd0230, 4, base=16, bitRange=20
+sfr = "CAN_MB1_MSR.MABT", 	"Memory", 0xfffd0230, 4, base=16, bitRange=22
+sfr = "CAN_MB1_MSR.MRDY", 	"Memory", 0xfffd0230, 4, base=16, bitRange=23
+sfr = "CAN_MB1_MSR.MMI", 	"Memory", 0xfffd0230, 4, base=16, bitRange=24
+sfr = "CAN_MB1_MDL", 	"Memory", 0xfffd0234, 4, base=16
+sfr = "CAN_MB1_MDH", 	"Memory", 0xfffd0238, 4, base=16
+sfr = "CAN_MB1_MCR", 	"Memory", 0xfffd023c, 4, base=16
+sfr = "CAN_MB1_MCR.MDLC", 	"Memory", 0xfffd023c, 4, base=16, bitRange=16-19
+sfr = "CAN_MB1_MCR.MRTR", 	"Memory", 0xfffd023c, 4, base=16, bitRange=20
+sfr = "CAN_MB1_MCR.MACR", 	"Memory", 0xfffd023c, 4, base=16, bitRange=22
+sfr = "CAN_MB1_MCR.MTCR", 	"Memory", 0xfffd023c, 4, base=16, bitRange=23
+; ========== Register definition for CAN_MB2 peripheral ========== 
+sfr = "CAN_MB2_MMR", 	"Memory", 0xfffd0240, 4, base=16
+sfr = "CAN_MB2_MMR.MTIMEMARK", 	"Memory", 0xfffd0240, 4, base=16, bitRange=0-15
+sfr = "CAN_MB2_MMR.PRIOR", 	"Memory", 0xfffd0240, 4, base=16, bitRange=16-19
+sfr = "CAN_MB2_MMR.MOT", 	"Memory", 0xfffd0240, 4, base=16, bitRange=24-26
+sfr = "CAN_MB2_MAM", 	"Memory", 0xfffd0244, 4, base=16
+sfr = "CAN_MB2_MAM.MIDvB", 	"Memory", 0xfffd0244, 4, base=16, bitRange=0-17
+sfr = "CAN_MB2_MAM.MIDvA", 	"Memory", 0xfffd0244, 4, base=16, bitRange=18-28
+sfr = "CAN_MB2_MAM.MIDE", 	"Memory", 0xfffd0244, 4, base=16, bitRange=29
+sfr = "CAN_MB2_MID", 	"Memory", 0xfffd0248, 4, base=16
+sfr = "CAN_MB2_MID.MIDvB", 	"Memory", 0xfffd0248, 4, base=16, bitRange=0-17
+sfr = "CAN_MB2_MID.MIDvA", 	"Memory", 0xfffd0248, 4, base=16, bitRange=18-28
+sfr = "CAN_MB2_MID.MIDE", 	"Memory", 0xfffd0248, 4, base=16, bitRange=29
+sfr = "CAN_MB2_MFID", 	"Memory", 0xfffd024c, 4, base=16
+sfr = "CAN_MB2_MSR", 	"Memory", 0xfffd0250, 4, base=16
+sfr = "CAN_MB2_MSR.MTIMESTAMP", 	"Memory", 0xfffd0250, 4, base=16, bitRange=0-15
+sfr = "CAN_MB2_MSR.MDLC", 	"Memory", 0xfffd0250, 4, base=16, bitRange=16-19
+sfr = "CAN_MB2_MSR.MRTR", 	"Memory", 0xfffd0250, 4, base=16, bitRange=20
+sfr = "CAN_MB2_MSR.MABT", 	"Memory", 0xfffd0250, 4, base=16, bitRange=22
+sfr = "CAN_MB2_MSR.MRDY", 	"Memory", 0xfffd0250, 4, base=16, bitRange=23
+sfr = "CAN_MB2_MSR.MMI", 	"Memory", 0xfffd0250, 4, base=16, bitRange=24
+sfr = "CAN_MB2_MDL", 	"Memory", 0xfffd0254, 4, base=16
+sfr = "CAN_MB2_MDH", 	"Memory", 0xfffd0258, 4, base=16
+sfr = "CAN_MB2_MCR", 	"Memory", 0xfffd025c, 4, base=16
+sfr = "CAN_MB2_MCR.MDLC", 	"Memory", 0xfffd025c, 4, base=16, bitRange=16-19
+sfr = "CAN_MB2_MCR.MRTR", 	"Memory", 0xfffd025c, 4, base=16, bitRange=20
+sfr = "CAN_MB2_MCR.MACR", 	"Memory", 0xfffd025c, 4, base=16, bitRange=22
+sfr = "CAN_MB2_MCR.MTCR", 	"Memory", 0xfffd025c, 4, base=16, bitRange=23
+; ========== Register definition for CAN_MB3 peripheral ========== 
+sfr = "CAN_MB3_MMR", 	"Memory", 0xfffd0260, 4, base=16
+sfr = "CAN_MB3_MMR.MTIMEMARK", 	"Memory", 0xfffd0260, 4, base=16, bitRange=0-15
+sfr = "CAN_MB3_MMR.PRIOR", 	"Memory", 0xfffd0260, 4, base=16, bitRange=16-19
+sfr = "CAN_MB3_MMR.MOT", 	"Memory", 0xfffd0260, 4, base=16, bitRange=24-26
+sfr = "CAN_MB3_MAM", 	"Memory", 0xfffd0264, 4, base=16
+sfr = "CAN_MB3_MAM.MIDvB", 	"Memory", 0xfffd0264, 4, base=16, bitRange=0-17
+sfr = "CAN_MB3_MAM.MIDvA", 	"Memory", 0xfffd0264, 4, base=16, bitRange=18-28
+sfr = "CAN_MB3_MAM.MIDE", 	"Memory", 0xfffd0264, 4, base=16, bitRange=29
+sfr = "CAN_MB3_MID", 	"Memory", 0xfffd0268, 4, base=16
+sfr = "CAN_MB3_MID.MIDvB", 	"Memory", 0xfffd0268, 4, base=16, bitRange=0-17
+sfr = "CAN_MB3_MID.MIDvA", 	"Memory", 0xfffd0268, 4, base=16, bitRange=18-28
+sfr = "CAN_MB3_MID.MIDE", 	"Memory", 0xfffd0268, 4, base=16, bitRange=29
+sfr = "CAN_MB3_MFID", 	"Memory", 0xfffd026c, 4, base=16
+sfr = "CAN_MB3_MSR", 	"Memory", 0xfffd0270, 4, base=16
+sfr = "CAN_MB3_MSR.MTIMESTAMP", 	"Memory", 0xfffd0270, 4, base=16, bitRange=0-15
+sfr = "CAN_MB3_MSR.MDLC", 	"Memory", 0xfffd0270, 4, base=16, bitRange=16-19
+sfr = "CAN_MB3_MSR.MRTR", 	"Memory", 0xfffd0270, 4, base=16, bitRange=20
+sfr = "CAN_MB3_MSR.MABT", 	"Memory", 0xfffd0270, 4, base=16, bitRange=22
+sfr = "CAN_MB3_MSR.MRDY", 	"Memory", 0xfffd0270, 4, base=16, bitRange=23
+sfr = "CAN_MB3_MSR.MMI", 	"Memory", 0xfffd0270, 4, base=16, bitRange=24
+sfr = "CAN_MB3_MDL", 	"Memory", 0xfffd0274, 4, base=16
+sfr = "CAN_MB3_MDH", 	"Memory", 0xfffd0278, 4, base=16
+sfr = "CAN_MB3_MCR", 	"Memory", 0xfffd027c, 4, base=16
+sfr = "CAN_MB3_MCR.MDLC", 	"Memory", 0xfffd027c, 4, base=16, bitRange=16-19
+sfr = "CAN_MB3_MCR.MRTR", 	"Memory", 0xfffd027c, 4, base=16, bitRange=20
+sfr = "CAN_MB3_MCR.MACR", 	"Memory", 0xfffd027c, 4, base=16, bitRange=22
+sfr = "CAN_MB3_MCR.MTCR", 	"Memory", 0xfffd027c, 4, base=16, bitRange=23
+; ========== Register definition for CAN_MB4 peripheral ========== 
+sfr = "CAN_MB4_MMR", 	"Memory", 0xfffd0280, 4, base=16
+sfr = "CAN_MB4_MMR.MTIMEMARK", 	"Memory", 0xfffd0280, 4, base=16, bitRange=0-15
+sfr = "CAN_MB4_MMR.PRIOR", 	"Memory", 0xfffd0280, 4, base=16, bitRange=16-19
+sfr = "CAN_MB4_MMR.MOT", 	"Memory", 0xfffd0280, 4, base=16, bitRange=24-26
+sfr = "CAN_MB4_MAM", 	"Memory", 0xfffd0284, 4, base=16
+sfr = "CAN_MB4_MAM.MIDvB", 	"Memory", 0xfffd0284, 4, base=16, bitRange=0-17
+sfr = "CAN_MB4_MAM.MIDvA", 	"Memory", 0xfffd0284, 4, base=16, bitRange=18-28
+sfr = "CAN_MB4_MAM.MIDE", 	"Memory", 0xfffd0284, 4, base=16, bitRange=29
+sfr = "CAN_MB4_MID", 	"Memory", 0xfffd0288, 4, base=16
+sfr = "CAN_MB4_MID.MIDvB", 	"Memory", 0xfffd0288, 4, base=16, bitRange=0-17
+sfr = "CAN_MB4_MID.MIDvA", 	"Memory", 0xfffd0288, 4, base=16, bitRange=18-28
+sfr = "CAN_MB4_MID.MIDE", 	"Memory", 0xfffd0288, 4, base=16, bitRange=29
+sfr = "CAN_MB4_MFID", 	"Memory", 0xfffd028c, 4, base=16
+sfr = "CAN_MB4_MSR", 	"Memory", 0xfffd0290, 4, base=16
+sfr = "CAN_MB4_MSR.MTIMESTAMP", 	"Memory", 0xfffd0290, 4, base=16, bitRange=0-15
+sfr = "CAN_MB4_MSR.MDLC", 	"Memory", 0xfffd0290, 4, base=16, bitRange=16-19
+sfr = "CAN_MB4_MSR.MRTR", 	"Memory", 0xfffd0290, 4, base=16, bitRange=20
+sfr = "CAN_MB4_MSR.MABT", 	"Memory", 0xfffd0290, 4, base=16, bitRange=22
+sfr = "CAN_MB4_MSR.MRDY", 	"Memory", 0xfffd0290, 4, base=16, bitRange=23
+sfr = "CAN_MB4_MSR.MMI", 	"Memory", 0xfffd0290, 4, base=16, bitRange=24
+sfr = "CAN_MB4_MDL", 	"Memory", 0xfffd0294, 4, base=16
+sfr = "CAN_MB4_MDH", 	"Memory", 0xfffd0298, 4, base=16
+sfr = "CAN_MB4_MCR", 	"Memory", 0xfffd029c, 4, base=16
+sfr = "CAN_MB4_MCR.MDLC", 	"Memory", 0xfffd029c, 4, base=16, bitRange=16-19
+sfr = "CAN_MB4_MCR.MRTR", 	"Memory", 0xfffd029c, 4, base=16, bitRange=20
+sfr = "CAN_MB4_MCR.MACR", 	"Memory", 0xfffd029c, 4, base=16, bitRange=22
+sfr = "CAN_MB4_MCR.MTCR", 	"Memory", 0xfffd029c, 4, base=16, bitRange=23
+; ========== Register definition for CAN_MB5 peripheral ========== 
+sfr = "CAN_MB5_MMR", 	"Memory", 0xfffd02a0, 4, base=16
+sfr = "CAN_MB5_MMR.MTIMEMARK", 	"Memory", 0xfffd02a0, 4, base=16, bitRange=0-15
+sfr = "CAN_MB5_MMR.PRIOR", 	"Memory", 0xfffd02a0, 4, base=16, bitRange=16-19
+sfr = "CAN_MB5_MMR.MOT", 	"Memory", 0xfffd02a0, 4, base=16, bitRange=24-26
+sfr = "CAN_MB5_MAM", 	"Memory", 0xfffd02a4, 4, base=16
+sfr = "CAN_MB5_MAM.MIDvB", 	"Memory", 0xfffd02a4, 4, base=16, bitRange=0-17
+sfr = "CAN_MB5_MAM.MIDvA", 	"Memory", 0xfffd02a4, 4, base=16, bitRange=18-28
+sfr = "CAN_MB5_MAM.MIDE", 	"Memory", 0xfffd02a4, 4, base=16, bitRange=29
+sfr = "CAN_MB5_MID", 	"Memory", 0xfffd02a8, 4, base=16
+sfr = "CAN_MB5_MID.MIDvB", 	"Memory", 0xfffd02a8, 4, base=16, bitRange=0-17
+sfr = "CAN_MB5_MID.MIDvA", 	"Memory", 0xfffd02a8, 4, base=16, bitRange=18-28
+sfr = "CAN_MB5_MID.MIDE", 	"Memory", 0xfffd02a8, 4, base=16, bitRange=29
+sfr = "CAN_MB5_MFID", 	"Memory", 0xfffd02ac, 4, base=16
+sfr = "CAN_MB5_MSR", 	"Memory", 0xfffd02b0, 4, base=16
+sfr = "CAN_MB5_MSR.MTIMESTAMP", 	"Memory", 0xfffd02b0, 4, base=16, bitRange=0-15
+sfr = "CAN_MB5_MSR.MDLC", 	"Memory", 0xfffd02b0, 4, base=16, bitRange=16-19
+sfr = "CAN_MB5_MSR.MRTR", 	"Memory", 0xfffd02b0, 4, base=16, bitRange=20
+sfr = "CAN_MB5_MSR.MABT", 	"Memory", 0xfffd02b0, 4, base=16, bitRange=22
+sfr = "CAN_MB5_MSR.MRDY", 	"Memory", 0xfffd02b0, 4, base=16, bitRange=23
+sfr = "CAN_MB5_MSR.MMI", 	"Memory", 0xfffd02b0, 4, base=16, bitRange=24
+sfr = "CAN_MB5_MDL", 	"Memory", 0xfffd02b4, 4, base=16
+sfr = "CAN_MB5_MDH", 	"Memory", 0xfffd02b8, 4, base=16
+sfr = "CAN_MB5_MCR", 	"Memory", 0xfffd02bc, 4, base=16
+sfr = "CAN_MB5_MCR.MDLC", 	"Memory", 0xfffd02bc, 4, base=16, bitRange=16-19
+sfr = "CAN_MB5_MCR.MRTR", 	"Memory", 0xfffd02bc, 4, base=16, bitRange=20
+sfr = "CAN_MB5_MCR.MACR", 	"Memory", 0xfffd02bc, 4, base=16, bitRange=22
+sfr = "CAN_MB5_MCR.MTCR", 	"Memory", 0xfffd02bc, 4, base=16, bitRange=23
+; ========== Register definition for CAN_MB6 peripheral ========== 
+sfr = "CAN_MB6_MMR", 	"Memory", 0xfffd02c0, 4, base=16
+sfr = "CAN_MB6_MMR.MTIMEMARK", 	"Memory", 0xfffd02c0, 4, base=16, bitRange=0-15
+sfr = "CAN_MB6_MMR.PRIOR", 	"Memory", 0xfffd02c0, 4, base=16, bitRange=16-19
+sfr = "CAN_MB6_MMR.MOT", 	"Memory", 0xfffd02c0, 4, base=16, bitRange=24-26
+sfr = "CAN_MB6_MAM", 	"Memory", 0xfffd02c4, 4, base=16
+sfr = "CAN_MB6_MAM.MIDvB", 	"Memory", 0xfffd02c4, 4, base=16, bitRange=0-17
+sfr = "CAN_MB6_MAM.MIDvA", 	"Memory", 0xfffd02c4, 4, base=16, bitRange=18-28
+sfr = "CAN_MB6_MAM.MIDE", 	"Memory", 0xfffd02c4, 4, base=16, bitRange=29
+sfr = "CAN_MB6_MID", 	"Memory", 0xfffd02c8, 4, base=16
+sfr = "CAN_MB6_MID.MIDvB", 	"Memory", 0xfffd02c8, 4, base=16, bitRange=0-17
+sfr = "CAN_MB6_MID.MIDvA", 	"Memory", 0xfffd02c8, 4, base=16, bitRange=18-28
+sfr = "CAN_MB6_MID.MIDE", 	"Memory", 0xfffd02c8, 4, base=16, bitRange=29
+sfr = "CAN_MB6_MFID", 	"Memory", 0xfffd02cc, 4, base=16
+sfr = "CAN_MB6_MSR", 	"Memory", 0xfffd02d0, 4, base=16
+sfr = "CAN_MB6_MSR.MTIMESTAMP", 	"Memory", 0xfffd02d0, 4, base=16, bitRange=0-15
+sfr = "CAN_MB6_MSR.MDLC", 	"Memory", 0xfffd02d0, 4, base=16, bitRange=16-19
+sfr = "CAN_MB6_MSR.MRTR", 	"Memory", 0xfffd02d0, 4, base=16, bitRange=20
+sfr = "CAN_MB6_MSR.MABT", 	"Memory", 0xfffd02d0, 4, base=16, bitRange=22
+sfr = "CAN_MB6_MSR.MRDY", 	"Memory", 0xfffd02d0, 4, base=16, bitRange=23
+sfr = "CAN_MB6_MSR.MMI", 	"Memory", 0xfffd02d0, 4, base=16, bitRange=24
+sfr = "CAN_MB6_MDL", 	"Memory", 0xfffd02d4, 4, base=16
+sfr = "CAN_MB6_MDH", 	"Memory", 0xfffd02d8, 4, base=16
+sfr = "CAN_MB6_MCR", 	"Memory", 0xfffd02dc, 4, base=16
+sfr = "CAN_MB6_MCR.MDLC", 	"Memory", 0xfffd02dc, 4, base=16, bitRange=16-19
+sfr = "CAN_MB6_MCR.MRTR", 	"Memory", 0xfffd02dc, 4, base=16, bitRange=20
+sfr = "CAN_MB6_MCR.MACR", 	"Memory", 0xfffd02dc, 4, base=16, bitRange=22
+sfr = "CAN_MB6_MCR.MTCR", 	"Memory", 0xfffd02dc, 4, base=16, bitRange=23
+; ========== Register definition for CAN_MB7 peripheral ========== 
+sfr = "CAN_MB7_MMR", 	"Memory", 0xfffd02e0, 4, base=16
+sfr = "CAN_MB7_MMR.MTIMEMARK", 	"Memory", 0xfffd02e0, 4, base=16, bitRange=0-15
+sfr = "CAN_MB7_MMR.PRIOR", 	"Memory", 0xfffd02e0, 4, base=16, bitRange=16-19
+sfr = "CAN_MB7_MMR.MOT", 	"Memory", 0xfffd02e0, 4, base=16, bitRange=24-26
+sfr = "CAN_MB7_MAM", 	"Memory", 0xfffd02e4, 4, base=16
+sfr = "CAN_MB7_MAM.MIDvB", 	"Memory", 0xfffd02e4, 4, base=16, bitRange=0-17
+sfr = "CAN_MB7_MAM.MIDvA", 	"Memory", 0xfffd02e4, 4, base=16, bitRange=18-28
+sfr = "CAN_MB7_MAM.MIDE", 	"Memory", 0xfffd02e4, 4, base=16, bitRange=29
+sfr = "CAN_MB7_MID", 	"Memory", 0xfffd02e8, 4, base=16
+sfr = "CAN_MB7_MID.MIDvB", 	"Memory", 0xfffd02e8, 4, base=16, bitRange=0-17
+sfr = "CAN_MB7_MID.MIDvA", 	"Memory", 0xfffd02e8, 4, base=16, bitRange=18-28
+sfr = "CAN_MB7_MID.MIDE", 	"Memory", 0xfffd02e8, 4, base=16, bitRange=29
+sfr = "CAN_MB7_MFID", 	"Memory", 0xfffd02ec, 4, base=16
+sfr = "CAN_MB7_MSR", 	"Memory", 0xfffd02f0, 4, base=16
+sfr = "CAN_MB7_MSR.MTIMESTAMP", 	"Memory", 0xfffd02f0, 4, base=16, bitRange=0-15
+sfr = "CAN_MB7_MSR.MDLC", 	"Memory", 0xfffd02f0, 4, base=16, bitRange=16-19
+sfr = "CAN_MB7_MSR.MRTR", 	"Memory", 0xfffd02f0, 4, base=16, bitRange=20
+sfr = "CAN_MB7_MSR.MABT", 	"Memory", 0xfffd02f0, 4, base=16, bitRange=22
+sfr = "CAN_MB7_MSR.MRDY", 	"Memory", 0xfffd02f0, 4, base=16, bitRange=23
+sfr = "CAN_MB7_MSR.MMI", 	"Memory", 0xfffd02f0, 4, base=16, bitRange=24
+sfr = "CAN_MB7_MDL", 	"Memory", 0xfffd02f4, 4, base=16
+sfr = "CAN_MB7_MDH", 	"Memory", 0xfffd02f8, 4, base=16
+sfr = "CAN_MB7_MCR", 	"Memory", 0xfffd02fc, 4, base=16
+sfr = "CAN_MB7_MCR.MDLC", 	"Memory", 0xfffd02fc, 4, base=16, bitRange=16-19
+sfr = "CAN_MB7_MCR.MRTR", 	"Memory", 0xfffd02fc, 4, base=16, bitRange=20
+sfr = "CAN_MB7_MCR.MACR", 	"Memory", 0xfffd02fc, 4, base=16, bitRange=22
+sfr = "CAN_MB7_MCR.MTCR", 	"Memory", 0xfffd02fc, 4, base=16, bitRange=23
+; ========== Register definition for CAN peripheral ========== 
+sfr = "CAN_MR", 	"Memory", 0xfffd0000, 4, base=16
+sfr = "CAN_MR.CANEN", 	"Memory", 0xfffd0000, 4, base=16, bitRange=0
+sfr = "CAN_MR.LPM", 	"Memory", 0xfffd0000, 4, base=16, bitRange=1
+sfr = "CAN_MR.ABM", 	"Memory", 0xfffd0000, 4, base=16, bitRange=2
+sfr = "CAN_MR.OVL", 	"Memory", 0xfffd0000, 4, base=16, bitRange=3
+sfr = "CAN_MR.TEOF", 	"Memory", 0xfffd0000, 4, base=16, bitRange=4
+sfr = "CAN_MR.TTM", 	"Memory", 0xfffd0000, 4, base=16, bitRange=5
+sfr = "CAN_MR.TIMFRZ", 	"Memory", 0xfffd0000, 4, base=16, bitRange=6
+sfr = "CAN_MR.DRPT", 	"Memory", 0xfffd0000, 4, base=16, bitRange=7
+sfr = "CAN_IER", 	"Memory", 0xfffd0004, 4, base=16
+sfr = "CAN_IER.MB0", 	"Memory", 0xfffd0004, 4, base=16, bitRange=0
+sfr = "CAN_IER.MB1", 	"Memory", 0xfffd0004, 4, base=16, bitRange=1
+sfr = "CAN_IER.MB2", 	"Memory", 0xfffd0004, 4, base=16, bitRange=2
+sfr = "CAN_IER.MB3", 	"Memory", 0xfffd0004, 4, base=16, bitRange=3
+sfr = "CAN_IER.MB4", 	"Memory", 0xfffd0004, 4, base=16, bitRange=4
+sfr = "CAN_IER.MB5", 	"Memory", 0xfffd0004, 4, base=16, bitRange=5
+sfr = "CAN_IER.MB6", 	"Memory", 0xfffd0004, 4, base=16, bitRange=6
+sfr = "CAN_IER.MB7", 	"Memory", 0xfffd0004, 4, base=16, bitRange=7
+sfr = "CAN_IER.MB8", 	"Memory", 0xfffd0004, 4, base=16, bitRange=8
+sfr = "CAN_IER.MB9", 	"Memory", 0xfffd0004, 4, base=16, bitRange=9
+sfr = "CAN_IER.MB10", 	"Memory", 0xfffd0004, 4, base=16, bitRange=10
+sfr = "CAN_IER.MB11", 	"Memory", 0xfffd0004, 4, base=16, bitRange=11
+sfr = "CAN_IER.MB12", 	"Memory", 0xfffd0004, 4, base=16, bitRange=12
+sfr = "CAN_IER.MB13", 	"Memory", 0xfffd0004, 4, base=16, bitRange=13
+sfr = "CAN_IER.MB14", 	"Memory", 0xfffd0004, 4, base=16, bitRange=14
+sfr = "CAN_IER.MB15", 	"Memory", 0xfffd0004, 4, base=16, bitRange=15
+sfr = "CAN_IER.ERRA", 	"Memory", 0xfffd0004, 4, base=16, bitRange=16
+sfr = "CAN_IER.WARN", 	"Memory", 0xfffd0004, 4, base=16, bitRange=17
+sfr = "CAN_IER.ERRP", 	"Memory", 0xfffd0004, 4, base=16, bitRange=18
+sfr = "CAN_IER.BOFF", 	"Memory", 0xfffd0004, 4, base=16, bitRange=19
+sfr = "CAN_IER.SLEEP", 	"Memory", 0xfffd0004, 4, base=16, bitRange=20
+sfr = "CAN_IER.WAKEUP", 	"Memory", 0xfffd0004, 4, base=16, bitRange=21
+sfr = "CAN_IER.TOVF", 	"Memory", 0xfffd0004, 4, base=16, bitRange=22
+sfr = "CAN_IER.TSTP", 	"Memory", 0xfffd0004, 4, base=16, bitRange=23
+sfr = "CAN_IER.CERR", 	"Memory", 0xfffd0004, 4, base=16, bitRange=24
+sfr = "CAN_IER.SERR", 	"Memory", 0xfffd0004, 4, base=16, bitRange=25
+sfr = "CAN_IER.AERR", 	"Memory", 0xfffd0004, 4, base=16, bitRange=26
+sfr = "CAN_IER.FERR", 	"Memory", 0xfffd0004, 4, base=16, bitRange=27
+sfr = "CAN_IER.BERR", 	"Memory", 0xfffd0004, 4, base=16, bitRange=28
+sfr = "CAN_IDR", 	"Memory", 0xfffd0008, 4, base=16
+sfr = "CAN_IDR.MB0", 	"Memory", 0xfffd0008, 4, base=16, bitRange=0
+sfr = "CAN_IDR.MB1", 	"Memory", 0xfffd0008, 4, base=16, bitRange=1
+sfr = "CAN_IDR.MB2", 	"Memory", 0xfffd0008, 4, base=16, bitRange=2
+sfr = "CAN_IDR.MB3", 	"Memory", 0xfffd0008, 4, base=16, bitRange=3
+sfr = "CAN_IDR.MB4", 	"Memory", 0xfffd0008, 4, base=16, bitRange=4
+sfr = "CAN_IDR.MB5", 	"Memory", 0xfffd0008, 4, base=16, bitRange=5
+sfr = "CAN_IDR.MB6", 	"Memory", 0xfffd0008, 4, base=16, bitRange=6
+sfr = "CAN_IDR.MB7", 	"Memory", 0xfffd0008, 4, base=16, bitRange=7
+sfr = "CAN_IDR.MB8", 	"Memory", 0xfffd0008, 4, base=16, bitRange=8
+sfr = "CAN_IDR.MB9", 	"Memory", 0xfffd0008, 4, base=16, bitRange=9
+sfr = "CAN_IDR.MB10", 	"Memory", 0xfffd0008, 4, base=16, bitRange=10
+sfr = "CAN_IDR.MB11", 	"Memory", 0xfffd0008, 4, base=16, bitRange=11
+sfr = "CAN_IDR.MB12", 	"Memory", 0xfffd0008, 4, base=16, bitRange=12
+sfr = "CAN_IDR.MB13", 	"Memory", 0xfffd0008, 4, base=16, bitRange=13
+sfr = "CAN_IDR.MB14", 	"Memory", 0xfffd0008, 4, base=16, bitRange=14
+sfr = "CAN_IDR.MB15", 	"Memory", 0xfffd0008, 4, base=16, bitRange=15
+sfr = "CAN_IDR.ERRA", 	"Memory", 0xfffd0008, 4, base=16, bitRange=16
+sfr = "CAN_IDR.WARN", 	"Memory", 0xfffd0008, 4, base=16, bitRange=17
+sfr = "CAN_IDR.ERRP", 	"Memory", 0xfffd0008, 4, base=16, bitRange=18
+sfr = "CAN_IDR.BOFF", 	"Memory", 0xfffd0008, 4, base=16, bitRange=19
+sfr = "CAN_IDR.SLEEP", 	"Memory", 0xfffd0008, 4, base=16, bitRange=20
+sfr = "CAN_IDR.WAKEUP", 	"Memory", 0xfffd0008, 4, base=16, bitRange=21
+sfr = "CAN_IDR.TOVF", 	"Memory", 0xfffd0008, 4, base=16, bitRange=22
+sfr = "CAN_IDR.TSTP", 	"Memory", 0xfffd0008, 4, base=16, bitRange=23
+sfr = "CAN_IDR.CERR", 	"Memory", 0xfffd0008, 4, base=16, bitRange=24
+sfr = "CAN_IDR.SERR", 	"Memory", 0xfffd0008, 4, base=16, bitRange=25
+sfr = "CAN_IDR.AERR", 	"Memory", 0xfffd0008, 4, base=16, bitRange=26
+sfr = "CAN_IDR.FERR", 	"Memory", 0xfffd0008, 4, base=16, bitRange=27
+sfr = "CAN_IDR.BERR", 	"Memory", 0xfffd0008, 4, base=16, bitRange=28
+sfr = "CAN_IMR", 	"Memory", 0xfffd000c, 4, base=16
+sfr = "CAN_IMR.MB0", 	"Memory", 0xfffd000c, 4, base=16, bitRange=0
+sfr = "CAN_IMR.MB1", 	"Memory", 0xfffd000c, 4, base=16, bitRange=1
+sfr = "CAN_IMR.MB2", 	"Memory", 0xfffd000c, 4, base=16, bitRange=2
+sfr = "CAN_IMR.MB3", 	"Memory", 0xfffd000c, 4, base=16, bitRange=3
+sfr = "CAN_IMR.MB4", 	"Memory", 0xfffd000c, 4, base=16, bitRange=4
+sfr = "CAN_IMR.MB5", 	"Memory", 0xfffd000c, 4, base=16, bitRange=5
+sfr = "CAN_IMR.MB6", 	"Memory", 0xfffd000c, 4, base=16, bitRange=6
+sfr = "CAN_IMR.MB7", 	"Memory", 0xfffd000c, 4, base=16, bitRange=7
+sfr = "CAN_IMR.MB8", 	"Memory", 0xfffd000c, 4, base=16, bitRange=8
+sfr = "CAN_IMR.MB9", 	"Memory", 0xfffd000c, 4, base=16, bitRange=9
+sfr = "CAN_IMR.MB10", 	"Memory", 0xfffd000c, 4, base=16, bitRange=10
+sfr = "CAN_IMR.MB11", 	"Memory", 0xfffd000c, 4, base=16, bitRange=11
+sfr = "CAN_IMR.MB12", 	"Memory", 0xfffd000c, 4, base=16, bitRange=12
+sfr = "CAN_IMR.MB13", 	"Memory", 0xfffd000c, 4, base=16, bitRange=13
+sfr = "CAN_IMR.MB14", 	"Memory", 0xfffd000c, 4, base=16, bitRange=14
+sfr = "CAN_IMR.MB15", 	"Memory", 0xfffd000c, 4, base=16, bitRange=15
+sfr = "CAN_IMR.ERRA", 	"Memory", 0xfffd000c, 4, base=16, bitRange=16
+sfr = "CAN_IMR.WARN", 	"Memory", 0xfffd000c, 4, base=16, bitRange=17
+sfr = "CAN_IMR.ERRP", 	"Memory", 0xfffd000c, 4, base=16, bitRange=18
+sfr = "CAN_IMR.BOFF", 	"Memory", 0xfffd000c, 4, base=16, bitRange=19
+sfr = "CAN_IMR.SLEEP", 	"Memory", 0xfffd000c, 4, base=16, bitRange=20
+sfr = "CAN_IMR.WAKEUP", 	"Memory", 0xfffd000c, 4, base=16, bitRange=21
+sfr = "CAN_IMR.TOVF", 	"Memory", 0xfffd000c, 4, base=16, bitRange=22
+sfr = "CAN_IMR.TSTP", 	"Memory", 0xfffd000c, 4, base=16, bitRange=23
+sfr = "CAN_IMR.CERR", 	"Memory", 0xfffd000c, 4, base=16, bitRange=24
+sfr = "CAN_IMR.SERR", 	"Memory", 0xfffd000c, 4, base=16, bitRange=25
+sfr = "CAN_IMR.AERR", 	"Memory", 0xfffd000c, 4, base=16, bitRange=26
+sfr = "CAN_IMR.FERR", 	"Memory", 0xfffd000c, 4, base=16, bitRange=27
+sfr = "CAN_IMR.BERR", 	"Memory", 0xfffd000c, 4, base=16, bitRange=28
+sfr = "CAN_SR", 	"Memory", 0xfffd0010, 4, base=16
+sfr = "CAN_SR.MB0", 	"Memory", 0xfffd0010, 4, base=16, bitRange=0
+sfr = "CAN_SR.MB1", 	"Memory", 0xfffd0010, 4, base=16, bitRange=1
+sfr = "CAN_SR.MB2", 	"Memory", 0xfffd0010, 4, base=16, bitRange=2
+sfr = "CAN_SR.MB3", 	"Memory", 0xfffd0010, 4, base=16, bitRange=3
+sfr = "CAN_SR.MB4", 	"Memory", 0xfffd0010, 4, base=16, bitRange=4
+sfr = "CAN_SR.MB5", 	"Memory", 0xfffd0010, 4, base=16, bitRange=5
+sfr = "CAN_SR.MB6", 	"Memory", 0xfffd0010, 4, base=16, bitRange=6
+sfr = "CAN_SR.MB7", 	"Memory", 0xfffd0010, 4, base=16, bitRange=7
+sfr = "CAN_SR.MB8", 	"Memory", 0xfffd0010, 4, base=16, bitRange=8
+sfr = "CAN_SR.MB9", 	"Memory", 0xfffd0010, 4, base=16, bitRange=9
+sfr = "CAN_SR.MB10", 	"Memory", 0xfffd0010, 4, base=16, bitRange=10
+sfr = "CAN_SR.MB11", 	"Memory", 0xfffd0010, 4, base=16, bitRange=11
+sfr = "CAN_SR.MB12", 	"Memory", 0xfffd0010, 4, base=16, bitRange=12
+sfr = "CAN_SR.MB13", 	"Memory", 0xfffd0010, 4, base=16, bitRange=13
+sfr = "CAN_SR.MB14", 	"Memory", 0xfffd0010, 4, base=16, bitRange=14
+sfr = "CAN_SR.MB15", 	"Memory", 0xfffd0010, 4, base=16, bitRange=15
+sfr = "CAN_SR.ERRA", 	"Memory", 0xfffd0010, 4, base=16, bitRange=16
+sfr = "CAN_SR.WARN", 	"Memory", 0xfffd0010, 4, base=16, bitRange=17
+sfr = "CAN_SR.ERRP", 	"Memory", 0xfffd0010, 4, base=16, bitRange=18
+sfr = "CAN_SR.BOFF", 	"Memory", 0xfffd0010, 4, base=16, bitRange=19
+sfr = "CAN_SR.SLEEP", 	"Memory", 0xfffd0010, 4, base=16, bitRange=20
+sfr = "CAN_SR.WAKEUP", 	"Memory", 0xfffd0010, 4, base=16, bitRange=21
+sfr = "CAN_SR.TOVF", 	"Memory", 0xfffd0010, 4, base=16, bitRange=22
+sfr = "CAN_SR.TSTP", 	"Memory", 0xfffd0010, 4, base=16, bitRange=23
+sfr = "CAN_SR.CERR", 	"Memory", 0xfffd0010, 4, base=16, bitRange=24
+sfr = "CAN_SR.SERR", 	"Memory", 0xfffd0010, 4, base=16, bitRange=25
+sfr = "CAN_SR.AERR", 	"Memory", 0xfffd0010, 4, base=16, bitRange=26
+sfr = "CAN_SR.FERR", 	"Memory", 0xfffd0010, 4, base=16, bitRange=27
+sfr = "CAN_SR.BERR", 	"Memory", 0xfffd0010, 4, base=16, bitRange=28
+sfr = "CAN_SR.RBSY", 	"Memory", 0xfffd0010, 4, base=16, bitRange=29
+sfr = "CAN_SR.TBSY", 	"Memory", 0xfffd0010, 4, base=16, bitRange=30
+sfr = "CAN_SR.OVLY", 	"Memory", 0xfffd0010, 4, base=16, bitRange=31
+sfr = "CAN_BR", 	"Memory", 0xfffd0014, 4, base=16
+sfr = "CAN_BR.PHASE2", 	"Memory", 0xfffd0014, 4, base=16, bitRange=0-2
+sfr = "CAN_BR.PHASE1", 	"Memory", 0xfffd0014, 4, base=16, bitRange=4-6
+sfr = "CAN_BR.PROPAG", 	"Memory", 0xfffd0014, 4, base=16, bitRange=8-10
+sfr = "CAN_BR.SYNC", 	"Memory", 0xfffd0014, 4, base=16, bitRange=12-13
+sfr = "CAN_BR.BRP", 	"Memory", 0xfffd0014, 4, base=16, bitRange=16-22
+sfr = "CAN_BR.SMP", 	"Memory", 0xfffd0014, 4, base=16, bitRange=24
+sfr = "CAN_TIM", 	"Memory", 0xfffd0018, 4, base=16
+sfr = "CAN_TIM.TIMER", 	"Memory", 0xfffd0018, 4, base=16, bitRange=0-15
+sfr = "CAN_TIMESTP", 	"Memory", 0xfffd001c, 4, base=16
+sfr = "CAN_TIMESTP.MTIMESTAMP", 	"Memory", 0xfffd001c, 4, base=16, bitRange=0-15
+sfr = "CAN_ECR", 	"Memory", 0xfffd0020, 4, base=16
+sfr = "CAN_ECR.REC", 	"Memory", 0xfffd0020, 4, base=16, bitRange=0-7
+sfr = "CAN_ECR.TEC", 	"Memory", 0xfffd0020, 4, base=16, bitRange=16-23
+sfr = "CAN_TCR", 	"Memory", 0xfffd0024, 4, base=16
+sfr = "CAN_TCR.MB0", 	"Memory", 0xfffd0024, 4, base=16, bitRange=0
+sfr = "CAN_TCR.MB1", 	"Memory", 0xfffd0024, 4, base=16, bitRange=1
+sfr = "CAN_TCR.MB2", 	"Memory", 0xfffd0024, 4, base=16, bitRange=2
+sfr = "CAN_TCR.MB3", 	"Memory", 0xfffd0024, 4, base=16, bitRange=3
+sfr = "CAN_TCR.MB4", 	"Memory", 0xfffd0024, 4, base=16, bitRange=4
+sfr = "CAN_TCR.MB5", 	"Memory", 0xfffd0024, 4, base=16, bitRange=5
+sfr = "CAN_TCR.MB6", 	"Memory", 0xfffd0024, 4, base=16, bitRange=6
+sfr = "CAN_TCR.MB7", 	"Memory", 0xfffd0024, 4, base=16, bitRange=7
+sfr = "CAN_TCR.MB8", 	"Memory", 0xfffd0024, 4, base=16, bitRange=8
+sfr = "CAN_TCR.MB9", 	"Memory", 0xfffd0024, 4, base=16, bitRange=9
+sfr = "CAN_TCR.MB10", 	"Memory", 0xfffd0024, 4, base=16, bitRange=10
+sfr = "CAN_TCR.MB11", 	"Memory", 0xfffd0024, 4, base=16, bitRange=11
+sfr = "CAN_TCR.MB12", 	"Memory", 0xfffd0024, 4, base=16, bitRange=12
+sfr = "CAN_TCR.MB13", 	"Memory", 0xfffd0024, 4, base=16, bitRange=13
+sfr = "CAN_TCR.MB14", 	"Memory", 0xfffd0024, 4, base=16, bitRange=14
+sfr = "CAN_TCR.MB15", 	"Memory", 0xfffd0024, 4, base=16, bitRange=15
+sfr = "CAN_TCR.TIMRST", 	"Memory", 0xfffd0024, 4, base=16, bitRange=31
+sfr = "CAN_ACR", 	"Memory", 0xfffd0028, 4, base=16
+sfr = "CAN_ACR.MB0", 	"Memory", 0xfffd0028, 4, base=16, bitRange=0
+sfr = "CAN_ACR.MB1", 	"Memory", 0xfffd0028, 4, base=16, bitRange=1
+sfr = "CAN_ACR.MB2", 	"Memory", 0xfffd0028, 4, base=16, bitRange=2
+sfr = "CAN_ACR.MB3", 	"Memory", 0xfffd0028, 4, base=16, bitRange=3
+sfr = "CAN_ACR.MB4", 	"Memory", 0xfffd0028, 4, base=16, bitRange=4
+sfr = "CAN_ACR.MB5", 	"Memory", 0xfffd0028, 4, base=16, bitRange=5
+sfr = "CAN_ACR.MB6", 	"Memory", 0xfffd0028, 4, base=16, bitRange=6
+sfr = "CAN_ACR.MB7", 	"Memory", 0xfffd0028, 4, base=16, bitRange=7
+sfr = "CAN_ACR.MB8", 	"Memory", 0xfffd0028, 4, base=16, bitRange=8
+sfr = "CAN_ACR.MB9", 	"Memory", 0xfffd0028, 4, base=16, bitRange=9
+sfr = "CAN_ACR.MB10", 	"Memory", 0xfffd0028, 4, base=16, bitRange=10
+sfr = "CAN_ACR.MB11", 	"Memory", 0xfffd0028, 4, base=16, bitRange=11
+sfr = "CAN_ACR.MB12", 	"Memory", 0xfffd0028, 4, base=16, bitRange=12
+sfr = "CAN_ACR.MB13", 	"Memory", 0xfffd0028, 4, base=16, bitRange=13
+sfr = "CAN_ACR.MB14", 	"Memory", 0xfffd0028, 4, base=16, bitRange=14
+sfr = "CAN_ACR.MB15", 	"Memory", 0xfffd0028, 4, base=16, bitRange=15
+sfr = "CAN_VR", 	"Memory", 0xfffd00fc, 4, base=16
+; ========== Register definition for EMAC peripheral ========== 
+sfr = "EMAC_NCR", 	"Memory", 0xfffdc000, 4, base=16
+sfr = "EMAC_NCR.LB", 	"Memory", 0xfffdc000, 4, base=16, bitRange=0
+sfr = "EMAC_NCR.LLB", 	"Memory", 0xfffdc000, 4, base=16, bitRange=1
+sfr = "EMAC_NCR.RE", 	"Memory", 0xfffdc000, 4, base=16, bitRange=2
+sfr = "EMAC_NCR.TE", 	"Memory", 0xfffdc000, 4, base=16, bitRange=3
+sfr = "EMAC_NCR.MPE", 	"Memory", 0xfffdc000, 4, base=16, bitRange=4
+sfr = "EMAC_NCR.CLRSTAT", 	"Memory", 0xfffdc000, 4, base=16, bitRange=5
+sfr = "EMAC_NCR.INCSTAT", 	"Memory", 0xfffdc000, 4, base=16, bitRange=6
+sfr = "EMAC_NCR.WESTAT", 	"Memory", 0xfffdc000, 4, base=16, bitRange=7
+sfr = "EMAC_NCR.BP", 	"Memory", 0xfffdc000, 4, base=16, bitRange=8
+sfr = "EMAC_NCR.TSTART", 	"Memory", 0xfffdc000, 4, base=16, bitRange=9
+sfr = "EMAC_NCR.THALT", 	"Memory", 0xfffdc000, 4, base=16, bitRange=10
+sfr = "EMAC_NCR.TPFR", 	"Memory", 0xfffdc000, 4, base=16, bitRange=11
+sfr = "EMAC_NCR.TZQ", 	"Memory", 0xfffdc000, 4, base=16, bitRange=12
+sfr = "EMAC_NCFGR", 	"Memory", 0xfffdc004, 4, base=16
+sfr = "EMAC_NCFGR.SPD", 	"Memory", 0xfffdc004, 4, base=16, bitRange=0
+sfr = "EMAC_NCFGR.FD", 	"Memory", 0xfffdc004, 4, base=16, bitRange=1
+sfr = "EMAC_NCFGR.JFRAME", 	"Memory", 0xfffdc004, 4, base=16, bitRange=3
+sfr = "EMAC_NCFGR.CAF", 	"Memory", 0xfffdc004, 4, base=16, bitRange=4
+sfr = "EMAC_NCFGR.NBC", 	"Memory", 0xfffdc004, 4, base=16, bitRange=5
+sfr = "EMAC_NCFGR.MTI", 	"Memory", 0xfffdc004, 4, base=16, bitRange=6
+sfr = "EMAC_NCFGR.UNI", 	"Memory", 0xfffdc004, 4, base=16, bitRange=7
+sfr = "EMAC_NCFGR.BIG", 	"Memory", 0xfffdc004, 4, base=16, bitRange=8
+sfr = "EMAC_NCFGR.EAE", 	"Memory", 0xfffdc004, 4, base=16, bitRange=9
+sfr = "EMAC_NCFGR.CLK", 	"Memory", 0xfffdc004, 4, base=16, bitRange=10-11
+sfr = "EMAC_NCFGR.RTY", 	"Memory", 0xfffdc004, 4, base=16, bitRange=12
+sfr = "EMAC_NCFGR.PAE", 	"Memory", 0xfffdc004, 4, base=16, bitRange=13
+sfr = "EMAC_NCFGR.RBOF", 	"Memory", 0xfffdc004, 4, base=16, bitRange=14-15
+sfr = "EMAC_NCFGR.RLCE", 	"Memory", 0xfffdc004, 4, base=16, bitRange=16
+sfr = "EMAC_NCFGR.DRFCS", 	"Memory", 0xfffdc004, 4, base=16, bitRange=17
+sfr = "EMAC_NCFGR.EFRHD", 	"Memory", 0xfffdc004, 4, base=16, bitRange=18
+sfr = "EMAC_NCFGR.IRXFCS", 	"Memory", 0xfffdc004, 4, base=16, bitRange=19
+sfr = "EMAC_NSR", 	"Memory", 0xfffdc008, 4, base=16
+sfr = "EMAC_NSR.LINKR", 	"Memory", 0xfffdc008, 4, base=16, bitRange=0
+sfr = "EMAC_NSR.MDIO", 	"Memory", 0xfffdc008, 4, base=16, bitRange=1
+sfr = "EMAC_NSR.IDLE", 	"Memory", 0xfffdc008, 4, base=16, bitRange=2
+sfr = "EMAC_TSR", 	"Memory", 0xfffdc014, 4, base=16
+sfr = "EMAC_TSR.UBR", 	"Memory", 0xfffdc014, 4, base=16, bitRange=0
+sfr = "EMAC_TSR.COL", 	"Memory", 0xfffdc014, 4, base=16, bitRange=1
+sfr = "EMAC_TSR.RLES", 	"Memory", 0xfffdc014, 4, base=16, bitRange=2
+sfr = "EMAC_TSR.TGO", 	"Memory", 0xfffdc014, 4, base=16, bitRange=3
+sfr = "EMAC_TSR.BEX", 	"Memory", 0xfffdc014, 4, base=16, bitRange=4
+sfr = "EMAC_TSR.COMP", 	"Memory", 0xfffdc014, 4, base=16, bitRange=5
+sfr = "EMAC_TSR.UND", 	"Memory", 0xfffdc014, 4, base=16, bitRange=6
+sfr = "EMAC_RBQP", 	"Memory", 0xfffdc018, 4, base=16
+sfr = "EMAC_TBQP", 	"Memory", 0xfffdc01c, 4, base=16
+sfr = "EMAC_RSR", 	"Memory", 0xfffdc020, 4, base=16
+sfr = "EMAC_RSR.BNA", 	"Memory", 0xfffdc020, 4, base=16, bitRange=0
+sfr = "EMAC_RSR.REC", 	"Memory", 0xfffdc020, 4, base=16, bitRange=1
+sfr = "EMAC_RSR.OVR", 	"Memory", 0xfffdc020, 4, base=16, bitRange=2
+sfr = "EMAC_ISR", 	"Memory", 0xfffdc024, 4, base=16
+sfr = "EMAC_ISR.MFD", 	"Memory", 0xfffdc024, 4, base=16, bitRange=0
+sfr = "EMAC_ISR.RCOMP", 	"Memory", 0xfffdc024, 4, base=16, bitRange=1
+sfr = "EMAC_ISR.RXUBR", 	"Memory", 0xfffdc024, 4, base=16, bitRange=2
+sfr = "EMAC_ISR.TXUBR", 	"Memory", 0xfffdc024, 4, base=16, bitRange=3
+sfr = "EMAC_ISR.TUNDR", 	"Memory", 0xfffdc024, 4, base=16, bitRange=4
+sfr = "EMAC_ISR.RLEX", 	"Memory", 0xfffdc024, 4, base=16, bitRange=5
+sfr = "EMAC_ISR.TXERR", 	"Memory", 0xfffdc024, 4, base=16, bitRange=6
+sfr = "EMAC_ISR.TCOMP", 	"Memory", 0xfffdc024, 4, base=16, bitRange=7
+sfr = "EMAC_ISR.LINK", 	"Memory", 0xfffdc024, 4, base=16, bitRange=9
+sfr = "EMAC_ISR.ROVR", 	"Memory", 0xfffdc024, 4, base=16, bitRange=10
+sfr = "EMAC_ISR.HRESP", 	"Memory", 0xfffdc024, 4, base=16, bitRange=11
+sfr = "EMAC_ISR.PFRE", 	"Memory", 0xfffdc024, 4, base=16, bitRange=12
+sfr = "EMAC_ISR.PTZ", 	"Memory", 0xfffdc024, 4, base=16, bitRange=13
+sfr = "EMAC_IER", 	"Memory", 0xfffdc028, 4, base=16
+sfr = "EMAC_IER.MFD", 	"Memory", 0xfffdc028, 4, base=16, bitRange=0
+sfr = "EMAC_IER.RCOMP", 	"Memory", 0xfffdc028, 4, base=16, bitRange=1
+sfr = "EMAC_IER.RXUBR", 	"Memory", 0xfffdc028, 4, base=16, bitRange=2
+sfr = "EMAC_IER.TXUBR", 	"Memory", 0xfffdc028, 4, base=16, bitRange=3
+sfr = "EMAC_IER.TUNDR", 	"Memory", 0xfffdc028, 4, base=16, bitRange=4
+sfr = "EMAC_IER.RLEX", 	"Memory", 0xfffdc028, 4, base=16, bitRange=5
+sfr = "EMAC_IER.TXERR", 	"Memory", 0xfffdc028, 4, base=16, bitRange=6
+sfr = "EMAC_IER.TCOMP", 	"Memory", 0xfffdc028, 4, base=16, bitRange=7
+sfr = "EMAC_IER.LINK", 	"Memory", 0xfffdc028, 4, base=16, bitRange=9
+sfr = "EMAC_IER.ROVR", 	"Memory", 0xfffdc028, 4, base=16, bitRange=10
+sfr = "EMAC_IER.HRESP", 	"Memory", 0xfffdc028, 4, base=16, bitRange=11
+sfr = "EMAC_IER.PFRE", 	"Memory", 0xfffdc028, 4, base=16, bitRange=12
+sfr = "EMAC_IER.PTZ", 	"Memory", 0xfffdc028, 4, base=16, bitRange=13
+sfr = "EMAC_IDR", 	"Memory", 0xfffdc02c, 4, base=16
+sfr = "EMAC_IDR.MFD", 	"Memory", 0xfffdc02c, 4, base=16, bitRange=0
+sfr = "EMAC_IDR.RCOMP", 	"Memory", 0xfffdc02c, 4, base=16, bitRange=1
+sfr = "EMAC_IDR.RXUBR", 	"Memory", 0xfffdc02c, 4, base=16, bitRange=2
+sfr = "EMAC_IDR.TXUBR", 	"Memory", 0xfffdc02c, 4, base=16, bitRange=3
+sfr = "EMAC_IDR.TUNDR", 	"Memory", 0xfffdc02c, 4, base=16, bitRange=4
+sfr = "EMAC_IDR.RLEX", 	"Memory", 0xfffdc02c, 4, base=16, bitRange=5
+sfr = "EMAC_IDR.TXERR", 	"Memory", 0xfffdc02c, 4, base=16, bitRange=6
+sfr = "EMAC_IDR.TCOMP", 	"Memory", 0xfffdc02c, 4, base=16, bitRange=7
+sfr = "EMAC_IDR.LINK", 	"Memory", 0xfffdc02c, 4, base=16, bitRange=9
+sfr = "EMAC_IDR.ROVR", 	"Memory", 0xfffdc02c, 4, base=16, bitRange=10
+sfr = "EMAC_IDR.HRESP", 	"Memory", 0xfffdc02c, 4, base=16, bitRange=11
+sfr = "EMAC_IDR.PFRE", 	"Memory", 0xfffdc02c, 4, base=16, bitRange=12
+sfr = "EMAC_IDR.PTZ", 	"Memory", 0xfffdc02c, 4, base=16, bitRange=13
+sfr = "EMAC_IMR", 	"Memory", 0xfffdc030, 4, base=16
+sfr = "EMAC_IMR.MFD", 	"Memory", 0xfffdc030, 4, base=16, bitRange=0
+sfr = "EMAC_IMR.RCOMP", 	"Memory", 0xfffdc030, 4, base=16, bitRange=1
+sfr = "EMAC_IMR.RXUBR", 	"Memory", 0xfffdc030, 4, base=16, bitRange=2
+sfr = "EMAC_IMR.TXUBR", 	"Memory", 0xfffdc030, 4, base=16, bitRange=3
+sfr = "EMAC_IMR.TUNDR", 	"Memory", 0xfffdc030, 4, base=16, bitRange=4
+sfr = "EMAC_IMR.RLEX", 	"Memory", 0xfffdc030, 4, base=16, bitRange=5
+sfr = "EMAC_IMR.TXERR", 	"Memory", 0xfffdc030, 4, base=16, bitRange=6
+sfr = "EMAC_IMR.TCOMP", 	"Memory", 0xfffdc030, 4, base=16, bitRange=7
+sfr = "EMAC_IMR.LINK", 	"Memory", 0xfffdc030, 4, base=16, bitRange=9
+sfr = "EMAC_IMR.ROVR", 	"Memory", 0xfffdc030, 4, base=16, bitRange=10
+sfr = "EMAC_IMR.HRESP", 	"Memory", 0xfffdc030, 4, base=16, bitRange=11
+sfr = "EMAC_IMR.PFRE", 	"Memory", 0xfffdc030, 4, base=16, bitRange=12
+sfr = "EMAC_IMR.PTZ", 	"Memory", 0xfffdc030, 4, base=16, bitRange=13
+sfr = "EMAC_MAN", 	"Memory", 0xfffdc034, 4, base=16
+sfr = "EMAC_MAN.DATA", 	"Memory", 0xfffdc034, 4, base=16, bitRange=0-15
+sfr = "EMAC_MAN.CODE", 	"Memory", 0xfffdc034, 4, base=16, bitRange=16-17
+sfr = "EMAC_MAN.REGA", 	"Memory", 0xfffdc034, 4, base=16, bitRange=18-22
+sfr = "EMAC_MAN.PHYA", 	"Memory", 0xfffdc034, 4, base=16, bitRange=23-27
+sfr = "EMAC_MAN.RW", 	"Memory", 0xfffdc034, 4, base=16, bitRange=28-29
+sfr = "EMAC_MAN.SOF", 	"Memory", 0xfffdc034, 4, base=16, bitRange=30-31
+sfr = "EMAC_PTR", 	"Memory", 0xfffdc038, 4, base=16
+sfr = "EMAC_PFR", 	"Memory", 0xfffdc03c, 4, base=16
+sfr = "EMAC_FTO", 	"Memory", 0xfffdc040, 4, base=16
+sfr = "EMAC_SCF", 	"Memory", 0xfffdc044, 4, base=16
+sfr = "EMAC_MCF", 	"Memory", 0xfffdc048, 4, base=16
+sfr = "EMAC_FRO", 	"Memory", 0xfffdc04c, 4, base=16
+sfr = "EMAC_FCSE", 	"Memory", 0xfffdc050, 4, base=16
+sfr = "EMAC_ALE", 	"Memory", 0xfffdc054, 4, base=16
+sfr = "EMAC_DTF", 	"Memory", 0xfffdc058, 4, base=16
+sfr = "EMAC_LCOL", 	"Memory", 0xfffdc05c, 4, base=16
+sfr = "EMAC_ECOL", 	"Memory", 0xfffdc060, 4, base=16
+sfr = "EMAC_TUND", 	"Memory", 0xfffdc064, 4, base=16
+sfr = "EMAC_CSE", 	"Memory", 0xfffdc068, 4, base=16
+sfr = "EMAC_RRE", 	"Memory", 0xfffdc06c, 4, base=16
+sfr = "EMAC_ROV", 	"Memory", 0xfffdc070, 4, base=16
+sfr = "EMAC_RSE", 	"Memory", 0xfffdc074, 4, base=16
+sfr = "EMAC_ELE", 	"Memory", 0xfffdc078, 4, base=16
+sfr = "EMAC_RJA", 	"Memory", 0xfffdc07c, 4, base=16
+sfr = "EMAC_USF", 	"Memory", 0xfffdc080, 4, base=16
+sfr = "EMAC_STE", 	"Memory", 0xfffdc084, 4, base=16
+sfr = "EMAC_RLE", 	"Memory", 0xfffdc088, 4, base=16
+sfr = "EMAC_TPF", 	"Memory", 0xfffdc08c, 4, base=16
+sfr = "EMAC_HRB", 	"Memory", 0xfffdc090, 4, base=16
+sfr = "EMAC_HRT", 	"Memory", 0xfffdc094, 4, base=16
+sfr = "EMAC_SA1L", 	"Memory", 0xfffdc098, 4, base=16
+sfr = "EMAC_SA1H", 	"Memory", 0xfffdc09c, 4, base=16
+sfr = "EMAC_SA2L", 	"Memory", 0xfffdc0a0, 4, base=16
+sfr = "EMAC_SA2H", 	"Memory", 0xfffdc0a4, 4, base=16
+sfr = "EMAC_SA3L", 	"Memory", 0xfffdc0a8, 4, base=16
+sfr = "EMAC_SA3H", 	"Memory", 0xfffdc0ac, 4, base=16
+sfr = "EMAC_SA4L", 	"Memory", 0xfffdc0b0, 4, base=16
+sfr = "EMAC_SA4H", 	"Memory", 0xfffdc0b4, 4, base=16
+sfr = "EMAC_TID", 	"Memory", 0xfffdc0b8, 4, base=16
+sfr = "EMAC_TPQ", 	"Memory", 0xfffdc0bc, 4, base=16
+sfr = "EMAC_USRIO", 	"Memory", 0xfffdc0c0, 4, base=16
+sfr = "EMAC_USRIO.RMII", 	"Memory", 0xfffdc0c0, 4, base=16, bitRange=0
+sfr = "EMAC_USRIO.CLKEN", 	"Memory", 0xfffdc0c0, 4, base=16, bitRange=1
+sfr = "EMAC_WOL", 	"Memory", 0xfffdc0c4, 4, base=16
+sfr = "EMAC_WOL.IP", 	"Memory", 0xfffdc0c4, 4, base=16, bitRange=0-15
+sfr = "EMAC_WOL.MAG", 	"Memory", 0xfffdc0c4, 4, base=16, bitRange=16
+sfr = "EMAC_WOL.ARP", 	"Memory", 0xfffdc0c4, 4, base=16, bitRange=17
+sfr = "EMAC_WOL.SA1", 	"Memory", 0xfffdc0c4, 4, base=16, bitRange=18
+sfr = "EMAC_WOL.MTI", 	"Memory", 0xfffdc0c4, 4, base=16, bitRange=19
+sfr = "EMAC_REV", 	"Memory", 0xfffdc0fc, 4, base=16
+sfr = "EMAC_REV.REVREF", 	"Memory", 0xfffdc0fc, 4, base=16, bitRange=0-15
+sfr = "EMAC_REV.PARTREF", 	"Memory", 0xfffdc0fc, 4, base=16, bitRange=16-31
+; ========== Register definition for PDC_ADC peripheral ========== 
+sfr = "ADC_RPR", 	"Memory", 0xfffd8100, 4, base=16
+sfr = "ADC_RCR", 	"Memory", 0xfffd8104, 4, base=16
+sfr = "ADC_TPR", 	"Memory", 0xfffd8108, 4, base=16
+sfr = "ADC_TCR", 	"Memory", 0xfffd810c, 4, base=16
+sfr = "ADC_RNPR", 	"Memory", 0xfffd8110, 4, base=16
+sfr = "ADC_RNCR", 	"Memory", 0xfffd8114, 4, base=16
+sfr = "ADC_TNPR", 	"Memory", 0xfffd8118, 4, base=16
+sfr = "ADC_TNCR", 	"Memory", 0xfffd811c, 4, base=16
+sfr = "ADC_PTCR", 	"Memory", 0xfffd8120, 4, base=16
+sfr = "ADC_PTCR.RXTEN", 	"Memory", 0xfffd8120, 4, base=16, bitRange=0
+sfr = "ADC_PTCR.RXTDIS", 	"Memory", 0xfffd8120, 4, base=16, bitRange=1
+sfr = "ADC_PTCR.TXTEN", 	"Memory", 0xfffd8120, 4, base=16, bitRange=8
+sfr = "ADC_PTCR.TXTDIS", 	"Memory", 0xfffd8120, 4, base=16, bitRange=9
+sfr = "ADC_PTSR", 	"Memory", 0xfffd8124, 4, base=16
+sfr = "ADC_PTSR.RXTEN", 	"Memory", 0xfffd8124, 4, base=16, bitRange=0
+sfr = "ADC_PTSR.TXTEN", 	"Memory", 0xfffd8124, 4, base=16, bitRange=8
+; ========== Register definition for ADC peripheral ========== 
+sfr = "ADC_CR", 	"Memory", 0xfffd8000, 4, base=16
+sfr = "ADC_CR.SWRST", 	"Memory", 0xfffd8000, 4, base=16, bitRange=0
+sfr = "ADC_CR.START", 	"Memory", 0xfffd8000, 4, base=16, bitRange=1
+sfr = "ADC_MR", 	"Memory", 0xfffd8004, 4, base=16
+sfr = "ADC_MR.TRGEN", 	"Memory", 0xfffd8004, 4, base=16, bitRange=0
+sfr = "ADC_MR.TRGSEL", 	"Memory", 0xfffd8004, 4, base=16, bitRange=1-3
+sfr = "ADC_MR.LOWRES", 	"Memory", 0xfffd8004, 4, base=16, bitRange=4
+sfr = "ADC_MR.SLEEP", 	"Memory", 0xfffd8004, 4, base=16, bitRange=5
+sfr = "ADC_MR.PRESCAL", 	"Memory", 0xfffd8004, 4, base=16, bitRange=8-13
+sfr = "ADC_MR.STARTUP", 	"Memory", 0xfffd8004, 4, base=16, bitRange=16-20
+sfr = "ADC_MR.SHTIM", 	"Memory", 0xfffd8004, 4, base=16, bitRange=24-27
+sfr = "ADC_CHER", 	"Memory", 0xfffd8010, 4, base=16
+sfr = "ADC_CHER.CH0", 	"Memory", 0xfffd8010, 4, base=16, bitRange=0
+sfr = "ADC_CHER.CH1", 	"Memory", 0xfffd8010, 4, base=16, bitRange=1
+sfr = "ADC_CHER.CH2", 	"Memory", 0xfffd8010, 4, base=16, bitRange=2
+sfr = "ADC_CHER.CH3", 	"Memory", 0xfffd8010, 4, base=16, bitRange=3
+sfr = "ADC_CHER.CH4", 	"Memory", 0xfffd8010, 4, base=16, bitRange=4
+sfr = "ADC_CHER.CH5", 	"Memory", 0xfffd8010, 4, base=16, bitRange=5
+sfr = "ADC_CHER.CH6", 	"Memory", 0xfffd8010, 4, base=16, bitRange=6
+sfr = "ADC_CHER.CH7", 	"Memory", 0xfffd8010, 4, base=16, bitRange=7
+sfr = "ADC_CHDR", 	"Memory", 0xfffd8014, 4, base=16
+sfr = "ADC_CHDR.CH0", 	"Memory", 0xfffd8014, 4, base=16, bitRange=0
+sfr = "ADC_CHDR.CH1", 	"Memory", 0xfffd8014, 4, base=16, bitRange=1
+sfr = "ADC_CHDR.CH2", 	"Memory", 0xfffd8014, 4, base=16, bitRange=2
+sfr = "ADC_CHDR.CH3", 	"Memory", 0xfffd8014, 4, base=16, bitRange=3
+sfr = "ADC_CHDR.CH4", 	"Memory", 0xfffd8014, 4, base=16, bitRange=4
+sfr = "ADC_CHDR.CH5", 	"Memory", 0xfffd8014, 4, base=16, bitRange=5
+sfr = "ADC_CHDR.CH6", 	"Memory", 0xfffd8014, 4, base=16, bitRange=6
+sfr = "ADC_CHDR.CH7", 	"Memory", 0xfffd8014, 4, base=16, bitRange=7
+sfr = "ADC_CHSR", 	"Memory", 0xfffd8018, 4, base=16
+sfr = "ADC_CHSR.CH0", 	"Memory", 0xfffd8018, 4, base=16, bitRange=0
+sfr = "ADC_CHSR.CH1", 	"Memory", 0xfffd8018, 4, base=16, bitRange=1
+sfr = "ADC_CHSR.CH2", 	"Memory", 0xfffd8018, 4, base=16, bitRange=2
+sfr = "ADC_CHSR.CH3", 	"Memory", 0xfffd8018, 4, base=16, bitRange=3
+sfr = "ADC_CHSR.CH4", 	"Memory", 0xfffd8018, 4, base=16, bitRange=4
+sfr = "ADC_CHSR.CH5", 	"Memory", 0xfffd8018, 4, base=16, bitRange=5
+sfr = "ADC_CHSR.CH6", 	"Memory", 0xfffd8018, 4, base=16, bitRange=6
+sfr = "ADC_CHSR.CH7", 	"Memory", 0xfffd8018, 4, base=16, bitRange=7
+sfr = "ADC_SR", 	"Memory", 0xfffd801c, 4, base=16
+sfr = "ADC_SR.EOC0", 	"Memory", 0xfffd801c, 4, base=16, bitRange=0
+sfr = "ADC_SR.EOC1", 	"Memory", 0xfffd801c, 4, base=16, bitRange=1
+sfr = "ADC_SR.EOC2", 	"Memory", 0xfffd801c, 4, base=16, bitRange=2
+sfr = "ADC_SR.EOC3", 	"Memory", 0xfffd801c, 4, base=16, bitRange=3
+sfr = "ADC_SR.EOC4", 	"Memory", 0xfffd801c, 4, base=16, bitRange=4
+sfr = "ADC_SR.EOC5", 	"Memory", 0xfffd801c, 4, base=16, bitRange=5
+sfr = "ADC_SR.EOC6", 	"Memory", 0xfffd801c, 4, base=16, bitRange=6
+sfr = "ADC_SR.EOC7", 	"Memory", 0xfffd801c, 4, base=16, bitRange=7
+sfr = "ADC_SR.OVRE0", 	"Memory", 0xfffd801c, 4, base=16, bitRange=8
+sfr = "ADC_SR.OVRE1", 	"Memory", 0xfffd801c, 4, base=16, bitRange=9
+sfr = "ADC_SR.OVRE2", 	"Memory", 0xfffd801c, 4, base=16, bitRange=10
+sfr = "ADC_SR.OVRE3", 	"Memory", 0xfffd801c, 4, base=16, bitRange=11
+sfr = "ADC_SR.OVRE4", 	"Memory", 0xfffd801c, 4, base=16, bitRange=12
+sfr = "ADC_SR.OVRE5", 	"Memory", 0xfffd801c, 4, base=16, bitRange=13
+sfr = "ADC_SR.OVRE6", 	"Memory", 0xfffd801c, 4, base=16, bitRange=14
+sfr = "ADC_SR.OVRE7", 	"Memory", 0xfffd801c, 4, base=16, bitRange=15
+sfr = "ADC_SR.DRDY", 	"Memory", 0xfffd801c, 4, base=16, bitRange=16
+sfr = "ADC_SR.GOVRE", 	"Memory", 0xfffd801c, 4, base=16, bitRange=17
+sfr = "ADC_SR.ENDRX", 	"Memory", 0xfffd801c, 4, base=16, bitRange=18
+sfr = "ADC_SR.RXBUFF", 	"Memory", 0xfffd801c, 4, base=16, bitRange=19
+sfr = "ADC_LCDR", 	"Memory", 0xfffd8020, 4, base=16
+sfr = "ADC_LCDR.LDATA", 	"Memory", 0xfffd8020, 4, base=16, bitRange=0-9
+sfr = "ADC_IER", 	"Memory", 0xfffd8024, 4, base=16
+sfr = "ADC_IER.EOC0", 	"Memory", 0xfffd8024, 4, base=16, bitRange=0
+sfr = "ADC_IER.EOC1", 	"Memory", 0xfffd8024, 4, base=16, bitRange=1
+sfr = "ADC_IER.EOC2", 	"Memory", 0xfffd8024, 4, base=16, bitRange=2
+sfr = "ADC_IER.EOC3", 	"Memory", 0xfffd8024, 4, base=16, bitRange=3
+sfr = "ADC_IER.EOC4", 	"Memory", 0xfffd8024, 4, base=16, bitRange=4
+sfr = "ADC_IER.EOC5", 	"Memory", 0xfffd8024, 4, base=16, bitRange=5
+sfr = "ADC_IER.EOC6", 	"Memory", 0xfffd8024, 4, base=16, bitRange=6
+sfr = "ADC_IER.EOC7", 	"Memory", 0xfffd8024, 4, base=16, bitRange=7
+sfr = "ADC_IER.OVRE0", 	"Memory", 0xfffd8024, 4, base=16, bitRange=8
+sfr = "ADC_IER.OVRE1", 	"Memory", 0xfffd8024, 4, base=16, bitRange=9
+sfr = "ADC_IER.OVRE2", 	"Memory", 0xfffd8024, 4, base=16, bitRange=10
+sfr = "ADC_IER.OVRE3", 	"Memory", 0xfffd8024, 4, base=16, bitRange=11
+sfr = "ADC_IER.OVRE4", 	"Memory", 0xfffd8024, 4, base=16, bitRange=12
+sfr = "ADC_IER.OVRE5", 	"Memory", 0xfffd8024, 4, base=16, bitRange=13
+sfr = "ADC_IER.OVRE6", 	"Memory", 0xfffd8024, 4, base=16, bitRange=14
+sfr = "ADC_IER.OVRE7", 	"Memory", 0xfffd8024, 4, base=16, bitRange=15
+sfr = "ADC_IER.DRDY", 	"Memory", 0xfffd8024, 4, base=16, bitRange=16
+sfr = "ADC_IER.GOVRE", 	"Memory", 0xfffd8024, 4, base=16, bitRange=17
+sfr = "ADC_IER.ENDRX", 	"Memory", 0xfffd8024, 4, base=16, bitRange=18
+sfr = "ADC_IER.RXBUFF", 	"Memory", 0xfffd8024, 4, base=16, bitRange=19
+sfr = "ADC_IDR", 	"Memory", 0xfffd8028, 4, base=16
+sfr = "ADC_IDR.EOC0", 	"Memory", 0xfffd8028, 4, base=16, bitRange=0
+sfr = "ADC_IDR.EOC1", 	"Memory", 0xfffd8028, 4, base=16, bitRange=1
+sfr = "ADC_IDR.EOC2", 	"Memory", 0xfffd8028, 4, base=16, bitRange=2
+sfr = "ADC_IDR.EOC3", 	"Memory", 0xfffd8028, 4, base=16, bitRange=3
+sfr = "ADC_IDR.EOC4", 	"Memory", 0xfffd8028, 4, base=16, bitRange=4
+sfr = "ADC_IDR.EOC5", 	"Memory", 0xfffd8028, 4, base=16, bitRange=5
+sfr = "ADC_IDR.EOC6", 	"Memory", 0xfffd8028, 4, base=16, bitRange=6
+sfr = "ADC_IDR.EOC7", 	"Memory", 0xfffd8028, 4, base=16, bitRange=7
+sfr = "ADC_IDR.OVRE0", 	"Memory", 0xfffd8028, 4, base=16, bitRange=8
+sfr = "ADC_IDR.OVRE1", 	"Memory", 0xfffd8028, 4, base=16, bitRange=9
+sfr = "ADC_IDR.OVRE2", 	"Memory", 0xfffd8028, 4, base=16, bitRange=10
+sfr = "ADC_IDR.OVRE3", 	"Memory", 0xfffd8028, 4, base=16, bitRange=11
+sfr = "ADC_IDR.OVRE4", 	"Memory", 0xfffd8028, 4, base=16, bitRange=12
+sfr = "ADC_IDR.OVRE5", 	"Memory", 0xfffd8028, 4, base=16, bitRange=13
+sfr = "ADC_IDR.OVRE6", 	"Memory", 0xfffd8028, 4, base=16, bitRange=14
+sfr = "ADC_IDR.OVRE7", 	"Memory", 0xfffd8028, 4, base=16, bitRange=15
+sfr = "ADC_IDR.DRDY", 	"Memory", 0xfffd8028, 4, base=16, bitRange=16
+sfr = "ADC_IDR.GOVRE", 	"Memory", 0xfffd8028, 4, base=16, bitRange=17
+sfr = "ADC_IDR.ENDRX", 	"Memory", 0xfffd8028, 4, base=16, bitRange=18
+sfr = "ADC_IDR.RXBUFF", 	"Memory", 0xfffd8028, 4, base=16, bitRange=19
+sfr = "ADC_IMR", 	"Memory", 0xfffd802c, 4, base=16
+sfr = "ADC_IMR.EOC0", 	"Memory", 0xfffd802c, 4, base=16, bitRange=0
+sfr = "ADC_IMR.EOC1", 	"Memory", 0xfffd802c, 4, base=16, bitRange=1
+sfr = "ADC_IMR.EOC2", 	"Memory", 0xfffd802c, 4, base=16, bitRange=2
+sfr = "ADC_IMR.EOC3", 	"Memory", 0xfffd802c, 4, base=16, bitRange=3
+sfr = "ADC_IMR.EOC4", 	"Memory", 0xfffd802c, 4, base=16, bitRange=4
+sfr = "ADC_IMR.EOC5", 	"Memory", 0xfffd802c, 4, base=16, bitRange=5
+sfr = "ADC_IMR.EOC6", 	"Memory", 0xfffd802c, 4, base=16, bitRange=6
+sfr = "ADC_IMR.EOC7", 	"Memory", 0xfffd802c, 4, base=16, bitRange=7
+sfr = "ADC_IMR.OVRE0", 	"Memory", 0xfffd802c, 4, base=16, bitRange=8
+sfr = "ADC_IMR.OVRE1", 	"Memory", 0xfffd802c, 4, base=16, bitRange=9
+sfr = "ADC_IMR.OVRE2", 	"Memory", 0xfffd802c, 4, base=16, bitRange=10
+sfr = "ADC_IMR.OVRE3", 	"Memory", 0xfffd802c, 4, base=16, bitRange=11
+sfr = "ADC_IMR.OVRE4", 	"Memory", 0xfffd802c, 4, base=16, bitRange=12
+sfr = "ADC_IMR.OVRE5", 	"Memory", 0xfffd802c, 4, base=16, bitRange=13
+sfr = "ADC_IMR.OVRE6", 	"Memory", 0xfffd802c, 4, base=16, bitRange=14
+sfr = "ADC_IMR.OVRE7", 	"Memory", 0xfffd802c, 4, base=16, bitRange=15
+sfr = "ADC_IMR.DRDY", 	"Memory", 0xfffd802c, 4, base=16, bitRange=16
+sfr = "ADC_IMR.GOVRE", 	"Memory", 0xfffd802c, 4, base=16, bitRange=17
+sfr = "ADC_IMR.ENDRX", 	"Memory", 0xfffd802c, 4, base=16, bitRange=18
+sfr = "ADC_IMR.RXBUFF", 	"Memory", 0xfffd802c, 4, base=16, bitRange=19
+sfr = "ADC_CDR0", 	"Memory", 0xfffd8030, 4, base=16
+sfr = "ADC_CDR0.DATA", 	"Memory", 0xfffd8030, 4, base=16, bitRange=0-9
+sfr = "ADC_CDR1", 	"Memory", 0xfffd8034, 4, base=16
+sfr = "ADC_CDR1.DATA", 	"Memory", 0xfffd8034, 4, base=16, bitRange=0-9
+sfr = "ADC_CDR2", 	"Memory", 0xfffd8038, 4, base=16
+sfr = "ADC_CDR2.DATA", 	"Memory", 0xfffd8038, 4, base=16, bitRange=0-9
+sfr = "ADC_CDR3", 	"Memory", 0xfffd803c, 4, base=16
+sfr = "ADC_CDR3.DATA", 	"Memory", 0xfffd803c, 4, base=16, bitRange=0-9
+sfr = "ADC_CDR4", 	"Memory", 0xfffd8040, 4, base=16
+sfr = "ADC_CDR4.DATA", 	"Memory", 0xfffd8040, 4, base=16, bitRange=0-9
+sfr = "ADC_CDR5", 	"Memory", 0xfffd8044, 4, base=16
+sfr = "ADC_CDR5.DATA", 	"Memory", 0xfffd8044, 4, base=16, bitRange=0-9
+sfr = "ADC_CDR6", 	"Memory", 0xfffd8048, 4, base=16
+sfr = "ADC_CDR6.DATA", 	"Memory", 0xfffd8048, 4, base=16, bitRange=0-9
+sfr = "ADC_CDR7", 	"Memory", 0xfffd804c, 4, base=16
+sfr = "ADC_CDR7.DATA", 	"Memory", 0xfffd804c, 4, base=16, bitRange=0-9
+
+
+[SfrGroupInfo]
+group = "TC0",	"TC0_CCR",	"TC0_CMR",	"TC0_CV",	"TC0_RA",	"TC0_RB",	"TC0_RC",	"TC0_SR",	"TC0_IER",	"TC0_IDR",	"TC0_IMR"
+group = "TCB",	"TCB_BCR",	"TCB_BMR"
+group = "TC1",	"TC1_CCR",	"TC1_CMR",	"TC1_CV",	"TC1_RA",	"TC1_RB",	"TC1_RC",	"TC1_SR",	"TC1_IER",	"TC1_IDR",	"TC1_IMR"
+group = "TC2",	"TC2_CCR",	"TC2_CMR",	"TC2_CV",	"TC2_RA",	"TC2_RB",	"TC2_RC",	"TC2_SR",	"TC2_IER",	"TC2_IDR",	"TC2_IMR"
+group = "UDP",	"UDP_NUM",	"UDP_GLBSTATE",	"UDP_FADDR",	"UDP_IER",	"UDP_IDR",	"UDP_IMR",	"UDP_ISR",	"UDP_ICR",	"UDP_RSTEP",	"UDP_CSR",	"UDP_FDR",	"UDP_TXVC"
+group = "TWI",	"TWI_CR",	"TWI_MMR",	"TWI_IADR",	"TWI_CWGR",	"TWI_SR",	"TWI_IER",	"TWI_IDR",	"TWI_IMR",	"TWI_RHR",	"TWI_THR"
+group = "US0",	"US0_CR",	"US0_MR",	"US0_IER",	"US0_IDR",	"US0_IMR",	"US0_CSR",	"US0_RHR",	"US0_THR",	"US0_BRGR",	"US0_RTOR",	"US0_TTGR",	"US0_FIDI",	"US0_NER",	"US0_IF"
+group = "PDC_US0",	"US0_RPR",	"US0_RCR",	"US0_TPR",	"US0_TCR",	"US0_RNPR",	"US0_RNCR",	"US0_TNPR",	"US0_TNCR",	"US0_PTCR",	"US0_PTSR"
+group = "US1",	"US1_CR",	"US1_MR",	"US1_IER",	"US1_IDR",	"US1_IMR",	"US1_CSR",	"US1_RHR",	"US1_THR",	"US1_BRGR",	"US1_RTOR",	"US1_TTGR",	"US1_FIDI",	"US1_NER",	"US1_IF"
+group = "PDC_US1",	"US1_RPR",	"US1_RCR",	"US1_TPR",	"US1_TCR",	"US1_RNPR",	"US1_RNCR",	"US1_TNPR",	"US1_TNCR",	"US1_PTCR",	"US1_PTSR"
+group = "PWMC",	"PWMC_MR",	"PWMC_ENA",	"PWMC_DIS",	"PWMC_SR",	"PWMC_IER",	"PWMC_IDR",	"PWMC_IMR",	"PWMC_ISR",	"PWMC_VR"
+group = "PWMC_CH0",	"PWMC_CH0_CMR",	"PWMC_CH0_CDTYR",	"PWMC_CH0_CPRDR",	"PWMC_CH0_CCNTR",	"PWMC_CH0_CUPDR",	"PWMC_CH0_Reserved"
+group = "PWMC_CH1",	"PWMC_CH1_CMR",	"PWMC_CH1_CDTYR",	"PWMC_CH1_CPRDR",	"PWMC_CH1_CCNTR",	"PWMC_CH1_CUPDR",	"PWMC_CH1_Reserved"
+group = "PWMC_CH2",	"PWMC_CH2_CMR",	"PWMC_CH2_CDTYR",	"PWMC_CH2_CPRDR",	"PWMC_CH2_CCNTR",	"PWMC_CH2_CUPDR",	"PWMC_CH2_Reserved"
+group = "PWMC_CH3",	"PWMC_CH3_CMR",	"PWMC_CH3_CDTYR",	"PWMC_CH3_CPRDR",	"PWMC_CH3_CCNTR",	"PWMC_CH3_CUPDR",	"PWMC_CH3_Reserved"
+group = "CAN",	"CAN_MR",	"CAN_IER",	"CAN_IDR",	"CAN_IMR",	"CAN_SR",	"CAN_BR",	"CAN_TIM",	"CAN_TIMESTP",	"CAN_ECR",	"CAN_TCR",	"CAN_ACR",	"CAN_VR"
+group = "CAN_MB0",	"CAN_MB0_MMR",	"CAN_MB0_MAM",	"CAN_MB0_MID",	"CAN_MB0_MFID",	"CAN_MB0_MSR",	"CAN_MB0_MDL",	"CAN_MB0_MDH",	"CAN_MB0_MCR"
+group = "CAN_MB1",	"CAN_MB1_MMR",	"CAN_MB1_MAM",	"CAN_MB1_MID",	"CAN_MB1_MFID",	"CAN_MB1_MSR",	"CAN_MB1_MDL",	"CAN_MB1_MDH",	"CAN_MB1_MCR"
+group = "CAN_MB2",	"CAN_MB2_MMR",	"CAN_MB2_MAM",	"CAN_MB2_MID",	"CAN_MB2_MFID",	"CAN_MB2_MSR",	"CAN_MB2_MDL",	"CAN_MB2_MDH",	"CAN_MB2_MCR"
+group = "CAN_MB3",	"CAN_MB3_MMR",	"CAN_MB3_MAM",	"CAN_MB3_MID",	"CAN_MB3_MFID",	"CAN_MB3_MSR",	"CAN_MB3_MDL",	"CAN_MB3_MDH",	"CAN_MB3_MCR"
+group = "CAN_MB4",	"CAN_MB4_MMR",	"CAN_MB4_MAM",	"CAN_MB4_MID",	"CAN_MB4_MFID",	"CAN_MB4_MSR",	"CAN_MB4_MDL",	"CAN_MB4_MDH",	"CAN_MB4_MCR"
+group = "CAN_MB5",	"CAN_MB5_MMR",	"CAN_MB5_MAM",	"CAN_MB5_MID",	"CAN_MB5_MFID",	"CAN_MB5_MSR",	"CAN_MB5_MDL",	"CAN_MB5_MDH",	"CAN_MB5_MCR"
+group = "CAN_MB6",	"CAN_MB6_MMR",	"CAN_MB6_MAM",	"CAN_MB6_MID",	"CAN_MB6_MFID",	"CAN_MB6_MSR",	"CAN_MB6_MDL",	"CAN_MB6_MDH",	"CAN_MB6_MCR"
+group = "CAN_MB7",	"CAN_MB7_MMR",	"CAN_MB7_MAM",	"CAN_MB7_MID",	"CAN_MB7_MFID",	"CAN_MB7_MSR",	"CAN_MB7_MDL",	"CAN_MB7_MDH",	"CAN_MB7_MCR"
+group = "SSC",	"SSC_CR",	"SSC_CMR",	"SSC_RCMR",	"SSC_RFMR",	"SSC_TCMR",	"SSC_TFMR",	"SSC_RHR",	"SSC_THR",	"SSC_RSHR",	"SSC_TSHR",	"SSC_SR",	"SSC_IER",	"SSC_IDR",	"SSC_IMR"
+group = "PDC_SSC",	"SSC_RPR",	"SSC_RCR",	"SSC_TPR",	"SSC_TCR",	"SSC_RNPR",	"SSC_RNCR",	"SSC_TNPR",	"SSC_TNCR",	"SSC_PTCR",	"SSC_PTSR"
+group = "ADC",	"ADC_CR",	"ADC_MR",	"ADC_CHER",	"ADC_CHDR",	"ADC_CHSR",	"ADC_SR",	"ADC_LCDR",	"ADC_IER",	"ADC_IDR",	"ADC_IMR",	"ADC_CDR0",	"ADC_CDR1",	"ADC_CDR2",	"ADC_CDR3",	"ADC_CDR4",	"ADC_CDR5",	"ADC_CDR6",	"ADC_CDR7"
+group = "PDC_ADC",	"ADC_RPR",	"ADC_RCR",	"ADC_TPR",	"ADC_TCR",	"ADC_RNPR",	"ADC_RNCR",	"ADC_TNPR",	"ADC_TNCR",	"ADC_PTCR",	"ADC_PTSR"
+group = "EMAC",	"EMAC_NCR",	"EMAC_NCFGR",	"EMAC_NSR",	"EMAC_TSR",	"EMAC_RBQP",	"EMAC_TBQP",	"EMAC_RSR",	"EMAC_ISR",	"EMAC_IER",	"EMAC_IDR",	"EMAC_IMR",	"EMAC_MAN",	"EMAC_PTR",	"EMAC_PFR",	"EMAC_FTO",	"EMAC_SCF",	"EMAC_MCF",	"EMAC_FRO",	"EMAC_FCSE",	"EMAC_ALE",	"EMAC_DTF",	"EMAC_LCOL",	"EMAC_ECOL",	"EMAC_TUND",	"EMAC_CSE",	"EMAC_RRE",	"EMAC_ROV",	"EMAC_RSE",	"EMAC_ELE",	"EMAC_RJA",	"EMAC_USF",	"EMAC_STE",	"EMAC_RLE",	"EMAC_TPF",	"EMAC_HRB",	"EMAC_HRT",	"EMAC_SA1L",	"EMAC_SA1H",	"EMAC_SA2L",	"EMAC_SA2H",	"EMAC_SA3L",	"EMAC_SA3H",	"EMAC_SA4L",	"EMAC_SA4H",	"EMAC_TID",	"EMAC_TPQ",	"EMAC_USRIO",	"EMAC_WOL",	"EMAC_REV"
+group = "SPI0",	"SPI0_CR",	"SPI0_MR",	"SPI0_RDR",	"SPI0_TDR",	"SPI0_SR",	"SPI0_IER",	"SPI0_IDR",	"SPI0_IMR",	"SPI0_CSR"
+group = "PDC_SPI0",	"SPI0_RPR",	"SPI0_RCR",	"SPI0_TPR",	"SPI0_TCR",	"SPI0_RNPR",	"SPI0_RNCR",	"SPI0_TNPR",	"SPI0_TNCR",	"SPI0_PTCR",	"SPI0_PTSR"
+group = "SPI1",	"SPI1_CR",	"SPI1_MR",	"SPI1_RDR",	"SPI1_TDR",	"SPI1_SR",	"SPI1_IER",	"SPI1_IDR",	"SPI1_IMR",	"SPI1_CSR"
+group = "PDC_SPI1",	"SPI1_RPR",	"SPI1_RCR",	"SPI1_TPR",	"SPI1_TCR",	"SPI1_RNPR",	"SPI1_RNCR",	"SPI1_TNPR",	"SPI1_TNCR",	"SPI1_PTCR",	"SPI1_PTSR"
+group = "SYS"
+group = "AIC",	"AIC_SMR",	"AIC_SVR",	"AIC_IVR",	"AIC_FVR",	"AIC_ISR",	"AIC_IPR",	"AIC_IMR",	"AIC_CISR",	"AIC_IECR",	"AIC_IDCR",	"AIC_ICCR",	"AIC_ISCR",	"AIC_EOICR",	"AIC_SPU",	"AIC_DCR",	"AIC_FFER",	"AIC_FFDR",	"AIC_FFSR"
+group = "DBGU",	"DBGU_CR",	"DBGU_MR",	"DBGU_IER",	"DBGU_IDR",	"DBGU_IMR",	"DBGU_CSR",	"DBGU_RHR",	"DBGU_THR",	"DBGU_BRGR",	"DBGU_CIDR",	"DBGU_EXID",	"DBGU_FNTR"
+group = "PDC_DBGU",	"DBGU_RPR",	"DBGU_RCR",	"DBGU_TPR",	"DBGU_TCR",	"DBGU_RNPR",	"DBGU_RNCR",	"DBGU_TNPR",	"DBGU_TNCR",	"DBGU_PTCR",	"DBGU_PTSR"
+group = "PIOA",	"PIOA_PER",	"PIOA_PDR",	"PIOA_PSR",	"PIOA_OER",	"PIOA_ODR",	"PIOA_OSR",	"PIOA_IFER",	"PIOA_IFDR",	"PIOA_IFSR",	"PIOA_SODR",	"PIOA_CODR",	"PIOA_ODSR",	"PIOA_PDSR",	"PIOA_IER",	"PIOA_IDR",	"PIOA_IMR",	"PIOA_ISR",	"PIOA_MDER",	"PIOA_MDDR",	"PIOA_MDSR",	"PIOA_PPUDR",	"PIOA_PPUER",	"PIOA_PPUSR",	"PIOA_ASR",	"PIOA_BSR",	"PIOA_ABSR",	"PIOA_OWER",	"PIOA_OWDR",	"PIOA_OWSR"
+group = "PIOB",	"PIOB_PER",	"PIOB_PDR",	"PIOB_PSR",	"PIOB_OER",	"PIOB_ODR",	"PIOB_OSR",	"PIOB_IFER",	"PIOB_IFDR",	"PIOB_IFSR",	"PIOB_SODR",	"PIOB_CODR",	"PIOB_ODSR",	"PIOB_PDSR",	"PIOB_IER",	"PIOB_IDR",	"PIOB_IMR",	"PIOB_ISR",	"PIOB_MDER",	"PIOB_MDDR",	"PIOB_MDSR",	"PIOB_PPUDR",	"PIOB_PPUER",	"PIOB_PPUSR",	"PIOB_ASR",	"PIOB_BSR",	"PIOB_ABSR",	"PIOB_OWER",	"PIOB_OWDR",	"PIOB_OWSR"
+group = "PMC",	"PMC_SCER",	"PMC_SCDR",	"PMC_SCSR",	"PMC_PCER",	"PMC_PCDR",	"PMC_PCSR",	"PMC_MOR",	"PMC_MCFR",	"PMC_PLLR",	"PMC_MCKR",	"PMC_PCKR",	"PMC_IER",	"PMC_IDR",	"PMC_SR",	"PMC_IMR"
+group = "CKGR",	"CKGR_MOR",	"CKGR_MCFR",	"CKGR_PLLR"
+group = "RSTC",	"RSTC_RCR",	"RSTC_RSR",	"RSTC_RMR"
+group = "RTTC",	"RTTC_RTMR",	"RTTC_RTAR",	"RTTC_RTVR",	"RTTC_RTSR"
+group = "PITC",	"PITC_PIMR",	"PITC_PISR",	"PITC_PIVR",	"PITC_PIIR"
+group = "WDTC",	"WDTC_WDCR",	"WDTC_WDMR",	"WDTC_WDSR"
+group = "VREG",	"VREG_MR"
+group = "MC",	"MC_RCR",	"MC_ASR",	"MC_AASR",	"MC_FMR",	"MC_FCR",	"MC_FSR"
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/cmock_demo.dep b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/cmock_demo.dep
new file mode 100644
index 000000000..ed687695d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/cmock_demo.dep
@@ -0,0 +1,3691 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<project>
+  <fileVersion>2</fileVersion>
+  <configuration>
+    <name>Debug</name>
+    <outputs>
+      <file>$PROJ_DIR$\Debug\Obj\Main.r79</file>
+      <file>$PROJ_DIR$\Debug\Obj\IntrinsicsWrapper.r79</file>
+      <file>$PROJ_DIR$\Debug\Obj\cmock_demo.pbd</file>
+      <file>$PROJ_DIR$\Debug\Obj\TimerInterruptConfigurator.r79</file>
+      <file>$PROJ_DIR$\Debug\Obj\AdcConductor.r79</file>
+      <file>$PROJ_DIR$\Debug\Obj\AdcModel.pbi</file>
+      <file>$PROJ_DIR$\Debug\Obj\Model.pbi</file>
+      <file>$PROJ_DIR$\Debug\Obj\AdcModel.r79</file>
+      <file>$PROJ_DIR$\Debug\Obj\UsartModel.r79</file>
+      <file>$PROJ_DIR$\Debug\Obj\TemperatureFilter.pbi</file>
+      <file>$PROJ_DIR$\Debug\List\AdcHardwareConfigurator.lst</file>
+      <file>$PROJ_DIR$\Debug\Obj\UsartConductor.pbi</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Types.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcHardwareConfigurator.h</file>
+      <file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AT91SAM7X256.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcConductor.h</file>
+      <file>$PROJ_DIR$\Debug\List\TimerInterruptHandler.lst</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TaskScheduler.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartConductor.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Model.h</file>
+      <file>$TOOLKIT_DIR$\inc\intrinsics.h</file>
+      <file>$PROJ_DIR$\Debug\Obj\UsartHardware.pbi</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TemperatureCalculator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcTemperatureSensor.h</file>
+      <file>$PROJ_DIR$\Debug\Exe\cmock_demo.d79</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartConfigurator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcHardware.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TemperatureFilter.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerConductor.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartPutChar.h</file>
+      <file>$PROJ_DIR$\Debug\Obj\Executor.pbi</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartModel.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\IntrinsicsWrapper.h</file>
+      <file>$PROJ_DIR$\Debug\List\UsartBaudRateRegisterCalculator.lst</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartHardware.h</file>
+      <file>$PROJ_DIR$\Debug\List\UsartModel.lst</file>
+      <file>$PROJ_DIR$\Debug\List\Executor.lst</file>
+      <file>$PROJ_DIR$\Debug\List\UsartTransmitBufferStatus.lst</file>
+      <file>$PROJ_DIR$\Debug\Exe\cmock_demo.sim</file>
+      <file>$PROJ_DIR$\Debug\List\TimerModel.lst</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartTransmitBufferStatus.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerInterruptConfigurator.h</file>
+      <file>$PROJ_DIR$\Debug\List\TimerHardware.lst</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerInterruptHandler.h</file>
+      <file>$PROJ_DIR$\Debug\Obj\UsartTransmitBufferStatus.r79</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerModel.h</file>
+      <file>$PROJ_DIR$\Debug\List\IntrinsicsWrapper.lst</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerConfigurator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerHardware.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartBaudRateRegisterCalculator.h</file>
+      <file>$PROJ_DIR$\Debug\List\Cstartup_SAM7.lst</file>
+      <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>
+      <file>$PROJ_DIR$\Debug\Obj\UsartModel.pbi</file>
+      <file>$TOOLKIT_DIR$\inc\math.h</file>
+      <file>$PROJ_DIR$\Debug\Obj\AdcHardware.r79</file>
+      <file>$PROJ_DIR$\Debug\Obj\TimerModel.r79</file>
+      <file>$TOOLKIT_DIR$\inc\stdio.h</file>
+      <file>$PROJ_DIR$\Debug\Obj\UsartConfigurator.pbi</file>
+      <file>$PROJ_DIR$\Debug\List\AdcModel.lst</file>
+      <file>$PROJ_DIR$\Debug\List\AdcConductor.lst</file>
+      <file>$PROJ_DIR$\Debug\List\UsartConductor.lst</file>
+      <file>$PROJ_DIR$\Debug\List\Model.lst</file>
+      <file>$PROJ_DIR$\Debug\List\TaskScheduler.lst</file>
+      <file>$PROJ_DIR$\Debug\List\UsartHardware.lst</file>
+      <file>$PROJ_DIR$\Debug\List\AdcHardware.lst</file>
+      <file>$PROJ_DIR$\Debug\List\Main.lst</file>
+      <file>$PROJ_DIR$\Debug\Obj\UsartBaudRateRegisterCalculator.r79</file>
+      <file>$PROJ_DIR$\Debug\Obj\AdcConductor.pbi</file>
+      <file>$PROJ_DIR$\Debug\Obj\TaskScheduler.pbi</file>
+      <file>$PROJ_DIR$\Debug\List\UsartConfigurator.lst</file>
+      <file>$PROJ_DIR$\Debug\Obj\TaskScheduler.r79</file>
+      <file>$TOOLKIT_DIR$\inc\ymath.h</file>
+      <file>$PROJ_DIR$\Debug\Obj\TemperatureFilter.r79</file>
+      <file>$TOOLKIT_DIR$\inc\ysizet.h</file>
+      <file>$PROJ_DIR$\Debug\Obj\TimerHardware.pbi</file>
+      <file>$PROJ_DIR$\Debug\Obj\TemperatureCalculator.r79</file>
+      <file>$PROJ_DIR$\Debug\Obj\AdcTemperatureSensor.pbi</file>
+      <file>$PROJ_DIR$\Debug\List\TemperatureCalculator.lst</file>
+      <file>$PROJ_DIR$\Debug\List\AdcTemperatureSensor.lst</file>
+      <file>$TOOLKIT_DIR$\lib\dl4tptinl8n.h</file>
+      <file>$PROJ_DIR$\Debug\Obj\AdcHardware.pbi</file>
+      <file>$PROJ_DIR$\Debug\Obj\UsartConfigurator.r79</file>
+      <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>
+      <file>$PROJ_DIR$\Debug\Obj\TimerConfigurator.r79</file>
+      <file>$PROJ_DIR$\Debug\Obj\AdcTemperatureSensor.r79</file>
+      <file>$PROJ_DIR$\Debug\Obj\Main.pbi</file>
+      <file>$TOOLKIT_DIR$\lib\dl4tptinl8n.r79</file>
+      <file>$PROJ_DIR$\Debug\Obj\TimerInterruptHandler.r79</file>
+      <file>$PROJ_DIR$\Debug\Obj\UsartHardware.r79</file>
+      <file>$PROJ_DIR$\Debug\Obj\UsartPutChar.pbi</file>
+      <file>$PROJ_DIR$\Debug\Obj\TimerInterruptConfigurator.pbi</file>
+      <file>$TOOLKIT_DIR$\inc\yvals.h</file>
+      <file>$PROJ_DIR$\Debug\Obj\UsartTransmitBufferStatus.pbi</file>
+      <file>$PROJ_DIR$\Debug\Obj\IntrinsicsWrapper.pbi</file>
+      <file>$PROJ_DIR$\Debug\Obj\AdcHardwareConfigurator.r79</file>
+      <file>$PROJ_DIR$\incIAR\AT91SAM7X256_inc.h</file>
+      <file>$TOOLKIT_DIR$\inc\DLib_Threads.h</file>
+      <file>$PROJ_DIR$\Debug\Obj\TimerConfigurator.pbi</file>
+      <file>$PROJ_DIR$\Debug\Obj\TimerConductor.pbi</file>
+      <file>$PROJ_DIR$\Debug\Obj\TimerInterruptHandler.pbi</file>
+      <file>$PROJ_DIR$\Debug\Obj\UsartPutChar.r79</file>
+      <file>$PROJ_DIR$\Debug\Obj\UsartConductor.r79</file>
+      <file>$PROJ_DIR$\Debug\Obj\TimerHardware.r79</file>
+      <file>$PROJ_DIR$\Debug\Obj\Cstartup_SAM7.r79</file>
+      <file>$PROJ_DIR$\Debug\List\cmock_demo.map</file>
+      <file>$PROJ_DIR$\Debug\List\TimerInterruptConfigurator.lst</file>
+      <file>$PROJ_DIR$\Debug\Obj\TimerConductor.r79</file>
+      <file>$PROJ_DIR$\Debug\Obj\Model.r79</file>
+      <file>$PROJ_DIR$\Debug\Obj\UsartBaudRateRegisterCalculator.pbi</file>
+      <file>$PROJ_DIR$\Debug\Obj\AdcHardwareConfigurator.pbi</file>
+      <file>$PROJ_DIR$\Debug\Obj\TemperatureCalculator.pbi</file>
+      <file>$PROJ_DIR$\Debug\Obj\Cstartup_SAM7.pbi</file>
+      <file>$PROJ_DIR$\Resource\at91SAM7X256_FLASH.xcl</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerConductor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerHardware.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerInterruptConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerModel.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartBaudRateRegisterCalculator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartModel.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartConductor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartHardware.c</file>
+      <file>$PROJ_DIR$\Cstartup.s79</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartPutChar.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartTransmitBufferStatus.c</file>
+      <file>$PROJ_DIR$\Cstartup_SAM7.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcModel.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcTemperatureSensor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Executor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Main.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\IntrinsicsWrapper.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Model.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TemperatureCalculator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TaskScheduler.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerInterruptHandler.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TemperatureFilter.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcHardwareConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcConductor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcHardware.c</file>
+      <file>$PROJ_DIR$\Debug\Obj\Cstartup.r79</file>
+      <file>$PROJ_DIR$\Debug\List\TimerConfigurator.lst</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Executor.h</file>
+      <file>$PROJ_DIR$\Debug\List\TimerConductor.lst</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcModel.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\ModelConfig.h</file>
+      <file>$PROJ_DIR$\Debug\Obj\Executor.r79</file>
+      <file>$PROJ_DIR$\Debug\List\UsartPutChar.lst</file>
+      <file>$PROJ_DIR$\Debug\List\TemperatureFilter.lst</file>
+      <file>$PROJ_DIR$\Debug\Obj\TimerModel.pbi</file>
+      <file>$PROJ_DIR$\srcIAR\Cstartup.s79</file>
+      <file>$PROJ_DIR$\srcIAR\Cstartup_SAM7.c</file>
+    </outputs>
+    <file>
+      <name>[ROOT_NODE]</name>
+      <outputs>
+        <tool>
+          <name>XLINK</name>
+          <file> 25 105 39</file>
+        </tool>
+      </outputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\Debug\Obj\cmock_demo.pbd</name>
+      <inputs>
+        <tool>
+          <name>BILINK</name>
+          <file> 68 81 110 5 77 112 31 94 86 6 69 111 9 99 98 75 91 100 150 109 11 58 22 53 90 93</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\Debug\Exe\cmock_demo.d79</name>
+      <outputs>
+        <tool>
+          <name>XLINK</name>
+          <file> 105 39</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>XLINK</name>
+          <file> 113 4 55 95 7 85 141 104 147 1 0 108 71 76 73 107 84 103 3 88 56 67 102 82 89 8 101 45 87</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerConductor.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 107 144</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 99</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 12 15 29 46 49 44</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 12 15 29 46 49 44</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 142</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 98</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 12 15 48 42</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 12 15 48 42</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerHardware.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 103 43</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 75</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 12 15 49 48</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 12 15 49 48</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerInterruptConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 3 106</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 91</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 12 15 42 44</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 12 15 42 44</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerModel.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 56 40</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 150</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 12 15 46 18</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 12 15 46 18</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartBaudRateRegisterCalculator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 67 34</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 109</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 12 15 50</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 12 15 50</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartModel.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 8 36</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 53</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 12 15 32 146 50 28 57 92 14 80 52 83 97 74 54 72</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 12 15 32 146 50 28 57 92 14 52 83 97 74 54 72</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartConductor.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 102 61</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 11</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 12 15 19 35 32 18</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 12 15 19 35 32 18</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 82 70</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 58</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 12 15 26</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 12 15 26</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartHardware.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 89 64</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 22</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 12 15 35 26 30</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 12 15 35 26 30</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\Cstartup.s79</name>
+      <outputs>
+        <tool>
+          <name>AARM</name>
+          <file> 141</file>
+        </tool>
+      </outputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartPutChar.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 101 148</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 90</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 12 15 30 41</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 12 15 30 41</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartTransmitBufferStatus.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 45 38</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 93</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 12 15 41</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 12 15 41</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\Cstartup_SAM7.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 104 51</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 112</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 15</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcModel.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 7 59</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 5</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 12 15 145 18 23 28</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 12 15 145 18 23 28</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcTemperatureSensor.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 85 79</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 77</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 12 15 24</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 12 15 24</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\Executor.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 147 37</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 31</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 12 15 143 20 19 29 16 33</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 12 15 143 20 19 29 16 33</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\Main.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 0 66</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 86</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 12 15 33 143 20 18 23 28 19 35 26 30 32 50 41 29 49 48 42 44 46 16 27 13 24 145</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 12 15 33 143 20 18 23 28 19 35 26 30 32 50 41 29 49 48 42 44 46 16 27 13 24 145</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\IntrinsicsWrapper.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 47</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 94</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 33 21</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 33 21</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\Model.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 108 62</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 6</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 20 12 15 18 28</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 20 12 15 18 28</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TemperatureCalculator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 76 78</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 111</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 12 15 23 54 72 92 14 80 52 83 97</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 12 15 23 54 72 92 14 52 83 97</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TaskScheduler.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 71 63</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 69</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 12 15 18</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 12 15 18</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerInterruptHandler.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 88 17</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 100</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 12 15 44 42</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 12 15 44 42</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TemperatureFilter.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 73 149</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 9</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 12 15 28 54 72 92 14 80 52 83 97</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 12 15 28 54 72 92 14 52 83 97</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcHardwareConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 95 10</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 110</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 12 15 13 146</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 12 15 13 146</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcConductor.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 4 60</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 68</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 12 15 16 145 27</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 12 15 16 145 27</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcHardware.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 55 65</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 81</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 12 15 27 13 24</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 12 15 27 13 24</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\srcIAR\Cstartup.s79</name>
+      <outputs>
+        <tool>
+          <name>AARM</name>
+          <file> 141</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>AARM</name>
+          <file> 96</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\srcIAR\Cstartup_SAM7.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 104 51</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 112</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 15</file>
+        </tool>
+      </inputs>
+    </file>
+  </configuration>
+  <configuration>
+    <name>Release</name>
+    <outputs>
+      <file>$PROJ_DIR$\..\test\system\src\TemperatureCalculator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Types.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcHardwareConfigurator.h</file>
+      <file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AT91SAM7X256.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcConductor.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TaskScheduler.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartConductor.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Model.h</file>
+      <file>$TOOLKIT_DIR$\inc\intrinsics.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TemperatureCalculator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcTemperatureSensor.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartConfigurator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcHardware.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TemperatureFilter.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerConductor.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartPutChar.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartModel.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\IntrinsicsWrapper.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartHardware.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartTransmitBufferStatus.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerInterruptConfigurator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerInterruptHandler.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerModel.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerConfigurator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerHardware.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartBaudRateRegisterCalculator.h</file>
+      <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>
+      <file>$TOOLKIT_DIR$\inc\math.h</file>
+      <file>$TOOLKIT_DIR$\inc\stdio.h</file>
+      <file>$TOOLKIT_DIR$\inc\ymath.h</file>
+      <file>$TOOLKIT_DIR$\inc\ysizet.h</file>
+      <file>$TOOLKIT_DIR$\lib\dl4tptinl8n.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\UsartPutChar.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\AdcTemperatureSensor.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\TaskScheduler.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\UsartTransmitBufferStatus.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\UsartConfigurator.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\TimerConfigurator.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\AT91SAM7X256.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\UsartBaudRateRegisterCalculator.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\Executor.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\ModelConfig.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\TimerModel.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\TimerInterruptHandler.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\Main.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\Model.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\AdcHardwareConfigurator.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\TimerModel.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\UsartModel.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\UsartHardware.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\UsartTransmitBufferStatus.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\UsartPutChar.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\TimerInterruptConfigurator.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\UsartBaudRateRegisterCalculator.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\TaskScheduler.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\AdcConductor.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\TimerInterruptConfigurator.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\Model.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\TemperatureFilter.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\AdcModel.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\TimerHardware.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\AdcTemperatureSensor.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\AdcConductor.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\AdcHardware.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\AdcHardware.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\Executor.c</file>
+      <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>
+      <file>$TOOLKIT_DIR$\lib\dl4tptinl8n.r79</file>
+      <file>$PROJ_DIR$\..\test\system\src\TemperatureCalculator.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\Types.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\TemperatureFilter.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\TimerConductor.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\TimerConfigurator.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\TimerHardware.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\TimerInterruptHandler.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\UsartConductor.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\UsartConfigurator.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\UsartHardware.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\TimerConductor.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\AdcModel.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\AdcHardwareConfigurator.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\UsartConductor.h</file>
+      <file>$PROJ_DIR$\Release\Obj\Executor.pbi</file>
+      <file>$PROJ_DIR$\..\test\system\src\UsartModel.h</file>
+      <file>$PROJ_DIR$\Release\Obj\Model.pbi</file>
+      <file>$PROJ_DIR$\Release\Obj\Cstartup_SAM7.pbi</file>
+      <file>$PROJ_DIR$\Release\Obj\UsartConductor.pbi</file>
+      <file>$PROJ_DIR$\Release\Obj\AdcConductor.r79</file>
+      <file>$PROJ_DIR$\Release\Obj\AdcHardware.r79</file>
+      <file>$PROJ_DIR$\Release\Obj\TimerModel.pbi</file>
+      <file>$PROJ_DIR$\Release\Obj\AdcTemperatureSensor.pbi</file>
+      <file>$PROJ_DIR$\Release\Obj\UsartHardware.r79</file>
+      <file>$PROJ_DIR$\Release\Obj\TemperatureFilter.pbi</file>
+      <file>$PROJ_DIR$\Release\Obj\UsartPutChar.pbi</file>
+      <file>$PROJ_DIR$\Release\Obj\TemperatureCalculator.r79</file>
+      <file>$PROJ_DIR$\Release\Obj\AdcHardwareConfigurator.r79</file>
+      <file>$PROJ_DIR$\Release\Obj\cmock_demo.pbd</file>
+      <file>$PROJ_DIR$\Release\Obj\UsartModel.r79</file>
+      <file>$PROJ_DIR$\Release\Obj\UsartBaudRateRegisterCalculator.r79</file>
+      <file>$PROJ_DIR$\Release\Obj\Model.r79</file>
+      <file>$PROJ_DIR$\Release\Obj\AdcModel.r79</file>
+      <file>$PROJ_DIR$\Release\Obj\AdcHardware.pbi</file>
+      <file>$PROJ_DIR$\Release\Obj\TimerModel.r79</file>
+      <file>$PROJ_DIR$\Release\Obj\TimerHardware.r79</file>
+      <file>$PROJ_DIR$\Release\Obj\UsartPutChar.r79</file>
+      <file>$PROJ_DIR$\Release\Obj\AdcHardwareConfigurator.pbi</file>
+      <file>$PROJ_DIR$\Release\Obj\TimerInterruptConfigurator.r79</file>
+      <file>$PROJ_DIR$\Release\Obj\TaskScheduler.pbi</file>
+      <file>$PROJ_DIR$\Release\List\cmock_demo.map</file>
+      <file>$PROJ_DIR$\Release\Obj\UsartTransmitBufferStatus.pbi</file>
+      <file>$PROJ_DIR$\Release\Exe\cmock_demo.d79</file>
+      <file>$PROJ_DIR$\Release\Obj\AdcTemperatureSensor.r79</file>
+      <file>$PROJ_DIR$\Release\Obj\TimerConductor.r79</file>
+      <file>$PROJ_DIR$\Release\Obj\TimerConfigurator.r79</file>
+      <file>$PROJ_DIR$\Release\Obj\Main.pbi</file>
+      <file>$PROJ_DIR$\Release\Obj\TimerInterruptConfigurator.pbi</file>
+      <file>$PROJ_DIR$\Release\Obj\UsartTransmitBufferStatus.r79</file>
+      <file>$PROJ_DIR$\Release\Obj\AdcModel.pbi</file>
+      <file>$PROJ_DIR$\Release\Obj\TemperatureFilter.r79</file>
+      <file>$PROJ_DIR$\Release\Obj\UsartHardware.pbi</file>
+      <file>$PROJ_DIR$\Release\Obj\Cstartup.r79</file>
+      <file>$PROJ_DIR$\Release\Obj\UsartConductor.r79</file>
+      <file>$PROJ_DIR$\Release\Obj\TimerInterruptHandler.pbi</file>
+      <file>$PROJ_DIR$\Release\Obj\TimerConductor.pbi</file>
+      <file>$PROJ_DIR$\Release\Obj\Main.r79</file>
+      <file>$PROJ_DIR$\Release\Obj\UsartConfigurator.pbi</file>
+      <file>$PROJ_DIR$\Release\Obj\Executor.r79</file>
+      <file>$PROJ_DIR$\Release\Obj\Cstartup_SAM7.r79</file>
+      <file>$PROJ_DIR$\Release\Obj\TemperatureCalculator.pbi</file>
+      <file>$PROJ_DIR$\Release\Obj\TimerHardware.pbi</file>
+      <file>$PROJ_DIR$\Release\Exe\cmock_demo.sim</file>
+      <file>$PROJ_DIR$\Release\Obj\TimerConfigurator.pbi</file>
+      <file>$PROJ_DIR$\Release\Obj\UsartModel.pbi</file>
+      <file>$PROJ_DIR$\Release\Obj\TaskScheduler.r79</file>
+      <file>$PROJ_DIR$\Release\Obj\UsartBaudRateRegisterCalculator.pbi</file>
+      <file>$PROJ_DIR$\Release\Obj\AdcConductor.pbi</file>
+      <file>$PROJ_DIR$\Release\Obj\TimerInterruptHandler.r79</file>
+      <file>$PROJ_DIR$\Release\Obj\UsartConfigurator.r79</file>
+      <file>$PROJ_DIR$\Release\Obj\IntrinsicsWrapper.pbi</file>
+      <file>$PROJ_DIR$\Release\Obj\IntrinsicsWrapper.r79</file>
+      <file>$TOOLKIT_DIR$\inc\yvals.h</file>
+      <file>$PROJ_DIR$\incIAR\AT91SAM7X256_inc.h</file>
+      <file>$TOOLKIT_DIR$\inc\DLib_Threads.h</file>
+      <file>$PROJ_DIR$\Resource\at91SAM7X256_FLASH.xcl</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerConductor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerHardware.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerInterruptConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerModel.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartBaudRateRegisterCalculator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartModel.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartConductor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartHardware.c</file>
+      <file>$PROJ_DIR$\Cstartup.s79</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartPutChar.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartTransmitBufferStatus.c</file>
+      <file>$PROJ_DIR$\Cstartup_SAM7.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcModel.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcTemperatureSensor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Executor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Main.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\IntrinsicsWrapper.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Model.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TemperatureCalculator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TaskScheduler.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerInterruptHandler.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TemperatureFilter.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcHardwareConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcConductor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcHardware.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Executor.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcModel.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\ModelConfig.h</file>
+      <file>$PROJ_DIR$\srcIAR\Cstartup.s79</file>
+      <file>$PROJ_DIR$\srcIAR\Cstartup_SAM7.c</file>
+    </outputs>
+    <file>
+      <name>[ROOT_NODE]</name>
+      <outputs>
+        <tool>
+          <name>XLINK</name>
+          <file> 111 109 131</file>
+        </tool>
+      </outputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\Main.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 125</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 115</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 70 39 41 58 35 0 59 82 78 37 33 84 40 36 79 61 38 57 44 43 56 65 81 34 80</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\Model.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 100</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 85</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 58 70 39 35 59</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\AdcHardwareConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 96</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 106</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 70 39 81 42</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\TimerModel.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 103</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 90</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 70 39 43 35</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\UsartModel.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 98</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 133</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 70 39 84 42 40 59 29 141 3 32 27 67 143 31 28 30</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\UsartHardware.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 92</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 120</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 70 39 78 37 33</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\UsartTransmitBufferStatus.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 117</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 110</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 70 39 36</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\UsartPutChar.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 105</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 94</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 70 39 33 36</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\TimerInterruptConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 107</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 116</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 70 39 57 44</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\UsartBaudRateRegisterCalculator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 99</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 135</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 70 39 40</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\TaskScheduler.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 134</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 108</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 70 39 35</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\AdcModel.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 101</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 118</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 70 39 80 35 0 59</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\AdcTemperatureSensor.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 112</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 91</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 70 39 34</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\AdcConductor.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 88</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 136</file>
+        </tool>
+      </outputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\AdcHardware.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 89</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 102</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 70 39 65 81 34</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\Executor.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 127</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 83</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 70 39 41 58 82 79 56</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\TemperatureCalculator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 95</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 129</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 70 39 0 28 30 141 3 32 27 67 143</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\TemperatureFilter.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 119</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 93</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 70 39 59 28 30 141 3 32 27 67 143</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\TimerConductor.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 113</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 124</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 70 39 79 43 61 44</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\TimerConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 114</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 132</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 70 39 38 57</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\TimerHardware.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 104</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 130</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 70 39 61 38</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\TimerInterruptHandler.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 137</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 123</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 70 39 44 57</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\UsartConductor.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 122</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 87</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 70 39 82 78 84 35</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\UsartConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 138</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 126</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 70 39 37</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\Release\Obj\cmock_demo.pbd</name>
+      <inputs>
+        <tool>
+          <name>BILINK</name>
+          <file> 136 102 106 118 91 86 83 139 115 85 108 129 93 124 132 130 116 123 90 135 87 126 120 133 94 110</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\Release\Exe\cmock_demo.d79</name>
+      <outputs>
+        <tool>
+          <name>XLINK</name>
+          <file> 109 131</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>XLINK</name>
+          <file> 144 88 89 96 101 112 121 128 127 140 125 100 134 95 119 113 114 104 107 137 103 99 122 138 92 98 105 117 68</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerConductor.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 113</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 124</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 15 23 25 22</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 15 23 25 22</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 114</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 132</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 24 21</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 24 21</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerHardware.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 104</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 130</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 25 24</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 25 24</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerInterruptConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 107</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 116</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 21 22</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 21 22</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerModel.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 103</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 90</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 23 6</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 23 6</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartBaudRateRegisterCalculator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 99</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 135</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 26</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 26</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartModel.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 98</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 133</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 17 174 26 14 29 141 3 32 27 67 143 31 28 30</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 17 174 26 14 29 141 3 27 67 143 31 28 30</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartConductor.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 122</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 87</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 7 19 17 6</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 7 19 17 6</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 138</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 126</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 12</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 12</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartHardware.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 92</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 120</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 19 12 16</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 19 12 16</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\Cstartup.s79</name>
+      <outputs>
+        <tool>
+          <name>AARM</name>
+          <file> 121</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>AARM</name>
+          <file> 142</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartPutChar.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 105</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 94</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 16 20</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 16 20</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartTransmitBufferStatus.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 117</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 110</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 20</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 20</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\Cstartup_SAM7.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 128</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 86</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 4</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 4</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcModel.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 101</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 118</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 173 6 10 14</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 173 6 10 14</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcTemperatureSensor.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 112</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 91</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 11</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 11</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\Executor.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 127</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 83</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 172 8 7 15 5 18</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 172 8 7 15 5 18</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\Main.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 125</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 115</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 18 172 8 6 10 14 7 19 12 16 17 26 20 15 25 24 21 22 23 5 13 2 11 173</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 18 172 8 6 10 14 7 19 12 16 17 26 20 15 25 24 21 22 23 5 13 2 11 173</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\IntrinsicsWrapper.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 140</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 139</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 18 9</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 18 9</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\Model.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 100</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 85</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 8 1 4 6 14</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 8 1 4 6 14</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TemperatureCalculator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 95</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 129</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 10 28 30 141 3 32 27 67 143</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 10 28 30 141 3 27 67 143</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TaskScheduler.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 134</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 108</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 6</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 6</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerInterruptHandler.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 137</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 123</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 22 21</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 22 21</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TemperatureFilter.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 119</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 93</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 14 28 30 141 3 32 27 67 143</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 14 28 30 141 3 27 67 143</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcHardwareConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 96</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 106</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 2 174</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 2 174</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcConductor.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 88</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 136</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 5 173 13</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 5 173 13</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcHardware.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 89</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 102</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 13 2 11</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 13 2 11</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\srcIAR\Cstartup.s79</name>
+      <outputs>
+        <tool>
+          <name>AARM</name>
+          <file> 121</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>AARM</name>
+          <file> 142</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\srcIAR\Cstartup_SAM7.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 128</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 86</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 4</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 4</file>
+        </tool>
+      </inputs>
+    </file>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\test\system\src\Main.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\test\system\src\Model.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\test\system\src\AdcHardwareConfigurator.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\test\system\src\TimerModel.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\test\system\src\UsartModel.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\test\system\src\UsartHardware.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\test\system\src\UsartTransmitBufferStatus.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\test\system\src\UsartPutChar.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\test\system\src\TimerInterruptConfigurator.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\test\system\src\UsartBaudRateRegisterCalculator.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\test\system\src\TaskScheduler.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\test\system\src\AdcModel.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\test\system\src\AdcTemperatureSensor.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\test\system\src\AdcConductor.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\test\system\src\AdcHardware.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\test\system\src\Executor.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\test\system\src\TemperatureCalculator.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\test\system\src\TemperatureFilter.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\test\system\src\TimerConductor.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\test\system\src\TimerConfigurator.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\test\system\src\TimerHardware.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\test\system\src\TimerInterruptHandler.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\test\system\src\UsartConductor.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\test\system\src\UsartConfigurator.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+  </configuration>
+  <configuration>
+    <name>Simulate</name>
+    <outputs>
+      <file>$PROJ_DIR$\..\test\system\src\TemperatureCalculator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Types.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcHardwareConfigurator.h</file>
+      <file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AT91SAM7X256.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcConductor.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TaskScheduler.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartConductor.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Model.h</file>
+      <file>$TOOLKIT_DIR$\inc\intrinsics.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TemperatureCalculator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcTemperatureSensor.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartConfigurator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcHardware.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TemperatureFilter.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerConductor.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartPutChar.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartModel.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\IntrinsicsWrapper.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartHardware.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartTransmitBufferStatus.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerInterruptConfigurator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerInterruptHandler.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerModel.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerConfigurator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerHardware.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartBaudRateRegisterCalculator.h</file>
+      <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>
+      <file>$TOOLKIT_DIR$\inc\math.h</file>
+      <file>$TOOLKIT_DIR$\inc\stdio.h</file>
+      <file>$TOOLKIT_DIR$\inc\ymath.h</file>
+      <file>$TOOLKIT_DIR$\inc\ysizet.h</file>
+      <file>$TOOLKIT_DIR$\lib\dl4tptinl8n.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\UsartPutChar.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\AdcTemperatureSensor.h</file>
+      <file>$PROJ_DIR$\Simulate\Obj\cmock_demo.pbd</file>
+      <file>$PROJ_DIR$\..\test\system\src\TaskScheduler.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\UsartTransmitBufferStatus.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\UsartConfigurator.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\TimerConfigurator.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\AT91SAM7X256.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\UsartBaudRateRegisterCalculator.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\Executor.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\ModelConfig.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\TimerModel.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\TimerInterruptHandler.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\Main.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\Model.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\AdcHardwareConfigurator.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\TimerModel.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\UsartModel.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\UsartHardware.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\UsartTransmitBufferStatus.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\UsartPutChar.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\TimerInterruptConfigurator.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\UsartBaudRateRegisterCalculator.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\TaskScheduler.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\AdcConductor.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\TimerInterruptConfigurator.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\Model.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\TemperatureFilter.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\AdcModel.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\TimerHardware.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\AdcTemperatureSensor.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\AdcConductor.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\AdcHardware.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\AdcHardware.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\Executor.c</file>
+      <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>
+      <file>$TOOLKIT_DIR$\lib\dl4tptinl8n.r79</file>
+      <file>$PROJ_DIR$\..\test\system\src\TemperatureCalculator.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\Types.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\TemperatureFilter.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\TimerConductor.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\TimerConfigurator.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\TimerHardware.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\TimerInterruptHandler.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\UsartConductor.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\UsartConfigurator.c</file>
+      <file>$PROJ_DIR$\..\test\system\src\UsartHardware.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\TimerConductor.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\AdcModel.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\AdcHardwareConfigurator.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\UsartConductor.h</file>
+      <file>$PROJ_DIR$\..\test\system\src\UsartModel.h</file>
+      <file>$PROJ_DIR$\Simulate\Obj\AdcConductor.r79</file>
+      <file>$PROJ_DIR$\Simulate\Obj\Cstartup_SAM7.pbi</file>
+      <file>$PROJ_DIR$\Simulate\Obj\UsartHardware.r79</file>
+      <file>$TOOLKIT_DIR$\inc\yvals.h</file>
+      <file>$PROJ_DIR$\incIAR\AT91SAM7X256_inc.h</file>
+      <file>$PROJ_DIR$\Simulate\List\TimerModel.lst</file>
+      <file>$PROJ_DIR$\Simulate\Obj\Executor.r79</file>
+      <file>$PROJ_DIR$\Simulate\Obj\TimerHardware.pbi</file>
+      <file>$PROJ_DIR$\Simulate\Obj\UsartModel.pbi</file>
+      <file>$PROJ_DIR$\Simulate\Obj\IntrinsicsWrapper.r79</file>
+      <file>$PROJ_DIR$\Simulate\Obj\TimerConductor.pbi</file>
+      <file>$PROJ_DIR$\Simulate\List\UsartConductor.lst</file>
+      <file>$PROJ_DIR$\Simulate\Obj\Main.pbi</file>
+      <file>$TOOLKIT_DIR$\inc\DLib_Threads.h</file>
+      <file>$PROJ_DIR$\Simulate\Obj\AdcHardwareConfigurator.pbi</file>
+      <file>$PROJ_DIR$\Simulate\Obj\TimerConfigurator.pbi</file>
+      <file>$PROJ_DIR$\Simulate\Exe\cmock_demo.sim</file>
+      <file>$PROJ_DIR$\Simulate\Obj\UsartTransmitBufferStatus.pbi</file>
+      <file>$PROJ_DIR$\Simulate\Obj\AdcHardware.r79</file>
+      <file>$PROJ_DIR$\Simulate\Obj\Main.r79</file>
+      <file>$PROJ_DIR$\Simulate\Obj\AdcTemperatureSensor.pbi</file>
+      <file>$PROJ_DIR$\Simulate\Obj\UsartPutChar.r79</file>
+      <file>$PROJ_DIR$\Simulate\Obj\AdcHardwareConfigurator.r79</file>
+      <file>$PROJ_DIR$\Simulate\Obj\UsartConductor.r79</file>
+      <file>$PROJ_DIR$\Simulate\Obj\TimerHardware.r79</file>
+      <file>$PROJ_DIR$\Simulate\Obj\TemperatureFilter.r79</file>
+      <file>$PROJ_DIR$\Simulate\Obj\TemperatureCalculator.pbi</file>
+      <file>$PROJ_DIR$\Simulate\Obj\TimerInterruptConfigurator.r79</file>
+      <file>$PROJ_DIR$\Simulate\Obj\UsartTransmitBufferStatus.r79</file>
+      <file>$PROJ_DIR$\Simulate\Obj\TimerConductor.r79</file>
+      <file>$PROJ_DIR$\Simulate\Obj\Executor.pbi</file>
+      <file>$PROJ_DIR$\Simulate\Obj\UsartConductor.pbi</file>
+      <file>$PROJ_DIR$\Simulate\Obj\TimerModel.pbi</file>
+      <file>$PROJ_DIR$\Simulate\Obj\AdcModel.pbi</file>
+      <file>$PROJ_DIR$\Simulate\List\TaskScheduler.lst</file>
+      <file>$PROJ_DIR$\Simulate\Obj\TimerModel.r79</file>
+      <file>$PROJ_DIR$\Simulate\Obj\TemperatureFilter.pbi</file>
+      <file>$PROJ_DIR$\Simulate\Obj\UsartBaudRateRegisterCalculator.pbi</file>
+      <file>$PROJ_DIR$\Simulate\Obj\UsartHardware.pbi</file>
+      <file>$PROJ_DIR$\Simulate\Obj\TaskScheduler.pbi</file>
+      <file>$PROJ_DIR$\Simulate\Obj\AdcConductor.pbi</file>
+      <file>$PROJ_DIR$\Simulate\Obj\TimerConfigurator.r79</file>
+      <file>$PROJ_DIR$\Simulate\Obj\Cstartup.r79</file>
+      <file>$PROJ_DIR$\Simulate\Obj\TimerInterruptHandler.pbi</file>
+      <file>$PROJ_DIR$\Simulate\Obj\AdcModel.r79</file>
+      <file>$PROJ_DIR$\Simulate\Obj\IntrinsicsWrapper.pbi</file>
+      <file>$PROJ_DIR$\Simulate\List\cmock_demo.map</file>
+      <file>$PROJ_DIR$\Simulate\Obj\TimerInterruptConfigurator.pbi</file>
+      <file>$PROJ_DIR$\Simulate\Exe\cmock_demo.d79</file>
+      <file>$PROJ_DIR$\Simulate\Obj\TaskScheduler.r79</file>
+      <file>$PROJ_DIR$\Simulate\Obj\Model.r79</file>
+      <file>$PROJ_DIR$\Simulate\Obj\UsartConfigurator.pbi</file>
+      <file>$PROJ_DIR$\Simulate\Obj\UsartModel.r79</file>
+      <file>$PROJ_DIR$\Simulate\Obj\Cstartup_SAM7.r79</file>
+      <file>$PROJ_DIR$\Simulate\Obj\TemperatureCalculator.r79</file>
+      <file>$PROJ_DIR$\Simulate\Obj\UsartPutChar.pbi</file>
+      <file>$PROJ_DIR$\Simulate\Obj\UsartConfigurator.r79</file>
+      <file>$PROJ_DIR$\Simulate\Obj\AdcHardware.pbi</file>
+      <file>$PROJ_DIR$\Simulate\Obj\AdcTemperatureSensor.r79</file>
+      <file>$PROJ_DIR$\Simulate\Obj\Model.pbi</file>
+      <file>$PROJ_DIR$\Simulate\Obj\UsartBaudRateRegisterCalculator.r79</file>
+      <file>$PROJ_DIR$\Simulate\List\UsartBaudRateRegisterCalculator.lst</file>
+      <file>$PROJ_DIR$\Simulate\List\UsartTransmitBufferStatus.lst</file>
+      <file>$PROJ_DIR$\Simulate\List\AdcHardware.lst</file>
+      <file>$PROJ_DIR$\Simulate\List\TimerInterruptConfigurator.lst</file>
+      <file>$PROJ_DIR$\Simulate\List\Model.lst</file>
+      <file>$PROJ_DIR$\Simulate\Obj\TimerInterruptHandler.r79</file>
+      <file>$PROJ_DIR$\Simulate\List\UsartPutChar.lst</file>
+      <file>$PROJ_DIR$\Simulate\List\UsartHardware.lst</file>
+      <file>$PROJ_DIR$\Simulate\List\Executor.lst</file>
+      <file>$PROJ_DIR$\Simulate\List\TimerConfigurator.lst</file>
+      <file>$PROJ_DIR$\Simulate\List\AdcTemperatureSensor.lst</file>
+      <file>$PROJ_DIR$\Simulate\List\Cstartup_SAM7.lst</file>
+      <file>$PROJ_DIR$\Simulate\List\AdcHardwareConfigurator.lst</file>
+      <file>$PROJ_DIR$\Simulate\List\AdcModel.lst</file>
+      <file>$PROJ_DIR$\Simulate\List\TemperatureFilter.lst</file>
+      <file>$PROJ_DIR$\Simulate\List\AdcConductor.lst</file>
+      <file>$PROJ_DIR$\Simulate\List\UsartConfigurator.lst</file>
+      <file>$PROJ_DIR$\Simulate\List\IntrinsicsWrapper.lst</file>
+      <file>$PROJ_DIR$\Simulate\List\TimerHardware.lst</file>
+      <file>$PROJ_DIR$\Simulate\List\TemperatureCalculator.lst</file>
+      <file>$PROJ_DIR$\Simulate\List\TimerInterruptHandler.lst</file>
+      <file>$PROJ_DIR$\Simulate\List\UsartModel.lst</file>
+      <file>$PROJ_DIR$\Simulate\List\Main.lst</file>
+      <file>$PROJ_DIR$\Simulate\List\TimerConductor.lst</file>
+      <file>$PROJ_DIR$\Resource\at91SAM7X256_FLASH.xcl</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerConductor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerHardware.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerInterruptConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerModel.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartBaudRateRegisterCalculator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartModel.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartConductor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartHardware.c</file>
+      <file>$PROJ_DIR$\Cstartup.s79</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartPutChar.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartTransmitBufferStatus.c</file>
+      <file>$PROJ_DIR$\Cstartup_SAM7.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcModel.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcTemperatureSensor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Executor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Main.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\IntrinsicsWrapper.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Model.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TemperatureCalculator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TaskScheduler.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerInterruptHandler.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TemperatureFilter.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcHardwareConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcConductor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcHardware.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Executor.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcModel.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\ModelConfig.h</file>
+      <file>$PROJ_DIR$\srcIAR\Cstartup.s79</file>
+      <file>$PROJ_DIR$\srcIAR\Cstartup_SAM7.c</file>
+    </outputs>
+    <file>
+      <name>[ROOT_NODE]</name>
+      <outputs>
+        <tool>
+          <name>XLINK</name>
+          <file> 133 131 101</file>
+        </tool>
+      </outputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\Simulate\Obj\cmock_demo.pbd</name>
+      <inputs>
+        <tool>
+          <name>BILINK</name>
+          <file> 125 142 99 118 105 86 115 130 97 144 124 111 121 95 100 92 132 128 117 122 116 136 123 93 140 102</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\Main.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 104</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 97</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 71 40 42 59 36 0 60 83 79 38 33 84 41 37 80 62 39 58 45 44 57 66 82 34 81</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 71 40 42 59 36 0 60 83 79 38 33 84 41 37 80 62 39 58 45 44 57 66 82 34 81</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\Model.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 135</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 144</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 59 71 40 36 60</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 59 71 40 36 60</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\AdcHardwareConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 107</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 99</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 71 40 82 43</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 71 40 82 43</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\TimerModel.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 120</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 117</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 71 40 44 36</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 71 40 44 36</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\UsartModel.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 137</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 93</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 71 40 84 43 41 60 29 88 3 32 27 68 98 31 28 30</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 71 40 84 43 41 60 29 88 3 27 68 98 31 28 30</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\UsartHardware.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 87</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 123</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 71 40 79 38 33</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 71 40 79 38 33</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\UsartTransmitBufferStatus.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 113</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 102</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 71 40 37</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 71 40 37</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\UsartPutChar.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 106</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 140</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 71 40 33 37 29 88 3 32 27 68 98 31</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 71 40 33 37 29 88 3 27 68 98 31</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\TimerInterruptConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 112</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 132</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 71 40 58 45</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 71 40 58 45</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\UsartBaudRateRegisterCalculator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 145</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 122</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 71 40 41</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 71 40 41</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\TaskScheduler.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 134</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 124</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 71 40 36</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 71 40 36</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\AdcModel.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 129</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 118</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 71 40 81 36 0 60</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 71 40 81 36 0 60</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\AdcTemperatureSensor.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 143</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 105</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 71 40 34</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 71 40 34</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\AdcConductor.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 85</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 125</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 71 40 57 81 66</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 71 40 57 81 66</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\AdcHardware.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 103</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 142</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 71 40 66 82 34</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 71 40 66 82 34</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\Executor.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 91</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 115</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 71 40 42 59 83 80 57</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 71 40 42 59 83 80 57</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\TemperatureCalculator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 139</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 111</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 71 40 0 28 30 88 3 32 27 68 98</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 71 40 0 28 30 88 3 27 68 98</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\TemperatureFilter.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 110</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 121</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 71 40 60 28 30 88 3 32 27 68 98</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 71 40 60 28 30 88 3 27 68 98</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\TimerConductor.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 114</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 95</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 71 40 80 44 62 45</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 71 40 80 44 62 45</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\TimerConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 126</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 100</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 71 40 39 58</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 71 40 39 58</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\TimerHardware.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 109</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 92</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 71 40 62 39</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 71 40 62 39</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\TimerInterruptHandler.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 151</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 128</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 71 40 45 58</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 71 40 45 58</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\UsartConductor.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 108</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 116</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 71 40 83 79 84 36</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 71 40 83 79 84 36</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\test\system\src\UsartConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 141</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 136</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 71 40 38</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 71 40 38</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\Simulate\Exe\cmock_demo.d79</name>
+      <outputs>
+        <tool>
+          <name>XLINK</name>
+          <file> 131 101</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>XLINK</name>
+          <file> 170 85 103 107 129 143 127 138 91 94 104 135 134 139 110 114 126 109 112 151 120 145 108 141 87 137 106 113 69</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerConductor.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 114 169</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 95</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 15 23 25 22</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 15 23 25 22</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 126 155</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 100</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 24 21</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 24 21</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerHardware.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 109 164</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 92</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 25 24</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 25 24</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerInterruptConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 112 149</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 132</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 21 22</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 21 22</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerModel.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 120 90</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 117</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 23 6</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 23 6</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartBaudRateRegisterCalculator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 145 146</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 122</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 26</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 26</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartModel.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 137 167</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 93</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 17 200 26 14 29 88 3 32 27 68 98 31 28 30</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 17 200 26 14 29 88 3 27 68 98 31 28 30</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartConductor.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 108 96</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 116</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 7 19 17 6</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 7 19 17 6</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 141 162</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 136</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 12</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 12</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartHardware.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 87 153</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 123</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 19 12 16</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 19 12 16</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\Cstartup.s79</name>
+      <outputs>
+        <tool>
+          <name>AARM</name>
+          <file> 127</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>AARM</name>
+          <file> 89</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartPutChar.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 106 152</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 140</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 16 20 29 88 3 32 27 68 98 31</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 16 20 29 88 3 27 68 98 31</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartTransmitBufferStatus.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 113 147</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 102</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 20</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 20</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\Cstartup_SAM7.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 138 157</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 86</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 4</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 4</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcModel.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 129 159</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 118</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 199 6 10 14</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 199 6 10 14</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcTemperatureSensor.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 143 156</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 105</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 11</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 11</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\Executor.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 91 154</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 115</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 198 8 7 15 5 18</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 198 8 7 15 5 18</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\Main.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 104 168</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 97</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 18 198 8 6 10 14 7 19 12 16 17 26 20 15 25 24 21 22 23 5 13 2 11 199</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 18 198 8 6 10 14 7 19 12 16 17 26 20 15 25 24 21 22 23 5 13 2 11 199</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\IntrinsicsWrapper.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 94 163</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 130</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 18 9</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 18 9</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\Model.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 135 150</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 144</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 8 1 4 6 14</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 8 1 4 6 14</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TemperatureCalculator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 139 165</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 111</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 10 28 30 88 3 32 27 68 98</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 10 28 30 88 3 27 68 98</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TaskScheduler.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 134 119</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 124</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 6</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 6</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerInterruptHandler.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 151 166</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 128</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 22 21</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 22 21</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TemperatureFilter.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 110 160</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 121</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 14 28 30 88 3 32 27 68 98</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 14 28 30 88 3 27 68 98</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcHardwareConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 107 158</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 99</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 2 200</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 2 200</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcConductor.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 85 161</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 125</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 5 199 13</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 5 199 13</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcHardware.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 103 148</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 142</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 1 4 13 2 11</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 1 4 13 2 11</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\srcIAR\Cstartup.s79</name>
+      <outputs>
+        <tool>
+          <name>AARM</name>
+          <file> 127</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>AARM</name>
+          <file> 89</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\srcIAR\Cstartup_SAM7.c</name>
+      <outputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 138 157</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 86</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 4</file>
+        </tool>
+        <tool>
+          <name>BICOMP</name>
+          <file> 4</file>
+        </tool>
+      </inputs>
+    </file>
+  </configuration>
+</project>
+
+
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/cmock_demo.ewd b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/cmock_demo.ewd
new file mode 100644
index 000000000..1632636e6
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/cmock_demo.ewd
@@ -0,0 +1,1696 @@
+<?xml version="1.0" encoding="iso-8859-1"?>

+

+<project>

+  <fileVersion>1</fileVersion>

+  <configuration>

+    <name>Debug</name>

+    <toolchain>

+      <name>ARM</name>

+    </toolchain>

+    <debug>1</debug>

+    <settings>

+      <name>C-SPY</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>13</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>CInput</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CEndian</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CProcessor</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>OCVariant</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>MacOverride</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>MacFile</name>

+          <state>$PROJ_DIR$\Resource\SAM7_FLASH.mac</state>

+        </option>

+        <option>

+          <name>MemOverride</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>MemFile</name>

+          <state>$TOOLKIT_DIR$\CONFIG\ioAT91SAM7X256.ddf</state>

+        </option>

+        <option>

+          <name>RunToEnable</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>RunToName</name>

+          <state>main</state>

+        </option>

+        <option>

+          <name>CExtraOptionsCheck</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CExtraOptions</name>

+          <state></state>

+        </option>

+        <option>

+          <name>CFpuProcessor</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>OCDDFArgumentProducer</name>

+          <state></state>

+        </option>

+        <option>

+          <name>OCDownloadSuppressDownload</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCDownloadVerifyAll</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>OCProductVersion</name>

+          <state>4.41A</state>

+        </option>

+        <option>

+          <name>OCDynDriverList</name>

+          <state>JLINK_ID</state>

+        </option>

+        <option>

+          <name>OCLastSavedByProductVersion</name>

+          <state>4.41A</state>

+        </option>

+        <option>

+          <name>OCDownloadAttachToProgram</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>FlashLoaders</name>

+          <state>,,,,(default),</state>

+        </option>

+        <option>

+          <name>UseFlashLoader</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>ARMSIM_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>0</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>OCSimDriverInfo</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>ANGEL_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>0</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>CCAngelHeartbeat</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CAngelCommunication</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CAngelCommBaud</name>

+          <version>0</version>

+          <state>3</state>

+        </option>

+        <option>

+          <name>CAngelCommPort</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>ANGELTCPIP</name>

+          <state>aaa.bbb.ccc.ddd</state>

+        </option>

+        <option>

+          <name>DoAngelLogfile</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>AngelLogFile</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>IARROM_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>0</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>CRomLogFileCheck</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CRomLogFileEditB</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>CRomCommunication</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CRomCommPort</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CRomCommBaud</name>

+          <version>0</version>

+          <state>7</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>JLINK_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>6</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>JLinkSpeed</name>

+          <state>32</state>

+        </option>

+        <option>

+          <name>CCJLinkDoLogfile</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkLogFile</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>CCJLinkHWResetDelay</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>JLinkInitialSpeed</name>

+          <state>32</state>

+        </option>

+        <option>

+          <name>CCDoJlinkMultiTarget</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCScanChainNonARMDevices</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkMultiTarget</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkIRLength</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkCommRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkTCPIP</name>

+          <state>aaa.bbb.ccc.ddd</state>

+        </option>

+        <option>

+          <name>CCJLinkResetRadio</name>

+          <state>2</state>

+        </option>

+        <option>

+          <name>CCJLinkResetInitSeq</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkSpeedRadioV2</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCUSBDevice</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchReset</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchUndef</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchSWI</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchData</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchPrefetch</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchIRQ</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchFIQ</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkBreakpointRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkDoUpdateBreakpoints</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkUpdateBreakpoints</name>

+          <state>main</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>LMIFTDI_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>0</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>LmiftdiSpeed</name>

+          <state>500</state>

+        </option>

+        <option>

+          <name>CCLmiftdiResetRadio</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CCLmiftdiDoLogfile</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCLmiftdiLogFile</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>CCLmiftdiBreakpointRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCLmiftdiDoUpdateBreakpoints</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCLmiftdiUpdateBreakpoints</name>

+          <state>main</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>MACRAIGOR_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>2</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>jtag</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>EmuSpeed</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>TCPIP</name>

+          <state>aaa.bbb.ccc.ddd</state>

+        </option>

+        <option>

+          <name>DoLogfile</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>LogFile</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>DoEmuMultiTarget</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>EmuMultiTarget</name>

+          <state>0@ARM7TDMI</state>

+        </option>

+        <option>

+          <name>EmuHWReset</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CEmuCommBaud</name>

+          <version>0</version>

+          <state>4</state>

+        </option>

+        <option>

+          <name>CEmuCommPort</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>jtago</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>UnusedAddr</name>

+          <state>0x00800000</state>

+        </option>

+        <option>

+          <name>CCMacraigorHWResetDelay</name>

+          <state></state>

+        </option>

+        <option>

+          <name>CCJTagBreakpointRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJTagDoUpdateBreakpoints</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJTagUpdateBreakpoints</name>

+          <state>main</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>RDI_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>1</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>CRDIDriverDll</name>

+          <state>Browse to your RDI driver</state>

+        </option>

+        <option>

+          <name>CRDILogFileCheck</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CRDILogFileEdit</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>CCRDIHWReset</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchReset</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchUndef</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchSWI</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchData</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchPrefetch</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchIRQ</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchFIQ</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDIUseETM</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>THIRDPARTY_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>0</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>CThirdPartyDriverDll</name>

+          <state>Browse to your third-party driver</state>

+        </option>

+        <option>

+          <name>CThirdPartyLogFileCheck</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CThirdPartyLogFileEditB</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <debuggerPlugins>

+      <plugin>

+        <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ewplugin</file>

+        <loadFlag>1</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$EW_DIR$\common\plugins\Orti\Orti.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$EW_DIR$\common\plugins\Profiling\Profiling.ewplugin</file>

+        <loadFlag>1</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$EW_DIR$\common\plugins\Stack\Stack.ewplugin</file>

+        <loadFlag>1</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXArmPlugin.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXTinyArmPlugin.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+    </debuggerPlugins>

+  </configuration>

+  <configuration>

+    <name>Simulate</name>

+    <toolchain>

+      <name>ARM</name>

+    </toolchain>

+    <debug>1</debug>

+    <settings>

+      <name>C-SPY</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>13</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>CInput</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CEndian</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CProcessor</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>OCVariant</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>MacOverride</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>MacFile</name>

+          <state>$PROJ_DIR$\Resource\SAM7_SIM.mac</state>

+        </option>

+        <option>

+          <name>MemOverride</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>MemFile</name>

+          <state>$TOOLKIT_DIR$\CONFIG\ioAT91SAM7X256.ddf</state>

+        </option>

+        <option>

+          <name>RunToEnable</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>RunToName</name>

+          <state>main</state>

+        </option>

+        <option>

+          <name>CExtraOptionsCheck</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CExtraOptions</name>

+          <state></state>

+        </option>

+        <option>

+          <name>CFpuProcessor</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>OCDDFArgumentProducer</name>

+          <state></state>

+        </option>

+        <option>

+          <name>OCDownloadSuppressDownload</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCDownloadVerifyAll</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCProductVersion</name>

+          <state>4.41A</state>

+        </option>

+        <option>

+          <name>OCDynDriverList</name>

+          <state>ARMSIM_ID</state>

+        </option>

+        <option>

+          <name>OCLastSavedByProductVersion</name>

+          <state>4.41A</state>

+        </option>

+        <option>

+          <name>OCDownloadAttachToProgram</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>FlashLoaders</name>

+          <state>,,,,(default),</state>

+        </option>

+        <option>

+          <name>UseFlashLoader</name>

+          <state>0</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>ARMSIM_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>0</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>OCSimDriverInfo</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>ANGEL_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>0</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>CCAngelHeartbeat</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CAngelCommunication</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CAngelCommBaud</name>

+          <version>0</version>

+          <state>3</state>

+        </option>

+        <option>

+          <name>CAngelCommPort</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>ANGELTCPIP</name>

+          <state>aaa.bbb.ccc.ddd</state>

+        </option>

+        <option>

+          <name>DoAngelLogfile</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>AngelLogFile</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>IARROM_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>0</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>CRomLogFileCheck</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CRomLogFileEditB</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>CRomCommunication</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CRomCommPort</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CRomCommBaud</name>

+          <version>0</version>

+          <state>7</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>JLINK_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>6</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>JLinkSpeed</name>

+          <state>32</state>

+        </option>

+        <option>

+          <name>CCJLinkDoLogfile</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkLogFile</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>CCJLinkHWResetDelay</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>JLinkInitialSpeed</name>

+          <state>32</state>

+        </option>

+        <option>

+          <name>CCDoJlinkMultiTarget</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCScanChainNonARMDevices</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkMultiTarget</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkIRLength</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkCommRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkTCPIP</name>

+          <state>aaa.bbb.ccc.ddd</state>

+        </option>

+        <option>

+          <name>CCJLinkResetRadio</name>

+          <state>2</state>

+        </option>

+        <option>

+          <name>CCJLinkResetInitSeq</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkSpeedRadioV2</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCUSBDevice</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchReset</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchUndef</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchSWI</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchData</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchPrefetch</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchIRQ</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchFIQ</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkBreakpointRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkDoUpdateBreakpoints</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkUpdateBreakpoints</name>

+          <state>main</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>LMIFTDI_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>0</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>LmiftdiSpeed</name>

+          <state>500</state>

+        </option>

+        <option>

+          <name>CCLmiftdiResetRadio</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CCLmiftdiDoLogfile</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCLmiftdiLogFile</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>CCLmiftdiBreakpointRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCLmiftdiDoUpdateBreakpoints</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCLmiftdiUpdateBreakpoints</name>

+          <state>main</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>MACRAIGOR_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>2</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>jtag</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>EmuSpeed</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>TCPIP</name>

+          <state>aaa.bbb.ccc.ddd</state>

+        </option>

+        <option>

+          <name>DoLogfile</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>LogFile</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>DoEmuMultiTarget</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>EmuMultiTarget</name>

+          <state>0@ARM7TDMI</state>

+        </option>

+        <option>

+          <name>EmuHWReset</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CEmuCommBaud</name>

+          <version>0</version>

+          <state>4</state>

+        </option>

+        <option>

+          <name>CEmuCommPort</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>jtago</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>UnusedAddr</name>

+          <state>0x00800000</state>

+        </option>

+        <option>

+          <name>CCMacraigorHWResetDelay</name>

+          <state></state>

+        </option>

+        <option>

+          <name>CCJTagBreakpointRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJTagDoUpdateBreakpoints</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJTagUpdateBreakpoints</name>

+          <state>main</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>RDI_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>1</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>CRDIDriverDll</name>

+          <state>Browse to your RDI driver</state>

+        </option>

+        <option>

+          <name>CRDILogFileCheck</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CRDILogFileEdit</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>CCRDIHWReset</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchReset</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchUndef</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchSWI</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchData</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchPrefetch</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchIRQ</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchFIQ</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDIUseETM</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>THIRDPARTY_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>0</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>CThirdPartyDriverDll</name>

+          <state>Browse to your third-party driver</state>

+        </option>

+        <option>

+          <name>CThirdPartyLogFileCheck</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CThirdPartyLogFileEditB</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <debuggerPlugins>

+      <plugin>

+        <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ewplugin</file>

+        <loadFlag>1</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$EW_DIR$\common\plugins\Orti\Orti.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$EW_DIR$\common\plugins\Profiling\Profiling.ewplugin</file>

+        <loadFlag>1</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$EW_DIR$\common\plugins\Stack\Stack.ewplugin</file>

+        <loadFlag>1</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXArmPlugin.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXTinyArmPlugin.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+    </debuggerPlugins>

+  </configuration>

+  <configuration>

+    <name>Release</name>

+    <toolchain>

+      <name>ARM</name>

+    </toolchain>

+    <debug>0</debug>

+    <settings>

+      <name>C-SPY</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>13</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>0</debug>

+        <option>

+          <name>CInput</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CEndian</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CProcessor</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>OCVariant</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>MacOverride</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>MacFile</name>

+          <state>$PROJ_DIR$\Resource\SAM7_FLASH.mac</state>

+        </option>

+        <option>

+          <name>MemOverride</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>MemFile</name>

+          <state>$TOOLKIT_DIR$\CONFIG\ioAT91SAM7X256.ddf</state>

+        </option>

+        <option>

+          <name>RunToEnable</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>RunToName</name>

+          <state>main</state>

+        </option>

+        <option>

+          <name>CExtraOptionsCheck</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CExtraOptions</name>

+          <state></state>

+        </option>

+        <option>

+          <name>CFpuProcessor</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>OCDDFArgumentProducer</name>

+          <state></state>

+        </option>

+        <option>

+          <name>OCDownloadSuppressDownload</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCDownloadVerifyAll</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>OCProductVersion</name>

+          <state>4.41A</state>

+        </option>

+        <option>

+          <name>OCDynDriverList</name>

+          <state>JLINK_ID</state>

+        </option>

+        <option>

+          <name>OCLastSavedByProductVersion</name>

+          <state>4.41A</state>

+        </option>

+        <option>

+          <name>OCDownloadAttachToProgram</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>FlashLoaders</name>

+          <state>,,,,(default),</state>

+        </option>

+        <option>

+          <name>UseFlashLoader</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>ARMSIM_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>0</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>0</debug>

+        <option>

+          <name>OCSimDriverInfo</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>ANGEL_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>0</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>0</debug>

+        <option>

+          <name>CCAngelHeartbeat</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CAngelCommunication</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CAngelCommBaud</name>

+          <version>0</version>

+          <state>3</state>

+        </option>

+        <option>

+          <name>CAngelCommPort</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>ANGELTCPIP</name>

+          <state>aaa.bbb.ccc.ddd</state>

+        </option>

+        <option>

+          <name>DoAngelLogfile</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>AngelLogFile</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>IARROM_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>0</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>0</debug>

+        <option>

+          <name>CRomLogFileCheck</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CRomLogFileEditB</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>CRomCommunication</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CRomCommPort</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CRomCommBaud</name>

+          <version>0</version>

+          <state>7</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>JLINK_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>6</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>0</debug>

+        <option>

+          <name>JLinkSpeed</name>

+          <state>32</state>

+        </option>

+        <option>

+          <name>CCJLinkDoLogfile</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkLogFile</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>CCJLinkHWResetDelay</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>JLinkInitialSpeed</name>

+          <state>32</state>

+        </option>

+        <option>

+          <name>CCDoJlinkMultiTarget</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCScanChainNonARMDevices</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkMultiTarget</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkIRLength</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkCommRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkTCPIP</name>

+          <state>aaa.bbb.ccc.ddd</state>

+        </option>

+        <option>

+          <name>CCJLinkResetRadio</name>

+          <state>2</state>

+        </option>

+        <option>

+          <name>CCJLinkResetInitSeq</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkSpeedRadioV2</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCUSBDevice</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchReset</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchUndef</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchSWI</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchData</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchPrefetch</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchIRQ</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchFIQ</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkBreakpointRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkDoUpdateBreakpoints</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkUpdateBreakpoints</name>

+          <state>main</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>LMIFTDI_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>0</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>0</debug>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>LmiftdiSpeed</name>

+          <state>500</state>

+        </option>

+        <option>

+          <name>CCLmiftdiResetRadio</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CCLmiftdiDoLogfile</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCLmiftdiLogFile</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>CCLmiftdiBreakpointRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCLmiftdiDoUpdateBreakpoints</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCLmiftdiUpdateBreakpoints</name>

+          <state>main</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>MACRAIGOR_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>2</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>0</debug>

+        <option>

+          <name>jtag</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>EmuSpeed</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>TCPIP</name>

+          <state>aaa.bbb.ccc.ddd</state>

+        </option>

+        <option>

+          <name>DoLogfile</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>LogFile</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>DoEmuMultiTarget</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>EmuMultiTarget</name>

+          <state>0@ARM7TDMI</state>

+        </option>

+        <option>

+          <name>EmuHWReset</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CEmuCommBaud</name>

+          <version>0</version>

+          <state>4</state>

+        </option>

+        <option>

+          <name>CEmuCommPort</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>jtago</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>UnusedAddr</name>

+          <state>0x00800000</state>

+        </option>

+        <option>

+          <name>CCMacraigorHWResetDelay</name>

+          <state></state>

+        </option>

+        <option>

+          <name>CCJTagBreakpointRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJTagDoUpdateBreakpoints</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJTagUpdateBreakpoints</name>

+          <state>main</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>RDI_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>1</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>0</debug>

+        <option>

+          <name>CRDIDriverDll</name>

+          <state>Browse to your RDI driver</state>

+        </option>

+        <option>

+          <name>CRDILogFileCheck</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CRDILogFileEdit</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>CCRDIHWReset</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchReset</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchUndef</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchSWI</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchData</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchPrefetch</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchIRQ</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchFIQ</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDIUseETM</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>THIRDPARTY_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>0</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>0</debug>

+        <option>

+          <name>CThirdPartyDriverDll</name>

+          <state>Browse to your third-party driver</state>

+        </option>

+        <option>

+          <name>CThirdPartyLogFileCheck</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CThirdPartyLogFileEditB</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <debuggerPlugins>

+      <plugin>

+        <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ewplugin</file>

+        <loadFlag>1</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$EW_DIR$\common\plugins\Orti\Orti.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$EW_DIR$\common\plugins\Profiling\Profiling.ewplugin</file>

+        <loadFlag>1</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$EW_DIR$\common\plugins\Stack\Stack.ewplugin</file>

+        <loadFlag>1</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXArmPlugin.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CMXTinyArmPlugin.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+    </debuggerPlugins>

+  </configuration>

+</project>

+

+

diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/cmock_demo.ewp b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/cmock_demo.ewp
new file mode 100644
index 000000000..ec55fbe54
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/cmock_demo.ewp
@@ -0,0 +1,2581 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<project>
+  <fileVersion>1</fileVersion>
+  <configuration>
+    <name>Debug</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>9</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>GProcessorMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ExePath</name>
+          <state>Debug\Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>Debug\Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>Debug\List</state>
+        </option>
+        <option>
+          <name>Variant</name>
+          <version>5</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GInterwork</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GStackAlign</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input variant</name>
+          <version>1</version>
+          <state>3</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing.</state>
+        </option>
+        <option>
+          <name>Output variant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FPU</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>RTConfigPath</name>
+          <state>$TOOLKIT_DIR$\LIB\dl4tptinl8n.h</state>
+        </option>
+        <option>
+          <name>RTLibraryPath</name>
+          <state>$TOOLKIT_DIR$\LIB\dl4tptinl8n.r79</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>4.41A</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>AT91SAM7X256	Atmel AT91SAM7X256</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>14</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptSizeSpeed</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptimization</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>0000000</state>
+        </option>
+        <option>
+          <name>CCObjUseModuleName</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCObjModuleName</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessorMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IStackAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IInterwork</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCMultibyteSupport</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.r79</state>
+        </option>
+        <option>
+          <name>CCLangSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptSizeSpeedSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptimizationSlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCCodeFunctions</name>
+          <state>CODE</state>
+        </option>
+        <option>
+          <name>CCData</name>
+          <state>DATA</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraRules</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCModuleTypeOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCModuleType</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCModuleTypeCmdlineProducer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$\..\..\examples\src</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCStdIncludePath</name>
+          <state>$TOOLKIT_DIR$\INC\</state>
+        </option>
+        <option>
+          <name>CCInlineThreshold</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>7</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>ADebug</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AltRegisterNames</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ADefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AList</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AListHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AListing</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Includes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacDefs</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacExps</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacExec</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OnlyAssed</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MultiLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLengthCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLength</name>
+          <state>80</state>
+        </option>
+        <option>
+          <name>TabSpacing</name>
+          <state>8</state>
+        </option>
+        <option>
+          <name>AXRef</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDefines</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefInternal</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDual</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.r79</state>
+        </option>
+        <option>
+          <name>AMultibyteSupport</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
+        </option>
+        <option>
+          <name>AIgnoreStdInclude</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AStdIncludes</name>
+          <state>$TOOLKIT_DIR$\INC\</state>
+        </option>
+        <option>
+          <name>AUserIncludes</name>
+          <state>$PROJ_DIR$\incIAR</state>
+        </option>
+        <option>
+          <name>AExtraOptionsCheckV2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
+        </option>
+      </data>
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+          <state>0</state>
+        </option>
+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>CUSTOM</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <extensions></extensions>
+        <cmdline></cmdline>
+      </data>
+    </settings>
+    <settings>
+      <name>BICOMP</name>
+      <archiveVersion>0</archiveVersion>
+      <data/>
+    </settings>
+    <settings>
+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
+      <data>
+        <prebuild></prebuild>
+        <postbuild></postbuild>
+      </data>
+    </settings>
+    <settings>
+      <name>XLINK</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>18</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>XOutOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>cmock_demo.d79</state>
+        </option>
+        <option>
+          <name>OutputFormat</name>
+          <version>11</version>
+          <state>16</state>
+        </option>
+        <option>
+          <name>FormatVariant</name>
+          <version>7</version>
+          <state>16</state>
+        </option>
+        <option>
+          <name>SecondaryOutputFile</name>
+          <state>(None for the selected format)</state>
+        </option>
+        <option>
+          <name>XDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AlwaysOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OverlapWarnings</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>NoGlobalCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>XList</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>SegmentMap</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ListSymbols</name>
+          <state>2</state>
+        </option>
+        <option>
+          <name>PageLengthCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLength</name>
+          <state>80</state>
+        </option>
+        <option>
+          <name>XIncludes</name>
+          <state>$TOOLKIT_DIR$\LIB\</state>
+        </option>
+        <option>
+          <name>ModuleStatus</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>XclOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>XclFile</name>
+          <state>$PROJ_DIR$\Resource\at91SAM7X256_FLASH.xcl</state>
+        </option>
+        <option>
+          <name>XclFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlgo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>RangeCheckAlternatives</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>SuppressAllWarn</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>SuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>TreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>TreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>ModuleLocalSym</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>XExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>XExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IncludeSuppressed</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OXLibIOConfig</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ModuleSummary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>xcProgramEntryLabel</name>
+          <state>__program_start</state>
+        </option>
+        <option>
+          <name>DebugInformation</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>RuntimeControl</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IoEmulation</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>XcRTLibraryFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AllowExtraOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GenerateExtraOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>XExtraOutOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ExtraOutputFile</name>
+          <state>cmock_demo.sim</state>
+        </option>
+        <option>
+          <name>ExtraOutputFormat</name>
+          <version>11</version>
+          <state>60</state>
+        </option>
+        <option>
+          <name>ExtraFormatVariant</name>
+          <version>7</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>xcOverrideProgramEntryLabel</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>xcProgramEntryLabelSelect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ListOutputFormat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>BufferedTermOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OverlaySystemMap</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>RawBinaryFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>RawBinarySymbol</name>
+          <state></state>
+        </option>
+        <option>
+          <name>RawBinarySegment</name>
+          <state></state>
+        </option>
+        <option>
+          <name>RawBinaryAlign</name>
+          <state></state>
+        </option>
+        <option>
+          <name>XLinkMisraHandler</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>XAR</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>XARInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>XAROverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>XAROutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data/>
+    </settings>
+  </configuration>
+  <group>
+    <name>Resource</name>
+    <file>
+      <name>$PROJ_DIR$\Resource\at91SAM7X256_FLASH.xcl</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\Resource\at91SAM7X256_RAM.xcl</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\Resource\SAM7_FLASH.mac</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\Resource\SAM7_RAM.mac</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\Resource\SAM7_SIM.mac</name>
+    </file>
+  </group>
+  <group>
+    <name>Source</name>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcConductor.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcHardware.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcHardwareConfigurator.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcModel.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcTemperatureSensor.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\Executor.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\IntrinsicsWrapper.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\Main.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\Model.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TaskScheduler.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TemperatureCalculator.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TemperatureFilter.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerConductor.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerConfigurator.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerHardware.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerInterruptConfigurator.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerInterruptHandler.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerModel.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartBaudRateRegisterCalculator.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartConductor.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartConfigurator.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartHardware.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartModel.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartPutChar.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartTransmitBufferStatus.c</name>
+    </file>
+  </group>
+  <group>
+    <name>Startup</name>
+    <file>
+      <name>$PROJ_DIR$\srcIAR\Cstartup.s79</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\srcIAR\Cstartup_SAM7.c</name>
+    </file>
+  </group>
+</project>
+
+
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/cmock_demo.eww b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/cmock_demo.eww
new file mode 100644
index 000000000..dabdf551e
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/cmock_demo.eww
@@ -0,0 +1,10 @@
+<?xml version="1.0" encoding="iso-8859-1"?>

+

+<workspace>

+  <project>

+    <path>$WS_DIR$\cmock_demo.ewp</path>

+  </project>

+  <batchBuild/>

+</workspace>

+

+

diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/incIAR/AT91SAM7X-EK.h b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/incIAR/AT91SAM7X-EK.h
new file mode 100644
index 000000000..98346759b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/incIAR/AT91SAM7X-EK.h
@@ -0,0 +1,61 @@
+// ----------------------------------------------------------------------------
+//         ATMEL Microcontroller Software Support  -  ROUSSET  -
+// ----------------------------------------------------------------------------
+// DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+// IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+// DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+// OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+// EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+// ----------------------------------------------------------------------------
+// File Name           : AT91SAM7X-EK.h
+// Object              : AT91SAM7X-EK Evaluation Board Features Definition File
+//
+//  ----------------------------------------------------------------------------
+
+#ifndef AT91SAM7X_EK_H
+#define AT91SAM7X_EK_H
+
+/*-----------------*/
+/* LEDs Definition */
+/*-----------------*/
+#define AT91B_LED1            (1<<19)       // AT91C_PIO_PB19 AT91C_PB19_PWM0 AT91C_PB19_TCLK1
+#define AT91B_LED2            (1<<20)       // AT91C_PIO_PB20 AT91C_PB20_PWM1 AT91C_PB20_PWM1
+#define AT91B_LED3            (AT91C_PIO_PB21)       // AT91C_PIO_PB21 AT91C_PB21_PWM2 AT91C_PB21_PCK1
+#define AT91B_LED4            (AT91C_PIO_PB22)       // AT91C_PIO_PB22 AT91C_PB22_PWM3 AT91C_PB22_PCK2
+#define AT91B_NB_LEB          4
+#define AT91B_LED_MASK        (AT91B_LED1|AT91B_LED2|AT91B_LED3|AT91B_LED4)
+#define AT91D_BASE_PIO_LED 	  (AT91C_BASE_PIOB)
+
+#define AT91B_POWERLED        (1<<25)       // PB25
+
+
+/*-------------------------------*/
+/* JOYSTICK Position Definition  */
+/*-------------------------------*/
+#define AT91B_SW1           (1<<21)  // PA21 Up Button	  AT91C_PA21_TF  AT91C_PA21_NPCS10
+#define AT91B_SW2           (1<<22)  // PA22 Down Button  AT91C_PA22_TK	 AT91C_PA22_SPCK1
+#define AT91B_SW3           (1<<23)  // PA23 Left Button  AT91C_PA23_TD  AT91C_PA23_MOSI1
+#define AT91B_SW4           (1<<24)  // PA24 Right Button AT91C_PA24_RD	 AT91C_PA24_MISO1
+#define AT91B_SW5           (1<<25)  // PA25 Push Button  AT91C_PA25_RK	 AT91C_PA25_NPCS11
+#define AT91B_SW_MASK       (AT91B_SW1|AT91B_SW2|AT91B_SW3|AT91B_SW4|AT91B_SW5)
+
+
+#define AT91D_BASE_PIO_SW   (AT91C_BASE_PIOA)
+
+/*------------------*/
+/* CAN Definition   */
+/*------------------*/
+#define AT91B_CAN_TRANSCEIVER_RS  (1<<2)    // PA2
+
+/*--------------*/
+/* Clocks       */
+/*--------------*/
+#define AT91B_MAIN_OSC        18432000               // Main Oscillator MAINCK
+#define AT91B_MCK             ((18432000*73/14)/2)   // Output PLL Clock
+
+#endif /* AT91SAM7X-EK_H */
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/incIAR/AT91SAM7X256.inc b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/incIAR/AT91SAM7X256.inc
new file mode 100644
index 000000000..da339852f
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/incIAR/AT91SAM7X256.inc
@@ -0,0 +1,2314 @@
+;-  ----------------------------------------------------------------------------
+;-          ATMEL Microcontroller Software Support  -  ROUSSET  -
+;-  ----------------------------------------------------------------------------
+;-  DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+;-  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+;-  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+;-  DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+;-  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;-  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+;-  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+;-  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+;-  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+;-  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;-  ----------------------------------------------------------------------------
+;- File Name           : AT91SAM7X256.h
+;- Object              : AT91SAM7X256 definitions
+;- Generated           : AT91 SW Application Group  11/02/2005 (15:17:24)
+;- 
+;- CVS Reference       : /AT91SAM7X256.pl/1.14/Tue Sep 13 15:06:52 2005//
+;- CVS Reference       : /SYS_SAM7X.pl/1.3/Tue Feb  1 17:01:43 2005//
+;- CVS Reference       : /MC_SAM7X.pl/1.2/Fri May 20 14:13:04 2005//
+;- CVS Reference       : /PMC_SAM7X.pl/1.4/Tue Feb  8 13:58:10 2005//
+;- CVS Reference       : /RSTC_SAM7X.pl/1.2/Wed Jul 13 14:57:50 2005//
+;- CVS Reference       : /UDP_SAM7X.pl/1.1/Tue May 10 11:35:35 2005//
+;- CVS Reference       : /PWM_SAM7X.pl/1.1/Tue May 10 11:53:07 2005//
+;- CVS Reference       : /AIC_6075B.pl/1.3/Fri May 20 14:01:30 2005//
+;- CVS Reference       : /PIO_6057A.pl/1.2/Thu Feb  3 10:18:28 2005//
+;- CVS Reference       : /RTTC_6081A.pl/1.2/Tue Nov  9 14:43:58 2004//
+;- CVS Reference       : /PITC_6079A.pl/1.2/Tue Nov  9 14:43:56 2004//
+;- CVS Reference       : /WDTC_6080A.pl/1.3/Tue Nov  9 14:44:00 2004//
+;- CVS Reference       : /VREG_6085B.pl/1.1/Tue Feb  1 16:05:48 2005//
+;- CVS Reference       : /PDC_6074C.pl/1.2/Thu Feb  3 08:48:54 2005//
+;- CVS Reference       : /DBGU_6059D.pl/1.1/Mon Jan 31 13:15:32 2005//
+;- CVS Reference       : /SPI_6088D.pl/1.3/Fri May 20 14:08:59 2005//
+;- CVS Reference       : /US_6089C.pl/1.1/Mon Jul 12 18:23:26 2004//
+;- CVS Reference       : /SSC_6078B.pl/1.1/Wed Jul 13 15:19:19 2005//
+;- CVS Reference       : /TWI_6061A.pl/1.1/Tue Jul 13 07:38:06 2004//
+;- CVS Reference       : /TC_6082A.pl/1.7/Fri Mar 11 12:52:17 2005//
+;- CVS Reference       : /CAN_6019B.pl/1.1/Tue Mar  8 12:42:22 2005//
+;- CVS Reference       : /EMACB_6119A.pl/1.6/Wed Jul 13 15:05:35 2005//
+;- CVS Reference       : /ADC_6051C.pl/1.1/Fri Oct 17 09:12:38 2003//
+;-  ----------------------------------------------------------------------------
+
+;- Hardware register definition
+
+;- *****************************************************************************
+;-              SOFTWARE API DEFINITION  FOR System Peripherals
+;- *****************************************************************************
+
+;- *****************************************************************************
+;-              SOFTWARE API DEFINITION  FOR Advanced Interrupt Controller
+;- *****************************************************************************
+                ^ 0 ;- AT91S_AIC
+AIC_SMR         # 128 ;- Source Mode Register
+AIC_SVR         # 128 ;- Source Vector Register
+AIC_IVR         #  4 ;- IRQ Vector Register
+AIC_FVR         #  4 ;- FIQ Vector Register
+AIC_ISR         #  4 ;- Interrupt Status Register
+AIC_IPR         #  4 ;- Interrupt Pending Register
+AIC_IMR         #  4 ;- Interrupt Mask Register
+AIC_CISR        #  4 ;- Core Interrupt Status Register
+                #  8 ;- Reserved
+AIC_IECR        #  4 ;- Interrupt Enable Command Register
+AIC_IDCR        #  4 ;- Interrupt Disable Command Register
+AIC_ICCR        #  4 ;- Interrupt Clear Command Register
+AIC_ISCR        #  4 ;- Interrupt Set Command Register
+AIC_EOICR       #  4 ;- End of Interrupt Command Register
+AIC_SPU         #  4 ;- Spurious Vector Register
+AIC_DCR         #  4 ;- Debug Control Register (Protect)
+                #  4 ;- Reserved
+AIC_FFER        #  4 ;- Fast Forcing Enable Register
+AIC_FFDR        #  4 ;- Fast Forcing Disable Register
+AIC_FFSR        #  4 ;- Fast Forcing Status Register
+;- -------- AIC_SMR : (AIC Offset: 0x0) Control Register -------- 
+AT91C_AIC_PRIOR           EQU (0x7:SHL:0) ;- (AIC) Priority Level
+AT91C_AIC_PRIOR_LOWEST    EQU (0x0) ;- (AIC) Lowest priority level
+AT91C_AIC_PRIOR_HIGHEST   EQU (0x7) ;- (AIC) Highest priority level
+AT91C_AIC_SRCTYPE         EQU (0x3:SHL:5) ;- (AIC) Interrupt Source Type
+AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL EQU (0x0:SHL:5) ;- (AIC) Internal Sources Code Label High-level Sensitive
+AT91C_AIC_SRCTYPE_EXT_LOW_LEVEL EQU (0x0:SHL:5) ;- (AIC) External Sources Code Label Low-level Sensitive
+AT91C_AIC_SRCTYPE_INT_POSITIVE_EDGE EQU (0x1:SHL:5) ;- (AIC) Internal Sources Code Label Positive Edge triggered
+AT91C_AIC_SRCTYPE_EXT_NEGATIVE_EDGE EQU (0x1:SHL:5) ;- (AIC) External Sources Code Label Negative Edge triggered
+AT91C_AIC_SRCTYPE_HIGH_LEVEL EQU (0x2:SHL:5) ;- (AIC) Internal Or External Sources Code Label High-level Sensitive
+AT91C_AIC_SRCTYPE_POSITIVE_EDGE EQU (0x3:SHL:5) ;- (AIC) Internal Or External Sources Code Label Positive Edge triggered
+;- -------- AIC_CISR : (AIC Offset: 0x114) AIC Core Interrupt Status Register -------- 
+AT91C_AIC_NFIQ            EQU (0x1:SHL:0) ;- (AIC) NFIQ Status
+AT91C_AIC_NIRQ            EQU (0x1:SHL:1) ;- (AIC) NIRQ Status
+;- -------- AIC_DCR : (AIC Offset: 0x138) AIC Debug Control Register (Protect) -------- 
+AT91C_AIC_DCR_PROT        EQU (0x1:SHL:0) ;- (AIC) Protection Mode
+AT91C_AIC_DCR_GMSK        EQU (0x1:SHL:1) ;- (AIC) General Mask
+
+;- *****************************************************************************
+;-              SOFTWARE API DEFINITION  FOR Peripheral DMA Controller
+;- *****************************************************************************
+                ^ 0 ;- AT91S_PDC
+PDC_RPR         #  4 ;- Receive Pointer Register
+PDC_RCR         #  4 ;- Receive Counter Register
+PDC_TPR         #  4 ;- Transmit Pointer Register
+PDC_TCR         #  4 ;- Transmit Counter Register
+PDC_RNPR        #  4 ;- Receive Next Pointer Register
+PDC_RNCR        #  4 ;- Receive Next Counter Register
+PDC_TNPR        #  4 ;- Transmit Next Pointer Register
+PDC_TNCR        #  4 ;- Transmit Next Counter Register
+PDC_PTCR        #  4 ;- PDC Transfer Control Register
+PDC_PTSR        #  4 ;- PDC Transfer Status Register
+;- -------- PDC_PTCR : (PDC Offset: 0x20) PDC Transfer Control Register -------- 
+AT91C_PDC_RXTEN           EQU (0x1:SHL:0) ;- (PDC) Receiver Transfer Enable
+AT91C_PDC_RXTDIS          EQU (0x1:SHL:1) ;- (PDC) Receiver Transfer Disable
+AT91C_PDC_TXTEN           EQU (0x1:SHL:8) ;- (PDC) Transmitter Transfer Enable
+AT91C_PDC_TXTDIS          EQU (0x1:SHL:9) ;- (PDC) Transmitter Transfer Disable
+;- -------- PDC_PTSR : (PDC Offset: 0x24) PDC Transfer Status Register -------- 
+
+;- *****************************************************************************
+;-              SOFTWARE API DEFINITION  FOR Debug Unit
+;- *****************************************************************************
+                ^ 0 ;- AT91S_DBGU
+DBGU_CR         #  4 ;- Control Register
+DBGU_MR         #  4 ;- Mode Register
+DBGU_IER        #  4 ;- Interrupt Enable Register
+DBGU_IDR        #  4 ;- Interrupt Disable Register
+DBGU_IMR        #  4 ;- Interrupt Mask Register
+DBGU_CSR        #  4 ;- Channel Status Register
+DBGU_RHR        #  4 ;- Receiver Holding Register
+DBGU_THR        #  4 ;- Transmitter Holding Register
+DBGU_BRGR       #  4 ;- Baud Rate Generator Register
+                # 28 ;- Reserved
+DBGU_CIDR       #  4 ;- Chip ID Register
+DBGU_EXID       #  4 ;- Chip ID Extension Register
+DBGU_FNTR       #  4 ;- Force NTRST Register
+                # 180 ;- Reserved
+DBGU_RPR        #  4 ;- Receive Pointer Register
+DBGU_RCR        #  4 ;- Receive Counter Register
+DBGU_TPR        #  4 ;- Transmit Pointer Register
+DBGU_TCR        #  4 ;- Transmit Counter Register
+DBGU_RNPR       #  4 ;- Receive Next Pointer Register
+DBGU_RNCR       #  4 ;- Receive Next Counter Register
+DBGU_TNPR       #  4 ;- Transmit Next Pointer Register
+DBGU_TNCR       #  4 ;- Transmit Next Counter Register
+DBGU_PTCR       #  4 ;- PDC Transfer Control Register
+DBGU_PTSR       #  4 ;- PDC Transfer Status Register
+;- -------- DBGU_CR : (DBGU Offset: 0x0) Debug Unit Control Register -------- 
+AT91C_US_RSTRX            EQU (0x1:SHL:2) ;- (DBGU) Reset Receiver
+AT91C_US_RSTTX            EQU (0x1:SHL:3) ;- (DBGU) Reset Transmitter
+AT91C_US_RXEN             EQU (0x1:SHL:4) ;- (DBGU) Receiver Enable
+AT91C_US_RXDIS            EQU (0x1:SHL:5) ;- (DBGU) Receiver Disable
+AT91C_US_TXEN             EQU (0x1:SHL:6) ;- (DBGU) Transmitter Enable
+AT91C_US_TXDIS            EQU (0x1:SHL:7) ;- (DBGU) Transmitter Disable
+AT91C_US_RSTSTA           EQU (0x1:SHL:8) ;- (DBGU) Reset Status Bits
+;- -------- DBGU_MR : (DBGU Offset: 0x4) Debug Unit Mode Register -------- 
+AT91C_US_PAR              EQU (0x7:SHL:9) ;- (DBGU) Parity type
+AT91C_US_PAR_EVEN         EQU (0x0:SHL:9) ;- (DBGU) Even Parity
+AT91C_US_PAR_ODD          EQU (0x1:SHL:9) ;- (DBGU) Odd Parity
+AT91C_US_PAR_SPACE        EQU (0x2:SHL:9) ;- (DBGU) Parity forced to 0 (Space)
+AT91C_US_PAR_MARK         EQU (0x3:SHL:9) ;- (DBGU) Parity forced to 1 (Mark)
+AT91C_US_PAR_NONE         EQU (0x4:SHL:9) ;- (DBGU) No Parity
+AT91C_US_PAR_MULTI_DROP   EQU (0x6:SHL:9) ;- (DBGU) Multi-drop mode
+AT91C_US_CHMODE           EQU (0x3:SHL:14) ;- (DBGU) Channel Mode
+AT91C_US_CHMODE_NORMAL    EQU (0x0:SHL:14) ;- (DBGU) Normal Mode: The USART channel operates as an RX/TX USART.
+AT91C_US_CHMODE_AUTO      EQU (0x1:SHL:14) ;- (DBGU) Automatic Echo: Receiver Data Input is connected to the TXD pin.
+AT91C_US_CHMODE_LOCAL     EQU (0x2:SHL:14) ;- (DBGU) Local Loopback: Transmitter Output Signal is connected to Receiver Input Signal.
+AT91C_US_CHMODE_REMOTE    EQU (0x3:SHL:14) ;- (DBGU) Remote Loopback: RXD pin is internally connected to TXD pin.
+;- -------- DBGU_IER : (DBGU Offset: 0x8) Debug Unit Interrupt Enable Register -------- 
+AT91C_US_RXRDY            EQU (0x1:SHL:0) ;- (DBGU) RXRDY Interrupt
+AT91C_US_TXRDY            EQU (0x1:SHL:1) ;- (DBGU) TXRDY Interrupt
+AT91C_US_ENDRX            EQU (0x1:SHL:3) ;- (DBGU) End of Receive Transfer Interrupt
+AT91C_US_ENDTX            EQU (0x1:SHL:4) ;- (DBGU) End of Transmit Interrupt
+AT91C_US_OVRE             EQU (0x1:SHL:5) ;- (DBGU) Overrun Interrupt
+AT91C_US_FRAME            EQU (0x1:SHL:6) ;- (DBGU) Framing Error Interrupt
+AT91C_US_PARE             EQU (0x1:SHL:7) ;- (DBGU) Parity Error Interrupt
+AT91C_US_TXEMPTY          EQU (0x1:SHL:9) ;- (DBGU) TXEMPTY Interrupt
+AT91C_US_TXBUFE           EQU (0x1:SHL:11) ;- (DBGU) TXBUFE Interrupt
+AT91C_US_RXBUFF           EQU (0x1:SHL:12) ;- (DBGU) RXBUFF Interrupt
+AT91C_US_COMM_TX          EQU (0x1:SHL:30) ;- (DBGU) COMM_TX Interrupt
+AT91C_US_COMM_RX          EQU (0x1:SHL:31) ;- (DBGU) COMM_RX Interrupt
+;- -------- DBGU_IDR : (DBGU Offset: 0xc) Debug Unit Interrupt Disable Register -------- 
+;- -------- DBGU_IMR : (DBGU Offset: 0x10) Debug Unit Interrupt Mask Register -------- 
+;- -------- DBGU_CSR : (DBGU Offset: 0x14) Debug Unit Channel Status Register -------- 
+;- -------- DBGU_FNTR : (DBGU Offset: 0x48) Debug Unit FORCE_NTRST Register -------- 
+AT91C_US_FORCE_NTRST      EQU (0x1:SHL:0) ;- (DBGU) Force NTRST in JTAG
+
+;- *****************************************************************************
+;-              SOFTWARE API DEFINITION  FOR Parallel Input Output Controler
+;- *****************************************************************************
+                ^ 0 ;- AT91S_PIO
+PIO_PER         #  4 ;- PIO Enable Register
+PIO_PDR         #  4 ;- PIO Disable Register
+PIO_PSR         #  4 ;- PIO Status Register
+                #  4 ;- Reserved
+PIO_OER         #  4 ;- Output Enable Register
+PIO_ODR         #  4 ;- Output Disable Registerr
+PIO_OSR         #  4 ;- Output Status Register
+                #  4 ;- Reserved
+PIO_IFER        #  4 ;- Input Filter Enable Register
+PIO_IFDR        #  4 ;- Input Filter Disable Register
+PIO_IFSR        #  4 ;- Input Filter Status Register
+                #  4 ;- Reserved
+PIO_SODR        #  4 ;- Set Output Data Register
+PIO_CODR        #  4 ;- Clear Output Data Register
+PIO_ODSR        #  4 ;- Output Data Status Register
+PIO_PDSR        #  4 ;- Pin Data Status Register
+PIO_IER         #  4 ;- Interrupt Enable Register
+PIO_IDR         #  4 ;- Interrupt Disable Register
+PIO_IMR         #  4 ;- Interrupt Mask Register
+PIO_ISR         #  4 ;- Interrupt Status Register
+PIO_MDER        #  4 ;- Multi-driver Enable Register
+PIO_MDDR        #  4 ;- Multi-driver Disable Register
+PIO_MDSR        #  4 ;- Multi-driver Status Register
+                #  4 ;- Reserved
+PIO_PPUDR       #  4 ;- Pull-up Disable Register
+PIO_PPUER       #  4 ;- Pull-up Enable Register
+PIO_PPUSR       #  4 ;- Pull-up Status Register
+                #  4 ;- Reserved
+PIO_ASR         #  4 ;- Select A Register
+PIO_BSR         #  4 ;- Select B Register
+PIO_ABSR        #  4 ;- AB Select Status Register
+                # 36 ;- Reserved
+PIO_OWER        #  4 ;- Output Write Enable Register
+PIO_OWDR        #  4 ;- Output Write Disable Register
+PIO_OWSR        #  4 ;- Output Write Status Register
+
+;- *****************************************************************************
+;-              SOFTWARE API DEFINITION  FOR Clock Generator Controler
+;- *****************************************************************************
+                ^ 0 ;- AT91S_CKGR
+CKGR_MOR        #  4 ;- Main Oscillator Register
+CKGR_MCFR       #  4 ;- Main Clock  Frequency Register
+                #  4 ;- Reserved
+CKGR_PLLR       #  4 ;- PLL Register
+;- -------- CKGR_MOR : (CKGR Offset: 0x0) Main Oscillator Register -------- 
+AT91C_CKGR_MOSCEN         EQU (0x1:SHL:0) ;- (CKGR) Main Oscillator Enable
+AT91C_CKGR_OSCBYPASS      EQU (0x1:SHL:1) ;- (CKGR) Main Oscillator Bypass
+AT91C_CKGR_OSCOUNT        EQU (0xFF:SHL:8) ;- (CKGR) Main Oscillator Start-up Time
+;- -------- CKGR_MCFR : (CKGR Offset: 0x4) Main Clock Frequency Register -------- 
+AT91C_CKGR_MAINF          EQU (0xFFFF:SHL:0) ;- (CKGR) Main Clock Frequency
+AT91C_CKGR_MAINRDY        EQU (0x1:SHL:16) ;- (CKGR) Main Clock Ready
+;- -------- CKGR_PLLR : (CKGR Offset: 0xc) PLL B Register -------- 
+AT91C_CKGR_DIV            EQU (0xFF:SHL:0) ;- (CKGR) Divider Selected
+AT91C_CKGR_DIV_0          EQU (0x0) ;- (CKGR) Divider output is 0
+AT91C_CKGR_DIV_BYPASS     EQU (0x1) ;- (CKGR) Divider is bypassed
+AT91C_CKGR_PLLCOUNT       EQU (0x3F:SHL:8) ;- (CKGR) PLL Counter
+AT91C_CKGR_OUT            EQU (0x3:SHL:14) ;- (CKGR) PLL Output Frequency Range
+AT91C_CKGR_OUT_0          EQU (0x0:SHL:14) ;- (CKGR) Please refer to the PLL datasheet
+AT91C_CKGR_OUT_1          EQU (0x1:SHL:14) ;- (CKGR) Please refer to the PLL datasheet
+AT91C_CKGR_OUT_2          EQU (0x2:SHL:14) ;- (CKGR) Please refer to the PLL datasheet
+AT91C_CKGR_OUT_3          EQU (0x3:SHL:14) ;- (CKGR) Please refer to the PLL datasheet
+AT91C_CKGR_MUL            EQU (0x7FF:SHL:16) ;- (CKGR) PLL Multiplier
+AT91C_CKGR_USBDIV         EQU (0x3:SHL:28) ;- (CKGR) Divider for USB Clocks
+AT91C_CKGR_USBDIV_0       EQU (0x0:SHL:28) ;- (CKGR) Divider output is PLL clock output
+AT91C_CKGR_USBDIV_1       EQU (0x1:SHL:28) ;- (CKGR) Divider output is PLL clock output divided by 2
+AT91C_CKGR_USBDIV_2       EQU (0x2:SHL:28) ;- (CKGR) Divider output is PLL clock output divided by 4
+
+;- *****************************************************************************
+;-              SOFTWARE API DEFINITION  FOR Power Management Controler
+;- *****************************************************************************
+                ^ 0 ;- AT91S_PMC
+PMC_SCER        #  4 ;- System Clock Enable Register
+PMC_SCDR        #  4 ;- System Clock Disable Register
+PMC_SCSR        #  4 ;- System Clock Status Register
+                #  4 ;- Reserved
+PMC_PCER        #  4 ;- Peripheral Clock Enable Register
+PMC_PCDR        #  4 ;- Peripheral Clock Disable Register
+PMC_PCSR        #  4 ;- Peripheral Clock Status Register
+                #  4 ;- Reserved
+PMC_MOR         #  4 ;- Main Oscillator Register
+PMC_MCFR        #  4 ;- Main Clock  Frequency Register
+                #  4 ;- Reserved
+PMC_PLLR        #  4 ;- PLL Register
+PMC_MCKR        #  4 ;- Master Clock Register
+                # 12 ;- Reserved
+PMC_PCKR        # 16 ;- Programmable Clock Register
+                # 16 ;- Reserved
+PMC_IER         #  4 ;- Interrupt Enable Register
+PMC_IDR         #  4 ;- Interrupt Disable Register
+PMC_SR          #  4 ;- Status Register
+PMC_IMR         #  4 ;- Interrupt Mask Register
+;- -------- PMC_SCER : (PMC Offset: 0x0) System Clock Enable Register -------- 
+AT91C_PMC_PCK             EQU (0x1:SHL:0) ;- (PMC) Processor Clock
+AT91C_PMC_UDP             EQU (0x1:SHL:7) ;- (PMC) USB Device Port Clock
+AT91C_PMC_PCK0            EQU (0x1:SHL:8) ;- (PMC) Programmable Clock Output
+AT91C_PMC_PCK1            EQU (0x1:SHL:9) ;- (PMC) Programmable Clock Output
+AT91C_PMC_PCK2            EQU (0x1:SHL:10) ;- (PMC) Programmable Clock Output
+AT91C_PMC_PCK3            EQU (0x1:SHL:11) ;- (PMC) Programmable Clock Output
+;- -------- PMC_SCDR : (PMC Offset: 0x4) System Clock Disable Register -------- 
+;- -------- PMC_SCSR : (PMC Offset: 0x8) System Clock Status Register -------- 
+;- -------- CKGR_MOR : (PMC Offset: 0x20) Main Oscillator Register -------- 
+;- -------- CKGR_MCFR : (PMC Offset: 0x24) Main Clock Frequency Register -------- 
+;- -------- CKGR_PLLR : (PMC Offset: 0x2c) PLL B Register -------- 
+;- -------- PMC_MCKR : (PMC Offset: 0x30) Master Clock Register -------- 
+AT91C_PMC_CSS             EQU (0x3:SHL:0) ;- (PMC) Programmable Clock Selection
+AT91C_PMC_CSS_SLOW_CLK    EQU (0x0) ;- (PMC) Slow Clock is selected
+AT91C_PMC_CSS_MAIN_CLK    EQU (0x1) ;- (PMC) Main Clock is selected
+AT91C_PMC_CSS_PLL_CLK     EQU (0x3) ;- (PMC) Clock from PLL is selected
+AT91C_PMC_PRES            EQU (0x7:SHL:2) ;- (PMC) Programmable Clock Prescaler
+AT91C_PMC_PRES_CLK        EQU (0x0:SHL:2) ;- (PMC) Selected clock
+AT91C_PMC_PRES_CLK_2      EQU (0x1:SHL:2) ;- (PMC) Selected clock divided by 2
+AT91C_PMC_PRES_CLK_4      EQU (0x2:SHL:2) ;- (PMC) Selected clock divided by 4
+AT91C_PMC_PRES_CLK_8      EQU (0x3:SHL:2) ;- (PMC) Selected clock divided by 8
+AT91C_PMC_PRES_CLK_16     EQU (0x4:SHL:2) ;- (PMC) Selected clock divided by 16
+AT91C_PMC_PRES_CLK_32     EQU (0x5:SHL:2) ;- (PMC) Selected clock divided by 32
+AT91C_PMC_PRES_CLK_64     EQU (0x6:SHL:2) ;- (PMC) Selected clock divided by 64
+;- -------- PMC_PCKR : (PMC Offset: 0x40) Programmable Clock Register -------- 
+;- -------- PMC_IER : (PMC Offset: 0x60) PMC Interrupt Enable Register -------- 
+AT91C_PMC_MOSCS           EQU (0x1:SHL:0) ;- (PMC) MOSC Status/Enable/Disable/Mask
+AT91C_PMC_LOCK            EQU (0x1:SHL:2) ;- (PMC) PLL Status/Enable/Disable/Mask
+AT91C_PMC_MCKRDY          EQU (0x1:SHL:3) ;- (PMC) MCK_RDY Status/Enable/Disable/Mask
+AT91C_PMC_PCK0RDY         EQU (0x1:SHL:8) ;- (PMC) PCK0_RDY Status/Enable/Disable/Mask
+AT91C_PMC_PCK1RDY         EQU (0x1:SHL:9) ;- (PMC) PCK1_RDY Status/Enable/Disable/Mask
+AT91C_PMC_PCK2RDY         EQU (0x1:SHL:10) ;- (PMC) PCK2_RDY Status/Enable/Disable/Mask
+AT91C_PMC_PCK3RDY         EQU (0x1:SHL:11) ;- (PMC) PCK3_RDY Status/Enable/Disable/Mask
+;- -------- PMC_IDR : (PMC Offset: 0x64) PMC Interrupt Disable Register -------- 
+;- -------- PMC_SR : (PMC Offset: 0x68) PMC Status Register -------- 
+;- -------- PMC_IMR : (PMC Offset: 0x6c) PMC Interrupt Mask Register -------- 
+
+;- *****************************************************************************
+;-              SOFTWARE API DEFINITION  FOR Reset Controller Interface
+;- *****************************************************************************
+                ^ 0 ;- AT91S_RSTC
+RSTC_RCR        #  4 ;- Reset Control Register
+RSTC_RSR        #  4 ;- Reset Status Register
+RSTC_RMR        #  4 ;- Reset Mode Register
+;- -------- RSTC_RCR : (RSTC Offset: 0x0) Reset Control Register -------- 
+AT91C_RSTC_PROCRST        EQU (0x1:SHL:0) ;- (RSTC) Processor Reset
+AT91C_RSTC_PERRST         EQU (0x1:SHL:2) ;- (RSTC) Peripheral Reset
+AT91C_RSTC_EXTRST         EQU (0x1:SHL:3) ;- (RSTC) External Reset
+AT91C_RSTC_KEY            EQU (0xFF:SHL:24) ;- (RSTC) Password
+;- -------- RSTC_RSR : (RSTC Offset: 0x4) Reset Status Register -------- 
+AT91C_RSTC_URSTS          EQU (0x1:SHL:0) ;- (RSTC) User Reset Status
+AT91C_RSTC_BODSTS         EQU (0x1:SHL:1) ;- (RSTC) Brownout Detection Status
+AT91C_RSTC_RSTTYP         EQU (0x7:SHL:8) ;- (RSTC) Reset Type
+AT91C_RSTC_RSTTYP_POWERUP EQU (0x0:SHL:8) ;- (RSTC) Power-up Reset. VDDCORE rising.
+AT91C_RSTC_RSTTYP_WAKEUP  EQU (0x1:SHL:8) ;- (RSTC) WakeUp Reset. VDDCORE rising.
+AT91C_RSTC_RSTTYP_WATCHDOG EQU (0x2:SHL:8) ;- (RSTC) Watchdog Reset. Watchdog overflow occured.
+AT91C_RSTC_RSTTYP_SOFTWARE EQU (0x3:SHL:8) ;- (RSTC) Software Reset. Processor reset required by the software.
+AT91C_RSTC_RSTTYP_USER    EQU (0x4:SHL:8) ;- (RSTC) User Reset. NRST pin detected low.
+AT91C_RSTC_RSTTYP_BROWNOUT EQU (0x5:SHL:8) ;- (RSTC) Brownout Reset occured.
+AT91C_RSTC_NRSTL          EQU (0x1:SHL:16) ;- (RSTC) NRST pin level
+AT91C_RSTC_SRCMP          EQU (0x1:SHL:17) ;- (RSTC) Software Reset Command in Progress.
+;- -------- RSTC_RMR : (RSTC Offset: 0x8) Reset Mode Register -------- 
+AT91C_RSTC_URSTEN         EQU (0x1:SHL:0) ;- (RSTC) User Reset Enable
+AT91C_RSTC_URSTIEN        EQU (0x1:SHL:4) ;- (RSTC) User Reset Interrupt Enable
+AT91C_RSTC_ERSTL          EQU (0xF:SHL:8) ;- (RSTC) User Reset Length
+AT91C_RSTC_BODIEN         EQU (0x1:SHL:16) ;- (RSTC) Brownout Detection Interrupt Enable
+
+;- *****************************************************************************
+;-              SOFTWARE API DEFINITION  FOR Real Time Timer Controller Interface
+;- *****************************************************************************
+                ^ 0 ;- AT91S_RTTC
+RTTC_RTMR       #  4 ;- Real-time Mode Register
+RTTC_RTAR       #  4 ;- Real-time Alarm Register
+RTTC_RTVR       #  4 ;- Real-time Value Register
+RTTC_RTSR       #  4 ;- Real-time Status Register
+;- -------- RTTC_RTMR : (RTTC Offset: 0x0) Real-time Mode Register -------- 
+AT91C_RTTC_RTPRES         EQU (0xFFFF:SHL:0) ;- (RTTC) Real-time Timer Prescaler Value
+AT91C_RTTC_ALMIEN         EQU (0x1:SHL:16) ;- (RTTC) Alarm Interrupt Enable
+AT91C_RTTC_RTTINCIEN      EQU (0x1:SHL:17) ;- (RTTC) Real Time Timer Increment Interrupt Enable
+AT91C_RTTC_RTTRST         EQU (0x1:SHL:18) ;- (RTTC) Real Time Timer Restart
+;- -------- RTTC_RTAR : (RTTC Offset: 0x4) Real-time Alarm Register -------- 
+AT91C_RTTC_ALMV           EQU (0x0:SHL:0) ;- (RTTC) Alarm Value
+;- -------- RTTC_RTVR : (RTTC Offset: 0x8) Current Real-time Value Register -------- 
+AT91C_RTTC_CRTV           EQU (0x0:SHL:0) ;- (RTTC) Current Real-time Value
+;- -------- RTTC_RTSR : (RTTC Offset: 0xc) Real-time Status Register -------- 
+AT91C_RTTC_ALMS           EQU (0x1:SHL:0) ;- (RTTC) Real-time Alarm Status
+AT91C_RTTC_RTTINC         EQU (0x1:SHL:1) ;- (RTTC) Real-time Timer Increment
+
+;- *****************************************************************************
+;-              SOFTWARE API DEFINITION  FOR Periodic Interval Timer Controller Interface
+;- *****************************************************************************
+                ^ 0 ;- AT91S_PITC
+PITC_PIMR       #  4 ;- Period Interval Mode Register
+PITC_PISR       #  4 ;- Period Interval Status Register
+PITC_PIVR       #  4 ;- Period Interval Value Register
+PITC_PIIR       #  4 ;- Period Interval Image Register
+;- -------- PITC_PIMR : (PITC Offset: 0x0) Periodic Interval Mode Register -------- 
+AT91C_PITC_PIV            EQU (0xFFFFF:SHL:0) ;- (PITC) Periodic Interval Value
+AT91C_PITC_PITEN          EQU (0x1:SHL:24) ;- (PITC) Periodic Interval Timer Enabled
+AT91C_PITC_PITIEN         EQU (0x1:SHL:25) ;- (PITC) Periodic Interval Timer Interrupt Enable
+;- -------- PITC_PISR : (PITC Offset: 0x4) Periodic Interval Status Register -------- 
+AT91C_PITC_PITS           EQU (0x1:SHL:0) ;- (PITC) Periodic Interval Timer Status
+;- -------- PITC_PIVR : (PITC Offset: 0x8) Periodic Interval Value Register -------- 
+AT91C_PITC_CPIV           EQU (0xFFFFF:SHL:0) ;- (PITC) Current Periodic Interval Value
+AT91C_PITC_PICNT          EQU (0xFFF:SHL:20) ;- (PITC) Periodic Interval Counter
+;- -------- PITC_PIIR : (PITC Offset: 0xc) Periodic Interval Image Register -------- 
+
+;- *****************************************************************************
+;-              SOFTWARE API DEFINITION  FOR Watchdog Timer Controller Interface
+;- *****************************************************************************
+                ^ 0 ;- AT91S_WDTC
+WDTC_WDCR       #  4 ;- Watchdog Control Register
+WDTC_WDMR       #  4 ;- Watchdog Mode Register
+WDTC_WDSR       #  4 ;- Watchdog Status Register
+;- -------- WDTC_WDCR : (WDTC Offset: 0x0) Periodic Interval Image Register -------- 
+AT91C_WDTC_WDRSTT         EQU (0x1:SHL:0) ;- (WDTC) Watchdog Restart
+AT91C_WDTC_KEY            EQU (0xFF:SHL:24) ;- (WDTC) Watchdog KEY Password
+;- -------- WDTC_WDMR : (WDTC Offset: 0x4) Watchdog Mode Register -------- 
+AT91C_WDTC_WDV            EQU (0xFFF:SHL:0) ;- (WDTC) Watchdog Timer Restart
+AT91C_WDTC_WDFIEN         EQU (0x1:SHL:12) ;- (WDTC) Watchdog Fault Interrupt Enable
+AT91C_WDTC_WDRSTEN        EQU (0x1:SHL:13) ;- (WDTC) Watchdog Reset Enable
+AT91C_WDTC_WDRPROC        EQU (0x1:SHL:14) ;- (WDTC) Watchdog Timer Restart
+AT91C_WDTC_WDDIS          EQU (0x1:SHL:15) ;- (WDTC) Watchdog Disable
+AT91C_WDTC_WDD            EQU (0xFFF:SHL:16) ;- (WDTC) Watchdog Delta Value
+AT91C_WDTC_WDDBGHLT       EQU (0x1:SHL:28) ;- (WDTC) Watchdog Debug Halt
+AT91C_WDTC_WDIDLEHLT      EQU (0x1:SHL:29) ;- (WDTC) Watchdog Idle Halt
+;- -------- WDTC_WDSR : (WDTC Offset: 0x8) Watchdog Status Register -------- 
+AT91C_WDTC_WDUNF          EQU (0x1:SHL:0) ;- (WDTC) Watchdog Underflow
+AT91C_WDTC_WDERR          EQU (0x1:SHL:1) ;- (WDTC) Watchdog Error
+
+;- *****************************************************************************
+;-              SOFTWARE API DEFINITION  FOR Voltage Regulator Mode Controller Interface
+;- *****************************************************************************
+                ^ 0 ;- AT91S_VREG
+VREG_MR         #  4 ;- Voltage Regulator Mode Register
+;- -------- VREG_MR : (VREG Offset: 0x0) Voltage Regulator Mode Register -------- 
+AT91C_VREG_PSTDBY         EQU (0x1:SHL:0) ;- (VREG) Voltage Regulator Power Standby Mode
+
+;- *****************************************************************************
+;-              SOFTWARE API DEFINITION  FOR Memory Controller Interface
+;- *****************************************************************************
+                ^ 0 ;- AT91S_MC
+MC_RCR          #  4 ;- MC Remap Control Register
+MC_ASR          #  4 ;- MC Abort Status Register
+MC_AASR         #  4 ;- MC Abort Address Status Register
+                # 84 ;- Reserved
+MC_FMR          #  4 ;- MC Flash Mode Register
+MC_FCR          #  4 ;- MC Flash Command Register
+MC_FSR          #  4 ;- MC Flash Status Register
+;- -------- MC_RCR : (MC Offset: 0x0) MC Remap Control Register -------- 
+AT91C_MC_RCB              EQU (0x1:SHL:0) ;- (MC) Remap Command Bit
+;- -------- MC_ASR : (MC Offset: 0x4) MC Abort Status Register -------- 
+AT91C_MC_UNDADD           EQU (0x1:SHL:0) ;- (MC) Undefined Addess Abort Status
+AT91C_MC_MISADD           EQU (0x1:SHL:1) ;- (MC) Misaligned Addess Abort Status
+AT91C_MC_ABTSZ            EQU (0x3:SHL:8) ;- (MC) Abort Size Status
+AT91C_MC_ABTSZ_BYTE       EQU (0x0:SHL:8) ;- (MC) Byte
+AT91C_MC_ABTSZ_HWORD      EQU (0x1:SHL:8) ;- (MC) Half-word
+AT91C_MC_ABTSZ_WORD       EQU (0x2:SHL:8) ;- (MC) Word
+AT91C_MC_ABTTYP           EQU (0x3:SHL:10) ;- (MC) Abort Type Status
+AT91C_MC_ABTTYP_DATAR     EQU (0x0:SHL:10) ;- (MC) Data Read
+AT91C_MC_ABTTYP_DATAW     EQU (0x1:SHL:10) ;- (MC) Data Write
+AT91C_MC_ABTTYP_FETCH     EQU (0x2:SHL:10) ;- (MC) Code Fetch
+AT91C_MC_MST0             EQU (0x1:SHL:16) ;- (MC) Master 0 Abort Source
+AT91C_MC_MST1             EQU (0x1:SHL:17) ;- (MC) Master 1 Abort Source
+AT91C_MC_SVMST0           EQU (0x1:SHL:24) ;- (MC) Saved Master 0 Abort Source
+AT91C_MC_SVMST1           EQU (0x1:SHL:25) ;- (MC) Saved Master 1 Abort Source
+;- -------- MC_FMR : (MC Offset: 0x60) MC Flash Mode Register -------- 
+AT91C_MC_FRDY             EQU (0x1:SHL:0) ;- (MC) Flash Ready
+AT91C_MC_LOCKE            EQU (0x1:SHL:2) ;- (MC) Lock Error
+AT91C_MC_PROGE            EQU (0x1:SHL:3) ;- (MC) Programming Error
+AT91C_MC_NEBP             EQU (0x1:SHL:7) ;- (MC) No Erase Before Programming
+AT91C_MC_FWS              EQU (0x3:SHL:8) ;- (MC) Flash Wait State
+AT91C_MC_FWS_0FWS         EQU (0x0:SHL:8) ;- (MC) 1 cycle for Read, 2 for Write operations
+AT91C_MC_FWS_1FWS         EQU (0x1:SHL:8) ;- (MC) 2 cycles for Read, 3 for Write operations
+AT91C_MC_FWS_2FWS         EQU (0x2:SHL:8) ;- (MC) 3 cycles for Read, 4 for Write operations
+AT91C_MC_FWS_3FWS         EQU (0x3:SHL:8) ;- (MC) 4 cycles for Read, 4 for Write operations
+AT91C_MC_FMCN             EQU (0xFF:SHL:16) ;- (MC) Flash Microsecond Cycle Number
+;- -------- MC_FCR : (MC Offset: 0x64) MC Flash Command Register -------- 
+AT91C_MC_FCMD             EQU (0xF:SHL:0) ;- (MC) Flash Command
+AT91C_MC_FCMD_START_PROG  EQU (0x1) ;- (MC) Starts the programming of th epage specified by PAGEN.
+AT91C_MC_FCMD_LOCK        EQU (0x2) ;- (MC) Starts a lock sequence of the sector defined by the bits 4 to 7 of the field PAGEN.
+AT91C_MC_FCMD_PROG_AND_LOCK EQU (0x3) ;- (MC) The lock sequence automatically happens after the programming sequence is completed.
+AT91C_MC_FCMD_UNLOCK      EQU (0x4) ;- (MC) Starts an unlock sequence of the sector defined by the bits 4 to 7 of the field PAGEN.
+AT91C_MC_FCMD_ERASE_ALL   EQU (0x8) ;- (MC) Starts the erase of the entire flash.If at least a page is locked, the command is cancelled.
+AT91C_MC_FCMD_SET_GP_NVM  EQU (0xB) ;- (MC) Set General Purpose NVM bits.
+AT91C_MC_FCMD_CLR_GP_NVM  EQU (0xD) ;- (MC) Clear General Purpose NVM bits.
+AT91C_MC_FCMD_SET_SECURITY EQU (0xF) ;- (MC) Set Security Bit.
+AT91C_MC_PAGEN            EQU (0x3FF:SHL:8) ;- (MC) Page Number
+AT91C_MC_KEY              EQU (0xFF:SHL:24) ;- (MC) Writing Protect Key
+;- -------- MC_FSR : (MC Offset: 0x68) MC Flash Command Register -------- 
+AT91C_MC_SECURITY         EQU (0x1:SHL:4) ;- (MC) Security Bit Status
+AT91C_MC_GPNVM0           EQU (0x1:SHL:8) ;- (MC) Sector 0 Lock Status
+AT91C_MC_GPNVM1           EQU (0x1:SHL:9) ;- (MC) Sector 1 Lock Status
+AT91C_MC_GPNVM2           EQU (0x1:SHL:10) ;- (MC) Sector 2 Lock Status
+AT91C_MC_GPNVM3           EQU (0x1:SHL:11) ;- (MC) Sector 3 Lock Status
+AT91C_MC_GPNVM4           EQU (0x1:SHL:12) ;- (MC) Sector 4 Lock Status
+AT91C_MC_GPNVM5           EQU (0x1:SHL:13) ;- (MC) Sector 5 Lock Status
+AT91C_MC_GPNVM6           EQU (0x1:SHL:14) ;- (MC) Sector 6 Lock Status
+AT91C_MC_GPNVM7           EQU (0x1:SHL:15) ;- (MC) Sector 7 Lock Status
+AT91C_MC_LOCKS0           EQU (0x1:SHL:16) ;- (MC) Sector 0 Lock Status
+AT91C_MC_LOCKS1           EQU (0x1:SHL:17) ;- (MC) Sector 1 Lock Status
+AT91C_MC_LOCKS2           EQU (0x1:SHL:18) ;- (MC) Sector 2 Lock Status
+AT91C_MC_LOCKS3           EQU (0x1:SHL:19) ;- (MC) Sector 3 Lock Status
+AT91C_MC_LOCKS4           EQU (0x1:SHL:20) ;- (MC) Sector 4 Lock Status
+AT91C_MC_LOCKS5           EQU (0x1:SHL:21) ;- (MC) Sector 5 Lock Status
+AT91C_MC_LOCKS6           EQU (0x1:SHL:22) ;- (MC) Sector 6 Lock Status
+AT91C_MC_LOCKS7           EQU (0x1:SHL:23) ;- (MC) Sector 7 Lock Status
+AT91C_MC_LOCKS8           EQU (0x1:SHL:24) ;- (MC) Sector 8 Lock Status
+AT91C_MC_LOCKS9           EQU (0x1:SHL:25) ;- (MC) Sector 9 Lock Status
+AT91C_MC_LOCKS10          EQU (0x1:SHL:26) ;- (MC) Sector 10 Lock Status
+AT91C_MC_LOCKS11          EQU (0x1:SHL:27) ;- (MC) Sector 11 Lock Status
+AT91C_MC_LOCKS12          EQU (0x1:SHL:28) ;- (MC) Sector 12 Lock Status
+AT91C_MC_LOCKS13          EQU (0x1:SHL:29) ;- (MC) Sector 13 Lock Status
+AT91C_MC_LOCKS14          EQU (0x1:SHL:30) ;- (MC) Sector 14 Lock Status
+AT91C_MC_LOCKS15          EQU (0x1:SHL:31) ;- (MC) Sector 15 Lock Status
+
+;- *****************************************************************************
+;-              SOFTWARE API DEFINITION  FOR Serial Parallel Interface
+;- *****************************************************************************
+                ^ 0 ;- AT91S_SPI
+SPI_CR          #  4 ;- Control Register
+SPI_MR          #  4 ;- Mode Register
+SPI_RDR         #  4 ;- Receive Data Register
+SPI_TDR         #  4 ;- Transmit Data Register
+SPI_SR          #  4 ;- Status Register
+SPI_IER         #  4 ;- Interrupt Enable Register
+SPI_IDR         #  4 ;- Interrupt Disable Register
+SPI_IMR         #  4 ;- Interrupt Mask Register
+                # 16 ;- Reserved
+SPI_CSR         # 16 ;- Chip Select Register
+                # 192 ;- Reserved
+SPI_RPR         #  4 ;- Receive Pointer Register
+SPI_RCR         #  4 ;- Receive Counter Register
+SPI_TPR         #  4 ;- Transmit Pointer Register
+SPI_TCR         #  4 ;- Transmit Counter Register
+SPI_RNPR        #  4 ;- Receive Next Pointer Register
+SPI_RNCR        #  4 ;- Receive Next Counter Register
+SPI_TNPR        #  4 ;- Transmit Next Pointer Register
+SPI_TNCR        #  4 ;- Transmit Next Counter Register
+SPI_PTCR        #  4 ;- PDC Transfer Control Register
+SPI_PTSR        #  4 ;- PDC Transfer Status Register
+;- -------- SPI_CR : (SPI Offset: 0x0) SPI Control Register -------- 
+AT91C_SPI_SPIEN           EQU (0x1:SHL:0) ;- (SPI) SPI Enable
+AT91C_SPI_SPIDIS          EQU (0x1:SHL:1) ;- (SPI) SPI Disable
+AT91C_SPI_SWRST           EQU (0x1:SHL:7) ;- (SPI) SPI Software reset
+AT91C_SPI_LASTXFER        EQU (0x1:SHL:24) ;- (SPI) SPI Last Transfer
+;- -------- SPI_MR : (SPI Offset: 0x4) SPI Mode Register -------- 
+AT91C_SPI_MSTR            EQU (0x1:SHL:0) ;- (SPI) Master/Slave Mode
+AT91C_SPI_PS              EQU (0x1:SHL:1) ;- (SPI) Peripheral Select
+AT91C_SPI_PS_FIXED        EQU (0x0:SHL:1) ;- (SPI) Fixed Peripheral Select
+AT91C_SPI_PS_VARIABLE     EQU (0x1:SHL:1) ;- (SPI) Variable Peripheral Select
+AT91C_SPI_PCSDEC          EQU (0x1:SHL:2) ;- (SPI) Chip Select Decode
+AT91C_SPI_FDIV            EQU (0x1:SHL:3) ;- (SPI) Clock Selection
+AT91C_SPI_MODFDIS         EQU (0x1:SHL:4) ;- (SPI) Mode Fault Detection
+AT91C_SPI_LLB             EQU (0x1:SHL:7) ;- (SPI) Clock Selection
+AT91C_SPI_PCS             EQU (0xF:SHL:16) ;- (SPI) Peripheral Chip Select
+AT91C_SPI_DLYBCS          EQU (0xFF:SHL:24) ;- (SPI) Delay Between Chip Selects
+;- -------- SPI_RDR : (SPI Offset: 0x8) Receive Data Register -------- 
+AT91C_SPI_RD              EQU (0xFFFF:SHL:0) ;- (SPI) Receive Data
+AT91C_SPI_RPCS            EQU (0xF:SHL:16) ;- (SPI) Peripheral Chip Select Status
+;- -------- SPI_TDR : (SPI Offset: 0xc) Transmit Data Register -------- 
+AT91C_SPI_TD              EQU (0xFFFF:SHL:0) ;- (SPI) Transmit Data
+AT91C_SPI_TPCS            EQU (0xF:SHL:16) ;- (SPI) Peripheral Chip Select Status
+;- -------- SPI_SR : (SPI Offset: 0x10) Status Register -------- 
+AT91C_SPI_RDRF            EQU (0x1:SHL:0) ;- (SPI) Receive Data Register Full
+AT91C_SPI_TDRE            EQU (0x1:SHL:1) ;- (SPI) Transmit Data Register Empty
+AT91C_SPI_MODF            EQU (0x1:SHL:2) ;- (SPI) Mode Fault Error
+AT91C_SPI_OVRES           EQU (0x1:SHL:3) ;- (SPI) Overrun Error Status
+AT91C_SPI_ENDRX           EQU (0x1:SHL:4) ;- (SPI) End of Receiver Transfer
+AT91C_SPI_ENDTX           EQU (0x1:SHL:5) ;- (SPI) End of Receiver Transfer
+AT91C_SPI_RXBUFF          EQU (0x1:SHL:6) ;- (SPI) RXBUFF Interrupt
+AT91C_SPI_TXBUFE          EQU (0x1:SHL:7) ;- (SPI) TXBUFE Interrupt
+AT91C_SPI_NSSR            EQU (0x1:SHL:8) ;- (SPI) NSSR Interrupt
+AT91C_SPI_TXEMPTY         EQU (0x1:SHL:9) ;- (SPI) TXEMPTY Interrupt
+AT91C_SPI_SPIENS          EQU (0x1:SHL:16) ;- (SPI) Enable Status
+;- -------- SPI_IER : (SPI Offset: 0x14) Interrupt Enable Register -------- 
+;- -------- SPI_IDR : (SPI Offset: 0x18) Interrupt Disable Register -------- 
+;- -------- SPI_IMR : (SPI Offset: 0x1c) Interrupt Mask Register -------- 
+;- -------- SPI_CSR : (SPI Offset: 0x30) Chip Select Register -------- 
+AT91C_SPI_CPOL            EQU (0x1:SHL:0) ;- (SPI) Clock Polarity
+AT91C_SPI_NCPHA           EQU (0x1:SHL:1) ;- (SPI) Clock Phase
+AT91C_SPI_CSAAT           EQU (0x1:SHL:3) ;- (SPI) Chip Select Active After Transfer
+AT91C_SPI_BITS            EQU (0xF:SHL:4) ;- (SPI) Bits Per Transfer
+AT91C_SPI_BITS_8          EQU (0x0:SHL:4) ;- (SPI) 8 Bits Per transfer
+AT91C_SPI_BITS_9          EQU (0x1:SHL:4) ;- (SPI) 9 Bits Per transfer
+AT91C_SPI_BITS_10         EQU (0x2:SHL:4) ;- (SPI) 10 Bits Per transfer
+AT91C_SPI_BITS_11         EQU (0x3:SHL:4) ;- (SPI) 11 Bits Per transfer
+AT91C_SPI_BITS_12         EQU (0x4:SHL:4) ;- (SPI) 12 Bits Per transfer
+AT91C_SPI_BITS_13         EQU (0x5:SHL:4) ;- (SPI) 13 Bits Per transfer
+AT91C_SPI_BITS_14         EQU (0x6:SHL:4) ;- (SPI) 14 Bits Per transfer
+AT91C_SPI_BITS_15         EQU (0x7:SHL:4) ;- (SPI) 15 Bits Per transfer
+AT91C_SPI_BITS_16         EQU (0x8:SHL:4) ;- (SPI) 16 Bits Per transfer
+AT91C_SPI_SCBR            EQU (0xFF:SHL:8) ;- (SPI) Serial Clock Baud Rate
+AT91C_SPI_DLYBS           EQU (0xFF:SHL:16) ;- (SPI) Delay Before SPCK
+AT91C_SPI_DLYBCT          EQU (0xFF:SHL:24) ;- (SPI) Delay Between Consecutive Transfers
+
+;- *****************************************************************************
+;-              SOFTWARE API DEFINITION  FOR Usart
+;- *****************************************************************************
+                ^ 0 ;- AT91S_USART
+US_CR           #  4 ;- Control Register
+US_MR           #  4 ;- Mode Register
+US_IER          #  4 ;- Interrupt Enable Register
+US_IDR          #  4 ;- Interrupt Disable Register
+US_IMR          #  4 ;- Interrupt Mask Register
+US_CSR          #  4 ;- Channel Status Register
+US_RHR          #  4 ;- Receiver Holding Register
+US_THR          #  4 ;- Transmitter Holding Register
+US_BRGR         #  4 ;- Baud Rate Generator Register
+US_RTOR         #  4 ;- Receiver Time-out Register
+US_TTGR         #  4 ;- Transmitter Time-guard Register
+                # 20 ;- Reserved
+US_FIDI         #  4 ;- FI_DI_Ratio Register
+US_NER          #  4 ;- Nb Errors Register
+                #  4 ;- Reserved
+US_IF           #  4 ;- IRDA_FILTER Register
+                # 176 ;- Reserved
+US_RPR          #  4 ;- Receive Pointer Register
+US_RCR          #  4 ;- Receive Counter Register
+US_TPR          #  4 ;- Transmit Pointer Register
+US_TCR          #  4 ;- Transmit Counter Register
+US_RNPR         #  4 ;- Receive Next Pointer Register
+US_RNCR         #  4 ;- Receive Next Counter Register
+US_TNPR         #  4 ;- Transmit Next Pointer Register
+US_TNCR         #  4 ;- Transmit Next Counter Register
+US_PTCR         #  4 ;- PDC Transfer Control Register
+US_PTSR         #  4 ;- PDC Transfer Status Register
+;- -------- US_CR : (USART Offset: 0x0) Debug Unit Control Register -------- 
+AT91C_US_STTBRK           EQU (0x1:SHL:9) ;- (USART) Start Break
+AT91C_US_STPBRK           EQU (0x1:SHL:10) ;- (USART) Stop Break
+AT91C_US_STTTO            EQU (0x1:SHL:11) ;- (USART) Start Time-out
+AT91C_US_SENDA            EQU (0x1:SHL:12) ;- (USART) Send Address
+AT91C_US_RSTIT            EQU (0x1:SHL:13) ;- (USART) Reset Iterations
+AT91C_US_RSTNACK          EQU (0x1:SHL:14) ;- (USART) Reset Non Acknowledge
+AT91C_US_RETTO            EQU (0x1:SHL:15) ;- (USART) Rearm Time-out
+AT91C_US_DTREN            EQU (0x1:SHL:16) ;- (USART) Data Terminal ready Enable
+AT91C_US_DTRDIS           EQU (0x1:SHL:17) ;- (USART) Data Terminal ready Disable
+AT91C_US_RTSEN            EQU (0x1:SHL:18) ;- (USART) Request to Send enable
+AT91C_US_RTSDIS           EQU (0x1:SHL:19) ;- (USART) Request to Send Disable
+;- -------- US_MR : (USART Offset: 0x4) Debug Unit Mode Register -------- 
+AT91C_US_USMODE           EQU (0xF:SHL:0) ;- (USART) Usart mode
+AT91C_US_USMODE_NORMAL    EQU (0x0) ;- (USART) Normal
+AT91C_US_USMODE_RS485     EQU (0x1) ;- (USART) RS485
+AT91C_US_USMODE_HWHSH     EQU (0x2) ;- (USART) Hardware Handshaking
+AT91C_US_USMODE_MODEM     EQU (0x3) ;- (USART) Modem
+AT91C_US_USMODE_ISO7816_0 EQU (0x4) ;- (USART) ISO7816 protocol: T = 0
+AT91C_US_USMODE_ISO7816_1 EQU (0x6) ;- (USART) ISO7816 protocol: T = 1
+AT91C_US_USMODE_IRDA      EQU (0x8) ;- (USART) IrDA
+AT91C_US_USMODE_SWHSH     EQU (0xC) ;- (USART) Software Handshaking
+AT91C_US_CLKS             EQU (0x3:SHL:4) ;- (USART) Clock Selection (Baud Rate generator Input Clock
+AT91C_US_CLKS_CLOCK       EQU (0x0:SHL:4) ;- (USART) Clock
+AT91C_US_CLKS_FDIV1       EQU (0x1:SHL:4) ;- (USART) fdiv1
+AT91C_US_CLKS_SLOW        EQU (0x2:SHL:4) ;- (USART) slow_clock (ARM)
+AT91C_US_CLKS_EXT         EQU (0x3:SHL:4) ;- (USART) External (SCK)
+AT91C_US_CHRL             EQU (0x3:SHL:6) ;- (USART) Clock Selection (Baud Rate generator Input Clock
+AT91C_US_CHRL_5_BITS      EQU (0x0:SHL:6) ;- (USART) Character Length: 5 bits
+AT91C_US_CHRL_6_BITS      EQU (0x1:SHL:6) ;- (USART) Character Length: 6 bits
+AT91C_US_CHRL_7_BITS      EQU (0x2:SHL:6) ;- (USART) Character Length: 7 bits
+AT91C_US_CHRL_8_BITS      EQU (0x3:SHL:6) ;- (USART) Character Length: 8 bits
+AT91C_US_SYNC             EQU (0x1:SHL:8) ;- (USART) Synchronous Mode Select
+AT91C_US_NBSTOP           EQU (0x3:SHL:12) ;- (USART) Number of Stop bits
+AT91C_US_NBSTOP_1_BIT     EQU (0x0:SHL:12) ;- (USART) 1 stop bit
+AT91C_US_NBSTOP_15_BIT    EQU (0x1:SHL:12) ;- (USART) Asynchronous (SYNC=0) 2 stop bits Synchronous (SYNC=1) 2 stop bits
+AT91C_US_NBSTOP_2_BIT     EQU (0x2:SHL:12) ;- (USART) 2 stop bits
+AT91C_US_MSBF             EQU (0x1:SHL:16) ;- (USART) Bit Order
+AT91C_US_MODE9            EQU (0x1:SHL:17) ;- (USART) 9-bit Character length
+AT91C_US_CKLO             EQU (0x1:SHL:18) ;- (USART) Clock Output Select
+AT91C_US_OVER             EQU (0x1:SHL:19) ;- (USART) Over Sampling Mode
+AT91C_US_INACK            EQU (0x1:SHL:20) ;- (USART) Inhibit Non Acknowledge
+AT91C_US_DSNACK           EQU (0x1:SHL:21) ;- (USART) Disable Successive NACK
+AT91C_US_MAX_ITER         EQU (0x1:SHL:24) ;- (USART) Number of Repetitions
+AT91C_US_FILTER           EQU (0x1:SHL:28) ;- (USART) Receive Line Filter
+;- -------- US_IER : (USART Offset: 0x8) Debug Unit Interrupt Enable Register -------- 
+AT91C_US_RXBRK            EQU (0x1:SHL:2) ;- (USART) Break Received/End of Break
+AT91C_US_TIMEOUT          EQU (0x1:SHL:8) ;- (USART) Receiver Time-out
+AT91C_US_ITERATION        EQU (0x1:SHL:10) ;- (USART) Max number of Repetitions Reached
+AT91C_US_NACK             EQU (0x1:SHL:13) ;- (USART) Non Acknowledge
+AT91C_US_RIIC             EQU (0x1:SHL:16) ;- (USART) Ring INdicator Input Change Flag
+AT91C_US_DSRIC            EQU (0x1:SHL:17) ;- (USART) Data Set Ready Input Change Flag
+AT91C_US_DCDIC            EQU (0x1:SHL:18) ;- (USART) Data Carrier Flag
+AT91C_US_CTSIC            EQU (0x1:SHL:19) ;- (USART) Clear To Send Input Change Flag
+;- -------- US_IDR : (USART Offset: 0xc) Debug Unit Interrupt Disable Register -------- 
+;- -------- US_IMR : (USART Offset: 0x10) Debug Unit Interrupt Mask Register -------- 
+;- -------- US_CSR : (USART Offset: 0x14) Debug Unit Channel Status Register -------- 
+AT91C_US_RI               EQU (0x1:SHL:20) ;- (USART) Image of RI Input
+AT91C_US_DSR              EQU (0x1:SHL:21) ;- (USART) Image of DSR Input
+AT91C_US_DCD              EQU (0x1:SHL:22) ;- (USART) Image of DCD Input
+AT91C_US_CTS              EQU (0x1:SHL:23) ;- (USART) Image of CTS Input
+
+;- *****************************************************************************
+;-              SOFTWARE API DEFINITION  FOR Synchronous Serial Controller Interface
+;- *****************************************************************************
+                ^ 0 ;- AT91S_SSC
+SSC_CR          #  4 ;- Control Register
+SSC_CMR         #  4 ;- Clock Mode Register
+                #  8 ;- Reserved
+SSC_RCMR        #  4 ;- Receive Clock ModeRegister
+SSC_RFMR        #  4 ;- Receive Frame Mode Register
+SSC_TCMR        #  4 ;- Transmit Clock Mode Register
+SSC_TFMR        #  4 ;- Transmit Frame Mode Register
+SSC_RHR         #  4 ;- Receive Holding Register
+SSC_THR         #  4 ;- Transmit Holding Register
+                #  8 ;- Reserved
+SSC_RSHR        #  4 ;- Receive Sync Holding Register
+SSC_TSHR        #  4 ;- Transmit Sync Holding Register
+                #  8 ;- Reserved
+SSC_SR          #  4 ;- Status Register
+SSC_IER         #  4 ;- Interrupt Enable Register
+SSC_IDR         #  4 ;- Interrupt Disable Register
+SSC_IMR         #  4 ;- Interrupt Mask Register
+                # 176 ;- Reserved
+SSC_RPR         #  4 ;- Receive Pointer Register
+SSC_RCR         #  4 ;- Receive Counter Register
+SSC_TPR         #  4 ;- Transmit Pointer Register
+SSC_TCR         #  4 ;- Transmit Counter Register
+SSC_RNPR        #  4 ;- Receive Next Pointer Register
+SSC_RNCR        #  4 ;- Receive Next Counter Register
+SSC_TNPR        #  4 ;- Transmit Next Pointer Register
+SSC_TNCR        #  4 ;- Transmit Next Counter Register
+SSC_PTCR        #  4 ;- PDC Transfer Control Register
+SSC_PTSR        #  4 ;- PDC Transfer Status Register
+;- -------- SSC_CR : (SSC Offset: 0x0) SSC Control Register -------- 
+AT91C_SSC_RXEN            EQU (0x1:SHL:0) ;- (SSC) Receive Enable
+AT91C_SSC_RXDIS           EQU (0x1:SHL:1) ;- (SSC) Receive Disable
+AT91C_SSC_TXEN            EQU (0x1:SHL:8) ;- (SSC) Transmit Enable
+AT91C_SSC_TXDIS           EQU (0x1:SHL:9) ;- (SSC) Transmit Disable
+AT91C_SSC_SWRST           EQU (0x1:SHL:15) ;- (SSC) Software Reset
+;- -------- SSC_RCMR : (SSC Offset: 0x10) SSC Receive Clock Mode Register -------- 
+AT91C_SSC_CKS             EQU (0x3:SHL:0) ;- (SSC) Receive/Transmit Clock Selection
+AT91C_SSC_CKS_DIV         EQU (0x0) ;- (SSC) Divided Clock
+AT91C_SSC_CKS_TK          EQU (0x1) ;- (SSC) TK Clock signal
+AT91C_SSC_CKS_RK          EQU (0x2) ;- (SSC) RK pin
+AT91C_SSC_CKO             EQU (0x7:SHL:2) ;- (SSC) Receive/Transmit Clock Output Mode Selection
+AT91C_SSC_CKO_NONE        EQU (0x0:SHL:2) ;- (SSC) Receive/Transmit Clock Output Mode: None RK pin: Input-only
+AT91C_SSC_CKO_CONTINOUS   EQU (0x1:SHL:2) ;- (SSC) Continuous Receive/Transmit Clock RK pin: Output
+AT91C_SSC_CKO_DATA_TX     EQU (0x2:SHL:2) ;- (SSC) Receive/Transmit Clock only during data transfers RK pin: Output
+AT91C_SSC_CKI             EQU (0x1:SHL:5) ;- (SSC) Receive/Transmit Clock Inversion
+AT91C_SSC_CKG             EQU (0x3:SHL:6) ;- (SSC) Receive/Transmit Clock Gating Selection
+AT91C_SSC_CKG_NONE        EQU (0x0:SHL:6) ;- (SSC) Receive/Transmit Clock Gating: None, continuous clock
+AT91C_SSC_CKG_LOW         EQU (0x1:SHL:6) ;- (SSC) Receive/Transmit Clock enabled only if RF Low
+AT91C_SSC_CKG_HIGH        EQU (0x2:SHL:6) ;- (SSC) Receive/Transmit Clock enabled only if RF High
+AT91C_SSC_START           EQU (0xF:SHL:8) ;- (SSC) Receive/Transmit Start Selection
+AT91C_SSC_START_CONTINOUS EQU (0x0:SHL:8) ;- (SSC) Continuous, as soon as the receiver is enabled, and immediately after the end of transfer of the previous data.
+AT91C_SSC_START_TX        EQU (0x1:SHL:8) ;- (SSC) Transmit/Receive start
+AT91C_SSC_START_LOW_RF    EQU (0x2:SHL:8) ;- (SSC) Detection of a low level on RF input
+AT91C_SSC_START_HIGH_RF   EQU (0x3:SHL:8) ;- (SSC) Detection of a high level on RF input
+AT91C_SSC_START_FALL_RF   EQU (0x4:SHL:8) ;- (SSC) Detection of a falling edge on RF input
+AT91C_SSC_START_RISE_RF   EQU (0x5:SHL:8) ;- (SSC) Detection of a rising edge on RF input
+AT91C_SSC_START_LEVEL_RF  EQU (0x6:SHL:8) ;- (SSC) Detection of any level change on RF input
+AT91C_SSC_START_EDGE_RF   EQU (0x7:SHL:8) ;- (SSC) Detection of any edge on RF input
+AT91C_SSC_START_0         EQU (0x8:SHL:8) ;- (SSC) Compare 0
+AT91C_SSC_STOP            EQU (0x1:SHL:12) ;- (SSC) Receive Stop Selection
+AT91C_SSC_STTDLY          EQU (0xFF:SHL:16) ;- (SSC) Receive/Transmit Start Delay
+AT91C_SSC_PERIOD          EQU (0xFF:SHL:24) ;- (SSC) Receive/Transmit Period Divider Selection
+;- -------- SSC_RFMR : (SSC Offset: 0x14) SSC Receive Frame Mode Register -------- 
+AT91C_SSC_DATLEN          EQU (0x1F:SHL:0) ;- (SSC) Data Length
+AT91C_SSC_LOOP            EQU (0x1:SHL:5) ;- (SSC) Loop Mode
+AT91C_SSC_MSBF            EQU (0x1:SHL:7) ;- (SSC) Most Significant Bit First
+AT91C_SSC_DATNB           EQU (0xF:SHL:8) ;- (SSC) Data Number per Frame
+AT91C_SSC_FSLEN           EQU (0xF:SHL:16) ;- (SSC) Receive/Transmit Frame Sync length
+AT91C_SSC_FSOS            EQU (0x7:SHL:20) ;- (SSC) Receive/Transmit Frame Sync Output Selection
+AT91C_SSC_FSOS_NONE       EQU (0x0:SHL:20) ;- (SSC) Selected Receive/Transmit Frame Sync Signal: None RK pin Input-only
+AT91C_SSC_FSOS_NEGATIVE   EQU (0x1:SHL:20) ;- (SSC) Selected Receive/Transmit Frame Sync Signal: Negative Pulse
+AT91C_SSC_FSOS_POSITIVE   EQU (0x2:SHL:20) ;- (SSC) Selected Receive/Transmit Frame Sync Signal: Positive Pulse
+AT91C_SSC_FSOS_LOW        EQU (0x3:SHL:20) ;- (SSC) Selected Receive/Transmit Frame Sync Signal: Driver Low during data transfer
+AT91C_SSC_FSOS_HIGH       EQU (0x4:SHL:20) ;- (SSC) Selected Receive/Transmit Frame Sync Signal: Driver High during data transfer
+AT91C_SSC_FSOS_TOGGLE     EQU (0x5:SHL:20) ;- (SSC) Selected Receive/Transmit Frame Sync Signal: Toggling at each start of data transfer
+AT91C_SSC_FSEDGE          EQU (0x1:SHL:24) ;- (SSC) Frame Sync Edge Detection
+;- -------- SSC_TCMR : (SSC Offset: 0x18) SSC Transmit Clock Mode Register -------- 
+;- -------- SSC_TFMR : (SSC Offset: 0x1c) SSC Transmit Frame Mode Register -------- 
+AT91C_SSC_DATDEF          EQU (0x1:SHL:5) ;- (SSC) Data Default Value
+AT91C_SSC_FSDEN           EQU (0x1:SHL:23) ;- (SSC) Frame Sync Data Enable
+;- -------- SSC_SR : (SSC Offset: 0x40) SSC Status Register -------- 
+AT91C_SSC_TXRDY           EQU (0x1:SHL:0) ;- (SSC) Transmit Ready
+AT91C_SSC_TXEMPTY         EQU (0x1:SHL:1) ;- (SSC) Transmit Empty
+AT91C_SSC_ENDTX           EQU (0x1:SHL:2) ;- (SSC) End Of Transmission
+AT91C_SSC_TXBUFE          EQU (0x1:SHL:3) ;- (SSC) Transmit Buffer Empty
+AT91C_SSC_RXRDY           EQU (0x1:SHL:4) ;- (SSC) Receive Ready
+AT91C_SSC_OVRUN           EQU (0x1:SHL:5) ;- (SSC) Receive Overrun
+AT91C_SSC_ENDRX           EQU (0x1:SHL:6) ;- (SSC) End of Reception
+AT91C_SSC_RXBUFF          EQU (0x1:SHL:7) ;- (SSC) Receive Buffer Full
+AT91C_SSC_CP0             EQU (0x1:SHL:8) ;- (SSC) Compare 0
+AT91C_SSC_CP1             EQU (0x1:SHL:9) ;- (SSC) Compare 1
+AT91C_SSC_TXSYN           EQU (0x1:SHL:10) ;- (SSC) Transmit Sync
+AT91C_SSC_RXSYN           EQU (0x1:SHL:11) ;- (SSC) Receive Sync
+AT91C_SSC_TXENA           EQU (0x1:SHL:16) ;- (SSC) Transmit Enable
+AT91C_SSC_RXENA           EQU (0x1:SHL:17) ;- (SSC) Receive Enable
+;- -------- SSC_IER : (SSC Offset: 0x44) SSC Interrupt Enable Register -------- 
+;- -------- SSC_IDR : (SSC Offset: 0x48) SSC Interrupt Disable Register -------- 
+;- -------- SSC_IMR : (SSC Offset: 0x4c) SSC Interrupt Mask Register -------- 
+
+;- *****************************************************************************
+;-              SOFTWARE API DEFINITION  FOR Two-wire Interface
+;- *****************************************************************************
+                ^ 0 ;- AT91S_TWI
+TWI_CR          #  4 ;- Control Register
+TWI_MMR         #  4 ;- Master Mode Register
+                #  4 ;- Reserved
+TWI_IADR        #  4 ;- Internal Address Register
+TWI_CWGR        #  4 ;- Clock Waveform Generator Register
+                # 12 ;- Reserved
+TWI_SR          #  4 ;- Status Register
+TWI_IER         #  4 ;- Interrupt Enable Register
+TWI_IDR         #  4 ;- Interrupt Disable Register
+TWI_IMR         #  4 ;- Interrupt Mask Register
+TWI_RHR         #  4 ;- Receive Holding Register
+TWI_THR         #  4 ;- Transmit Holding Register
+;- -------- TWI_CR : (TWI Offset: 0x0) TWI Control Register -------- 
+AT91C_TWI_START           EQU (0x1:SHL:0) ;- (TWI) Send a START Condition
+AT91C_TWI_STOP            EQU (0x1:SHL:1) ;- (TWI) Send a STOP Condition
+AT91C_TWI_MSEN            EQU (0x1:SHL:2) ;- (TWI) TWI Master Transfer Enabled
+AT91C_TWI_MSDIS           EQU (0x1:SHL:3) ;- (TWI) TWI Master Transfer Disabled
+AT91C_TWI_SWRST           EQU (0x1:SHL:7) ;- (TWI) Software Reset
+;- -------- TWI_MMR : (TWI Offset: 0x4) TWI Master Mode Register -------- 
+AT91C_TWI_IADRSZ          EQU (0x3:SHL:8) ;- (TWI) Internal Device Address Size
+AT91C_TWI_IADRSZ_NO       EQU (0x0:SHL:8) ;- (TWI) No internal device address
+AT91C_TWI_IADRSZ_1_BYTE   EQU (0x1:SHL:8) ;- (TWI) One-byte internal device address
+AT91C_TWI_IADRSZ_2_BYTE   EQU (0x2:SHL:8) ;- (TWI) Two-byte internal device address
+AT91C_TWI_IADRSZ_3_BYTE   EQU (0x3:SHL:8) ;- (TWI) Three-byte internal device address
+AT91C_TWI_MREAD           EQU (0x1:SHL:12) ;- (TWI) Master Read Direction
+AT91C_TWI_DADR            EQU (0x7F:SHL:16) ;- (TWI) Device Address
+;- -------- TWI_CWGR : (TWI Offset: 0x10) TWI Clock Waveform Generator Register -------- 
+AT91C_TWI_CLDIV           EQU (0xFF:SHL:0) ;- (TWI) Clock Low Divider
+AT91C_TWI_CHDIV           EQU (0xFF:SHL:8) ;- (TWI) Clock High Divider
+AT91C_TWI_CKDIV           EQU (0x7:SHL:16) ;- (TWI) Clock Divider
+;- -------- TWI_SR : (TWI Offset: 0x20) TWI Status Register -------- 
+AT91C_TWI_TXCOMP          EQU (0x1:SHL:0) ;- (TWI) Transmission Completed
+AT91C_TWI_RXRDY           EQU (0x1:SHL:1) ;- (TWI) Receive holding register ReaDY
+AT91C_TWI_TXRDY           EQU (0x1:SHL:2) ;- (TWI) Transmit holding register ReaDY
+AT91C_TWI_OVRE            EQU (0x1:SHL:6) ;- (TWI) Overrun Error
+AT91C_TWI_UNRE            EQU (0x1:SHL:7) ;- (TWI) Underrun Error
+AT91C_TWI_NACK            EQU (0x1:SHL:8) ;- (TWI) Not Acknowledged
+;- -------- TWI_IER : (TWI Offset: 0x24) TWI Interrupt Enable Register -------- 
+;- -------- TWI_IDR : (TWI Offset: 0x28) TWI Interrupt Disable Register -------- 
+;- -------- TWI_IMR : (TWI Offset: 0x2c) TWI Interrupt Mask Register -------- 
+
+;- *****************************************************************************
+;-              SOFTWARE API DEFINITION  FOR PWMC Channel Interface
+;- *****************************************************************************
+                ^ 0 ;- AT91S_PWMC_CH
+PWMC_CMR        #  4 ;- Channel Mode Register
+PWMC_CDTYR      #  4 ;- Channel Duty Cycle Register
+PWMC_CPRDR      #  4 ;- Channel Period Register
+PWMC_CCNTR      #  4 ;- Channel Counter Register
+PWMC_CUPDR      #  4 ;- Channel Update Register
+PWMC_Reserved   # 12 ;- Reserved
+;- -------- PWMC_CMR : (PWMC_CH Offset: 0x0) PWMC Channel Mode Register -------- 
+AT91C_PWMC_CPRE           EQU (0xF:SHL:0) ;- (PWMC_CH) Channel Pre-scaler : PWMC_CLKx
+AT91C_PWMC_CPRE_MCK       EQU (0x0) ;- (PWMC_CH) 
+AT91C_PWMC_CPRE_MCKA      EQU (0xB) ;- (PWMC_CH) 
+AT91C_PWMC_CPRE_MCKB      EQU (0xC) ;- (PWMC_CH) 
+AT91C_PWMC_CALG           EQU (0x1:SHL:8) ;- (PWMC_CH) Channel Alignment
+AT91C_PWMC_CPOL           EQU (0x1:SHL:9) ;- (PWMC_CH) Channel Polarity
+AT91C_PWMC_CPD            EQU (0x1:SHL:10) ;- (PWMC_CH) Channel Update Period
+;- -------- PWMC_CDTYR : (PWMC_CH Offset: 0x4) PWMC Channel Duty Cycle Register -------- 
+AT91C_PWMC_CDTY           EQU (0x0:SHL:0) ;- (PWMC_CH) Channel Duty Cycle
+;- -------- PWMC_CPRDR : (PWMC_CH Offset: 0x8) PWMC Channel Period Register -------- 
+AT91C_PWMC_CPRD           EQU (0x0:SHL:0) ;- (PWMC_CH) Channel Period
+;- -------- PWMC_CCNTR : (PWMC_CH Offset: 0xc) PWMC Channel Counter Register -------- 
+AT91C_PWMC_CCNT           EQU (0x0:SHL:0) ;- (PWMC_CH) Channel Counter
+;- -------- PWMC_CUPDR : (PWMC_CH Offset: 0x10) PWMC Channel Update Register -------- 
+AT91C_PWMC_CUPD           EQU (0x0:SHL:0) ;- (PWMC_CH) Channel Update
+
+;- *****************************************************************************
+;-              SOFTWARE API DEFINITION  FOR Pulse Width Modulation Controller Interface
+;- *****************************************************************************
+                ^ 0 ;- AT91S_PWMC
+PWMC_MR         #  4 ;- PWMC Mode Register
+PWMC_ENA        #  4 ;- PWMC Enable Register
+PWMC_DIS        #  4 ;- PWMC Disable Register
+PWMC_SR         #  4 ;- PWMC Status Register
+PWMC_IER        #  4 ;- PWMC Interrupt Enable Register
+PWMC_IDR        #  4 ;- PWMC Interrupt Disable Register
+PWMC_IMR        #  4 ;- PWMC Interrupt Mask Register
+PWMC_ISR        #  4 ;- PWMC Interrupt Status Register
+                # 220 ;- Reserved
+PWMC_VR         #  4 ;- PWMC Version Register
+                # 256 ;- Reserved
+PWMC_CH         # 96 ;- PWMC Channel
+;- -------- PWMC_MR : (PWMC Offset: 0x0) PWMC Mode Register -------- 
+AT91C_PWMC_DIVA           EQU (0xFF:SHL:0) ;- (PWMC) CLKA divide factor.
+AT91C_PWMC_PREA           EQU (0xF:SHL:8) ;- (PWMC) Divider Input Clock Prescaler A
+AT91C_PWMC_PREA_MCK       EQU (0x0:SHL:8) ;- (PWMC) 
+AT91C_PWMC_DIVB           EQU (0xFF:SHL:16) ;- (PWMC) CLKB divide factor.
+AT91C_PWMC_PREB           EQU (0xF:SHL:24) ;- (PWMC) Divider Input Clock Prescaler B
+AT91C_PWMC_PREB_MCK       EQU (0x0:SHL:24) ;- (PWMC) 
+;- -------- PWMC_ENA : (PWMC Offset: 0x4) PWMC Enable Register -------- 
+AT91C_PWMC_CHID0          EQU (0x1:SHL:0) ;- (PWMC) Channel ID 0
+AT91C_PWMC_CHID1          EQU (0x1:SHL:1) ;- (PWMC) Channel ID 1
+AT91C_PWMC_CHID2          EQU (0x1:SHL:2) ;- (PWMC) Channel ID 2
+AT91C_PWMC_CHID3          EQU (0x1:SHL:3) ;- (PWMC) Channel ID 3
+;- -------- PWMC_DIS : (PWMC Offset: 0x8) PWMC Disable Register -------- 
+;- -------- PWMC_SR : (PWMC Offset: 0xc) PWMC Status Register -------- 
+;- -------- PWMC_IER : (PWMC Offset: 0x10) PWMC Interrupt Enable Register -------- 
+;- -------- PWMC_IDR : (PWMC Offset: 0x14) PWMC Interrupt Disable Register -------- 
+;- -------- PWMC_IMR : (PWMC Offset: 0x18) PWMC Interrupt Mask Register -------- 
+;- -------- PWMC_ISR : (PWMC Offset: 0x1c) PWMC Interrupt Status Register -------- 
+
+;- *****************************************************************************
+;-              SOFTWARE API DEFINITION  FOR USB Device Interface
+;- *****************************************************************************
+                ^ 0 ;- AT91S_UDP
+UDP_NUM         #  4 ;- Frame Number Register
+UDP_GLBSTATE    #  4 ;- Global State Register
+UDP_FADDR       #  4 ;- Function Address Register
+                #  4 ;- Reserved
+UDP_IER         #  4 ;- Interrupt Enable Register
+UDP_IDR         #  4 ;- Interrupt Disable Register
+UDP_IMR         #  4 ;- Interrupt Mask Register
+UDP_ISR         #  4 ;- Interrupt Status Register
+UDP_ICR         #  4 ;- Interrupt Clear Register
+                #  4 ;- Reserved
+UDP_RSTEP       #  4 ;- Reset Endpoint Register
+                #  4 ;- Reserved
+UDP_CSR         # 24 ;- Endpoint Control and Status Register
+                #  8 ;- Reserved
+UDP_FDR         # 24 ;- Endpoint FIFO Data Register
+                # 12 ;- Reserved
+UDP_TXVC        #  4 ;- Transceiver Control Register
+;- -------- UDP_FRM_NUM : (UDP Offset: 0x0) USB Frame Number Register -------- 
+AT91C_UDP_FRM_NUM         EQU (0x7FF:SHL:0) ;- (UDP) Frame Number as Defined in the Packet Field Formats
+AT91C_UDP_FRM_ERR         EQU (0x1:SHL:16) ;- (UDP) Frame Error
+AT91C_UDP_FRM_OK          EQU (0x1:SHL:17) ;- (UDP) Frame OK
+;- -------- UDP_GLB_STATE : (UDP Offset: 0x4) USB Global State Register -------- 
+AT91C_UDP_FADDEN          EQU (0x1:SHL:0) ;- (UDP) Function Address Enable
+AT91C_UDP_CONFG           EQU (0x1:SHL:1) ;- (UDP) Configured
+AT91C_UDP_ESR             EQU (0x1:SHL:2) ;- (UDP) Enable Send Resume
+AT91C_UDP_RSMINPR         EQU (0x1:SHL:3) ;- (UDP) A Resume Has Been Sent to the Host
+AT91C_UDP_RMWUPE          EQU (0x1:SHL:4) ;- (UDP) Remote Wake Up Enable
+;- -------- UDP_FADDR : (UDP Offset: 0x8) USB Function Address Register -------- 
+AT91C_UDP_FADD            EQU (0xFF:SHL:0) ;- (UDP) Function Address Value
+AT91C_UDP_FEN             EQU (0x1:SHL:8) ;- (UDP) Function Enable
+;- -------- UDP_IER : (UDP Offset: 0x10) USB Interrupt Enable Register -------- 
+AT91C_UDP_EPINT0          EQU (0x1:SHL:0) ;- (UDP) Endpoint 0 Interrupt
+AT91C_UDP_EPINT1          EQU (0x1:SHL:1) ;- (UDP) Endpoint 0 Interrupt
+AT91C_UDP_EPINT2          EQU (0x1:SHL:2) ;- (UDP) Endpoint 2 Interrupt
+AT91C_UDP_EPINT3          EQU (0x1:SHL:3) ;- (UDP) Endpoint 3 Interrupt
+AT91C_UDP_EPINT4          EQU (0x1:SHL:4) ;- (UDP) Endpoint 4 Interrupt
+AT91C_UDP_EPINT5          EQU (0x1:SHL:5) ;- (UDP) Endpoint 5 Interrupt
+AT91C_UDP_RXSUSP          EQU (0x1:SHL:8) ;- (UDP) USB Suspend Interrupt
+AT91C_UDP_RXRSM           EQU (0x1:SHL:9) ;- (UDP) USB Resume Interrupt
+AT91C_UDP_EXTRSM          EQU (0x1:SHL:10) ;- (UDP) USB External Resume Interrupt
+AT91C_UDP_SOFINT          EQU (0x1:SHL:11) ;- (UDP) USB Start Of frame Interrupt
+AT91C_UDP_WAKEUP          EQU (0x1:SHL:13) ;- (UDP) USB Resume Interrupt
+;- -------- UDP_IDR : (UDP Offset: 0x14) USB Interrupt Disable Register -------- 
+;- -------- UDP_IMR : (UDP Offset: 0x18) USB Interrupt Mask Register -------- 
+;- -------- UDP_ISR : (UDP Offset: 0x1c) USB Interrupt Status Register -------- 
+AT91C_UDP_ENDBUSRES       EQU (0x1:SHL:12) ;- (UDP) USB End Of Bus Reset Interrupt
+;- -------- UDP_ICR : (UDP Offset: 0x20) USB Interrupt Clear Register -------- 
+;- -------- UDP_RST_EP : (UDP Offset: 0x28) USB Reset Endpoint Register -------- 
+AT91C_UDP_EP0             EQU (0x1:SHL:0) ;- (UDP) Reset Endpoint 0
+AT91C_UDP_EP1             EQU (0x1:SHL:1) ;- (UDP) Reset Endpoint 1
+AT91C_UDP_EP2             EQU (0x1:SHL:2) ;- (UDP) Reset Endpoint 2
+AT91C_UDP_EP3             EQU (0x1:SHL:3) ;- (UDP) Reset Endpoint 3
+AT91C_UDP_EP4             EQU (0x1:SHL:4) ;- (UDP) Reset Endpoint 4
+AT91C_UDP_EP5             EQU (0x1:SHL:5) ;- (UDP) Reset Endpoint 5
+;- -------- UDP_CSR : (UDP Offset: 0x30) USB Endpoint Control and Status Register -------- 
+AT91C_UDP_TXCOMP          EQU (0x1:SHL:0) ;- (UDP) Generates an IN packet with data previously written in the DPR
+AT91C_UDP_RX_DATA_BK0     EQU (0x1:SHL:1) ;- (UDP) Receive Data Bank 0
+AT91C_UDP_RXSETUP         EQU (0x1:SHL:2) ;- (UDP) Sends STALL to the Host (Control endpoints)
+AT91C_UDP_ISOERROR        EQU (0x1:SHL:3) ;- (UDP) Isochronous error (Isochronous endpoints)
+AT91C_UDP_TXPKTRDY        EQU (0x1:SHL:4) ;- (UDP) Transmit Packet Ready
+AT91C_UDP_FORCESTALL      EQU (0x1:SHL:5) ;- (UDP) Force Stall (used by Control, Bulk and Isochronous endpoints).
+AT91C_UDP_RX_DATA_BK1     EQU (0x1:SHL:6) ;- (UDP) Receive Data Bank 1 (only used by endpoints with ping-pong attributes).
+AT91C_UDP_DIR             EQU (0x1:SHL:7) ;- (UDP) Transfer Direction
+AT91C_UDP_EPTYPE          EQU (0x7:SHL:8) ;- (UDP) Endpoint type
+AT91C_UDP_EPTYPE_CTRL     EQU (0x0:SHL:8) ;- (UDP) Control
+AT91C_UDP_EPTYPE_ISO_OUT  EQU (0x1:SHL:8) ;- (UDP) Isochronous OUT
+AT91C_UDP_EPTYPE_BULK_OUT EQU (0x2:SHL:8) ;- (UDP) Bulk OUT
+AT91C_UDP_EPTYPE_INT_OUT  EQU (0x3:SHL:8) ;- (UDP) Interrupt OUT
+AT91C_UDP_EPTYPE_ISO_IN   EQU (0x5:SHL:8) ;- (UDP) Isochronous IN
+AT91C_UDP_EPTYPE_BULK_IN  EQU (0x6:SHL:8) ;- (UDP) Bulk IN
+AT91C_UDP_EPTYPE_INT_IN   EQU (0x7:SHL:8) ;- (UDP) Interrupt IN
+AT91C_UDP_DTGLE           EQU (0x1:SHL:11) ;- (UDP) Data Toggle
+AT91C_UDP_EPEDS           EQU (0x1:SHL:15) ;- (UDP) Endpoint Enable Disable
+AT91C_UDP_RXBYTECNT       EQU (0x7FF:SHL:16) ;- (UDP) Number Of Bytes Available in the FIFO
+;- -------- UDP_TXVC : (UDP Offset: 0x74) Transceiver Control Register -------- 
+AT91C_UDP_TXVDIS          EQU (0x1:SHL:8) ;- (UDP) 
+AT91C_UDP_PUON            EQU (0x1:SHL:9) ;- (UDP) Pull-up ON
+
+;- *****************************************************************************
+;-              SOFTWARE API DEFINITION  FOR Timer Counter Channel Interface
+;- *****************************************************************************
+                ^ 0 ;- AT91S_TC
+TC_CCR          #  4 ;- Channel Control Register
+TC_CMR          #  4 ;- Channel Mode Register (Capture Mode / Waveform Mode)
+                #  8 ;- Reserved
+TC_CV           #  4 ;- Counter Value
+TC_RA           #  4 ;- Register A
+TC_RB           #  4 ;- Register B
+TC_RC           #  4 ;- Register C
+TC_SR           #  4 ;- Status Register
+TC_IER          #  4 ;- Interrupt Enable Register
+TC_IDR          #  4 ;- Interrupt Disable Register
+TC_IMR          #  4 ;- Interrupt Mask Register
+;- -------- TC_CCR : (TC Offset: 0x0) TC Channel Control Register -------- 
+AT91C_TC_CLKEN            EQU (0x1:SHL:0) ;- (TC) Counter Clock Enable Command
+AT91C_TC_CLKDIS           EQU (0x1:SHL:1) ;- (TC) Counter Clock Disable Command
+AT91C_TC_SWTRG            EQU (0x1:SHL:2) ;- (TC) Software Trigger Command
+;- -------- TC_CMR : (TC Offset: 0x4) TC Channel Mode Register: Capture Mode / Waveform Mode -------- 
+AT91C_TC_CLKS             EQU (0x7:SHL:0) ;- (TC) Clock Selection
+AT91C_TC_CLKS_TIMER_DIV1_CLOCK EQU (0x0) ;- (TC) Clock selected: TIMER_DIV1_CLOCK
+AT91C_TC_CLKS_TIMER_DIV2_CLOCK EQU (0x1) ;- (TC) Clock selected: TIMER_DIV2_CLOCK
+AT91C_TC_CLKS_TIMER_DIV3_CLOCK EQU (0x2) ;- (TC) Clock selected: TIMER_DIV3_CLOCK
+AT91C_TC_CLKS_TIMER_DIV4_CLOCK EQU (0x3) ;- (TC) Clock selected: TIMER_DIV4_CLOCK
+AT91C_TC_CLKS_TIMER_DIV5_CLOCK EQU (0x4) ;- (TC) Clock selected: TIMER_DIV5_CLOCK
+AT91C_TC_CLKS_XC0         EQU (0x5) ;- (TC) Clock selected: XC0
+AT91C_TC_CLKS_XC1         EQU (0x6) ;- (TC) Clock selected: XC1
+AT91C_TC_CLKS_XC2         EQU (0x7) ;- (TC) Clock selected: XC2
+AT91C_TC_CLKI             EQU (0x1:SHL:3) ;- (TC) Clock Invert
+AT91C_TC_BURST            EQU (0x3:SHL:4) ;- (TC) Burst Signal Selection
+AT91C_TC_BURST_NONE       EQU (0x0:SHL:4) ;- (TC) The clock is not gated by an external signal
+AT91C_TC_BURST_XC0        EQU (0x1:SHL:4) ;- (TC) XC0 is ANDed with the selected clock
+AT91C_TC_BURST_XC1        EQU (0x2:SHL:4) ;- (TC) XC1 is ANDed with the selected clock
+AT91C_TC_BURST_XC2        EQU (0x3:SHL:4) ;- (TC) XC2 is ANDed with the selected clock
+AT91C_TC_CPCSTOP          EQU (0x1:SHL:6) ;- (TC) Counter Clock Stopped with RC Compare
+AT91C_TC_LDBSTOP          EQU (0x1:SHL:6) ;- (TC) Counter Clock Stopped with RB Loading
+AT91C_TC_CPCDIS           EQU (0x1:SHL:7) ;- (TC) Counter Clock Disable with RC Compare
+AT91C_TC_LDBDIS           EQU (0x1:SHL:7) ;- (TC) Counter Clock Disabled with RB Loading
+AT91C_TC_ETRGEDG          EQU (0x3:SHL:8) ;- (TC) External Trigger Edge Selection
+AT91C_TC_ETRGEDG_NONE     EQU (0x0:SHL:8) ;- (TC) Edge: None
+AT91C_TC_ETRGEDG_RISING   EQU (0x1:SHL:8) ;- (TC) Edge: rising edge
+AT91C_TC_ETRGEDG_FALLING  EQU (0x2:SHL:8) ;- (TC) Edge: falling edge
+AT91C_TC_ETRGEDG_BOTH     EQU (0x3:SHL:8) ;- (TC) Edge: each edge
+AT91C_TC_EEVTEDG          EQU (0x3:SHL:8) ;- (TC) External Event Edge Selection
+AT91C_TC_EEVTEDG_NONE     EQU (0x0:SHL:8) ;- (TC) Edge: None
+AT91C_TC_EEVTEDG_RISING   EQU (0x1:SHL:8) ;- (TC) Edge: rising edge
+AT91C_TC_EEVTEDG_FALLING  EQU (0x2:SHL:8) ;- (TC) Edge: falling edge
+AT91C_TC_EEVTEDG_BOTH     EQU (0x3:SHL:8) ;- (TC) Edge: each edge
+AT91C_TC_EEVT             EQU (0x3:SHL:10) ;- (TC) External Event  Selection
+AT91C_TC_EEVT_TIOB        EQU (0x0:SHL:10) ;- (TC) Signal selected as external event: TIOB TIOB direction: input
+AT91C_TC_EEVT_XC0         EQU (0x1:SHL:10) ;- (TC) Signal selected as external event: XC0 TIOB direction: output
+AT91C_TC_EEVT_XC1         EQU (0x2:SHL:10) ;- (TC) Signal selected as external event: XC1 TIOB direction: output
+AT91C_TC_EEVT_XC2         EQU (0x3:SHL:10) ;- (TC) Signal selected as external event: XC2 TIOB direction: output
+AT91C_TC_ABETRG           EQU (0x1:SHL:10) ;- (TC) TIOA or TIOB External Trigger Selection
+AT91C_TC_ENETRG           EQU (0x1:SHL:12) ;- (TC) External Event Trigger enable
+AT91C_TC_WAVESEL          EQU (0x3:SHL:13) ;- (TC) Waveform  Selection
+AT91C_TC_WAVESEL_UP       EQU (0x0:SHL:13) ;- (TC) UP mode without atomatic trigger on RC Compare
+AT91C_TC_WAVESEL_UPDOWN   EQU (0x1:SHL:13) ;- (TC) UPDOWN mode without automatic trigger on RC Compare
+AT91C_TC_WAVESEL_UP_AUTO  EQU (0x2:SHL:13) ;- (TC) UP mode with automatic trigger on RC Compare
+AT91C_TC_WAVESEL_UPDOWN_AUTO EQU (0x3:SHL:13) ;- (TC) UPDOWN mode with automatic trigger on RC Compare
+AT91C_TC_CPCTRG           EQU (0x1:SHL:14) ;- (TC) RC Compare Trigger Enable
+AT91C_TC_WAVE             EQU (0x1:SHL:15) ;- (TC) 
+AT91C_TC_ACPA             EQU (0x3:SHL:16) ;- (TC) RA Compare Effect on TIOA
+AT91C_TC_ACPA_NONE        EQU (0x0:SHL:16) ;- (TC) Effect: none
+AT91C_TC_ACPA_SET         EQU (0x1:SHL:16) ;- (TC) Effect: set
+AT91C_TC_ACPA_CLEAR       EQU (0x2:SHL:16) ;- (TC) Effect: clear
+AT91C_TC_ACPA_TOGGLE      EQU (0x3:SHL:16) ;- (TC) Effect: toggle
+AT91C_TC_LDRA             EQU (0x3:SHL:16) ;- (TC) RA Loading Selection
+AT91C_TC_LDRA_NONE        EQU (0x0:SHL:16) ;- (TC) Edge: None
+AT91C_TC_LDRA_RISING      EQU (0x1:SHL:16) ;- (TC) Edge: rising edge of TIOA
+AT91C_TC_LDRA_FALLING     EQU (0x2:SHL:16) ;- (TC) Edge: falling edge of TIOA
+AT91C_TC_LDRA_BOTH        EQU (0x3:SHL:16) ;- (TC) Edge: each edge of TIOA
+AT91C_TC_ACPC             EQU (0x3:SHL:18) ;- (TC) RC Compare Effect on TIOA
+AT91C_TC_ACPC_NONE        EQU (0x0:SHL:18) ;- (TC) Effect: none
+AT91C_TC_ACPC_SET         EQU (0x1:SHL:18) ;- (TC) Effect: set
+AT91C_TC_ACPC_CLEAR       EQU (0x2:SHL:18) ;- (TC) Effect: clear
+AT91C_TC_ACPC_TOGGLE      EQU (0x3:SHL:18) ;- (TC) Effect: toggle
+AT91C_TC_LDRB             EQU (0x3:SHL:18) ;- (TC) RB Loading Selection
+AT91C_TC_LDRB_NONE        EQU (0x0:SHL:18) ;- (TC) Edge: None
+AT91C_TC_LDRB_RISING      EQU (0x1:SHL:18) ;- (TC) Edge: rising edge of TIOA
+AT91C_TC_LDRB_FALLING     EQU (0x2:SHL:18) ;- (TC) Edge: falling edge of TIOA
+AT91C_TC_LDRB_BOTH        EQU (0x3:SHL:18) ;- (TC) Edge: each edge of TIOA
+AT91C_TC_AEEVT            EQU (0x3:SHL:20) ;- (TC) External Event Effect on TIOA
+AT91C_TC_AEEVT_NONE       EQU (0x0:SHL:20) ;- (TC) Effect: none
+AT91C_TC_AEEVT_SET        EQU (0x1:SHL:20) ;- (TC) Effect: set
+AT91C_TC_AEEVT_CLEAR      EQU (0x2:SHL:20) ;- (TC) Effect: clear
+AT91C_TC_AEEVT_TOGGLE     EQU (0x3:SHL:20) ;- (TC) Effect: toggle
+AT91C_TC_ASWTRG           EQU (0x3:SHL:22) ;- (TC) Software Trigger Effect on TIOA
+AT91C_TC_ASWTRG_NONE      EQU (0x0:SHL:22) ;- (TC) Effect: none
+AT91C_TC_ASWTRG_SET       EQU (0x1:SHL:22) ;- (TC) Effect: set
+AT91C_TC_ASWTRG_CLEAR     EQU (0x2:SHL:22) ;- (TC) Effect: clear
+AT91C_TC_ASWTRG_TOGGLE    EQU (0x3:SHL:22) ;- (TC) Effect: toggle
+AT91C_TC_BCPB             EQU (0x3:SHL:24) ;- (TC) RB Compare Effect on TIOB
+AT91C_TC_BCPB_NONE        EQU (0x0:SHL:24) ;- (TC) Effect: none
+AT91C_TC_BCPB_SET         EQU (0x1:SHL:24) ;- (TC) Effect: set
+AT91C_TC_BCPB_CLEAR       EQU (0x2:SHL:24) ;- (TC) Effect: clear
+AT91C_TC_BCPB_TOGGLE      EQU (0x3:SHL:24) ;- (TC) Effect: toggle
+AT91C_TC_BCPC             EQU (0x3:SHL:26) ;- (TC) RC Compare Effect on TIOB
+AT91C_TC_BCPC_NONE        EQU (0x0:SHL:26) ;- (TC) Effect: none
+AT91C_TC_BCPC_SET         EQU (0x1:SHL:26) ;- (TC) Effect: set
+AT91C_TC_BCPC_CLEAR       EQU (0x2:SHL:26) ;- (TC) Effect: clear
+AT91C_TC_BCPC_TOGGLE      EQU (0x3:SHL:26) ;- (TC) Effect: toggle
+AT91C_TC_BEEVT            EQU (0x3:SHL:28) ;- (TC) External Event Effect on TIOB
+AT91C_TC_BEEVT_NONE       EQU (0x0:SHL:28) ;- (TC) Effect: none
+AT91C_TC_BEEVT_SET        EQU (0x1:SHL:28) ;- (TC) Effect: set
+AT91C_TC_BEEVT_CLEAR      EQU (0x2:SHL:28) ;- (TC) Effect: clear
+AT91C_TC_BEEVT_TOGGLE     EQU (0x3:SHL:28) ;- (TC) Effect: toggle
+AT91C_TC_BSWTRG           EQU (0x3:SHL:30) ;- (TC) Software Trigger Effect on TIOB
+AT91C_TC_BSWTRG_NONE      EQU (0x0:SHL:30) ;- (TC) Effect: none
+AT91C_TC_BSWTRG_SET       EQU (0x1:SHL:30) ;- (TC) Effect: set
+AT91C_TC_BSWTRG_CLEAR     EQU (0x2:SHL:30) ;- (TC) Effect: clear
+AT91C_TC_BSWTRG_TOGGLE    EQU (0x3:SHL:30) ;- (TC) Effect: toggle
+;- -------- TC_SR : (TC Offset: 0x20) TC Channel Status Register -------- 
+AT91C_TC_COVFS            EQU (0x1:SHL:0) ;- (TC) Counter Overflow
+AT91C_TC_LOVRS            EQU (0x1:SHL:1) ;- (TC) Load Overrun
+AT91C_TC_CPAS             EQU (0x1:SHL:2) ;- (TC) RA Compare
+AT91C_TC_CPBS             EQU (0x1:SHL:3) ;- (TC) RB Compare
+AT91C_TC_CPCS             EQU (0x1:SHL:4) ;- (TC) RC Compare
+AT91C_TC_LDRAS            EQU (0x1:SHL:5) ;- (TC) RA Loading
+AT91C_TC_LDRBS            EQU (0x1:SHL:6) ;- (TC) RB Loading
+AT91C_TC_ETRGS            EQU (0x1:SHL:7) ;- (TC) External Trigger
+AT91C_TC_CLKSTA           EQU (0x1:SHL:16) ;- (TC) Clock Enabling
+AT91C_TC_MTIOA            EQU (0x1:SHL:17) ;- (TC) TIOA Mirror
+AT91C_TC_MTIOB            EQU (0x1:SHL:18) ;- (TC) TIOA Mirror
+;- -------- TC_IER : (TC Offset: 0x24) TC Channel Interrupt Enable Register -------- 
+;- -------- TC_IDR : (TC Offset: 0x28) TC Channel Interrupt Disable Register -------- 
+;- -------- TC_IMR : (TC Offset: 0x2c) TC Channel Interrupt Mask Register -------- 
+
+;- *****************************************************************************
+;-              SOFTWARE API DEFINITION  FOR Timer Counter Interface
+;- *****************************************************************************
+                ^ 0 ;- AT91S_TCB
+TCB_TC0         # 48 ;- TC Channel 0
+                # 16 ;- Reserved
+TCB_TC1         # 48 ;- TC Channel 1
+                # 16 ;- Reserved
+TCB_TC2         # 48 ;- TC Channel 2
+                # 16 ;- Reserved
+TCB_BCR         #  4 ;- TC Block Control Register
+TCB_BMR         #  4 ;- TC Block Mode Register
+;- -------- TCB_BCR : (TCB Offset: 0xc0) TC Block Control Register -------- 
+AT91C_TCB_SYNC            EQU (0x1:SHL:0) ;- (TCB) Synchro Command
+;- -------- TCB_BMR : (TCB Offset: 0xc4) TC Block Mode Register -------- 
+AT91C_TCB_TC0XC0S         EQU (0x3:SHL:0) ;- (TCB) External Clock Signal 0 Selection
+AT91C_TCB_TC0XC0S_TCLK0   EQU (0x0) ;- (TCB) TCLK0 connected to XC0
+AT91C_TCB_TC0XC0S_NONE    EQU (0x1) ;- (TCB) None signal connected to XC0
+AT91C_TCB_TC0XC0S_TIOA1   EQU (0x2) ;- (TCB) TIOA1 connected to XC0
+AT91C_TCB_TC0XC0S_TIOA2   EQU (0x3) ;- (TCB) TIOA2 connected to XC0
+AT91C_TCB_TC1XC1S         EQU (0x3:SHL:2) ;- (TCB) External Clock Signal 1 Selection
+AT91C_TCB_TC1XC1S_TCLK1   EQU (0x0:SHL:2) ;- (TCB) TCLK1 connected to XC1
+AT91C_TCB_TC1XC1S_NONE    EQU (0x1:SHL:2) ;- (TCB) None signal connected to XC1
+AT91C_TCB_TC1XC1S_TIOA0   EQU (0x2:SHL:2) ;- (TCB) TIOA0 connected to XC1
+AT91C_TCB_TC1XC1S_TIOA2   EQU (0x3:SHL:2) ;- (TCB) TIOA2 connected to XC1
+AT91C_TCB_TC2XC2S         EQU (0x3:SHL:4) ;- (TCB) External Clock Signal 2 Selection
+AT91C_TCB_TC2XC2S_TCLK2   EQU (0x0:SHL:4) ;- (TCB) TCLK2 connected to XC2
+AT91C_TCB_TC2XC2S_NONE    EQU (0x1:SHL:4) ;- (TCB) None signal connected to XC2
+AT91C_TCB_TC2XC2S_TIOA0   EQU (0x2:SHL:4) ;- (TCB) TIOA0 connected to XC2
+AT91C_TCB_TC2XC2S_TIOA1   EQU (0x3:SHL:4) ;- (TCB) TIOA2 connected to XC2
+
+;- *****************************************************************************
+;-              SOFTWARE API DEFINITION  FOR Control Area Network MailBox Interface
+;- *****************************************************************************
+                ^ 0 ;- AT91S_CAN_MB
+CAN_MB_MMR      #  4 ;- MailBox Mode Register
+CAN_MB_MAM      #  4 ;- MailBox Acceptance Mask Register
+CAN_MB_MID      #  4 ;- MailBox ID Register
+CAN_MB_MFID     #  4 ;- MailBox Family ID Register
+CAN_MB_MSR      #  4 ;- MailBox Status Register
+CAN_MB_MDL      #  4 ;- MailBox Data Low Register
+CAN_MB_MDH      #  4 ;- MailBox Data High Register
+CAN_MB_MCR      #  4 ;- MailBox Control Register
+;- -------- CAN_MMR : (CAN_MB Offset: 0x0) CAN Message Mode Register -------- 
+AT91C_CAN_MTIMEMARK       EQU (0xFFFF:SHL:0) ;- (CAN_MB) Mailbox Timemark
+AT91C_CAN_PRIOR           EQU (0xF:SHL:16) ;- (CAN_MB) Mailbox Priority
+AT91C_CAN_MOT             EQU (0x7:SHL:24) ;- (CAN_MB) Mailbox Object Type
+AT91C_CAN_MOT_DIS         EQU (0x0:SHL:24) ;- (CAN_MB) 
+AT91C_CAN_MOT_RX          EQU (0x1:SHL:24) ;- (CAN_MB) 
+AT91C_CAN_MOT_RXOVERWRITE EQU (0x2:SHL:24) ;- (CAN_MB) 
+AT91C_CAN_MOT_TX          EQU (0x3:SHL:24) ;- (CAN_MB) 
+AT91C_CAN_MOT_CONSUMER    EQU (0x4:SHL:24) ;- (CAN_MB) 
+AT91C_CAN_MOT_PRODUCER    EQU (0x5:SHL:24) ;- (CAN_MB) 
+;- -------- CAN_MAM : (CAN_MB Offset: 0x4) CAN Message Acceptance Mask Register -------- 
+AT91C_CAN_MIDvB           EQU (0x3FFFF:SHL:0) ;- (CAN_MB) Complementary bits for identifier in extended mode
+AT91C_CAN_MIDvA           EQU (0x7FF:SHL:18) ;- (CAN_MB) Identifier for standard frame mode
+AT91C_CAN_MIDE            EQU (0x1:SHL:29) ;- (CAN_MB) Identifier Version
+;- -------- CAN_MID : (CAN_MB Offset: 0x8) CAN Message ID Register -------- 
+;- -------- CAN_MFID : (CAN_MB Offset: 0xc) CAN Message Family ID Register -------- 
+;- -------- CAN_MSR : (CAN_MB Offset: 0x10) CAN Message Status Register -------- 
+AT91C_CAN_MTIMESTAMP      EQU (0xFFFF:SHL:0) ;- (CAN_MB) Timer Value
+AT91C_CAN_MDLC            EQU (0xF:SHL:16) ;- (CAN_MB) Mailbox Data Length Code
+AT91C_CAN_MRTR            EQU (0x1:SHL:20) ;- (CAN_MB) Mailbox Remote Transmission Request
+AT91C_CAN_MABT            EQU (0x1:SHL:22) ;- (CAN_MB) Mailbox Message Abort
+AT91C_CAN_MRDY            EQU (0x1:SHL:23) ;- (CAN_MB) Mailbox Ready
+AT91C_CAN_MMI             EQU (0x1:SHL:24) ;- (CAN_MB) Mailbox Message Ignored
+;- -------- CAN_MDL : (CAN_MB Offset: 0x14) CAN Message Data Low Register -------- 
+;- -------- CAN_MDH : (CAN_MB Offset: 0x18) CAN Message Data High Register -------- 
+;- -------- CAN_MCR : (CAN_MB Offset: 0x1c) CAN Message Control Register -------- 
+AT91C_CAN_MACR            EQU (0x1:SHL:22) ;- (CAN_MB) Abort Request for Mailbox
+AT91C_CAN_MTCR            EQU (0x1:SHL:23) ;- (CAN_MB) Mailbox Transfer Command
+
+;- *****************************************************************************
+;-              SOFTWARE API DEFINITION  FOR Control Area Network Interface
+;- *****************************************************************************
+                ^ 0 ;- AT91S_CAN
+CAN_MR          #  4 ;- Mode Register
+CAN_IER         #  4 ;- Interrupt Enable Register
+CAN_IDR         #  4 ;- Interrupt Disable Register
+CAN_IMR         #  4 ;- Interrupt Mask Register
+CAN_SR          #  4 ;- Status Register
+CAN_BR          #  4 ;- Baudrate Register
+CAN_TIM         #  4 ;- Timer Register
+CAN_TIMESTP     #  4 ;- Time Stamp Register
+CAN_ECR         #  4 ;- Error Counter Register
+CAN_TCR         #  4 ;- Transfer Command Register
+CAN_ACR         #  4 ;- Abort Command Register
+                # 208 ;- Reserved
+CAN_VR          #  4 ;- Version Register
+                # 256 ;- Reserved
+CAN_MB0         # 32 ;- CAN Mailbox 0
+CAN_MB1         # 32 ;- CAN Mailbox 1
+CAN_MB2         # 32 ;- CAN Mailbox 2
+CAN_MB3         # 32 ;- CAN Mailbox 3
+CAN_MB4         # 32 ;- CAN Mailbox 4
+CAN_MB5         # 32 ;- CAN Mailbox 5
+CAN_MB6         # 32 ;- CAN Mailbox 6
+CAN_MB7         # 32 ;- CAN Mailbox 7
+CAN_MB8         # 32 ;- CAN Mailbox 8
+CAN_MB9         # 32 ;- CAN Mailbox 9
+CAN_MB10        # 32 ;- CAN Mailbox 10
+CAN_MB11        # 32 ;- CAN Mailbox 11
+CAN_MB12        # 32 ;- CAN Mailbox 12
+CAN_MB13        # 32 ;- CAN Mailbox 13
+CAN_MB14        # 32 ;- CAN Mailbox 14
+CAN_MB15        # 32 ;- CAN Mailbox 15
+;- -------- CAN_MR : (CAN Offset: 0x0) CAN Mode Register -------- 
+AT91C_CAN_CANEN           EQU (0x1:SHL:0) ;- (CAN) CAN Controller Enable
+AT91C_CAN_LPM             EQU (0x1:SHL:1) ;- (CAN) Disable/Enable Low Power Mode
+AT91C_CAN_ABM             EQU (0x1:SHL:2) ;- (CAN) Disable/Enable Autobaud/Listen Mode
+AT91C_CAN_OVL             EQU (0x1:SHL:3) ;- (CAN) Disable/Enable Overload Frame
+AT91C_CAN_TEOF            EQU (0x1:SHL:4) ;- (CAN) Time Stamp messages at each end of Frame
+AT91C_CAN_TTM             EQU (0x1:SHL:5) ;- (CAN) Disable/Enable Time Trigger Mode
+AT91C_CAN_TIMFRZ          EQU (0x1:SHL:6) ;- (CAN) Enable Timer Freeze
+AT91C_CAN_DRPT            EQU (0x1:SHL:7) ;- (CAN) Disable Repeat
+;- -------- CAN_IER : (CAN Offset: 0x4) CAN Interrupt Enable Register -------- 
+AT91C_CAN_MB0             EQU (0x1:SHL:0) ;- (CAN) Mailbox 0 Flag
+AT91C_CAN_MB1             EQU (0x1:SHL:1) ;- (CAN) Mailbox 1 Flag
+AT91C_CAN_MB2             EQU (0x1:SHL:2) ;- (CAN) Mailbox 2 Flag
+AT91C_CAN_MB3             EQU (0x1:SHL:3) ;- (CAN) Mailbox 3 Flag
+AT91C_CAN_MB4             EQU (0x1:SHL:4) ;- (CAN) Mailbox 4 Flag
+AT91C_CAN_MB5             EQU (0x1:SHL:5) ;- (CAN) Mailbox 5 Flag
+AT91C_CAN_MB6             EQU (0x1:SHL:6) ;- (CAN) Mailbox 6 Flag
+AT91C_CAN_MB7             EQU (0x1:SHL:7) ;- (CAN) Mailbox 7 Flag
+AT91C_CAN_MB8             EQU (0x1:SHL:8) ;- (CAN) Mailbox 8 Flag
+AT91C_CAN_MB9             EQU (0x1:SHL:9) ;- (CAN) Mailbox 9 Flag
+AT91C_CAN_MB10            EQU (0x1:SHL:10) ;- (CAN) Mailbox 10 Flag
+AT91C_CAN_MB11            EQU (0x1:SHL:11) ;- (CAN) Mailbox 11 Flag
+AT91C_CAN_MB12            EQU (0x1:SHL:12) ;- (CAN) Mailbox 12 Flag
+AT91C_CAN_MB13            EQU (0x1:SHL:13) ;- (CAN) Mailbox 13 Flag
+AT91C_CAN_MB14            EQU (0x1:SHL:14) ;- (CAN) Mailbox 14 Flag
+AT91C_CAN_MB15            EQU (0x1:SHL:15) ;- (CAN) Mailbox 15 Flag
+AT91C_CAN_ERRA            EQU (0x1:SHL:16) ;- (CAN) Error Active Mode Flag
+AT91C_CAN_WARN            EQU (0x1:SHL:17) ;- (CAN) Warning Limit Flag
+AT91C_CAN_ERRP            EQU (0x1:SHL:18) ;- (CAN) Error Passive Mode Flag
+AT91C_CAN_BOFF            EQU (0x1:SHL:19) ;- (CAN) Bus Off Mode Flag
+AT91C_CAN_SLEEP           EQU (0x1:SHL:20) ;- (CAN) Sleep Flag
+AT91C_CAN_WAKEUP          EQU (0x1:SHL:21) ;- (CAN) Wakeup Flag
+AT91C_CAN_TOVF            EQU (0x1:SHL:22) ;- (CAN) Timer Overflow Flag
+AT91C_CAN_TSTP            EQU (0x1:SHL:23) ;- (CAN) Timestamp Flag
+AT91C_CAN_CERR            EQU (0x1:SHL:24) ;- (CAN) CRC Error
+AT91C_CAN_SERR            EQU (0x1:SHL:25) ;- (CAN) Stuffing Error
+AT91C_CAN_AERR            EQU (0x1:SHL:26) ;- (CAN) Acknowledgment Error
+AT91C_CAN_FERR            EQU (0x1:SHL:27) ;- (CAN) Form Error
+AT91C_CAN_BERR            EQU (0x1:SHL:28) ;- (CAN) Bit Error
+;- -------- CAN_IDR : (CAN Offset: 0x8) CAN Interrupt Disable Register -------- 
+;- -------- CAN_IMR : (CAN Offset: 0xc) CAN Interrupt Mask Register -------- 
+;- -------- CAN_SR : (CAN Offset: 0x10) CAN Status Register -------- 
+AT91C_CAN_RBSY            EQU (0x1:SHL:29) ;- (CAN) Receiver Busy
+AT91C_CAN_TBSY            EQU (0x1:SHL:30) ;- (CAN) Transmitter Busy
+AT91C_CAN_OVLY            EQU (0x1:SHL:31) ;- (CAN) Overload Busy
+;- -------- CAN_BR : (CAN Offset: 0x14) CAN Baudrate Register -------- 
+AT91C_CAN_PHASE2          EQU (0x7:SHL:0) ;- (CAN) Phase 2 segment
+AT91C_CAN_PHASE1          EQU (0x7:SHL:4) ;- (CAN) Phase 1 segment
+AT91C_CAN_PROPAG          EQU (0x7:SHL:8) ;- (CAN) Programmation time segment
+AT91C_CAN_SYNC            EQU (0x3:SHL:12) ;- (CAN) Re-synchronization jump width segment
+AT91C_CAN_BRP             EQU (0x7F:SHL:16) ;- (CAN) Baudrate Prescaler
+AT91C_CAN_SMP             EQU (0x1:SHL:24) ;- (CAN) Sampling mode
+;- -------- CAN_TIM : (CAN Offset: 0x18) CAN Timer Register -------- 
+AT91C_CAN_TIMER           EQU (0xFFFF:SHL:0) ;- (CAN) Timer field
+;- -------- CAN_TIMESTP : (CAN Offset: 0x1c) CAN Timestamp Register -------- 
+;- -------- CAN_ECR : (CAN Offset: 0x20) CAN Error Counter Register -------- 
+AT91C_CAN_REC             EQU (0xFF:SHL:0) ;- (CAN) Receive Error Counter
+AT91C_CAN_TEC             EQU (0xFF:SHL:16) ;- (CAN) Transmit Error Counter
+;- -------- CAN_TCR : (CAN Offset: 0x24) CAN Transfer Command Register -------- 
+AT91C_CAN_TIMRST          EQU (0x1:SHL:31) ;- (CAN) Timer Reset Field
+;- -------- CAN_ACR : (CAN Offset: 0x28) CAN Abort Command Register -------- 
+
+;- *****************************************************************************
+;-              SOFTWARE API DEFINITION  FOR Ethernet MAC 10/100
+;- *****************************************************************************
+                ^ 0 ;- AT91S_EMAC
+EMAC_NCR        #  4 ;- Network Control Register
+EMAC_NCFGR      #  4 ;- Network Configuration Register
+EMAC_NSR        #  4 ;- Network Status Register
+                #  8 ;- Reserved
+EMAC_TSR        #  4 ;- Transmit Status Register
+EMAC_RBQP       #  4 ;- Receive Buffer Queue Pointer
+EMAC_TBQP       #  4 ;- Transmit Buffer Queue Pointer
+EMAC_RSR        #  4 ;- Receive Status Register
+EMAC_ISR        #  4 ;- Interrupt Status Register
+EMAC_IER        #  4 ;- Interrupt Enable Register
+EMAC_IDR        #  4 ;- Interrupt Disable Register
+EMAC_IMR        #  4 ;- Interrupt Mask Register
+EMAC_MAN        #  4 ;- PHY Maintenance Register
+EMAC_PTR        #  4 ;- Pause Time Register
+EMAC_PFR        #  4 ;- Pause Frames received Register
+EMAC_FTO        #  4 ;- Frames Transmitted OK Register
+EMAC_SCF        #  4 ;- Single Collision Frame Register
+EMAC_MCF        #  4 ;- Multiple Collision Frame Register
+EMAC_FRO        #  4 ;- Frames Received OK Register
+EMAC_FCSE       #  4 ;- Frame Check Sequence Error Register
+EMAC_ALE        #  4 ;- Alignment Error Register
+EMAC_DTF        #  4 ;- Deferred Transmission Frame Register
+EMAC_LCOL       #  4 ;- Late Collision Register
+EMAC_ECOL       #  4 ;- Excessive Collision Register
+EMAC_TUND       #  4 ;- Transmit Underrun Error Register
+EMAC_CSE        #  4 ;- Carrier Sense Error Register
+EMAC_RRE        #  4 ;- Receive Ressource Error Register
+EMAC_ROV        #  4 ;- Receive Overrun Errors Register
+EMAC_RSE        #  4 ;- Receive Symbol Errors Register
+EMAC_ELE        #  4 ;- Excessive Length Errors Register
+EMAC_RJA        #  4 ;- Receive Jabbers Register
+EMAC_USF        #  4 ;- Undersize Frames Register
+EMAC_STE        #  4 ;- SQE Test Error Register
+EMAC_RLE        #  4 ;- Receive Length Field Mismatch Register
+EMAC_TPF        #  4 ;- Transmitted Pause Frames Register
+EMAC_HRB        #  4 ;- Hash Address Bottom[31:0]
+EMAC_HRT        #  4 ;- Hash Address Top[63:32]
+EMAC_SA1L       #  4 ;- Specific Address 1 Bottom, First 4 bytes
+EMAC_SA1H       #  4 ;- Specific Address 1 Top, Last 2 bytes
+EMAC_SA2L       #  4 ;- Specific Address 2 Bottom, First 4 bytes
+EMAC_SA2H       #  4 ;- Specific Address 2 Top, Last 2 bytes
+EMAC_SA3L       #  4 ;- Specific Address 3 Bottom, First 4 bytes
+EMAC_SA3H       #  4 ;- Specific Address 3 Top, Last 2 bytes
+EMAC_SA4L       #  4 ;- Specific Address 4 Bottom, First 4 bytes
+EMAC_SA4H       #  4 ;- Specific Address 4 Top, Last 2 bytes
+EMAC_TID        #  4 ;- Type ID Checking Register
+EMAC_TPQ        #  4 ;- Transmit Pause Quantum Register
+EMAC_USRIO      #  4 ;- USER Input/Output Register
+EMAC_WOL        #  4 ;- Wake On LAN Register
+                # 52 ;- Reserved
+EMAC_REV        #  4 ;- Revision Register
+;- -------- EMAC_NCR : (EMAC Offset: 0x0)  -------- 
+AT91C_EMAC_LB             EQU (0x1:SHL:0) ;- (EMAC) Loopback. Optional. When set, loopback signal is at high level.
+AT91C_EMAC_LLB            EQU (0x1:SHL:1) ;- (EMAC) Loopback local. 
+AT91C_EMAC_RE             EQU (0x1:SHL:2) ;- (EMAC) Receive enable. 
+AT91C_EMAC_TE             EQU (0x1:SHL:3) ;- (EMAC) Transmit enable. 
+AT91C_EMAC_MPE            EQU (0x1:SHL:4) ;- (EMAC) Management port enable. 
+AT91C_EMAC_CLRSTAT        EQU (0x1:SHL:5) ;- (EMAC) Clear statistics registers. 
+AT91C_EMAC_INCSTAT        EQU (0x1:SHL:6) ;- (EMAC) Increment statistics registers. 
+AT91C_EMAC_WESTAT         EQU (0x1:SHL:7) ;- (EMAC) Write enable for statistics registers. 
+AT91C_EMAC_BP             EQU (0x1:SHL:8) ;- (EMAC) Back pressure. 
+AT91C_EMAC_TSTART         EQU (0x1:SHL:9) ;- (EMAC) Start Transmission. 
+AT91C_EMAC_THALT          EQU (0x1:SHL:10) ;- (EMAC) Transmission Halt. 
+AT91C_EMAC_TPFR           EQU (0x1:SHL:11) ;- (EMAC) Transmit pause frame 
+AT91C_EMAC_TZQ            EQU (0x1:SHL:12) ;- (EMAC) Transmit zero quantum pause frame
+;- -------- EMAC_NCFGR : (EMAC Offset: 0x4) Network Configuration Register -------- 
+AT91C_EMAC_SPD            EQU (0x1:SHL:0) ;- (EMAC) Speed. 
+AT91C_EMAC_FD             EQU (0x1:SHL:1) ;- (EMAC) Full duplex. 
+AT91C_EMAC_JFRAME         EQU (0x1:SHL:3) ;- (EMAC) Jumbo Frames. 
+AT91C_EMAC_CAF            EQU (0x1:SHL:4) ;- (EMAC) Copy all frames. 
+AT91C_EMAC_NBC            EQU (0x1:SHL:5) ;- (EMAC) No broadcast. 
+AT91C_EMAC_MTI            EQU (0x1:SHL:6) ;- (EMAC) Multicast hash event enable
+AT91C_EMAC_UNI            EQU (0x1:SHL:7) ;- (EMAC) Unicast hash enable. 
+AT91C_EMAC_BIG            EQU (0x1:SHL:8) ;- (EMAC) Receive 1522 bytes. 
+AT91C_EMAC_EAE            EQU (0x1:SHL:9) ;- (EMAC) External address match enable. 
+AT91C_EMAC_CLK            EQU (0x3:SHL:10) ;- (EMAC) 
+AT91C_EMAC_CLK_HCLK_8     EQU (0x0:SHL:10) ;- (EMAC) HCLK divided by 8
+AT91C_EMAC_CLK_HCLK_16    EQU (0x1:SHL:10) ;- (EMAC) HCLK divided by 16
+AT91C_EMAC_CLK_HCLK_32    EQU (0x2:SHL:10) ;- (EMAC) HCLK divided by 32
+AT91C_EMAC_CLK_HCLK_64    EQU (0x3:SHL:10) ;- (EMAC) HCLK divided by 64
+AT91C_EMAC_RTY            EQU (0x1:SHL:12) ;- (EMAC) 
+AT91C_EMAC_PAE            EQU (0x1:SHL:13) ;- (EMAC) 
+AT91C_EMAC_RBOF           EQU (0x3:SHL:14) ;- (EMAC) 
+AT91C_EMAC_RBOF_OFFSET_0  EQU (0x0:SHL:14) ;- (EMAC) no offset from start of receive buffer
+AT91C_EMAC_RBOF_OFFSET_1  EQU (0x1:SHL:14) ;- (EMAC) one byte offset from start of receive buffer
+AT91C_EMAC_RBOF_OFFSET_2  EQU (0x2:SHL:14) ;- (EMAC) two bytes offset from start of receive buffer
+AT91C_EMAC_RBOF_OFFSET_3  EQU (0x3:SHL:14) ;- (EMAC) three bytes offset from start of receive buffer
+AT91C_EMAC_RLCE           EQU (0x1:SHL:16) ;- (EMAC) Receive Length field Checking Enable
+AT91C_EMAC_DRFCS          EQU (0x1:SHL:17) ;- (EMAC) Discard Receive FCS
+AT91C_EMAC_EFRHD          EQU (0x1:SHL:18) ;- (EMAC) 
+AT91C_EMAC_IRXFCS         EQU (0x1:SHL:19) ;- (EMAC) Ignore RX FCS
+;- -------- EMAC_NSR : (EMAC Offset: 0x8) Network Status Register -------- 
+AT91C_EMAC_LINKR          EQU (0x1:SHL:0) ;- (EMAC) 
+AT91C_EMAC_MDIO           EQU (0x1:SHL:1) ;- (EMAC) 
+AT91C_EMAC_IDLE           EQU (0x1:SHL:2) ;- (EMAC) 
+;- -------- EMAC_TSR : (EMAC Offset: 0x14) Transmit Status Register -------- 
+AT91C_EMAC_UBR            EQU (0x1:SHL:0) ;- (EMAC) 
+AT91C_EMAC_COL            EQU (0x1:SHL:1) ;- (EMAC) 
+AT91C_EMAC_RLES           EQU (0x1:SHL:2) ;- (EMAC) 
+AT91C_EMAC_TGO            EQU (0x1:SHL:3) ;- (EMAC) Transmit Go
+AT91C_EMAC_BEX            EQU (0x1:SHL:4) ;- (EMAC) Buffers exhausted mid frame
+AT91C_EMAC_COMP           EQU (0x1:SHL:5) ;- (EMAC) 
+AT91C_EMAC_UND            EQU (0x1:SHL:6) ;- (EMAC) 
+;- -------- EMAC_RSR : (EMAC Offset: 0x20) Receive Status Register -------- 
+AT91C_EMAC_BNA            EQU (0x1:SHL:0) ;- (EMAC) 
+AT91C_EMAC_REC            EQU (0x1:SHL:1) ;- (EMAC) 
+AT91C_EMAC_OVR            EQU (0x1:SHL:2) ;- (EMAC) 
+;- -------- EMAC_ISR : (EMAC Offset: 0x24) Interrupt Status Register -------- 
+AT91C_EMAC_MFD            EQU (0x1:SHL:0) ;- (EMAC) 
+AT91C_EMAC_RCOMP          EQU (0x1:SHL:1) ;- (EMAC) 
+AT91C_EMAC_RXUBR          EQU (0x1:SHL:2) ;- (EMAC) 
+AT91C_EMAC_TXUBR          EQU (0x1:SHL:3) ;- (EMAC) 
+AT91C_EMAC_TUNDR          EQU (0x1:SHL:4) ;- (EMAC) 
+AT91C_EMAC_RLEX           EQU (0x1:SHL:5) ;- (EMAC) 
+AT91C_EMAC_TXERR          EQU (0x1:SHL:6) ;- (EMAC) 
+AT91C_EMAC_TCOMP          EQU (0x1:SHL:7) ;- (EMAC) 
+AT91C_EMAC_LINK           EQU (0x1:SHL:9) ;- (EMAC) 
+AT91C_EMAC_ROVR           EQU (0x1:SHL:10) ;- (EMAC) 
+AT91C_EMAC_HRESP          EQU (0x1:SHL:11) ;- (EMAC) 
+AT91C_EMAC_PFRE           EQU (0x1:SHL:12) ;- (EMAC) 
+AT91C_EMAC_PTZ            EQU (0x1:SHL:13) ;- (EMAC) 
+;- -------- EMAC_IER : (EMAC Offset: 0x28) Interrupt Enable Register -------- 
+;- -------- EMAC_IDR : (EMAC Offset: 0x2c) Interrupt Disable Register -------- 
+;- -------- EMAC_IMR : (EMAC Offset: 0x30) Interrupt Mask Register -------- 
+;- -------- EMAC_MAN : (EMAC Offset: 0x34) PHY Maintenance Register -------- 
+AT91C_EMAC_DATA           EQU (0xFFFF:SHL:0) ;- (EMAC) 
+AT91C_EMAC_CODE           EQU (0x3:SHL:16) ;- (EMAC) 
+AT91C_EMAC_REGA           EQU (0x1F:SHL:18) ;- (EMAC) 
+AT91C_EMAC_PHYA           EQU (0x1F:SHL:23) ;- (EMAC) 
+AT91C_EMAC_RW             EQU (0x3:SHL:28) ;- (EMAC) 
+AT91C_EMAC_SOF            EQU (0x3:SHL:30) ;- (EMAC) 
+;- -------- EMAC_USRIO : (EMAC Offset: 0xc0) USER Input Output Register -------- 
+AT91C_EMAC_RMII           EQU (0x1:SHL:0) ;- (EMAC) Reduce MII
+AT91C_EMAC_CLKEN          EQU (0x1:SHL:1) ;- (EMAC) Clock Enable
+;- -------- EMAC_WOL : (EMAC Offset: 0xc4) Wake On LAN Register -------- 
+AT91C_EMAC_IP             EQU (0xFFFF:SHL:0) ;- (EMAC) ARP request IP address
+AT91C_EMAC_MAG            EQU (0x1:SHL:16) ;- (EMAC) Magic packet event enable
+AT91C_EMAC_ARP            EQU (0x1:SHL:17) ;- (EMAC) ARP request event enable
+AT91C_EMAC_SA1            EQU (0x1:SHL:18) ;- (EMAC) Specific address register 1 event enable
+;- -------- EMAC_REV : (EMAC Offset: 0xfc) Revision Register -------- 
+AT91C_EMAC_REVREF         EQU (0xFFFF:SHL:0) ;- (EMAC) 
+AT91C_EMAC_PARTREF        EQU (0xFFFF:SHL:16) ;- (EMAC) 
+
+;- *****************************************************************************
+;-              SOFTWARE API DEFINITION  FOR Analog to Digital Convertor
+;- *****************************************************************************
+                ^ 0 ;- AT91S_ADC
+ADC_CR          #  4 ;- ADC Control Register
+ADC_MR          #  4 ;- ADC Mode Register
+                #  8 ;- Reserved
+ADC_CHER        #  4 ;- ADC Channel Enable Register
+ADC_CHDR        #  4 ;- ADC Channel Disable Register
+ADC_CHSR        #  4 ;- ADC Channel Status Register
+ADC_SR          #  4 ;- ADC Status Register
+ADC_LCDR        #  4 ;- ADC Last Converted Data Register
+ADC_IER         #  4 ;- ADC Interrupt Enable Register
+ADC_IDR         #  4 ;- ADC Interrupt Disable Register
+ADC_IMR         #  4 ;- ADC Interrupt Mask Register
+ADC_CDR0        #  4 ;- ADC Channel Data Register 0
+ADC_CDR1        #  4 ;- ADC Channel Data Register 1
+ADC_CDR2        #  4 ;- ADC Channel Data Register 2
+ADC_CDR3        #  4 ;- ADC Channel Data Register 3
+ADC_CDR4        #  4 ;- ADC Channel Data Register 4
+ADC_CDR5        #  4 ;- ADC Channel Data Register 5
+ADC_CDR6        #  4 ;- ADC Channel Data Register 6
+ADC_CDR7        #  4 ;- ADC Channel Data Register 7
+                # 176 ;- Reserved
+ADC_RPR         #  4 ;- Receive Pointer Register
+ADC_RCR         #  4 ;- Receive Counter Register
+ADC_TPR         #  4 ;- Transmit Pointer Register
+ADC_TCR         #  4 ;- Transmit Counter Register
+ADC_RNPR        #  4 ;- Receive Next Pointer Register
+ADC_RNCR        #  4 ;- Receive Next Counter Register
+ADC_TNPR        #  4 ;- Transmit Next Pointer Register
+ADC_TNCR        #  4 ;- Transmit Next Counter Register
+ADC_PTCR        #  4 ;- PDC Transfer Control Register
+ADC_PTSR        #  4 ;- PDC Transfer Status Register
+;- -------- ADC_CR : (ADC Offset: 0x0) ADC Control Register -------- 
+AT91C_ADC_SWRST           EQU (0x1:SHL:0) ;- (ADC) Software Reset
+AT91C_ADC_START           EQU (0x1:SHL:1) ;- (ADC) Start Conversion
+;- -------- ADC_MR : (ADC Offset: 0x4) ADC Mode Register -------- 
+AT91C_ADC_TRGEN           EQU (0x1:SHL:0) ;- (ADC) Trigger Enable
+AT91C_ADC_TRGEN_DIS       EQU (0x0) ;- (ADC) Hradware triggers are disabled. Starting a conversion is only possible by software
+AT91C_ADC_TRGEN_EN        EQU (0x1) ;- (ADC) Hardware trigger selected by TRGSEL field is enabled.
+AT91C_ADC_TRGSEL          EQU (0x7:SHL:1) ;- (ADC) Trigger Selection
+AT91C_ADC_TRGSEL_TIOA0    EQU (0x0:SHL:1) ;- (ADC) Selected TRGSEL = TIAO0
+AT91C_ADC_TRGSEL_TIOA1    EQU (0x1:SHL:1) ;- (ADC) Selected TRGSEL = TIAO1
+AT91C_ADC_TRGSEL_TIOA2    EQU (0x2:SHL:1) ;- (ADC) Selected TRGSEL = TIAO2
+AT91C_ADC_TRGSEL_TIOA3    EQU (0x3:SHL:1) ;- (ADC) Selected TRGSEL = TIAO3
+AT91C_ADC_TRGSEL_TIOA4    EQU (0x4:SHL:1) ;- (ADC) Selected TRGSEL = TIAO4
+AT91C_ADC_TRGSEL_TIOA5    EQU (0x5:SHL:1) ;- (ADC) Selected TRGSEL = TIAO5
+AT91C_ADC_TRGSEL_EXT      EQU (0x6:SHL:1) ;- (ADC) Selected TRGSEL = External Trigger
+AT91C_ADC_LOWRES          EQU (0x1:SHL:4) ;- (ADC) Resolution.
+AT91C_ADC_LOWRES_10_BIT   EQU (0x0:SHL:4) ;- (ADC) 10-bit resolution
+AT91C_ADC_LOWRES_8_BIT    EQU (0x1:SHL:4) ;- (ADC) 8-bit resolution
+AT91C_ADC_SLEEP           EQU (0x1:SHL:5) ;- (ADC) Sleep Mode
+AT91C_ADC_SLEEP_NORMAL_MODE EQU (0x0:SHL:5) ;- (ADC) Normal Mode
+AT91C_ADC_SLEEP_MODE      EQU (0x1:SHL:5) ;- (ADC) Sleep Mode
+AT91C_ADC_PRESCAL         EQU (0x3F:SHL:8) ;- (ADC) Prescaler rate selection
+AT91C_ADC_STARTUP         EQU (0x1F:SHL:16) ;- (ADC) Startup Time
+AT91C_ADC_SHTIM           EQU (0xF:SHL:24) ;- (ADC) Sample & Hold Time
+;- -------- 	ADC_CHER : (ADC Offset: 0x10) ADC Channel Enable Register -------- 
+AT91C_ADC_CH0             EQU (0x1:SHL:0) ;- (ADC) Channel 0
+AT91C_ADC_CH1             EQU (0x1:SHL:1) ;- (ADC) Channel 1
+AT91C_ADC_CH2             EQU (0x1:SHL:2) ;- (ADC) Channel 2
+AT91C_ADC_CH3             EQU (0x1:SHL:3) ;- (ADC) Channel 3
+AT91C_ADC_CH4             EQU (0x1:SHL:4) ;- (ADC) Channel 4
+AT91C_ADC_CH5             EQU (0x1:SHL:5) ;- (ADC) Channel 5
+AT91C_ADC_CH6             EQU (0x1:SHL:6) ;- (ADC) Channel 6
+AT91C_ADC_CH7             EQU (0x1:SHL:7) ;- (ADC) Channel 7
+;- -------- 	ADC_CHDR : (ADC Offset: 0x14) ADC Channel Disable Register -------- 
+;- -------- 	ADC_CHSR : (ADC Offset: 0x18) ADC Channel Status Register -------- 
+;- -------- ADC_SR : (ADC Offset: 0x1c) ADC Status Register -------- 
+AT91C_ADC_EOC0            EQU (0x1:SHL:0) ;- (ADC) End of Conversion
+AT91C_ADC_EOC1            EQU (0x1:SHL:1) ;- (ADC) End of Conversion
+AT91C_ADC_EOC2            EQU (0x1:SHL:2) ;- (ADC) End of Conversion
+AT91C_ADC_EOC3            EQU (0x1:SHL:3) ;- (ADC) End of Conversion
+AT91C_ADC_EOC4            EQU (0x1:SHL:4) ;- (ADC) End of Conversion
+AT91C_ADC_EOC5            EQU (0x1:SHL:5) ;- (ADC) End of Conversion
+AT91C_ADC_EOC6            EQU (0x1:SHL:6) ;- (ADC) End of Conversion
+AT91C_ADC_EOC7            EQU (0x1:SHL:7) ;- (ADC) End of Conversion
+AT91C_ADC_OVRE0           EQU (0x1:SHL:8) ;- (ADC) Overrun Error
+AT91C_ADC_OVRE1           EQU (0x1:SHL:9) ;- (ADC) Overrun Error
+AT91C_ADC_OVRE2           EQU (0x1:SHL:10) ;- (ADC) Overrun Error
+AT91C_ADC_OVRE3           EQU (0x1:SHL:11) ;- (ADC) Overrun Error
+AT91C_ADC_OVRE4           EQU (0x1:SHL:12) ;- (ADC) Overrun Error
+AT91C_ADC_OVRE5           EQU (0x1:SHL:13) ;- (ADC) Overrun Error
+AT91C_ADC_OVRE6           EQU (0x1:SHL:14) ;- (ADC) Overrun Error
+AT91C_ADC_OVRE7           EQU (0x1:SHL:15) ;- (ADC) Overrun Error
+AT91C_ADC_DRDY            EQU (0x1:SHL:16) ;- (ADC) Data Ready
+AT91C_ADC_GOVRE           EQU (0x1:SHL:17) ;- (ADC) General Overrun
+AT91C_ADC_ENDRX           EQU (0x1:SHL:18) ;- (ADC) End of Receiver Transfer
+AT91C_ADC_RXBUFF          EQU (0x1:SHL:19) ;- (ADC) RXBUFF Interrupt
+;- -------- ADC_LCDR : (ADC Offset: 0x20) ADC Last Converted Data Register -------- 
+AT91C_ADC_LDATA           EQU (0x3FF:SHL:0) ;- (ADC) Last Data Converted
+;- -------- ADC_IER : (ADC Offset: 0x24) ADC Interrupt Enable Register -------- 
+;- -------- ADC_IDR : (ADC Offset: 0x28) ADC Interrupt Disable Register -------- 
+;- -------- ADC_IMR : (ADC Offset: 0x2c) ADC Interrupt Mask Register -------- 
+;- -------- ADC_CDR0 : (ADC Offset: 0x30) ADC Channel Data Register 0 -------- 
+AT91C_ADC_DATA            EQU (0x3FF:SHL:0) ;- (ADC) Converted Data
+;- -------- ADC_CDR1 : (ADC Offset: 0x34) ADC Channel Data Register 1 -------- 
+;- -------- ADC_CDR2 : (ADC Offset: 0x38) ADC Channel Data Register 2 -------- 
+;- -------- ADC_CDR3 : (ADC Offset: 0x3c) ADC Channel Data Register 3 -------- 
+;- -------- ADC_CDR4 : (ADC Offset: 0x40) ADC Channel Data Register 4 -------- 
+;- -------- ADC_CDR5 : (ADC Offset: 0x44) ADC Channel Data Register 5 -------- 
+;- -------- ADC_CDR6 : (ADC Offset: 0x48) ADC Channel Data Register 6 -------- 
+;- -------- ADC_CDR7 : (ADC Offset: 0x4c) ADC Channel Data Register 7 -------- 
+
+;- *****************************************************************************
+;-               REGISTER ADDRESS DEFINITION FOR AT91SAM7X256
+;- *****************************************************************************
+;- ========== Register definition for SYS peripheral ========== 
+;- ========== Register definition for AIC peripheral ========== 
+AT91C_AIC_IVR             EQU (0xFFFFF100) ;- (AIC) IRQ Vector Register
+AT91C_AIC_SMR             EQU (0xFFFFF000) ;- (AIC) Source Mode Register
+AT91C_AIC_FVR             EQU (0xFFFFF104) ;- (AIC) FIQ Vector Register
+AT91C_AIC_DCR             EQU (0xFFFFF138) ;- (AIC) Debug Control Register (Protect)
+AT91C_AIC_EOICR           EQU (0xFFFFF130) ;- (AIC) End of Interrupt Command Register
+AT91C_AIC_SVR             EQU (0xFFFFF080) ;- (AIC) Source Vector Register
+AT91C_AIC_FFSR            EQU (0xFFFFF148) ;- (AIC) Fast Forcing Status Register
+AT91C_AIC_ICCR            EQU (0xFFFFF128) ;- (AIC) Interrupt Clear Command Register
+AT91C_AIC_ISR             EQU (0xFFFFF108) ;- (AIC) Interrupt Status Register
+AT91C_AIC_IMR             EQU (0xFFFFF110) ;- (AIC) Interrupt Mask Register
+AT91C_AIC_IPR             EQU (0xFFFFF10C) ;- (AIC) Interrupt Pending Register
+AT91C_AIC_FFER            EQU (0xFFFFF140) ;- (AIC) Fast Forcing Enable Register
+AT91C_AIC_IECR            EQU (0xFFFFF120) ;- (AIC) Interrupt Enable Command Register
+AT91C_AIC_ISCR            EQU (0xFFFFF12C) ;- (AIC) Interrupt Set Command Register
+AT91C_AIC_FFDR            EQU (0xFFFFF144) ;- (AIC) Fast Forcing Disable Register
+AT91C_AIC_CISR            EQU (0xFFFFF114) ;- (AIC) Core Interrupt Status Register
+AT91C_AIC_IDCR            EQU (0xFFFFF124) ;- (AIC) Interrupt Disable Command Register
+AT91C_AIC_SPU             EQU (0xFFFFF134) ;- (AIC) Spurious Vector Register
+;- ========== Register definition for PDC_DBGU peripheral ========== 
+AT91C_DBGU_TCR            EQU (0xFFFFF30C) ;- (PDC_DBGU) Transmit Counter Register
+AT91C_DBGU_RNPR           EQU (0xFFFFF310) ;- (PDC_DBGU) Receive Next Pointer Register
+AT91C_DBGU_TNPR           EQU (0xFFFFF318) ;- (PDC_DBGU) Transmit Next Pointer Register
+AT91C_DBGU_TPR            EQU (0xFFFFF308) ;- (PDC_DBGU) Transmit Pointer Register
+AT91C_DBGU_RPR            EQU (0xFFFFF300) ;- (PDC_DBGU) Receive Pointer Register
+AT91C_DBGU_RCR            EQU (0xFFFFF304) ;- (PDC_DBGU) Receive Counter Register
+AT91C_DBGU_RNCR           EQU (0xFFFFF314) ;- (PDC_DBGU) Receive Next Counter Register
+AT91C_DBGU_PTCR           EQU (0xFFFFF320) ;- (PDC_DBGU) PDC Transfer Control Register
+AT91C_DBGU_PTSR           EQU (0xFFFFF324) ;- (PDC_DBGU) PDC Transfer Status Register
+AT91C_DBGU_TNCR           EQU (0xFFFFF31C) ;- (PDC_DBGU) Transmit Next Counter Register
+;- ========== Register definition for DBGU peripheral ========== 
+AT91C_DBGU_EXID           EQU (0xFFFFF244) ;- (DBGU) Chip ID Extension Register
+AT91C_DBGU_BRGR           EQU (0xFFFFF220) ;- (DBGU) Baud Rate Generator Register
+AT91C_DBGU_IDR            EQU (0xFFFFF20C) ;- (DBGU) Interrupt Disable Register
+AT91C_DBGU_CSR            EQU (0xFFFFF214) ;- (DBGU) Channel Status Register
+AT91C_DBGU_CIDR           EQU (0xFFFFF240) ;- (DBGU) Chip ID Register
+AT91C_DBGU_MR             EQU (0xFFFFF204) ;- (DBGU) Mode Register
+AT91C_DBGU_IMR            EQU (0xFFFFF210) ;- (DBGU) Interrupt Mask Register
+AT91C_DBGU_CR             EQU (0xFFFFF200) ;- (DBGU) Control Register
+AT91C_DBGU_FNTR           EQU (0xFFFFF248) ;- (DBGU) Force NTRST Register
+AT91C_DBGU_THR            EQU (0xFFFFF21C) ;- (DBGU) Transmitter Holding Register
+AT91C_DBGU_RHR            EQU (0xFFFFF218) ;- (DBGU) Receiver Holding Register
+AT91C_DBGU_IER            EQU (0xFFFFF208) ;- (DBGU) Interrupt Enable Register
+;- ========== Register definition for PIOA peripheral ========== 
+AT91C_PIOA_ODR            EQU (0xFFFFF414) ;- (PIOA) Output Disable Registerr
+AT91C_PIOA_SODR           EQU (0xFFFFF430) ;- (PIOA) Set Output Data Register
+AT91C_PIOA_ISR            EQU (0xFFFFF44C) ;- (PIOA) Interrupt Status Register
+AT91C_PIOA_ABSR           EQU (0xFFFFF478) ;- (PIOA) AB Select Status Register
+AT91C_PIOA_IER            EQU (0xFFFFF440) ;- (PIOA) Interrupt Enable Register
+AT91C_PIOA_PPUDR          EQU (0xFFFFF460) ;- (PIOA) Pull-up Disable Register
+AT91C_PIOA_IMR            EQU (0xFFFFF448) ;- (PIOA) Interrupt Mask Register
+AT91C_PIOA_PER            EQU (0xFFFFF400) ;- (PIOA) PIO Enable Register
+AT91C_PIOA_IFDR           EQU (0xFFFFF424) ;- (PIOA) Input Filter Disable Register
+AT91C_PIOA_OWDR           EQU (0xFFFFF4A4) ;- (PIOA) Output Write Disable Register
+AT91C_PIOA_MDSR           EQU (0xFFFFF458) ;- (PIOA) Multi-driver Status Register
+AT91C_PIOA_IDR            EQU (0xFFFFF444) ;- (PIOA) Interrupt Disable Register
+AT91C_PIOA_ODSR           EQU (0xFFFFF438) ;- (PIOA) Output Data Status Register
+AT91C_PIOA_PPUSR          EQU (0xFFFFF468) ;- (PIOA) Pull-up Status Register
+AT91C_PIOA_OWSR           EQU (0xFFFFF4A8) ;- (PIOA) Output Write Status Register
+AT91C_PIOA_BSR            EQU (0xFFFFF474) ;- (PIOA) Select B Register
+AT91C_PIOA_OWER           EQU (0xFFFFF4A0) ;- (PIOA) Output Write Enable Register
+AT91C_PIOA_IFER           EQU (0xFFFFF420) ;- (PIOA) Input Filter Enable Register
+AT91C_PIOA_PDSR           EQU (0xFFFFF43C) ;- (PIOA) Pin Data Status Register
+AT91C_PIOA_PPUER          EQU (0xFFFFF464) ;- (PIOA) Pull-up Enable Register
+AT91C_PIOA_OSR            EQU (0xFFFFF418) ;- (PIOA) Output Status Register
+AT91C_PIOA_ASR            EQU (0xFFFFF470) ;- (PIOA) Select A Register
+AT91C_PIOA_MDDR           EQU (0xFFFFF454) ;- (PIOA) Multi-driver Disable Register
+AT91C_PIOA_CODR           EQU (0xFFFFF434) ;- (PIOA) Clear Output Data Register
+AT91C_PIOA_MDER           EQU (0xFFFFF450) ;- (PIOA) Multi-driver Enable Register
+AT91C_PIOA_PDR            EQU (0xFFFFF404) ;- (PIOA) PIO Disable Register
+AT91C_PIOA_IFSR           EQU (0xFFFFF428) ;- (PIOA) Input Filter Status Register
+AT91C_PIOA_OER            EQU (0xFFFFF410) ;- (PIOA) Output Enable Register
+AT91C_PIOA_PSR            EQU (0xFFFFF408) ;- (PIOA) PIO Status Register
+;- ========== Register definition for PIOB peripheral ========== 
+AT91C_PIOB_OWDR           EQU (0xFFFFF6A4) ;- (PIOB) Output Write Disable Register
+AT91C_PIOB_MDER           EQU (0xFFFFF650) ;- (PIOB) Multi-driver Enable Register
+AT91C_PIOB_PPUSR          EQU (0xFFFFF668) ;- (PIOB) Pull-up Status Register
+AT91C_PIOB_IMR            EQU (0xFFFFF648) ;- (PIOB) Interrupt Mask Register
+AT91C_PIOB_ASR            EQU (0xFFFFF670) ;- (PIOB) Select A Register
+AT91C_PIOB_PPUDR          EQU (0xFFFFF660) ;- (PIOB) Pull-up Disable Register
+AT91C_PIOB_PSR            EQU (0xFFFFF608) ;- (PIOB) PIO Status Register
+AT91C_PIOB_IER            EQU (0xFFFFF640) ;- (PIOB) Interrupt Enable Register
+AT91C_PIOB_CODR           EQU (0xFFFFF634) ;- (PIOB) Clear Output Data Register
+AT91C_PIOB_OWER           EQU (0xFFFFF6A0) ;- (PIOB) Output Write Enable Register
+AT91C_PIOB_ABSR           EQU (0xFFFFF678) ;- (PIOB) AB Select Status Register
+AT91C_PIOB_IFDR           EQU (0xFFFFF624) ;- (PIOB) Input Filter Disable Register
+AT91C_PIOB_PDSR           EQU (0xFFFFF63C) ;- (PIOB) Pin Data Status Register
+AT91C_PIOB_IDR            EQU (0xFFFFF644) ;- (PIOB) Interrupt Disable Register
+AT91C_PIOB_OWSR           EQU (0xFFFFF6A8) ;- (PIOB) Output Write Status Register
+AT91C_PIOB_PDR            EQU (0xFFFFF604) ;- (PIOB) PIO Disable Register
+AT91C_PIOB_ODR            EQU (0xFFFFF614) ;- (PIOB) Output Disable Registerr
+AT91C_PIOB_IFSR           EQU (0xFFFFF628) ;- (PIOB) Input Filter Status Register
+AT91C_PIOB_PPUER          EQU (0xFFFFF664) ;- (PIOB) Pull-up Enable Register
+AT91C_PIOB_SODR           EQU (0xFFFFF630) ;- (PIOB) Set Output Data Register
+AT91C_PIOB_ISR            EQU (0xFFFFF64C) ;- (PIOB) Interrupt Status Register
+AT91C_PIOB_ODSR           EQU (0xFFFFF638) ;- (PIOB) Output Data Status Register
+AT91C_PIOB_OSR            EQU (0xFFFFF618) ;- (PIOB) Output Status Register
+AT91C_PIOB_MDSR           EQU (0xFFFFF658) ;- (PIOB) Multi-driver Status Register
+AT91C_PIOB_IFER           EQU (0xFFFFF620) ;- (PIOB) Input Filter Enable Register
+AT91C_PIOB_BSR            EQU (0xFFFFF674) ;- (PIOB) Select B Register
+AT91C_PIOB_MDDR           EQU (0xFFFFF654) ;- (PIOB) Multi-driver Disable Register
+AT91C_PIOB_OER            EQU (0xFFFFF610) ;- (PIOB) Output Enable Register
+AT91C_PIOB_PER            EQU (0xFFFFF600) ;- (PIOB) PIO Enable Register
+;- ========== Register definition for CKGR peripheral ========== 
+AT91C_CKGR_MOR            EQU (0xFFFFFC20) ;- (CKGR) Main Oscillator Register
+AT91C_CKGR_PLLR           EQU (0xFFFFFC2C) ;- (CKGR) PLL Register
+AT91C_CKGR_MCFR           EQU (0xFFFFFC24) ;- (CKGR) Main Clock  Frequency Register
+;- ========== Register definition for PMC peripheral ========== 
+AT91C_PMC_IDR             EQU (0xFFFFFC64) ;- (PMC) Interrupt Disable Register
+AT91C_PMC_MOR             EQU (0xFFFFFC20) ;- (PMC) Main Oscillator Register
+AT91C_PMC_PLLR            EQU (0xFFFFFC2C) ;- (PMC) PLL Register
+AT91C_PMC_PCER            EQU (0xFFFFFC10) ;- (PMC) Peripheral Clock Enable Register
+AT91C_PMC_PCKR            EQU (0xFFFFFC40) ;- (PMC) Programmable Clock Register
+AT91C_PMC_MCKR            EQU (0xFFFFFC30) ;- (PMC) Master Clock Register
+AT91C_PMC_SCDR            EQU (0xFFFFFC04) ;- (PMC) System Clock Disable Register
+AT91C_PMC_PCDR            EQU (0xFFFFFC14) ;- (PMC) Peripheral Clock Disable Register
+AT91C_PMC_SCSR            EQU (0xFFFFFC08) ;- (PMC) System Clock Status Register
+AT91C_PMC_PCSR            EQU (0xFFFFFC18) ;- (PMC) Peripheral Clock Status Register
+AT91C_PMC_MCFR            EQU (0xFFFFFC24) ;- (PMC) Main Clock  Frequency Register
+AT91C_PMC_SCER            EQU (0xFFFFFC00) ;- (PMC) System Clock Enable Register
+AT91C_PMC_IMR             EQU (0xFFFFFC6C) ;- (PMC) Interrupt Mask Register
+AT91C_PMC_IER             EQU (0xFFFFFC60) ;- (PMC) Interrupt Enable Register
+AT91C_PMC_SR              EQU (0xFFFFFC68) ;- (PMC) Status Register
+;- ========== Register definition for RSTC peripheral ========== 
+AT91C_RSTC_RCR            EQU (0xFFFFFD00) ;- (RSTC) Reset Control Register
+AT91C_RSTC_RMR            EQU (0xFFFFFD08) ;- (RSTC) Reset Mode Register
+AT91C_RSTC_RSR            EQU (0xFFFFFD04) ;- (RSTC) Reset Status Register
+;- ========== Register definition for RTTC peripheral ========== 
+AT91C_RTTC_RTSR           EQU (0xFFFFFD2C) ;- (RTTC) Real-time Status Register
+AT91C_RTTC_RTMR           EQU (0xFFFFFD20) ;- (RTTC) Real-time Mode Register
+AT91C_RTTC_RTVR           EQU (0xFFFFFD28) ;- (RTTC) Real-time Value Register
+AT91C_RTTC_RTAR           EQU (0xFFFFFD24) ;- (RTTC) Real-time Alarm Register
+;- ========== Register definition for PITC peripheral ========== 
+AT91C_PITC_PIVR           EQU (0xFFFFFD38) ;- (PITC) Period Interval Value Register
+AT91C_PITC_PISR           EQU (0xFFFFFD34) ;- (PITC) Period Interval Status Register
+AT91C_PITC_PIIR           EQU (0xFFFFFD3C) ;- (PITC) Period Interval Image Register
+AT91C_PITC_PIMR           EQU (0xFFFFFD30) ;- (PITC) Period Interval Mode Register
+;- ========== Register definition for WDTC peripheral ========== 
+AT91C_WDTC_WDCR           EQU (0xFFFFFD40) ;- (WDTC) Watchdog Control Register
+AT91C_WDTC_WDSR           EQU (0xFFFFFD48) ;- (WDTC) Watchdog Status Register
+AT91C_WDTC_WDMR           EQU (0xFFFFFD44) ;- (WDTC) Watchdog Mode Register
+;- ========== Register definition for VREG peripheral ========== 
+AT91C_VREG_MR             EQU (0xFFFFFD60) ;- (VREG) Voltage Regulator Mode Register
+;- ========== Register definition for MC peripheral ========== 
+AT91C_MC_ASR              EQU (0xFFFFFF04) ;- (MC) MC Abort Status Register
+AT91C_MC_RCR              EQU (0xFFFFFF00) ;- (MC) MC Remap Control Register
+AT91C_MC_FCR              EQU (0xFFFFFF64) ;- (MC) MC Flash Command Register
+AT91C_MC_AASR             EQU (0xFFFFFF08) ;- (MC) MC Abort Address Status Register
+AT91C_MC_FSR              EQU (0xFFFFFF68) ;- (MC) MC Flash Status Register
+AT91C_MC_FMR              EQU (0xFFFFFF60) ;- (MC) MC Flash Mode Register
+;- ========== Register definition for PDC_SPI1 peripheral ========== 
+AT91C_SPI1_PTCR           EQU (0xFFFE4120) ;- (PDC_SPI1) PDC Transfer Control Register
+AT91C_SPI1_RPR            EQU (0xFFFE4100) ;- (PDC_SPI1) Receive Pointer Register
+AT91C_SPI1_TNCR           EQU (0xFFFE411C) ;- (PDC_SPI1) Transmit Next Counter Register
+AT91C_SPI1_TPR            EQU (0xFFFE4108) ;- (PDC_SPI1) Transmit Pointer Register
+AT91C_SPI1_TNPR           EQU (0xFFFE4118) ;- (PDC_SPI1) Transmit Next Pointer Register
+AT91C_SPI1_TCR            EQU (0xFFFE410C) ;- (PDC_SPI1) Transmit Counter Register
+AT91C_SPI1_RCR            EQU (0xFFFE4104) ;- (PDC_SPI1) Receive Counter Register
+AT91C_SPI1_RNPR           EQU (0xFFFE4110) ;- (PDC_SPI1) Receive Next Pointer Register
+AT91C_SPI1_RNCR           EQU (0xFFFE4114) ;- (PDC_SPI1) Receive Next Counter Register
+AT91C_SPI1_PTSR           EQU (0xFFFE4124) ;- (PDC_SPI1) PDC Transfer Status Register
+;- ========== Register definition for SPI1 peripheral ========== 
+AT91C_SPI1_IMR            EQU (0xFFFE401C) ;- (SPI1) Interrupt Mask Register
+AT91C_SPI1_IER            EQU (0xFFFE4014) ;- (SPI1) Interrupt Enable Register
+AT91C_SPI1_MR             EQU (0xFFFE4004) ;- (SPI1) Mode Register
+AT91C_SPI1_RDR            EQU (0xFFFE4008) ;- (SPI1) Receive Data Register
+AT91C_SPI1_IDR            EQU (0xFFFE4018) ;- (SPI1) Interrupt Disable Register
+AT91C_SPI1_SR             EQU (0xFFFE4010) ;- (SPI1) Status Register
+AT91C_SPI1_TDR            EQU (0xFFFE400C) ;- (SPI1) Transmit Data Register
+AT91C_SPI1_CR             EQU (0xFFFE4000) ;- (SPI1) Control Register
+AT91C_SPI1_CSR            EQU (0xFFFE4030) ;- (SPI1) Chip Select Register
+;- ========== Register definition for PDC_SPI0 peripheral ========== 
+AT91C_SPI0_PTCR           EQU (0xFFFE0120) ;- (PDC_SPI0) PDC Transfer Control Register
+AT91C_SPI0_TPR            EQU (0xFFFE0108) ;- (PDC_SPI0) Transmit Pointer Register
+AT91C_SPI0_TCR            EQU (0xFFFE010C) ;- (PDC_SPI0) Transmit Counter Register
+AT91C_SPI0_RCR            EQU (0xFFFE0104) ;- (PDC_SPI0) Receive Counter Register
+AT91C_SPI0_PTSR           EQU (0xFFFE0124) ;- (PDC_SPI0) PDC Transfer Status Register
+AT91C_SPI0_RNPR           EQU (0xFFFE0110) ;- (PDC_SPI0) Receive Next Pointer Register
+AT91C_SPI0_RPR            EQU (0xFFFE0100) ;- (PDC_SPI0) Receive Pointer Register
+AT91C_SPI0_TNCR           EQU (0xFFFE011C) ;- (PDC_SPI0) Transmit Next Counter Register
+AT91C_SPI0_RNCR           EQU (0xFFFE0114) ;- (PDC_SPI0) Receive Next Counter Register
+AT91C_SPI0_TNPR           EQU (0xFFFE0118) ;- (PDC_SPI0) Transmit Next Pointer Register
+;- ========== Register definition for SPI0 peripheral ========== 
+AT91C_SPI0_IER            EQU (0xFFFE0014) ;- (SPI0) Interrupt Enable Register
+AT91C_SPI0_SR             EQU (0xFFFE0010) ;- (SPI0) Status Register
+AT91C_SPI0_IDR            EQU (0xFFFE0018) ;- (SPI0) Interrupt Disable Register
+AT91C_SPI0_CR             EQU (0xFFFE0000) ;- (SPI0) Control Register
+AT91C_SPI0_MR             EQU (0xFFFE0004) ;- (SPI0) Mode Register
+AT91C_SPI0_IMR            EQU (0xFFFE001C) ;- (SPI0) Interrupt Mask Register
+AT91C_SPI0_TDR            EQU (0xFFFE000C) ;- (SPI0) Transmit Data Register
+AT91C_SPI0_RDR            EQU (0xFFFE0008) ;- (SPI0) Receive Data Register
+AT91C_SPI0_CSR            EQU (0xFFFE0030) ;- (SPI0) Chip Select Register
+;- ========== Register definition for PDC_US1 peripheral ========== 
+AT91C_US1_RNCR            EQU (0xFFFC4114) ;- (PDC_US1) Receive Next Counter Register
+AT91C_US1_PTCR            EQU (0xFFFC4120) ;- (PDC_US1) PDC Transfer Control Register
+AT91C_US1_TCR             EQU (0xFFFC410C) ;- (PDC_US1) Transmit Counter Register
+AT91C_US1_PTSR            EQU (0xFFFC4124) ;- (PDC_US1) PDC Transfer Status Register
+AT91C_US1_TNPR            EQU (0xFFFC4118) ;- (PDC_US1) Transmit Next Pointer Register
+AT91C_US1_RCR             EQU (0xFFFC4104) ;- (PDC_US1) Receive Counter Register
+AT91C_US1_RNPR            EQU (0xFFFC4110) ;- (PDC_US1) Receive Next Pointer Register
+AT91C_US1_RPR             EQU (0xFFFC4100) ;- (PDC_US1) Receive Pointer Register
+AT91C_US1_TNCR            EQU (0xFFFC411C) ;- (PDC_US1) Transmit Next Counter Register
+AT91C_US1_TPR             EQU (0xFFFC4108) ;- (PDC_US1) Transmit Pointer Register
+;- ========== Register definition for US1 peripheral ========== 
+AT91C_US1_IF              EQU (0xFFFC404C) ;- (US1) IRDA_FILTER Register
+AT91C_US1_NER             EQU (0xFFFC4044) ;- (US1) Nb Errors Register
+AT91C_US1_RTOR            EQU (0xFFFC4024) ;- (US1) Receiver Time-out Register
+AT91C_US1_CSR             EQU (0xFFFC4014) ;- (US1) Channel Status Register
+AT91C_US1_IDR             EQU (0xFFFC400C) ;- (US1) Interrupt Disable Register
+AT91C_US1_IER             EQU (0xFFFC4008) ;- (US1) Interrupt Enable Register
+AT91C_US1_THR             EQU (0xFFFC401C) ;- (US1) Transmitter Holding Register
+AT91C_US1_TTGR            EQU (0xFFFC4028) ;- (US1) Transmitter Time-guard Register
+AT91C_US1_RHR             EQU (0xFFFC4018) ;- (US1) Receiver Holding Register
+AT91C_US1_BRGR            EQU (0xFFFC4020) ;- (US1) Baud Rate Generator Register
+AT91C_US1_IMR             EQU (0xFFFC4010) ;- (US1) Interrupt Mask Register
+AT91C_US1_FIDI            EQU (0xFFFC4040) ;- (US1) FI_DI_Ratio Register
+AT91C_US1_CR              EQU (0xFFFC4000) ;- (US1) Control Register
+AT91C_US1_MR              EQU (0xFFFC4004) ;- (US1) Mode Register
+;- ========== Register definition for PDC_US0 peripheral ========== 
+AT91C_US0_TNPR            EQU (0xFFFC0118) ;- (PDC_US0) Transmit Next Pointer Register
+AT91C_US0_RNPR            EQU (0xFFFC0110) ;- (PDC_US0) Receive Next Pointer Register
+AT91C_US0_TCR             EQU (0xFFFC010C) ;- (PDC_US0) Transmit Counter Register
+AT91C_US0_PTCR            EQU (0xFFFC0120) ;- (PDC_US0) PDC Transfer Control Register
+AT91C_US0_PTSR            EQU (0xFFFC0124) ;- (PDC_US0) PDC Transfer Status Register
+AT91C_US0_TNCR            EQU (0xFFFC011C) ;- (PDC_US0) Transmit Next Counter Register
+AT91C_US0_TPR             EQU (0xFFFC0108) ;- (PDC_US0) Transmit Pointer Register
+AT91C_US0_RCR             EQU (0xFFFC0104) ;- (PDC_US0) Receive Counter Register
+AT91C_US0_RPR             EQU (0xFFFC0100) ;- (PDC_US0) Receive Pointer Register
+AT91C_US0_RNCR            EQU (0xFFFC0114) ;- (PDC_US0) Receive Next Counter Register
+;- ========== Register definition for US0 peripheral ========== 
+AT91C_US0_BRGR            EQU (0xFFFC0020) ;- (US0) Baud Rate Generator Register
+AT91C_US0_NER             EQU (0xFFFC0044) ;- (US0) Nb Errors Register
+AT91C_US0_CR              EQU (0xFFFC0000) ;- (US0) Control Register
+AT91C_US0_IMR             EQU (0xFFFC0010) ;- (US0) Interrupt Mask Register
+AT91C_US0_FIDI            EQU (0xFFFC0040) ;- (US0) FI_DI_Ratio Register
+AT91C_US0_TTGR            EQU (0xFFFC0028) ;- (US0) Transmitter Time-guard Register
+AT91C_US0_MR              EQU (0xFFFC0004) ;- (US0) Mode Register
+AT91C_US0_RTOR            EQU (0xFFFC0024) ;- (US0) Receiver Time-out Register
+AT91C_US0_CSR             EQU (0xFFFC0014) ;- (US0) Channel Status Register
+AT91C_US0_RHR             EQU (0xFFFC0018) ;- (US0) Receiver Holding Register
+AT91C_US0_IDR             EQU (0xFFFC000C) ;- (US0) Interrupt Disable Register
+AT91C_US0_THR             EQU (0xFFFC001C) ;- (US0) Transmitter Holding Register
+AT91C_US0_IF              EQU (0xFFFC004C) ;- (US0) IRDA_FILTER Register
+AT91C_US0_IER             EQU (0xFFFC0008) ;- (US0) Interrupt Enable Register
+;- ========== Register definition for PDC_SSC peripheral ========== 
+AT91C_SSC_TNCR            EQU (0xFFFD411C) ;- (PDC_SSC) Transmit Next Counter Register
+AT91C_SSC_RPR             EQU (0xFFFD4100) ;- (PDC_SSC) Receive Pointer Register
+AT91C_SSC_RNCR            EQU (0xFFFD4114) ;- (PDC_SSC) Receive Next Counter Register
+AT91C_SSC_TPR             EQU (0xFFFD4108) ;- (PDC_SSC) Transmit Pointer Register
+AT91C_SSC_PTCR            EQU (0xFFFD4120) ;- (PDC_SSC) PDC Transfer Control Register
+AT91C_SSC_TCR             EQU (0xFFFD410C) ;- (PDC_SSC) Transmit Counter Register
+AT91C_SSC_RCR             EQU (0xFFFD4104) ;- (PDC_SSC) Receive Counter Register
+AT91C_SSC_RNPR            EQU (0xFFFD4110) ;- (PDC_SSC) Receive Next Pointer Register
+AT91C_SSC_TNPR            EQU (0xFFFD4118) ;- (PDC_SSC) Transmit Next Pointer Register
+AT91C_SSC_PTSR            EQU (0xFFFD4124) ;- (PDC_SSC) PDC Transfer Status Register
+;- ========== Register definition for SSC peripheral ========== 
+AT91C_SSC_RHR             EQU (0xFFFD4020) ;- (SSC) Receive Holding Register
+AT91C_SSC_RSHR            EQU (0xFFFD4030) ;- (SSC) Receive Sync Holding Register
+AT91C_SSC_TFMR            EQU (0xFFFD401C) ;- (SSC) Transmit Frame Mode Register
+AT91C_SSC_IDR             EQU (0xFFFD4048) ;- (SSC) Interrupt Disable Register
+AT91C_SSC_THR             EQU (0xFFFD4024) ;- (SSC) Transmit Holding Register
+AT91C_SSC_RCMR            EQU (0xFFFD4010) ;- (SSC) Receive Clock ModeRegister
+AT91C_SSC_IER             EQU (0xFFFD4044) ;- (SSC) Interrupt Enable Register
+AT91C_SSC_TSHR            EQU (0xFFFD4034) ;- (SSC) Transmit Sync Holding Register
+AT91C_SSC_SR              EQU (0xFFFD4040) ;- (SSC) Status Register
+AT91C_SSC_CMR             EQU (0xFFFD4004) ;- (SSC) Clock Mode Register
+AT91C_SSC_TCMR            EQU (0xFFFD4018) ;- (SSC) Transmit Clock Mode Register
+AT91C_SSC_CR              EQU (0xFFFD4000) ;- (SSC) Control Register
+AT91C_SSC_IMR             EQU (0xFFFD404C) ;- (SSC) Interrupt Mask Register
+AT91C_SSC_RFMR            EQU (0xFFFD4014) ;- (SSC) Receive Frame Mode Register
+;- ========== Register definition for TWI peripheral ========== 
+AT91C_TWI_IER             EQU (0xFFFB8024) ;- (TWI) Interrupt Enable Register
+AT91C_TWI_CR              EQU (0xFFFB8000) ;- (TWI) Control Register
+AT91C_TWI_SR              EQU (0xFFFB8020) ;- (TWI) Status Register
+AT91C_TWI_IMR             EQU (0xFFFB802C) ;- (TWI) Interrupt Mask Register
+AT91C_TWI_THR             EQU (0xFFFB8034) ;- (TWI) Transmit Holding Register
+AT91C_TWI_IDR             EQU (0xFFFB8028) ;- (TWI) Interrupt Disable Register
+AT91C_TWI_IADR            EQU (0xFFFB800C) ;- (TWI) Internal Address Register
+AT91C_TWI_MMR             EQU (0xFFFB8004) ;- (TWI) Master Mode Register
+AT91C_TWI_CWGR            EQU (0xFFFB8010) ;- (TWI) Clock Waveform Generator Register
+AT91C_TWI_RHR             EQU (0xFFFB8030) ;- (TWI) Receive Holding Register
+;- ========== Register definition for PWMC_CH3 peripheral ========== 
+AT91C_PWMC_CH3_CUPDR      EQU (0xFFFCC270) ;- (PWMC_CH3) Channel Update Register
+AT91C_PWMC_CH3_Reserved   EQU (0xFFFCC274) ;- (PWMC_CH3) Reserved
+AT91C_PWMC_CH3_CPRDR      EQU (0xFFFCC268) ;- (PWMC_CH3) Channel Period Register
+AT91C_PWMC_CH3_CDTYR      EQU (0xFFFCC264) ;- (PWMC_CH3) Channel Duty Cycle Register
+AT91C_PWMC_CH3_CCNTR      EQU (0xFFFCC26C) ;- (PWMC_CH3) Channel Counter Register
+AT91C_PWMC_CH3_CMR        EQU (0xFFFCC260) ;- (PWMC_CH3) Channel Mode Register
+;- ========== Register definition for PWMC_CH2 peripheral ========== 
+AT91C_PWMC_CH2_Reserved   EQU (0xFFFCC254) ;- (PWMC_CH2) Reserved
+AT91C_PWMC_CH2_CMR        EQU (0xFFFCC240) ;- (PWMC_CH2) Channel Mode Register
+AT91C_PWMC_CH2_CCNTR      EQU (0xFFFCC24C) ;- (PWMC_CH2) Channel Counter Register
+AT91C_PWMC_CH2_CPRDR      EQU (0xFFFCC248) ;- (PWMC_CH2) Channel Period Register
+AT91C_PWMC_CH2_CUPDR      EQU (0xFFFCC250) ;- (PWMC_CH2) Channel Update Register
+AT91C_PWMC_CH2_CDTYR      EQU (0xFFFCC244) ;- (PWMC_CH2) Channel Duty Cycle Register
+;- ========== Register definition for PWMC_CH1 peripheral ========== 
+AT91C_PWMC_CH1_Reserved   EQU (0xFFFCC234) ;- (PWMC_CH1) Reserved
+AT91C_PWMC_CH1_CUPDR      EQU (0xFFFCC230) ;- (PWMC_CH1) Channel Update Register
+AT91C_PWMC_CH1_CPRDR      EQU (0xFFFCC228) ;- (PWMC_CH1) Channel Period Register
+AT91C_PWMC_CH1_CCNTR      EQU (0xFFFCC22C) ;- (PWMC_CH1) Channel Counter Register
+AT91C_PWMC_CH1_CDTYR      EQU (0xFFFCC224) ;- (PWMC_CH1) Channel Duty Cycle Register
+AT91C_PWMC_CH1_CMR        EQU (0xFFFCC220) ;- (PWMC_CH1) Channel Mode Register
+;- ========== Register definition for PWMC_CH0 peripheral ========== 
+AT91C_PWMC_CH0_Reserved   EQU (0xFFFCC214) ;- (PWMC_CH0) Reserved
+AT91C_PWMC_CH0_CPRDR      EQU (0xFFFCC208) ;- (PWMC_CH0) Channel Period Register
+AT91C_PWMC_CH0_CDTYR      EQU (0xFFFCC204) ;- (PWMC_CH0) Channel Duty Cycle Register
+AT91C_PWMC_CH0_CMR        EQU (0xFFFCC200) ;- (PWMC_CH0) Channel Mode Register
+AT91C_PWMC_CH0_CUPDR      EQU (0xFFFCC210) ;- (PWMC_CH0) Channel Update Register
+AT91C_PWMC_CH0_CCNTR      EQU (0xFFFCC20C) ;- (PWMC_CH0) Channel Counter Register
+;- ========== Register definition for PWMC peripheral ========== 
+AT91C_PWMC_IDR            EQU (0xFFFCC014) ;- (PWMC) PWMC Interrupt Disable Register
+AT91C_PWMC_DIS            EQU (0xFFFCC008) ;- (PWMC) PWMC Disable Register
+AT91C_PWMC_IER            EQU (0xFFFCC010) ;- (PWMC) PWMC Interrupt Enable Register
+AT91C_PWMC_VR             EQU (0xFFFCC0FC) ;- (PWMC) PWMC Version Register
+AT91C_PWMC_ISR            EQU (0xFFFCC01C) ;- (PWMC) PWMC Interrupt Status Register
+AT91C_PWMC_SR             EQU (0xFFFCC00C) ;- (PWMC) PWMC Status Register
+AT91C_PWMC_IMR            EQU (0xFFFCC018) ;- (PWMC) PWMC Interrupt Mask Register
+AT91C_PWMC_MR             EQU (0xFFFCC000) ;- (PWMC) PWMC Mode Register
+AT91C_PWMC_ENA            EQU (0xFFFCC004) ;- (PWMC) PWMC Enable Register
+;- ========== Register definition for UDP peripheral ========== 
+AT91C_UDP_IMR             EQU (0xFFFB0018) ;- (UDP) Interrupt Mask Register
+AT91C_UDP_FADDR           EQU (0xFFFB0008) ;- (UDP) Function Address Register
+AT91C_UDP_NUM             EQU (0xFFFB0000) ;- (UDP) Frame Number Register
+AT91C_UDP_FDR             EQU (0xFFFB0050) ;- (UDP) Endpoint FIFO Data Register
+AT91C_UDP_ISR             EQU (0xFFFB001C) ;- (UDP) Interrupt Status Register
+AT91C_UDP_CSR             EQU (0xFFFB0030) ;- (UDP) Endpoint Control and Status Register
+AT91C_UDP_IDR             EQU (0xFFFB0014) ;- (UDP) Interrupt Disable Register
+AT91C_UDP_ICR             EQU (0xFFFB0020) ;- (UDP) Interrupt Clear Register
+AT91C_UDP_RSTEP           EQU (0xFFFB0028) ;- (UDP) Reset Endpoint Register
+AT91C_UDP_TXVC            EQU (0xFFFB0074) ;- (UDP) Transceiver Control Register
+AT91C_UDP_GLBSTATE        EQU (0xFFFB0004) ;- (UDP) Global State Register
+AT91C_UDP_IER             EQU (0xFFFB0010) ;- (UDP) Interrupt Enable Register
+;- ========== Register definition for TC0 peripheral ========== 
+AT91C_TC0_SR              EQU (0xFFFA0020) ;- (TC0) Status Register
+AT91C_TC0_RC              EQU (0xFFFA001C) ;- (TC0) Register C
+AT91C_TC0_RB              EQU (0xFFFA0018) ;- (TC0) Register B
+AT91C_TC0_CCR             EQU (0xFFFA0000) ;- (TC0) Channel Control Register
+AT91C_TC0_CMR             EQU (0xFFFA0004) ;- (TC0) Channel Mode Register (Capture Mode / Waveform Mode)
+AT91C_TC0_IER             EQU (0xFFFA0024) ;- (TC0) Interrupt Enable Register
+AT91C_TC0_RA              EQU (0xFFFA0014) ;- (TC0) Register A
+AT91C_TC0_IDR             EQU (0xFFFA0028) ;- (TC0) Interrupt Disable Register
+AT91C_TC0_CV              EQU (0xFFFA0010) ;- (TC0) Counter Value
+AT91C_TC0_IMR             EQU (0xFFFA002C) ;- (TC0) Interrupt Mask Register
+;- ========== Register definition for TC1 peripheral ========== 
+AT91C_TC1_RB              EQU (0xFFFA0058) ;- (TC1) Register B
+AT91C_TC1_CCR             EQU (0xFFFA0040) ;- (TC1) Channel Control Register
+AT91C_TC1_IER             EQU (0xFFFA0064) ;- (TC1) Interrupt Enable Register
+AT91C_TC1_IDR             EQU (0xFFFA0068) ;- (TC1) Interrupt Disable Register
+AT91C_TC1_SR              EQU (0xFFFA0060) ;- (TC1) Status Register
+AT91C_TC1_CMR             EQU (0xFFFA0044) ;- (TC1) Channel Mode Register (Capture Mode / Waveform Mode)
+AT91C_TC1_RA              EQU (0xFFFA0054) ;- (TC1) Register A
+AT91C_TC1_RC              EQU (0xFFFA005C) ;- (TC1) Register C
+AT91C_TC1_IMR             EQU (0xFFFA006C) ;- (TC1) Interrupt Mask Register
+AT91C_TC1_CV              EQU (0xFFFA0050) ;- (TC1) Counter Value
+;- ========== Register definition for TC2 peripheral ========== 
+AT91C_TC2_CMR             EQU (0xFFFA0084) ;- (TC2) Channel Mode Register (Capture Mode / Waveform Mode)
+AT91C_TC2_CCR             EQU (0xFFFA0080) ;- (TC2) Channel Control Register
+AT91C_TC2_CV              EQU (0xFFFA0090) ;- (TC2) Counter Value
+AT91C_TC2_RA              EQU (0xFFFA0094) ;- (TC2) Register A
+AT91C_TC2_RB              EQU (0xFFFA0098) ;- (TC2) Register B
+AT91C_TC2_IDR             EQU (0xFFFA00A8) ;- (TC2) Interrupt Disable Register
+AT91C_TC2_IMR             EQU (0xFFFA00AC) ;- (TC2) Interrupt Mask Register
+AT91C_TC2_RC              EQU (0xFFFA009C) ;- (TC2) Register C
+AT91C_TC2_IER             EQU (0xFFFA00A4) ;- (TC2) Interrupt Enable Register
+AT91C_TC2_SR              EQU (0xFFFA00A0) ;- (TC2) Status Register
+;- ========== Register definition for TCB peripheral ========== 
+AT91C_TCB_BMR             EQU (0xFFFA00C4) ;- (TCB) TC Block Mode Register
+AT91C_TCB_BCR             EQU (0xFFFA00C0) ;- (TCB) TC Block Control Register
+;- ========== Register definition for CAN_MB0 peripheral ========== 
+AT91C_CAN_MB0_MDL         EQU (0xFFFD0214) ;- (CAN_MB0) MailBox Data Low Register
+AT91C_CAN_MB0_MAM         EQU (0xFFFD0204) ;- (CAN_MB0) MailBox Acceptance Mask Register
+AT91C_CAN_MB0_MCR         EQU (0xFFFD021C) ;- (CAN_MB0) MailBox Control Register
+AT91C_CAN_MB0_MID         EQU (0xFFFD0208) ;- (CAN_MB0) MailBox ID Register
+AT91C_CAN_MB0_MSR         EQU (0xFFFD0210) ;- (CAN_MB0) MailBox Status Register
+AT91C_CAN_MB0_MFID        EQU (0xFFFD020C) ;- (CAN_MB0) MailBox Family ID Register
+AT91C_CAN_MB0_MDH         EQU (0xFFFD0218) ;- (CAN_MB0) MailBox Data High Register
+AT91C_CAN_MB0_MMR         EQU (0xFFFD0200) ;- (CAN_MB0) MailBox Mode Register
+;- ========== Register definition for CAN_MB1 peripheral ========== 
+AT91C_CAN_MB1_MDL         EQU (0xFFFD0234) ;- (CAN_MB1) MailBox Data Low Register
+AT91C_CAN_MB1_MID         EQU (0xFFFD0228) ;- (CAN_MB1) MailBox ID Register
+AT91C_CAN_MB1_MMR         EQU (0xFFFD0220) ;- (CAN_MB1) MailBox Mode Register
+AT91C_CAN_MB1_MSR         EQU (0xFFFD0230) ;- (CAN_MB1) MailBox Status Register
+AT91C_CAN_MB1_MAM         EQU (0xFFFD0224) ;- (CAN_MB1) MailBox Acceptance Mask Register
+AT91C_CAN_MB1_MDH         EQU (0xFFFD0238) ;- (CAN_MB1) MailBox Data High Register
+AT91C_CAN_MB1_MCR         EQU (0xFFFD023C) ;- (CAN_MB1) MailBox Control Register
+AT91C_CAN_MB1_MFID        EQU (0xFFFD022C) ;- (CAN_MB1) MailBox Family ID Register
+;- ========== Register definition for CAN_MB2 peripheral ========== 
+AT91C_CAN_MB2_MCR         EQU (0xFFFD025C) ;- (CAN_MB2) MailBox Control Register
+AT91C_CAN_MB2_MDH         EQU (0xFFFD0258) ;- (CAN_MB2) MailBox Data High Register
+AT91C_CAN_MB2_MID         EQU (0xFFFD0248) ;- (CAN_MB2) MailBox ID Register
+AT91C_CAN_MB2_MDL         EQU (0xFFFD0254) ;- (CAN_MB2) MailBox Data Low Register
+AT91C_CAN_MB2_MMR         EQU (0xFFFD0240) ;- (CAN_MB2) MailBox Mode Register
+AT91C_CAN_MB2_MAM         EQU (0xFFFD0244) ;- (CAN_MB2) MailBox Acceptance Mask Register
+AT91C_CAN_MB2_MFID        EQU (0xFFFD024C) ;- (CAN_MB2) MailBox Family ID Register
+AT91C_CAN_MB2_MSR         EQU (0xFFFD0250) ;- (CAN_MB2) MailBox Status Register
+;- ========== Register definition for CAN_MB3 peripheral ========== 
+AT91C_CAN_MB3_MFID        EQU (0xFFFD026C) ;- (CAN_MB3) MailBox Family ID Register
+AT91C_CAN_MB3_MAM         EQU (0xFFFD0264) ;- (CAN_MB3) MailBox Acceptance Mask Register
+AT91C_CAN_MB3_MID         EQU (0xFFFD0268) ;- (CAN_MB3) MailBox ID Register
+AT91C_CAN_MB3_MCR         EQU (0xFFFD027C) ;- (CAN_MB3) MailBox Control Register
+AT91C_CAN_MB3_MMR         EQU (0xFFFD0260) ;- (CAN_MB3) MailBox Mode Register
+AT91C_CAN_MB3_MSR         EQU (0xFFFD0270) ;- (CAN_MB3) MailBox Status Register
+AT91C_CAN_MB3_MDL         EQU (0xFFFD0274) ;- (CAN_MB3) MailBox Data Low Register
+AT91C_CAN_MB3_MDH         EQU (0xFFFD0278) ;- (CAN_MB3) MailBox Data High Register
+;- ========== Register definition for CAN_MB4 peripheral ========== 
+AT91C_CAN_MB4_MID         EQU (0xFFFD0288) ;- (CAN_MB4) MailBox ID Register
+AT91C_CAN_MB4_MMR         EQU (0xFFFD0280) ;- (CAN_MB4) MailBox Mode Register
+AT91C_CAN_MB4_MDH         EQU (0xFFFD0298) ;- (CAN_MB4) MailBox Data High Register
+AT91C_CAN_MB4_MFID        EQU (0xFFFD028C) ;- (CAN_MB4) MailBox Family ID Register
+AT91C_CAN_MB4_MSR         EQU (0xFFFD0290) ;- (CAN_MB4) MailBox Status Register
+AT91C_CAN_MB4_MCR         EQU (0xFFFD029C) ;- (CAN_MB4) MailBox Control Register
+AT91C_CAN_MB4_MDL         EQU (0xFFFD0294) ;- (CAN_MB4) MailBox Data Low Register
+AT91C_CAN_MB4_MAM         EQU (0xFFFD0284) ;- (CAN_MB4) MailBox Acceptance Mask Register
+;- ========== Register definition for CAN_MB5 peripheral ========== 
+AT91C_CAN_MB5_MSR         EQU (0xFFFD02B0) ;- (CAN_MB5) MailBox Status Register
+AT91C_CAN_MB5_MCR         EQU (0xFFFD02BC) ;- (CAN_MB5) MailBox Control Register
+AT91C_CAN_MB5_MFID        EQU (0xFFFD02AC) ;- (CAN_MB5) MailBox Family ID Register
+AT91C_CAN_MB5_MDH         EQU (0xFFFD02B8) ;- (CAN_MB5) MailBox Data High Register
+AT91C_CAN_MB5_MID         EQU (0xFFFD02A8) ;- (CAN_MB5) MailBox ID Register
+AT91C_CAN_MB5_MMR         EQU (0xFFFD02A0) ;- (CAN_MB5) MailBox Mode Register
+AT91C_CAN_MB5_MDL         EQU (0xFFFD02B4) ;- (CAN_MB5) MailBox Data Low Register
+AT91C_CAN_MB5_MAM         EQU (0xFFFD02A4) ;- (CAN_MB5) MailBox Acceptance Mask Register
+;- ========== Register definition for CAN_MB6 peripheral ========== 
+AT91C_CAN_MB6_MFID        EQU (0xFFFD02CC) ;- (CAN_MB6) MailBox Family ID Register
+AT91C_CAN_MB6_MID         EQU (0xFFFD02C8) ;- (CAN_MB6) MailBox ID Register
+AT91C_CAN_MB6_MAM         EQU (0xFFFD02C4) ;- (CAN_MB6) MailBox Acceptance Mask Register
+AT91C_CAN_MB6_MSR         EQU (0xFFFD02D0) ;- (CAN_MB6) MailBox Status Register
+AT91C_CAN_MB6_MDL         EQU (0xFFFD02D4) ;- (CAN_MB6) MailBox Data Low Register
+AT91C_CAN_MB6_MCR         EQU (0xFFFD02DC) ;- (CAN_MB6) MailBox Control Register
+AT91C_CAN_MB6_MDH         EQU (0xFFFD02D8) ;- (CAN_MB6) MailBox Data High Register
+AT91C_CAN_MB6_MMR         EQU (0xFFFD02C0) ;- (CAN_MB6) MailBox Mode Register
+;- ========== Register definition for CAN_MB7 peripheral ========== 
+AT91C_CAN_MB7_MCR         EQU (0xFFFD02FC) ;- (CAN_MB7) MailBox Control Register
+AT91C_CAN_MB7_MDH         EQU (0xFFFD02F8) ;- (CAN_MB7) MailBox Data High Register
+AT91C_CAN_MB7_MFID        EQU (0xFFFD02EC) ;- (CAN_MB7) MailBox Family ID Register
+AT91C_CAN_MB7_MDL         EQU (0xFFFD02F4) ;- (CAN_MB7) MailBox Data Low Register
+AT91C_CAN_MB7_MID         EQU (0xFFFD02E8) ;- (CAN_MB7) MailBox ID Register
+AT91C_CAN_MB7_MMR         EQU (0xFFFD02E0) ;- (CAN_MB7) MailBox Mode Register
+AT91C_CAN_MB7_MAM         EQU (0xFFFD02E4) ;- (CAN_MB7) MailBox Acceptance Mask Register
+AT91C_CAN_MB7_MSR         EQU (0xFFFD02F0) ;- (CAN_MB7) MailBox Status Register
+;- ========== Register definition for CAN peripheral ========== 
+AT91C_CAN_TCR             EQU (0xFFFD0024) ;- (CAN) Transfer Command Register
+AT91C_CAN_IMR             EQU (0xFFFD000C) ;- (CAN) Interrupt Mask Register
+AT91C_CAN_IER             EQU (0xFFFD0004) ;- (CAN) Interrupt Enable Register
+AT91C_CAN_ECR             EQU (0xFFFD0020) ;- (CAN) Error Counter Register
+AT91C_CAN_TIMESTP         EQU (0xFFFD001C) ;- (CAN) Time Stamp Register
+AT91C_CAN_MR              EQU (0xFFFD0000) ;- (CAN) Mode Register
+AT91C_CAN_IDR             EQU (0xFFFD0008) ;- (CAN) Interrupt Disable Register
+AT91C_CAN_ACR             EQU (0xFFFD0028) ;- (CAN) Abort Command Register
+AT91C_CAN_TIM             EQU (0xFFFD0018) ;- (CAN) Timer Register
+AT91C_CAN_SR              EQU (0xFFFD0010) ;- (CAN) Status Register
+AT91C_CAN_BR              EQU (0xFFFD0014) ;- (CAN) Baudrate Register
+AT91C_CAN_VR              EQU (0xFFFD00FC) ;- (CAN) Version Register
+;- ========== Register definition for EMAC peripheral ========== 
+AT91C_EMAC_ISR            EQU (0xFFFDC024) ;- (EMAC) Interrupt Status Register
+AT91C_EMAC_SA4H           EQU (0xFFFDC0B4) ;- (EMAC) Specific Address 4 Top, Last 2 bytes
+AT91C_EMAC_SA1L           EQU (0xFFFDC098) ;- (EMAC) Specific Address 1 Bottom, First 4 bytes
+AT91C_EMAC_ELE            EQU (0xFFFDC078) ;- (EMAC) Excessive Length Errors Register
+AT91C_EMAC_LCOL           EQU (0xFFFDC05C) ;- (EMAC) Late Collision Register
+AT91C_EMAC_RLE            EQU (0xFFFDC088) ;- (EMAC) Receive Length Field Mismatch Register
+AT91C_EMAC_WOL            EQU (0xFFFDC0C4) ;- (EMAC) Wake On LAN Register
+AT91C_EMAC_DTF            EQU (0xFFFDC058) ;- (EMAC) Deferred Transmission Frame Register
+AT91C_EMAC_TUND           EQU (0xFFFDC064) ;- (EMAC) Transmit Underrun Error Register
+AT91C_EMAC_NCR            EQU (0xFFFDC000) ;- (EMAC) Network Control Register
+AT91C_EMAC_SA4L           EQU (0xFFFDC0B0) ;- (EMAC) Specific Address 4 Bottom, First 4 bytes
+AT91C_EMAC_RSR            EQU (0xFFFDC020) ;- (EMAC) Receive Status Register
+AT91C_EMAC_SA3L           EQU (0xFFFDC0A8) ;- (EMAC) Specific Address 3 Bottom, First 4 bytes
+AT91C_EMAC_TSR            EQU (0xFFFDC014) ;- (EMAC) Transmit Status Register
+AT91C_EMAC_IDR            EQU (0xFFFDC02C) ;- (EMAC) Interrupt Disable Register
+AT91C_EMAC_RSE            EQU (0xFFFDC074) ;- (EMAC) Receive Symbol Errors Register
+AT91C_EMAC_ECOL           EQU (0xFFFDC060) ;- (EMAC) Excessive Collision Register
+AT91C_EMAC_TID            EQU (0xFFFDC0B8) ;- (EMAC) Type ID Checking Register
+AT91C_EMAC_HRB            EQU (0xFFFDC090) ;- (EMAC) Hash Address Bottom[31:0]
+AT91C_EMAC_TBQP           EQU (0xFFFDC01C) ;- (EMAC) Transmit Buffer Queue Pointer
+AT91C_EMAC_USRIO          EQU (0xFFFDC0C0) ;- (EMAC) USER Input/Output Register
+AT91C_EMAC_PTR            EQU (0xFFFDC038) ;- (EMAC) Pause Time Register
+AT91C_EMAC_SA2H           EQU (0xFFFDC0A4) ;- (EMAC) Specific Address 2 Top, Last 2 bytes
+AT91C_EMAC_ROV            EQU (0xFFFDC070) ;- (EMAC) Receive Overrun Errors Register
+AT91C_EMAC_ALE            EQU (0xFFFDC054) ;- (EMAC) Alignment Error Register
+AT91C_EMAC_RJA            EQU (0xFFFDC07C) ;- (EMAC) Receive Jabbers Register
+AT91C_EMAC_RBQP           EQU (0xFFFDC018) ;- (EMAC) Receive Buffer Queue Pointer
+AT91C_EMAC_TPF            EQU (0xFFFDC08C) ;- (EMAC) Transmitted Pause Frames Register
+AT91C_EMAC_NCFGR          EQU (0xFFFDC004) ;- (EMAC) Network Configuration Register
+AT91C_EMAC_HRT            EQU (0xFFFDC094) ;- (EMAC) Hash Address Top[63:32]
+AT91C_EMAC_USF            EQU (0xFFFDC080) ;- (EMAC) Undersize Frames Register
+AT91C_EMAC_FCSE           EQU (0xFFFDC050) ;- (EMAC) Frame Check Sequence Error Register
+AT91C_EMAC_TPQ            EQU (0xFFFDC0BC) ;- (EMAC) Transmit Pause Quantum Register
+AT91C_EMAC_MAN            EQU (0xFFFDC034) ;- (EMAC) PHY Maintenance Register
+AT91C_EMAC_FTO            EQU (0xFFFDC040) ;- (EMAC) Frames Transmitted OK Register
+AT91C_EMAC_REV            EQU (0xFFFDC0FC) ;- (EMAC) Revision Register
+AT91C_EMAC_IMR            EQU (0xFFFDC030) ;- (EMAC) Interrupt Mask Register
+AT91C_EMAC_SCF            EQU (0xFFFDC044) ;- (EMAC) Single Collision Frame Register
+AT91C_EMAC_PFR            EQU (0xFFFDC03C) ;- (EMAC) Pause Frames received Register
+AT91C_EMAC_MCF            EQU (0xFFFDC048) ;- (EMAC) Multiple Collision Frame Register
+AT91C_EMAC_NSR            EQU (0xFFFDC008) ;- (EMAC) Network Status Register
+AT91C_EMAC_SA2L           EQU (0xFFFDC0A0) ;- (EMAC) Specific Address 2 Bottom, First 4 bytes
+AT91C_EMAC_FRO            EQU (0xFFFDC04C) ;- (EMAC) Frames Received OK Register
+AT91C_EMAC_IER            EQU (0xFFFDC028) ;- (EMAC) Interrupt Enable Register
+AT91C_EMAC_SA1H           EQU (0xFFFDC09C) ;- (EMAC) Specific Address 1 Top, Last 2 bytes
+AT91C_EMAC_CSE            EQU (0xFFFDC068) ;- (EMAC) Carrier Sense Error Register
+AT91C_EMAC_SA3H           EQU (0xFFFDC0AC) ;- (EMAC) Specific Address 3 Top, Last 2 bytes
+AT91C_EMAC_RRE            EQU (0xFFFDC06C) ;- (EMAC) Receive Ressource Error Register
+AT91C_EMAC_STE            EQU (0xFFFDC084) ;- (EMAC) SQE Test Error Register
+;- ========== Register definition for PDC_ADC peripheral ========== 
+AT91C_ADC_PTSR            EQU (0xFFFD8124) ;- (PDC_ADC) PDC Transfer Status Register
+AT91C_ADC_PTCR            EQU (0xFFFD8120) ;- (PDC_ADC) PDC Transfer Control Register
+AT91C_ADC_TNPR            EQU (0xFFFD8118) ;- (PDC_ADC) Transmit Next Pointer Register
+AT91C_ADC_TNCR            EQU (0xFFFD811C) ;- (PDC_ADC) Transmit Next Counter Register
+AT91C_ADC_RNPR            EQU (0xFFFD8110) ;- (PDC_ADC) Receive Next Pointer Register
+AT91C_ADC_RNCR            EQU (0xFFFD8114) ;- (PDC_ADC) Receive Next Counter Register
+AT91C_ADC_RPR             EQU (0xFFFD8100) ;- (PDC_ADC) Receive Pointer Register
+AT91C_ADC_TCR             EQU (0xFFFD810C) ;- (PDC_ADC) Transmit Counter Register
+AT91C_ADC_TPR             EQU (0xFFFD8108) ;- (PDC_ADC) Transmit Pointer Register
+AT91C_ADC_RCR             EQU (0xFFFD8104) ;- (PDC_ADC) Receive Counter Register
+;- ========== Register definition for ADC peripheral ========== 
+AT91C_ADC_CDR2            EQU (0xFFFD8038) ;- (ADC) ADC Channel Data Register 2
+AT91C_ADC_CDR3            EQU (0xFFFD803C) ;- (ADC) ADC Channel Data Register 3
+AT91C_ADC_CDR0            EQU (0xFFFD8030) ;- (ADC) ADC Channel Data Register 0
+AT91C_ADC_CDR5            EQU (0xFFFD8044) ;- (ADC) ADC Channel Data Register 5
+AT91C_ADC_CHDR            EQU (0xFFFD8014) ;- (ADC) ADC Channel Disable Register
+AT91C_ADC_SR              EQU (0xFFFD801C) ;- (ADC) ADC Status Register
+AT91C_ADC_CDR4            EQU (0xFFFD8040) ;- (ADC) ADC Channel Data Register 4
+AT91C_ADC_CDR1            EQU (0xFFFD8034) ;- (ADC) ADC Channel Data Register 1
+AT91C_ADC_LCDR            EQU (0xFFFD8020) ;- (ADC) ADC Last Converted Data Register
+AT91C_ADC_IDR             EQU (0xFFFD8028) ;- (ADC) ADC Interrupt Disable Register
+AT91C_ADC_CR              EQU (0xFFFD8000) ;- (ADC) ADC Control Register
+AT91C_ADC_CDR7            EQU (0xFFFD804C) ;- (ADC) ADC Channel Data Register 7
+AT91C_ADC_CDR6            EQU (0xFFFD8048) ;- (ADC) ADC Channel Data Register 6
+AT91C_ADC_IER             EQU (0xFFFD8024) ;- (ADC) ADC Interrupt Enable Register
+AT91C_ADC_CHER            EQU (0xFFFD8010) ;- (ADC) ADC Channel Enable Register
+AT91C_ADC_CHSR            EQU (0xFFFD8018) ;- (ADC) ADC Channel Status Register
+AT91C_ADC_MR              EQU (0xFFFD8004) ;- (ADC) ADC Mode Register
+AT91C_ADC_IMR             EQU (0xFFFD802C) ;- (ADC) ADC Interrupt Mask Register
+
+;- *****************************************************************************
+;-               PIO DEFINITIONS FOR AT91SAM7X256
+;- *****************************************************************************
+AT91C_PIO_PA0             EQU (1:SHL:0) ;- Pin Controlled by PA0
+AT91C_PA0_RXD0            EQU (AT91C_PIO_PA0) ;-  USART 0 Receive Data
+AT91C_PIO_PA1             EQU (1:SHL:1) ;- Pin Controlled by PA1
+AT91C_PA1_TXD0            EQU (AT91C_PIO_PA1) ;-  USART 0 Transmit Data
+AT91C_PIO_PA10            EQU (1:SHL:10) ;- Pin Controlled by PA10
+AT91C_PA10_TWD            EQU (AT91C_PIO_PA10) ;-  TWI Two-wire Serial Data
+AT91C_PIO_PA11            EQU (1:SHL:11) ;- Pin Controlled by PA11
+AT91C_PA11_TWCK           EQU (AT91C_PIO_PA11) ;-  TWI Two-wire Serial Clock
+AT91C_PIO_PA12            EQU (1:SHL:12) ;- Pin Controlled by PA12
+AT91C_PA12_SPI0_NPCS0     EQU (AT91C_PIO_PA12) ;-  SPI 0 Peripheral Chip Select 0
+AT91C_PIO_PA13            EQU (1:SHL:13) ;- Pin Controlled by PA13
+AT91C_PA13_SPI0_NPCS1     EQU (AT91C_PIO_PA13) ;-  SPI 0 Peripheral Chip Select 1
+AT91C_PA13_PCK1           EQU (AT91C_PIO_PA13) ;-  PMC Programmable Clock Output 1
+AT91C_PIO_PA14            EQU (1:SHL:14) ;- Pin Controlled by PA14
+AT91C_PA14_SPI0_NPCS2     EQU (AT91C_PIO_PA14) ;-  SPI 0 Peripheral Chip Select 2
+AT91C_PA14_IRQ1           EQU (AT91C_PIO_PA14) ;-  External Interrupt 1
+AT91C_PIO_PA15            EQU (1:SHL:15) ;- Pin Controlled by PA15
+AT91C_PA15_SPI0_NPCS3     EQU (AT91C_PIO_PA15) ;-  SPI 0 Peripheral Chip Select 3
+AT91C_PA15_TCLK2          EQU (AT91C_PIO_PA15) ;-  Timer Counter 2 external clock input
+AT91C_PIO_PA16            EQU (1:SHL:16) ;- Pin Controlled by PA16
+AT91C_PA16_SPI0_MISO      EQU (AT91C_PIO_PA16) ;-  SPI 0 Master In Slave
+AT91C_PIO_PA17            EQU (1:SHL:17) ;- Pin Controlled by PA17
+AT91C_PA17_SPI0_MOSI      EQU (AT91C_PIO_PA17) ;-  SPI 0 Master Out Slave
+AT91C_PIO_PA18            EQU (1:SHL:18) ;- Pin Controlled by PA18
+AT91C_PA18_SPI0_SPCK      EQU (AT91C_PIO_PA18) ;-  SPI 0 Serial Clock
+AT91C_PIO_PA19            EQU (1:SHL:19) ;- Pin Controlled by PA19
+AT91C_PA19_CANRX          EQU (AT91C_PIO_PA19) ;-  CAN Receive
+AT91C_PIO_PA2             EQU (1:SHL:2) ;- Pin Controlled by PA2
+AT91C_PA2_SCK0            EQU (AT91C_PIO_PA2) ;-  USART 0 Serial Clock
+AT91C_PA2_SPI1_NPCS1      EQU (AT91C_PIO_PA2) ;-  SPI 1 Peripheral Chip Select 1
+AT91C_PIO_PA20            EQU (1:SHL:20) ;- Pin Controlled by PA20
+AT91C_PA20_CANTX          EQU (AT91C_PIO_PA20) ;-  CAN Transmit
+AT91C_PIO_PA21            EQU (1:SHL:21) ;- Pin Controlled by PA21
+AT91C_PA21_TF             EQU (AT91C_PIO_PA21) ;-  SSC Transmit Frame Sync
+AT91C_PA21_SPI1_NPCS0     EQU (AT91C_PIO_PA21) ;-  SPI 1 Peripheral Chip Select 0
+AT91C_PIO_PA22            EQU (1:SHL:22) ;- Pin Controlled by PA22
+AT91C_PA22_TK             EQU (AT91C_PIO_PA22) ;-  SSC Transmit Clock
+AT91C_PA22_SPI1_SPCK      EQU (AT91C_PIO_PA22) ;-  SPI 1 Serial Clock
+AT91C_PIO_PA23            EQU (1:SHL:23) ;- Pin Controlled by PA23
+AT91C_PA23_TD             EQU (AT91C_PIO_PA23) ;-  SSC Transmit data
+AT91C_PA23_SPI1_MOSI      EQU (AT91C_PIO_PA23) ;-  SPI 1 Master Out Slave
+AT91C_PIO_PA24            EQU (1:SHL:24) ;- Pin Controlled by PA24
+AT91C_PA24_RD             EQU (AT91C_PIO_PA24) ;-  SSC Receive Data
+AT91C_PA24_SPI1_MISO      EQU (AT91C_PIO_PA24) ;-  SPI 1 Master In Slave
+AT91C_PIO_PA25            EQU (1:SHL:25) ;- Pin Controlled by PA25
+AT91C_PA25_RK             EQU (AT91C_PIO_PA25) ;-  SSC Receive Clock
+AT91C_PA25_SPI1_NPCS1     EQU (AT91C_PIO_PA25) ;-  SPI 1 Peripheral Chip Select 1
+AT91C_PIO_PA26            EQU (1:SHL:26) ;- Pin Controlled by PA26
+AT91C_PA26_RF             EQU (AT91C_PIO_PA26) ;-  SSC Receive Frame Sync
+AT91C_PA26_SPI1_NPCS2     EQU (AT91C_PIO_PA26) ;-  SPI 1 Peripheral Chip Select 2
+AT91C_PIO_PA27            EQU (1:SHL:27) ;- Pin Controlled by PA27
+AT91C_PA27_DRXD           EQU (AT91C_PIO_PA27) ;-  DBGU Debug Receive Data
+AT91C_PA27_PCK3           EQU (AT91C_PIO_PA27) ;-  PMC Programmable Clock Output 3
+AT91C_PIO_PA28            EQU (1:SHL:28) ;- Pin Controlled by PA28
+AT91C_PA28_DTXD           EQU (AT91C_PIO_PA28) ;-  DBGU Debug Transmit Data
+AT91C_PIO_PA29            EQU (1:SHL:29) ;- Pin Controlled by PA29
+AT91C_PA29_FIQ            EQU (AT91C_PIO_PA29) ;-  AIC Fast Interrupt Input
+AT91C_PA29_SPI1_NPCS3     EQU (AT91C_PIO_PA29) ;-  SPI 1 Peripheral Chip Select 3
+AT91C_PIO_PA3             EQU (1:SHL:3) ;- Pin Controlled by PA3
+AT91C_PA3_RTS0            EQU (AT91C_PIO_PA3) ;-  USART 0 Ready To Send
+AT91C_PA3_SPI1_NPCS2      EQU (AT91C_PIO_PA3) ;-  SPI 1 Peripheral Chip Select 2
+AT91C_PIO_PA30            EQU (1:SHL:30) ;- Pin Controlled by PA30
+AT91C_PA30_IRQ0           EQU (AT91C_PIO_PA30) ;-  External Interrupt 0
+AT91C_PA30_PCK2           EQU (AT91C_PIO_PA30) ;-  PMC Programmable Clock Output 2
+AT91C_PIO_PA4             EQU (1:SHL:4) ;- Pin Controlled by PA4
+AT91C_PA4_CTS0            EQU (AT91C_PIO_PA4) ;-  USART 0 Clear To Send
+AT91C_PA4_SPI1_NPCS3      EQU (AT91C_PIO_PA4) ;-  SPI 1 Peripheral Chip Select 3
+AT91C_PIO_PA5             EQU (1:SHL:5) ;- Pin Controlled by PA5
+AT91C_PA5_RXD1            EQU (AT91C_PIO_PA5) ;-  USART 1 Receive Data
+AT91C_PIO_PA6             EQU (1:SHL:6) ;- Pin Controlled by PA6
+AT91C_PA6_TXD1            EQU (AT91C_PIO_PA6) ;-  USART 1 Transmit Data
+AT91C_PIO_PA7             EQU (1:SHL:7) ;- Pin Controlled by PA7
+AT91C_PA7_SCK1            EQU (AT91C_PIO_PA7) ;-  USART 1 Serial Clock
+AT91C_PA7_SPI0_NPCS1      EQU (AT91C_PIO_PA7) ;-  SPI 0 Peripheral Chip Select 1
+AT91C_PIO_PA8             EQU (1:SHL:8) ;- Pin Controlled by PA8
+AT91C_PA8_RTS1            EQU (AT91C_PIO_PA8) ;-  USART 1 Ready To Send
+AT91C_PA8_SPI0_NPCS2      EQU (AT91C_PIO_PA8) ;-  SPI 0 Peripheral Chip Select 2
+AT91C_PIO_PA9             EQU (1:SHL:9) ;- Pin Controlled by PA9
+AT91C_PA9_CTS1            EQU (AT91C_PIO_PA9) ;-  USART 1 Clear To Send
+AT91C_PA9_SPI0_NPCS3      EQU (AT91C_PIO_PA9) ;-  SPI 0 Peripheral Chip Select 3
+AT91C_PIO_PB0             EQU (1:SHL:0) ;- Pin Controlled by PB0
+AT91C_PB0_ETXCK_EREFCK    EQU (AT91C_PIO_PB0) ;-  Ethernet MAC Transmit Clock/Reference Clock
+AT91C_PB0_PCK0            EQU (AT91C_PIO_PB0) ;-  PMC Programmable Clock Output 0
+AT91C_PIO_PB1             EQU (1:SHL:1) ;- Pin Controlled by PB1
+AT91C_PB1_ETXEN           EQU (AT91C_PIO_PB1) ;-  Ethernet MAC Transmit Enable
+AT91C_PIO_PB10            EQU (1:SHL:10) ;- Pin Controlled by PB10
+AT91C_PB10_ETX2           EQU (AT91C_PIO_PB10) ;-  Ethernet MAC Transmit Data 2
+AT91C_PB10_SPI1_NPCS1     EQU (AT91C_PIO_PB10) ;-  SPI 1 Peripheral Chip Select 1
+AT91C_PIO_PB11            EQU (1:SHL:11) ;- Pin Controlled by PB11
+AT91C_PB11_ETX3           EQU (AT91C_PIO_PB11) ;-  Ethernet MAC Transmit Data 3
+AT91C_PB11_SPI1_NPCS2     EQU (AT91C_PIO_PB11) ;-  SPI 1 Peripheral Chip Select 2
+AT91C_PIO_PB12            EQU (1:SHL:12) ;- Pin Controlled by PB12
+AT91C_PB12_ETXER          EQU (AT91C_PIO_PB12) ;-  Ethernet MAC Transmikt Coding Error
+AT91C_PB12_TCLK0          EQU (AT91C_PIO_PB12) ;-  Timer Counter 0 external clock input
+AT91C_PIO_PB13            EQU (1:SHL:13) ;- Pin Controlled by PB13
+AT91C_PB13_ERX2           EQU (AT91C_PIO_PB13) ;-  Ethernet MAC Receive Data 2
+AT91C_PB13_SPI0_NPCS1     EQU (AT91C_PIO_PB13) ;-  SPI 0 Peripheral Chip Select 1
+AT91C_PIO_PB14            EQU (1:SHL:14) ;- Pin Controlled by PB14
+AT91C_PB14_ERX3           EQU (AT91C_PIO_PB14) ;-  Ethernet MAC Receive Data 3
+AT91C_PB14_SPI0_NPCS2     EQU (AT91C_PIO_PB14) ;-  SPI 0 Peripheral Chip Select 2
+AT91C_PIO_PB15            EQU (1:SHL:15) ;- Pin Controlled by PB15
+AT91C_PB15_ERXDV_ECRSDV   EQU (AT91C_PIO_PB15) ;-  Ethernet MAC Receive Data Valid
+AT91C_PIO_PB16            EQU (1:SHL:16) ;- Pin Controlled by PB16
+AT91C_PB16_ECOL           EQU (AT91C_PIO_PB16) ;-  Ethernet MAC Collision Detected
+AT91C_PB16_SPI1_NPCS3     EQU (AT91C_PIO_PB16) ;-  SPI 1 Peripheral Chip Select 3
+AT91C_PIO_PB17            EQU (1:SHL:17) ;- Pin Controlled by PB17
+AT91C_PB17_ERXCK          EQU (AT91C_PIO_PB17) ;-  Ethernet MAC Receive Clock
+AT91C_PB17_SPI0_NPCS3     EQU (AT91C_PIO_PB17) ;-  SPI 0 Peripheral Chip Select 3
+AT91C_PIO_PB18            EQU (1:SHL:18) ;- Pin Controlled by PB18
+AT91C_PB18_EF100          EQU (AT91C_PIO_PB18) ;-  Ethernet MAC Force 100 Mbits/sec
+AT91C_PB18_ADTRG          EQU (AT91C_PIO_PB18) ;-  ADC External Trigger
+AT91C_PIO_PB19            EQU (1:SHL:19) ;- Pin Controlled by PB19
+AT91C_PB19_PWM0           EQU (AT91C_PIO_PB19) ;-  PWM Channel 0
+AT91C_PB19_TCLK1          EQU (AT91C_PIO_PB19) ;-  Timer Counter 1 external clock input
+AT91C_PIO_PB2             EQU (1:SHL:2) ;- Pin Controlled by PB2
+AT91C_PB2_ETX0            EQU (AT91C_PIO_PB2) ;-  Ethernet MAC Transmit Data 0
+AT91C_PIO_PB20            EQU (1:SHL:20) ;- Pin Controlled by PB20
+AT91C_PB20_PWM1           EQU (AT91C_PIO_PB20) ;-  PWM Channel 1
+AT91C_PB20_PCK0           EQU (AT91C_PIO_PB20) ;-  PMC Programmable Clock Output 0
+AT91C_PIO_PB21            EQU (1:SHL:21) ;- Pin Controlled by PB21
+AT91C_PB21_PWM2           EQU (AT91C_PIO_PB21) ;-  PWM Channel 2
+AT91C_PB21_PCK1           EQU (AT91C_PIO_PB21) ;-  PMC Programmable Clock Output 1
+AT91C_PIO_PB22            EQU (1:SHL:22) ;- Pin Controlled by PB22
+AT91C_PB22_PWM3           EQU (AT91C_PIO_PB22) ;-  PWM Channel 3
+AT91C_PB22_PCK2           EQU (AT91C_PIO_PB22) ;-  PMC Programmable Clock Output 2
+AT91C_PIO_PB23            EQU (1:SHL:23) ;- Pin Controlled by PB23
+AT91C_PB23_TIOA0          EQU (AT91C_PIO_PB23) ;-  Timer Counter 0 Multipurpose Timer I/O Pin A
+AT91C_PB23_DCD1           EQU (AT91C_PIO_PB23) ;-  USART 1 Data Carrier Detect
+AT91C_PIO_PB24            EQU (1:SHL:24) ;- Pin Controlled by PB24
+AT91C_PB24_TIOB0          EQU (AT91C_PIO_PB24) ;-  Timer Counter 0 Multipurpose Timer I/O Pin B
+AT91C_PB24_DSR1           EQU (AT91C_PIO_PB24) ;-  USART 1 Data Set ready
+AT91C_PIO_PB25            EQU (1:SHL:25) ;- Pin Controlled by PB25
+AT91C_PB25_TIOA1          EQU (AT91C_PIO_PB25) ;-  Timer Counter 1 Multipurpose Timer I/O Pin A
+AT91C_PB25_DTR1           EQU (AT91C_PIO_PB25) ;-  USART 1 Data Terminal ready
+AT91C_PIO_PB26            EQU (1:SHL:26) ;- Pin Controlled by PB26
+AT91C_PB26_TIOB1          EQU (AT91C_PIO_PB26) ;-  Timer Counter 1 Multipurpose Timer I/O Pin B
+AT91C_PB26_RI1            EQU (AT91C_PIO_PB26) ;-  USART 1 Ring Indicator
+AT91C_PIO_PB27            EQU (1:SHL:27) ;- Pin Controlled by PB27
+AT91C_PB27_TIOA2          EQU (AT91C_PIO_PB27) ;-  Timer Counter 2 Multipurpose Timer I/O Pin A
+AT91C_PB27_PWM0           EQU (AT91C_PIO_PB27) ;-  PWM Channel 0
+AT91C_PIO_PB28            EQU (1:SHL:28) ;- Pin Controlled by PB28
+AT91C_PB28_TIOB2          EQU (AT91C_PIO_PB28) ;-  Timer Counter 2 Multipurpose Timer I/O Pin B
+AT91C_PB28_PWM1           EQU (AT91C_PIO_PB28) ;-  PWM Channel 1
+AT91C_PIO_PB29            EQU (1:SHL:29) ;- Pin Controlled by PB29
+AT91C_PB29_PCK1           EQU (AT91C_PIO_PB29) ;-  PMC Programmable Clock Output 1
+AT91C_PB29_PWM2           EQU (AT91C_PIO_PB29) ;-  PWM Channel 2
+AT91C_PIO_PB3             EQU (1:SHL:3) ;- Pin Controlled by PB3
+AT91C_PB3_ETX1            EQU (AT91C_PIO_PB3) ;-  Ethernet MAC Transmit Data 1
+AT91C_PIO_PB30            EQU (1:SHL:30) ;- Pin Controlled by PB30
+AT91C_PB30_PCK2           EQU (AT91C_PIO_PB30) ;-  PMC Programmable Clock Output 2
+AT91C_PB30_PWM3           EQU (AT91C_PIO_PB30) ;-  PWM Channel 3
+AT91C_PIO_PB4             EQU (1:SHL:4) ;- Pin Controlled by PB4
+AT91C_PB4_ECRS            EQU (AT91C_PIO_PB4) ;-  Ethernet MAC Carrier Sense/Carrier Sense and Data Valid
+AT91C_PIO_PB5             EQU (1:SHL:5) ;- Pin Controlled by PB5
+AT91C_PB5_ERX0            EQU (AT91C_PIO_PB5) ;-  Ethernet MAC Receive Data 0
+AT91C_PIO_PB6             EQU (1:SHL:6) ;- Pin Controlled by PB6
+AT91C_PB6_ERX1            EQU (AT91C_PIO_PB6) ;-  Ethernet MAC Receive Data 1
+AT91C_PIO_PB7             EQU (1:SHL:7) ;- Pin Controlled by PB7
+AT91C_PB7_ERXER           EQU (AT91C_PIO_PB7) ;-  Ethernet MAC Receive Error
+AT91C_PIO_PB8             EQU (1:SHL:8) ;- Pin Controlled by PB8
+AT91C_PB8_EMDC            EQU (AT91C_PIO_PB8) ;-  Ethernet MAC Management Data Clock
+AT91C_PIO_PB9             EQU (1:SHL:9) ;- Pin Controlled by PB9
+AT91C_PB9_EMDIO           EQU (AT91C_PIO_PB9) ;-  Ethernet MAC Management Data Input/Output
+
+;- *****************************************************************************
+;-               PERIPHERAL ID DEFINITIONS FOR AT91SAM7X256
+;- *****************************************************************************
+AT91C_ID_FIQ              EQU ( 0) ;- Advanced Interrupt Controller (FIQ)
+AT91C_ID_SYS              EQU ( 1) ;- System Peripheral
+AT91C_ID_PIOA             EQU ( 2) ;- Parallel IO Controller A
+AT91C_ID_PIOB             EQU ( 3) ;- Parallel IO Controller B
+AT91C_ID_SPI0             EQU ( 4) ;- Serial Peripheral Interface 0
+AT91C_ID_SPI1             EQU ( 5) ;- Serial Peripheral Interface 1
+AT91C_ID_US0              EQU ( 6) ;- USART 0
+AT91C_ID_US1              EQU ( 7) ;- USART 1
+AT91C_ID_SSC              EQU ( 8) ;- Serial Synchronous Controller
+AT91C_ID_TWI              EQU ( 9) ;- Two-Wire Interface
+AT91C_ID_PWMC             EQU (10) ;- PWM Controller
+AT91C_ID_UDP              EQU (11) ;- USB Device Port
+AT91C_ID_TC0              EQU (12) ;- Timer Counter 0
+AT91C_ID_TC1              EQU (13) ;- Timer Counter 1
+AT91C_ID_TC2              EQU (14) ;- Timer Counter 2
+AT91C_ID_CAN              EQU (15) ;- Control Area Network Controller
+AT91C_ID_EMAC             EQU (16) ;- Ethernet MAC
+AT91C_ID_ADC              EQU (17) ;- Analog-to-Digital Converter
+AT91C_ID_18_Reserved      EQU (18) ;- Reserved
+AT91C_ID_19_Reserved      EQU (19) ;- Reserved
+AT91C_ID_20_Reserved      EQU (20) ;- Reserved
+AT91C_ID_21_Reserved      EQU (21) ;- Reserved
+AT91C_ID_22_Reserved      EQU (22) ;- Reserved
+AT91C_ID_23_Reserved      EQU (23) ;- Reserved
+AT91C_ID_24_Reserved      EQU (24) ;- Reserved
+AT91C_ID_25_Reserved      EQU (25) ;- Reserved
+AT91C_ID_26_Reserved      EQU (26) ;- Reserved
+AT91C_ID_27_Reserved      EQU (27) ;- Reserved
+AT91C_ID_28_Reserved      EQU (28) ;- Reserved
+AT91C_ID_29_Reserved      EQU (29) ;- Reserved
+AT91C_ID_IRQ0             EQU (30) ;- Advanced Interrupt Controller (IRQ0)
+AT91C_ID_IRQ1             EQU (31) ;- Advanced Interrupt Controller (IRQ1)
+AT91C_ALL_INT             EQU (0xC003FFFF) ;- ALL VALID INTERRUPTS
+
+;- *****************************************************************************
+;-               BASE ADDRESS DEFINITIONS FOR AT91SAM7X256
+;- *****************************************************************************
+AT91C_BASE_SYS            EQU (0xFFFFF000) ;- (SYS) Base Address
+AT91C_BASE_AIC            EQU (0xFFFFF000) ;- (AIC) Base Address
+AT91C_BASE_PDC_DBGU       EQU (0xFFFFF300) ;- (PDC_DBGU) Base Address
+AT91C_BASE_DBGU           EQU (0xFFFFF200) ;- (DBGU) Base Address
+AT91C_BASE_PIOA           EQU (0xFFFFF400) ;- (PIOA) Base Address
+AT91C_BASE_PIOB           EQU (0xFFFFF600) ;- (PIOB) Base Address
+AT91C_BASE_CKGR           EQU (0xFFFFFC20) ;- (CKGR) Base Address
+AT91C_BASE_PMC            EQU (0xFFFFFC00) ;- (PMC) Base Address
+AT91C_BASE_RSTC           EQU (0xFFFFFD00) ;- (RSTC) Base Address
+AT91C_BASE_RTTC           EQU (0xFFFFFD20) ;- (RTTC) Base Address
+AT91C_BASE_PITC           EQU (0xFFFFFD30) ;- (PITC) Base Address
+AT91C_BASE_WDTC           EQU (0xFFFFFD40) ;- (WDTC) Base Address
+AT91C_BASE_VREG           EQU (0xFFFFFD60) ;- (VREG) Base Address
+AT91C_BASE_MC             EQU (0xFFFFFF00) ;- (MC) Base Address
+AT91C_BASE_PDC_SPI1       EQU (0xFFFE4100) ;- (PDC_SPI1) Base Address
+AT91C_BASE_SPI1           EQU (0xFFFE4000) ;- (SPI1) Base Address
+AT91C_BASE_PDC_SPI0       EQU (0xFFFE0100) ;- (PDC_SPI0) Base Address
+AT91C_BASE_SPI0           EQU (0xFFFE0000) ;- (SPI0) Base Address
+AT91C_BASE_PDC_US1        EQU (0xFFFC4100) ;- (PDC_US1) Base Address
+AT91C_BASE_US1            EQU (0xFFFC4000) ;- (US1) Base Address
+AT91C_BASE_PDC_US0        EQU (0xFFFC0100) ;- (PDC_US0) Base Address
+AT91C_BASE_US0            EQU (0xFFFC0000) ;- (US0) Base Address
+AT91C_BASE_PDC_SSC        EQU (0xFFFD4100) ;- (PDC_SSC) Base Address
+AT91C_BASE_SSC            EQU (0xFFFD4000) ;- (SSC) Base Address
+AT91C_BASE_TWI            EQU (0xFFFB8000) ;- (TWI) Base Address
+AT91C_BASE_PWMC_CH3       EQU (0xFFFCC260) ;- (PWMC_CH3) Base Address
+AT91C_BASE_PWMC_CH2       EQU (0xFFFCC240) ;- (PWMC_CH2) Base Address
+AT91C_BASE_PWMC_CH1       EQU (0xFFFCC220) ;- (PWMC_CH1) Base Address
+AT91C_BASE_PWMC_CH0       EQU (0xFFFCC200) ;- (PWMC_CH0) Base Address
+AT91C_BASE_PWMC           EQU (0xFFFCC000) ;- (PWMC) Base Address
+AT91C_BASE_UDP            EQU (0xFFFB0000) ;- (UDP) Base Address
+AT91C_BASE_TC0            EQU (0xFFFA0000) ;- (TC0) Base Address
+AT91C_BASE_TC1            EQU (0xFFFA0040) ;- (TC1) Base Address
+AT91C_BASE_TC2            EQU (0xFFFA0080) ;- (TC2) Base Address
+AT91C_BASE_TCB            EQU (0xFFFA0000) ;- (TCB) Base Address
+AT91C_BASE_CAN_MB0        EQU (0xFFFD0200) ;- (CAN_MB0) Base Address
+AT91C_BASE_CAN_MB1        EQU (0xFFFD0220) ;- (CAN_MB1) Base Address
+AT91C_BASE_CAN_MB2        EQU (0xFFFD0240) ;- (CAN_MB2) Base Address
+AT91C_BASE_CAN_MB3        EQU (0xFFFD0260) ;- (CAN_MB3) Base Address
+AT91C_BASE_CAN_MB4        EQU (0xFFFD0280) ;- (CAN_MB4) Base Address
+AT91C_BASE_CAN_MB5        EQU (0xFFFD02A0) ;- (CAN_MB5) Base Address
+AT91C_BASE_CAN_MB6        EQU (0xFFFD02C0) ;- (CAN_MB6) Base Address
+AT91C_BASE_CAN_MB7        EQU (0xFFFD02E0) ;- (CAN_MB7) Base Address
+AT91C_BASE_CAN            EQU (0xFFFD0000) ;- (CAN) Base Address
+AT91C_BASE_EMAC           EQU (0xFFFDC000) ;- (EMAC) Base Address
+AT91C_BASE_PDC_ADC        EQU (0xFFFD8100) ;- (PDC_ADC) Base Address
+AT91C_BASE_ADC            EQU (0xFFFD8000) ;- (ADC) Base Address
+
+;- *****************************************************************************
+;-               MEMORY MAPPING DEFINITIONS FOR AT91SAM7X256
+;- *****************************************************************************
+;- ISRAM
+AT91C_ISRAM               EQU (0x00200000) ;- Internal SRAM base address
+AT91C_ISRAM_SIZE          EQU (0x00010000) ;- Internal SRAM size in byte (64 Kbytes)
+;- IFLASH
+AT91C_IFLASH              EQU (0x00100000) ;- Internal FLASH base address
+AT91C_IFLASH_SIZE         EQU (0x00040000) ;- Internal FLASH size in byte (256 Kbytes)
+AT91C_IFLASH_PAGE_SIZE    EQU (256) ;- Internal FLASH Page Size: 256 bytes
+AT91C_IFLASH_LOCK_REGION_SIZE EQU (16384) ;- Internal FLASH Lock Region Size: 16 Kbytes
+AT91C_IFLASH_NB_OF_PAGES  EQU (1024) ;- Internal FLASH Number of Pages: 1024 bytes
+AT91C_IFLASH_NB_OF_LOCK_BITS EQU (16) ;- Internal FLASH Number of Lock Bits: 16 bytes
+
+
+	END
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/incIAR/AT91SAM7X256.rdf b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/incIAR/AT91SAM7X256.rdf
new file mode 100644
index 000000000..7668f5b4f
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/incIAR/AT91SAM7X256.rdf
@@ -0,0 +1,4704 @@
+# ----------------------------------------------------------------------------
+#          ATMEL Microcontroller Software Support  -  ROUSSET  -
+# ----------------------------------------------------------------------------
+#  DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+#  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+#  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+#  DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+#  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+#  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+#  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+#  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+#  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+# ----------------------------------------------------------------------------
+# File Name           : AT91SAM7X256.h
+# Object              : AT91SAM7X256 definitions
+# Generated           : AT91 SW Application Group  11/02/2005 (15:17:24)
+# 
+# CVS Reference       : /AT91SAM7X256.pl/1.14/Tue Sep 13 15:06:52 2005//
+# CVS Reference       : /SYS_SAM7X.pl/1.3/Tue Feb  1 17:01:43 2005//
+# CVS Reference       : /MC_SAM7X.pl/1.2/Fri May 20 14:13:04 2005//
+# CVS Reference       : /PMC_SAM7X.pl/1.4/Tue Feb  8 13:58:10 2005//
+# CVS Reference       : /RSTC_SAM7X.pl/1.2/Wed Jul 13 14:57:50 2005//
+# CVS Reference       : /UDP_SAM7X.pl/1.1/Tue May 10 11:35:35 2005//
+# CVS Reference       : /PWM_SAM7X.pl/1.1/Tue May 10 11:53:07 2005//
+# CVS Reference       : /AIC_6075B.pl/1.3/Fri May 20 14:01:30 2005//
+# CVS Reference       : /PIO_6057A.pl/1.2/Thu Feb  3 10:18:28 2005//
+# CVS Reference       : /RTTC_6081A.pl/1.2/Tue Nov  9 14:43:58 2004//
+# CVS Reference       : /PITC_6079A.pl/1.2/Tue Nov  9 14:43:56 2004//
+# CVS Reference       : /WDTC_6080A.pl/1.3/Tue Nov  9 14:44:00 2004//
+# CVS Reference       : /VREG_6085B.pl/1.1/Tue Feb  1 16:05:48 2005//
+# CVS Reference       : /PDC_6074C.pl/1.2/Thu Feb  3 08:48:54 2005//
+# CVS Reference       : /DBGU_6059D.pl/1.1/Mon Jan 31 13:15:32 2005//
+# CVS Reference       : /SPI_6088D.pl/1.3/Fri May 20 14:08:59 2005//
+# CVS Reference       : /US_6089C.pl/1.1/Mon Jul 12 18:23:26 2004//
+# CVS Reference       : /SSC_6078B.pl/1.1/Wed Jul 13 15:19:19 2005//
+# CVS Reference       : /TWI_6061A.pl/1.1/Tue Jul 13 07:38:06 2004//
+# CVS Reference       : /TC_6082A.pl/1.7/Fri Mar 11 12:52:17 2005//
+# CVS Reference       : /CAN_6019B.pl/1.1/Tue Mar  8 12:42:22 2005//
+# CVS Reference       : /EMACB_6119A.pl/1.6/Wed Jul 13 15:05:35 2005//
+# CVS Reference       : /ADC_6051C.pl/1.1/Fri Oct 17 09:12:38 2003//
+# ----------------------------------------------------------------------------
+
+rdf.version=1
+
+~sysinclude=arm_default.rdf
+~sysinclude=arm_status.rdf
+# ========== Register definition for SYS peripheral ========== 
+# ========== Register definition for AIC peripheral ========== 
+AT91C_AIC_IVR.name="AT91C_AIC_IVR"
+AT91C_AIC_IVR.description="IRQ Vector Register"
+AT91C_AIC_IVR.helpkey="IRQ Vector Register"
+AT91C_AIC_IVR.access=memorymapped
+AT91C_AIC_IVR.address=0xFFFFF100
+AT91C_AIC_IVR.width=32
+AT91C_AIC_IVR.byteEndian=little
+AT91C_AIC_IVR.permission.write=none
+AT91C_AIC_SMR.name="AT91C_AIC_SMR"
+AT91C_AIC_SMR.description="Source Mode Register"
+AT91C_AIC_SMR.helpkey="Source Mode Register"
+AT91C_AIC_SMR.access=memorymapped
+AT91C_AIC_SMR.address=0xFFFFF000
+AT91C_AIC_SMR.width=32
+AT91C_AIC_SMR.byteEndian=little
+AT91C_AIC_FVR.name="AT91C_AIC_FVR"
+AT91C_AIC_FVR.description="FIQ Vector Register"
+AT91C_AIC_FVR.helpkey="FIQ Vector Register"
+AT91C_AIC_FVR.access=memorymapped
+AT91C_AIC_FVR.address=0xFFFFF104
+AT91C_AIC_FVR.width=32
+AT91C_AIC_FVR.byteEndian=little
+AT91C_AIC_FVR.permission.write=none
+AT91C_AIC_DCR.name="AT91C_AIC_DCR"
+AT91C_AIC_DCR.description="Debug Control Register (Protect)"
+AT91C_AIC_DCR.helpkey="Debug Control Register (Protect)"
+AT91C_AIC_DCR.access=memorymapped
+AT91C_AIC_DCR.address=0xFFFFF138
+AT91C_AIC_DCR.width=32
+AT91C_AIC_DCR.byteEndian=little
+AT91C_AIC_EOICR.name="AT91C_AIC_EOICR"
+AT91C_AIC_EOICR.description="End of Interrupt Command Register"
+AT91C_AIC_EOICR.helpkey="End of Interrupt Command Register"
+AT91C_AIC_EOICR.access=memorymapped
+AT91C_AIC_EOICR.address=0xFFFFF130
+AT91C_AIC_EOICR.width=32
+AT91C_AIC_EOICR.byteEndian=little
+AT91C_AIC_EOICR.type=enum
+AT91C_AIC_EOICR.enum.0.name=*** Write only ***
+AT91C_AIC_EOICR.enum.1.name=Error
+AT91C_AIC_SVR.name="AT91C_AIC_SVR"
+AT91C_AIC_SVR.description="Source Vector Register"
+AT91C_AIC_SVR.helpkey="Source Vector Register"
+AT91C_AIC_SVR.access=memorymapped
+AT91C_AIC_SVR.address=0xFFFFF080
+AT91C_AIC_SVR.width=32
+AT91C_AIC_SVR.byteEndian=little
+AT91C_AIC_FFSR.name="AT91C_AIC_FFSR"
+AT91C_AIC_FFSR.description="Fast Forcing Status Register"
+AT91C_AIC_FFSR.helpkey="Fast Forcing Status Register"
+AT91C_AIC_FFSR.access=memorymapped
+AT91C_AIC_FFSR.address=0xFFFFF148
+AT91C_AIC_FFSR.width=32
+AT91C_AIC_FFSR.byteEndian=little
+AT91C_AIC_FFSR.permission.write=none
+AT91C_AIC_ICCR.name="AT91C_AIC_ICCR"
+AT91C_AIC_ICCR.description="Interrupt Clear Command Register"
+AT91C_AIC_ICCR.helpkey="Interrupt Clear Command Register"
+AT91C_AIC_ICCR.access=memorymapped
+AT91C_AIC_ICCR.address=0xFFFFF128
+AT91C_AIC_ICCR.width=32
+AT91C_AIC_ICCR.byteEndian=little
+AT91C_AIC_ICCR.type=enum
+AT91C_AIC_ICCR.enum.0.name=*** Write only ***
+AT91C_AIC_ICCR.enum.1.name=Error
+AT91C_AIC_ISR.name="AT91C_AIC_ISR"
+AT91C_AIC_ISR.description="Interrupt Status Register"
+AT91C_AIC_ISR.helpkey="Interrupt Status Register"
+AT91C_AIC_ISR.access=memorymapped
+AT91C_AIC_ISR.address=0xFFFFF108
+AT91C_AIC_ISR.width=32
+AT91C_AIC_ISR.byteEndian=little
+AT91C_AIC_ISR.permission.write=none
+AT91C_AIC_IMR.name="AT91C_AIC_IMR"
+AT91C_AIC_IMR.description="Interrupt Mask Register"
+AT91C_AIC_IMR.helpkey="Interrupt Mask Register"
+AT91C_AIC_IMR.access=memorymapped
+AT91C_AIC_IMR.address=0xFFFFF110
+AT91C_AIC_IMR.width=32
+AT91C_AIC_IMR.byteEndian=little
+AT91C_AIC_IMR.permission.write=none
+AT91C_AIC_IPR.name="AT91C_AIC_IPR"
+AT91C_AIC_IPR.description="Interrupt Pending Register"
+AT91C_AIC_IPR.helpkey="Interrupt Pending Register"
+AT91C_AIC_IPR.access=memorymapped
+AT91C_AIC_IPR.address=0xFFFFF10C
+AT91C_AIC_IPR.width=32
+AT91C_AIC_IPR.byteEndian=little
+AT91C_AIC_IPR.permission.write=none
+AT91C_AIC_FFER.name="AT91C_AIC_FFER"
+AT91C_AIC_FFER.description="Fast Forcing Enable Register"
+AT91C_AIC_FFER.helpkey="Fast Forcing Enable Register"
+AT91C_AIC_FFER.access=memorymapped
+AT91C_AIC_FFER.address=0xFFFFF140
+AT91C_AIC_FFER.width=32
+AT91C_AIC_FFER.byteEndian=little
+AT91C_AIC_FFER.type=enum
+AT91C_AIC_FFER.enum.0.name=*** Write only ***
+AT91C_AIC_FFER.enum.1.name=Error
+AT91C_AIC_IECR.name="AT91C_AIC_IECR"
+AT91C_AIC_IECR.description="Interrupt Enable Command Register"
+AT91C_AIC_IECR.helpkey="Interrupt Enable Command Register"
+AT91C_AIC_IECR.access=memorymapped
+AT91C_AIC_IECR.address=0xFFFFF120
+AT91C_AIC_IECR.width=32
+AT91C_AIC_IECR.byteEndian=little
+AT91C_AIC_IECR.type=enum
+AT91C_AIC_IECR.enum.0.name=*** Write only ***
+AT91C_AIC_IECR.enum.1.name=Error
+AT91C_AIC_ISCR.name="AT91C_AIC_ISCR"
+AT91C_AIC_ISCR.description="Interrupt Set Command Register"
+AT91C_AIC_ISCR.helpkey="Interrupt Set Command Register"
+AT91C_AIC_ISCR.access=memorymapped
+AT91C_AIC_ISCR.address=0xFFFFF12C
+AT91C_AIC_ISCR.width=32
+AT91C_AIC_ISCR.byteEndian=little
+AT91C_AIC_ISCR.type=enum
+AT91C_AIC_ISCR.enum.0.name=*** Write only ***
+AT91C_AIC_ISCR.enum.1.name=Error
+AT91C_AIC_FFDR.name="AT91C_AIC_FFDR"
+AT91C_AIC_FFDR.description="Fast Forcing Disable Register"
+AT91C_AIC_FFDR.helpkey="Fast Forcing Disable Register"
+AT91C_AIC_FFDR.access=memorymapped
+AT91C_AIC_FFDR.address=0xFFFFF144
+AT91C_AIC_FFDR.width=32
+AT91C_AIC_FFDR.byteEndian=little
+AT91C_AIC_FFDR.type=enum
+AT91C_AIC_FFDR.enum.0.name=*** Write only ***
+AT91C_AIC_FFDR.enum.1.name=Error
+AT91C_AIC_CISR.name="AT91C_AIC_CISR"
+AT91C_AIC_CISR.description="Core Interrupt Status Register"
+AT91C_AIC_CISR.helpkey="Core Interrupt Status Register"
+AT91C_AIC_CISR.access=memorymapped
+AT91C_AIC_CISR.address=0xFFFFF114
+AT91C_AIC_CISR.width=32
+AT91C_AIC_CISR.byteEndian=little
+AT91C_AIC_CISR.permission.write=none
+AT91C_AIC_IDCR.name="AT91C_AIC_IDCR"
+AT91C_AIC_IDCR.description="Interrupt Disable Command Register"
+AT91C_AIC_IDCR.helpkey="Interrupt Disable Command Register"
+AT91C_AIC_IDCR.access=memorymapped
+AT91C_AIC_IDCR.address=0xFFFFF124
+AT91C_AIC_IDCR.width=32
+AT91C_AIC_IDCR.byteEndian=little
+AT91C_AIC_IDCR.type=enum
+AT91C_AIC_IDCR.enum.0.name=*** Write only ***
+AT91C_AIC_IDCR.enum.1.name=Error
+AT91C_AIC_SPU.name="AT91C_AIC_SPU"
+AT91C_AIC_SPU.description="Spurious Vector Register"
+AT91C_AIC_SPU.helpkey="Spurious Vector Register"
+AT91C_AIC_SPU.access=memorymapped
+AT91C_AIC_SPU.address=0xFFFFF134
+AT91C_AIC_SPU.width=32
+AT91C_AIC_SPU.byteEndian=little
+# ========== Register definition for PDC_DBGU peripheral ========== 
+AT91C_DBGU_TCR.name="AT91C_DBGU_TCR"
+AT91C_DBGU_TCR.description="Transmit Counter Register"
+AT91C_DBGU_TCR.helpkey="Transmit Counter Register"
+AT91C_DBGU_TCR.access=memorymapped
+AT91C_DBGU_TCR.address=0xFFFFF30C
+AT91C_DBGU_TCR.width=32
+AT91C_DBGU_TCR.byteEndian=little
+AT91C_DBGU_RNPR.name="AT91C_DBGU_RNPR"
+AT91C_DBGU_RNPR.description="Receive Next Pointer Register"
+AT91C_DBGU_RNPR.helpkey="Receive Next Pointer Register"
+AT91C_DBGU_RNPR.access=memorymapped
+AT91C_DBGU_RNPR.address=0xFFFFF310
+AT91C_DBGU_RNPR.width=32
+AT91C_DBGU_RNPR.byteEndian=little
+AT91C_DBGU_TNPR.name="AT91C_DBGU_TNPR"
+AT91C_DBGU_TNPR.description="Transmit Next Pointer Register"
+AT91C_DBGU_TNPR.helpkey="Transmit Next Pointer Register"
+AT91C_DBGU_TNPR.access=memorymapped
+AT91C_DBGU_TNPR.address=0xFFFFF318
+AT91C_DBGU_TNPR.width=32
+AT91C_DBGU_TNPR.byteEndian=little
+AT91C_DBGU_TPR.name="AT91C_DBGU_TPR"
+AT91C_DBGU_TPR.description="Transmit Pointer Register"
+AT91C_DBGU_TPR.helpkey="Transmit Pointer Register"
+AT91C_DBGU_TPR.access=memorymapped
+AT91C_DBGU_TPR.address=0xFFFFF308
+AT91C_DBGU_TPR.width=32
+AT91C_DBGU_TPR.byteEndian=little
+AT91C_DBGU_RPR.name="AT91C_DBGU_RPR"
+AT91C_DBGU_RPR.description="Receive Pointer Register"
+AT91C_DBGU_RPR.helpkey="Receive Pointer Register"
+AT91C_DBGU_RPR.access=memorymapped
+AT91C_DBGU_RPR.address=0xFFFFF300
+AT91C_DBGU_RPR.width=32
+AT91C_DBGU_RPR.byteEndian=little
+AT91C_DBGU_RCR.name="AT91C_DBGU_RCR"
+AT91C_DBGU_RCR.description="Receive Counter Register"
+AT91C_DBGU_RCR.helpkey="Receive Counter Register"
+AT91C_DBGU_RCR.access=memorymapped
+AT91C_DBGU_RCR.address=0xFFFFF304
+AT91C_DBGU_RCR.width=32
+AT91C_DBGU_RCR.byteEndian=little
+AT91C_DBGU_RNCR.name="AT91C_DBGU_RNCR"
+AT91C_DBGU_RNCR.description="Receive Next Counter Register"
+AT91C_DBGU_RNCR.helpkey="Receive Next Counter Register"
+AT91C_DBGU_RNCR.access=memorymapped
+AT91C_DBGU_RNCR.address=0xFFFFF314
+AT91C_DBGU_RNCR.width=32
+AT91C_DBGU_RNCR.byteEndian=little
+AT91C_DBGU_PTCR.name="AT91C_DBGU_PTCR"
+AT91C_DBGU_PTCR.description="PDC Transfer Control Register"
+AT91C_DBGU_PTCR.helpkey="PDC Transfer Control Register"
+AT91C_DBGU_PTCR.access=memorymapped
+AT91C_DBGU_PTCR.address=0xFFFFF320
+AT91C_DBGU_PTCR.width=32
+AT91C_DBGU_PTCR.byteEndian=little
+AT91C_DBGU_PTCR.type=enum
+AT91C_DBGU_PTCR.enum.0.name=*** Write only ***
+AT91C_DBGU_PTCR.enum.1.name=Error
+AT91C_DBGU_PTSR.name="AT91C_DBGU_PTSR"
+AT91C_DBGU_PTSR.description="PDC Transfer Status Register"
+AT91C_DBGU_PTSR.helpkey="PDC Transfer Status Register"
+AT91C_DBGU_PTSR.access=memorymapped
+AT91C_DBGU_PTSR.address=0xFFFFF324
+AT91C_DBGU_PTSR.width=32
+AT91C_DBGU_PTSR.byteEndian=little
+AT91C_DBGU_PTSR.permission.write=none
+AT91C_DBGU_TNCR.name="AT91C_DBGU_TNCR"
+AT91C_DBGU_TNCR.description="Transmit Next Counter Register"
+AT91C_DBGU_TNCR.helpkey="Transmit Next Counter Register"
+AT91C_DBGU_TNCR.access=memorymapped
+AT91C_DBGU_TNCR.address=0xFFFFF31C
+AT91C_DBGU_TNCR.width=32
+AT91C_DBGU_TNCR.byteEndian=little
+# ========== Register definition for DBGU peripheral ========== 
+AT91C_DBGU_EXID.name="AT91C_DBGU_EXID"
+AT91C_DBGU_EXID.description="Chip ID Extension Register"
+AT91C_DBGU_EXID.helpkey="Chip ID Extension Register"
+AT91C_DBGU_EXID.access=memorymapped
+AT91C_DBGU_EXID.address=0xFFFFF244
+AT91C_DBGU_EXID.width=32
+AT91C_DBGU_EXID.byteEndian=little
+AT91C_DBGU_EXID.permission.write=none
+AT91C_DBGU_BRGR.name="AT91C_DBGU_BRGR"
+AT91C_DBGU_BRGR.description="Baud Rate Generator Register"
+AT91C_DBGU_BRGR.helpkey="Baud Rate Generator Register"
+AT91C_DBGU_BRGR.access=memorymapped
+AT91C_DBGU_BRGR.address=0xFFFFF220
+AT91C_DBGU_BRGR.width=32
+AT91C_DBGU_BRGR.byteEndian=little
+AT91C_DBGU_IDR.name="AT91C_DBGU_IDR"
+AT91C_DBGU_IDR.description="Interrupt Disable Register"
+AT91C_DBGU_IDR.helpkey="Interrupt Disable Register"
+AT91C_DBGU_IDR.access=memorymapped
+AT91C_DBGU_IDR.address=0xFFFFF20C
+AT91C_DBGU_IDR.width=32
+AT91C_DBGU_IDR.byteEndian=little
+AT91C_DBGU_IDR.type=enum
+AT91C_DBGU_IDR.enum.0.name=*** Write only ***
+AT91C_DBGU_IDR.enum.1.name=Error
+AT91C_DBGU_CSR.name="AT91C_DBGU_CSR"
+AT91C_DBGU_CSR.description="Channel Status Register"
+AT91C_DBGU_CSR.helpkey="Channel Status Register"
+AT91C_DBGU_CSR.access=memorymapped
+AT91C_DBGU_CSR.address=0xFFFFF214
+AT91C_DBGU_CSR.width=32
+AT91C_DBGU_CSR.byteEndian=little
+AT91C_DBGU_CSR.permission.write=none
+AT91C_DBGU_CIDR.name="AT91C_DBGU_CIDR"
+AT91C_DBGU_CIDR.description="Chip ID Register"
+AT91C_DBGU_CIDR.helpkey="Chip ID Register"
+AT91C_DBGU_CIDR.access=memorymapped
+AT91C_DBGU_CIDR.address=0xFFFFF240
+AT91C_DBGU_CIDR.width=32
+AT91C_DBGU_CIDR.byteEndian=little
+AT91C_DBGU_CIDR.permission.write=none
+AT91C_DBGU_MR.name="AT91C_DBGU_MR"
+AT91C_DBGU_MR.description="Mode Register"
+AT91C_DBGU_MR.helpkey="Mode Register"
+AT91C_DBGU_MR.access=memorymapped
+AT91C_DBGU_MR.address=0xFFFFF204
+AT91C_DBGU_MR.width=32
+AT91C_DBGU_MR.byteEndian=little
+AT91C_DBGU_IMR.name="AT91C_DBGU_IMR"
+AT91C_DBGU_IMR.description="Interrupt Mask Register"
+AT91C_DBGU_IMR.helpkey="Interrupt Mask Register"
+AT91C_DBGU_IMR.access=memorymapped
+AT91C_DBGU_IMR.address=0xFFFFF210
+AT91C_DBGU_IMR.width=32
+AT91C_DBGU_IMR.byteEndian=little
+AT91C_DBGU_IMR.permission.write=none
+AT91C_DBGU_CR.name="AT91C_DBGU_CR"
+AT91C_DBGU_CR.description="Control Register"
+AT91C_DBGU_CR.helpkey="Control Register"
+AT91C_DBGU_CR.access=memorymapped
+AT91C_DBGU_CR.address=0xFFFFF200
+AT91C_DBGU_CR.width=32
+AT91C_DBGU_CR.byteEndian=little
+AT91C_DBGU_CR.type=enum
+AT91C_DBGU_CR.enum.0.name=*** Write only ***
+AT91C_DBGU_CR.enum.1.name=Error
+AT91C_DBGU_FNTR.name="AT91C_DBGU_FNTR"
+AT91C_DBGU_FNTR.description="Force NTRST Register"
+AT91C_DBGU_FNTR.helpkey="Force NTRST Register"
+AT91C_DBGU_FNTR.access=memorymapped
+AT91C_DBGU_FNTR.address=0xFFFFF248
+AT91C_DBGU_FNTR.width=32
+AT91C_DBGU_FNTR.byteEndian=little
+AT91C_DBGU_THR.name="AT91C_DBGU_THR"
+AT91C_DBGU_THR.description="Transmitter Holding Register"
+AT91C_DBGU_THR.helpkey="Transmitter Holding Register"
+AT91C_DBGU_THR.access=memorymapped
+AT91C_DBGU_THR.address=0xFFFFF21C
+AT91C_DBGU_THR.width=32
+AT91C_DBGU_THR.byteEndian=little
+AT91C_DBGU_THR.type=enum
+AT91C_DBGU_THR.enum.0.name=*** Write only ***
+AT91C_DBGU_THR.enum.1.name=Error
+AT91C_DBGU_RHR.name="AT91C_DBGU_RHR"
+AT91C_DBGU_RHR.description="Receiver Holding Register"
+AT91C_DBGU_RHR.helpkey="Receiver Holding Register"
+AT91C_DBGU_RHR.access=memorymapped
+AT91C_DBGU_RHR.address=0xFFFFF218
+AT91C_DBGU_RHR.width=32
+AT91C_DBGU_RHR.byteEndian=little
+AT91C_DBGU_RHR.permission.write=none
+AT91C_DBGU_IER.name="AT91C_DBGU_IER"
+AT91C_DBGU_IER.description="Interrupt Enable Register"
+AT91C_DBGU_IER.helpkey="Interrupt Enable Register"
+AT91C_DBGU_IER.access=memorymapped
+AT91C_DBGU_IER.address=0xFFFFF208
+AT91C_DBGU_IER.width=32
+AT91C_DBGU_IER.byteEndian=little
+AT91C_DBGU_IER.type=enum
+AT91C_DBGU_IER.enum.0.name=*** Write only ***
+AT91C_DBGU_IER.enum.1.name=Error
+# ========== Register definition for PIOA peripheral ========== 
+AT91C_PIOA_ODR.name="AT91C_PIOA_ODR"
+AT91C_PIOA_ODR.description="Output Disable Registerr"
+AT91C_PIOA_ODR.helpkey="Output Disable Registerr"
+AT91C_PIOA_ODR.access=memorymapped
+AT91C_PIOA_ODR.address=0xFFFFF414
+AT91C_PIOA_ODR.width=32
+AT91C_PIOA_ODR.byteEndian=little
+AT91C_PIOA_ODR.type=enum
+AT91C_PIOA_ODR.enum.0.name=*** Write only ***
+AT91C_PIOA_ODR.enum.1.name=Error
+AT91C_PIOA_SODR.name="AT91C_PIOA_SODR"
+AT91C_PIOA_SODR.description="Set Output Data Register"
+AT91C_PIOA_SODR.helpkey="Set Output Data Register"
+AT91C_PIOA_SODR.access=memorymapped
+AT91C_PIOA_SODR.address=0xFFFFF430
+AT91C_PIOA_SODR.width=32
+AT91C_PIOA_SODR.byteEndian=little
+AT91C_PIOA_SODR.type=enum
+AT91C_PIOA_SODR.enum.0.name=*** Write only ***
+AT91C_PIOA_SODR.enum.1.name=Error
+AT91C_PIOA_ISR.name="AT91C_PIOA_ISR"
+AT91C_PIOA_ISR.description="Interrupt Status Register"
+AT91C_PIOA_ISR.helpkey="Interrupt Status Register"
+AT91C_PIOA_ISR.access=memorymapped
+AT91C_PIOA_ISR.address=0xFFFFF44C
+AT91C_PIOA_ISR.width=32
+AT91C_PIOA_ISR.byteEndian=little
+AT91C_PIOA_ISR.permission.write=none
+AT91C_PIOA_ABSR.name="AT91C_PIOA_ABSR"
+AT91C_PIOA_ABSR.description="AB Select Status Register"
+AT91C_PIOA_ABSR.helpkey="AB Select Status Register"
+AT91C_PIOA_ABSR.access=memorymapped
+AT91C_PIOA_ABSR.address=0xFFFFF478
+AT91C_PIOA_ABSR.width=32
+AT91C_PIOA_ABSR.byteEndian=little
+AT91C_PIOA_ABSR.permission.write=none
+AT91C_PIOA_IER.name="AT91C_PIOA_IER"
+AT91C_PIOA_IER.description="Interrupt Enable Register"
+AT91C_PIOA_IER.helpkey="Interrupt Enable Register"
+AT91C_PIOA_IER.access=memorymapped
+AT91C_PIOA_IER.address=0xFFFFF440
+AT91C_PIOA_IER.width=32
+AT91C_PIOA_IER.byteEndian=little
+AT91C_PIOA_IER.type=enum
+AT91C_PIOA_IER.enum.0.name=*** Write only ***
+AT91C_PIOA_IER.enum.1.name=Error
+AT91C_PIOA_PPUDR.name="AT91C_PIOA_PPUDR"
+AT91C_PIOA_PPUDR.description="Pull-up Disable Register"
+AT91C_PIOA_PPUDR.helpkey="Pull-up Disable Register"
+AT91C_PIOA_PPUDR.access=memorymapped
+AT91C_PIOA_PPUDR.address=0xFFFFF460
+AT91C_PIOA_PPUDR.width=32
+AT91C_PIOA_PPUDR.byteEndian=little
+AT91C_PIOA_PPUDR.type=enum
+AT91C_PIOA_PPUDR.enum.0.name=*** Write only ***
+AT91C_PIOA_PPUDR.enum.1.name=Error
+AT91C_PIOA_IMR.name="AT91C_PIOA_IMR"
+AT91C_PIOA_IMR.description="Interrupt Mask Register"
+AT91C_PIOA_IMR.helpkey="Interrupt Mask Register"
+AT91C_PIOA_IMR.access=memorymapped
+AT91C_PIOA_IMR.address=0xFFFFF448
+AT91C_PIOA_IMR.width=32
+AT91C_PIOA_IMR.byteEndian=little
+AT91C_PIOA_IMR.permission.write=none
+AT91C_PIOA_PER.name="AT91C_PIOA_PER"
+AT91C_PIOA_PER.description="PIO Enable Register"
+AT91C_PIOA_PER.helpkey="PIO Enable Register"
+AT91C_PIOA_PER.access=memorymapped
+AT91C_PIOA_PER.address=0xFFFFF400
+AT91C_PIOA_PER.width=32
+AT91C_PIOA_PER.byteEndian=little
+AT91C_PIOA_PER.type=enum
+AT91C_PIOA_PER.enum.0.name=*** Write only ***
+AT91C_PIOA_PER.enum.1.name=Error
+AT91C_PIOA_IFDR.name="AT91C_PIOA_IFDR"
+AT91C_PIOA_IFDR.description="Input Filter Disable Register"
+AT91C_PIOA_IFDR.helpkey="Input Filter Disable Register"
+AT91C_PIOA_IFDR.access=memorymapped
+AT91C_PIOA_IFDR.address=0xFFFFF424
+AT91C_PIOA_IFDR.width=32
+AT91C_PIOA_IFDR.byteEndian=little
+AT91C_PIOA_IFDR.type=enum
+AT91C_PIOA_IFDR.enum.0.name=*** Write only ***
+AT91C_PIOA_IFDR.enum.1.name=Error
+AT91C_PIOA_OWDR.name="AT91C_PIOA_OWDR"
+AT91C_PIOA_OWDR.description="Output Write Disable Register"
+AT91C_PIOA_OWDR.helpkey="Output Write Disable Register"
+AT91C_PIOA_OWDR.access=memorymapped
+AT91C_PIOA_OWDR.address=0xFFFFF4A4
+AT91C_PIOA_OWDR.width=32
+AT91C_PIOA_OWDR.byteEndian=little
+AT91C_PIOA_OWDR.type=enum
+AT91C_PIOA_OWDR.enum.0.name=*** Write only ***
+AT91C_PIOA_OWDR.enum.1.name=Error
+AT91C_PIOA_MDSR.name="AT91C_PIOA_MDSR"
+AT91C_PIOA_MDSR.description="Multi-driver Status Register"
+AT91C_PIOA_MDSR.helpkey="Multi-driver Status Register"
+AT91C_PIOA_MDSR.access=memorymapped
+AT91C_PIOA_MDSR.address=0xFFFFF458
+AT91C_PIOA_MDSR.width=32
+AT91C_PIOA_MDSR.byteEndian=little
+AT91C_PIOA_MDSR.permission.write=none
+AT91C_PIOA_IDR.name="AT91C_PIOA_IDR"
+AT91C_PIOA_IDR.description="Interrupt Disable Register"
+AT91C_PIOA_IDR.helpkey="Interrupt Disable Register"
+AT91C_PIOA_IDR.access=memorymapped
+AT91C_PIOA_IDR.address=0xFFFFF444
+AT91C_PIOA_IDR.width=32
+AT91C_PIOA_IDR.byteEndian=little
+AT91C_PIOA_IDR.type=enum
+AT91C_PIOA_IDR.enum.0.name=*** Write only ***
+AT91C_PIOA_IDR.enum.1.name=Error
+AT91C_PIOA_ODSR.name="AT91C_PIOA_ODSR"
+AT91C_PIOA_ODSR.description="Output Data Status Register"
+AT91C_PIOA_ODSR.helpkey="Output Data Status Register"
+AT91C_PIOA_ODSR.access=memorymapped
+AT91C_PIOA_ODSR.address=0xFFFFF438
+AT91C_PIOA_ODSR.width=32
+AT91C_PIOA_ODSR.byteEndian=little
+AT91C_PIOA_ODSR.permission.write=none
+AT91C_PIOA_PPUSR.name="AT91C_PIOA_PPUSR"
+AT91C_PIOA_PPUSR.description="Pull-up Status Register"
+AT91C_PIOA_PPUSR.helpkey="Pull-up Status Register"
+AT91C_PIOA_PPUSR.access=memorymapped
+AT91C_PIOA_PPUSR.address=0xFFFFF468
+AT91C_PIOA_PPUSR.width=32
+AT91C_PIOA_PPUSR.byteEndian=little
+AT91C_PIOA_PPUSR.permission.write=none
+AT91C_PIOA_OWSR.name="AT91C_PIOA_OWSR"
+AT91C_PIOA_OWSR.description="Output Write Status Register"
+AT91C_PIOA_OWSR.helpkey="Output Write Status Register"
+AT91C_PIOA_OWSR.access=memorymapped
+AT91C_PIOA_OWSR.address=0xFFFFF4A8
+AT91C_PIOA_OWSR.width=32
+AT91C_PIOA_OWSR.byteEndian=little
+AT91C_PIOA_OWSR.permission.write=none
+AT91C_PIOA_BSR.name="AT91C_PIOA_BSR"
+AT91C_PIOA_BSR.description="Select B Register"
+AT91C_PIOA_BSR.helpkey="Select B Register"
+AT91C_PIOA_BSR.access=memorymapped
+AT91C_PIOA_BSR.address=0xFFFFF474
+AT91C_PIOA_BSR.width=32
+AT91C_PIOA_BSR.byteEndian=little
+AT91C_PIOA_BSR.type=enum
+AT91C_PIOA_BSR.enum.0.name=*** Write only ***
+AT91C_PIOA_BSR.enum.1.name=Error
+AT91C_PIOA_OWER.name="AT91C_PIOA_OWER"
+AT91C_PIOA_OWER.description="Output Write Enable Register"
+AT91C_PIOA_OWER.helpkey="Output Write Enable Register"
+AT91C_PIOA_OWER.access=memorymapped
+AT91C_PIOA_OWER.address=0xFFFFF4A0
+AT91C_PIOA_OWER.width=32
+AT91C_PIOA_OWER.byteEndian=little
+AT91C_PIOA_OWER.type=enum
+AT91C_PIOA_OWER.enum.0.name=*** Write only ***
+AT91C_PIOA_OWER.enum.1.name=Error
+AT91C_PIOA_IFER.name="AT91C_PIOA_IFER"
+AT91C_PIOA_IFER.description="Input Filter Enable Register"
+AT91C_PIOA_IFER.helpkey="Input Filter Enable Register"
+AT91C_PIOA_IFER.access=memorymapped
+AT91C_PIOA_IFER.address=0xFFFFF420
+AT91C_PIOA_IFER.width=32
+AT91C_PIOA_IFER.byteEndian=little
+AT91C_PIOA_IFER.type=enum
+AT91C_PIOA_IFER.enum.0.name=*** Write only ***
+AT91C_PIOA_IFER.enum.1.name=Error
+AT91C_PIOA_PDSR.name="AT91C_PIOA_PDSR"
+AT91C_PIOA_PDSR.description="Pin Data Status Register"
+AT91C_PIOA_PDSR.helpkey="Pin Data Status Register"
+AT91C_PIOA_PDSR.access=memorymapped
+AT91C_PIOA_PDSR.address=0xFFFFF43C
+AT91C_PIOA_PDSR.width=32
+AT91C_PIOA_PDSR.byteEndian=little
+AT91C_PIOA_PDSR.permission.write=none
+AT91C_PIOA_PPUER.name="AT91C_PIOA_PPUER"
+AT91C_PIOA_PPUER.description="Pull-up Enable Register"
+AT91C_PIOA_PPUER.helpkey="Pull-up Enable Register"
+AT91C_PIOA_PPUER.access=memorymapped
+AT91C_PIOA_PPUER.address=0xFFFFF464
+AT91C_PIOA_PPUER.width=32
+AT91C_PIOA_PPUER.byteEndian=little
+AT91C_PIOA_PPUER.type=enum
+AT91C_PIOA_PPUER.enum.0.name=*** Write only ***
+AT91C_PIOA_PPUER.enum.1.name=Error
+AT91C_PIOA_OSR.name="AT91C_PIOA_OSR"
+AT91C_PIOA_OSR.description="Output Status Register"
+AT91C_PIOA_OSR.helpkey="Output Status Register"
+AT91C_PIOA_OSR.access=memorymapped
+AT91C_PIOA_OSR.address=0xFFFFF418
+AT91C_PIOA_OSR.width=32
+AT91C_PIOA_OSR.byteEndian=little
+AT91C_PIOA_OSR.permission.write=none
+AT91C_PIOA_ASR.name="AT91C_PIOA_ASR"
+AT91C_PIOA_ASR.description="Select A Register"
+AT91C_PIOA_ASR.helpkey="Select A Register"
+AT91C_PIOA_ASR.access=memorymapped
+AT91C_PIOA_ASR.address=0xFFFFF470
+AT91C_PIOA_ASR.width=32
+AT91C_PIOA_ASR.byteEndian=little
+AT91C_PIOA_ASR.type=enum
+AT91C_PIOA_ASR.enum.0.name=*** Write only ***
+AT91C_PIOA_ASR.enum.1.name=Error
+AT91C_PIOA_MDDR.name="AT91C_PIOA_MDDR"
+AT91C_PIOA_MDDR.description="Multi-driver Disable Register"
+AT91C_PIOA_MDDR.helpkey="Multi-driver Disable Register"
+AT91C_PIOA_MDDR.access=memorymapped
+AT91C_PIOA_MDDR.address=0xFFFFF454
+AT91C_PIOA_MDDR.width=32
+AT91C_PIOA_MDDR.byteEndian=little
+AT91C_PIOA_MDDR.type=enum
+AT91C_PIOA_MDDR.enum.0.name=*** Write only ***
+AT91C_PIOA_MDDR.enum.1.name=Error
+AT91C_PIOA_CODR.name="AT91C_PIOA_CODR"
+AT91C_PIOA_CODR.description="Clear Output Data Register"
+AT91C_PIOA_CODR.helpkey="Clear Output Data Register"
+AT91C_PIOA_CODR.access=memorymapped
+AT91C_PIOA_CODR.address=0xFFFFF434
+AT91C_PIOA_CODR.width=32
+AT91C_PIOA_CODR.byteEndian=little
+AT91C_PIOA_CODR.type=enum
+AT91C_PIOA_CODR.enum.0.name=*** Write only ***
+AT91C_PIOA_CODR.enum.1.name=Error
+AT91C_PIOA_MDER.name="AT91C_PIOA_MDER"
+AT91C_PIOA_MDER.description="Multi-driver Enable Register"
+AT91C_PIOA_MDER.helpkey="Multi-driver Enable Register"
+AT91C_PIOA_MDER.access=memorymapped
+AT91C_PIOA_MDER.address=0xFFFFF450
+AT91C_PIOA_MDER.width=32
+AT91C_PIOA_MDER.byteEndian=little
+AT91C_PIOA_MDER.type=enum
+AT91C_PIOA_MDER.enum.0.name=*** Write only ***
+AT91C_PIOA_MDER.enum.1.name=Error
+AT91C_PIOA_PDR.name="AT91C_PIOA_PDR"
+AT91C_PIOA_PDR.description="PIO Disable Register"
+AT91C_PIOA_PDR.helpkey="PIO Disable Register"
+AT91C_PIOA_PDR.access=memorymapped
+AT91C_PIOA_PDR.address=0xFFFFF404
+AT91C_PIOA_PDR.width=32
+AT91C_PIOA_PDR.byteEndian=little
+AT91C_PIOA_PDR.type=enum
+AT91C_PIOA_PDR.enum.0.name=*** Write only ***
+AT91C_PIOA_PDR.enum.1.name=Error
+AT91C_PIOA_IFSR.name="AT91C_PIOA_IFSR"
+AT91C_PIOA_IFSR.description="Input Filter Status Register"
+AT91C_PIOA_IFSR.helpkey="Input Filter Status Register"
+AT91C_PIOA_IFSR.access=memorymapped
+AT91C_PIOA_IFSR.address=0xFFFFF428
+AT91C_PIOA_IFSR.width=32
+AT91C_PIOA_IFSR.byteEndian=little
+AT91C_PIOA_IFSR.permission.write=none
+AT91C_PIOA_OER.name="AT91C_PIOA_OER"
+AT91C_PIOA_OER.description="Output Enable Register"
+AT91C_PIOA_OER.helpkey="Output Enable Register"
+AT91C_PIOA_OER.access=memorymapped
+AT91C_PIOA_OER.address=0xFFFFF410
+AT91C_PIOA_OER.width=32
+AT91C_PIOA_OER.byteEndian=little
+AT91C_PIOA_OER.type=enum
+AT91C_PIOA_OER.enum.0.name=*** Write only ***
+AT91C_PIOA_OER.enum.1.name=Error
+AT91C_PIOA_PSR.name="AT91C_PIOA_PSR"
+AT91C_PIOA_PSR.description="PIO Status Register"
+AT91C_PIOA_PSR.helpkey="PIO Status Register"
+AT91C_PIOA_PSR.access=memorymapped
+AT91C_PIOA_PSR.address=0xFFFFF408
+AT91C_PIOA_PSR.width=32
+AT91C_PIOA_PSR.byteEndian=little
+AT91C_PIOA_PSR.permission.write=none
+# ========== Register definition for PIOB peripheral ========== 
+AT91C_PIOB_OWDR.name="AT91C_PIOB_OWDR"
+AT91C_PIOB_OWDR.description="Output Write Disable Register"
+AT91C_PIOB_OWDR.helpkey="Output Write Disable Register"
+AT91C_PIOB_OWDR.access=memorymapped
+AT91C_PIOB_OWDR.address=0xFFFFF6A4
+AT91C_PIOB_OWDR.width=32
+AT91C_PIOB_OWDR.byteEndian=little
+AT91C_PIOB_OWDR.type=enum
+AT91C_PIOB_OWDR.enum.0.name=*** Write only ***
+AT91C_PIOB_OWDR.enum.1.name=Error
+AT91C_PIOB_MDER.name="AT91C_PIOB_MDER"
+AT91C_PIOB_MDER.description="Multi-driver Enable Register"
+AT91C_PIOB_MDER.helpkey="Multi-driver Enable Register"
+AT91C_PIOB_MDER.access=memorymapped
+AT91C_PIOB_MDER.address=0xFFFFF650
+AT91C_PIOB_MDER.width=32
+AT91C_PIOB_MDER.byteEndian=little
+AT91C_PIOB_MDER.type=enum
+AT91C_PIOB_MDER.enum.0.name=*** Write only ***
+AT91C_PIOB_MDER.enum.1.name=Error
+AT91C_PIOB_PPUSR.name="AT91C_PIOB_PPUSR"
+AT91C_PIOB_PPUSR.description="Pull-up Status Register"
+AT91C_PIOB_PPUSR.helpkey="Pull-up Status Register"
+AT91C_PIOB_PPUSR.access=memorymapped
+AT91C_PIOB_PPUSR.address=0xFFFFF668
+AT91C_PIOB_PPUSR.width=32
+AT91C_PIOB_PPUSR.byteEndian=little
+AT91C_PIOB_PPUSR.permission.write=none
+AT91C_PIOB_IMR.name="AT91C_PIOB_IMR"
+AT91C_PIOB_IMR.description="Interrupt Mask Register"
+AT91C_PIOB_IMR.helpkey="Interrupt Mask Register"
+AT91C_PIOB_IMR.access=memorymapped
+AT91C_PIOB_IMR.address=0xFFFFF648
+AT91C_PIOB_IMR.width=32
+AT91C_PIOB_IMR.byteEndian=little
+AT91C_PIOB_IMR.permission.write=none
+AT91C_PIOB_ASR.name="AT91C_PIOB_ASR"
+AT91C_PIOB_ASR.description="Select A Register"
+AT91C_PIOB_ASR.helpkey="Select A Register"
+AT91C_PIOB_ASR.access=memorymapped
+AT91C_PIOB_ASR.address=0xFFFFF670
+AT91C_PIOB_ASR.width=32
+AT91C_PIOB_ASR.byteEndian=little
+AT91C_PIOB_ASR.type=enum
+AT91C_PIOB_ASR.enum.0.name=*** Write only ***
+AT91C_PIOB_ASR.enum.1.name=Error
+AT91C_PIOB_PPUDR.name="AT91C_PIOB_PPUDR"
+AT91C_PIOB_PPUDR.description="Pull-up Disable Register"
+AT91C_PIOB_PPUDR.helpkey="Pull-up Disable Register"
+AT91C_PIOB_PPUDR.access=memorymapped
+AT91C_PIOB_PPUDR.address=0xFFFFF660
+AT91C_PIOB_PPUDR.width=32
+AT91C_PIOB_PPUDR.byteEndian=little
+AT91C_PIOB_PPUDR.type=enum
+AT91C_PIOB_PPUDR.enum.0.name=*** Write only ***
+AT91C_PIOB_PPUDR.enum.1.name=Error
+AT91C_PIOB_PSR.name="AT91C_PIOB_PSR"
+AT91C_PIOB_PSR.description="PIO Status Register"
+AT91C_PIOB_PSR.helpkey="PIO Status Register"
+AT91C_PIOB_PSR.access=memorymapped
+AT91C_PIOB_PSR.address=0xFFFFF608
+AT91C_PIOB_PSR.width=32
+AT91C_PIOB_PSR.byteEndian=little
+AT91C_PIOB_PSR.permission.write=none
+AT91C_PIOB_IER.name="AT91C_PIOB_IER"
+AT91C_PIOB_IER.description="Interrupt Enable Register"
+AT91C_PIOB_IER.helpkey="Interrupt Enable Register"
+AT91C_PIOB_IER.access=memorymapped
+AT91C_PIOB_IER.address=0xFFFFF640
+AT91C_PIOB_IER.width=32
+AT91C_PIOB_IER.byteEndian=little
+AT91C_PIOB_IER.type=enum
+AT91C_PIOB_IER.enum.0.name=*** Write only ***
+AT91C_PIOB_IER.enum.1.name=Error
+AT91C_PIOB_CODR.name="AT91C_PIOB_CODR"
+AT91C_PIOB_CODR.description="Clear Output Data Register"
+AT91C_PIOB_CODR.helpkey="Clear Output Data Register"
+AT91C_PIOB_CODR.access=memorymapped
+AT91C_PIOB_CODR.address=0xFFFFF634
+AT91C_PIOB_CODR.width=32
+AT91C_PIOB_CODR.byteEndian=little
+AT91C_PIOB_CODR.type=enum
+AT91C_PIOB_CODR.enum.0.name=*** Write only ***
+AT91C_PIOB_CODR.enum.1.name=Error
+AT91C_PIOB_OWER.name="AT91C_PIOB_OWER"
+AT91C_PIOB_OWER.description="Output Write Enable Register"
+AT91C_PIOB_OWER.helpkey="Output Write Enable Register"
+AT91C_PIOB_OWER.access=memorymapped
+AT91C_PIOB_OWER.address=0xFFFFF6A0
+AT91C_PIOB_OWER.width=32
+AT91C_PIOB_OWER.byteEndian=little
+AT91C_PIOB_OWER.type=enum
+AT91C_PIOB_OWER.enum.0.name=*** Write only ***
+AT91C_PIOB_OWER.enum.1.name=Error
+AT91C_PIOB_ABSR.name="AT91C_PIOB_ABSR"
+AT91C_PIOB_ABSR.description="AB Select Status Register"
+AT91C_PIOB_ABSR.helpkey="AB Select Status Register"
+AT91C_PIOB_ABSR.access=memorymapped
+AT91C_PIOB_ABSR.address=0xFFFFF678
+AT91C_PIOB_ABSR.width=32
+AT91C_PIOB_ABSR.byteEndian=little
+AT91C_PIOB_ABSR.permission.write=none
+AT91C_PIOB_IFDR.name="AT91C_PIOB_IFDR"
+AT91C_PIOB_IFDR.description="Input Filter Disable Register"
+AT91C_PIOB_IFDR.helpkey="Input Filter Disable Register"
+AT91C_PIOB_IFDR.access=memorymapped
+AT91C_PIOB_IFDR.address=0xFFFFF624
+AT91C_PIOB_IFDR.width=32
+AT91C_PIOB_IFDR.byteEndian=little
+AT91C_PIOB_IFDR.type=enum
+AT91C_PIOB_IFDR.enum.0.name=*** Write only ***
+AT91C_PIOB_IFDR.enum.1.name=Error
+AT91C_PIOB_PDSR.name="AT91C_PIOB_PDSR"
+AT91C_PIOB_PDSR.description="Pin Data Status Register"
+AT91C_PIOB_PDSR.helpkey="Pin Data Status Register"
+AT91C_PIOB_PDSR.access=memorymapped
+AT91C_PIOB_PDSR.address=0xFFFFF63C
+AT91C_PIOB_PDSR.width=32
+AT91C_PIOB_PDSR.byteEndian=little
+AT91C_PIOB_PDSR.permission.write=none
+AT91C_PIOB_IDR.name="AT91C_PIOB_IDR"
+AT91C_PIOB_IDR.description="Interrupt Disable Register"
+AT91C_PIOB_IDR.helpkey="Interrupt Disable Register"
+AT91C_PIOB_IDR.access=memorymapped
+AT91C_PIOB_IDR.address=0xFFFFF644
+AT91C_PIOB_IDR.width=32
+AT91C_PIOB_IDR.byteEndian=little
+AT91C_PIOB_IDR.type=enum
+AT91C_PIOB_IDR.enum.0.name=*** Write only ***
+AT91C_PIOB_IDR.enum.1.name=Error
+AT91C_PIOB_OWSR.name="AT91C_PIOB_OWSR"
+AT91C_PIOB_OWSR.description="Output Write Status Register"
+AT91C_PIOB_OWSR.helpkey="Output Write Status Register"
+AT91C_PIOB_OWSR.access=memorymapped
+AT91C_PIOB_OWSR.address=0xFFFFF6A8
+AT91C_PIOB_OWSR.width=32
+AT91C_PIOB_OWSR.byteEndian=little
+AT91C_PIOB_OWSR.permission.write=none
+AT91C_PIOB_PDR.name="AT91C_PIOB_PDR"
+AT91C_PIOB_PDR.description="PIO Disable Register"
+AT91C_PIOB_PDR.helpkey="PIO Disable Register"
+AT91C_PIOB_PDR.access=memorymapped
+AT91C_PIOB_PDR.address=0xFFFFF604
+AT91C_PIOB_PDR.width=32
+AT91C_PIOB_PDR.byteEndian=little
+AT91C_PIOB_PDR.type=enum
+AT91C_PIOB_PDR.enum.0.name=*** Write only ***
+AT91C_PIOB_PDR.enum.1.name=Error
+AT91C_PIOB_ODR.name="AT91C_PIOB_ODR"
+AT91C_PIOB_ODR.description="Output Disable Registerr"
+AT91C_PIOB_ODR.helpkey="Output Disable Registerr"
+AT91C_PIOB_ODR.access=memorymapped
+AT91C_PIOB_ODR.address=0xFFFFF614
+AT91C_PIOB_ODR.width=32
+AT91C_PIOB_ODR.byteEndian=little
+AT91C_PIOB_ODR.type=enum
+AT91C_PIOB_ODR.enum.0.name=*** Write only ***
+AT91C_PIOB_ODR.enum.1.name=Error
+AT91C_PIOB_IFSR.name="AT91C_PIOB_IFSR"
+AT91C_PIOB_IFSR.description="Input Filter Status Register"
+AT91C_PIOB_IFSR.helpkey="Input Filter Status Register"
+AT91C_PIOB_IFSR.access=memorymapped
+AT91C_PIOB_IFSR.address=0xFFFFF628
+AT91C_PIOB_IFSR.width=32
+AT91C_PIOB_IFSR.byteEndian=little
+AT91C_PIOB_IFSR.permission.write=none
+AT91C_PIOB_PPUER.name="AT91C_PIOB_PPUER"
+AT91C_PIOB_PPUER.description="Pull-up Enable Register"
+AT91C_PIOB_PPUER.helpkey="Pull-up Enable Register"
+AT91C_PIOB_PPUER.access=memorymapped
+AT91C_PIOB_PPUER.address=0xFFFFF664
+AT91C_PIOB_PPUER.width=32
+AT91C_PIOB_PPUER.byteEndian=little
+AT91C_PIOB_PPUER.type=enum
+AT91C_PIOB_PPUER.enum.0.name=*** Write only ***
+AT91C_PIOB_PPUER.enum.1.name=Error
+AT91C_PIOB_SODR.name="AT91C_PIOB_SODR"
+AT91C_PIOB_SODR.description="Set Output Data Register"
+AT91C_PIOB_SODR.helpkey="Set Output Data Register"
+AT91C_PIOB_SODR.access=memorymapped
+AT91C_PIOB_SODR.address=0xFFFFF630
+AT91C_PIOB_SODR.width=32
+AT91C_PIOB_SODR.byteEndian=little
+AT91C_PIOB_SODR.type=enum
+AT91C_PIOB_SODR.enum.0.name=*** Write only ***
+AT91C_PIOB_SODR.enum.1.name=Error
+AT91C_PIOB_ISR.name="AT91C_PIOB_ISR"
+AT91C_PIOB_ISR.description="Interrupt Status Register"
+AT91C_PIOB_ISR.helpkey="Interrupt Status Register"
+AT91C_PIOB_ISR.access=memorymapped
+AT91C_PIOB_ISR.address=0xFFFFF64C
+AT91C_PIOB_ISR.width=32
+AT91C_PIOB_ISR.byteEndian=little
+AT91C_PIOB_ISR.permission.write=none
+AT91C_PIOB_ODSR.name="AT91C_PIOB_ODSR"
+AT91C_PIOB_ODSR.description="Output Data Status Register"
+AT91C_PIOB_ODSR.helpkey="Output Data Status Register"
+AT91C_PIOB_ODSR.access=memorymapped
+AT91C_PIOB_ODSR.address=0xFFFFF638
+AT91C_PIOB_ODSR.width=32
+AT91C_PIOB_ODSR.byteEndian=little
+AT91C_PIOB_ODSR.permission.write=none
+AT91C_PIOB_OSR.name="AT91C_PIOB_OSR"
+AT91C_PIOB_OSR.description="Output Status Register"
+AT91C_PIOB_OSR.helpkey="Output Status Register"
+AT91C_PIOB_OSR.access=memorymapped
+AT91C_PIOB_OSR.address=0xFFFFF618
+AT91C_PIOB_OSR.width=32
+AT91C_PIOB_OSR.byteEndian=little
+AT91C_PIOB_OSR.permission.write=none
+AT91C_PIOB_MDSR.name="AT91C_PIOB_MDSR"
+AT91C_PIOB_MDSR.description="Multi-driver Status Register"
+AT91C_PIOB_MDSR.helpkey="Multi-driver Status Register"
+AT91C_PIOB_MDSR.access=memorymapped
+AT91C_PIOB_MDSR.address=0xFFFFF658
+AT91C_PIOB_MDSR.width=32
+AT91C_PIOB_MDSR.byteEndian=little
+AT91C_PIOB_MDSR.permission.write=none
+AT91C_PIOB_IFER.name="AT91C_PIOB_IFER"
+AT91C_PIOB_IFER.description="Input Filter Enable Register"
+AT91C_PIOB_IFER.helpkey="Input Filter Enable Register"
+AT91C_PIOB_IFER.access=memorymapped
+AT91C_PIOB_IFER.address=0xFFFFF620
+AT91C_PIOB_IFER.width=32
+AT91C_PIOB_IFER.byteEndian=little
+AT91C_PIOB_IFER.type=enum
+AT91C_PIOB_IFER.enum.0.name=*** Write only ***
+AT91C_PIOB_IFER.enum.1.name=Error
+AT91C_PIOB_BSR.name="AT91C_PIOB_BSR"
+AT91C_PIOB_BSR.description="Select B Register"
+AT91C_PIOB_BSR.helpkey="Select B Register"
+AT91C_PIOB_BSR.access=memorymapped
+AT91C_PIOB_BSR.address=0xFFFFF674
+AT91C_PIOB_BSR.width=32
+AT91C_PIOB_BSR.byteEndian=little
+AT91C_PIOB_BSR.type=enum
+AT91C_PIOB_BSR.enum.0.name=*** Write only ***
+AT91C_PIOB_BSR.enum.1.name=Error
+AT91C_PIOB_MDDR.name="AT91C_PIOB_MDDR"
+AT91C_PIOB_MDDR.description="Multi-driver Disable Register"
+AT91C_PIOB_MDDR.helpkey="Multi-driver Disable Register"
+AT91C_PIOB_MDDR.access=memorymapped
+AT91C_PIOB_MDDR.address=0xFFFFF654
+AT91C_PIOB_MDDR.width=32
+AT91C_PIOB_MDDR.byteEndian=little
+AT91C_PIOB_MDDR.type=enum
+AT91C_PIOB_MDDR.enum.0.name=*** Write only ***
+AT91C_PIOB_MDDR.enum.1.name=Error
+AT91C_PIOB_OER.name="AT91C_PIOB_OER"
+AT91C_PIOB_OER.description="Output Enable Register"
+AT91C_PIOB_OER.helpkey="Output Enable Register"
+AT91C_PIOB_OER.access=memorymapped
+AT91C_PIOB_OER.address=0xFFFFF610
+AT91C_PIOB_OER.width=32
+AT91C_PIOB_OER.byteEndian=little
+AT91C_PIOB_OER.type=enum
+AT91C_PIOB_OER.enum.0.name=*** Write only ***
+AT91C_PIOB_OER.enum.1.name=Error
+AT91C_PIOB_PER.name="AT91C_PIOB_PER"
+AT91C_PIOB_PER.description="PIO Enable Register"
+AT91C_PIOB_PER.helpkey="PIO Enable Register"
+AT91C_PIOB_PER.access=memorymapped
+AT91C_PIOB_PER.address=0xFFFFF600
+AT91C_PIOB_PER.width=32
+AT91C_PIOB_PER.byteEndian=little
+AT91C_PIOB_PER.type=enum
+AT91C_PIOB_PER.enum.0.name=*** Write only ***
+AT91C_PIOB_PER.enum.1.name=Error
+# ========== Register definition for CKGR peripheral ========== 
+AT91C_CKGR_MOR.name="AT91C_CKGR_MOR"
+AT91C_CKGR_MOR.description="Main Oscillator Register"
+AT91C_CKGR_MOR.helpkey="Main Oscillator Register"
+AT91C_CKGR_MOR.access=memorymapped
+AT91C_CKGR_MOR.address=0xFFFFFC20
+AT91C_CKGR_MOR.width=32
+AT91C_CKGR_MOR.byteEndian=little
+AT91C_CKGR_PLLR.name="AT91C_CKGR_PLLR"
+AT91C_CKGR_PLLR.description="PLL Register"
+AT91C_CKGR_PLLR.helpkey="PLL Register"
+AT91C_CKGR_PLLR.access=memorymapped
+AT91C_CKGR_PLLR.address=0xFFFFFC2C
+AT91C_CKGR_PLLR.width=32
+AT91C_CKGR_PLLR.byteEndian=little
+AT91C_CKGR_MCFR.name="AT91C_CKGR_MCFR"
+AT91C_CKGR_MCFR.description="Main Clock  Frequency Register"
+AT91C_CKGR_MCFR.helpkey="Main Clock  Frequency Register"
+AT91C_CKGR_MCFR.access=memorymapped
+AT91C_CKGR_MCFR.address=0xFFFFFC24
+AT91C_CKGR_MCFR.width=32
+AT91C_CKGR_MCFR.byteEndian=little
+AT91C_CKGR_MCFR.permission.write=none
+# ========== Register definition for PMC peripheral ========== 
+AT91C_PMC_IDR.name="AT91C_PMC_IDR"
+AT91C_PMC_IDR.description="Interrupt Disable Register"
+AT91C_PMC_IDR.helpkey="Interrupt Disable Register"
+AT91C_PMC_IDR.access=memorymapped
+AT91C_PMC_IDR.address=0xFFFFFC64
+AT91C_PMC_IDR.width=32
+AT91C_PMC_IDR.byteEndian=little
+AT91C_PMC_IDR.type=enum
+AT91C_PMC_IDR.enum.0.name=*** Write only ***
+AT91C_PMC_IDR.enum.1.name=Error
+AT91C_PMC_MOR.name="AT91C_PMC_MOR"
+AT91C_PMC_MOR.description="Main Oscillator Register"
+AT91C_PMC_MOR.helpkey="Main Oscillator Register"
+AT91C_PMC_MOR.access=memorymapped
+AT91C_PMC_MOR.address=0xFFFFFC20
+AT91C_PMC_MOR.width=32
+AT91C_PMC_MOR.byteEndian=little
+AT91C_PMC_PLLR.name="AT91C_PMC_PLLR"
+AT91C_PMC_PLLR.description="PLL Register"
+AT91C_PMC_PLLR.helpkey="PLL Register"
+AT91C_PMC_PLLR.access=memorymapped
+AT91C_PMC_PLLR.address=0xFFFFFC2C
+AT91C_PMC_PLLR.width=32
+AT91C_PMC_PLLR.byteEndian=little
+AT91C_PMC_PCER.name="AT91C_PMC_PCER"
+AT91C_PMC_PCER.description="Peripheral Clock Enable Register"
+AT91C_PMC_PCER.helpkey="Peripheral Clock Enable Register"
+AT91C_PMC_PCER.access=memorymapped
+AT91C_PMC_PCER.address=0xFFFFFC10
+AT91C_PMC_PCER.width=32
+AT91C_PMC_PCER.byteEndian=little
+AT91C_PMC_PCER.type=enum
+AT91C_PMC_PCER.enum.0.name=*** Write only ***
+AT91C_PMC_PCER.enum.1.name=Error
+AT91C_PMC_PCKR.name="AT91C_PMC_PCKR"
+AT91C_PMC_PCKR.description="Programmable Clock Register"
+AT91C_PMC_PCKR.helpkey="Programmable Clock Register"
+AT91C_PMC_PCKR.access=memorymapped
+AT91C_PMC_PCKR.address=0xFFFFFC40
+AT91C_PMC_PCKR.width=32
+AT91C_PMC_PCKR.byteEndian=little
+AT91C_PMC_MCKR.name="AT91C_PMC_MCKR"
+AT91C_PMC_MCKR.description="Master Clock Register"
+AT91C_PMC_MCKR.helpkey="Master Clock Register"
+AT91C_PMC_MCKR.access=memorymapped
+AT91C_PMC_MCKR.address=0xFFFFFC30
+AT91C_PMC_MCKR.width=32
+AT91C_PMC_MCKR.byteEndian=little
+AT91C_PMC_SCDR.name="AT91C_PMC_SCDR"
+AT91C_PMC_SCDR.description="System Clock Disable Register"
+AT91C_PMC_SCDR.helpkey="System Clock Disable Register"
+AT91C_PMC_SCDR.access=memorymapped
+AT91C_PMC_SCDR.address=0xFFFFFC04
+AT91C_PMC_SCDR.width=32
+AT91C_PMC_SCDR.byteEndian=little
+AT91C_PMC_SCDR.type=enum
+AT91C_PMC_SCDR.enum.0.name=*** Write only ***
+AT91C_PMC_SCDR.enum.1.name=Error
+AT91C_PMC_PCDR.name="AT91C_PMC_PCDR"
+AT91C_PMC_PCDR.description="Peripheral Clock Disable Register"
+AT91C_PMC_PCDR.helpkey="Peripheral Clock Disable Register"
+AT91C_PMC_PCDR.access=memorymapped
+AT91C_PMC_PCDR.address=0xFFFFFC14
+AT91C_PMC_PCDR.width=32
+AT91C_PMC_PCDR.byteEndian=little
+AT91C_PMC_PCDR.type=enum
+AT91C_PMC_PCDR.enum.0.name=*** Write only ***
+AT91C_PMC_PCDR.enum.1.name=Error
+AT91C_PMC_SCSR.name="AT91C_PMC_SCSR"
+AT91C_PMC_SCSR.description="System Clock Status Register"
+AT91C_PMC_SCSR.helpkey="System Clock Status Register"
+AT91C_PMC_SCSR.access=memorymapped
+AT91C_PMC_SCSR.address=0xFFFFFC08
+AT91C_PMC_SCSR.width=32
+AT91C_PMC_SCSR.byteEndian=little
+AT91C_PMC_SCSR.permission.write=none
+AT91C_PMC_PCSR.name="AT91C_PMC_PCSR"
+AT91C_PMC_PCSR.description="Peripheral Clock Status Register"
+AT91C_PMC_PCSR.helpkey="Peripheral Clock Status Register"
+AT91C_PMC_PCSR.access=memorymapped
+AT91C_PMC_PCSR.address=0xFFFFFC18
+AT91C_PMC_PCSR.width=32
+AT91C_PMC_PCSR.byteEndian=little
+AT91C_PMC_PCSR.permission.write=none
+AT91C_PMC_MCFR.name="AT91C_PMC_MCFR"
+AT91C_PMC_MCFR.description="Main Clock  Frequency Register"
+AT91C_PMC_MCFR.helpkey="Main Clock  Frequency Register"
+AT91C_PMC_MCFR.access=memorymapped
+AT91C_PMC_MCFR.address=0xFFFFFC24
+AT91C_PMC_MCFR.width=32
+AT91C_PMC_MCFR.byteEndian=little
+AT91C_PMC_MCFR.permission.write=none
+AT91C_PMC_SCER.name="AT91C_PMC_SCER"
+AT91C_PMC_SCER.description="System Clock Enable Register"
+AT91C_PMC_SCER.helpkey="System Clock Enable Register"
+AT91C_PMC_SCER.access=memorymapped
+AT91C_PMC_SCER.address=0xFFFFFC00
+AT91C_PMC_SCER.width=32
+AT91C_PMC_SCER.byteEndian=little
+AT91C_PMC_SCER.type=enum
+AT91C_PMC_SCER.enum.0.name=*** Write only ***
+AT91C_PMC_SCER.enum.1.name=Error
+AT91C_PMC_IMR.name="AT91C_PMC_IMR"
+AT91C_PMC_IMR.description="Interrupt Mask Register"
+AT91C_PMC_IMR.helpkey="Interrupt Mask Register"
+AT91C_PMC_IMR.access=memorymapped
+AT91C_PMC_IMR.address=0xFFFFFC6C
+AT91C_PMC_IMR.width=32
+AT91C_PMC_IMR.byteEndian=little
+AT91C_PMC_IMR.permission.write=none
+AT91C_PMC_IER.name="AT91C_PMC_IER"
+AT91C_PMC_IER.description="Interrupt Enable Register"
+AT91C_PMC_IER.helpkey="Interrupt Enable Register"
+AT91C_PMC_IER.access=memorymapped
+AT91C_PMC_IER.address=0xFFFFFC60
+AT91C_PMC_IER.width=32
+AT91C_PMC_IER.byteEndian=little
+AT91C_PMC_IER.type=enum
+AT91C_PMC_IER.enum.0.name=*** Write only ***
+AT91C_PMC_IER.enum.1.name=Error
+AT91C_PMC_SR.name="AT91C_PMC_SR"
+AT91C_PMC_SR.description="Status Register"
+AT91C_PMC_SR.helpkey="Status Register"
+AT91C_PMC_SR.access=memorymapped
+AT91C_PMC_SR.address=0xFFFFFC68
+AT91C_PMC_SR.width=32
+AT91C_PMC_SR.byteEndian=little
+AT91C_PMC_SR.permission.write=none
+# ========== Register definition for RSTC peripheral ========== 
+AT91C_RSTC_RCR.name="AT91C_RSTC_RCR"
+AT91C_RSTC_RCR.description="Reset Control Register"
+AT91C_RSTC_RCR.helpkey="Reset Control Register"
+AT91C_RSTC_RCR.access=memorymapped
+AT91C_RSTC_RCR.address=0xFFFFFD00
+AT91C_RSTC_RCR.width=32
+AT91C_RSTC_RCR.byteEndian=little
+AT91C_RSTC_RCR.type=enum
+AT91C_RSTC_RCR.enum.0.name=*** Write only ***
+AT91C_RSTC_RCR.enum.1.name=Error
+AT91C_RSTC_RMR.name="AT91C_RSTC_RMR"
+AT91C_RSTC_RMR.description="Reset Mode Register"
+AT91C_RSTC_RMR.helpkey="Reset Mode Register"
+AT91C_RSTC_RMR.access=memorymapped
+AT91C_RSTC_RMR.address=0xFFFFFD08
+AT91C_RSTC_RMR.width=32
+AT91C_RSTC_RMR.byteEndian=little
+AT91C_RSTC_RSR.name="AT91C_RSTC_RSR"
+AT91C_RSTC_RSR.description="Reset Status Register"
+AT91C_RSTC_RSR.helpkey="Reset Status Register"
+AT91C_RSTC_RSR.access=memorymapped
+AT91C_RSTC_RSR.address=0xFFFFFD04
+AT91C_RSTC_RSR.width=32
+AT91C_RSTC_RSR.byteEndian=little
+AT91C_RSTC_RSR.permission.write=none
+# ========== Register definition for RTTC peripheral ========== 
+AT91C_RTTC_RTSR.name="AT91C_RTTC_RTSR"
+AT91C_RTTC_RTSR.description="Real-time Status Register"
+AT91C_RTTC_RTSR.helpkey="Real-time Status Register"
+AT91C_RTTC_RTSR.access=memorymapped
+AT91C_RTTC_RTSR.address=0xFFFFFD2C
+AT91C_RTTC_RTSR.width=32
+AT91C_RTTC_RTSR.byteEndian=little
+AT91C_RTTC_RTSR.permission.write=none
+AT91C_RTTC_RTMR.name="AT91C_RTTC_RTMR"
+AT91C_RTTC_RTMR.description="Real-time Mode Register"
+AT91C_RTTC_RTMR.helpkey="Real-time Mode Register"
+AT91C_RTTC_RTMR.access=memorymapped
+AT91C_RTTC_RTMR.address=0xFFFFFD20
+AT91C_RTTC_RTMR.width=32
+AT91C_RTTC_RTMR.byteEndian=little
+AT91C_RTTC_RTVR.name="AT91C_RTTC_RTVR"
+AT91C_RTTC_RTVR.description="Real-time Value Register"
+AT91C_RTTC_RTVR.helpkey="Real-time Value Register"
+AT91C_RTTC_RTVR.access=memorymapped
+AT91C_RTTC_RTVR.address=0xFFFFFD28
+AT91C_RTTC_RTVR.width=32
+AT91C_RTTC_RTVR.byteEndian=little
+AT91C_RTTC_RTVR.permission.write=none
+AT91C_RTTC_RTAR.name="AT91C_RTTC_RTAR"
+AT91C_RTTC_RTAR.description="Real-time Alarm Register"
+AT91C_RTTC_RTAR.helpkey="Real-time Alarm Register"
+AT91C_RTTC_RTAR.access=memorymapped
+AT91C_RTTC_RTAR.address=0xFFFFFD24
+AT91C_RTTC_RTAR.width=32
+AT91C_RTTC_RTAR.byteEndian=little
+# ========== Register definition for PITC peripheral ========== 
+AT91C_PITC_PIVR.name="AT91C_PITC_PIVR"
+AT91C_PITC_PIVR.description="Period Interval Value Register"
+AT91C_PITC_PIVR.helpkey="Period Interval Value Register"
+AT91C_PITC_PIVR.access=memorymapped
+AT91C_PITC_PIVR.address=0xFFFFFD38
+AT91C_PITC_PIVR.width=32
+AT91C_PITC_PIVR.byteEndian=little
+AT91C_PITC_PIVR.permission.write=none
+AT91C_PITC_PISR.name="AT91C_PITC_PISR"
+AT91C_PITC_PISR.description="Period Interval Status Register"
+AT91C_PITC_PISR.helpkey="Period Interval Status Register"
+AT91C_PITC_PISR.access=memorymapped
+AT91C_PITC_PISR.address=0xFFFFFD34
+AT91C_PITC_PISR.width=32
+AT91C_PITC_PISR.byteEndian=little
+AT91C_PITC_PISR.permission.write=none
+AT91C_PITC_PIIR.name="AT91C_PITC_PIIR"
+AT91C_PITC_PIIR.description="Period Interval Image Register"
+AT91C_PITC_PIIR.helpkey="Period Interval Image Register"
+AT91C_PITC_PIIR.access=memorymapped
+AT91C_PITC_PIIR.address=0xFFFFFD3C
+AT91C_PITC_PIIR.width=32
+AT91C_PITC_PIIR.byteEndian=little
+AT91C_PITC_PIIR.permission.write=none
+AT91C_PITC_PIMR.name="AT91C_PITC_PIMR"
+AT91C_PITC_PIMR.description="Period Interval Mode Register"
+AT91C_PITC_PIMR.helpkey="Period Interval Mode Register"
+AT91C_PITC_PIMR.access=memorymapped
+AT91C_PITC_PIMR.address=0xFFFFFD30
+AT91C_PITC_PIMR.width=32
+AT91C_PITC_PIMR.byteEndian=little
+# ========== Register definition for WDTC peripheral ========== 
+AT91C_WDTC_WDCR.name="AT91C_WDTC_WDCR"
+AT91C_WDTC_WDCR.description="Watchdog Control Register"
+AT91C_WDTC_WDCR.helpkey="Watchdog Control Register"
+AT91C_WDTC_WDCR.access=memorymapped
+AT91C_WDTC_WDCR.address=0xFFFFFD40
+AT91C_WDTC_WDCR.width=32
+AT91C_WDTC_WDCR.byteEndian=little
+AT91C_WDTC_WDCR.type=enum
+AT91C_WDTC_WDCR.enum.0.name=*** Write only ***
+AT91C_WDTC_WDCR.enum.1.name=Error
+AT91C_WDTC_WDSR.name="AT91C_WDTC_WDSR"
+AT91C_WDTC_WDSR.description="Watchdog Status Register"
+AT91C_WDTC_WDSR.helpkey="Watchdog Status Register"
+AT91C_WDTC_WDSR.access=memorymapped
+AT91C_WDTC_WDSR.address=0xFFFFFD48
+AT91C_WDTC_WDSR.width=32
+AT91C_WDTC_WDSR.byteEndian=little
+AT91C_WDTC_WDSR.permission.write=none
+AT91C_WDTC_WDMR.name="AT91C_WDTC_WDMR"
+AT91C_WDTC_WDMR.description="Watchdog Mode Register"
+AT91C_WDTC_WDMR.helpkey="Watchdog Mode Register"
+AT91C_WDTC_WDMR.access=memorymapped
+AT91C_WDTC_WDMR.address=0xFFFFFD44
+AT91C_WDTC_WDMR.width=32
+AT91C_WDTC_WDMR.byteEndian=little
+# ========== Register definition for VREG peripheral ========== 
+AT91C_VREG_MR.name="AT91C_VREG_MR"
+AT91C_VREG_MR.description="Voltage Regulator Mode Register"
+AT91C_VREG_MR.helpkey="Voltage Regulator Mode Register"
+AT91C_VREG_MR.access=memorymapped
+AT91C_VREG_MR.address=0xFFFFFD60
+AT91C_VREG_MR.width=32
+AT91C_VREG_MR.byteEndian=little
+# ========== Register definition for MC peripheral ========== 
+AT91C_MC_ASR.name="AT91C_MC_ASR"
+AT91C_MC_ASR.description="MC Abort Status Register"
+AT91C_MC_ASR.helpkey="MC Abort Status Register"
+AT91C_MC_ASR.access=memorymapped
+AT91C_MC_ASR.address=0xFFFFFF04
+AT91C_MC_ASR.width=32
+AT91C_MC_ASR.byteEndian=little
+AT91C_MC_ASR.permission.write=none
+AT91C_MC_RCR.name="AT91C_MC_RCR"
+AT91C_MC_RCR.description="MC Remap Control Register"
+AT91C_MC_RCR.helpkey="MC Remap Control Register"
+AT91C_MC_RCR.access=memorymapped
+AT91C_MC_RCR.address=0xFFFFFF00
+AT91C_MC_RCR.width=32
+AT91C_MC_RCR.byteEndian=little
+AT91C_MC_RCR.type=enum
+AT91C_MC_RCR.enum.0.name=*** Write only ***
+AT91C_MC_RCR.enum.1.name=Error
+AT91C_MC_FCR.name="AT91C_MC_FCR"
+AT91C_MC_FCR.description="MC Flash Command Register"
+AT91C_MC_FCR.helpkey="MC Flash Command Register"
+AT91C_MC_FCR.access=memorymapped
+AT91C_MC_FCR.address=0xFFFFFF64
+AT91C_MC_FCR.width=32
+AT91C_MC_FCR.byteEndian=little
+AT91C_MC_FCR.type=enum
+AT91C_MC_FCR.enum.0.name=*** Write only ***
+AT91C_MC_FCR.enum.1.name=Error
+AT91C_MC_AASR.name="AT91C_MC_AASR"
+AT91C_MC_AASR.description="MC Abort Address Status Register"
+AT91C_MC_AASR.helpkey="MC Abort Address Status Register"
+AT91C_MC_AASR.access=memorymapped
+AT91C_MC_AASR.address=0xFFFFFF08
+AT91C_MC_AASR.width=32
+AT91C_MC_AASR.byteEndian=little
+AT91C_MC_AASR.permission.write=none
+AT91C_MC_FSR.name="AT91C_MC_FSR"
+AT91C_MC_FSR.description="MC Flash Status Register"
+AT91C_MC_FSR.helpkey="MC Flash Status Register"
+AT91C_MC_FSR.access=memorymapped
+AT91C_MC_FSR.address=0xFFFFFF68
+AT91C_MC_FSR.width=32
+AT91C_MC_FSR.byteEndian=little
+AT91C_MC_FSR.permission.write=none
+AT91C_MC_FMR.name="AT91C_MC_FMR"
+AT91C_MC_FMR.description="MC Flash Mode Register"
+AT91C_MC_FMR.helpkey="MC Flash Mode Register"
+AT91C_MC_FMR.access=memorymapped
+AT91C_MC_FMR.address=0xFFFFFF60
+AT91C_MC_FMR.width=32
+AT91C_MC_FMR.byteEndian=little
+# ========== Register definition for PDC_SPI1 peripheral ========== 
+AT91C_SPI1_PTCR.name="AT91C_SPI1_PTCR"
+AT91C_SPI1_PTCR.description="PDC Transfer Control Register"
+AT91C_SPI1_PTCR.helpkey="PDC Transfer Control Register"
+AT91C_SPI1_PTCR.access=memorymapped
+AT91C_SPI1_PTCR.address=0xFFFE4120
+AT91C_SPI1_PTCR.width=32
+AT91C_SPI1_PTCR.byteEndian=little
+AT91C_SPI1_PTCR.type=enum
+AT91C_SPI1_PTCR.enum.0.name=*** Write only ***
+AT91C_SPI1_PTCR.enum.1.name=Error
+AT91C_SPI1_RPR.name="AT91C_SPI1_RPR"
+AT91C_SPI1_RPR.description="Receive Pointer Register"
+AT91C_SPI1_RPR.helpkey="Receive Pointer Register"
+AT91C_SPI1_RPR.access=memorymapped
+AT91C_SPI1_RPR.address=0xFFFE4100
+AT91C_SPI1_RPR.width=32
+AT91C_SPI1_RPR.byteEndian=little
+AT91C_SPI1_TNCR.name="AT91C_SPI1_TNCR"
+AT91C_SPI1_TNCR.description="Transmit Next Counter Register"
+AT91C_SPI1_TNCR.helpkey="Transmit Next Counter Register"
+AT91C_SPI1_TNCR.access=memorymapped
+AT91C_SPI1_TNCR.address=0xFFFE411C
+AT91C_SPI1_TNCR.width=32
+AT91C_SPI1_TNCR.byteEndian=little
+AT91C_SPI1_TPR.name="AT91C_SPI1_TPR"
+AT91C_SPI1_TPR.description="Transmit Pointer Register"
+AT91C_SPI1_TPR.helpkey="Transmit Pointer Register"
+AT91C_SPI1_TPR.access=memorymapped
+AT91C_SPI1_TPR.address=0xFFFE4108
+AT91C_SPI1_TPR.width=32
+AT91C_SPI1_TPR.byteEndian=little
+AT91C_SPI1_TNPR.name="AT91C_SPI1_TNPR"
+AT91C_SPI1_TNPR.description="Transmit Next Pointer Register"
+AT91C_SPI1_TNPR.helpkey="Transmit Next Pointer Register"
+AT91C_SPI1_TNPR.access=memorymapped
+AT91C_SPI1_TNPR.address=0xFFFE4118
+AT91C_SPI1_TNPR.width=32
+AT91C_SPI1_TNPR.byteEndian=little
+AT91C_SPI1_TCR.name="AT91C_SPI1_TCR"
+AT91C_SPI1_TCR.description="Transmit Counter Register"
+AT91C_SPI1_TCR.helpkey="Transmit Counter Register"
+AT91C_SPI1_TCR.access=memorymapped
+AT91C_SPI1_TCR.address=0xFFFE410C
+AT91C_SPI1_TCR.width=32
+AT91C_SPI1_TCR.byteEndian=little
+AT91C_SPI1_RCR.name="AT91C_SPI1_RCR"
+AT91C_SPI1_RCR.description="Receive Counter Register"
+AT91C_SPI1_RCR.helpkey="Receive Counter Register"
+AT91C_SPI1_RCR.access=memorymapped
+AT91C_SPI1_RCR.address=0xFFFE4104
+AT91C_SPI1_RCR.width=32
+AT91C_SPI1_RCR.byteEndian=little
+AT91C_SPI1_RNPR.name="AT91C_SPI1_RNPR"
+AT91C_SPI1_RNPR.description="Receive Next Pointer Register"
+AT91C_SPI1_RNPR.helpkey="Receive Next Pointer Register"
+AT91C_SPI1_RNPR.access=memorymapped
+AT91C_SPI1_RNPR.address=0xFFFE4110
+AT91C_SPI1_RNPR.width=32
+AT91C_SPI1_RNPR.byteEndian=little
+AT91C_SPI1_RNCR.name="AT91C_SPI1_RNCR"
+AT91C_SPI1_RNCR.description="Receive Next Counter Register"
+AT91C_SPI1_RNCR.helpkey="Receive Next Counter Register"
+AT91C_SPI1_RNCR.access=memorymapped
+AT91C_SPI1_RNCR.address=0xFFFE4114
+AT91C_SPI1_RNCR.width=32
+AT91C_SPI1_RNCR.byteEndian=little
+AT91C_SPI1_PTSR.name="AT91C_SPI1_PTSR"
+AT91C_SPI1_PTSR.description="PDC Transfer Status Register"
+AT91C_SPI1_PTSR.helpkey="PDC Transfer Status Register"
+AT91C_SPI1_PTSR.access=memorymapped
+AT91C_SPI1_PTSR.address=0xFFFE4124
+AT91C_SPI1_PTSR.width=32
+AT91C_SPI1_PTSR.byteEndian=little
+AT91C_SPI1_PTSR.permission.write=none
+# ========== Register definition for SPI1 peripheral ========== 
+AT91C_SPI1_IMR.name="AT91C_SPI1_IMR"
+AT91C_SPI1_IMR.description="Interrupt Mask Register"
+AT91C_SPI1_IMR.helpkey="Interrupt Mask Register"
+AT91C_SPI1_IMR.access=memorymapped
+AT91C_SPI1_IMR.address=0xFFFE401C
+AT91C_SPI1_IMR.width=32
+AT91C_SPI1_IMR.byteEndian=little
+AT91C_SPI1_IMR.permission.write=none
+AT91C_SPI1_IER.name="AT91C_SPI1_IER"
+AT91C_SPI1_IER.description="Interrupt Enable Register"
+AT91C_SPI1_IER.helpkey="Interrupt Enable Register"
+AT91C_SPI1_IER.access=memorymapped
+AT91C_SPI1_IER.address=0xFFFE4014
+AT91C_SPI1_IER.width=32
+AT91C_SPI1_IER.byteEndian=little
+AT91C_SPI1_IER.type=enum
+AT91C_SPI1_IER.enum.0.name=*** Write only ***
+AT91C_SPI1_IER.enum.1.name=Error
+AT91C_SPI1_MR.name="AT91C_SPI1_MR"
+AT91C_SPI1_MR.description="Mode Register"
+AT91C_SPI1_MR.helpkey="Mode Register"
+AT91C_SPI1_MR.access=memorymapped
+AT91C_SPI1_MR.address=0xFFFE4004
+AT91C_SPI1_MR.width=32
+AT91C_SPI1_MR.byteEndian=little
+AT91C_SPI1_RDR.name="AT91C_SPI1_RDR"
+AT91C_SPI1_RDR.description="Receive Data Register"
+AT91C_SPI1_RDR.helpkey="Receive Data Register"
+AT91C_SPI1_RDR.access=memorymapped
+AT91C_SPI1_RDR.address=0xFFFE4008
+AT91C_SPI1_RDR.width=32
+AT91C_SPI1_RDR.byteEndian=little
+AT91C_SPI1_RDR.permission.write=none
+AT91C_SPI1_IDR.name="AT91C_SPI1_IDR"
+AT91C_SPI1_IDR.description="Interrupt Disable Register"
+AT91C_SPI1_IDR.helpkey="Interrupt Disable Register"
+AT91C_SPI1_IDR.access=memorymapped
+AT91C_SPI1_IDR.address=0xFFFE4018
+AT91C_SPI1_IDR.width=32
+AT91C_SPI1_IDR.byteEndian=little
+AT91C_SPI1_IDR.type=enum
+AT91C_SPI1_IDR.enum.0.name=*** Write only ***
+AT91C_SPI1_IDR.enum.1.name=Error
+AT91C_SPI1_SR.name="AT91C_SPI1_SR"
+AT91C_SPI1_SR.description="Status Register"
+AT91C_SPI1_SR.helpkey="Status Register"
+AT91C_SPI1_SR.access=memorymapped
+AT91C_SPI1_SR.address=0xFFFE4010
+AT91C_SPI1_SR.width=32
+AT91C_SPI1_SR.byteEndian=little
+AT91C_SPI1_SR.permission.write=none
+AT91C_SPI1_TDR.name="AT91C_SPI1_TDR"
+AT91C_SPI1_TDR.description="Transmit Data Register"
+AT91C_SPI1_TDR.helpkey="Transmit Data Register"
+AT91C_SPI1_TDR.access=memorymapped
+AT91C_SPI1_TDR.address=0xFFFE400C
+AT91C_SPI1_TDR.width=32
+AT91C_SPI1_TDR.byteEndian=little
+AT91C_SPI1_TDR.type=enum
+AT91C_SPI1_TDR.enum.0.name=*** Write only ***
+AT91C_SPI1_TDR.enum.1.name=Error
+AT91C_SPI1_CR.name="AT91C_SPI1_CR"
+AT91C_SPI1_CR.description="Control Register"
+AT91C_SPI1_CR.helpkey="Control Register"
+AT91C_SPI1_CR.access=memorymapped
+AT91C_SPI1_CR.address=0xFFFE4000
+AT91C_SPI1_CR.width=32
+AT91C_SPI1_CR.byteEndian=little
+AT91C_SPI1_CR.permission.write=none
+AT91C_SPI1_CSR.name="AT91C_SPI1_CSR"
+AT91C_SPI1_CSR.description="Chip Select Register"
+AT91C_SPI1_CSR.helpkey="Chip Select Register"
+AT91C_SPI1_CSR.access=memorymapped
+AT91C_SPI1_CSR.address=0xFFFE4030
+AT91C_SPI1_CSR.width=32
+AT91C_SPI1_CSR.byteEndian=little
+# ========== Register definition for PDC_SPI0 peripheral ========== 
+AT91C_SPI0_PTCR.name="AT91C_SPI0_PTCR"
+AT91C_SPI0_PTCR.description="PDC Transfer Control Register"
+AT91C_SPI0_PTCR.helpkey="PDC Transfer Control Register"
+AT91C_SPI0_PTCR.access=memorymapped
+AT91C_SPI0_PTCR.address=0xFFFE0120
+AT91C_SPI0_PTCR.width=32
+AT91C_SPI0_PTCR.byteEndian=little
+AT91C_SPI0_PTCR.type=enum
+AT91C_SPI0_PTCR.enum.0.name=*** Write only ***
+AT91C_SPI0_PTCR.enum.1.name=Error
+AT91C_SPI0_TPR.name="AT91C_SPI0_TPR"
+AT91C_SPI0_TPR.description="Transmit Pointer Register"
+AT91C_SPI0_TPR.helpkey="Transmit Pointer Register"
+AT91C_SPI0_TPR.access=memorymapped
+AT91C_SPI0_TPR.address=0xFFFE0108
+AT91C_SPI0_TPR.width=32
+AT91C_SPI0_TPR.byteEndian=little
+AT91C_SPI0_TCR.name="AT91C_SPI0_TCR"
+AT91C_SPI0_TCR.description="Transmit Counter Register"
+AT91C_SPI0_TCR.helpkey="Transmit Counter Register"
+AT91C_SPI0_TCR.access=memorymapped
+AT91C_SPI0_TCR.address=0xFFFE010C
+AT91C_SPI0_TCR.width=32
+AT91C_SPI0_TCR.byteEndian=little
+AT91C_SPI0_RCR.name="AT91C_SPI0_RCR"
+AT91C_SPI0_RCR.description="Receive Counter Register"
+AT91C_SPI0_RCR.helpkey="Receive Counter Register"
+AT91C_SPI0_RCR.access=memorymapped
+AT91C_SPI0_RCR.address=0xFFFE0104
+AT91C_SPI0_RCR.width=32
+AT91C_SPI0_RCR.byteEndian=little
+AT91C_SPI0_PTSR.name="AT91C_SPI0_PTSR"
+AT91C_SPI0_PTSR.description="PDC Transfer Status Register"
+AT91C_SPI0_PTSR.helpkey="PDC Transfer Status Register"
+AT91C_SPI0_PTSR.access=memorymapped
+AT91C_SPI0_PTSR.address=0xFFFE0124
+AT91C_SPI0_PTSR.width=32
+AT91C_SPI0_PTSR.byteEndian=little
+AT91C_SPI0_PTSR.permission.write=none
+AT91C_SPI0_RNPR.name="AT91C_SPI0_RNPR"
+AT91C_SPI0_RNPR.description="Receive Next Pointer Register"
+AT91C_SPI0_RNPR.helpkey="Receive Next Pointer Register"
+AT91C_SPI0_RNPR.access=memorymapped
+AT91C_SPI0_RNPR.address=0xFFFE0110
+AT91C_SPI0_RNPR.width=32
+AT91C_SPI0_RNPR.byteEndian=little
+AT91C_SPI0_RPR.name="AT91C_SPI0_RPR"
+AT91C_SPI0_RPR.description="Receive Pointer Register"
+AT91C_SPI0_RPR.helpkey="Receive Pointer Register"
+AT91C_SPI0_RPR.access=memorymapped
+AT91C_SPI0_RPR.address=0xFFFE0100
+AT91C_SPI0_RPR.width=32
+AT91C_SPI0_RPR.byteEndian=little
+AT91C_SPI0_TNCR.name="AT91C_SPI0_TNCR"
+AT91C_SPI0_TNCR.description="Transmit Next Counter Register"
+AT91C_SPI0_TNCR.helpkey="Transmit Next Counter Register"
+AT91C_SPI0_TNCR.access=memorymapped
+AT91C_SPI0_TNCR.address=0xFFFE011C
+AT91C_SPI0_TNCR.width=32
+AT91C_SPI0_TNCR.byteEndian=little
+AT91C_SPI0_RNCR.name="AT91C_SPI0_RNCR"
+AT91C_SPI0_RNCR.description="Receive Next Counter Register"
+AT91C_SPI0_RNCR.helpkey="Receive Next Counter Register"
+AT91C_SPI0_RNCR.access=memorymapped
+AT91C_SPI0_RNCR.address=0xFFFE0114
+AT91C_SPI0_RNCR.width=32
+AT91C_SPI0_RNCR.byteEndian=little
+AT91C_SPI0_TNPR.name="AT91C_SPI0_TNPR"
+AT91C_SPI0_TNPR.description="Transmit Next Pointer Register"
+AT91C_SPI0_TNPR.helpkey="Transmit Next Pointer Register"
+AT91C_SPI0_TNPR.access=memorymapped
+AT91C_SPI0_TNPR.address=0xFFFE0118
+AT91C_SPI0_TNPR.width=32
+AT91C_SPI0_TNPR.byteEndian=little
+# ========== Register definition for SPI0 peripheral ========== 
+AT91C_SPI0_IER.name="AT91C_SPI0_IER"
+AT91C_SPI0_IER.description="Interrupt Enable Register"
+AT91C_SPI0_IER.helpkey="Interrupt Enable Register"
+AT91C_SPI0_IER.access=memorymapped
+AT91C_SPI0_IER.address=0xFFFE0014
+AT91C_SPI0_IER.width=32
+AT91C_SPI0_IER.byteEndian=little
+AT91C_SPI0_IER.type=enum
+AT91C_SPI0_IER.enum.0.name=*** Write only ***
+AT91C_SPI0_IER.enum.1.name=Error
+AT91C_SPI0_SR.name="AT91C_SPI0_SR"
+AT91C_SPI0_SR.description="Status Register"
+AT91C_SPI0_SR.helpkey="Status Register"
+AT91C_SPI0_SR.access=memorymapped
+AT91C_SPI0_SR.address=0xFFFE0010
+AT91C_SPI0_SR.width=32
+AT91C_SPI0_SR.byteEndian=little
+AT91C_SPI0_SR.permission.write=none
+AT91C_SPI0_IDR.name="AT91C_SPI0_IDR"
+AT91C_SPI0_IDR.description="Interrupt Disable Register"
+AT91C_SPI0_IDR.helpkey="Interrupt Disable Register"
+AT91C_SPI0_IDR.access=memorymapped
+AT91C_SPI0_IDR.address=0xFFFE0018
+AT91C_SPI0_IDR.width=32
+AT91C_SPI0_IDR.byteEndian=little
+AT91C_SPI0_IDR.type=enum
+AT91C_SPI0_IDR.enum.0.name=*** Write only ***
+AT91C_SPI0_IDR.enum.1.name=Error
+AT91C_SPI0_CR.name="AT91C_SPI0_CR"
+AT91C_SPI0_CR.description="Control Register"
+AT91C_SPI0_CR.helpkey="Control Register"
+AT91C_SPI0_CR.access=memorymapped
+AT91C_SPI0_CR.address=0xFFFE0000
+AT91C_SPI0_CR.width=32
+AT91C_SPI0_CR.byteEndian=little
+AT91C_SPI0_CR.permission.write=none
+AT91C_SPI0_MR.name="AT91C_SPI0_MR"
+AT91C_SPI0_MR.description="Mode Register"
+AT91C_SPI0_MR.helpkey="Mode Register"
+AT91C_SPI0_MR.access=memorymapped
+AT91C_SPI0_MR.address=0xFFFE0004
+AT91C_SPI0_MR.width=32
+AT91C_SPI0_MR.byteEndian=little
+AT91C_SPI0_IMR.name="AT91C_SPI0_IMR"
+AT91C_SPI0_IMR.description="Interrupt Mask Register"
+AT91C_SPI0_IMR.helpkey="Interrupt Mask Register"
+AT91C_SPI0_IMR.access=memorymapped
+AT91C_SPI0_IMR.address=0xFFFE001C
+AT91C_SPI0_IMR.width=32
+AT91C_SPI0_IMR.byteEndian=little
+AT91C_SPI0_IMR.permission.write=none
+AT91C_SPI0_TDR.name="AT91C_SPI0_TDR"
+AT91C_SPI0_TDR.description="Transmit Data Register"
+AT91C_SPI0_TDR.helpkey="Transmit Data Register"
+AT91C_SPI0_TDR.access=memorymapped
+AT91C_SPI0_TDR.address=0xFFFE000C
+AT91C_SPI0_TDR.width=32
+AT91C_SPI0_TDR.byteEndian=little
+AT91C_SPI0_TDR.type=enum
+AT91C_SPI0_TDR.enum.0.name=*** Write only ***
+AT91C_SPI0_TDR.enum.1.name=Error
+AT91C_SPI0_RDR.name="AT91C_SPI0_RDR"
+AT91C_SPI0_RDR.description="Receive Data Register"
+AT91C_SPI0_RDR.helpkey="Receive Data Register"
+AT91C_SPI0_RDR.access=memorymapped
+AT91C_SPI0_RDR.address=0xFFFE0008
+AT91C_SPI0_RDR.width=32
+AT91C_SPI0_RDR.byteEndian=little
+AT91C_SPI0_RDR.permission.write=none
+AT91C_SPI0_CSR.name="AT91C_SPI0_CSR"
+AT91C_SPI0_CSR.description="Chip Select Register"
+AT91C_SPI0_CSR.helpkey="Chip Select Register"
+AT91C_SPI0_CSR.access=memorymapped
+AT91C_SPI0_CSR.address=0xFFFE0030
+AT91C_SPI0_CSR.width=32
+AT91C_SPI0_CSR.byteEndian=little
+# ========== Register definition for PDC_US1 peripheral ========== 
+AT91C_US1_RNCR.name="AT91C_US1_RNCR"
+AT91C_US1_RNCR.description="Receive Next Counter Register"
+AT91C_US1_RNCR.helpkey="Receive Next Counter Register"
+AT91C_US1_RNCR.access=memorymapped
+AT91C_US1_RNCR.address=0xFFFC4114
+AT91C_US1_RNCR.width=32
+AT91C_US1_RNCR.byteEndian=little
+AT91C_US1_PTCR.name="AT91C_US1_PTCR"
+AT91C_US1_PTCR.description="PDC Transfer Control Register"
+AT91C_US1_PTCR.helpkey="PDC Transfer Control Register"
+AT91C_US1_PTCR.access=memorymapped
+AT91C_US1_PTCR.address=0xFFFC4120
+AT91C_US1_PTCR.width=32
+AT91C_US1_PTCR.byteEndian=little
+AT91C_US1_PTCR.type=enum
+AT91C_US1_PTCR.enum.0.name=*** Write only ***
+AT91C_US1_PTCR.enum.1.name=Error
+AT91C_US1_TCR.name="AT91C_US1_TCR"
+AT91C_US1_TCR.description="Transmit Counter Register"
+AT91C_US1_TCR.helpkey="Transmit Counter Register"
+AT91C_US1_TCR.access=memorymapped
+AT91C_US1_TCR.address=0xFFFC410C
+AT91C_US1_TCR.width=32
+AT91C_US1_TCR.byteEndian=little
+AT91C_US1_PTSR.name="AT91C_US1_PTSR"
+AT91C_US1_PTSR.description="PDC Transfer Status Register"
+AT91C_US1_PTSR.helpkey="PDC Transfer Status Register"
+AT91C_US1_PTSR.access=memorymapped
+AT91C_US1_PTSR.address=0xFFFC4124
+AT91C_US1_PTSR.width=32
+AT91C_US1_PTSR.byteEndian=little
+AT91C_US1_PTSR.permission.write=none
+AT91C_US1_TNPR.name="AT91C_US1_TNPR"
+AT91C_US1_TNPR.description="Transmit Next Pointer Register"
+AT91C_US1_TNPR.helpkey="Transmit Next Pointer Register"
+AT91C_US1_TNPR.access=memorymapped
+AT91C_US1_TNPR.address=0xFFFC4118
+AT91C_US1_TNPR.width=32
+AT91C_US1_TNPR.byteEndian=little
+AT91C_US1_RCR.name="AT91C_US1_RCR"
+AT91C_US1_RCR.description="Receive Counter Register"
+AT91C_US1_RCR.helpkey="Receive Counter Register"
+AT91C_US1_RCR.access=memorymapped
+AT91C_US1_RCR.address=0xFFFC4104
+AT91C_US1_RCR.width=32
+AT91C_US1_RCR.byteEndian=little
+AT91C_US1_RNPR.name="AT91C_US1_RNPR"
+AT91C_US1_RNPR.description="Receive Next Pointer Register"
+AT91C_US1_RNPR.helpkey="Receive Next Pointer Register"
+AT91C_US1_RNPR.access=memorymapped
+AT91C_US1_RNPR.address=0xFFFC4110
+AT91C_US1_RNPR.width=32
+AT91C_US1_RNPR.byteEndian=little
+AT91C_US1_RPR.name="AT91C_US1_RPR"
+AT91C_US1_RPR.description="Receive Pointer Register"
+AT91C_US1_RPR.helpkey="Receive Pointer Register"
+AT91C_US1_RPR.access=memorymapped
+AT91C_US1_RPR.address=0xFFFC4100
+AT91C_US1_RPR.width=32
+AT91C_US1_RPR.byteEndian=little
+AT91C_US1_TNCR.name="AT91C_US1_TNCR"
+AT91C_US1_TNCR.description="Transmit Next Counter Register"
+AT91C_US1_TNCR.helpkey="Transmit Next Counter Register"
+AT91C_US1_TNCR.access=memorymapped
+AT91C_US1_TNCR.address=0xFFFC411C
+AT91C_US1_TNCR.width=32
+AT91C_US1_TNCR.byteEndian=little
+AT91C_US1_TPR.name="AT91C_US1_TPR"
+AT91C_US1_TPR.description="Transmit Pointer Register"
+AT91C_US1_TPR.helpkey="Transmit Pointer Register"
+AT91C_US1_TPR.access=memorymapped
+AT91C_US1_TPR.address=0xFFFC4108
+AT91C_US1_TPR.width=32
+AT91C_US1_TPR.byteEndian=little
+# ========== Register definition for US1 peripheral ========== 
+AT91C_US1_IF.name="AT91C_US1_IF"
+AT91C_US1_IF.description="IRDA_FILTER Register"
+AT91C_US1_IF.helpkey="IRDA_FILTER Register"
+AT91C_US1_IF.access=memorymapped
+AT91C_US1_IF.address=0xFFFC404C
+AT91C_US1_IF.width=32
+AT91C_US1_IF.byteEndian=little
+AT91C_US1_NER.name="AT91C_US1_NER"
+AT91C_US1_NER.description="Nb Errors Register"
+AT91C_US1_NER.helpkey="Nb Errors Register"
+AT91C_US1_NER.access=memorymapped
+AT91C_US1_NER.address=0xFFFC4044
+AT91C_US1_NER.width=32
+AT91C_US1_NER.byteEndian=little
+AT91C_US1_NER.permission.write=none
+AT91C_US1_RTOR.name="AT91C_US1_RTOR"
+AT91C_US1_RTOR.description="Receiver Time-out Register"
+AT91C_US1_RTOR.helpkey="Receiver Time-out Register"
+AT91C_US1_RTOR.access=memorymapped
+AT91C_US1_RTOR.address=0xFFFC4024
+AT91C_US1_RTOR.width=32
+AT91C_US1_RTOR.byteEndian=little
+AT91C_US1_CSR.name="AT91C_US1_CSR"
+AT91C_US1_CSR.description="Channel Status Register"
+AT91C_US1_CSR.helpkey="Channel Status Register"
+AT91C_US1_CSR.access=memorymapped
+AT91C_US1_CSR.address=0xFFFC4014
+AT91C_US1_CSR.width=32
+AT91C_US1_CSR.byteEndian=little
+AT91C_US1_CSR.permission.write=none
+AT91C_US1_IDR.name="AT91C_US1_IDR"
+AT91C_US1_IDR.description="Interrupt Disable Register"
+AT91C_US1_IDR.helpkey="Interrupt Disable Register"
+AT91C_US1_IDR.access=memorymapped
+AT91C_US1_IDR.address=0xFFFC400C
+AT91C_US1_IDR.width=32
+AT91C_US1_IDR.byteEndian=little
+AT91C_US1_IDR.type=enum
+AT91C_US1_IDR.enum.0.name=*** Write only ***
+AT91C_US1_IDR.enum.1.name=Error
+AT91C_US1_IER.name="AT91C_US1_IER"
+AT91C_US1_IER.description="Interrupt Enable Register"
+AT91C_US1_IER.helpkey="Interrupt Enable Register"
+AT91C_US1_IER.access=memorymapped
+AT91C_US1_IER.address=0xFFFC4008
+AT91C_US1_IER.width=32
+AT91C_US1_IER.byteEndian=little
+AT91C_US1_IER.type=enum
+AT91C_US1_IER.enum.0.name=*** Write only ***
+AT91C_US1_IER.enum.1.name=Error
+AT91C_US1_THR.name="AT91C_US1_THR"
+AT91C_US1_THR.description="Transmitter Holding Register"
+AT91C_US1_THR.helpkey="Transmitter Holding Register"
+AT91C_US1_THR.access=memorymapped
+AT91C_US1_THR.address=0xFFFC401C
+AT91C_US1_THR.width=32
+AT91C_US1_THR.byteEndian=little
+AT91C_US1_THR.type=enum
+AT91C_US1_THR.enum.0.name=*** Write only ***
+AT91C_US1_THR.enum.1.name=Error
+AT91C_US1_TTGR.name="AT91C_US1_TTGR"
+AT91C_US1_TTGR.description="Transmitter Time-guard Register"
+AT91C_US1_TTGR.helpkey="Transmitter Time-guard Register"
+AT91C_US1_TTGR.access=memorymapped
+AT91C_US1_TTGR.address=0xFFFC4028
+AT91C_US1_TTGR.width=32
+AT91C_US1_TTGR.byteEndian=little
+AT91C_US1_RHR.name="AT91C_US1_RHR"
+AT91C_US1_RHR.description="Receiver Holding Register"
+AT91C_US1_RHR.helpkey="Receiver Holding Register"
+AT91C_US1_RHR.access=memorymapped
+AT91C_US1_RHR.address=0xFFFC4018
+AT91C_US1_RHR.width=32
+AT91C_US1_RHR.byteEndian=little
+AT91C_US1_RHR.permission.write=none
+AT91C_US1_BRGR.name="AT91C_US1_BRGR"
+AT91C_US1_BRGR.description="Baud Rate Generator Register"
+AT91C_US1_BRGR.helpkey="Baud Rate Generator Register"
+AT91C_US1_BRGR.access=memorymapped
+AT91C_US1_BRGR.address=0xFFFC4020
+AT91C_US1_BRGR.width=32
+AT91C_US1_BRGR.byteEndian=little
+AT91C_US1_IMR.name="AT91C_US1_IMR"
+AT91C_US1_IMR.description="Interrupt Mask Register"
+AT91C_US1_IMR.helpkey="Interrupt Mask Register"
+AT91C_US1_IMR.access=memorymapped
+AT91C_US1_IMR.address=0xFFFC4010
+AT91C_US1_IMR.width=32
+AT91C_US1_IMR.byteEndian=little
+AT91C_US1_IMR.permission.write=none
+AT91C_US1_FIDI.name="AT91C_US1_FIDI"
+AT91C_US1_FIDI.description="FI_DI_Ratio Register"
+AT91C_US1_FIDI.helpkey="FI_DI_Ratio Register"
+AT91C_US1_FIDI.access=memorymapped
+AT91C_US1_FIDI.address=0xFFFC4040
+AT91C_US1_FIDI.width=32
+AT91C_US1_FIDI.byteEndian=little
+AT91C_US1_CR.name="AT91C_US1_CR"
+AT91C_US1_CR.description="Control Register"
+AT91C_US1_CR.helpkey="Control Register"
+AT91C_US1_CR.access=memorymapped
+AT91C_US1_CR.address=0xFFFC4000
+AT91C_US1_CR.width=32
+AT91C_US1_CR.byteEndian=little
+AT91C_US1_CR.type=enum
+AT91C_US1_CR.enum.0.name=*** Write only ***
+AT91C_US1_CR.enum.1.name=Error
+AT91C_US1_MR.name="AT91C_US1_MR"
+AT91C_US1_MR.description="Mode Register"
+AT91C_US1_MR.helpkey="Mode Register"
+AT91C_US1_MR.access=memorymapped
+AT91C_US1_MR.address=0xFFFC4004
+AT91C_US1_MR.width=32
+AT91C_US1_MR.byteEndian=little
+# ========== Register definition for PDC_US0 peripheral ========== 
+AT91C_US0_TNPR.name="AT91C_US0_TNPR"
+AT91C_US0_TNPR.description="Transmit Next Pointer Register"
+AT91C_US0_TNPR.helpkey="Transmit Next Pointer Register"
+AT91C_US0_TNPR.access=memorymapped
+AT91C_US0_TNPR.address=0xFFFC0118
+AT91C_US0_TNPR.width=32
+AT91C_US0_TNPR.byteEndian=little
+AT91C_US0_RNPR.name="AT91C_US0_RNPR"
+AT91C_US0_RNPR.description="Receive Next Pointer Register"
+AT91C_US0_RNPR.helpkey="Receive Next Pointer Register"
+AT91C_US0_RNPR.access=memorymapped
+AT91C_US0_RNPR.address=0xFFFC0110
+AT91C_US0_RNPR.width=32
+AT91C_US0_RNPR.byteEndian=little
+AT91C_US0_TCR.name="AT91C_US0_TCR"
+AT91C_US0_TCR.description="Transmit Counter Register"
+AT91C_US0_TCR.helpkey="Transmit Counter Register"
+AT91C_US0_TCR.access=memorymapped
+AT91C_US0_TCR.address=0xFFFC010C
+AT91C_US0_TCR.width=32
+AT91C_US0_TCR.byteEndian=little
+AT91C_US0_PTCR.name="AT91C_US0_PTCR"
+AT91C_US0_PTCR.description="PDC Transfer Control Register"
+AT91C_US0_PTCR.helpkey="PDC Transfer Control Register"
+AT91C_US0_PTCR.access=memorymapped
+AT91C_US0_PTCR.address=0xFFFC0120
+AT91C_US0_PTCR.width=32
+AT91C_US0_PTCR.byteEndian=little
+AT91C_US0_PTCR.type=enum
+AT91C_US0_PTCR.enum.0.name=*** Write only ***
+AT91C_US0_PTCR.enum.1.name=Error
+AT91C_US0_PTSR.name="AT91C_US0_PTSR"
+AT91C_US0_PTSR.description="PDC Transfer Status Register"
+AT91C_US0_PTSR.helpkey="PDC Transfer Status Register"
+AT91C_US0_PTSR.access=memorymapped
+AT91C_US0_PTSR.address=0xFFFC0124
+AT91C_US0_PTSR.width=32
+AT91C_US0_PTSR.byteEndian=little
+AT91C_US0_PTSR.permission.write=none
+AT91C_US0_TNCR.name="AT91C_US0_TNCR"
+AT91C_US0_TNCR.description="Transmit Next Counter Register"
+AT91C_US0_TNCR.helpkey="Transmit Next Counter Register"
+AT91C_US0_TNCR.access=memorymapped
+AT91C_US0_TNCR.address=0xFFFC011C
+AT91C_US0_TNCR.width=32
+AT91C_US0_TNCR.byteEndian=little
+AT91C_US0_TPR.name="AT91C_US0_TPR"
+AT91C_US0_TPR.description="Transmit Pointer Register"
+AT91C_US0_TPR.helpkey="Transmit Pointer Register"
+AT91C_US0_TPR.access=memorymapped
+AT91C_US0_TPR.address=0xFFFC0108
+AT91C_US0_TPR.width=32
+AT91C_US0_TPR.byteEndian=little
+AT91C_US0_RCR.name="AT91C_US0_RCR"
+AT91C_US0_RCR.description="Receive Counter Register"
+AT91C_US0_RCR.helpkey="Receive Counter Register"
+AT91C_US0_RCR.access=memorymapped
+AT91C_US0_RCR.address=0xFFFC0104
+AT91C_US0_RCR.width=32
+AT91C_US0_RCR.byteEndian=little
+AT91C_US0_RPR.name="AT91C_US0_RPR"
+AT91C_US0_RPR.description="Receive Pointer Register"
+AT91C_US0_RPR.helpkey="Receive Pointer Register"
+AT91C_US0_RPR.access=memorymapped
+AT91C_US0_RPR.address=0xFFFC0100
+AT91C_US0_RPR.width=32
+AT91C_US0_RPR.byteEndian=little
+AT91C_US0_RNCR.name="AT91C_US0_RNCR"
+AT91C_US0_RNCR.description="Receive Next Counter Register"
+AT91C_US0_RNCR.helpkey="Receive Next Counter Register"
+AT91C_US0_RNCR.access=memorymapped
+AT91C_US0_RNCR.address=0xFFFC0114
+AT91C_US0_RNCR.width=32
+AT91C_US0_RNCR.byteEndian=little
+# ========== Register definition for US0 peripheral ========== 
+AT91C_US0_BRGR.name="AT91C_US0_BRGR"
+AT91C_US0_BRGR.description="Baud Rate Generator Register"
+AT91C_US0_BRGR.helpkey="Baud Rate Generator Register"
+AT91C_US0_BRGR.access=memorymapped
+AT91C_US0_BRGR.address=0xFFFC0020
+AT91C_US0_BRGR.width=32
+AT91C_US0_BRGR.byteEndian=little
+AT91C_US0_NER.name="AT91C_US0_NER"
+AT91C_US0_NER.description="Nb Errors Register"
+AT91C_US0_NER.helpkey="Nb Errors Register"
+AT91C_US0_NER.access=memorymapped
+AT91C_US0_NER.address=0xFFFC0044
+AT91C_US0_NER.width=32
+AT91C_US0_NER.byteEndian=little
+AT91C_US0_NER.permission.write=none
+AT91C_US0_CR.name="AT91C_US0_CR"
+AT91C_US0_CR.description="Control Register"
+AT91C_US0_CR.helpkey="Control Register"
+AT91C_US0_CR.access=memorymapped
+AT91C_US0_CR.address=0xFFFC0000
+AT91C_US0_CR.width=32
+AT91C_US0_CR.byteEndian=little
+AT91C_US0_CR.type=enum
+AT91C_US0_CR.enum.0.name=*** Write only ***
+AT91C_US0_CR.enum.1.name=Error
+AT91C_US0_IMR.name="AT91C_US0_IMR"
+AT91C_US0_IMR.description="Interrupt Mask Register"
+AT91C_US0_IMR.helpkey="Interrupt Mask Register"
+AT91C_US0_IMR.access=memorymapped
+AT91C_US0_IMR.address=0xFFFC0010
+AT91C_US0_IMR.width=32
+AT91C_US0_IMR.byteEndian=little
+AT91C_US0_IMR.permission.write=none
+AT91C_US0_FIDI.name="AT91C_US0_FIDI"
+AT91C_US0_FIDI.description="FI_DI_Ratio Register"
+AT91C_US0_FIDI.helpkey="FI_DI_Ratio Register"
+AT91C_US0_FIDI.access=memorymapped
+AT91C_US0_FIDI.address=0xFFFC0040
+AT91C_US0_FIDI.width=32
+AT91C_US0_FIDI.byteEndian=little
+AT91C_US0_TTGR.name="AT91C_US0_TTGR"
+AT91C_US0_TTGR.description="Transmitter Time-guard Register"
+AT91C_US0_TTGR.helpkey="Transmitter Time-guard Register"
+AT91C_US0_TTGR.access=memorymapped
+AT91C_US0_TTGR.address=0xFFFC0028
+AT91C_US0_TTGR.width=32
+AT91C_US0_TTGR.byteEndian=little
+AT91C_US0_MR.name="AT91C_US0_MR"
+AT91C_US0_MR.description="Mode Register"
+AT91C_US0_MR.helpkey="Mode Register"
+AT91C_US0_MR.access=memorymapped
+AT91C_US0_MR.address=0xFFFC0004
+AT91C_US0_MR.width=32
+AT91C_US0_MR.byteEndian=little
+AT91C_US0_RTOR.name="AT91C_US0_RTOR"
+AT91C_US0_RTOR.description="Receiver Time-out Register"
+AT91C_US0_RTOR.helpkey="Receiver Time-out Register"
+AT91C_US0_RTOR.access=memorymapped
+AT91C_US0_RTOR.address=0xFFFC0024
+AT91C_US0_RTOR.width=32
+AT91C_US0_RTOR.byteEndian=little
+AT91C_US0_CSR.name="AT91C_US0_CSR"
+AT91C_US0_CSR.description="Channel Status Register"
+AT91C_US0_CSR.helpkey="Channel Status Register"
+AT91C_US0_CSR.access=memorymapped
+AT91C_US0_CSR.address=0xFFFC0014
+AT91C_US0_CSR.width=32
+AT91C_US0_CSR.byteEndian=little
+AT91C_US0_CSR.permission.write=none
+AT91C_US0_RHR.name="AT91C_US0_RHR"
+AT91C_US0_RHR.description="Receiver Holding Register"
+AT91C_US0_RHR.helpkey="Receiver Holding Register"
+AT91C_US0_RHR.access=memorymapped
+AT91C_US0_RHR.address=0xFFFC0018
+AT91C_US0_RHR.width=32
+AT91C_US0_RHR.byteEndian=little
+AT91C_US0_RHR.permission.write=none
+AT91C_US0_IDR.name="AT91C_US0_IDR"
+AT91C_US0_IDR.description="Interrupt Disable Register"
+AT91C_US0_IDR.helpkey="Interrupt Disable Register"
+AT91C_US0_IDR.access=memorymapped
+AT91C_US0_IDR.address=0xFFFC000C
+AT91C_US0_IDR.width=32
+AT91C_US0_IDR.byteEndian=little
+AT91C_US0_IDR.type=enum
+AT91C_US0_IDR.enum.0.name=*** Write only ***
+AT91C_US0_IDR.enum.1.name=Error
+AT91C_US0_THR.name="AT91C_US0_THR"
+AT91C_US0_THR.description="Transmitter Holding Register"
+AT91C_US0_THR.helpkey="Transmitter Holding Register"
+AT91C_US0_THR.access=memorymapped
+AT91C_US0_THR.address=0xFFFC001C
+AT91C_US0_THR.width=32
+AT91C_US0_THR.byteEndian=little
+AT91C_US0_THR.type=enum
+AT91C_US0_THR.enum.0.name=*** Write only ***
+AT91C_US0_THR.enum.1.name=Error
+AT91C_US0_IF.name="AT91C_US0_IF"
+AT91C_US0_IF.description="IRDA_FILTER Register"
+AT91C_US0_IF.helpkey="IRDA_FILTER Register"
+AT91C_US0_IF.access=memorymapped
+AT91C_US0_IF.address=0xFFFC004C
+AT91C_US0_IF.width=32
+AT91C_US0_IF.byteEndian=little
+AT91C_US0_IER.name="AT91C_US0_IER"
+AT91C_US0_IER.description="Interrupt Enable Register"
+AT91C_US0_IER.helpkey="Interrupt Enable Register"
+AT91C_US0_IER.access=memorymapped
+AT91C_US0_IER.address=0xFFFC0008
+AT91C_US0_IER.width=32
+AT91C_US0_IER.byteEndian=little
+AT91C_US0_IER.type=enum
+AT91C_US0_IER.enum.0.name=*** Write only ***
+AT91C_US0_IER.enum.1.name=Error
+# ========== Register definition for PDC_SSC peripheral ========== 
+AT91C_SSC_TNCR.name="AT91C_SSC_TNCR"
+AT91C_SSC_TNCR.description="Transmit Next Counter Register"
+AT91C_SSC_TNCR.helpkey="Transmit Next Counter Register"
+AT91C_SSC_TNCR.access=memorymapped
+AT91C_SSC_TNCR.address=0xFFFD411C
+AT91C_SSC_TNCR.width=32
+AT91C_SSC_TNCR.byteEndian=little
+AT91C_SSC_RPR.name="AT91C_SSC_RPR"
+AT91C_SSC_RPR.description="Receive Pointer Register"
+AT91C_SSC_RPR.helpkey="Receive Pointer Register"
+AT91C_SSC_RPR.access=memorymapped
+AT91C_SSC_RPR.address=0xFFFD4100
+AT91C_SSC_RPR.width=32
+AT91C_SSC_RPR.byteEndian=little
+AT91C_SSC_RNCR.name="AT91C_SSC_RNCR"
+AT91C_SSC_RNCR.description="Receive Next Counter Register"
+AT91C_SSC_RNCR.helpkey="Receive Next Counter Register"
+AT91C_SSC_RNCR.access=memorymapped
+AT91C_SSC_RNCR.address=0xFFFD4114
+AT91C_SSC_RNCR.width=32
+AT91C_SSC_RNCR.byteEndian=little
+AT91C_SSC_TPR.name="AT91C_SSC_TPR"
+AT91C_SSC_TPR.description="Transmit Pointer Register"
+AT91C_SSC_TPR.helpkey="Transmit Pointer Register"
+AT91C_SSC_TPR.access=memorymapped
+AT91C_SSC_TPR.address=0xFFFD4108
+AT91C_SSC_TPR.width=32
+AT91C_SSC_TPR.byteEndian=little
+AT91C_SSC_PTCR.name="AT91C_SSC_PTCR"
+AT91C_SSC_PTCR.description="PDC Transfer Control Register"
+AT91C_SSC_PTCR.helpkey="PDC Transfer Control Register"
+AT91C_SSC_PTCR.access=memorymapped
+AT91C_SSC_PTCR.address=0xFFFD4120
+AT91C_SSC_PTCR.width=32
+AT91C_SSC_PTCR.byteEndian=little
+AT91C_SSC_PTCR.type=enum
+AT91C_SSC_PTCR.enum.0.name=*** Write only ***
+AT91C_SSC_PTCR.enum.1.name=Error
+AT91C_SSC_TCR.name="AT91C_SSC_TCR"
+AT91C_SSC_TCR.description="Transmit Counter Register"
+AT91C_SSC_TCR.helpkey="Transmit Counter Register"
+AT91C_SSC_TCR.access=memorymapped
+AT91C_SSC_TCR.address=0xFFFD410C
+AT91C_SSC_TCR.width=32
+AT91C_SSC_TCR.byteEndian=little
+AT91C_SSC_RCR.name="AT91C_SSC_RCR"
+AT91C_SSC_RCR.description="Receive Counter Register"
+AT91C_SSC_RCR.helpkey="Receive Counter Register"
+AT91C_SSC_RCR.access=memorymapped
+AT91C_SSC_RCR.address=0xFFFD4104
+AT91C_SSC_RCR.width=32
+AT91C_SSC_RCR.byteEndian=little
+AT91C_SSC_RNPR.name="AT91C_SSC_RNPR"
+AT91C_SSC_RNPR.description="Receive Next Pointer Register"
+AT91C_SSC_RNPR.helpkey="Receive Next Pointer Register"
+AT91C_SSC_RNPR.access=memorymapped
+AT91C_SSC_RNPR.address=0xFFFD4110
+AT91C_SSC_RNPR.width=32
+AT91C_SSC_RNPR.byteEndian=little
+AT91C_SSC_TNPR.name="AT91C_SSC_TNPR"
+AT91C_SSC_TNPR.description="Transmit Next Pointer Register"
+AT91C_SSC_TNPR.helpkey="Transmit Next Pointer Register"
+AT91C_SSC_TNPR.access=memorymapped
+AT91C_SSC_TNPR.address=0xFFFD4118
+AT91C_SSC_TNPR.width=32
+AT91C_SSC_TNPR.byteEndian=little
+AT91C_SSC_PTSR.name="AT91C_SSC_PTSR"
+AT91C_SSC_PTSR.description="PDC Transfer Status Register"
+AT91C_SSC_PTSR.helpkey="PDC Transfer Status Register"
+AT91C_SSC_PTSR.access=memorymapped
+AT91C_SSC_PTSR.address=0xFFFD4124
+AT91C_SSC_PTSR.width=32
+AT91C_SSC_PTSR.byteEndian=little
+AT91C_SSC_PTSR.permission.write=none
+# ========== Register definition for SSC peripheral ========== 
+AT91C_SSC_RHR.name="AT91C_SSC_RHR"
+AT91C_SSC_RHR.description="Receive Holding Register"
+AT91C_SSC_RHR.helpkey="Receive Holding Register"
+AT91C_SSC_RHR.access=memorymapped
+AT91C_SSC_RHR.address=0xFFFD4020
+AT91C_SSC_RHR.width=32
+AT91C_SSC_RHR.byteEndian=little
+AT91C_SSC_RHR.permission.write=none
+AT91C_SSC_RSHR.name="AT91C_SSC_RSHR"
+AT91C_SSC_RSHR.description="Receive Sync Holding Register"
+AT91C_SSC_RSHR.helpkey="Receive Sync Holding Register"
+AT91C_SSC_RSHR.access=memorymapped
+AT91C_SSC_RSHR.address=0xFFFD4030
+AT91C_SSC_RSHR.width=32
+AT91C_SSC_RSHR.byteEndian=little
+AT91C_SSC_RSHR.permission.write=none
+AT91C_SSC_TFMR.name="AT91C_SSC_TFMR"
+AT91C_SSC_TFMR.description="Transmit Frame Mode Register"
+AT91C_SSC_TFMR.helpkey="Transmit Frame Mode Register"
+AT91C_SSC_TFMR.access=memorymapped
+AT91C_SSC_TFMR.address=0xFFFD401C
+AT91C_SSC_TFMR.width=32
+AT91C_SSC_TFMR.byteEndian=little
+AT91C_SSC_IDR.name="AT91C_SSC_IDR"
+AT91C_SSC_IDR.description="Interrupt Disable Register"
+AT91C_SSC_IDR.helpkey="Interrupt Disable Register"
+AT91C_SSC_IDR.access=memorymapped
+AT91C_SSC_IDR.address=0xFFFD4048
+AT91C_SSC_IDR.width=32
+AT91C_SSC_IDR.byteEndian=little
+AT91C_SSC_IDR.type=enum
+AT91C_SSC_IDR.enum.0.name=*** Write only ***
+AT91C_SSC_IDR.enum.1.name=Error
+AT91C_SSC_THR.name="AT91C_SSC_THR"
+AT91C_SSC_THR.description="Transmit Holding Register"
+AT91C_SSC_THR.helpkey="Transmit Holding Register"
+AT91C_SSC_THR.access=memorymapped
+AT91C_SSC_THR.address=0xFFFD4024
+AT91C_SSC_THR.width=32
+AT91C_SSC_THR.byteEndian=little
+AT91C_SSC_THR.type=enum
+AT91C_SSC_THR.enum.0.name=*** Write only ***
+AT91C_SSC_THR.enum.1.name=Error
+AT91C_SSC_RCMR.name="AT91C_SSC_RCMR"
+AT91C_SSC_RCMR.description="Receive Clock ModeRegister"
+AT91C_SSC_RCMR.helpkey="Receive Clock ModeRegister"
+AT91C_SSC_RCMR.access=memorymapped
+AT91C_SSC_RCMR.address=0xFFFD4010
+AT91C_SSC_RCMR.width=32
+AT91C_SSC_RCMR.byteEndian=little
+AT91C_SSC_IER.name="AT91C_SSC_IER"
+AT91C_SSC_IER.description="Interrupt Enable Register"
+AT91C_SSC_IER.helpkey="Interrupt Enable Register"
+AT91C_SSC_IER.access=memorymapped
+AT91C_SSC_IER.address=0xFFFD4044
+AT91C_SSC_IER.width=32
+AT91C_SSC_IER.byteEndian=little
+AT91C_SSC_IER.type=enum
+AT91C_SSC_IER.enum.0.name=*** Write only ***
+AT91C_SSC_IER.enum.1.name=Error
+AT91C_SSC_TSHR.name="AT91C_SSC_TSHR"
+AT91C_SSC_TSHR.description="Transmit Sync Holding Register"
+AT91C_SSC_TSHR.helpkey="Transmit Sync Holding Register"
+AT91C_SSC_TSHR.access=memorymapped
+AT91C_SSC_TSHR.address=0xFFFD4034
+AT91C_SSC_TSHR.width=32
+AT91C_SSC_TSHR.byteEndian=little
+AT91C_SSC_SR.name="AT91C_SSC_SR"
+AT91C_SSC_SR.description="Status Register"
+AT91C_SSC_SR.helpkey="Status Register"
+AT91C_SSC_SR.access=memorymapped
+AT91C_SSC_SR.address=0xFFFD4040
+AT91C_SSC_SR.width=32
+AT91C_SSC_SR.byteEndian=little
+AT91C_SSC_SR.permission.write=none
+AT91C_SSC_CMR.name="AT91C_SSC_CMR"
+AT91C_SSC_CMR.description="Clock Mode Register"
+AT91C_SSC_CMR.helpkey="Clock Mode Register"
+AT91C_SSC_CMR.access=memorymapped
+AT91C_SSC_CMR.address=0xFFFD4004
+AT91C_SSC_CMR.width=32
+AT91C_SSC_CMR.byteEndian=little
+AT91C_SSC_TCMR.name="AT91C_SSC_TCMR"
+AT91C_SSC_TCMR.description="Transmit Clock Mode Register"
+AT91C_SSC_TCMR.helpkey="Transmit Clock Mode Register"
+AT91C_SSC_TCMR.access=memorymapped
+AT91C_SSC_TCMR.address=0xFFFD4018
+AT91C_SSC_TCMR.width=32
+AT91C_SSC_TCMR.byteEndian=little
+AT91C_SSC_CR.name="AT91C_SSC_CR"
+AT91C_SSC_CR.description="Control Register"
+AT91C_SSC_CR.helpkey="Control Register"
+AT91C_SSC_CR.access=memorymapped
+AT91C_SSC_CR.address=0xFFFD4000
+AT91C_SSC_CR.width=32
+AT91C_SSC_CR.byteEndian=little
+AT91C_SSC_CR.type=enum
+AT91C_SSC_CR.enum.0.name=*** Write only ***
+AT91C_SSC_CR.enum.1.name=Error
+AT91C_SSC_IMR.name="AT91C_SSC_IMR"
+AT91C_SSC_IMR.description="Interrupt Mask Register"
+AT91C_SSC_IMR.helpkey="Interrupt Mask Register"
+AT91C_SSC_IMR.access=memorymapped
+AT91C_SSC_IMR.address=0xFFFD404C
+AT91C_SSC_IMR.width=32
+AT91C_SSC_IMR.byteEndian=little
+AT91C_SSC_IMR.permission.write=none
+AT91C_SSC_RFMR.name="AT91C_SSC_RFMR"
+AT91C_SSC_RFMR.description="Receive Frame Mode Register"
+AT91C_SSC_RFMR.helpkey="Receive Frame Mode Register"
+AT91C_SSC_RFMR.access=memorymapped
+AT91C_SSC_RFMR.address=0xFFFD4014
+AT91C_SSC_RFMR.width=32
+AT91C_SSC_RFMR.byteEndian=little
+# ========== Register definition for TWI peripheral ========== 
+AT91C_TWI_IER.name="AT91C_TWI_IER"
+AT91C_TWI_IER.description="Interrupt Enable Register"
+AT91C_TWI_IER.helpkey="Interrupt Enable Register"
+AT91C_TWI_IER.access=memorymapped
+AT91C_TWI_IER.address=0xFFFB8024
+AT91C_TWI_IER.width=32
+AT91C_TWI_IER.byteEndian=little
+AT91C_TWI_IER.type=enum
+AT91C_TWI_IER.enum.0.name=*** Write only ***
+AT91C_TWI_IER.enum.1.name=Error
+AT91C_TWI_CR.name="AT91C_TWI_CR"
+AT91C_TWI_CR.description="Control Register"
+AT91C_TWI_CR.helpkey="Control Register"
+AT91C_TWI_CR.access=memorymapped
+AT91C_TWI_CR.address=0xFFFB8000
+AT91C_TWI_CR.width=32
+AT91C_TWI_CR.byteEndian=little
+AT91C_TWI_CR.type=enum
+AT91C_TWI_CR.enum.0.name=*** Write only ***
+AT91C_TWI_CR.enum.1.name=Error
+AT91C_TWI_SR.name="AT91C_TWI_SR"
+AT91C_TWI_SR.description="Status Register"
+AT91C_TWI_SR.helpkey="Status Register"
+AT91C_TWI_SR.access=memorymapped
+AT91C_TWI_SR.address=0xFFFB8020
+AT91C_TWI_SR.width=32
+AT91C_TWI_SR.byteEndian=little
+AT91C_TWI_SR.permission.write=none
+AT91C_TWI_IMR.name="AT91C_TWI_IMR"
+AT91C_TWI_IMR.description="Interrupt Mask Register"
+AT91C_TWI_IMR.helpkey="Interrupt Mask Register"
+AT91C_TWI_IMR.access=memorymapped
+AT91C_TWI_IMR.address=0xFFFB802C
+AT91C_TWI_IMR.width=32
+AT91C_TWI_IMR.byteEndian=little
+AT91C_TWI_IMR.permission.write=none
+AT91C_TWI_THR.name="AT91C_TWI_THR"
+AT91C_TWI_THR.description="Transmit Holding Register"
+AT91C_TWI_THR.helpkey="Transmit Holding Register"
+AT91C_TWI_THR.access=memorymapped
+AT91C_TWI_THR.address=0xFFFB8034
+AT91C_TWI_THR.width=32
+AT91C_TWI_THR.byteEndian=little
+AT91C_TWI_THR.type=enum
+AT91C_TWI_THR.enum.0.name=*** Write only ***
+AT91C_TWI_THR.enum.1.name=Error
+AT91C_TWI_IDR.name="AT91C_TWI_IDR"
+AT91C_TWI_IDR.description="Interrupt Disable Register"
+AT91C_TWI_IDR.helpkey="Interrupt Disable Register"
+AT91C_TWI_IDR.access=memorymapped
+AT91C_TWI_IDR.address=0xFFFB8028
+AT91C_TWI_IDR.width=32
+AT91C_TWI_IDR.byteEndian=little
+AT91C_TWI_IDR.type=enum
+AT91C_TWI_IDR.enum.0.name=*** Write only ***
+AT91C_TWI_IDR.enum.1.name=Error
+AT91C_TWI_IADR.name="AT91C_TWI_IADR"
+AT91C_TWI_IADR.description="Internal Address Register"
+AT91C_TWI_IADR.helpkey="Internal Address Register"
+AT91C_TWI_IADR.access=memorymapped
+AT91C_TWI_IADR.address=0xFFFB800C
+AT91C_TWI_IADR.width=32
+AT91C_TWI_IADR.byteEndian=little
+AT91C_TWI_MMR.name="AT91C_TWI_MMR"
+AT91C_TWI_MMR.description="Master Mode Register"
+AT91C_TWI_MMR.helpkey="Master Mode Register"
+AT91C_TWI_MMR.access=memorymapped
+AT91C_TWI_MMR.address=0xFFFB8004
+AT91C_TWI_MMR.width=32
+AT91C_TWI_MMR.byteEndian=little
+AT91C_TWI_CWGR.name="AT91C_TWI_CWGR"
+AT91C_TWI_CWGR.description="Clock Waveform Generator Register"
+AT91C_TWI_CWGR.helpkey="Clock Waveform Generator Register"
+AT91C_TWI_CWGR.access=memorymapped
+AT91C_TWI_CWGR.address=0xFFFB8010
+AT91C_TWI_CWGR.width=32
+AT91C_TWI_CWGR.byteEndian=little
+AT91C_TWI_RHR.name="AT91C_TWI_RHR"
+AT91C_TWI_RHR.description="Receive Holding Register"
+AT91C_TWI_RHR.helpkey="Receive Holding Register"
+AT91C_TWI_RHR.access=memorymapped
+AT91C_TWI_RHR.address=0xFFFB8030
+AT91C_TWI_RHR.width=32
+AT91C_TWI_RHR.byteEndian=little
+AT91C_TWI_RHR.permission.write=none
+# ========== Register definition for PWMC_CH3 peripheral ========== 
+AT91C_PWMC_CH3_CUPDR.name="AT91C_PWMC_CH3_CUPDR"
+AT91C_PWMC_CH3_CUPDR.description="Channel Update Register"
+AT91C_PWMC_CH3_CUPDR.helpkey="Channel Update Register"
+AT91C_PWMC_CH3_CUPDR.access=memorymapped
+AT91C_PWMC_CH3_CUPDR.address=0xFFFCC270
+AT91C_PWMC_CH3_CUPDR.width=32
+AT91C_PWMC_CH3_CUPDR.byteEndian=little
+AT91C_PWMC_CH3_CUPDR.type=enum
+AT91C_PWMC_CH3_CUPDR.enum.0.name=*** Write only ***
+AT91C_PWMC_CH3_CUPDR.enum.1.name=Error
+AT91C_PWMC_CH3_Reserved.name="AT91C_PWMC_CH3_Reserved"
+AT91C_PWMC_CH3_Reserved.description="Reserved"
+AT91C_PWMC_CH3_Reserved.helpkey="Reserved"
+AT91C_PWMC_CH3_Reserved.access=memorymapped
+AT91C_PWMC_CH3_Reserved.address=0xFFFCC274
+AT91C_PWMC_CH3_Reserved.width=32
+AT91C_PWMC_CH3_Reserved.byteEndian=little
+AT91C_PWMC_CH3_Reserved.type=enum
+AT91C_PWMC_CH3_Reserved.enum.0.name=*** Write only ***
+AT91C_PWMC_CH3_Reserved.enum.1.name=Error
+AT91C_PWMC_CH3_CPRDR.name="AT91C_PWMC_CH3_CPRDR"
+AT91C_PWMC_CH3_CPRDR.description="Channel Period Register"
+AT91C_PWMC_CH3_CPRDR.helpkey="Channel Period Register"
+AT91C_PWMC_CH3_CPRDR.access=memorymapped
+AT91C_PWMC_CH3_CPRDR.address=0xFFFCC268
+AT91C_PWMC_CH3_CPRDR.width=32
+AT91C_PWMC_CH3_CPRDR.byteEndian=little
+AT91C_PWMC_CH3_CDTYR.name="AT91C_PWMC_CH3_CDTYR"
+AT91C_PWMC_CH3_CDTYR.description="Channel Duty Cycle Register"
+AT91C_PWMC_CH3_CDTYR.helpkey="Channel Duty Cycle Register"
+AT91C_PWMC_CH3_CDTYR.access=memorymapped
+AT91C_PWMC_CH3_CDTYR.address=0xFFFCC264
+AT91C_PWMC_CH3_CDTYR.width=32
+AT91C_PWMC_CH3_CDTYR.byteEndian=little
+AT91C_PWMC_CH3_CCNTR.name="AT91C_PWMC_CH3_CCNTR"
+AT91C_PWMC_CH3_CCNTR.description="Channel Counter Register"
+AT91C_PWMC_CH3_CCNTR.helpkey="Channel Counter Register"
+AT91C_PWMC_CH3_CCNTR.access=memorymapped
+AT91C_PWMC_CH3_CCNTR.address=0xFFFCC26C
+AT91C_PWMC_CH3_CCNTR.width=32
+AT91C_PWMC_CH3_CCNTR.byteEndian=little
+AT91C_PWMC_CH3_CCNTR.permission.write=none
+AT91C_PWMC_CH3_CMR.name="AT91C_PWMC_CH3_CMR"
+AT91C_PWMC_CH3_CMR.description="Channel Mode Register"
+AT91C_PWMC_CH3_CMR.helpkey="Channel Mode Register"
+AT91C_PWMC_CH3_CMR.access=memorymapped
+AT91C_PWMC_CH3_CMR.address=0xFFFCC260
+AT91C_PWMC_CH3_CMR.width=32
+AT91C_PWMC_CH3_CMR.byteEndian=little
+# ========== Register definition for PWMC_CH2 peripheral ========== 
+AT91C_PWMC_CH2_Reserved.name="AT91C_PWMC_CH2_Reserved"
+AT91C_PWMC_CH2_Reserved.description="Reserved"
+AT91C_PWMC_CH2_Reserved.helpkey="Reserved"
+AT91C_PWMC_CH2_Reserved.access=memorymapped
+AT91C_PWMC_CH2_Reserved.address=0xFFFCC254
+AT91C_PWMC_CH2_Reserved.width=32
+AT91C_PWMC_CH2_Reserved.byteEndian=little
+AT91C_PWMC_CH2_Reserved.type=enum
+AT91C_PWMC_CH2_Reserved.enum.0.name=*** Write only ***
+AT91C_PWMC_CH2_Reserved.enum.1.name=Error
+AT91C_PWMC_CH2_CMR.name="AT91C_PWMC_CH2_CMR"
+AT91C_PWMC_CH2_CMR.description="Channel Mode Register"
+AT91C_PWMC_CH2_CMR.helpkey="Channel Mode Register"
+AT91C_PWMC_CH2_CMR.access=memorymapped
+AT91C_PWMC_CH2_CMR.address=0xFFFCC240
+AT91C_PWMC_CH2_CMR.width=32
+AT91C_PWMC_CH2_CMR.byteEndian=little
+AT91C_PWMC_CH2_CCNTR.name="AT91C_PWMC_CH2_CCNTR"
+AT91C_PWMC_CH2_CCNTR.description="Channel Counter Register"
+AT91C_PWMC_CH2_CCNTR.helpkey="Channel Counter Register"
+AT91C_PWMC_CH2_CCNTR.access=memorymapped
+AT91C_PWMC_CH2_CCNTR.address=0xFFFCC24C
+AT91C_PWMC_CH2_CCNTR.width=32
+AT91C_PWMC_CH2_CCNTR.byteEndian=little
+AT91C_PWMC_CH2_CCNTR.permission.write=none
+AT91C_PWMC_CH2_CPRDR.name="AT91C_PWMC_CH2_CPRDR"
+AT91C_PWMC_CH2_CPRDR.description="Channel Period Register"
+AT91C_PWMC_CH2_CPRDR.helpkey="Channel Period Register"
+AT91C_PWMC_CH2_CPRDR.access=memorymapped
+AT91C_PWMC_CH2_CPRDR.address=0xFFFCC248
+AT91C_PWMC_CH2_CPRDR.width=32
+AT91C_PWMC_CH2_CPRDR.byteEndian=little
+AT91C_PWMC_CH2_CUPDR.name="AT91C_PWMC_CH2_CUPDR"
+AT91C_PWMC_CH2_CUPDR.description="Channel Update Register"
+AT91C_PWMC_CH2_CUPDR.helpkey="Channel Update Register"
+AT91C_PWMC_CH2_CUPDR.access=memorymapped
+AT91C_PWMC_CH2_CUPDR.address=0xFFFCC250
+AT91C_PWMC_CH2_CUPDR.width=32
+AT91C_PWMC_CH2_CUPDR.byteEndian=little
+AT91C_PWMC_CH2_CUPDR.type=enum
+AT91C_PWMC_CH2_CUPDR.enum.0.name=*** Write only ***
+AT91C_PWMC_CH2_CUPDR.enum.1.name=Error
+AT91C_PWMC_CH2_CDTYR.name="AT91C_PWMC_CH2_CDTYR"
+AT91C_PWMC_CH2_CDTYR.description="Channel Duty Cycle Register"
+AT91C_PWMC_CH2_CDTYR.helpkey="Channel Duty Cycle Register"
+AT91C_PWMC_CH2_CDTYR.access=memorymapped
+AT91C_PWMC_CH2_CDTYR.address=0xFFFCC244
+AT91C_PWMC_CH2_CDTYR.width=32
+AT91C_PWMC_CH2_CDTYR.byteEndian=little
+# ========== Register definition for PWMC_CH1 peripheral ========== 
+AT91C_PWMC_CH1_Reserved.name="AT91C_PWMC_CH1_Reserved"
+AT91C_PWMC_CH1_Reserved.description="Reserved"
+AT91C_PWMC_CH1_Reserved.helpkey="Reserved"
+AT91C_PWMC_CH1_Reserved.access=memorymapped
+AT91C_PWMC_CH1_Reserved.address=0xFFFCC234
+AT91C_PWMC_CH1_Reserved.width=32
+AT91C_PWMC_CH1_Reserved.byteEndian=little
+AT91C_PWMC_CH1_Reserved.type=enum
+AT91C_PWMC_CH1_Reserved.enum.0.name=*** Write only ***
+AT91C_PWMC_CH1_Reserved.enum.1.name=Error
+AT91C_PWMC_CH1_CUPDR.name="AT91C_PWMC_CH1_CUPDR"
+AT91C_PWMC_CH1_CUPDR.description="Channel Update Register"
+AT91C_PWMC_CH1_CUPDR.helpkey="Channel Update Register"
+AT91C_PWMC_CH1_CUPDR.access=memorymapped
+AT91C_PWMC_CH1_CUPDR.address=0xFFFCC230
+AT91C_PWMC_CH1_CUPDR.width=32
+AT91C_PWMC_CH1_CUPDR.byteEndian=little
+AT91C_PWMC_CH1_CUPDR.type=enum
+AT91C_PWMC_CH1_CUPDR.enum.0.name=*** Write only ***
+AT91C_PWMC_CH1_CUPDR.enum.1.name=Error
+AT91C_PWMC_CH1_CPRDR.name="AT91C_PWMC_CH1_CPRDR"
+AT91C_PWMC_CH1_CPRDR.description="Channel Period Register"
+AT91C_PWMC_CH1_CPRDR.helpkey="Channel Period Register"
+AT91C_PWMC_CH1_CPRDR.access=memorymapped
+AT91C_PWMC_CH1_CPRDR.address=0xFFFCC228
+AT91C_PWMC_CH1_CPRDR.width=32
+AT91C_PWMC_CH1_CPRDR.byteEndian=little
+AT91C_PWMC_CH1_CCNTR.name="AT91C_PWMC_CH1_CCNTR"
+AT91C_PWMC_CH1_CCNTR.description="Channel Counter Register"
+AT91C_PWMC_CH1_CCNTR.helpkey="Channel Counter Register"
+AT91C_PWMC_CH1_CCNTR.access=memorymapped
+AT91C_PWMC_CH1_CCNTR.address=0xFFFCC22C
+AT91C_PWMC_CH1_CCNTR.width=32
+AT91C_PWMC_CH1_CCNTR.byteEndian=little
+AT91C_PWMC_CH1_CCNTR.permission.write=none
+AT91C_PWMC_CH1_CDTYR.name="AT91C_PWMC_CH1_CDTYR"
+AT91C_PWMC_CH1_CDTYR.description="Channel Duty Cycle Register"
+AT91C_PWMC_CH1_CDTYR.helpkey="Channel Duty Cycle Register"
+AT91C_PWMC_CH1_CDTYR.access=memorymapped
+AT91C_PWMC_CH1_CDTYR.address=0xFFFCC224
+AT91C_PWMC_CH1_CDTYR.width=32
+AT91C_PWMC_CH1_CDTYR.byteEndian=little
+AT91C_PWMC_CH1_CMR.name="AT91C_PWMC_CH1_CMR"
+AT91C_PWMC_CH1_CMR.description="Channel Mode Register"
+AT91C_PWMC_CH1_CMR.helpkey="Channel Mode Register"
+AT91C_PWMC_CH1_CMR.access=memorymapped
+AT91C_PWMC_CH1_CMR.address=0xFFFCC220
+AT91C_PWMC_CH1_CMR.width=32
+AT91C_PWMC_CH1_CMR.byteEndian=little
+# ========== Register definition for PWMC_CH0 peripheral ========== 
+AT91C_PWMC_CH0_Reserved.name="AT91C_PWMC_CH0_Reserved"
+AT91C_PWMC_CH0_Reserved.description="Reserved"
+AT91C_PWMC_CH0_Reserved.helpkey="Reserved"
+AT91C_PWMC_CH0_Reserved.access=memorymapped
+AT91C_PWMC_CH0_Reserved.address=0xFFFCC214
+AT91C_PWMC_CH0_Reserved.width=32
+AT91C_PWMC_CH0_Reserved.byteEndian=little
+AT91C_PWMC_CH0_Reserved.type=enum
+AT91C_PWMC_CH0_Reserved.enum.0.name=*** Write only ***
+AT91C_PWMC_CH0_Reserved.enum.1.name=Error
+AT91C_PWMC_CH0_CPRDR.name="AT91C_PWMC_CH0_CPRDR"
+AT91C_PWMC_CH0_CPRDR.description="Channel Period Register"
+AT91C_PWMC_CH0_CPRDR.helpkey="Channel Period Register"
+AT91C_PWMC_CH0_CPRDR.access=memorymapped
+AT91C_PWMC_CH0_CPRDR.address=0xFFFCC208
+AT91C_PWMC_CH0_CPRDR.width=32
+AT91C_PWMC_CH0_CPRDR.byteEndian=little
+AT91C_PWMC_CH0_CDTYR.name="AT91C_PWMC_CH0_CDTYR"
+AT91C_PWMC_CH0_CDTYR.description="Channel Duty Cycle Register"
+AT91C_PWMC_CH0_CDTYR.helpkey="Channel Duty Cycle Register"
+AT91C_PWMC_CH0_CDTYR.access=memorymapped
+AT91C_PWMC_CH0_CDTYR.address=0xFFFCC204
+AT91C_PWMC_CH0_CDTYR.width=32
+AT91C_PWMC_CH0_CDTYR.byteEndian=little
+AT91C_PWMC_CH0_CMR.name="AT91C_PWMC_CH0_CMR"
+AT91C_PWMC_CH0_CMR.description="Channel Mode Register"
+AT91C_PWMC_CH0_CMR.helpkey="Channel Mode Register"
+AT91C_PWMC_CH0_CMR.access=memorymapped
+AT91C_PWMC_CH0_CMR.address=0xFFFCC200
+AT91C_PWMC_CH0_CMR.width=32
+AT91C_PWMC_CH0_CMR.byteEndian=little
+AT91C_PWMC_CH0_CUPDR.name="AT91C_PWMC_CH0_CUPDR"
+AT91C_PWMC_CH0_CUPDR.description="Channel Update Register"
+AT91C_PWMC_CH0_CUPDR.helpkey="Channel Update Register"
+AT91C_PWMC_CH0_CUPDR.access=memorymapped
+AT91C_PWMC_CH0_CUPDR.address=0xFFFCC210
+AT91C_PWMC_CH0_CUPDR.width=32
+AT91C_PWMC_CH0_CUPDR.byteEndian=little
+AT91C_PWMC_CH0_CUPDR.type=enum
+AT91C_PWMC_CH0_CUPDR.enum.0.name=*** Write only ***
+AT91C_PWMC_CH0_CUPDR.enum.1.name=Error
+AT91C_PWMC_CH0_CCNTR.name="AT91C_PWMC_CH0_CCNTR"
+AT91C_PWMC_CH0_CCNTR.description="Channel Counter Register"
+AT91C_PWMC_CH0_CCNTR.helpkey="Channel Counter Register"
+AT91C_PWMC_CH0_CCNTR.access=memorymapped
+AT91C_PWMC_CH0_CCNTR.address=0xFFFCC20C
+AT91C_PWMC_CH0_CCNTR.width=32
+AT91C_PWMC_CH0_CCNTR.byteEndian=little
+AT91C_PWMC_CH0_CCNTR.permission.write=none
+# ========== Register definition for PWMC peripheral ========== 
+AT91C_PWMC_IDR.name="AT91C_PWMC_IDR"
+AT91C_PWMC_IDR.description="PWMC Interrupt Disable Register"
+AT91C_PWMC_IDR.helpkey="PWMC Interrupt Disable Register"
+AT91C_PWMC_IDR.access=memorymapped
+AT91C_PWMC_IDR.address=0xFFFCC014
+AT91C_PWMC_IDR.width=32
+AT91C_PWMC_IDR.byteEndian=little
+AT91C_PWMC_IDR.type=enum
+AT91C_PWMC_IDR.enum.0.name=*** Write only ***
+AT91C_PWMC_IDR.enum.1.name=Error
+AT91C_PWMC_DIS.name="AT91C_PWMC_DIS"
+AT91C_PWMC_DIS.description="PWMC Disable Register"
+AT91C_PWMC_DIS.helpkey="PWMC Disable Register"
+AT91C_PWMC_DIS.access=memorymapped
+AT91C_PWMC_DIS.address=0xFFFCC008
+AT91C_PWMC_DIS.width=32
+AT91C_PWMC_DIS.byteEndian=little
+AT91C_PWMC_DIS.type=enum
+AT91C_PWMC_DIS.enum.0.name=*** Write only ***
+AT91C_PWMC_DIS.enum.1.name=Error
+AT91C_PWMC_IER.name="AT91C_PWMC_IER"
+AT91C_PWMC_IER.description="PWMC Interrupt Enable Register"
+AT91C_PWMC_IER.helpkey="PWMC Interrupt Enable Register"
+AT91C_PWMC_IER.access=memorymapped
+AT91C_PWMC_IER.address=0xFFFCC010
+AT91C_PWMC_IER.width=32
+AT91C_PWMC_IER.byteEndian=little
+AT91C_PWMC_IER.type=enum
+AT91C_PWMC_IER.enum.0.name=*** Write only ***
+AT91C_PWMC_IER.enum.1.name=Error
+AT91C_PWMC_VR.name="AT91C_PWMC_VR"
+AT91C_PWMC_VR.description="PWMC Version Register"
+AT91C_PWMC_VR.helpkey="PWMC Version Register"
+AT91C_PWMC_VR.access=memorymapped
+AT91C_PWMC_VR.address=0xFFFCC0FC
+AT91C_PWMC_VR.width=32
+AT91C_PWMC_VR.byteEndian=little
+AT91C_PWMC_VR.permission.write=none
+AT91C_PWMC_ISR.name="AT91C_PWMC_ISR"
+AT91C_PWMC_ISR.description="PWMC Interrupt Status Register"
+AT91C_PWMC_ISR.helpkey="PWMC Interrupt Status Register"
+AT91C_PWMC_ISR.access=memorymapped
+AT91C_PWMC_ISR.address=0xFFFCC01C
+AT91C_PWMC_ISR.width=32
+AT91C_PWMC_ISR.byteEndian=little
+AT91C_PWMC_ISR.permission.write=none
+AT91C_PWMC_SR.name="AT91C_PWMC_SR"
+AT91C_PWMC_SR.description="PWMC Status Register"
+AT91C_PWMC_SR.helpkey="PWMC Status Register"
+AT91C_PWMC_SR.access=memorymapped
+AT91C_PWMC_SR.address=0xFFFCC00C
+AT91C_PWMC_SR.width=32
+AT91C_PWMC_SR.byteEndian=little
+AT91C_PWMC_SR.permission.write=none
+AT91C_PWMC_IMR.name="AT91C_PWMC_IMR"
+AT91C_PWMC_IMR.description="PWMC Interrupt Mask Register"
+AT91C_PWMC_IMR.helpkey="PWMC Interrupt Mask Register"
+AT91C_PWMC_IMR.access=memorymapped
+AT91C_PWMC_IMR.address=0xFFFCC018
+AT91C_PWMC_IMR.width=32
+AT91C_PWMC_IMR.byteEndian=little
+AT91C_PWMC_IMR.permission.write=none
+AT91C_PWMC_MR.name="AT91C_PWMC_MR"
+AT91C_PWMC_MR.description="PWMC Mode Register"
+AT91C_PWMC_MR.helpkey="PWMC Mode Register"
+AT91C_PWMC_MR.access=memorymapped
+AT91C_PWMC_MR.address=0xFFFCC000
+AT91C_PWMC_MR.width=32
+AT91C_PWMC_MR.byteEndian=little
+AT91C_PWMC_ENA.name="AT91C_PWMC_ENA"
+AT91C_PWMC_ENA.description="PWMC Enable Register"
+AT91C_PWMC_ENA.helpkey="PWMC Enable Register"
+AT91C_PWMC_ENA.access=memorymapped
+AT91C_PWMC_ENA.address=0xFFFCC004
+AT91C_PWMC_ENA.width=32
+AT91C_PWMC_ENA.byteEndian=little
+AT91C_PWMC_ENA.type=enum
+AT91C_PWMC_ENA.enum.0.name=*** Write only ***
+AT91C_PWMC_ENA.enum.1.name=Error
+# ========== Register definition for UDP peripheral ========== 
+AT91C_UDP_IMR.name="AT91C_UDP_IMR"
+AT91C_UDP_IMR.description="Interrupt Mask Register"
+AT91C_UDP_IMR.helpkey="Interrupt Mask Register"
+AT91C_UDP_IMR.access=memorymapped
+AT91C_UDP_IMR.address=0xFFFB0018
+AT91C_UDP_IMR.width=32
+AT91C_UDP_IMR.byteEndian=little
+AT91C_UDP_IMR.permission.write=none
+AT91C_UDP_FADDR.name="AT91C_UDP_FADDR"
+AT91C_UDP_FADDR.description="Function Address Register"
+AT91C_UDP_FADDR.helpkey="Function Address Register"
+AT91C_UDP_FADDR.access=memorymapped
+AT91C_UDP_FADDR.address=0xFFFB0008
+AT91C_UDP_FADDR.width=32
+AT91C_UDP_FADDR.byteEndian=little
+AT91C_UDP_NUM.name="AT91C_UDP_NUM"
+AT91C_UDP_NUM.description="Frame Number Register"
+AT91C_UDP_NUM.helpkey="Frame Number Register"
+AT91C_UDP_NUM.access=memorymapped
+AT91C_UDP_NUM.address=0xFFFB0000
+AT91C_UDP_NUM.width=32
+AT91C_UDP_NUM.byteEndian=little
+AT91C_UDP_NUM.permission.write=none
+AT91C_UDP_FDR.name="AT91C_UDP_FDR"
+AT91C_UDP_FDR.description="Endpoint FIFO Data Register"
+AT91C_UDP_FDR.helpkey="Endpoint FIFO Data Register"
+AT91C_UDP_FDR.access=memorymapped
+AT91C_UDP_FDR.address=0xFFFB0050
+AT91C_UDP_FDR.width=32
+AT91C_UDP_FDR.byteEndian=little
+AT91C_UDP_ISR.name="AT91C_UDP_ISR"
+AT91C_UDP_ISR.description="Interrupt Status Register"
+AT91C_UDP_ISR.helpkey="Interrupt Status Register"
+AT91C_UDP_ISR.access=memorymapped
+AT91C_UDP_ISR.address=0xFFFB001C
+AT91C_UDP_ISR.width=32
+AT91C_UDP_ISR.byteEndian=little
+AT91C_UDP_ISR.permission.write=none
+AT91C_UDP_CSR.name="AT91C_UDP_CSR"
+AT91C_UDP_CSR.description="Endpoint Control and Status Register"
+AT91C_UDP_CSR.helpkey="Endpoint Control and Status Register"
+AT91C_UDP_CSR.access=memorymapped
+AT91C_UDP_CSR.address=0xFFFB0030
+AT91C_UDP_CSR.width=32
+AT91C_UDP_CSR.byteEndian=little
+AT91C_UDP_IDR.name="AT91C_UDP_IDR"
+AT91C_UDP_IDR.description="Interrupt Disable Register"
+AT91C_UDP_IDR.helpkey="Interrupt Disable Register"
+AT91C_UDP_IDR.access=memorymapped
+AT91C_UDP_IDR.address=0xFFFB0014
+AT91C_UDP_IDR.width=32
+AT91C_UDP_IDR.byteEndian=little
+AT91C_UDP_IDR.type=enum
+AT91C_UDP_IDR.enum.0.name=*** Write only ***
+AT91C_UDP_IDR.enum.1.name=Error
+AT91C_UDP_ICR.name="AT91C_UDP_ICR"
+AT91C_UDP_ICR.description="Interrupt Clear Register"
+AT91C_UDP_ICR.helpkey="Interrupt Clear Register"
+AT91C_UDP_ICR.access=memorymapped
+AT91C_UDP_ICR.address=0xFFFB0020
+AT91C_UDP_ICR.width=32
+AT91C_UDP_ICR.byteEndian=little
+AT91C_UDP_ICR.permission.write=none
+AT91C_UDP_RSTEP.name="AT91C_UDP_RSTEP"
+AT91C_UDP_RSTEP.description="Reset Endpoint Register"
+AT91C_UDP_RSTEP.helpkey="Reset Endpoint Register"
+AT91C_UDP_RSTEP.access=memorymapped
+AT91C_UDP_RSTEP.address=0xFFFB0028
+AT91C_UDP_RSTEP.width=32
+AT91C_UDP_RSTEP.byteEndian=little
+AT91C_UDP_RSTEP.permission.write=none
+AT91C_UDP_TXVC.name="AT91C_UDP_TXVC"
+AT91C_UDP_TXVC.description="Transceiver Control Register"
+AT91C_UDP_TXVC.helpkey="Transceiver Control Register"
+AT91C_UDP_TXVC.access=memorymapped
+AT91C_UDP_TXVC.address=0xFFFB0074
+AT91C_UDP_TXVC.width=32
+AT91C_UDP_TXVC.byteEndian=little
+AT91C_UDP_GLBSTATE.name="AT91C_UDP_GLBSTATE"
+AT91C_UDP_GLBSTATE.description="Global State Register"
+AT91C_UDP_GLBSTATE.helpkey="Global State Register"
+AT91C_UDP_GLBSTATE.access=memorymapped
+AT91C_UDP_GLBSTATE.address=0xFFFB0004
+AT91C_UDP_GLBSTATE.width=32
+AT91C_UDP_GLBSTATE.byteEndian=little
+AT91C_UDP_IER.name="AT91C_UDP_IER"
+AT91C_UDP_IER.description="Interrupt Enable Register"
+AT91C_UDP_IER.helpkey="Interrupt Enable Register"
+AT91C_UDP_IER.access=memorymapped
+AT91C_UDP_IER.address=0xFFFB0010
+AT91C_UDP_IER.width=32
+AT91C_UDP_IER.byteEndian=little
+AT91C_UDP_IER.type=enum
+AT91C_UDP_IER.enum.0.name=*** Write only ***
+AT91C_UDP_IER.enum.1.name=Error
+# ========== Register definition for TC0 peripheral ========== 
+AT91C_TC0_SR.name="AT91C_TC0_SR"
+AT91C_TC0_SR.description="Status Register"
+AT91C_TC0_SR.helpkey="Status Register"
+AT91C_TC0_SR.access=memorymapped
+AT91C_TC0_SR.address=0xFFFA0020
+AT91C_TC0_SR.width=32
+AT91C_TC0_SR.byteEndian=little
+AT91C_TC0_SR.permission.write=none
+AT91C_TC0_RC.name="AT91C_TC0_RC"
+AT91C_TC0_RC.description="Register C"
+AT91C_TC0_RC.helpkey="Register C"
+AT91C_TC0_RC.access=memorymapped
+AT91C_TC0_RC.address=0xFFFA001C
+AT91C_TC0_RC.width=32
+AT91C_TC0_RC.byteEndian=little
+AT91C_TC0_RB.name="AT91C_TC0_RB"
+AT91C_TC0_RB.description="Register B"
+AT91C_TC0_RB.helpkey="Register B"
+AT91C_TC0_RB.access=memorymapped
+AT91C_TC0_RB.address=0xFFFA0018
+AT91C_TC0_RB.width=32
+AT91C_TC0_RB.byteEndian=little
+AT91C_TC0_CCR.name="AT91C_TC0_CCR"
+AT91C_TC0_CCR.description="Channel Control Register"
+AT91C_TC0_CCR.helpkey="Channel Control Register"
+AT91C_TC0_CCR.access=memorymapped
+AT91C_TC0_CCR.address=0xFFFA0000
+AT91C_TC0_CCR.width=32
+AT91C_TC0_CCR.byteEndian=little
+AT91C_TC0_CCR.type=enum
+AT91C_TC0_CCR.enum.0.name=*** Write only ***
+AT91C_TC0_CCR.enum.1.name=Error
+AT91C_TC0_CMR.name="AT91C_TC0_CMR"
+AT91C_TC0_CMR.description="Channel Mode Register (Capture Mode / Waveform Mode)"
+AT91C_TC0_CMR.helpkey="Channel Mode Register (Capture Mode / Waveform Mode)"
+AT91C_TC0_CMR.access=memorymapped
+AT91C_TC0_CMR.address=0xFFFA0004
+AT91C_TC0_CMR.width=32
+AT91C_TC0_CMR.byteEndian=little
+AT91C_TC0_IER.name="AT91C_TC0_IER"
+AT91C_TC0_IER.description="Interrupt Enable Register"
+AT91C_TC0_IER.helpkey="Interrupt Enable Register"
+AT91C_TC0_IER.access=memorymapped
+AT91C_TC0_IER.address=0xFFFA0024
+AT91C_TC0_IER.width=32
+AT91C_TC0_IER.byteEndian=little
+AT91C_TC0_IER.type=enum
+AT91C_TC0_IER.enum.0.name=*** Write only ***
+AT91C_TC0_IER.enum.1.name=Error
+AT91C_TC0_RA.name="AT91C_TC0_RA"
+AT91C_TC0_RA.description="Register A"
+AT91C_TC0_RA.helpkey="Register A"
+AT91C_TC0_RA.access=memorymapped
+AT91C_TC0_RA.address=0xFFFA0014
+AT91C_TC0_RA.width=32
+AT91C_TC0_RA.byteEndian=little
+AT91C_TC0_IDR.name="AT91C_TC0_IDR"
+AT91C_TC0_IDR.description="Interrupt Disable Register"
+AT91C_TC0_IDR.helpkey="Interrupt Disable Register"
+AT91C_TC0_IDR.access=memorymapped
+AT91C_TC0_IDR.address=0xFFFA0028
+AT91C_TC0_IDR.width=32
+AT91C_TC0_IDR.byteEndian=little
+AT91C_TC0_IDR.type=enum
+AT91C_TC0_IDR.enum.0.name=*** Write only ***
+AT91C_TC0_IDR.enum.1.name=Error
+AT91C_TC0_CV.name="AT91C_TC0_CV"
+AT91C_TC0_CV.description="Counter Value"
+AT91C_TC0_CV.helpkey="Counter Value"
+AT91C_TC0_CV.access=memorymapped
+AT91C_TC0_CV.address=0xFFFA0010
+AT91C_TC0_CV.width=32
+AT91C_TC0_CV.byteEndian=little
+AT91C_TC0_IMR.name="AT91C_TC0_IMR"
+AT91C_TC0_IMR.description="Interrupt Mask Register"
+AT91C_TC0_IMR.helpkey="Interrupt Mask Register"
+AT91C_TC0_IMR.access=memorymapped
+AT91C_TC0_IMR.address=0xFFFA002C
+AT91C_TC0_IMR.width=32
+AT91C_TC0_IMR.byteEndian=little
+AT91C_TC0_IMR.permission.write=none
+# ========== Register definition for TC1 peripheral ========== 
+AT91C_TC1_RB.name="AT91C_TC1_RB"
+AT91C_TC1_RB.description="Register B"
+AT91C_TC1_RB.helpkey="Register B"
+AT91C_TC1_RB.access=memorymapped
+AT91C_TC1_RB.address=0xFFFA0058
+AT91C_TC1_RB.width=32
+AT91C_TC1_RB.byteEndian=little
+AT91C_TC1_CCR.name="AT91C_TC1_CCR"
+AT91C_TC1_CCR.description="Channel Control Register"
+AT91C_TC1_CCR.helpkey="Channel Control Register"
+AT91C_TC1_CCR.access=memorymapped
+AT91C_TC1_CCR.address=0xFFFA0040
+AT91C_TC1_CCR.width=32
+AT91C_TC1_CCR.byteEndian=little
+AT91C_TC1_CCR.type=enum
+AT91C_TC1_CCR.enum.0.name=*** Write only ***
+AT91C_TC1_CCR.enum.1.name=Error
+AT91C_TC1_IER.name="AT91C_TC1_IER"
+AT91C_TC1_IER.description="Interrupt Enable Register"
+AT91C_TC1_IER.helpkey="Interrupt Enable Register"
+AT91C_TC1_IER.access=memorymapped
+AT91C_TC1_IER.address=0xFFFA0064
+AT91C_TC1_IER.width=32
+AT91C_TC1_IER.byteEndian=little
+AT91C_TC1_IER.type=enum
+AT91C_TC1_IER.enum.0.name=*** Write only ***
+AT91C_TC1_IER.enum.1.name=Error
+AT91C_TC1_IDR.name="AT91C_TC1_IDR"
+AT91C_TC1_IDR.description="Interrupt Disable Register"
+AT91C_TC1_IDR.helpkey="Interrupt Disable Register"
+AT91C_TC1_IDR.access=memorymapped
+AT91C_TC1_IDR.address=0xFFFA0068
+AT91C_TC1_IDR.width=32
+AT91C_TC1_IDR.byteEndian=little
+AT91C_TC1_IDR.type=enum
+AT91C_TC1_IDR.enum.0.name=*** Write only ***
+AT91C_TC1_IDR.enum.1.name=Error
+AT91C_TC1_SR.name="AT91C_TC1_SR"
+AT91C_TC1_SR.description="Status Register"
+AT91C_TC1_SR.helpkey="Status Register"
+AT91C_TC1_SR.access=memorymapped
+AT91C_TC1_SR.address=0xFFFA0060
+AT91C_TC1_SR.width=32
+AT91C_TC1_SR.byteEndian=little
+AT91C_TC1_SR.permission.write=none
+AT91C_TC1_CMR.name="AT91C_TC1_CMR"
+AT91C_TC1_CMR.description="Channel Mode Register (Capture Mode / Waveform Mode)"
+AT91C_TC1_CMR.helpkey="Channel Mode Register (Capture Mode / Waveform Mode)"
+AT91C_TC1_CMR.access=memorymapped
+AT91C_TC1_CMR.address=0xFFFA0044
+AT91C_TC1_CMR.width=32
+AT91C_TC1_CMR.byteEndian=little
+AT91C_TC1_RA.name="AT91C_TC1_RA"
+AT91C_TC1_RA.description="Register A"
+AT91C_TC1_RA.helpkey="Register A"
+AT91C_TC1_RA.access=memorymapped
+AT91C_TC1_RA.address=0xFFFA0054
+AT91C_TC1_RA.width=32
+AT91C_TC1_RA.byteEndian=little
+AT91C_TC1_RC.name="AT91C_TC1_RC"
+AT91C_TC1_RC.description="Register C"
+AT91C_TC1_RC.helpkey="Register C"
+AT91C_TC1_RC.access=memorymapped
+AT91C_TC1_RC.address=0xFFFA005C
+AT91C_TC1_RC.width=32
+AT91C_TC1_RC.byteEndian=little
+AT91C_TC1_IMR.name="AT91C_TC1_IMR"
+AT91C_TC1_IMR.description="Interrupt Mask Register"
+AT91C_TC1_IMR.helpkey="Interrupt Mask Register"
+AT91C_TC1_IMR.access=memorymapped
+AT91C_TC1_IMR.address=0xFFFA006C
+AT91C_TC1_IMR.width=32
+AT91C_TC1_IMR.byteEndian=little
+AT91C_TC1_IMR.permission.write=none
+AT91C_TC1_CV.name="AT91C_TC1_CV"
+AT91C_TC1_CV.description="Counter Value"
+AT91C_TC1_CV.helpkey="Counter Value"
+AT91C_TC1_CV.access=memorymapped
+AT91C_TC1_CV.address=0xFFFA0050
+AT91C_TC1_CV.width=32
+AT91C_TC1_CV.byteEndian=little
+# ========== Register definition for TC2 peripheral ========== 
+AT91C_TC2_CMR.name="AT91C_TC2_CMR"
+AT91C_TC2_CMR.description="Channel Mode Register (Capture Mode / Waveform Mode)"
+AT91C_TC2_CMR.helpkey="Channel Mode Register (Capture Mode / Waveform Mode)"
+AT91C_TC2_CMR.access=memorymapped
+AT91C_TC2_CMR.address=0xFFFA0084
+AT91C_TC2_CMR.width=32
+AT91C_TC2_CMR.byteEndian=little
+AT91C_TC2_CCR.name="AT91C_TC2_CCR"
+AT91C_TC2_CCR.description="Channel Control Register"
+AT91C_TC2_CCR.helpkey="Channel Control Register"
+AT91C_TC2_CCR.access=memorymapped
+AT91C_TC2_CCR.address=0xFFFA0080
+AT91C_TC2_CCR.width=32
+AT91C_TC2_CCR.byteEndian=little
+AT91C_TC2_CCR.type=enum
+AT91C_TC2_CCR.enum.0.name=*** Write only ***
+AT91C_TC2_CCR.enum.1.name=Error
+AT91C_TC2_CV.name="AT91C_TC2_CV"
+AT91C_TC2_CV.description="Counter Value"
+AT91C_TC2_CV.helpkey="Counter Value"
+AT91C_TC2_CV.access=memorymapped
+AT91C_TC2_CV.address=0xFFFA0090
+AT91C_TC2_CV.width=32
+AT91C_TC2_CV.byteEndian=little
+AT91C_TC2_RA.name="AT91C_TC2_RA"
+AT91C_TC2_RA.description="Register A"
+AT91C_TC2_RA.helpkey="Register A"
+AT91C_TC2_RA.access=memorymapped
+AT91C_TC2_RA.address=0xFFFA0094
+AT91C_TC2_RA.width=32
+AT91C_TC2_RA.byteEndian=little
+AT91C_TC2_RB.name="AT91C_TC2_RB"
+AT91C_TC2_RB.description="Register B"
+AT91C_TC2_RB.helpkey="Register B"
+AT91C_TC2_RB.access=memorymapped
+AT91C_TC2_RB.address=0xFFFA0098
+AT91C_TC2_RB.width=32
+AT91C_TC2_RB.byteEndian=little
+AT91C_TC2_IDR.name="AT91C_TC2_IDR"
+AT91C_TC2_IDR.description="Interrupt Disable Register"
+AT91C_TC2_IDR.helpkey="Interrupt Disable Register"
+AT91C_TC2_IDR.access=memorymapped
+AT91C_TC2_IDR.address=0xFFFA00A8
+AT91C_TC2_IDR.width=32
+AT91C_TC2_IDR.byteEndian=little
+AT91C_TC2_IDR.type=enum
+AT91C_TC2_IDR.enum.0.name=*** Write only ***
+AT91C_TC2_IDR.enum.1.name=Error
+AT91C_TC2_IMR.name="AT91C_TC2_IMR"
+AT91C_TC2_IMR.description="Interrupt Mask Register"
+AT91C_TC2_IMR.helpkey="Interrupt Mask Register"
+AT91C_TC2_IMR.access=memorymapped
+AT91C_TC2_IMR.address=0xFFFA00AC
+AT91C_TC2_IMR.width=32
+AT91C_TC2_IMR.byteEndian=little
+AT91C_TC2_IMR.permission.write=none
+AT91C_TC2_RC.name="AT91C_TC2_RC"
+AT91C_TC2_RC.description="Register C"
+AT91C_TC2_RC.helpkey="Register C"
+AT91C_TC2_RC.access=memorymapped
+AT91C_TC2_RC.address=0xFFFA009C
+AT91C_TC2_RC.width=32
+AT91C_TC2_RC.byteEndian=little
+AT91C_TC2_IER.name="AT91C_TC2_IER"
+AT91C_TC2_IER.description="Interrupt Enable Register"
+AT91C_TC2_IER.helpkey="Interrupt Enable Register"
+AT91C_TC2_IER.access=memorymapped
+AT91C_TC2_IER.address=0xFFFA00A4
+AT91C_TC2_IER.width=32
+AT91C_TC2_IER.byteEndian=little
+AT91C_TC2_IER.type=enum
+AT91C_TC2_IER.enum.0.name=*** Write only ***
+AT91C_TC2_IER.enum.1.name=Error
+AT91C_TC2_SR.name="AT91C_TC2_SR"
+AT91C_TC2_SR.description="Status Register"
+AT91C_TC2_SR.helpkey="Status Register"
+AT91C_TC2_SR.access=memorymapped
+AT91C_TC2_SR.address=0xFFFA00A0
+AT91C_TC2_SR.width=32
+AT91C_TC2_SR.byteEndian=little
+AT91C_TC2_SR.permission.write=none
+# ========== Register definition for TCB peripheral ========== 
+AT91C_TCB_BMR.name="AT91C_TCB_BMR"
+AT91C_TCB_BMR.description="TC Block Mode Register"
+AT91C_TCB_BMR.helpkey="TC Block Mode Register"
+AT91C_TCB_BMR.access=memorymapped
+AT91C_TCB_BMR.address=0xFFFA00C4
+AT91C_TCB_BMR.width=32
+AT91C_TCB_BMR.byteEndian=little
+AT91C_TCB_BCR.name="AT91C_TCB_BCR"
+AT91C_TCB_BCR.description="TC Block Control Register"
+AT91C_TCB_BCR.helpkey="TC Block Control Register"
+AT91C_TCB_BCR.access=memorymapped
+AT91C_TCB_BCR.address=0xFFFA00C0
+AT91C_TCB_BCR.width=32
+AT91C_TCB_BCR.byteEndian=little
+AT91C_TCB_BCR.type=enum
+AT91C_TCB_BCR.enum.0.name=*** Write only ***
+AT91C_TCB_BCR.enum.1.name=Error
+# ========== Register definition for CAN_MB0 peripheral ========== 
+AT91C_CAN_MB0_MDL.name="AT91C_CAN_MB0_MDL"
+AT91C_CAN_MB0_MDL.description="MailBox Data Low Register"
+AT91C_CAN_MB0_MDL.helpkey="MailBox Data Low Register"
+AT91C_CAN_MB0_MDL.access=memorymapped
+AT91C_CAN_MB0_MDL.address=0xFFFD0214
+AT91C_CAN_MB0_MDL.width=32
+AT91C_CAN_MB0_MDL.byteEndian=little
+AT91C_CAN_MB0_MAM.name="AT91C_CAN_MB0_MAM"
+AT91C_CAN_MB0_MAM.description="MailBox Acceptance Mask Register"
+AT91C_CAN_MB0_MAM.helpkey="MailBox Acceptance Mask Register"
+AT91C_CAN_MB0_MAM.access=memorymapped
+AT91C_CAN_MB0_MAM.address=0xFFFD0204
+AT91C_CAN_MB0_MAM.width=32
+AT91C_CAN_MB0_MAM.byteEndian=little
+AT91C_CAN_MB0_MCR.name="AT91C_CAN_MB0_MCR"
+AT91C_CAN_MB0_MCR.description="MailBox Control Register"
+AT91C_CAN_MB0_MCR.helpkey="MailBox Control Register"
+AT91C_CAN_MB0_MCR.access=memorymapped
+AT91C_CAN_MB0_MCR.address=0xFFFD021C
+AT91C_CAN_MB0_MCR.width=32
+AT91C_CAN_MB0_MCR.byteEndian=little
+AT91C_CAN_MB0_MCR.type=enum
+AT91C_CAN_MB0_MCR.enum.0.name=*** Write only ***
+AT91C_CAN_MB0_MCR.enum.1.name=Error
+AT91C_CAN_MB0_MID.name="AT91C_CAN_MB0_MID"
+AT91C_CAN_MB0_MID.description="MailBox ID Register"
+AT91C_CAN_MB0_MID.helpkey="MailBox ID Register"
+AT91C_CAN_MB0_MID.access=memorymapped
+AT91C_CAN_MB0_MID.address=0xFFFD0208
+AT91C_CAN_MB0_MID.width=32
+AT91C_CAN_MB0_MID.byteEndian=little
+AT91C_CAN_MB0_MSR.name="AT91C_CAN_MB0_MSR"
+AT91C_CAN_MB0_MSR.description="MailBox Status Register"
+AT91C_CAN_MB0_MSR.helpkey="MailBox Status Register"
+AT91C_CAN_MB0_MSR.access=memorymapped
+AT91C_CAN_MB0_MSR.address=0xFFFD0210
+AT91C_CAN_MB0_MSR.width=32
+AT91C_CAN_MB0_MSR.byteEndian=little
+AT91C_CAN_MB0_MSR.permission.write=none
+AT91C_CAN_MB0_MFID.name="AT91C_CAN_MB0_MFID"
+AT91C_CAN_MB0_MFID.description="MailBox Family ID Register"
+AT91C_CAN_MB0_MFID.helpkey="MailBox Family ID Register"
+AT91C_CAN_MB0_MFID.access=memorymapped
+AT91C_CAN_MB0_MFID.address=0xFFFD020C
+AT91C_CAN_MB0_MFID.width=32
+AT91C_CAN_MB0_MFID.byteEndian=little
+AT91C_CAN_MB0_MFID.permission.write=none
+AT91C_CAN_MB0_MDH.name="AT91C_CAN_MB0_MDH"
+AT91C_CAN_MB0_MDH.description="MailBox Data High Register"
+AT91C_CAN_MB0_MDH.helpkey="MailBox Data High Register"
+AT91C_CAN_MB0_MDH.access=memorymapped
+AT91C_CAN_MB0_MDH.address=0xFFFD0218
+AT91C_CAN_MB0_MDH.width=32
+AT91C_CAN_MB0_MDH.byteEndian=little
+AT91C_CAN_MB0_MMR.name="AT91C_CAN_MB0_MMR"
+AT91C_CAN_MB0_MMR.description="MailBox Mode Register"
+AT91C_CAN_MB0_MMR.helpkey="MailBox Mode Register"
+AT91C_CAN_MB0_MMR.access=memorymapped
+AT91C_CAN_MB0_MMR.address=0xFFFD0200
+AT91C_CAN_MB0_MMR.width=32
+AT91C_CAN_MB0_MMR.byteEndian=little
+# ========== Register definition for CAN_MB1 peripheral ========== 
+AT91C_CAN_MB1_MDL.name="AT91C_CAN_MB1_MDL"
+AT91C_CAN_MB1_MDL.description="MailBox Data Low Register"
+AT91C_CAN_MB1_MDL.helpkey="MailBox Data Low Register"
+AT91C_CAN_MB1_MDL.access=memorymapped
+AT91C_CAN_MB1_MDL.address=0xFFFD0234
+AT91C_CAN_MB1_MDL.width=32
+AT91C_CAN_MB1_MDL.byteEndian=little
+AT91C_CAN_MB1_MID.name="AT91C_CAN_MB1_MID"
+AT91C_CAN_MB1_MID.description="MailBox ID Register"
+AT91C_CAN_MB1_MID.helpkey="MailBox ID Register"
+AT91C_CAN_MB1_MID.access=memorymapped
+AT91C_CAN_MB1_MID.address=0xFFFD0228
+AT91C_CAN_MB1_MID.width=32
+AT91C_CAN_MB1_MID.byteEndian=little
+AT91C_CAN_MB1_MMR.name="AT91C_CAN_MB1_MMR"
+AT91C_CAN_MB1_MMR.description="MailBox Mode Register"
+AT91C_CAN_MB1_MMR.helpkey="MailBox Mode Register"
+AT91C_CAN_MB1_MMR.access=memorymapped
+AT91C_CAN_MB1_MMR.address=0xFFFD0220
+AT91C_CAN_MB1_MMR.width=32
+AT91C_CAN_MB1_MMR.byteEndian=little
+AT91C_CAN_MB1_MSR.name="AT91C_CAN_MB1_MSR"
+AT91C_CAN_MB1_MSR.description="MailBox Status Register"
+AT91C_CAN_MB1_MSR.helpkey="MailBox Status Register"
+AT91C_CAN_MB1_MSR.access=memorymapped
+AT91C_CAN_MB1_MSR.address=0xFFFD0230
+AT91C_CAN_MB1_MSR.width=32
+AT91C_CAN_MB1_MSR.byteEndian=little
+AT91C_CAN_MB1_MSR.permission.write=none
+AT91C_CAN_MB1_MAM.name="AT91C_CAN_MB1_MAM"
+AT91C_CAN_MB1_MAM.description="MailBox Acceptance Mask Register"
+AT91C_CAN_MB1_MAM.helpkey="MailBox Acceptance Mask Register"
+AT91C_CAN_MB1_MAM.access=memorymapped
+AT91C_CAN_MB1_MAM.address=0xFFFD0224
+AT91C_CAN_MB1_MAM.width=32
+AT91C_CAN_MB1_MAM.byteEndian=little
+AT91C_CAN_MB1_MDH.name="AT91C_CAN_MB1_MDH"
+AT91C_CAN_MB1_MDH.description="MailBox Data High Register"
+AT91C_CAN_MB1_MDH.helpkey="MailBox Data High Register"
+AT91C_CAN_MB1_MDH.access=memorymapped
+AT91C_CAN_MB1_MDH.address=0xFFFD0238
+AT91C_CAN_MB1_MDH.width=32
+AT91C_CAN_MB1_MDH.byteEndian=little
+AT91C_CAN_MB1_MCR.name="AT91C_CAN_MB1_MCR"
+AT91C_CAN_MB1_MCR.description="MailBox Control Register"
+AT91C_CAN_MB1_MCR.helpkey="MailBox Control Register"
+AT91C_CAN_MB1_MCR.access=memorymapped
+AT91C_CAN_MB1_MCR.address=0xFFFD023C
+AT91C_CAN_MB1_MCR.width=32
+AT91C_CAN_MB1_MCR.byteEndian=little
+AT91C_CAN_MB1_MCR.type=enum
+AT91C_CAN_MB1_MCR.enum.0.name=*** Write only ***
+AT91C_CAN_MB1_MCR.enum.1.name=Error
+AT91C_CAN_MB1_MFID.name="AT91C_CAN_MB1_MFID"
+AT91C_CAN_MB1_MFID.description="MailBox Family ID Register"
+AT91C_CAN_MB1_MFID.helpkey="MailBox Family ID Register"
+AT91C_CAN_MB1_MFID.access=memorymapped
+AT91C_CAN_MB1_MFID.address=0xFFFD022C
+AT91C_CAN_MB1_MFID.width=32
+AT91C_CAN_MB1_MFID.byteEndian=little
+AT91C_CAN_MB1_MFID.permission.write=none
+# ========== Register definition for CAN_MB2 peripheral ========== 
+AT91C_CAN_MB2_MCR.name="AT91C_CAN_MB2_MCR"
+AT91C_CAN_MB2_MCR.description="MailBox Control Register"
+AT91C_CAN_MB2_MCR.helpkey="MailBox Control Register"
+AT91C_CAN_MB2_MCR.access=memorymapped
+AT91C_CAN_MB2_MCR.address=0xFFFD025C
+AT91C_CAN_MB2_MCR.width=32
+AT91C_CAN_MB2_MCR.byteEndian=little
+AT91C_CAN_MB2_MCR.type=enum
+AT91C_CAN_MB2_MCR.enum.0.name=*** Write only ***
+AT91C_CAN_MB2_MCR.enum.1.name=Error
+AT91C_CAN_MB2_MDH.name="AT91C_CAN_MB2_MDH"
+AT91C_CAN_MB2_MDH.description="MailBox Data High Register"
+AT91C_CAN_MB2_MDH.helpkey="MailBox Data High Register"
+AT91C_CAN_MB2_MDH.access=memorymapped
+AT91C_CAN_MB2_MDH.address=0xFFFD0258
+AT91C_CAN_MB2_MDH.width=32
+AT91C_CAN_MB2_MDH.byteEndian=little
+AT91C_CAN_MB2_MID.name="AT91C_CAN_MB2_MID"
+AT91C_CAN_MB2_MID.description="MailBox ID Register"
+AT91C_CAN_MB2_MID.helpkey="MailBox ID Register"
+AT91C_CAN_MB2_MID.access=memorymapped
+AT91C_CAN_MB2_MID.address=0xFFFD0248
+AT91C_CAN_MB2_MID.width=32
+AT91C_CAN_MB2_MID.byteEndian=little
+AT91C_CAN_MB2_MDL.name="AT91C_CAN_MB2_MDL"
+AT91C_CAN_MB2_MDL.description="MailBox Data Low Register"
+AT91C_CAN_MB2_MDL.helpkey="MailBox Data Low Register"
+AT91C_CAN_MB2_MDL.access=memorymapped
+AT91C_CAN_MB2_MDL.address=0xFFFD0254
+AT91C_CAN_MB2_MDL.width=32
+AT91C_CAN_MB2_MDL.byteEndian=little
+AT91C_CAN_MB2_MMR.name="AT91C_CAN_MB2_MMR"
+AT91C_CAN_MB2_MMR.description="MailBox Mode Register"
+AT91C_CAN_MB2_MMR.helpkey="MailBox Mode Register"
+AT91C_CAN_MB2_MMR.access=memorymapped
+AT91C_CAN_MB2_MMR.address=0xFFFD0240
+AT91C_CAN_MB2_MMR.width=32
+AT91C_CAN_MB2_MMR.byteEndian=little
+AT91C_CAN_MB2_MAM.name="AT91C_CAN_MB2_MAM"
+AT91C_CAN_MB2_MAM.description="MailBox Acceptance Mask Register"
+AT91C_CAN_MB2_MAM.helpkey="MailBox Acceptance Mask Register"
+AT91C_CAN_MB2_MAM.access=memorymapped
+AT91C_CAN_MB2_MAM.address=0xFFFD0244
+AT91C_CAN_MB2_MAM.width=32
+AT91C_CAN_MB2_MAM.byteEndian=little
+AT91C_CAN_MB2_MFID.name="AT91C_CAN_MB2_MFID"
+AT91C_CAN_MB2_MFID.description="MailBox Family ID Register"
+AT91C_CAN_MB2_MFID.helpkey="MailBox Family ID Register"
+AT91C_CAN_MB2_MFID.access=memorymapped
+AT91C_CAN_MB2_MFID.address=0xFFFD024C
+AT91C_CAN_MB2_MFID.width=32
+AT91C_CAN_MB2_MFID.byteEndian=little
+AT91C_CAN_MB2_MFID.permission.write=none
+AT91C_CAN_MB2_MSR.name="AT91C_CAN_MB2_MSR"
+AT91C_CAN_MB2_MSR.description="MailBox Status Register"
+AT91C_CAN_MB2_MSR.helpkey="MailBox Status Register"
+AT91C_CAN_MB2_MSR.access=memorymapped
+AT91C_CAN_MB2_MSR.address=0xFFFD0250
+AT91C_CAN_MB2_MSR.width=32
+AT91C_CAN_MB2_MSR.byteEndian=little
+AT91C_CAN_MB2_MSR.permission.write=none
+# ========== Register definition for CAN_MB3 peripheral ========== 
+AT91C_CAN_MB3_MFID.name="AT91C_CAN_MB3_MFID"
+AT91C_CAN_MB3_MFID.description="MailBox Family ID Register"
+AT91C_CAN_MB3_MFID.helpkey="MailBox Family ID Register"
+AT91C_CAN_MB3_MFID.access=memorymapped
+AT91C_CAN_MB3_MFID.address=0xFFFD026C
+AT91C_CAN_MB3_MFID.width=32
+AT91C_CAN_MB3_MFID.byteEndian=little
+AT91C_CAN_MB3_MFID.permission.write=none
+AT91C_CAN_MB3_MAM.name="AT91C_CAN_MB3_MAM"
+AT91C_CAN_MB3_MAM.description="MailBox Acceptance Mask Register"
+AT91C_CAN_MB3_MAM.helpkey="MailBox Acceptance Mask Register"
+AT91C_CAN_MB3_MAM.access=memorymapped
+AT91C_CAN_MB3_MAM.address=0xFFFD0264
+AT91C_CAN_MB3_MAM.width=32
+AT91C_CAN_MB3_MAM.byteEndian=little
+AT91C_CAN_MB3_MID.name="AT91C_CAN_MB3_MID"
+AT91C_CAN_MB3_MID.description="MailBox ID Register"
+AT91C_CAN_MB3_MID.helpkey="MailBox ID Register"
+AT91C_CAN_MB3_MID.access=memorymapped
+AT91C_CAN_MB3_MID.address=0xFFFD0268
+AT91C_CAN_MB3_MID.width=32
+AT91C_CAN_MB3_MID.byteEndian=little
+AT91C_CAN_MB3_MCR.name="AT91C_CAN_MB3_MCR"
+AT91C_CAN_MB3_MCR.description="MailBox Control Register"
+AT91C_CAN_MB3_MCR.helpkey="MailBox Control Register"
+AT91C_CAN_MB3_MCR.access=memorymapped
+AT91C_CAN_MB3_MCR.address=0xFFFD027C
+AT91C_CAN_MB3_MCR.width=32
+AT91C_CAN_MB3_MCR.byteEndian=little
+AT91C_CAN_MB3_MCR.type=enum
+AT91C_CAN_MB3_MCR.enum.0.name=*** Write only ***
+AT91C_CAN_MB3_MCR.enum.1.name=Error
+AT91C_CAN_MB3_MMR.name="AT91C_CAN_MB3_MMR"
+AT91C_CAN_MB3_MMR.description="MailBox Mode Register"
+AT91C_CAN_MB3_MMR.helpkey="MailBox Mode Register"
+AT91C_CAN_MB3_MMR.access=memorymapped
+AT91C_CAN_MB3_MMR.address=0xFFFD0260
+AT91C_CAN_MB3_MMR.width=32
+AT91C_CAN_MB3_MMR.byteEndian=little
+AT91C_CAN_MB3_MSR.name="AT91C_CAN_MB3_MSR"
+AT91C_CAN_MB3_MSR.description="MailBox Status Register"
+AT91C_CAN_MB3_MSR.helpkey="MailBox Status Register"
+AT91C_CAN_MB3_MSR.access=memorymapped
+AT91C_CAN_MB3_MSR.address=0xFFFD0270
+AT91C_CAN_MB3_MSR.width=32
+AT91C_CAN_MB3_MSR.byteEndian=little
+AT91C_CAN_MB3_MSR.permission.write=none
+AT91C_CAN_MB3_MDL.name="AT91C_CAN_MB3_MDL"
+AT91C_CAN_MB3_MDL.description="MailBox Data Low Register"
+AT91C_CAN_MB3_MDL.helpkey="MailBox Data Low Register"
+AT91C_CAN_MB3_MDL.access=memorymapped
+AT91C_CAN_MB3_MDL.address=0xFFFD0274
+AT91C_CAN_MB3_MDL.width=32
+AT91C_CAN_MB3_MDL.byteEndian=little
+AT91C_CAN_MB3_MDH.name="AT91C_CAN_MB3_MDH"
+AT91C_CAN_MB3_MDH.description="MailBox Data High Register"
+AT91C_CAN_MB3_MDH.helpkey="MailBox Data High Register"
+AT91C_CAN_MB3_MDH.access=memorymapped
+AT91C_CAN_MB3_MDH.address=0xFFFD0278
+AT91C_CAN_MB3_MDH.width=32
+AT91C_CAN_MB3_MDH.byteEndian=little
+# ========== Register definition for CAN_MB4 peripheral ========== 
+AT91C_CAN_MB4_MID.name="AT91C_CAN_MB4_MID"
+AT91C_CAN_MB4_MID.description="MailBox ID Register"
+AT91C_CAN_MB4_MID.helpkey="MailBox ID Register"
+AT91C_CAN_MB4_MID.access=memorymapped
+AT91C_CAN_MB4_MID.address=0xFFFD0288
+AT91C_CAN_MB4_MID.width=32
+AT91C_CAN_MB4_MID.byteEndian=little
+AT91C_CAN_MB4_MMR.name="AT91C_CAN_MB4_MMR"
+AT91C_CAN_MB4_MMR.description="MailBox Mode Register"
+AT91C_CAN_MB4_MMR.helpkey="MailBox Mode Register"
+AT91C_CAN_MB4_MMR.access=memorymapped
+AT91C_CAN_MB4_MMR.address=0xFFFD0280
+AT91C_CAN_MB4_MMR.width=32
+AT91C_CAN_MB4_MMR.byteEndian=little
+AT91C_CAN_MB4_MDH.name="AT91C_CAN_MB4_MDH"
+AT91C_CAN_MB4_MDH.description="MailBox Data High Register"
+AT91C_CAN_MB4_MDH.helpkey="MailBox Data High Register"
+AT91C_CAN_MB4_MDH.access=memorymapped
+AT91C_CAN_MB4_MDH.address=0xFFFD0298
+AT91C_CAN_MB4_MDH.width=32
+AT91C_CAN_MB4_MDH.byteEndian=little
+AT91C_CAN_MB4_MFID.name="AT91C_CAN_MB4_MFID"
+AT91C_CAN_MB4_MFID.description="MailBox Family ID Register"
+AT91C_CAN_MB4_MFID.helpkey="MailBox Family ID Register"
+AT91C_CAN_MB4_MFID.access=memorymapped
+AT91C_CAN_MB4_MFID.address=0xFFFD028C
+AT91C_CAN_MB4_MFID.width=32
+AT91C_CAN_MB4_MFID.byteEndian=little
+AT91C_CAN_MB4_MFID.permission.write=none
+AT91C_CAN_MB4_MSR.name="AT91C_CAN_MB4_MSR"
+AT91C_CAN_MB4_MSR.description="MailBox Status Register"
+AT91C_CAN_MB4_MSR.helpkey="MailBox Status Register"
+AT91C_CAN_MB4_MSR.access=memorymapped
+AT91C_CAN_MB4_MSR.address=0xFFFD0290
+AT91C_CAN_MB4_MSR.width=32
+AT91C_CAN_MB4_MSR.byteEndian=little
+AT91C_CAN_MB4_MSR.permission.write=none
+AT91C_CAN_MB4_MCR.name="AT91C_CAN_MB4_MCR"
+AT91C_CAN_MB4_MCR.description="MailBox Control Register"
+AT91C_CAN_MB4_MCR.helpkey="MailBox Control Register"
+AT91C_CAN_MB4_MCR.access=memorymapped
+AT91C_CAN_MB4_MCR.address=0xFFFD029C
+AT91C_CAN_MB4_MCR.width=32
+AT91C_CAN_MB4_MCR.byteEndian=little
+AT91C_CAN_MB4_MCR.type=enum
+AT91C_CAN_MB4_MCR.enum.0.name=*** Write only ***
+AT91C_CAN_MB4_MCR.enum.1.name=Error
+AT91C_CAN_MB4_MDL.name="AT91C_CAN_MB4_MDL"
+AT91C_CAN_MB4_MDL.description="MailBox Data Low Register"
+AT91C_CAN_MB4_MDL.helpkey="MailBox Data Low Register"
+AT91C_CAN_MB4_MDL.access=memorymapped
+AT91C_CAN_MB4_MDL.address=0xFFFD0294
+AT91C_CAN_MB4_MDL.width=32
+AT91C_CAN_MB4_MDL.byteEndian=little
+AT91C_CAN_MB4_MAM.name="AT91C_CAN_MB4_MAM"
+AT91C_CAN_MB4_MAM.description="MailBox Acceptance Mask Register"
+AT91C_CAN_MB4_MAM.helpkey="MailBox Acceptance Mask Register"
+AT91C_CAN_MB4_MAM.access=memorymapped
+AT91C_CAN_MB4_MAM.address=0xFFFD0284
+AT91C_CAN_MB4_MAM.width=32
+AT91C_CAN_MB4_MAM.byteEndian=little
+# ========== Register definition for CAN_MB5 peripheral ========== 
+AT91C_CAN_MB5_MSR.name="AT91C_CAN_MB5_MSR"
+AT91C_CAN_MB5_MSR.description="MailBox Status Register"
+AT91C_CAN_MB5_MSR.helpkey="MailBox Status Register"
+AT91C_CAN_MB5_MSR.access=memorymapped
+AT91C_CAN_MB5_MSR.address=0xFFFD02B0
+AT91C_CAN_MB5_MSR.width=32
+AT91C_CAN_MB5_MSR.byteEndian=little
+AT91C_CAN_MB5_MSR.permission.write=none
+AT91C_CAN_MB5_MCR.name="AT91C_CAN_MB5_MCR"
+AT91C_CAN_MB5_MCR.description="MailBox Control Register"
+AT91C_CAN_MB5_MCR.helpkey="MailBox Control Register"
+AT91C_CAN_MB5_MCR.access=memorymapped
+AT91C_CAN_MB5_MCR.address=0xFFFD02BC
+AT91C_CAN_MB5_MCR.width=32
+AT91C_CAN_MB5_MCR.byteEndian=little
+AT91C_CAN_MB5_MCR.type=enum
+AT91C_CAN_MB5_MCR.enum.0.name=*** Write only ***
+AT91C_CAN_MB5_MCR.enum.1.name=Error
+AT91C_CAN_MB5_MFID.name="AT91C_CAN_MB5_MFID"
+AT91C_CAN_MB5_MFID.description="MailBox Family ID Register"
+AT91C_CAN_MB5_MFID.helpkey="MailBox Family ID Register"
+AT91C_CAN_MB5_MFID.access=memorymapped
+AT91C_CAN_MB5_MFID.address=0xFFFD02AC
+AT91C_CAN_MB5_MFID.width=32
+AT91C_CAN_MB5_MFID.byteEndian=little
+AT91C_CAN_MB5_MFID.permission.write=none
+AT91C_CAN_MB5_MDH.name="AT91C_CAN_MB5_MDH"
+AT91C_CAN_MB5_MDH.description="MailBox Data High Register"
+AT91C_CAN_MB5_MDH.helpkey="MailBox Data High Register"
+AT91C_CAN_MB5_MDH.access=memorymapped
+AT91C_CAN_MB5_MDH.address=0xFFFD02B8
+AT91C_CAN_MB5_MDH.width=32
+AT91C_CAN_MB5_MDH.byteEndian=little
+AT91C_CAN_MB5_MID.name="AT91C_CAN_MB5_MID"
+AT91C_CAN_MB5_MID.description="MailBox ID Register"
+AT91C_CAN_MB5_MID.helpkey="MailBox ID Register"
+AT91C_CAN_MB5_MID.access=memorymapped
+AT91C_CAN_MB5_MID.address=0xFFFD02A8
+AT91C_CAN_MB5_MID.width=32
+AT91C_CAN_MB5_MID.byteEndian=little
+AT91C_CAN_MB5_MMR.name="AT91C_CAN_MB5_MMR"
+AT91C_CAN_MB5_MMR.description="MailBox Mode Register"
+AT91C_CAN_MB5_MMR.helpkey="MailBox Mode Register"
+AT91C_CAN_MB5_MMR.access=memorymapped
+AT91C_CAN_MB5_MMR.address=0xFFFD02A0
+AT91C_CAN_MB5_MMR.width=32
+AT91C_CAN_MB5_MMR.byteEndian=little
+AT91C_CAN_MB5_MDL.name="AT91C_CAN_MB5_MDL"
+AT91C_CAN_MB5_MDL.description="MailBox Data Low Register"
+AT91C_CAN_MB5_MDL.helpkey="MailBox Data Low Register"
+AT91C_CAN_MB5_MDL.access=memorymapped
+AT91C_CAN_MB5_MDL.address=0xFFFD02B4
+AT91C_CAN_MB5_MDL.width=32
+AT91C_CAN_MB5_MDL.byteEndian=little
+AT91C_CAN_MB5_MAM.name="AT91C_CAN_MB5_MAM"
+AT91C_CAN_MB5_MAM.description="MailBox Acceptance Mask Register"
+AT91C_CAN_MB5_MAM.helpkey="MailBox Acceptance Mask Register"
+AT91C_CAN_MB5_MAM.access=memorymapped
+AT91C_CAN_MB5_MAM.address=0xFFFD02A4
+AT91C_CAN_MB5_MAM.width=32
+AT91C_CAN_MB5_MAM.byteEndian=little
+# ========== Register definition for CAN_MB6 peripheral ========== 
+AT91C_CAN_MB6_MFID.name="AT91C_CAN_MB6_MFID"
+AT91C_CAN_MB6_MFID.description="MailBox Family ID Register"
+AT91C_CAN_MB6_MFID.helpkey="MailBox Family ID Register"
+AT91C_CAN_MB6_MFID.access=memorymapped
+AT91C_CAN_MB6_MFID.address=0xFFFD02CC
+AT91C_CAN_MB6_MFID.width=32
+AT91C_CAN_MB6_MFID.byteEndian=little
+AT91C_CAN_MB6_MFID.permission.write=none
+AT91C_CAN_MB6_MID.name="AT91C_CAN_MB6_MID"
+AT91C_CAN_MB6_MID.description="MailBox ID Register"
+AT91C_CAN_MB6_MID.helpkey="MailBox ID Register"
+AT91C_CAN_MB6_MID.access=memorymapped
+AT91C_CAN_MB6_MID.address=0xFFFD02C8
+AT91C_CAN_MB6_MID.width=32
+AT91C_CAN_MB6_MID.byteEndian=little
+AT91C_CAN_MB6_MAM.name="AT91C_CAN_MB6_MAM"
+AT91C_CAN_MB6_MAM.description="MailBox Acceptance Mask Register"
+AT91C_CAN_MB6_MAM.helpkey="MailBox Acceptance Mask Register"
+AT91C_CAN_MB6_MAM.access=memorymapped
+AT91C_CAN_MB6_MAM.address=0xFFFD02C4
+AT91C_CAN_MB6_MAM.width=32
+AT91C_CAN_MB6_MAM.byteEndian=little
+AT91C_CAN_MB6_MSR.name="AT91C_CAN_MB6_MSR"
+AT91C_CAN_MB6_MSR.description="MailBox Status Register"
+AT91C_CAN_MB6_MSR.helpkey="MailBox Status Register"
+AT91C_CAN_MB6_MSR.access=memorymapped
+AT91C_CAN_MB6_MSR.address=0xFFFD02D0
+AT91C_CAN_MB6_MSR.width=32
+AT91C_CAN_MB6_MSR.byteEndian=little
+AT91C_CAN_MB6_MSR.permission.write=none
+AT91C_CAN_MB6_MDL.name="AT91C_CAN_MB6_MDL"
+AT91C_CAN_MB6_MDL.description="MailBox Data Low Register"
+AT91C_CAN_MB6_MDL.helpkey="MailBox Data Low Register"
+AT91C_CAN_MB6_MDL.access=memorymapped
+AT91C_CAN_MB6_MDL.address=0xFFFD02D4
+AT91C_CAN_MB6_MDL.width=32
+AT91C_CAN_MB6_MDL.byteEndian=little
+AT91C_CAN_MB6_MCR.name="AT91C_CAN_MB6_MCR"
+AT91C_CAN_MB6_MCR.description="MailBox Control Register"
+AT91C_CAN_MB6_MCR.helpkey="MailBox Control Register"
+AT91C_CAN_MB6_MCR.access=memorymapped
+AT91C_CAN_MB6_MCR.address=0xFFFD02DC
+AT91C_CAN_MB6_MCR.width=32
+AT91C_CAN_MB6_MCR.byteEndian=little
+AT91C_CAN_MB6_MCR.type=enum
+AT91C_CAN_MB6_MCR.enum.0.name=*** Write only ***
+AT91C_CAN_MB6_MCR.enum.1.name=Error
+AT91C_CAN_MB6_MDH.name="AT91C_CAN_MB6_MDH"
+AT91C_CAN_MB6_MDH.description="MailBox Data High Register"
+AT91C_CAN_MB6_MDH.helpkey="MailBox Data High Register"
+AT91C_CAN_MB6_MDH.access=memorymapped
+AT91C_CAN_MB6_MDH.address=0xFFFD02D8
+AT91C_CAN_MB6_MDH.width=32
+AT91C_CAN_MB6_MDH.byteEndian=little
+AT91C_CAN_MB6_MMR.name="AT91C_CAN_MB6_MMR"
+AT91C_CAN_MB6_MMR.description="MailBox Mode Register"
+AT91C_CAN_MB6_MMR.helpkey="MailBox Mode Register"
+AT91C_CAN_MB6_MMR.access=memorymapped
+AT91C_CAN_MB6_MMR.address=0xFFFD02C0
+AT91C_CAN_MB6_MMR.width=32
+AT91C_CAN_MB6_MMR.byteEndian=little
+# ========== Register definition for CAN_MB7 peripheral ========== 
+AT91C_CAN_MB7_MCR.name="AT91C_CAN_MB7_MCR"
+AT91C_CAN_MB7_MCR.description="MailBox Control Register"
+AT91C_CAN_MB7_MCR.helpkey="MailBox Control Register"
+AT91C_CAN_MB7_MCR.access=memorymapped
+AT91C_CAN_MB7_MCR.address=0xFFFD02FC
+AT91C_CAN_MB7_MCR.width=32
+AT91C_CAN_MB7_MCR.byteEndian=little
+AT91C_CAN_MB7_MCR.type=enum
+AT91C_CAN_MB7_MCR.enum.0.name=*** Write only ***
+AT91C_CAN_MB7_MCR.enum.1.name=Error
+AT91C_CAN_MB7_MDH.name="AT91C_CAN_MB7_MDH"
+AT91C_CAN_MB7_MDH.description="MailBox Data High Register"
+AT91C_CAN_MB7_MDH.helpkey="MailBox Data High Register"
+AT91C_CAN_MB7_MDH.access=memorymapped
+AT91C_CAN_MB7_MDH.address=0xFFFD02F8
+AT91C_CAN_MB7_MDH.width=32
+AT91C_CAN_MB7_MDH.byteEndian=little
+AT91C_CAN_MB7_MFID.name="AT91C_CAN_MB7_MFID"
+AT91C_CAN_MB7_MFID.description="MailBox Family ID Register"
+AT91C_CAN_MB7_MFID.helpkey="MailBox Family ID Register"
+AT91C_CAN_MB7_MFID.access=memorymapped
+AT91C_CAN_MB7_MFID.address=0xFFFD02EC
+AT91C_CAN_MB7_MFID.width=32
+AT91C_CAN_MB7_MFID.byteEndian=little
+AT91C_CAN_MB7_MFID.permission.write=none
+AT91C_CAN_MB7_MDL.name="AT91C_CAN_MB7_MDL"
+AT91C_CAN_MB7_MDL.description="MailBox Data Low Register"
+AT91C_CAN_MB7_MDL.helpkey="MailBox Data Low Register"
+AT91C_CAN_MB7_MDL.access=memorymapped
+AT91C_CAN_MB7_MDL.address=0xFFFD02F4
+AT91C_CAN_MB7_MDL.width=32
+AT91C_CAN_MB7_MDL.byteEndian=little
+AT91C_CAN_MB7_MID.name="AT91C_CAN_MB7_MID"
+AT91C_CAN_MB7_MID.description="MailBox ID Register"
+AT91C_CAN_MB7_MID.helpkey="MailBox ID Register"
+AT91C_CAN_MB7_MID.access=memorymapped
+AT91C_CAN_MB7_MID.address=0xFFFD02E8
+AT91C_CAN_MB7_MID.width=32
+AT91C_CAN_MB7_MID.byteEndian=little
+AT91C_CAN_MB7_MMR.name="AT91C_CAN_MB7_MMR"
+AT91C_CAN_MB7_MMR.description="MailBox Mode Register"
+AT91C_CAN_MB7_MMR.helpkey="MailBox Mode Register"
+AT91C_CAN_MB7_MMR.access=memorymapped
+AT91C_CAN_MB7_MMR.address=0xFFFD02E0
+AT91C_CAN_MB7_MMR.width=32
+AT91C_CAN_MB7_MMR.byteEndian=little
+AT91C_CAN_MB7_MAM.name="AT91C_CAN_MB7_MAM"
+AT91C_CAN_MB7_MAM.description="MailBox Acceptance Mask Register"
+AT91C_CAN_MB7_MAM.helpkey="MailBox Acceptance Mask Register"
+AT91C_CAN_MB7_MAM.access=memorymapped
+AT91C_CAN_MB7_MAM.address=0xFFFD02E4
+AT91C_CAN_MB7_MAM.width=32
+AT91C_CAN_MB7_MAM.byteEndian=little
+AT91C_CAN_MB7_MSR.name="AT91C_CAN_MB7_MSR"
+AT91C_CAN_MB7_MSR.description="MailBox Status Register"
+AT91C_CAN_MB7_MSR.helpkey="MailBox Status Register"
+AT91C_CAN_MB7_MSR.access=memorymapped
+AT91C_CAN_MB7_MSR.address=0xFFFD02F0
+AT91C_CAN_MB7_MSR.width=32
+AT91C_CAN_MB7_MSR.byteEndian=little
+AT91C_CAN_MB7_MSR.permission.write=none
+# ========== Register definition for CAN peripheral ========== 
+AT91C_CAN_TCR.name="AT91C_CAN_TCR"
+AT91C_CAN_TCR.description="Transfer Command Register"
+AT91C_CAN_TCR.helpkey="Transfer Command Register"
+AT91C_CAN_TCR.access=memorymapped
+AT91C_CAN_TCR.address=0xFFFD0024
+AT91C_CAN_TCR.width=32
+AT91C_CAN_TCR.byteEndian=little
+AT91C_CAN_TCR.type=enum
+AT91C_CAN_TCR.enum.0.name=*** Write only ***
+AT91C_CAN_TCR.enum.1.name=Error
+AT91C_CAN_IMR.name="AT91C_CAN_IMR"
+AT91C_CAN_IMR.description="Interrupt Mask Register"
+AT91C_CAN_IMR.helpkey="Interrupt Mask Register"
+AT91C_CAN_IMR.access=memorymapped
+AT91C_CAN_IMR.address=0xFFFD000C
+AT91C_CAN_IMR.width=32
+AT91C_CAN_IMR.byteEndian=little
+AT91C_CAN_IMR.permission.write=none
+AT91C_CAN_IER.name="AT91C_CAN_IER"
+AT91C_CAN_IER.description="Interrupt Enable Register"
+AT91C_CAN_IER.helpkey="Interrupt Enable Register"
+AT91C_CAN_IER.access=memorymapped
+AT91C_CAN_IER.address=0xFFFD0004
+AT91C_CAN_IER.width=32
+AT91C_CAN_IER.byteEndian=little
+AT91C_CAN_IER.type=enum
+AT91C_CAN_IER.enum.0.name=*** Write only ***
+AT91C_CAN_IER.enum.1.name=Error
+AT91C_CAN_ECR.name="AT91C_CAN_ECR"
+AT91C_CAN_ECR.description="Error Counter Register"
+AT91C_CAN_ECR.helpkey="Error Counter Register"
+AT91C_CAN_ECR.access=memorymapped
+AT91C_CAN_ECR.address=0xFFFD0020
+AT91C_CAN_ECR.width=32
+AT91C_CAN_ECR.byteEndian=little
+AT91C_CAN_ECR.permission.write=none
+AT91C_CAN_TIMESTP.name="AT91C_CAN_TIMESTP"
+AT91C_CAN_TIMESTP.description="Time Stamp Register"
+AT91C_CAN_TIMESTP.helpkey="Time Stamp Register"
+AT91C_CAN_TIMESTP.access=memorymapped
+AT91C_CAN_TIMESTP.address=0xFFFD001C
+AT91C_CAN_TIMESTP.width=32
+AT91C_CAN_TIMESTP.byteEndian=little
+AT91C_CAN_TIMESTP.permission.write=none
+AT91C_CAN_MR.name="AT91C_CAN_MR"
+AT91C_CAN_MR.description="Mode Register"
+AT91C_CAN_MR.helpkey="Mode Register"
+AT91C_CAN_MR.access=memorymapped
+AT91C_CAN_MR.address=0xFFFD0000
+AT91C_CAN_MR.width=32
+AT91C_CAN_MR.byteEndian=little
+AT91C_CAN_IDR.name="AT91C_CAN_IDR"
+AT91C_CAN_IDR.description="Interrupt Disable Register"
+AT91C_CAN_IDR.helpkey="Interrupt Disable Register"
+AT91C_CAN_IDR.access=memorymapped
+AT91C_CAN_IDR.address=0xFFFD0008
+AT91C_CAN_IDR.width=32
+AT91C_CAN_IDR.byteEndian=little
+AT91C_CAN_IDR.type=enum
+AT91C_CAN_IDR.enum.0.name=*** Write only ***
+AT91C_CAN_IDR.enum.1.name=Error
+AT91C_CAN_ACR.name="AT91C_CAN_ACR"
+AT91C_CAN_ACR.description="Abort Command Register"
+AT91C_CAN_ACR.helpkey="Abort Command Register"
+AT91C_CAN_ACR.access=memorymapped
+AT91C_CAN_ACR.address=0xFFFD0028
+AT91C_CAN_ACR.width=32
+AT91C_CAN_ACR.byteEndian=little
+AT91C_CAN_ACR.type=enum
+AT91C_CAN_ACR.enum.0.name=*** Write only ***
+AT91C_CAN_ACR.enum.1.name=Error
+AT91C_CAN_TIM.name="AT91C_CAN_TIM"
+AT91C_CAN_TIM.description="Timer Register"
+AT91C_CAN_TIM.helpkey="Timer Register"
+AT91C_CAN_TIM.access=memorymapped
+AT91C_CAN_TIM.address=0xFFFD0018
+AT91C_CAN_TIM.width=32
+AT91C_CAN_TIM.byteEndian=little
+AT91C_CAN_TIM.permission.write=none
+AT91C_CAN_SR.name="AT91C_CAN_SR"
+AT91C_CAN_SR.description="Status Register"
+AT91C_CAN_SR.helpkey="Status Register"
+AT91C_CAN_SR.access=memorymapped
+AT91C_CAN_SR.address=0xFFFD0010
+AT91C_CAN_SR.width=32
+AT91C_CAN_SR.byteEndian=little
+AT91C_CAN_SR.permission.write=none
+AT91C_CAN_BR.name="AT91C_CAN_BR"
+AT91C_CAN_BR.description="Baudrate Register"
+AT91C_CAN_BR.helpkey="Baudrate Register"
+AT91C_CAN_BR.access=memorymapped
+AT91C_CAN_BR.address=0xFFFD0014
+AT91C_CAN_BR.width=32
+AT91C_CAN_BR.byteEndian=little
+AT91C_CAN_VR.name="AT91C_CAN_VR"
+AT91C_CAN_VR.description="Version Register"
+AT91C_CAN_VR.helpkey="Version Register"
+AT91C_CAN_VR.access=memorymapped
+AT91C_CAN_VR.address=0xFFFD00FC
+AT91C_CAN_VR.width=32
+AT91C_CAN_VR.byteEndian=little
+AT91C_CAN_VR.permission.write=none
+# ========== Register definition for EMAC peripheral ========== 
+AT91C_EMAC_ISR.name="AT91C_EMAC_ISR"
+AT91C_EMAC_ISR.description="Interrupt Status Register"
+AT91C_EMAC_ISR.helpkey="Interrupt Status Register"
+AT91C_EMAC_ISR.access=memorymapped
+AT91C_EMAC_ISR.address=0xFFFDC024
+AT91C_EMAC_ISR.width=32
+AT91C_EMAC_ISR.byteEndian=little
+AT91C_EMAC_SA4H.name="AT91C_EMAC_SA4H"
+AT91C_EMAC_SA4H.description="Specific Address 4 Top, Last 2 bytes"
+AT91C_EMAC_SA4H.helpkey="Specific Address 4 Top, Last 2 bytes"
+AT91C_EMAC_SA4H.access=memorymapped
+AT91C_EMAC_SA4H.address=0xFFFDC0B4
+AT91C_EMAC_SA4H.width=32
+AT91C_EMAC_SA4H.byteEndian=little
+AT91C_EMAC_SA1L.name="AT91C_EMAC_SA1L"
+AT91C_EMAC_SA1L.description="Specific Address 1 Bottom, First 4 bytes"
+AT91C_EMAC_SA1L.helpkey="Specific Address 1 Bottom, First 4 bytes"
+AT91C_EMAC_SA1L.access=memorymapped
+AT91C_EMAC_SA1L.address=0xFFFDC098
+AT91C_EMAC_SA1L.width=32
+AT91C_EMAC_SA1L.byteEndian=little
+AT91C_EMAC_ELE.name="AT91C_EMAC_ELE"
+AT91C_EMAC_ELE.description="Excessive Length Errors Register"
+AT91C_EMAC_ELE.helpkey="Excessive Length Errors Register"
+AT91C_EMAC_ELE.access=memorymapped
+AT91C_EMAC_ELE.address=0xFFFDC078
+AT91C_EMAC_ELE.width=32
+AT91C_EMAC_ELE.byteEndian=little
+AT91C_EMAC_LCOL.name="AT91C_EMAC_LCOL"
+AT91C_EMAC_LCOL.description="Late Collision Register"
+AT91C_EMAC_LCOL.helpkey="Late Collision Register"
+AT91C_EMAC_LCOL.access=memorymapped
+AT91C_EMAC_LCOL.address=0xFFFDC05C
+AT91C_EMAC_LCOL.width=32
+AT91C_EMAC_LCOL.byteEndian=little
+AT91C_EMAC_RLE.name="AT91C_EMAC_RLE"
+AT91C_EMAC_RLE.description="Receive Length Field Mismatch Register"
+AT91C_EMAC_RLE.helpkey="Receive Length Field Mismatch Register"
+AT91C_EMAC_RLE.access=memorymapped
+AT91C_EMAC_RLE.address=0xFFFDC088
+AT91C_EMAC_RLE.width=32
+AT91C_EMAC_RLE.byteEndian=little
+AT91C_EMAC_WOL.name="AT91C_EMAC_WOL"
+AT91C_EMAC_WOL.description="Wake On LAN Register"
+AT91C_EMAC_WOL.helpkey="Wake On LAN Register"
+AT91C_EMAC_WOL.access=memorymapped
+AT91C_EMAC_WOL.address=0xFFFDC0C4
+AT91C_EMAC_WOL.width=32
+AT91C_EMAC_WOL.byteEndian=little
+AT91C_EMAC_DTF.name="AT91C_EMAC_DTF"
+AT91C_EMAC_DTF.description="Deferred Transmission Frame Register"
+AT91C_EMAC_DTF.helpkey="Deferred Transmission Frame Register"
+AT91C_EMAC_DTF.access=memorymapped
+AT91C_EMAC_DTF.address=0xFFFDC058
+AT91C_EMAC_DTF.width=32
+AT91C_EMAC_DTF.byteEndian=little
+AT91C_EMAC_TUND.name="AT91C_EMAC_TUND"
+AT91C_EMAC_TUND.description="Transmit Underrun Error Register"
+AT91C_EMAC_TUND.helpkey="Transmit Underrun Error Register"
+AT91C_EMAC_TUND.access=memorymapped
+AT91C_EMAC_TUND.address=0xFFFDC064
+AT91C_EMAC_TUND.width=32
+AT91C_EMAC_TUND.byteEndian=little
+AT91C_EMAC_NCR.name="AT91C_EMAC_NCR"
+AT91C_EMAC_NCR.description="Network Control Register"
+AT91C_EMAC_NCR.helpkey="Network Control Register"
+AT91C_EMAC_NCR.access=memorymapped
+AT91C_EMAC_NCR.address=0xFFFDC000
+AT91C_EMAC_NCR.width=32
+AT91C_EMAC_NCR.byteEndian=little
+AT91C_EMAC_SA4L.name="AT91C_EMAC_SA4L"
+AT91C_EMAC_SA4L.description="Specific Address 4 Bottom, First 4 bytes"
+AT91C_EMAC_SA4L.helpkey="Specific Address 4 Bottom, First 4 bytes"
+AT91C_EMAC_SA4L.access=memorymapped
+AT91C_EMAC_SA4L.address=0xFFFDC0B0
+AT91C_EMAC_SA4L.width=32
+AT91C_EMAC_SA4L.byteEndian=little
+AT91C_EMAC_RSR.name="AT91C_EMAC_RSR"
+AT91C_EMAC_RSR.description="Receive Status Register"
+AT91C_EMAC_RSR.helpkey="Receive Status Register"
+AT91C_EMAC_RSR.access=memorymapped
+AT91C_EMAC_RSR.address=0xFFFDC020
+AT91C_EMAC_RSR.width=32
+AT91C_EMAC_RSR.byteEndian=little
+AT91C_EMAC_SA3L.name="AT91C_EMAC_SA3L"
+AT91C_EMAC_SA3L.description="Specific Address 3 Bottom, First 4 bytes"
+AT91C_EMAC_SA3L.helpkey="Specific Address 3 Bottom, First 4 bytes"
+AT91C_EMAC_SA3L.access=memorymapped
+AT91C_EMAC_SA3L.address=0xFFFDC0A8
+AT91C_EMAC_SA3L.width=32
+AT91C_EMAC_SA3L.byteEndian=little
+AT91C_EMAC_TSR.name="AT91C_EMAC_TSR"
+AT91C_EMAC_TSR.description="Transmit Status Register"
+AT91C_EMAC_TSR.helpkey="Transmit Status Register"
+AT91C_EMAC_TSR.access=memorymapped
+AT91C_EMAC_TSR.address=0xFFFDC014
+AT91C_EMAC_TSR.width=32
+AT91C_EMAC_TSR.byteEndian=little
+AT91C_EMAC_IDR.name="AT91C_EMAC_IDR"
+AT91C_EMAC_IDR.description="Interrupt Disable Register"
+AT91C_EMAC_IDR.helpkey="Interrupt Disable Register"
+AT91C_EMAC_IDR.access=memorymapped
+AT91C_EMAC_IDR.address=0xFFFDC02C
+AT91C_EMAC_IDR.width=32
+AT91C_EMAC_IDR.byteEndian=little
+AT91C_EMAC_IDR.type=enum
+AT91C_EMAC_IDR.enum.0.name=*** Write only ***
+AT91C_EMAC_IDR.enum.1.name=Error
+AT91C_EMAC_RSE.name="AT91C_EMAC_RSE"
+AT91C_EMAC_RSE.description="Receive Symbol Errors Register"
+AT91C_EMAC_RSE.helpkey="Receive Symbol Errors Register"
+AT91C_EMAC_RSE.access=memorymapped
+AT91C_EMAC_RSE.address=0xFFFDC074
+AT91C_EMAC_RSE.width=32
+AT91C_EMAC_RSE.byteEndian=little
+AT91C_EMAC_ECOL.name="AT91C_EMAC_ECOL"
+AT91C_EMAC_ECOL.description="Excessive Collision Register"
+AT91C_EMAC_ECOL.helpkey="Excessive Collision Register"
+AT91C_EMAC_ECOL.access=memorymapped
+AT91C_EMAC_ECOL.address=0xFFFDC060
+AT91C_EMAC_ECOL.width=32
+AT91C_EMAC_ECOL.byteEndian=little
+AT91C_EMAC_TID.name="AT91C_EMAC_TID"
+AT91C_EMAC_TID.description="Type ID Checking Register"
+AT91C_EMAC_TID.helpkey="Type ID Checking Register"
+AT91C_EMAC_TID.access=memorymapped
+AT91C_EMAC_TID.address=0xFFFDC0B8
+AT91C_EMAC_TID.width=32
+AT91C_EMAC_TID.byteEndian=little
+AT91C_EMAC_HRB.name="AT91C_EMAC_HRB"
+AT91C_EMAC_HRB.description="Hash Address Bottom[31:0]"
+AT91C_EMAC_HRB.helpkey="Hash Address Bottom[31:0]"
+AT91C_EMAC_HRB.access=memorymapped
+AT91C_EMAC_HRB.address=0xFFFDC090
+AT91C_EMAC_HRB.width=32
+AT91C_EMAC_HRB.byteEndian=little
+AT91C_EMAC_TBQP.name="AT91C_EMAC_TBQP"
+AT91C_EMAC_TBQP.description="Transmit Buffer Queue Pointer"
+AT91C_EMAC_TBQP.helpkey="Transmit Buffer Queue Pointer"
+AT91C_EMAC_TBQP.access=memorymapped
+AT91C_EMAC_TBQP.address=0xFFFDC01C
+AT91C_EMAC_TBQP.width=32
+AT91C_EMAC_TBQP.byteEndian=little
+AT91C_EMAC_USRIO.name="AT91C_EMAC_USRIO"
+AT91C_EMAC_USRIO.description="USER Input/Output Register"
+AT91C_EMAC_USRIO.helpkey="USER Input/Output Register"
+AT91C_EMAC_USRIO.access=memorymapped
+AT91C_EMAC_USRIO.address=0xFFFDC0C0
+AT91C_EMAC_USRIO.width=32
+AT91C_EMAC_USRIO.byteEndian=little
+AT91C_EMAC_PTR.name="AT91C_EMAC_PTR"
+AT91C_EMAC_PTR.description="Pause Time Register"
+AT91C_EMAC_PTR.helpkey="Pause Time Register"
+AT91C_EMAC_PTR.access=memorymapped
+AT91C_EMAC_PTR.address=0xFFFDC038
+AT91C_EMAC_PTR.width=32
+AT91C_EMAC_PTR.byteEndian=little
+AT91C_EMAC_SA2H.name="AT91C_EMAC_SA2H"
+AT91C_EMAC_SA2H.description="Specific Address 2 Top, Last 2 bytes"
+AT91C_EMAC_SA2H.helpkey="Specific Address 2 Top, Last 2 bytes"
+AT91C_EMAC_SA2H.access=memorymapped
+AT91C_EMAC_SA2H.address=0xFFFDC0A4
+AT91C_EMAC_SA2H.width=32
+AT91C_EMAC_SA2H.byteEndian=little
+AT91C_EMAC_ROV.name="AT91C_EMAC_ROV"
+AT91C_EMAC_ROV.description="Receive Overrun Errors Register"
+AT91C_EMAC_ROV.helpkey="Receive Overrun Errors Register"
+AT91C_EMAC_ROV.access=memorymapped
+AT91C_EMAC_ROV.address=0xFFFDC070
+AT91C_EMAC_ROV.width=32
+AT91C_EMAC_ROV.byteEndian=little
+AT91C_EMAC_ALE.name="AT91C_EMAC_ALE"
+AT91C_EMAC_ALE.description="Alignment Error Register"
+AT91C_EMAC_ALE.helpkey="Alignment Error Register"
+AT91C_EMAC_ALE.access=memorymapped
+AT91C_EMAC_ALE.address=0xFFFDC054
+AT91C_EMAC_ALE.width=32
+AT91C_EMAC_ALE.byteEndian=little
+AT91C_EMAC_RJA.name="AT91C_EMAC_RJA"
+AT91C_EMAC_RJA.description="Receive Jabbers Register"
+AT91C_EMAC_RJA.helpkey="Receive Jabbers Register"
+AT91C_EMAC_RJA.access=memorymapped
+AT91C_EMAC_RJA.address=0xFFFDC07C
+AT91C_EMAC_RJA.width=32
+AT91C_EMAC_RJA.byteEndian=little
+AT91C_EMAC_RBQP.name="AT91C_EMAC_RBQP"
+AT91C_EMAC_RBQP.description="Receive Buffer Queue Pointer"
+AT91C_EMAC_RBQP.helpkey="Receive Buffer Queue Pointer"
+AT91C_EMAC_RBQP.access=memorymapped
+AT91C_EMAC_RBQP.address=0xFFFDC018
+AT91C_EMAC_RBQP.width=32
+AT91C_EMAC_RBQP.byteEndian=little
+AT91C_EMAC_TPF.name="AT91C_EMAC_TPF"
+AT91C_EMAC_TPF.description="Transmitted Pause Frames Register"
+AT91C_EMAC_TPF.helpkey="Transmitted Pause Frames Register"
+AT91C_EMAC_TPF.access=memorymapped
+AT91C_EMAC_TPF.address=0xFFFDC08C
+AT91C_EMAC_TPF.width=32
+AT91C_EMAC_TPF.byteEndian=little
+AT91C_EMAC_NCFGR.name="AT91C_EMAC_NCFGR"
+AT91C_EMAC_NCFGR.description="Network Configuration Register"
+AT91C_EMAC_NCFGR.helpkey="Network Configuration Register"
+AT91C_EMAC_NCFGR.access=memorymapped
+AT91C_EMAC_NCFGR.address=0xFFFDC004
+AT91C_EMAC_NCFGR.width=32
+AT91C_EMAC_NCFGR.byteEndian=little
+AT91C_EMAC_HRT.name="AT91C_EMAC_HRT"
+AT91C_EMAC_HRT.description="Hash Address Top[63:32]"
+AT91C_EMAC_HRT.helpkey="Hash Address Top[63:32]"
+AT91C_EMAC_HRT.access=memorymapped
+AT91C_EMAC_HRT.address=0xFFFDC094
+AT91C_EMAC_HRT.width=32
+AT91C_EMAC_HRT.byteEndian=little
+AT91C_EMAC_USF.name="AT91C_EMAC_USF"
+AT91C_EMAC_USF.description="Undersize Frames Register"
+AT91C_EMAC_USF.helpkey="Undersize Frames Register"
+AT91C_EMAC_USF.access=memorymapped
+AT91C_EMAC_USF.address=0xFFFDC080
+AT91C_EMAC_USF.width=32
+AT91C_EMAC_USF.byteEndian=little
+AT91C_EMAC_FCSE.name="AT91C_EMAC_FCSE"
+AT91C_EMAC_FCSE.description="Frame Check Sequence Error Register"
+AT91C_EMAC_FCSE.helpkey="Frame Check Sequence Error Register"
+AT91C_EMAC_FCSE.access=memorymapped
+AT91C_EMAC_FCSE.address=0xFFFDC050
+AT91C_EMAC_FCSE.width=32
+AT91C_EMAC_FCSE.byteEndian=little
+AT91C_EMAC_TPQ.name="AT91C_EMAC_TPQ"
+AT91C_EMAC_TPQ.description="Transmit Pause Quantum Register"
+AT91C_EMAC_TPQ.helpkey="Transmit Pause Quantum Register"
+AT91C_EMAC_TPQ.access=memorymapped
+AT91C_EMAC_TPQ.address=0xFFFDC0BC
+AT91C_EMAC_TPQ.width=32
+AT91C_EMAC_TPQ.byteEndian=little
+AT91C_EMAC_MAN.name="AT91C_EMAC_MAN"
+AT91C_EMAC_MAN.description="PHY Maintenance Register"
+AT91C_EMAC_MAN.helpkey="PHY Maintenance Register"
+AT91C_EMAC_MAN.access=memorymapped
+AT91C_EMAC_MAN.address=0xFFFDC034
+AT91C_EMAC_MAN.width=32
+AT91C_EMAC_MAN.byteEndian=little
+AT91C_EMAC_FTO.name="AT91C_EMAC_FTO"
+AT91C_EMAC_FTO.description="Frames Transmitted OK Register"
+AT91C_EMAC_FTO.helpkey="Frames Transmitted OK Register"
+AT91C_EMAC_FTO.access=memorymapped
+AT91C_EMAC_FTO.address=0xFFFDC040
+AT91C_EMAC_FTO.width=32
+AT91C_EMAC_FTO.byteEndian=little
+AT91C_EMAC_REV.name="AT91C_EMAC_REV"
+AT91C_EMAC_REV.description="Revision Register"
+AT91C_EMAC_REV.helpkey="Revision Register"
+AT91C_EMAC_REV.access=memorymapped
+AT91C_EMAC_REV.address=0xFFFDC0FC
+AT91C_EMAC_REV.width=32
+AT91C_EMAC_REV.byteEndian=little
+AT91C_EMAC_REV.permission.write=none
+AT91C_EMAC_IMR.name="AT91C_EMAC_IMR"
+AT91C_EMAC_IMR.description="Interrupt Mask Register"
+AT91C_EMAC_IMR.helpkey="Interrupt Mask Register"
+AT91C_EMAC_IMR.access=memorymapped
+AT91C_EMAC_IMR.address=0xFFFDC030
+AT91C_EMAC_IMR.width=32
+AT91C_EMAC_IMR.byteEndian=little
+AT91C_EMAC_IMR.permission.write=none
+AT91C_EMAC_SCF.name="AT91C_EMAC_SCF"
+AT91C_EMAC_SCF.description="Single Collision Frame Register"
+AT91C_EMAC_SCF.helpkey="Single Collision Frame Register"
+AT91C_EMAC_SCF.access=memorymapped
+AT91C_EMAC_SCF.address=0xFFFDC044
+AT91C_EMAC_SCF.width=32
+AT91C_EMAC_SCF.byteEndian=little
+AT91C_EMAC_PFR.name="AT91C_EMAC_PFR"
+AT91C_EMAC_PFR.description="Pause Frames received Register"
+AT91C_EMAC_PFR.helpkey="Pause Frames received Register"
+AT91C_EMAC_PFR.access=memorymapped
+AT91C_EMAC_PFR.address=0xFFFDC03C
+AT91C_EMAC_PFR.width=32
+AT91C_EMAC_PFR.byteEndian=little
+AT91C_EMAC_MCF.name="AT91C_EMAC_MCF"
+AT91C_EMAC_MCF.description="Multiple Collision Frame Register"
+AT91C_EMAC_MCF.helpkey="Multiple Collision Frame Register"
+AT91C_EMAC_MCF.access=memorymapped
+AT91C_EMAC_MCF.address=0xFFFDC048
+AT91C_EMAC_MCF.width=32
+AT91C_EMAC_MCF.byteEndian=little
+AT91C_EMAC_NSR.name="AT91C_EMAC_NSR"
+AT91C_EMAC_NSR.description="Network Status Register"
+AT91C_EMAC_NSR.helpkey="Network Status Register"
+AT91C_EMAC_NSR.access=memorymapped
+AT91C_EMAC_NSR.address=0xFFFDC008
+AT91C_EMAC_NSR.width=32
+AT91C_EMAC_NSR.byteEndian=little
+AT91C_EMAC_NSR.permission.write=none
+AT91C_EMAC_SA2L.name="AT91C_EMAC_SA2L"
+AT91C_EMAC_SA2L.description="Specific Address 2 Bottom, First 4 bytes"
+AT91C_EMAC_SA2L.helpkey="Specific Address 2 Bottom, First 4 bytes"
+AT91C_EMAC_SA2L.access=memorymapped
+AT91C_EMAC_SA2L.address=0xFFFDC0A0
+AT91C_EMAC_SA2L.width=32
+AT91C_EMAC_SA2L.byteEndian=little
+AT91C_EMAC_FRO.name="AT91C_EMAC_FRO"
+AT91C_EMAC_FRO.description="Frames Received OK Register"
+AT91C_EMAC_FRO.helpkey="Frames Received OK Register"
+AT91C_EMAC_FRO.access=memorymapped
+AT91C_EMAC_FRO.address=0xFFFDC04C
+AT91C_EMAC_FRO.width=32
+AT91C_EMAC_FRO.byteEndian=little
+AT91C_EMAC_IER.name="AT91C_EMAC_IER"
+AT91C_EMAC_IER.description="Interrupt Enable Register"
+AT91C_EMAC_IER.helpkey="Interrupt Enable Register"
+AT91C_EMAC_IER.access=memorymapped
+AT91C_EMAC_IER.address=0xFFFDC028
+AT91C_EMAC_IER.width=32
+AT91C_EMAC_IER.byteEndian=little
+AT91C_EMAC_IER.type=enum
+AT91C_EMAC_IER.enum.0.name=*** Write only ***
+AT91C_EMAC_IER.enum.1.name=Error
+AT91C_EMAC_SA1H.name="AT91C_EMAC_SA1H"
+AT91C_EMAC_SA1H.description="Specific Address 1 Top, Last 2 bytes"
+AT91C_EMAC_SA1H.helpkey="Specific Address 1 Top, Last 2 bytes"
+AT91C_EMAC_SA1H.access=memorymapped
+AT91C_EMAC_SA1H.address=0xFFFDC09C
+AT91C_EMAC_SA1H.width=32
+AT91C_EMAC_SA1H.byteEndian=little
+AT91C_EMAC_CSE.name="AT91C_EMAC_CSE"
+AT91C_EMAC_CSE.description="Carrier Sense Error Register"
+AT91C_EMAC_CSE.helpkey="Carrier Sense Error Register"
+AT91C_EMAC_CSE.access=memorymapped
+AT91C_EMAC_CSE.address=0xFFFDC068
+AT91C_EMAC_CSE.width=32
+AT91C_EMAC_CSE.byteEndian=little
+AT91C_EMAC_SA3H.name="AT91C_EMAC_SA3H"
+AT91C_EMAC_SA3H.description="Specific Address 3 Top, Last 2 bytes"
+AT91C_EMAC_SA3H.helpkey="Specific Address 3 Top, Last 2 bytes"
+AT91C_EMAC_SA3H.access=memorymapped
+AT91C_EMAC_SA3H.address=0xFFFDC0AC
+AT91C_EMAC_SA3H.width=32
+AT91C_EMAC_SA3H.byteEndian=little
+AT91C_EMAC_RRE.name="AT91C_EMAC_RRE"
+AT91C_EMAC_RRE.description="Receive Ressource Error Register"
+AT91C_EMAC_RRE.helpkey="Receive Ressource Error Register"
+AT91C_EMAC_RRE.access=memorymapped
+AT91C_EMAC_RRE.address=0xFFFDC06C
+AT91C_EMAC_RRE.width=32
+AT91C_EMAC_RRE.byteEndian=little
+AT91C_EMAC_STE.name="AT91C_EMAC_STE"
+AT91C_EMAC_STE.description="SQE Test Error Register"
+AT91C_EMAC_STE.helpkey="SQE Test Error Register"
+AT91C_EMAC_STE.access=memorymapped
+AT91C_EMAC_STE.address=0xFFFDC084
+AT91C_EMAC_STE.width=32
+AT91C_EMAC_STE.byteEndian=little
+# ========== Register definition for PDC_ADC peripheral ========== 
+AT91C_ADC_PTSR.name="AT91C_ADC_PTSR"
+AT91C_ADC_PTSR.description="PDC Transfer Status Register"
+AT91C_ADC_PTSR.helpkey="PDC Transfer Status Register"
+AT91C_ADC_PTSR.access=memorymapped
+AT91C_ADC_PTSR.address=0xFFFD8124
+AT91C_ADC_PTSR.width=32
+AT91C_ADC_PTSR.byteEndian=little
+AT91C_ADC_PTSR.permission.write=none
+AT91C_ADC_PTCR.name="AT91C_ADC_PTCR"
+AT91C_ADC_PTCR.description="PDC Transfer Control Register"
+AT91C_ADC_PTCR.helpkey="PDC Transfer Control Register"
+AT91C_ADC_PTCR.access=memorymapped
+AT91C_ADC_PTCR.address=0xFFFD8120
+AT91C_ADC_PTCR.width=32
+AT91C_ADC_PTCR.byteEndian=little
+AT91C_ADC_PTCR.type=enum
+AT91C_ADC_PTCR.enum.0.name=*** Write only ***
+AT91C_ADC_PTCR.enum.1.name=Error
+AT91C_ADC_TNPR.name="AT91C_ADC_TNPR"
+AT91C_ADC_TNPR.description="Transmit Next Pointer Register"
+AT91C_ADC_TNPR.helpkey="Transmit Next Pointer Register"
+AT91C_ADC_TNPR.access=memorymapped
+AT91C_ADC_TNPR.address=0xFFFD8118
+AT91C_ADC_TNPR.width=32
+AT91C_ADC_TNPR.byteEndian=little
+AT91C_ADC_TNCR.name="AT91C_ADC_TNCR"
+AT91C_ADC_TNCR.description="Transmit Next Counter Register"
+AT91C_ADC_TNCR.helpkey="Transmit Next Counter Register"
+AT91C_ADC_TNCR.access=memorymapped
+AT91C_ADC_TNCR.address=0xFFFD811C
+AT91C_ADC_TNCR.width=32
+AT91C_ADC_TNCR.byteEndian=little
+AT91C_ADC_RNPR.name="AT91C_ADC_RNPR"
+AT91C_ADC_RNPR.description="Receive Next Pointer Register"
+AT91C_ADC_RNPR.helpkey="Receive Next Pointer Register"
+AT91C_ADC_RNPR.access=memorymapped
+AT91C_ADC_RNPR.address=0xFFFD8110
+AT91C_ADC_RNPR.width=32
+AT91C_ADC_RNPR.byteEndian=little
+AT91C_ADC_RNCR.name="AT91C_ADC_RNCR"
+AT91C_ADC_RNCR.description="Receive Next Counter Register"
+AT91C_ADC_RNCR.helpkey="Receive Next Counter Register"
+AT91C_ADC_RNCR.access=memorymapped
+AT91C_ADC_RNCR.address=0xFFFD8114
+AT91C_ADC_RNCR.width=32
+AT91C_ADC_RNCR.byteEndian=little
+AT91C_ADC_RPR.name="AT91C_ADC_RPR"
+AT91C_ADC_RPR.description="Receive Pointer Register"
+AT91C_ADC_RPR.helpkey="Receive Pointer Register"
+AT91C_ADC_RPR.access=memorymapped
+AT91C_ADC_RPR.address=0xFFFD8100
+AT91C_ADC_RPR.width=32
+AT91C_ADC_RPR.byteEndian=little
+AT91C_ADC_TCR.name="AT91C_ADC_TCR"
+AT91C_ADC_TCR.description="Transmit Counter Register"
+AT91C_ADC_TCR.helpkey="Transmit Counter Register"
+AT91C_ADC_TCR.access=memorymapped
+AT91C_ADC_TCR.address=0xFFFD810C
+AT91C_ADC_TCR.width=32
+AT91C_ADC_TCR.byteEndian=little
+AT91C_ADC_TPR.name="AT91C_ADC_TPR"
+AT91C_ADC_TPR.description="Transmit Pointer Register"
+AT91C_ADC_TPR.helpkey="Transmit Pointer Register"
+AT91C_ADC_TPR.access=memorymapped
+AT91C_ADC_TPR.address=0xFFFD8108
+AT91C_ADC_TPR.width=32
+AT91C_ADC_TPR.byteEndian=little
+AT91C_ADC_RCR.name="AT91C_ADC_RCR"
+AT91C_ADC_RCR.description="Receive Counter Register"
+AT91C_ADC_RCR.helpkey="Receive Counter Register"
+AT91C_ADC_RCR.access=memorymapped
+AT91C_ADC_RCR.address=0xFFFD8104
+AT91C_ADC_RCR.width=32
+AT91C_ADC_RCR.byteEndian=little
+# ========== Register definition for ADC peripheral ========== 
+AT91C_ADC_CDR2.name="AT91C_ADC_CDR2"
+AT91C_ADC_CDR2.description="ADC Channel Data Register 2"
+AT91C_ADC_CDR2.helpkey="ADC Channel Data Register 2"
+AT91C_ADC_CDR2.access=memorymapped
+AT91C_ADC_CDR2.address=0xFFFD8038
+AT91C_ADC_CDR2.width=32
+AT91C_ADC_CDR2.byteEndian=little
+AT91C_ADC_CDR2.permission.write=none
+AT91C_ADC_CDR3.name="AT91C_ADC_CDR3"
+AT91C_ADC_CDR3.description="ADC Channel Data Register 3"
+AT91C_ADC_CDR3.helpkey="ADC Channel Data Register 3"
+AT91C_ADC_CDR3.access=memorymapped
+AT91C_ADC_CDR3.address=0xFFFD803C
+AT91C_ADC_CDR3.width=32
+AT91C_ADC_CDR3.byteEndian=little
+AT91C_ADC_CDR3.permission.write=none
+AT91C_ADC_CDR0.name="AT91C_ADC_CDR0"
+AT91C_ADC_CDR0.description="ADC Channel Data Register 0"
+AT91C_ADC_CDR0.helpkey="ADC Channel Data Register 0"
+AT91C_ADC_CDR0.access=memorymapped
+AT91C_ADC_CDR0.address=0xFFFD8030
+AT91C_ADC_CDR0.width=32
+AT91C_ADC_CDR0.byteEndian=little
+AT91C_ADC_CDR0.permission.write=none
+AT91C_ADC_CDR5.name="AT91C_ADC_CDR5"
+AT91C_ADC_CDR5.description="ADC Channel Data Register 5"
+AT91C_ADC_CDR5.helpkey="ADC Channel Data Register 5"
+AT91C_ADC_CDR5.access=memorymapped
+AT91C_ADC_CDR5.address=0xFFFD8044
+AT91C_ADC_CDR5.width=32
+AT91C_ADC_CDR5.byteEndian=little
+AT91C_ADC_CDR5.permission.write=none
+AT91C_ADC_CHDR.name="AT91C_ADC_CHDR"
+AT91C_ADC_CHDR.description="ADC Channel Disable Register"
+AT91C_ADC_CHDR.helpkey="ADC Channel Disable Register"
+AT91C_ADC_CHDR.access=memorymapped
+AT91C_ADC_CHDR.address=0xFFFD8014
+AT91C_ADC_CHDR.width=32
+AT91C_ADC_CHDR.byteEndian=little
+AT91C_ADC_CHDR.type=enum
+AT91C_ADC_CHDR.enum.0.name=*** Write only ***
+AT91C_ADC_CHDR.enum.1.name=Error
+AT91C_ADC_SR.name="AT91C_ADC_SR"
+AT91C_ADC_SR.description="ADC Status Register"
+AT91C_ADC_SR.helpkey="ADC Status Register"
+AT91C_ADC_SR.access=memorymapped
+AT91C_ADC_SR.address=0xFFFD801C
+AT91C_ADC_SR.width=32
+AT91C_ADC_SR.byteEndian=little
+AT91C_ADC_SR.permission.write=none
+AT91C_ADC_CDR4.name="AT91C_ADC_CDR4"
+AT91C_ADC_CDR4.description="ADC Channel Data Register 4"
+AT91C_ADC_CDR4.helpkey="ADC Channel Data Register 4"
+AT91C_ADC_CDR4.access=memorymapped
+AT91C_ADC_CDR4.address=0xFFFD8040
+AT91C_ADC_CDR4.width=32
+AT91C_ADC_CDR4.byteEndian=little
+AT91C_ADC_CDR4.permission.write=none
+AT91C_ADC_CDR1.name="AT91C_ADC_CDR1"
+AT91C_ADC_CDR1.description="ADC Channel Data Register 1"
+AT91C_ADC_CDR1.helpkey="ADC Channel Data Register 1"
+AT91C_ADC_CDR1.access=memorymapped
+AT91C_ADC_CDR1.address=0xFFFD8034
+AT91C_ADC_CDR1.width=32
+AT91C_ADC_CDR1.byteEndian=little
+AT91C_ADC_CDR1.permission.write=none
+AT91C_ADC_LCDR.name="AT91C_ADC_LCDR"
+AT91C_ADC_LCDR.description="ADC Last Converted Data Register"
+AT91C_ADC_LCDR.helpkey="ADC Last Converted Data Register"
+AT91C_ADC_LCDR.access=memorymapped
+AT91C_ADC_LCDR.address=0xFFFD8020
+AT91C_ADC_LCDR.width=32
+AT91C_ADC_LCDR.byteEndian=little
+AT91C_ADC_LCDR.permission.write=none
+AT91C_ADC_IDR.name="AT91C_ADC_IDR"
+AT91C_ADC_IDR.description="ADC Interrupt Disable Register"
+AT91C_ADC_IDR.helpkey="ADC Interrupt Disable Register"
+AT91C_ADC_IDR.access=memorymapped
+AT91C_ADC_IDR.address=0xFFFD8028
+AT91C_ADC_IDR.width=32
+AT91C_ADC_IDR.byteEndian=little
+AT91C_ADC_IDR.type=enum
+AT91C_ADC_IDR.enum.0.name=*** Write only ***
+AT91C_ADC_IDR.enum.1.name=Error
+AT91C_ADC_CR.name="AT91C_ADC_CR"
+AT91C_ADC_CR.description="ADC Control Register"
+AT91C_ADC_CR.helpkey="ADC Control Register"
+AT91C_ADC_CR.access=memorymapped
+AT91C_ADC_CR.address=0xFFFD8000
+AT91C_ADC_CR.width=32
+AT91C_ADC_CR.byteEndian=little
+AT91C_ADC_CR.type=enum
+AT91C_ADC_CR.enum.0.name=*** Write only ***
+AT91C_ADC_CR.enum.1.name=Error
+AT91C_ADC_CDR7.name="AT91C_ADC_CDR7"
+AT91C_ADC_CDR7.description="ADC Channel Data Register 7"
+AT91C_ADC_CDR7.helpkey="ADC Channel Data Register 7"
+AT91C_ADC_CDR7.access=memorymapped
+AT91C_ADC_CDR7.address=0xFFFD804C
+AT91C_ADC_CDR7.width=32
+AT91C_ADC_CDR7.byteEndian=little
+AT91C_ADC_CDR7.permission.write=none
+AT91C_ADC_CDR6.name="AT91C_ADC_CDR6"
+AT91C_ADC_CDR6.description="ADC Channel Data Register 6"
+AT91C_ADC_CDR6.helpkey="ADC Channel Data Register 6"
+AT91C_ADC_CDR6.access=memorymapped
+AT91C_ADC_CDR6.address=0xFFFD8048
+AT91C_ADC_CDR6.width=32
+AT91C_ADC_CDR6.byteEndian=little
+AT91C_ADC_CDR6.permission.write=none
+AT91C_ADC_IER.name="AT91C_ADC_IER"
+AT91C_ADC_IER.description="ADC Interrupt Enable Register"
+AT91C_ADC_IER.helpkey="ADC Interrupt Enable Register"
+AT91C_ADC_IER.access=memorymapped
+AT91C_ADC_IER.address=0xFFFD8024
+AT91C_ADC_IER.width=32
+AT91C_ADC_IER.byteEndian=little
+AT91C_ADC_IER.type=enum
+AT91C_ADC_IER.enum.0.name=*** Write only ***
+AT91C_ADC_IER.enum.1.name=Error
+AT91C_ADC_CHER.name="AT91C_ADC_CHER"
+AT91C_ADC_CHER.description="ADC Channel Enable Register"
+AT91C_ADC_CHER.helpkey="ADC Channel Enable Register"
+AT91C_ADC_CHER.access=memorymapped
+AT91C_ADC_CHER.address=0xFFFD8010
+AT91C_ADC_CHER.width=32
+AT91C_ADC_CHER.byteEndian=little
+AT91C_ADC_CHER.type=enum
+AT91C_ADC_CHER.enum.0.name=*** Write only ***
+AT91C_ADC_CHER.enum.1.name=Error
+AT91C_ADC_CHSR.name="AT91C_ADC_CHSR"
+AT91C_ADC_CHSR.description="ADC Channel Status Register"
+AT91C_ADC_CHSR.helpkey="ADC Channel Status Register"
+AT91C_ADC_CHSR.access=memorymapped
+AT91C_ADC_CHSR.address=0xFFFD8018
+AT91C_ADC_CHSR.width=32
+AT91C_ADC_CHSR.byteEndian=little
+AT91C_ADC_CHSR.permission.write=none
+AT91C_ADC_MR.name="AT91C_ADC_MR"
+AT91C_ADC_MR.description="ADC Mode Register"
+AT91C_ADC_MR.helpkey="ADC Mode Register"
+AT91C_ADC_MR.access=memorymapped
+AT91C_ADC_MR.address=0xFFFD8004
+AT91C_ADC_MR.width=32
+AT91C_ADC_MR.byteEndian=little
+AT91C_ADC_IMR.name="AT91C_ADC_IMR"
+AT91C_ADC_IMR.description="ADC Interrupt Mask Register"
+AT91C_ADC_IMR.helpkey="ADC Interrupt Mask Register"
+AT91C_ADC_IMR.access=memorymapped
+AT91C_ADC_IMR.address=0xFFFD802C
+AT91C_ADC_IMR.width=32
+AT91C_ADC_IMR.byteEndian=little
+AT91C_ADC_IMR.permission.write=none
+# ========== Group definition for SYS peripheral ========== 
+group.SYS.description="ATMEL SYS Registers"
+group.SYS.helpkey="ATMEL SYS Registers"
+# ========== Group definition for AIC peripheral ========== 
+group.AIC.description="ATMEL AIC Registers"
+group.AIC.helpkey="ATMEL AIC Registers"
+group.AIC.register.0=AT91C_AIC_IVR
+group.AIC.register.1=AT91C_AIC_SMR
+group.AIC.register.2=AT91C_AIC_FVR
+group.AIC.register.3=AT91C_AIC_DCR
+group.AIC.register.4=AT91C_AIC_EOICR
+group.AIC.register.5=AT91C_AIC_SVR
+group.AIC.register.6=AT91C_AIC_FFSR
+group.AIC.register.7=AT91C_AIC_ICCR
+group.AIC.register.8=AT91C_AIC_ISR
+group.AIC.register.9=AT91C_AIC_IMR
+group.AIC.register.10=AT91C_AIC_IPR
+group.AIC.register.11=AT91C_AIC_FFER
+group.AIC.register.12=AT91C_AIC_IECR
+group.AIC.register.13=AT91C_AIC_ISCR
+group.AIC.register.14=AT91C_AIC_FFDR
+group.AIC.register.15=AT91C_AIC_CISR
+group.AIC.register.16=AT91C_AIC_IDCR
+group.AIC.register.17=AT91C_AIC_SPU
+# ========== Group definition for PDC_DBGU peripheral ========== 
+group.PDC_DBGU.description="ATMEL PDC_DBGU Registers"
+group.PDC_DBGU.helpkey="ATMEL PDC_DBGU Registers"
+group.PDC_DBGU.register.0=AT91C_DBGU_TCR
+group.PDC_DBGU.register.1=AT91C_DBGU_RNPR
+group.PDC_DBGU.register.2=AT91C_DBGU_TNPR
+group.PDC_DBGU.register.3=AT91C_DBGU_TPR
+group.PDC_DBGU.register.4=AT91C_DBGU_RPR
+group.PDC_DBGU.register.5=AT91C_DBGU_RCR
+group.PDC_DBGU.register.6=AT91C_DBGU_RNCR
+group.PDC_DBGU.register.7=AT91C_DBGU_PTCR
+group.PDC_DBGU.register.8=AT91C_DBGU_PTSR
+group.PDC_DBGU.register.9=AT91C_DBGU_TNCR
+# ========== Group definition for DBGU peripheral ========== 
+group.DBGU.description="ATMEL DBGU Registers"
+group.DBGU.helpkey="ATMEL DBGU Registers"
+group.DBGU.register.0=AT91C_DBGU_EXID
+group.DBGU.register.1=AT91C_DBGU_BRGR
+group.DBGU.register.2=AT91C_DBGU_IDR
+group.DBGU.register.3=AT91C_DBGU_CSR
+group.DBGU.register.4=AT91C_DBGU_CIDR
+group.DBGU.register.5=AT91C_DBGU_MR
+group.DBGU.register.6=AT91C_DBGU_IMR
+group.DBGU.register.7=AT91C_DBGU_CR
+group.DBGU.register.8=AT91C_DBGU_FNTR
+group.DBGU.register.9=AT91C_DBGU_THR
+group.DBGU.register.10=AT91C_DBGU_RHR
+group.DBGU.register.11=AT91C_DBGU_IER
+# ========== Group definition for PIOA peripheral ========== 
+group.PIOA.description="ATMEL PIOA Registers"
+group.PIOA.helpkey="ATMEL PIOA Registers"
+group.PIOA.register.0=AT91C_PIOA_ODR
+group.PIOA.register.1=AT91C_PIOA_SODR
+group.PIOA.register.2=AT91C_PIOA_ISR
+group.PIOA.register.3=AT91C_PIOA_ABSR
+group.PIOA.register.4=AT91C_PIOA_IER
+group.PIOA.register.5=AT91C_PIOA_PPUDR
+group.PIOA.register.6=AT91C_PIOA_IMR
+group.PIOA.register.7=AT91C_PIOA_PER
+group.PIOA.register.8=AT91C_PIOA_IFDR
+group.PIOA.register.9=AT91C_PIOA_OWDR
+group.PIOA.register.10=AT91C_PIOA_MDSR
+group.PIOA.register.11=AT91C_PIOA_IDR
+group.PIOA.register.12=AT91C_PIOA_ODSR
+group.PIOA.register.13=AT91C_PIOA_PPUSR
+group.PIOA.register.14=AT91C_PIOA_OWSR
+group.PIOA.register.15=AT91C_PIOA_BSR
+group.PIOA.register.16=AT91C_PIOA_OWER
+group.PIOA.register.17=AT91C_PIOA_IFER
+group.PIOA.register.18=AT91C_PIOA_PDSR
+group.PIOA.register.19=AT91C_PIOA_PPUER
+group.PIOA.register.20=AT91C_PIOA_OSR
+group.PIOA.register.21=AT91C_PIOA_ASR
+group.PIOA.register.22=AT91C_PIOA_MDDR
+group.PIOA.register.23=AT91C_PIOA_CODR
+group.PIOA.register.24=AT91C_PIOA_MDER
+group.PIOA.register.25=AT91C_PIOA_PDR
+group.PIOA.register.26=AT91C_PIOA_IFSR
+group.PIOA.register.27=AT91C_PIOA_OER
+group.PIOA.register.28=AT91C_PIOA_PSR
+# ========== Group definition for PIOB peripheral ========== 
+group.PIOB.description="ATMEL PIOB Registers"
+group.PIOB.helpkey="ATMEL PIOB Registers"
+group.PIOB.register.0=AT91C_PIOB_OWDR
+group.PIOB.register.1=AT91C_PIOB_MDER
+group.PIOB.register.2=AT91C_PIOB_PPUSR
+group.PIOB.register.3=AT91C_PIOB_IMR
+group.PIOB.register.4=AT91C_PIOB_ASR
+group.PIOB.register.5=AT91C_PIOB_PPUDR
+group.PIOB.register.6=AT91C_PIOB_PSR
+group.PIOB.register.7=AT91C_PIOB_IER
+group.PIOB.register.8=AT91C_PIOB_CODR
+group.PIOB.register.9=AT91C_PIOB_OWER
+group.PIOB.register.10=AT91C_PIOB_ABSR
+group.PIOB.register.11=AT91C_PIOB_IFDR
+group.PIOB.register.12=AT91C_PIOB_PDSR
+group.PIOB.register.13=AT91C_PIOB_IDR
+group.PIOB.register.14=AT91C_PIOB_OWSR
+group.PIOB.register.15=AT91C_PIOB_PDR
+group.PIOB.register.16=AT91C_PIOB_ODR
+group.PIOB.register.17=AT91C_PIOB_IFSR
+group.PIOB.register.18=AT91C_PIOB_PPUER
+group.PIOB.register.19=AT91C_PIOB_SODR
+group.PIOB.register.20=AT91C_PIOB_ISR
+group.PIOB.register.21=AT91C_PIOB_ODSR
+group.PIOB.register.22=AT91C_PIOB_OSR
+group.PIOB.register.23=AT91C_PIOB_MDSR
+group.PIOB.register.24=AT91C_PIOB_IFER
+group.PIOB.register.25=AT91C_PIOB_BSR
+group.PIOB.register.26=AT91C_PIOB_MDDR
+group.PIOB.register.27=AT91C_PIOB_OER
+group.PIOB.register.28=AT91C_PIOB_PER
+# ========== Group definition for CKGR peripheral ========== 
+group.CKGR.description="ATMEL CKGR Registers"
+group.CKGR.helpkey="ATMEL CKGR Registers"
+group.CKGR.register.0=AT91C_CKGR_MOR
+group.CKGR.register.1=AT91C_CKGR_PLLR
+group.CKGR.register.2=AT91C_CKGR_MCFR
+# ========== Group definition for PMC peripheral ========== 
+group.PMC.description="ATMEL PMC Registers"
+group.PMC.helpkey="ATMEL PMC Registers"
+group.PMC.register.0=AT91C_PMC_IDR
+group.PMC.register.1=AT91C_PMC_MOR
+group.PMC.register.2=AT91C_PMC_PLLR
+group.PMC.register.3=AT91C_PMC_PCER
+group.PMC.register.4=AT91C_PMC_PCKR
+group.PMC.register.5=AT91C_PMC_MCKR
+group.PMC.register.6=AT91C_PMC_SCDR
+group.PMC.register.7=AT91C_PMC_PCDR
+group.PMC.register.8=AT91C_PMC_SCSR
+group.PMC.register.9=AT91C_PMC_PCSR
+group.PMC.register.10=AT91C_PMC_MCFR
+group.PMC.register.11=AT91C_PMC_SCER
+group.PMC.register.12=AT91C_PMC_IMR
+group.PMC.register.13=AT91C_PMC_IER
+group.PMC.register.14=AT91C_PMC_SR
+# ========== Group definition for RSTC peripheral ========== 
+group.RSTC.description="ATMEL RSTC Registers"
+group.RSTC.helpkey="ATMEL RSTC Registers"
+group.RSTC.register.0=AT91C_RSTC_RCR
+group.RSTC.register.1=AT91C_RSTC_RMR
+group.RSTC.register.2=AT91C_RSTC_RSR
+# ========== Group definition for RTTC peripheral ========== 
+group.RTTC.description="ATMEL RTTC Registers"
+group.RTTC.helpkey="ATMEL RTTC Registers"
+group.RTTC.register.0=AT91C_RTTC_RTSR
+group.RTTC.register.1=AT91C_RTTC_RTMR
+group.RTTC.register.2=AT91C_RTTC_RTVR
+group.RTTC.register.3=AT91C_RTTC_RTAR
+# ========== Group definition for PITC peripheral ========== 
+group.PITC.description="ATMEL PITC Registers"
+group.PITC.helpkey="ATMEL PITC Registers"
+group.PITC.register.0=AT91C_PITC_PIVR
+group.PITC.register.1=AT91C_PITC_PISR
+group.PITC.register.2=AT91C_PITC_PIIR
+group.PITC.register.3=AT91C_PITC_PIMR
+# ========== Group definition for WDTC peripheral ========== 
+group.WDTC.description="ATMEL WDTC Registers"
+group.WDTC.helpkey="ATMEL WDTC Registers"
+group.WDTC.register.0=AT91C_WDTC_WDCR
+group.WDTC.register.1=AT91C_WDTC_WDSR
+group.WDTC.register.2=AT91C_WDTC_WDMR
+# ========== Group definition for VREG peripheral ========== 
+group.VREG.description="ATMEL VREG Registers"
+group.VREG.helpkey="ATMEL VREG Registers"
+group.VREG.register.0=AT91C_VREG_MR
+# ========== Group definition for MC peripheral ========== 
+group.MC.description="ATMEL MC Registers"
+group.MC.helpkey="ATMEL MC Registers"
+group.MC.register.0=AT91C_MC_ASR
+group.MC.register.1=AT91C_MC_RCR
+group.MC.register.2=AT91C_MC_FCR
+group.MC.register.3=AT91C_MC_AASR
+group.MC.register.4=AT91C_MC_FSR
+group.MC.register.5=AT91C_MC_FMR
+# ========== Group definition for PDC_SPI1 peripheral ========== 
+group.PDC_SPI1.description="ATMEL PDC_SPI1 Registers"
+group.PDC_SPI1.helpkey="ATMEL PDC_SPI1 Registers"
+group.PDC_SPI1.register.0=AT91C_SPI1_PTCR
+group.PDC_SPI1.register.1=AT91C_SPI1_RPR
+group.PDC_SPI1.register.2=AT91C_SPI1_TNCR
+group.PDC_SPI1.register.3=AT91C_SPI1_TPR
+group.PDC_SPI1.register.4=AT91C_SPI1_TNPR
+group.PDC_SPI1.register.5=AT91C_SPI1_TCR
+group.PDC_SPI1.register.6=AT91C_SPI1_RCR
+group.PDC_SPI1.register.7=AT91C_SPI1_RNPR
+group.PDC_SPI1.register.8=AT91C_SPI1_RNCR
+group.PDC_SPI1.register.9=AT91C_SPI1_PTSR
+# ========== Group definition for SPI1 peripheral ========== 
+group.SPI1.description="ATMEL SPI1 Registers"
+group.SPI1.helpkey="ATMEL SPI1 Registers"
+group.SPI1.register.0=AT91C_SPI1_IMR
+group.SPI1.register.1=AT91C_SPI1_IER
+group.SPI1.register.2=AT91C_SPI1_MR
+group.SPI1.register.3=AT91C_SPI1_RDR
+group.SPI1.register.4=AT91C_SPI1_IDR
+group.SPI1.register.5=AT91C_SPI1_SR
+group.SPI1.register.6=AT91C_SPI1_TDR
+group.SPI1.register.7=AT91C_SPI1_CR
+group.SPI1.register.8=AT91C_SPI1_CSR
+# ========== Group definition for PDC_SPI0 peripheral ========== 
+group.PDC_SPI0.description="ATMEL PDC_SPI0 Registers"
+group.PDC_SPI0.helpkey="ATMEL PDC_SPI0 Registers"
+group.PDC_SPI0.register.0=AT91C_SPI0_PTCR
+group.PDC_SPI0.register.1=AT91C_SPI0_TPR
+group.PDC_SPI0.register.2=AT91C_SPI0_TCR
+group.PDC_SPI0.register.3=AT91C_SPI0_RCR
+group.PDC_SPI0.register.4=AT91C_SPI0_PTSR
+group.PDC_SPI0.register.5=AT91C_SPI0_RNPR
+group.PDC_SPI0.register.6=AT91C_SPI0_RPR
+group.PDC_SPI0.register.7=AT91C_SPI0_TNCR
+group.PDC_SPI0.register.8=AT91C_SPI0_RNCR
+group.PDC_SPI0.register.9=AT91C_SPI0_TNPR
+# ========== Group definition for SPI0 peripheral ========== 
+group.SPI0.description="ATMEL SPI0 Registers"
+group.SPI0.helpkey="ATMEL SPI0 Registers"
+group.SPI0.register.0=AT91C_SPI0_IER
+group.SPI0.register.1=AT91C_SPI0_SR
+group.SPI0.register.2=AT91C_SPI0_IDR
+group.SPI0.register.3=AT91C_SPI0_CR
+group.SPI0.register.4=AT91C_SPI0_MR
+group.SPI0.register.5=AT91C_SPI0_IMR
+group.SPI0.register.6=AT91C_SPI0_TDR
+group.SPI0.register.7=AT91C_SPI0_RDR
+group.SPI0.register.8=AT91C_SPI0_CSR
+# ========== Group definition for PDC_US1 peripheral ========== 
+group.PDC_US1.description="ATMEL PDC_US1 Registers"
+group.PDC_US1.helpkey="ATMEL PDC_US1 Registers"
+group.PDC_US1.register.0=AT91C_US1_RNCR
+group.PDC_US1.register.1=AT91C_US1_PTCR
+group.PDC_US1.register.2=AT91C_US1_TCR
+group.PDC_US1.register.3=AT91C_US1_PTSR
+group.PDC_US1.register.4=AT91C_US1_TNPR
+group.PDC_US1.register.5=AT91C_US1_RCR
+group.PDC_US1.register.6=AT91C_US1_RNPR
+group.PDC_US1.register.7=AT91C_US1_RPR
+group.PDC_US1.register.8=AT91C_US1_TNCR
+group.PDC_US1.register.9=AT91C_US1_TPR
+# ========== Group definition for US1 peripheral ========== 
+group.US1.description="ATMEL US1 Registers"
+group.US1.helpkey="ATMEL US1 Registers"
+group.US1.register.0=AT91C_US1_IF
+group.US1.register.1=AT91C_US1_NER
+group.US1.register.2=AT91C_US1_RTOR
+group.US1.register.3=AT91C_US1_CSR
+group.US1.register.4=AT91C_US1_IDR
+group.US1.register.5=AT91C_US1_IER
+group.US1.register.6=AT91C_US1_THR
+group.US1.register.7=AT91C_US1_TTGR
+group.US1.register.8=AT91C_US1_RHR
+group.US1.register.9=AT91C_US1_BRGR
+group.US1.register.10=AT91C_US1_IMR
+group.US1.register.11=AT91C_US1_FIDI
+group.US1.register.12=AT91C_US1_CR
+group.US1.register.13=AT91C_US1_MR
+# ========== Group definition for PDC_US0 peripheral ========== 
+group.PDC_US0.description="ATMEL PDC_US0 Registers"
+group.PDC_US0.helpkey="ATMEL PDC_US0 Registers"
+group.PDC_US0.register.0=AT91C_US0_TNPR
+group.PDC_US0.register.1=AT91C_US0_RNPR
+group.PDC_US0.register.2=AT91C_US0_TCR
+group.PDC_US0.register.3=AT91C_US0_PTCR
+group.PDC_US0.register.4=AT91C_US0_PTSR
+group.PDC_US0.register.5=AT91C_US0_TNCR
+group.PDC_US0.register.6=AT91C_US0_TPR
+group.PDC_US0.register.7=AT91C_US0_RCR
+group.PDC_US0.register.8=AT91C_US0_RPR
+group.PDC_US0.register.9=AT91C_US0_RNCR
+# ========== Group definition for US0 peripheral ========== 
+group.US0.description="ATMEL US0 Registers"
+group.US0.helpkey="ATMEL US0 Registers"
+group.US0.register.0=AT91C_US0_BRGR
+group.US0.register.1=AT91C_US0_NER
+group.US0.register.2=AT91C_US0_CR
+group.US0.register.3=AT91C_US0_IMR
+group.US0.register.4=AT91C_US0_FIDI
+group.US0.register.5=AT91C_US0_TTGR
+group.US0.register.6=AT91C_US0_MR
+group.US0.register.7=AT91C_US0_RTOR
+group.US0.register.8=AT91C_US0_CSR
+group.US0.register.9=AT91C_US0_RHR
+group.US0.register.10=AT91C_US0_IDR
+group.US0.register.11=AT91C_US0_THR
+group.US0.register.12=AT91C_US0_IF
+group.US0.register.13=AT91C_US0_IER
+# ========== Group definition for PDC_SSC peripheral ========== 
+group.PDC_SSC.description="ATMEL PDC_SSC Registers"
+group.PDC_SSC.helpkey="ATMEL PDC_SSC Registers"
+group.PDC_SSC.register.0=AT91C_SSC_TNCR
+group.PDC_SSC.register.1=AT91C_SSC_RPR
+group.PDC_SSC.register.2=AT91C_SSC_RNCR
+group.PDC_SSC.register.3=AT91C_SSC_TPR
+group.PDC_SSC.register.4=AT91C_SSC_PTCR
+group.PDC_SSC.register.5=AT91C_SSC_TCR
+group.PDC_SSC.register.6=AT91C_SSC_RCR
+group.PDC_SSC.register.7=AT91C_SSC_RNPR
+group.PDC_SSC.register.8=AT91C_SSC_TNPR
+group.PDC_SSC.register.9=AT91C_SSC_PTSR
+# ========== Group definition for SSC peripheral ========== 
+group.SSC.description="ATMEL SSC Registers"
+group.SSC.helpkey="ATMEL SSC Registers"
+group.SSC.register.0=AT91C_SSC_RHR
+group.SSC.register.1=AT91C_SSC_RSHR
+group.SSC.register.2=AT91C_SSC_TFMR
+group.SSC.register.3=AT91C_SSC_IDR
+group.SSC.register.4=AT91C_SSC_THR
+group.SSC.register.5=AT91C_SSC_RCMR
+group.SSC.register.6=AT91C_SSC_IER
+group.SSC.register.7=AT91C_SSC_TSHR
+group.SSC.register.8=AT91C_SSC_SR
+group.SSC.register.9=AT91C_SSC_CMR
+group.SSC.register.10=AT91C_SSC_TCMR
+group.SSC.register.11=AT91C_SSC_CR
+group.SSC.register.12=AT91C_SSC_IMR
+group.SSC.register.13=AT91C_SSC_RFMR
+# ========== Group definition for TWI peripheral ========== 
+group.TWI.description="ATMEL TWI Registers"
+group.TWI.helpkey="ATMEL TWI Registers"
+group.TWI.register.0=AT91C_TWI_IER
+group.TWI.register.1=AT91C_TWI_CR
+group.TWI.register.2=AT91C_TWI_SR
+group.TWI.register.3=AT91C_TWI_IMR
+group.TWI.register.4=AT91C_TWI_THR
+group.TWI.register.5=AT91C_TWI_IDR
+group.TWI.register.6=AT91C_TWI_IADR
+group.TWI.register.7=AT91C_TWI_MMR
+group.TWI.register.8=AT91C_TWI_CWGR
+group.TWI.register.9=AT91C_TWI_RHR
+# ========== Group definition for PWMC_CH3 peripheral ========== 
+group.PWMC_CH3.description="ATMEL PWMC_CH3 Registers"
+group.PWMC_CH3.helpkey="ATMEL PWMC_CH3 Registers"
+group.PWMC_CH3.register.0=AT91C_PWMC_CH3_CUPDR
+group.PWMC_CH3.register.1=AT91C_PWMC_CH3_Reserved
+group.PWMC_CH3.register.2=AT91C_PWMC_CH3_CPRDR
+group.PWMC_CH3.register.3=AT91C_PWMC_CH3_CDTYR
+group.PWMC_CH3.register.4=AT91C_PWMC_CH3_CCNTR
+group.PWMC_CH3.register.5=AT91C_PWMC_CH3_CMR
+# ========== Group definition for PWMC_CH2 peripheral ========== 
+group.PWMC_CH2.description="ATMEL PWMC_CH2 Registers"
+group.PWMC_CH2.helpkey="ATMEL PWMC_CH2 Registers"
+group.PWMC_CH2.register.0=AT91C_PWMC_CH2_Reserved
+group.PWMC_CH2.register.1=AT91C_PWMC_CH2_CMR
+group.PWMC_CH2.register.2=AT91C_PWMC_CH2_CCNTR
+group.PWMC_CH2.register.3=AT91C_PWMC_CH2_CPRDR
+group.PWMC_CH2.register.4=AT91C_PWMC_CH2_CUPDR
+group.PWMC_CH2.register.5=AT91C_PWMC_CH2_CDTYR
+# ========== Group definition for PWMC_CH1 peripheral ========== 
+group.PWMC_CH1.description="ATMEL PWMC_CH1 Registers"
+group.PWMC_CH1.helpkey="ATMEL PWMC_CH1 Registers"
+group.PWMC_CH1.register.0=AT91C_PWMC_CH1_Reserved
+group.PWMC_CH1.register.1=AT91C_PWMC_CH1_CUPDR
+group.PWMC_CH1.register.2=AT91C_PWMC_CH1_CPRDR
+group.PWMC_CH1.register.3=AT91C_PWMC_CH1_CCNTR
+group.PWMC_CH1.register.4=AT91C_PWMC_CH1_CDTYR
+group.PWMC_CH1.register.5=AT91C_PWMC_CH1_CMR
+# ========== Group definition for PWMC_CH0 peripheral ========== 
+group.PWMC_CH0.description="ATMEL PWMC_CH0 Registers"
+group.PWMC_CH0.helpkey="ATMEL PWMC_CH0 Registers"
+group.PWMC_CH0.register.0=AT91C_PWMC_CH0_Reserved
+group.PWMC_CH0.register.1=AT91C_PWMC_CH0_CPRDR
+group.PWMC_CH0.register.2=AT91C_PWMC_CH0_CDTYR
+group.PWMC_CH0.register.3=AT91C_PWMC_CH0_CMR
+group.PWMC_CH0.register.4=AT91C_PWMC_CH0_CUPDR
+group.PWMC_CH0.register.5=AT91C_PWMC_CH0_CCNTR
+# ========== Group definition for PWMC peripheral ========== 
+group.PWMC.description="ATMEL PWMC Registers"
+group.PWMC.helpkey="ATMEL PWMC Registers"
+group.PWMC.register.0=AT91C_PWMC_IDR
+group.PWMC.register.1=AT91C_PWMC_DIS
+group.PWMC.register.2=AT91C_PWMC_IER
+group.PWMC.register.3=AT91C_PWMC_VR
+group.PWMC.register.4=AT91C_PWMC_ISR
+group.PWMC.register.5=AT91C_PWMC_SR
+group.PWMC.register.6=AT91C_PWMC_IMR
+group.PWMC.register.7=AT91C_PWMC_MR
+group.PWMC.register.8=AT91C_PWMC_ENA
+# ========== Group definition for UDP peripheral ========== 
+group.UDP.description="ATMEL UDP Registers"
+group.UDP.helpkey="ATMEL UDP Registers"
+group.UDP.register.0=AT91C_UDP_IMR
+group.UDP.register.1=AT91C_UDP_FADDR
+group.UDP.register.2=AT91C_UDP_NUM
+group.UDP.register.3=AT91C_UDP_FDR
+group.UDP.register.4=AT91C_UDP_ISR
+group.UDP.register.5=AT91C_UDP_CSR
+group.UDP.register.6=AT91C_UDP_IDR
+group.UDP.register.7=AT91C_UDP_ICR
+group.UDP.register.8=AT91C_UDP_RSTEP
+group.UDP.register.9=AT91C_UDP_TXVC
+group.UDP.register.10=AT91C_UDP_GLBSTATE
+group.UDP.register.11=AT91C_UDP_IER
+# ========== Group definition for TC0 peripheral ========== 
+group.TC0.description="ATMEL TC0 Registers"
+group.TC0.helpkey="ATMEL TC0 Registers"
+group.TC0.register.0=AT91C_TC0_SR
+group.TC0.register.1=AT91C_TC0_RC
+group.TC0.register.2=AT91C_TC0_RB
+group.TC0.register.3=AT91C_TC0_CCR
+group.TC0.register.4=AT91C_TC0_CMR
+group.TC0.register.5=AT91C_TC0_IER
+group.TC0.register.6=AT91C_TC0_RA
+group.TC0.register.7=AT91C_TC0_IDR
+group.TC0.register.8=AT91C_TC0_CV
+group.TC0.register.9=AT91C_TC0_IMR
+# ========== Group definition for TC1 peripheral ========== 
+group.TC1.description="ATMEL TC1 Registers"
+group.TC1.helpkey="ATMEL TC1 Registers"
+group.TC1.register.0=AT91C_TC1_RB
+group.TC1.register.1=AT91C_TC1_CCR
+group.TC1.register.2=AT91C_TC1_IER
+group.TC1.register.3=AT91C_TC1_IDR
+group.TC1.register.4=AT91C_TC1_SR
+group.TC1.register.5=AT91C_TC1_CMR
+group.TC1.register.6=AT91C_TC1_RA
+group.TC1.register.7=AT91C_TC1_RC
+group.TC1.register.8=AT91C_TC1_IMR
+group.TC1.register.9=AT91C_TC1_CV
+# ========== Group definition for TC2 peripheral ========== 
+group.TC2.description="ATMEL TC2 Registers"
+group.TC2.helpkey="ATMEL TC2 Registers"
+group.TC2.register.0=AT91C_TC2_CMR
+group.TC2.register.1=AT91C_TC2_CCR
+group.TC2.register.2=AT91C_TC2_CV
+group.TC2.register.3=AT91C_TC2_RA
+group.TC2.register.4=AT91C_TC2_RB
+group.TC2.register.5=AT91C_TC2_IDR
+group.TC2.register.6=AT91C_TC2_IMR
+group.TC2.register.7=AT91C_TC2_RC
+group.TC2.register.8=AT91C_TC2_IER
+group.TC2.register.9=AT91C_TC2_SR
+# ========== Group definition for TCB peripheral ========== 
+group.TCB.description="ATMEL TCB Registers"
+group.TCB.helpkey="ATMEL TCB Registers"
+group.TCB.register.0=AT91C_TCB_BMR
+group.TCB.register.1=AT91C_TCB_BCR
+# ========== Group definition for CAN_MB0 peripheral ========== 
+group.CAN_MB0.description="ATMEL CAN_MB0 Registers"
+group.CAN_MB0.helpkey="ATMEL CAN_MB0 Registers"
+group.CAN_MB0.register.0=AT91C_CAN_MB0_MDL
+group.CAN_MB0.register.1=AT91C_CAN_MB0_MAM
+group.CAN_MB0.register.2=AT91C_CAN_MB0_MCR
+group.CAN_MB0.register.3=AT91C_CAN_MB0_MID
+group.CAN_MB0.register.4=AT91C_CAN_MB0_MSR
+group.CAN_MB0.register.5=AT91C_CAN_MB0_MFID
+group.CAN_MB0.register.6=AT91C_CAN_MB0_MDH
+group.CAN_MB0.register.7=AT91C_CAN_MB0_MMR
+# ========== Group definition for CAN_MB1 peripheral ========== 
+group.CAN_MB1.description="ATMEL CAN_MB1 Registers"
+group.CAN_MB1.helpkey="ATMEL CAN_MB1 Registers"
+group.CAN_MB1.register.0=AT91C_CAN_MB1_MDL
+group.CAN_MB1.register.1=AT91C_CAN_MB1_MID
+group.CAN_MB1.register.2=AT91C_CAN_MB1_MMR
+group.CAN_MB1.register.3=AT91C_CAN_MB1_MSR
+group.CAN_MB1.register.4=AT91C_CAN_MB1_MAM
+group.CAN_MB1.register.5=AT91C_CAN_MB1_MDH
+group.CAN_MB1.register.6=AT91C_CAN_MB1_MCR
+group.CAN_MB1.register.7=AT91C_CAN_MB1_MFID
+# ========== Group definition for CAN_MB2 peripheral ========== 
+group.CAN_MB2.description="ATMEL CAN_MB2 Registers"
+group.CAN_MB2.helpkey="ATMEL CAN_MB2 Registers"
+group.CAN_MB2.register.0=AT91C_CAN_MB2_MCR
+group.CAN_MB2.register.1=AT91C_CAN_MB2_MDH
+group.CAN_MB2.register.2=AT91C_CAN_MB2_MID
+group.CAN_MB2.register.3=AT91C_CAN_MB2_MDL
+group.CAN_MB2.register.4=AT91C_CAN_MB2_MMR
+group.CAN_MB2.register.5=AT91C_CAN_MB2_MAM
+group.CAN_MB2.register.6=AT91C_CAN_MB2_MFID
+group.CAN_MB2.register.7=AT91C_CAN_MB2_MSR
+# ========== Group definition for CAN_MB3 peripheral ========== 
+group.CAN_MB3.description="ATMEL CAN_MB3 Registers"
+group.CAN_MB3.helpkey="ATMEL CAN_MB3 Registers"
+group.CAN_MB3.register.0=AT91C_CAN_MB3_MFID
+group.CAN_MB3.register.1=AT91C_CAN_MB3_MAM
+group.CAN_MB3.register.2=AT91C_CAN_MB3_MID
+group.CAN_MB3.register.3=AT91C_CAN_MB3_MCR
+group.CAN_MB3.register.4=AT91C_CAN_MB3_MMR
+group.CAN_MB3.register.5=AT91C_CAN_MB3_MSR
+group.CAN_MB3.register.6=AT91C_CAN_MB3_MDL
+group.CAN_MB3.register.7=AT91C_CAN_MB3_MDH
+# ========== Group definition for CAN_MB4 peripheral ========== 
+group.CAN_MB4.description="ATMEL CAN_MB4 Registers"
+group.CAN_MB4.helpkey="ATMEL CAN_MB4 Registers"
+group.CAN_MB4.register.0=AT91C_CAN_MB4_MID
+group.CAN_MB4.register.1=AT91C_CAN_MB4_MMR
+group.CAN_MB4.register.2=AT91C_CAN_MB4_MDH
+group.CAN_MB4.register.3=AT91C_CAN_MB4_MFID
+group.CAN_MB4.register.4=AT91C_CAN_MB4_MSR
+group.CAN_MB4.register.5=AT91C_CAN_MB4_MCR
+group.CAN_MB4.register.6=AT91C_CAN_MB4_MDL
+group.CAN_MB4.register.7=AT91C_CAN_MB4_MAM
+# ========== Group definition for CAN_MB5 peripheral ========== 
+group.CAN_MB5.description="ATMEL CAN_MB5 Registers"
+group.CAN_MB5.helpkey="ATMEL CAN_MB5 Registers"
+group.CAN_MB5.register.0=AT91C_CAN_MB5_MSR
+group.CAN_MB5.register.1=AT91C_CAN_MB5_MCR
+group.CAN_MB5.register.2=AT91C_CAN_MB5_MFID
+group.CAN_MB5.register.3=AT91C_CAN_MB5_MDH
+group.CAN_MB5.register.4=AT91C_CAN_MB5_MID
+group.CAN_MB5.register.5=AT91C_CAN_MB5_MMR
+group.CAN_MB5.register.6=AT91C_CAN_MB5_MDL
+group.CAN_MB5.register.7=AT91C_CAN_MB5_MAM
+# ========== Group definition for CAN_MB6 peripheral ========== 
+group.CAN_MB6.description="ATMEL CAN_MB6 Registers"
+group.CAN_MB6.helpkey="ATMEL CAN_MB6 Registers"
+group.CAN_MB6.register.0=AT91C_CAN_MB6_MFID
+group.CAN_MB6.register.1=AT91C_CAN_MB6_MID
+group.CAN_MB6.register.2=AT91C_CAN_MB6_MAM
+group.CAN_MB6.register.3=AT91C_CAN_MB6_MSR
+group.CAN_MB6.register.4=AT91C_CAN_MB6_MDL
+group.CAN_MB6.register.5=AT91C_CAN_MB6_MCR
+group.CAN_MB6.register.6=AT91C_CAN_MB6_MDH
+group.CAN_MB6.register.7=AT91C_CAN_MB6_MMR
+# ========== Group definition for CAN_MB7 peripheral ========== 
+group.CAN_MB7.description="ATMEL CAN_MB7 Registers"
+group.CAN_MB7.helpkey="ATMEL CAN_MB7 Registers"
+group.CAN_MB7.register.0=AT91C_CAN_MB7_MCR
+group.CAN_MB7.register.1=AT91C_CAN_MB7_MDH
+group.CAN_MB7.register.2=AT91C_CAN_MB7_MFID
+group.CAN_MB7.register.3=AT91C_CAN_MB7_MDL
+group.CAN_MB7.register.4=AT91C_CAN_MB7_MID
+group.CAN_MB7.register.5=AT91C_CAN_MB7_MMR
+group.CAN_MB7.register.6=AT91C_CAN_MB7_MAM
+group.CAN_MB7.register.7=AT91C_CAN_MB7_MSR
+# ========== Group definition for CAN peripheral ========== 
+group.CAN.description="ATMEL CAN Registers"
+group.CAN.helpkey="ATMEL CAN Registers"
+group.CAN.register.0=AT91C_CAN_TCR
+group.CAN.register.1=AT91C_CAN_IMR
+group.CAN.register.2=AT91C_CAN_IER
+group.CAN.register.3=AT91C_CAN_ECR
+group.CAN.register.4=AT91C_CAN_TIMESTP
+group.CAN.register.5=AT91C_CAN_MR
+group.CAN.register.6=AT91C_CAN_IDR
+group.CAN.register.7=AT91C_CAN_ACR
+group.CAN.register.8=AT91C_CAN_TIM
+group.CAN.register.9=AT91C_CAN_SR
+group.CAN.register.10=AT91C_CAN_BR
+group.CAN.register.11=AT91C_CAN_VR
+# ========== Group definition for EMAC peripheral ========== 
+group.EMAC.description="ATMEL EMAC Registers"
+group.EMAC.helpkey="ATMEL EMAC Registers"
+group.EMAC.register.0=AT91C_EMAC_ISR
+group.EMAC.register.1=AT91C_EMAC_SA4H
+group.EMAC.register.2=AT91C_EMAC_SA1L
+group.EMAC.register.3=AT91C_EMAC_ELE
+group.EMAC.register.4=AT91C_EMAC_LCOL
+group.EMAC.register.5=AT91C_EMAC_RLE
+group.EMAC.register.6=AT91C_EMAC_WOL
+group.EMAC.register.7=AT91C_EMAC_DTF
+group.EMAC.register.8=AT91C_EMAC_TUND
+group.EMAC.register.9=AT91C_EMAC_NCR
+group.EMAC.register.10=AT91C_EMAC_SA4L
+group.EMAC.register.11=AT91C_EMAC_RSR
+group.EMAC.register.12=AT91C_EMAC_SA3L
+group.EMAC.register.13=AT91C_EMAC_TSR
+group.EMAC.register.14=AT91C_EMAC_IDR
+group.EMAC.register.15=AT91C_EMAC_RSE
+group.EMAC.register.16=AT91C_EMAC_ECOL
+group.EMAC.register.17=AT91C_EMAC_TID
+group.EMAC.register.18=AT91C_EMAC_HRB
+group.EMAC.register.19=AT91C_EMAC_TBQP
+group.EMAC.register.20=AT91C_EMAC_USRIO
+group.EMAC.register.21=AT91C_EMAC_PTR
+group.EMAC.register.22=AT91C_EMAC_SA2H
+group.EMAC.register.23=AT91C_EMAC_ROV
+group.EMAC.register.24=AT91C_EMAC_ALE
+group.EMAC.register.25=AT91C_EMAC_RJA
+group.EMAC.register.26=AT91C_EMAC_RBQP
+group.EMAC.register.27=AT91C_EMAC_TPF
+group.EMAC.register.28=AT91C_EMAC_NCFGR
+group.EMAC.register.29=AT91C_EMAC_HRT
+group.EMAC.register.30=AT91C_EMAC_USF
+group.EMAC.register.31=AT91C_EMAC_FCSE
+group.EMAC.register.32=AT91C_EMAC_TPQ
+group.EMAC.register.33=AT91C_EMAC_MAN
+group.EMAC.register.34=AT91C_EMAC_FTO
+group.EMAC.register.35=AT91C_EMAC_REV
+group.EMAC.register.36=AT91C_EMAC_IMR
+group.EMAC.register.37=AT91C_EMAC_SCF
+group.EMAC.register.38=AT91C_EMAC_PFR
+group.EMAC.register.39=AT91C_EMAC_MCF
+group.EMAC.register.40=AT91C_EMAC_NSR
+group.EMAC.register.41=AT91C_EMAC_SA2L
+group.EMAC.register.42=AT91C_EMAC_FRO
+group.EMAC.register.43=AT91C_EMAC_IER
+group.EMAC.register.44=AT91C_EMAC_SA1H
+group.EMAC.register.45=AT91C_EMAC_CSE
+group.EMAC.register.46=AT91C_EMAC_SA3H
+group.EMAC.register.47=AT91C_EMAC_RRE
+group.EMAC.register.48=AT91C_EMAC_STE
+# ========== Group definition for PDC_ADC peripheral ========== 
+group.PDC_ADC.description="ATMEL PDC_ADC Registers"
+group.PDC_ADC.helpkey="ATMEL PDC_ADC Registers"
+group.PDC_ADC.register.0=AT91C_ADC_PTSR
+group.PDC_ADC.register.1=AT91C_ADC_PTCR
+group.PDC_ADC.register.2=AT91C_ADC_TNPR
+group.PDC_ADC.register.3=AT91C_ADC_TNCR
+group.PDC_ADC.register.4=AT91C_ADC_RNPR
+group.PDC_ADC.register.5=AT91C_ADC_RNCR
+group.PDC_ADC.register.6=AT91C_ADC_RPR
+group.PDC_ADC.register.7=AT91C_ADC_TCR
+group.PDC_ADC.register.8=AT91C_ADC_TPR
+group.PDC_ADC.register.9=AT91C_ADC_RCR
+# ========== Group definition for ADC peripheral ========== 
+group.ADC.description="ATMEL ADC Registers"
+group.ADC.helpkey="ATMEL ADC Registers"
+group.ADC.register.0=AT91C_ADC_CDR2
+group.ADC.register.1=AT91C_ADC_CDR3
+group.ADC.register.2=AT91C_ADC_CDR0
+group.ADC.register.3=AT91C_ADC_CDR5
+group.ADC.register.4=AT91C_ADC_CHDR
+group.ADC.register.5=AT91C_ADC_SR
+group.ADC.register.6=AT91C_ADC_CDR4
+group.ADC.register.7=AT91C_ADC_CDR1
+group.ADC.register.8=AT91C_ADC_LCDR
+group.ADC.register.9=AT91C_ADC_IDR
+group.ADC.register.10=AT91C_ADC_CR
+group.ADC.register.11=AT91C_ADC_CDR7
+group.ADC.register.12=AT91C_ADC_CDR6
+group.ADC.register.13=AT91C_ADC_IER
+group.ADC.register.14=AT91C_ADC_CHER
+group.ADC.register.15=AT91C_ADC_CHSR
+group.ADC.register.16=AT91C_ADC_MR
+group.ADC.register.17=AT91C_ADC_IMR
+group.AT91SAM7X256.description="ATMEL AT91SAM7X256 Registers"
+group.AT91SAM7X256.helpkey="ATMEL AT91SAM7X256 Registers"
+group.AT91SAM7X256.topLevelIndex=100 
+group.AT91SAM7X256.group.0=SYS
+group.AT91SAM7X256.group.1=AIC
+group.AT91SAM7X256.group.2=PDC_DBGU
+group.AT91SAM7X256.group.3=DBGU
+group.AT91SAM7X256.group.4=PIOA
+group.AT91SAM7X256.group.5=PIOB
+group.AT91SAM7X256.group.6=CKGR
+group.AT91SAM7X256.group.7=PMC
+group.AT91SAM7X256.group.8=RSTC
+group.AT91SAM7X256.group.9=RTTC
+group.AT91SAM7X256.group.10=PITC
+group.AT91SAM7X256.group.11=WDTC
+group.AT91SAM7X256.group.12=VREG
+group.AT91SAM7X256.group.13=MC
+group.AT91SAM7X256.group.14=PDC_SPI1
+group.AT91SAM7X256.group.15=SPI1
+group.AT91SAM7X256.group.16=PDC_SPI0
+group.AT91SAM7X256.group.17=SPI0
+group.AT91SAM7X256.group.18=PDC_US1
+group.AT91SAM7X256.group.19=US1
+group.AT91SAM7X256.group.20=PDC_US0
+group.AT91SAM7X256.group.21=US0
+group.AT91SAM7X256.group.22=PDC_SSC
+group.AT91SAM7X256.group.23=SSC
+group.AT91SAM7X256.group.24=TWI
+group.AT91SAM7X256.group.25=PWMC_CH3
+group.AT91SAM7X256.group.26=PWMC_CH2
+group.AT91SAM7X256.group.27=PWMC_CH1
+group.AT91SAM7X256.group.28=PWMC_CH0
+group.AT91SAM7X256.group.29=PWMC
+group.AT91SAM7X256.group.30=UDP
+group.AT91SAM7X256.group.31=TC0
+group.AT91SAM7X256.group.32=TC1
+group.AT91SAM7X256.group.33=TC2
+group.AT91SAM7X256.group.34=TCB
+group.AT91SAM7X256.group.35=CAN_MB0
+group.AT91SAM7X256.group.36=CAN_MB1
+group.AT91SAM7X256.group.37=CAN_MB2
+group.AT91SAM7X256.group.38=CAN_MB3
+group.AT91SAM7X256.group.39=CAN_MB4
+group.AT91SAM7X256.group.40=CAN_MB5
+group.AT91SAM7X256.group.41=CAN_MB6
+group.AT91SAM7X256.group.42=CAN_MB7
+group.AT91SAM7X256.group.43=CAN
+group.AT91SAM7X256.group.44=EMAC
+group.AT91SAM7X256.group.45=PDC_ADC
+group.AT91SAM7X256.group.46=ADC
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/incIAR/AT91SAM7X256.tcl b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/incIAR/AT91SAM7X256.tcl
new file mode 100644
index 000000000..5d3a66223
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/incIAR/AT91SAM7X256.tcl
@@ -0,0 +1,3407 @@
+# ----------------------------------------------------------------------------
+#          ATMEL Microcontroller Software Support  -  ROUSSET  -
+# ----------------------------------------------------------------------------
+#  DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+#  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+#  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+#  DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+#  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+#  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+#  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+#  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+#  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+#  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+# ----------------------------------------------------------------------------
+# File Name           : AT91SAM7X256.tcl
+# Object              : AT91SAM7X256 definitions
+# Generated           : AT91 SW Application Group  11/02/2005 (15:17:30)
+# 
+# CVS Reference       : /AT91SAM7X256.pl/1.14/Tue Sep 13 15:06:52 2005//
+# CVS Reference       : /SYS_SAM7X.pl/1.3/Tue Feb  1 17:01:43 2005//
+# CVS Reference       : /MC_SAM7X.pl/1.2/Fri May 20 14:13:04 2005//
+# CVS Reference       : /PMC_SAM7X.pl/1.4/Tue Feb  8 13:58:10 2005//
+# CVS Reference       : /RSTC_SAM7X.pl/1.2/Wed Jul 13 14:57:50 2005//
+# CVS Reference       : /UDP_SAM7X.pl/1.1/Tue May 10 11:35:35 2005//
+# CVS Reference       : /PWM_SAM7X.pl/1.1/Tue May 10 11:53:07 2005//
+# CVS Reference       : /AIC_6075B.pl/1.3/Fri May 20 14:01:30 2005//
+# CVS Reference       : /PIO_6057A.pl/1.2/Thu Feb  3 10:18:28 2005//
+# CVS Reference       : /RTTC_6081A.pl/1.2/Tue Nov  9 14:43:58 2004//
+# CVS Reference       : /PITC_6079A.pl/1.2/Tue Nov  9 14:43:56 2004//
+# CVS Reference       : /WDTC_6080A.pl/1.3/Tue Nov  9 14:44:00 2004//
+# CVS Reference       : /VREG_6085B.pl/1.1/Tue Feb  1 16:05:48 2005//
+# CVS Reference       : /PDC_6074C.pl/1.2/Thu Feb  3 08:48:54 2005//
+# CVS Reference       : /DBGU_6059D.pl/1.1/Mon Jan 31 13:15:32 2005//
+# CVS Reference       : /SPI_6088D.pl/1.3/Fri May 20 14:08:59 2005//
+# CVS Reference       : /US_6089C.pl/1.1/Mon Jul 12 18:23:26 2004//
+# CVS Reference       : /SSC_6078B.pl/1.1/Wed Jul 13 15:19:19 2005//
+# CVS Reference       : /TWI_6061A.pl/1.1/Tue Jul 13 07:38:06 2004//
+# CVS Reference       : /TC_6082A.pl/1.7/Fri Mar 11 12:52:17 2005//
+# CVS Reference       : /CAN_6019B.pl/1.1/Tue Mar  8 12:42:22 2005//
+# CVS Reference       : /EMACB_6119A.pl/1.6/Wed Jul 13 15:05:35 2005//
+# CVS Reference       : /ADC_6051C.pl/1.1/Fri Oct 17 09:12:38 2003//
+# ----------------------------------------------------------------------------
+
+
+# *****************************************************************************
+#              SOFTWARE API DEFINITION  FOR System Peripherals
+# *****************************************************************************
+
+# *****************************************************************************
+#              SOFTWARE API DEFINITION  FOR Advanced Interrupt Controller
+# *****************************************************************************
+# -------- AIC_SMR : (AIC Offset: 0x0) Control Register -------- 
+set AT91C_AIC_PRIOR       [expr 0x7 <<  0 ]
+set 	AT91C_AIC_PRIOR_LOWEST               0x0
+set 	AT91C_AIC_PRIOR_HIGHEST              0x7
+set AT91C_AIC_SRCTYPE     [expr 0x3 <<  5 ]
+set 	AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL       [expr 0x0 <<  5 ]
+set 	AT91C_AIC_SRCTYPE_EXT_LOW_LEVEL        [expr 0x0 <<  5 ]
+set 	AT91C_AIC_SRCTYPE_INT_POSITIVE_EDGE    [expr 0x1 <<  5 ]
+set 	AT91C_AIC_SRCTYPE_EXT_NEGATIVE_EDGE    [expr 0x1 <<  5 ]
+set 	AT91C_AIC_SRCTYPE_HIGH_LEVEL           [expr 0x2 <<  5 ]
+set 	AT91C_AIC_SRCTYPE_POSITIVE_EDGE        [expr 0x3 <<  5 ]
+# -------- AIC_CISR : (AIC Offset: 0x114) AIC Core Interrupt Status Register -------- 
+set AT91C_AIC_NFIQ        [expr 0x1 <<  0 ]
+set AT91C_AIC_NIRQ        [expr 0x1 <<  1 ]
+# -------- AIC_DCR : (AIC Offset: 0x138) AIC Debug Control Register (Protect) -------- 
+set AT91C_AIC_DCR_PROT    [expr 0x1 <<  0 ]
+set AT91C_AIC_DCR_GMSK    [expr 0x1 <<  1 ]
+
+# *****************************************************************************
+#              SOFTWARE API DEFINITION  FOR Peripheral DMA Controller
+# *****************************************************************************
+# -------- PDC_PTCR : (PDC Offset: 0x20) PDC Transfer Control Register -------- 
+set AT91C_PDC_RXTEN       [expr 0x1 <<  0 ]
+set AT91C_PDC_RXTDIS      [expr 0x1 <<  1 ]
+set AT91C_PDC_TXTEN       [expr 0x1 <<  8 ]
+set AT91C_PDC_TXTDIS      [expr 0x1 <<  9 ]
+# -------- PDC_PTSR : (PDC Offset: 0x24) PDC Transfer Status Register -------- 
+set AT91C_PDC_RXTEN       [expr 0x1 <<  0 ]
+set AT91C_PDC_TXTEN       [expr 0x1 <<  8 ]
+
+# *****************************************************************************
+#              SOFTWARE API DEFINITION  FOR Debug Unit
+# *****************************************************************************
+# -------- DBGU_CR : (DBGU Offset: 0x0) Debug Unit Control Register -------- 
+set AT91C_US_RSTRX        [expr 0x1 <<  2 ]
+set AT91C_US_RSTTX        [expr 0x1 <<  3 ]
+set AT91C_US_RXEN         [expr 0x1 <<  4 ]
+set AT91C_US_RXDIS        [expr 0x1 <<  5 ]
+set AT91C_US_TXEN         [expr 0x1 <<  6 ]
+set AT91C_US_TXDIS        [expr 0x1 <<  7 ]
+set AT91C_US_RSTSTA       [expr 0x1 <<  8 ]
+# -------- DBGU_MR : (DBGU Offset: 0x4) Debug Unit Mode Register -------- 
+set AT91C_US_PAR          [expr 0x7 <<  9 ]
+set 	AT91C_US_PAR_EVEN                 [expr 0x0 <<  9 ]
+set 	AT91C_US_PAR_ODD                  [expr 0x1 <<  9 ]
+set 	AT91C_US_PAR_SPACE                [expr 0x2 <<  9 ]
+set 	AT91C_US_PAR_MARK                 [expr 0x3 <<  9 ]
+set 	AT91C_US_PAR_NONE                 [expr 0x4 <<  9 ]
+set 	AT91C_US_PAR_MULTI_DROP           [expr 0x6 <<  9 ]
+set AT91C_US_CHMODE       [expr 0x3 << 14 ]
+set 	AT91C_US_CHMODE_NORMAL               [expr 0x0 << 14 ]
+set 	AT91C_US_CHMODE_AUTO                 [expr 0x1 << 14 ]
+set 	AT91C_US_CHMODE_LOCAL                [expr 0x2 << 14 ]
+set 	AT91C_US_CHMODE_REMOTE               [expr 0x3 << 14 ]
+# -------- DBGU_IER : (DBGU Offset: 0x8) Debug Unit Interrupt Enable Register -------- 
+set AT91C_US_RXRDY        [expr 0x1 <<  0 ]
+set AT91C_US_TXRDY        [expr 0x1 <<  1 ]
+set AT91C_US_ENDRX        [expr 0x1 <<  3 ]
+set AT91C_US_ENDTX        [expr 0x1 <<  4 ]
+set AT91C_US_OVRE         [expr 0x1 <<  5 ]
+set AT91C_US_FRAME        [expr 0x1 <<  6 ]
+set AT91C_US_PARE         [expr 0x1 <<  7 ]
+set AT91C_US_TXEMPTY      [expr 0x1 <<  9 ]
+set AT91C_US_TXBUFE       [expr 0x1 << 11 ]
+set AT91C_US_RXBUFF       [expr 0x1 << 12 ]
+set AT91C_US_COMM_TX      [expr 0x1 << 30 ]
+set AT91C_US_COMM_RX      [expr 0x1 << 31 ]
+# -------- DBGU_IDR : (DBGU Offset: 0xc) Debug Unit Interrupt Disable Register -------- 
+set AT91C_US_RXRDY        [expr 0x1 <<  0 ]
+set AT91C_US_TXRDY        [expr 0x1 <<  1 ]
+set AT91C_US_ENDRX        [expr 0x1 <<  3 ]
+set AT91C_US_ENDTX        [expr 0x1 <<  4 ]
+set AT91C_US_OVRE         [expr 0x1 <<  5 ]
+set AT91C_US_FRAME        [expr 0x1 <<  6 ]
+set AT91C_US_PARE         [expr 0x1 <<  7 ]
+set AT91C_US_TXEMPTY      [expr 0x1 <<  9 ]
+set AT91C_US_TXBUFE       [expr 0x1 << 11 ]
+set AT91C_US_RXBUFF       [expr 0x1 << 12 ]
+set AT91C_US_COMM_TX      [expr 0x1 << 30 ]
+set AT91C_US_COMM_RX      [expr 0x1 << 31 ]
+# -------- DBGU_IMR : (DBGU Offset: 0x10) Debug Unit Interrupt Mask Register -------- 
+set AT91C_US_RXRDY        [expr 0x1 <<  0 ]
+set AT91C_US_TXRDY        [expr 0x1 <<  1 ]
+set AT91C_US_ENDRX        [expr 0x1 <<  3 ]
+set AT91C_US_ENDTX        [expr 0x1 <<  4 ]
+set AT91C_US_OVRE         [expr 0x1 <<  5 ]
+set AT91C_US_FRAME        [expr 0x1 <<  6 ]
+set AT91C_US_PARE         [expr 0x1 <<  7 ]
+set AT91C_US_TXEMPTY      [expr 0x1 <<  9 ]
+set AT91C_US_TXBUFE       [expr 0x1 << 11 ]
+set AT91C_US_RXBUFF       [expr 0x1 << 12 ]
+set AT91C_US_COMM_TX      [expr 0x1 << 30 ]
+set AT91C_US_COMM_RX      [expr 0x1 << 31 ]
+# -------- DBGU_CSR : (DBGU Offset: 0x14) Debug Unit Channel Status Register -------- 
+set AT91C_US_RXRDY        [expr 0x1 <<  0 ]
+set AT91C_US_TXRDY        [expr 0x1 <<  1 ]
+set AT91C_US_ENDRX        [expr 0x1 <<  3 ]
+set AT91C_US_ENDTX        [expr 0x1 <<  4 ]
+set AT91C_US_OVRE         [expr 0x1 <<  5 ]
+set AT91C_US_FRAME        [expr 0x1 <<  6 ]
+set AT91C_US_PARE         [expr 0x1 <<  7 ]
+set AT91C_US_TXEMPTY      [expr 0x1 <<  9 ]
+set AT91C_US_TXBUFE       [expr 0x1 << 11 ]
+set AT91C_US_RXBUFF       [expr 0x1 << 12 ]
+set AT91C_US_COMM_TX      [expr 0x1 << 30 ]
+set AT91C_US_COMM_RX      [expr 0x1 << 31 ]
+# -------- DBGU_FNTR : (DBGU Offset: 0x48) Debug Unit FORCE_NTRST Register -------- 
+set AT91C_US_FORCE_NTRST  [expr 0x1 <<  0 ]
+
+# *****************************************************************************
+#              SOFTWARE API DEFINITION  FOR Parallel Input Output Controler
+# *****************************************************************************
+
+# *****************************************************************************
+#              SOFTWARE API DEFINITION  FOR Clock Generator Controler
+# *****************************************************************************
+# -------- CKGR_MOR : (CKGR Offset: 0x0) Main Oscillator Register -------- 
+set AT91C_CKGR_MOSCEN     [expr 0x1 <<  0 ]
+set AT91C_CKGR_OSCBYPASS  [expr 0x1 <<  1 ]
+set AT91C_CKGR_OSCOUNT    [expr 0xFF <<  8 ]
+# -------- CKGR_MCFR : (CKGR Offset: 0x4) Main Clock Frequency Register -------- 
+set AT91C_CKGR_MAINF      [expr 0xFFFF <<  0 ]
+set AT91C_CKGR_MAINRDY    [expr 0x1 << 16 ]
+# -------- CKGR_PLLR : (CKGR Offset: 0xc) PLL B Register -------- 
+set AT91C_CKGR_DIV        [expr 0xFF <<  0 ]
+set 	AT91C_CKGR_DIV_0                    0x0
+set 	AT91C_CKGR_DIV_BYPASS               0x1
+set AT91C_CKGR_PLLCOUNT   [expr 0x3F <<  8 ]
+set AT91C_CKGR_OUT        [expr 0x3 << 14 ]
+set 	AT91C_CKGR_OUT_0                    [expr 0x0 << 14 ]
+set 	AT91C_CKGR_OUT_1                    [expr 0x1 << 14 ]
+set 	AT91C_CKGR_OUT_2                    [expr 0x2 << 14 ]
+set 	AT91C_CKGR_OUT_3                    [expr 0x3 << 14 ]
+set AT91C_CKGR_MUL        [expr 0x7FF << 16 ]
+set AT91C_CKGR_USBDIV     [expr 0x3 << 28 ]
+set 	AT91C_CKGR_USBDIV_0                    [expr 0x0 << 28 ]
+set 	AT91C_CKGR_USBDIV_1                    [expr 0x1 << 28 ]
+set 	AT91C_CKGR_USBDIV_2                    [expr 0x2 << 28 ]
+
+# *****************************************************************************
+#              SOFTWARE API DEFINITION  FOR Power Management Controler
+# *****************************************************************************
+# -------- PMC_SCER : (PMC Offset: 0x0) System Clock Enable Register -------- 
+set AT91C_PMC_PCK         [expr 0x1 <<  0 ]
+set AT91C_PMC_UDP         [expr 0x1 <<  7 ]
+set AT91C_PMC_PCK0        [expr 0x1 <<  8 ]
+set AT91C_PMC_PCK1        [expr 0x1 <<  9 ]
+set AT91C_PMC_PCK2        [expr 0x1 << 10 ]
+set AT91C_PMC_PCK3        [expr 0x1 << 11 ]
+# -------- PMC_SCDR : (PMC Offset: 0x4) System Clock Disable Register -------- 
+set AT91C_PMC_PCK         [expr 0x1 <<  0 ]
+set AT91C_PMC_UDP         [expr 0x1 <<  7 ]
+set AT91C_PMC_PCK0        [expr 0x1 <<  8 ]
+set AT91C_PMC_PCK1        [expr 0x1 <<  9 ]
+set AT91C_PMC_PCK2        [expr 0x1 << 10 ]
+set AT91C_PMC_PCK3        [expr 0x1 << 11 ]
+# -------- PMC_SCSR : (PMC Offset: 0x8) System Clock Status Register -------- 
+set AT91C_PMC_PCK         [expr 0x1 <<  0 ]
+set AT91C_PMC_UDP         [expr 0x1 <<  7 ]
+set AT91C_PMC_PCK0        [expr 0x1 <<  8 ]
+set AT91C_PMC_PCK1        [expr 0x1 <<  9 ]
+set AT91C_PMC_PCK2        [expr 0x1 << 10 ]
+set AT91C_PMC_PCK3        [expr 0x1 << 11 ]
+# -------- CKGR_MOR : (PMC Offset: 0x20) Main Oscillator Register -------- 
+set AT91C_CKGR_MOSCEN     [expr 0x1 <<  0 ]
+set AT91C_CKGR_OSCBYPASS  [expr 0x1 <<  1 ]
+set AT91C_CKGR_OSCOUNT    [expr 0xFF <<  8 ]
+# -------- CKGR_MCFR : (PMC Offset: 0x24) Main Clock Frequency Register -------- 
+set AT91C_CKGR_MAINF      [expr 0xFFFF <<  0 ]
+set AT91C_CKGR_MAINRDY    [expr 0x1 << 16 ]
+# -------- CKGR_PLLR : (PMC Offset: 0x2c) PLL B Register -------- 
+set AT91C_CKGR_DIV        [expr 0xFF <<  0 ]
+set 	AT91C_CKGR_DIV_0                    0x0
+set 	AT91C_CKGR_DIV_BYPASS               0x1
+set AT91C_CKGR_PLLCOUNT   [expr 0x3F <<  8 ]
+set AT91C_CKGR_OUT        [expr 0x3 << 14 ]
+set 	AT91C_CKGR_OUT_0                    [expr 0x0 << 14 ]
+set 	AT91C_CKGR_OUT_1                    [expr 0x1 << 14 ]
+set 	AT91C_CKGR_OUT_2                    [expr 0x2 << 14 ]
+set 	AT91C_CKGR_OUT_3                    [expr 0x3 << 14 ]
+set AT91C_CKGR_MUL        [expr 0x7FF << 16 ]
+set AT91C_CKGR_USBDIV     [expr 0x3 << 28 ]
+set 	AT91C_CKGR_USBDIV_0                    [expr 0x0 << 28 ]
+set 	AT91C_CKGR_USBDIV_1                    [expr 0x1 << 28 ]
+set 	AT91C_CKGR_USBDIV_2                    [expr 0x2 << 28 ]
+# -------- PMC_MCKR : (PMC Offset: 0x30) Master Clock Register -------- 
+set AT91C_PMC_CSS         [expr 0x3 <<  0 ]
+set 	AT91C_PMC_CSS_SLOW_CLK             0x0
+set 	AT91C_PMC_CSS_MAIN_CLK             0x1
+set 	AT91C_PMC_CSS_PLL_CLK              0x3
+set AT91C_PMC_PRES        [expr 0x7 <<  2 ]
+set 	AT91C_PMC_PRES_CLK                  [expr 0x0 <<  2 ]
+set 	AT91C_PMC_PRES_CLK_2                [expr 0x1 <<  2 ]
+set 	AT91C_PMC_PRES_CLK_4                [expr 0x2 <<  2 ]
+set 	AT91C_PMC_PRES_CLK_8                [expr 0x3 <<  2 ]
+set 	AT91C_PMC_PRES_CLK_16               [expr 0x4 <<  2 ]
+set 	AT91C_PMC_PRES_CLK_32               [expr 0x5 <<  2 ]
+set 	AT91C_PMC_PRES_CLK_64               [expr 0x6 <<  2 ]
+# -------- PMC_PCKR : (PMC Offset: 0x40) Programmable Clock Register -------- 
+set AT91C_PMC_CSS         [expr 0x3 <<  0 ]
+set 	AT91C_PMC_CSS_SLOW_CLK             0x0
+set 	AT91C_PMC_CSS_MAIN_CLK             0x1
+set 	AT91C_PMC_CSS_PLL_CLK              0x3
+set AT91C_PMC_PRES        [expr 0x7 <<  2 ]
+set 	AT91C_PMC_PRES_CLK                  [expr 0x0 <<  2 ]
+set 	AT91C_PMC_PRES_CLK_2                [expr 0x1 <<  2 ]
+set 	AT91C_PMC_PRES_CLK_4                [expr 0x2 <<  2 ]
+set 	AT91C_PMC_PRES_CLK_8                [expr 0x3 <<  2 ]
+set 	AT91C_PMC_PRES_CLK_16               [expr 0x4 <<  2 ]
+set 	AT91C_PMC_PRES_CLK_32               [expr 0x5 <<  2 ]
+set 	AT91C_PMC_PRES_CLK_64               [expr 0x6 <<  2 ]
+# -------- PMC_IER : (PMC Offset: 0x60) PMC Interrupt Enable Register -------- 
+set AT91C_PMC_MOSCS       [expr 0x1 <<  0 ]
+set AT91C_PMC_LOCK        [expr 0x1 <<  2 ]
+set AT91C_PMC_MCKRDY      [expr 0x1 <<  3 ]
+set AT91C_PMC_PCK0RDY     [expr 0x1 <<  8 ]
+set AT91C_PMC_PCK1RDY     [expr 0x1 <<  9 ]
+set AT91C_PMC_PCK2RDY     [expr 0x1 << 10 ]
+set AT91C_PMC_PCK3RDY     [expr 0x1 << 11 ]
+# -------- PMC_IDR : (PMC Offset: 0x64) PMC Interrupt Disable Register -------- 
+set AT91C_PMC_MOSCS       [expr 0x1 <<  0 ]
+set AT91C_PMC_LOCK        [expr 0x1 <<  2 ]
+set AT91C_PMC_MCKRDY      [expr 0x1 <<  3 ]
+set AT91C_PMC_PCK0RDY     [expr 0x1 <<  8 ]
+set AT91C_PMC_PCK1RDY     [expr 0x1 <<  9 ]
+set AT91C_PMC_PCK2RDY     [expr 0x1 << 10 ]
+set AT91C_PMC_PCK3RDY     [expr 0x1 << 11 ]
+# -------- PMC_SR : (PMC Offset: 0x68) PMC Status Register -------- 
+set AT91C_PMC_MOSCS       [expr 0x1 <<  0 ]
+set AT91C_PMC_LOCK        [expr 0x1 <<  2 ]
+set AT91C_PMC_MCKRDY      [expr 0x1 <<  3 ]
+set AT91C_PMC_PCK0RDY     [expr 0x1 <<  8 ]
+set AT91C_PMC_PCK1RDY     [expr 0x1 <<  9 ]
+set AT91C_PMC_PCK2RDY     [expr 0x1 << 10 ]
+set AT91C_PMC_PCK3RDY     [expr 0x1 << 11 ]
+# -------- PMC_IMR : (PMC Offset: 0x6c) PMC Interrupt Mask Register -------- 
+set AT91C_PMC_MOSCS       [expr 0x1 <<  0 ]
+set AT91C_PMC_LOCK        [expr 0x1 <<  2 ]
+set AT91C_PMC_MCKRDY      [expr 0x1 <<  3 ]
+set AT91C_PMC_PCK0RDY     [expr 0x1 <<  8 ]
+set AT91C_PMC_PCK1RDY     [expr 0x1 <<  9 ]
+set AT91C_PMC_PCK2RDY     [expr 0x1 << 10 ]
+set AT91C_PMC_PCK3RDY     [expr 0x1 << 11 ]
+
+# *****************************************************************************
+#              SOFTWARE API DEFINITION  FOR Reset Controller Interface
+# *****************************************************************************
+# -------- RSTC_RCR : (RSTC Offset: 0x0) Reset Control Register -------- 
+set AT91C_RSTC_PROCRST    [expr 0x1 <<  0 ]
+set AT91C_RSTC_PERRST     [expr 0x1 <<  2 ]
+set AT91C_RSTC_EXTRST     [expr 0x1 <<  3 ]
+set AT91C_RSTC_KEY        [expr 0xFF << 24 ]
+# -------- RSTC_RSR : (RSTC Offset: 0x4) Reset Status Register -------- 
+set AT91C_RSTC_URSTS      [expr 0x1 <<  0 ]
+set AT91C_RSTC_BODSTS     [expr 0x1 <<  1 ]
+set AT91C_RSTC_RSTTYP     [expr 0x7 <<  8 ]
+set 	AT91C_RSTC_RSTTYP_POWERUP              [expr 0x0 <<  8 ]
+set 	AT91C_RSTC_RSTTYP_WAKEUP               [expr 0x1 <<  8 ]
+set 	AT91C_RSTC_RSTTYP_WATCHDOG             [expr 0x2 <<  8 ]
+set 	AT91C_RSTC_RSTTYP_SOFTWARE             [expr 0x3 <<  8 ]
+set 	AT91C_RSTC_RSTTYP_USER                 [expr 0x4 <<  8 ]
+set 	AT91C_RSTC_RSTTYP_BROWNOUT             [expr 0x5 <<  8 ]
+set AT91C_RSTC_NRSTL      [expr 0x1 << 16 ]
+set AT91C_RSTC_SRCMP      [expr 0x1 << 17 ]
+# -------- RSTC_RMR : (RSTC Offset: 0x8) Reset Mode Register -------- 
+set AT91C_RSTC_URSTEN     [expr 0x1 <<  0 ]
+set AT91C_RSTC_URSTIEN    [expr 0x1 <<  4 ]
+set AT91C_RSTC_ERSTL      [expr 0xF <<  8 ]
+set AT91C_RSTC_BODIEN     [expr 0x1 << 16 ]
+set AT91C_RSTC_KEY        [expr 0xFF << 24 ]
+
+# *****************************************************************************
+#              SOFTWARE API DEFINITION  FOR Real Time Timer Controller Interface
+# *****************************************************************************
+# -------- RTTC_RTMR : (RTTC Offset: 0x0) Real-time Mode Register -------- 
+set AT91C_RTTC_RTPRES     [expr 0xFFFF <<  0 ]
+set AT91C_RTTC_ALMIEN     [expr 0x1 << 16 ]
+set AT91C_RTTC_RTTINCIEN  [expr 0x1 << 17 ]
+set AT91C_RTTC_RTTRST     [expr 0x1 << 18 ]
+# -------- RTTC_RTAR : (RTTC Offset: 0x4) Real-time Alarm Register -------- 
+set AT91C_RTTC_ALMV       [expr 0x0 <<  0 ]
+# -------- RTTC_RTVR : (RTTC Offset: 0x8) Current Real-time Value Register -------- 
+set AT91C_RTTC_CRTV       [expr 0x0 <<  0 ]
+# -------- RTTC_RTSR : (RTTC Offset: 0xc) Real-time Status Register -------- 
+set AT91C_RTTC_ALMS       [expr 0x1 <<  0 ]
+set AT91C_RTTC_RTTINC     [expr 0x1 <<  1 ]
+
+# *****************************************************************************
+#              SOFTWARE API DEFINITION  FOR Periodic Interval Timer Controller Interface
+# *****************************************************************************
+# -------- PITC_PIMR : (PITC Offset: 0x0) Periodic Interval Mode Register -------- 
+set AT91C_PITC_PIV        [expr 0xFFFFF <<  0 ]
+set AT91C_PITC_PITEN      [expr 0x1 << 24 ]
+set AT91C_PITC_PITIEN     [expr 0x1 << 25 ]
+# -------- PITC_PISR : (PITC Offset: 0x4) Periodic Interval Status Register -------- 
+set AT91C_PITC_PITS       [expr 0x1 <<  0 ]
+# -------- PITC_PIVR : (PITC Offset: 0x8) Periodic Interval Value Register -------- 
+set AT91C_PITC_CPIV       [expr 0xFFFFF <<  0 ]
+set AT91C_PITC_PICNT      [expr 0xFFF << 20 ]
+# -------- PITC_PIIR : (PITC Offset: 0xc) Periodic Interval Image Register -------- 
+set AT91C_PITC_CPIV       [expr 0xFFFFF <<  0 ]
+set AT91C_PITC_PICNT      [expr 0xFFF << 20 ]
+
+# *****************************************************************************
+#              SOFTWARE API DEFINITION  FOR Watchdog Timer Controller Interface
+# *****************************************************************************
+# -------- WDTC_WDCR : (WDTC Offset: 0x0) Periodic Interval Image Register -------- 
+set AT91C_WDTC_WDRSTT     [expr 0x1 <<  0 ]
+set AT91C_WDTC_KEY        [expr 0xFF << 24 ]
+# -------- WDTC_WDMR : (WDTC Offset: 0x4) Watchdog Mode Register -------- 
+set AT91C_WDTC_WDV        [expr 0xFFF <<  0 ]
+set AT91C_WDTC_WDFIEN     [expr 0x1 << 12 ]
+set AT91C_WDTC_WDRSTEN    [expr 0x1 << 13 ]
+set AT91C_WDTC_WDRPROC    [expr 0x1 << 14 ]
+set AT91C_WDTC_WDDIS      [expr 0x1 << 15 ]
+set AT91C_WDTC_WDD        [expr 0xFFF << 16 ]
+set AT91C_WDTC_WDDBGHLT   [expr 0x1 << 28 ]
+set AT91C_WDTC_WDIDLEHLT  [expr 0x1 << 29 ]
+# -------- WDTC_WDSR : (WDTC Offset: 0x8) Watchdog Status Register -------- 
+set AT91C_WDTC_WDUNF      [expr 0x1 <<  0 ]
+set AT91C_WDTC_WDERR      [expr 0x1 <<  1 ]
+
+# *****************************************************************************
+#              SOFTWARE API DEFINITION  FOR Voltage Regulator Mode Controller Interface
+# *****************************************************************************
+# -------- VREG_MR : (VREG Offset: 0x0) Voltage Regulator Mode Register -------- 
+set AT91C_VREG_PSTDBY     [expr 0x1 <<  0 ]
+
+# *****************************************************************************
+#              SOFTWARE API DEFINITION  FOR Memory Controller Interface
+# *****************************************************************************
+# -------- MC_RCR : (MC Offset: 0x0) MC Remap Control Register -------- 
+set AT91C_MC_RCB          [expr 0x1 <<  0 ]
+# -------- MC_ASR : (MC Offset: 0x4) MC Abort Status Register -------- 
+set AT91C_MC_UNDADD       [expr 0x1 <<  0 ]
+set AT91C_MC_MISADD       [expr 0x1 <<  1 ]
+set AT91C_MC_ABTSZ        [expr 0x3 <<  8 ]
+set 	AT91C_MC_ABTSZ_BYTE                 [expr 0x0 <<  8 ]
+set 	AT91C_MC_ABTSZ_HWORD                [expr 0x1 <<  8 ]
+set 	AT91C_MC_ABTSZ_WORD                 [expr 0x2 <<  8 ]
+set AT91C_MC_ABTTYP       [expr 0x3 << 10 ]
+set 	AT91C_MC_ABTTYP_DATAR                [expr 0x0 << 10 ]
+set 	AT91C_MC_ABTTYP_DATAW                [expr 0x1 << 10 ]
+set 	AT91C_MC_ABTTYP_FETCH                [expr 0x2 << 10 ]
+set AT91C_MC_MST0         [expr 0x1 << 16 ]
+set AT91C_MC_MST1         [expr 0x1 << 17 ]
+set AT91C_MC_SVMST0       [expr 0x1 << 24 ]
+set AT91C_MC_SVMST1       [expr 0x1 << 25 ]
+# -------- MC_FMR : (MC Offset: 0x60) MC Flash Mode Register -------- 
+set AT91C_MC_FRDY         [expr 0x1 <<  0 ]
+set AT91C_MC_LOCKE        [expr 0x1 <<  2 ]
+set AT91C_MC_PROGE        [expr 0x1 <<  3 ]
+set AT91C_MC_NEBP         [expr 0x1 <<  7 ]
+set AT91C_MC_FWS          [expr 0x3 <<  8 ]
+set 	AT91C_MC_FWS_0FWS                 [expr 0x0 <<  8 ]
+set 	AT91C_MC_FWS_1FWS                 [expr 0x1 <<  8 ]
+set 	AT91C_MC_FWS_2FWS                 [expr 0x2 <<  8 ]
+set 	AT91C_MC_FWS_3FWS                 [expr 0x3 <<  8 ]
+set AT91C_MC_FMCN         [expr 0xFF << 16 ]
+# -------- MC_FCR : (MC Offset: 0x64) MC Flash Command Register -------- 
+set AT91C_MC_FCMD         [expr 0xF <<  0 ]
+set 	AT91C_MC_FCMD_START_PROG           0x1
+set 	AT91C_MC_FCMD_LOCK                 0x2
+set 	AT91C_MC_FCMD_PROG_AND_LOCK        0x3
+set 	AT91C_MC_FCMD_UNLOCK               0x4
+set 	AT91C_MC_FCMD_ERASE_ALL            0x8
+set 	AT91C_MC_FCMD_SET_GP_NVM           0xB
+set 	AT91C_MC_FCMD_CLR_GP_NVM           0xD
+set 	AT91C_MC_FCMD_SET_SECURITY         0xF
+set AT91C_MC_PAGEN        [expr 0x3FF <<  8 ]
+set AT91C_MC_KEY          [expr 0xFF << 24 ]
+# -------- MC_FSR : (MC Offset: 0x68) MC Flash Command Register -------- 
+set AT91C_MC_FRDY         [expr 0x1 <<  0 ]
+set AT91C_MC_LOCKE        [expr 0x1 <<  2 ]
+set AT91C_MC_PROGE        [expr 0x1 <<  3 ]
+set AT91C_MC_SECURITY     [expr 0x1 <<  4 ]
+set AT91C_MC_GPNVM0       [expr 0x1 <<  8 ]
+set AT91C_MC_GPNVM1       [expr 0x1 <<  9 ]
+set AT91C_MC_GPNVM2       [expr 0x1 << 10 ]
+set AT91C_MC_GPNVM3       [expr 0x1 << 11 ]
+set AT91C_MC_GPNVM4       [expr 0x1 << 12 ]
+set AT91C_MC_GPNVM5       [expr 0x1 << 13 ]
+set AT91C_MC_GPNVM6       [expr 0x1 << 14 ]
+set AT91C_MC_GPNVM7       [expr 0x1 << 15 ]
+set AT91C_MC_LOCKS0       [expr 0x1 << 16 ]
+set AT91C_MC_LOCKS1       [expr 0x1 << 17 ]
+set AT91C_MC_LOCKS2       [expr 0x1 << 18 ]
+set AT91C_MC_LOCKS3       [expr 0x1 << 19 ]
+set AT91C_MC_LOCKS4       [expr 0x1 << 20 ]
+set AT91C_MC_LOCKS5       [expr 0x1 << 21 ]
+set AT91C_MC_LOCKS6       [expr 0x1 << 22 ]
+set AT91C_MC_LOCKS7       [expr 0x1 << 23 ]
+set AT91C_MC_LOCKS8       [expr 0x1 << 24 ]
+set AT91C_MC_LOCKS9       [expr 0x1 << 25 ]
+set AT91C_MC_LOCKS10      [expr 0x1 << 26 ]
+set AT91C_MC_LOCKS11      [expr 0x1 << 27 ]
+set AT91C_MC_LOCKS12      [expr 0x1 << 28 ]
+set AT91C_MC_LOCKS13      [expr 0x1 << 29 ]
+set AT91C_MC_LOCKS14      [expr 0x1 << 30 ]
+set AT91C_MC_LOCKS15      [expr 0x1 << 31 ]
+
+# *****************************************************************************
+#              SOFTWARE API DEFINITION  FOR Serial Parallel Interface
+# *****************************************************************************
+# -------- SPI_CR : (SPI Offset: 0x0) SPI Control Register -------- 
+set AT91C_SPI_SPIEN       [expr 0x1 <<  0 ]
+set AT91C_SPI_SPIDIS      [expr 0x1 <<  1 ]
+set AT91C_SPI_SWRST       [expr 0x1 <<  7 ]
+set AT91C_SPI_LASTXFER    [expr 0x1 << 24 ]
+# -------- SPI_MR : (SPI Offset: 0x4) SPI Mode Register -------- 
+set AT91C_SPI_MSTR        [expr 0x1 <<  0 ]
+set AT91C_SPI_PS          [expr 0x1 <<  1 ]
+set 	AT91C_SPI_PS_FIXED                [expr 0x0 <<  1 ]
+set 	AT91C_SPI_PS_VARIABLE             [expr 0x1 <<  1 ]
+set AT91C_SPI_PCSDEC      [expr 0x1 <<  2 ]
+set AT91C_SPI_FDIV        [expr 0x1 <<  3 ]
+set AT91C_SPI_MODFDIS     [expr 0x1 <<  4 ]
+set AT91C_SPI_LLB         [expr 0x1 <<  7 ]
+set AT91C_SPI_PCS         [expr 0xF << 16 ]
+set AT91C_SPI_DLYBCS      [expr 0xFF << 24 ]
+# -------- SPI_RDR : (SPI Offset: 0x8) Receive Data Register -------- 
+set AT91C_SPI_RD          [expr 0xFFFF <<  0 ]
+set AT91C_SPI_RPCS        [expr 0xF << 16 ]
+# -------- SPI_TDR : (SPI Offset: 0xc) Transmit Data Register -------- 
+set AT91C_SPI_TD          [expr 0xFFFF <<  0 ]
+set AT91C_SPI_TPCS        [expr 0xF << 16 ]
+set AT91C_SPI_LASTXFER    [expr 0x1 << 24 ]
+# -------- SPI_SR : (SPI Offset: 0x10) Status Register -------- 
+set AT91C_SPI_RDRF        [expr 0x1 <<  0 ]
+set AT91C_SPI_TDRE        [expr 0x1 <<  1 ]
+set AT91C_SPI_MODF        [expr 0x1 <<  2 ]
+set AT91C_SPI_OVRES       [expr 0x1 <<  3 ]
+set AT91C_SPI_ENDRX       [expr 0x1 <<  4 ]
+set AT91C_SPI_ENDTX       [expr 0x1 <<  5 ]
+set AT91C_SPI_RXBUFF      [expr 0x1 <<  6 ]
+set AT91C_SPI_TXBUFE      [expr 0x1 <<  7 ]
+set AT91C_SPI_NSSR        [expr 0x1 <<  8 ]
+set AT91C_SPI_TXEMPTY     [expr 0x1 <<  9 ]
+set AT91C_SPI_SPIENS      [expr 0x1 << 16 ]
+# -------- SPI_IER : (SPI Offset: 0x14) Interrupt Enable Register -------- 
+set AT91C_SPI_RDRF        [expr 0x1 <<  0 ]
+set AT91C_SPI_TDRE        [expr 0x1 <<  1 ]
+set AT91C_SPI_MODF        [expr 0x1 <<  2 ]
+set AT91C_SPI_OVRES       [expr 0x1 <<  3 ]
+set AT91C_SPI_ENDRX       [expr 0x1 <<  4 ]
+set AT91C_SPI_ENDTX       [expr 0x1 <<  5 ]
+set AT91C_SPI_RXBUFF      [expr 0x1 <<  6 ]
+set AT91C_SPI_TXBUFE      [expr 0x1 <<  7 ]
+set AT91C_SPI_NSSR        [expr 0x1 <<  8 ]
+set AT91C_SPI_TXEMPTY     [expr 0x1 <<  9 ]
+# -------- SPI_IDR : (SPI Offset: 0x18) Interrupt Disable Register -------- 
+set AT91C_SPI_RDRF        [expr 0x1 <<  0 ]
+set AT91C_SPI_TDRE        [expr 0x1 <<  1 ]
+set AT91C_SPI_MODF        [expr 0x1 <<  2 ]
+set AT91C_SPI_OVRES       [expr 0x1 <<  3 ]
+set AT91C_SPI_ENDRX       [expr 0x1 <<  4 ]
+set AT91C_SPI_ENDTX       [expr 0x1 <<  5 ]
+set AT91C_SPI_RXBUFF      [expr 0x1 <<  6 ]
+set AT91C_SPI_TXBUFE      [expr 0x1 <<  7 ]
+set AT91C_SPI_NSSR        [expr 0x1 <<  8 ]
+set AT91C_SPI_TXEMPTY     [expr 0x1 <<  9 ]
+# -------- SPI_IMR : (SPI Offset: 0x1c) Interrupt Mask Register -------- 
+set AT91C_SPI_RDRF        [expr 0x1 <<  0 ]
+set AT91C_SPI_TDRE        [expr 0x1 <<  1 ]
+set AT91C_SPI_MODF        [expr 0x1 <<  2 ]
+set AT91C_SPI_OVRES       [expr 0x1 <<  3 ]
+set AT91C_SPI_ENDRX       [expr 0x1 <<  4 ]
+set AT91C_SPI_ENDTX       [expr 0x1 <<  5 ]
+set AT91C_SPI_RXBUFF      [expr 0x1 <<  6 ]
+set AT91C_SPI_TXBUFE      [expr 0x1 <<  7 ]
+set AT91C_SPI_NSSR        [expr 0x1 <<  8 ]
+set AT91C_SPI_TXEMPTY     [expr 0x1 <<  9 ]
+# -------- SPI_CSR : (SPI Offset: 0x30) Chip Select Register -------- 
+set AT91C_SPI_CPOL        [expr 0x1 <<  0 ]
+set AT91C_SPI_NCPHA       [expr 0x1 <<  1 ]
+set AT91C_SPI_CSAAT       [expr 0x1 <<  3 ]
+set AT91C_SPI_BITS        [expr 0xF <<  4 ]
+set 	AT91C_SPI_BITS_8                    [expr 0x0 <<  4 ]
+set 	AT91C_SPI_BITS_9                    [expr 0x1 <<  4 ]
+set 	AT91C_SPI_BITS_10                   [expr 0x2 <<  4 ]
+set 	AT91C_SPI_BITS_11                   [expr 0x3 <<  4 ]
+set 	AT91C_SPI_BITS_12                   [expr 0x4 <<  4 ]
+set 	AT91C_SPI_BITS_13                   [expr 0x5 <<  4 ]
+set 	AT91C_SPI_BITS_14                   [expr 0x6 <<  4 ]
+set 	AT91C_SPI_BITS_15                   [expr 0x7 <<  4 ]
+set 	AT91C_SPI_BITS_16                   [expr 0x8 <<  4 ]
+set AT91C_SPI_SCBR        [expr 0xFF <<  8 ]
+set AT91C_SPI_DLYBS       [expr 0xFF << 16 ]
+set AT91C_SPI_DLYBCT      [expr 0xFF << 24 ]
+
+# *****************************************************************************
+#              SOFTWARE API DEFINITION  FOR Usart
+# *****************************************************************************
+# -------- US_CR : (USART Offset: 0x0) Debug Unit Control Register -------- 
+set AT91C_US_RSTRX        [expr 0x1 <<  2 ]
+set AT91C_US_RSTTX        [expr 0x1 <<  3 ]
+set AT91C_US_RXEN         [expr 0x1 <<  4 ]
+set AT91C_US_RXDIS        [expr 0x1 <<  5 ]
+set AT91C_US_TXEN         [expr 0x1 <<  6 ]
+set AT91C_US_TXDIS        [expr 0x1 <<  7 ]
+set AT91C_US_RSTSTA       [expr 0x1 <<  8 ]
+set AT91C_US_STTBRK       [expr 0x1 <<  9 ]
+set AT91C_US_STPBRK       [expr 0x1 << 10 ]
+set AT91C_US_STTTO        [expr 0x1 << 11 ]
+set AT91C_US_SENDA        [expr 0x1 << 12 ]
+set AT91C_US_RSTIT        [expr 0x1 << 13 ]
+set AT91C_US_RSTNACK      [expr 0x1 << 14 ]
+set AT91C_US_RETTO        [expr 0x1 << 15 ]
+set AT91C_US_DTREN        [expr 0x1 << 16 ]
+set AT91C_US_DTRDIS       [expr 0x1 << 17 ]
+set AT91C_US_RTSEN        [expr 0x1 << 18 ]
+set AT91C_US_RTSDIS       [expr 0x1 << 19 ]
+# -------- US_MR : (USART Offset: 0x4) Debug Unit Mode Register -------- 
+set AT91C_US_USMODE       [expr 0xF <<  0 ]
+set 	AT91C_US_USMODE_NORMAL               0x0
+set 	AT91C_US_USMODE_RS485                0x1
+set 	AT91C_US_USMODE_HWHSH                0x2
+set 	AT91C_US_USMODE_MODEM                0x3
+set 	AT91C_US_USMODE_ISO7816_0            0x4
+set 	AT91C_US_USMODE_ISO7816_1            0x6
+set 	AT91C_US_USMODE_IRDA                 0x8
+set 	AT91C_US_USMODE_SWHSH                0xC
+set AT91C_US_CLKS         [expr 0x3 <<  4 ]
+set 	AT91C_US_CLKS_CLOCK                [expr 0x0 <<  4 ]
+set 	AT91C_US_CLKS_FDIV1                [expr 0x1 <<  4 ]
+set 	AT91C_US_CLKS_SLOW                 [expr 0x2 <<  4 ]
+set 	AT91C_US_CLKS_EXT                  [expr 0x3 <<  4 ]
+set AT91C_US_CHRL         [expr 0x3 <<  6 ]
+set 	AT91C_US_CHRL_5_BITS               [expr 0x0 <<  6 ]
+set 	AT91C_US_CHRL_6_BITS               [expr 0x1 <<  6 ]
+set 	AT91C_US_CHRL_7_BITS               [expr 0x2 <<  6 ]
+set 	AT91C_US_CHRL_8_BITS               [expr 0x3 <<  6 ]
+set AT91C_US_SYNC         [expr 0x1 <<  8 ]
+set AT91C_US_PAR          [expr 0x7 <<  9 ]
+set 	AT91C_US_PAR_EVEN                 [expr 0x0 <<  9 ]
+set 	AT91C_US_PAR_ODD                  [expr 0x1 <<  9 ]
+set 	AT91C_US_PAR_SPACE                [expr 0x2 <<  9 ]
+set 	AT91C_US_PAR_MARK                 [expr 0x3 <<  9 ]
+set 	AT91C_US_PAR_NONE                 [expr 0x4 <<  9 ]
+set 	AT91C_US_PAR_MULTI_DROP           [expr 0x6 <<  9 ]
+set AT91C_US_NBSTOP       [expr 0x3 << 12 ]
+set 	AT91C_US_NBSTOP_1_BIT                [expr 0x0 << 12 ]
+set 	AT91C_US_NBSTOP_15_BIT               [expr 0x1 << 12 ]
+set 	AT91C_US_NBSTOP_2_BIT                [expr 0x2 << 12 ]
+set AT91C_US_CHMODE       [expr 0x3 << 14 ]
+set 	AT91C_US_CHMODE_NORMAL               [expr 0x0 << 14 ]
+set 	AT91C_US_CHMODE_AUTO                 [expr 0x1 << 14 ]
+set 	AT91C_US_CHMODE_LOCAL                [expr 0x2 << 14 ]
+set 	AT91C_US_CHMODE_REMOTE               [expr 0x3 << 14 ]
+set AT91C_US_MSBF         [expr 0x1 << 16 ]
+set AT91C_US_MODE9        [expr 0x1 << 17 ]
+set AT91C_US_CKLO         [expr 0x1 << 18 ]
+set AT91C_US_OVER         [expr 0x1 << 19 ]
+set AT91C_US_INACK        [expr 0x1 << 20 ]
+set AT91C_US_DSNACK       [expr 0x1 << 21 ]
+set AT91C_US_MAX_ITER     [expr 0x1 << 24 ]
+set AT91C_US_FILTER       [expr 0x1 << 28 ]
+# -------- US_IER : (USART Offset: 0x8) Debug Unit Interrupt Enable Register -------- 
+set AT91C_US_RXRDY        [expr 0x1 <<  0 ]
+set AT91C_US_TXRDY        [expr 0x1 <<  1 ]
+set AT91C_US_RXBRK        [expr 0x1 <<  2 ]
+set AT91C_US_ENDRX        [expr 0x1 <<  3 ]
+set AT91C_US_ENDTX        [expr 0x1 <<  4 ]
+set AT91C_US_OVRE         [expr 0x1 <<  5 ]
+set AT91C_US_FRAME        [expr 0x1 <<  6 ]
+set AT91C_US_PARE         [expr 0x1 <<  7 ]
+set AT91C_US_TIMEOUT      [expr 0x1 <<  8 ]
+set AT91C_US_TXEMPTY      [expr 0x1 <<  9 ]
+set AT91C_US_ITERATION    [expr 0x1 << 10 ]
+set AT91C_US_TXBUFE       [expr 0x1 << 11 ]
+set AT91C_US_RXBUFF       [expr 0x1 << 12 ]
+set AT91C_US_NACK         [expr 0x1 << 13 ]
+set AT91C_US_RIIC         [expr 0x1 << 16 ]
+set AT91C_US_DSRIC        [expr 0x1 << 17 ]
+set AT91C_US_DCDIC        [expr 0x1 << 18 ]
+set AT91C_US_CTSIC        [expr 0x1 << 19 ]
+# -------- US_IDR : (USART Offset: 0xc) Debug Unit Interrupt Disable Register -------- 
+set AT91C_US_RXRDY        [expr 0x1 <<  0 ]
+set AT91C_US_TXRDY        [expr 0x1 <<  1 ]
+set AT91C_US_RXBRK        [expr 0x1 <<  2 ]
+set AT91C_US_ENDRX        [expr 0x1 <<  3 ]
+set AT91C_US_ENDTX        [expr 0x1 <<  4 ]
+set AT91C_US_OVRE         [expr 0x1 <<  5 ]
+set AT91C_US_FRAME        [expr 0x1 <<  6 ]
+set AT91C_US_PARE         [expr 0x1 <<  7 ]
+set AT91C_US_TIMEOUT      [expr 0x1 <<  8 ]
+set AT91C_US_TXEMPTY      [expr 0x1 <<  9 ]
+set AT91C_US_ITERATION    [expr 0x1 << 10 ]
+set AT91C_US_TXBUFE       [expr 0x1 << 11 ]
+set AT91C_US_RXBUFF       [expr 0x1 << 12 ]
+set AT91C_US_NACK         [expr 0x1 << 13 ]
+set AT91C_US_RIIC         [expr 0x1 << 16 ]
+set AT91C_US_DSRIC        [expr 0x1 << 17 ]
+set AT91C_US_DCDIC        [expr 0x1 << 18 ]
+set AT91C_US_CTSIC        [expr 0x1 << 19 ]
+# -------- US_IMR : (USART Offset: 0x10) Debug Unit Interrupt Mask Register -------- 
+set AT91C_US_RXRDY        [expr 0x1 <<  0 ]
+set AT91C_US_TXRDY        [expr 0x1 <<  1 ]
+set AT91C_US_RXBRK        [expr 0x1 <<  2 ]
+set AT91C_US_ENDRX        [expr 0x1 <<  3 ]
+set AT91C_US_ENDTX        [expr 0x1 <<  4 ]
+set AT91C_US_OVRE         [expr 0x1 <<  5 ]
+set AT91C_US_FRAME        [expr 0x1 <<  6 ]
+set AT91C_US_PARE         [expr 0x1 <<  7 ]
+set AT91C_US_TIMEOUT      [expr 0x1 <<  8 ]
+set AT91C_US_TXEMPTY      [expr 0x1 <<  9 ]
+set AT91C_US_ITERATION    [expr 0x1 << 10 ]
+set AT91C_US_TXBUFE       [expr 0x1 << 11 ]
+set AT91C_US_RXBUFF       [expr 0x1 << 12 ]
+set AT91C_US_NACK         [expr 0x1 << 13 ]
+set AT91C_US_RIIC         [expr 0x1 << 16 ]
+set AT91C_US_DSRIC        [expr 0x1 << 17 ]
+set AT91C_US_DCDIC        [expr 0x1 << 18 ]
+set AT91C_US_CTSIC        [expr 0x1 << 19 ]
+# -------- US_CSR : (USART Offset: 0x14) Debug Unit Channel Status Register -------- 
+set AT91C_US_RXRDY        [expr 0x1 <<  0 ]
+set AT91C_US_TXRDY        [expr 0x1 <<  1 ]
+set AT91C_US_RXBRK        [expr 0x1 <<  2 ]
+set AT91C_US_ENDRX        [expr 0x1 <<  3 ]
+set AT91C_US_ENDTX        [expr 0x1 <<  4 ]
+set AT91C_US_OVRE         [expr 0x1 <<  5 ]
+set AT91C_US_FRAME        [expr 0x1 <<  6 ]
+set AT91C_US_PARE         [expr 0x1 <<  7 ]
+set AT91C_US_TIMEOUT      [expr 0x1 <<  8 ]
+set AT91C_US_TXEMPTY      [expr 0x1 <<  9 ]
+set AT91C_US_ITERATION    [expr 0x1 << 10 ]
+set AT91C_US_TXBUFE       [expr 0x1 << 11 ]
+set AT91C_US_RXBUFF       [expr 0x1 << 12 ]
+set AT91C_US_NACK         [expr 0x1 << 13 ]
+set AT91C_US_RIIC         [expr 0x1 << 16 ]
+set AT91C_US_DSRIC        [expr 0x1 << 17 ]
+set AT91C_US_DCDIC        [expr 0x1 << 18 ]
+set AT91C_US_CTSIC        [expr 0x1 << 19 ]
+set AT91C_US_RI           [expr 0x1 << 20 ]
+set AT91C_US_DSR          [expr 0x1 << 21 ]
+set AT91C_US_DCD          [expr 0x1 << 22 ]
+set AT91C_US_CTS          [expr 0x1 << 23 ]
+
+# *****************************************************************************
+#              SOFTWARE API DEFINITION  FOR Synchronous Serial Controller Interface
+# *****************************************************************************
+# -------- SSC_CR : (SSC Offset: 0x0) SSC Control Register -------- 
+set AT91C_SSC_RXEN        [expr 0x1 <<  0 ]
+set AT91C_SSC_RXDIS       [expr 0x1 <<  1 ]
+set AT91C_SSC_TXEN        [expr 0x1 <<  8 ]
+set AT91C_SSC_TXDIS       [expr 0x1 <<  9 ]
+set AT91C_SSC_SWRST       [expr 0x1 << 15 ]
+# -------- SSC_RCMR : (SSC Offset: 0x10) SSC Receive Clock Mode Register -------- 
+set AT91C_SSC_CKS         [expr 0x3 <<  0 ]
+set 	AT91C_SSC_CKS_DIV                  0x0
+set 	AT91C_SSC_CKS_TK                   0x1
+set 	AT91C_SSC_CKS_RK                   0x2
+set AT91C_SSC_CKO         [expr 0x7 <<  2 ]
+set 	AT91C_SSC_CKO_NONE                 [expr 0x0 <<  2 ]
+set 	AT91C_SSC_CKO_CONTINOUS            [expr 0x1 <<  2 ]
+set 	AT91C_SSC_CKO_DATA_TX              [expr 0x2 <<  2 ]
+set AT91C_SSC_CKI         [expr 0x1 <<  5 ]
+set AT91C_SSC_CKG         [expr 0x3 <<  6 ]
+set 	AT91C_SSC_CKG_NONE                 [expr 0x0 <<  6 ]
+set 	AT91C_SSC_CKG_LOW                  [expr 0x1 <<  6 ]
+set 	AT91C_SSC_CKG_HIGH                 [expr 0x2 <<  6 ]
+set AT91C_SSC_START       [expr 0xF <<  8 ]
+set 	AT91C_SSC_START_CONTINOUS            [expr 0x0 <<  8 ]
+set 	AT91C_SSC_START_TX                   [expr 0x1 <<  8 ]
+set 	AT91C_SSC_START_LOW_RF               [expr 0x2 <<  8 ]
+set 	AT91C_SSC_START_HIGH_RF              [expr 0x3 <<  8 ]
+set 	AT91C_SSC_START_FALL_RF              [expr 0x4 <<  8 ]
+set 	AT91C_SSC_START_RISE_RF              [expr 0x5 <<  8 ]
+set 	AT91C_SSC_START_LEVEL_RF             [expr 0x6 <<  8 ]
+set 	AT91C_SSC_START_EDGE_RF              [expr 0x7 <<  8 ]
+set 	AT91C_SSC_START_0                    [expr 0x8 <<  8 ]
+set AT91C_SSC_STOP        [expr 0x1 << 12 ]
+set AT91C_SSC_STTDLY      [expr 0xFF << 16 ]
+set AT91C_SSC_PERIOD      [expr 0xFF << 24 ]
+# -------- SSC_RFMR : (SSC Offset: 0x14) SSC Receive Frame Mode Register -------- 
+set AT91C_SSC_DATLEN      [expr 0x1F <<  0 ]
+set AT91C_SSC_LOOP        [expr 0x1 <<  5 ]
+set AT91C_SSC_MSBF        [expr 0x1 <<  7 ]
+set AT91C_SSC_DATNB       [expr 0xF <<  8 ]
+set AT91C_SSC_FSLEN       [expr 0xF << 16 ]
+set AT91C_SSC_FSOS        [expr 0x7 << 20 ]
+set 	AT91C_SSC_FSOS_NONE                 [expr 0x0 << 20 ]
+set 	AT91C_SSC_FSOS_NEGATIVE             [expr 0x1 << 20 ]
+set 	AT91C_SSC_FSOS_POSITIVE             [expr 0x2 << 20 ]
+set 	AT91C_SSC_FSOS_LOW                  [expr 0x3 << 20 ]
+set 	AT91C_SSC_FSOS_HIGH                 [expr 0x4 << 20 ]
+set 	AT91C_SSC_FSOS_TOGGLE               [expr 0x5 << 20 ]
+set AT91C_SSC_FSEDGE      [expr 0x1 << 24 ]
+# -------- SSC_TCMR : (SSC Offset: 0x18) SSC Transmit Clock Mode Register -------- 
+set AT91C_SSC_CKS         [expr 0x3 <<  0 ]
+set 	AT91C_SSC_CKS_DIV                  0x0
+set 	AT91C_SSC_CKS_TK                   0x1
+set 	AT91C_SSC_CKS_RK                   0x2
+set AT91C_SSC_CKO         [expr 0x7 <<  2 ]
+set 	AT91C_SSC_CKO_NONE                 [expr 0x0 <<  2 ]
+set 	AT91C_SSC_CKO_CONTINOUS            [expr 0x1 <<  2 ]
+set 	AT91C_SSC_CKO_DATA_TX              [expr 0x2 <<  2 ]
+set AT91C_SSC_CKI         [expr 0x1 <<  5 ]
+set AT91C_SSC_CKG         [expr 0x3 <<  6 ]
+set 	AT91C_SSC_CKG_NONE                 [expr 0x0 <<  6 ]
+set 	AT91C_SSC_CKG_LOW                  [expr 0x1 <<  6 ]
+set 	AT91C_SSC_CKG_HIGH                 [expr 0x2 <<  6 ]
+set AT91C_SSC_START       [expr 0xF <<  8 ]
+set 	AT91C_SSC_START_CONTINOUS            [expr 0x0 <<  8 ]
+set 	AT91C_SSC_START_TX                   [expr 0x1 <<  8 ]
+set 	AT91C_SSC_START_LOW_RF               [expr 0x2 <<  8 ]
+set 	AT91C_SSC_START_HIGH_RF              [expr 0x3 <<  8 ]
+set 	AT91C_SSC_START_FALL_RF              [expr 0x4 <<  8 ]
+set 	AT91C_SSC_START_RISE_RF              [expr 0x5 <<  8 ]
+set 	AT91C_SSC_START_LEVEL_RF             [expr 0x6 <<  8 ]
+set 	AT91C_SSC_START_EDGE_RF              [expr 0x7 <<  8 ]
+set 	AT91C_SSC_START_0                    [expr 0x8 <<  8 ]
+set AT91C_SSC_STTDLY      [expr 0xFF << 16 ]
+set AT91C_SSC_PERIOD      [expr 0xFF << 24 ]
+# -------- SSC_TFMR : (SSC Offset: 0x1c) SSC Transmit Frame Mode Register -------- 
+set AT91C_SSC_DATLEN      [expr 0x1F <<  0 ]
+set AT91C_SSC_DATDEF      [expr 0x1 <<  5 ]
+set AT91C_SSC_MSBF        [expr 0x1 <<  7 ]
+set AT91C_SSC_DATNB       [expr 0xF <<  8 ]
+set AT91C_SSC_FSLEN       [expr 0xF << 16 ]
+set AT91C_SSC_FSOS        [expr 0x7 << 20 ]
+set 	AT91C_SSC_FSOS_NONE                 [expr 0x0 << 20 ]
+set 	AT91C_SSC_FSOS_NEGATIVE             [expr 0x1 << 20 ]
+set 	AT91C_SSC_FSOS_POSITIVE             [expr 0x2 << 20 ]
+set 	AT91C_SSC_FSOS_LOW                  [expr 0x3 << 20 ]
+set 	AT91C_SSC_FSOS_HIGH                 [expr 0x4 << 20 ]
+set 	AT91C_SSC_FSOS_TOGGLE               [expr 0x5 << 20 ]
+set AT91C_SSC_FSDEN       [expr 0x1 << 23 ]
+set AT91C_SSC_FSEDGE      [expr 0x1 << 24 ]
+# -------- SSC_SR : (SSC Offset: 0x40) SSC Status Register -------- 
+set AT91C_SSC_TXRDY       [expr 0x1 <<  0 ]
+set AT91C_SSC_TXEMPTY     [expr 0x1 <<  1 ]
+set AT91C_SSC_ENDTX       [expr 0x1 <<  2 ]
+set AT91C_SSC_TXBUFE      [expr 0x1 <<  3 ]
+set AT91C_SSC_RXRDY       [expr 0x1 <<  4 ]
+set AT91C_SSC_OVRUN       [expr 0x1 <<  5 ]
+set AT91C_SSC_ENDRX       [expr 0x1 <<  6 ]
+set AT91C_SSC_RXBUFF      [expr 0x1 <<  7 ]
+set AT91C_SSC_CP0         [expr 0x1 <<  8 ]
+set AT91C_SSC_CP1         [expr 0x1 <<  9 ]
+set AT91C_SSC_TXSYN       [expr 0x1 << 10 ]
+set AT91C_SSC_RXSYN       [expr 0x1 << 11 ]
+set AT91C_SSC_TXENA       [expr 0x1 << 16 ]
+set AT91C_SSC_RXENA       [expr 0x1 << 17 ]
+# -------- SSC_IER : (SSC Offset: 0x44) SSC Interrupt Enable Register -------- 
+set AT91C_SSC_TXRDY       [expr 0x1 <<  0 ]
+set AT91C_SSC_TXEMPTY     [expr 0x1 <<  1 ]
+set AT91C_SSC_ENDTX       [expr 0x1 <<  2 ]
+set AT91C_SSC_TXBUFE      [expr 0x1 <<  3 ]
+set AT91C_SSC_RXRDY       [expr 0x1 <<  4 ]
+set AT91C_SSC_OVRUN       [expr 0x1 <<  5 ]
+set AT91C_SSC_ENDRX       [expr 0x1 <<  6 ]
+set AT91C_SSC_RXBUFF      [expr 0x1 <<  7 ]
+set AT91C_SSC_CP0         [expr 0x1 <<  8 ]
+set AT91C_SSC_CP1         [expr 0x1 <<  9 ]
+set AT91C_SSC_TXSYN       [expr 0x1 << 10 ]
+set AT91C_SSC_RXSYN       [expr 0x1 << 11 ]
+# -------- SSC_IDR : (SSC Offset: 0x48) SSC Interrupt Disable Register -------- 
+set AT91C_SSC_TXRDY       [expr 0x1 <<  0 ]
+set AT91C_SSC_TXEMPTY     [expr 0x1 <<  1 ]
+set AT91C_SSC_ENDTX       [expr 0x1 <<  2 ]
+set AT91C_SSC_TXBUFE      [expr 0x1 <<  3 ]
+set AT91C_SSC_RXRDY       [expr 0x1 <<  4 ]
+set AT91C_SSC_OVRUN       [expr 0x1 <<  5 ]
+set AT91C_SSC_ENDRX       [expr 0x1 <<  6 ]
+set AT91C_SSC_RXBUFF      [expr 0x1 <<  7 ]
+set AT91C_SSC_CP0         [expr 0x1 <<  8 ]
+set AT91C_SSC_CP1         [expr 0x1 <<  9 ]
+set AT91C_SSC_TXSYN       [expr 0x1 << 10 ]
+set AT91C_SSC_RXSYN       [expr 0x1 << 11 ]
+# -------- SSC_IMR : (SSC Offset: 0x4c) SSC Interrupt Mask Register -------- 
+set AT91C_SSC_TXRDY       [expr 0x1 <<  0 ]
+set AT91C_SSC_TXEMPTY     [expr 0x1 <<  1 ]
+set AT91C_SSC_ENDTX       [expr 0x1 <<  2 ]
+set AT91C_SSC_TXBUFE      [expr 0x1 <<  3 ]
+set AT91C_SSC_RXRDY       [expr 0x1 <<  4 ]
+set AT91C_SSC_OVRUN       [expr 0x1 <<  5 ]
+set AT91C_SSC_ENDRX       [expr 0x1 <<  6 ]
+set AT91C_SSC_RXBUFF      [expr 0x1 <<  7 ]
+set AT91C_SSC_CP0         [expr 0x1 <<  8 ]
+set AT91C_SSC_CP1         [expr 0x1 <<  9 ]
+set AT91C_SSC_TXSYN       [expr 0x1 << 10 ]
+set AT91C_SSC_RXSYN       [expr 0x1 << 11 ]
+
+# *****************************************************************************
+#              SOFTWARE API DEFINITION  FOR Two-wire Interface
+# *****************************************************************************
+# -------- TWI_CR : (TWI Offset: 0x0) TWI Control Register -------- 
+set AT91C_TWI_START       [expr 0x1 <<  0 ]
+set AT91C_TWI_STOP        [expr 0x1 <<  1 ]
+set AT91C_TWI_MSEN        [expr 0x1 <<  2 ]
+set AT91C_TWI_MSDIS       [expr 0x1 <<  3 ]
+set AT91C_TWI_SWRST       [expr 0x1 <<  7 ]
+# -------- TWI_MMR : (TWI Offset: 0x4) TWI Master Mode Register -------- 
+set AT91C_TWI_IADRSZ      [expr 0x3 <<  8 ]
+set 	AT91C_TWI_IADRSZ_NO                   [expr 0x0 <<  8 ]
+set 	AT91C_TWI_IADRSZ_1_BYTE               [expr 0x1 <<  8 ]
+set 	AT91C_TWI_IADRSZ_2_BYTE               [expr 0x2 <<  8 ]
+set 	AT91C_TWI_IADRSZ_3_BYTE               [expr 0x3 <<  8 ]
+set AT91C_TWI_MREAD       [expr 0x1 << 12 ]
+set AT91C_TWI_DADR        [expr 0x7F << 16 ]
+# -------- TWI_CWGR : (TWI Offset: 0x10) TWI Clock Waveform Generator Register -------- 
+set AT91C_TWI_CLDIV       [expr 0xFF <<  0 ]
+set AT91C_TWI_CHDIV       [expr 0xFF <<  8 ]
+set AT91C_TWI_CKDIV       [expr 0x7 << 16 ]
+# -------- TWI_SR : (TWI Offset: 0x20) TWI Status Register -------- 
+set AT91C_TWI_TXCOMP      [expr 0x1 <<  0 ]
+set AT91C_TWI_RXRDY       [expr 0x1 <<  1 ]
+set AT91C_TWI_TXRDY       [expr 0x1 <<  2 ]
+set AT91C_TWI_OVRE        [expr 0x1 <<  6 ]
+set AT91C_TWI_UNRE        [expr 0x1 <<  7 ]
+set AT91C_TWI_NACK        [expr 0x1 <<  8 ]
+# -------- TWI_IER : (TWI Offset: 0x24) TWI Interrupt Enable Register -------- 
+set AT91C_TWI_TXCOMP      [expr 0x1 <<  0 ]
+set AT91C_TWI_RXRDY       [expr 0x1 <<  1 ]
+set AT91C_TWI_TXRDY       [expr 0x1 <<  2 ]
+set AT91C_TWI_OVRE        [expr 0x1 <<  6 ]
+set AT91C_TWI_UNRE        [expr 0x1 <<  7 ]
+set AT91C_TWI_NACK        [expr 0x1 <<  8 ]
+# -------- TWI_IDR : (TWI Offset: 0x28) TWI Interrupt Disable Register -------- 
+set AT91C_TWI_TXCOMP      [expr 0x1 <<  0 ]
+set AT91C_TWI_RXRDY       [expr 0x1 <<  1 ]
+set AT91C_TWI_TXRDY       [expr 0x1 <<  2 ]
+set AT91C_TWI_OVRE        [expr 0x1 <<  6 ]
+set AT91C_TWI_UNRE        [expr 0x1 <<  7 ]
+set AT91C_TWI_NACK        [expr 0x1 <<  8 ]
+# -------- TWI_IMR : (TWI Offset: 0x2c) TWI Interrupt Mask Register -------- 
+set AT91C_TWI_TXCOMP      [expr 0x1 <<  0 ]
+set AT91C_TWI_RXRDY       [expr 0x1 <<  1 ]
+set AT91C_TWI_TXRDY       [expr 0x1 <<  2 ]
+set AT91C_TWI_OVRE        [expr 0x1 <<  6 ]
+set AT91C_TWI_UNRE        [expr 0x1 <<  7 ]
+set AT91C_TWI_NACK        [expr 0x1 <<  8 ]
+
+# *****************************************************************************
+#              SOFTWARE API DEFINITION  FOR PWMC Channel Interface
+# *****************************************************************************
+# -------- PWMC_CMR : (PWMC_CH Offset: 0x0) PWMC Channel Mode Register -------- 
+set AT91C_PWMC_CPRE       [expr 0xF <<  0 ]
+set 	AT91C_PWMC_CPRE_MCK                  0x0
+set 	AT91C_PWMC_CPRE_MCK/2                0x1
+set 	AT91C_PWMC_CPRE_MCK/4                0x2
+set 	AT91C_PWMC_CPRE_MCK/8                0x3
+set 	AT91C_PWMC_CPRE_MCK/16               0x4
+set 	AT91C_PWMC_CPRE_MCK/32               0x5
+set 	AT91C_PWMC_CPRE_MCK/64               0x6
+set 	AT91C_PWMC_CPRE_MCK/128              0x7
+set 	AT91C_PWMC_CPRE_MCK/256              0x8
+set 	AT91C_PWMC_CPRE_MCK/512              0x9
+set 	AT91C_PWMC_CPRE_MCK/1024             0xA
+set 	AT91C_PWMC_CPRE_MCKA                 0xB
+set 	AT91C_PWMC_CPRE_MCKB                 0xC
+set AT91C_PWMC_CALG       [expr 0x1 <<  8 ]
+set AT91C_PWMC_CPOL       [expr 0x1 <<  9 ]
+set AT91C_PWMC_CPD        [expr 0x1 << 10 ]
+# -------- PWMC_CDTYR : (PWMC_CH Offset: 0x4) PWMC Channel Duty Cycle Register -------- 
+set AT91C_PWMC_CDTY       [expr 0x0 <<  0 ]
+# -------- PWMC_CPRDR : (PWMC_CH Offset: 0x8) PWMC Channel Period Register -------- 
+set AT91C_PWMC_CPRD       [expr 0x0 <<  0 ]
+# -------- PWMC_CCNTR : (PWMC_CH Offset: 0xc) PWMC Channel Counter Register -------- 
+set AT91C_PWMC_CCNT       [expr 0x0 <<  0 ]
+# -------- PWMC_CUPDR : (PWMC_CH Offset: 0x10) PWMC Channel Update Register -------- 
+set AT91C_PWMC_CUPD       [expr 0x0 <<  0 ]
+
+# *****************************************************************************
+#              SOFTWARE API DEFINITION  FOR Pulse Width Modulation Controller Interface
+# *****************************************************************************
+# -------- PWMC_MR : (PWMC Offset: 0x0) PWMC Mode Register -------- 
+set AT91C_PWMC_DIVA       [expr 0xFF <<  0 ]
+set AT91C_PWMC_PREA       [expr 0xF <<  8 ]
+set 	AT91C_PWMC_PREA_MCK                  [expr 0x0 <<  8 ]
+set 	AT91C_PWMC_PREA_MCK/2                [expr 0x1 <<  8 ]
+set 	AT91C_PWMC_PREA_MCK/4                [expr 0x2 <<  8 ]
+set 	AT91C_PWMC_PREA_MCK/8                [expr 0x3 <<  8 ]
+set 	AT91C_PWMC_PREA_MCK/16               [expr 0x4 <<  8 ]
+set 	AT91C_PWMC_PREA_MCK/32               [expr 0x5 <<  8 ]
+set 	AT91C_PWMC_PREA_MCK/64               [expr 0x6 <<  8 ]
+set 	AT91C_PWMC_PREA_MCK/128              [expr 0x7 <<  8 ]
+set 	AT91C_PWMC_PREA_MCK/256              [expr 0x8 <<  8 ]
+set AT91C_PWMC_DIVB       [expr 0xFF << 16 ]
+set AT91C_PWMC_PREB       [expr 0xF << 24 ]
+set 	AT91C_PWMC_PREB_MCK                  [expr 0x0 << 24 ]
+set 	AT91C_PWMC_PREB_MCK/2                [expr 0x1 << 24 ]
+set 	AT91C_PWMC_PREB_MCK/4                [expr 0x2 << 24 ]
+set 	AT91C_PWMC_PREB_MCK/8                [expr 0x3 << 24 ]
+set 	AT91C_PWMC_PREB_MCK/16               [expr 0x4 << 24 ]
+set 	AT91C_PWMC_PREB_MCK/32               [expr 0x5 << 24 ]
+set 	AT91C_PWMC_PREB_MCK/64               [expr 0x6 << 24 ]
+set 	AT91C_PWMC_PREB_MCK/128              [expr 0x7 << 24 ]
+set 	AT91C_PWMC_PREB_MCK/256              [expr 0x8 << 24 ]
+# -------- PWMC_ENA : (PWMC Offset: 0x4) PWMC Enable Register -------- 
+set AT91C_PWMC_CHID0      [expr 0x1 <<  0 ]
+set AT91C_PWMC_CHID1      [expr 0x1 <<  1 ]
+set AT91C_PWMC_CHID2      [expr 0x1 <<  2 ]
+set AT91C_PWMC_CHID3      [expr 0x1 <<  3 ]
+# -------- PWMC_DIS : (PWMC Offset: 0x8) PWMC Disable Register -------- 
+set AT91C_PWMC_CHID0      [expr 0x1 <<  0 ]
+set AT91C_PWMC_CHID1      [expr 0x1 <<  1 ]
+set AT91C_PWMC_CHID2      [expr 0x1 <<  2 ]
+set AT91C_PWMC_CHID3      [expr 0x1 <<  3 ]
+# -------- PWMC_SR : (PWMC Offset: 0xc) PWMC Status Register -------- 
+set AT91C_PWMC_CHID0      [expr 0x1 <<  0 ]
+set AT91C_PWMC_CHID1      [expr 0x1 <<  1 ]
+set AT91C_PWMC_CHID2      [expr 0x1 <<  2 ]
+set AT91C_PWMC_CHID3      [expr 0x1 <<  3 ]
+# -------- PWMC_IER : (PWMC Offset: 0x10) PWMC Interrupt Enable Register -------- 
+set AT91C_PWMC_CHID0      [expr 0x1 <<  0 ]
+set AT91C_PWMC_CHID1      [expr 0x1 <<  1 ]
+set AT91C_PWMC_CHID2      [expr 0x1 <<  2 ]
+set AT91C_PWMC_CHID3      [expr 0x1 <<  3 ]
+# -------- PWMC_IDR : (PWMC Offset: 0x14) PWMC Interrupt Disable Register -------- 
+set AT91C_PWMC_CHID0      [expr 0x1 <<  0 ]
+set AT91C_PWMC_CHID1      [expr 0x1 <<  1 ]
+set AT91C_PWMC_CHID2      [expr 0x1 <<  2 ]
+set AT91C_PWMC_CHID3      [expr 0x1 <<  3 ]
+# -------- PWMC_IMR : (PWMC Offset: 0x18) PWMC Interrupt Mask Register -------- 
+set AT91C_PWMC_CHID0      [expr 0x1 <<  0 ]
+set AT91C_PWMC_CHID1      [expr 0x1 <<  1 ]
+set AT91C_PWMC_CHID2      [expr 0x1 <<  2 ]
+set AT91C_PWMC_CHID3      [expr 0x1 <<  3 ]
+# -------- PWMC_ISR : (PWMC Offset: 0x1c) PWMC Interrupt Status Register -------- 
+set AT91C_PWMC_CHID0      [expr 0x1 <<  0 ]
+set AT91C_PWMC_CHID1      [expr 0x1 <<  1 ]
+set AT91C_PWMC_CHID2      [expr 0x1 <<  2 ]
+set AT91C_PWMC_CHID3      [expr 0x1 <<  3 ]
+
+# *****************************************************************************
+#              SOFTWARE API DEFINITION  FOR USB Device Interface
+# *****************************************************************************
+# -------- UDP_FRM_NUM : (UDP Offset: 0x0) USB Frame Number Register -------- 
+set AT91C_UDP_FRM_NUM     [expr 0x7FF <<  0 ]
+set AT91C_UDP_FRM_ERR     [expr 0x1 << 16 ]
+set AT91C_UDP_FRM_OK      [expr 0x1 << 17 ]
+# -------- UDP_GLB_STATE : (UDP Offset: 0x4) USB Global State Register -------- 
+set AT91C_UDP_FADDEN      [expr 0x1 <<  0 ]
+set AT91C_UDP_CONFG       [expr 0x1 <<  1 ]
+set AT91C_UDP_ESR         [expr 0x1 <<  2 ]
+set AT91C_UDP_RSMINPR     [expr 0x1 <<  3 ]
+set AT91C_UDP_RMWUPE      [expr 0x1 <<  4 ]
+# -------- UDP_FADDR : (UDP Offset: 0x8) USB Function Address Register -------- 
+set AT91C_UDP_FADD        [expr 0xFF <<  0 ]
+set AT91C_UDP_FEN         [expr 0x1 <<  8 ]
+# -------- UDP_IER : (UDP Offset: 0x10) USB Interrupt Enable Register -------- 
+set AT91C_UDP_EPINT0      [expr 0x1 <<  0 ]
+set AT91C_UDP_EPINT1      [expr 0x1 <<  1 ]
+set AT91C_UDP_EPINT2      [expr 0x1 <<  2 ]
+set AT91C_UDP_EPINT3      [expr 0x1 <<  3 ]
+set AT91C_UDP_EPINT4      [expr 0x1 <<  4 ]
+set AT91C_UDP_EPINT5      [expr 0x1 <<  5 ]
+set AT91C_UDP_RXSUSP      [expr 0x1 <<  8 ]
+set AT91C_UDP_RXRSM       [expr 0x1 <<  9 ]
+set AT91C_UDP_EXTRSM      [expr 0x1 << 10 ]
+set AT91C_UDP_SOFINT      [expr 0x1 << 11 ]
+set AT91C_UDP_WAKEUP      [expr 0x1 << 13 ]
+# -------- UDP_IDR : (UDP Offset: 0x14) USB Interrupt Disable Register -------- 
+set AT91C_UDP_EPINT0      [expr 0x1 <<  0 ]
+set AT91C_UDP_EPINT1      [expr 0x1 <<  1 ]
+set AT91C_UDP_EPINT2      [expr 0x1 <<  2 ]
+set AT91C_UDP_EPINT3      [expr 0x1 <<  3 ]
+set AT91C_UDP_EPINT4      [expr 0x1 <<  4 ]
+set AT91C_UDP_EPINT5      [expr 0x1 <<  5 ]
+set AT91C_UDP_RXSUSP      [expr 0x1 <<  8 ]
+set AT91C_UDP_RXRSM       [expr 0x1 <<  9 ]
+set AT91C_UDP_EXTRSM      [expr 0x1 << 10 ]
+set AT91C_UDP_SOFINT      [expr 0x1 << 11 ]
+set AT91C_UDP_WAKEUP      [expr 0x1 << 13 ]
+# -------- UDP_IMR : (UDP Offset: 0x18) USB Interrupt Mask Register -------- 
+set AT91C_UDP_EPINT0      [expr 0x1 <<  0 ]
+set AT91C_UDP_EPINT1      [expr 0x1 <<  1 ]
+set AT91C_UDP_EPINT2      [expr 0x1 <<  2 ]
+set AT91C_UDP_EPINT3      [expr 0x1 <<  3 ]
+set AT91C_UDP_EPINT4      [expr 0x1 <<  4 ]
+set AT91C_UDP_EPINT5      [expr 0x1 <<  5 ]
+set AT91C_UDP_RXSUSP      [expr 0x1 <<  8 ]
+set AT91C_UDP_RXRSM       [expr 0x1 <<  9 ]
+set AT91C_UDP_EXTRSM      [expr 0x1 << 10 ]
+set AT91C_UDP_SOFINT      [expr 0x1 << 11 ]
+set AT91C_UDP_WAKEUP      [expr 0x1 << 13 ]
+# -------- UDP_ISR : (UDP Offset: 0x1c) USB Interrupt Status Register -------- 
+set AT91C_UDP_EPINT0      [expr 0x1 <<  0 ]
+set AT91C_UDP_EPINT1      [expr 0x1 <<  1 ]
+set AT91C_UDP_EPINT2      [expr 0x1 <<  2 ]
+set AT91C_UDP_EPINT3      [expr 0x1 <<  3 ]
+set AT91C_UDP_EPINT4      [expr 0x1 <<  4 ]
+set AT91C_UDP_EPINT5      [expr 0x1 <<  5 ]
+set AT91C_UDP_RXSUSP      [expr 0x1 <<  8 ]
+set AT91C_UDP_RXRSM       [expr 0x1 <<  9 ]
+set AT91C_UDP_EXTRSM      [expr 0x1 << 10 ]
+set AT91C_UDP_SOFINT      [expr 0x1 << 11 ]
+set AT91C_UDP_ENDBUSRES   [expr 0x1 << 12 ]
+set AT91C_UDP_WAKEUP      [expr 0x1 << 13 ]
+# -------- UDP_ICR : (UDP Offset: 0x20) USB Interrupt Clear Register -------- 
+set AT91C_UDP_EPINT0      [expr 0x1 <<  0 ]
+set AT91C_UDP_EPINT1      [expr 0x1 <<  1 ]
+set AT91C_UDP_EPINT2      [expr 0x1 <<  2 ]
+set AT91C_UDP_EPINT3      [expr 0x1 <<  3 ]
+set AT91C_UDP_EPINT4      [expr 0x1 <<  4 ]
+set AT91C_UDP_EPINT5      [expr 0x1 <<  5 ]
+set AT91C_UDP_RXSUSP      [expr 0x1 <<  8 ]
+set AT91C_UDP_RXRSM       [expr 0x1 <<  9 ]
+set AT91C_UDP_EXTRSM      [expr 0x1 << 10 ]
+set AT91C_UDP_SOFINT      [expr 0x1 << 11 ]
+set AT91C_UDP_WAKEUP      [expr 0x1 << 13 ]
+# -------- UDP_RST_EP : (UDP Offset: 0x28) USB Reset Endpoint Register -------- 
+set AT91C_UDP_EP0         [expr 0x1 <<  0 ]
+set AT91C_UDP_EP1         [expr 0x1 <<  1 ]
+set AT91C_UDP_EP2         [expr 0x1 <<  2 ]
+set AT91C_UDP_EP3         [expr 0x1 <<  3 ]
+set AT91C_UDP_EP4         [expr 0x1 <<  4 ]
+set AT91C_UDP_EP5         [expr 0x1 <<  5 ]
+# -------- UDP_CSR : (UDP Offset: 0x30) USB Endpoint Control and Status Register -------- 
+set AT91C_UDP_TXCOMP      [expr 0x1 <<  0 ]
+set AT91C_UDP_RX_DATA_BK0 [expr 0x1 <<  1 ]
+set AT91C_UDP_RXSETUP     [expr 0x1 <<  2 ]
+set AT91C_UDP_ISOERROR    [expr 0x1 <<  3 ]
+set AT91C_UDP_TXPKTRDY    [expr 0x1 <<  4 ]
+set AT91C_UDP_FORCESTALL  [expr 0x1 <<  5 ]
+set AT91C_UDP_RX_DATA_BK1 [expr 0x1 <<  6 ]
+set AT91C_UDP_DIR         [expr 0x1 <<  7 ]
+set AT91C_UDP_EPTYPE      [expr 0x7 <<  8 ]
+set 	AT91C_UDP_EPTYPE_CTRL                 [expr 0x0 <<  8 ]
+set 	AT91C_UDP_EPTYPE_ISO_OUT              [expr 0x1 <<  8 ]
+set 	AT91C_UDP_EPTYPE_BULK_OUT             [expr 0x2 <<  8 ]
+set 	AT91C_UDP_EPTYPE_INT_OUT              [expr 0x3 <<  8 ]
+set 	AT91C_UDP_EPTYPE_ISO_IN               [expr 0x5 <<  8 ]
+set 	AT91C_UDP_EPTYPE_BULK_IN              [expr 0x6 <<  8 ]
+set 	AT91C_UDP_EPTYPE_INT_IN               [expr 0x7 <<  8 ]
+set AT91C_UDP_DTGLE       [expr 0x1 << 11 ]
+set AT91C_UDP_EPEDS       [expr 0x1 << 15 ]
+set AT91C_UDP_RXBYTECNT   [expr 0x7FF << 16 ]
+# -------- UDP_TXVC : (UDP Offset: 0x74) Transceiver Control Register -------- 
+set AT91C_UDP_TXVDIS      [expr 0x1 <<  8 ]
+set AT91C_UDP_PUON        [expr 0x1 <<  9 ]
+
+# *****************************************************************************
+#              SOFTWARE API DEFINITION  FOR Timer Counter Channel Interface
+# *****************************************************************************
+# -------- TC_CCR : (TC Offset: 0x0) TC Channel Control Register -------- 
+set AT91C_TC_CLKEN        [expr 0x1 <<  0 ]
+set AT91C_TC_CLKDIS       [expr 0x1 <<  1 ]
+set AT91C_TC_SWTRG        [expr 0x1 <<  2 ]
+# -------- TC_CMR : (TC Offset: 0x4) TC Channel Mode Register: Capture Mode / Waveform Mode -------- 
+set AT91C_TC_CLKS         [expr 0x7 <<  0 ]
+set 	AT91C_TC_CLKS_TIMER_DIV1_CLOCK     0x0
+set 	AT91C_TC_CLKS_TIMER_DIV2_CLOCK     0x1
+set 	AT91C_TC_CLKS_TIMER_DIV3_CLOCK     0x2
+set 	AT91C_TC_CLKS_TIMER_DIV4_CLOCK     0x3
+set 	AT91C_TC_CLKS_TIMER_DIV5_CLOCK     0x4
+set 	AT91C_TC_CLKS_XC0                  0x5
+set 	AT91C_TC_CLKS_XC1                  0x6
+set 	AT91C_TC_CLKS_XC2                  0x7
+set AT91C_TC_CLKS         [expr 0x7 <<  0 ]
+set 	AT91C_TC_CLKS_TIMER_DIV1_CLOCK     0x0
+set 	AT91C_TC_CLKS_TIMER_DIV2_CLOCK     0x1
+set 	AT91C_TC_CLKS_TIMER_DIV3_CLOCK     0x2
+set 	AT91C_TC_CLKS_TIMER_DIV4_CLOCK     0x3
+set 	AT91C_TC_CLKS_TIMER_DIV5_CLOCK     0x4
+set 	AT91C_TC_CLKS_XC0                  0x5
+set 	AT91C_TC_CLKS_XC1                  0x6
+set 	AT91C_TC_CLKS_XC2                  0x7
+set AT91C_TC_CLKI         [expr 0x1 <<  3 ]
+set AT91C_TC_CLKI         [expr 0x1 <<  3 ]
+set AT91C_TC_BURST        [expr 0x3 <<  4 ]
+set 	AT91C_TC_BURST_NONE                 [expr 0x0 <<  4 ]
+set 	AT91C_TC_BURST_XC0                  [expr 0x1 <<  4 ]
+set 	AT91C_TC_BURST_XC1                  [expr 0x2 <<  4 ]
+set 	AT91C_TC_BURST_XC2                  [expr 0x3 <<  4 ]
+set AT91C_TC_BURST        [expr 0x3 <<  4 ]
+set 	AT91C_TC_BURST_NONE                 [expr 0x0 <<  4 ]
+set 	AT91C_TC_BURST_XC0                  [expr 0x1 <<  4 ]
+set 	AT91C_TC_BURST_XC1                  [expr 0x2 <<  4 ]
+set 	AT91C_TC_BURST_XC2                  [expr 0x3 <<  4 ]
+set AT91C_TC_CPCSTOP      [expr 0x1 <<  6 ]
+set AT91C_TC_LDBSTOP      [expr 0x1 <<  6 ]
+set AT91C_TC_CPCDIS       [expr 0x1 <<  7 ]
+set AT91C_TC_LDBDIS       [expr 0x1 <<  7 ]
+set AT91C_TC_ETRGEDG      [expr 0x3 <<  8 ]
+set 	AT91C_TC_ETRGEDG_NONE                 [expr 0x0 <<  8 ]
+set 	AT91C_TC_ETRGEDG_RISING               [expr 0x1 <<  8 ]
+set 	AT91C_TC_ETRGEDG_FALLING              [expr 0x2 <<  8 ]
+set 	AT91C_TC_ETRGEDG_BOTH                 [expr 0x3 <<  8 ]
+set AT91C_TC_EEVTEDG      [expr 0x3 <<  8 ]
+set 	AT91C_TC_EEVTEDG_NONE                 [expr 0x0 <<  8 ]
+set 	AT91C_TC_EEVTEDG_RISING               [expr 0x1 <<  8 ]
+set 	AT91C_TC_EEVTEDG_FALLING              [expr 0x2 <<  8 ]
+set 	AT91C_TC_EEVTEDG_BOTH                 [expr 0x3 <<  8 ]
+set AT91C_TC_EEVT         [expr 0x3 << 10 ]
+set 	AT91C_TC_EEVT_TIOB                 [expr 0x0 << 10 ]
+set 	AT91C_TC_EEVT_XC0                  [expr 0x1 << 10 ]
+set 	AT91C_TC_EEVT_XC1                  [expr 0x2 << 10 ]
+set 	AT91C_TC_EEVT_XC2                  [expr 0x3 << 10 ]
+set AT91C_TC_ABETRG       [expr 0x1 << 10 ]
+set AT91C_TC_ENETRG       [expr 0x1 << 12 ]
+set AT91C_TC_WAVESEL      [expr 0x3 << 13 ]
+set 	AT91C_TC_WAVESEL_UP                   [expr 0x0 << 13 ]
+set 	AT91C_TC_WAVESEL_UPDOWN               [expr 0x1 << 13 ]
+set 	AT91C_TC_WAVESEL_UP_AUTO              [expr 0x2 << 13 ]
+set 	AT91C_TC_WAVESEL_UPDOWN_AUTO          [expr 0x3 << 13 ]
+set AT91C_TC_CPCTRG       [expr 0x1 << 14 ]
+set AT91C_TC_WAVE         [expr 0x1 << 15 ]
+set AT91C_TC_WAVE         [expr 0x1 << 15 ]
+set AT91C_TC_ACPA         [expr 0x3 << 16 ]
+set 	AT91C_TC_ACPA_NONE                 [expr 0x0 << 16 ]
+set 	AT91C_TC_ACPA_SET                  [expr 0x1 << 16 ]
+set 	AT91C_TC_ACPA_CLEAR                [expr 0x2 << 16 ]
+set 	AT91C_TC_ACPA_TOGGLE               [expr 0x3 << 16 ]
+set AT91C_TC_LDRA         [expr 0x3 << 16 ]
+set 	AT91C_TC_LDRA_NONE                 [expr 0x0 << 16 ]
+set 	AT91C_TC_LDRA_RISING               [expr 0x1 << 16 ]
+set 	AT91C_TC_LDRA_FALLING              [expr 0x2 << 16 ]
+set 	AT91C_TC_LDRA_BOTH                 [expr 0x3 << 16 ]
+set AT91C_TC_ACPC         [expr 0x3 << 18 ]
+set 	AT91C_TC_ACPC_NONE                 [expr 0x0 << 18 ]
+set 	AT91C_TC_ACPC_SET                  [expr 0x1 << 18 ]
+set 	AT91C_TC_ACPC_CLEAR                [expr 0x2 << 18 ]
+set 	AT91C_TC_ACPC_TOGGLE               [expr 0x3 << 18 ]
+set AT91C_TC_LDRB         [expr 0x3 << 18 ]
+set 	AT91C_TC_LDRB_NONE                 [expr 0x0 << 18 ]
+set 	AT91C_TC_LDRB_RISING               [expr 0x1 << 18 ]
+set 	AT91C_TC_LDRB_FALLING              [expr 0x2 << 18 ]
+set 	AT91C_TC_LDRB_BOTH                 [expr 0x3 << 18 ]
+set AT91C_TC_AEEVT        [expr 0x3 << 20 ]
+set 	AT91C_TC_AEEVT_NONE                 [expr 0x0 << 20 ]
+set 	AT91C_TC_AEEVT_SET                  [expr 0x1 << 20 ]
+set 	AT91C_TC_AEEVT_CLEAR                [expr 0x2 << 20 ]
+set 	AT91C_TC_AEEVT_TOGGLE               [expr 0x3 << 20 ]
+set AT91C_TC_ASWTRG       [expr 0x3 << 22 ]
+set 	AT91C_TC_ASWTRG_NONE                 [expr 0x0 << 22 ]
+set 	AT91C_TC_ASWTRG_SET                  [expr 0x1 << 22 ]
+set 	AT91C_TC_ASWTRG_CLEAR                [expr 0x2 << 22 ]
+set 	AT91C_TC_ASWTRG_TOGGLE               [expr 0x3 << 22 ]
+set AT91C_TC_BCPB         [expr 0x3 << 24 ]
+set 	AT91C_TC_BCPB_NONE                 [expr 0x0 << 24 ]
+set 	AT91C_TC_BCPB_SET                  [expr 0x1 << 24 ]
+set 	AT91C_TC_BCPB_CLEAR                [expr 0x2 << 24 ]
+set 	AT91C_TC_BCPB_TOGGLE               [expr 0x3 << 24 ]
+set AT91C_TC_BCPC         [expr 0x3 << 26 ]
+set 	AT91C_TC_BCPC_NONE                 [expr 0x0 << 26 ]
+set 	AT91C_TC_BCPC_SET                  [expr 0x1 << 26 ]
+set 	AT91C_TC_BCPC_CLEAR                [expr 0x2 << 26 ]
+set 	AT91C_TC_BCPC_TOGGLE               [expr 0x3 << 26 ]
+set AT91C_TC_BEEVT        [expr 0x3 << 28 ]
+set 	AT91C_TC_BEEVT_NONE                 [expr 0x0 << 28 ]
+set 	AT91C_TC_BEEVT_SET                  [expr 0x1 << 28 ]
+set 	AT91C_TC_BEEVT_CLEAR                [expr 0x2 << 28 ]
+set 	AT91C_TC_BEEVT_TOGGLE               [expr 0x3 << 28 ]
+set AT91C_TC_BSWTRG       [expr 0x3 << 30 ]
+set 	AT91C_TC_BSWTRG_NONE                 [expr 0x0 << 30 ]
+set 	AT91C_TC_BSWTRG_SET                  [expr 0x1 << 30 ]
+set 	AT91C_TC_BSWTRG_CLEAR                [expr 0x2 << 30 ]
+set 	AT91C_TC_BSWTRG_TOGGLE               [expr 0x3 << 30 ]
+# -------- TC_SR : (TC Offset: 0x20) TC Channel Status Register -------- 
+set AT91C_TC_COVFS        [expr 0x1 <<  0 ]
+set AT91C_TC_LOVRS        [expr 0x1 <<  1 ]
+set AT91C_TC_CPAS         [expr 0x1 <<  2 ]
+set AT91C_TC_CPBS         [expr 0x1 <<  3 ]
+set AT91C_TC_CPCS         [expr 0x1 <<  4 ]
+set AT91C_TC_LDRAS        [expr 0x1 <<  5 ]
+set AT91C_TC_LDRBS        [expr 0x1 <<  6 ]
+set AT91C_TC_ETRGS        [expr 0x1 <<  7 ]
+set AT91C_TC_CLKSTA       [expr 0x1 << 16 ]
+set AT91C_TC_MTIOA        [expr 0x1 << 17 ]
+set AT91C_TC_MTIOB        [expr 0x1 << 18 ]
+# -------- TC_IER : (TC Offset: 0x24) TC Channel Interrupt Enable Register -------- 
+set AT91C_TC_COVFS        [expr 0x1 <<  0 ]
+set AT91C_TC_LOVRS        [expr 0x1 <<  1 ]
+set AT91C_TC_CPAS         [expr 0x1 <<  2 ]
+set AT91C_TC_CPBS         [expr 0x1 <<  3 ]
+set AT91C_TC_CPCS         [expr 0x1 <<  4 ]
+set AT91C_TC_LDRAS        [expr 0x1 <<  5 ]
+set AT91C_TC_LDRBS        [expr 0x1 <<  6 ]
+set AT91C_TC_ETRGS        [expr 0x1 <<  7 ]
+# -------- TC_IDR : (TC Offset: 0x28) TC Channel Interrupt Disable Register -------- 
+set AT91C_TC_COVFS        [expr 0x1 <<  0 ]
+set AT91C_TC_LOVRS        [expr 0x1 <<  1 ]
+set AT91C_TC_CPAS         [expr 0x1 <<  2 ]
+set AT91C_TC_CPBS         [expr 0x1 <<  3 ]
+set AT91C_TC_CPCS         [expr 0x1 <<  4 ]
+set AT91C_TC_LDRAS        [expr 0x1 <<  5 ]
+set AT91C_TC_LDRBS        [expr 0x1 <<  6 ]
+set AT91C_TC_ETRGS        [expr 0x1 <<  7 ]
+# -------- TC_IMR : (TC Offset: 0x2c) TC Channel Interrupt Mask Register -------- 
+set AT91C_TC_COVFS        [expr 0x1 <<  0 ]
+set AT91C_TC_LOVRS        [expr 0x1 <<  1 ]
+set AT91C_TC_CPAS         [expr 0x1 <<  2 ]
+set AT91C_TC_CPBS         [expr 0x1 <<  3 ]
+set AT91C_TC_CPCS         [expr 0x1 <<  4 ]
+set AT91C_TC_LDRAS        [expr 0x1 <<  5 ]
+set AT91C_TC_LDRBS        [expr 0x1 <<  6 ]
+set AT91C_TC_ETRGS        [expr 0x1 <<  7 ]
+
+# *****************************************************************************
+#              SOFTWARE API DEFINITION  FOR Timer Counter Interface
+# *****************************************************************************
+# -------- TCB_BCR : (TCB Offset: 0xc0) TC Block Control Register -------- 
+set AT91C_TCB_SYNC        [expr 0x1 <<  0 ]
+# -------- TCB_BMR : (TCB Offset: 0xc4) TC Block Mode Register -------- 
+set AT91C_TCB_TC0XC0S     [expr 0x3 <<  0 ]
+set 	AT91C_TCB_TC0XC0S_TCLK0                0x0
+set 	AT91C_TCB_TC0XC0S_NONE                 0x1
+set 	AT91C_TCB_TC0XC0S_TIOA1                0x2
+set 	AT91C_TCB_TC0XC0S_TIOA2                0x3
+set AT91C_TCB_TC1XC1S     [expr 0x3 <<  2 ]
+set 	AT91C_TCB_TC1XC1S_TCLK1                [expr 0x0 <<  2 ]
+set 	AT91C_TCB_TC1XC1S_NONE                 [expr 0x1 <<  2 ]
+set 	AT91C_TCB_TC1XC1S_TIOA0                [expr 0x2 <<  2 ]
+set 	AT91C_TCB_TC1XC1S_TIOA2                [expr 0x3 <<  2 ]
+set AT91C_TCB_TC2XC2S     [expr 0x3 <<  4 ]
+set 	AT91C_TCB_TC2XC2S_TCLK2                [expr 0x0 <<  4 ]
+set 	AT91C_TCB_TC2XC2S_NONE                 [expr 0x1 <<  4 ]
+set 	AT91C_TCB_TC2XC2S_TIOA0                [expr 0x2 <<  4 ]
+set 	AT91C_TCB_TC2XC2S_TIOA1                [expr 0x3 <<  4 ]
+
+# *****************************************************************************
+#              SOFTWARE API DEFINITION  FOR Control Area Network MailBox Interface
+# *****************************************************************************
+# -------- CAN_MMR : (CAN_MB Offset: 0x0) CAN Message Mode Register -------- 
+set AT91C_CAN_MTIMEMARK   [expr 0xFFFF <<  0 ]
+set AT91C_CAN_PRIOR       [expr 0xF << 16 ]
+set AT91C_CAN_MOT         [expr 0x7 << 24 ]
+set 	AT91C_CAN_MOT_DIS                  [expr 0x0 << 24 ]
+set 	AT91C_CAN_MOT_RX                   [expr 0x1 << 24 ]
+set 	AT91C_CAN_MOT_RXOVERWRITE          [expr 0x2 << 24 ]
+set 	AT91C_CAN_MOT_TX                   [expr 0x3 << 24 ]
+set 	AT91C_CAN_MOT_CONSUMER             [expr 0x4 << 24 ]
+set 	AT91C_CAN_MOT_PRODUCER             [expr 0x5 << 24 ]
+# -------- CAN_MAM : (CAN_MB Offset: 0x4) CAN Message Acceptance Mask Register -------- 
+set AT91C_CAN_MIDvB       [expr 0x3FFFF <<  0 ]
+set AT91C_CAN_MIDvA       [expr 0x7FF << 18 ]
+set AT91C_CAN_MIDE        [expr 0x1 << 29 ]
+# -------- CAN_MID : (CAN_MB Offset: 0x8) CAN Message ID Register -------- 
+set AT91C_CAN_MIDvB       [expr 0x3FFFF <<  0 ]
+set AT91C_CAN_MIDvA       [expr 0x7FF << 18 ]
+set AT91C_CAN_MIDE        [expr 0x1 << 29 ]
+# -------- CAN_MFID : (CAN_MB Offset: 0xc) CAN Message Family ID Register -------- 
+# -------- CAN_MSR : (CAN_MB Offset: 0x10) CAN Message Status Register -------- 
+set AT91C_CAN_MTIMESTAMP  [expr 0xFFFF <<  0 ]
+set AT91C_CAN_MDLC        [expr 0xF << 16 ]
+set AT91C_CAN_MRTR        [expr 0x1 << 20 ]
+set AT91C_CAN_MABT        [expr 0x1 << 22 ]
+set AT91C_CAN_MRDY        [expr 0x1 << 23 ]
+set AT91C_CAN_MMI         [expr 0x1 << 24 ]
+# -------- CAN_MDL : (CAN_MB Offset: 0x14) CAN Message Data Low Register -------- 
+# -------- CAN_MDH : (CAN_MB Offset: 0x18) CAN Message Data High Register -------- 
+# -------- CAN_MCR : (CAN_MB Offset: 0x1c) CAN Message Control Register -------- 
+set AT91C_CAN_MDLC        [expr 0xF << 16 ]
+set AT91C_CAN_MRTR        [expr 0x1 << 20 ]
+set AT91C_CAN_MACR        [expr 0x1 << 22 ]
+set AT91C_CAN_MTCR        [expr 0x1 << 23 ]
+
+# *****************************************************************************
+#              SOFTWARE API DEFINITION  FOR Control Area Network Interface
+# *****************************************************************************
+# -------- CAN_MR : (CAN Offset: 0x0) CAN Mode Register -------- 
+set AT91C_CAN_CANEN       [expr 0x1 <<  0 ]
+set AT91C_CAN_LPM         [expr 0x1 <<  1 ]
+set AT91C_CAN_ABM         [expr 0x1 <<  2 ]
+set AT91C_CAN_OVL         [expr 0x1 <<  3 ]
+set AT91C_CAN_TEOF        [expr 0x1 <<  4 ]
+set AT91C_CAN_TTM         [expr 0x1 <<  5 ]
+set AT91C_CAN_TIMFRZ      [expr 0x1 <<  6 ]
+set AT91C_CAN_DRPT        [expr 0x1 <<  7 ]
+# -------- CAN_IER : (CAN Offset: 0x4) CAN Interrupt Enable Register -------- 
+set AT91C_CAN_MB0         [expr 0x1 <<  0 ]
+set AT91C_CAN_MB1         [expr 0x1 <<  1 ]
+set AT91C_CAN_MB2         [expr 0x1 <<  2 ]
+set AT91C_CAN_MB3         [expr 0x1 <<  3 ]
+set AT91C_CAN_MB4         [expr 0x1 <<  4 ]
+set AT91C_CAN_MB5         [expr 0x1 <<  5 ]
+set AT91C_CAN_MB6         [expr 0x1 <<  6 ]
+set AT91C_CAN_MB7         [expr 0x1 <<  7 ]
+set AT91C_CAN_MB8         [expr 0x1 <<  8 ]
+set AT91C_CAN_MB9         [expr 0x1 <<  9 ]
+set AT91C_CAN_MB10        [expr 0x1 << 10 ]
+set AT91C_CAN_MB11        [expr 0x1 << 11 ]
+set AT91C_CAN_MB12        [expr 0x1 << 12 ]
+set AT91C_CAN_MB13        [expr 0x1 << 13 ]
+set AT91C_CAN_MB14        [expr 0x1 << 14 ]
+set AT91C_CAN_MB15        [expr 0x1 << 15 ]
+set AT91C_CAN_ERRA        [expr 0x1 << 16 ]
+set AT91C_CAN_WARN        [expr 0x1 << 17 ]
+set AT91C_CAN_ERRP        [expr 0x1 << 18 ]
+set AT91C_CAN_BOFF        [expr 0x1 << 19 ]
+set AT91C_CAN_SLEEP       [expr 0x1 << 20 ]
+set AT91C_CAN_WAKEUP      [expr 0x1 << 21 ]
+set AT91C_CAN_TOVF        [expr 0x1 << 22 ]
+set AT91C_CAN_TSTP        [expr 0x1 << 23 ]
+set AT91C_CAN_CERR        [expr 0x1 << 24 ]
+set AT91C_CAN_SERR        [expr 0x1 << 25 ]
+set AT91C_CAN_AERR        [expr 0x1 << 26 ]
+set AT91C_CAN_FERR        [expr 0x1 << 27 ]
+set AT91C_CAN_BERR        [expr 0x1 << 28 ]
+# -------- CAN_IDR : (CAN Offset: 0x8) CAN Interrupt Disable Register -------- 
+set AT91C_CAN_MB0         [expr 0x1 <<  0 ]
+set AT91C_CAN_MB1         [expr 0x1 <<  1 ]
+set AT91C_CAN_MB2         [expr 0x1 <<  2 ]
+set AT91C_CAN_MB3         [expr 0x1 <<  3 ]
+set AT91C_CAN_MB4         [expr 0x1 <<  4 ]
+set AT91C_CAN_MB5         [expr 0x1 <<  5 ]
+set AT91C_CAN_MB6         [expr 0x1 <<  6 ]
+set AT91C_CAN_MB7         [expr 0x1 <<  7 ]
+set AT91C_CAN_MB8         [expr 0x1 <<  8 ]
+set AT91C_CAN_MB9         [expr 0x1 <<  9 ]
+set AT91C_CAN_MB10        [expr 0x1 << 10 ]
+set AT91C_CAN_MB11        [expr 0x1 << 11 ]
+set AT91C_CAN_MB12        [expr 0x1 << 12 ]
+set AT91C_CAN_MB13        [expr 0x1 << 13 ]
+set AT91C_CAN_MB14        [expr 0x1 << 14 ]
+set AT91C_CAN_MB15        [expr 0x1 << 15 ]
+set AT91C_CAN_ERRA        [expr 0x1 << 16 ]
+set AT91C_CAN_WARN        [expr 0x1 << 17 ]
+set AT91C_CAN_ERRP        [expr 0x1 << 18 ]
+set AT91C_CAN_BOFF        [expr 0x1 << 19 ]
+set AT91C_CAN_SLEEP       [expr 0x1 << 20 ]
+set AT91C_CAN_WAKEUP      [expr 0x1 << 21 ]
+set AT91C_CAN_TOVF        [expr 0x1 << 22 ]
+set AT91C_CAN_TSTP        [expr 0x1 << 23 ]
+set AT91C_CAN_CERR        [expr 0x1 << 24 ]
+set AT91C_CAN_SERR        [expr 0x1 << 25 ]
+set AT91C_CAN_AERR        [expr 0x1 << 26 ]
+set AT91C_CAN_FERR        [expr 0x1 << 27 ]
+set AT91C_CAN_BERR        [expr 0x1 << 28 ]
+# -------- CAN_IMR : (CAN Offset: 0xc) CAN Interrupt Mask Register -------- 
+set AT91C_CAN_MB0         [expr 0x1 <<  0 ]
+set AT91C_CAN_MB1         [expr 0x1 <<  1 ]
+set AT91C_CAN_MB2         [expr 0x1 <<  2 ]
+set AT91C_CAN_MB3         [expr 0x1 <<  3 ]
+set AT91C_CAN_MB4         [expr 0x1 <<  4 ]
+set AT91C_CAN_MB5         [expr 0x1 <<  5 ]
+set AT91C_CAN_MB6         [expr 0x1 <<  6 ]
+set AT91C_CAN_MB7         [expr 0x1 <<  7 ]
+set AT91C_CAN_MB8         [expr 0x1 <<  8 ]
+set AT91C_CAN_MB9         [expr 0x1 <<  9 ]
+set AT91C_CAN_MB10        [expr 0x1 << 10 ]
+set AT91C_CAN_MB11        [expr 0x1 << 11 ]
+set AT91C_CAN_MB12        [expr 0x1 << 12 ]
+set AT91C_CAN_MB13        [expr 0x1 << 13 ]
+set AT91C_CAN_MB14        [expr 0x1 << 14 ]
+set AT91C_CAN_MB15        [expr 0x1 << 15 ]
+set AT91C_CAN_ERRA        [expr 0x1 << 16 ]
+set AT91C_CAN_WARN        [expr 0x1 << 17 ]
+set AT91C_CAN_ERRP        [expr 0x1 << 18 ]
+set AT91C_CAN_BOFF        [expr 0x1 << 19 ]
+set AT91C_CAN_SLEEP       [expr 0x1 << 20 ]
+set AT91C_CAN_WAKEUP      [expr 0x1 << 21 ]
+set AT91C_CAN_TOVF        [expr 0x1 << 22 ]
+set AT91C_CAN_TSTP        [expr 0x1 << 23 ]
+set AT91C_CAN_CERR        [expr 0x1 << 24 ]
+set AT91C_CAN_SERR        [expr 0x1 << 25 ]
+set AT91C_CAN_AERR        [expr 0x1 << 26 ]
+set AT91C_CAN_FERR        [expr 0x1 << 27 ]
+set AT91C_CAN_BERR        [expr 0x1 << 28 ]
+# -------- CAN_SR : (CAN Offset: 0x10) CAN Status Register -------- 
+set AT91C_CAN_MB0         [expr 0x1 <<  0 ]
+set AT91C_CAN_MB1         [expr 0x1 <<  1 ]
+set AT91C_CAN_MB2         [expr 0x1 <<  2 ]
+set AT91C_CAN_MB3         [expr 0x1 <<  3 ]
+set AT91C_CAN_MB4         [expr 0x1 <<  4 ]
+set AT91C_CAN_MB5         [expr 0x1 <<  5 ]
+set AT91C_CAN_MB6         [expr 0x1 <<  6 ]
+set AT91C_CAN_MB7         [expr 0x1 <<  7 ]
+set AT91C_CAN_MB8         [expr 0x1 <<  8 ]
+set AT91C_CAN_MB9         [expr 0x1 <<  9 ]
+set AT91C_CAN_MB10        [expr 0x1 << 10 ]
+set AT91C_CAN_MB11        [expr 0x1 << 11 ]
+set AT91C_CAN_MB12        [expr 0x1 << 12 ]
+set AT91C_CAN_MB13        [expr 0x1 << 13 ]
+set AT91C_CAN_MB14        [expr 0x1 << 14 ]
+set AT91C_CAN_MB15        [expr 0x1 << 15 ]
+set AT91C_CAN_ERRA        [expr 0x1 << 16 ]
+set AT91C_CAN_WARN        [expr 0x1 << 17 ]
+set AT91C_CAN_ERRP        [expr 0x1 << 18 ]
+set AT91C_CAN_BOFF        [expr 0x1 << 19 ]
+set AT91C_CAN_SLEEP       [expr 0x1 << 20 ]
+set AT91C_CAN_WAKEUP      [expr 0x1 << 21 ]
+set AT91C_CAN_TOVF        [expr 0x1 << 22 ]
+set AT91C_CAN_TSTP        [expr 0x1 << 23 ]
+set AT91C_CAN_CERR        [expr 0x1 << 24 ]
+set AT91C_CAN_SERR        [expr 0x1 << 25 ]
+set AT91C_CAN_AERR        [expr 0x1 << 26 ]
+set AT91C_CAN_FERR        [expr 0x1 << 27 ]
+set AT91C_CAN_BERR        [expr 0x1 << 28 ]
+set AT91C_CAN_RBSY        [expr 0x1 << 29 ]
+set AT91C_CAN_TBSY        [expr 0x1 << 30 ]
+set AT91C_CAN_OVLY        [expr 0x1 << 31 ]
+# -------- CAN_BR : (CAN Offset: 0x14) CAN Baudrate Register -------- 
+set AT91C_CAN_PHASE2      [expr 0x7 <<  0 ]
+set AT91C_CAN_PHASE1      [expr 0x7 <<  4 ]
+set AT91C_CAN_PROPAG      [expr 0x7 <<  8 ]
+set AT91C_CAN_SYNC        [expr 0x3 << 12 ]
+set AT91C_CAN_BRP         [expr 0x7F << 16 ]
+set AT91C_CAN_SMP         [expr 0x1 << 24 ]
+# -------- CAN_TIM : (CAN Offset: 0x18) CAN Timer Register -------- 
+set AT91C_CAN_TIMER       [expr 0xFFFF <<  0 ]
+# -------- CAN_TIMESTP : (CAN Offset: 0x1c) CAN Timestamp Register -------- 
+set AT91C_CAN_MTIMESTAMP  [expr 0xFFFF <<  0 ]
+# -------- CAN_ECR : (CAN Offset: 0x20) CAN Error Counter Register -------- 
+set AT91C_CAN_REC         [expr 0xFF <<  0 ]
+set AT91C_CAN_TEC         [expr 0xFF << 16 ]
+# -------- CAN_TCR : (CAN Offset: 0x24) CAN Transfer Command Register -------- 
+set AT91C_CAN_MB0         [expr 0x1 <<  0 ]
+set AT91C_CAN_MB1         [expr 0x1 <<  1 ]
+set AT91C_CAN_MB2         [expr 0x1 <<  2 ]
+set AT91C_CAN_MB3         [expr 0x1 <<  3 ]
+set AT91C_CAN_MB4         [expr 0x1 <<  4 ]
+set AT91C_CAN_MB5         [expr 0x1 <<  5 ]
+set AT91C_CAN_MB6         [expr 0x1 <<  6 ]
+set AT91C_CAN_MB7         [expr 0x1 <<  7 ]
+set AT91C_CAN_MB8         [expr 0x1 <<  8 ]
+set AT91C_CAN_MB9         [expr 0x1 <<  9 ]
+set AT91C_CAN_MB10        [expr 0x1 << 10 ]
+set AT91C_CAN_MB11        [expr 0x1 << 11 ]
+set AT91C_CAN_MB12        [expr 0x1 << 12 ]
+set AT91C_CAN_MB13        [expr 0x1 << 13 ]
+set AT91C_CAN_MB14        [expr 0x1 << 14 ]
+set AT91C_CAN_MB15        [expr 0x1 << 15 ]
+set AT91C_CAN_TIMRST      [expr 0x1 << 31 ]
+# -------- CAN_ACR : (CAN Offset: 0x28) CAN Abort Command Register -------- 
+set AT91C_CAN_MB0         [expr 0x1 <<  0 ]
+set AT91C_CAN_MB1         [expr 0x1 <<  1 ]
+set AT91C_CAN_MB2         [expr 0x1 <<  2 ]
+set AT91C_CAN_MB3         [expr 0x1 <<  3 ]
+set AT91C_CAN_MB4         [expr 0x1 <<  4 ]
+set AT91C_CAN_MB5         [expr 0x1 <<  5 ]
+set AT91C_CAN_MB6         [expr 0x1 <<  6 ]
+set AT91C_CAN_MB7         [expr 0x1 <<  7 ]
+set AT91C_CAN_MB8         [expr 0x1 <<  8 ]
+set AT91C_CAN_MB9         [expr 0x1 <<  9 ]
+set AT91C_CAN_MB10        [expr 0x1 << 10 ]
+set AT91C_CAN_MB11        [expr 0x1 << 11 ]
+set AT91C_CAN_MB12        [expr 0x1 << 12 ]
+set AT91C_CAN_MB13        [expr 0x1 << 13 ]
+set AT91C_CAN_MB14        [expr 0x1 << 14 ]
+set AT91C_CAN_MB15        [expr 0x1 << 15 ]
+
+# *****************************************************************************
+#              SOFTWARE API DEFINITION  FOR Ethernet MAC 10/100
+# *****************************************************************************
+# -------- EMAC_NCR : (EMAC Offset: 0x0)  -------- 
+set AT91C_EMAC_LB         [expr 0x1 <<  0 ]
+set AT91C_EMAC_LLB        [expr 0x1 <<  1 ]
+set AT91C_EMAC_RE         [expr 0x1 <<  2 ]
+set AT91C_EMAC_TE         [expr 0x1 <<  3 ]
+set AT91C_EMAC_MPE        [expr 0x1 <<  4 ]
+set AT91C_EMAC_CLRSTAT    [expr 0x1 <<  5 ]
+set AT91C_EMAC_INCSTAT    [expr 0x1 <<  6 ]
+set AT91C_EMAC_WESTAT     [expr 0x1 <<  7 ]
+set AT91C_EMAC_BP         [expr 0x1 <<  8 ]
+set AT91C_EMAC_TSTART     [expr 0x1 <<  9 ]
+set AT91C_EMAC_THALT      [expr 0x1 << 10 ]
+set AT91C_EMAC_TPFR       [expr 0x1 << 11 ]
+set AT91C_EMAC_TZQ        [expr 0x1 << 12 ]
+# -------- EMAC_NCFGR : (EMAC Offset: 0x4) Network Configuration Register -------- 
+set AT91C_EMAC_SPD        [expr 0x1 <<  0 ]
+set AT91C_EMAC_FD         [expr 0x1 <<  1 ]
+set AT91C_EMAC_JFRAME     [expr 0x1 <<  3 ]
+set AT91C_EMAC_CAF        [expr 0x1 <<  4 ]
+set AT91C_EMAC_NBC        [expr 0x1 <<  5 ]
+set AT91C_EMAC_MTI        [expr 0x1 <<  6 ]
+set AT91C_EMAC_UNI        [expr 0x1 <<  7 ]
+set AT91C_EMAC_BIG        [expr 0x1 <<  8 ]
+set AT91C_EMAC_EAE        [expr 0x1 <<  9 ]
+set AT91C_EMAC_CLK        [expr 0x3 << 10 ]
+set 	AT91C_EMAC_CLK_HCLK_8               [expr 0x0 << 10 ]
+set 	AT91C_EMAC_CLK_HCLK_16              [expr 0x1 << 10 ]
+set 	AT91C_EMAC_CLK_HCLK_32              [expr 0x2 << 10 ]
+set 	AT91C_EMAC_CLK_HCLK_64              [expr 0x3 << 10 ]
+set AT91C_EMAC_RTY        [expr 0x1 << 12 ]
+set AT91C_EMAC_PAE        [expr 0x1 << 13 ]
+set AT91C_EMAC_RBOF       [expr 0x3 << 14 ]
+set 	AT91C_EMAC_RBOF_OFFSET_0             [expr 0x0 << 14 ]
+set 	AT91C_EMAC_RBOF_OFFSET_1             [expr 0x1 << 14 ]
+set 	AT91C_EMAC_RBOF_OFFSET_2             [expr 0x2 << 14 ]
+set 	AT91C_EMAC_RBOF_OFFSET_3             [expr 0x3 << 14 ]
+set AT91C_EMAC_RLCE       [expr 0x1 << 16 ]
+set AT91C_EMAC_DRFCS      [expr 0x1 << 17 ]
+set AT91C_EMAC_EFRHD      [expr 0x1 << 18 ]
+set AT91C_EMAC_IRXFCS     [expr 0x1 << 19 ]
+# -------- EMAC_NSR : (EMAC Offset: 0x8) Network Status Register -------- 
+set AT91C_EMAC_LINKR      [expr 0x1 <<  0 ]
+set AT91C_EMAC_MDIO       [expr 0x1 <<  1 ]
+set AT91C_EMAC_IDLE       [expr 0x1 <<  2 ]
+# -------- EMAC_TSR : (EMAC Offset: 0x14) Transmit Status Register -------- 
+set AT91C_EMAC_UBR        [expr 0x1 <<  0 ]
+set AT91C_EMAC_COL        [expr 0x1 <<  1 ]
+set AT91C_EMAC_RLES       [expr 0x1 <<  2 ]
+set AT91C_EMAC_TGO        [expr 0x1 <<  3 ]
+set AT91C_EMAC_BEX        [expr 0x1 <<  4 ]
+set AT91C_EMAC_COMP       [expr 0x1 <<  5 ]
+set AT91C_EMAC_UND        [expr 0x1 <<  6 ]
+# -------- EMAC_RSR : (EMAC Offset: 0x20) Receive Status Register -------- 
+set AT91C_EMAC_BNA        [expr 0x1 <<  0 ]
+set AT91C_EMAC_REC        [expr 0x1 <<  1 ]
+set AT91C_EMAC_OVR        [expr 0x1 <<  2 ]
+# -------- EMAC_ISR : (EMAC Offset: 0x24) Interrupt Status Register -------- 
+set AT91C_EMAC_MFD        [expr 0x1 <<  0 ]
+set AT91C_EMAC_RCOMP      [expr 0x1 <<  1 ]
+set AT91C_EMAC_RXUBR      [expr 0x1 <<  2 ]
+set AT91C_EMAC_TXUBR      [expr 0x1 <<  3 ]
+set AT91C_EMAC_TUNDR      [expr 0x1 <<  4 ]
+set AT91C_EMAC_RLEX       [expr 0x1 <<  5 ]
+set AT91C_EMAC_TXERR      [expr 0x1 <<  6 ]
+set AT91C_EMAC_TCOMP      [expr 0x1 <<  7 ]
+set AT91C_EMAC_LINK       [expr 0x1 <<  9 ]
+set AT91C_EMAC_ROVR       [expr 0x1 << 10 ]
+set AT91C_EMAC_HRESP      [expr 0x1 << 11 ]
+set AT91C_EMAC_PFRE       [expr 0x1 << 12 ]
+set AT91C_EMAC_PTZ        [expr 0x1 << 13 ]
+# -------- EMAC_IER : (EMAC Offset: 0x28) Interrupt Enable Register -------- 
+set AT91C_EMAC_MFD        [expr 0x1 <<  0 ]
+set AT91C_EMAC_RCOMP      [expr 0x1 <<  1 ]
+set AT91C_EMAC_RXUBR      [expr 0x1 <<  2 ]
+set AT91C_EMAC_TXUBR      [expr 0x1 <<  3 ]
+set AT91C_EMAC_TUNDR      [expr 0x1 <<  4 ]
+set AT91C_EMAC_RLEX       [expr 0x1 <<  5 ]
+set AT91C_EMAC_TXERR      [expr 0x1 <<  6 ]
+set AT91C_EMAC_TCOMP      [expr 0x1 <<  7 ]
+set AT91C_EMAC_LINK       [expr 0x1 <<  9 ]
+set AT91C_EMAC_ROVR       [expr 0x1 << 10 ]
+set AT91C_EMAC_HRESP      [expr 0x1 << 11 ]
+set AT91C_EMAC_PFRE       [expr 0x1 << 12 ]
+set AT91C_EMAC_PTZ        [expr 0x1 << 13 ]
+# -------- EMAC_IDR : (EMAC Offset: 0x2c) Interrupt Disable Register -------- 
+set AT91C_EMAC_MFD        [expr 0x1 <<  0 ]
+set AT91C_EMAC_RCOMP      [expr 0x1 <<  1 ]
+set AT91C_EMAC_RXUBR      [expr 0x1 <<  2 ]
+set AT91C_EMAC_TXUBR      [expr 0x1 <<  3 ]
+set AT91C_EMAC_TUNDR      [expr 0x1 <<  4 ]
+set AT91C_EMAC_RLEX       [expr 0x1 <<  5 ]
+set AT91C_EMAC_TXERR      [expr 0x1 <<  6 ]
+set AT91C_EMAC_TCOMP      [expr 0x1 <<  7 ]
+set AT91C_EMAC_LINK       [expr 0x1 <<  9 ]
+set AT91C_EMAC_ROVR       [expr 0x1 << 10 ]
+set AT91C_EMAC_HRESP      [expr 0x1 << 11 ]
+set AT91C_EMAC_PFRE       [expr 0x1 << 12 ]
+set AT91C_EMAC_PTZ        [expr 0x1 << 13 ]
+# -------- EMAC_IMR : (EMAC Offset: 0x30) Interrupt Mask Register -------- 
+set AT91C_EMAC_MFD        [expr 0x1 <<  0 ]
+set AT91C_EMAC_RCOMP      [expr 0x1 <<  1 ]
+set AT91C_EMAC_RXUBR      [expr 0x1 <<  2 ]
+set AT91C_EMAC_TXUBR      [expr 0x1 <<  3 ]
+set AT91C_EMAC_TUNDR      [expr 0x1 <<  4 ]
+set AT91C_EMAC_RLEX       [expr 0x1 <<  5 ]
+set AT91C_EMAC_TXERR      [expr 0x1 <<  6 ]
+set AT91C_EMAC_TCOMP      [expr 0x1 <<  7 ]
+set AT91C_EMAC_LINK       [expr 0x1 <<  9 ]
+set AT91C_EMAC_ROVR       [expr 0x1 << 10 ]
+set AT91C_EMAC_HRESP      [expr 0x1 << 11 ]
+set AT91C_EMAC_PFRE       [expr 0x1 << 12 ]
+set AT91C_EMAC_PTZ        [expr 0x1 << 13 ]
+# -------- EMAC_MAN : (EMAC Offset: 0x34) PHY Maintenance Register -------- 
+set AT91C_EMAC_DATA       [expr 0xFFFF <<  0 ]
+set AT91C_EMAC_CODE       [expr 0x3 << 16 ]
+set AT91C_EMAC_REGA       [expr 0x1F << 18 ]
+set AT91C_EMAC_PHYA       [expr 0x1F << 23 ]
+set AT91C_EMAC_RW         [expr 0x3 << 28 ]
+set AT91C_EMAC_SOF        [expr 0x3 << 30 ]
+# -------- EMAC_USRIO : (EMAC Offset: 0xc0) USER Input Output Register -------- 
+set AT91C_EMAC_RMII       [expr 0x1 <<  0 ]
+set AT91C_EMAC_CLKEN      [expr 0x1 <<  1 ]
+# -------- EMAC_WOL : (EMAC Offset: 0xc4) Wake On LAN Register -------- 
+set AT91C_EMAC_IP         [expr 0xFFFF <<  0 ]
+set AT91C_EMAC_MAG        [expr 0x1 << 16 ]
+set AT91C_EMAC_ARP        [expr 0x1 << 17 ]
+set AT91C_EMAC_SA1        [expr 0x1 << 18 ]
+set AT91C_EMAC_MTI        [expr 0x1 << 19 ]
+# -------- EMAC_REV : (EMAC Offset: 0xfc) Revision Register -------- 
+set AT91C_EMAC_REVREF     [expr 0xFFFF <<  0 ]
+set AT91C_EMAC_PARTREF    [expr 0xFFFF << 16 ]
+
+# *****************************************************************************
+#              SOFTWARE API DEFINITION  FOR Analog to Digital Convertor
+# *****************************************************************************
+# -------- ADC_CR : (ADC Offset: 0x0) ADC Control Register -------- 
+set AT91C_ADC_SWRST       [expr 0x1 <<  0 ]
+set AT91C_ADC_START       [expr 0x1 <<  1 ]
+# -------- ADC_MR : (ADC Offset: 0x4) ADC Mode Register -------- 
+set AT91C_ADC_TRGEN       [expr 0x1 <<  0 ]
+set 	AT91C_ADC_TRGEN_DIS                  0x0
+set 	AT91C_ADC_TRGEN_EN                   0x1
+set AT91C_ADC_TRGSEL      [expr 0x7 <<  1 ]
+set 	AT91C_ADC_TRGSEL_TIOA0                [expr 0x0 <<  1 ]
+set 	AT91C_ADC_TRGSEL_TIOA1                [expr 0x1 <<  1 ]
+set 	AT91C_ADC_TRGSEL_TIOA2                [expr 0x2 <<  1 ]
+set 	AT91C_ADC_TRGSEL_TIOA3                [expr 0x3 <<  1 ]
+set 	AT91C_ADC_TRGSEL_TIOA4                [expr 0x4 <<  1 ]
+set 	AT91C_ADC_TRGSEL_TIOA5                [expr 0x5 <<  1 ]
+set 	AT91C_ADC_TRGSEL_EXT                  [expr 0x6 <<  1 ]
+set AT91C_ADC_LOWRES      [expr 0x1 <<  4 ]
+set 	AT91C_ADC_LOWRES_10_BIT               [expr 0x0 <<  4 ]
+set 	AT91C_ADC_LOWRES_8_BIT                [expr 0x1 <<  4 ]
+set AT91C_ADC_SLEEP       [expr 0x1 <<  5 ]
+set 	AT91C_ADC_SLEEP_NORMAL_MODE          [expr 0x0 <<  5 ]
+set 	AT91C_ADC_SLEEP_MODE                 [expr 0x1 <<  5 ]
+set AT91C_ADC_PRESCAL     [expr 0x3F <<  8 ]
+set AT91C_ADC_STARTUP     [expr 0x1F << 16 ]
+set AT91C_ADC_SHTIM       [expr 0xF << 24 ]
+# -------- 	ADC_CHER : (ADC Offset: 0x10) ADC Channel Enable Register -------- 
+set AT91C_ADC_CH0         [expr 0x1 <<  0 ]
+set AT91C_ADC_CH1         [expr 0x1 <<  1 ]
+set AT91C_ADC_CH2         [expr 0x1 <<  2 ]
+set AT91C_ADC_CH3         [expr 0x1 <<  3 ]
+set AT91C_ADC_CH4         [expr 0x1 <<  4 ]
+set AT91C_ADC_CH5         [expr 0x1 <<  5 ]
+set AT91C_ADC_CH6         [expr 0x1 <<  6 ]
+set AT91C_ADC_CH7         [expr 0x1 <<  7 ]
+# -------- 	ADC_CHDR : (ADC Offset: 0x14) ADC Channel Disable Register -------- 
+set AT91C_ADC_CH0         [expr 0x1 <<  0 ]
+set AT91C_ADC_CH1         [expr 0x1 <<  1 ]
+set AT91C_ADC_CH2         [expr 0x1 <<  2 ]
+set AT91C_ADC_CH3         [expr 0x1 <<  3 ]
+set AT91C_ADC_CH4         [expr 0x1 <<  4 ]
+set AT91C_ADC_CH5         [expr 0x1 <<  5 ]
+set AT91C_ADC_CH6         [expr 0x1 <<  6 ]
+set AT91C_ADC_CH7         [expr 0x1 <<  7 ]
+# -------- 	ADC_CHSR : (ADC Offset: 0x18) ADC Channel Status Register -------- 
+set AT91C_ADC_CH0         [expr 0x1 <<  0 ]
+set AT91C_ADC_CH1         [expr 0x1 <<  1 ]
+set AT91C_ADC_CH2         [expr 0x1 <<  2 ]
+set AT91C_ADC_CH3         [expr 0x1 <<  3 ]
+set AT91C_ADC_CH4         [expr 0x1 <<  4 ]
+set AT91C_ADC_CH5         [expr 0x1 <<  5 ]
+set AT91C_ADC_CH6         [expr 0x1 <<  6 ]
+set AT91C_ADC_CH7         [expr 0x1 <<  7 ]
+# -------- ADC_SR : (ADC Offset: 0x1c) ADC Status Register -------- 
+set AT91C_ADC_EOC0        [expr 0x1 <<  0 ]
+set AT91C_ADC_EOC1        [expr 0x1 <<  1 ]
+set AT91C_ADC_EOC2        [expr 0x1 <<  2 ]
+set AT91C_ADC_EOC3        [expr 0x1 <<  3 ]
+set AT91C_ADC_EOC4        [expr 0x1 <<  4 ]
+set AT91C_ADC_EOC5        [expr 0x1 <<  5 ]
+set AT91C_ADC_EOC6        [expr 0x1 <<  6 ]
+set AT91C_ADC_EOC7        [expr 0x1 <<  7 ]
+set AT91C_ADC_OVRE0       [expr 0x1 <<  8 ]
+set AT91C_ADC_OVRE1       [expr 0x1 <<  9 ]
+set AT91C_ADC_OVRE2       [expr 0x1 << 10 ]
+set AT91C_ADC_OVRE3       [expr 0x1 << 11 ]
+set AT91C_ADC_OVRE4       [expr 0x1 << 12 ]
+set AT91C_ADC_OVRE5       [expr 0x1 << 13 ]
+set AT91C_ADC_OVRE6       [expr 0x1 << 14 ]
+set AT91C_ADC_OVRE7       [expr 0x1 << 15 ]
+set AT91C_ADC_DRDY        [expr 0x1 << 16 ]
+set AT91C_ADC_GOVRE       [expr 0x1 << 17 ]
+set AT91C_ADC_ENDRX       [expr 0x1 << 18 ]
+set AT91C_ADC_RXBUFF      [expr 0x1 << 19 ]
+# -------- ADC_LCDR : (ADC Offset: 0x20) ADC Last Converted Data Register -------- 
+set AT91C_ADC_LDATA       [expr 0x3FF <<  0 ]
+# -------- ADC_IER : (ADC Offset: 0x24) ADC Interrupt Enable Register -------- 
+set AT91C_ADC_EOC0        [expr 0x1 <<  0 ]
+set AT91C_ADC_EOC1        [expr 0x1 <<  1 ]
+set AT91C_ADC_EOC2        [expr 0x1 <<  2 ]
+set AT91C_ADC_EOC3        [expr 0x1 <<  3 ]
+set AT91C_ADC_EOC4        [expr 0x1 <<  4 ]
+set AT91C_ADC_EOC5        [expr 0x1 <<  5 ]
+set AT91C_ADC_EOC6        [expr 0x1 <<  6 ]
+set AT91C_ADC_EOC7        [expr 0x1 <<  7 ]
+set AT91C_ADC_OVRE0       [expr 0x1 <<  8 ]
+set AT91C_ADC_OVRE1       [expr 0x1 <<  9 ]
+set AT91C_ADC_OVRE2       [expr 0x1 << 10 ]
+set AT91C_ADC_OVRE3       [expr 0x1 << 11 ]
+set AT91C_ADC_OVRE4       [expr 0x1 << 12 ]
+set AT91C_ADC_OVRE5       [expr 0x1 << 13 ]
+set AT91C_ADC_OVRE6       [expr 0x1 << 14 ]
+set AT91C_ADC_OVRE7       [expr 0x1 << 15 ]
+set AT91C_ADC_DRDY        [expr 0x1 << 16 ]
+set AT91C_ADC_GOVRE       [expr 0x1 << 17 ]
+set AT91C_ADC_ENDRX       [expr 0x1 << 18 ]
+set AT91C_ADC_RXBUFF      [expr 0x1 << 19 ]
+# -------- ADC_IDR : (ADC Offset: 0x28) ADC Interrupt Disable Register -------- 
+set AT91C_ADC_EOC0        [expr 0x1 <<  0 ]
+set AT91C_ADC_EOC1        [expr 0x1 <<  1 ]
+set AT91C_ADC_EOC2        [expr 0x1 <<  2 ]
+set AT91C_ADC_EOC3        [expr 0x1 <<  3 ]
+set AT91C_ADC_EOC4        [expr 0x1 <<  4 ]
+set AT91C_ADC_EOC5        [expr 0x1 <<  5 ]
+set AT91C_ADC_EOC6        [expr 0x1 <<  6 ]
+set AT91C_ADC_EOC7        [expr 0x1 <<  7 ]
+set AT91C_ADC_OVRE0       [expr 0x1 <<  8 ]
+set AT91C_ADC_OVRE1       [expr 0x1 <<  9 ]
+set AT91C_ADC_OVRE2       [expr 0x1 << 10 ]
+set AT91C_ADC_OVRE3       [expr 0x1 << 11 ]
+set AT91C_ADC_OVRE4       [expr 0x1 << 12 ]
+set AT91C_ADC_OVRE5       [expr 0x1 << 13 ]
+set AT91C_ADC_OVRE6       [expr 0x1 << 14 ]
+set AT91C_ADC_OVRE7       [expr 0x1 << 15 ]
+set AT91C_ADC_DRDY        [expr 0x1 << 16 ]
+set AT91C_ADC_GOVRE       [expr 0x1 << 17 ]
+set AT91C_ADC_ENDRX       [expr 0x1 << 18 ]
+set AT91C_ADC_RXBUFF      [expr 0x1 << 19 ]
+# -------- ADC_IMR : (ADC Offset: 0x2c) ADC Interrupt Mask Register -------- 
+set AT91C_ADC_EOC0        [expr 0x1 <<  0 ]
+set AT91C_ADC_EOC1        [expr 0x1 <<  1 ]
+set AT91C_ADC_EOC2        [expr 0x1 <<  2 ]
+set AT91C_ADC_EOC3        [expr 0x1 <<  3 ]
+set AT91C_ADC_EOC4        [expr 0x1 <<  4 ]
+set AT91C_ADC_EOC5        [expr 0x1 <<  5 ]
+set AT91C_ADC_EOC6        [expr 0x1 <<  6 ]
+set AT91C_ADC_EOC7        [expr 0x1 <<  7 ]
+set AT91C_ADC_OVRE0       [expr 0x1 <<  8 ]
+set AT91C_ADC_OVRE1       [expr 0x1 <<  9 ]
+set AT91C_ADC_OVRE2       [expr 0x1 << 10 ]
+set AT91C_ADC_OVRE3       [expr 0x1 << 11 ]
+set AT91C_ADC_OVRE4       [expr 0x1 << 12 ]
+set AT91C_ADC_OVRE5       [expr 0x1 << 13 ]
+set AT91C_ADC_OVRE6       [expr 0x1 << 14 ]
+set AT91C_ADC_OVRE7       [expr 0x1 << 15 ]
+set AT91C_ADC_DRDY        [expr 0x1 << 16 ]
+set AT91C_ADC_GOVRE       [expr 0x1 << 17 ]
+set AT91C_ADC_ENDRX       [expr 0x1 << 18 ]
+set AT91C_ADC_RXBUFF      [expr 0x1 << 19 ]
+# -------- ADC_CDR0 : (ADC Offset: 0x30) ADC Channel Data Register 0 -------- 
+set AT91C_ADC_DATA        [expr 0x3FF <<  0 ]
+# -------- ADC_CDR1 : (ADC Offset: 0x34) ADC Channel Data Register 1 -------- 
+set AT91C_ADC_DATA        [expr 0x3FF <<  0 ]
+# -------- ADC_CDR2 : (ADC Offset: 0x38) ADC Channel Data Register 2 -------- 
+set AT91C_ADC_DATA        [expr 0x3FF <<  0 ]
+# -------- ADC_CDR3 : (ADC Offset: 0x3c) ADC Channel Data Register 3 -------- 
+set AT91C_ADC_DATA        [expr 0x3FF <<  0 ]
+# -------- ADC_CDR4 : (ADC Offset: 0x40) ADC Channel Data Register 4 -------- 
+set AT91C_ADC_DATA        [expr 0x3FF <<  0 ]
+# -------- ADC_CDR5 : (ADC Offset: 0x44) ADC Channel Data Register 5 -------- 
+set AT91C_ADC_DATA        [expr 0x3FF <<  0 ]
+# -------- ADC_CDR6 : (ADC Offset: 0x48) ADC Channel Data Register 6 -------- 
+set AT91C_ADC_DATA        [expr 0x3FF <<  0 ]
+# -------- ADC_CDR7 : (ADC Offset: 0x4c) ADC Channel Data Register 7 -------- 
+set AT91C_ADC_DATA        [expr 0x3FF <<  0 ]
+
+# *****************************************************************************
+#               REGISTER ADDRESS DEFINITION FOR AT91SAM7X256
+# *****************************************************************************
+# ========== Register definition for SYS peripheral ========== 
+# ========== Register definition for AIC peripheral ========== 
+set AT91C_AIC_IVR   0xFFFFF100
+set AT91C_AIC_SMR   0xFFFFF000
+set AT91C_AIC_FVR   0xFFFFF104
+set AT91C_AIC_DCR   0xFFFFF138
+set AT91C_AIC_EOICR 0xFFFFF130
+set AT91C_AIC_SVR   0xFFFFF080
+set AT91C_AIC_FFSR  0xFFFFF148
+set AT91C_AIC_ICCR  0xFFFFF128
+set AT91C_AIC_ISR   0xFFFFF108
+set AT91C_AIC_IMR   0xFFFFF110
+set AT91C_AIC_IPR   0xFFFFF10C
+set AT91C_AIC_FFER  0xFFFFF140
+set AT91C_AIC_IECR  0xFFFFF120
+set AT91C_AIC_ISCR  0xFFFFF12C
+set AT91C_AIC_FFDR  0xFFFFF144
+set AT91C_AIC_CISR  0xFFFFF114
+set AT91C_AIC_IDCR  0xFFFFF124
+set AT91C_AIC_SPU   0xFFFFF134
+# ========== Register definition for PDC_DBGU peripheral ========== 
+set AT91C_DBGU_TCR  0xFFFFF30C
+set AT91C_DBGU_RNPR 0xFFFFF310
+set AT91C_DBGU_TNPR 0xFFFFF318
+set AT91C_DBGU_TPR  0xFFFFF308
+set AT91C_DBGU_RPR  0xFFFFF300
+set AT91C_DBGU_RCR  0xFFFFF304
+set AT91C_DBGU_RNCR 0xFFFFF314
+set AT91C_DBGU_PTCR 0xFFFFF320
+set AT91C_DBGU_PTSR 0xFFFFF324
+set AT91C_DBGU_TNCR 0xFFFFF31C
+# ========== Register definition for DBGU peripheral ========== 
+set AT91C_DBGU_EXID 0xFFFFF244
+set AT91C_DBGU_BRGR 0xFFFFF220
+set AT91C_DBGU_IDR  0xFFFFF20C
+set AT91C_DBGU_CSR  0xFFFFF214
+set AT91C_DBGU_CIDR 0xFFFFF240
+set AT91C_DBGU_MR   0xFFFFF204
+set AT91C_DBGU_IMR  0xFFFFF210
+set AT91C_DBGU_CR   0xFFFFF200
+set AT91C_DBGU_FNTR 0xFFFFF248
+set AT91C_DBGU_THR  0xFFFFF21C
+set AT91C_DBGU_RHR  0xFFFFF218
+set AT91C_DBGU_IER  0xFFFFF208
+# ========== Register definition for PIOA peripheral ========== 
+set AT91C_PIOA_ODR  0xFFFFF414
+set AT91C_PIOA_SODR 0xFFFFF430
+set AT91C_PIOA_ISR  0xFFFFF44C
+set AT91C_PIOA_ABSR 0xFFFFF478
+set AT91C_PIOA_IER  0xFFFFF440
+set AT91C_PIOA_PPUDR 0xFFFFF460
+set AT91C_PIOA_IMR  0xFFFFF448
+set AT91C_PIOA_PER  0xFFFFF400
+set AT91C_PIOA_IFDR 0xFFFFF424
+set AT91C_PIOA_OWDR 0xFFFFF4A4
+set AT91C_PIOA_MDSR 0xFFFFF458
+set AT91C_PIOA_IDR  0xFFFFF444
+set AT91C_PIOA_ODSR 0xFFFFF438
+set AT91C_PIOA_PPUSR 0xFFFFF468
+set AT91C_PIOA_OWSR 0xFFFFF4A8
+set AT91C_PIOA_BSR  0xFFFFF474
+set AT91C_PIOA_OWER 0xFFFFF4A0
+set AT91C_PIOA_IFER 0xFFFFF420
+set AT91C_PIOA_PDSR 0xFFFFF43C
+set AT91C_PIOA_PPUER 0xFFFFF464
+set AT91C_PIOA_OSR  0xFFFFF418
+set AT91C_PIOA_ASR  0xFFFFF470
+set AT91C_PIOA_MDDR 0xFFFFF454
+set AT91C_PIOA_CODR 0xFFFFF434
+set AT91C_PIOA_MDER 0xFFFFF450
+set AT91C_PIOA_PDR  0xFFFFF404
+set AT91C_PIOA_IFSR 0xFFFFF428
+set AT91C_PIOA_OER  0xFFFFF410
+set AT91C_PIOA_PSR  0xFFFFF408
+# ========== Register definition for PIOB peripheral ========== 
+set AT91C_PIOB_OWDR 0xFFFFF6A4
+set AT91C_PIOB_MDER 0xFFFFF650
+set AT91C_PIOB_PPUSR 0xFFFFF668
+set AT91C_PIOB_IMR  0xFFFFF648
+set AT91C_PIOB_ASR  0xFFFFF670
+set AT91C_PIOB_PPUDR 0xFFFFF660
+set AT91C_PIOB_PSR  0xFFFFF608
+set AT91C_PIOB_IER  0xFFFFF640
+set AT91C_PIOB_CODR 0xFFFFF634
+set AT91C_PIOB_OWER 0xFFFFF6A0
+set AT91C_PIOB_ABSR 0xFFFFF678
+set AT91C_PIOB_IFDR 0xFFFFF624
+set AT91C_PIOB_PDSR 0xFFFFF63C
+set AT91C_PIOB_IDR  0xFFFFF644
+set AT91C_PIOB_OWSR 0xFFFFF6A8
+set AT91C_PIOB_PDR  0xFFFFF604
+set AT91C_PIOB_ODR  0xFFFFF614
+set AT91C_PIOB_IFSR 0xFFFFF628
+set AT91C_PIOB_PPUER 0xFFFFF664
+set AT91C_PIOB_SODR 0xFFFFF630
+set AT91C_PIOB_ISR  0xFFFFF64C
+set AT91C_PIOB_ODSR 0xFFFFF638
+set AT91C_PIOB_OSR  0xFFFFF618
+set AT91C_PIOB_MDSR 0xFFFFF658
+set AT91C_PIOB_IFER 0xFFFFF620
+set AT91C_PIOB_BSR  0xFFFFF674
+set AT91C_PIOB_MDDR 0xFFFFF654
+set AT91C_PIOB_OER  0xFFFFF610
+set AT91C_PIOB_PER  0xFFFFF600
+# ========== Register definition for CKGR peripheral ========== 
+set AT91C_CKGR_MOR  0xFFFFFC20
+set AT91C_CKGR_PLLR 0xFFFFFC2C
+set AT91C_CKGR_MCFR 0xFFFFFC24
+# ========== Register definition for PMC peripheral ========== 
+set AT91C_PMC_IDR   0xFFFFFC64
+set AT91C_PMC_MOR   0xFFFFFC20
+set AT91C_PMC_PLLR  0xFFFFFC2C
+set AT91C_PMC_PCER  0xFFFFFC10
+set AT91C_PMC_PCKR  0xFFFFFC40
+set AT91C_PMC_MCKR  0xFFFFFC30
+set AT91C_PMC_SCDR  0xFFFFFC04
+set AT91C_PMC_PCDR  0xFFFFFC14
+set AT91C_PMC_SCSR  0xFFFFFC08
+set AT91C_PMC_PCSR  0xFFFFFC18
+set AT91C_PMC_MCFR  0xFFFFFC24
+set AT91C_PMC_SCER  0xFFFFFC00
+set AT91C_PMC_IMR   0xFFFFFC6C
+set AT91C_PMC_IER   0xFFFFFC60
+set AT91C_PMC_SR    0xFFFFFC68
+# ========== Register definition for RSTC peripheral ========== 
+set AT91C_RSTC_RCR  0xFFFFFD00
+set AT91C_RSTC_RMR  0xFFFFFD08
+set AT91C_RSTC_RSR  0xFFFFFD04
+# ========== Register definition for RTTC peripheral ========== 
+set AT91C_RTTC_RTSR 0xFFFFFD2C
+set AT91C_RTTC_RTMR 0xFFFFFD20
+set AT91C_RTTC_RTVR 0xFFFFFD28
+set AT91C_RTTC_RTAR 0xFFFFFD24
+# ========== Register definition for PITC peripheral ========== 
+set AT91C_PITC_PIVR 0xFFFFFD38
+set AT91C_PITC_PISR 0xFFFFFD34
+set AT91C_PITC_PIIR 0xFFFFFD3C
+set AT91C_PITC_PIMR 0xFFFFFD30
+# ========== Register definition for WDTC peripheral ========== 
+set AT91C_WDTC_WDCR 0xFFFFFD40
+set AT91C_WDTC_WDSR 0xFFFFFD48
+set AT91C_WDTC_WDMR 0xFFFFFD44
+# ========== Register definition for VREG peripheral ========== 
+set AT91C_VREG_MR   0xFFFFFD60
+# ========== Register definition for MC peripheral ========== 
+set AT91C_MC_ASR    0xFFFFFF04
+set AT91C_MC_RCR    0xFFFFFF00
+set AT91C_MC_FCR    0xFFFFFF64
+set AT91C_MC_AASR   0xFFFFFF08
+set AT91C_MC_FSR    0xFFFFFF68
+set AT91C_MC_FMR    0xFFFFFF60
+# ========== Register definition for PDC_SPI1 peripheral ========== 
+set AT91C_SPI1_PTCR 0xFFFE4120
+set AT91C_SPI1_RPR  0xFFFE4100
+set AT91C_SPI1_TNCR 0xFFFE411C
+set AT91C_SPI1_TPR  0xFFFE4108
+set AT91C_SPI1_TNPR 0xFFFE4118
+set AT91C_SPI1_TCR  0xFFFE410C
+set AT91C_SPI1_RCR  0xFFFE4104
+set AT91C_SPI1_RNPR 0xFFFE4110
+set AT91C_SPI1_RNCR 0xFFFE4114
+set AT91C_SPI1_PTSR 0xFFFE4124
+# ========== Register definition for SPI1 peripheral ========== 
+set AT91C_SPI1_IMR  0xFFFE401C
+set AT91C_SPI1_IER  0xFFFE4014
+set AT91C_SPI1_MR   0xFFFE4004
+set AT91C_SPI1_RDR  0xFFFE4008
+set AT91C_SPI1_IDR  0xFFFE4018
+set AT91C_SPI1_SR   0xFFFE4010
+set AT91C_SPI1_TDR  0xFFFE400C
+set AT91C_SPI1_CR   0xFFFE4000
+set AT91C_SPI1_CSR  0xFFFE4030
+# ========== Register definition for PDC_SPI0 peripheral ========== 
+set AT91C_SPI0_PTCR 0xFFFE0120
+set AT91C_SPI0_TPR  0xFFFE0108
+set AT91C_SPI0_TCR  0xFFFE010C
+set AT91C_SPI0_RCR  0xFFFE0104
+set AT91C_SPI0_PTSR 0xFFFE0124
+set AT91C_SPI0_RNPR 0xFFFE0110
+set AT91C_SPI0_RPR  0xFFFE0100
+set AT91C_SPI0_TNCR 0xFFFE011C
+set AT91C_SPI0_RNCR 0xFFFE0114
+set AT91C_SPI0_TNPR 0xFFFE0118
+# ========== Register definition for SPI0 peripheral ========== 
+set AT91C_SPI0_IER  0xFFFE0014
+set AT91C_SPI0_SR   0xFFFE0010
+set AT91C_SPI0_IDR  0xFFFE0018
+set AT91C_SPI0_CR   0xFFFE0000
+set AT91C_SPI0_MR   0xFFFE0004
+set AT91C_SPI0_IMR  0xFFFE001C
+set AT91C_SPI0_TDR  0xFFFE000C
+set AT91C_SPI0_RDR  0xFFFE0008
+set AT91C_SPI0_CSR  0xFFFE0030
+# ========== Register definition for PDC_US1 peripheral ========== 
+set AT91C_US1_RNCR  0xFFFC4114
+set AT91C_US1_PTCR  0xFFFC4120
+set AT91C_US1_TCR   0xFFFC410C
+set AT91C_US1_PTSR  0xFFFC4124
+set AT91C_US1_TNPR  0xFFFC4118
+set AT91C_US1_RCR   0xFFFC4104
+set AT91C_US1_RNPR  0xFFFC4110
+set AT91C_US1_RPR   0xFFFC4100
+set AT91C_US1_TNCR  0xFFFC411C
+set AT91C_US1_TPR   0xFFFC4108
+# ========== Register definition for US1 peripheral ========== 
+set AT91C_US1_IF    0xFFFC404C
+set AT91C_US1_NER   0xFFFC4044
+set AT91C_US1_RTOR  0xFFFC4024
+set AT91C_US1_CSR   0xFFFC4014
+set AT91C_US1_IDR   0xFFFC400C
+set AT91C_US1_IER   0xFFFC4008
+set AT91C_US1_THR   0xFFFC401C
+set AT91C_US1_TTGR  0xFFFC4028
+set AT91C_US1_RHR   0xFFFC4018
+set AT91C_US1_BRGR  0xFFFC4020
+set AT91C_US1_IMR   0xFFFC4010
+set AT91C_US1_FIDI  0xFFFC4040
+set AT91C_US1_CR    0xFFFC4000
+set AT91C_US1_MR    0xFFFC4004
+# ========== Register definition for PDC_US0 peripheral ========== 
+set AT91C_US0_TNPR  0xFFFC0118
+set AT91C_US0_RNPR  0xFFFC0110
+set AT91C_US0_TCR   0xFFFC010C
+set AT91C_US0_PTCR  0xFFFC0120
+set AT91C_US0_PTSR  0xFFFC0124
+set AT91C_US0_TNCR  0xFFFC011C
+set AT91C_US0_TPR   0xFFFC0108
+set AT91C_US0_RCR   0xFFFC0104
+set AT91C_US0_RPR   0xFFFC0100
+set AT91C_US0_RNCR  0xFFFC0114
+# ========== Register definition for US0 peripheral ========== 
+set AT91C_US0_BRGR  0xFFFC0020
+set AT91C_US0_NER   0xFFFC0044
+set AT91C_US0_CR    0xFFFC0000
+set AT91C_US0_IMR   0xFFFC0010
+set AT91C_US0_FIDI  0xFFFC0040
+set AT91C_US0_TTGR  0xFFFC0028
+set AT91C_US0_MR    0xFFFC0004
+set AT91C_US0_RTOR  0xFFFC0024
+set AT91C_US0_CSR   0xFFFC0014
+set AT91C_US0_RHR   0xFFFC0018
+set AT91C_US0_IDR   0xFFFC000C
+set AT91C_US0_THR   0xFFFC001C
+set AT91C_US0_IF    0xFFFC004C
+set AT91C_US0_IER   0xFFFC0008
+# ========== Register definition for PDC_SSC peripheral ========== 
+set AT91C_SSC_TNCR  0xFFFD411C
+set AT91C_SSC_RPR   0xFFFD4100
+set AT91C_SSC_RNCR  0xFFFD4114
+set AT91C_SSC_TPR   0xFFFD4108
+set AT91C_SSC_PTCR  0xFFFD4120
+set AT91C_SSC_TCR   0xFFFD410C
+set AT91C_SSC_RCR   0xFFFD4104
+set AT91C_SSC_RNPR  0xFFFD4110
+set AT91C_SSC_TNPR  0xFFFD4118
+set AT91C_SSC_PTSR  0xFFFD4124
+# ========== Register definition for SSC peripheral ========== 
+set AT91C_SSC_RHR   0xFFFD4020
+set AT91C_SSC_RSHR  0xFFFD4030
+set AT91C_SSC_TFMR  0xFFFD401C
+set AT91C_SSC_IDR   0xFFFD4048
+set AT91C_SSC_THR   0xFFFD4024
+set AT91C_SSC_RCMR  0xFFFD4010
+set AT91C_SSC_IER   0xFFFD4044
+set AT91C_SSC_TSHR  0xFFFD4034
+set AT91C_SSC_SR    0xFFFD4040
+set AT91C_SSC_CMR   0xFFFD4004
+set AT91C_SSC_TCMR  0xFFFD4018
+set AT91C_SSC_CR    0xFFFD4000
+set AT91C_SSC_IMR   0xFFFD404C
+set AT91C_SSC_RFMR  0xFFFD4014
+# ========== Register definition for TWI peripheral ========== 
+set AT91C_TWI_IER   0xFFFB8024
+set AT91C_TWI_CR    0xFFFB8000
+set AT91C_TWI_SR    0xFFFB8020
+set AT91C_TWI_IMR   0xFFFB802C
+set AT91C_TWI_THR   0xFFFB8034
+set AT91C_TWI_IDR   0xFFFB8028
+set AT91C_TWI_IADR  0xFFFB800C
+set AT91C_TWI_MMR   0xFFFB8004
+set AT91C_TWI_CWGR  0xFFFB8010
+set AT91C_TWI_RHR   0xFFFB8030
+# ========== Register definition for PWMC_CH3 peripheral ========== 
+set AT91C_PWMC_CH3_CUPDR 0xFFFCC270
+set AT91C_PWMC_CH3_Reserved 0xFFFCC274
+set AT91C_PWMC_CH3_CPRDR 0xFFFCC268
+set AT91C_PWMC_CH3_CDTYR 0xFFFCC264
+set AT91C_PWMC_CH3_CCNTR 0xFFFCC26C
+set AT91C_PWMC_CH3_CMR 0xFFFCC260
+# ========== Register definition for PWMC_CH2 peripheral ========== 
+set AT91C_PWMC_CH2_Reserved 0xFFFCC254
+set AT91C_PWMC_CH2_CMR 0xFFFCC240
+set AT91C_PWMC_CH2_CCNTR 0xFFFCC24C
+set AT91C_PWMC_CH2_CPRDR 0xFFFCC248
+set AT91C_PWMC_CH2_CUPDR 0xFFFCC250
+set AT91C_PWMC_CH2_CDTYR 0xFFFCC244
+# ========== Register definition for PWMC_CH1 peripheral ========== 
+set AT91C_PWMC_CH1_Reserved 0xFFFCC234
+set AT91C_PWMC_CH1_CUPDR 0xFFFCC230
+set AT91C_PWMC_CH1_CPRDR 0xFFFCC228
+set AT91C_PWMC_CH1_CCNTR 0xFFFCC22C
+set AT91C_PWMC_CH1_CDTYR 0xFFFCC224
+set AT91C_PWMC_CH1_CMR 0xFFFCC220
+# ========== Register definition for PWMC_CH0 peripheral ========== 
+set AT91C_PWMC_CH0_Reserved 0xFFFCC214
+set AT91C_PWMC_CH0_CPRDR 0xFFFCC208
+set AT91C_PWMC_CH0_CDTYR 0xFFFCC204
+set AT91C_PWMC_CH0_CMR 0xFFFCC200
+set AT91C_PWMC_CH0_CUPDR 0xFFFCC210
+set AT91C_PWMC_CH0_CCNTR 0xFFFCC20C
+# ========== Register definition for PWMC peripheral ========== 
+set AT91C_PWMC_IDR  0xFFFCC014
+set AT91C_PWMC_DIS  0xFFFCC008
+set AT91C_PWMC_IER  0xFFFCC010
+set AT91C_PWMC_VR   0xFFFCC0FC
+set AT91C_PWMC_ISR  0xFFFCC01C
+set AT91C_PWMC_SR   0xFFFCC00C
+set AT91C_PWMC_IMR  0xFFFCC018
+set AT91C_PWMC_MR   0xFFFCC000
+set AT91C_PWMC_ENA  0xFFFCC004
+# ========== Register definition for UDP peripheral ========== 
+set AT91C_UDP_IMR   0xFFFB0018
+set AT91C_UDP_FADDR 0xFFFB0008
+set AT91C_UDP_NUM   0xFFFB0000
+set AT91C_UDP_FDR   0xFFFB0050
+set AT91C_UDP_ISR   0xFFFB001C
+set AT91C_UDP_CSR   0xFFFB0030
+set AT91C_UDP_IDR   0xFFFB0014
+set AT91C_UDP_ICR   0xFFFB0020
+set AT91C_UDP_RSTEP 0xFFFB0028
+set AT91C_UDP_TXVC  0xFFFB0074
+set AT91C_UDP_GLBSTATE 0xFFFB0004
+set AT91C_UDP_IER   0xFFFB0010
+# ========== Register definition for TC0 peripheral ========== 
+set AT91C_TC0_SR    0xFFFA0020
+set AT91C_TC0_RC    0xFFFA001C
+set AT91C_TC0_RB    0xFFFA0018
+set AT91C_TC0_CCR   0xFFFA0000
+set AT91C_TC0_CMR   0xFFFA0004
+set AT91C_TC0_IER   0xFFFA0024
+set AT91C_TC0_RA    0xFFFA0014
+set AT91C_TC0_IDR   0xFFFA0028
+set AT91C_TC0_CV    0xFFFA0010
+set AT91C_TC0_IMR   0xFFFA002C
+# ========== Register definition for TC1 peripheral ========== 
+set AT91C_TC1_RB    0xFFFA0058
+set AT91C_TC1_CCR   0xFFFA0040
+set AT91C_TC1_IER   0xFFFA0064
+set AT91C_TC1_IDR   0xFFFA0068
+set AT91C_TC1_SR    0xFFFA0060
+set AT91C_TC1_CMR   0xFFFA0044
+set AT91C_TC1_RA    0xFFFA0054
+set AT91C_TC1_RC    0xFFFA005C
+set AT91C_TC1_IMR   0xFFFA006C
+set AT91C_TC1_CV    0xFFFA0050
+# ========== Register definition for TC2 peripheral ========== 
+set AT91C_TC2_CMR   0xFFFA0084
+set AT91C_TC2_CCR   0xFFFA0080
+set AT91C_TC2_CV    0xFFFA0090
+set AT91C_TC2_RA    0xFFFA0094
+set AT91C_TC2_RB    0xFFFA0098
+set AT91C_TC2_IDR   0xFFFA00A8
+set AT91C_TC2_IMR   0xFFFA00AC
+set AT91C_TC2_RC    0xFFFA009C
+set AT91C_TC2_IER   0xFFFA00A4
+set AT91C_TC2_SR    0xFFFA00A0
+# ========== Register definition for TCB peripheral ========== 
+set AT91C_TCB_BMR   0xFFFA00C4
+set AT91C_TCB_BCR   0xFFFA00C0
+# ========== Register definition for CAN_MB0 peripheral ========== 
+set AT91C_CAN_MB0_MDL 0xFFFD0214
+set AT91C_CAN_MB0_MAM 0xFFFD0204
+set AT91C_CAN_MB0_MCR 0xFFFD021C
+set AT91C_CAN_MB0_MID 0xFFFD0208
+set AT91C_CAN_MB0_MSR 0xFFFD0210
+set AT91C_CAN_MB0_MFID 0xFFFD020C
+set AT91C_CAN_MB0_MDH 0xFFFD0218
+set AT91C_CAN_MB0_MMR 0xFFFD0200
+# ========== Register definition for CAN_MB1 peripheral ========== 
+set AT91C_CAN_MB1_MDL 0xFFFD0234
+set AT91C_CAN_MB1_MID 0xFFFD0228
+set AT91C_CAN_MB1_MMR 0xFFFD0220
+set AT91C_CAN_MB1_MSR 0xFFFD0230
+set AT91C_CAN_MB1_MAM 0xFFFD0224
+set AT91C_CAN_MB1_MDH 0xFFFD0238
+set AT91C_CAN_MB1_MCR 0xFFFD023C
+set AT91C_CAN_MB1_MFID 0xFFFD022C
+# ========== Register definition for CAN_MB2 peripheral ========== 
+set AT91C_CAN_MB2_MCR 0xFFFD025C
+set AT91C_CAN_MB2_MDH 0xFFFD0258
+set AT91C_CAN_MB2_MID 0xFFFD0248
+set AT91C_CAN_MB2_MDL 0xFFFD0254
+set AT91C_CAN_MB2_MMR 0xFFFD0240
+set AT91C_CAN_MB2_MAM 0xFFFD0244
+set AT91C_CAN_MB2_MFID 0xFFFD024C
+set AT91C_CAN_MB2_MSR 0xFFFD0250
+# ========== Register definition for CAN_MB3 peripheral ========== 
+set AT91C_CAN_MB3_MFID 0xFFFD026C
+set AT91C_CAN_MB3_MAM 0xFFFD0264
+set AT91C_CAN_MB3_MID 0xFFFD0268
+set AT91C_CAN_MB3_MCR 0xFFFD027C
+set AT91C_CAN_MB3_MMR 0xFFFD0260
+set AT91C_CAN_MB3_MSR 0xFFFD0270
+set AT91C_CAN_MB3_MDL 0xFFFD0274
+set AT91C_CAN_MB3_MDH 0xFFFD0278
+# ========== Register definition for CAN_MB4 peripheral ========== 
+set AT91C_CAN_MB4_MID 0xFFFD0288
+set AT91C_CAN_MB4_MMR 0xFFFD0280
+set AT91C_CAN_MB4_MDH 0xFFFD0298
+set AT91C_CAN_MB4_MFID 0xFFFD028C
+set AT91C_CAN_MB4_MSR 0xFFFD0290
+set AT91C_CAN_MB4_MCR 0xFFFD029C
+set AT91C_CAN_MB4_MDL 0xFFFD0294
+set AT91C_CAN_MB4_MAM 0xFFFD0284
+# ========== Register definition for CAN_MB5 peripheral ========== 
+set AT91C_CAN_MB5_MSR 0xFFFD02B0
+set AT91C_CAN_MB5_MCR 0xFFFD02BC
+set AT91C_CAN_MB5_MFID 0xFFFD02AC
+set AT91C_CAN_MB5_MDH 0xFFFD02B8
+set AT91C_CAN_MB5_MID 0xFFFD02A8
+set AT91C_CAN_MB5_MMR 0xFFFD02A0
+set AT91C_CAN_MB5_MDL 0xFFFD02B4
+set AT91C_CAN_MB5_MAM 0xFFFD02A4
+# ========== Register definition for CAN_MB6 peripheral ========== 
+set AT91C_CAN_MB6_MFID 0xFFFD02CC
+set AT91C_CAN_MB6_MID 0xFFFD02C8
+set AT91C_CAN_MB6_MAM 0xFFFD02C4
+set AT91C_CAN_MB6_MSR 0xFFFD02D0
+set AT91C_CAN_MB6_MDL 0xFFFD02D4
+set AT91C_CAN_MB6_MCR 0xFFFD02DC
+set AT91C_CAN_MB6_MDH 0xFFFD02D8
+set AT91C_CAN_MB6_MMR 0xFFFD02C0
+# ========== Register definition for CAN_MB7 peripheral ========== 
+set AT91C_CAN_MB7_MCR 0xFFFD02FC
+set AT91C_CAN_MB7_MDH 0xFFFD02F8
+set AT91C_CAN_MB7_MFID 0xFFFD02EC
+set AT91C_CAN_MB7_MDL 0xFFFD02F4
+set AT91C_CAN_MB7_MID 0xFFFD02E8
+set AT91C_CAN_MB7_MMR 0xFFFD02E0
+set AT91C_CAN_MB7_MAM 0xFFFD02E4
+set AT91C_CAN_MB7_MSR 0xFFFD02F0
+# ========== Register definition for CAN peripheral ========== 
+set AT91C_CAN_TCR   0xFFFD0024
+set AT91C_CAN_IMR   0xFFFD000C
+set AT91C_CAN_IER   0xFFFD0004
+set AT91C_CAN_ECR   0xFFFD0020
+set AT91C_CAN_TIMESTP 0xFFFD001C
+set AT91C_CAN_MR    0xFFFD0000
+set AT91C_CAN_IDR   0xFFFD0008
+set AT91C_CAN_ACR   0xFFFD0028
+set AT91C_CAN_TIM   0xFFFD0018
+set AT91C_CAN_SR    0xFFFD0010
+set AT91C_CAN_BR    0xFFFD0014
+set AT91C_CAN_VR    0xFFFD00FC
+# ========== Register definition for EMAC peripheral ========== 
+set AT91C_EMAC_ISR  0xFFFDC024
+set AT91C_EMAC_SA4H 0xFFFDC0B4
+set AT91C_EMAC_SA1L 0xFFFDC098
+set AT91C_EMAC_ELE  0xFFFDC078
+set AT91C_EMAC_LCOL 0xFFFDC05C
+set AT91C_EMAC_RLE  0xFFFDC088
+set AT91C_EMAC_WOL  0xFFFDC0C4
+set AT91C_EMAC_DTF  0xFFFDC058
+set AT91C_EMAC_TUND 0xFFFDC064
+set AT91C_EMAC_NCR  0xFFFDC000
+set AT91C_EMAC_SA4L 0xFFFDC0B0
+set AT91C_EMAC_RSR  0xFFFDC020
+set AT91C_EMAC_SA3L 0xFFFDC0A8
+set AT91C_EMAC_TSR  0xFFFDC014
+set AT91C_EMAC_IDR  0xFFFDC02C
+set AT91C_EMAC_RSE  0xFFFDC074
+set AT91C_EMAC_ECOL 0xFFFDC060
+set AT91C_EMAC_TID  0xFFFDC0B8
+set AT91C_EMAC_HRB  0xFFFDC090
+set AT91C_EMAC_TBQP 0xFFFDC01C
+set AT91C_EMAC_USRIO 0xFFFDC0C0
+set AT91C_EMAC_PTR  0xFFFDC038
+set AT91C_EMAC_SA2H 0xFFFDC0A4
+set AT91C_EMAC_ROV  0xFFFDC070
+set AT91C_EMAC_ALE  0xFFFDC054
+set AT91C_EMAC_RJA  0xFFFDC07C
+set AT91C_EMAC_RBQP 0xFFFDC018
+set AT91C_EMAC_TPF  0xFFFDC08C
+set AT91C_EMAC_NCFGR 0xFFFDC004
+set AT91C_EMAC_HRT  0xFFFDC094
+set AT91C_EMAC_USF  0xFFFDC080
+set AT91C_EMAC_FCSE 0xFFFDC050
+set AT91C_EMAC_TPQ  0xFFFDC0BC
+set AT91C_EMAC_MAN  0xFFFDC034
+set AT91C_EMAC_FTO  0xFFFDC040
+set AT91C_EMAC_REV  0xFFFDC0FC
+set AT91C_EMAC_IMR  0xFFFDC030
+set AT91C_EMAC_SCF  0xFFFDC044
+set AT91C_EMAC_PFR  0xFFFDC03C
+set AT91C_EMAC_MCF  0xFFFDC048
+set AT91C_EMAC_NSR  0xFFFDC008
+set AT91C_EMAC_SA2L 0xFFFDC0A0
+set AT91C_EMAC_FRO  0xFFFDC04C
+set AT91C_EMAC_IER  0xFFFDC028
+set AT91C_EMAC_SA1H 0xFFFDC09C
+set AT91C_EMAC_CSE  0xFFFDC068
+set AT91C_EMAC_SA3H 0xFFFDC0AC
+set AT91C_EMAC_RRE  0xFFFDC06C
+set AT91C_EMAC_STE  0xFFFDC084
+# ========== Register definition for PDC_ADC peripheral ========== 
+set AT91C_ADC_PTSR  0xFFFD8124
+set AT91C_ADC_PTCR  0xFFFD8120
+set AT91C_ADC_TNPR  0xFFFD8118
+set AT91C_ADC_TNCR  0xFFFD811C
+set AT91C_ADC_RNPR  0xFFFD8110
+set AT91C_ADC_RNCR  0xFFFD8114
+set AT91C_ADC_RPR   0xFFFD8100
+set AT91C_ADC_TCR   0xFFFD810C
+set AT91C_ADC_TPR   0xFFFD8108
+set AT91C_ADC_RCR   0xFFFD8104
+# ========== Register definition for ADC peripheral ========== 
+set AT91C_ADC_CDR2  0xFFFD8038
+set AT91C_ADC_CDR3  0xFFFD803C
+set AT91C_ADC_CDR0  0xFFFD8030
+set AT91C_ADC_CDR5  0xFFFD8044
+set AT91C_ADC_CHDR  0xFFFD8014
+set AT91C_ADC_SR    0xFFFD801C
+set AT91C_ADC_CDR4  0xFFFD8040
+set AT91C_ADC_CDR1  0xFFFD8034
+set AT91C_ADC_LCDR  0xFFFD8020
+set AT91C_ADC_IDR   0xFFFD8028
+set AT91C_ADC_CR    0xFFFD8000
+set AT91C_ADC_CDR7  0xFFFD804C
+set AT91C_ADC_CDR6  0xFFFD8048
+set AT91C_ADC_IER   0xFFFD8024
+set AT91C_ADC_CHER  0xFFFD8010
+set AT91C_ADC_CHSR  0xFFFD8018
+set AT91C_ADC_MR    0xFFFD8004
+set AT91C_ADC_IMR   0xFFFD802C
+
+# *****************************************************************************
+#               BASE ADDRESS DEFINITIONS FOR AT91SAM7X256
+# *****************************************************************************
+set AT91C_BASE_SYS       0xFFFFF000
+set AT91C_BASE_AIC       0xFFFFF000
+set AT91C_BASE_PDC_DBGU  0xFFFFF300
+set AT91C_BASE_DBGU      0xFFFFF200
+set AT91C_BASE_PIOA      0xFFFFF400
+set AT91C_BASE_PIOB      0xFFFFF600
+set AT91C_BASE_CKGR      0xFFFFFC20
+set AT91C_BASE_PMC       0xFFFFFC00
+set AT91C_BASE_RSTC      0xFFFFFD00
+set AT91C_BASE_RTTC      0xFFFFFD20
+set AT91C_BASE_PITC      0xFFFFFD30
+set AT91C_BASE_WDTC      0xFFFFFD40
+set AT91C_BASE_VREG      0xFFFFFD60
+set AT91C_BASE_MC        0xFFFFFF00
+set AT91C_BASE_PDC_SPI1  0xFFFE4100
+set AT91C_BASE_SPI1      0xFFFE4000
+set AT91C_BASE_PDC_SPI0  0xFFFE0100
+set AT91C_BASE_SPI0      0xFFFE0000
+set AT91C_BASE_PDC_US1   0xFFFC4100
+set AT91C_BASE_US1       0xFFFC4000
+set AT91C_BASE_PDC_US0   0xFFFC0100
+set AT91C_BASE_US0       0xFFFC0000
+set AT91C_BASE_PDC_SSC   0xFFFD4100
+set AT91C_BASE_SSC       0xFFFD4000
+set AT91C_BASE_TWI       0xFFFB8000
+set AT91C_BASE_PWMC_CH3  0xFFFCC260
+set AT91C_BASE_PWMC_CH2  0xFFFCC240
+set AT91C_BASE_PWMC_CH1  0xFFFCC220
+set AT91C_BASE_PWMC_CH0  0xFFFCC200
+set AT91C_BASE_PWMC      0xFFFCC000
+set AT91C_BASE_UDP       0xFFFB0000
+set AT91C_BASE_TC0       0xFFFA0000
+set AT91C_BASE_TC1       0xFFFA0040
+set AT91C_BASE_TC2       0xFFFA0080
+set AT91C_BASE_TCB       0xFFFA0000
+set AT91C_BASE_CAN_MB0   0xFFFD0200
+set AT91C_BASE_CAN_MB1   0xFFFD0220
+set AT91C_BASE_CAN_MB2   0xFFFD0240
+set AT91C_BASE_CAN_MB3   0xFFFD0260
+set AT91C_BASE_CAN_MB4   0xFFFD0280
+set AT91C_BASE_CAN_MB5   0xFFFD02A0
+set AT91C_BASE_CAN_MB6   0xFFFD02C0
+set AT91C_BASE_CAN_MB7   0xFFFD02E0
+set AT91C_BASE_CAN       0xFFFD0000
+set AT91C_BASE_EMAC      0xFFFDC000
+set AT91C_BASE_PDC_ADC   0xFFFD8100
+set AT91C_BASE_ADC       0xFFFD8000
+
+# *****************************************************************************
+#               PERIPHERAL ID DEFINITIONS FOR AT91SAM7X256
+# *****************************************************************************
+set AT91C_ID_FIQ     0
+set AT91C_ID_SYS     1
+set AT91C_ID_PIOA    2
+set AT91C_ID_PIOB    3
+set AT91C_ID_SPI0    4
+set AT91C_ID_SPI1    5
+set AT91C_ID_US0     6
+set AT91C_ID_US1     7
+set AT91C_ID_SSC     8
+set AT91C_ID_TWI     9
+set AT91C_ID_PWMC   10
+set AT91C_ID_UDP    11
+set AT91C_ID_TC0    12
+set AT91C_ID_TC1    13
+set AT91C_ID_TC2    14
+set AT91C_ID_CAN    15
+set AT91C_ID_EMAC   16
+set AT91C_ID_ADC    17
+set AT91C_ID_18_Reserved 18
+set AT91C_ID_19_Reserved 19
+set AT91C_ID_20_Reserved 20
+set AT91C_ID_21_Reserved 21
+set AT91C_ID_22_Reserved 22
+set AT91C_ID_23_Reserved 23
+set AT91C_ID_24_Reserved 24
+set AT91C_ID_25_Reserved 25
+set AT91C_ID_26_Reserved 26
+set AT91C_ID_27_Reserved 27
+set AT91C_ID_28_Reserved 28
+set AT91C_ID_29_Reserved 29
+set AT91C_ID_IRQ0   30
+set AT91C_ID_IRQ1   31
+
+# *****************************************************************************
+#               PIO DEFINITIONS FOR AT91SAM7X256
+# *****************************************************************************
+set AT91C_PIO_PA0        [expr 1 <<  0 ]
+set AT91C_PA0_RXD0     $AT91C_PIO_PA0
+set AT91C_PIO_PA1        [expr 1 <<  1 ]
+set AT91C_PA1_TXD0     $AT91C_PIO_PA1
+set AT91C_PIO_PA10       [expr 1 << 10 ]
+set AT91C_PA10_TWD      $AT91C_PIO_PA10
+set AT91C_PIO_PA11       [expr 1 << 11 ]
+set AT91C_PA11_TWCK     $AT91C_PIO_PA11
+set AT91C_PIO_PA12       [expr 1 << 12 ]
+set AT91C_PA12_SPI0_NPCS0 $AT91C_PIO_PA12
+set AT91C_PIO_PA13       [expr 1 << 13 ]
+set AT91C_PA13_SPI0_NPCS1 $AT91C_PIO_PA13
+set AT91C_PA13_PCK1     $AT91C_PIO_PA13
+set AT91C_PIO_PA14       [expr 1 << 14 ]
+set AT91C_PA14_SPI0_NPCS2 $AT91C_PIO_PA14
+set AT91C_PA14_IRQ1     $AT91C_PIO_PA14
+set AT91C_PIO_PA15       [expr 1 << 15 ]
+set AT91C_PA15_SPI0_NPCS3 $AT91C_PIO_PA15
+set AT91C_PA15_TCLK2    $AT91C_PIO_PA15
+set AT91C_PIO_PA16       [expr 1 << 16 ]
+set AT91C_PA16_SPI0_MISO $AT91C_PIO_PA16
+set AT91C_PIO_PA17       [expr 1 << 17 ]
+set AT91C_PA17_SPI0_MOSI $AT91C_PIO_PA17
+set AT91C_PIO_PA18       [expr 1 << 18 ]
+set AT91C_PA18_SPI0_SPCK $AT91C_PIO_PA18
+set AT91C_PIO_PA19       [expr 1 << 19 ]
+set AT91C_PA19_CANRX    $AT91C_PIO_PA19
+set AT91C_PIO_PA2        [expr 1 <<  2 ]
+set AT91C_PA2_SCK0     $AT91C_PIO_PA2
+set AT91C_PA2_SPI1_NPCS1 $AT91C_PIO_PA2
+set AT91C_PIO_PA20       [expr 1 << 20 ]
+set AT91C_PA20_CANTX    $AT91C_PIO_PA20
+set AT91C_PIO_PA21       [expr 1 << 21 ]
+set AT91C_PA21_TF       $AT91C_PIO_PA21
+set AT91C_PA21_SPI1_NPCS0 $AT91C_PIO_PA21
+set AT91C_PIO_PA22       [expr 1 << 22 ]
+set AT91C_PA22_TK       $AT91C_PIO_PA22
+set AT91C_PA22_SPI1_SPCK $AT91C_PIO_PA22
+set AT91C_PIO_PA23       [expr 1 << 23 ]
+set AT91C_PA23_TD       $AT91C_PIO_PA23
+set AT91C_PA23_SPI1_MOSI $AT91C_PIO_PA23
+set AT91C_PIO_PA24       [expr 1 << 24 ]
+set AT91C_PA24_RD       $AT91C_PIO_PA24
+set AT91C_PA24_SPI1_MISO $AT91C_PIO_PA24
+set AT91C_PIO_PA25       [expr 1 << 25 ]
+set AT91C_PA25_RK       $AT91C_PIO_PA25
+set AT91C_PA25_SPI1_NPCS1 $AT91C_PIO_PA25
+set AT91C_PIO_PA26       [expr 1 << 26 ]
+set AT91C_PA26_RF       $AT91C_PIO_PA26
+set AT91C_PA26_SPI1_NPCS2 $AT91C_PIO_PA26
+set AT91C_PIO_PA27       [expr 1 << 27 ]
+set AT91C_PA27_DRXD     $AT91C_PIO_PA27
+set AT91C_PA27_PCK3     $AT91C_PIO_PA27
+set AT91C_PIO_PA28       [expr 1 << 28 ]
+set AT91C_PA28_DTXD     $AT91C_PIO_PA28
+set AT91C_PIO_PA29       [expr 1 << 29 ]
+set AT91C_PA29_FIQ      $AT91C_PIO_PA29
+set AT91C_PA29_SPI1_NPCS3 $AT91C_PIO_PA29
+set AT91C_PIO_PA3        [expr 1 <<  3 ]
+set AT91C_PA3_RTS0     $AT91C_PIO_PA3
+set AT91C_PA3_SPI1_NPCS2 $AT91C_PIO_PA3
+set AT91C_PIO_PA30       [expr 1 << 30 ]
+set AT91C_PA30_IRQ0     $AT91C_PIO_PA30
+set AT91C_PA30_PCK2     $AT91C_PIO_PA30
+set AT91C_PIO_PA4        [expr 1 <<  4 ]
+set AT91C_PA4_CTS0     $AT91C_PIO_PA4
+set AT91C_PA4_SPI1_NPCS3 $AT91C_PIO_PA4
+set AT91C_PIO_PA5        [expr 1 <<  5 ]
+set AT91C_PA5_RXD1     $AT91C_PIO_PA5
+set AT91C_PIO_PA6        [expr 1 <<  6 ]
+set AT91C_PA6_TXD1     $AT91C_PIO_PA6
+set AT91C_PIO_PA7        [expr 1 <<  7 ]
+set AT91C_PA7_SCK1     $AT91C_PIO_PA7
+set AT91C_PA7_SPI0_NPCS1 $AT91C_PIO_PA7
+set AT91C_PIO_PA8        [expr 1 <<  8 ]
+set AT91C_PA8_RTS1     $AT91C_PIO_PA8
+set AT91C_PA8_SPI0_NPCS2 $AT91C_PIO_PA8
+set AT91C_PIO_PA9        [expr 1 <<  9 ]
+set AT91C_PA9_CTS1     $AT91C_PIO_PA9
+set AT91C_PA9_SPI0_NPCS3 $AT91C_PIO_PA9
+set AT91C_PIO_PB0        [expr 1 <<  0 ]
+set AT91C_PB0_ETXCK_EREFCK $AT91C_PIO_PB0
+set AT91C_PB0_PCK0     $AT91C_PIO_PB0
+set AT91C_PIO_PB1        [expr 1 <<  1 ]
+set AT91C_PB1_ETXEN    $AT91C_PIO_PB1
+set AT91C_PIO_PB10       [expr 1 << 10 ]
+set AT91C_PB10_ETX2     $AT91C_PIO_PB10
+set AT91C_PB10_SPI1_NPCS1 $AT91C_PIO_PB10
+set AT91C_PIO_PB11       [expr 1 << 11 ]
+set AT91C_PB11_ETX3     $AT91C_PIO_PB11
+set AT91C_PB11_SPI1_NPCS2 $AT91C_PIO_PB11
+set AT91C_PIO_PB12       [expr 1 << 12 ]
+set AT91C_PB12_ETXER    $AT91C_PIO_PB12
+set AT91C_PB12_TCLK0    $AT91C_PIO_PB12
+set AT91C_PIO_PB13       [expr 1 << 13 ]
+set AT91C_PB13_ERX2     $AT91C_PIO_PB13
+set AT91C_PB13_SPI0_NPCS1 $AT91C_PIO_PB13
+set AT91C_PIO_PB14       [expr 1 << 14 ]
+set AT91C_PB14_ERX3     $AT91C_PIO_PB14
+set AT91C_PB14_SPI0_NPCS2 $AT91C_PIO_PB14
+set AT91C_PIO_PB15       [expr 1 << 15 ]
+set AT91C_PB15_ERXDV_ECRSDV $AT91C_PIO_PB15
+set AT91C_PIO_PB16       [expr 1 << 16 ]
+set AT91C_PB16_ECOL     $AT91C_PIO_PB16
+set AT91C_PB16_SPI1_NPCS3 $AT91C_PIO_PB16
+set AT91C_PIO_PB17       [expr 1 << 17 ]
+set AT91C_PB17_ERXCK    $AT91C_PIO_PB17
+set AT91C_PB17_SPI0_NPCS3 $AT91C_PIO_PB17
+set AT91C_PIO_PB18       [expr 1 << 18 ]
+set AT91C_PB18_EF100    $AT91C_PIO_PB18
+set AT91C_PB18_ADTRG    $AT91C_PIO_PB18
+set AT91C_PIO_PB19       [expr 1 << 19 ]
+set AT91C_PB19_PWM0     $AT91C_PIO_PB19
+set AT91C_PB19_TCLK1    $AT91C_PIO_PB19
+set AT91C_PIO_PB2        [expr 1 <<  2 ]
+set AT91C_PB2_ETX0     $AT91C_PIO_PB2
+set AT91C_PIO_PB20       [expr 1 << 20 ]
+set AT91C_PB20_PWM1     $AT91C_PIO_PB20
+set AT91C_PB20_PCK0     $AT91C_PIO_PB20
+set AT91C_PIO_PB21       [expr 1 << 21 ]
+set AT91C_PB21_PWM2     $AT91C_PIO_PB21
+set AT91C_PB21_PCK1     $AT91C_PIO_PB21
+set AT91C_PIO_PB22       [expr 1 << 22 ]
+set AT91C_PB22_PWM3     $AT91C_PIO_PB22
+set AT91C_PB22_PCK2     $AT91C_PIO_PB22
+set AT91C_PIO_PB23       [expr 1 << 23 ]
+set AT91C_PB23_TIOA0    $AT91C_PIO_PB23
+set AT91C_PB23_DCD1     $AT91C_PIO_PB23
+set AT91C_PIO_PB24       [expr 1 << 24 ]
+set AT91C_PB24_TIOB0    $AT91C_PIO_PB24
+set AT91C_PB24_DSR1     $AT91C_PIO_PB24
+set AT91C_PIO_PB25       [expr 1 << 25 ]
+set AT91C_PB25_TIOA1    $AT91C_PIO_PB25
+set AT91C_PB25_DTR1     $AT91C_PIO_PB25
+set AT91C_PIO_PB26       [expr 1 << 26 ]
+set AT91C_PB26_TIOB1    $AT91C_PIO_PB26
+set AT91C_PB26_RI1      $AT91C_PIO_PB26
+set AT91C_PIO_PB27       [expr 1 << 27 ]
+set AT91C_PB27_TIOA2    $AT91C_PIO_PB27
+set AT91C_PB27_PWM0     $AT91C_PIO_PB27
+set AT91C_PIO_PB28       [expr 1 << 28 ]
+set AT91C_PB28_TIOB2    $AT91C_PIO_PB28
+set AT91C_PB28_PWM1     $AT91C_PIO_PB28
+set AT91C_PIO_PB29       [expr 1 << 29 ]
+set AT91C_PB29_PCK1     $AT91C_PIO_PB29
+set AT91C_PB29_PWM2     $AT91C_PIO_PB29
+set AT91C_PIO_PB3        [expr 1 <<  3 ]
+set AT91C_PB3_ETX1     $AT91C_PIO_PB3
+set AT91C_PIO_PB30       [expr 1 << 30 ]
+set AT91C_PB30_PCK2     $AT91C_PIO_PB30
+set AT91C_PB30_PWM3     $AT91C_PIO_PB30
+set AT91C_PIO_PB4        [expr 1 <<  4 ]
+set AT91C_PB4_ECRS     $AT91C_PIO_PB4
+set AT91C_PIO_PB5        [expr 1 <<  5 ]
+set AT91C_PB5_ERX0     $AT91C_PIO_PB5
+set AT91C_PIO_PB6        [expr 1 <<  6 ]
+set AT91C_PB6_ERX1     $AT91C_PIO_PB6
+set AT91C_PIO_PB7        [expr 1 <<  7 ]
+set AT91C_PB7_ERXER    $AT91C_PIO_PB7
+set AT91C_PIO_PB8        [expr 1 <<  8 ]
+set AT91C_PB8_EMDC     $AT91C_PIO_PB8
+set AT91C_PIO_PB9        [expr 1 <<  9 ]
+set AT91C_PB9_EMDIO    $AT91C_PIO_PB9
+
+# *****************************************************************************
+#               MEMORY MAPPING DEFINITIONS FOR AT91SAM7X256
+# *****************************************************************************
+set AT91C_ISRAM	 0x00200000
+set AT91C_ISRAM_SIZE	 0x00010000
+set AT91C_IFLASH	 0x00100000
+set AT91C_IFLASH_SIZE	 0x00040000
+
+
+# *****************************************************************************
+#               ATTRIBUTES DEFINITIONS FOR AT91SAM7X256
+# *****************************************************************************
+array set AT91SAM7X256_att {
+	DBGU 	{ LP 	DBGU_att }
+	PMC 	{ LP 	PMC_att }
+	VREG 	{ LP 	VREG_att }
+	RSTC 	{ LP 	RSTC_att }
+	SSC 	{ LP 	SSC_att }
+	WDTC 	{ LP 	WDTC_att }
+	USART 	{ LP 	US1_att 	US0_att }
+	SPI 	{ LP 	SPI1_att 	SPI0_att }
+	PITC 	{ LP 	PITC_att }
+	TCB 	{ LP 	TCB_att }
+	CKGR 	{ LP 	CKGR_att }
+	AIC 	{ LP 	AIC_att }
+	TWI 	{ LP 	TWI_att }
+	ADC 	{ LP 	ADC_att }
+	PWMC_CH 	{ LP 	PWMC_CH3_att 	PWMC_CH2_att 	PWMC_CH1_att 	PWMC_CH0_att }
+	RTTC 	{ LP 	RTTC_att }
+	UDP 	{ LP 	UDP_att }
+	EMAC 	{ LP 	EMAC_att }
+	CAN_MB 	{ LP 	CAN_MB0_att 	CAN_MB1_att 	CAN_MB2_att 	CAN_MB3_att 	CAN_MB4_att 	CAN_MB5_att 	CAN_MB6_att 	CAN_MB7_att }
+	TC 	{ LP 	TC0_att 	TC1_att 	TC2_att }
+	SYS 	{ LP 	SYS_att }
+	MC 	{ LP 	MC_att }
+	PIO 	{ LP 	PIOA_att 	PIOB_att }
+	CAN 	{ LP 	CAN_att }
+	PWMC 	{ LP 	PWMC_att }
+	PDC 	{ LP 	PDC_DBGU_att 	PDC_SPI1_att 	PDC_SPI0_att 	PDC_US1_att 	PDC_US0_att 	PDC_SSC_att 	PDC_ADC_att }
+
+}
+# ========== Peripheral attributes for DBGU peripheral ========== 
+array set DBGU_att {
+	EXID 	{ R AT91C_DBGU_EXID 	RO }
+	BRGR 	{ R AT91C_DBGU_BRGR 	RW }
+	IDR 	{ R AT91C_DBGU_IDR 	WO }
+	CSR 	{ R AT91C_DBGU_CSR 	RO }
+	CIDR 	{ R AT91C_DBGU_CIDR 	RO }
+	MR 	{ R AT91C_DBGU_MR 	RW }
+	IMR 	{ R AT91C_DBGU_IMR 	RO }
+	CR 	{ R AT91C_DBGU_CR 	WO }
+	FNTR 	{ R AT91C_DBGU_FNTR 	RW }
+	THR 	{ R AT91C_DBGU_THR 	WO }
+	RHR 	{ R AT91C_DBGU_RHR 	RO }
+	IER 	{ R AT91C_DBGU_IER 	WO }
+	listeReg 	{ EXID BRGR IDR CSR CIDR MR IMR CR FNTR THR RHR IER  }
+
+}
+
+# ========== Peripheral attributes for PMC peripheral ========== 
+array set PMC_att {
+	IDR 	{ R AT91C_PMC_IDR 	WO }
+	MOR 	{ R AT91C_PMC_MOR 	RW }
+	PLLR 	{ R AT91C_PMC_PLLR 	RW }
+	PCER 	{ R AT91C_PMC_PCER 	WO }
+	PCKR 	{ R AT91C_PMC_PCKR 	RW }
+	MCKR 	{ R AT91C_PMC_MCKR 	RW }
+	SCDR 	{ R AT91C_PMC_SCDR 	WO }
+	PCDR 	{ R AT91C_PMC_PCDR 	WO }
+	SCSR 	{ R AT91C_PMC_SCSR 	RO }
+	PCSR 	{ R AT91C_PMC_PCSR 	RO }
+	MCFR 	{ R AT91C_PMC_MCFR 	RO }
+	SCER 	{ R AT91C_PMC_SCER 	WO }
+	IMR 	{ R AT91C_PMC_IMR 	RO }
+	IER 	{ R AT91C_PMC_IER 	WO }
+	SR 	{ R AT91C_PMC_SR 	RO }
+	listeReg 	{ IDR MOR PLLR PCER PCKR MCKR SCDR PCDR SCSR PCSR MCFR SCER IMR IER SR  }
+
+}
+
+# ========== Peripheral attributes for VREG peripheral ========== 
+array set VREG_att {
+	MR 	{ R AT91C_VREG_MR 	RW }
+	listeReg 	{ MR  }
+
+}
+
+# ========== Peripheral attributes for RSTC peripheral ========== 
+array set RSTC_att {
+	RCR 	{ R AT91C_RSTC_RCR 	WO }
+	RMR 	{ R AT91C_RSTC_RMR 	RW }
+	RSR 	{ R AT91C_RSTC_RSR 	RO }
+	listeReg 	{ RCR RMR RSR  }
+
+}
+
+# ========== Peripheral attributes for SSC peripheral ========== 
+array set SSC_att {
+	RHR 	{ R AT91C_SSC_RHR 	RO }
+	RSHR 	{ R AT91C_SSC_RSHR 	RO }
+	TFMR 	{ R AT91C_SSC_TFMR 	RW }
+	IDR 	{ R AT91C_SSC_IDR 	WO }
+	THR 	{ R AT91C_SSC_THR 	WO }
+	RCMR 	{ R AT91C_SSC_RCMR 	RW }
+	IER 	{ R AT91C_SSC_IER 	WO }
+	TSHR 	{ R AT91C_SSC_TSHR 	RW }
+	SR 	{ R AT91C_SSC_SR 	RO }
+	CMR 	{ R AT91C_SSC_CMR 	RW }
+	TCMR 	{ R AT91C_SSC_TCMR 	RW }
+	CR 	{ R AT91C_SSC_CR 	WO }
+	IMR 	{ R AT91C_SSC_IMR 	RO }
+	RFMR 	{ R AT91C_SSC_RFMR 	RW }
+	listeReg 	{ RHR RSHR TFMR IDR THR RCMR IER TSHR SR CMR TCMR CR IMR RFMR  }
+
+}
+
+# ========== Peripheral attributes for WDTC peripheral ========== 
+array set WDTC_att {
+	WDCR 	{ R AT91C_WDTC_WDCR 	WO }
+	WDSR 	{ R AT91C_WDTC_WDSR 	RO }
+	WDMR 	{ R AT91C_WDTC_WDMR 	RW }
+	listeReg 	{ WDCR WDSR WDMR  }
+
+}
+
+# ========== Peripheral attributes for USART peripheral ========== 
+array set US1_att {
+	IF 	{ R AT91C_US1_IF 	RW }
+	NER 	{ R AT91C_US1_NER 	RO }
+	RTOR 	{ R AT91C_US1_RTOR 	RW }
+	CSR 	{ R AT91C_US1_CSR 	RO }
+	IDR 	{ R AT91C_US1_IDR 	WO }
+	IER 	{ R AT91C_US1_IER 	WO }
+	THR 	{ R AT91C_US1_THR 	WO }
+	TTGR 	{ R AT91C_US1_TTGR 	RW }
+	RHR 	{ R AT91C_US1_RHR 	RO }
+	BRGR 	{ R AT91C_US1_BRGR 	RW }
+	IMR 	{ R AT91C_US1_IMR 	RO }
+	FIDI 	{ R AT91C_US1_FIDI 	RW }
+	CR 	{ R AT91C_US1_CR 	WO }
+	MR 	{ R AT91C_US1_MR 	RW }
+	listeReg 	{ IF NER RTOR CSR IDR IER THR TTGR RHR BRGR IMR FIDI CR MR  }
+
+}
+array set US0_att {
+	BRGR 	{ R AT91C_US0_BRGR 	RW }
+	NER 	{ R AT91C_US0_NER 	RO }
+	CR 	{ R AT91C_US0_CR 	WO }
+	IMR 	{ R AT91C_US0_IMR 	RO }
+	FIDI 	{ R AT91C_US0_FIDI 	RW }
+	TTGR 	{ R AT91C_US0_TTGR 	RW }
+	MR 	{ R AT91C_US0_MR 	RW }
+	RTOR 	{ R AT91C_US0_RTOR 	RW }
+	CSR 	{ R AT91C_US0_CSR 	RO }
+	RHR 	{ R AT91C_US0_RHR 	RO }
+	IDR 	{ R AT91C_US0_IDR 	WO }
+	THR 	{ R AT91C_US0_THR 	WO }
+	IF 	{ R AT91C_US0_IF 	RW }
+	IER 	{ R AT91C_US0_IER 	WO }
+	listeReg 	{ BRGR NER CR IMR FIDI TTGR MR RTOR CSR RHR IDR THR IF IER  }
+
+}
+
+# ========== Peripheral attributes for SPI peripheral ========== 
+array set SPI1_att {
+	IMR 	{ R AT91C_SPI1_IMR 	RO }
+	IER 	{ R AT91C_SPI1_IER 	WO }
+	MR 	{ R AT91C_SPI1_MR 	RW }
+	RDR 	{ R AT91C_SPI1_RDR 	RO }
+	IDR 	{ R AT91C_SPI1_IDR 	WO }
+	SR 	{ R AT91C_SPI1_SR 	RO }
+	TDR 	{ R AT91C_SPI1_TDR 	WO }
+	CR 	{ R AT91C_SPI1_CR 	RO }
+	CSR 	{ R AT91C_SPI1_CSR 	RW }
+	listeReg 	{ IMR IER MR RDR IDR SR TDR CR CSR  }
+
+}
+array set SPI0_att {
+	IER 	{ R AT91C_SPI0_IER 	WO }
+	SR 	{ R AT91C_SPI0_SR 	RO }
+	IDR 	{ R AT91C_SPI0_IDR 	WO }
+	CR 	{ R AT91C_SPI0_CR 	RO }
+	MR 	{ R AT91C_SPI0_MR 	RW }
+	IMR 	{ R AT91C_SPI0_IMR 	RO }
+	TDR 	{ R AT91C_SPI0_TDR 	WO }
+	RDR 	{ R AT91C_SPI0_RDR 	RO }
+	CSR 	{ R AT91C_SPI0_CSR 	RW }
+	listeReg 	{ IER SR IDR CR MR IMR TDR RDR CSR  }
+
+}
+
+# ========== Peripheral attributes for PITC peripheral ========== 
+array set PITC_att {
+	PIVR 	{ R AT91C_PITC_PIVR 	RO }
+	PISR 	{ R AT91C_PITC_PISR 	RO }
+	PIIR 	{ R AT91C_PITC_PIIR 	RO }
+	PIMR 	{ R AT91C_PITC_PIMR 	RW }
+	listeReg 	{ PIVR PISR PIIR PIMR  }
+
+}
+
+# ========== Peripheral attributes for TCB peripheral ========== 
+array set TCB_att {
+	BMR 	{ R AT91C_TCB_BMR 	RW }
+	BCR 	{ R AT91C_TCB_BCR 	WO }
+	listeReg 	{ BMR BCR  }
+
+}
+
+# ========== Peripheral attributes for CKGR peripheral ========== 
+array set CKGR_att {
+	MOR 	{ R AT91C_CKGR_MOR 	RW }
+	PLLR 	{ R AT91C_CKGR_PLLR 	RW }
+	MCFR 	{ R AT91C_CKGR_MCFR 	RO }
+	listeReg 	{ MOR PLLR MCFR  }
+
+}
+
+# ========== Peripheral attributes for AIC peripheral ========== 
+array set AIC_att {
+	IVR 	{ R AT91C_AIC_IVR 	RO }
+	SMR 	{ R AT91C_AIC_SMR 	RW }
+	FVR 	{ R AT91C_AIC_FVR 	RO }
+	DCR 	{ R AT91C_AIC_DCR 	RW }
+	EOICR 	{ R AT91C_AIC_EOICR 	WO }
+	SVR 	{ R AT91C_AIC_SVR 	RW }
+	FFSR 	{ R AT91C_AIC_FFSR 	RO }
+	ICCR 	{ R AT91C_AIC_ICCR 	WO }
+	ISR 	{ R AT91C_AIC_ISR 	RO }
+	IMR 	{ R AT91C_AIC_IMR 	RO }
+	IPR 	{ R AT91C_AIC_IPR 	RO }
+	FFER 	{ R AT91C_AIC_FFER 	WO }
+	IECR 	{ R AT91C_AIC_IECR 	WO }
+	ISCR 	{ R AT91C_AIC_ISCR 	WO }
+	FFDR 	{ R AT91C_AIC_FFDR 	WO }
+	CISR 	{ R AT91C_AIC_CISR 	RO }
+	IDCR 	{ R AT91C_AIC_IDCR 	WO }
+	SPU 	{ R AT91C_AIC_SPU 	RW }
+	listeReg 	{ IVR SMR FVR DCR EOICR SVR FFSR ICCR ISR IMR IPR FFER IECR ISCR FFDR CISR IDCR SPU  }
+
+}
+
+# ========== Peripheral attributes for TWI peripheral ========== 
+array set TWI_att {
+	IER 	{ R AT91C_TWI_IER 	WO }
+	CR 	{ R AT91C_TWI_CR 	WO }
+	SR 	{ R AT91C_TWI_SR 	RO }
+	IMR 	{ R AT91C_TWI_IMR 	RO }
+	THR 	{ R AT91C_TWI_THR 	WO }
+	IDR 	{ R AT91C_TWI_IDR 	WO }
+	IADR 	{ R AT91C_TWI_IADR 	RW }
+	MMR 	{ R AT91C_TWI_MMR 	RW }
+	CWGR 	{ R AT91C_TWI_CWGR 	RW }
+	RHR 	{ R AT91C_TWI_RHR 	RO }
+	listeReg 	{ IER CR SR IMR THR IDR IADR MMR CWGR RHR  }
+
+}
+
+# ========== Peripheral attributes for ADC peripheral ========== 
+array set ADC_att {
+	CDR2 	{ R AT91C_ADC_CDR2 	RO }
+	CDR3 	{ R AT91C_ADC_CDR3 	RO }
+	CDR0 	{ R AT91C_ADC_CDR0 	RO }
+	CDR5 	{ R AT91C_ADC_CDR5 	RO }
+	CHDR 	{ R AT91C_ADC_CHDR 	WO }
+	SR 	{ R AT91C_ADC_SR 	RO }
+	CDR4 	{ R AT91C_ADC_CDR4 	RO }
+	CDR1 	{ R AT91C_ADC_CDR1 	RO }
+	LCDR 	{ R AT91C_ADC_LCDR 	RO }
+	IDR 	{ R AT91C_ADC_IDR 	WO }
+	CR 	{ R AT91C_ADC_CR 	WO }
+	CDR7 	{ R AT91C_ADC_CDR7 	RO }
+	CDR6 	{ R AT91C_ADC_CDR6 	RO }
+	IER 	{ R AT91C_ADC_IER 	WO }
+	CHER 	{ R AT91C_ADC_CHER 	WO }
+	CHSR 	{ R AT91C_ADC_CHSR 	RO }
+	MR 	{ R AT91C_ADC_MR 	RW }
+	IMR 	{ R AT91C_ADC_IMR 	RO }
+	listeReg 	{ CDR2 CDR3 CDR0 CDR5 CHDR SR CDR4 CDR1 LCDR IDR CR CDR7 CDR6 IER CHER CHSR MR IMR  }
+
+}
+
+# ========== Peripheral attributes for PWMC_CH peripheral ========== 
+array set PWMC_CH3_att {
+	CUPDR 	{ R AT91C_PWMC_CH3_CUPDR 	WO }
+	Reserved 	{ R AT91C_PWMC_CH3_Reserved 	WO }
+	CPRDR 	{ R AT91C_PWMC_CH3_CPRDR 	RW }
+	CDTYR 	{ R AT91C_PWMC_CH3_CDTYR 	RW }
+	CCNTR 	{ R AT91C_PWMC_CH3_CCNTR 	RO }
+	CMR 	{ R AT91C_PWMC_CH3_CMR 	RW }
+	listeReg 	{ CUPDR Reserved CPRDR CDTYR CCNTR CMR  }
+
+}
+array set PWMC_CH2_att {
+	Reserved 	{ R AT91C_PWMC_CH2_Reserved 	WO }
+	CMR 	{ R AT91C_PWMC_CH2_CMR 	RW }
+	CCNTR 	{ R AT91C_PWMC_CH2_CCNTR 	RO }
+	CPRDR 	{ R AT91C_PWMC_CH2_CPRDR 	RW }
+	CUPDR 	{ R AT91C_PWMC_CH2_CUPDR 	WO }
+	CDTYR 	{ R AT91C_PWMC_CH2_CDTYR 	RW }
+	listeReg 	{ Reserved CMR CCNTR CPRDR CUPDR CDTYR  }
+
+}
+array set PWMC_CH1_att {
+	Reserved 	{ R AT91C_PWMC_CH1_Reserved 	WO }
+	CUPDR 	{ R AT91C_PWMC_CH1_CUPDR 	WO }
+	CPRDR 	{ R AT91C_PWMC_CH1_CPRDR 	RW }
+	CCNTR 	{ R AT91C_PWMC_CH1_CCNTR 	RO }
+	CDTYR 	{ R AT91C_PWMC_CH1_CDTYR 	RW }
+	CMR 	{ R AT91C_PWMC_CH1_CMR 	RW }
+	listeReg 	{ Reserved CUPDR CPRDR CCNTR CDTYR CMR  }
+
+}
+array set PWMC_CH0_att {
+	Reserved 	{ R AT91C_PWMC_CH0_Reserved 	WO }
+	CPRDR 	{ R AT91C_PWMC_CH0_CPRDR 	RW }
+	CDTYR 	{ R AT91C_PWMC_CH0_CDTYR 	RW }
+	CMR 	{ R AT91C_PWMC_CH0_CMR 	RW }
+	CUPDR 	{ R AT91C_PWMC_CH0_CUPDR 	WO }
+	CCNTR 	{ R AT91C_PWMC_CH0_CCNTR 	RO }
+	listeReg 	{ Reserved CPRDR CDTYR CMR CUPDR CCNTR  }
+
+}
+
+# ========== Peripheral attributes for RTTC peripheral ========== 
+array set RTTC_att {
+	RTSR 	{ R AT91C_RTTC_RTSR 	RO }
+	RTMR 	{ R AT91C_RTTC_RTMR 	RW }
+	RTVR 	{ R AT91C_RTTC_RTVR 	RO }
+	RTAR 	{ R AT91C_RTTC_RTAR 	RW }
+	listeReg 	{ RTSR RTMR RTVR RTAR  }
+
+}
+
+# ========== Peripheral attributes for UDP peripheral ========== 
+array set UDP_att {
+	IMR 	{ R AT91C_UDP_IMR 	RO }
+	FADDR 	{ R AT91C_UDP_FADDR 	RW }
+	NUM 	{ R AT91C_UDP_NUM 	RO }
+	FDR 	{ R AT91C_UDP_FDR 	RW }
+	ISR 	{ R AT91C_UDP_ISR 	RO }
+	CSR 	{ R AT91C_UDP_CSR 	RW }
+	IDR 	{ R AT91C_UDP_IDR 	WO }
+	ICR 	{ R AT91C_UDP_ICR 	RO }
+	RSTEP 	{ R AT91C_UDP_RSTEP 	RO }
+	TXVC 	{ R AT91C_UDP_TXVC 	RW }
+	GLBSTATE 	{ R AT91C_UDP_GLBSTATE 	RW }
+	IER 	{ R AT91C_UDP_IER 	WO }
+	listeReg 	{ IMR FADDR NUM FDR ISR CSR IDR ICR RSTEP TXVC GLBSTATE IER  }
+
+}
+
+# ========== Peripheral attributes for EMAC peripheral ========== 
+array set EMAC_att {
+	ISR 	{ R AT91C_EMAC_ISR 	RW }
+	SA4H 	{ R AT91C_EMAC_SA4H 	RW }
+	SA1L 	{ R AT91C_EMAC_SA1L 	RW }
+	ELE 	{ R AT91C_EMAC_ELE 	RW }
+	LCOL 	{ R AT91C_EMAC_LCOL 	RW }
+	RLE 	{ R AT91C_EMAC_RLE 	RW }
+	WOL 	{ R AT91C_EMAC_WOL 	RW }
+	DTF 	{ R AT91C_EMAC_DTF 	RW }
+	TUND 	{ R AT91C_EMAC_TUND 	RW }
+	NCR 	{ R AT91C_EMAC_NCR 	RW }
+	SA4L 	{ R AT91C_EMAC_SA4L 	RW }
+	RSR 	{ R AT91C_EMAC_RSR 	RW }
+	SA3L 	{ R AT91C_EMAC_SA3L 	RW }
+	TSR 	{ R AT91C_EMAC_TSR 	RW }
+	IDR 	{ R AT91C_EMAC_IDR 	WO }
+	RSE 	{ R AT91C_EMAC_RSE 	RW }
+	ECOL 	{ R AT91C_EMAC_ECOL 	RW }
+	TID 	{ R AT91C_EMAC_TID 	RW }
+	HRB 	{ R AT91C_EMAC_HRB 	RW }
+	TBQP 	{ R AT91C_EMAC_TBQP 	RW }
+	USRIO 	{ R AT91C_EMAC_USRIO 	RW }
+	PTR 	{ R AT91C_EMAC_PTR 	RW }
+	SA2H 	{ R AT91C_EMAC_SA2H 	RW }
+	ROV 	{ R AT91C_EMAC_ROV 	RW }
+	ALE 	{ R AT91C_EMAC_ALE 	RW }
+	RJA 	{ R AT91C_EMAC_RJA 	RW }
+	RBQP 	{ R AT91C_EMAC_RBQP 	RW }
+	TPF 	{ R AT91C_EMAC_TPF 	RW }
+	NCFGR 	{ R AT91C_EMAC_NCFGR 	RW }
+	HRT 	{ R AT91C_EMAC_HRT 	RW }
+	USF 	{ R AT91C_EMAC_USF 	RW }
+	FCSE 	{ R AT91C_EMAC_FCSE 	RW }
+	TPQ 	{ R AT91C_EMAC_TPQ 	RW }
+	MAN 	{ R AT91C_EMAC_MAN 	RW }
+	FTO 	{ R AT91C_EMAC_FTO 	RW }
+	REV 	{ R AT91C_EMAC_REV 	RO }
+	IMR 	{ R AT91C_EMAC_IMR 	RO }
+	SCF 	{ R AT91C_EMAC_SCF 	RW }
+	PFR 	{ R AT91C_EMAC_PFR 	RW }
+	MCF 	{ R AT91C_EMAC_MCF 	RW }
+	NSR 	{ R AT91C_EMAC_NSR 	RO }
+	SA2L 	{ R AT91C_EMAC_SA2L 	RW }
+	FRO 	{ R AT91C_EMAC_FRO 	RW }
+	IER 	{ R AT91C_EMAC_IER 	WO }
+	SA1H 	{ R AT91C_EMAC_SA1H 	RW }
+	CSE 	{ R AT91C_EMAC_CSE 	RW }
+	SA3H 	{ R AT91C_EMAC_SA3H 	RW }
+	RRE 	{ R AT91C_EMAC_RRE 	RW }
+	STE 	{ R AT91C_EMAC_STE 	RW }
+	listeReg 	{ ISR SA4H SA1L ELE LCOL RLE WOL DTF TUND NCR SA4L RSR SA3L TSR IDR RSE ECOL TID HRB TBQP USRIO PTR SA2H ROV ALE RJA RBQP TPF NCFGR HRT USF FCSE TPQ MAN FTO REV IMR SCF PFR MCF NSR SA2L FRO IER SA1H CSE SA3H RRE STE  }
+
+}
+
+# ========== Peripheral attributes for CAN_MB peripheral ========== 
+array set CAN_MB0_att {
+	MDL 	{ R AT91C_CAN_MB0_MDL 	RW }
+	MAM 	{ R AT91C_CAN_MB0_MAM 	RW }
+	MCR 	{ R AT91C_CAN_MB0_MCR 	WO }
+	MID 	{ R AT91C_CAN_MB0_MID 	RW }
+	MSR 	{ R AT91C_CAN_MB0_MSR 	RO }
+	MFID 	{ R AT91C_CAN_MB0_MFID 	RO }
+	MDH 	{ R AT91C_CAN_MB0_MDH 	RW }
+	MMR 	{ R AT91C_CAN_MB0_MMR 	RW }
+	listeReg 	{ MDL MAM MCR MID MSR MFID MDH MMR  }
+
+}
+array set CAN_MB1_att {
+	MDL 	{ R AT91C_CAN_MB1_MDL 	RW }
+	MID 	{ R AT91C_CAN_MB1_MID 	RW }
+	MMR 	{ R AT91C_CAN_MB1_MMR 	RW }
+	MSR 	{ R AT91C_CAN_MB1_MSR 	RO }
+	MAM 	{ R AT91C_CAN_MB1_MAM 	RW }
+	MDH 	{ R AT91C_CAN_MB1_MDH 	RW }
+	MCR 	{ R AT91C_CAN_MB1_MCR 	WO }
+	MFID 	{ R AT91C_CAN_MB1_MFID 	RO }
+	listeReg 	{ MDL MID MMR MSR MAM MDH MCR MFID  }
+
+}
+array set CAN_MB2_att {
+	MCR 	{ R AT91C_CAN_MB2_MCR 	WO }
+	MDH 	{ R AT91C_CAN_MB2_MDH 	RW }
+	MID 	{ R AT91C_CAN_MB2_MID 	RW }
+	MDL 	{ R AT91C_CAN_MB2_MDL 	RW }
+	MMR 	{ R AT91C_CAN_MB2_MMR 	RW }
+	MAM 	{ R AT91C_CAN_MB2_MAM 	RW }
+	MFID 	{ R AT91C_CAN_MB2_MFID 	RO }
+	MSR 	{ R AT91C_CAN_MB2_MSR 	RO }
+	listeReg 	{ MCR MDH MID MDL MMR MAM MFID MSR  }
+
+}
+array set CAN_MB3_att {
+	MFID 	{ R AT91C_CAN_MB3_MFID 	RO }
+	MAM 	{ R AT91C_CAN_MB3_MAM 	RW }
+	MID 	{ R AT91C_CAN_MB3_MID 	RW }
+	MCR 	{ R AT91C_CAN_MB3_MCR 	WO }
+	MMR 	{ R AT91C_CAN_MB3_MMR 	RW }
+	MSR 	{ R AT91C_CAN_MB3_MSR 	RO }
+	MDL 	{ R AT91C_CAN_MB3_MDL 	RW }
+	MDH 	{ R AT91C_CAN_MB3_MDH 	RW }
+	listeReg 	{ MFID MAM MID MCR MMR MSR MDL MDH  }
+
+}
+array set CAN_MB4_att {
+	MID 	{ R AT91C_CAN_MB4_MID 	RW }
+	MMR 	{ R AT91C_CAN_MB4_MMR 	RW }
+	MDH 	{ R AT91C_CAN_MB4_MDH 	RW }
+	MFID 	{ R AT91C_CAN_MB4_MFID 	RO }
+	MSR 	{ R AT91C_CAN_MB4_MSR 	RO }
+	MCR 	{ R AT91C_CAN_MB4_MCR 	WO }
+	MDL 	{ R AT91C_CAN_MB4_MDL 	RW }
+	MAM 	{ R AT91C_CAN_MB4_MAM 	RW }
+	listeReg 	{ MID MMR MDH MFID MSR MCR MDL MAM  }
+
+}
+array set CAN_MB5_att {
+	MSR 	{ R AT91C_CAN_MB5_MSR 	RO }
+	MCR 	{ R AT91C_CAN_MB5_MCR 	WO }
+	MFID 	{ R AT91C_CAN_MB5_MFID 	RO }
+	MDH 	{ R AT91C_CAN_MB5_MDH 	RW }
+	MID 	{ R AT91C_CAN_MB5_MID 	RW }
+	MMR 	{ R AT91C_CAN_MB5_MMR 	RW }
+	MDL 	{ R AT91C_CAN_MB5_MDL 	RW }
+	MAM 	{ R AT91C_CAN_MB5_MAM 	RW }
+	listeReg 	{ MSR MCR MFID MDH MID MMR MDL MAM  }
+
+}
+array set CAN_MB6_att {
+	MFID 	{ R AT91C_CAN_MB6_MFID 	RO }
+	MID 	{ R AT91C_CAN_MB6_MID 	RW }
+	MAM 	{ R AT91C_CAN_MB6_MAM 	RW }
+	MSR 	{ R AT91C_CAN_MB6_MSR 	RO }
+	MDL 	{ R AT91C_CAN_MB6_MDL 	RW }
+	MCR 	{ R AT91C_CAN_MB6_MCR 	WO }
+	MDH 	{ R AT91C_CAN_MB6_MDH 	RW }
+	MMR 	{ R AT91C_CAN_MB6_MMR 	RW }
+	listeReg 	{ MFID MID MAM MSR MDL MCR MDH MMR  }
+
+}
+array set CAN_MB7_att {
+	MCR 	{ R AT91C_CAN_MB7_MCR 	WO }
+	MDH 	{ R AT91C_CAN_MB7_MDH 	RW }
+	MFID 	{ R AT91C_CAN_MB7_MFID 	RO }
+	MDL 	{ R AT91C_CAN_MB7_MDL 	RW }
+	MID 	{ R AT91C_CAN_MB7_MID 	RW }
+	MMR 	{ R AT91C_CAN_MB7_MMR 	RW }
+	MAM 	{ R AT91C_CAN_MB7_MAM 	RW }
+	MSR 	{ R AT91C_CAN_MB7_MSR 	RO }
+	listeReg 	{ MCR MDH MFID MDL MID MMR MAM MSR  }
+
+}
+
+# ========== Peripheral attributes for TC peripheral ========== 
+array set TC0_att {
+	SR 	{ R AT91C_TC0_SR 	RO }
+	RC 	{ R AT91C_TC0_RC 	RW }
+	RB 	{ R AT91C_TC0_RB 	RW }
+	CCR 	{ R AT91C_TC0_CCR 	WO }
+	CMR 	{ R AT91C_TC0_CMR 	RW }
+	IER 	{ R AT91C_TC0_IER 	WO }
+	RA 	{ R AT91C_TC0_RA 	RW }
+	IDR 	{ R AT91C_TC0_IDR 	WO }
+	CV 	{ R AT91C_TC0_CV 	RW }
+	IMR 	{ R AT91C_TC0_IMR 	RO }
+	listeReg 	{ SR RC RB CCR CMR IER RA IDR CV IMR  }
+
+}
+array set TC1_att {
+	RB 	{ R AT91C_TC1_RB 	RW }
+	CCR 	{ R AT91C_TC1_CCR 	WO }
+	IER 	{ R AT91C_TC1_IER 	WO }
+	IDR 	{ R AT91C_TC1_IDR 	WO }
+	SR 	{ R AT91C_TC1_SR 	RO }
+	CMR 	{ R AT91C_TC1_CMR 	RW }
+	RA 	{ R AT91C_TC1_RA 	RW }
+	RC 	{ R AT91C_TC1_RC 	RW }
+	IMR 	{ R AT91C_TC1_IMR 	RO }
+	CV 	{ R AT91C_TC1_CV 	RW }
+	listeReg 	{ RB CCR IER IDR SR CMR RA RC IMR CV  }
+
+}
+array set TC2_att {
+	CMR 	{ R AT91C_TC2_CMR 	RW }
+	CCR 	{ R AT91C_TC2_CCR 	WO }
+	CV 	{ R AT91C_TC2_CV 	RW }
+	RA 	{ R AT91C_TC2_RA 	RW }
+	RB 	{ R AT91C_TC2_RB 	RW }
+	IDR 	{ R AT91C_TC2_IDR 	WO }
+	IMR 	{ R AT91C_TC2_IMR 	RO }
+	RC 	{ R AT91C_TC2_RC 	RW }
+	IER 	{ R AT91C_TC2_IER 	WO }
+	SR 	{ R AT91C_TC2_SR 	RO }
+	listeReg 	{ CMR CCR CV RA RB IDR IMR RC IER SR  }
+
+}
+
+# ========== Peripheral attributes for SYS peripheral ========== 
+array set SYS_att {
+	listeReg 	{  }
+
+}
+
+# ========== Peripheral attributes for MC peripheral ========== 
+array set MC_att {
+	ASR 	{ R AT91C_MC_ASR 	RO }
+	RCR 	{ R AT91C_MC_RCR 	WO }
+	FCR 	{ R AT91C_MC_FCR 	WO }
+	AASR 	{ R AT91C_MC_AASR 	RO }
+	FSR 	{ R AT91C_MC_FSR 	RO }
+	FMR 	{ R AT91C_MC_FMR 	RW }
+	listeReg 	{ ASR RCR FCR AASR FSR FMR  }
+
+}
+
+# ========== Peripheral attributes for PIO peripheral ========== 
+array set PIOA_att {
+	ODR 	{ R AT91C_PIOA_ODR 	WO }
+	SODR 	{ R AT91C_PIOA_SODR 	WO }
+	ISR 	{ R AT91C_PIOA_ISR 	RO }
+	ABSR 	{ R AT91C_PIOA_ABSR 	RO }
+	IER 	{ R AT91C_PIOA_IER 	WO }
+	PPUDR 	{ R AT91C_PIOA_PPUDR 	WO }
+	IMR 	{ R AT91C_PIOA_IMR 	RO }
+	PER 	{ R AT91C_PIOA_PER 	WO }
+	IFDR 	{ R AT91C_PIOA_IFDR 	WO }
+	OWDR 	{ R AT91C_PIOA_OWDR 	WO }
+	MDSR 	{ R AT91C_PIOA_MDSR 	RO }
+	IDR 	{ R AT91C_PIOA_IDR 	WO }
+	ODSR 	{ R AT91C_PIOA_ODSR 	RO }
+	PPUSR 	{ R AT91C_PIOA_PPUSR 	RO }
+	OWSR 	{ R AT91C_PIOA_OWSR 	RO }
+	BSR 	{ R AT91C_PIOA_BSR 	WO }
+	OWER 	{ R AT91C_PIOA_OWER 	WO }
+	IFER 	{ R AT91C_PIOA_IFER 	WO }
+	PDSR 	{ R AT91C_PIOA_PDSR 	RO }
+	PPUER 	{ R AT91C_PIOA_PPUER 	WO }
+	OSR 	{ R AT91C_PIOA_OSR 	RO }
+	ASR 	{ R AT91C_PIOA_ASR 	WO }
+	MDDR 	{ R AT91C_PIOA_MDDR 	WO }
+	CODR 	{ R AT91C_PIOA_CODR 	WO }
+	MDER 	{ R AT91C_PIOA_MDER 	WO }
+	PDR 	{ R AT91C_PIOA_PDR 	WO }
+	IFSR 	{ R AT91C_PIOA_IFSR 	RO }
+	OER 	{ R AT91C_PIOA_OER 	WO }
+	PSR 	{ R AT91C_PIOA_PSR 	RO }
+	listeReg 	{ ODR SODR ISR ABSR IER PPUDR IMR PER IFDR OWDR MDSR IDR ODSR PPUSR OWSR BSR OWER IFER PDSR PPUER OSR ASR MDDR CODR MDER PDR IFSR OER PSR  }
+
+}
+array set PIOB_att {
+	OWDR 	{ R AT91C_PIOB_OWDR 	WO }
+	MDER 	{ R AT91C_PIOB_MDER 	WO }
+	PPUSR 	{ R AT91C_PIOB_PPUSR 	RO }
+	IMR 	{ R AT91C_PIOB_IMR 	RO }
+	ASR 	{ R AT91C_PIOB_ASR 	WO }
+	PPUDR 	{ R AT91C_PIOB_PPUDR 	WO }
+	PSR 	{ R AT91C_PIOB_PSR 	RO }
+	IER 	{ R AT91C_PIOB_IER 	WO }
+	CODR 	{ R AT91C_PIOB_CODR 	WO }
+	OWER 	{ R AT91C_PIOB_OWER 	WO }
+	ABSR 	{ R AT91C_PIOB_ABSR 	RO }
+	IFDR 	{ R AT91C_PIOB_IFDR 	WO }
+	PDSR 	{ R AT91C_PIOB_PDSR 	RO }
+	IDR 	{ R AT91C_PIOB_IDR 	WO }
+	OWSR 	{ R AT91C_PIOB_OWSR 	RO }
+	PDR 	{ R AT91C_PIOB_PDR 	WO }
+	ODR 	{ R AT91C_PIOB_ODR 	WO }
+	IFSR 	{ R AT91C_PIOB_IFSR 	RO }
+	PPUER 	{ R AT91C_PIOB_PPUER 	WO }
+	SODR 	{ R AT91C_PIOB_SODR 	WO }
+	ISR 	{ R AT91C_PIOB_ISR 	RO }
+	ODSR 	{ R AT91C_PIOB_ODSR 	RO }
+	OSR 	{ R AT91C_PIOB_OSR 	RO }
+	MDSR 	{ R AT91C_PIOB_MDSR 	RO }
+	IFER 	{ R AT91C_PIOB_IFER 	WO }
+	BSR 	{ R AT91C_PIOB_BSR 	WO }
+	MDDR 	{ R AT91C_PIOB_MDDR 	WO }
+	OER 	{ R AT91C_PIOB_OER 	WO }
+	PER 	{ R AT91C_PIOB_PER 	WO }
+	listeReg 	{ OWDR MDER PPUSR IMR ASR PPUDR PSR IER CODR OWER ABSR IFDR PDSR IDR OWSR PDR ODR IFSR PPUER SODR ISR ODSR OSR MDSR IFER BSR MDDR OER PER  }
+
+}
+
+# ========== Peripheral attributes for CAN peripheral ========== 
+array set CAN_att {
+	TCR 	{ R AT91C_CAN_TCR 	WO }
+	IMR 	{ R AT91C_CAN_IMR 	RO }
+	IER 	{ R AT91C_CAN_IER 	WO }
+	ECR 	{ R AT91C_CAN_ECR 	RO }
+	TIMESTP 	{ R AT91C_CAN_TIMESTP 	RO }
+	MR 	{ R AT91C_CAN_MR 	RW }
+	IDR 	{ R AT91C_CAN_IDR 	WO }
+	ACR 	{ R AT91C_CAN_ACR 	WO }
+	TIM 	{ R AT91C_CAN_TIM 	RO }
+	SR 	{ R AT91C_CAN_SR 	RO }
+	BR 	{ R AT91C_CAN_BR 	RW }
+	VR 	{ R AT91C_CAN_VR 	RO }
+	listeReg 	{ TCR IMR IER ECR TIMESTP MR IDR ACR TIM SR BR VR  }
+
+}
+
+# ========== Peripheral attributes for PWMC peripheral ========== 
+array set PWMC_att {
+	IDR 	{ R AT91C_PWMC_IDR 	WO }
+	DIS 	{ R AT91C_PWMC_DIS 	WO }
+	IER 	{ R AT91C_PWMC_IER 	WO }
+	VR 	{ R AT91C_PWMC_VR 	RO }
+	ISR 	{ R AT91C_PWMC_ISR 	RO }
+	SR 	{ R AT91C_PWMC_SR 	RO }
+	IMR 	{ R AT91C_PWMC_IMR 	RO }
+	MR 	{ R AT91C_PWMC_MR 	RW }
+	ENA 	{ R AT91C_PWMC_ENA 	WO }
+	listeReg 	{ IDR DIS IER VR ISR SR IMR MR ENA  }
+
+}
+
+# ========== Peripheral attributes for PDC peripheral ========== 
+array set PDC_DBGU_att {
+	TCR 	{ R AT91C_DBGU_TCR 	RW }
+	RNPR 	{ R AT91C_DBGU_RNPR 	RW }
+	TNPR 	{ R AT91C_DBGU_TNPR 	RW }
+	TPR 	{ R AT91C_DBGU_TPR 	RW }
+	RPR 	{ R AT91C_DBGU_RPR 	RW }
+	RCR 	{ R AT91C_DBGU_RCR 	RW }
+	RNCR 	{ R AT91C_DBGU_RNCR 	RW }
+	PTCR 	{ R AT91C_DBGU_PTCR 	WO }
+	PTSR 	{ R AT91C_DBGU_PTSR 	RO }
+	TNCR 	{ R AT91C_DBGU_TNCR 	RW }
+	listeReg 	{ TCR RNPR TNPR TPR RPR RCR RNCR PTCR PTSR TNCR  }
+
+}
+array set PDC_SPI1_att {
+	PTCR 	{ R AT91C_SPI1_PTCR 	WO }
+	RPR 	{ R AT91C_SPI1_RPR 	RW }
+	TNCR 	{ R AT91C_SPI1_TNCR 	RW }
+	TPR 	{ R AT91C_SPI1_TPR 	RW }
+	TNPR 	{ R AT91C_SPI1_TNPR 	RW }
+	TCR 	{ R AT91C_SPI1_TCR 	RW }
+	RCR 	{ R AT91C_SPI1_RCR 	RW }
+	RNPR 	{ R AT91C_SPI1_RNPR 	RW }
+	RNCR 	{ R AT91C_SPI1_RNCR 	RW }
+	PTSR 	{ R AT91C_SPI1_PTSR 	RO }
+	listeReg 	{ PTCR RPR TNCR TPR TNPR TCR RCR RNPR RNCR PTSR  }
+
+}
+array set PDC_SPI0_att {
+	PTCR 	{ R AT91C_SPI0_PTCR 	WO }
+	TPR 	{ R AT91C_SPI0_TPR 	RW }
+	TCR 	{ R AT91C_SPI0_TCR 	RW }
+	RCR 	{ R AT91C_SPI0_RCR 	RW }
+	PTSR 	{ R AT91C_SPI0_PTSR 	RO }
+	RNPR 	{ R AT91C_SPI0_RNPR 	RW }
+	RPR 	{ R AT91C_SPI0_RPR 	RW }
+	TNCR 	{ R AT91C_SPI0_TNCR 	RW }
+	RNCR 	{ R AT91C_SPI0_RNCR 	RW }
+	TNPR 	{ R AT91C_SPI0_TNPR 	RW }
+	listeReg 	{ PTCR TPR TCR RCR PTSR RNPR RPR TNCR RNCR TNPR  }
+
+}
+array set PDC_US1_att {
+	RNCR 	{ R AT91C_US1_RNCR 	RW }
+	PTCR 	{ R AT91C_US1_PTCR 	WO }
+	TCR 	{ R AT91C_US1_TCR 	RW }
+	PTSR 	{ R AT91C_US1_PTSR 	RO }
+	TNPR 	{ R AT91C_US1_TNPR 	RW }
+	RCR 	{ R AT91C_US1_RCR 	RW }
+	RNPR 	{ R AT91C_US1_RNPR 	RW }
+	RPR 	{ R AT91C_US1_RPR 	RW }
+	TNCR 	{ R AT91C_US1_TNCR 	RW }
+	TPR 	{ R AT91C_US1_TPR 	RW }
+	listeReg 	{ RNCR PTCR TCR PTSR TNPR RCR RNPR RPR TNCR TPR  }
+
+}
+array set PDC_US0_att {
+	TNPR 	{ R AT91C_US0_TNPR 	RW }
+	RNPR 	{ R AT91C_US0_RNPR 	RW }
+	TCR 	{ R AT91C_US0_TCR 	RW }
+	PTCR 	{ R AT91C_US0_PTCR 	WO }
+	PTSR 	{ R AT91C_US0_PTSR 	RO }
+	TNCR 	{ R AT91C_US0_TNCR 	RW }
+	TPR 	{ R AT91C_US0_TPR 	RW }
+	RCR 	{ R AT91C_US0_RCR 	RW }
+	RPR 	{ R AT91C_US0_RPR 	RW }
+	RNCR 	{ R AT91C_US0_RNCR 	RW }
+	listeReg 	{ TNPR RNPR TCR PTCR PTSR TNCR TPR RCR RPR RNCR  }
+
+}
+array set PDC_SSC_att {
+	TNCR 	{ R AT91C_SSC_TNCR 	RW }
+	RPR 	{ R AT91C_SSC_RPR 	RW }
+	RNCR 	{ R AT91C_SSC_RNCR 	RW }
+	TPR 	{ R AT91C_SSC_TPR 	RW }
+	PTCR 	{ R AT91C_SSC_PTCR 	WO }
+	TCR 	{ R AT91C_SSC_TCR 	RW }
+	RCR 	{ R AT91C_SSC_RCR 	RW }
+	RNPR 	{ R AT91C_SSC_RNPR 	RW }
+	TNPR 	{ R AT91C_SSC_TNPR 	RW }
+	PTSR 	{ R AT91C_SSC_PTSR 	RO }
+	listeReg 	{ TNCR RPR RNCR TPR PTCR TCR RCR RNPR TNPR PTSR  }
+
+}
+array set PDC_ADC_att {
+	PTSR 	{ R AT91C_ADC_PTSR 	RO }
+	PTCR 	{ R AT91C_ADC_PTCR 	WO }
+	TNPR 	{ R AT91C_ADC_TNPR 	RW }
+	TNCR 	{ R AT91C_ADC_TNCR 	RW }
+	RNPR 	{ R AT91C_ADC_RNPR 	RW }
+	RNCR 	{ R AT91C_ADC_RNCR 	RW }
+	RPR 	{ R AT91C_ADC_RPR 	RW }
+	TCR 	{ R AT91C_ADC_TCR 	RW }
+	TPR 	{ R AT91C_ADC_TPR 	RW }
+	RCR 	{ R AT91C_ADC_RCR 	RW }
+	listeReg 	{ PTSR PTCR TNPR TNCR RNPR RNCR RPR TCR TPR RCR  }
+
+}
+
+# ========== PIO information ========== 
+
+array set def_PIOA_att {
+ 	PA0 	{  RXD0  }
+ 	PA1 	{  TXD0  }
+ 	PA10 	{  TWD  }
+ 	PA11 	{  TWCK  }
+ 	PA12 	{  SPI0_NPCS0  }
+ 	PA13 	{  SPI0_NPCS1   PCK1  }
+ 	PA14 	{  SPI0_NPCS2   IRQ1  }
+ 	PA15 	{  SPI0_NPCS3   TCLK2  }
+ 	PA16 	{  SPI0_MISO  }
+ 	PA17 	{  SPI0_MOSI  }
+ 	PA18 	{  SPI0_SPCK  }
+ 	PA19 	{  CANRX  }
+ 	PA2 	{  SCK0   SPI1_NPCS1  }
+ 	PA20 	{  CANTX  }
+ 	PA21 	{  TF   SPI1_NPCS0  }
+ 	PA22 	{  TK   SPI1_SPCK  }
+ 	PA23 	{  TD   SPI1_MOSI  }
+ 	PA24 	{  RD   SPI1_MISO  }
+ 	PA25 	{  RK   SPI1_NPCS1  }
+ 	PA26 	{  RF   SPI1_NPCS2  }
+ 	PA27 	{  DRXD   PCK3  }
+ 	PA28 	{  DTXD  }
+ 	PA29 	{  FIQ   SPI1_NPCS3  }
+ 	PA3 	{  RTS0   SPI1_NPCS2  }
+ 	PA30 	{  IRQ0   PCK2  }
+ 	PA4 	{  CTS0   SPI1_NPCS3  }
+ 	PA5 	{  RXD1  }
+ 	PA6 	{  TXD1  }
+ 	PA7 	{  SCK1   SPI0_NPCS1  }
+ 	PA8 	{  RTS1   SPI0_NPCS2  }
+ 	PA9 	{  CTS1   SPI0_NPCS3  }
+ }
+
+array set def_PIOB_att {
+ 	PB0 	{  ETXCK_EREFCK   PCK0  }
+ 	PB1 	{  ETXEN  }
+ 	PB10 	{  ETX2   SPI1_NPCS1  }
+ 	PB11 	{  ETX3   SPI1_NPCS2  }
+ 	PB12 	{  ETXER   TCLK0  }
+ 	PB13 	{  ERX2   SPI0_NPCS1  }
+ 	PB14 	{  ERX3   SPI0_NPCS2  }
+ 	PB15 	{  ERXDV_ECRSDV  }
+ 	PB16 	{  ECOL   SPI1_NPCS3  }
+ 	PB17 	{  ERXCK   SPI0_NPCS3  }
+ 	PB18 	{  EF100   ADTRG  }
+ 	PB19 	{  PWM0   TCLK1  }
+ 	PB2 	{  ETX0  }
+ 	PB20 	{  PWM1   PCK0  }
+ 	PB21 	{  PWM2   PCK1  }
+ 	PB22 	{  PWM3   PCK2  }
+ 	PB23 	{  TIOA0   DCD1  }
+ 	PB24 	{  TIOB0   DSR1  }
+ 	PB25 	{  TIOA1   DTR1  }
+ 	PB26 	{  TIOB1   RI1  }
+ 	PB27 	{  TIOA2   PWM0  }
+ 	PB28 	{  TIOB2   PWM1  }
+ 	PB29 	{  PCK1   PWM2  }
+ 	PB3 	{  ETX1  }
+ 	PB30 	{  PCK2   PWM3  }
+ 	PB4 	{  ECRS  }
+ 	PB5 	{  ERX0  }
+ 	PB6 	{  ERX1  }
+ 	PB7 	{  ERXER  }
+ 	PB8 	{  EMDC  }
+ 	PB9 	{  EMDIO  }
+ }
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/incIAR/AT91SAM7X256_inc.h b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/incIAR/AT91SAM7X256_inc.h
new file mode 100644
index 000000000..b393d05a3
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/incIAR/AT91SAM7X256_inc.h
@@ -0,0 +1,2268 @@
+//  ----------------------------------------------------------------------------
+//          ATMEL Microcontroller Software Support  -  ROUSSET  -
+//  ----------------------------------------------------------------------------
+//  DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+//  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+//  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+//  DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+//  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+//  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+//  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+//  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+//  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//  ----------------------------------------------------------------------------
+// File Name           : AT91SAM7X256.h
+// Object              : AT91SAM7X256 definitions
+// Generated           : AT91 SW Application Group  11/02/2005 (15:17:24)
+// 
+// CVS Reference       : /AT91SAM7X256.pl/1.14/Tue Sep 13 15:06:52 2005//
+// CVS Reference       : /SYS_SAM7X.pl/1.3/Tue Feb  1 17:01:43 2005//
+// CVS Reference       : /MC_SAM7X.pl/1.2/Fri May 20 14:13:04 2005//
+// CVS Reference       : /PMC_SAM7X.pl/1.4/Tue Feb  8 13:58:10 2005//
+// CVS Reference       : /RSTC_SAM7X.pl/1.2/Wed Jul 13 14:57:50 2005//
+// CVS Reference       : /UDP_SAM7X.pl/1.1/Tue May 10 11:35:35 2005//
+// CVS Reference       : /PWM_SAM7X.pl/1.1/Tue May 10 11:53:07 2005//
+// CVS Reference       : /AIC_6075B.pl/1.3/Fri May 20 14:01:30 2005//
+// CVS Reference       : /PIO_6057A.pl/1.2/Thu Feb  3 10:18:28 2005//
+// CVS Reference       : /RTTC_6081A.pl/1.2/Tue Nov  9 14:43:58 2004//
+// CVS Reference       : /PITC_6079A.pl/1.2/Tue Nov  9 14:43:56 2004//
+// CVS Reference       : /WDTC_6080A.pl/1.3/Tue Nov  9 14:44:00 2004//
+// CVS Reference       : /VREG_6085B.pl/1.1/Tue Feb  1 16:05:48 2005//
+// CVS Reference       : /PDC_6074C.pl/1.2/Thu Feb  3 08:48:54 2005//
+// CVS Reference       : /DBGU_6059D.pl/1.1/Mon Jan 31 13:15:32 2005//
+// CVS Reference       : /SPI_6088D.pl/1.3/Fri May 20 14:08:59 2005//
+// CVS Reference       : /US_6089C.pl/1.1/Mon Jul 12 18:23:26 2004//
+// CVS Reference       : /SSC_6078B.pl/1.1/Wed Jul 13 15:19:19 2005//
+// CVS Reference       : /TWI_6061A.pl/1.1/Tue Jul 13 07:38:06 2004//
+// CVS Reference       : /TC_6082A.pl/1.7/Fri Mar 11 12:52:17 2005//
+// CVS Reference       : /CAN_6019B.pl/1.1/Tue Mar  8 12:42:22 2005//
+// CVS Reference       : /EMACB_6119A.pl/1.6/Wed Jul 13 15:05:35 2005//
+// CVS Reference       : /ADC_6051C.pl/1.1/Fri Oct 17 09:12:38 2003//
+//  ----------------------------------------------------------------------------
+
+// Hardware register definition
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR System Peripherals
+// *****************************************************************************
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Advanced Interrupt Controller
+// *****************************************************************************
+// *** Register offset in AT91S_AIC structure ***
+#define AIC_SMR         ( 0) // Source Mode Register
+#define AIC_SVR         (128) // Source Vector Register
+#define AIC_IVR         (256) // IRQ Vector Register
+#define AIC_FVR         (260) // FIQ Vector Register
+#define AIC_ISR         (264) // Interrupt Status Register
+#define AIC_IPR         (268) // Interrupt Pending Register
+#define AIC_IMR         (272) // Interrupt Mask Register
+#define AIC_CISR        (276) // Core Interrupt Status Register
+#define AIC_IECR        (288) // Interrupt Enable Command Register
+#define AIC_IDCR        (292) // Interrupt Disable Command Register
+#define AIC_ICCR        (296) // Interrupt Clear Command Register
+#define AIC_ISCR        (300) // Interrupt Set Command Register
+#define AIC_EOICR       (304) // End of Interrupt Command Register
+#define AIC_SPU         (308) // Spurious Vector Register
+#define AIC_DCR         (312) // Debug Control Register (Protect)
+#define AIC_FFER        (320) // Fast Forcing Enable Register
+#define AIC_FFDR        (324) // Fast Forcing Disable Register
+#define AIC_FFSR        (328) // Fast Forcing Status Register
+// -------- AIC_SMR : (AIC Offset: 0x0) Control Register -------- 
+#define AT91C_AIC_PRIOR           (0x7 <<  0) // (AIC) Priority Level
+#define 	AT91C_AIC_PRIOR_LOWEST               (0x0) // (AIC) Lowest priority level
+#define 	AT91C_AIC_PRIOR_HIGHEST              (0x7) // (AIC) Highest priority level
+#define AT91C_AIC_SRCTYPE         (0x3 <<  5) // (AIC) Interrupt Source Type
+#define 	AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL       (0x0 <<  5) // (AIC) Internal Sources Code Label High-level Sensitive
+#define 	AT91C_AIC_SRCTYPE_EXT_LOW_LEVEL        (0x0 <<  5) // (AIC) External Sources Code Label Low-level Sensitive
+#define 	AT91C_AIC_SRCTYPE_INT_POSITIVE_EDGE    (0x1 <<  5) // (AIC) Internal Sources Code Label Positive Edge triggered
+#define 	AT91C_AIC_SRCTYPE_EXT_NEGATIVE_EDGE    (0x1 <<  5) // (AIC) External Sources Code Label Negative Edge triggered
+#define 	AT91C_AIC_SRCTYPE_HIGH_LEVEL           (0x2 <<  5) // (AIC) Internal Or External Sources Code Label High-level Sensitive
+#define 	AT91C_AIC_SRCTYPE_POSITIVE_EDGE        (0x3 <<  5) // (AIC) Internal Or External Sources Code Label Positive Edge triggered
+// -------- AIC_CISR : (AIC Offset: 0x114) AIC Core Interrupt Status Register -------- 
+#define AT91C_AIC_NFIQ            (0x1 <<  0) // (AIC) NFIQ Status
+#define AT91C_AIC_NIRQ            (0x1 <<  1) // (AIC) NIRQ Status
+// -------- AIC_DCR : (AIC Offset: 0x138) AIC Debug Control Register (Protect) -------- 
+#define AT91C_AIC_DCR_PROT        (0x1 <<  0) // (AIC) Protection Mode
+#define AT91C_AIC_DCR_GMSK        (0x1 <<  1) // (AIC) General Mask
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Peripheral DMA Controller
+// *****************************************************************************
+// *** Register offset in AT91S_PDC structure ***
+#define PDC_RPR         ( 0) // Receive Pointer Register
+#define PDC_RCR         ( 4) // Receive Counter Register
+#define PDC_TPR         ( 8) // Transmit Pointer Register
+#define PDC_TCR         (12) // Transmit Counter Register
+#define PDC_RNPR        (16) // Receive Next Pointer Register
+#define PDC_RNCR        (20) // Receive Next Counter Register
+#define PDC_TNPR        (24) // Transmit Next Pointer Register
+#define PDC_TNCR        (28) // Transmit Next Counter Register
+#define PDC_PTCR        (32) // PDC Transfer Control Register
+#define PDC_PTSR        (36) // PDC Transfer Status Register
+// -------- PDC_PTCR : (PDC Offset: 0x20) PDC Transfer Control Register -------- 
+#define AT91C_PDC_RXTEN           (0x1 <<  0) // (PDC) Receiver Transfer Enable
+#define AT91C_PDC_RXTDIS          (0x1 <<  1) // (PDC) Receiver Transfer Disable
+#define AT91C_PDC_TXTEN           (0x1 <<  8) // (PDC) Transmitter Transfer Enable
+#define AT91C_PDC_TXTDIS          (0x1 <<  9) // (PDC) Transmitter Transfer Disable
+// -------- PDC_PTSR : (PDC Offset: 0x24) PDC Transfer Status Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Debug Unit
+// *****************************************************************************
+// *** Register offset in AT91S_DBGU structure ***
+#define DBGU_CR         ( 0) // Control Register
+#define DBGU_MR         ( 4) // Mode Register
+#define DBGU_IER        ( 8) // Interrupt Enable Register
+#define DBGU_IDR        (12) // Interrupt Disable Register
+#define DBGU_IMR        (16) // Interrupt Mask Register
+#define DBGU_CSR        (20) // Channel Status Register
+#define DBGU_RHR        (24) // Receiver Holding Register
+#define DBGU_THR        (28) // Transmitter Holding Register
+#define DBGU_BRGR       (32) // Baud Rate Generator Register
+#define DBGU_CIDR       (64) // Chip ID Register
+#define DBGU_EXID       (68) // Chip ID Extension Register
+#define DBGU_FNTR       (72) // Force NTRST Register
+#define DBGU_RPR        (256) // Receive Pointer Register
+#define DBGU_RCR        (260) // Receive Counter Register
+#define DBGU_TPR        (264) // Transmit Pointer Register
+#define DBGU_TCR        (268) // Transmit Counter Register
+#define DBGU_RNPR       (272) // Receive Next Pointer Register
+#define DBGU_RNCR       (276) // Receive Next Counter Register
+#define DBGU_TNPR       (280) // Transmit Next Pointer Register
+#define DBGU_TNCR       (284) // Transmit Next Counter Register
+#define DBGU_PTCR       (288) // PDC Transfer Control Register
+#define DBGU_PTSR       (292) // PDC Transfer Status Register
+// -------- DBGU_CR : (DBGU Offset: 0x0) Debug Unit Control Register -------- 
+#define AT91C_US_RSTRX            (0x1 <<  2) // (DBGU) Reset Receiver
+#define AT91C_US_RSTTX            (0x1 <<  3) // (DBGU) Reset Transmitter
+#define AT91C_US_RXEN             (0x1 <<  4) // (DBGU) Receiver Enable
+#define AT91C_US_RXDIS            (0x1 <<  5) // (DBGU) Receiver Disable
+#define AT91C_US_TXEN             (0x1 <<  6) // (DBGU) Transmitter Enable
+#define AT91C_US_TXDIS            (0x1 <<  7) // (DBGU) Transmitter Disable
+#define AT91C_US_RSTSTA           (0x1 <<  8) // (DBGU) Reset Status Bits
+// -------- DBGU_MR : (DBGU Offset: 0x4) Debug Unit Mode Register -------- 
+#define AT91C_US_PAR              (0x7 <<  9) // (DBGU) Parity type
+#define 	AT91C_US_PAR_EVEN                 (0x0 <<  9) // (DBGU) Even Parity
+#define 	AT91C_US_PAR_ODD                  (0x1 <<  9) // (DBGU) Odd Parity
+#define 	AT91C_US_PAR_SPACE                (0x2 <<  9) // (DBGU) Parity forced to 0 (Space)
+#define 	AT91C_US_PAR_MARK                 (0x3 <<  9) // (DBGU) Parity forced to 1 (Mark)
+#define 	AT91C_US_PAR_NONE                 (0x4 <<  9) // (DBGU) No Parity
+#define 	AT91C_US_PAR_MULTI_DROP           (0x6 <<  9) // (DBGU) Multi-drop mode
+#define AT91C_US_CHMODE           (0x3 << 14) // (DBGU) Channel Mode
+#define 	AT91C_US_CHMODE_NORMAL               (0x0 << 14) // (DBGU) Normal Mode: The USART channel operates as an RX/TX USART.
+#define 	AT91C_US_CHMODE_AUTO                 (0x1 << 14) // (DBGU) Automatic Echo: Receiver Data Input is connected to the TXD pin.
+#define 	AT91C_US_CHMODE_LOCAL                (0x2 << 14) // (DBGU) Local Loopback: Transmitter Output Signal is connected to Receiver Input Signal.
+#define 	AT91C_US_CHMODE_REMOTE               (0x3 << 14) // (DBGU) Remote Loopback: RXD pin is internally connected to TXD pin.
+// -------- DBGU_IER : (DBGU Offset: 0x8) Debug Unit Interrupt Enable Register -------- 
+#define AT91C_US_RXRDY            (0x1 <<  0) // (DBGU) RXRDY Interrupt
+#define AT91C_US_TXRDY            (0x1 <<  1) // (DBGU) TXRDY Interrupt
+#define AT91C_US_ENDRX            (0x1 <<  3) // (DBGU) End of Receive Transfer Interrupt
+#define AT91C_US_ENDTX            (0x1 <<  4) // (DBGU) End of Transmit Interrupt
+#define AT91C_US_OVRE             (0x1 <<  5) // (DBGU) Overrun Interrupt
+#define AT91C_US_FRAME            (0x1 <<  6) // (DBGU) Framing Error Interrupt
+#define AT91C_US_PARE             (0x1 <<  7) // (DBGU) Parity Error Interrupt
+#define AT91C_US_TXEMPTY          (0x1 <<  9) // (DBGU) TXEMPTY Interrupt
+#define AT91C_US_TXBUFE           (0x1 << 11) // (DBGU) TXBUFE Interrupt
+#define AT91C_US_RXBUFF           (0x1 << 12) // (DBGU) RXBUFF Interrupt
+#define AT91C_US_COMM_TX          (0x1 << 30) // (DBGU) COMM_TX Interrupt
+#define AT91C_US_COMM_RX          (0x1 << 31) // (DBGU) COMM_RX Interrupt
+// -------- DBGU_IDR : (DBGU Offset: 0xc) Debug Unit Interrupt Disable Register -------- 
+// -------- DBGU_IMR : (DBGU Offset: 0x10) Debug Unit Interrupt Mask Register -------- 
+// -------- DBGU_CSR : (DBGU Offset: 0x14) Debug Unit Channel Status Register -------- 
+// -------- DBGU_FNTR : (DBGU Offset: 0x48) Debug Unit FORCE_NTRST Register -------- 
+#define AT91C_US_FORCE_NTRST      (0x1 <<  0) // (DBGU) Force NTRST in JTAG
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Parallel Input Output Controler
+// *****************************************************************************
+// *** Register offset in AT91S_PIO structure ***
+#define PIO_PER         ( 0) // PIO Enable Register
+#define PIO_PDR         ( 4) // PIO Disable Register
+#define PIO_PSR         ( 8) // PIO Status Register
+#define PIO_OER         (16) // Output Enable Register
+#define PIO_ODR         (20) // Output Disable Registerr
+#define PIO_OSR         (24) // Output Status Register
+#define PIO_IFER        (32) // Input Filter Enable Register
+#define PIO_IFDR        (36) // Input Filter Disable Register
+#define PIO_IFSR        (40) // Input Filter Status Register
+#define PIO_SODR        (48) // Set Output Data Register
+#define PIO_CODR        (52) // Clear Output Data Register
+#define PIO_ODSR        (56) // Output Data Status Register
+#define PIO_PDSR        (60) // Pin Data Status Register
+#define PIO_IER         (64) // Interrupt Enable Register
+#define PIO_IDR         (68) // Interrupt Disable Register
+#define PIO_IMR         (72) // Interrupt Mask Register
+#define PIO_ISR         (76) // Interrupt Status Register
+#define PIO_MDER        (80) // Multi-driver Enable Register
+#define PIO_MDDR        (84) // Multi-driver Disable Register
+#define PIO_MDSR        (88) // Multi-driver Status Register
+#define PIO_PPUDR       (96) // Pull-up Disable Register
+#define PIO_PPUER       (100) // Pull-up Enable Register
+#define PIO_PPUSR       (104) // Pull-up Status Register
+#define PIO_ASR         (112) // Select A Register
+#define PIO_BSR         (116) // Select B Register
+#define PIO_ABSR        (120) // AB Select Status Register
+#define PIO_OWER        (160) // Output Write Enable Register
+#define PIO_OWDR        (164) // Output Write Disable Register
+#define PIO_OWSR        (168) // Output Write Status Register
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Clock Generator Controler
+// *****************************************************************************
+// *** Register offset in AT91S_CKGR structure ***
+#define CKGR_MOR        ( 0) // Main Oscillator Register
+#define CKGR_MCFR       ( 4) // Main Clock  Frequency Register
+#define CKGR_PLLR       (12) // PLL Register
+// -------- CKGR_MOR : (CKGR Offset: 0x0) Main Oscillator Register -------- 
+#define AT91C_CKGR_MOSCEN         (0x1 <<  0) // (CKGR) Main Oscillator Enable
+#define AT91C_CKGR_OSCBYPASS      (0x1 <<  1) // (CKGR) Main Oscillator Bypass
+#define AT91C_CKGR_OSCOUNT        (0xFF <<  8) // (CKGR) Main Oscillator Start-up Time
+// -------- CKGR_MCFR : (CKGR Offset: 0x4) Main Clock Frequency Register -------- 
+#define AT91C_CKGR_MAINF          (0xFFFF <<  0) // (CKGR) Main Clock Frequency
+#define AT91C_CKGR_MAINRDY        (0x1 << 16) // (CKGR) Main Clock Ready
+// -------- CKGR_PLLR : (CKGR Offset: 0xc) PLL B Register -------- 
+#define AT91C_CKGR_DIV            (0xFF <<  0) // (CKGR) Divider Selected
+#define 	AT91C_CKGR_DIV_0                    (0x0) // (CKGR) Divider output is 0
+#define 	AT91C_CKGR_DIV_BYPASS               (0x1) // (CKGR) Divider is bypassed
+#define AT91C_CKGR_PLLCOUNT       (0x3F <<  8) // (CKGR) PLL Counter
+#define AT91C_CKGR_OUT            (0x3 << 14) // (CKGR) PLL Output Frequency Range
+#define 	AT91C_CKGR_OUT_0                    (0x0 << 14) // (CKGR) Please refer to the PLL datasheet
+#define 	AT91C_CKGR_OUT_1                    (0x1 << 14) // (CKGR) Please refer to the PLL datasheet
+#define 	AT91C_CKGR_OUT_2                    (0x2 << 14) // (CKGR) Please refer to the PLL datasheet
+#define 	AT91C_CKGR_OUT_3                    (0x3 << 14) // (CKGR) Please refer to the PLL datasheet
+#define AT91C_CKGR_MUL            (0x7FF << 16) // (CKGR) PLL Multiplier
+#define AT91C_CKGR_USBDIV         (0x3 << 28) // (CKGR) Divider for USB Clocks
+#define 	AT91C_CKGR_USBDIV_0                    (0x0 << 28) // (CKGR) Divider output is PLL clock output
+#define 	AT91C_CKGR_USBDIV_1                    (0x1 << 28) // (CKGR) Divider output is PLL clock output divided by 2
+#define 	AT91C_CKGR_USBDIV_2                    (0x2 << 28) // (CKGR) Divider output is PLL clock output divided by 4
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Power Management Controler
+// *****************************************************************************
+// *** Register offset in AT91S_PMC structure ***
+#define PMC_SCER        ( 0) // System Clock Enable Register
+#define PMC_SCDR        ( 4) // System Clock Disable Register
+#define PMC_SCSR        ( 8) // System Clock Status Register
+#define PMC_PCER        (16) // Peripheral Clock Enable Register
+#define PMC_PCDR        (20) // Peripheral Clock Disable Register
+#define PMC_PCSR        (24) // Peripheral Clock Status Register
+#define PMC_MOR         (32) // Main Oscillator Register
+#define PMC_MCFR        (36) // Main Clock  Frequency Register
+#define PMC_PLLR        (44) // PLL Register
+#define PMC_MCKR        (48) // Master Clock Register
+#define PMC_PCKR        (64) // Programmable Clock Register
+#define PMC_IER         (96) // Interrupt Enable Register
+#define PMC_IDR         (100) // Interrupt Disable Register
+#define PMC_SR          (104) // Status Register
+#define PMC_IMR         (108) // Interrupt Mask Register
+// -------- PMC_SCER : (PMC Offset: 0x0) System Clock Enable Register -------- 
+#define AT91C_PMC_PCK             (0x1 <<  0) // (PMC) Processor Clock
+#define AT91C_PMC_UDP             (0x1 <<  7) // (PMC) USB Device Port Clock
+#define AT91C_PMC_PCK0            (0x1 <<  8) // (PMC) Programmable Clock Output
+#define AT91C_PMC_PCK1            (0x1 <<  9) // (PMC) Programmable Clock Output
+#define AT91C_PMC_PCK2            (0x1 << 10) // (PMC) Programmable Clock Output
+#define AT91C_PMC_PCK3            (0x1 << 11) // (PMC) Programmable Clock Output
+// -------- PMC_SCDR : (PMC Offset: 0x4) System Clock Disable Register -------- 
+// -------- PMC_SCSR : (PMC Offset: 0x8) System Clock Status Register -------- 
+// -------- CKGR_MOR : (PMC Offset: 0x20) Main Oscillator Register -------- 
+// -------- CKGR_MCFR : (PMC Offset: 0x24) Main Clock Frequency Register -------- 
+// -------- CKGR_PLLR : (PMC Offset: 0x2c) PLL B Register -------- 
+// -------- PMC_MCKR : (PMC Offset: 0x30) Master Clock Register -------- 
+#define AT91C_PMC_CSS             (0x3 <<  0) // (PMC) Programmable Clock Selection
+#define 	AT91C_PMC_CSS_SLOW_CLK             (0x0) // (PMC) Slow Clock is selected
+#define 	AT91C_PMC_CSS_MAIN_CLK             (0x1) // (PMC) Main Clock is selected
+#define 	AT91C_PMC_CSS_PLL_CLK              (0x3) // (PMC) Clock from PLL is selected
+#define AT91C_PMC_PRES            (0x7 <<  2) // (PMC) Programmable Clock Prescaler
+#define 	AT91C_PMC_PRES_CLK                  (0x0 <<  2) // (PMC) Selected clock
+#define 	AT91C_PMC_PRES_CLK_2                (0x1 <<  2) // (PMC) Selected clock divided by 2
+#define 	AT91C_PMC_PRES_CLK_4                (0x2 <<  2) // (PMC) Selected clock divided by 4
+#define 	AT91C_PMC_PRES_CLK_8                (0x3 <<  2) // (PMC) Selected clock divided by 8
+#define 	AT91C_PMC_PRES_CLK_16               (0x4 <<  2) // (PMC) Selected clock divided by 16
+#define 	AT91C_PMC_PRES_CLK_32               (0x5 <<  2) // (PMC) Selected clock divided by 32
+#define 	AT91C_PMC_PRES_CLK_64               (0x6 <<  2) // (PMC) Selected clock divided by 64
+// -------- PMC_PCKR : (PMC Offset: 0x40) Programmable Clock Register -------- 
+// -------- PMC_IER : (PMC Offset: 0x60) PMC Interrupt Enable Register -------- 
+#define AT91C_PMC_MOSCS           (0x1 <<  0) // (PMC) MOSC Status/Enable/Disable/Mask
+#define AT91C_PMC_LOCK            (0x1 <<  2) // (PMC) PLL Status/Enable/Disable/Mask
+#define AT91C_PMC_MCKRDY          (0x1 <<  3) // (PMC) MCK_RDY Status/Enable/Disable/Mask
+#define AT91C_PMC_PCK0RDY         (0x1 <<  8) // (PMC) PCK0_RDY Status/Enable/Disable/Mask
+#define AT91C_PMC_PCK1RDY         (0x1 <<  9) // (PMC) PCK1_RDY Status/Enable/Disable/Mask
+#define AT91C_PMC_PCK2RDY         (0x1 << 10) // (PMC) PCK2_RDY Status/Enable/Disable/Mask
+#define AT91C_PMC_PCK3RDY         (0x1 << 11) // (PMC) PCK3_RDY Status/Enable/Disable/Mask
+// -------- PMC_IDR : (PMC Offset: 0x64) PMC Interrupt Disable Register -------- 
+// -------- PMC_SR : (PMC Offset: 0x68) PMC Status Register -------- 
+// -------- PMC_IMR : (PMC Offset: 0x6c) PMC Interrupt Mask Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Reset Controller Interface
+// *****************************************************************************
+// *** Register offset in AT91S_RSTC structure ***
+#define RSTC_RCR        ( 0) // Reset Control Register
+#define RSTC_RSR        ( 4) // Reset Status Register
+#define RSTC_RMR        ( 8) // Reset Mode Register
+// -------- RSTC_RCR : (RSTC Offset: 0x0) Reset Control Register -------- 
+#define AT91C_RSTC_PROCRST        (0x1 <<  0) // (RSTC) Processor Reset
+#define AT91C_RSTC_PERRST         (0x1 <<  2) // (RSTC) Peripheral Reset
+#define AT91C_RSTC_EXTRST         (0x1 <<  3) // (RSTC) External Reset
+#define AT91C_RSTC_KEY            (0xFF << 24) // (RSTC) Password
+// -------- RSTC_RSR : (RSTC Offset: 0x4) Reset Status Register -------- 
+#define AT91C_RSTC_URSTS          (0x1 <<  0) // (RSTC) User Reset Status
+#define AT91C_RSTC_BODSTS         (0x1 <<  1) // (RSTC) Brownout Detection Status
+#define AT91C_RSTC_RSTTYP         (0x7 <<  8) // (RSTC) Reset Type
+#define 	AT91C_RSTC_RSTTYP_POWERUP              (0x0 <<  8) // (RSTC) Power-up Reset. VDDCORE rising.
+#define 	AT91C_RSTC_RSTTYP_WAKEUP               (0x1 <<  8) // (RSTC) WakeUp Reset. VDDCORE rising.
+#define 	AT91C_RSTC_RSTTYP_WATCHDOG             (0x2 <<  8) // (RSTC) Watchdog Reset. Watchdog overflow occured.
+#define 	AT91C_RSTC_RSTTYP_SOFTWARE             (0x3 <<  8) // (RSTC) Software Reset. Processor reset required by the software.
+#define 	AT91C_RSTC_RSTTYP_USER                 (0x4 <<  8) // (RSTC) User Reset. NRST pin detected low.
+#define 	AT91C_RSTC_RSTTYP_BROWNOUT             (0x5 <<  8) // (RSTC) Brownout Reset occured.
+#define AT91C_RSTC_NRSTL          (0x1 << 16) // (RSTC) NRST pin level
+#define AT91C_RSTC_SRCMP          (0x1 << 17) // (RSTC) Software Reset Command in Progress.
+// -------- RSTC_RMR : (RSTC Offset: 0x8) Reset Mode Register -------- 
+#define AT91C_RSTC_URSTEN         (0x1 <<  0) // (RSTC) User Reset Enable
+#define AT91C_RSTC_URSTIEN        (0x1 <<  4) // (RSTC) User Reset Interrupt Enable
+#define AT91C_RSTC_ERSTL          (0xF <<  8) // (RSTC) User Reset Length
+#define AT91C_RSTC_BODIEN         (0x1 << 16) // (RSTC) Brownout Detection Interrupt Enable
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Real Time Timer Controller Interface
+// *****************************************************************************
+// *** Register offset in AT91S_RTTC structure ***
+#define RTTC_RTMR       ( 0) // Real-time Mode Register
+#define RTTC_RTAR       ( 4) // Real-time Alarm Register
+#define RTTC_RTVR       ( 8) // Real-time Value Register
+#define RTTC_RTSR       (12) // Real-time Status Register
+// -------- RTTC_RTMR : (RTTC Offset: 0x0) Real-time Mode Register -------- 
+#define AT91C_RTTC_RTPRES         (0xFFFF <<  0) // (RTTC) Real-time Timer Prescaler Value
+#define AT91C_RTTC_ALMIEN         (0x1 << 16) // (RTTC) Alarm Interrupt Enable
+#define AT91C_RTTC_RTTINCIEN      (0x1 << 17) // (RTTC) Real Time Timer Increment Interrupt Enable
+#define AT91C_RTTC_RTTRST         (0x1 << 18) // (RTTC) Real Time Timer Restart
+// -------- RTTC_RTAR : (RTTC Offset: 0x4) Real-time Alarm Register -------- 
+#define AT91C_RTTC_ALMV           (0x0 <<  0) // (RTTC) Alarm Value
+// -------- RTTC_RTVR : (RTTC Offset: 0x8) Current Real-time Value Register -------- 
+#define AT91C_RTTC_CRTV           (0x0 <<  0) // (RTTC) Current Real-time Value
+// -------- RTTC_RTSR : (RTTC Offset: 0xc) Real-time Status Register -------- 
+#define AT91C_RTTC_ALMS           (0x1 <<  0) // (RTTC) Real-time Alarm Status
+#define AT91C_RTTC_RTTINC         (0x1 <<  1) // (RTTC) Real-time Timer Increment
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Periodic Interval Timer Controller Interface
+// *****************************************************************************
+// *** Register offset in AT91S_PITC structure ***
+#define PITC_PIMR       ( 0) // Period Interval Mode Register
+#define PITC_PISR       ( 4) // Period Interval Status Register
+#define PITC_PIVR       ( 8) // Period Interval Value Register
+#define PITC_PIIR       (12) // Period Interval Image Register
+// -------- PITC_PIMR : (PITC Offset: 0x0) Periodic Interval Mode Register -------- 
+#define AT91C_PITC_PIV            (0xFFFFF <<  0) // (PITC) Periodic Interval Value
+#define AT91C_PITC_PITEN          (0x1 << 24) // (PITC) Periodic Interval Timer Enabled
+#define AT91C_PITC_PITIEN         (0x1 << 25) // (PITC) Periodic Interval Timer Interrupt Enable
+// -------- PITC_PISR : (PITC Offset: 0x4) Periodic Interval Status Register -------- 
+#define AT91C_PITC_PITS           (0x1 <<  0) // (PITC) Periodic Interval Timer Status
+// -------- PITC_PIVR : (PITC Offset: 0x8) Periodic Interval Value Register -------- 
+#define AT91C_PITC_CPIV           (0xFFFFF <<  0) // (PITC) Current Periodic Interval Value
+#define AT91C_PITC_PICNT          (0xFFF << 20) // (PITC) Periodic Interval Counter
+// -------- PITC_PIIR : (PITC Offset: 0xc) Periodic Interval Image Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Watchdog Timer Controller Interface
+// *****************************************************************************
+// *** Register offset in AT91S_WDTC structure ***
+#define WDTC_WDCR       ( 0) // Watchdog Control Register
+#define WDTC_WDMR       ( 4) // Watchdog Mode Register
+#define WDTC_WDSR       ( 8) // Watchdog Status Register
+// -------- WDTC_WDCR : (WDTC Offset: 0x0) Periodic Interval Image Register -------- 
+#define AT91C_WDTC_WDRSTT         (0x1 <<  0) // (WDTC) Watchdog Restart
+#define AT91C_WDTC_KEY            (0xFF << 24) // (WDTC) Watchdog KEY Password
+// -------- WDTC_WDMR : (WDTC Offset: 0x4) Watchdog Mode Register -------- 
+#define AT91C_WDTC_WDV            (0xFFF <<  0) // (WDTC) Watchdog Timer Restart
+#define AT91C_WDTC_WDFIEN         (0x1 << 12) // (WDTC) Watchdog Fault Interrupt Enable
+#define AT91C_WDTC_WDRSTEN        (0x1 << 13) // (WDTC) Watchdog Reset Enable
+#define AT91C_WDTC_WDRPROC        (0x1 << 14) // (WDTC) Watchdog Timer Restart
+#define AT91C_WDTC_WDDIS          (0x1 << 15) // (WDTC) Watchdog Disable
+#define AT91C_WDTC_WDD            (0xFFF << 16) // (WDTC) Watchdog Delta Value
+#define AT91C_WDTC_WDDBGHLT       (0x1 << 28) // (WDTC) Watchdog Debug Halt
+#define AT91C_WDTC_WDIDLEHLT      (0x1 << 29) // (WDTC) Watchdog Idle Halt
+// -------- WDTC_WDSR : (WDTC Offset: 0x8) Watchdog Status Register -------- 
+#define AT91C_WDTC_WDUNF          (0x1 <<  0) // (WDTC) Watchdog Underflow
+#define AT91C_WDTC_WDERR          (0x1 <<  1) // (WDTC) Watchdog Error
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Voltage Regulator Mode Controller Interface
+// *****************************************************************************
+// *** Register offset in AT91S_VREG structure ***
+#define VREG_MR         ( 0) // Voltage Regulator Mode Register
+// -------- VREG_MR : (VREG Offset: 0x0) Voltage Regulator Mode Register -------- 
+#define AT91C_VREG_PSTDBY         (0x1 <<  0) // (VREG) Voltage Regulator Power Standby Mode
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Memory Controller Interface
+// *****************************************************************************
+// *** Register offset in AT91S_MC structure ***
+#define MC_RCR          ( 0) // MC Remap Control Register
+#define MC_ASR          ( 4) // MC Abort Status Register
+#define MC_AASR         ( 8) // MC Abort Address Status Register
+#define MC_FMR          (96) // MC Flash Mode Register
+#define MC_FCR          (100) // MC Flash Command Register
+#define MC_FSR          (104) // MC Flash Status Register
+// -------- MC_RCR : (MC Offset: 0x0) MC Remap Control Register -------- 
+#define AT91C_MC_RCB              (0x1 <<  0) // (MC) Remap Command Bit
+// -------- MC_ASR : (MC Offset: 0x4) MC Abort Status Register -------- 
+#define AT91C_MC_UNDADD           (0x1 <<  0) // (MC) Undefined Addess Abort Status
+#define AT91C_MC_MISADD           (0x1 <<  1) // (MC) Misaligned Addess Abort Status
+#define AT91C_MC_ABTSZ            (0x3 <<  8) // (MC) Abort Size Status
+#define 	AT91C_MC_ABTSZ_BYTE                 (0x0 <<  8) // (MC) Byte
+#define 	AT91C_MC_ABTSZ_HWORD                (0x1 <<  8) // (MC) Half-word
+#define 	AT91C_MC_ABTSZ_WORD                 (0x2 <<  8) // (MC) Word
+#define AT91C_MC_ABTTYP           (0x3 << 10) // (MC) Abort Type Status
+#define 	AT91C_MC_ABTTYP_DATAR                (0x0 << 10) // (MC) Data Read
+#define 	AT91C_MC_ABTTYP_DATAW                (0x1 << 10) // (MC) Data Write
+#define 	AT91C_MC_ABTTYP_FETCH                (0x2 << 10) // (MC) Code Fetch
+#define AT91C_MC_MST0             (0x1 << 16) // (MC) Master 0 Abort Source
+#define AT91C_MC_MST1             (0x1 << 17) // (MC) Master 1 Abort Source
+#define AT91C_MC_SVMST0           (0x1 << 24) // (MC) Saved Master 0 Abort Source
+#define AT91C_MC_SVMST1           (0x1 << 25) // (MC) Saved Master 1 Abort Source
+// -------- MC_FMR : (MC Offset: 0x60) MC Flash Mode Register -------- 
+#define AT91C_MC_FRDY             (0x1 <<  0) // (MC) Flash Ready
+#define AT91C_MC_LOCKE            (0x1 <<  2) // (MC) Lock Error
+#define AT91C_MC_PROGE            (0x1 <<  3) // (MC) Programming Error
+#define AT91C_MC_NEBP             (0x1 <<  7) // (MC) No Erase Before Programming
+#define AT91C_MC_FWS              (0x3 <<  8) // (MC) Flash Wait State
+#define 	AT91C_MC_FWS_0FWS                 (0x0 <<  8) // (MC) 1 cycle for Read, 2 for Write operations
+#define 	AT91C_MC_FWS_1FWS                 (0x1 <<  8) // (MC) 2 cycles for Read, 3 for Write operations
+#define 	AT91C_MC_FWS_2FWS                 (0x2 <<  8) // (MC) 3 cycles for Read, 4 for Write operations
+#define 	AT91C_MC_FWS_3FWS                 (0x3 <<  8) // (MC) 4 cycles for Read, 4 for Write operations
+#define AT91C_MC_FMCN             (0xFF << 16) // (MC) Flash Microsecond Cycle Number
+// -------- MC_FCR : (MC Offset: 0x64) MC Flash Command Register -------- 
+#define AT91C_MC_FCMD             (0xF <<  0) // (MC) Flash Command
+#define 	AT91C_MC_FCMD_START_PROG           (0x1) // (MC) Starts the programming of th epage specified by PAGEN.
+#define 	AT91C_MC_FCMD_LOCK                 (0x2) // (MC) Starts a lock sequence of the sector defined by the bits 4 to 7 of the field PAGEN.
+#define 	AT91C_MC_FCMD_PROG_AND_LOCK        (0x3) // (MC) The lock sequence automatically happens after the programming sequence is completed.
+#define 	AT91C_MC_FCMD_UNLOCK               (0x4) // (MC) Starts an unlock sequence of the sector defined by the bits 4 to 7 of the field PAGEN.
+#define 	AT91C_MC_FCMD_ERASE_ALL            (0x8) // (MC) Starts the erase of the entire flash.If at least a page is locked, the command is cancelled.
+#define 	AT91C_MC_FCMD_SET_GP_NVM           (0xB) // (MC) Set General Purpose NVM bits.
+#define 	AT91C_MC_FCMD_CLR_GP_NVM           (0xD) // (MC) Clear General Purpose NVM bits.
+#define 	AT91C_MC_FCMD_SET_SECURITY         (0xF) // (MC) Set Security Bit.
+#define AT91C_MC_PAGEN            (0x3FF <<  8) // (MC) Page Number
+#define AT91C_MC_KEY              (0xFF << 24) // (MC) Writing Protect Key
+// -------- MC_FSR : (MC Offset: 0x68) MC Flash Command Register -------- 
+#define AT91C_MC_SECURITY         (0x1 <<  4) // (MC) Security Bit Status
+#define AT91C_MC_GPNVM0           (0x1 <<  8) // (MC) Sector 0 Lock Status
+#define AT91C_MC_GPNVM1           (0x1 <<  9) // (MC) Sector 1 Lock Status
+#define AT91C_MC_GPNVM2           (0x1 << 10) // (MC) Sector 2 Lock Status
+#define AT91C_MC_GPNVM3           (0x1 << 11) // (MC) Sector 3 Lock Status
+#define AT91C_MC_GPNVM4           (0x1 << 12) // (MC) Sector 4 Lock Status
+#define AT91C_MC_GPNVM5           (0x1 << 13) // (MC) Sector 5 Lock Status
+#define AT91C_MC_GPNVM6           (0x1 << 14) // (MC) Sector 6 Lock Status
+#define AT91C_MC_GPNVM7           (0x1 << 15) // (MC) Sector 7 Lock Status
+#define AT91C_MC_LOCKS0           (0x1 << 16) // (MC) Sector 0 Lock Status
+#define AT91C_MC_LOCKS1           (0x1 << 17) // (MC) Sector 1 Lock Status
+#define AT91C_MC_LOCKS2           (0x1 << 18) // (MC) Sector 2 Lock Status
+#define AT91C_MC_LOCKS3           (0x1 << 19) // (MC) Sector 3 Lock Status
+#define AT91C_MC_LOCKS4           (0x1 << 20) // (MC) Sector 4 Lock Status
+#define AT91C_MC_LOCKS5           (0x1 << 21) // (MC) Sector 5 Lock Status
+#define AT91C_MC_LOCKS6           (0x1 << 22) // (MC) Sector 6 Lock Status
+#define AT91C_MC_LOCKS7           (0x1 << 23) // (MC) Sector 7 Lock Status
+#define AT91C_MC_LOCKS8           (0x1 << 24) // (MC) Sector 8 Lock Status
+#define AT91C_MC_LOCKS9           (0x1 << 25) // (MC) Sector 9 Lock Status
+#define AT91C_MC_LOCKS10          (0x1 << 26) // (MC) Sector 10 Lock Status
+#define AT91C_MC_LOCKS11          (0x1 << 27) // (MC) Sector 11 Lock Status
+#define AT91C_MC_LOCKS12          (0x1 << 28) // (MC) Sector 12 Lock Status
+#define AT91C_MC_LOCKS13          (0x1 << 29) // (MC) Sector 13 Lock Status
+#define AT91C_MC_LOCKS14          (0x1 << 30) // (MC) Sector 14 Lock Status
+#define AT91C_MC_LOCKS15          (0x1 << 31) // (MC) Sector 15 Lock Status
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Serial Parallel Interface
+// *****************************************************************************
+// *** Register offset in AT91S_SPI structure ***
+#define SPI_CR          ( 0) // Control Register
+#define SPI_MR          ( 4) // Mode Register
+#define SPI_RDR         ( 8) // Receive Data Register
+#define SPI_TDR         (12) // Transmit Data Register
+#define SPI_SR          (16) // Status Register
+#define SPI_IER         (20) // Interrupt Enable Register
+#define SPI_IDR         (24) // Interrupt Disable Register
+#define SPI_IMR         (28) // Interrupt Mask Register
+#define SPI_CSR         (48) // Chip Select Register
+#define SPI_RPR         (256) // Receive Pointer Register
+#define SPI_RCR         (260) // Receive Counter Register
+#define SPI_TPR         (264) // Transmit Pointer Register
+#define SPI_TCR         (268) // Transmit Counter Register
+#define SPI_RNPR        (272) // Receive Next Pointer Register
+#define SPI_RNCR        (276) // Receive Next Counter Register
+#define SPI_TNPR        (280) // Transmit Next Pointer Register
+#define SPI_TNCR        (284) // Transmit Next Counter Register
+#define SPI_PTCR        (288) // PDC Transfer Control Register
+#define SPI_PTSR        (292) // PDC Transfer Status Register
+// -------- SPI_CR : (SPI Offset: 0x0) SPI Control Register -------- 
+#define AT91C_SPI_SPIEN           (0x1 <<  0) // (SPI) SPI Enable
+#define AT91C_SPI_SPIDIS          (0x1 <<  1) // (SPI) SPI Disable
+#define AT91C_SPI_SWRST           (0x1 <<  7) // (SPI) SPI Software reset
+#define AT91C_SPI_LASTXFER        (0x1 << 24) // (SPI) SPI Last Transfer
+// -------- SPI_MR : (SPI Offset: 0x4) SPI Mode Register -------- 
+#define AT91C_SPI_MSTR            (0x1 <<  0) // (SPI) Master/Slave Mode
+#define AT91C_SPI_PS              (0x1 <<  1) // (SPI) Peripheral Select
+#define 	AT91C_SPI_PS_FIXED                (0x0 <<  1) // (SPI) Fixed Peripheral Select
+#define 	AT91C_SPI_PS_VARIABLE             (0x1 <<  1) // (SPI) Variable Peripheral Select
+#define AT91C_SPI_PCSDEC          (0x1 <<  2) // (SPI) Chip Select Decode
+#define AT91C_SPI_FDIV            (0x1 <<  3) // (SPI) Clock Selection
+#define AT91C_SPI_MODFDIS         (0x1 <<  4) // (SPI) Mode Fault Detection
+#define AT91C_SPI_LLB             (0x1 <<  7) // (SPI) Clock Selection
+#define AT91C_SPI_PCS             (0xF << 16) // (SPI) Peripheral Chip Select
+#define AT91C_SPI_DLYBCS          (0xFF << 24) // (SPI) Delay Between Chip Selects
+// -------- SPI_RDR : (SPI Offset: 0x8) Receive Data Register -------- 
+#define AT91C_SPI_RD              (0xFFFF <<  0) // (SPI) Receive Data
+#define AT91C_SPI_RPCS            (0xF << 16) // (SPI) Peripheral Chip Select Status
+// -------- SPI_TDR : (SPI Offset: 0xc) Transmit Data Register -------- 
+#define AT91C_SPI_TD              (0xFFFF <<  0) // (SPI) Transmit Data
+#define AT91C_SPI_TPCS            (0xF << 16) // (SPI) Peripheral Chip Select Status
+// -------- SPI_SR : (SPI Offset: 0x10) Status Register -------- 
+#define AT91C_SPI_RDRF            (0x1 <<  0) // (SPI) Receive Data Register Full
+#define AT91C_SPI_TDRE            (0x1 <<  1) // (SPI) Transmit Data Register Empty
+#define AT91C_SPI_MODF            (0x1 <<  2) // (SPI) Mode Fault Error
+#define AT91C_SPI_OVRES           (0x1 <<  3) // (SPI) Overrun Error Status
+#define AT91C_SPI_ENDRX           (0x1 <<  4) // (SPI) End of Receiver Transfer
+#define AT91C_SPI_ENDTX           (0x1 <<  5) // (SPI) End of Receiver Transfer
+#define AT91C_SPI_RXBUFF          (0x1 <<  6) // (SPI) RXBUFF Interrupt
+#define AT91C_SPI_TXBUFE          (0x1 <<  7) // (SPI) TXBUFE Interrupt
+#define AT91C_SPI_NSSR            (0x1 <<  8) // (SPI) NSSR Interrupt
+#define AT91C_SPI_TXEMPTY         (0x1 <<  9) // (SPI) TXEMPTY Interrupt
+#define AT91C_SPI_SPIENS          (0x1 << 16) // (SPI) Enable Status
+// -------- SPI_IER : (SPI Offset: 0x14) Interrupt Enable Register -------- 
+// -------- SPI_IDR : (SPI Offset: 0x18) Interrupt Disable Register -------- 
+// -------- SPI_IMR : (SPI Offset: 0x1c) Interrupt Mask Register -------- 
+// -------- SPI_CSR : (SPI Offset: 0x30) Chip Select Register -------- 
+#define AT91C_SPI_CPOL            (0x1 <<  0) // (SPI) Clock Polarity
+#define AT91C_SPI_NCPHA           (0x1 <<  1) // (SPI) Clock Phase
+#define AT91C_SPI_CSAAT           (0x1 <<  3) // (SPI) Chip Select Active After Transfer
+#define AT91C_SPI_BITS            (0xF <<  4) // (SPI) Bits Per Transfer
+#define 	AT91C_SPI_BITS_8                    (0x0 <<  4) // (SPI) 8 Bits Per transfer
+#define 	AT91C_SPI_BITS_9                    (0x1 <<  4) // (SPI) 9 Bits Per transfer
+#define 	AT91C_SPI_BITS_10                   (0x2 <<  4) // (SPI) 10 Bits Per transfer
+#define 	AT91C_SPI_BITS_11                   (0x3 <<  4) // (SPI) 11 Bits Per transfer
+#define 	AT91C_SPI_BITS_12                   (0x4 <<  4) // (SPI) 12 Bits Per transfer
+#define 	AT91C_SPI_BITS_13                   (0x5 <<  4) // (SPI) 13 Bits Per transfer
+#define 	AT91C_SPI_BITS_14                   (0x6 <<  4) // (SPI) 14 Bits Per transfer
+#define 	AT91C_SPI_BITS_15                   (0x7 <<  4) // (SPI) 15 Bits Per transfer
+#define 	AT91C_SPI_BITS_16                   (0x8 <<  4) // (SPI) 16 Bits Per transfer
+#define AT91C_SPI_SCBR            (0xFF <<  8) // (SPI) Serial Clock Baud Rate
+#define AT91C_SPI_DLYBS           (0xFF << 16) // (SPI) Delay Before SPCK
+#define AT91C_SPI_DLYBCT          (0xFF << 24) // (SPI) Delay Between Consecutive Transfers
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Usart
+// *****************************************************************************
+// *** Register offset in AT91S_USART structure ***
+#define US_CR           ( 0) // Control Register
+#define US_MR           ( 4) // Mode Register
+#define US_IER          ( 8) // Interrupt Enable Register
+#define US_IDR          (12) // Interrupt Disable Register
+#define US_IMR          (16) // Interrupt Mask Register
+#define US_CSR          (20) // Channel Status Register
+#define US_RHR          (24) // Receiver Holding Register
+#define US_THR          (28) // Transmitter Holding Register
+#define US_BRGR         (32) // Baud Rate Generator Register
+#define US_RTOR         (36) // Receiver Time-out Register
+#define US_TTGR         (40) // Transmitter Time-guard Register
+#define US_FIDI         (64) // FI_DI_Ratio Register
+#define US_NER          (68) // Nb Errors Register
+#define US_IF           (76) // IRDA_FILTER Register
+#define US_RPR          (256) // Receive Pointer Register
+#define US_RCR          (260) // Receive Counter Register
+#define US_TPR          (264) // Transmit Pointer Register
+#define US_TCR          (268) // Transmit Counter Register
+#define US_RNPR         (272) // Receive Next Pointer Register
+#define US_RNCR         (276) // Receive Next Counter Register
+#define US_TNPR         (280) // Transmit Next Pointer Register
+#define US_TNCR         (284) // Transmit Next Counter Register
+#define US_PTCR         (288) // PDC Transfer Control Register
+#define US_PTSR         (292) // PDC Transfer Status Register
+// -------- US_CR : (USART Offset: 0x0) Debug Unit Control Register -------- 
+#define AT91C_US_STTBRK           (0x1 <<  9) // (USART) Start Break
+#define AT91C_US_STPBRK           (0x1 << 10) // (USART) Stop Break
+#define AT91C_US_STTTO            (0x1 << 11) // (USART) Start Time-out
+#define AT91C_US_SENDA            (0x1 << 12) // (USART) Send Address
+#define AT91C_US_RSTIT            (0x1 << 13) // (USART) Reset Iterations
+#define AT91C_US_RSTNACK          (0x1 << 14) // (USART) Reset Non Acknowledge
+#define AT91C_US_RETTO            (0x1 << 15) // (USART) Rearm Time-out
+#define AT91C_US_DTREN            (0x1 << 16) // (USART) Data Terminal ready Enable
+#define AT91C_US_DTRDIS           (0x1 << 17) // (USART) Data Terminal ready Disable
+#define AT91C_US_RTSEN            (0x1 << 18) // (USART) Request to Send enable
+#define AT91C_US_RTSDIS           (0x1 << 19) // (USART) Request to Send Disable
+// -------- US_MR : (USART Offset: 0x4) Debug Unit Mode Register -------- 
+#define AT91C_US_USMODE           (0xF <<  0) // (USART) Usart mode
+#define 	AT91C_US_USMODE_NORMAL               (0x0) // (USART) Normal
+#define 	AT91C_US_USMODE_RS485                (0x1) // (USART) RS485
+#define 	AT91C_US_USMODE_HWHSH                (0x2) // (USART) Hardware Handshaking
+#define 	AT91C_US_USMODE_MODEM                (0x3) // (USART) Modem
+#define 	AT91C_US_USMODE_ISO7816_0            (0x4) // (USART) ISO7816 protocol: T = 0
+#define 	AT91C_US_USMODE_ISO7816_1            (0x6) // (USART) ISO7816 protocol: T = 1
+#define 	AT91C_US_USMODE_IRDA                 (0x8) // (USART) IrDA
+#define 	AT91C_US_USMODE_SWHSH                (0xC) // (USART) Software Handshaking
+#define AT91C_US_CLKS             (0x3 <<  4) // (USART) Clock Selection (Baud Rate generator Input Clock
+#define 	AT91C_US_CLKS_CLOCK                (0x0 <<  4) // (USART) Clock
+#define 	AT91C_US_CLKS_FDIV1                (0x1 <<  4) // (USART) fdiv1
+#define 	AT91C_US_CLKS_SLOW                 (0x2 <<  4) // (USART) slow_clock (ARM)
+#define 	AT91C_US_CLKS_EXT                  (0x3 <<  4) // (USART) External (SCK)
+#define AT91C_US_CHRL             (0x3 <<  6) // (USART) Clock Selection (Baud Rate generator Input Clock
+#define 	AT91C_US_CHRL_5_BITS               (0x0 <<  6) // (USART) Character Length: 5 bits
+#define 	AT91C_US_CHRL_6_BITS               (0x1 <<  6) // (USART) Character Length: 6 bits
+#define 	AT91C_US_CHRL_7_BITS               (0x2 <<  6) // (USART) Character Length: 7 bits
+#define 	AT91C_US_CHRL_8_BITS               (0x3 <<  6) // (USART) Character Length: 8 bits
+#define AT91C_US_SYNC             (0x1 <<  8) // (USART) Synchronous Mode Select
+#define AT91C_US_NBSTOP           (0x3 << 12) // (USART) Number of Stop bits
+#define 	AT91C_US_NBSTOP_1_BIT                (0x0 << 12) // (USART) 1 stop bit
+#define 	AT91C_US_NBSTOP_15_BIT               (0x1 << 12) // (USART) Asynchronous (SYNC=0) 2 stop bits Synchronous (SYNC=1) 2 stop bits
+#define 	AT91C_US_NBSTOP_2_BIT                (0x2 << 12) // (USART) 2 stop bits
+#define AT91C_US_MSBF             (0x1 << 16) // (USART) Bit Order
+#define AT91C_US_MODE9            (0x1 << 17) // (USART) 9-bit Character length
+#define AT91C_US_CKLO             (0x1 << 18) // (USART) Clock Output Select
+#define AT91C_US_OVER             (0x1 << 19) // (USART) Over Sampling Mode
+#define AT91C_US_INACK            (0x1 << 20) // (USART) Inhibit Non Acknowledge
+#define AT91C_US_DSNACK           (0x1 << 21) // (USART) Disable Successive NACK
+#define AT91C_US_MAX_ITER         (0x1 << 24) // (USART) Number of Repetitions
+#define AT91C_US_FILTER           (0x1 << 28) // (USART) Receive Line Filter
+// -------- US_IER : (USART Offset: 0x8) Debug Unit Interrupt Enable Register -------- 
+#define AT91C_US_RXBRK            (0x1 <<  2) // (USART) Break Received/End of Break
+#define AT91C_US_TIMEOUT          (0x1 <<  8) // (USART) Receiver Time-out
+#define AT91C_US_ITERATION        (0x1 << 10) // (USART) Max number of Repetitions Reached
+#define AT91C_US_NACK             (0x1 << 13) // (USART) Non Acknowledge
+#define AT91C_US_RIIC             (0x1 << 16) // (USART) Ring INdicator Input Change Flag
+#define AT91C_US_DSRIC            (0x1 << 17) // (USART) Data Set Ready Input Change Flag
+#define AT91C_US_DCDIC            (0x1 << 18) // (USART) Data Carrier Flag
+#define AT91C_US_CTSIC            (0x1 << 19) // (USART) Clear To Send Input Change Flag
+// -------- US_IDR : (USART Offset: 0xc) Debug Unit Interrupt Disable Register -------- 
+// -------- US_IMR : (USART Offset: 0x10) Debug Unit Interrupt Mask Register -------- 
+// -------- US_CSR : (USART Offset: 0x14) Debug Unit Channel Status Register -------- 
+#define AT91C_US_RI               (0x1 << 20) // (USART) Image of RI Input
+#define AT91C_US_DSR              (0x1 << 21) // (USART) Image of DSR Input
+#define AT91C_US_DCD              (0x1 << 22) // (USART) Image of DCD Input
+#define AT91C_US_CTS              (0x1 << 23) // (USART) Image of CTS Input
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Synchronous Serial Controller Interface
+// *****************************************************************************
+// *** Register offset in AT91S_SSC structure ***
+#define SSC_CR          ( 0) // Control Register
+#define SSC_CMR         ( 4) // Clock Mode Register
+#define SSC_RCMR        (16) // Receive Clock ModeRegister
+#define SSC_RFMR        (20) // Receive Frame Mode Register
+#define SSC_TCMR        (24) // Transmit Clock Mode Register
+#define SSC_TFMR        (28) // Transmit Frame Mode Register
+#define SSC_RHR         (32) // Receive Holding Register
+#define SSC_THR         (36) // Transmit Holding Register
+#define SSC_RSHR        (48) // Receive Sync Holding Register
+#define SSC_TSHR        (52) // Transmit Sync Holding Register
+#define SSC_SR          (64) // Status Register
+#define SSC_IER         (68) // Interrupt Enable Register
+#define SSC_IDR         (72) // Interrupt Disable Register
+#define SSC_IMR         (76) // Interrupt Mask Register
+#define SSC_RPR         (256) // Receive Pointer Register
+#define SSC_RCR         (260) // Receive Counter Register
+#define SSC_TPR         (264) // Transmit Pointer Register
+#define SSC_TCR         (268) // Transmit Counter Register
+#define SSC_RNPR        (272) // Receive Next Pointer Register
+#define SSC_RNCR        (276) // Receive Next Counter Register
+#define SSC_TNPR        (280) // Transmit Next Pointer Register
+#define SSC_TNCR        (284) // Transmit Next Counter Register
+#define SSC_PTCR        (288) // PDC Transfer Control Register
+#define SSC_PTSR        (292) // PDC Transfer Status Register
+// -------- SSC_CR : (SSC Offset: 0x0) SSC Control Register -------- 
+#define AT91C_SSC_RXEN            (0x1 <<  0) // (SSC) Receive Enable
+#define AT91C_SSC_RXDIS           (0x1 <<  1) // (SSC) Receive Disable
+#define AT91C_SSC_TXEN            (0x1 <<  8) // (SSC) Transmit Enable
+#define AT91C_SSC_TXDIS           (0x1 <<  9) // (SSC) Transmit Disable
+#define AT91C_SSC_SWRST           (0x1 << 15) // (SSC) Software Reset
+// -------- SSC_RCMR : (SSC Offset: 0x10) SSC Receive Clock Mode Register -------- 
+#define AT91C_SSC_CKS             (0x3 <<  0) // (SSC) Receive/Transmit Clock Selection
+#define 	AT91C_SSC_CKS_DIV                  (0x0) // (SSC) Divided Clock
+#define 	AT91C_SSC_CKS_TK                   (0x1) // (SSC) TK Clock signal
+#define 	AT91C_SSC_CKS_RK                   (0x2) // (SSC) RK pin
+#define AT91C_SSC_CKO             (0x7 <<  2) // (SSC) Receive/Transmit Clock Output Mode Selection
+#define 	AT91C_SSC_CKO_NONE                 (0x0 <<  2) // (SSC) Receive/Transmit Clock Output Mode: None RK pin: Input-only
+#define 	AT91C_SSC_CKO_CONTINOUS            (0x1 <<  2) // (SSC) Continuous Receive/Transmit Clock RK pin: Output
+#define 	AT91C_SSC_CKO_DATA_TX              (0x2 <<  2) // (SSC) Receive/Transmit Clock only during data transfers RK pin: Output
+#define AT91C_SSC_CKI             (0x1 <<  5) // (SSC) Receive/Transmit Clock Inversion
+#define AT91C_SSC_CKG             (0x3 <<  6) // (SSC) Receive/Transmit Clock Gating Selection
+#define 	AT91C_SSC_CKG_NONE                 (0x0 <<  6) // (SSC) Receive/Transmit Clock Gating: None, continuous clock
+#define 	AT91C_SSC_CKG_LOW                  (0x1 <<  6) // (SSC) Receive/Transmit Clock enabled only if RF Low
+#define 	AT91C_SSC_CKG_HIGH                 (0x2 <<  6) // (SSC) Receive/Transmit Clock enabled only if RF High
+#define AT91C_SSC_START           (0xF <<  8) // (SSC) Receive/Transmit Start Selection
+#define 	AT91C_SSC_START_CONTINOUS            (0x0 <<  8) // (SSC) Continuous, as soon as the receiver is enabled, and immediately after the end of transfer of the previous data.
+#define 	AT91C_SSC_START_TX                   (0x1 <<  8) // (SSC) Transmit/Receive start
+#define 	AT91C_SSC_START_LOW_RF               (0x2 <<  8) // (SSC) Detection of a low level on RF input
+#define 	AT91C_SSC_START_HIGH_RF              (0x3 <<  8) // (SSC) Detection of a high level on RF input
+#define 	AT91C_SSC_START_FALL_RF              (0x4 <<  8) // (SSC) Detection of a falling edge on RF input
+#define 	AT91C_SSC_START_RISE_RF              (0x5 <<  8) // (SSC) Detection of a rising edge on RF input
+#define 	AT91C_SSC_START_LEVEL_RF             (0x6 <<  8) // (SSC) Detection of any level change on RF input
+#define 	AT91C_SSC_START_EDGE_RF              (0x7 <<  8) // (SSC) Detection of any edge on RF input
+#define 	AT91C_SSC_START_0                    (0x8 <<  8) // (SSC) Compare 0
+#define AT91C_SSC_STOP            (0x1 << 12) // (SSC) Receive Stop Selection
+#define AT91C_SSC_STTDLY          (0xFF << 16) // (SSC) Receive/Transmit Start Delay
+#define AT91C_SSC_PERIOD          (0xFF << 24) // (SSC) Receive/Transmit Period Divider Selection
+// -------- SSC_RFMR : (SSC Offset: 0x14) SSC Receive Frame Mode Register -------- 
+#define AT91C_SSC_DATLEN          (0x1F <<  0) // (SSC) Data Length
+#define AT91C_SSC_LOOP            (0x1 <<  5) // (SSC) Loop Mode
+#define AT91C_SSC_MSBF            (0x1 <<  7) // (SSC) Most Significant Bit First
+#define AT91C_SSC_DATNB           (0xF <<  8) // (SSC) Data Number per Frame
+#define AT91C_SSC_FSLEN           (0xF << 16) // (SSC) Receive/Transmit Frame Sync length
+#define AT91C_SSC_FSOS            (0x7 << 20) // (SSC) Receive/Transmit Frame Sync Output Selection
+#define 	AT91C_SSC_FSOS_NONE                 (0x0 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: None RK pin Input-only
+#define 	AT91C_SSC_FSOS_NEGATIVE             (0x1 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Negative Pulse
+#define 	AT91C_SSC_FSOS_POSITIVE             (0x2 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Positive Pulse
+#define 	AT91C_SSC_FSOS_LOW                  (0x3 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Driver Low during data transfer
+#define 	AT91C_SSC_FSOS_HIGH                 (0x4 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Driver High during data transfer
+#define 	AT91C_SSC_FSOS_TOGGLE               (0x5 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Toggling at each start of data transfer
+#define AT91C_SSC_FSEDGE          (0x1 << 24) // (SSC) Frame Sync Edge Detection
+// -------- SSC_TCMR : (SSC Offset: 0x18) SSC Transmit Clock Mode Register -------- 
+// -------- SSC_TFMR : (SSC Offset: 0x1c) SSC Transmit Frame Mode Register -------- 
+#define AT91C_SSC_DATDEF          (0x1 <<  5) // (SSC) Data Default Value
+#define AT91C_SSC_FSDEN           (0x1 << 23) // (SSC) Frame Sync Data Enable
+// -------- SSC_SR : (SSC Offset: 0x40) SSC Status Register -------- 
+#define AT91C_SSC_TXRDY           (0x1 <<  0) // (SSC) Transmit Ready
+#define AT91C_SSC_TXEMPTY         (0x1 <<  1) // (SSC) Transmit Empty
+#define AT91C_SSC_ENDTX           (0x1 <<  2) // (SSC) End Of Transmission
+#define AT91C_SSC_TXBUFE          (0x1 <<  3) // (SSC) Transmit Buffer Empty
+#define AT91C_SSC_RXRDY           (0x1 <<  4) // (SSC) Receive Ready
+#define AT91C_SSC_OVRUN           (0x1 <<  5) // (SSC) Receive Overrun
+#define AT91C_SSC_ENDRX           (0x1 <<  6) // (SSC) End of Reception
+#define AT91C_SSC_RXBUFF          (0x1 <<  7) // (SSC) Receive Buffer Full
+#define AT91C_SSC_CP0             (0x1 <<  8) // (SSC) Compare 0
+#define AT91C_SSC_CP1             (0x1 <<  9) // (SSC) Compare 1
+#define AT91C_SSC_TXSYN           (0x1 << 10) // (SSC) Transmit Sync
+#define AT91C_SSC_RXSYN           (0x1 << 11) // (SSC) Receive Sync
+#define AT91C_SSC_TXENA           (0x1 << 16) // (SSC) Transmit Enable
+#define AT91C_SSC_RXENA           (0x1 << 17) // (SSC) Receive Enable
+// -------- SSC_IER : (SSC Offset: 0x44) SSC Interrupt Enable Register -------- 
+// -------- SSC_IDR : (SSC Offset: 0x48) SSC Interrupt Disable Register -------- 
+// -------- SSC_IMR : (SSC Offset: 0x4c) SSC Interrupt Mask Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Two-wire Interface
+// *****************************************************************************
+// *** Register offset in AT91S_TWI structure ***
+#define TWI_CR          ( 0) // Control Register
+#define TWI_MMR         ( 4) // Master Mode Register
+#define TWI_IADR        (12) // Internal Address Register
+#define TWI_CWGR        (16) // Clock Waveform Generator Register
+#define TWI_SR          (32) // Status Register
+#define TWI_IER         (36) // Interrupt Enable Register
+#define TWI_IDR         (40) // Interrupt Disable Register
+#define TWI_IMR         (44) // Interrupt Mask Register
+#define TWI_RHR         (48) // Receive Holding Register
+#define TWI_THR         (52) // Transmit Holding Register
+// -------- TWI_CR : (TWI Offset: 0x0) TWI Control Register -------- 
+#define AT91C_TWI_START           (0x1 <<  0) // (TWI) Send a START Condition
+#define AT91C_TWI_STOP            (0x1 <<  1) // (TWI) Send a STOP Condition
+#define AT91C_TWI_MSEN            (0x1 <<  2) // (TWI) TWI Master Transfer Enabled
+#define AT91C_TWI_MSDIS           (0x1 <<  3) // (TWI) TWI Master Transfer Disabled
+#define AT91C_TWI_SWRST           (0x1 <<  7) // (TWI) Software Reset
+// -------- TWI_MMR : (TWI Offset: 0x4) TWI Master Mode Register -------- 
+#define AT91C_TWI_IADRSZ          (0x3 <<  8) // (TWI) Internal Device Address Size
+#define 	AT91C_TWI_IADRSZ_NO                   (0x0 <<  8) // (TWI) No internal device address
+#define 	AT91C_TWI_IADRSZ_1_BYTE               (0x1 <<  8) // (TWI) One-byte internal device address
+#define 	AT91C_TWI_IADRSZ_2_BYTE               (0x2 <<  8) // (TWI) Two-byte internal device address
+#define 	AT91C_TWI_IADRSZ_3_BYTE               (0x3 <<  8) // (TWI) Three-byte internal device address
+#define AT91C_TWI_MREAD           (0x1 << 12) // (TWI) Master Read Direction
+#define AT91C_TWI_DADR            (0x7F << 16) // (TWI) Device Address
+// -------- TWI_CWGR : (TWI Offset: 0x10) TWI Clock Waveform Generator Register -------- 
+#define AT91C_TWI_CLDIV           (0xFF <<  0) // (TWI) Clock Low Divider
+#define AT91C_TWI_CHDIV           (0xFF <<  8) // (TWI) Clock High Divider
+#define AT91C_TWI_CKDIV           (0x7 << 16) // (TWI) Clock Divider
+// -------- TWI_SR : (TWI Offset: 0x20) TWI Status Register -------- 
+#define AT91C_TWI_TXCOMP          (0x1 <<  0) // (TWI) Transmission Completed
+#define AT91C_TWI_RXRDY           (0x1 <<  1) // (TWI) Receive holding register ReaDY
+#define AT91C_TWI_TXRDY           (0x1 <<  2) // (TWI) Transmit holding register ReaDY
+#define AT91C_TWI_OVRE            (0x1 <<  6) // (TWI) Overrun Error
+#define AT91C_TWI_UNRE            (0x1 <<  7) // (TWI) Underrun Error
+#define AT91C_TWI_NACK            (0x1 <<  8) // (TWI) Not Acknowledged
+// -------- TWI_IER : (TWI Offset: 0x24) TWI Interrupt Enable Register -------- 
+// -------- TWI_IDR : (TWI Offset: 0x28) TWI Interrupt Disable Register -------- 
+// -------- TWI_IMR : (TWI Offset: 0x2c) TWI Interrupt Mask Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR PWMC Channel Interface
+// *****************************************************************************
+// *** Register offset in AT91S_PWMC_CH structure ***
+#define PWMC_CMR        ( 0) // Channel Mode Register
+#define PWMC_CDTYR      ( 4) // Channel Duty Cycle Register
+#define PWMC_CPRDR      ( 8) // Channel Period Register
+#define PWMC_CCNTR      (12) // Channel Counter Register
+#define PWMC_CUPDR      (16) // Channel Update Register
+#define PWMC_Reserved   (20) // Reserved
+// -------- PWMC_CMR : (PWMC_CH Offset: 0x0) PWMC Channel Mode Register -------- 
+#define AT91C_PWMC_CPRE           (0xF <<  0) // (PWMC_CH) Channel Pre-scaler : PWMC_CLKx
+#define 	AT91C_PWMC_CPRE_MCK                  (0x0) // (PWMC_CH) 
+#define 	AT91C_PWMC_CPRE_MCKA                 (0xB) // (PWMC_CH) 
+#define 	AT91C_PWMC_CPRE_MCKB                 (0xC) // (PWMC_CH) 
+#define AT91C_PWMC_CALG           (0x1 <<  8) // (PWMC_CH) Channel Alignment
+#define AT91C_PWMC_CPOL           (0x1 <<  9) // (PWMC_CH) Channel Polarity
+#define AT91C_PWMC_CPD            (0x1 << 10) // (PWMC_CH) Channel Update Period
+// -------- PWMC_CDTYR : (PWMC_CH Offset: 0x4) PWMC Channel Duty Cycle Register -------- 
+#define AT91C_PWMC_CDTY           (0x0 <<  0) // (PWMC_CH) Channel Duty Cycle
+// -------- PWMC_CPRDR : (PWMC_CH Offset: 0x8) PWMC Channel Period Register -------- 
+#define AT91C_PWMC_CPRD           (0x0 <<  0) // (PWMC_CH) Channel Period
+// -------- PWMC_CCNTR : (PWMC_CH Offset: 0xc) PWMC Channel Counter Register -------- 
+#define AT91C_PWMC_CCNT           (0x0 <<  0) // (PWMC_CH) Channel Counter
+// -------- PWMC_CUPDR : (PWMC_CH Offset: 0x10) PWMC Channel Update Register -------- 
+#define AT91C_PWMC_CUPD           (0x0 <<  0) // (PWMC_CH) Channel Update
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Pulse Width Modulation Controller Interface
+// *****************************************************************************
+// *** Register offset in AT91S_PWMC structure ***
+#define PWMC_MR         ( 0) // PWMC Mode Register
+#define PWMC_ENA        ( 4) // PWMC Enable Register
+#define PWMC_DIS        ( 8) // PWMC Disable Register
+#define PWMC_SR         (12) // PWMC Status Register
+#define PWMC_IER        (16) // PWMC Interrupt Enable Register
+#define PWMC_IDR        (20) // PWMC Interrupt Disable Register
+#define PWMC_IMR        (24) // PWMC Interrupt Mask Register
+#define PWMC_ISR        (28) // PWMC Interrupt Status Register
+#define PWMC_VR         (252) // PWMC Version Register
+#define PWMC_CH         (512) // PWMC Channel
+// -------- PWMC_MR : (PWMC Offset: 0x0) PWMC Mode Register -------- 
+#define AT91C_PWMC_DIVA           (0xFF <<  0) // (PWMC) CLKA divide factor.
+#define AT91C_PWMC_PREA           (0xF <<  8) // (PWMC) Divider Input Clock Prescaler A
+#define 	AT91C_PWMC_PREA_MCK                  (0x0 <<  8) // (PWMC) 
+#define AT91C_PWMC_DIVB           (0xFF << 16) // (PWMC) CLKB divide factor.
+#define AT91C_PWMC_PREB           (0xF << 24) // (PWMC) Divider Input Clock Prescaler B
+#define 	AT91C_PWMC_PREB_MCK                  (0x0 << 24) // (PWMC) 
+// -------- PWMC_ENA : (PWMC Offset: 0x4) PWMC Enable Register -------- 
+#define AT91C_PWMC_CHID0          (0x1 <<  0) // (PWMC) Channel ID 0
+#define AT91C_PWMC_CHID1          (0x1 <<  1) // (PWMC) Channel ID 1
+#define AT91C_PWMC_CHID2          (0x1 <<  2) // (PWMC) Channel ID 2
+#define AT91C_PWMC_CHID3          (0x1 <<  3) // (PWMC) Channel ID 3
+// -------- PWMC_DIS : (PWMC Offset: 0x8) PWMC Disable Register -------- 
+// -------- PWMC_SR : (PWMC Offset: 0xc) PWMC Status Register -------- 
+// -------- PWMC_IER : (PWMC Offset: 0x10) PWMC Interrupt Enable Register -------- 
+// -------- PWMC_IDR : (PWMC Offset: 0x14) PWMC Interrupt Disable Register -------- 
+// -------- PWMC_IMR : (PWMC Offset: 0x18) PWMC Interrupt Mask Register -------- 
+// -------- PWMC_ISR : (PWMC Offset: 0x1c) PWMC Interrupt Status Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR USB Device Interface
+// *****************************************************************************
+// *** Register offset in AT91S_UDP structure ***
+#define UDP_NUM         ( 0) // Frame Number Register
+#define UDP_GLBSTATE    ( 4) // Global State Register
+#define UDP_FADDR       ( 8) // Function Address Register
+#define UDP_IER         (16) // Interrupt Enable Register
+#define UDP_IDR         (20) // Interrupt Disable Register
+#define UDP_IMR         (24) // Interrupt Mask Register
+#define UDP_ISR         (28) // Interrupt Status Register
+#define UDP_ICR         (32) // Interrupt Clear Register
+#define UDP_RSTEP       (40) // Reset Endpoint Register
+#define UDP_CSR         (48) // Endpoint Control and Status Register
+#define UDP_FDR         (80) // Endpoint FIFO Data Register
+#define UDP_TXVC        (116) // Transceiver Control Register
+// -------- UDP_FRM_NUM : (UDP Offset: 0x0) USB Frame Number Register -------- 
+#define AT91C_UDP_FRM_NUM         (0x7FF <<  0) // (UDP) Frame Number as Defined in the Packet Field Formats
+#define AT91C_UDP_FRM_ERR         (0x1 << 16) // (UDP) Frame Error
+#define AT91C_UDP_FRM_OK          (0x1 << 17) // (UDP) Frame OK
+// -------- UDP_GLB_STATE : (UDP Offset: 0x4) USB Global State Register -------- 
+#define AT91C_UDP_FADDEN          (0x1 <<  0) // (UDP) Function Address Enable
+#define AT91C_UDP_CONFG           (0x1 <<  1) // (UDP) Configured
+#define AT91C_UDP_ESR             (0x1 <<  2) // (UDP) Enable Send Resume
+#define AT91C_UDP_RSMINPR         (0x1 <<  3) // (UDP) A Resume Has Been Sent to the Host
+#define AT91C_UDP_RMWUPE          (0x1 <<  4) // (UDP) Remote Wake Up Enable
+// -------- UDP_FADDR : (UDP Offset: 0x8) USB Function Address Register -------- 
+#define AT91C_UDP_FADD            (0xFF <<  0) // (UDP) Function Address Value
+#define AT91C_UDP_FEN             (0x1 <<  8) // (UDP) Function Enable
+// -------- UDP_IER : (UDP Offset: 0x10) USB Interrupt Enable Register -------- 
+#define AT91C_UDP_EPINT0          (0x1 <<  0) // (UDP) Endpoint 0 Interrupt
+#define AT91C_UDP_EPINT1          (0x1 <<  1) // (UDP) Endpoint 0 Interrupt
+#define AT91C_UDP_EPINT2          (0x1 <<  2) // (UDP) Endpoint 2 Interrupt
+#define AT91C_UDP_EPINT3          (0x1 <<  3) // (UDP) Endpoint 3 Interrupt
+#define AT91C_UDP_EPINT4          (0x1 <<  4) // (UDP) Endpoint 4 Interrupt
+#define AT91C_UDP_EPINT5          (0x1 <<  5) // (UDP) Endpoint 5 Interrupt
+#define AT91C_UDP_RXSUSP          (0x1 <<  8) // (UDP) USB Suspend Interrupt
+#define AT91C_UDP_RXRSM           (0x1 <<  9) // (UDP) USB Resume Interrupt
+#define AT91C_UDP_EXTRSM          (0x1 << 10) // (UDP) USB External Resume Interrupt
+#define AT91C_UDP_SOFINT          (0x1 << 11) // (UDP) USB Start Of frame Interrupt
+#define AT91C_UDP_WAKEUP          (0x1 << 13) // (UDP) USB Resume Interrupt
+// -------- UDP_IDR : (UDP Offset: 0x14) USB Interrupt Disable Register -------- 
+// -------- UDP_IMR : (UDP Offset: 0x18) USB Interrupt Mask Register -------- 
+// -------- UDP_ISR : (UDP Offset: 0x1c) USB Interrupt Status Register -------- 
+#define AT91C_UDP_ENDBUSRES       (0x1 << 12) // (UDP) USB End Of Bus Reset Interrupt
+// -------- UDP_ICR : (UDP Offset: 0x20) USB Interrupt Clear Register -------- 
+// -------- UDP_RST_EP : (UDP Offset: 0x28) USB Reset Endpoint Register -------- 
+#define AT91C_UDP_EP0             (0x1 <<  0) // (UDP) Reset Endpoint 0
+#define AT91C_UDP_EP1             (0x1 <<  1) // (UDP) Reset Endpoint 1
+#define AT91C_UDP_EP2             (0x1 <<  2) // (UDP) Reset Endpoint 2
+#define AT91C_UDP_EP3             (0x1 <<  3) // (UDP) Reset Endpoint 3
+#define AT91C_UDP_EP4             (0x1 <<  4) // (UDP) Reset Endpoint 4
+#define AT91C_UDP_EP5             (0x1 <<  5) // (UDP) Reset Endpoint 5
+// -------- UDP_CSR : (UDP Offset: 0x30) USB Endpoint Control and Status Register -------- 
+#define AT91C_UDP_TXCOMP          (0x1 <<  0) // (UDP) Generates an IN packet with data previously written in the DPR
+#define AT91C_UDP_RX_DATA_BK0     (0x1 <<  1) // (UDP) Receive Data Bank 0
+#define AT91C_UDP_RXSETUP         (0x1 <<  2) // (UDP) Sends STALL to the Host (Control endpoints)
+#define AT91C_UDP_ISOERROR        (0x1 <<  3) // (UDP) Isochronous error (Isochronous endpoints)
+#define AT91C_UDP_TXPKTRDY        (0x1 <<  4) // (UDP) Transmit Packet Ready
+#define AT91C_UDP_FORCESTALL      (0x1 <<  5) // (UDP) Force Stall (used by Control, Bulk and Isochronous endpoints).
+#define AT91C_UDP_RX_DATA_BK1     (0x1 <<  6) // (UDP) Receive Data Bank 1 (only used by endpoints with ping-pong attributes).
+#define AT91C_UDP_DIR             (0x1 <<  7) // (UDP) Transfer Direction
+#define AT91C_UDP_EPTYPE          (0x7 <<  8) // (UDP) Endpoint type
+#define 	AT91C_UDP_EPTYPE_CTRL                 (0x0 <<  8) // (UDP) Control
+#define 	AT91C_UDP_EPTYPE_ISO_OUT              (0x1 <<  8) // (UDP) Isochronous OUT
+#define 	AT91C_UDP_EPTYPE_BULK_OUT             (0x2 <<  8) // (UDP) Bulk OUT
+#define 	AT91C_UDP_EPTYPE_INT_OUT              (0x3 <<  8) // (UDP) Interrupt OUT
+#define 	AT91C_UDP_EPTYPE_ISO_IN               (0x5 <<  8) // (UDP) Isochronous IN
+#define 	AT91C_UDP_EPTYPE_BULK_IN              (0x6 <<  8) // (UDP) Bulk IN
+#define 	AT91C_UDP_EPTYPE_INT_IN               (0x7 <<  8) // (UDP) Interrupt IN
+#define AT91C_UDP_DTGLE           (0x1 << 11) // (UDP) Data Toggle
+#define AT91C_UDP_EPEDS           (0x1 << 15) // (UDP) Endpoint Enable Disable
+#define AT91C_UDP_RXBYTECNT       (0x7FF << 16) // (UDP) Number Of Bytes Available in the FIFO
+// -------- UDP_TXVC : (UDP Offset: 0x74) Transceiver Control Register -------- 
+#define AT91C_UDP_TXVDIS          (0x1 <<  8) // (UDP) 
+#define AT91C_UDP_PUON            (0x1 <<  9) // (UDP) Pull-up ON
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Timer Counter Channel Interface
+// *****************************************************************************
+// *** Register offset in AT91S_TC structure ***
+#define TC_CCR          ( 0) // Channel Control Register
+#define TC_CMR          ( 4) // Channel Mode Register (Capture Mode / Waveform Mode)
+#define TC_CV           (16) // Counter Value
+#define TC_RA           (20) // Register A
+#define TC_RB           (24) // Register B
+#define TC_RC           (28) // Register C
+#define TC_SR           (32) // Status Register
+#define TC_IER          (36) // Interrupt Enable Register
+#define TC_IDR          (40) // Interrupt Disable Register
+#define TC_IMR          (44) // Interrupt Mask Register
+// -------- TC_CCR : (TC Offset: 0x0) TC Channel Control Register -------- 
+#define AT91C_TC_CLKEN            (0x1 <<  0) // (TC) Counter Clock Enable Command
+#define AT91C_TC_CLKDIS           (0x1 <<  1) // (TC) Counter Clock Disable Command
+#define AT91C_TC_SWTRG            (0x1 <<  2) // (TC) Software Trigger Command
+// -------- TC_CMR : (TC Offset: 0x4) TC Channel Mode Register: Capture Mode / Waveform Mode -------- 
+#define AT91C_TC_CLKS             (0x7 <<  0) // (TC) Clock Selection
+#define 	AT91C_TC_CLKS_TIMER_DIV1_CLOCK     (0x0) // (TC) Clock selected: TIMER_DIV1_CLOCK
+#define 	AT91C_TC_CLKS_TIMER_DIV2_CLOCK     (0x1) // (TC) Clock selected: TIMER_DIV2_CLOCK
+#define 	AT91C_TC_CLKS_TIMER_DIV3_CLOCK     (0x2) // (TC) Clock selected: TIMER_DIV3_CLOCK
+#define 	AT91C_TC_CLKS_TIMER_DIV4_CLOCK     (0x3) // (TC) Clock selected: TIMER_DIV4_CLOCK
+#define 	AT91C_TC_CLKS_TIMER_DIV5_CLOCK     (0x4) // (TC) Clock selected: TIMER_DIV5_CLOCK
+#define 	AT91C_TC_CLKS_XC0                  (0x5) // (TC) Clock selected: XC0
+#define 	AT91C_TC_CLKS_XC1                  (0x6) // (TC) Clock selected: XC1
+#define 	AT91C_TC_CLKS_XC2                  (0x7) // (TC) Clock selected: XC2
+#define AT91C_TC_CLKI             (0x1 <<  3) // (TC) Clock Invert
+#define AT91C_TC_BURST            (0x3 <<  4) // (TC) Burst Signal Selection
+#define 	AT91C_TC_BURST_NONE                 (0x0 <<  4) // (TC) The clock is not gated by an external signal
+#define 	AT91C_TC_BURST_XC0                  (0x1 <<  4) // (TC) XC0 is ANDed with the selected clock
+#define 	AT91C_TC_BURST_XC1                  (0x2 <<  4) // (TC) XC1 is ANDed with the selected clock
+#define 	AT91C_TC_BURST_XC2                  (0x3 <<  4) // (TC) XC2 is ANDed with the selected clock
+#define AT91C_TC_CPCSTOP          (0x1 <<  6) // (TC) Counter Clock Stopped with RC Compare
+#define AT91C_TC_LDBSTOP          (0x1 <<  6) // (TC) Counter Clock Stopped with RB Loading
+#define AT91C_TC_CPCDIS           (0x1 <<  7) // (TC) Counter Clock Disable with RC Compare
+#define AT91C_TC_LDBDIS           (0x1 <<  7) // (TC) Counter Clock Disabled with RB Loading
+#define AT91C_TC_ETRGEDG          (0x3 <<  8) // (TC) External Trigger Edge Selection
+#define 	AT91C_TC_ETRGEDG_NONE                 (0x0 <<  8) // (TC) Edge: None
+#define 	AT91C_TC_ETRGEDG_RISING               (0x1 <<  8) // (TC) Edge: rising edge
+#define 	AT91C_TC_ETRGEDG_FALLING              (0x2 <<  8) // (TC) Edge: falling edge
+#define 	AT91C_TC_ETRGEDG_BOTH                 (0x3 <<  8) // (TC) Edge: each edge
+#define AT91C_TC_EEVTEDG          (0x3 <<  8) // (TC) External Event Edge Selection
+#define 	AT91C_TC_EEVTEDG_NONE                 (0x0 <<  8) // (TC) Edge: None
+#define 	AT91C_TC_EEVTEDG_RISING               (0x1 <<  8) // (TC) Edge: rising edge
+#define 	AT91C_TC_EEVTEDG_FALLING              (0x2 <<  8) // (TC) Edge: falling edge
+#define 	AT91C_TC_EEVTEDG_BOTH                 (0x3 <<  8) // (TC) Edge: each edge
+#define AT91C_TC_EEVT             (0x3 << 10) // (TC) External Event  Selection
+#define 	AT91C_TC_EEVT_TIOB                 (0x0 << 10) // (TC) Signal selected as external event: TIOB TIOB direction: input
+#define 	AT91C_TC_EEVT_XC0                  (0x1 << 10) // (TC) Signal selected as external event: XC0 TIOB direction: output
+#define 	AT91C_TC_EEVT_XC1                  (0x2 << 10) // (TC) Signal selected as external event: XC1 TIOB direction: output
+#define 	AT91C_TC_EEVT_XC2                  (0x3 << 10) // (TC) Signal selected as external event: XC2 TIOB direction: output
+#define AT91C_TC_ABETRG           (0x1 << 10) // (TC) TIOA or TIOB External Trigger Selection
+#define AT91C_TC_ENETRG           (0x1 << 12) // (TC) External Event Trigger enable
+#define AT91C_TC_WAVESEL          (0x3 << 13) // (TC) Waveform  Selection
+#define 	AT91C_TC_WAVESEL_UP                   (0x0 << 13) // (TC) UP mode without atomatic trigger on RC Compare
+#define 	AT91C_TC_WAVESEL_UPDOWN               (0x1 << 13) // (TC) UPDOWN mode without automatic trigger on RC Compare
+#define 	AT91C_TC_WAVESEL_UP_AUTO              (0x2 << 13) // (TC) UP mode with automatic trigger on RC Compare
+#define 	AT91C_TC_WAVESEL_UPDOWN_AUTO          (0x3 << 13) // (TC) UPDOWN mode with automatic trigger on RC Compare
+#define AT91C_TC_CPCTRG           (0x1 << 14) // (TC) RC Compare Trigger Enable
+#define AT91C_TC_WAVE             (0x1 << 15) // (TC) 
+#define AT91C_TC_ACPA             (0x3 << 16) // (TC) RA Compare Effect on TIOA
+#define 	AT91C_TC_ACPA_NONE                 (0x0 << 16) // (TC) Effect: none
+#define 	AT91C_TC_ACPA_SET                  (0x1 << 16) // (TC) Effect: set
+#define 	AT91C_TC_ACPA_CLEAR                (0x2 << 16) // (TC) Effect: clear
+#define 	AT91C_TC_ACPA_TOGGLE               (0x3 << 16) // (TC) Effect: toggle
+#define AT91C_TC_LDRA             (0x3 << 16) // (TC) RA Loading Selection
+#define 	AT91C_TC_LDRA_NONE                 (0x0 << 16) // (TC) Edge: None
+#define 	AT91C_TC_LDRA_RISING               (0x1 << 16) // (TC) Edge: rising edge of TIOA
+#define 	AT91C_TC_LDRA_FALLING              (0x2 << 16) // (TC) Edge: falling edge of TIOA
+#define 	AT91C_TC_LDRA_BOTH                 (0x3 << 16) // (TC) Edge: each edge of TIOA
+#define AT91C_TC_ACPC             (0x3 << 18) // (TC) RC Compare Effect on TIOA
+#define 	AT91C_TC_ACPC_NONE                 (0x0 << 18) // (TC) Effect: none
+#define 	AT91C_TC_ACPC_SET                  (0x1 << 18) // (TC) Effect: set
+#define 	AT91C_TC_ACPC_CLEAR                (0x2 << 18) // (TC) Effect: clear
+#define 	AT91C_TC_ACPC_TOGGLE               (0x3 << 18) // (TC) Effect: toggle
+#define AT91C_TC_LDRB             (0x3 << 18) // (TC) RB Loading Selection
+#define 	AT91C_TC_LDRB_NONE                 (0x0 << 18) // (TC) Edge: None
+#define 	AT91C_TC_LDRB_RISING               (0x1 << 18) // (TC) Edge: rising edge of TIOA
+#define 	AT91C_TC_LDRB_FALLING              (0x2 << 18) // (TC) Edge: falling edge of TIOA
+#define 	AT91C_TC_LDRB_BOTH                 (0x3 << 18) // (TC) Edge: each edge of TIOA
+#define AT91C_TC_AEEVT            (0x3 << 20) // (TC) External Event Effect on TIOA
+#define 	AT91C_TC_AEEVT_NONE                 (0x0 << 20) // (TC) Effect: none
+#define 	AT91C_TC_AEEVT_SET                  (0x1 << 20) // (TC) Effect: set
+#define 	AT91C_TC_AEEVT_CLEAR                (0x2 << 20) // (TC) Effect: clear
+#define 	AT91C_TC_AEEVT_TOGGLE               (0x3 << 20) // (TC) Effect: toggle
+#define AT91C_TC_ASWTRG           (0x3 << 22) // (TC) Software Trigger Effect on TIOA
+#define 	AT91C_TC_ASWTRG_NONE                 (0x0 << 22) // (TC) Effect: none
+#define 	AT91C_TC_ASWTRG_SET                  (0x1 << 22) // (TC) Effect: set
+#define 	AT91C_TC_ASWTRG_CLEAR                (0x2 << 22) // (TC) Effect: clear
+#define 	AT91C_TC_ASWTRG_TOGGLE               (0x3 << 22) // (TC) Effect: toggle
+#define AT91C_TC_BCPB             (0x3 << 24) // (TC) RB Compare Effect on TIOB
+#define 	AT91C_TC_BCPB_NONE                 (0x0 << 24) // (TC) Effect: none
+#define 	AT91C_TC_BCPB_SET                  (0x1 << 24) // (TC) Effect: set
+#define 	AT91C_TC_BCPB_CLEAR                (0x2 << 24) // (TC) Effect: clear
+#define 	AT91C_TC_BCPB_TOGGLE               (0x3 << 24) // (TC) Effect: toggle
+#define AT91C_TC_BCPC             (0x3 << 26) // (TC) RC Compare Effect on TIOB
+#define 	AT91C_TC_BCPC_NONE                 (0x0 << 26) // (TC) Effect: none
+#define 	AT91C_TC_BCPC_SET                  (0x1 << 26) // (TC) Effect: set
+#define 	AT91C_TC_BCPC_CLEAR                (0x2 << 26) // (TC) Effect: clear
+#define 	AT91C_TC_BCPC_TOGGLE               (0x3 << 26) // (TC) Effect: toggle
+#define AT91C_TC_BEEVT            (0x3 << 28) // (TC) External Event Effect on TIOB
+#define 	AT91C_TC_BEEVT_NONE                 (0x0 << 28) // (TC) Effect: none
+#define 	AT91C_TC_BEEVT_SET                  (0x1 << 28) // (TC) Effect: set
+#define 	AT91C_TC_BEEVT_CLEAR                (0x2 << 28) // (TC) Effect: clear
+#define 	AT91C_TC_BEEVT_TOGGLE               (0x3 << 28) // (TC) Effect: toggle
+#define AT91C_TC_BSWTRG           (0x3 << 30) // (TC) Software Trigger Effect on TIOB
+#define 	AT91C_TC_BSWTRG_NONE                 (0x0 << 30) // (TC) Effect: none
+#define 	AT91C_TC_BSWTRG_SET                  (0x1 << 30) // (TC) Effect: set
+#define 	AT91C_TC_BSWTRG_CLEAR                (0x2 << 30) // (TC) Effect: clear
+#define 	AT91C_TC_BSWTRG_TOGGLE               (0x3 << 30) // (TC) Effect: toggle
+// -------- TC_SR : (TC Offset: 0x20) TC Channel Status Register -------- 
+#define AT91C_TC_COVFS            (0x1 <<  0) // (TC) Counter Overflow
+#define AT91C_TC_LOVRS            (0x1 <<  1) // (TC) Load Overrun
+#define AT91C_TC_CPAS             (0x1 <<  2) // (TC) RA Compare
+#define AT91C_TC_CPBS             (0x1 <<  3) // (TC) RB Compare
+#define AT91C_TC_CPCS             (0x1 <<  4) // (TC) RC Compare
+#define AT91C_TC_LDRAS            (0x1 <<  5) // (TC) RA Loading
+#define AT91C_TC_LDRBS            (0x1 <<  6) // (TC) RB Loading
+#define AT91C_TC_ETRGS            (0x1 <<  7) // (TC) External Trigger
+#define AT91C_TC_CLKSTA           (0x1 << 16) // (TC) Clock Enabling
+#define AT91C_TC_MTIOA            (0x1 << 17) // (TC) TIOA Mirror
+#define AT91C_TC_MTIOB            (0x1 << 18) // (TC) TIOA Mirror
+// -------- TC_IER : (TC Offset: 0x24) TC Channel Interrupt Enable Register -------- 
+// -------- TC_IDR : (TC Offset: 0x28) TC Channel Interrupt Disable Register -------- 
+// -------- TC_IMR : (TC Offset: 0x2c) TC Channel Interrupt Mask Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Timer Counter Interface
+// *****************************************************************************
+// *** Register offset in AT91S_TCB structure ***
+#define TCB_TC0         ( 0) // TC Channel 0
+#define TCB_TC1         (64) // TC Channel 1
+#define TCB_TC2         (128) // TC Channel 2
+#define TCB_BCR         (192) // TC Block Control Register
+#define TCB_BMR         (196) // TC Block Mode Register
+// -------- TCB_BCR : (TCB Offset: 0xc0) TC Block Control Register -------- 
+#define AT91C_TCB_SYNC            (0x1 <<  0) // (TCB) Synchro Command
+// -------- TCB_BMR : (TCB Offset: 0xc4) TC Block Mode Register -------- 
+#define AT91C_TCB_TC0XC0S         (0x3 <<  0) // (TCB) External Clock Signal 0 Selection
+#define 	AT91C_TCB_TC0XC0S_TCLK0                (0x0) // (TCB) TCLK0 connected to XC0
+#define 	AT91C_TCB_TC0XC0S_NONE                 (0x1) // (TCB) None signal connected to XC0
+#define 	AT91C_TCB_TC0XC0S_TIOA1                (0x2) // (TCB) TIOA1 connected to XC0
+#define 	AT91C_TCB_TC0XC0S_TIOA2                (0x3) // (TCB) TIOA2 connected to XC0
+#define AT91C_TCB_TC1XC1S         (0x3 <<  2) // (TCB) External Clock Signal 1 Selection
+#define 	AT91C_TCB_TC1XC1S_TCLK1                (0x0 <<  2) // (TCB) TCLK1 connected to XC1
+#define 	AT91C_TCB_TC1XC1S_NONE                 (0x1 <<  2) // (TCB) None signal connected to XC1
+#define 	AT91C_TCB_TC1XC1S_TIOA0                (0x2 <<  2) // (TCB) TIOA0 connected to XC1
+#define 	AT91C_TCB_TC1XC1S_TIOA2                (0x3 <<  2) // (TCB) TIOA2 connected to XC1
+#define AT91C_TCB_TC2XC2S         (0x3 <<  4) // (TCB) External Clock Signal 2 Selection
+#define 	AT91C_TCB_TC2XC2S_TCLK2                (0x0 <<  4) // (TCB) TCLK2 connected to XC2
+#define 	AT91C_TCB_TC2XC2S_NONE                 (0x1 <<  4) // (TCB) None signal connected to XC2
+#define 	AT91C_TCB_TC2XC2S_TIOA0                (0x2 <<  4) // (TCB) TIOA0 connected to XC2
+#define 	AT91C_TCB_TC2XC2S_TIOA1                (0x3 <<  4) // (TCB) TIOA2 connected to XC2
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Control Area Network MailBox Interface
+// *****************************************************************************
+// *** Register offset in AT91S_CAN_MB structure ***
+#define CAN_MB_MMR      ( 0) // MailBox Mode Register
+#define CAN_MB_MAM      ( 4) // MailBox Acceptance Mask Register
+#define CAN_MB_MID      ( 8) // MailBox ID Register
+#define CAN_MB_MFID     (12) // MailBox Family ID Register
+#define CAN_MB_MSR      (16) // MailBox Status Register
+#define CAN_MB_MDL      (20) // MailBox Data Low Register
+#define CAN_MB_MDH      (24) // MailBox Data High Register
+#define CAN_MB_MCR      (28) // MailBox Control Register
+// -------- CAN_MMR : (CAN_MB Offset: 0x0) CAN Message Mode Register -------- 
+#define AT91C_CAN_MTIMEMARK       (0xFFFF <<  0) // (CAN_MB) Mailbox Timemark
+#define AT91C_CAN_PRIOR           (0xF << 16) // (CAN_MB) Mailbox Priority
+#define AT91C_CAN_MOT             (0x7 << 24) // (CAN_MB) Mailbox Object Type
+#define 	AT91C_CAN_MOT_DIS                  (0x0 << 24) // (CAN_MB) 
+#define 	AT91C_CAN_MOT_RX                   (0x1 << 24) // (CAN_MB) 
+#define 	AT91C_CAN_MOT_RXOVERWRITE          (0x2 << 24) // (CAN_MB) 
+#define 	AT91C_CAN_MOT_TX                   (0x3 << 24) // (CAN_MB) 
+#define 	AT91C_CAN_MOT_CONSUMER             (0x4 << 24) // (CAN_MB) 
+#define 	AT91C_CAN_MOT_PRODUCER             (0x5 << 24) // (CAN_MB) 
+// -------- CAN_MAM : (CAN_MB Offset: 0x4) CAN Message Acceptance Mask Register -------- 
+#define AT91C_CAN_MIDvB           (0x3FFFF <<  0) // (CAN_MB) Complementary bits for identifier in extended mode
+#define AT91C_CAN_MIDvA           (0x7FF << 18) // (CAN_MB) Identifier for standard frame mode
+#define AT91C_CAN_MIDE            (0x1 << 29) // (CAN_MB) Identifier Version
+// -------- CAN_MID : (CAN_MB Offset: 0x8) CAN Message ID Register -------- 
+// -------- CAN_MFID : (CAN_MB Offset: 0xc) CAN Message Family ID Register -------- 
+// -------- CAN_MSR : (CAN_MB Offset: 0x10) CAN Message Status Register -------- 
+#define AT91C_CAN_MTIMESTAMP      (0xFFFF <<  0) // (CAN_MB) Timer Value
+#define AT91C_CAN_MDLC            (0xF << 16) // (CAN_MB) Mailbox Data Length Code
+#define AT91C_CAN_MRTR            (0x1 << 20) // (CAN_MB) Mailbox Remote Transmission Request
+#define AT91C_CAN_MABT            (0x1 << 22) // (CAN_MB) Mailbox Message Abort
+#define AT91C_CAN_MRDY            (0x1 << 23) // (CAN_MB) Mailbox Ready
+#define AT91C_CAN_MMI             (0x1 << 24) // (CAN_MB) Mailbox Message Ignored
+// -------- CAN_MDL : (CAN_MB Offset: 0x14) CAN Message Data Low Register -------- 
+// -------- CAN_MDH : (CAN_MB Offset: 0x18) CAN Message Data High Register -------- 
+// -------- CAN_MCR : (CAN_MB Offset: 0x1c) CAN Message Control Register -------- 
+#define AT91C_CAN_MACR            (0x1 << 22) // (CAN_MB) Abort Request for Mailbox
+#define AT91C_CAN_MTCR            (0x1 << 23) // (CAN_MB) Mailbox Transfer Command
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Control Area Network Interface
+// *****************************************************************************
+// *** Register offset in AT91S_CAN structure ***
+#define CAN_MR          ( 0) // Mode Register
+#define CAN_IER         ( 4) // Interrupt Enable Register
+#define CAN_IDR         ( 8) // Interrupt Disable Register
+#define CAN_IMR         (12) // Interrupt Mask Register
+#define CAN_SR          (16) // Status Register
+#define CAN_BR          (20) // Baudrate Register
+#define CAN_TIM         (24) // Timer Register
+#define CAN_TIMESTP     (28) // Time Stamp Register
+#define CAN_ECR         (32) // Error Counter Register
+#define CAN_TCR         (36) // Transfer Command Register
+#define CAN_ACR         (40) // Abort Command Register
+#define CAN_VR          (252) // Version Register
+#define CAN_MB0         (512) // CAN Mailbox 0
+#define CAN_MB1         (544) // CAN Mailbox 1
+#define CAN_MB2         (576) // CAN Mailbox 2
+#define CAN_MB3         (608) // CAN Mailbox 3
+#define CAN_MB4         (640) // CAN Mailbox 4
+#define CAN_MB5         (672) // CAN Mailbox 5
+#define CAN_MB6         (704) // CAN Mailbox 6
+#define CAN_MB7         (736) // CAN Mailbox 7
+#define CAN_MB8         (768) // CAN Mailbox 8
+#define CAN_MB9         (800) // CAN Mailbox 9
+#define CAN_MB10        (832) // CAN Mailbox 10
+#define CAN_MB11        (864) // CAN Mailbox 11
+#define CAN_MB12        (896) // CAN Mailbox 12
+#define CAN_MB13        (928) // CAN Mailbox 13
+#define CAN_MB14        (960) // CAN Mailbox 14
+#define CAN_MB15        (992) // CAN Mailbox 15
+// -------- CAN_MR : (CAN Offset: 0x0) CAN Mode Register -------- 
+#define AT91C_CAN_CANEN           (0x1 <<  0) // (CAN) CAN Controller Enable
+#define AT91C_CAN_LPM             (0x1 <<  1) // (CAN) Disable/Enable Low Power Mode
+#define AT91C_CAN_ABM             (0x1 <<  2) // (CAN) Disable/Enable Autobaud/Listen Mode
+#define AT91C_CAN_OVL             (0x1 <<  3) // (CAN) Disable/Enable Overload Frame
+#define AT91C_CAN_TEOF            (0x1 <<  4) // (CAN) Time Stamp messages at each end of Frame
+#define AT91C_CAN_TTM             (0x1 <<  5) // (CAN) Disable/Enable Time Trigger Mode
+#define AT91C_CAN_TIMFRZ          (0x1 <<  6) // (CAN) Enable Timer Freeze
+#define AT91C_CAN_DRPT            (0x1 <<  7) // (CAN) Disable Repeat
+// -------- CAN_IER : (CAN Offset: 0x4) CAN Interrupt Enable Register -------- 
+#define AT91C_CAN_MB0             (0x1 <<  0) // (CAN) Mailbox 0 Flag
+#define AT91C_CAN_MB1             (0x1 <<  1) // (CAN) Mailbox 1 Flag
+#define AT91C_CAN_MB2             (0x1 <<  2) // (CAN) Mailbox 2 Flag
+#define AT91C_CAN_MB3             (0x1 <<  3) // (CAN) Mailbox 3 Flag
+#define AT91C_CAN_MB4             (0x1 <<  4) // (CAN) Mailbox 4 Flag
+#define AT91C_CAN_MB5             (0x1 <<  5) // (CAN) Mailbox 5 Flag
+#define AT91C_CAN_MB6             (0x1 <<  6) // (CAN) Mailbox 6 Flag
+#define AT91C_CAN_MB7             (0x1 <<  7) // (CAN) Mailbox 7 Flag
+#define AT91C_CAN_MB8             (0x1 <<  8) // (CAN) Mailbox 8 Flag
+#define AT91C_CAN_MB9             (0x1 <<  9) // (CAN) Mailbox 9 Flag
+#define AT91C_CAN_MB10            (0x1 << 10) // (CAN) Mailbox 10 Flag
+#define AT91C_CAN_MB11            (0x1 << 11) // (CAN) Mailbox 11 Flag
+#define AT91C_CAN_MB12            (0x1 << 12) // (CAN) Mailbox 12 Flag
+#define AT91C_CAN_MB13            (0x1 << 13) // (CAN) Mailbox 13 Flag
+#define AT91C_CAN_MB14            (0x1 << 14) // (CAN) Mailbox 14 Flag
+#define AT91C_CAN_MB15            (0x1 << 15) // (CAN) Mailbox 15 Flag
+#define AT91C_CAN_ERRA            (0x1 << 16) // (CAN) Error Active Mode Flag
+#define AT91C_CAN_WARN            (0x1 << 17) // (CAN) Warning Limit Flag
+#define AT91C_CAN_ERRP            (0x1 << 18) // (CAN) Error Passive Mode Flag
+#define AT91C_CAN_BOFF            (0x1 << 19) // (CAN) Bus Off Mode Flag
+#define AT91C_CAN_SLEEP           (0x1 << 20) // (CAN) Sleep Flag
+#define AT91C_CAN_WAKEUP          (0x1 << 21) // (CAN) Wakeup Flag
+#define AT91C_CAN_TOVF            (0x1 << 22) // (CAN) Timer Overflow Flag
+#define AT91C_CAN_TSTP            (0x1 << 23) // (CAN) Timestamp Flag
+#define AT91C_CAN_CERR            (0x1 << 24) // (CAN) CRC Error
+#define AT91C_CAN_SERR            (0x1 << 25) // (CAN) Stuffing Error
+#define AT91C_CAN_AERR            (0x1 << 26) // (CAN) Acknowledgment Error
+#define AT91C_CAN_FERR            (0x1 << 27) // (CAN) Form Error
+#define AT91C_CAN_BERR            (0x1 << 28) // (CAN) Bit Error
+// -------- CAN_IDR : (CAN Offset: 0x8) CAN Interrupt Disable Register -------- 
+// -------- CAN_IMR : (CAN Offset: 0xc) CAN Interrupt Mask Register -------- 
+// -------- CAN_SR : (CAN Offset: 0x10) CAN Status Register -------- 
+#define AT91C_CAN_RBSY            (0x1 << 29) // (CAN) Receiver Busy
+#define AT91C_CAN_TBSY            (0x1 << 30) // (CAN) Transmitter Busy
+#define AT91C_CAN_OVLY            (0x1 << 31) // (CAN) Overload Busy
+// -------- CAN_BR : (CAN Offset: 0x14) CAN Baudrate Register -------- 
+#define AT91C_CAN_PHASE2          (0x7 <<  0) // (CAN) Phase 2 segment
+#define AT91C_CAN_PHASE1          (0x7 <<  4) // (CAN) Phase 1 segment
+#define AT91C_CAN_PROPAG          (0x7 <<  8) // (CAN) Programmation time segment
+#define AT91C_CAN_SYNC            (0x3 << 12) // (CAN) Re-synchronization jump width segment
+#define AT91C_CAN_BRP             (0x7F << 16) // (CAN) Baudrate Prescaler
+#define AT91C_CAN_SMP             (0x1 << 24) // (CAN) Sampling mode
+// -------- CAN_TIM : (CAN Offset: 0x18) CAN Timer Register -------- 
+#define AT91C_CAN_TIMER           (0xFFFF <<  0) // (CAN) Timer field
+// -------- CAN_TIMESTP : (CAN Offset: 0x1c) CAN Timestamp Register -------- 
+// -------- CAN_ECR : (CAN Offset: 0x20) CAN Error Counter Register -------- 
+#define AT91C_CAN_REC             (0xFF <<  0) // (CAN) Receive Error Counter
+#define AT91C_CAN_TEC             (0xFF << 16) // (CAN) Transmit Error Counter
+// -------- CAN_TCR : (CAN Offset: 0x24) CAN Transfer Command Register -------- 
+#define AT91C_CAN_TIMRST          (0x1 << 31) // (CAN) Timer Reset Field
+// -------- CAN_ACR : (CAN Offset: 0x28) CAN Abort Command Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Ethernet MAC 10/100
+// *****************************************************************************
+// *** Register offset in AT91S_EMAC structure ***
+#define EMAC_NCR        ( 0) // Network Control Register
+#define EMAC_NCFGR      ( 4) // Network Configuration Register
+#define EMAC_NSR        ( 8) // Network Status Register
+#define EMAC_TSR        (20) // Transmit Status Register
+#define EMAC_RBQP       (24) // Receive Buffer Queue Pointer
+#define EMAC_TBQP       (28) // Transmit Buffer Queue Pointer
+#define EMAC_RSR        (32) // Receive Status Register
+#define EMAC_ISR        (36) // Interrupt Status Register
+#define EMAC_IER        (40) // Interrupt Enable Register
+#define EMAC_IDR        (44) // Interrupt Disable Register
+#define EMAC_IMR        (48) // Interrupt Mask Register
+#define EMAC_MAN        (52) // PHY Maintenance Register
+#define EMAC_PTR        (56) // Pause Time Register
+#define EMAC_PFR        (60) // Pause Frames received Register
+#define EMAC_FTO        (64) // Frames Transmitted OK Register
+#define EMAC_SCF        (68) // Single Collision Frame Register
+#define EMAC_MCF        (72) // Multiple Collision Frame Register
+#define EMAC_FRO        (76) // Frames Received OK Register
+#define EMAC_FCSE       (80) // Frame Check Sequence Error Register
+#define EMAC_ALE        (84) // Alignment Error Register
+#define EMAC_DTF        (88) // Deferred Transmission Frame Register
+#define EMAC_LCOL       (92) // Late Collision Register
+#define EMAC_ECOL       (96) // Excessive Collision Register
+#define EMAC_TUND       (100) // Transmit Underrun Error Register
+#define EMAC_CSE        (104) // Carrier Sense Error Register
+#define EMAC_RRE        (108) // Receive Ressource Error Register
+#define EMAC_ROV        (112) // Receive Overrun Errors Register
+#define EMAC_RSE        (116) // Receive Symbol Errors Register
+#define EMAC_ELE        (120) // Excessive Length Errors Register
+#define EMAC_RJA        (124) // Receive Jabbers Register
+#define EMAC_USF        (128) // Undersize Frames Register
+#define EMAC_STE        (132) // SQE Test Error Register
+#define EMAC_RLE        (136) // Receive Length Field Mismatch Register
+#define EMAC_TPF        (140) // Transmitted Pause Frames Register
+#define EMAC_HRB        (144) // Hash Address Bottom[31:0]
+#define EMAC_HRT        (148) // Hash Address Top[63:32]
+#define EMAC_SA1L       (152) // Specific Address 1 Bottom, First 4 bytes
+#define EMAC_SA1H       (156) // Specific Address 1 Top, Last 2 bytes
+#define EMAC_SA2L       (160) // Specific Address 2 Bottom, First 4 bytes
+#define EMAC_SA2H       (164) // Specific Address 2 Top, Last 2 bytes
+#define EMAC_SA3L       (168) // Specific Address 3 Bottom, First 4 bytes
+#define EMAC_SA3H       (172) // Specific Address 3 Top, Last 2 bytes
+#define EMAC_SA4L       (176) // Specific Address 4 Bottom, First 4 bytes
+#define EMAC_SA4H       (180) // Specific Address 4 Top, Last 2 bytes
+#define EMAC_TID        (184) // Type ID Checking Register
+#define EMAC_TPQ        (188) // Transmit Pause Quantum Register
+#define EMAC_USRIO      (192) // USER Input/Output Register
+#define EMAC_WOL        (196) // Wake On LAN Register
+#define EMAC_REV        (252) // Revision Register
+// -------- EMAC_NCR : (EMAC Offset: 0x0)  -------- 
+#define AT91C_EMAC_LB             (0x1 <<  0) // (EMAC) Loopback. Optional. When set, loopback signal is at high level.
+#define AT91C_EMAC_LLB            (0x1 <<  1) // (EMAC) Loopback local. 
+#define AT91C_EMAC_RE             (0x1 <<  2) // (EMAC) Receive enable. 
+#define AT91C_EMAC_TE             (0x1 <<  3) // (EMAC) Transmit enable. 
+#define AT91C_EMAC_MPE            (0x1 <<  4) // (EMAC) Management port enable. 
+#define AT91C_EMAC_CLRSTAT        (0x1 <<  5) // (EMAC) Clear statistics registers. 
+#define AT91C_EMAC_INCSTAT        (0x1 <<  6) // (EMAC) Increment statistics registers. 
+#define AT91C_EMAC_WESTAT         (0x1 <<  7) // (EMAC) Write enable for statistics registers. 
+#define AT91C_EMAC_BP             (0x1 <<  8) // (EMAC) Back pressure. 
+#define AT91C_EMAC_TSTART         (0x1 <<  9) // (EMAC) Start Transmission. 
+#define AT91C_EMAC_THALT          (0x1 << 10) // (EMAC) Transmission Halt. 
+#define AT91C_EMAC_TPFR           (0x1 << 11) // (EMAC) Transmit pause frame 
+#define AT91C_EMAC_TZQ            (0x1 << 12) // (EMAC) Transmit zero quantum pause frame
+// -------- EMAC_NCFGR : (EMAC Offset: 0x4) Network Configuration Register -------- 
+#define AT91C_EMAC_SPD            (0x1 <<  0) // (EMAC) Speed. 
+#define AT91C_EMAC_FD             (0x1 <<  1) // (EMAC) Full duplex. 
+#define AT91C_EMAC_JFRAME         (0x1 <<  3) // (EMAC) Jumbo Frames. 
+#define AT91C_EMAC_CAF            (0x1 <<  4) // (EMAC) Copy all frames. 
+#define AT91C_EMAC_NBC            (0x1 <<  5) // (EMAC) No broadcast. 
+#define AT91C_EMAC_MTI            (0x1 <<  6) // (EMAC) Multicast hash event enable
+#define AT91C_EMAC_UNI            (0x1 <<  7) // (EMAC) Unicast hash enable. 
+#define AT91C_EMAC_BIG            (0x1 <<  8) // (EMAC) Receive 1522 bytes. 
+#define AT91C_EMAC_EAE            (0x1 <<  9) // (EMAC) External address match enable. 
+#define AT91C_EMAC_CLK            (0x3 << 10) // (EMAC) 
+#define 	AT91C_EMAC_CLK_HCLK_8               (0x0 << 10) // (EMAC) HCLK divided by 8
+#define 	AT91C_EMAC_CLK_HCLK_16              (0x1 << 10) // (EMAC) HCLK divided by 16
+#define 	AT91C_EMAC_CLK_HCLK_32              (0x2 << 10) // (EMAC) HCLK divided by 32
+#define 	AT91C_EMAC_CLK_HCLK_64              (0x3 << 10) // (EMAC) HCLK divided by 64
+#define AT91C_EMAC_RTY            (0x1 << 12) // (EMAC) 
+#define AT91C_EMAC_PAE            (0x1 << 13) // (EMAC) 
+#define AT91C_EMAC_RBOF           (0x3 << 14) // (EMAC) 
+#define 	AT91C_EMAC_RBOF_OFFSET_0             (0x0 << 14) // (EMAC) no offset from start of receive buffer
+#define 	AT91C_EMAC_RBOF_OFFSET_1             (0x1 << 14) // (EMAC) one byte offset from start of receive buffer
+#define 	AT91C_EMAC_RBOF_OFFSET_2             (0x2 << 14) // (EMAC) two bytes offset from start of receive buffer
+#define 	AT91C_EMAC_RBOF_OFFSET_3             (0x3 << 14) // (EMAC) three bytes offset from start of receive buffer
+#define AT91C_EMAC_RLCE           (0x1 << 16) // (EMAC) Receive Length field Checking Enable
+#define AT91C_EMAC_DRFCS          (0x1 << 17) // (EMAC) Discard Receive FCS
+#define AT91C_EMAC_EFRHD          (0x1 << 18) // (EMAC) 
+#define AT91C_EMAC_IRXFCS         (0x1 << 19) // (EMAC) Ignore RX FCS
+// -------- EMAC_NSR : (EMAC Offset: 0x8) Network Status Register -------- 
+#define AT91C_EMAC_LINKR          (0x1 <<  0) // (EMAC) 
+#define AT91C_EMAC_MDIO           (0x1 <<  1) // (EMAC) 
+#define AT91C_EMAC_IDLE           (0x1 <<  2) // (EMAC) 
+// -------- EMAC_TSR : (EMAC Offset: 0x14) Transmit Status Register -------- 
+#define AT91C_EMAC_UBR            (0x1 <<  0) // (EMAC) 
+#define AT91C_EMAC_COL            (0x1 <<  1) // (EMAC) 
+#define AT91C_EMAC_RLES           (0x1 <<  2) // (EMAC) 
+#define AT91C_EMAC_TGO            (0x1 <<  3) // (EMAC) Transmit Go
+#define AT91C_EMAC_BEX            (0x1 <<  4) // (EMAC) Buffers exhausted mid frame
+#define AT91C_EMAC_COMP           (0x1 <<  5) // (EMAC) 
+#define AT91C_EMAC_UND            (0x1 <<  6) // (EMAC) 
+// -------- EMAC_RSR : (EMAC Offset: 0x20) Receive Status Register -------- 
+#define AT91C_EMAC_BNA            (0x1 <<  0) // (EMAC) 
+#define AT91C_EMAC_REC            (0x1 <<  1) // (EMAC) 
+#define AT91C_EMAC_OVR            (0x1 <<  2) // (EMAC) 
+// -------- EMAC_ISR : (EMAC Offset: 0x24) Interrupt Status Register -------- 
+#define AT91C_EMAC_MFD            (0x1 <<  0) // (EMAC) 
+#define AT91C_EMAC_RCOMP          (0x1 <<  1) // (EMAC) 
+#define AT91C_EMAC_RXUBR          (0x1 <<  2) // (EMAC) 
+#define AT91C_EMAC_TXUBR          (0x1 <<  3) // (EMAC) 
+#define AT91C_EMAC_TUNDR          (0x1 <<  4) // (EMAC) 
+#define AT91C_EMAC_RLEX           (0x1 <<  5) // (EMAC) 
+#define AT91C_EMAC_TXERR          (0x1 <<  6) // (EMAC) 
+#define AT91C_EMAC_TCOMP          (0x1 <<  7) // (EMAC) 
+#define AT91C_EMAC_LINK           (0x1 <<  9) // (EMAC) 
+#define AT91C_EMAC_ROVR           (0x1 << 10) // (EMAC) 
+#define AT91C_EMAC_HRESP          (0x1 << 11) // (EMAC) 
+#define AT91C_EMAC_PFRE           (0x1 << 12) // (EMAC) 
+#define AT91C_EMAC_PTZ            (0x1 << 13) // (EMAC) 
+// -------- EMAC_IER : (EMAC Offset: 0x28) Interrupt Enable Register -------- 
+// -------- EMAC_IDR : (EMAC Offset: 0x2c) Interrupt Disable Register -------- 
+// -------- EMAC_IMR : (EMAC Offset: 0x30) Interrupt Mask Register -------- 
+// -------- EMAC_MAN : (EMAC Offset: 0x34) PHY Maintenance Register -------- 
+#define AT91C_EMAC_DATA           (0xFFFF <<  0) // (EMAC) 
+#define AT91C_EMAC_CODE           (0x3 << 16) // (EMAC) 
+#define AT91C_EMAC_REGA           (0x1F << 18) // (EMAC) 
+#define AT91C_EMAC_PHYA           (0x1F << 23) // (EMAC) 
+#define AT91C_EMAC_RW             (0x3 << 28) // (EMAC) 
+#define AT91C_EMAC_SOF            (0x3 << 30) // (EMAC) 
+// -------- EMAC_USRIO : (EMAC Offset: 0xc0) USER Input Output Register -------- 
+#define AT91C_EMAC_RMII           (0x1 <<  0) // (EMAC) Reduce MII
+#define AT91C_EMAC_CLKEN          (0x1 <<  1) // (EMAC) Clock Enable
+// -------- EMAC_WOL : (EMAC Offset: 0xc4) Wake On LAN Register -------- 
+#define AT91C_EMAC_IP             (0xFFFF <<  0) // (EMAC) ARP request IP address
+#define AT91C_EMAC_MAG            (0x1 << 16) // (EMAC) Magic packet event enable
+#define AT91C_EMAC_ARP            (0x1 << 17) // (EMAC) ARP request event enable
+#define AT91C_EMAC_SA1            (0x1 << 18) // (EMAC) Specific address register 1 event enable
+// -------- EMAC_REV : (EMAC Offset: 0xfc) Revision Register -------- 
+#define AT91C_EMAC_REVREF         (0xFFFF <<  0) // (EMAC) 
+#define AT91C_EMAC_PARTREF        (0xFFFF << 16) // (EMAC) 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Analog to Digital Convertor
+// *****************************************************************************
+// *** Register offset in AT91S_ADC structure ***
+#define ADC_CR          ( 0) // ADC Control Register
+#define ADC_MR          ( 4) // ADC Mode Register
+#define ADC_CHER        (16) // ADC Channel Enable Register
+#define ADC_CHDR        (20) // ADC Channel Disable Register
+#define ADC_CHSR        (24) // ADC Channel Status Register
+#define ADC_SR          (28) // ADC Status Register
+#define ADC_LCDR        (32) // ADC Last Converted Data Register
+#define ADC_IER         (36) // ADC Interrupt Enable Register
+#define ADC_IDR         (40) // ADC Interrupt Disable Register
+#define ADC_IMR         (44) // ADC Interrupt Mask Register
+#define ADC_CDR0        (48) // ADC Channel Data Register 0
+#define ADC_CDR1        (52) // ADC Channel Data Register 1
+#define ADC_CDR2        (56) // ADC Channel Data Register 2
+#define ADC_CDR3        (60) // ADC Channel Data Register 3
+#define ADC_CDR4        (64) // ADC Channel Data Register 4
+#define ADC_CDR5        (68) // ADC Channel Data Register 5
+#define ADC_CDR6        (72) // ADC Channel Data Register 6
+#define ADC_CDR7        (76) // ADC Channel Data Register 7
+#define ADC_RPR         (256) // Receive Pointer Register
+#define ADC_RCR         (260) // Receive Counter Register
+#define ADC_TPR         (264) // Transmit Pointer Register
+#define ADC_TCR         (268) // Transmit Counter Register
+#define ADC_RNPR        (272) // Receive Next Pointer Register
+#define ADC_RNCR        (276) // Receive Next Counter Register
+#define ADC_TNPR        (280) // Transmit Next Pointer Register
+#define ADC_TNCR        (284) // Transmit Next Counter Register
+#define ADC_PTCR        (288) // PDC Transfer Control Register
+#define ADC_PTSR        (292) // PDC Transfer Status Register
+// -------- ADC_CR : (ADC Offset: 0x0) ADC Control Register -------- 
+#define AT91C_ADC_SWRST           (0x1 <<  0) // (ADC) Software Reset
+#define AT91C_ADC_START           (0x1 <<  1) // (ADC) Start Conversion
+// -------- ADC_MR : (ADC Offset: 0x4) ADC Mode Register -------- 
+#define AT91C_ADC_TRGEN           (0x1 <<  0) // (ADC) Trigger Enable
+#define 	AT91C_ADC_TRGEN_DIS                  (0x0) // (ADC) Hradware triggers are disabled. Starting a conversion is only possible by software
+#define 	AT91C_ADC_TRGEN_EN                   (0x1) // (ADC) Hardware trigger selected by TRGSEL field is enabled.
+#define AT91C_ADC_TRGSEL          (0x7 <<  1) // (ADC) Trigger Selection
+#define 	AT91C_ADC_TRGSEL_TIOA0                (0x0 <<  1) // (ADC) Selected TRGSEL = TIAO0
+#define 	AT91C_ADC_TRGSEL_TIOA1                (0x1 <<  1) // (ADC) Selected TRGSEL = TIAO1
+#define 	AT91C_ADC_TRGSEL_TIOA2                (0x2 <<  1) // (ADC) Selected TRGSEL = TIAO2
+#define 	AT91C_ADC_TRGSEL_TIOA3                (0x3 <<  1) // (ADC) Selected TRGSEL = TIAO3
+#define 	AT91C_ADC_TRGSEL_TIOA4                (0x4 <<  1) // (ADC) Selected TRGSEL = TIAO4
+#define 	AT91C_ADC_TRGSEL_TIOA5                (0x5 <<  1) // (ADC) Selected TRGSEL = TIAO5
+#define 	AT91C_ADC_TRGSEL_EXT                  (0x6 <<  1) // (ADC) Selected TRGSEL = External Trigger
+#define AT91C_ADC_LOWRES          (0x1 <<  4) // (ADC) Resolution.
+#define 	AT91C_ADC_LOWRES_10_BIT               (0x0 <<  4) // (ADC) 10-bit resolution
+#define 	AT91C_ADC_LOWRES_8_BIT                (0x1 <<  4) // (ADC) 8-bit resolution
+#define AT91C_ADC_SLEEP           (0x1 <<  5) // (ADC) Sleep Mode
+#define 	AT91C_ADC_SLEEP_NORMAL_MODE          (0x0 <<  5) // (ADC) Normal Mode
+#define 	AT91C_ADC_SLEEP_MODE                 (0x1 <<  5) // (ADC) Sleep Mode
+#define AT91C_ADC_PRESCAL         (0x3F <<  8) // (ADC) Prescaler rate selection
+#define AT91C_ADC_STARTUP         (0x1F << 16) // (ADC) Startup Time
+#define AT91C_ADC_SHTIM           (0xF << 24) // (ADC) Sample & Hold Time
+// -------- 	ADC_CHER : (ADC Offset: 0x10) ADC Channel Enable Register -------- 
+#define AT91C_ADC_CH0             (0x1 <<  0) // (ADC) Channel 0
+#define AT91C_ADC_CH1             (0x1 <<  1) // (ADC) Channel 1
+#define AT91C_ADC_CH2             (0x1 <<  2) // (ADC) Channel 2
+#define AT91C_ADC_CH3             (0x1 <<  3) // (ADC) Channel 3
+#define AT91C_ADC_CH4             (0x1 <<  4) // (ADC) Channel 4
+#define AT91C_ADC_CH5             (0x1 <<  5) // (ADC) Channel 5
+#define AT91C_ADC_CH6             (0x1 <<  6) // (ADC) Channel 6
+#define AT91C_ADC_CH7             (0x1 <<  7) // (ADC) Channel 7
+// -------- 	ADC_CHDR : (ADC Offset: 0x14) ADC Channel Disable Register -------- 
+// -------- 	ADC_CHSR : (ADC Offset: 0x18) ADC Channel Status Register -------- 
+// -------- ADC_SR : (ADC Offset: 0x1c) ADC Status Register -------- 
+#define AT91C_ADC_EOC0            (0x1 <<  0) // (ADC) End of Conversion
+#define AT91C_ADC_EOC1            (0x1 <<  1) // (ADC) End of Conversion
+#define AT91C_ADC_EOC2            (0x1 <<  2) // (ADC) End of Conversion
+#define AT91C_ADC_EOC3            (0x1 <<  3) // (ADC) End of Conversion
+#define AT91C_ADC_EOC4            (0x1 <<  4) // (ADC) End of Conversion
+#define AT91C_ADC_EOC5            (0x1 <<  5) // (ADC) End of Conversion
+#define AT91C_ADC_EOC6            (0x1 <<  6) // (ADC) End of Conversion
+#define AT91C_ADC_EOC7            (0x1 <<  7) // (ADC) End of Conversion
+#define AT91C_ADC_OVRE0           (0x1 <<  8) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE1           (0x1 <<  9) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE2           (0x1 << 10) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE3           (0x1 << 11) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE4           (0x1 << 12) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE5           (0x1 << 13) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE6           (0x1 << 14) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE7           (0x1 << 15) // (ADC) Overrun Error
+#define AT91C_ADC_DRDY            (0x1 << 16) // (ADC) Data Ready
+#define AT91C_ADC_GOVRE           (0x1 << 17) // (ADC) General Overrun
+#define AT91C_ADC_ENDRX           (0x1 << 18) // (ADC) End of Receiver Transfer
+#define AT91C_ADC_RXBUFF          (0x1 << 19) // (ADC) RXBUFF Interrupt
+// -------- ADC_LCDR : (ADC Offset: 0x20) ADC Last Converted Data Register -------- 
+#define AT91C_ADC_LDATA           (0x3FF <<  0) // (ADC) Last Data Converted
+// -------- ADC_IER : (ADC Offset: 0x24) ADC Interrupt Enable Register -------- 
+// -------- ADC_IDR : (ADC Offset: 0x28) ADC Interrupt Disable Register -------- 
+// -------- ADC_IMR : (ADC Offset: 0x2c) ADC Interrupt Mask Register -------- 
+// -------- ADC_CDR0 : (ADC Offset: 0x30) ADC Channel Data Register 0 -------- 
+#define AT91C_ADC_DATA            (0x3FF <<  0) // (ADC) Converted Data
+// -------- ADC_CDR1 : (ADC Offset: 0x34) ADC Channel Data Register 1 -------- 
+// -------- ADC_CDR2 : (ADC Offset: 0x38) ADC Channel Data Register 2 -------- 
+// -------- ADC_CDR3 : (ADC Offset: 0x3c) ADC Channel Data Register 3 -------- 
+// -------- ADC_CDR4 : (ADC Offset: 0x40) ADC Channel Data Register 4 -------- 
+// -------- ADC_CDR5 : (ADC Offset: 0x44) ADC Channel Data Register 5 -------- 
+// -------- ADC_CDR6 : (ADC Offset: 0x48) ADC Channel Data Register 6 -------- 
+// -------- ADC_CDR7 : (ADC Offset: 0x4c) ADC Channel Data Register 7 -------- 
+
+// *****************************************************************************
+//               REGISTER ADDRESS DEFINITION FOR AT91SAM7X256
+// *****************************************************************************
+// ========== Register definition for SYS peripheral ========== 
+// ========== Register definition for AIC peripheral ========== 
+#define AT91C_AIC_IVR             (0xFFFFF100) // (AIC) IRQ Vector Register
+#define AT91C_AIC_SMR             (0xFFFFF000) // (AIC) Source Mode Register
+#define AT91C_AIC_FVR             (0xFFFFF104) // (AIC) FIQ Vector Register
+#define AT91C_AIC_DCR             (0xFFFFF138) // (AIC) Debug Control Register (Protect)
+#define AT91C_AIC_EOICR           (0xFFFFF130) // (AIC) End of Interrupt Command Register
+#define AT91C_AIC_SVR             (0xFFFFF080) // (AIC) Source Vector Register
+#define AT91C_AIC_FFSR            (0xFFFFF148) // (AIC) Fast Forcing Status Register
+#define AT91C_AIC_ICCR            (0xFFFFF128) // (AIC) Interrupt Clear Command Register
+#define AT91C_AIC_ISR             (0xFFFFF108) // (AIC) Interrupt Status Register
+#define AT91C_AIC_IMR             (0xFFFFF110) // (AIC) Interrupt Mask Register
+#define AT91C_AIC_IPR             (0xFFFFF10C) // (AIC) Interrupt Pending Register
+#define AT91C_AIC_FFER            (0xFFFFF140) // (AIC) Fast Forcing Enable Register
+#define AT91C_AIC_IECR            (0xFFFFF120) // (AIC) Interrupt Enable Command Register
+#define AT91C_AIC_ISCR            (0xFFFFF12C) // (AIC) Interrupt Set Command Register
+#define AT91C_AIC_FFDR            (0xFFFFF144) // (AIC) Fast Forcing Disable Register
+#define AT91C_AIC_CISR            (0xFFFFF114) // (AIC) Core Interrupt Status Register
+#define AT91C_AIC_IDCR            (0xFFFFF124) // (AIC) Interrupt Disable Command Register
+#define AT91C_AIC_SPU             (0xFFFFF134) // (AIC) Spurious Vector Register
+// ========== Register definition for PDC_DBGU peripheral ========== 
+#define AT91C_DBGU_TCR            (0xFFFFF30C) // (PDC_DBGU) Transmit Counter Register
+#define AT91C_DBGU_RNPR           (0xFFFFF310) // (PDC_DBGU) Receive Next Pointer Register
+#define AT91C_DBGU_TNPR           (0xFFFFF318) // (PDC_DBGU) Transmit Next Pointer Register
+#define AT91C_DBGU_TPR            (0xFFFFF308) // (PDC_DBGU) Transmit Pointer Register
+#define AT91C_DBGU_RPR            (0xFFFFF300) // (PDC_DBGU) Receive Pointer Register
+#define AT91C_DBGU_RCR            (0xFFFFF304) // (PDC_DBGU) Receive Counter Register
+#define AT91C_DBGU_RNCR           (0xFFFFF314) // (PDC_DBGU) Receive Next Counter Register
+#define AT91C_DBGU_PTCR           (0xFFFFF320) // (PDC_DBGU) PDC Transfer Control Register
+#define AT91C_DBGU_PTSR           (0xFFFFF324) // (PDC_DBGU) PDC Transfer Status Register
+#define AT91C_DBGU_TNCR           (0xFFFFF31C) // (PDC_DBGU) Transmit Next Counter Register
+// ========== Register definition for DBGU peripheral ========== 
+#define AT91C_DBGU_EXID           (0xFFFFF244) // (DBGU) Chip ID Extension Register
+#define AT91C_DBGU_BRGR           (0xFFFFF220) // (DBGU) Baud Rate Generator Register
+#define AT91C_DBGU_IDR            (0xFFFFF20C) // (DBGU) Interrupt Disable Register
+#define AT91C_DBGU_CSR            (0xFFFFF214) // (DBGU) Channel Status Register
+#define AT91C_DBGU_CIDR           (0xFFFFF240) // (DBGU) Chip ID Register
+#define AT91C_DBGU_MR             (0xFFFFF204) // (DBGU) Mode Register
+#define AT91C_DBGU_IMR            (0xFFFFF210) // (DBGU) Interrupt Mask Register
+#define AT91C_DBGU_CR             (0xFFFFF200) // (DBGU) Control Register
+#define AT91C_DBGU_FNTR           (0xFFFFF248) // (DBGU) Force NTRST Register
+#define AT91C_DBGU_THR            (0xFFFFF21C) // (DBGU) Transmitter Holding Register
+#define AT91C_DBGU_RHR            (0xFFFFF218) // (DBGU) Receiver Holding Register
+#define AT91C_DBGU_IER            (0xFFFFF208) // (DBGU) Interrupt Enable Register
+// ========== Register definition for PIOA peripheral ========== 
+#define AT91C_PIOA_ODR            (0xFFFFF414) // (PIOA) Output Disable Registerr
+#define AT91C_PIOA_SODR           (0xFFFFF430) // (PIOA) Set Output Data Register
+#define AT91C_PIOA_ISR            (0xFFFFF44C) // (PIOA) Interrupt Status Register
+#define AT91C_PIOA_ABSR           (0xFFFFF478) // (PIOA) AB Select Status Register
+#define AT91C_PIOA_IER            (0xFFFFF440) // (PIOA) Interrupt Enable Register
+#define AT91C_PIOA_PPUDR          (0xFFFFF460) // (PIOA) Pull-up Disable Register
+#define AT91C_PIOA_IMR            (0xFFFFF448) // (PIOA) Interrupt Mask Register
+#define AT91C_PIOA_PER            (0xFFFFF400) // (PIOA) PIO Enable Register
+#define AT91C_PIOA_IFDR           (0xFFFFF424) // (PIOA) Input Filter Disable Register
+#define AT91C_PIOA_OWDR           (0xFFFFF4A4) // (PIOA) Output Write Disable Register
+#define AT91C_PIOA_MDSR           (0xFFFFF458) // (PIOA) Multi-driver Status Register
+#define AT91C_PIOA_IDR            (0xFFFFF444) // (PIOA) Interrupt Disable Register
+#define AT91C_PIOA_ODSR           (0xFFFFF438) // (PIOA) Output Data Status Register
+#define AT91C_PIOA_PPUSR          (0xFFFFF468) // (PIOA) Pull-up Status Register
+#define AT91C_PIOA_OWSR           (0xFFFFF4A8) // (PIOA) Output Write Status Register
+#define AT91C_PIOA_BSR            (0xFFFFF474) // (PIOA) Select B Register
+#define AT91C_PIOA_OWER           (0xFFFFF4A0) // (PIOA) Output Write Enable Register
+#define AT91C_PIOA_IFER           (0xFFFFF420) // (PIOA) Input Filter Enable Register
+#define AT91C_PIOA_PDSR           (0xFFFFF43C) // (PIOA) Pin Data Status Register
+#define AT91C_PIOA_PPUER          (0xFFFFF464) // (PIOA) Pull-up Enable Register
+#define AT91C_PIOA_OSR            (0xFFFFF418) // (PIOA) Output Status Register
+#define AT91C_PIOA_ASR            (0xFFFFF470) // (PIOA) Select A Register
+#define AT91C_PIOA_MDDR           (0xFFFFF454) // (PIOA) Multi-driver Disable Register
+#define AT91C_PIOA_CODR           (0xFFFFF434) // (PIOA) Clear Output Data Register
+#define AT91C_PIOA_MDER           (0xFFFFF450) // (PIOA) Multi-driver Enable Register
+#define AT91C_PIOA_PDR            (0xFFFFF404) // (PIOA) PIO Disable Register
+#define AT91C_PIOA_IFSR           (0xFFFFF428) // (PIOA) Input Filter Status Register
+#define AT91C_PIOA_OER            (0xFFFFF410) // (PIOA) Output Enable Register
+#define AT91C_PIOA_PSR            (0xFFFFF408) // (PIOA) PIO Status Register
+// ========== Register definition for PIOB peripheral ========== 
+#define AT91C_PIOB_OWDR           (0xFFFFF6A4) // (PIOB) Output Write Disable Register
+#define AT91C_PIOB_MDER           (0xFFFFF650) // (PIOB) Multi-driver Enable Register
+#define AT91C_PIOB_PPUSR          (0xFFFFF668) // (PIOB) Pull-up Status Register
+#define AT91C_PIOB_IMR            (0xFFFFF648) // (PIOB) Interrupt Mask Register
+#define AT91C_PIOB_ASR            (0xFFFFF670) // (PIOB) Select A Register
+#define AT91C_PIOB_PPUDR          (0xFFFFF660) // (PIOB) Pull-up Disable Register
+#define AT91C_PIOB_PSR            (0xFFFFF608) // (PIOB) PIO Status Register
+#define AT91C_PIOB_IER            (0xFFFFF640) // (PIOB) Interrupt Enable Register
+#define AT91C_PIOB_CODR           (0xFFFFF634) // (PIOB) Clear Output Data Register
+#define AT91C_PIOB_OWER           (0xFFFFF6A0) // (PIOB) Output Write Enable Register
+#define AT91C_PIOB_ABSR           (0xFFFFF678) // (PIOB) AB Select Status Register
+#define AT91C_PIOB_IFDR           (0xFFFFF624) // (PIOB) Input Filter Disable Register
+#define AT91C_PIOB_PDSR           (0xFFFFF63C) // (PIOB) Pin Data Status Register
+#define AT91C_PIOB_IDR            (0xFFFFF644) // (PIOB) Interrupt Disable Register
+#define AT91C_PIOB_OWSR           (0xFFFFF6A8) // (PIOB) Output Write Status Register
+#define AT91C_PIOB_PDR            (0xFFFFF604) // (PIOB) PIO Disable Register
+#define AT91C_PIOB_ODR            (0xFFFFF614) // (PIOB) Output Disable Registerr
+#define AT91C_PIOB_IFSR           (0xFFFFF628) // (PIOB) Input Filter Status Register
+#define AT91C_PIOB_PPUER          (0xFFFFF664) // (PIOB) Pull-up Enable Register
+#define AT91C_PIOB_SODR           (0xFFFFF630) // (PIOB) Set Output Data Register
+#define AT91C_PIOB_ISR            (0xFFFFF64C) // (PIOB) Interrupt Status Register
+#define AT91C_PIOB_ODSR           (0xFFFFF638) // (PIOB) Output Data Status Register
+#define AT91C_PIOB_OSR            (0xFFFFF618) // (PIOB) Output Status Register
+#define AT91C_PIOB_MDSR           (0xFFFFF658) // (PIOB) Multi-driver Status Register
+#define AT91C_PIOB_IFER           (0xFFFFF620) // (PIOB) Input Filter Enable Register
+#define AT91C_PIOB_BSR            (0xFFFFF674) // (PIOB) Select B Register
+#define AT91C_PIOB_MDDR           (0xFFFFF654) // (PIOB) Multi-driver Disable Register
+#define AT91C_PIOB_OER            (0xFFFFF610) // (PIOB) Output Enable Register
+#define AT91C_PIOB_PER            (0xFFFFF600) // (PIOB) PIO Enable Register
+// ========== Register definition for CKGR peripheral ========== 
+#define AT91C_CKGR_MOR            (0xFFFFFC20) // (CKGR) Main Oscillator Register
+#define AT91C_CKGR_PLLR           (0xFFFFFC2C) // (CKGR) PLL Register
+#define AT91C_CKGR_MCFR           (0xFFFFFC24) // (CKGR) Main Clock  Frequency Register
+// ========== Register definition for PMC peripheral ========== 
+#define AT91C_PMC_IDR             (0xFFFFFC64) // (PMC) Interrupt Disable Register
+#define AT91C_PMC_MOR             (0xFFFFFC20) // (PMC) Main Oscillator Register
+#define AT91C_PMC_PLLR            (0xFFFFFC2C) // (PMC) PLL Register
+#define AT91C_PMC_PCER            (0xFFFFFC10) // (PMC) Peripheral Clock Enable Register
+#define AT91C_PMC_PCKR            (0xFFFFFC40) // (PMC) Programmable Clock Register
+#define AT91C_PMC_MCKR            (0xFFFFFC30) // (PMC) Master Clock Register
+#define AT91C_PMC_SCDR            (0xFFFFFC04) // (PMC) System Clock Disable Register
+#define AT91C_PMC_PCDR            (0xFFFFFC14) // (PMC) Peripheral Clock Disable Register
+#define AT91C_PMC_SCSR            (0xFFFFFC08) // (PMC) System Clock Status Register
+#define AT91C_PMC_PCSR            (0xFFFFFC18) // (PMC) Peripheral Clock Status Register
+#define AT91C_PMC_MCFR            (0xFFFFFC24) // (PMC) Main Clock  Frequency Register
+#define AT91C_PMC_SCER            (0xFFFFFC00) // (PMC) System Clock Enable Register
+#define AT91C_PMC_IMR             (0xFFFFFC6C) // (PMC) Interrupt Mask Register
+#define AT91C_PMC_IER             (0xFFFFFC60) // (PMC) Interrupt Enable Register
+#define AT91C_PMC_SR              (0xFFFFFC68) // (PMC) Status Register
+// ========== Register definition for RSTC peripheral ========== 
+#define AT91C_RSTC_RCR            (0xFFFFFD00) // (RSTC) Reset Control Register
+#define AT91C_RSTC_RMR            (0xFFFFFD08) // (RSTC) Reset Mode Register
+#define AT91C_RSTC_RSR            (0xFFFFFD04) // (RSTC) Reset Status Register
+// ========== Register definition for RTTC peripheral ========== 
+#define AT91C_RTTC_RTSR           (0xFFFFFD2C) // (RTTC) Real-time Status Register
+#define AT91C_RTTC_RTMR           (0xFFFFFD20) // (RTTC) Real-time Mode Register
+#define AT91C_RTTC_RTVR           (0xFFFFFD28) // (RTTC) Real-time Value Register
+#define AT91C_RTTC_RTAR           (0xFFFFFD24) // (RTTC) Real-time Alarm Register
+// ========== Register definition for PITC peripheral ========== 
+#define AT91C_PITC_PIVR           (0xFFFFFD38) // (PITC) Period Interval Value Register
+#define AT91C_PITC_PISR           (0xFFFFFD34) // (PITC) Period Interval Status Register
+#define AT91C_PITC_PIIR           (0xFFFFFD3C) // (PITC) Period Interval Image Register
+#define AT91C_PITC_PIMR           (0xFFFFFD30) // (PITC) Period Interval Mode Register
+// ========== Register definition for WDTC peripheral ========== 
+#define AT91C_WDTC_WDCR           (0xFFFFFD40) // (WDTC) Watchdog Control Register
+#define AT91C_WDTC_WDSR           (0xFFFFFD48) // (WDTC) Watchdog Status Register
+#define AT91C_WDTC_WDMR           (0xFFFFFD44) // (WDTC) Watchdog Mode Register
+// ========== Register definition for VREG peripheral ========== 
+#define AT91C_VREG_MR             (0xFFFFFD60) // (VREG) Voltage Regulator Mode Register
+// ========== Register definition for MC peripheral ========== 
+#define AT91C_MC_ASR              (0xFFFFFF04) // (MC) MC Abort Status Register
+#define AT91C_MC_RCR              (0xFFFFFF00) // (MC) MC Remap Control Register
+#define AT91C_MC_FCR              (0xFFFFFF64) // (MC) MC Flash Command Register
+#define AT91C_MC_AASR             (0xFFFFFF08) // (MC) MC Abort Address Status Register
+#define AT91C_MC_FSR              (0xFFFFFF68) // (MC) MC Flash Status Register
+#define AT91C_MC_FMR              (0xFFFFFF60) // (MC) MC Flash Mode Register
+// ========== Register definition for PDC_SPI1 peripheral ========== 
+#define AT91C_SPI1_PTCR           (0xFFFE4120) // (PDC_SPI1) PDC Transfer Control Register
+#define AT91C_SPI1_RPR            (0xFFFE4100) // (PDC_SPI1) Receive Pointer Register
+#define AT91C_SPI1_TNCR           (0xFFFE411C) // (PDC_SPI1) Transmit Next Counter Register
+#define AT91C_SPI1_TPR            (0xFFFE4108) // (PDC_SPI1) Transmit Pointer Register
+#define AT91C_SPI1_TNPR           (0xFFFE4118) // (PDC_SPI1) Transmit Next Pointer Register
+#define AT91C_SPI1_TCR            (0xFFFE410C) // (PDC_SPI1) Transmit Counter Register
+#define AT91C_SPI1_RCR            (0xFFFE4104) // (PDC_SPI1) Receive Counter Register
+#define AT91C_SPI1_RNPR           (0xFFFE4110) // (PDC_SPI1) Receive Next Pointer Register
+#define AT91C_SPI1_RNCR           (0xFFFE4114) // (PDC_SPI1) Receive Next Counter Register
+#define AT91C_SPI1_PTSR           (0xFFFE4124) // (PDC_SPI1) PDC Transfer Status Register
+// ========== Register definition for SPI1 peripheral ========== 
+#define AT91C_SPI1_IMR            (0xFFFE401C) // (SPI1) Interrupt Mask Register
+#define AT91C_SPI1_IER            (0xFFFE4014) // (SPI1) Interrupt Enable Register
+#define AT91C_SPI1_MR             (0xFFFE4004) // (SPI1) Mode Register
+#define AT91C_SPI1_RDR            (0xFFFE4008) // (SPI1) Receive Data Register
+#define AT91C_SPI1_IDR            (0xFFFE4018) // (SPI1) Interrupt Disable Register
+#define AT91C_SPI1_SR             (0xFFFE4010) // (SPI1) Status Register
+#define AT91C_SPI1_TDR            (0xFFFE400C) // (SPI1) Transmit Data Register
+#define AT91C_SPI1_CR             (0xFFFE4000) // (SPI1) Control Register
+#define AT91C_SPI1_CSR            (0xFFFE4030) // (SPI1) Chip Select Register
+// ========== Register definition for PDC_SPI0 peripheral ========== 
+#define AT91C_SPI0_PTCR           (0xFFFE0120) // (PDC_SPI0) PDC Transfer Control Register
+#define AT91C_SPI0_TPR            (0xFFFE0108) // (PDC_SPI0) Transmit Pointer Register
+#define AT91C_SPI0_TCR            (0xFFFE010C) // (PDC_SPI0) Transmit Counter Register
+#define AT91C_SPI0_RCR            (0xFFFE0104) // (PDC_SPI0) Receive Counter Register
+#define AT91C_SPI0_PTSR           (0xFFFE0124) // (PDC_SPI0) PDC Transfer Status Register
+#define AT91C_SPI0_RNPR           (0xFFFE0110) // (PDC_SPI0) Receive Next Pointer Register
+#define AT91C_SPI0_RPR            (0xFFFE0100) // (PDC_SPI0) Receive Pointer Register
+#define AT91C_SPI0_TNCR           (0xFFFE011C) // (PDC_SPI0) Transmit Next Counter Register
+#define AT91C_SPI0_RNCR           (0xFFFE0114) // (PDC_SPI0) Receive Next Counter Register
+#define AT91C_SPI0_TNPR           (0xFFFE0118) // (PDC_SPI0) Transmit Next Pointer Register
+// ========== Register definition for SPI0 peripheral ========== 
+#define AT91C_SPI0_IER            (0xFFFE0014) // (SPI0) Interrupt Enable Register
+#define AT91C_SPI0_SR             (0xFFFE0010) // (SPI0) Status Register
+#define AT91C_SPI0_IDR            (0xFFFE0018) // (SPI0) Interrupt Disable Register
+#define AT91C_SPI0_CR             (0xFFFE0000) // (SPI0) Control Register
+#define AT91C_SPI0_MR             (0xFFFE0004) // (SPI0) Mode Register
+#define AT91C_SPI0_IMR            (0xFFFE001C) // (SPI0) Interrupt Mask Register
+#define AT91C_SPI0_TDR            (0xFFFE000C) // (SPI0) Transmit Data Register
+#define AT91C_SPI0_RDR            (0xFFFE0008) // (SPI0) Receive Data Register
+#define AT91C_SPI0_CSR            (0xFFFE0030) // (SPI0) Chip Select Register
+// ========== Register definition for PDC_US1 peripheral ========== 
+#define AT91C_US1_RNCR            (0xFFFC4114) // (PDC_US1) Receive Next Counter Register
+#define AT91C_US1_PTCR            (0xFFFC4120) // (PDC_US1) PDC Transfer Control Register
+#define AT91C_US1_TCR             (0xFFFC410C) // (PDC_US1) Transmit Counter Register
+#define AT91C_US1_PTSR            (0xFFFC4124) // (PDC_US1) PDC Transfer Status Register
+#define AT91C_US1_TNPR            (0xFFFC4118) // (PDC_US1) Transmit Next Pointer Register
+#define AT91C_US1_RCR             (0xFFFC4104) // (PDC_US1) Receive Counter Register
+#define AT91C_US1_RNPR            (0xFFFC4110) // (PDC_US1) Receive Next Pointer Register
+#define AT91C_US1_RPR             (0xFFFC4100) // (PDC_US1) Receive Pointer Register
+#define AT91C_US1_TNCR            (0xFFFC411C) // (PDC_US1) Transmit Next Counter Register
+#define AT91C_US1_TPR             (0xFFFC4108) // (PDC_US1) Transmit Pointer Register
+// ========== Register definition for US1 peripheral ========== 
+#define AT91C_US1_IF              (0xFFFC404C) // (US1) IRDA_FILTER Register
+#define AT91C_US1_NER             (0xFFFC4044) // (US1) Nb Errors Register
+#define AT91C_US1_RTOR            (0xFFFC4024) // (US1) Receiver Time-out Register
+#define AT91C_US1_CSR             (0xFFFC4014) // (US1) Channel Status Register
+#define AT91C_US1_IDR             (0xFFFC400C) // (US1) Interrupt Disable Register
+#define AT91C_US1_IER             (0xFFFC4008) // (US1) Interrupt Enable Register
+#define AT91C_US1_THR             (0xFFFC401C) // (US1) Transmitter Holding Register
+#define AT91C_US1_TTGR            (0xFFFC4028) // (US1) Transmitter Time-guard Register
+#define AT91C_US1_RHR             (0xFFFC4018) // (US1) Receiver Holding Register
+#define AT91C_US1_BRGR            (0xFFFC4020) // (US1) Baud Rate Generator Register
+#define AT91C_US1_IMR             (0xFFFC4010) // (US1) Interrupt Mask Register
+#define AT91C_US1_FIDI            (0xFFFC4040) // (US1) FI_DI_Ratio Register
+#define AT91C_US1_CR              (0xFFFC4000) // (US1) Control Register
+#define AT91C_US1_MR              (0xFFFC4004) // (US1) Mode Register
+// ========== Register definition for PDC_US0 peripheral ========== 
+#define AT91C_US0_TNPR            (0xFFFC0118) // (PDC_US0) Transmit Next Pointer Register
+#define AT91C_US0_RNPR            (0xFFFC0110) // (PDC_US0) Receive Next Pointer Register
+#define AT91C_US0_TCR             (0xFFFC010C) // (PDC_US0) Transmit Counter Register
+#define AT91C_US0_PTCR            (0xFFFC0120) // (PDC_US0) PDC Transfer Control Register
+#define AT91C_US0_PTSR            (0xFFFC0124) // (PDC_US0) PDC Transfer Status Register
+#define AT91C_US0_TNCR            (0xFFFC011C) // (PDC_US0) Transmit Next Counter Register
+#define AT91C_US0_TPR             (0xFFFC0108) // (PDC_US0) Transmit Pointer Register
+#define AT91C_US0_RCR             (0xFFFC0104) // (PDC_US0) Receive Counter Register
+#define AT91C_US0_RPR             (0xFFFC0100) // (PDC_US0) Receive Pointer Register
+#define AT91C_US0_RNCR            (0xFFFC0114) // (PDC_US0) Receive Next Counter Register
+// ========== Register definition for US0 peripheral ========== 
+#define AT91C_US0_BRGR            (0xFFFC0020) // (US0) Baud Rate Generator Register
+#define AT91C_US0_NER             (0xFFFC0044) // (US0) Nb Errors Register
+#define AT91C_US0_CR              (0xFFFC0000) // (US0) Control Register
+#define AT91C_US0_IMR             (0xFFFC0010) // (US0) Interrupt Mask Register
+#define AT91C_US0_FIDI            (0xFFFC0040) // (US0) FI_DI_Ratio Register
+#define AT91C_US0_TTGR            (0xFFFC0028) // (US0) Transmitter Time-guard Register
+#define AT91C_US0_MR              (0xFFFC0004) // (US0) Mode Register
+#define AT91C_US0_RTOR            (0xFFFC0024) // (US0) Receiver Time-out Register
+#define AT91C_US0_CSR             (0xFFFC0014) // (US0) Channel Status Register
+#define AT91C_US0_RHR             (0xFFFC0018) // (US0) Receiver Holding Register
+#define AT91C_US0_IDR             (0xFFFC000C) // (US0) Interrupt Disable Register
+#define AT91C_US0_THR             (0xFFFC001C) // (US0) Transmitter Holding Register
+#define AT91C_US0_IF              (0xFFFC004C) // (US0) IRDA_FILTER Register
+#define AT91C_US0_IER             (0xFFFC0008) // (US0) Interrupt Enable Register
+// ========== Register definition for PDC_SSC peripheral ========== 
+#define AT91C_SSC_TNCR            (0xFFFD411C) // (PDC_SSC) Transmit Next Counter Register
+#define AT91C_SSC_RPR             (0xFFFD4100) // (PDC_SSC) Receive Pointer Register
+#define AT91C_SSC_RNCR            (0xFFFD4114) // (PDC_SSC) Receive Next Counter Register
+#define AT91C_SSC_TPR             (0xFFFD4108) // (PDC_SSC) Transmit Pointer Register
+#define AT91C_SSC_PTCR            (0xFFFD4120) // (PDC_SSC) PDC Transfer Control Register
+#define AT91C_SSC_TCR             (0xFFFD410C) // (PDC_SSC) Transmit Counter Register
+#define AT91C_SSC_RCR             (0xFFFD4104) // (PDC_SSC) Receive Counter Register
+#define AT91C_SSC_RNPR            (0xFFFD4110) // (PDC_SSC) Receive Next Pointer Register
+#define AT91C_SSC_TNPR            (0xFFFD4118) // (PDC_SSC) Transmit Next Pointer Register
+#define AT91C_SSC_PTSR            (0xFFFD4124) // (PDC_SSC) PDC Transfer Status Register
+// ========== Register definition for SSC peripheral ========== 
+#define AT91C_SSC_RHR             (0xFFFD4020) // (SSC) Receive Holding Register
+#define AT91C_SSC_RSHR            (0xFFFD4030) // (SSC) Receive Sync Holding Register
+#define AT91C_SSC_TFMR            (0xFFFD401C) // (SSC) Transmit Frame Mode Register
+#define AT91C_SSC_IDR             (0xFFFD4048) // (SSC) Interrupt Disable Register
+#define AT91C_SSC_THR             (0xFFFD4024) // (SSC) Transmit Holding Register
+#define AT91C_SSC_RCMR            (0xFFFD4010) // (SSC) Receive Clock ModeRegister
+#define AT91C_SSC_IER             (0xFFFD4044) // (SSC) Interrupt Enable Register
+#define AT91C_SSC_TSHR            (0xFFFD4034) // (SSC) Transmit Sync Holding Register
+#define AT91C_SSC_SR              (0xFFFD4040) // (SSC) Status Register
+#define AT91C_SSC_CMR             (0xFFFD4004) // (SSC) Clock Mode Register
+#define AT91C_SSC_TCMR            (0xFFFD4018) // (SSC) Transmit Clock Mode Register
+#define AT91C_SSC_CR              (0xFFFD4000) // (SSC) Control Register
+#define AT91C_SSC_IMR             (0xFFFD404C) // (SSC) Interrupt Mask Register
+#define AT91C_SSC_RFMR            (0xFFFD4014) // (SSC) Receive Frame Mode Register
+// ========== Register definition for TWI peripheral ========== 
+#define AT91C_TWI_IER             (0xFFFB8024) // (TWI) Interrupt Enable Register
+#define AT91C_TWI_CR              (0xFFFB8000) // (TWI) Control Register
+#define AT91C_TWI_SR              (0xFFFB8020) // (TWI) Status Register
+#define AT91C_TWI_IMR             (0xFFFB802C) // (TWI) Interrupt Mask Register
+#define AT91C_TWI_THR             (0xFFFB8034) // (TWI) Transmit Holding Register
+#define AT91C_TWI_IDR             (0xFFFB8028) // (TWI) Interrupt Disable Register
+#define AT91C_TWI_IADR            (0xFFFB800C) // (TWI) Internal Address Register
+#define AT91C_TWI_MMR             (0xFFFB8004) // (TWI) Master Mode Register
+#define AT91C_TWI_CWGR            (0xFFFB8010) // (TWI) Clock Waveform Generator Register
+#define AT91C_TWI_RHR             (0xFFFB8030) // (TWI) Receive Holding Register
+// ========== Register definition for PWMC_CH3 peripheral ========== 
+#define AT91C_PWMC_CH3_CUPDR      (0xFFFCC270) // (PWMC_CH3) Channel Update Register
+#define AT91C_PWMC_CH3_Reserved   (0xFFFCC274) // (PWMC_CH3) Reserved
+#define AT91C_PWMC_CH3_CPRDR      (0xFFFCC268) // (PWMC_CH3) Channel Period Register
+#define AT91C_PWMC_CH3_CDTYR      (0xFFFCC264) // (PWMC_CH3) Channel Duty Cycle Register
+#define AT91C_PWMC_CH3_CCNTR      (0xFFFCC26C) // (PWMC_CH3) Channel Counter Register
+#define AT91C_PWMC_CH3_CMR        (0xFFFCC260) // (PWMC_CH3) Channel Mode Register
+// ========== Register definition for PWMC_CH2 peripheral ========== 
+#define AT91C_PWMC_CH2_Reserved   (0xFFFCC254) // (PWMC_CH2) Reserved
+#define AT91C_PWMC_CH2_CMR        (0xFFFCC240) // (PWMC_CH2) Channel Mode Register
+#define AT91C_PWMC_CH2_CCNTR      (0xFFFCC24C) // (PWMC_CH2) Channel Counter Register
+#define AT91C_PWMC_CH2_CPRDR      (0xFFFCC248) // (PWMC_CH2) Channel Period Register
+#define AT91C_PWMC_CH2_CUPDR      (0xFFFCC250) // (PWMC_CH2) Channel Update Register
+#define AT91C_PWMC_CH2_CDTYR      (0xFFFCC244) // (PWMC_CH2) Channel Duty Cycle Register
+// ========== Register definition for PWMC_CH1 peripheral ========== 
+#define AT91C_PWMC_CH1_Reserved   (0xFFFCC234) // (PWMC_CH1) Reserved
+#define AT91C_PWMC_CH1_CUPDR      (0xFFFCC230) // (PWMC_CH1) Channel Update Register
+#define AT91C_PWMC_CH1_CPRDR      (0xFFFCC228) // (PWMC_CH1) Channel Period Register
+#define AT91C_PWMC_CH1_CCNTR      (0xFFFCC22C) // (PWMC_CH1) Channel Counter Register
+#define AT91C_PWMC_CH1_CDTYR      (0xFFFCC224) // (PWMC_CH1) Channel Duty Cycle Register
+#define AT91C_PWMC_CH1_CMR        (0xFFFCC220) // (PWMC_CH1) Channel Mode Register
+// ========== Register definition for PWMC_CH0 peripheral ========== 
+#define AT91C_PWMC_CH0_Reserved   (0xFFFCC214) // (PWMC_CH0) Reserved
+#define AT91C_PWMC_CH0_CPRDR      (0xFFFCC208) // (PWMC_CH0) Channel Period Register
+#define AT91C_PWMC_CH0_CDTYR      (0xFFFCC204) // (PWMC_CH0) Channel Duty Cycle Register
+#define AT91C_PWMC_CH0_CMR        (0xFFFCC200) // (PWMC_CH0) Channel Mode Register
+#define AT91C_PWMC_CH0_CUPDR      (0xFFFCC210) // (PWMC_CH0) Channel Update Register
+#define AT91C_PWMC_CH0_CCNTR      (0xFFFCC20C) // (PWMC_CH0) Channel Counter Register
+// ========== Register definition for PWMC peripheral ========== 
+#define AT91C_PWMC_IDR            (0xFFFCC014) // (PWMC) PWMC Interrupt Disable Register
+#define AT91C_PWMC_DIS            (0xFFFCC008) // (PWMC) PWMC Disable Register
+#define AT91C_PWMC_IER            (0xFFFCC010) // (PWMC) PWMC Interrupt Enable Register
+#define AT91C_PWMC_VR             (0xFFFCC0FC) // (PWMC) PWMC Version Register
+#define AT91C_PWMC_ISR            (0xFFFCC01C) // (PWMC) PWMC Interrupt Status Register
+#define AT91C_PWMC_SR             (0xFFFCC00C) // (PWMC) PWMC Status Register
+#define AT91C_PWMC_IMR            (0xFFFCC018) // (PWMC) PWMC Interrupt Mask Register
+#define AT91C_PWMC_MR             (0xFFFCC000) // (PWMC) PWMC Mode Register
+#define AT91C_PWMC_ENA            (0xFFFCC004) // (PWMC) PWMC Enable Register
+// ========== Register definition for UDP peripheral ========== 
+#define AT91C_UDP_IMR             (0xFFFB0018) // (UDP) Interrupt Mask Register
+#define AT91C_UDP_FADDR           (0xFFFB0008) // (UDP) Function Address Register
+#define AT91C_UDP_NUM             (0xFFFB0000) // (UDP) Frame Number Register
+#define AT91C_UDP_FDR             (0xFFFB0050) // (UDP) Endpoint FIFO Data Register
+#define AT91C_UDP_ISR             (0xFFFB001C) // (UDP) Interrupt Status Register
+#define AT91C_UDP_CSR             (0xFFFB0030) // (UDP) Endpoint Control and Status Register
+#define AT91C_UDP_IDR             (0xFFFB0014) // (UDP) Interrupt Disable Register
+#define AT91C_UDP_ICR             (0xFFFB0020) // (UDP) Interrupt Clear Register
+#define AT91C_UDP_RSTEP           (0xFFFB0028) // (UDP) Reset Endpoint Register
+#define AT91C_UDP_TXVC            (0xFFFB0074) // (UDP) Transceiver Control Register
+#define AT91C_UDP_GLBSTATE        (0xFFFB0004) // (UDP) Global State Register
+#define AT91C_UDP_IER             (0xFFFB0010) // (UDP) Interrupt Enable Register
+// ========== Register definition for TC0 peripheral ========== 
+#define AT91C_TC0_SR              (0xFFFA0020) // (TC0) Status Register
+#define AT91C_TC0_RC              (0xFFFA001C) // (TC0) Register C
+#define AT91C_TC0_RB              (0xFFFA0018) // (TC0) Register B
+#define AT91C_TC0_CCR             (0xFFFA0000) // (TC0) Channel Control Register
+#define AT91C_TC0_CMR             (0xFFFA0004) // (TC0) Channel Mode Register (Capture Mode / Waveform Mode)
+#define AT91C_TC0_IER             (0xFFFA0024) // (TC0) Interrupt Enable Register
+#define AT91C_TC0_RA              (0xFFFA0014) // (TC0) Register A
+#define AT91C_TC0_IDR             (0xFFFA0028) // (TC0) Interrupt Disable Register
+#define AT91C_TC0_CV              (0xFFFA0010) // (TC0) Counter Value
+#define AT91C_TC0_IMR             (0xFFFA002C) // (TC0) Interrupt Mask Register
+// ========== Register definition for TC1 peripheral ========== 
+#define AT91C_TC1_RB              (0xFFFA0058) // (TC1) Register B
+#define AT91C_TC1_CCR             (0xFFFA0040) // (TC1) Channel Control Register
+#define AT91C_TC1_IER             (0xFFFA0064) // (TC1) Interrupt Enable Register
+#define AT91C_TC1_IDR             (0xFFFA0068) // (TC1) Interrupt Disable Register
+#define AT91C_TC1_SR              (0xFFFA0060) // (TC1) Status Register
+#define AT91C_TC1_CMR             (0xFFFA0044) // (TC1) Channel Mode Register (Capture Mode / Waveform Mode)
+#define AT91C_TC1_RA              (0xFFFA0054) // (TC1) Register A
+#define AT91C_TC1_RC              (0xFFFA005C) // (TC1) Register C
+#define AT91C_TC1_IMR             (0xFFFA006C) // (TC1) Interrupt Mask Register
+#define AT91C_TC1_CV              (0xFFFA0050) // (TC1) Counter Value
+// ========== Register definition for TC2 peripheral ========== 
+#define AT91C_TC2_CMR             (0xFFFA0084) // (TC2) Channel Mode Register (Capture Mode / Waveform Mode)
+#define AT91C_TC2_CCR             (0xFFFA0080) // (TC2) Channel Control Register
+#define AT91C_TC2_CV              (0xFFFA0090) // (TC2) Counter Value
+#define AT91C_TC2_RA              (0xFFFA0094) // (TC2) Register A
+#define AT91C_TC2_RB              (0xFFFA0098) // (TC2) Register B
+#define AT91C_TC2_IDR             (0xFFFA00A8) // (TC2) Interrupt Disable Register
+#define AT91C_TC2_IMR             (0xFFFA00AC) // (TC2) Interrupt Mask Register
+#define AT91C_TC2_RC              (0xFFFA009C) // (TC2) Register C
+#define AT91C_TC2_IER             (0xFFFA00A4) // (TC2) Interrupt Enable Register
+#define AT91C_TC2_SR              (0xFFFA00A0) // (TC2) Status Register
+// ========== Register definition for TCB peripheral ========== 
+#define AT91C_TCB_BMR             (0xFFFA00C4) // (TCB) TC Block Mode Register
+#define AT91C_TCB_BCR             (0xFFFA00C0) // (TCB) TC Block Control Register
+// ========== Register definition for CAN_MB0 peripheral ========== 
+#define AT91C_CAN_MB0_MDL         (0xFFFD0214) // (CAN_MB0) MailBox Data Low Register
+#define AT91C_CAN_MB0_MAM         (0xFFFD0204) // (CAN_MB0) MailBox Acceptance Mask Register
+#define AT91C_CAN_MB0_MCR         (0xFFFD021C) // (CAN_MB0) MailBox Control Register
+#define AT91C_CAN_MB0_MID         (0xFFFD0208) // (CAN_MB0) MailBox ID Register
+#define AT91C_CAN_MB0_MSR         (0xFFFD0210) // (CAN_MB0) MailBox Status Register
+#define AT91C_CAN_MB0_MFID        (0xFFFD020C) // (CAN_MB0) MailBox Family ID Register
+#define AT91C_CAN_MB0_MDH         (0xFFFD0218) // (CAN_MB0) MailBox Data High Register
+#define AT91C_CAN_MB0_MMR         (0xFFFD0200) // (CAN_MB0) MailBox Mode Register
+// ========== Register definition for CAN_MB1 peripheral ========== 
+#define AT91C_CAN_MB1_MDL         (0xFFFD0234) // (CAN_MB1) MailBox Data Low Register
+#define AT91C_CAN_MB1_MID         (0xFFFD0228) // (CAN_MB1) MailBox ID Register
+#define AT91C_CAN_MB1_MMR         (0xFFFD0220) // (CAN_MB1) MailBox Mode Register
+#define AT91C_CAN_MB1_MSR         (0xFFFD0230) // (CAN_MB1) MailBox Status Register
+#define AT91C_CAN_MB1_MAM         (0xFFFD0224) // (CAN_MB1) MailBox Acceptance Mask Register
+#define AT91C_CAN_MB1_MDH         (0xFFFD0238) // (CAN_MB1) MailBox Data High Register
+#define AT91C_CAN_MB1_MCR         (0xFFFD023C) // (CAN_MB1) MailBox Control Register
+#define AT91C_CAN_MB1_MFID        (0xFFFD022C) // (CAN_MB1) MailBox Family ID Register
+// ========== Register definition for CAN_MB2 peripheral ========== 
+#define AT91C_CAN_MB2_MCR         (0xFFFD025C) // (CAN_MB2) MailBox Control Register
+#define AT91C_CAN_MB2_MDH         (0xFFFD0258) // (CAN_MB2) MailBox Data High Register
+#define AT91C_CAN_MB2_MID         (0xFFFD0248) // (CAN_MB2) MailBox ID Register
+#define AT91C_CAN_MB2_MDL         (0xFFFD0254) // (CAN_MB2) MailBox Data Low Register
+#define AT91C_CAN_MB2_MMR         (0xFFFD0240) // (CAN_MB2) MailBox Mode Register
+#define AT91C_CAN_MB2_MAM         (0xFFFD0244) // (CAN_MB2) MailBox Acceptance Mask Register
+#define AT91C_CAN_MB2_MFID        (0xFFFD024C) // (CAN_MB2) MailBox Family ID Register
+#define AT91C_CAN_MB2_MSR         (0xFFFD0250) // (CAN_MB2) MailBox Status Register
+// ========== Register definition for CAN_MB3 peripheral ========== 
+#define AT91C_CAN_MB3_MFID        (0xFFFD026C) // (CAN_MB3) MailBox Family ID Register
+#define AT91C_CAN_MB3_MAM         (0xFFFD0264) // (CAN_MB3) MailBox Acceptance Mask Register
+#define AT91C_CAN_MB3_MID         (0xFFFD0268) // (CAN_MB3) MailBox ID Register
+#define AT91C_CAN_MB3_MCR         (0xFFFD027C) // (CAN_MB3) MailBox Control Register
+#define AT91C_CAN_MB3_MMR         (0xFFFD0260) // (CAN_MB3) MailBox Mode Register
+#define AT91C_CAN_MB3_MSR         (0xFFFD0270) // (CAN_MB3) MailBox Status Register
+#define AT91C_CAN_MB3_MDL         (0xFFFD0274) // (CAN_MB3) MailBox Data Low Register
+#define AT91C_CAN_MB3_MDH         (0xFFFD0278) // (CAN_MB3) MailBox Data High Register
+// ========== Register definition for CAN_MB4 peripheral ========== 
+#define AT91C_CAN_MB4_MID         (0xFFFD0288) // (CAN_MB4) MailBox ID Register
+#define AT91C_CAN_MB4_MMR         (0xFFFD0280) // (CAN_MB4) MailBox Mode Register
+#define AT91C_CAN_MB4_MDH         (0xFFFD0298) // (CAN_MB4) MailBox Data High Register
+#define AT91C_CAN_MB4_MFID        (0xFFFD028C) // (CAN_MB4) MailBox Family ID Register
+#define AT91C_CAN_MB4_MSR         (0xFFFD0290) // (CAN_MB4) MailBox Status Register
+#define AT91C_CAN_MB4_MCR         (0xFFFD029C) // (CAN_MB4) MailBox Control Register
+#define AT91C_CAN_MB4_MDL         (0xFFFD0294) // (CAN_MB4) MailBox Data Low Register
+#define AT91C_CAN_MB4_MAM         (0xFFFD0284) // (CAN_MB4) MailBox Acceptance Mask Register
+// ========== Register definition for CAN_MB5 peripheral ========== 
+#define AT91C_CAN_MB5_MSR         (0xFFFD02B0) // (CAN_MB5) MailBox Status Register
+#define AT91C_CAN_MB5_MCR         (0xFFFD02BC) // (CAN_MB5) MailBox Control Register
+#define AT91C_CAN_MB5_MFID        (0xFFFD02AC) // (CAN_MB5) MailBox Family ID Register
+#define AT91C_CAN_MB5_MDH         (0xFFFD02B8) // (CAN_MB5) MailBox Data High Register
+#define AT91C_CAN_MB5_MID         (0xFFFD02A8) // (CAN_MB5) MailBox ID Register
+#define AT91C_CAN_MB5_MMR         (0xFFFD02A0) // (CAN_MB5) MailBox Mode Register
+#define AT91C_CAN_MB5_MDL         (0xFFFD02B4) // (CAN_MB5) MailBox Data Low Register
+#define AT91C_CAN_MB5_MAM         (0xFFFD02A4) // (CAN_MB5) MailBox Acceptance Mask Register
+// ========== Register definition for CAN_MB6 peripheral ========== 
+#define AT91C_CAN_MB6_MFID        (0xFFFD02CC) // (CAN_MB6) MailBox Family ID Register
+#define AT91C_CAN_MB6_MID         (0xFFFD02C8) // (CAN_MB6) MailBox ID Register
+#define AT91C_CAN_MB6_MAM         (0xFFFD02C4) // (CAN_MB6) MailBox Acceptance Mask Register
+#define AT91C_CAN_MB6_MSR         (0xFFFD02D0) // (CAN_MB6) MailBox Status Register
+#define AT91C_CAN_MB6_MDL         (0xFFFD02D4) // (CAN_MB6) MailBox Data Low Register
+#define AT91C_CAN_MB6_MCR         (0xFFFD02DC) // (CAN_MB6) MailBox Control Register
+#define AT91C_CAN_MB6_MDH         (0xFFFD02D8) // (CAN_MB6) MailBox Data High Register
+#define AT91C_CAN_MB6_MMR         (0xFFFD02C0) // (CAN_MB6) MailBox Mode Register
+// ========== Register definition for CAN_MB7 peripheral ========== 
+#define AT91C_CAN_MB7_MCR         (0xFFFD02FC) // (CAN_MB7) MailBox Control Register
+#define AT91C_CAN_MB7_MDH         (0xFFFD02F8) // (CAN_MB7) MailBox Data High Register
+#define AT91C_CAN_MB7_MFID        (0xFFFD02EC) // (CAN_MB7) MailBox Family ID Register
+#define AT91C_CAN_MB7_MDL         (0xFFFD02F4) // (CAN_MB7) MailBox Data Low Register
+#define AT91C_CAN_MB7_MID         (0xFFFD02E8) // (CAN_MB7) MailBox ID Register
+#define AT91C_CAN_MB7_MMR         (0xFFFD02E0) // (CAN_MB7) MailBox Mode Register
+#define AT91C_CAN_MB7_MAM         (0xFFFD02E4) // (CAN_MB7) MailBox Acceptance Mask Register
+#define AT91C_CAN_MB7_MSR         (0xFFFD02F0) // (CAN_MB7) MailBox Status Register
+// ========== Register definition for CAN peripheral ========== 
+#define AT91C_CAN_TCR             (0xFFFD0024) // (CAN) Transfer Command Register
+#define AT91C_CAN_IMR             (0xFFFD000C) // (CAN) Interrupt Mask Register
+#define AT91C_CAN_IER             (0xFFFD0004) // (CAN) Interrupt Enable Register
+#define AT91C_CAN_ECR             (0xFFFD0020) // (CAN) Error Counter Register
+#define AT91C_CAN_TIMESTP         (0xFFFD001C) // (CAN) Time Stamp Register
+#define AT91C_CAN_MR              (0xFFFD0000) // (CAN) Mode Register
+#define AT91C_CAN_IDR             (0xFFFD0008) // (CAN) Interrupt Disable Register
+#define AT91C_CAN_ACR             (0xFFFD0028) // (CAN) Abort Command Register
+#define AT91C_CAN_TIM             (0xFFFD0018) // (CAN) Timer Register
+#define AT91C_CAN_SR              (0xFFFD0010) // (CAN) Status Register
+#define AT91C_CAN_BR              (0xFFFD0014) // (CAN) Baudrate Register
+#define AT91C_CAN_VR              (0xFFFD00FC) // (CAN) Version Register
+// ========== Register definition for EMAC peripheral ========== 
+#define AT91C_EMAC_ISR            (0xFFFDC024) // (EMAC) Interrupt Status Register
+#define AT91C_EMAC_SA4H           (0xFFFDC0B4) // (EMAC) Specific Address 4 Top, Last 2 bytes
+#define AT91C_EMAC_SA1L           (0xFFFDC098) // (EMAC) Specific Address 1 Bottom, First 4 bytes
+#define AT91C_EMAC_ELE            (0xFFFDC078) // (EMAC) Excessive Length Errors Register
+#define AT91C_EMAC_LCOL           (0xFFFDC05C) // (EMAC) Late Collision Register
+#define AT91C_EMAC_RLE            (0xFFFDC088) // (EMAC) Receive Length Field Mismatch Register
+#define AT91C_EMAC_WOL            (0xFFFDC0C4) // (EMAC) Wake On LAN Register
+#define AT91C_EMAC_DTF            (0xFFFDC058) // (EMAC) Deferred Transmission Frame Register
+#define AT91C_EMAC_TUND           (0xFFFDC064) // (EMAC) Transmit Underrun Error Register
+#define AT91C_EMAC_NCR            (0xFFFDC000) // (EMAC) Network Control Register
+#define AT91C_EMAC_SA4L           (0xFFFDC0B0) // (EMAC) Specific Address 4 Bottom, First 4 bytes
+#define AT91C_EMAC_RSR            (0xFFFDC020) // (EMAC) Receive Status Register
+#define AT91C_EMAC_SA3L           (0xFFFDC0A8) // (EMAC) Specific Address 3 Bottom, First 4 bytes
+#define AT91C_EMAC_TSR            (0xFFFDC014) // (EMAC) Transmit Status Register
+#define AT91C_EMAC_IDR            (0xFFFDC02C) // (EMAC) Interrupt Disable Register
+#define AT91C_EMAC_RSE            (0xFFFDC074) // (EMAC) Receive Symbol Errors Register
+#define AT91C_EMAC_ECOL           (0xFFFDC060) // (EMAC) Excessive Collision Register
+#define AT91C_EMAC_TID            (0xFFFDC0B8) // (EMAC) Type ID Checking Register
+#define AT91C_EMAC_HRB            (0xFFFDC090) // (EMAC) Hash Address Bottom[31:0]
+#define AT91C_EMAC_TBQP           (0xFFFDC01C) // (EMAC) Transmit Buffer Queue Pointer
+#define AT91C_EMAC_USRIO          (0xFFFDC0C0) // (EMAC) USER Input/Output Register
+#define AT91C_EMAC_PTR            (0xFFFDC038) // (EMAC) Pause Time Register
+#define AT91C_EMAC_SA2H           (0xFFFDC0A4) // (EMAC) Specific Address 2 Top, Last 2 bytes
+#define AT91C_EMAC_ROV            (0xFFFDC070) // (EMAC) Receive Overrun Errors Register
+#define AT91C_EMAC_ALE            (0xFFFDC054) // (EMAC) Alignment Error Register
+#define AT91C_EMAC_RJA            (0xFFFDC07C) // (EMAC) Receive Jabbers Register
+#define AT91C_EMAC_RBQP           (0xFFFDC018) // (EMAC) Receive Buffer Queue Pointer
+#define AT91C_EMAC_TPF            (0xFFFDC08C) // (EMAC) Transmitted Pause Frames Register
+#define AT91C_EMAC_NCFGR          (0xFFFDC004) // (EMAC) Network Configuration Register
+#define AT91C_EMAC_HRT            (0xFFFDC094) // (EMAC) Hash Address Top[63:32]
+#define AT91C_EMAC_USF            (0xFFFDC080) // (EMAC) Undersize Frames Register
+#define AT91C_EMAC_FCSE           (0xFFFDC050) // (EMAC) Frame Check Sequence Error Register
+#define AT91C_EMAC_TPQ            (0xFFFDC0BC) // (EMAC) Transmit Pause Quantum Register
+#define AT91C_EMAC_MAN            (0xFFFDC034) // (EMAC) PHY Maintenance Register
+#define AT91C_EMAC_FTO            (0xFFFDC040) // (EMAC) Frames Transmitted OK Register
+#define AT91C_EMAC_REV            (0xFFFDC0FC) // (EMAC) Revision Register
+#define AT91C_EMAC_IMR            (0xFFFDC030) // (EMAC) Interrupt Mask Register
+#define AT91C_EMAC_SCF            (0xFFFDC044) // (EMAC) Single Collision Frame Register
+#define AT91C_EMAC_PFR            (0xFFFDC03C) // (EMAC) Pause Frames received Register
+#define AT91C_EMAC_MCF            (0xFFFDC048) // (EMAC) Multiple Collision Frame Register
+#define AT91C_EMAC_NSR            (0xFFFDC008) // (EMAC) Network Status Register
+#define AT91C_EMAC_SA2L           (0xFFFDC0A0) // (EMAC) Specific Address 2 Bottom, First 4 bytes
+#define AT91C_EMAC_FRO            (0xFFFDC04C) // (EMAC) Frames Received OK Register
+#define AT91C_EMAC_IER            (0xFFFDC028) // (EMAC) Interrupt Enable Register
+#define AT91C_EMAC_SA1H           (0xFFFDC09C) // (EMAC) Specific Address 1 Top, Last 2 bytes
+#define AT91C_EMAC_CSE            (0xFFFDC068) // (EMAC) Carrier Sense Error Register
+#define AT91C_EMAC_SA3H           (0xFFFDC0AC) // (EMAC) Specific Address 3 Top, Last 2 bytes
+#define AT91C_EMAC_RRE            (0xFFFDC06C) // (EMAC) Receive Ressource Error Register
+#define AT91C_EMAC_STE            (0xFFFDC084) // (EMAC) SQE Test Error Register
+// ========== Register definition for PDC_ADC peripheral ========== 
+#define AT91C_ADC_PTSR            (0xFFFD8124) // (PDC_ADC) PDC Transfer Status Register
+#define AT91C_ADC_PTCR            (0xFFFD8120) // (PDC_ADC) PDC Transfer Control Register
+#define AT91C_ADC_TNPR            (0xFFFD8118) // (PDC_ADC) Transmit Next Pointer Register
+#define AT91C_ADC_TNCR            (0xFFFD811C) // (PDC_ADC) Transmit Next Counter Register
+#define AT91C_ADC_RNPR            (0xFFFD8110) // (PDC_ADC) Receive Next Pointer Register
+#define AT91C_ADC_RNCR            (0xFFFD8114) // (PDC_ADC) Receive Next Counter Register
+#define AT91C_ADC_RPR             (0xFFFD8100) // (PDC_ADC) Receive Pointer Register
+#define AT91C_ADC_TCR             (0xFFFD810C) // (PDC_ADC) Transmit Counter Register
+#define AT91C_ADC_TPR             (0xFFFD8108) // (PDC_ADC) Transmit Pointer Register
+#define AT91C_ADC_RCR             (0xFFFD8104) // (PDC_ADC) Receive Counter Register
+// ========== Register definition for ADC peripheral ========== 
+#define AT91C_ADC_CDR2            (0xFFFD8038) // (ADC) ADC Channel Data Register 2
+#define AT91C_ADC_CDR3            (0xFFFD803C) // (ADC) ADC Channel Data Register 3
+#define AT91C_ADC_CDR0            (0xFFFD8030) // (ADC) ADC Channel Data Register 0
+#define AT91C_ADC_CDR5            (0xFFFD8044) // (ADC) ADC Channel Data Register 5
+#define AT91C_ADC_CHDR            (0xFFFD8014) // (ADC) ADC Channel Disable Register
+#define AT91C_ADC_SR              (0xFFFD801C) // (ADC) ADC Status Register
+#define AT91C_ADC_CDR4            (0xFFFD8040) // (ADC) ADC Channel Data Register 4
+#define AT91C_ADC_CDR1            (0xFFFD8034) // (ADC) ADC Channel Data Register 1
+#define AT91C_ADC_LCDR            (0xFFFD8020) // (ADC) ADC Last Converted Data Register
+#define AT91C_ADC_IDR             (0xFFFD8028) // (ADC) ADC Interrupt Disable Register
+#define AT91C_ADC_CR              (0xFFFD8000) // (ADC) ADC Control Register
+#define AT91C_ADC_CDR7            (0xFFFD804C) // (ADC) ADC Channel Data Register 7
+#define AT91C_ADC_CDR6            (0xFFFD8048) // (ADC) ADC Channel Data Register 6
+#define AT91C_ADC_IER             (0xFFFD8024) // (ADC) ADC Interrupt Enable Register
+#define AT91C_ADC_CHER            (0xFFFD8010) // (ADC) ADC Channel Enable Register
+#define AT91C_ADC_CHSR            (0xFFFD8018) // (ADC) ADC Channel Status Register
+#define AT91C_ADC_MR              (0xFFFD8004) // (ADC) ADC Mode Register
+#define AT91C_ADC_IMR             (0xFFFD802C) // (ADC) ADC Interrupt Mask Register
+
+// *****************************************************************************
+//               PIO DEFINITIONS FOR AT91SAM7X256
+// *****************************************************************************
+#define AT91C_PIO_PA0             (1 <<  0) // Pin Controlled by PA0
+#define AT91C_PA0_RXD0            (AT91C_PIO_PA0) //  USART 0 Receive Data
+#define AT91C_PIO_PA1             (1 <<  1) // Pin Controlled by PA1
+#define AT91C_PA1_TXD0            (AT91C_PIO_PA1) //  USART 0 Transmit Data
+#define AT91C_PIO_PA10            (1 << 10) // Pin Controlled by PA10
+#define AT91C_PA10_TWD            (AT91C_PIO_PA10) //  TWI Two-wire Serial Data
+#define AT91C_PIO_PA11            (1 << 11) // Pin Controlled by PA11
+#define AT91C_PA11_TWCK           (AT91C_PIO_PA11) //  TWI Two-wire Serial Clock
+#define AT91C_PIO_PA12            (1 << 12) // Pin Controlled by PA12
+#define AT91C_PA12_SPI0_NPCS0     (AT91C_PIO_PA12) //  SPI 0 Peripheral Chip Select 0
+#define AT91C_PIO_PA13            (1 << 13) // Pin Controlled by PA13
+#define AT91C_PA13_SPI0_NPCS1     (AT91C_PIO_PA13) //  SPI 0 Peripheral Chip Select 1
+#define AT91C_PA13_PCK1           (AT91C_PIO_PA13) //  PMC Programmable Clock Output 1
+#define AT91C_PIO_PA14            (1 << 14) // Pin Controlled by PA14
+#define AT91C_PA14_SPI0_NPCS2     (AT91C_PIO_PA14) //  SPI 0 Peripheral Chip Select 2
+#define AT91C_PA14_IRQ1           (AT91C_PIO_PA14) //  External Interrupt 1
+#define AT91C_PIO_PA15            (1 << 15) // Pin Controlled by PA15
+#define AT91C_PA15_SPI0_NPCS3     (AT91C_PIO_PA15) //  SPI 0 Peripheral Chip Select 3
+#define AT91C_PA15_TCLK2          (AT91C_PIO_PA15) //  Timer Counter 2 external clock input
+#define AT91C_PIO_PA16            (1 << 16) // Pin Controlled by PA16
+#define AT91C_PA16_SPI0_MISO      (AT91C_PIO_PA16) //  SPI 0 Master In Slave
+#define AT91C_PIO_PA17            (1 << 17) // Pin Controlled by PA17
+#define AT91C_PA17_SPI0_MOSI      (AT91C_PIO_PA17) //  SPI 0 Master Out Slave
+#define AT91C_PIO_PA18            (1 << 18) // Pin Controlled by PA18
+#define AT91C_PA18_SPI0_SPCK      (AT91C_PIO_PA18) //  SPI 0 Serial Clock
+#define AT91C_PIO_PA19            (1 << 19) // Pin Controlled by PA19
+#define AT91C_PA19_CANRX          (AT91C_PIO_PA19) //  CAN Receive
+#define AT91C_PIO_PA2             (1 <<  2) // Pin Controlled by PA2
+#define AT91C_PA2_SCK0            (AT91C_PIO_PA2) //  USART 0 Serial Clock
+#define AT91C_PA2_SPI1_NPCS1      (AT91C_PIO_PA2) //  SPI 1 Peripheral Chip Select 1
+#define AT91C_PIO_PA20            (1 << 20) // Pin Controlled by PA20
+#define AT91C_PA20_CANTX          (AT91C_PIO_PA20) //  CAN Transmit
+#define AT91C_PIO_PA21            (1 << 21) // Pin Controlled by PA21
+#define AT91C_PA21_TF             (AT91C_PIO_PA21) //  SSC Transmit Frame Sync
+#define AT91C_PA21_SPI1_NPCS0     (AT91C_PIO_PA21) //  SPI 1 Peripheral Chip Select 0
+#define AT91C_PIO_PA22            (1 << 22) // Pin Controlled by PA22
+#define AT91C_PA22_TK             (AT91C_PIO_PA22) //  SSC Transmit Clock
+#define AT91C_PA22_SPI1_SPCK      (AT91C_PIO_PA22) //  SPI 1 Serial Clock
+#define AT91C_PIO_PA23            (1 << 23) // Pin Controlled by PA23
+#define AT91C_PA23_TD             (AT91C_PIO_PA23) //  SSC Transmit data
+#define AT91C_PA23_SPI1_MOSI      (AT91C_PIO_PA23) //  SPI 1 Master Out Slave
+#define AT91C_PIO_PA24            (1 << 24) // Pin Controlled by PA24
+#define AT91C_PA24_RD             (AT91C_PIO_PA24) //  SSC Receive Data
+#define AT91C_PA24_SPI1_MISO      (AT91C_PIO_PA24) //  SPI 1 Master In Slave
+#define AT91C_PIO_PA25            (1 << 25) // Pin Controlled by PA25
+#define AT91C_PA25_RK             (AT91C_PIO_PA25) //  SSC Receive Clock
+#define AT91C_PA25_SPI1_NPCS1     (AT91C_PIO_PA25) //  SPI 1 Peripheral Chip Select 1
+#define AT91C_PIO_PA26            (1 << 26) // Pin Controlled by PA26
+#define AT91C_PA26_RF             (AT91C_PIO_PA26) //  SSC Receive Frame Sync
+#define AT91C_PA26_SPI1_NPCS2     (AT91C_PIO_PA26) //  SPI 1 Peripheral Chip Select 2
+#define AT91C_PIO_PA27            (1 << 27) // Pin Controlled by PA27
+#define AT91C_PA27_DRXD           (AT91C_PIO_PA27) //  DBGU Debug Receive Data
+#define AT91C_PA27_PCK3           (AT91C_PIO_PA27) //  PMC Programmable Clock Output 3
+#define AT91C_PIO_PA28            (1 << 28) // Pin Controlled by PA28
+#define AT91C_PA28_DTXD           (AT91C_PIO_PA28) //  DBGU Debug Transmit Data
+#define AT91C_PIO_PA29            (1 << 29) // Pin Controlled by PA29
+#define AT91C_PA29_FIQ            (AT91C_PIO_PA29) //  AIC Fast Interrupt Input
+#define AT91C_PA29_SPI1_NPCS3     (AT91C_PIO_PA29) //  SPI 1 Peripheral Chip Select 3
+#define AT91C_PIO_PA3             (1 <<  3) // Pin Controlled by PA3
+#define AT91C_PA3_RTS0            (AT91C_PIO_PA3) //  USART 0 Ready To Send
+#define AT91C_PA3_SPI1_NPCS2      (AT91C_PIO_PA3) //  SPI 1 Peripheral Chip Select 2
+#define AT91C_PIO_PA30            (1 << 30) // Pin Controlled by PA30
+#define AT91C_PA30_IRQ0           (AT91C_PIO_PA30) //  External Interrupt 0
+#define AT91C_PA30_PCK2           (AT91C_PIO_PA30) //  PMC Programmable Clock Output 2
+#define AT91C_PIO_PA4             (1 <<  4) // Pin Controlled by PA4
+#define AT91C_PA4_CTS0            (AT91C_PIO_PA4) //  USART 0 Clear To Send
+#define AT91C_PA4_SPI1_NPCS3      (AT91C_PIO_PA4) //  SPI 1 Peripheral Chip Select 3
+#define AT91C_PIO_PA5             (1 <<  5) // Pin Controlled by PA5
+#define AT91C_PA5_RXD1            (AT91C_PIO_PA5) //  USART 1 Receive Data
+#define AT91C_PIO_PA6             (1 <<  6) // Pin Controlled by PA6
+#define AT91C_PA6_TXD1            (AT91C_PIO_PA6) //  USART 1 Transmit Data
+#define AT91C_PIO_PA7             (1 <<  7) // Pin Controlled by PA7
+#define AT91C_PA7_SCK1            (AT91C_PIO_PA7) //  USART 1 Serial Clock
+#define AT91C_PA7_SPI0_NPCS1      (AT91C_PIO_PA7) //  SPI 0 Peripheral Chip Select 1
+#define AT91C_PIO_PA8             (1 <<  8) // Pin Controlled by PA8
+#define AT91C_PA8_RTS1            (AT91C_PIO_PA8) //  USART 1 Ready To Send
+#define AT91C_PA8_SPI0_NPCS2      (AT91C_PIO_PA8) //  SPI 0 Peripheral Chip Select 2
+#define AT91C_PIO_PA9             (1 <<  9) // Pin Controlled by PA9
+#define AT91C_PA9_CTS1            (AT91C_PIO_PA9) //  USART 1 Clear To Send
+#define AT91C_PA9_SPI0_NPCS3      (AT91C_PIO_PA9) //  SPI 0 Peripheral Chip Select 3
+#define AT91C_PIO_PB0             (1 <<  0) // Pin Controlled by PB0
+#define AT91C_PB0_ETXCK_EREFCK    (AT91C_PIO_PB0) //  Ethernet MAC Transmit Clock/Reference Clock
+#define AT91C_PB0_PCK0            (AT91C_PIO_PB0) //  PMC Programmable Clock Output 0
+#define AT91C_PIO_PB1             (1 <<  1) // Pin Controlled by PB1
+#define AT91C_PB1_ETXEN           (AT91C_PIO_PB1) //  Ethernet MAC Transmit Enable
+#define AT91C_PIO_PB10            (1 << 10) // Pin Controlled by PB10
+#define AT91C_PB10_ETX2           (AT91C_PIO_PB10) //  Ethernet MAC Transmit Data 2
+#define AT91C_PB10_SPI1_NPCS1     (AT91C_PIO_PB10) //  SPI 1 Peripheral Chip Select 1
+#define AT91C_PIO_PB11            (1 << 11) // Pin Controlled by PB11
+#define AT91C_PB11_ETX3           (AT91C_PIO_PB11) //  Ethernet MAC Transmit Data 3
+#define AT91C_PB11_SPI1_NPCS2     (AT91C_PIO_PB11) //  SPI 1 Peripheral Chip Select 2
+#define AT91C_PIO_PB12            (1 << 12) // Pin Controlled by PB12
+#define AT91C_PB12_ETXER          (AT91C_PIO_PB12) //  Ethernet MAC Transmikt Coding Error
+#define AT91C_PB12_TCLK0          (AT91C_PIO_PB12) //  Timer Counter 0 external clock input
+#define AT91C_PIO_PB13            (1 << 13) // Pin Controlled by PB13
+#define AT91C_PB13_ERX2           (AT91C_PIO_PB13) //  Ethernet MAC Receive Data 2
+#define AT91C_PB13_SPI0_NPCS1     (AT91C_PIO_PB13) //  SPI 0 Peripheral Chip Select 1
+#define AT91C_PIO_PB14            (1 << 14) // Pin Controlled by PB14
+#define AT91C_PB14_ERX3           (AT91C_PIO_PB14) //  Ethernet MAC Receive Data 3
+#define AT91C_PB14_SPI0_NPCS2     (AT91C_PIO_PB14) //  SPI 0 Peripheral Chip Select 2
+#define AT91C_PIO_PB15            (1 << 15) // Pin Controlled by PB15
+#define AT91C_PB15_ERXDV_ECRSDV   (AT91C_PIO_PB15) //  Ethernet MAC Receive Data Valid
+#define AT91C_PIO_PB16            (1 << 16) // Pin Controlled by PB16
+#define AT91C_PB16_ECOL           (AT91C_PIO_PB16) //  Ethernet MAC Collision Detected
+#define AT91C_PB16_SPI1_NPCS3     (AT91C_PIO_PB16) //  SPI 1 Peripheral Chip Select 3
+#define AT91C_PIO_PB17            (1 << 17) // Pin Controlled by PB17
+#define AT91C_PB17_ERXCK          (AT91C_PIO_PB17) //  Ethernet MAC Receive Clock
+#define AT91C_PB17_SPI0_NPCS3     (AT91C_PIO_PB17) //  SPI 0 Peripheral Chip Select 3
+#define AT91C_PIO_PB18            (1 << 18) // Pin Controlled by PB18
+#define AT91C_PB18_EF100          (AT91C_PIO_PB18) //  Ethernet MAC Force 100 Mbits/sec
+#define AT91C_PB18_ADTRG          (AT91C_PIO_PB18) //  ADC External Trigger
+#define AT91C_PIO_PB19            (1 << 19) // Pin Controlled by PB19
+#define AT91C_PB19_PWM0           (AT91C_PIO_PB19) //  PWM Channel 0
+#define AT91C_PB19_TCLK1          (AT91C_PIO_PB19) //  Timer Counter 1 external clock input
+#define AT91C_PIO_PB2             (1 <<  2) // Pin Controlled by PB2
+#define AT91C_PB2_ETX0            (AT91C_PIO_PB2) //  Ethernet MAC Transmit Data 0
+#define AT91C_PIO_PB20            (1 << 20) // Pin Controlled by PB20
+#define AT91C_PB20_PWM1           (AT91C_PIO_PB20) //  PWM Channel 1
+#define AT91C_PB20_PCK0           (AT91C_PIO_PB20) //  PMC Programmable Clock Output 0
+#define AT91C_PIO_PB21            (1 << 21) // Pin Controlled by PB21
+#define AT91C_PB21_PWM2           (AT91C_PIO_PB21) //  PWM Channel 2
+#define AT91C_PB21_PCK1           (AT91C_PIO_PB21) //  PMC Programmable Clock Output 1
+#define AT91C_PIO_PB22            (1 << 22) // Pin Controlled by PB22
+#define AT91C_PB22_PWM3           (AT91C_PIO_PB22) //  PWM Channel 3
+#define AT91C_PB22_PCK2           (AT91C_PIO_PB22) //  PMC Programmable Clock Output 2
+#define AT91C_PIO_PB23            (1 << 23) // Pin Controlled by PB23
+#define AT91C_PB23_TIOA0          (AT91C_PIO_PB23) //  Timer Counter 0 Multipurpose Timer I/O Pin A
+#define AT91C_PB23_DCD1           (AT91C_PIO_PB23) //  USART 1 Data Carrier Detect
+#define AT91C_PIO_PB24            (1 << 24) // Pin Controlled by PB24
+#define AT91C_PB24_TIOB0          (AT91C_PIO_PB24) //  Timer Counter 0 Multipurpose Timer I/O Pin B
+#define AT91C_PB24_DSR1           (AT91C_PIO_PB24) //  USART 1 Data Set ready
+#define AT91C_PIO_PB25            (1 << 25) // Pin Controlled by PB25
+#define AT91C_PB25_TIOA1          (AT91C_PIO_PB25) //  Timer Counter 1 Multipurpose Timer I/O Pin A
+#define AT91C_PB25_DTR1           (AT91C_PIO_PB25) //  USART 1 Data Terminal ready
+#define AT91C_PIO_PB26            (1 << 26) // Pin Controlled by PB26
+#define AT91C_PB26_TIOB1          (AT91C_PIO_PB26) //  Timer Counter 1 Multipurpose Timer I/O Pin B
+#define AT91C_PB26_RI1            (AT91C_PIO_PB26) //  USART 1 Ring Indicator
+#define AT91C_PIO_PB27            (1 << 27) // Pin Controlled by PB27
+#define AT91C_PB27_TIOA2          (AT91C_PIO_PB27) //  Timer Counter 2 Multipurpose Timer I/O Pin A
+#define AT91C_PB27_PWM0           (AT91C_PIO_PB27) //  PWM Channel 0
+#define AT91C_PIO_PB28            (1 << 28) // Pin Controlled by PB28
+#define AT91C_PB28_TIOB2          (AT91C_PIO_PB28) //  Timer Counter 2 Multipurpose Timer I/O Pin B
+#define AT91C_PB28_PWM1           (AT91C_PIO_PB28) //  PWM Channel 1
+#define AT91C_PIO_PB29            (1 << 29) // Pin Controlled by PB29
+#define AT91C_PB29_PCK1           (AT91C_PIO_PB29) //  PMC Programmable Clock Output 1
+#define AT91C_PB29_PWM2           (AT91C_PIO_PB29) //  PWM Channel 2
+#define AT91C_PIO_PB3             (1 <<  3) // Pin Controlled by PB3
+#define AT91C_PB3_ETX1            (AT91C_PIO_PB3) //  Ethernet MAC Transmit Data 1
+#define AT91C_PIO_PB30            (1 << 30) // Pin Controlled by PB30
+#define AT91C_PB30_PCK2           (AT91C_PIO_PB30) //  PMC Programmable Clock Output 2
+#define AT91C_PB30_PWM3           (AT91C_PIO_PB30) //  PWM Channel 3
+#define AT91C_PIO_PB4             (1 <<  4) // Pin Controlled by PB4
+#define AT91C_PB4_ECRS            (AT91C_PIO_PB4) //  Ethernet MAC Carrier Sense/Carrier Sense and Data Valid
+#define AT91C_PIO_PB5             (1 <<  5) // Pin Controlled by PB5
+#define AT91C_PB5_ERX0            (AT91C_PIO_PB5) //  Ethernet MAC Receive Data 0
+#define AT91C_PIO_PB6             (1 <<  6) // Pin Controlled by PB6
+#define AT91C_PB6_ERX1            (AT91C_PIO_PB6) //  Ethernet MAC Receive Data 1
+#define AT91C_PIO_PB7             (1 <<  7) // Pin Controlled by PB7
+#define AT91C_PB7_ERXER           (AT91C_PIO_PB7) //  Ethernet MAC Receive Error
+#define AT91C_PIO_PB8             (1 <<  8) // Pin Controlled by PB8
+#define AT91C_PB8_EMDC            (AT91C_PIO_PB8) //  Ethernet MAC Management Data Clock
+#define AT91C_PIO_PB9             (1 <<  9) // Pin Controlled by PB9
+#define AT91C_PB9_EMDIO           (AT91C_PIO_PB9) //  Ethernet MAC Management Data Input/Output
+
+// *****************************************************************************
+//               PERIPHERAL ID DEFINITIONS FOR AT91SAM7X256
+// *****************************************************************************
+#define AT91C_ID_FIQ              ( 0) // Advanced Interrupt Controller (FIQ)
+#define AT91C_ID_SYS              ( 1) // System Peripheral
+#define AT91C_ID_PIOA             ( 2) // Parallel IO Controller A
+#define AT91C_ID_PIOB             ( 3) // Parallel IO Controller B
+#define AT91C_ID_SPI0             ( 4) // Serial Peripheral Interface 0
+#define AT91C_ID_SPI1             ( 5) // Serial Peripheral Interface 1
+#define AT91C_ID_US0              ( 6) // USART 0
+#define AT91C_ID_US1              ( 7) // USART 1
+#define AT91C_ID_SSC              ( 8) // Serial Synchronous Controller
+#define AT91C_ID_TWI              ( 9) // Two-Wire Interface
+#define AT91C_ID_PWMC             (10) // PWM Controller
+#define AT91C_ID_UDP              (11) // USB Device Port
+#define AT91C_ID_TC0              (12) // Timer Counter 0
+#define AT91C_ID_TC1              (13) // Timer Counter 1
+#define AT91C_ID_TC2              (14) // Timer Counter 2
+#define AT91C_ID_CAN              (15) // Control Area Network Controller
+#define AT91C_ID_EMAC             (16) // Ethernet MAC
+#define AT91C_ID_ADC              (17) // Analog-to-Digital Converter
+#define AT91C_ID_18_Reserved      (18) // Reserved
+#define AT91C_ID_19_Reserved      (19) // Reserved
+#define AT91C_ID_20_Reserved      (20) // Reserved
+#define AT91C_ID_21_Reserved      (21) // Reserved
+#define AT91C_ID_22_Reserved      (22) // Reserved
+#define AT91C_ID_23_Reserved      (23) // Reserved
+#define AT91C_ID_24_Reserved      (24) // Reserved
+#define AT91C_ID_25_Reserved      (25) // Reserved
+#define AT91C_ID_26_Reserved      (26) // Reserved
+#define AT91C_ID_27_Reserved      (27) // Reserved
+#define AT91C_ID_28_Reserved      (28) // Reserved
+#define AT91C_ID_29_Reserved      (29) // Reserved
+#define AT91C_ID_IRQ0             (30) // Advanced Interrupt Controller (IRQ0)
+#define AT91C_ID_IRQ1             (31) // Advanced Interrupt Controller (IRQ1)
+#define AT91C_ALL_INT             (0xC003FFFF) // ALL VALID INTERRUPTS
+
+// *****************************************************************************
+//               BASE ADDRESS DEFINITIONS FOR AT91SAM7X256
+// *****************************************************************************
+#define AT91C_BASE_SYS            (0xFFFFF000) // (SYS) Base Address
+#define AT91C_BASE_AIC            (0xFFFFF000) // (AIC) Base Address
+#define AT91C_BASE_PDC_DBGU       (0xFFFFF300) // (PDC_DBGU) Base Address
+#define AT91C_BASE_DBGU           (0xFFFFF200) // (DBGU) Base Address
+#define AT91C_BASE_PIOA           (0xFFFFF400) // (PIOA) Base Address
+#define AT91C_BASE_PIOB           (0xFFFFF600) // (PIOB) Base Address
+#define AT91C_BASE_CKGR           (0xFFFFFC20) // (CKGR) Base Address
+#define AT91C_BASE_PMC            (0xFFFFFC00) // (PMC) Base Address
+#define AT91C_BASE_RSTC           (0xFFFFFD00) // (RSTC) Base Address
+#define AT91C_BASE_RTTC           (0xFFFFFD20) // (RTTC) Base Address
+#define AT91C_BASE_PITC           (0xFFFFFD30) // (PITC) Base Address
+#define AT91C_BASE_WDTC           (0xFFFFFD40) // (WDTC) Base Address
+#define AT91C_BASE_VREG           (0xFFFFFD60) // (VREG) Base Address
+#define AT91C_BASE_MC             (0xFFFFFF00) // (MC) Base Address
+#define AT91C_BASE_PDC_SPI1       (0xFFFE4100) // (PDC_SPI1) Base Address
+#define AT91C_BASE_SPI1           (0xFFFE4000) // (SPI1) Base Address
+#define AT91C_BASE_PDC_SPI0       (0xFFFE0100) // (PDC_SPI0) Base Address
+#define AT91C_BASE_SPI0           (0xFFFE0000) // (SPI0) Base Address
+#define AT91C_BASE_PDC_US1        (0xFFFC4100) // (PDC_US1) Base Address
+#define AT91C_BASE_US1            (0xFFFC4000) // (US1) Base Address
+#define AT91C_BASE_PDC_US0        (0xFFFC0100) // (PDC_US0) Base Address
+#define AT91C_BASE_US0            (0xFFFC0000) // (US0) Base Address
+#define AT91C_BASE_PDC_SSC        (0xFFFD4100) // (PDC_SSC) Base Address
+#define AT91C_BASE_SSC            (0xFFFD4000) // (SSC) Base Address
+#define AT91C_BASE_TWI            (0xFFFB8000) // (TWI) Base Address
+#define AT91C_BASE_PWMC_CH3       (0xFFFCC260) // (PWMC_CH3) Base Address
+#define AT91C_BASE_PWMC_CH2       (0xFFFCC240) // (PWMC_CH2) Base Address
+#define AT91C_BASE_PWMC_CH1       (0xFFFCC220) // (PWMC_CH1) Base Address
+#define AT91C_BASE_PWMC_CH0       (0xFFFCC200) // (PWMC_CH0) Base Address
+#define AT91C_BASE_PWMC           (0xFFFCC000) // (PWMC) Base Address
+#define AT91C_BASE_UDP            (0xFFFB0000) // (UDP) Base Address
+#define AT91C_BASE_TC0            (0xFFFA0000) // (TC0) Base Address
+#define AT91C_BASE_TC1            (0xFFFA0040) // (TC1) Base Address
+#define AT91C_BASE_TC2            (0xFFFA0080) // (TC2) Base Address
+#define AT91C_BASE_TCB            (0xFFFA0000) // (TCB) Base Address
+#define AT91C_BASE_CAN_MB0        (0xFFFD0200) // (CAN_MB0) Base Address
+#define AT91C_BASE_CAN_MB1        (0xFFFD0220) // (CAN_MB1) Base Address
+#define AT91C_BASE_CAN_MB2        (0xFFFD0240) // (CAN_MB2) Base Address
+#define AT91C_BASE_CAN_MB3        (0xFFFD0260) // (CAN_MB3) Base Address
+#define AT91C_BASE_CAN_MB4        (0xFFFD0280) // (CAN_MB4) Base Address
+#define AT91C_BASE_CAN_MB5        (0xFFFD02A0) // (CAN_MB5) Base Address
+#define AT91C_BASE_CAN_MB6        (0xFFFD02C0) // (CAN_MB6) Base Address
+#define AT91C_BASE_CAN_MB7        (0xFFFD02E0) // (CAN_MB7) Base Address
+#define AT91C_BASE_CAN            (0xFFFD0000) // (CAN) Base Address
+#define AT91C_BASE_EMAC           (0xFFFDC000) // (EMAC) Base Address
+#define AT91C_BASE_PDC_ADC        (0xFFFD8100) // (PDC_ADC) Base Address
+#define AT91C_BASE_ADC            (0xFFFD8000) // (ADC) Base Address
+
+// *****************************************************************************
+//               MEMORY MAPPING DEFINITIONS FOR AT91SAM7X256
+// *****************************************************************************
+// ISRAM
+#define AT91C_ISRAM	              (0x00200000) // Internal SRAM base address
+#define AT91C_ISRAM_SIZE	         (0x00010000) // Internal SRAM size in byte (64 Kbytes)
+// IFLASH
+#define AT91C_IFLASH	             (0x00100000) // Internal FLASH base address
+#define AT91C_IFLASH_SIZE	        (0x00040000) // Internal FLASH size in byte (256 Kbytes)
+#define AT91C_IFLASH_PAGE_SIZE	   (256) // Internal FLASH Page Size: 256 bytes
+#define AT91C_IFLASH_LOCK_REGION_SIZE	 (16384) // Internal FLASH Lock Region Size: 16 Kbytes
+#define AT91C_IFLASH_NB_OF_PAGES	 (1024) // Internal FLASH Number of Pages: 1024 bytes
+#define AT91C_IFLASH_NB_OF_LOCK_BITS	 (16) // Internal FLASH Number of Lock Bits: 16 bytes
+
+
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/incIAR/ioat91sam7x256.h b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/incIAR/ioat91sam7x256.h
new file mode 100644
index 000000000..ab71b9332
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/incIAR/ioat91sam7x256.h
@@ -0,0 +1,4380 @@
+// - ----------------------------------------------------------------------------
+// -          ATMEL Microcontroller Software Support  -  ROUSSET  -
+// - ----------------------------------------------------------------------------
+// -  DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+// -  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+// -  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+// -  DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+// -  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// -  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+// -  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+// -  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+// -  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+// -  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+// - ----------------------------------------------------------------------------
+// - File Name           : AT91SAM7X256.h
+// - Object              : AT91SAM7X256 definitions
+// - Generated           : AT91 SW Application Group  11/02/2005 (15:17:24)
+// - 
+// - CVS Reference       : /AT91SAM7X256.pl/1.14/Tue Sep 13 15:06:52 2005//
+// - CVS Reference       : /SYS_SAM7X.pl/1.3/Tue Feb  1 17:01:43 2005//
+// - CVS Reference       : /MC_SAM7X.pl/1.2/Fri May 20 14:13:04 2005//
+// - CVS Reference       : /PMC_SAM7X.pl/1.4/Tue Feb  8 13:58:10 2005//
+// - CVS Reference       : /RSTC_SAM7X.pl/1.2/Wed Jul 13 14:57:50 2005//
+// - CVS Reference       : /UDP_SAM7X.pl/1.1/Tue May 10 11:35:35 2005//
+// - CVS Reference       : /PWM_SAM7X.pl/1.1/Tue May 10 11:53:07 2005//
+// - CVS Reference       : /AIC_6075B.pl/1.3/Fri May 20 14:01:30 2005//
+// - CVS Reference       : /PIO_6057A.pl/1.2/Thu Feb  3 10:18:28 2005//
+// - CVS Reference       : /RTTC_6081A.pl/1.2/Tue Nov  9 14:43:58 2004//
+// - CVS Reference       : /PITC_6079A.pl/1.2/Tue Nov  9 14:43:56 2004//
+// - CVS Reference       : /WDTC_6080A.pl/1.3/Tue Nov  9 14:44:00 2004//
+// - CVS Reference       : /VREG_6085B.pl/1.1/Tue Feb  1 16:05:48 2005//
+// - CVS Reference       : /PDC_6074C.pl/1.2/Thu Feb  3 08:48:54 2005//
+// - CVS Reference       : /DBGU_6059D.pl/1.1/Mon Jan 31 13:15:32 2005//
+// - CVS Reference       : /SPI_6088D.pl/1.3/Fri May 20 14:08:59 2005//
+// - CVS Reference       : /US_6089C.pl/1.1/Mon Jul 12 18:23:26 2004//
+// - CVS Reference       : /SSC_6078B.pl/1.1/Wed Jul 13 15:19:19 2005//
+// - CVS Reference       : /TWI_6061A.pl/1.1/Tue Jul 13 07:38:06 2004//
+// - CVS Reference       : /TC_6082A.pl/1.7/Fri Mar 11 12:52:17 2005//
+// - CVS Reference       : /CAN_6019B.pl/1.1/Tue Mar  8 12:42:22 2005//
+// - CVS Reference       : /EMACB_6119A.pl/1.6/Wed Jul 13 15:05:35 2005//
+// - CVS Reference       : /ADC_6051C.pl/1.1/Fri Oct 17 09:12:38 2003//
+// - ----------------------------------------------------------------------------
+
+#ifndef AT91SAM7X256_H
+#define AT91SAM7X256_H
+
+#ifdef __IAR_SYSTEMS_ICC__
+
+typedef volatile unsigned int AT91_REG;// Hardware register definition
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR System Peripherals
+// *****************************************************************************
+typedef struct _AT91S_SYS {
+	AT91_REG	 AIC_SMR[32]; 	// Source Mode Register
+	AT91_REG	 AIC_SVR[32]; 	// Source Vector Register
+	AT91_REG	 AIC_IVR; 	// IRQ Vector Register
+	AT91_REG	 AIC_FVR; 	// FIQ Vector Register
+	AT91_REG	 AIC_ISR; 	// Interrupt Status Register
+	AT91_REG	 AIC_IPR; 	// Interrupt Pending Register
+	AT91_REG	 AIC_IMR; 	// Interrupt Mask Register
+	AT91_REG	 AIC_CISR; 	// Core Interrupt Status Register
+	AT91_REG	 Reserved0[2]; 	// 
+	AT91_REG	 AIC_IECR; 	// Interrupt Enable Command Register
+	AT91_REG	 AIC_IDCR; 	// Interrupt Disable Command Register
+	AT91_REG	 AIC_ICCR; 	// Interrupt Clear Command Register
+	AT91_REG	 AIC_ISCR; 	// Interrupt Set Command Register
+	AT91_REG	 AIC_EOICR; 	// End of Interrupt Command Register
+	AT91_REG	 AIC_SPU; 	// Spurious Vector Register
+	AT91_REG	 AIC_DCR; 	// Debug Control Register (Protect)
+	AT91_REG	 Reserved1[1]; 	// 
+	AT91_REG	 AIC_FFER; 	// Fast Forcing Enable Register
+	AT91_REG	 AIC_FFDR; 	// Fast Forcing Disable Register
+	AT91_REG	 AIC_FFSR; 	// Fast Forcing Status Register
+	AT91_REG	 Reserved2[45]; 	// 
+	AT91_REG	 DBGU_CR; 	// Control Register
+	AT91_REG	 DBGU_MR; 	// Mode Register
+	AT91_REG	 DBGU_IER; 	// Interrupt Enable Register
+	AT91_REG	 DBGU_IDR; 	// Interrupt Disable Register
+	AT91_REG	 DBGU_IMR; 	// Interrupt Mask Register
+	AT91_REG	 DBGU_CSR; 	// Channel Status Register
+	AT91_REG	 DBGU_RHR; 	// Receiver Holding Register
+	AT91_REG	 DBGU_THR; 	// Transmitter Holding Register
+	AT91_REG	 DBGU_BRGR; 	// Baud Rate Generator Register
+	AT91_REG	 Reserved3[7]; 	// 
+	AT91_REG	 DBGU_CIDR; 	// Chip ID Register
+	AT91_REG	 DBGU_EXID; 	// Chip ID Extension Register
+	AT91_REG	 DBGU_FNTR; 	// Force NTRST Register
+	AT91_REG	 Reserved4[45]; 	// 
+	AT91_REG	 DBGU_RPR; 	// Receive Pointer Register
+	AT91_REG	 DBGU_RCR; 	// Receive Counter Register
+	AT91_REG	 DBGU_TPR; 	// Transmit Pointer Register
+	AT91_REG	 DBGU_TCR; 	// Transmit Counter Register
+	AT91_REG	 DBGU_RNPR; 	// Receive Next Pointer Register
+	AT91_REG	 DBGU_RNCR; 	// Receive Next Counter Register
+	AT91_REG	 DBGU_TNPR; 	// Transmit Next Pointer Register
+	AT91_REG	 DBGU_TNCR; 	// Transmit Next Counter Register
+	AT91_REG	 DBGU_PTCR; 	// PDC Transfer Control Register
+	AT91_REG	 DBGU_PTSR; 	// PDC Transfer Status Register
+	AT91_REG	 Reserved5[54]; 	// 
+	AT91_REG	 PIOA_PER; 	// PIO Enable Register
+	AT91_REG	 PIOA_PDR; 	// PIO Disable Register
+	AT91_REG	 PIOA_PSR; 	// PIO Status Register
+	AT91_REG	 Reserved6[1]; 	// 
+	AT91_REG	 PIOA_OER; 	// Output Enable Register
+	AT91_REG	 PIOA_ODR; 	// Output Disable Registerr
+	AT91_REG	 PIOA_OSR; 	// Output Status Register
+	AT91_REG	 Reserved7[1]; 	// 
+	AT91_REG	 PIOA_IFER; 	// Input Filter Enable Register
+	AT91_REG	 PIOA_IFDR; 	// Input Filter Disable Register
+	AT91_REG	 PIOA_IFSR; 	// Input Filter Status Register
+	AT91_REG	 Reserved8[1]; 	// 
+	AT91_REG	 PIOA_SODR; 	// Set Output Data Register
+	AT91_REG	 PIOA_CODR; 	// Clear Output Data Register
+	AT91_REG	 PIOA_ODSR; 	// Output Data Status Register
+	AT91_REG	 PIOA_PDSR; 	// Pin Data Status Register
+	AT91_REG	 PIOA_IER; 	// Interrupt Enable Register
+	AT91_REG	 PIOA_IDR; 	// Interrupt Disable Register
+	AT91_REG	 PIOA_IMR; 	// Interrupt Mask Register
+	AT91_REG	 PIOA_ISR; 	// Interrupt Status Register
+	AT91_REG	 PIOA_MDER; 	// Multi-driver Enable Register
+	AT91_REG	 PIOA_MDDR; 	// Multi-driver Disable Register
+	AT91_REG	 PIOA_MDSR; 	// Multi-driver Status Register
+	AT91_REG	 Reserved9[1]; 	// 
+	AT91_REG	 PIOA_PPUDR; 	// Pull-up Disable Register
+	AT91_REG	 PIOA_PPUER; 	// Pull-up Enable Register
+	AT91_REG	 PIOA_PPUSR; 	// Pull-up Status Register
+	AT91_REG	 Reserved10[1]; 	// 
+	AT91_REG	 PIOA_ASR; 	// Select A Register
+	AT91_REG	 PIOA_BSR; 	// Select B Register
+	AT91_REG	 PIOA_ABSR; 	// AB Select Status Register
+	AT91_REG	 Reserved11[9]; 	// 
+	AT91_REG	 PIOA_OWER; 	// Output Write Enable Register
+	AT91_REG	 PIOA_OWDR; 	// Output Write Disable Register
+	AT91_REG	 PIOA_OWSR; 	// Output Write Status Register
+	AT91_REG	 Reserved12[85]; 	// 
+	AT91_REG	 PIOB_PER; 	// PIO Enable Register
+	AT91_REG	 PIOB_PDR; 	// PIO Disable Register
+	AT91_REG	 PIOB_PSR; 	// PIO Status Register
+	AT91_REG	 Reserved13[1]; 	// 
+	AT91_REG	 PIOB_OER; 	// Output Enable Register
+	AT91_REG	 PIOB_ODR; 	// Output Disable Registerr
+	AT91_REG	 PIOB_OSR; 	// Output Status Register
+	AT91_REG	 Reserved14[1]; 	// 
+	AT91_REG	 PIOB_IFER; 	// Input Filter Enable Register
+	AT91_REG	 PIOB_IFDR; 	// Input Filter Disable Register
+	AT91_REG	 PIOB_IFSR; 	// Input Filter Status Register
+	AT91_REG	 Reserved15[1]; 	// 
+	AT91_REG	 PIOB_SODR; 	// Set Output Data Register
+	AT91_REG	 PIOB_CODR; 	// Clear Output Data Register
+	AT91_REG	 PIOB_ODSR; 	// Output Data Status Register
+	AT91_REG	 PIOB_PDSR; 	// Pin Data Status Register
+	AT91_REG	 PIOB_IER; 	// Interrupt Enable Register
+	AT91_REG	 PIOB_IDR; 	// Interrupt Disable Register
+	AT91_REG	 PIOB_IMR; 	// Interrupt Mask Register
+	AT91_REG	 PIOB_ISR; 	// Interrupt Status Register
+	AT91_REG	 PIOB_MDER; 	// Multi-driver Enable Register
+	AT91_REG	 PIOB_MDDR; 	// Multi-driver Disable Register
+	AT91_REG	 PIOB_MDSR; 	// Multi-driver Status Register
+	AT91_REG	 Reserved16[1]; 	// 
+	AT91_REG	 PIOB_PPUDR; 	// Pull-up Disable Register
+	AT91_REG	 PIOB_PPUER; 	// Pull-up Enable Register
+	AT91_REG	 PIOB_PPUSR; 	// Pull-up Status Register
+	AT91_REG	 Reserved17[1]; 	// 
+	AT91_REG	 PIOB_ASR; 	// Select A Register
+	AT91_REG	 PIOB_BSR; 	// Select B Register
+	AT91_REG	 PIOB_ABSR; 	// AB Select Status Register
+	AT91_REG	 Reserved18[9]; 	// 
+	AT91_REG	 PIOB_OWER; 	// Output Write Enable Register
+	AT91_REG	 PIOB_OWDR; 	// Output Write Disable Register
+	AT91_REG	 PIOB_OWSR; 	// Output Write Status Register
+	AT91_REG	 Reserved19[341]; 	// 
+	AT91_REG	 PMC_SCER; 	// System Clock Enable Register
+	AT91_REG	 PMC_SCDR; 	// System Clock Disable Register
+	AT91_REG	 PMC_SCSR; 	// System Clock Status Register
+	AT91_REG	 Reserved20[1]; 	// 
+	AT91_REG	 PMC_PCER; 	// Peripheral Clock Enable Register
+	AT91_REG	 PMC_PCDR; 	// Peripheral Clock Disable Register
+	AT91_REG	 PMC_PCSR; 	// Peripheral Clock Status Register
+	AT91_REG	 Reserved21[1]; 	// 
+	AT91_REG	 PMC_MOR; 	// Main Oscillator Register
+	AT91_REG	 PMC_MCFR; 	// Main Clock  Frequency Register
+	AT91_REG	 Reserved22[1]; 	// 
+	AT91_REG	 PMC_PLLR; 	// PLL Register
+	AT91_REG	 PMC_MCKR; 	// Master Clock Register
+	AT91_REG	 Reserved23[3]; 	// 
+	AT91_REG	 PMC_PCKR[4]; 	// Programmable Clock Register
+	AT91_REG	 Reserved24[4]; 	// 
+	AT91_REG	 PMC_IER; 	// Interrupt Enable Register
+	AT91_REG	 PMC_IDR; 	// Interrupt Disable Register
+	AT91_REG	 PMC_SR; 	// Status Register
+	AT91_REG	 PMC_IMR; 	// Interrupt Mask Register
+	AT91_REG	 Reserved25[36]; 	// 
+	AT91_REG	 RSTC_RCR; 	// Reset Control Register
+	AT91_REG	 RSTC_RSR; 	// Reset Status Register
+	AT91_REG	 RSTC_RMR; 	// Reset Mode Register
+	AT91_REG	 Reserved26[5]; 	// 
+	AT91_REG	 RTTC_RTMR; 	// Real-time Mode Register
+	AT91_REG	 RTTC_RTAR; 	// Real-time Alarm Register
+	AT91_REG	 RTTC_RTVR; 	// Real-time Value Register
+	AT91_REG	 RTTC_RTSR; 	// Real-time Status Register
+	AT91_REG	 PITC_PIMR; 	// Period Interval Mode Register
+	AT91_REG	 PITC_PISR; 	// Period Interval Status Register
+	AT91_REG	 PITC_PIVR; 	// Period Interval Value Register
+	AT91_REG	 PITC_PIIR; 	// Period Interval Image Register
+	AT91_REG	 WDTC_WDCR; 	// Watchdog Control Register
+	AT91_REG	 WDTC_WDMR; 	// Watchdog Mode Register
+	AT91_REG	 WDTC_WDSR; 	// Watchdog Status Register
+	AT91_REG	 Reserved27[5]; 	// 
+	AT91_REG	 VREG_MR; 	// Voltage Regulator Mode Register
+} AT91S_SYS, *AT91PS_SYS;
+
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Advanced Interrupt Controller
+// *****************************************************************************
+typedef struct _AT91S_AIC {
+	AT91_REG	 AIC_SMR[32]; 	// Source Mode Register
+	AT91_REG	 AIC_SVR[32]; 	// Source Vector Register
+	AT91_REG	 AIC_IVR; 	// IRQ Vector Register
+	AT91_REG	 AIC_FVR; 	// FIQ Vector Register
+	AT91_REG	 AIC_ISR; 	// Interrupt Status Register
+	AT91_REG	 AIC_IPR; 	// Interrupt Pending Register
+	AT91_REG	 AIC_IMR; 	// Interrupt Mask Register
+	AT91_REG	 AIC_CISR; 	// Core Interrupt Status Register
+	AT91_REG	 Reserved0[2]; 	// 
+	AT91_REG	 AIC_IECR; 	// Interrupt Enable Command Register
+	AT91_REG	 AIC_IDCR; 	// Interrupt Disable Command Register
+	AT91_REG	 AIC_ICCR; 	// Interrupt Clear Command Register
+	AT91_REG	 AIC_ISCR; 	// Interrupt Set Command Register
+	AT91_REG	 AIC_EOICR; 	// End of Interrupt Command Register
+	AT91_REG	 AIC_SPU; 	// Spurious Vector Register
+	AT91_REG	 AIC_DCR; 	// Debug Control Register (Protect)
+	AT91_REG	 Reserved1[1]; 	// 
+	AT91_REG	 AIC_FFER; 	// Fast Forcing Enable Register
+	AT91_REG	 AIC_FFDR; 	// Fast Forcing Disable Register
+	AT91_REG	 AIC_FFSR; 	// Fast Forcing Status Register
+} AT91S_AIC, *AT91PS_AIC;
+
+// -------- AIC_SMR : (AIC Offset: 0x0) Control Register -------- 
+#define AT91C_AIC_PRIOR       ((unsigned int) 0x7 <<  0) // (AIC) Priority Level
+#define 	AT91C_AIC_PRIOR_LOWEST               ((unsigned int) 0x0) // (AIC) Lowest priority level
+#define 	AT91C_AIC_PRIOR_HIGHEST              ((unsigned int) 0x7) // (AIC) Highest priority level
+#define AT91C_AIC_SRCTYPE     ((unsigned int) 0x3 <<  5) // (AIC) Interrupt Source Type
+#define 	AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL       ((unsigned int) 0x0 <<  5) // (AIC) Internal Sources Code Label High-level Sensitive
+#define 	AT91C_AIC_SRCTYPE_EXT_LOW_LEVEL        ((unsigned int) 0x0 <<  5) // (AIC) External Sources Code Label Low-level Sensitive
+#define 	AT91C_AIC_SRCTYPE_INT_POSITIVE_EDGE    ((unsigned int) 0x1 <<  5) // (AIC) Internal Sources Code Label Positive Edge triggered
+#define 	AT91C_AIC_SRCTYPE_EXT_NEGATIVE_EDGE    ((unsigned int) 0x1 <<  5) // (AIC) External Sources Code Label Negative Edge triggered
+#define 	AT91C_AIC_SRCTYPE_HIGH_LEVEL           ((unsigned int) 0x2 <<  5) // (AIC) Internal Or External Sources Code Label High-level Sensitive
+#define 	AT91C_AIC_SRCTYPE_POSITIVE_EDGE        ((unsigned int) 0x3 <<  5) // (AIC) Internal Or External Sources Code Label Positive Edge triggered
+// -------- AIC_CISR : (AIC Offset: 0x114) AIC Core Interrupt Status Register -------- 
+#define AT91C_AIC_NFIQ        ((unsigned int) 0x1 <<  0) // (AIC) NFIQ Status
+#define AT91C_AIC_NIRQ        ((unsigned int) 0x1 <<  1) // (AIC) NIRQ Status
+// -------- AIC_DCR : (AIC Offset: 0x138) AIC Debug Control Register (Protect) -------- 
+#define AT91C_AIC_DCR_PROT    ((unsigned int) 0x1 <<  0) // (AIC) Protection Mode
+#define AT91C_AIC_DCR_GMSK    ((unsigned int) 0x1 <<  1) // (AIC) General Mask
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Peripheral DMA Controller
+// *****************************************************************************
+typedef struct _AT91S_PDC {
+	AT91_REG	 PDC_RPR; 	// Receive Pointer Register
+	AT91_REG	 PDC_RCR; 	// Receive Counter Register
+	AT91_REG	 PDC_TPR; 	// Transmit Pointer Register
+	AT91_REG	 PDC_TCR; 	// Transmit Counter Register
+	AT91_REG	 PDC_RNPR; 	// Receive Next Pointer Register
+	AT91_REG	 PDC_RNCR; 	// Receive Next Counter Register
+	AT91_REG	 PDC_TNPR; 	// Transmit Next Pointer Register
+	AT91_REG	 PDC_TNCR; 	// Transmit Next Counter Register
+	AT91_REG	 PDC_PTCR; 	// PDC Transfer Control Register
+	AT91_REG	 PDC_PTSR; 	// PDC Transfer Status Register
+} AT91S_PDC, *AT91PS_PDC;
+
+// -------- PDC_PTCR : (PDC Offset: 0x20) PDC Transfer Control Register -------- 
+#define AT91C_PDC_RXTEN       ((unsigned int) 0x1 <<  0) // (PDC) Receiver Transfer Enable
+#define AT91C_PDC_RXTDIS      ((unsigned int) 0x1 <<  1) // (PDC) Receiver Transfer Disable
+#define AT91C_PDC_TXTEN       ((unsigned int) 0x1 <<  8) // (PDC) Transmitter Transfer Enable
+#define AT91C_PDC_TXTDIS      ((unsigned int) 0x1 <<  9) // (PDC) Transmitter Transfer Disable
+// -------- PDC_PTSR : (PDC Offset: 0x24) PDC Transfer Status Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Debug Unit
+// *****************************************************************************
+typedef struct _AT91S_DBGU {
+	AT91_REG	 DBGU_CR; 	// Control Register
+	AT91_REG	 DBGU_MR; 	// Mode Register
+	AT91_REG	 DBGU_IER; 	// Interrupt Enable Register
+	AT91_REG	 DBGU_IDR; 	// Interrupt Disable Register
+	AT91_REG	 DBGU_IMR; 	// Interrupt Mask Register
+	AT91_REG	 DBGU_CSR; 	// Channel Status Register
+	AT91_REG	 DBGU_RHR; 	// Receiver Holding Register
+	AT91_REG	 DBGU_THR; 	// Transmitter Holding Register
+	AT91_REG	 DBGU_BRGR; 	// Baud Rate Generator Register
+	AT91_REG	 Reserved0[7]; 	// 
+	AT91_REG	 DBGU_CIDR; 	// Chip ID Register
+	AT91_REG	 DBGU_EXID; 	// Chip ID Extension Register
+	AT91_REG	 DBGU_FNTR; 	// Force NTRST Register
+	AT91_REG	 Reserved1[45]; 	// 
+	AT91_REG	 DBGU_RPR; 	// Receive Pointer Register
+	AT91_REG	 DBGU_RCR; 	// Receive Counter Register
+	AT91_REG	 DBGU_TPR; 	// Transmit Pointer Register
+	AT91_REG	 DBGU_TCR; 	// Transmit Counter Register
+	AT91_REG	 DBGU_RNPR; 	// Receive Next Pointer Register
+	AT91_REG	 DBGU_RNCR; 	// Receive Next Counter Register
+	AT91_REG	 DBGU_TNPR; 	// Transmit Next Pointer Register
+	AT91_REG	 DBGU_TNCR; 	// Transmit Next Counter Register
+	AT91_REG	 DBGU_PTCR; 	// PDC Transfer Control Register
+	AT91_REG	 DBGU_PTSR; 	// PDC Transfer Status Register
+} AT91S_DBGU, *AT91PS_DBGU;
+
+// -------- DBGU_CR : (DBGU Offset: 0x0) Debug Unit Control Register -------- 
+#define AT91C_US_RSTRX        ((unsigned int) 0x1 <<  2) // (DBGU) Reset Receiver
+#define AT91C_US_RSTTX        ((unsigned int) 0x1 <<  3) // (DBGU) Reset Transmitter
+#define AT91C_US_RXEN         ((unsigned int) 0x1 <<  4) // (DBGU) Receiver Enable
+#define AT91C_US_RXDIS        ((unsigned int) 0x1 <<  5) // (DBGU) Receiver Disable
+#define AT91C_US_TXEN         ((unsigned int) 0x1 <<  6) // (DBGU) Transmitter Enable
+#define AT91C_US_TXDIS        ((unsigned int) 0x1 <<  7) // (DBGU) Transmitter Disable
+#define AT91C_US_RSTSTA       ((unsigned int) 0x1 <<  8) // (DBGU) Reset Status Bits
+// -------- DBGU_MR : (DBGU Offset: 0x4) Debug Unit Mode Register -------- 
+#define AT91C_US_PAR          ((unsigned int) 0x7 <<  9) // (DBGU) Parity type
+#define 	AT91C_US_PAR_EVEN                 ((unsigned int) 0x0 <<  9) // (DBGU) Even Parity
+#define 	AT91C_US_PAR_ODD                  ((unsigned int) 0x1 <<  9) // (DBGU) Odd Parity
+#define 	AT91C_US_PAR_SPACE                ((unsigned int) 0x2 <<  9) // (DBGU) Parity forced to 0 (Space)
+#define 	AT91C_US_PAR_MARK                 ((unsigned int) 0x3 <<  9) // (DBGU) Parity forced to 1 (Mark)
+#define 	AT91C_US_PAR_NONE                 ((unsigned int) 0x4 <<  9) // (DBGU) No Parity
+#define 	AT91C_US_PAR_MULTI_DROP           ((unsigned int) 0x6 <<  9) // (DBGU) Multi-drop mode
+#define AT91C_US_CHMODE       ((unsigned int) 0x3 << 14) // (DBGU) Channel Mode
+#define 	AT91C_US_CHMODE_NORMAL               ((unsigned int) 0x0 << 14) // (DBGU) Normal Mode: The USART channel operates as an RX/TX USART.
+#define 	AT91C_US_CHMODE_AUTO                 ((unsigned int) 0x1 << 14) // (DBGU) Automatic Echo: Receiver Data Input is connected to the TXD pin.
+#define 	AT91C_US_CHMODE_LOCAL                ((unsigned int) 0x2 << 14) // (DBGU) Local Loopback: Transmitter Output Signal is connected to Receiver Input Signal.
+#define 	AT91C_US_CHMODE_REMOTE               ((unsigned int) 0x3 << 14) // (DBGU) Remote Loopback: RXD pin is internally connected to TXD pin.
+// -------- DBGU_IER : (DBGU Offset: 0x8) Debug Unit Interrupt Enable Register -------- 
+#define AT91C_US_RXRDY        ((unsigned int) 0x1 <<  0) // (DBGU) RXRDY Interrupt
+#define AT91C_US_TXRDY        ((unsigned int) 0x1 <<  1) // (DBGU) TXRDY Interrupt
+#define AT91C_US_ENDRX        ((unsigned int) 0x1 <<  3) // (DBGU) End of Receive Transfer Interrupt
+#define AT91C_US_ENDTX        ((unsigned int) 0x1 <<  4) // (DBGU) End of Transmit Interrupt
+#define AT91C_US_OVRE         ((unsigned int) 0x1 <<  5) // (DBGU) Overrun Interrupt
+#define AT91C_US_FRAME        ((unsigned int) 0x1 <<  6) // (DBGU) Framing Error Interrupt
+#define AT91C_US_PARE         ((unsigned int) 0x1 <<  7) // (DBGU) Parity Error Interrupt
+#define AT91C_US_TXEMPTY      ((unsigned int) 0x1 <<  9) // (DBGU) TXEMPTY Interrupt
+#define AT91C_US_TXBUFE       ((unsigned int) 0x1 << 11) // (DBGU) TXBUFE Interrupt
+#define AT91C_US_RXBUFF       ((unsigned int) 0x1 << 12) // (DBGU) RXBUFF Interrupt
+#define AT91C_US_COMM_TX      ((unsigned int) 0x1 << 30) // (DBGU) COMM_TX Interrupt
+#define AT91C_US_COMM_RX      ((unsigned int) 0x1 << 31) // (DBGU) COMM_RX Interrupt
+// -------- DBGU_IDR : (DBGU Offset: 0xc) Debug Unit Interrupt Disable Register -------- 
+// -------- DBGU_IMR : (DBGU Offset: 0x10) Debug Unit Interrupt Mask Register -------- 
+// -------- DBGU_CSR : (DBGU Offset: 0x14) Debug Unit Channel Status Register -------- 
+// -------- DBGU_FNTR : (DBGU Offset: 0x48) Debug Unit FORCE_NTRST Register -------- 
+#define AT91C_US_FORCE_NTRST  ((unsigned int) 0x1 <<  0) // (DBGU) Force NTRST in JTAG
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Parallel Input Output Controler
+// *****************************************************************************
+typedef struct _AT91S_PIO {
+	AT91_REG	 PIO_PER; 	// PIO Enable Register
+	AT91_REG	 PIO_PDR; 	// PIO Disable Register
+	AT91_REG	 PIO_PSR; 	// PIO Status Register
+	AT91_REG	 Reserved0[1]; 	// 
+	AT91_REG	 PIO_OER; 	// Output Enable Register
+	AT91_REG	 PIO_ODR; 	// Output Disable Registerr
+	AT91_REG	 PIO_OSR; 	// Output Status Register
+	AT91_REG	 Reserved1[1]; 	// 
+	AT91_REG	 PIO_IFER; 	// Input Filter Enable Register
+	AT91_REG	 PIO_IFDR; 	// Input Filter Disable Register
+	AT91_REG	 PIO_IFSR; 	// Input Filter Status Register
+	AT91_REG	 Reserved2[1]; 	// 
+	AT91_REG	 PIO_SODR; 	// Set Output Data Register
+	AT91_REG	 PIO_CODR; 	// Clear Output Data Register
+	AT91_REG	 PIO_ODSR; 	// Output Data Status Register
+	AT91_REG	 PIO_PDSR; 	// Pin Data Status Register
+	AT91_REG	 PIO_IER; 	// Interrupt Enable Register
+	AT91_REG	 PIO_IDR; 	// Interrupt Disable Register
+	AT91_REG	 PIO_IMR; 	// Interrupt Mask Register
+	AT91_REG	 PIO_ISR; 	// Interrupt Status Register
+	AT91_REG	 PIO_MDER; 	// Multi-driver Enable Register
+	AT91_REG	 PIO_MDDR; 	// Multi-driver Disable Register
+	AT91_REG	 PIO_MDSR; 	// Multi-driver Status Register
+	AT91_REG	 Reserved3[1]; 	// 
+	AT91_REG	 PIO_PPUDR; 	// Pull-up Disable Register
+	AT91_REG	 PIO_PPUER; 	// Pull-up Enable Register
+	AT91_REG	 PIO_PPUSR; 	// Pull-up Status Register
+	AT91_REG	 Reserved4[1]; 	// 
+	AT91_REG	 PIO_ASR; 	// Select A Register
+	AT91_REG	 PIO_BSR; 	// Select B Register
+	AT91_REG	 PIO_ABSR; 	// AB Select Status Register
+	AT91_REG	 Reserved5[9]; 	// 
+	AT91_REG	 PIO_OWER; 	// Output Write Enable Register
+	AT91_REG	 PIO_OWDR; 	// Output Write Disable Register
+	AT91_REG	 PIO_OWSR; 	// Output Write Status Register
+} AT91S_PIO, *AT91PS_PIO;
+
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Clock Generator Controler
+// *****************************************************************************
+typedef struct _AT91S_CKGR {
+	AT91_REG	 CKGR_MOR; 	// Main Oscillator Register
+	AT91_REG	 CKGR_MCFR; 	// Main Clock  Frequency Register
+	AT91_REG	 Reserved0[1]; 	// 
+	AT91_REG	 CKGR_PLLR; 	// PLL Register
+} AT91S_CKGR, *AT91PS_CKGR;
+
+// -------- CKGR_MOR : (CKGR Offset: 0x0) Main Oscillator Register -------- 
+#define AT91C_CKGR_MOSCEN     ((unsigned int) 0x1 <<  0) // (CKGR) Main Oscillator Enable
+#define AT91C_CKGR_OSCBYPASS  ((unsigned int) 0x1 <<  1) // (CKGR) Main Oscillator Bypass
+#define AT91C_CKGR_OSCOUNT    ((unsigned int) 0xFF <<  8) // (CKGR) Main Oscillator Start-up Time
+// -------- CKGR_MCFR : (CKGR Offset: 0x4) Main Clock Frequency Register -------- 
+#define AT91C_CKGR_MAINF      ((unsigned int) 0xFFFF <<  0) // (CKGR) Main Clock Frequency
+#define AT91C_CKGR_MAINRDY    ((unsigned int) 0x1 << 16) // (CKGR) Main Clock Ready
+// -------- CKGR_PLLR : (CKGR Offset: 0xc) PLL B Register -------- 
+#define AT91C_CKGR_DIV        ((unsigned int) 0xFF <<  0) // (CKGR) Divider Selected
+#define 	AT91C_CKGR_DIV_0                    ((unsigned int) 0x0) // (CKGR) Divider output is 0
+#define 	AT91C_CKGR_DIV_BYPASS               ((unsigned int) 0x1) // (CKGR) Divider is bypassed
+#define AT91C_CKGR_PLLCOUNT   ((unsigned int) 0x3F <<  8) // (CKGR) PLL Counter
+#define AT91C_CKGR_OUT        ((unsigned int) 0x3 << 14) // (CKGR) PLL Output Frequency Range
+#define 	AT91C_CKGR_OUT_0                    ((unsigned int) 0x0 << 14) // (CKGR) Please refer to the PLL datasheet
+#define 	AT91C_CKGR_OUT_1                    ((unsigned int) 0x1 << 14) // (CKGR) Please refer to the PLL datasheet
+#define 	AT91C_CKGR_OUT_2                    ((unsigned int) 0x2 << 14) // (CKGR) Please refer to the PLL datasheet
+#define 	AT91C_CKGR_OUT_3                    ((unsigned int) 0x3 << 14) // (CKGR) Please refer to the PLL datasheet
+#define AT91C_CKGR_MUL        ((unsigned int) 0x7FF << 16) // (CKGR) PLL Multiplier
+#define AT91C_CKGR_USBDIV     ((unsigned int) 0x3 << 28) // (CKGR) Divider for USB Clocks
+#define 	AT91C_CKGR_USBDIV_0                    ((unsigned int) 0x0 << 28) // (CKGR) Divider output is PLL clock output
+#define 	AT91C_CKGR_USBDIV_1                    ((unsigned int) 0x1 << 28) // (CKGR) Divider output is PLL clock output divided by 2
+#define 	AT91C_CKGR_USBDIV_2                    ((unsigned int) 0x2 << 28) // (CKGR) Divider output is PLL clock output divided by 4
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Power Management Controler
+// *****************************************************************************
+typedef struct _AT91S_PMC {
+	AT91_REG	 PMC_SCER; 	// System Clock Enable Register
+	AT91_REG	 PMC_SCDR; 	// System Clock Disable Register
+	AT91_REG	 PMC_SCSR; 	// System Clock Status Register
+	AT91_REG	 Reserved0[1]; 	// 
+	AT91_REG	 PMC_PCER; 	// Peripheral Clock Enable Register
+	AT91_REG	 PMC_PCDR; 	// Peripheral Clock Disable Register
+	AT91_REG	 PMC_PCSR; 	// Peripheral Clock Status Register
+	AT91_REG	 Reserved1[1]; 	// 
+	AT91_REG	 PMC_MOR; 	// Main Oscillator Register
+	AT91_REG	 PMC_MCFR; 	// Main Clock  Frequency Register
+	AT91_REG	 Reserved2[1]; 	// 
+	AT91_REG	 PMC_PLLR; 	// PLL Register
+	AT91_REG	 PMC_MCKR; 	// Master Clock Register
+	AT91_REG	 Reserved3[3]; 	// 
+	AT91_REG	 PMC_PCKR[4]; 	// Programmable Clock Register
+	AT91_REG	 Reserved4[4]; 	// 
+	AT91_REG	 PMC_IER; 	// Interrupt Enable Register
+	AT91_REG	 PMC_IDR; 	// Interrupt Disable Register
+	AT91_REG	 PMC_SR; 	// Status Register
+	AT91_REG	 PMC_IMR; 	// Interrupt Mask Register
+} AT91S_PMC, *AT91PS_PMC;
+
+// -------- PMC_SCER : (PMC Offset: 0x0) System Clock Enable Register -------- 
+#define AT91C_PMC_PCK         ((unsigned int) 0x1 <<  0) // (PMC) Processor Clock
+#define AT91C_PMC_UDP         ((unsigned int) 0x1 <<  7) // (PMC) USB Device Port Clock
+#define AT91C_PMC_PCK0        ((unsigned int) 0x1 <<  8) // (PMC) Programmable Clock Output
+#define AT91C_PMC_PCK1        ((unsigned int) 0x1 <<  9) // (PMC) Programmable Clock Output
+#define AT91C_PMC_PCK2        ((unsigned int) 0x1 << 10) // (PMC) Programmable Clock Output
+#define AT91C_PMC_PCK3        ((unsigned int) 0x1 << 11) // (PMC) Programmable Clock Output
+// -------- PMC_SCDR : (PMC Offset: 0x4) System Clock Disable Register -------- 
+// -------- PMC_SCSR : (PMC Offset: 0x8) System Clock Status Register -------- 
+// -------- CKGR_MOR : (PMC Offset: 0x20) Main Oscillator Register -------- 
+// -------- CKGR_MCFR : (PMC Offset: 0x24) Main Clock Frequency Register -------- 
+// -------- CKGR_PLLR : (PMC Offset: 0x2c) PLL B Register -------- 
+// -------- PMC_MCKR : (PMC Offset: 0x30) Master Clock Register -------- 
+#define AT91C_PMC_CSS         ((unsigned int) 0x3 <<  0) // (PMC) Programmable Clock Selection
+#define 	AT91C_PMC_CSS_SLOW_CLK             ((unsigned int) 0x0) // (PMC) Slow Clock is selected
+#define 	AT91C_PMC_CSS_MAIN_CLK             ((unsigned int) 0x1) // (PMC) Main Clock is selected
+#define 	AT91C_PMC_CSS_PLL_CLK              ((unsigned int) 0x3) // (PMC) Clock from PLL is selected
+#define AT91C_PMC_PRES        ((unsigned int) 0x7 <<  2) // (PMC) Programmable Clock Prescaler
+#define 	AT91C_PMC_PRES_CLK                  ((unsigned int) 0x0 <<  2) // (PMC) Selected clock
+#define 	AT91C_PMC_PRES_CLK_2                ((unsigned int) 0x1 <<  2) // (PMC) Selected clock divided by 2
+#define 	AT91C_PMC_PRES_CLK_4                ((unsigned int) 0x2 <<  2) // (PMC) Selected clock divided by 4
+#define 	AT91C_PMC_PRES_CLK_8                ((unsigned int) 0x3 <<  2) // (PMC) Selected clock divided by 8
+#define 	AT91C_PMC_PRES_CLK_16               ((unsigned int) 0x4 <<  2) // (PMC) Selected clock divided by 16
+#define 	AT91C_PMC_PRES_CLK_32               ((unsigned int) 0x5 <<  2) // (PMC) Selected clock divided by 32
+#define 	AT91C_PMC_PRES_CLK_64               ((unsigned int) 0x6 <<  2) // (PMC) Selected clock divided by 64
+// -------- PMC_PCKR : (PMC Offset: 0x40) Programmable Clock Register -------- 
+// -------- PMC_IER : (PMC Offset: 0x60) PMC Interrupt Enable Register -------- 
+#define AT91C_PMC_MOSCS       ((unsigned int) 0x1 <<  0) // (PMC) MOSC Status/Enable/Disable/Mask
+#define AT91C_PMC_LOCK        ((unsigned int) 0x1 <<  2) // (PMC) PLL Status/Enable/Disable/Mask
+#define AT91C_PMC_MCKRDY      ((unsigned int) 0x1 <<  3) // (PMC) MCK_RDY Status/Enable/Disable/Mask
+#define AT91C_PMC_PCK0RDY     ((unsigned int) 0x1 <<  8) // (PMC) PCK0_RDY Status/Enable/Disable/Mask
+#define AT91C_PMC_PCK1RDY     ((unsigned int) 0x1 <<  9) // (PMC) PCK1_RDY Status/Enable/Disable/Mask
+#define AT91C_PMC_PCK2RDY     ((unsigned int) 0x1 << 10) // (PMC) PCK2_RDY Status/Enable/Disable/Mask
+#define AT91C_PMC_PCK3RDY     ((unsigned int) 0x1 << 11) // (PMC) PCK3_RDY Status/Enable/Disable/Mask
+// -------- PMC_IDR : (PMC Offset: 0x64) PMC Interrupt Disable Register -------- 
+// -------- PMC_SR : (PMC Offset: 0x68) PMC Status Register -------- 
+// -------- PMC_IMR : (PMC Offset: 0x6c) PMC Interrupt Mask Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Reset Controller Interface
+// *****************************************************************************
+typedef struct _AT91S_RSTC {
+	AT91_REG	 RSTC_RCR; 	// Reset Control Register
+	AT91_REG	 RSTC_RSR; 	// Reset Status Register
+	AT91_REG	 RSTC_RMR; 	// Reset Mode Register
+} AT91S_RSTC, *AT91PS_RSTC;
+
+// -------- RSTC_RCR : (RSTC Offset: 0x0) Reset Control Register -------- 
+#define AT91C_RSTC_PROCRST    ((unsigned int) 0x1 <<  0) // (RSTC) Processor Reset
+#define AT91C_RSTC_PERRST     ((unsigned int) 0x1 <<  2) // (RSTC) Peripheral Reset
+#define AT91C_RSTC_EXTRST     ((unsigned int) 0x1 <<  3) // (RSTC) External Reset
+#define AT91C_RSTC_KEY        ((unsigned int) 0xFF << 24) // (RSTC) Password
+// -------- RSTC_RSR : (RSTC Offset: 0x4) Reset Status Register -------- 
+#define AT91C_RSTC_URSTS      ((unsigned int) 0x1 <<  0) // (RSTC) User Reset Status
+#define AT91C_RSTC_BODSTS     ((unsigned int) 0x1 <<  1) // (RSTC) Brownout Detection Status
+#define AT91C_RSTC_RSTTYP     ((unsigned int) 0x7 <<  8) // (RSTC) Reset Type
+#define 	AT91C_RSTC_RSTTYP_POWERUP              ((unsigned int) 0x0 <<  8) // (RSTC) Power-up Reset. VDDCORE rising.
+#define 	AT91C_RSTC_RSTTYP_WAKEUP               ((unsigned int) 0x1 <<  8) // (RSTC) WakeUp Reset. VDDCORE rising.
+#define 	AT91C_RSTC_RSTTYP_WATCHDOG             ((unsigned int) 0x2 <<  8) // (RSTC) Watchdog Reset. Watchdog overflow occured.
+#define 	AT91C_RSTC_RSTTYP_SOFTWARE             ((unsigned int) 0x3 <<  8) // (RSTC) Software Reset. Processor reset required by the software.
+#define 	AT91C_RSTC_RSTTYP_USER                 ((unsigned int) 0x4 <<  8) // (RSTC) User Reset. NRST pin detected low.
+#define 	AT91C_RSTC_RSTTYP_BROWNOUT             ((unsigned int) 0x5 <<  8) // (RSTC) Brownout Reset occured.
+#define AT91C_RSTC_NRSTL      ((unsigned int) 0x1 << 16) // (RSTC) NRST pin level
+#define AT91C_RSTC_SRCMP      ((unsigned int) 0x1 << 17) // (RSTC) Software Reset Command in Progress.
+// -------- RSTC_RMR : (RSTC Offset: 0x8) Reset Mode Register -------- 
+#define AT91C_RSTC_URSTEN     ((unsigned int) 0x1 <<  0) // (RSTC) User Reset Enable
+#define AT91C_RSTC_URSTIEN    ((unsigned int) 0x1 <<  4) // (RSTC) User Reset Interrupt Enable
+#define AT91C_RSTC_ERSTL      ((unsigned int) 0xF <<  8) // (RSTC) User Reset Length
+#define AT91C_RSTC_BODIEN     ((unsigned int) 0x1 << 16) // (RSTC) Brownout Detection Interrupt Enable
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Real Time Timer Controller Interface
+// *****************************************************************************
+typedef struct _AT91S_RTTC {
+	AT91_REG	 RTTC_RTMR; 	// Real-time Mode Register
+	AT91_REG	 RTTC_RTAR; 	// Real-time Alarm Register
+	AT91_REG	 RTTC_RTVR; 	// Real-time Value Register
+	AT91_REG	 RTTC_RTSR; 	// Real-time Status Register
+} AT91S_RTTC, *AT91PS_RTTC;
+
+// -------- RTTC_RTMR : (RTTC Offset: 0x0) Real-time Mode Register -------- 
+#define AT91C_RTTC_RTPRES     ((unsigned int) 0xFFFF <<  0) // (RTTC) Real-time Timer Prescaler Value
+#define AT91C_RTTC_ALMIEN     ((unsigned int) 0x1 << 16) // (RTTC) Alarm Interrupt Enable
+#define AT91C_RTTC_RTTINCIEN  ((unsigned int) 0x1 << 17) // (RTTC) Real Time Timer Increment Interrupt Enable
+#define AT91C_RTTC_RTTRST     ((unsigned int) 0x1 << 18) // (RTTC) Real Time Timer Restart
+// -------- RTTC_RTAR : (RTTC Offset: 0x4) Real-time Alarm Register -------- 
+#define AT91C_RTTC_ALMV       ((unsigned int) 0x0 <<  0) // (RTTC) Alarm Value
+// -------- RTTC_RTVR : (RTTC Offset: 0x8) Current Real-time Value Register -------- 
+#define AT91C_RTTC_CRTV       ((unsigned int) 0x0 <<  0) // (RTTC) Current Real-time Value
+// -------- RTTC_RTSR : (RTTC Offset: 0xc) Real-time Status Register -------- 
+#define AT91C_RTTC_ALMS       ((unsigned int) 0x1 <<  0) // (RTTC) Real-time Alarm Status
+#define AT91C_RTTC_RTTINC     ((unsigned int) 0x1 <<  1) // (RTTC) Real-time Timer Increment
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Periodic Interval Timer Controller Interface
+// *****************************************************************************
+typedef struct _AT91S_PITC {
+	AT91_REG	 PITC_PIMR; 	// Period Interval Mode Register
+	AT91_REG	 PITC_PISR; 	// Period Interval Status Register
+	AT91_REG	 PITC_PIVR; 	// Period Interval Value Register
+	AT91_REG	 PITC_PIIR; 	// Period Interval Image Register
+} AT91S_PITC, *AT91PS_PITC;
+
+// -------- PITC_PIMR : (PITC Offset: 0x0) Periodic Interval Mode Register -------- 
+#define AT91C_PITC_PIV        ((unsigned int) 0xFFFFF <<  0) // (PITC) Periodic Interval Value
+#define AT91C_PITC_PITEN      ((unsigned int) 0x1 << 24) // (PITC) Periodic Interval Timer Enabled
+#define AT91C_PITC_PITIEN     ((unsigned int) 0x1 << 25) // (PITC) Periodic Interval Timer Interrupt Enable
+// -------- PITC_PISR : (PITC Offset: 0x4) Periodic Interval Status Register -------- 
+#define AT91C_PITC_PITS       ((unsigned int) 0x1 <<  0) // (PITC) Periodic Interval Timer Status
+// -------- PITC_PIVR : (PITC Offset: 0x8) Periodic Interval Value Register -------- 
+#define AT91C_PITC_CPIV       ((unsigned int) 0xFFFFF <<  0) // (PITC) Current Periodic Interval Value
+#define AT91C_PITC_PICNT      ((unsigned int) 0xFFF << 20) // (PITC) Periodic Interval Counter
+// -------- PITC_PIIR : (PITC Offset: 0xc) Periodic Interval Image Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Watchdog Timer Controller Interface
+// *****************************************************************************
+typedef struct _AT91S_WDTC {
+	AT91_REG	 WDTC_WDCR; 	// Watchdog Control Register
+	AT91_REG	 WDTC_WDMR; 	// Watchdog Mode Register
+	AT91_REG	 WDTC_WDSR; 	// Watchdog Status Register
+} AT91S_WDTC, *AT91PS_WDTC;
+
+// -------- WDTC_WDCR : (WDTC Offset: 0x0) Periodic Interval Image Register -------- 
+#define AT91C_WDTC_WDRSTT     ((unsigned int) 0x1 <<  0) // (WDTC) Watchdog Restart
+#define AT91C_WDTC_KEY        ((unsigned int) 0xFF << 24) // (WDTC) Watchdog KEY Password
+// -------- WDTC_WDMR : (WDTC Offset: 0x4) Watchdog Mode Register -------- 
+#define AT91C_WDTC_WDV        ((unsigned int) 0xFFF <<  0) // (WDTC) Watchdog Timer Restart
+#define AT91C_WDTC_WDFIEN     ((unsigned int) 0x1 << 12) // (WDTC) Watchdog Fault Interrupt Enable
+#define AT91C_WDTC_WDRSTEN    ((unsigned int) 0x1 << 13) // (WDTC) Watchdog Reset Enable
+#define AT91C_WDTC_WDRPROC    ((unsigned int) 0x1 << 14) // (WDTC) Watchdog Timer Restart
+#define AT91C_WDTC_WDDIS      ((unsigned int) 0x1 << 15) // (WDTC) Watchdog Disable
+#define AT91C_WDTC_WDD        ((unsigned int) 0xFFF << 16) // (WDTC) Watchdog Delta Value
+#define AT91C_WDTC_WDDBGHLT   ((unsigned int) 0x1 << 28) // (WDTC) Watchdog Debug Halt
+#define AT91C_WDTC_WDIDLEHLT  ((unsigned int) 0x1 << 29) // (WDTC) Watchdog Idle Halt
+// -------- WDTC_WDSR : (WDTC Offset: 0x8) Watchdog Status Register -------- 
+#define AT91C_WDTC_WDUNF      ((unsigned int) 0x1 <<  0) // (WDTC) Watchdog Underflow
+#define AT91C_WDTC_WDERR      ((unsigned int) 0x1 <<  1) // (WDTC) Watchdog Error
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Voltage Regulator Mode Controller Interface
+// *****************************************************************************
+typedef struct _AT91S_VREG {
+	AT91_REG	 VREG_MR; 	// Voltage Regulator Mode Register
+} AT91S_VREG, *AT91PS_VREG;
+
+// -------- VREG_MR : (VREG Offset: 0x0) Voltage Regulator Mode Register -------- 
+#define AT91C_VREG_PSTDBY     ((unsigned int) 0x1 <<  0) // (VREG) Voltage Regulator Power Standby Mode
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Memory Controller Interface
+// *****************************************************************************
+typedef struct _AT91S_MC {
+	AT91_REG	 MC_RCR; 	// MC Remap Control Register
+	AT91_REG	 MC_ASR; 	// MC Abort Status Register
+	AT91_REG	 MC_AASR; 	// MC Abort Address Status Register
+	AT91_REG	 Reserved0[21]; 	// 
+	AT91_REG	 MC_FMR; 	// MC Flash Mode Register
+	AT91_REG	 MC_FCR; 	// MC Flash Command Register
+	AT91_REG	 MC_FSR; 	// MC Flash Status Register
+} AT91S_MC, *AT91PS_MC;
+
+// -------- MC_RCR : (MC Offset: 0x0) MC Remap Control Register -------- 
+#define AT91C_MC_RCB          ((unsigned int) 0x1 <<  0) // (MC) Remap Command Bit
+// -------- MC_ASR : (MC Offset: 0x4) MC Abort Status Register -------- 
+#define AT91C_MC_UNDADD       ((unsigned int) 0x1 <<  0) // (MC) Undefined Addess Abort Status
+#define AT91C_MC_MISADD       ((unsigned int) 0x1 <<  1) // (MC) Misaligned Addess Abort Status
+#define AT91C_MC_ABTSZ        ((unsigned int) 0x3 <<  8) // (MC) Abort Size Status
+#define 	AT91C_MC_ABTSZ_BYTE                 ((unsigned int) 0x0 <<  8) // (MC) Byte
+#define 	AT91C_MC_ABTSZ_HWORD                ((unsigned int) 0x1 <<  8) // (MC) Half-word
+#define 	AT91C_MC_ABTSZ_WORD                 ((unsigned int) 0x2 <<  8) // (MC) Word
+#define AT91C_MC_ABTTYP       ((unsigned int) 0x3 << 10) // (MC) Abort Type Status
+#define 	AT91C_MC_ABTTYP_DATAR                ((unsigned int) 0x0 << 10) // (MC) Data Read
+#define 	AT91C_MC_ABTTYP_DATAW                ((unsigned int) 0x1 << 10) // (MC) Data Write
+#define 	AT91C_MC_ABTTYP_FETCH                ((unsigned int) 0x2 << 10) // (MC) Code Fetch
+#define AT91C_MC_MST0         ((unsigned int) 0x1 << 16) // (MC) Master 0 Abort Source
+#define AT91C_MC_MST1         ((unsigned int) 0x1 << 17) // (MC) Master 1 Abort Source
+#define AT91C_MC_SVMST0       ((unsigned int) 0x1 << 24) // (MC) Saved Master 0 Abort Source
+#define AT91C_MC_SVMST1       ((unsigned int) 0x1 << 25) // (MC) Saved Master 1 Abort Source
+// -------- MC_FMR : (MC Offset: 0x60) MC Flash Mode Register -------- 
+#define AT91C_MC_FRDY         ((unsigned int) 0x1 <<  0) // (MC) Flash Ready
+#define AT91C_MC_LOCKE        ((unsigned int) 0x1 <<  2) // (MC) Lock Error
+#define AT91C_MC_PROGE        ((unsigned int) 0x1 <<  3) // (MC) Programming Error
+#define AT91C_MC_NEBP         ((unsigned int) 0x1 <<  7) // (MC) No Erase Before Programming
+#define AT91C_MC_FWS          ((unsigned int) 0x3 <<  8) // (MC) Flash Wait State
+#define 	AT91C_MC_FWS_0FWS                 ((unsigned int) 0x0 <<  8) // (MC) 1 cycle for Read, 2 for Write operations
+#define 	AT91C_MC_FWS_1FWS                 ((unsigned int) 0x1 <<  8) // (MC) 2 cycles for Read, 3 for Write operations
+#define 	AT91C_MC_FWS_2FWS                 ((unsigned int) 0x2 <<  8) // (MC) 3 cycles for Read, 4 for Write operations
+#define 	AT91C_MC_FWS_3FWS                 ((unsigned int) 0x3 <<  8) // (MC) 4 cycles for Read, 4 for Write operations
+#define AT91C_MC_FMCN         ((unsigned int) 0xFF << 16) // (MC) Flash Microsecond Cycle Number
+// -------- MC_FCR : (MC Offset: 0x64) MC Flash Command Register -------- 
+#define AT91C_MC_FCMD         ((unsigned int) 0xF <<  0) // (MC) Flash Command
+#define 	AT91C_MC_FCMD_START_PROG           ((unsigned int) 0x1) // (MC) Starts the programming of th epage specified by PAGEN.
+#define 	AT91C_MC_FCMD_LOCK                 ((unsigned int) 0x2) // (MC) Starts a lock sequence of the sector defined by the bits 4 to 7 of the field PAGEN.
+#define 	AT91C_MC_FCMD_PROG_AND_LOCK        ((unsigned int) 0x3) // (MC) The lock sequence automatically happens after the programming sequence is completed.
+#define 	AT91C_MC_FCMD_UNLOCK               ((unsigned int) 0x4) // (MC) Starts an unlock sequence of the sector defined by the bits 4 to 7 of the field PAGEN.
+#define 	AT91C_MC_FCMD_ERASE_ALL            ((unsigned int) 0x8) // (MC) Starts the erase of the entire flash.If at least a page is locked, the command is cancelled.
+#define 	AT91C_MC_FCMD_SET_GP_NVM           ((unsigned int) 0xB) // (MC) Set General Purpose NVM bits.
+#define 	AT91C_MC_FCMD_CLR_GP_NVM           ((unsigned int) 0xD) // (MC) Clear General Purpose NVM bits.
+#define 	AT91C_MC_FCMD_SET_SECURITY         ((unsigned int) 0xF) // (MC) Set Security Bit.
+#define AT91C_MC_PAGEN        ((unsigned int) 0x3FF <<  8) // (MC) Page Number
+#define AT91C_MC_KEY          ((unsigned int) 0xFF << 24) // (MC) Writing Protect Key
+// -------- MC_FSR : (MC Offset: 0x68) MC Flash Command Register -------- 
+#define AT91C_MC_SECURITY     ((unsigned int) 0x1 <<  4) // (MC) Security Bit Status
+#define AT91C_MC_GPNVM0       ((unsigned int) 0x1 <<  8) // (MC) Sector 0 Lock Status
+#define AT91C_MC_GPNVM1       ((unsigned int) 0x1 <<  9) // (MC) Sector 1 Lock Status
+#define AT91C_MC_GPNVM2       ((unsigned int) 0x1 << 10) // (MC) Sector 2 Lock Status
+#define AT91C_MC_GPNVM3       ((unsigned int) 0x1 << 11) // (MC) Sector 3 Lock Status
+#define AT91C_MC_GPNVM4       ((unsigned int) 0x1 << 12) // (MC) Sector 4 Lock Status
+#define AT91C_MC_GPNVM5       ((unsigned int) 0x1 << 13) // (MC) Sector 5 Lock Status
+#define AT91C_MC_GPNVM6       ((unsigned int) 0x1 << 14) // (MC) Sector 6 Lock Status
+#define AT91C_MC_GPNVM7       ((unsigned int) 0x1 << 15) // (MC) Sector 7 Lock Status
+#define AT91C_MC_LOCKS0       ((unsigned int) 0x1 << 16) // (MC) Sector 0 Lock Status
+#define AT91C_MC_LOCKS1       ((unsigned int) 0x1 << 17) // (MC) Sector 1 Lock Status
+#define AT91C_MC_LOCKS2       ((unsigned int) 0x1 << 18) // (MC) Sector 2 Lock Status
+#define AT91C_MC_LOCKS3       ((unsigned int) 0x1 << 19) // (MC) Sector 3 Lock Status
+#define AT91C_MC_LOCKS4       ((unsigned int) 0x1 << 20) // (MC) Sector 4 Lock Status
+#define AT91C_MC_LOCKS5       ((unsigned int) 0x1 << 21) // (MC) Sector 5 Lock Status
+#define AT91C_MC_LOCKS6       ((unsigned int) 0x1 << 22) // (MC) Sector 6 Lock Status
+#define AT91C_MC_LOCKS7       ((unsigned int) 0x1 << 23) // (MC) Sector 7 Lock Status
+#define AT91C_MC_LOCKS8       ((unsigned int) 0x1 << 24) // (MC) Sector 8 Lock Status
+#define AT91C_MC_LOCKS9       ((unsigned int) 0x1 << 25) // (MC) Sector 9 Lock Status
+#define AT91C_MC_LOCKS10      ((unsigned int) 0x1 << 26) // (MC) Sector 10 Lock Status
+#define AT91C_MC_LOCKS11      ((unsigned int) 0x1 << 27) // (MC) Sector 11 Lock Status
+#define AT91C_MC_LOCKS12      ((unsigned int) 0x1 << 28) // (MC) Sector 12 Lock Status
+#define AT91C_MC_LOCKS13      ((unsigned int) 0x1 << 29) // (MC) Sector 13 Lock Status
+#define AT91C_MC_LOCKS14      ((unsigned int) 0x1 << 30) // (MC) Sector 14 Lock Status
+#define AT91C_MC_LOCKS15      ((unsigned int) 0x1 << 31) // (MC) Sector 15 Lock Status
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Serial Parallel Interface
+// *****************************************************************************
+typedef struct _AT91S_SPI {
+	AT91_REG	 SPI_CR; 	// Control Register
+	AT91_REG	 SPI_MR; 	// Mode Register
+	AT91_REG	 SPI_RDR; 	// Receive Data Register
+	AT91_REG	 SPI_TDR; 	// Transmit Data Register
+	AT91_REG	 SPI_SR; 	// Status Register
+	AT91_REG	 SPI_IER; 	// Interrupt Enable Register
+	AT91_REG	 SPI_IDR; 	// Interrupt Disable Register
+	AT91_REG	 SPI_IMR; 	// Interrupt Mask Register
+	AT91_REG	 Reserved0[4]; 	// 
+	AT91_REG	 SPI_CSR[4]; 	// Chip Select Register
+	AT91_REG	 Reserved1[48]; 	// 
+	AT91_REG	 SPI_RPR; 	// Receive Pointer Register
+	AT91_REG	 SPI_RCR; 	// Receive Counter Register
+	AT91_REG	 SPI_TPR; 	// Transmit Pointer Register
+	AT91_REG	 SPI_TCR; 	// Transmit Counter Register
+	AT91_REG	 SPI_RNPR; 	// Receive Next Pointer Register
+	AT91_REG	 SPI_RNCR; 	// Receive Next Counter Register
+	AT91_REG	 SPI_TNPR; 	// Transmit Next Pointer Register
+	AT91_REG	 SPI_TNCR; 	// Transmit Next Counter Register
+	AT91_REG	 SPI_PTCR; 	// PDC Transfer Control Register
+	AT91_REG	 SPI_PTSR; 	// PDC Transfer Status Register
+} AT91S_SPI, *AT91PS_SPI;
+
+// -------- SPI_CR : (SPI Offset: 0x0) SPI Control Register -------- 
+#define AT91C_SPI_SPIEN       ((unsigned int) 0x1 <<  0) // (SPI) SPI Enable
+#define AT91C_SPI_SPIDIS      ((unsigned int) 0x1 <<  1) // (SPI) SPI Disable
+#define AT91C_SPI_SWRST       ((unsigned int) 0x1 <<  7) // (SPI) SPI Software reset
+#define AT91C_SPI_LASTXFER    ((unsigned int) 0x1 << 24) // (SPI) SPI Last Transfer
+// -------- SPI_MR : (SPI Offset: 0x4) SPI Mode Register -------- 
+#define AT91C_SPI_MSTR        ((unsigned int) 0x1 <<  0) // (SPI) Master/Slave Mode
+#define AT91C_SPI_PS          ((unsigned int) 0x1 <<  1) // (SPI) Peripheral Select
+#define 	AT91C_SPI_PS_FIXED                ((unsigned int) 0x0 <<  1) // (SPI) Fixed Peripheral Select
+#define 	AT91C_SPI_PS_VARIABLE             ((unsigned int) 0x1 <<  1) // (SPI) Variable Peripheral Select
+#define AT91C_SPI_PCSDEC      ((unsigned int) 0x1 <<  2) // (SPI) Chip Select Decode
+#define AT91C_SPI_FDIV        ((unsigned int) 0x1 <<  3) // (SPI) Clock Selection
+#define AT91C_SPI_MODFDIS     ((unsigned int) 0x1 <<  4) // (SPI) Mode Fault Detection
+#define AT91C_SPI_LLB         ((unsigned int) 0x1 <<  7) // (SPI) Clock Selection
+#define AT91C_SPI_PCS         ((unsigned int) 0xF << 16) // (SPI) Peripheral Chip Select
+#define AT91C_SPI_DLYBCS      ((unsigned int) 0xFF << 24) // (SPI) Delay Between Chip Selects
+// -------- SPI_RDR : (SPI Offset: 0x8) Receive Data Register -------- 
+#define AT91C_SPI_RD          ((unsigned int) 0xFFFF <<  0) // (SPI) Receive Data
+#define AT91C_SPI_RPCS        ((unsigned int) 0xF << 16) // (SPI) Peripheral Chip Select Status
+// -------- SPI_TDR : (SPI Offset: 0xc) Transmit Data Register -------- 
+#define AT91C_SPI_TD          ((unsigned int) 0xFFFF <<  0) // (SPI) Transmit Data
+#define AT91C_SPI_TPCS        ((unsigned int) 0xF << 16) // (SPI) Peripheral Chip Select Status
+// -------- SPI_SR : (SPI Offset: 0x10) Status Register -------- 
+#define AT91C_SPI_RDRF        ((unsigned int) 0x1 <<  0) // (SPI) Receive Data Register Full
+#define AT91C_SPI_TDRE        ((unsigned int) 0x1 <<  1) // (SPI) Transmit Data Register Empty
+#define AT91C_SPI_MODF        ((unsigned int) 0x1 <<  2) // (SPI) Mode Fault Error
+#define AT91C_SPI_OVRES       ((unsigned int) 0x1 <<  3) // (SPI) Overrun Error Status
+#define AT91C_SPI_ENDRX       ((unsigned int) 0x1 <<  4) // (SPI) End of Receiver Transfer
+#define AT91C_SPI_ENDTX       ((unsigned int) 0x1 <<  5) // (SPI) End of Receiver Transfer
+#define AT91C_SPI_RXBUFF      ((unsigned int) 0x1 <<  6) // (SPI) RXBUFF Interrupt
+#define AT91C_SPI_TXBUFE      ((unsigned int) 0x1 <<  7) // (SPI) TXBUFE Interrupt
+#define AT91C_SPI_NSSR        ((unsigned int) 0x1 <<  8) // (SPI) NSSR Interrupt
+#define AT91C_SPI_TXEMPTY     ((unsigned int) 0x1 <<  9) // (SPI) TXEMPTY Interrupt
+#define AT91C_SPI_SPIENS      ((unsigned int) 0x1 << 16) // (SPI) Enable Status
+// -------- SPI_IER : (SPI Offset: 0x14) Interrupt Enable Register -------- 
+// -------- SPI_IDR : (SPI Offset: 0x18) Interrupt Disable Register -------- 
+// -------- SPI_IMR : (SPI Offset: 0x1c) Interrupt Mask Register -------- 
+// -------- SPI_CSR : (SPI Offset: 0x30) Chip Select Register -------- 
+#define AT91C_SPI_CPOL        ((unsigned int) 0x1 <<  0) // (SPI) Clock Polarity
+#define AT91C_SPI_NCPHA       ((unsigned int) 0x1 <<  1) // (SPI) Clock Phase
+#define AT91C_SPI_CSAAT       ((unsigned int) 0x1 <<  3) // (SPI) Chip Select Active After Transfer
+#define AT91C_SPI_BITS        ((unsigned int) 0xF <<  4) // (SPI) Bits Per Transfer
+#define 	AT91C_SPI_BITS_8                    ((unsigned int) 0x0 <<  4) // (SPI) 8 Bits Per transfer
+#define 	AT91C_SPI_BITS_9                    ((unsigned int) 0x1 <<  4) // (SPI) 9 Bits Per transfer
+#define 	AT91C_SPI_BITS_10                   ((unsigned int) 0x2 <<  4) // (SPI) 10 Bits Per transfer
+#define 	AT91C_SPI_BITS_11                   ((unsigned int) 0x3 <<  4) // (SPI) 11 Bits Per transfer
+#define 	AT91C_SPI_BITS_12                   ((unsigned int) 0x4 <<  4) // (SPI) 12 Bits Per transfer
+#define 	AT91C_SPI_BITS_13                   ((unsigned int) 0x5 <<  4) // (SPI) 13 Bits Per transfer
+#define 	AT91C_SPI_BITS_14                   ((unsigned int) 0x6 <<  4) // (SPI) 14 Bits Per transfer
+#define 	AT91C_SPI_BITS_15                   ((unsigned int) 0x7 <<  4) // (SPI) 15 Bits Per transfer
+#define 	AT91C_SPI_BITS_16                   ((unsigned int) 0x8 <<  4) // (SPI) 16 Bits Per transfer
+#define AT91C_SPI_SCBR        ((unsigned int) 0xFF <<  8) // (SPI) Serial Clock Baud Rate
+#define AT91C_SPI_DLYBS       ((unsigned int) 0xFF << 16) // (SPI) Delay Before SPCK
+#define AT91C_SPI_DLYBCT      ((unsigned int) 0xFF << 24) // (SPI) Delay Between Consecutive Transfers
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Usart
+// *****************************************************************************
+typedef struct _AT91S_USART {
+	AT91_REG	 US_CR; 	// Control Register
+	AT91_REG	 US_MR; 	// Mode Register
+	AT91_REG	 US_IER; 	// Interrupt Enable Register
+	AT91_REG	 US_IDR; 	// Interrupt Disable Register
+	AT91_REG	 US_IMR; 	// Interrupt Mask Register
+	AT91_REG	 US_CSR; 	// Channel Status Register
+	AT91_REG	 US_RHR; 	// Receiver Holding Register
+	AT91_REG	 US_THR; 	// Transmitter Holding Register
+	AT91_REG	 US_BRGR; 	// Baud Rate Generator Register
+	AT91_REG	 US_RTOR; 	// Receiver Time-out Register
+	AT91_REG	 US_TTGR; 	// Transmitter Time-guard Register
+	AT91_REG	 Reserved0[5]; 	// 
+	AT91_REG	 US_FIDI; 	// FI_DI_Ratio Register
+	AT91_REG	 US_NER; 	// Nb Errors Register
+	AT91_REG	 Reserved1[1]; 	// 
+	AT91_REG	 US_IF; 	// IRDA_FILTER Register
+	AT91_REG	 Reserved2[44]; 	// 
+	AT91_REG	 US_RPR; 	// Receive Pointer Register
+	AT91_REG	 US_RCR; 	// Receive Counter Register
+	AT91_REG	 US_TPR; 	// Transmit Pointer Register
+	AT91_REG	 US_TCR; 	// Transmit Counter Register
+	AT91_REG	 US_RNPR; 	// Receive Next Pointer Register
+	AT91_REG	 US_RNCR; 	// Receive Next Counter Register
+	AT91_REG	 US_TNPR; 	// Transmit Next Pointer Register
+	AT91_REG	 US_TNCR; 	// Transmit Next Counter Register
+	AT91_REG	 US_PTCR; 	// PDC Transfer Control Register
+	AT91_REG	 US_PTSR; 	// PDC Transfer Status Register
+} AT91S_USART, *AT91PS_USART;
+
+// -------- US_CR : (USART Offset: 0x0) Debug Unit Control Register -------- 
+#define AT91C_US_STTBRK       ((unsigned int) 0x1 <<  9) // (USART) Start Break
+#define AT91C_US_STPBRK       ((unsigned int) 0x1 << 10) // (USART) Stop Break
+#define AT91C_US_STTTO        ((unsigned int) 0x1 << 11) // (USART) Start Time-out
+#define AT91C_US_SENDA        ((unsigned int) 0x1 << 12) // (USART) Send Address
+#define AT91C_US_RSTIT        ((unsigned int) 0x1 << 13) // (USART) Reset Iterations
+#define AT91C_US_RSTNACK      ((unsigned int) 0x1 << 14) // (USART) Reset Non Acknowledge
+#define AT91C_US_RETTO        ((unsigned int) 0x1 << 15) // (USART) Rearm Time-out
+#define AT91C_US_DTREN        ((unsigned int) 0x1 << 16) // (USART) Data Terminal ready Enable
+#define AT91C_US_DTRDIS       ((unsigned int) 0x1 << 17) // (USART) Data Terminal ready Disable
+#define AT91C_US_RTSEN        ((unsigned int) 0x1 << 18) // (USART) Request to Send enable
+#define AT91C_US_RTSDIS       ((unsigned int) 0x1 << 19) // (USART) Request to Send Disable
+// -------- US_MR : (USART Offset: 0x4) Debug Unit Mode Register -------- 
+#define AT91C_US_USMODE       ((unsigned int) 0xF <<  0) // (USART) Usart mode
+#define 	AT91C_US_USMODE_NORMAL               ((unsigned int) 0x0) // (USART) Normal
+#define 	AT91C_US_USMODE_RS485                ((unsigned int) 0x1) // (USART) RS485
+#define 	AT91C_US_USMODE_HWHSH                ((unsigned int) 0x2) // (USART) Hardware Handshaking
+#define 	AT91C_US_USMODE_MODEM                ((unsigned int) 0x3) // (USART) Modem
+#define 	AT91C_US_USMODE_ISO7816_0            ((unsigned int) 0x4) // (USART) ISO7816 protocol: T = 0
+#define 	AT91C_US_USMODE_ISO7816_1            ((unsigned int) 0x6) // (USART) ISO7816 protocol: T = 1
+#define 	AT91C_US_USMODE_IRDA                 ((unsigned int) 0x8) // (USART) IrDA
+#define 	AT91C_US_USMODE_SWHSH                ((unsigned int) 0xC) // (USART) Software Handshaking
+#define AT91C_US_CLKS         ((unsigned int) 0x3 <<  4) // (USART) Clock Selection (Baud Rate generator Input Clock
+#define 	AT91C_US_CLKS_CLOCK                ((unsigned int) 0x0 <<  4) // (USART) Clock
+#define 	AT91C_US_CLKS_FDIV1                ((unsigned int) 0x1 <<  4) // (USART) fdiv1
+#define 	AT91C_US_CLKS_SLOW                 ((unsigned int) 0x2 <<  4) // (USART) slow_clock (ARM)
+#define 	AT91C_US_CLKS_EXT                  ((unsigned int) 0x3 <<  4) // (USART) External (SCK)
+#define AT91C_US_CHRL         ((unsigned int) 0x3 <<  6) // (USART) Clock Selection (Baud Rate generator Input Clock
+#define 	AT91C_US_CHRL_5_BITS               ((unsigned int) 0x0 <<  6) // (USART) Character Length: 5 bits
+#define 	AT91C_US_CHRL_6_BITS               ((unsigned int) 0x1 <<  6) // (USART) Character Length: 6 bits
+#define 	AT91C_US_CHRL_7_BITS               ((unsigned int) 0x2 <<  6) // (USART) Character Length: 7 bits
+#define 	AT91C_US_CHRL_8_BITS               ((unsigned int) 0x3 <<  6) // (USART) Character Length: 8 bits
+#define AT91C_US_SYNC         ((unsigned int) 0x1 <<  8) // (USART) Synchronous Mode Select
+#define AT91C_US_NBSTOP       ((unsigned int) 0x3 << 12) // (USART) Number of Stop bits
+#define 	AT91C_US_NBSTOP_1_BIT                ((unsigned int) 0x0 << 12) // (USART) 1 stop bit
+#define 	AT91C_US_NBSTOP_15_BIT               ((unsigned int) 0x1 << 12) // (USART) Asynchronous (SYNC=0) 2 stop bits Synchronous (SYNC=1) 2 stop bits
+#define 	AT91C_US_NBSTOP_2_BIT                ((unsigned int) 0x2 << 12) // (USART) 2 stop bits
+#define AT91C_US_MSBF         ((unsigned int) 0x1 << 16) // (USART) Bit Order
+#define AT91C_US_MODE9        ((unsigned int) 0x1 << 17) // (USART) 9-bit Character length
+#define AT91C_US_CKLO         ((unsigned int) 0x1 << 18) // (USART) Clock Output Select
+#define AT91C_US_OVER         ((unsigned int) 0x1 << 19) // (USART) Over Sampling Mode
+#define AT91C_US_INACK        ((unsigned int) 0x1 << 20) // (USART) Inhibit Non Acknowledge
+#define AT91C_US_DSNACK       ((unsigned int) 0x1 << 21) // (USART) Disable Successive NACK
+#define AT91C_US_MAX_ITER     ((unsigned int) 0x1 << 24) // (USART) Number of Repetitions
+#define AT91C_US_FILTER       ((unsigned int) 0x1 << 28) // (USART) Receive Line Filter
+// -------- US_IER : (USART Offset: 0x8) Debug Unit Interrupt Enable Register -------- 
+#define AT91C_US_RXBRK        ((unsigned int) 0x1 <<  2) // (USART) Break Received/End of Break
+#define AT91C_US_TIMEOUT      ((unsigned int) 0x1 <<  8) // (USART) Receiver Time-out
+#define AT91C_US_ITERATION    ((unsigned int) 0x1 << 10) // (USART) Max number of Repetitions Reached
+#define AT91C_US_NACK         ((unsigned int) 0x1 << 13) // (USART) Non Acknowledge
+#define AT91C_US_RIIC         ((unsigned int) 0x1 << 16) // (USART) Ring INdicator Input Change Flag
+#define AT91C_US_DSRIC        ((unsigned int) 0x1 << 17) // (USART) Data Set Ready Input Change Flag
+#define AT91C_US_DCDIC        ((unsigned int) 0x1 << 18) // (USART) Data Carrier Flag
+#define AT91C_US_CTSIC        ((unsigned int) 0x1 << 19) // (USART) Clear To Send Input Change Flag
+// -------- US_IDR : (USART Offset: 0xc) Debug Unit Interrupt Disable Register -------- 
+// -------- US_IMR : (USART Offset: 0x10) Debug Unit Interrupt Mask Register -------- 
+// -------- US_CSR : (USART Offset: 0x14) Debug Unit Channel Status Register -------- 
+#define AT91C_US_RI           ((unsigned int) 0x1 << 20) // (USART) Image of RI Input
+#define AT91C_US_DSR          ((unsigned int) 0x1 << 21) // (USART) Image of DSR Input
+#define AT91C_US_DCD          ((unsigned int) 0x1 << 22) // (USART) Image of DCD Input
+#define AT91C_US_CTS          ((unsigned int) 0x1 << 23) // (USART) Image of CTS Input
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Synchronous Serial Controller Interface
+// *****************************************************************************
+typedef struct _AT91S_SSC {
+	AT91_REG	 SSC_CR; 	// Control Register
+	AT91_REG	 SSC_CMR; 	// Clock Mode Register
+	AT91_REG	 Reserved0[2]; 	// 
+	AT91_REG	 SSC_RCMR; 	// Receive Clock ModeRegister
+	AT91_REG	 SSC_RFMR; 	// Receive Frame Mode Register
+	AT91_REG	 SSC_TCMR; 	// Transmit Clock Mode Register
+	AT91_REG	 SSC_TFMR; 	// Transmit Frame Mode Register
+	AT91_REG	 SSC_RHR; 	// Receive Holding Register
+	AT91_REG	 SSC_THR; 	// Transmit Holding Register
+	AT91_REG	 Reserved1[2]; 	// 
+	AT91_REG	 SSC_RSHR; 	// Receive Sync Holding Register
+	AT91_REG	 SSC_TSHR; 	// Transmit Sync Holding Register
+	AT91_REG	 Reserved2[2]; 	// 
+	AT91_REG	 SSC_SR; 	// Status Register
+	AT91_REG	 SSC_IER; 	// Interrupt Enable Register
+	AT91_REG	 SSC_IDR; 	// Interrupt Disable Register
+	AT91_REG	 SSC_IMR; 	// Interrupt Mask Register
+	AT91_REG	 Reserved3[44]; 	// 
+	AT91_REG	 SSC_RPR; 	// Receive Pointer Register
+	AT91_REG	 SSC_RCR; 	// Receive Counter Register
+	AT91_REG	 SSC_TPR; 	// Transmit Pointer Register
+	AT91_REG	 SSC_TCR; 	// Transmit Counter Register
+	AT91_REG	 SSC_RNPR; 	// Receive Next Pointer Register
+	AT91_REG	 SSC_RNCR; 	// Receive Next Counter Register
+	AT91_REG	 SSC_TNPR; 	// Transmit Next Pointer Register
+	AT91_REG	 SSC_TNCR; 	// Transmit Next Counter Register
+	AT91_REG	 SSC_PTCR; 	// PDC Transfer Control Register
+	AT91_REG	 SSC_PTSR; 	// PDC Transfer Status Register
+} AT91S_SSC, *AT91PS_SSC;
+
+// -------- SSC_CR : (SSC Offset: 0x0) SSC Control Register -------- 
+#define AT91C_SSC_RXEN        ((unsigned int) 0x1 <<  0) // (SSC) Receive Enable
+#define AT91C_SSC_RXDIS       ((unsigned int) 0x1 <<  1) // (SSC) Receive Disable
+#define AT91C_SSC_TXEN        ((unsigned int) 0x1 <<  8) // (SSC) Transmit Enable
+#define AT91C_SSC_TXDIS       ((unsigned int) 0x1 <<  9) // (SSC) Transmit Disable
+#define AT91C_SSC_SWRST       ((unsigned int) 0x1 << 15) // (SSC) Software Reset
+// -------- SSC_RCMR : (SSC Offset: 0x10) SSC Receive Clock Mode Register -------- 
+#define AT91C_SSC_CKS         ((unsigned int) 0x3 <<  0) // (SSC) Receive/Transmit Clock Selection
+#define 	AT91C_SSC_CKS_DIV                  ((unsigned int) 0x0) // (SSC) Divided Clock
+#define 	AT91C_SSC_CKS_TK                   ((unsigned int) 0x1) // (SSC) TK Clock signal
+#define 	AT91C_SSC_CKS_RK                   ((unsigned int) 0x2) // (SSC) RK pin
+#define AT91C_SSC_CKO         ((unsigned int) 0x7 <<  2) // (SSC) Receive/Transmit Clock Output Mode Selection
+#define 	AT91C_SSC_CKO_NONE                 ((unsigned int) 0x0 <<  2) // (SSC) Receive/Transmit Clock Output Mode: None RK pin: Input-only
+#define 	AT91C_SSC_CKO_CONTINOUS            ((unsigned int) 0x1 <<  2) // (SSC) Continuous Receive/Transmit Clock RK pin: Output
+#define 	AT91C_SSC_CKO_DATA_TX              ((unsigned int) 0x2 <<  2) // (SSC) Receive/Transmit Clock only during data transfers RK pin: Output
+#define AT91C_SSC_CKI         ((unsigned int) 0x1 <<  5) // (SSC) Receive/Transmit Clock Inversion
+#define AT91C_SSC_CKG         ((unsigned int) 0x3 <<  6) // (SSC) Receive/Transmit Clock Gating Selection
+#define 	AT91C_SSC_CKG_NONE                 ((unsigned int) 0x0 <<  6) // (SSC) Receive/Transmit Clock Gating: None, continuous clock
+#define 	AT91C_SSC_CKG_LOW                  ((unsigned int) 0x1 <<  6) // (SSC) Receive/Transmit Clock enabled only if RF Low
+#define 	AT91C_SSC_CKG_HIGH                 ((unsigned int) 0x2 <<  6) // (SSC) Receive/Transmit Clock enabled only if RF High
+#define AT91C_SSC_START       ((unsigned int) 0xF <<  8) // (SSC) Receive/Transmit Start Selection
+#define 	AT91C_SSC_START_CONTINOUS            ((unsigned int) 0x0 <<  8) // (SSC) Continuous, as soon as the receiver is enabled, and immediately after the end of transfer of the previous data.
+#define 	AT91C_SSC_START_TX                   ((unsigned int) 0x1 <<  8) // (SSC) Transmit/Receive start
+#define 	AT91C_SSC_START_LOW_RF               ((unsigned int) 0x2 <<  8) // (SSC) Detection of a low level on RF input
+#define 	AT91C_SSC_START_HIGH_RF              ((unsigned int) 0x3 <<  8) // (SSC) Detection of a high level on RF input
+#define 	AT91C_SSC_START_FALL_RF              ((unsigned int) 0x4 <<  8) // (SSC) Detection of a falling edge on RF input
+#define 	AT91C_SSC_START_RISE_RF              ((unsigned int) 0x5 <<  8) // (SSC) Detection of a rising edge on RF input
+#define 	AT91C_SSC_START_LEVEL_RF             ((unsigned int) 0x6 <<  8) // (SSC) Detection of any level change on RF input
+#define 	AT91C_SSC_START_EDGE_RF              ((unsigned int) 0x7 <<  8) // (SSC) Detection of any edge on RF input
+#define 	AT91C_SSC_START_0                    ((unsigned int) 0x8 <<  8) // (SSC) Compare 0
+#define AT91C_SSC_STOP        ((unsigned int) 0x1 << 12) // (SSC) Receive Stop Selection
+#define AT91C_SSC_STTDLY      ((unsigned int) 0xFF << 16) // (SSC) Receive/Transmit Start Delay
+#define AT91C_SSC_PERIOD      ((unsigned int) 0xFF << 24) // (SSC) Receive/Transmit Period Divider Selection
+// -------- SSC_RFMR : (SSC Offset: 0x14) SSC Receive Frame Mode Register -------- 
+#define AT91C_SSC_DATLEN      ((unsigned int) 0x1F <<  0) // (SSC) Data Length
+#define AT91C_SSC_LOOP        ((unsigned int) 0x1 <<  5) // (SSC) Loop Mode
+#define AT91C_SSC_MSBF        ((unsigned int) 0x1 <<  7) // (SSC) Most Significant Bit First
+#define AT91C_SSC_DATNB       ((unsigned int) 0xF <<  8) // (SSC) Data Number per Frame
+#define AT91C_SSC_FSLEN       ((unsigned int) 0xF << 16) // (SSC) Receive/Transmit Frame Sync length
+#define AT91C_SSC_FSOS        ((unsigned int) 0x7 << 20) // (SSC) Receive/Transmit Frame Sync Output Selection
+#define 	AT91C_SSC_FSOS_NONE                 ((unsigned int) 0x0 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: None RK pin Input-only
+#define 	AT91C_SSC_FSOS_NEGATIVE             ((unsigned int) 0x1 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Negative Pulse
+#define 	AT91C_SSC_FSOS_POSITIVE             ((unsigned int) 0x2 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Positive Pulse
+#define 	AT91C_SSC_FSOS_LOW                  ((unsigned int) 0x3 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Driver Low during data transfer
+#define 	AT91C_SSC_FSOS_HIGH                 ((unsigned int) 0x4 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Driver High during data transfer
+#define 	AT91C_SSC_FSOS_TOGGLE               ((unsigned int) 0x5 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Toggling at each start of data transfer
+#define AT91C_SSC_FSEDGE      ((unsigned int) 0x1 << 24) // (SSC) Frame Sync Edge Detection
+// -------- SSC_TCMR : (SSC Offset: 0x18) SSC Transmit Clock Mode Register -------- 
+// -------- SSC_TFMR : (SSC Offset: 0x1c) SSC Transmit Frame Mode Register -------- 
+#define AT91C_SSC_DATDEF      ((unsigned int) 0x1 <<  5) // (SSC) Data Default Value
+#define AT91C_SSC_FSDEN       ((unsigned int) 0x1 << 23) // (SSC) Frame Sync Data Enable
+// -------- SSC_SR : (SSC Offset: 0x40) SSC Status Register -------- 
+#define AT91C_SSC_TXRDY       ((unsigned int) 0x1 <<  0) // (SSC) Transmit Ready
+#define AT91C_SSC_TXEMPTY     ((unsigned int) 0x1 <<  1) // (SSC) Transmit Empty
+#define AT91C_SSC_ENDTX       ((unsigned int) 0x1 <<  2) // (SSC) End Of Transmission
+#define AT91C_SSC_TXBUFE      ((unsigned int) 0x1 <<  3) // (SSC) Transmit Buffer Empty
+#define AT91C_SSC_RXRDY       ((unsigned int) 0x1 <<  4) // (SSC) Receive Ready
+#define AT91C_SSC_OVRUN       ((unsigned int) 0x1 <<  5) // (SSC) Receive Overrun
+#define AT91C_SSC_ENDRX       ((unsigned int) 0x1 <<  6) // (SSC) End of Reception
+#define AT91C_SSC_RXBUFF      ((unsigned int) 0x1 <<  7) // (SSC) Receive Buffer Full
+#define AT91C_SSC_CP0         ((unsigned int) 0x1 <<  8) // (SSC) Compare 0
+#define AT91C_SSC_CP1         ((unsigned int) 0x1 <<  9) // (SSC) Compare 1
+#define AT91C_SSC_TXSYN       ((unsigned int) 0x1 << 10) // (SSC) Transmit Sync
+#define AT91C_SSC_RXSYN       ((unsigned int) 0x1 << 11) // (SSC) Receive Sync
+#define AT91C_SSC_TXENA       ((unsigned int) 0x1 << 16) // (SSC) Transmit Enable
+#define AT91C_SSC_RXENA       ((unsigned int) 0x1 << 17) // (SSC) Receive Enable
+// -------- SSC_IER : (SSC Offset: 0x44) SSC Interrupt Enable Register -------- 
+// -------- SSC_IDR : (SSC Offset: 0x48) SSC Interrupt Disable Register -------- 
+// -------- SSC_IMR : (SSC Offset: 0x4c) SSC Interrupt Mask Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Two-wire Interface
+// *****************************************************************************
+typedef struct _AT91S_TWI {
+	AT91_REG	 TWI_CR; 	// Control Register
+	AT91_REG	 TWI_MMR; 	// Master Mode Register
+	AT91_REG	 Reserved0[1]; 	// 
+	AT91_REG	 TWI_IADR; 	// Internal Address Register
+	AT91_REG	 TWI_CWGR; 	// Clock Waveform Generator Register
+	AT91_REG	 Reserved1[3]; 	// 
+	AT91_REG	 TWI_SR; 	// Status Register
+	AT91_REG	 TWI_IER; 	// Interrupt Enable Register
+	AT91_REG	 TWI_IDR; 	// Interrupt Disable Register
+	AT91_REG	 TWI_IMR; 	// Interrupt Mask Register
+	AT91_REG	 TWI_RHR; 	// Receive Holding Register
+	AT91_REG	 TWI_THR; 	// Transmit Holding Register
+} AT91S_TWI, *AT91PS_TWI;
+
+// -------- TWI_CR : (TWI Offset: 0x0) TWI Control Register -------- 
+#define AT91C_TWI_START       ((unsigned int) 0x1 <<  0) // (TWI) Send a START Condition
+#define AT91C_TWI_STOP        ((unsigned int) 0x1 <<  1) // (TWI) Send a STOP Condition
+#define AT91C_TWI_MSEN        ((unsigned int) 0x1 <<  2) // (TWI) TWI Master Transfer Enabled
+#define AT91C_TWI_MSDIS       ((unsigned int) 0x1 <<  3) // (TWI) TWI Master Transfer Disabled
+#define AT91C_TWI_SWRST       ((unsigned int) 0x1 <<  7) // (TWI) Software Reset
+// -------- TWI_MMR : (TWI Offset: 0x4) TWI Master Mode Register -------- 
+#define AT91C_TWI_IADRSZ      ((unsigned int) 0x3 <<  8) // (TWI) Internal Device Address Size
+#define 	AT91C_TWI_IADRSZ_NO                   ((unsigned int) 0x0 <<  8) // (TWI) No internal device address
+#define 	AT91C_TWI_IADRSZ_1_BYTE               ((unsigned int) 0x1 <<  8) // (TWI) One-byte internal device address
+#define 	AT91C_TWI_IADRSZ_2_BYTE               ((unsigned int) 0x2 <<  8) // (TWI) Two-byte internal device address
+#define 	AT91C_TWI_IADRSZ_3_BYTE               ((unsigned int) 0x3 <<  8) // (TWI) Three-byte internal device address
+#define AT91C_TWI_MREAD       ((unsigned int) 0x1 << 12) // (TWI) Master Read Direction
+#define AT91C_TWI_DADR        ((unsigned int) 0x7F << 16) // (TWI) Device Address
+// -------- TWI_CWGR : (TWI Offset: 0x10) TWI Clock Waveform Generator Register -------- 
+#define AT91C_TWI_CLDIV       ((unsigned int) 0xFF <<  0) // (TWI) Clock Low Divider
+#define AT91C_TWI_CHDIV       ((unsigned int) 0xFF <<  8) // (TWI) Clock High Divider
+#define AT91C_TWI_CKDIV       ((unsigned int) 0x7 << 16) // (TWI) Clock Divider
+// -------- TWI_SR : (TWI Offset: 0x20) TWI Status Register -------- 
+#define AT91C_TWI_TXCOMP      ((unsigned int) 0x1 <<  0) // (TWI) Transmission Completed
+#define AT91C_TWI_RXRDY       ((unsigned int) 0x1 <<  1) // (TWI) Receive holding register ReaDY
+#define AT91C_TWI_TXRDY       ((unsigned int) 0x1 <<  2) // (TWI) Transmit holding register ReaDY
+#define AT91C_TWI_OVRE        ((unsigned int) 0x1 <<  6) // (TWI) Overrun Error
+#define AT91C_TWI_UNRE        ((unsigned int) 0x1 <<  7) // (TWI) Underrun Error
+#define AT91C_TWI_NACK        ((unsigned int) 0x1 <<  8) // (TWI) Not Acknowledged
+// -------- TWI_IER : (TWI Offset: 0x24) TWI Interrupt Enable Register -------- 
+// -------- TWI_IDR : (TWI Offset: 0x28) TWI Interrupt Disable Register -------- 
+// -------- TWI_IMR : (TWI Offset: 0x2c) TWI Interrupt Mask Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR PWMC Channel Interface
+// *****************************************************************************
+typedef struct _AT91S_PWMC_CH {
+	AT91_REG	 PWMC_CMR; 	// Channel Mode Register
+	AT91_REG	 PWMC_CDTYR; 	// Channel Duty Cycle Register
+	AT91_REG	 PWMC_CPRDR; 	// Channel Period Register
+	AT91_REG	 PWMC_CCNTR; 	// Channel Counter Register
+	AT91_REG	 PWMC_CUPDR; 	// Channel Update Register
+	AT91_REG	 PWMC_Reserved[3]; 	// Reserved
+} AT91S_PWMC_CH, *AT91PS_PWMC_CH;
+
+// -------- PWMC_CMR : (PWMC_CH Offset: 0x0) PWMC Channel Mode Register -------- 
+#define AT91C_PWMC_CPRE       ((unsigned int) 0xF <<  0) // (PWMC_CH) Channel Pre-scaler : PWMC_CLKx
+#define 	AT91C_PWMC_CPRE_MCK                  ((unsigned int) 0x0) // (PWMC_CH) 
+#define 	AT91C_PWMC_CPRE_MCKA                 ((unsigned int) 0xB) // (PWMC_CH) 
+#define 	AT91C_PWMC_CPRE_MCKB                 ((unsigned int) 0xC) // (PWMC_CH) 
+#define AT91C_PWMC_CALG       ((unsigned int) 0x1 <<  8) // (PWMC_CH) Channel Alignment
+#define AT91C_PWMC_CPOL       ((unsigned int) 0x1 <<  9) // (PWMC_CH) Channel Polarity
+#define AT91C_PWMC_CPD        ((unsigned int) 0x1 << 10) // (PWMC_CH) Channel Update Period
+// -------- PWMC_CDTYR : (PWMC_CH Offset: 0x4) PWMC Channel Duty Cycle Register -------- 
+#define AT91C_PWMC_CDTY       ((unsigned int) 0x0 <<  0) // (PWMC_CH) Channel Duty Cycle
+// -------- PWMC_CPRDR : (PWMC_CH Offset: 0x8) PWMC Channel Period Register -------- 
+#define AT91C_PWMC_CPRD       ((unsigned int) 0x0 <<  0) // (PWMC_CH) Channel Period
+// -------- PWMC_CCNTR : (PWMC_CH Offset: 0xc) PWMC Channel Counter Register -------- 
+#define AT91C_PWMC_CCNT       ((unsigned int) 0x0 <<  0) // (PWMC_CH) Channel Counter
+// -------- PWMC_CUPDR : (PWMC_CH Offset: 0x10) PWMC Channel Update Register -------- 
+#define AT91C_PWMC_CUPD       ((unsigned int) 0x0 <<  0) // (PWMC_CH) Channel Update
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Pulse Width Modulation Controller Interface
+// *****************************************************************************
+typedef struct _AT91S_PWMC {
+	AT91_REG	 PWMC_MR; 	// PWMC Mode Register
+	AT91_REG	 PWMC_ENA; 	// PWMC Enable Register
+	AT91_REG	 PWMC_DIS; 	// PWMC Disable Register
+	AT91_REG	 PWMC_SR; 	// PWMC Status Register
+	AT91_REG	 PWMC_IER; 	// PWMC Interrupt Enable Register
+	AT91_REG	 PWMC_IDR; 	// PWMC Interrupt Disable Register
+	AT91_REG	 PWMC_IMR; 	// PWMC Interrupt Mask Register
+	AT91_REG	 PWMC_ISR; 	// PWMC Interrupt Status Register
+	AT91_REG	 Reserved0[55]; 	// 
+	AT91_REG	 PWMC_VR; 	// PWMC Version Register
+	AT91_REG	 Reserved1[64]; 	// 
+	AT91S_PWMC_CH	 PWMC_CH[4]; 	// PWMC Channel
+} AT91S_PWMC, *AT91PS_PWMC;
+
+// -------- PWMC_MR : (PWMC Offset: 0x0) PWMC Mode Register -------- 
+#define AT91C_PWMC_DIVA       ((unsigned int) 0xFF <<  0) // (PWMC) CLKA divide factor.
+#define AT91C_PWMC_PREA       ((unsigned int) 0xF <<  8) // (PWMC) Divider Input Clock Prescaler A
+#define 	AT91C_PWMC_PREA_MCK                  ((unsigned int) 0x0 <<  8) // (PWMC) 
+#define AT91C_PWMC_DIVB       ((unsigned int) 0xFF << 16) // (PWMC) CLKB divide factor.
+#define AT91C_PWMC_PREB       ((unsigned int) 0xF << 24) // (PWMC) Divider Input Clock Prescaler B
+#define 	AT91C_PWMC_PREB_MCK                  ((unsigned int) 0x0 << 24) // (PWMC) 
+// -------- PWMC_ENA : (PWMC Offset: 0x4) PWMC Enable Register -------- 
+#define AT91C_PWMC_CHID0      ((unsigned int) 0x1 <<  0) // (PWMC) Channel ID 0
+#define AT91C_PWMC_CHID1      ((unsigned int) 0x1 <<  1) // (PWMC) Channel ID 1
+#define AT91C_PWMC_CHID2      ((unsigned int) 0x1 <<  2) // (PWMC) Channel ID 2
+#define AT91C_PWMC_CHID3      ((unsigned int) 0x1 <<  3) // (PWMC) Channel ID 3
+// -------- PWMC_DIS : (PWMC Offset: 0x8) PWMC Disable Register -------- 
+// -------- PWMC_SR : (PWMC Offset: 0xc) PWMC Status Register -------- 
+// -------- PWMC_IER : (PWMC Offset: 0x10) PWMC Interrupt Enable Register -------- 
+// -------- PWMC_IDR : (PWMC Offset: 0x14) PWMC Interrupt Disable Register -------- 
+// -------- PWMC_IMR : (PWMC Offset: 0x18) PWMC Interrupt Mask Register -------- 
+// -------- PWMC_ISR : (PWMC Offset: 0x1c) PWMC Interrupt Status Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR USB Device Interface
+// *****************************************************************************
+typedef struct _AT91S_UDP {
+	AT91_REG	 UDP_NUM; 	// Frame Number Register
+	AT91_REG	 UDP_GLBSTATE; 	// Global State Register
+	AT91_REG	 UDP_FADDR; 	// Function Address Register
+	AT91_REG	 Reserved0[1]; 	// 
+	AT91_REG	 UDP_IER; 	// Interrupt Enable Register
+	AT91_REG	 UDP_IDR; 	// Interrupt Disable Register
+	AT91_REG	 UDP_IMR; 	// Interrupt Mask Register
+	AT91_REG	 UDP_ISR; 	// Interrupt Status Register
+	AT91_REG	 UDP_ICR; 	// Interrupt Clear Register
+	AT91_REG	 Reserved1[1]; 	// 
+	AT91_REG	 UDP_RSTEP; 	// Reset Endpoint Register
+	AT91_REG	 Reserved2[1]; 	// 
+	AT91_REG	 UDP_CSR[6]; 	// Endpoint Control and Status Register
+	AT91_REG	 Reserved3[2]; 	// 
+	AT91_REG	 UDP_FDR[6]; 	// Endpoint FIFO Data Register
+	AT91_REG	 Reserved4[3]; 	// 
+	AT91_REG	 UDP_TXVC; 	// Transceiver Control Register
+} AT91S_UDP, *AT91PS_UDP;
+
+// -------- UDP_FRM_NUM : (UDP Offset: 0x0) USB Frame Number Register -------- 
+#define AT91C_UDP_FRM_NUM     ((unsigned int) 0x7FF <<  0) // (UDP) Frame Number as Defined in the Packet Field Formats
+#define AT91C_UDP_FRM_ERR     ((unsigned int) 0x1 << 16) // (UDP) Frame Error
+#define AT91C_UDP_FRM_OK      ((unsigned int) 0x1 << 17) // (UDP) Frame OK
+// -------- UDP_GLB_STATE : (UDP Offset: 0x4) USB Global State Register -------- 
+#define AT91C_UDP_FADDEN      ((unsigned int) 0x1 <<  0) // (UDP) Function Address Enable
+#define AT91C_UDP_CONFG       ((unsigned int) 0x1 <<  1) // (UDP) Configured
+#define AT91C_UDP_ESR         ((unsigned int) 0x1 <<  2) // (UDP) Enable Send Resume
+#define AT91C_UDP_RSMINPR     ((unsigned int) 0x1 <<  3) // (UDP) A Resume Has Been Sent to the Host
+#define AT91C_UDP_RMWUPE      ((unsigned int) 0x1 <<  4) // (UDP) Remote Wake Up Enable
+// -------- UDP_FADDR : (UDP Offset: 0x8) USB Function Address Register -------- 
+#define AT91C_UDP_FADD        ((unsigned int) 0xFF <<  0) // (UDP) Function Address Value
+#define AT91C_UDP_FEN         ((unsigned int) 0x1 <<  8) // (UDP) Function Enable
+// -------- UDP_IER : (UDP Offset: 0x10) USB Interrupt Enable Register -------- 
+#define AT91C_UDP_EPINT0      ((unsigned int) 0x1 <<  0) // (UDP) Endpoint 0 Interrupt
+#define AT91C_UDP_EPINT1      ((unsigned int) 0x1 <<  1) // (UDP) Endpoint 0 Interrupt
+#define AT91C_UDP_EPINT2      ((unsigned int) 0x1 <<  2) // (UDP) Endpoint 2 Interrupt
+#define AT91C_UDP_EPINT3      ((unsigned int) 0x1 <<  3) // (UDP) Endpoint 3 Interrupt
+#define AT91C_UDP_EPINT4      ((unsigned int) 0x1 <<  4) // (UDP) Endpoint 4 Interrupt
+#define AT91C_UDP_EPINT5      ((unsigned int) 0x1 <<  5) // (UDP) Endpoint 5 Interrupt
+#define AT91C_UDP_RXSUSP      ((unsigned int) 0x1 <<  8) // (UDP) USB Suspend Interrupt
+#define AT91C_UDP_RXRSM       ((unsigned int) 0x1 <<  9) // (UDP) USB Resume Interrupt
+#define AT91C_UDP_EXTRSM      ((unsigned int) 0x1 << 10) // (UDP) USB External Resume Interrupt
+#define AT91C_UDP_SOFINT      ((unsigned int) 0x1 << 11) // (UDP) USB Start Of frame Interrupt
+#define AT91C_UDP_WAKEUP      ((unsigned int) 0x1 << 13) // (UDP) USB Resume Interrupt
+// -------- UDP_IDR : (UDP Offset: 0x14) USB Interrupt Disable Register -------- 
+// -------- UDP_IMR : (UDP Offset: 0x18) USB Interrupt Mask Register -------- 
+// -------- UDP_ISR : (UDP Offset: 0x1c) USB Interrupt Status Register -------- 
+#define AT91C_UDP_ENDBUSRES   ((unsigned int) 0x1 << 12) // (UDP) USB End Of Bus Reset Interrupt
+// -------- UDP_ICR : (UDP Offset: 0x20) USB Interrupt Clear Register -------- 
+// -------- UDP_RST_EP : (UDP Offset: 0x28) USB Reset Endpoint Register -------- 
+#define AT91C_UDP_EP0         ((unsigned int) 0x1 <<  0) // (UDP) Reset Endpoint 0
+#define AT91C_UDP_EP1         ((unsigned int) 0x1 <<  1) // (UDP) Reset Endpoint 1
+#define AT91C_UDP_EP2         ((unsigned int) 0x1 <<  2) // (UDP) Reset Endpoint 2
+#define AT91C_UDP_EP3         ((unsigned int) 0x1 <<  3) // (UDP) Reset Endpoint 3
+#define AT91C_UDP_EP4         ((unsigned int) 0x1 <<  4) // (UDP) Reset Endpoint 4
+#define AT91C_UDP_EP5         ((unsigned int) 0x1 <<  5) // (UDP) Reset Endpoint 5
+// -------- UDP_CSR : (UDP Offset: 0x30) USB Endpoint Control and Status Register -------- 
+#define AT91C_UDP_TXCOMP      ((unsigned int) 0x1 <<  0) // (UDP) Generates an IN packet with data previously written in the DPR
+#define AT91C_UDP_RX_DATA_BK0 ((unsigned int) 0x1 <<  1) // (UDP) Receive Data Bank 0
+#define AT91C_UDP_RXSETUP     ((unsigned int) 0x1 <<  2) // (UDP) Sends STALL to the Host (Control endpoints)
+#define AT91C_UDP_ISOERROR    ((unsigned int) 0x1 <<  3) // (UDP) Isochronous error (Isochronous endpoints)
+#define AT91C_UDP_TXPKTRDY    ((unsigned int) 0x1 <<  4) // (UDP) Transmit Packet Ready
+#define AT91C_UDP_FORCESTALL  ((unsigned int) 0x1 <<  5) // (UDP) Force Stall (used by Control, Bulk and Isochronous endpoints).
+#define AT91C_UDP_RX_DATA_BK1 ((unsigned int) 0x1 <<  6) // (UDP) Receive Data Bank 1 (only used by endpoints with ping-pong attributes).
+#define AT91C_UDP_DIR         ((unsigned int) 0x1 <<  7) // (UDP) Transfer Direction
+#define AT91C_UDP_EPTYPE      ((unsigned int) 0x7 <<  8) // (UDP) Endpoint type
+#define 	AT91C_UDP_EPTYPE_CTRL                 ((unsigned int) 0x0 <<  8) // (UDP) Control
+#define 	AT91C_UDP_EPTYPE_ISO_OUT              ((unsigned int) 0x1 <<  8) // (UDP) Isochronous OUT
+#define 	AT91C_UDP_EPTYPE_BULK_OUT             ((unsigned int) 0x2 <<  8) // (UDP) Bulk OUT
+#define 	AT91C_UDP_EPTYPE_INT_OUT              ((unsigned int) 0x3 <<  8) // (UDP) Interrupt OUT
+#define 	AT91C_UDP_EPTYPE_ISO_IN               ((unsigned int) 0x5 <<  8) // (UDP) Isochronous IN
+#define 	AT91C_UDP_EPTYPE_BULK_IN              ((unsigned int) 0x6 <<  8) // (UDP) Bulk IN
+#define 	AT91C_UDP_EPTYPE_INT_IN               ((unsigned int) 0x7 <<  8) // (UDP) Interrupt IN
+#define AT91C_UDP_DTGLE       ((unsigned int) 0x1 << 11) // (UDP) Data Toggle
+#define AT91C_UDP_EPEDS       ((unsigned int) 0x1 << 15) // (UDP) Endpoint Enable Disable
+#define AT91C_UDP_RXBYTECNT   ((unsigned int) 0x7FF << 16) // (UDP) Number Of Bytes Available in the FIFO
+// -------- UDP_TXVC : (UDP Offset: 0x74) Transceiver Control Register -------- 
+#define AT91C_UDP_TXVDIS      ((unsigned int) 0x1 <<  8) // (UDP) 
+#define AT91C_UDP_PUON        ((unsigned int) 0x1 <<  9) // (UDP) Pull-up ON
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Timer Counter Channel Interface
+// *****************************************************************************
+typedef struct _AT91S_TC {
+	AT91_REG	 TC_CCR; 	// Channel Control Register
+	AT91_REG	 TC_CMR; 	// Channel Mode Register (Capture Mode / Waveform Mode)
+	AT91_REG	 Reserved0[2]; 	// 
+	AT91_REG	 TC_CV; 	// Counter Value
+	AT91_REG	 TC_RA; 	// Register A
+	AT91_REG	 TC_RB; 	// Register B
+	AT91_REG	 TC_RC; 	// Register C
+	AT91_REG	 TC_SR; 	// Status Register
+	AT91_REG	 TC_IER; 	// Interrupt Enable Register
+	AT91_REG	 TC_IDR; 	// Interrupt Disable Register
+	AT91_REG	 TC_IMR; 	// Interrupt Mask Register
+} AT91S_TC, *AT91PS_TC;
+
+// -------- TC_CCR : (TC Offset: 0x0) TC Channel Control Register -------- 
+#define AT91C_TC_CLKEN        ((unsigned int) 0x1 <<  0) // (TC) Counter Clock Enable Command
+#define AT91C_TC_CLKDIS       ((unsigned int) 0x1 <<  1) // (TC) Counter Clock Disable Command
+#define AT91C_TC_SWTRG        ((unsigned int) 0x1 <<  2) // (TC) Software Trigger Command
+// -------- TC_CMR : (TC Offset: 0x4) TC Channel Mode Register: Capture Mode / Waveform Mode -------- 
+#define AT91C_TC_CLKS         ((unsigned int) 0x7 <<  0) // (TC) Clock Selection
+#define 	AT91C_TC_CLKS_TIMER_DIV1_CLOCK     ((unsigned int) 0x0) // (TC) Clock selected: TIMER_DIV1_CLOCK
+#define 	AT91C_TC_CLKS_TIMER_DIV2_CLOCK     ((unsigned int) 0x1) // (TC) Clock selected: TIMER_DIV2_CLOCK
+#define 	AT91C_TC_CLKS_TIMER_DIV3_CLOCK     ((unsigned int) 0x2) // (TC) Clock selected: TIMER_DIV3_CLOCK
+#define 	AT91C_TC_CLKS_TIMER_DIV4_CLOCK     ((unsigned int) 0x3) // (TC) Clock selected: TIMER_DIV4_CLOCK
+#define 	AT91C_TC_CLKS_TIMER_DIV5_CLOCK     ((unsigned int) 0x4) // (TC) Clock selected: TIMER_DIV5_CLOCK
+#define 	AT91C_TC_CLKS_XC0                  ((unsigned int) 0x5) // (TC) Clock selected: XC0
+#define 	AT91C_TC_CLKS_XC1                  ((unsigned int) 0x6) // (TC) Clock selected: XC1
+#define 	AT91C_TC_CLKS_XC2                  ((unsigned int) 0x7) // (TC) Clock selected: XC2
+#define AT91C_TC_CLKI         ((unsigned int) 0x1 <<  3) // (TC) Clock Invert
+#define AT91C_TC_BURST        ((unsigned int) 0x3 <<  4) // (TC) Burst Signal Selection
+#define 	AT91C_TC_BURST_NONE                 ((unsigned int) 0x0 <<  4) // (TC) The clock is not gated by an external signal
+#define 	AT91C_TC_BURST_XC0                  ((unsigned int) 0x1 <<  4) // (TC) XC0 is ANDed with the selected clock
+#define 	AT91C_TC_BURST_XC1                  ((unsigned int) 0x2 <<  4) // (TC) XC1 is ANDed with the selected clock
+#define 	AT91C_TC_BURST_XC2                  ((unsigned int) 0x3 <<  4) // (TC) XC2 is ANDed with the selected clock
+#define AT91C_TC_CPCSTOP      ((unsigned int) 0x1 <<  6) // (TC) Counter Clock Stopped with RC Compare
+#define AT91C_TC_LDBSTOP      ((unsigned int) 0x1 <<  6) // (TC) Counter Clock Stopped with RB Loading
+#define AT91C_TC_CPCDIS       ((unsigned int) 0x1 <<  7) // (TC) Counter Clock Disable with RC Compare
+#define AT91C_TC_LDBDIS       ((unsigned int) 0x1 <<  7) // (TC) Counter Clock Disabled with RB Loading
+#define AT91C_TC_ETRGEDG      ((unsigned int) 0x3 <<  8) // (TC) External Trigger Edge Selection
+#define 	AT91C_TC_ETRGEDG_NONE                 ((unsigned int) 0x0 <<  8) // (TC) Edge: None
+#define 	AT91C_TC_ETRGEDG_RISING               ((unsigned int) 0x1 <<  8) // (TC) Edge: rising edge
+#define 	AT91C_TC_ETRGEDG_FALLING              ((unsigned int) 0x2 <<  8) // (TC) Edge: falling edge
+#define 	AT91C_TC_ETRGEDG_BOTH                 ((unsigned int) 0x3 <<  8) // (TC) Edge: each edge
+#define AT91C_TC_EEVTEDG      ((unsigned int) 0x3 <<  8) // (TC) External Event Edge Selection
+#define 	AT91C_TC_EEVTEDG_NONE                 ((unsigned int) 0x0 <<  8) // (TC) Edge: None
+#define 	AT91C_TC_EEVTEDG_RISING               ((unsigned int) 0x1 <<  8) // (TC) Edge: rising edge
+#define 	AT91C_TC_EEVTEDG_FALLING              ((unsigned int) 0x2 <<  8) // (TC) Edge: falling edge
+#define 	AT91C_TC_EEVTEDG_BOTH                 ((unsigned int) 0x3 <<  8) // (TC) Edge: each edge
+#define AT91C_TC_EEVT         ((unsigned int) 0x3 << 10) // (TC) External Event  Selection
+#define 	AT91C_TC_EEVT_TIOB                 ((unsigned int) 0x0 << 10) // (TC) Signal selected as external event: TIOB TIOB direction: input
+#define 	AT91C_TC_EEVT_XC0                  ((unsigned int) 0x1 << 10) // (TC) Signal selected as external event: XC0 TIOB direction: output
+#define 	AT91C_TC_EEVT_XC1                  ((unsigned int) 0x2 << 10) // (TC) Signal selected as external event: XC1 TIOB direction: output
+#define 	AT91C_TC_EEVT_XC2                  ((unsigned int) 0x3 << 10) // (TC) Signal selected as external event: XC2 TIOB direction: output
+#define AT91C_TC_ABETRG       ((unsigned int) 0x1 << 10) // (TC) TIOA or TIOB External Trigger Selection
+#define AT91C_TC_ENETRG       ((unsigned int) 0x1 << 12) // (TC) External Event Trigger enable
+#define AT91C_TC_WAVESEL      ((unsigned int) 0x3 << 13) // (TC) Waveform  Selection
+#define 	AT91C_TC_WAVESEL_UP                   ((unsigned int) 0x0 << 13) // (TC) UP mode without atomatic trigger on RC Compare
+#define 	AT91C_TC_WAVESEL_UPDOWN               ((unsigned int) 0x1 << 13) // (TC) UPDOWN mode without automatic trigger on RC Compare
+#define 	AT91C_TC_WAVESEL_UP_AUTO              ((unsigned int) 0x2 << 13) // (TC) UP mode with automatic trigger on RC Compare
+#define 	AT91C_TC_WAVESEL_UPDOWN_AUTO          ((unsigned int) 0x3 << 13) // (TC) UPDOWN mode with automatic trigger on RC Compare
+#define AT91C_TC_CPCTRG       ((unsigned int) 0x1 << 14) // (TC) RC Compare Trigger Enable
+#define AT91C_TC_WAVE         ((unsigned int) 0x1 << 15) // (TC) 
+#define AT91C_TC_ACPA         ((unsigned int) 0x3 << 16) // (TC) RA Compare Effect on TIOA
+#define 	AT91C_TC_ACPA_NONE                 ((unsigned int) 0x0 << 16) // (TC) Effect: none
+#define 	AT91C_TC_ACPA_SET                  ((unsigned int) 0x1 << 16) // (TC) Effect: set
+#define 	AT91C_TC_ACPA_CLEAR                ((unsigned int) 0x2 << 16) // (TC) Effect: clear
+#define 	AT91C_TC_ACPA_TOGGLE               ((unsigned int) 0x3 << 16) // (TC) Effect: toggle
+#define AT91C_TC_LDRA         ((unsigned int) 0x3 << 16) // (TC) RA Loading Selection
+#define 	AT91C_TC_LDRA_NONE                 ((unsigned int) 0x0 << 16) // (TC) Edge: None
+#define 	AT91C_TC_LDRA_RISING               ((unsigned int) 0x1 << 16) // (TC) Edge: rising edge of TIOA
+#define 	AT91C_TC_LDRA_FALLING              ((unsigned int) 0x2 << 16) // (TC) Edge: falling edge of TIOA
+#define 	AT91C_TC_LDRA_BOTH                 ((unsigned int) 0x3 << 16) // (TC) Edge: each edge of TIOA
+#define AT91C_TC_ACPC         ((unsigned int) 0x3 << 18) // (TC) RC Compare Effect on TIOA
+#define 	AT91C_TC_ACPC_NONE                 ((unsigned int) 0x0 << 18) // (TC) Effect: none
+#define 	AT91C_TC_ACPC_SET                  ((unsigned int) 0x1 << 18) // (TC) Effect: set
+#define 	AT91C_TC_ACPC_CLEAR                ((unsigned int) 0x2 << 18) // (TC) Effect: clear
+#define 	AT91C_TC_ACPC_TOGGLE               ((unsigned int) 0x3 << 18) // (TC) Effect: toggle
+#define AT91C_TC_LDRB         ((unsigned int) 0x3 << 18) // (TC) RB Loading Selection
+#define 	AT91C_TC_LDRB_NONE                 ((unsigned int) 0x0 << 18) // (TC) Edge: None
+#define 	AT91C_TC_LDRB_RISING               ((unsigned int) 0x1 << 18) // (TC) Edge: rising edge of TIOA
+#define 	AT91C_TC_LDRB_FALLING              ((unsigned int) 0x2 << 18) // (TC) Edge: falling edge of TIOA
+#define 	AT91C_TC_LDRB_BOTH                 ((unsigned int) 0x3 << 18) // (TC) Edge: each edge of TIOA
+#define AT91C_TC_AEEVT        ((unsigned int) 0x3 << 20) // (TC) External Event Effect on TIOA
+#define 	AT91C_TC_AEEVT_NONE                 ((unsigned int) 0x0 << 20) // (TC) Effect: none
+#define 	AT91C_TC_AEEVT_SET                  ((unsigned int) 0x1 << 20) // (TC) Effect: set
+#define 	AT91C_TC_AEEVT_CLEAR                ((unsigned int) 0x2 << 20) // (TC) Effect: clear
+#define 	AT91C_TC_AEEVT_TOGGLE               ((unsigned int) 0x3 << 20) // (TC) Effect: toggle
+#define AT91C_TC_ASWTRG       ((unsigned int) 0x3 << 22) // (TC) Software Trigger Effect on TIOA
+#define 	AT91C_TC_ASWTRG_NONE                 ((unsigned int) 0x0 << 22) // (TC) Effect: none
+#define 	AT91C_TC_ASWTRG_SET                  ((unsigned int) 0x1 << 22) // (TC) Effect: set
+#define 	AT91C_TC_ASWTRG_CLEAR                ((unsigned int) 0x2 << 22) // (TC) Effect: clear
+#define 	AT91C_TC_ASWTRG_TOGGLE               ((unsigned int) 0x3 << 22) // (TC) Effect: toggle
+#define AT91C_TC_BCPB         ((unsigned int) 0x3 << 24) // (TC) RB Compare Effect on TIOB
+#define 	AT91C_TC_BCPB_NONE                 ((unsigned int) 0x0 << 24) // (TC) Effect: none
+#define 	AT91C_TC_BCPB_SET                  ((unsigned int) 0x1 << 24) // (TC) Effect: set
+#define 	AT91C_TC_BCPB_CLEAR                ((unsigned int) 0x2 << 24) // (TC) Effect: clear
+#define 	AT91C_TC_BCPB_TOGGLE               ((unsigned int) 0x3 << 24) // (TC) Effect: toggle
+#define AT91C_TC_BCPC         ((unsigned int) 0x3 << 26) // (TC) RC Compare Effect on TIOB
+#define 	AT91C_TC_BCPC_NONE                 ((unsigned int) 0x0 << 26) // (TC) Effect: none
+#define 	AT91C_TC_BCPC_SET                  ((unsigned int) 0x1 << 26) // (TC) Effect: set
+#define 	AT91C_TC_BCPC_CLEAR                ((unsigned int) 0x2 << 26) // (TC) Effect: clear
+#define 	AT91C_TC_BCPC_TOGGLE               ((unsigned int) 0x3 << 26) // (TC) Effect: toggle
+#define AT91C_TC_BEEVT        ((unsigned int) 0x3 << 28) // (TC) External Event Effect on TIOB
+#define 	AT91C_TC_BEEVT_NONE                 ((unsigned int) 0x0 << 28) // (TC) Effect: none
+#define 	AT91C_TC_BEEVT_SET                  ((unsigned int) 0x1 << 28) // (TC) Effect: set
+#define 	AT91C_TC_BEEVT_CLEAR                ((unsigned int) 0x2 << 28) // (TC) Effect: clear
+#define 	AT91C_TC_BEEVT_TOGGLE               ((unsigned int) 0x3 << 28) // (TC) Effect: toggle
+#define AT91C_TC_BSWTRG       ((unsigned int) 0x3 << 30) // (TC) Software Trigger Effect on TIOB
+#define 	AT91C_TC_BSWTRG_NONE                 ((unsigned int) 0x0 << 30) // (TC) Effect: none
+#define 	AT91C_TC_BSWTRG_SET                  ((unsigned int) 0x1 << 30) // (TC) Effect: set
+#define 	AT91C_TC_BSWTRG_CLEAR                ((unsigned int) 0x2 << 30) // (TC) Effect: clear
+#define 	AT91C_TC_BSWTRG_TOGGLE               ((unsigned int) 0x3 << 30) // (TC) Effect: toggle
+// -------- TC_SR : (TC Offset: 0x20) TC Channel Status Register -------- 
+#define AT91C_TC_COVFS        ((unsigned int) 0x1 <<  0) // (TC) Counter Overflow
+#define AT91C_TC_LOVRS        ((unsigned int) 0x1 <<  1) // (TC) Load Overrun
+#define AT91C_TC_CPAS         ((unsigned int) 0x1 <<  2) // (TC) RA Compare
+#define AT91C_TC_CPBS         ((unsigned int) 0x1 <<  3) // (TC) RB Compare
+#define AT91C_TC_CPCS         ((unsigned int) 0x1 <<  4) // (TC) RC Compare
+#define AT91C_TC_LDRAS        ((unsigned int) 0x1 <<  5) // (TC) RA Loading
+#define AT91C_TC_LDRBS        ((unsigned int) 0x1 <<  6) // (TC) RB Loading
+#define AT91C_TC_ETRGS        ((unsigned int) 0x1 <<  7) // (TC) External Trigger
+#define AT91C_TC_CLKSTA       ((unsigned int) 0x1 << 16) // (TC) Clock Enabling
+#define AT91C_TC_MTIOA        ((unsigned int) 0x1 << 17) // (TC) TIOA Mirror
+#define AT91C_TC_MTIOB        ((unsigned int) 0x1 << 18) // (TC) TIOA Mirror
+// -------- TC_IER : (TC Offset: 0x24) TC Channel Interrupt Enable Register -------- 
+// -------- TC_IDR : (TC Offset: 0x28) TC Channel Interrupt Disable Register -------- 
+// -------- TC_IMR : (TC Offset: 0x2c) TC Channel Interrupt Mask Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Timer Counter Interface
+// *****************************************************************************
+typedef struct _AT91S_TCB {
+	AT91S_TC	 TCB_TC0; 	// TC Channel 0
+	AT91_REG	 Reserved0[4]; 	// 
+	AT91S_TC	 TCB_TC1; 	// TC Channel 1
+	AT91_REG	 Reserved1[4]; 	// 
+	AT91S_TC	 TCB_TC2; 	// TC Channel 2
+	AT91_REG	 Reserved2[4]; 	// 
+	AT91_REG	 TCB_BCR; 	// TC Block Control Register
+	AT91_REG	 TCB_BMR; 	// TC Block Mode Register
+} AT91S_TCB, *AT91PS_TCB;
+
+// -------- TCB_BCR : (TCB Offset: 0xc0) TC Block Control Register -------- 
+#define AT91C_TCB_SYNC        ((unsigned int) 0x1 <<  0) // (TCB) Synchro Command
+// -------- TCB_BMR : (TCB Offset: 0xc4) TC Block Mode Register -------- 
+#define AT91C_TCB_TC0XC0S     ((unsigned int) 0x3 <<  0) // (TCB) External Clock Signal 0 Selection
+#define 	AT91C_TCB_TC0XC0S_TCLK0                ((unsigned int) 0x0) // (TCB) TCLK0 connected to XC0
+#define 	AT91C_TCB_TC0XC0S_NONE                 ((unsigned int) 0x1) // (TCB) None signal connected to XC0
+#define 	AT91C_TCB_TC0XC0S_TIOA1                ((unsigned int) 0x2) // (TCB) TIOA1 connected to XC0
+#define 	AT91C_TCB_TC0XC0S_TIOA2                ((unsigned int) 0x3) // (TCB) TIOA2 connected to XC0
+#define AT91C_TCB_TC1XC1S     ((unsigned int) 0x3 <<  2) // (TCB) External Clock Signal 1 Selection
+#define 	AT91C_TCB_TC1XC1S_TCLK1                ((unsigned int) 0x0 <<  2) // (TCB) TCLK1 connected to XC1
+#define 	AT91C_TCB_TC1XC1S_NONE                 ((unsigned int) 0x1 <<  2) // (TCB) None signal connected to XC1
+#define 	AT91C_TCB_TC1XC1S_TIOA0                ((unsigned int) 0x2 <<  2) // (TCB) TIOA0 connected to XC1
+#define 	AT91C_TCB_TC1XC1S_TIOA2                ((unsigned int) 0x3 <<  2) // (TCB) TIOA2 connected to XC1
+#define AT91C_TCB_TC2XC2S     ((unsigned int) 0x3 <<  4) // (TCB) External Clock Signal 2 Selection
+#define 	AT91C_TCB_TC2XC2S_TCLK2                ((unsigned int) 0x0 <<  4) // (TCB) TCLK2 connected to XC2
+#define 	AT91C_TCB_TC2XC2S_NONE                 ((unsigned int) 0x1 <<  4) // (TCB) None signal connected to XC2
+#define 	AT91C_TCB_TC2XC2S_TIOA0                ((unsigned int) 0x2 <<  4) // (TCB) TIOA0 connected to XC2
+#define 	AT91C_TCB_TC2XC2S_TIOA1                ((unsigned int) 0x3 <<  4) // (TCB) TIOA2 connected to XC2
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Control Area Network MailBox Interface
+// *****************************************************************************
+typedef struct _AT91S_CAN_MB {
+	AT91_REG	 CAN_MB_MMR; 	// MailBox Mode Register
+	AT91_REG	 CAN_MB_MAM; 	// MailBox Acceptance Mask Register
+	AT91_REG	 CAN_MB_MID; 	// MailBox ID Register
+	AT91_REG	 CAN_MB_MFID; 	// MailBox Family ID Register
+	AT91_REG	 CAN_MB_MSR; 	// MailBox Status Register
+	AT91_REG	 CAN_MB_MDL; 	// MailBox Data Low Register
+	AT91_REG	 CAN_MB_MDH; 	// MailBox Data High Register
+	AT91_REG	 CAN_MB_MCR; 	// MailBox Control Register
+} AT91S_CAN_MB, *AT91PS_CAN_MB;
+
+// -------- CAN_MMR : (CAN_MB Offset: 0x0) CAN Message Mode Register -------- 
+#define AT91C_CAN_MTIMEMARK   ((unsigned int) 0xFFFF <<  0) // (CAN_MB) Mailbox Timemark
+#define AT91C_CAN_PRIOR       ((unsigned int) 0xF << 16) // (CAN_MB) Mailbox Priority
+#define AT91C_CAN_MOT         ((unsigned int) 0x7 << 24) // (CAN_MB) Mailbox Object Type
+#define 	AT91C_CAN_MOT_DIS                  ((unsigned int) 0x0 << 24) // (CAN_MB) 
+#define 	AT91C_CAN_MOT_RX                   ((unsigned int) 0x1 << 24) // (CAN_MB) 
+#define 	AT91C_CAN_MOT_RXOVERWRITE          ((unsigned int) 0x2 << 24) // (CAN_MB) 
+#define 	AT91C_CAN_MOT_TX                   ((unsigned int) 0x3 << 24) // (CAN_MB) 
+#define 	AT91C_CAN_MOT_CONSUMER             ((unsigned int) 0x4 << 24) // (CAN_MB) 
+#define 	AT91C_CAN_MOT_PRODUCER             ((unsigned int) 0x5 << 24) // (CAN_MB) 
+// -------- CAN_MAM : (CAN_MB Offset: 0x4) CAN Message Acceptance Mask Register -------- 
+#define AT91C_CAN_MIDvB       ((unsigned int) 0x3FFFF <<  0) // (CAN_MB) Complementary bits for identifier in extended mode
+#define AT91C_CAN_MIDvA       ((unsigned int) 0x7FF << 18) // (CAN_MB) Identifier for standard frame mode
+#define AT91C_CAN_MIDE        ((unsigned int) 0x1 << 29) // (CAN_MB) Identifier Version
+// -------- CAN_MID : (CAN_MB Offset: 0x8) CAN Message ID Register -------- 
+// -------- CAN_MFID : (CAN_MB Offset: 0xc) CAN Message Family ID Register -------- 
+// -------- CAN_MSR : (CAN_MB Offset: 0x10) CAN Message Status Register -------- 
+#define AT91C_CAN_MTIMESTAMP  ((unsigned int) 0xFFFF <<  0) // (CAN_MB) Timer Value
+#define AT91C_CAN_MDLC        ((unsigned int) 0xF << 16) // (CAN_MB) Mailbox Data Length Code
+#define AT91C_CAN_MRTR        ((unsigned int) 0x1 << 20) // (CAN_MB) Mailbox Remote Transmission Request
+#define AT91C_CAN_MABT        ((unsigned int) 0x1 << 22) // (CAN_MB) Mailbox Message Abort
+#define AT91C_CAN_MRDY        ((unsigned int) 0x1 << 23) // (CAN_MB) Mailbox Ready
+#define AT91C_CAN_MMI         ((unsigned int) 0x1 << 24) // (CAN_MB) Mailbox Message Ignored
+// -------- CAN_MDL : (CAN_MB Offset: 0x14) CAN Message Data Low Register -------- 
+// -------- CAN_MDH : (CAN_MB Offset: 0x18) CAN Message Data High Register -------- 
+// -------- CAN_MCR : (CAN_MB Offset: 0x1c) CAN Message Control Register -------- 
+#define AT91C_CAN_MACR        ((unsigned int) 0x1 << 22) // (CAN_MB) Abort Request for Mailbox
+#define AT91C_CAN_MTCR        ((unsigned int) 0x1 << 23) // (CAN_MB) Mailbox Transfer Command
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Control Area Network Interface
+// *****************************************************************************
+typedef struct _AT91S_CAN {
+	AT91_REG	 CAN_MR; 	// Mode Register
+	AT91_REG	 CAN_IER; 	// Interrupt Enable Register
+	AT91_REG	 CAN_IDR; 	// Interrupt Disable Register
+	AT91_REG	 CAN_IMR; 	// Interrupt Mask Register
+	AT91_REG	 CAN_SR; 	// Status Register
+	AT91_REG	 CAN_BR; 	// Baudrate Register
+	AT91_REG	 CAN_TIM; 	// Timer Register
+	AT91_REG	 CAN_TIMESTP; 	// Time Stamp Register
+	AT91_REG	 CAN_ECR; 	// Error Counter Register
+	AT91_REG	 CAN_TCR; 	// Transfer Command Register
+	AT91_REG	 CAN_ACR; 	// Abort Command Register
+	AT91_REG	 Reserved0[52]; 	// 
+	AT91_REG	 CAN_VR; 	// Version Register
+	AT91_REG	 Reserved1[64]; 	// 
+	AT91S_CAN_MB	 CAN_MB0; 	// CAN Mailbox 0
+	AT91S_CAN_MB	 CAN_MB1; 	// CAN Mailbox 1
+	AT91S_CAN_MB	 CAN_MB2; 	// CAN Mailbox 2
+	AT91S_CAN_MB	 CAN_MB3; 	// CAN Mailbox 3
+	AT91S_CAN_MB	 CAN_MB4; 	// CAN Mailbox 4
+	AT91S_CAN_MB	 CAN_MB5; 	// CAN Mailbox 5
+	AT91S_CAN_MB	 CAN_MB6; 	// CAN Mailbox 6
+	AT91S_CAN_MB	 CAN_MB7; 	// CAN Mailbox 7
+	AT91S_CAN_MB	 CAN_MB8; 	// CAN Mailbox 8
+	AT91S_CAN_MB	 CAN_MB9; 	// CAN Mailbox 9
+	AT91S_CAN_MB	 CAN_MB10; 	// CAN Mailbox 10
+	AT91S_CAN_MB	 CAN_MB11; 	// CAN Mailbox 11
+	AT91S_CAN_MB	 CAN_MB12; 	// CAN Mailbox 12
+	AT91S_CAN_MB	 CAN_MB13; 	// CAN Mailbox 13
+	AT91S_CAN_MB	 CAN_MB14; 	// CAN Mailbox 14
+	AT91S_CAN_MB	 CAN_MB15; 	// CAN Mailbox 15
+} AT91S_CAN, *AT91PS_CAN;
+
+// -------- CAN_MR : (CAN Offset: 0x0) CAN Mode Register -------- 
+#define AT91C_CAN_CANEN       ((unsigned int) 0x1 <<  0) // (CAN) CAN Controller Enable
+#define AT91C_CAN_LPM         ((unsigned int) 0x1 <<  1) // (CAN) Disable/Enable Low Power Mode
+#define AT91C_CAN_ABM         ((unsigned int) 0x1 <<  2) // (CAN) Disable/Enable Autobaud/Listen Mode
+#define AT91C_CAN_OVL         ((unsigned int) 0x1 <<  3) // (CAN) Disable/Enable Overload Frame
+#define AT91C_CAN_TEOF        ((unsigned int) 0x1 <<  4) // (CAN) Time Stamp messages at each end of Frame
+#define AT91C_CAN_TTM         ((unsigned int) 0x1 <<  5) // (CAN) Disable/Enable Time Trigger Mode
+#define AT91C_CAN_TIMFRZ      ((unsigned int) 0x1 <<  6) // (CAN) Enable Timer Freeze
+#define AT91C_CAN_DRPT        ((unsigned int) 0x1 <<  7) // (CAN) Disable Repeat
+// -------- CAN_IER : (CAN Offset: 0x4) CAN Interrupt Enable Register -------- 
+#define AT91C_CAN_MB0         ((unsigned int) 0x1 <<  0) // (CAN) Mailbox 0 Flag
+#define AT91C_CAN_MB1         ((unsigned int) 0x1 <<  1) // (CAN) Mailbox 1 Flag
+#define AT91C_CAN_MB2         ((unsigned int) 0x1 <<  2) // (CAN) Mailbox 2 Flag
+#define AT91C_CAN_MB3         ((unsigned int) 0x1 <<  3) // (CAN) Mailbox 3 Flag
+#define AT91C_CAN_MB4         ((unsigned int) 0x1 <<  4) // (CAN) Mailbox 4 Flag
+#define AT91C_CAN_MB5         ((unsigned int) 0x1 <<  5) // (CAN) Mailbox 5 Flag
+#define AT91C_CAN_MB6         ((unsigned int) 0x1 <<  6) // (CAN) Mailbox 6 Flag
+#define AT91C_CAN_MB7         ((unsigned int) 0x1 <<  7) // (CAN) Mailbox 7 Flag
+#define AT91C_CAN_MB8         ((unsigned int) 0x1 <<  8) // (CAN) Mailbox 8 Flag
+#define AT91C_CAN_MB9         ((unsigned int) 0x1 <<  9) // (CAN) Mailbox 9 Flag
+#define AT91C_CAN_MB10        ((unsigned int) 0x1 << 10) // (CAN) Mailbox 10 Flag
+#define AT91C_CAN_MB11        ((unsigned int) 0x1 << 11) // (CAN) Mailbox 11 Flag
+#define AT91C_CAN_MB12        ((unsigned int) 0x1 << 12) // (CAN) Mailbox 12 Flag
+#define AT91C_CAN_MB13        ((unsigned int) 0x1 << 13) // (CAN) Mailbox 13 Flag
+#define AT91C_CAN_MB14        ((unsigned int) 0x1 << 14) // (CAN) Mailbox 14 Flag
+#define AT91C_CAN_MB15        ((unsigned int) 0x1 << 15) // (CAN) Mailbox 15 Flag
+#define AT91C_CAN_ERRA        ((unsigned int) 0x1 << 16) // (CAN) Error Active Mode Flag
+#define AT91C_CAN_WARN        ((unsigned int) 0x1 << 17) // (CAN) Warning Limit Flag
+#define AT91C_CAN_ERRP        ((unsigned int) 0x1 << 18) // (CAN) Error Passive Mode Flag
+#define AT91C_CAN_BOFF        ((unsigned int) 0x1 << 19) // (CAN) Bus Off Mode Flag
+#define AT91C_CAN_SLEEP       ((unsigned int) 0x1 << 20) // (CAN) Sleep Flag
+#define AT91C_CAN_WAKEUP      ((unsigned int) 0x1 << 21) // (CAN) Wakeup Flag
+#define AT91C_CAN_TOVF        ((unsigned int) 0x1 << 22) // (CAN) Timer Overflow Flag
+#define AT91C_CAN_TSTP        ((unsigned int) 0x1 << 23) // (CAN) Timestamp Flag
+#define AT91C_CAN_CERR        ((unsigned int) 0x1 << 24) // (CAN) CRC Error
+#define AT91C_CAN_SERR        ((unsigned int) 0x1 << 25) // (CAN) Stuffing Error
+#define AT91C_CAN_AERR        ((unsigned int) 0x1 << 26) // (CAN) Acknowledgment Error
+#define AT91C_CAN_FERR        ((unsigned int) 0x1 << 27) // (CAN) Form Error
+#define AT91C_CAN_BERR        ((unsigned int) 0x1 << 28) // (CAN) Bit Error
+// -------- CAN_IDR : (CAN Offset: 0x8) CAN Interrupt Disable Register -------- 
+// -------- CAN_IMR : (CAN Offset: 0xc) CAN Interrupt Mask Register -------- 
+// -------- CAN_SR : (CAN Offset: 0x10) CAN Status Register -------- 
+#define AT91C_CAN_RBSY        ((unsigned int) 0x1 << 29) // (CAN) Receiver Busy
+#define AT91C_CAN_TBSY        ((unsigned int) 0x1 << 30) // (CAN) Transmitter Busy
+#define AT91C_CAN_OVLY        ((unsigned int) 0x1 << 31) // (CAN) Overload Busy
+// -------- CAN_BR : (CAN Offset: 0x14) CAN Baudrate Register -------- 
+#define AT91C_CAN_PHASE2      ((unsigned int) 0x7 <<  0) // (CAN) Phase 2 segment
+#define AT91C_CAN_PHASE1      ((unsigned int) 0x7 <<  4) // (CAN) Phase 1 segment
+#define AT91C_CAN_PROPAG      ((unsigned int) 0x7 <<  8) // (CAN) Programmation time segment
+#define AT91C_CAN_SYNC        ((unsigned int) 0x3 << 12) // (CAN) Re-synchronization jump width segment
+#define AT91C_CAN_BRP         ((unsigned int) 0x7F << 16) // (CAN) Baudrate Prescaler
+#define AT91C_CAN_SMP         ((unsigned int) 0x1 << 24) // (CAN) Sampling mode
+// -------- CAN_TIM : (CAN Offset: 0x18) CAN Timer Register -------- 
+#define AT91C_CAN_TIMER       ((unsigned int) 0xFFFF <<  0) // (CAN) Timer field
+// -------- CAN_TIMESTP : (CAN Offset: 0x1c) CAN Timestamp Register -------- 
+// -------- CAN_ECR : (CAN Offset: 0x20) CAN Error Counter Register -------- 
+#define AT91C_CAN_REC         ((unsigned int) 0xFF <<  0) // (CAN) Receive Error Counter
+#define AT91C_CAN_TEC         ((unsigned int) 0xFF << 16) // (CAN) Transmit Error Counter
+// -------- CAN_TCR : (CAN Offset: 0x24) CAN Transfer Command Register -------- 
+#define AT91C_CAN_TIMRST      ((unsigned int) 0x1 << 31) // (CAN) Timer Reset Field
+// -------- CAN_ACR : (CAN Offset: 0x28) CAN Abort Command Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Ethernet MAC 10/100
+// *****************************************************************************
+typedef struct _AT91S_EMAC {
+	AT91_REG	 EMAC_NCR; 	// Network Control Register
+	AT91_REG	 EMAC_NCFGR; 	// Network Configuration Register
+	AT91_REG	 EMAC_NSR; 	// Network Status Register
+	AT91_REG	 Reserved0[2]; 	// 
+	AT91_REG	 EMAC_TSR; 	// Transmit Status Register
+	AT91_REG	 EMAC_RBQP; 	// Receive Buffer Queue Pointer
+	AT91_REG	 EMAC_TBQP; 	// Transmit Buffer Queue Pointer
+	AT91_REG	 EMAC_RSR; 	// Receive Status Register
+	AT91_REG	 EMAC_ISR; 	// Interrupt Status Register
+	AT91_REG	 EMAC_IER; 	// Interrupt Enable Register
+	AT91_REG	 EMAC_IDR; 	// Interrupt Disable Register
+	AT91_REG	 EMAC_IMR; 	// Interrupt Mask Register
+	AT91_REG	 EMAC_MAN; 	// PHY Maintenance Register
+	AT91_REG	 EMAC_PTR; 	// Pause Time Register
+	AT91_REG	 EMAC_PFR; 	// Pause Frames received Register
+	AT91_REG	 EMAC_FTO; 	// Frames Transmitted OK Register
+	AT91_REG	 EMAC_SCF; 	// Single Collision Frame Register
+	AT91_REG	 EMAC_MCF; 	// Multiple Collision Frame Register
+	AT91_REG	 EMAC_FRO; 	// Frames Received OK Register
+	AT91_REG	 EMAC_FCSE; 	// Frame Check Sequence Error Register
+	AT91_REG	 EMAC_ALE; 	// Alignment Error Register
+	AT91_REG	 EMAC_DTF; 	// Deferred Transmission Frame Register
+	AT91_REG	 EMAC_LCOL; 	// Late Collision Register
+	AT91_REG	 EMAC_ECOL; 	// Excessive Collision Register
+	AT91_REG	 EMAC_TUND; 	// Transmit Underrun Error Register
+	AT91_REG	 EMAC_CSE; 	// Carrier Sense Error Register
+	AT91_REG	 EMAC_RRE; 	// Receive Ressource Error Register
+	AT91_REG	 EMAC_ROV; 	// Receive Overrun Errors Register
+	AT91_REG	 EMAC_RSE; 	// Receive Symbol Errors Register
+	AT91_REG	 EMAC_ELE; 	// Excessive Length Errors Register
+	AT91_REG	 EMAC_RJA; 	// Receive Jabbers Register
+	AT91_REG	 EMAC_USF; 	// Undersize Frames Register
+	AT91_REG	 EMAC_STE; 	// SQE Test Error Register
+	AT91_REG	 EMAC_RLE; 	// Receive Length Field Mismatch Register
+	AT91_REG	 EMAC_TPF; 	// Transmitted Pause Frames Register
+	AT91_REG	 EMAC_HRB; 	// Hash Address Bottom[31:0]
+	AT91_REG	 EMAC_HRT; 	// Hash Address Top[63:32]
+	AT91_REG	 EMAC_SA1L; 	// Specific Address 1 Bottom, First 4 bytes
+	AT91_REG	 EMAC_SA1H; 	// Specific Address 1 Top, Last 2 bytes
+	AT91_REG	 EMAC_SA2L; 	// Specific Address 2 Bottom, First 4 bytes
+	AT91_REG	 EMAC_SA2H; 	// Specific Address 2 Top, Last 2 bytes
+	AT91_REG	 EMAC_SA3L; 	// Specific Address 3 Bottom, First 4 bytes
+	AT91_REG	 EMAC_SA3H; 	// Specific Address 3 Top, Last 2 bytes
+	AT91_REG	 EMAC_SA4L; 	// Specific Address 4 Bottom, First 4 bytes
+	AT91_REG	 EMAC_SA4H; 	// Specific Address 4 Top, Last 2 bytes
+	AT91_REG	 EMAC_TID; 	// Type ID Checking Register
+	AT91_REG	 EMAC_TPQ; 	// Transmit Pause Quantum Register
+	AT91_REG	 EMAC_USRIO; 	// USER Input/Output Register
+	AT91_REG	 EMAC_WOL; 	// Wake On LAN Register
+	AT91_REG	 Reserved1[13]; 	// 
+	AT91_REG	 EMAC_REV; 	// Revision Register
+} AT91S_EMAC, *AT91PS_EMAC;
+
+// -------- EMAC_NCR : (EMAC Offset: 0x0)  -------- 
+#define AT91C_EMAC_LB         ((unsigned int) 0x1 <<  0) // (EMAC) Loopback. Optional. When set, loopback signal is at high level.
+#define AT91C_EMAC_LLB        ((unsigned int) 0x1 <<  1) // (EMAC) Loopback local. 
+#define AT91C_EMAC_RE         ((unsigned int) 0x1 <<  2) // (EMAC) Receive enable. 
+#define AT91C_EMAC_TE         ((unsigned int) 0x1 <<  3) // (EMAC) Transmit enable. 
+#define AT91C_EMAC_MPE        ((unsigned int) 0x1 <<  4) // (EMAC) Management port enable. 
+#define AT91C_EMAC_CLRSTAT    ((unsigned int) 0x1 <<  5) // (EMAC) Clear statistics registers. 
+#define AT91C_EMAC_INCSTAT    ((unsigned int) 0x1 <<  6) // (EMAC) Increment statistics registers. 
+#define AT91C_EMAC_WESTAT     ((unsigned int) 0x1 <<  7) // (EMAC) Write enable for statistics registers. 
+#define AT91C_EMAC_BP         ((unsigned int) 0x1 <<  8) // (EMAC) Back pressure. 
+#define AT91C_EMAC_TSTART     ((unsigned int) 0x1 <<  9) // (EMAC) Start Transmission. 
+#define AT91C_EMAC_THALT      ((unsigned int) 0x1 << 10) // (EMAC) Transmission Halt. 
+#define AT91C_EMAC_TPFR       ((unsigned int) 0x1 << 11) // (EMAC) Transmit pause frame 
+#define AT91C_EMAC_TZQ        ((unsigned int) 0x1 << 12) // (EMAC) Transmit zero quantum pause frame
+// -------- EMAC_NCFGR : (EMAC Offset: 0x4) Network Configuration Register -------- 
+#define AT91C_EMAC_SPD        ((unsigned int) 0x1 <<  0) // (EMAC) Speed. 
+#define AT91C_EMAC_FD         ((unsigned int) 0x1 <<  1) // (EMAC) Full duplex. 
+#define AT91C_EMAC_JFRAME     ((unsigned int) 0x1 <<  3) // (EMAC) Jumbo Frames. 
+#define AT91C_EMAC_CAF        ((unsigned int) 0x1 <<  4) // (EMAC) Copy all frames. 
+#define AT91C_EMAC_NBC        ((unsigned int) 0x1 <<  5) // (EMAC) No broadcast. 
+#define AT91C_EMAC_MTI        ((unsigned int) 0x1 <<  6) // (EMAC) Multicast hash event enable
+#define AT91C_EMAC_UNI        ((unsigned int) 0x1 <<  7) // (EMAC) Unicast hash enable. 
+#define AT91C_EMAC_BIG        ((unsigned int) 0x1 <<  8) // (EMAC) Receive 1522 bytes. 
+#define AT91C_EMAC_EAE        ((unsigned int) 0x1 <<  9) // (EMAC) External address match enable. 
+#define AT91C_EMAC_CLK        ((unsigned int) 0x3 << 10) // (EMAC) 
+#define 	AT91C_EMAC_CLK_HCLK_8               ((unsigned int) 0x0 << 10) // (EMAC) HCLK divided by 8
+#define 	AT91C_EMAC_CLK_HCLK_16              ((unsigned int) 0x1 << 10) // (EMAC) HCLK divided by 16
+#define 	AT91C_EMAC_CLK_HCLK_32              ((unsigned int) 0x2 << 10) // (EMAC) HCLK divided by 32
+#define 	AT91C_EMAC_CLK_HCLK_64              ((unsigned int) 0x3 << 10) // (EMAC) HCLK divided by 64
+#define AT91C_EMAC_RTY        ((unsigned int) 0x1 << 12) // (EMAC) 
+#define AT91C_EMAC_PAE        ((unsigned int) 0x1 << 13) // (EMAC) 
+#define AT91C_EMAC_RBOF       ((unsigned int) 0x3 << 14) // (EMAC) 
+#define 	AT91C_EMAC_RBOF_OFFSET_0             ((unsigned int) 0x0 << 14) // (EMAC) no offset from start of receive buffer
+#define 	AT91C_EMAC_RBOF_OFFSET_1             ((unsigned int) 0x1 << 14) // (EMAC) one byte offset from start of receive buffer
+#define 	AT91C_EMAC_RBOF_OFFSET_2             ((unsigned int) 0x2 << 14) // (EMAC) two bytes offset from start of receive buffer
+#define 	AT91C_EMAC_RBOF_OFFSET_3             ((unsigned int) 0x3 << 14) // (EMAC) three bytes offset from start of receive buffer
+#define AT91C_EMAC_RLCE       ((unsigned int) 0x1 << 16) // (EMAC) Receive Length field Checking Enable
+#define AT91C_EMAC_DRFCS      ((unsigned int) 0x1 << 17) // (EMAC) Discard Receive FCS
+#define AT91C_EMAC_EFRHD      ((unsigned int) 0x1 << 18) // (EMAC) 
+#define AT91C_EMAC_IRXFCS     ((unsigned int) 0x1 << 19) // (EMAC) Ignore RX FCS
+// -------- EMAC_NSR : (EMAC Offset: 0x8) Network Status Register -------- 
+#define AT91C_EMAC_LINKR      ((unsigned int) 0x1 <<  0) // (EMAC) 
+#define AT91C_EMAC_MDIO       ((unsigned int) 0x1 <<  1) // (EMAC) 
+#define AT91C_EMAC_IDLE       ((unsigned int) 0x1 <<  2) // (EMAC) 
+// -------- EMAC_TSR : (EMAC Offset: 0x14) Transmit Status Register -------- 
+#define AT91C_EMAC_UBR        ((unsigned int) 0x1 <<  0) // (EMAC) 
+#define AT91C_EMAC_COL        ((unsigned int) 0x1 <<  1) // (EMAC) 
+#define AT91C_EMAC_RLES       ((unsigned int) 0x1 <<  2) // (EMAC) 
+#define AT91C_EMAC_TGO        ((unsigned int) 0x1 <<  3) // (EMAC) Transmit Go
+#define AT91C_EMAC_BEX        ((unsigned int) 0x1 <<  4) // (EMAC) Buffers exhausted mid frame
+#define AT91C_EMAC_COMP       ((unsigned int) 0x1 <<  5) // (EMAC) 
+#define AT91C_EMAC_UND        ((unsigned int) 0x1 <<  6) // (EMAC) 
+// -------- EMAC_RSR : (EMAC Offset: 0x20) Receive Status Register -------- 
+#define AT91C_EMAC_BNA        ((unsigned int) 0x1 <<  0) // (EMAC) 
+#define AT91C_EMAC_REC        ((unsigned int) 0x1 <<  1) // (EMAC) 
+#define AT91C_EMAC_OVR        ((unsigned int) 0x1 <<  2) // (EMAC) 
+// -------- EMAC_ISR : (EMAC Offset: 0x24) Interrupt Status Register -------- 
+#define AT91C_EMAC_MFD        ((unsigned int) 0x1 <<  0) // (EMAC) 
+#define AT91C_EMAC_RCOMP      ((unsigned int) 0x1 <<  1) // (EMAC) 
+#define AT91C_EMAC_RXUBR      ((unsigned int) 0x1 <<  2) // (EMAC) 
+#define AT91C_EMAC_TXUBR      ((unsigned int) 0x1 <<  3) // (EMAC) 
+#define AT91C_EMAC_TUNDR      ((unsigned int) 0x1 <<  4) // (EMAC) 
+#define AT91C_EMAC_RLEX       ((unsigned int) 0x1 <<  5) // (EMAC) 
+#define AT91C_EMAC_TXERR      ((unsigned int) 0x1 <<  6) // (EMAC) 
+#define AT91C_EMAC_TCOMP      ((unsigned int) 0x1 <<  7) // (EMAC) 
+#define AT91C_EMAC_LINK       ((unsigned int) 0x1 <<  9) // (EMAC) 
+#define AT91C_EMAC_ROVR       ((unsigned int) 0x1 << 10) // (EMAC) 
+#define AT91C_EMAC_HRESP      ((unsigned int) 0x1 << 11) // (EMAC) 
+#define AT91C_EMAC_PFRE       ((unsigned int) 0x1 << 12) // (EMAC) 
+#define AT91C_EMAC_PTZ        ((unsigned int) 0x1 << 13) // (EMAC) 
+// -------- EMAC_IER : (EMAC Offset: 0x28) Interrupt Enable Register -------- 
+// -------- EMAC_IDR : (EMAC Offset: 0x2c) Interrupt Disable Register -------- 
+// -------- EMAC_IMR : (EMAC Offset: 0x30) Interrupt Mask Register -------- 
+// -------- EMAC_MAN : (EMAC Offset: 0x34) PHY Maintenance Register -------- 
+#define AT91C_EMAC_DATA       ((unsigned int) 0xFFFF <<  0) // (EMAC) 
+#define AT91C_EMAC_CODE       ((unsigned int) 0x3 << 16) // (EMAC) 
+#define AT91C_EMAC_REGA       ((unsigned int) 0x1F << 18) // (EMAC) 
+#define AT91C_EMAC_PHYA       ((unsigned int) 0x1F << 23) // (EMAC) 
+#define AT91C_EMAC_RW         ((unsigned int) 0x3 << 28) // (EMAC) 
+#define AT91C_EMAC_SOF        ((unsigned int) 0x3 << 30) // (EMAC) 
+// -------- EMAC_USRIO : (EMAC Offset: 0xc0) USER Input Output Register -------- 
+#define AT91C_EMAC_RMII       ((unsigned int) 0x1 <<  0) // (EMAC) Reduce MII
+#define AT91C_EMAC_CLKEN      ((unsigned int) 0x1 <<  1) // (EMAC) Clock Enable
+// -------- EMAC_WOL : (EMAC Offset: 0xc4) Wake On LAN Register -------- 
+#define AT91C_EMAC_IP         ((unsigned int) 0xFFFF <<  0) // (EMAC) ARP request IP address
+#define AT91C_EMAC_MAG        ((unsigned int) 0x1 << 16) // (EMAC) Magic packet event enable
+#define AT91C_EMAC_ARP        ((unsigned int) 0x1 << 17) // (EMAC) ARP request event enable
+#define AT91C_EMAC_SA1        ((unsigned int) 0x1 << 18) // (EMAC) Specific address register 1 event enable
+// -------- EMAC_REV : (EMAC Offset: 0xfc) Revision Register -------- 
+#define AT91C_EMAC_REVREF     ((unsigned int) 0xFFFF <<  0) // (EMAC) 
+#define AT91C_EMAC_PARTREF    ((unsigned int) 0xFFFF << 16) // (EMAC) 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Analog to Digital Convertor
+// *****************************************************************************
+typedef struct _AT91S_ADC {
+	AT91_REG	 ADC_CR; 	// ADC Control Register
+	AT91_REG	 ADC_MR; 	// ADC Mode Register
+	AT91_REG	 Reserved0[2]; 	// 
+	AT91_REG	 ADC_CHER; 	// ADC Channel Enable Register
+	AT91_REG	 ADC_CHDR; 	// ADC Channel Disable Register
+	AT91_REG	 ADC_CHSR; 	// ADC Channel Status Register
+	AT91_REG	 ADC_SR; 	// ADC Status Register
+	AT91_REG	 ADC_LCDR; 	// ADC Last Converted Data Register
+	AT91_REG	 ADC_IER; 	// ADC Interrupt Enable Register
+	AT91_REG	 ADC_IDR; 	// ADC Interrupt Disable Register
+	AT91_REG	 ADC_IMR; 	// ADC Interrupt Mask Register
+	AT91_REG	 ADC_CDR0; 	// ADC Channel Data Register 0
+	AT91_REG	 ADC_CDR1; 	// ADC Channel Data Register 1
+	AT91_REG	 ADC_CDR2; 	// ADC Channel Data Register 2
+	AT91_REG	 ADC_CDR3; 	// ADC Channel Data Register 3
+	AT91_REG	 ADC_CDR4; 	// ADC Channel Data Register 4
+	AT91_REG	 ADC_CDR5; 	// ADC Channel Data Register 5
+	AT91_REG	 ADC_CDR6; 	// ADC Channel Data Register 6
+	AT91_REG	 ADC_CDR7; 	// ADC Channel Data Register 7
+	AT91_REG	 Reserved1[44]; 	// 
+	AT91_REG	 ADC_RPR; 	// Receive Pointer Register
+	AT91_REG	 ADC_RCR; 	// Receive Counter Register
+	AT91_REG	 ADC_TPR; 	// Transmit Pointer Register
+	AT91_REG	 ADC_TCR; 	// Transmit Counter Register
+	AT91_REG	 ADC_RNPR; 	// Receive Next Pointer Register
+	AT91_REG	 ADC_RNCR; 	// Receive Next Counter Register
+	AT91_REG	 ADC_TNPR; 	// Transmit Next Pointer Register
+	AT91_REG	 ADC_TNCR; 	// Transmit Next Counter Register
+	AT91_REG	 ADC_PTCR; 	// PDC Transfer Control Register
+	AT91_REG	 ADC_PTSR; 	// PDC Transfer Status Register
+} AT91S_ADC, *AT91PS_ADC;
+
+// -------- ADC_CR : (ADC Offset: 0x0) ADC Control Register -------- 
+#define AT91C_ADC_SWRST       ((unsigned int) 0x1 <<  0) // (ADC) Software Reset
+#define AT91C_ADC_START       ((unsigned int) 0x1 <<  1) // (ADC) Start Conversion
+// -------- ADC_MR : (ADC Offset: 0x4) ADC Mode Register -------- 
+#define AT91C_ADC_TRGEN       ((unsigned int) 0x1 <<  0) // (ADC) Trigger Enable
+#define 	AT91C_ADC_TRGEN_DIS                  ((unsigned int) 0x0) // (ADC) Hradware triggers are disabled. Starting a conversion is only possible by software
+#define 	AT91C_ADC_TRGEN_EN                   ((unsigned int) 0x1) // (ADC) Hardware trigger selected by TRGSEL field is enabled.
+#define AT91C_ADC_TRGSEL      ((unsigned int) 0x7 <<  1) // (ADC) Trigger Selection
+#define 	AT91C_ADC_TRGSEL_TIOA0                ((unsigned int) 0x0 <<  1) // (ADC) Selected TRGSEL = TIAO0
+#define 	AT91C_ADC_TRGSEL_TIOA1                ((unsigned int) 0x1 <<  1) // (ADC) Selected TRGSEL = TIAO1
+#define 	AT91C_ADC_TRGSEL_TIOA2                ((unsigned int) 0x2 <<  1) // (ADC) Selected TRGSEL = TIAO2
+#define 	AT91C_ADC_TRGSEL_TIOA3                ((unsigned int) 0x3 <<  1) // (ADC) Selected TRGSEL = TIAO3
+#define 	AT91C_ADC_TRGSEL_TIOA4                ((unsigned int) 0x4 <<  1) // (ADC) Selected TRGSEL = TIAO4
+#define 	AT91C_ADC_TRGSEL_TIOA5                ((unsigned int) 0x5 <<  1) // (ADC) Selected TRGSEL = TIAO5
+#define 	AT91C_ADC_TRGSEL_EXT                  ((unsigned int) 0x6 <<  1) // (ADC) Selected TRGSEL = External Trigger
+#define AT91C_ADC_LOWRES      ((unsigned int) 0x1 <<  4) // (ADC) Resolution.
+#define 	AT91C_ADC_LOWRES_10_BIT               ((unsigned int) 0x0 <<  4) // (ADC) 10-bit resolution
+#define 	AT91C_ADC_LOWRES_8_BIT                ((unsigned int) 0x1 <<  4) // (ADC) 8-bit resolution
+#define AT91C_ADC_SLEEP       ((unsigned int) 0x1 <<  5) // (ADC) Sleep Mode
+#define 	AT91C_ADC_SLEEP_NORMAL_MODE          ((unsigned int) 0x0 <<  5) // (ADC) Normal Mode
+#define 	AT91C_ADC_SLEEP_MODE                 ((unsigned int) 0x1 <<  5) // (ADC) Sleep Mode
+#define AT91C_ADC_PRESCAL     ((unsigned int) 0x3F <<  8) // (ADC) Prescaler rate selection
+#define AT91C_ADC_STARTUP     ((unsigned int) 0x1F << 16) // (ADC) Startup Time
+#define AT91C_ADC_SHTIM       ((unsigned int) 0xF << 24) // (ADC) Sample & Hold Time
+// -------- 	ADC_CHER : (ADC Offset: 0x10) ADC Channel Enable Register -------- 
+#define AT91C_ADC_CH0         ((unsigned int) 0x1 <<  0) // (ADC) Channel 0
+#define AT91C_ADC_CH1         ((unsigned int) 0x1 <<  1) // (ADC) Channel 1
+#define AT91C_ADC_CH2         ((unsigned int) 0x1 <<  2) // (ADC) Channel 2
+#define AT91C_ADC_CH3         ((unsigned int) 0x1 <<  3) // (ADC) Channel 3
+#define AT91C_ADC_CH4         ((unsigned int) 0x1 <<  4) // (ADC) Channel 4
+#define AT91C_ADC_CH5         ((unsigned int) 0x1 <<  5) // (ADC) Channel 5
+#define AT91C_ADC_CH6         ((unsigned int) 0x1 <<  6) // (ADC) Channel 6
+#define AT91C_ADC_CH7         ((unsigned int) 0x1 <<  7) // (ADC) Channel 7
+// -------- 	ADC_CHDR : (ADC Offset: 0x14) ADC Channel Disable Register -------- 
+// -------- 	ADC_CHSR : (ADC Offset: 0x18) ADC Channel Status Register -------- 
+// -------- ADC_SR : (ADC Offset: 0x1c) ADC Status Register -------- 
+#define AT91C_ADC_EOC0        ((unsigned int) 0x1 <<  0) // (ADC) End of Conversion
+#define AT91C_ADC_EOC1        ((unsigned int) 0x1 <<  1) // (ADC) End of Conversion
+#define AT91C_ADC_EOC2        ((unsigned int) 0x1 <<  2) // (ADC) End of Conversion
+#define AT91C_ADC_EOC3        ((unsigned int) 0x1 <<  3) // (ADC) End of Conversion
+#define AT91C_ADC_EOC4        ((unsigned int) 0x1 <<  4) // (ADC) End of Conversion
+#define AT91C_ADC_EOC5        ((unsigned int) 0x1 <<  5) // (ADC) End of Conversion
+#define AT91C_ADC_EOC6        ((unsigned int) 0x1 <<  6) // (ADC) End of Conversion
+#define AT91C_ADC_EOC7        ((unsigned int) 0x1 <<  7) // (ADC) End of Conversion
+#define AT91C_ADC_OVRE0       ((unsigned int) 0x1 <<  8) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE1       ((unsigned int) 0x1 <<  9) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE2       ((unsigned int) 0x1 << 10) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE3       ((unsigned int) 0x1 << 11) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE4       ((unsigned int) 0x1 << 12) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE5       ((unsigned int) 0x1 << 13) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE6       ((unsigned int) 0x1 << 14) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE7       ((unsigned int) 0x1 << 15) // (ADC) Overrun Error
+#define AT91C_ADC_DRDY        ((unsigned int) 0x1 << 16) // (ADC) Data Ready
+#define AT91C_ADC_GOVRE       ((unsigned int) 0x1 << 17) // (ADC) General Overrun
+#define AT91C_ADC_ENDRX       ((unsigned int) 0x1 << 18) // (ADC) End of Receiver Transfer
+#define AT91C_ADC_RXBUFF      ((unsigned int) 0x1 << 19) // (ADC) RXBUFF Interrupt
+// -------- ADC_LCDR : (ADC Offset: 0x20) ADC Last Converted Data Register -------- 
+#define AT91C_ADC_LDATA       ((unsigned int) 0x3FF <<  0) // (ADC) Last Data Converted
+// -------- ADC_IER : (ADC Offset: 0x24) ADC Interrupt Enable Register -------- 
+// -------- ADC_IDR : (ADC Offset: 0x28) ADC Interrupt Disable Register -------- 
+// -------- ADC_IMR : (ADC Offset: 0x2c) ADC Interrupt Mask Register -------- 
+// -------- ADC_CDR0 : (ADC Offset: 0x30) ADC Channel Data Register 0 -------- 
+#define AT91C_ADC_DATA        ((unsigned int) 0x3FF <<  0) // (ADC) Converted Data
+// -------- ADC_CDR1 : (ADC Offset: 0x34) ADC Channel Data Register 1 -------- 
+// -------- ADC_CDR2 : (ADC Offset: 0x38) ADC Channel Data Register 2 -------- 
+// -------- ADC_CDR3 : (ADC Offset: 0x3c) ADC Channel Data Register 3 -------- 
+// -------- ADC_CDR4 : (ADC Offset: 0x40) ADC Channel Data Register 4 -------- 
+// -------- ADC_CDR5 : (ADC Offset: 0x44) ADC Channel Data Register 5 -------- 
+// -------- ADC_CDR6 : (ADC Offset: 0x48) ADC Channel Data Register 6 -------- 
+// -------- ADC_CDR7 : (ADC Offset: 0x4c) ADC Channel Data Register 7 -------- 
+
+// *****************************************************************************
+//               REGISTER ADDRESS DEFINITION FOR AT91SAM7X256
+// *****************************************************************************
+// ========== Register definition for SYS peripheral ========== 
+// ========== Register definition for AIC peripheral ========== 
+#define AT91C_AIC_IVR   ((AT91_REG *) 	0xFFFFF100) // (AIC) IRQ Vector Register
+#define AT91C_AIC_SMR   ((AT91_REG *) 	0xFFFFF000) // (AIC) Source Mode Register
+#define AT91C_AIC_FVR   ((AT91_REG *) 	0xFFFFF104) // (AIC) FIQ Vector Register
+#define AT91C_AIC_DCR   ((AT91_REG *) 	0xFFFFF138) // (AIC) Debug Control Register (Protect)
+#define AT91C_AIC_EOICR ((AT91_REG *) 	0xFFFFF130) // (AIC) End of Interrupt Command Register
+#define AT91C_AIC_SVR   ((AT91_REG *) 	0xFFFFF080) // (AIC) Source Vector Register
+#define AT91C_AIC_FFSR  ((AT91_REG *) 	0xFFFFF148) // (AIC) Fast Forcing Status Register
+#define AT91C_AIC_ICCR  ((AT91_REG *) 	0xFFFFF128) // (AIC) Interrupt Clear Command Register
+#define AT91C_AIC_ISR   ((AT91_REG *) 	0xFFFFF108) // (AIC) Interrupt Status Register
+#define AT91C_AIC_IMR   ((AT91_REG *) 	0xFFFFF110) // (AIC) Interrupt Mask Register
+#define AT91C_AIC_IPR   ((AT91_REG *) 	0xFFFFF10C) // (AIC) Interrupt Pending Register
+#define AT91C_AIC_FFER  ((AT91_REG *) 	0xFFFFF140) // (AIC) Fast Forcing Enable Register
+#define AT91C_AIC_IECR  ((AT91_REG *) 	0xFFFFF120) // (AIC) Interrupt Enable Command Register
+#define AT91C_AIC_ISCR  ((AT91_REG *) 	0xFFFFF12C) // (AIC) Interrupt Set Command Register
+#define AT91C_AIC_FFDR  ((AT91_REG *) 	0xFFFFF144) // (AIC) Fast Forcing Disable Register
+#define AT91C_AIC_CISR  ((AT91_REG *) 	0xFFFFF114) // (AIC) Core Interrupt Status Register
+#define AT91C_AIC_IDCR  ((AT91_REG *) 	0xFFFFF124) // (AIC) Interrupt Disable Command Register
+#define AT91C_AIC_SPU   ((AT91_REG *) 	0xFFFFF134) // (AIC) Spurious Vector Register
+// ========== Register definition for PDC_DBGU peripheral ========== 
+#define AT91C_DBGU_TCR  ((AT91_REG *) 	0xFFFFF30C) // (PDC_DBGU) Transmit Counter Register
+#define AT91C_DBGU_RNPR ((AT91_REG *) 	0xFFFFF310) // (PDC_DBGU) Receive Next Pointer Register
+#define AT91C_DBGU_TNPR ((AT91_REG *) 	0xFFFFF318) // (PDC_DBGU) Transmit Next Pointer Register
+#define AT91C_DBGU_TPR  ((AT91_REG *) 	0xFFFFF308) // (PDC_DBGU) Transmit Pointer Register
+#define AT91C_DBGU_RPR  ((AT91_REG *) 	0xFFFFF300) // (PDC_DBGU) Receive Pointer Register
+#define AT91C_DBGU_RCR  ((AT91_REG *) 	0xFFFFF304) // (PDC_DBGU) Receive Counter Register
+#define AT91C_DBGU_RNCR ((AT91_REG *) 	0xFFFFF314) // (PDC_DBGU) Receive Next Counter Register
+#define AT91C_DBGU_PTCR ((AT91_REG *) 	0xFFFFF320) // (PDC_DBGU) PDC Transfer Control Register
+#define AT91C_DBGU_PTSR ((AT91_REG *) 	0xFFFFF324) // (PDC_DBGU) PDC Transfer Status Register
+#define AT91C_DBGU_TNCR ((AT91_REG *) 	0xFFFFF31C) // (PDC_DBGU) Transmit Next Counter Register
+// ========== Register definition for DBGU peripheral ========== 
+#define AT91C_DBGU_EXID ((AT91_REG *) 	0xFFFFF244) // (DBGU) Chip ID Extension Register
+#define AT91C_DBGU_BRGR ((AT91_REG *) 	0xFFFFF220) // (DBGU) Baud Rate Generator Register
+#define AT91C_DBGU_IDR  ((AT91_REG *) 	0xFFFFF20C) // (DBGU) Interrupt Disable Register
+#define AT91C_DBGU_CSR  ((AT91_REG *) 	0xFFFFF214) // (DBGU) Channel Status Register
+#define AT91C_DBGU_CIDR ((AT91_REG *) 	0xFFFFF240) // (DBGU) Chip ID Register
+#define AT91C_DBGU_MR   ((AT91_REG *) 	0xFFFFF204) // (DBGU) Mode Register
+#define AT91C_DBGU_IMR  ((AT91_REG *) 	0xFFFFF210) // (DBGU) Interrupt Mask Register
+#define AT91C_DBGU_CR   ((AT91_REG *) 	0xFFFFF200) // (DBGU) Control Register
+#define AT91C_DBGU_FNTR ((AT91_REG *) 	0xFFFFF248) // (DBGU) Force NTRST Register
+#define AT91C_DBGU_THR  ((AT91_REG *) 	0xFFFFF21C) // (DBGU) Transmitter Holding Register
+#define AT91C_DBGU_RHR  ((AT91_REG *) 	0xFFFFF218) // (DBGU) Receiver Holding Register
+#define AT91C_DBGU_IER  ((AT91_REG *) 	0xFFFFF208) // (DBGU) Interrupt Enable Register
+// ========== Register definition for PIOA peripheral ========== 
+#define AT91C_PIOA_ODR  ((AT91_REG *) 	0xFFFFF414) // (PIOA) Output Disable Registerr
+#define AT91C_PIOA_SODR ((AT91_REG *) 	0xFFFFF430) // (PIOA) Set Output Data Register
+#define AT91C_PIOA_ISR  ((AT91_REG *) 	0xFFFFF44C) // (PIOA) Interrupt Status Register
+#define AT91C_PIOA_ABSR ((AT91_REG *) 	0xFFFFF478) // (PIOA) AB Select Status Register
+#define AT91C_PIOA_IER  ((AT91_REG *) 	0xFFFFF440) // (PIOA) Interrupt Enable Register
+#define AT91C_PIOA_PPUDR ((AT91_REG *) 	0xFFFFF460) // (PIOA) Pull-up Disable Register
+#define AT91C_PIOA_IMR  ((AT91_REG *) 	0xFFFFF448) // (PIOA) Interrupt Mask Register
+#define AT91C_PIOA_PER  ((AT91_REG *) 	0xFFFFF400) // (PIOA) PIO Enable Register
+#define AT91C_PIOA_IFDR ((AT91_REG *) 	0xFFFFF424) // (PIOA) Input Filter Disable Register
+#define AT91C_PIOA_OWDR ((AT91_REG *) 	0xFFFFF4A4) // (PIOA) Output Write Disable Register
+#define AT91C_PIOA_MDSR ((AT91_REG *) 	0xFFFFF458) // (PIOA) Multi-driver Status Register
+#define AT91C_PIOA_IDR  ((AT91_REG *) 	0xFFFFF444) // (PIOA) Interrupt Disable Register
+#define AT91C_PIOA_ODSR ((AT91_REG *) 	0xFFFFF438) // (PIOA) Output Data Status Register
+#define AT91C_PIOA_PPUSR ((AT91_REG *) 	0xFFFFF468) // (PIOA) Pull-up Status Register
+#define AT91C_PIOA_OWSR ((AT91_REG *) 	0xFFFFF4A8) // (PIOA) Output Write Status Register
+#define AT91C_PIOA_BSR  ((AT91_REG *) 	0xFFFFF474) // (PIOA) Select B Register
+#define AT91C_PIOA_OWER ((AT91_REG *) 	0xFFFFF4A0) // (PIOA) Output Write Enable Register
+#define AT91C_PIOA_IFER ((AT91_REG *) 	0xFFFFF420) // (PIOA) Input Filter Enable Register
+#define AT91C_PIOA_PDSR ((AT91_REG *) 	0xFFFFF43C) // (PIOA) Pin Data Status Register
+#define AT91C_PIOA_PPUER ((AT91_REG *) 	0xFFFFF464) // (PIOA) Pull-up Enable Register
+#define AT91C_PIOA_OSR  ((AT91_REG *) 	0xFFFFF418) // (PIOA) Output Status Register
+#define AT91C_PIOA_ASR  ((AT91_REG *) 	0xFFFFF470) // (PIOA) Select A Register
+#define AT91C_PIOA_MDDR ((AT91_REG *) 	0xFFFFF454) // (PIOA) Multi-driver Disable Register
+#define AT91C_PIOA_CODR ((AT91_REG *) 	0xFFFFF434) // (PIOA) Clear Output Data Register
+#define AT91C_PIOA_MDER ((AT91_REG *) 	0xFFFFF450) // (PIOA) Multi-driver Enable Register
+#define AT91C_PIOA_PDR  ((AT91_REG *) 	0xFFFFF404) // (PIOA) PIO Disable Register
+#define AT91C_PIOA_IFSR ((AT91_REG *) 	0xFFFFF428) // (PIOA) Input Filter Status Register
+#define AT91C_PIOA_OER  ((AT91_REG *) 	0xFFFFF410) // (PIOA) Output Enable Register
+#define AT91C_PIOA_PSR  ((AT91_REG *) 	0xFFFFF408) // (PIOA) PIO Status Register
+// ========== Register definition for PIOB peripheral ========== 
+#define AT91C_PIOB_OWDR ((AT91_REG *) 	0xFFFFF6A4) // (PIOB) Output Write Disable Register
+#define AT91C_PIOB_MDER ((AT91_REG *) 	0xFFFFF650) // (PIOB) Multi-driver Enable Register
+#define AT91C_PIOB_PPUSR ((AT91_REG *) 	0xFFFFF668) // (PIOB) Pull-up Status Register
+#define AT91C_PIOB_IMR  ((AT91_REG *) 	0xFFFFF648) // (PIOB) Interrupt Mask Register
+#define AT91C_PIOB_ASR  ((AT91_REG *) 	0xFFFFF670) // (PIOB) Select A Register
+#define AT91C_PIOB_PPUDR ((AT91_REG *) 	0xFFFFF660) // (PIOB) Pull-up Disable Register
+#define AT91C_PIOB_PSR  ((AT91_REG *) 	0xFFFFF608) // (PIOB) PIO Status Register
+#define AT91C_PIOB_IER  ((AT91_REG *) 	0xFFFFF640) // (PIOB) Interrupt Enable Register
+#define AT91C_PIOB_CODR ((AT91_REG *) 	0xFFFFF634) // (PIOB) Clear Output Data Register
+#define AT91C_PIOB_OWER ((AT91_REG *) 	0xFFFFF6A0) // (PIOB) Output Write Enable Register
+#define AT91C_PIOB_ABSR ((AT91_REG *) 	0xFFFFF678) // (PIOB) AB Select Status Register
+#define AT91C_PIOB_IFDR ((AT91_REG *) 	0xFFFFF624) // (PIOB) Input Filter Disable Register
+#define AT91C_PIOB_PDSR ((AT91_REG *) 	0xFFFFF63C) // (PIOB) Pin Data Status Register
+#define AT91C_PIOB_IDR  ((AT91_REG *) 	0xFFFFF644) // (PIOB) Interrupt Disable Register
+#define AT91C_PIOB_OWSR ((AT91_REG *) 	0xFFFFF6A8) // (PIOB) Output Write Status Register
+#define AT91C_PIOB_PDR  ((AT91_REG *) 	0xFFFFF604) // (PIOB) PIO Disable Register
+#define AT91C_PIOB_ODR  ((AT91_REG *) 	0xFFFFF614) // (PIOB) Output Disable Registerr
+#define AT91C_PIOB_IFSR ((AT91_REG *) 	0xFFFFF628) // (PIOB) Input Filter Status Register
+#define AT91C_PIOB_PPUER ((AT91_REG *) 	0xFFFFF664) // (PIOB) Pull-up Enable Register
+#define AT91C_PIOB_SODR ((AT91_REG *) 	0xFFFFF630) // (PIOB) Set Output Data Register
+#define AT91C_PIOB_ISR  ((AT91_REG *) 	0xFFFFF64C) // (PIOB) Interrupt Status Register
+#define AT91C_PIOB_ODSR ((AT91_REG *) 	0xFFFFF638) // (PIOB) Output Data Status Register
+#define AT91C_PIOB_OSR  ((AT91_REG *) 	0xFFFFF618) // (PIOB) Output Status Register
+#define AT91C_PIOB_MDSR ((AT91_REG *) 	0xFFFFF658) // (PIOB) Multi-driver Status Register
+#define AT91C_PIOB_IFER ((AT91_REG *) 	0xFFFFF620) // (PIOB) Input Filter Enable Register
+#define AT91C_PIOB_BSR  ((AT91_REG *) 	0xFFFFF674) // (PIOB) Select B Register
+#define AT91C_PIOB_MDDR ((AT91_REG *) 	0xFFFFF654) // (PIOB) Multi-driver Disable Register
+#define AT91C_PIOB_OER  ((AT91_REG *) 	0xFFFFF610) // (PIOB) Output Enable Register
+#define AT91C_PIOB_PER  ((AT91_REG *) 	0xFFFFF600) // (PIOB) PIO Enable Register
+// ========== Register definition for CKGR peripheral ========== 
+#define AT91C_CKGR_MOR  ((AT91_REG *) 	0xFFFFFC20) // (CKGR) Main Oscillator Register
+#define AT91C_CKGR_PLLR ((AT91_REG *) 	0xFFFFFC2C) // (CKGR) PLL Register
+#define AT91C_CKGR_MCFR ((AT91_REG *) 	0xFFFFFC24) // (CKGR) Main Clock  Frequency Register
+// ========== Register definition for PMC peripheral ========== 
+#define AT91C_PMC_IDR   ((AT91_REG *) 	0xFFFFFC64) // (PMC) Interrupt Disable Register
+#define AT91C_PMC_MOR   ((AT91_REG *) 	0xFFFFFC20) // (PMC) Main Oscillator Register
+#define AT91C_PMC_PLLR  ((AT91_REG *) 	0xFFFFFC2C) // (PMC) PLL Register
+#define AT91C_PMC_PCER  ((AT91_REG *) 	0xFFFFFC10) // (PMC) Peripheral Clock Enable Register
+#define AT91C_PMC_PCKR  ((AT91_REG *) 	0xFFFFFC40) // (PMC) Programmable Clock Register
+#define AT91C_PMC_MCKR  ((AT91_REG *) 	0xFFFFFC30) // (PMC) Master Clock Register
+#define AT91C_PMC_SCDR  ((AT91_REG *) 	0xFFFFFC04) // (PMC) System Clock Disable Register
+#define AT91C_PMC_PCDR  ((AT91_REG *) 	0xFFFFFC14) // (PMC) Peripheral Clock Disable Register
+#define AT91C_PMC_SCSR  ((AT91_REG *) 	0xFFFFFC08) // (PMC) System Clock Status Register
+#define AT91C_PMC_PCSR  ((AT91_REG *) 	0xFFFFFC18) // (PMC) Peripheral Clock Status Register
+#define AT91C_PMC_MCFR  ((AT91_REG *) 	0xFFFFFC24) // (PMC) Main Clock  Frequency Register
+#define AT91C_PMC_SCER  ((AT91_REG *) 	0xFFFFFC00) // (PMC) System Clock Enable Register
+#define AT91C_PMC_IMR   ((AT91_REG *) 	0xFFFFFC6C) // (PMC) Interrupt Mask Register
+#define AT91C_PMC_IER   ((AT91_REG *) 	0xFFFFFC60) // (PMC) Interrupt Enable Register
+#define AT91C_PMC_SR    ((AT91_REG *) 	0xFFFFFC68) // (PMC) Status Register
+// ========== Register definition for RSTC peripheral ========== 
+#define AT91C_RSTC_RCR  ((AT91_REG *) 	0xFFFFFD00) // (RSTC) Reset Control Register
+#define AT91C_RSTC_RMR  ((AT91_REG *) 	0xFFFFFD08) // (RSTC) Reset Mode Register
+#define AT91C_RSTC_RSR  ((AT91_REG *) 	0xFFFFFD04) // (RSTC) Reset Status Register
+// ========== Register definition for RTTC peripheral ========== 
+#define AT91C_RTTC_RTSR ((AT91_REG *) 	0xFFFFFD2C) // (RTTC) Real-time Status Register
+#define AT91C_RTTC_RTMR ((AT91_REG *) 	0xFFFFFD20) // (RTTC) Real-time Mode Register
+#define AT91C_RTTC_RTVR ((AT91_REG *) 	0xFFFFFD28) // (RTTC) Real-time Value Register
+#define AT91C_RTTC_RTAR ((AT91_REG *) 	0xFFFFFD24) // (RTTC) Real-time Alarm Register
+// ========== Register definition for PITC peripheral ========== 
+#define AT91C_PITC_PIVR ((AT91_REG *) 	0xFFFFFD38) // (PITC) Period Interval Value Register
+#define AT91C_PITC_PISR ((AT91_REG *) 	0xFFFFFD34) // (PITC) Period Interval Status Register
+#define AT91C_PITC_PIIR ((AT91_REG *) 	0xFFFFFD3C) // (PITC) Period Interval Image Register
+#define AT91C_PITC_PIMR ((AT91_REG *) 	0xFFFFFD30) // (PITC) Period Interval Mode Register
+// ========== Register definition for WDTC peripheral ========== 
+#define AT91C_WDTC_WDCR ((AT91_REG *) 	0xFFFFFD40) // (WDTC) Watchdog Control Register
+#define AT91C_WDTC_WDSR ((AT91_REG *) 	0xFFFFFD48) // (WDTC) Watchdog Status Register
+#define AT91C_WDTC_WDMR ((AT91_REG *) 	0xFFFFFD44) // (WDTC) Watchdog Mode Register
+// ========== Register definition for VREG peripheral ========== 
+#define AT91C_VREG_MR   ((AT91_REG *) 	0xFFFFFD60) // (VREG) Voltage Regulator Mode Register
+// ========== Register definition for MC peripheral ========== 
+#define AT91C_MC_ASR    ((AT91_REG *) 	0xFFFFFF04) // (MC) MC Abort Status Register
+#define AT91C_MC_RCR    ((AT91_REG *) 	0xFFFFFF00) // (MC) MC Remap Control Register
+#define AT91C_MC_FCR    ((AT91_REG *) 	0xFFFFFF64) // (MC) MC Flash Command Register
+#define AT91C_MC_AASR   ((AT91_REG *) 	0xFFFFFF08) // (MC) MC Abort Address Status Register
+#define AT91C_MC_FSR    ((AT91_REG *) 	0xFFFFFF68) // (MC) MC Flash Status Register
+#define AT91C_MC_FMR    ((AT91_REG *) 	0xFFFFFF60) // (MC) MC Flash Mode Register
+// ========== Register definition for PDC_SPI1 peripheral ========== 
+#define AT91C_SPI1_PTCR ((AT91_REG *) 	0xFFFE4120) // (PDC_SPI1) PDC Transfer Control Register
+#define AT91C_SPI1_RPR  ((AT91_REG *) 	0xFFFE4100) // (PDC_SPI1) Receive Pointer Register
+#define AT91C_SPI1_TNCR ((AT91_REG *) 	0xFFFE411C) // (PDC_SPI1) Transmit Next Counter Register
+#define AT91C_SPI1_TPR  ((AT91_REG *) 	0xFFFE4108) // (PDC_SPI1) Transmit Pointer Register
+#define AT91C_SPI1_TNPR ((AT91_REG *) 	0xFFFE4118) // (PDC_SPI1) Transmit Next Pointer Register
+#define AT91C_SPI1_TCR  ((AT91_REG *) 	0xFFFE410C) // (PDC_SPI1) Transmit Counter Register
+#define AT91C_SPI1_RCR  ((AT91_REG *) 	0xFFFE4104) // (PDC_SPI1) Receive Counter Register
+#define AT91C_SPI1_RNPR ((AT91_REG *) 	0xFFFE4110) // (PDC_SPI1) Receive Next Pointer Register
+#define AT91C_SPI1_RNCR ((AT91_REG *) 	0xFFFE4114) // (PDC_SPI1) Receive Next Counter Register
+#define AT91C_SPI1_PTSR ((AT91_REG *) 	0xFFFE4124) // (PDC_SPI1) PDC Transfer Status Register
+// ========== Register definition for SPI1 peripheral ========== 
+#define AT91C_SPI1_IMR  ((AT91_REG *) 	0xFFFE401C) // (SPI1) Interrupt Mask Register
+#define AT91C_SPI1_IER  ((AT91_REG *) 	0xFFFE4014) // (SPI1) Interrupt Enable Register
+#define AT91C_SPI1_MR   ((AT91_REG *) 	0xFFFE4004) // (SPI1) Mode Register
+#define AT91C_SPI1_RDR  ((AT91_REG *) 	0xFFFE4008) // (SPI1) Receive Data Register
+#define AT91C_SPI1_IDR  ((AT91_REG *) 	0xFFFE4018) // (SPI1) Interrupt Disable Register
+#define AT91C_SPI1_SR   ((AT91_REG *) 	0xFFFE4010) // (SPI1) Status Register
+#define AT91C_SPI1_TDR  ((AT91_REG *) 	0xFFFE400C) // (SPI1) Transmit Data Register
+#define AT91C_SPI1_CR   ((AT91_REG *) 	0xFFFE4000) // (SPI1) Control Register
+#define AT91C_SPI1_CSR  ((AT91_REG *) 	0xFFFE4030) // (SPI1) Chip Select Register
+// ========== Register definition for PDC_SPI0 peripheral ========== 
+#define AT91C_SPI0_PTCR ((AT91_REG *) 	0xFFFE0120) // (PDC_SPI0) PDC Transfer Control Register
+#define AT91C_SPI0_TPR  ((AT91_REG *) 	0xFFFE0108) // (PDC_SPI0) Transmit Pointer Register
+#define AT91C_SPI0_TCR  ((AT91_REG *) 	0xFFFE010C) // (PDC_SPI0) Transmit Counter Register
+#define AT91C_SPI0_RCR  ((AT91_REG *) 	0xFFFE0104) // (PDC_SPI0) Receive Counter Register
+#define AT91C_SPI0_PTSR ((AT91_REG *) 	0xFFFE0124) // (PDC_SPI0) PDC Transfer Status Register
+#define AT91C_SPI0_RNPR ((AT91_REG *) 	0xFFFE0110) // (PDC_SPI0) Receive Next Pointer Register
+#define AT91C_SPI0_RPR  ((AT91_REG *) 	0xFFFE0100) // (PDC_SPI0) Receive Pointer Register
+#define AT91C_SPI0_TNCR ((AT91_REG *) 	0xFFFE011C) // (PDC_SPI0) Transmit Next Counter Register
+#define AT91C_SPI0_RNCR ((AT91_REG *) 	0xFFFE0114) // (PDC_SPI0) Receive Next Counter Register
+#define AT91C_SPI0_TNPR ((AT91_REG *) 	0xFFFE0118) // (PDC_SPI0) Transmit Next Pointer Register
+// ========== Register definition for SPI0 peripheral ========== 
+#define AT91C_SPI0_IER  ((AT91_REG *) 	0xFFFE0014) // (SPI0) Interrupt Enable Register
+#define AT91C_SPI0_SR   ((AT91_REG *) 	0xFFFE0010) // (SPI0) Status Register
+#define AT91C_SPI0_IDR  ((AT91_REG *) 	0xFFFE0018) // (SPI0) Interrupt Disable Register
+#define AT91C_SPI0_CR   ((AT91_REG *) 	0xFFFE0000) // (SPI0) Control Register
+#define AT91C_SPI0_MR   ((AT91_REG *) 	0xFFFE0004) // (SPI0) Mode Register
+#define AT91C_SPI0_IMR  ((AT91_REG *) 	0xFFFE001C) // (SPI0) Interrupt Mask Register
+#define AT91C_SPI0_TDR  ((AT91_REG *) 	0xFFFE000C) // (SPI0) Transmit Data Register
+#define AT91C_SPI0_RDR  ((AT91_REG *) 	0xFFFE0008) // (SPI0) Receive Data Register
+#define AT91C_SPI0_CSR  ((AT91_REG *) 	0xFFFE0030) // (SPI0) Chip Select Register
+// ========== Register definition for PDC_US1 peripheral ========== 
+#define AT91C_US1_RNCR  ((AT91_REG *) 	0xFFFC4114) // (PDC_US1) Receive Next Counter Register
+#define AT91C_US1_PTCR  ((AT91_REG *) 	0xFFFC4120) // (PDC_US1) PDC Transfer Control Register
+#define AT91C_US1_TCR   ((AT91_REG *) 	0xFFFC410C) // (PDC_US1) Transmit Counter Register
+#define AT91C_US1_PTSR  ((AT91_REG *) 	0xFFFC4124) // (PDC_US1) PDC Transfer Status Register
+#define AT91C_US1_TNPR  ((AT91_REG *) 	0xFFFC4118) // (PDC_US1) Transmit Next Pointer Register
+#define AT91C_US1_RCR   ((AT91_REG *) 	0xFFFC4104) // (PDC_US1) Receive Counter Register
+#define AT91C_US1_RNPR  ((AT91_REG *) 	0xFFFC4110) // (PDC_US1) Receive Next Pointer Register
+#define AT91C_US1_RPR   ((AT91_REG *) 	0xFFFC4100) // (PDC_US1) Receive Pointer Register
+#define AT91C_US1_TNCR  ((AT91_REG *) 	0xFFFC411C) // (PDC_US1) Transmit Next Counter Register
+#define AT91C_US1_TPR   ((AT91_REG *) 	0xFFFC4108) // (PDC_US1) Transmit Pointer Register
+// ========== Register definition for US1 peripheral ========== 
+#define AT91C_US1_IF    ((AT91_REG *) 	0xFFFC404C) // (US1) IRDA_FILTER Register
+#define AT91C_US1_NER   ((AT91_REG *) 	0xFFFC4044) // (US1) Nb Errors Register
+#define AT91C_US1_RTOR  ((AT91_REG *) 	0xFFFC4024) // (US1) Receiver Time-out Register
+#define AT91C_US1_CSR   ((AT91_REG *) 	0xFFFC4014) // (US1) Channel Status Register
+#define AT91C_US1_IDR   ((AT91_REG *) 	0xFFFC400C) // (US1) Interrupt Disable Register
+#define AT91C_US1_IER   ((AT91_REG *) 	0xFFFC4008) // (US1) Interrupt Enable Register
+#define AT91C_US1_THR   ((AT91_REG *) 	0xFFFC401C) // (US1) Transmitter Holding Register
+#define AT91C_US1_TTGR  ((AT91_REG *) 	0xFFFC4028) // (US1) Transmitter Time-guard Register
+#define AT91C_US1_RHR   ((AT91_REG *) 	0xFFFC4018) // (US1) Receiver Holding Register
+#define AT91C_US1_BRGR  ((AT91_REG *) 	0xFFFC4020) // (US1) Baud Rate Generator Register
+#define AT91C_US1_IMR   ((AT91_REG *) 	0xFFFC4010) // (US1) Interrupt Mask Register
+#define AT91C_US1_FIDI  ((AT91_REG *) 	0xFFFC4040) // (US1) FI_DI_Ratio Register
+#define AT91C_US1_CR    ((AT91_REG *) 	0xFFFC4000) // (US1) Control Register
+#define AT91C_US1_MR    ((AT91_REG *) 	0xFFFC4004) // (US1) Mode Register
+// ========== Register definition for PDC_US0 peripheral ========== 
+#define AT91C_US0_TNPR  ((AT91_REG *) 	0xFFFC0118) // (PDC_US0) Transmit Next Pointer Register
+#define AT91C_US0_RNPR  ((AT91_REG *) 	0xFFFC0110) // (PDC_US0) Receive Next Pointer Register
+#define AT91C_US0_TCR   ((AT91_REG *) 	0xFFFC010C) // (PDC_US0) Transmit Counter Register
+#define AT91C_US0_PTCR  ((AT91_REG *) 	0xFFFC0120) // (PDC_US0) PDC Transfer Control Register
+#define AT91C_US0_PTSR  ((AT91_REG *) 	0xFFFC0124) // (PDC_US0) PDC Transfer Status Register
+#define AT91C_US0_TNCR  ((AT91_REG *) 	0xFFFC011C) // (PDC_US0) Transmit Next Counter Register
+#define AT91C_US0_TPR   ((AT91_REG *) 	0xFFFC0108) // (PDC_US0) Transmit Pointer Register
+#define AT91C_US0_RCR   ((AT91_REG *) 	0xFFFC0104) // (PDC_US0) Receive Counter Register
+#define AT91C_US0_RPR   ((AT91_REG *) 	0xFFFC0100) // (PDC_US0) Receive Pointer Register
+#define AT91C_US0_RNCR  ((AT91_REG *) 	0xFFFC0114) // (PDC_US0) Receive Next Counter Register
+// ========== Register definition for US0 peripheral ========== 
+#define AT91C_US0_BRGR  ((AT91_REG *) 	0xFFFC0020) // (US0) Baud Rate Generator Register
+#define AT91C_US0_NER   ((AT91_REG *) 	0xFFFC0044) // (US0) Nb Errors Register
+#define AT91C_US0_CR    ((AT91_REG *) 	0xFFFC0000) // (US0) Control Register
+#define AT91C_US0_IMR   ((AT91_REG *) 	0xFFFC0010) // (US0) Interrupt Mask Register
+#define AT91C_US0_FIDI  ((AT91_REG *) 	0xFFFC0040) // (US0) FI_DI_Ratio Register
+#define AT91C_US0_TTGR  ((AT91_REG *) 	0xFFFC0028) // (US0) Transmitter Time-guard Register
+#define AT91C_US0_MR    ((AT91_REG *) 	0xFFFC0004) // (US0) Mode Register
+#define AT91C_US0_RTOR  ((AT91_REG *) 	0xFFFC0024) // (US0) Receiver Time-out Register
+#define AT91C_US0_CSR   ((AT91_REG *) 	0xFFFC0014) // (US0) Channel Status Register
+#define AT91C_US0_RHR   ((AT91_REG *) 	0xFFFC0018) // (US0) Receiver Holding Register
+#define AT91C_US0_IDR   ((AT91_REG *) 	0xFFFC000C) // (US0) Interrupt Disable Register
+#define AT91C_US0_THR   ((AT91_REG *) 	0xFFFC001C) // (US0) Transmitter Holding Register
+#define AT91C_US0_IF    ((AT91_REG *) 	0xFFFC004C) // (US0) IRDA_FILTER Register
+#define AT91C_US0_IER   ((AT91_REG *) 	0xFFFC0008) // (US0) Interrupt Enable Register
+// ========== Register definition for PDC_SSC peripheral ========== 
+#define AT91C_SSC_TNCR  ((AT91_REG *) 	0xFFFD411C) // (PDC_SSC) Transmit Next Counter Register
+#define AT91C_SSC_RPR   ((AT91_REG *) 	0xFFFD4100) // (PDC_SSC) Receive Pointer Register
+#define AT91C_SSC_RNCR  ((AT91_REG *) 	0xFFFD4114) // (PDC_SSC) Receive Next Counter Register
+#define AT91C_SSC_TPR   ((AT91_REG *) 	0xFFFD4108) // (PDC_SSC) Transmit Pointer Register
+#define AT91C_SSC_PTCR  ((AT91_REG *) 	0xFFFD4120) // (PDC_SSC) PDC Transfer Control Register
+#define AT91C_SSC_TCR   ((AT91_REG *) 	0xFFFD410C) // (PDC_SSC) Transmit Counter Register
+#define AT91C_SSC_RCR   ((AT91_REG *) 	0xFFFD4104) // (PDC_SSC) Receive Counter Register
+#define AT91C_SSC_RNPR  ((AT91_REG *) 	0xFFFD4110) // (PDC_SSC) Receive Next Pointer Register
+#define AT91C_SSC_TNPR  ((AT91_REG *) 	0xFFFD4118) // (PDC_SSC) Transmit Next Pointer Register
+#define AT91C_SSC_PTSR  ((AT91_REG *) 	0xFFFD4124) // (PDC_SSC) PDC Transfer Status Register
+// ========== Register definition for SSC peripheral ========== 
+#define AT91C_SSC_RHR   ((AT91_REG *) 	0xFFFD4020) // (SSC) Receive Holding Register
+#define AT91C_SSC_RSHR  ((AT91_REG *) 	0xFFFD4030) // (SSC) Receive Sync Holding Register
+#define AT91C_SSC_TFMR  ((AT91_REG *) 	0xFFFD401C) // (SSC) Transmit Frame Mode Register
+#define AT91C_SSC_IDR   ((AT91_REG *) 	0xFFFD4048) // (SSC) Interrupt Disable Register
+#define AT91C_SSC_THR   ((AT91_REG *) 	0xFFFD4024) // (SSC) Transmit Holding Register
+#define AT91C_SSC_RCMR  ((AT91_REG *) 	0xFFFD4010) // (SSC) Receive Clock ModeRegister
+#define AT91C_SSC_IER   ((AT91_REG *) 	0xFFFD4044) // (SSC) Interrupt Enable Register
+#define AT91C_SSC_TSHR  ((AT91_REG *) 	0xFFFD4034) // (SSC) Transmit Sync Holding Register
+#define AT91C_SSC_SR    ((AT91_REG *) 	0xFFFD4040) // (SSC) Status Register
+#define AT91C_SSC_CMR   ((AT91_REG *) 	0xFFFD4004) // (SSC) Clock Mode Register
+#define AT91C_SSC_TCMR  ((AT91_REG *) 	0xFFFD4018) // (SSC) Transmit Clock Mode Register
+#define AT91C_SSC_CR    ((AT91_REG *) 	0xFFFD4000) // (SSC) Control Register
+#define AT91C_SSC_IMR   ((AT91_REG *) 	0xFFFD404C) // (SSC) Interrupt Mask Register
+#define AT91C_SSC_RFMR  ((AT91_REG *) 	0xFFFD4014) // (SSC) Receive Frame Mode Register
+// ========== Register definition for TWI peripheral ========== 
+#define AT91C_TWI_IER   ((AT91_REG *) 	0xFFFB8024) // (TWI) Interrupt Enable Register
+#define AT91C_TWI_CR    ((AT91_REG *) 	0xFFFB8000) // (TWI) Control Register
+#define AT91C_TWI_SR    ((AT91_REG *) 	0xFFFB8020) // (TWI) Status Register
+#define AT91C_TWI_IMR   ((AT91_REG *) 	0xFFFB802C) // (TWI) Interrupt Mask Register
+#define AT91C_TWI_THR   ((AT91_REG *) 	0xFFFB8034) // (TWI) Transmit Holding Register
+#define AT91C_TWI_IDR   ((AT91_REG *) 	0xFFFB8028) // (TWI) Interrupt Disable Register
+#define AT91C_TWI_IADR  ((AT91_REG *) 	0xFFFB800C) // (TWI) Internal Address Register
+#define AT91C_TWI_MMR   ((AT91_REG *) 	0xFFFB8004) // (TWI) Master Mode Register
+#define AT91C_TWI_CWGR  ((AT91_REG *) 	0xFFFB8010) // (TWI) Clock Waveform Generator Register
+#define AT91C_TWI_RHR   ((AT91_REG *) 	0xFFFB8030) // (TWI) Receive Holding Register
+// ========== Register definition for PWMC_CH3 peripheral ========== 
+#define AT91C_PWMC_CH3_CUPDR ((AT91_REG *) 	0xFFFCC270) // (PWMC_CH3) Channel Update Register
+#define AT91C_PWMC_CH3_Reserved ((AT91_REG *) 	0xFFFCC274) // (PWMC_CH3) Reserved
+#define AT91C_PWMC_CH3_CPRDR ((AT91_REG *) 	0xFFFCC268) // (PWMC_CH3) Channel Period Register
+#define AT91C_PWMC_CH3_CDTYR ((AT91_REG *) 	0xFFFCC264) // (PWMC_CH3) Channel Duty Cycle Register
+#define AT91C_PWMC_CH3_CCNTR ((AT91_REG *) 	0xFFFCC26C) // (PWMC_CH3) Channel Counter Register
+#define AT91C_PWMC_CH3_CMR ((AT91_REG *) 	0xFFFCC260) // (PWMC_CH3) Channel Mode Register
+// ========== Register definition for PWMC_CH2 peripheral ========== 
+#define AT91C_PWMC_CH2_Reserved ((AT91_REG *) 	0xFFFCC254) // (PWMC_CH2) Reserved
+#define AT91C_PWMC_CH2_CMR ((AT91_REG *) 	0xFFFCC240) // (PWMC_CH2) Channel Mode Register
+#define AT91C_PWMC_CH2_CCNTR ((AT91_REG *) 	0xFFFCC24C) // (PWMC_CH2) Channel Counter Register
+#define AT91C_PWMC_CH2_CPRDR ((AT91_REG *) 	0xFFFCC248) // (PWMC_CH2) Channel Period Register
+#define AT91C_PWMC_CH2_CUPDR ((AT91_REG *) 	0xFFFCC250) // (PWMC_CH2) Channel Update Register
+#define AT91C_PWMC_CH2_CDTYR ((AT91_REG *) 	0xFFFCC244) // (PWMC_CH2) Channel Duty Cycle Register
+// ========== Register definition for PWMC_CH1 peripheral ========== 
+#define AT91C_PWMC_CH1_Reserved ((AT91_REG *) 	0xFFFCC234) // (PWMC_CH1) Reserved
+#define AT91C_PWMC_CH1_CUPDR ((AT91_REG *) 	0xFFFCC230) // (PWMC_CH1) Channel Update Register
+#define AT91C_PWMC_CH1_CPRDR ((AT91_REG *) 	0xFFFCC228) // (PWMC_CH1) Channel Period Register
+#define AT91C_PWMC_CH1_CCNTR ((AT91_REG *) 	0xFFFCC22C) // (PWMC_CH1) Channel Counter Register
+#define AT91C_PWMC_CH1_CDTYR ((AT91_REG *) 	0xFFFCC224) // (PWMC_CH1) Channel Duty Cycle Register
+#define AT91C_PWMC_CH1_CMR ((AT91_REG *) 	0xFFFCC220) // (PWMC_CH1) Channel Mode Register
+// ========== Register definition for PWMC_CH0 peripheral ========== 
+#define AT91C_PWMC_CH0_Reserved ((AT91_REG *) 	0xFFFCC214) // (PWMC_CH0) Reserved
+#define AT91C_PWMC_CH0_CPRDR ((AT91_REG *) 	0xFFFCC208) // (PWMC_CH0) Channel Period Register
+#define AT91C_PWMC_CH0_CDTYR ((AT91_REG *) 	0xFFFCC204) // (PWMC_CH0) Channel Duty Cycle Register
+#define AT91C_PWMC_CH0_CMR ((AT91_REG *) 	0xFFFCC200) // (PWMC_CH0) Channel Mode Register
+#define AT91C_PWMC_CH0_CUPDR ((AT91_REG *) 	0xFFFCC210) // (PWMC_CH0) Channel Update Register
+#define AT91C_PWMC_CH0_CCNTR ((AT91_REG *) 	0xFFFCC20C) // (PWMC_CH0) Channel Counter Register
+// ========== Register definition for PWMC peripheral ========== 
+#define AT91C_PWMC_IDR  ((AT91_REG *) 	0xFFFCC014) // (PWMC) PWMC Interrupt Disable Register
+#define AT91C_PWMC_DIS  ((AT91_REG *) 	0xFFFCC008) // (PWMC) PWMC Disable Register
+#define AT91C_PWMC_IER  ((AT91_REG *) 	0xFFFCC010) // (PWMC) PWMC Interrupt Enable Register
+#define AT91C_PWMC_VR   ((AT91_REG *) 	0xFFFCC0FC) // (PWMC) PWMC Version Register
+#define AT91C_PWMC_ISR  ((AT91_REG *) 	0xFFFCC01C) // (PWMC) PWMC Interrupt Status Register
+#define AT91C_PWMC_SR   ((AT91_REG *) 	0xFFFCC00C) // (PWMC) PWMC Status Register
+#define AT91C_PWMC_IMR  ((AT91_REG *) 	0xFFFCC018) // (PWMC) PWMC Interrupt Mask Register
+#define AT91C_PWMC_MR   ((AT91_REG *) 	0xFFFCC000) // (PWMC) PWMC Mode Register
+#define AT91C_PWMC_ENA  ((AT91_REG *) 	0xFFFCC004) // (PWMC) PWMC Enable Register
+// ========== Register definition for UDP peripheral ========== 
+#define AT91C_UDP_IMR   ((AT91_REG *) 	0xFFFB0018) // (UDP) Interrupt Mask Register
+#define AT91C_UDP_FADDR ((AT91_REG *) 	0xFFFB0008) // (UDP) Function Address Register
+#define AT91C_UDP_NUM   ((AT91_REG *) 	0xFFFB0000) // (UDP) Frame Number Register
+#define AT91C_UDP_FDR   ((AT91_REG *) 	0xFFFB0050) // (UDP) Endpoint FIFO Data Register
+#define AT91C_UDP_ISR   ((AT91_REG *) 	0xFFFB001C) // (UDP) Interrupt Status Register
+#define AT91C_UDP_CSR   ((AT91_REG *) 	0xFFFB0030) // (UDP) Endpoint Control and Status Register
+#define AT91C_UDP_IDR   ((AT91_REG *) 	0xFFFB0014) // (UDP) Interrupt Disable Register
+#define AT91C_UDP_ICR   ((AT91_REG *) 	0xFFFB0020) // (UDP) Interrupt Clear Register
+#define AT91C_UDP_RSTEP ((AT91_REG *) 	0xFFFB0028) // (UDP) Reset Endpoint Register
+#define AT91C_UDP_TXVC  ((AT91_REG *) 	0xFFFB0074) // (UDP) Transceiver Control Register
+#define AT91C_UDP_GLBSTATE ((AT91_REG *) 	0xFFFB0004) // (UDP) Global State Register
+#define AT91C_UDP_IER   ((AT91_REG *) 	0xFFFB0010) // (UDP) Interrupt Enable Register
+// ========== Register definition for TC0 peripheral ========== 
+#define AT91C_TC0_SR    ((AT91_REG *) 	0xFFFA0020) // (TC0) Status Register
+#define AT91C_TC0_RC    ((AT91_REG *) 	0xFFFA001C) // (TC0) Register C
+#define AT91C_TC0_RB    ((AT91_REG *) 	0xFFFA0018) // (TC0) Register B
+#define AT91C_TC0_CCR   ((AT91_REG *) 	0xFFFA0000) // (TC0) Channel Control Register
+#define AT91C_TC0_CMR   ((AT91_REG *) 	0xFFFA0004) // (TC0) Channel Mode Register (Capture Mode / Waveform Mode)
+#define AT91C_TC0_IER   ((AT91_REG *) 	0xFFFA0024) // (TC0) Interrupt Enable Register
+#define AT91C_TC0_RA    ((AT91_REG *) 	0xFFFA0014) // (TC0) Register A
+#define AT91C_TC0_IDR   ((AT91_REG *) 	0xFFFA0028) // (TC0) Interrupt Disable Register
+#define AT91C_TC0_CV    ((AT91_REG *) 	0xFFFA0010) // (TC0) Counter Value
+#define AT91C_TC0_IMR   ((AT91_REG *) 	0xFFFA002C) // (TC0) Interrupt Mask Register
+// ========== Register definition for TC1 peripheral ========== 
+#define AT91C_TC1_RB    ((AT91_REG *) 	0xFFFA0058) // (TC1) Register B
+#define AT91C_TC1_CCR   ((AT91_REG *) 	0xFFFA0040) // (TC1) Channel Control Register
+#define AT91C_TC1_IER   ((AT91_REG *) 	0xFFFA0064) // (TC1) Interrupt Enable Register
+#define AT91C_TC1_IDR   ((AT91_REG *) 	0xFFFA0068) // (TC1) Interrupt Disable Register
+#define AT91C_TC1_SR    ((AT91_REG *) 	0xFFFA0060) // (TC1) Status Register
+#define AT91C_TC1_CMR   ((AT91_REG *) 	0xFFFA0044) // (TC1) Channel Mode Register (Capture Mode / Waveform Mode)
+#define AT91C_TC1_RA    ((AT91_REG *) 	0xFFFA0054) // (TC1) Register A
+#define AT91C_TC1_RC    ((AT91_REG *) 	0xFFFA005C) // (TC1) Register C
+#define AT91C_TC1_IMR   ((AT91_REG *) 	0xFFFA006C) // (TC1) Interrupt Mask Register
+#define AT91C_TC1_CV    ((AT91_REG *) 	0xFFFA0050) // (TC1) Counter Value
+// ========== Register definition for TC2 peripheral ========== 
+#define AT91C_TC2_CMR   ((AT91_REG *) 	0xFFFA0084) // (TC2) Channel Mode Register (Capture Mode / Waveform Mode)
+#define AT91C_TC2_CCR   ((AT91_REG *) 	0xFFFA0080) // (TC2) Channel Control Register
+#define AT91C_TC2_CV    ((AT91_REG *) 	0xFFFA0090) // (TC2) Counter Value
+#define AT91C_TC2_RA    ((AT91_REG *) 	0xFFFA0094) // (TC2) Register A
+#define AT91C_TC2_RB    ((AT91_REG *) 	0xFFFA0098) // (TC2) Register B
+#define AT91C_TC2_IDR   ((AT91_REG *) 	0xFFFA00A8) // (TC2) Interrupt Disable Register
+#define AT91C_TC2_IMR   ((AT91_REG *) 	0xFFFA00AC) // (TC2) Interrupt Mask Register
+#define AT91C_TC2_RC    ((AT91_REG *) 	0xFFFA009C) // (TC2) Register C
+#define AT91C_TC2_IER   ((AT91_REG *) 	0xFFFA00A4) // (TC2) Interrupt Enable Register
+#define AT91C_TC2_SR    ((AT91_REG *) 	0xFFFA00A0) // (TC2) Status Register
+// ========== Register definition for TCB peripheral ========== 
+#define AT91C_TCB_BMR   ((AT91_REG *) 	0xFFFA00C4) // (TCB) TC Block Mode Register
+#define AT91C_TCB_BCR   ((AT91_REG *) 	0xFFFA00C0) // (TCB) TC Block Control Register
+// ========== Register definition for CAN_MB0 peripheral ========== 
+#define AT91C_CAN_MB0_MDL ((AT91_REG *) 	0xFFFD0214) // (CAN_MB0) MailBox Data Low Register
+#define AT91C_CAN_MB0_MAM ((AT91_REG *) 	0xFFFD0204) // (CAN_MB0) MailBox Acceptance Mask Register
+#define AT91C_CAN_MB0_MCR ((AT91_REG *) 	0xFFFD021C) // (CAN_MB0) MailBox Control Register
+#define AT91C_CAN_MB0_MID ((AT91_REG *) 	0xFFFD0208) // (CAN_MB0) MailBox ID Register
+#define AT91C_CAN_MB0_MSR ((AT91_REG *) 	0xFFFD0210) // (CAN_MB0) MailBox Status Register
+#define AT91C_CAN_MB0_MFID ((AT91_REG *) 	0xFFFD020C) // (CAN_MB0) MailBox Family ID Register
+#define AT91C_CAN_MB0_MDH ((AT91_REG *) 	0xFFFD0218) // (CAN_MB0) MailBox Data High Register
+#define AT91C_CAN_MB0_MMR ((AT91_REG *) 	0xFFFD0200) // (CAN_MB0) MailBox Mode Register
+// ========== Register definition for CAN_MB1 peripheral ========== 
+#define AT91C_CAN_MB1_MDL ((AT91_REG *) 	0xFFFD0234) // (CAN_MB1) MailBox Data Low Register
+#define AT91C_CAN_MB1_MID ((AT91_REG *) 	0xFFFD0228) // (CAN_MB1) MailBox ID Register
+#define AT91C_CAN_MB1_MMR ((AT91_REG *) 	0xFFFD0220) // (CAN_MB1) MailBox Mode Register
+#define AT91C_CAN_MB1_MSR ((AT91_REG *) 	0xFFFD0230) // (CAN_MB1) MailBox Status Register
+#define AT91C_CAN_MB1_MAM ((AT91_REG *) 	0xFFFD0224) // (CAN_MB1) MailBox Acceptance Mask Register
+#define AT91C_CAN_MB1_MDH ((AT91_REG *) 	0xFFFD0238) // (CAN_MB1) MailBox Data High Register
+#define AT91C_CAN_MB1_MCR ((AT91_REG *) 	0xFFFD023C) // (CAN_MB1) MailBox Control Register
+#define AT91C_CAN_MB1_MFID ((AT91_REG *) 	0xFFFD022C) // (CAN_MB1) MailBox Family ID Register
+// ========== Register definition for CAN_MB2 peripheral ========== 
+#define AT91C_CAN_MB2_MCR ((AT91_REG *) 	0xFFFD025C) // (CAN_MB2) MailBox Control Register
+#define AT91C_CAN_MB2_MDH ((AT91_REG *) 	0xFFFD0258) // (CAN_MB2) MailBox Data High Register
+#define AT91C_CAN_MB2_MID ((AT91_REG *) 	0xFFFD0248) // (CAN_MB2) MailBox ID Register
+#define AT91C_CAN_MB2_MDL ((AT91_REG *) 	0xFFFD0254) // (CAN_MB2) MailBox Data Low Register
+#define AT91C_CAN_MB2_MMR ((AT91_REG *) 	0xFFFD0240) // (CAN_MB2) MailBox Mode Register
+#define AT91C_CAN_MB2_MAM ((AT91_REG *) 	0xFFFD0244) // (CAN_MB2) MailBox Acceptance Mask Register
+#define AT91C_CAN_MB2_MFID ((AT91_REG *) 	0xFFFD024C) // (CAN_MB2) MailBox Family ID Register
+#define AT91C_CAN_MB2_MSR ((AT91_REG *) 	0xFFFD0250) // (CAN_MB2) MailBox Status Register
+// ========== Register definition for CAN_MB3 peripheral ========== 
+#define AT91C_CAN_MB3_MFID ((AT91_REG *) 	0xFFFD026C) // (CAN_MB3) MailBox Family ID Register
+#define AT91C_CAN_MB3_MAM ((AT91_REG *) 	0xFFFD0264) // (CAN_MB3) MailBox Acceptance Mask Register
+#define AT91C_CAN_MB3_MID ((AT91_REG *) 	0xFFFD0268) // (CAN_MB3) MailBox ID Register
+#define AT91C_CAN_MB3_MCR ((AT91_REG *) 	0xFFFD027C) // (CAN_MB3) MailBox Control Register
+#define AT91C_CAN_MB3_MMR ((AT91_REG *) 	0xFFFD0260) // (CAN_MB3) MailBox Mode Register
+#define AT91C_CAN_MB3_MSR ((AT91_REG *) 	0xFFFD0270) // (CAN_MB3) MailBox Status Register
+#define AT91C_CAN_MB3_MDL ((AT91_REG *) 	0xFFFD0274) // (CAN_MB3) MailBox Data Low Register
+#define AT91C_CAN_MB3_MDH ((AT91_REG *) 	0xFFFD0278) // (CAN_MB3) MailBox Data High Register
+// ========== Register definition for CAN_MB4 peripheral ========== 
+#define AT91C_CAN_MB4_MID ((AT91_REG *) 	0xFFFD0288) // (CAN_MB4) MailBox ID Register
+#define AT91C_CAN_MB4_MMR ((AT91_REG *) 	0xFFFD0280) // (CAN_MB4) MailBox Mode Register
+#define AT91C_CAN_MB4_MDH ((AT91_REG *) 	0xFFFD0298) // (CAN_MB4) MailBox Data High Register
+#define AT91C_CAN_MB4_MFID ((AT91_REG *) 	0xFFFD028C) // (CAN_MB4) MailBox Family ID Register
+#define AT91C_CAN_MB4_MSR ((AT91_REG *) 	0xFFFD0290) // (CAN_MB4) MailBox Status Register
+#define AT91C_CAN_MB4_MCR ((AT91_REG *) 	0xFFFD029C) // (CAN_MB4) MailBox Control Register
+#define AT91C_CAN_MB4_MDL ((AT91_REG *) 	0xFFFD0294) // (CAN_MB4) MailBox Data Low Register
+#define AT91C_CAN_MB4_MAM ((AT91_REG *) 	0xFFFD0284) // (CAN_MB4) MailBox Acceptance Mask Register
+// ========== Register definition for CAN_MB5 peripheral ========== 
+#define AT91C_CAN_MB5_MSR ((AT91_REG *) 	0xFFFD02B0) // (CAN_MB5) MailBox Status Register
+#define AT91C_CAN_MB5_MCR ((AT91_REG *) 	0xFFFD02BC) // (CAN_MB5) MailBox Control Register
+#define AT91C_CAN_MB5_MFID ((AT91_REG *) 	0xFFFD02AC) // (CAN_MB5) MailBox Family ID Register
+#define AT91C_CAN_MB5_MDH ((AT91_REG *) 	0xFFFD02B8) // (CAN_MB5) MailBox Data High Register
+#define AT91C_CAN_MB5_MID ((AT91_REG *) 	0xFFFD02A8) // (CAN_MB5) MailBox ID Register
+#define AT91C_CAN_MB5_MMR ((AT91_REG *) 	0xFFFD02A0) // (CAN_MB5) MailBox Mode Register
+#define AT91C_CAN_MB5_MDL ((AT91_REG *) 	0xFFFD02B4) // (CAN_MB5) MailBox Data Low Register
+#define AT91C_CAN_MB5_MAM ((AT91_REG *) 	0xFFFD02A4) // (CAN_MB5) MailBox Acceptance Mask Register
+// ========== Register definition for CAN_MB6 peripheral ========== 
+#define AT91C_CAN_MB6_MFID ((AT91_REG *) 	0xFFFD02CC) // (CAN_MB6) MailBox Family ID Register
+#define AT91C_CAN_MB6_MID ((AT91_REG *) 	0xFFFD02C8) // (CAN_MB6) MailBox ID Register
+#define AT91C_CAN_MB6_MAM ((AT91_REG *) 	0xFFFD02C4) // (CAN_MB6) MailBox Acceptance Mask Register
+#define AT91C_CAN_MB6_MSR ((AT91_REG *) 	0xFFFD02D0) // (CAN_MB6) MailBox Status Register
+#define AT91C_CAN_MB6_MDL ((AT91_REG *) 	0xFFFD02D4) // (CAN_MB6) MailBox Data Low Register
+#define AT91C_CAN_MB6_MCR ((AT91_REG *) 	0xFFFD02DC) // (CAN_MB6) MailBox Control Register
+#define AT91C_CAN_MB6_MDH ((AT91_REG *) 	0xFFFD02D8) // (CAN_MB6) MailBox Data High Register
+#define AT91C_CAN_MB6_MMR ((AT91_REG *) 	0xFFFD02C0) // (CAN_MB6) MailBox Mode Register
+// ========== Register definition for CAN_MB7 peripheral ========== 
+#define AT91C_CAN_MB7_MCR ((AT91_REG *) 	0xFFFD02FC) // (CAN_MB7) MailBox Control Register
+#define AT91C_CAN_MB7_MDH ((AT91_REG *) 	0xFFFD02F8) // (CAN_MB7) MailBox Data High Register
+#define AT91C_CAN_MB7_MFID ((AT91_REG *) 	0xFFFD02EC) // (CAN_MB7) MailBox Family ID Register
+#define AT91C_CAN_MB7_MDL ((AT91_REG *) 	0xFFFD02F4) // (CAN_MB7) MailBox Data Low Register
+#define AT91C_CAN_MB7_MID ((AT91_REG *) 	0xFFFD02E8) // (CAN_MB7) MailBox ID Register
+#define AT91C_CAN_MB7_MMR ((AT91_REG *) 	0xFFFD02E0) // (CAN_MB7) MailBox Mode Register
+#define AT91C_CAN_MB7_MAM ((AT91_REG *) 	0xFFFD02E4) // (CAN_MB7) MailBox Acceptance Mask Register
+#define AT91C_CAN_MB7_MSR ((AT91_REG *) 	0xFFFD02F0) // (CAN_MB7) MailBox Status Register
+// ========== Register definition for CAN peripheral ========== 
+#define AT91C_CAN_TCR   ((AT91_REG *) 	0xFFFD0024) // (CAN) Transfer Command Register
+#define AT91C_CAN_IMR   ((AT91_REG *) 	0xFFFD000C) // (CAN) Interrupt Mask Register
+#define AT91C_CAN_IER   ((AT91_REG *) 	0xFFFD0004) // (CAN) Interrupt Enable Register
+#define AT91C_CAN_ECR   ((AT91_REG *) 	0xFFFD0020) // (CAN) Error Counter Register
+#define AT91C_CAN_TIMESTP ((AT91_REG *) 	0xFFFD001C) // (CAN) Time Stamp Register
+#define AT91C_CAN_MR    ((AT91_REG *) 	0xFFFD0000) // (CAN) Mode Register
+#define AT91C_CAN_IDR   ((AT91_REG *) 	0xFFFD0008) // (CAN) Interrupt Disable Register
+#define AT91C_CAN_ACR   ((AT91_REG *) 	0xFFFD0028) // (CAN) Abort Command Register
+#define AT91C_CAN_TIM   ((AT91_REG *) 	0xFFFD0018) // (CAN) Timer Register
+#define AT91C_CAN_SR    ((AT91_REG *) 	0xFFFD0010) // (CAN) Status Register
+#define AT91C_CAN_BR    ((AT91_REG *) 	0xFFFD0014) // (CAN) Baudrate Register
+#define AT91C_CAN_VR    ((AT91_REG *) 	0xFFFD00FC) // (CAN) Version Register
+// ========== Register definition for EMAC peripheral ========== 
+#define AT91C_EMAC_ISR  ((AT91_REG *) 	0xFFFDC024) // (EMAC) Interrupt Status Register
+#define AT91C_EMAC_SA4H ((AT91_REG *) 	0xFFFDC0B4) // (EMAC) Specific Address 4 Top, Last 2 bytes
+#define AT91C_EMAC_SA1L ((AT91_REG *) 	0xFFFDC098) // (EMAC) Specific Address 1 Bottom, First 4 bytes
+#define AT91C_EMAC_ELE  ((AT91_REG *) 	0xFFFDC078) // (EMAC) Excessive Length Errors Register
+#define AT91C_EMAC_LCOL ((AT91_REG *) 	0xFFFDC05C) // (EMAC) Late Collision Register
+#define AT91C_EMAC_RLE  ((AT91_REG *) 	0xFFFDC088) // (EMAC) Receive Length Field Mismatch Register
+#define AT91C_EMAC_WOL  ((AT91_REG *) 	0xFFFDC0C4) // (EMAC) Wake On LAN Register
+#define AT91C_EMAC_DTF  ((AT91_REG *) 	0xFFFDC058) // (EMAC) Deferred Transmission Frame Register
+#define AT91C_EMAC_TUND ((AT91_REG *) 	0xFFFDC064) // (EMAC) Transmit Underrun Error Register
+#define AT91C_EMAC_NCR  ((AT91_REG *) 	0xFFFDC000) // (EMAC) Network Control Register
+#define AT91C_EMAC_SA4L ((AT91_REG *) 	0xFFFDC0B0) // (EMAC) Specific Address 4 Bottom, First 4 bytes
+#define AT91C_EMAC_RSR  ((AT91_REG *) 	0xFFFDC020) // (EMAC) Receive Status Register
+#define AT91C_EMAC_SA3L ((AT91_REG *) 	0xFFFDC0A8) // (EMAC) Specific Address 3 Bottom, First 4 bytes
+#define AT91C_EMAC_TSR  ((AT91_REG *) 	0xFFFDC014) // (EMAC) Transmit Status Register
+#define AT91C_EMAC_IDR  ((AT91_REG *) 	0xFFFDC02C) // (EMAC) Interrupt Disable Register
+#define AT91C_EMAC_RSE  ((AT91_REG *) 	0xFFFDC074) // (EMAC) Receive Symbol Errors Register
+#define AT91C_EMAC_ECOL ((AT91_REG *) 	0xFFFDC060) // (EMAC) Excessive Collision Register
+#define AT91C_EMAC_TID  ((AT91_REG *) 	0xFFFDC0B8) // (EMAC) Type ID Checking Register
+#define AT91C_EMAC_HRB  ((AT91_REG *) 	0xFFFDC090) // (EMAC) Hash Address Bottom[31:0]
+#define AT91C_EMAC_TBQP ((AT91_REG *) 	0xFFFDC01C) // (EMAC) Transmit Buffer Queue Pointer
+#define AT91C_EMAC_USRIO ((AT91_REG *) 	0xFFFDC0C0) // (EMAC) USER Input/Output Register
+#define AT91C_EMAC_PTR  ((AT91_REG *) 	0xFFFDC038) // (EMAC) Pause Time Register
+#define AT91C_EMAC_SA2H ((AT91_REG *) 	0xFFFDC0A4) // (EMAC) Specific Address 2 Top, Last 2 bytes
+#define AT91C_EMAC_ROV  ((AT91_REG *) 	0xFFFDC070) // (EMAC) Receive Overrun Errors Register
+#define AT91C_EMAC_ALE  ((AT91_REG *) 	0xFFFDC054) // (EMAC) Alignment Error Register
+#define AT91C_EMAC_RJA  ((AT91_REG *) 	0xFFFDC07C) // (EMAC) Receive Jabbers Register
+#define AT91C_EMAC_RBQP ((AT91_REG *) 	0xFFFDC018) // (EMAC) Receive Buffer Queue Pointer
+#define AT91C_EMAC_TPF  ((AT91_REG *) 	0xFFFDC08C) // (EMAC) Transmitted Pause Frames Register
+#define AT91C_EMAC_NCFGR ((AT91_REG *) 	0xFFFDC004) // (EMAC) Network Configuration Register
+#define AT91C_EMAC_HRT  ((AT91_REG *) 	0xFFFDC094) // (EMAC) Hash Address Top[63:32]
+#define AT91C_EMAC_USF  ((AT91_REG *) 	0xFFFDC080) // (EMAC) Undersize Frames Register
+#define AT91C_EMAC_FCSE ((AT91_REG *) 	0xFFFDC050) // (EMAC) Frame Check Sequence Error Register
+#define AT91C_EMAC_TPQ  ((AT91_REG *) 	0xFFFDC0BC) // (EMAC) Transmit Pause Quantum Register
+#define AT91C_EMAC_MAN  ((AT91_REG *) 	0xFFFDC034) // (EMAC) PHY Maintenance Register
+#define AT91C_EMAC_FTO  ((AT91_REG *) 	0xFFFDC040) // (EMAC) Frames Transmitted OK Register
+#define AT91C_EMAC_REV  ((AT91_REG *) 	0xFFFDC0FC) // (EMAC) Revision Register
+#define AT91C_EMAC_IMR  ((AT91_REG *) 	0xFFFDC030) // (EMAC) Interrupt Mask Register
+#define AT91C_EMAC_SCF  ((AT91_REG *) 	0xFFFDC044) // (EMAC) Single Collision Frame Register
+#define AT91C_EMAC_PFR  ((AT91_REG *) 	0xFFFDC03C) // (EMAC) Pause Frames received Register
+#define AT91C_EMAC_MCF  ((AT91_REG *) 	0xFFFDC048) // (EMAC) Multiple Collision Frame Register
+#define AT91C_EMAC_NSR  ((AT91_REG *) 	0xFFFDC008) // (EMAC) Network Status Register
+#define AT91C_EMAC_SA2L ((AT91_REG *) 	0xFFFDC0A0) // (EMAC) Specific Address 2 Bottom, First 4 bytes
+#define AT91C_EMAC_FRO  ((AT91_REG *) 	0xFFFDC04C) // (EMAC) Frames Received OK Register
+#define AT91C_EMAC_IER  ((AT91_REG *) 	0xFFFDC028) // (EMAC) Interrupt Enable Register
+#define AT91C_EMAC_SA1H ((AT91_REG *) 	0xFFFDC09C) // (EMAC) Specific Address 1 Top, Last 2 bytes
+#define AT91C_EMAC_CSE  ((AT91_REG *) 	0xFFFDC068) // (EMAC) Carrier Sense Error Register
+#define AT91C_EMAC_SA3H ((AT91_REG *) 	0xFFFDC0AC) // (EMAC) Specific Address 3 Top, Last 2 bytes
+#define AT91C_EMAC_RRE  ((AT91_REG *) 	0xFFFDC06C) // (EMAC) Receive Ressource Error Register
+#define AT91C_EMAC_STE  ((AT91_REG *) 	0xFFFDC084) // (EMAC) SQE Test Error Register
+// ========== Register definition for PDC_ADC peripheral ========== 
+#define AT91C_ADC_PTSR  ((AT91_REG *) 	0xFFFD8124) // (PDC_ADC) PDC Transfer Status Register
+#define AT91C_ADC_PTCR  ((AT91_REG *) 	0xFFFD8120) // (PDC_ADC) PDC Transfer Control Register
+#define AT91C_ADC_TNPR  ((AT91_REG *) 	0xFFFD8118) // (PDC_ADC) Transmit Next Pointer Register
+#define AT91C_ADC_TNCR  ((AT91_REG *) 	0xFFFD811C) // (PDC_ADC) Transmit Next Counter Register
+#define AT91C_ADC_RNPR  ((AT91_REG *) 	0xFFFD8110) // (PDC_ADC) Receive Next Pointer Register
+#define AT91C_ADC_RNCR  ((AT91_REG *) 	0xFFFD8114) // (PDC_ADC) Receive Next Counter Register
+#define AT91C_ADC_RPR   ((AT91_REG *) 	0xFFFD8100) // (PDC_ADC) Receive Pointer Register
+#define AT91C_ADC_TCR   ((AT91_REG *) 	0xFFFD810C) // (PDC_ADC) Transmit Counter Register
+#define AT91C_ADC_TPR   ((AT91_REG *) 	0xFFFD8108) // (PDC_ADC) Transmit Pointer Register
+#define AT91C_ADC_RCR   ((AT91_REG *) 	0xFFFD8104) // (PDC_ADC) Receive Counter Register
+// ========== Register definition for ADC peripheral ========== 
+#define AT91C_ADC_CDR2  ((AT91_REG *) 	0xFFFD8038) // (ADC) ADC Channel Data Register 2
+#define AT91C_ADC_CDR3  ((AT91_REG *) 	0xFFFD803C) // (ADC) ADC Channel Data Register 3
+#define AT91C_ADC_CDR0  ((AT91_REG *) 	0xFFFD8030) // (ADC) ADC Channel Data Register 0
+#define AT91C_ADC_CDR5  ((AT91_REG *) 	0xFFFD8044) // (ADC) ADC Channel Data Register 5
+#define AT91C_ADC_CHDR  ((AT91_REG *) 	0xFFFD8014) // (ADC) ADC Channel Disable Register
+#define AT91C_ADC_SR    ((AT91_REG *) 	0xFFFD801C) // (ADC) ADC Status Register
+#define AT91C_ADC_CDR4  ((AT91_REG *) 	0xFFFD8040) // (ADC) ADC Channel Data Register 4
+#define AT91C_ADC_CDR1  ((AT91_REG *) 	0xFFFD8034) // (ADC) ADC Channel Data Register 1
+#define AT91C_ADC_LCDR  ((AT91_REG *) 	0xFFFD8020) // (ADC) ADC Last Converted Data Register
+#define AT91C_ADC_IDR   ((AT91_REG *) 	0xFFFD8028) // (ADC) ADC Interrupt Disable Register
+#define AT91C_ADC_CR    ((AT91_REG *) 	0xFFFD8000) // (ADC) ADC Control Register
+#define AT91C_ADC_CDR7  ((AT91_REG *) 	0xFFFD804C) // (ADC) ADC Channel Data Register 7
+#define AT91C_ADC_CDR6  ((AT91_REG *) 	0xFFFD8048) // (ADC) ADC Channel Data Register 6
+#define AT91C_ADC_IER   ((AT91_REG *) 	0xFFFD8024) // (ADC) ADC Interrupt Enable Register
+#define AT91C_ADC_CHER  ((AT91_REG *) 	0xFFFD8010) // (ADC) ADC Channel Enable Register
+#define AT91C_ADC_CHSR  ((AT91_REG *) 	0xFFFD8018) // (ADC) ADC Channel Status Register
+#define AT91C_ADC_MR    ((AT91_REG *) 	0xFFFD8004) // (ADC) ADC Mode Register
+#define AT91C_ADC_IMR   ((AT91_REG *) 	0xFFFD802C) // (ADC) ADC Interrupt Mask Register
+
+// *****************************************************************************
+//               PIO DEFINITIONS FOR AT91SAM7X256
+// *****************************************************************************
+#define AT91C_PIO_PA0        ((unsigned int) 1 <<  0) // Pin Controlled by PA0
+#define AT91C_PA0_RXD0     ((unsigned int) AT91C_PIO_PA0) //  USART 0 Receive Data
+#define AT91C_PIO_PA1        ((unsigned int) 1 <<  1) // Pin Controlled by PA1
+#define AT91C_PA1_TXD0     ((unsigned int) AT91C_PIO_PA1) //  USART 0 Transmit Data
+#define AT91C_PIO_PA10       ((unsigned int) 1 << 10) // Pin Controlled by PA10
+#define AT91C_PA10_TWD      ((unsigned int) AT91C_PIO_PA10) //  TWI Two-wire Serial Data
+#define AT91C_PIO_PA11       ((unsigned int) 1 << 11) // Pin Controlled by PA11
+#define AT91C_PA11_TWCK     ((unsigned int) AT91C_PIO_PA11) //  TWI Two-wire Serial Clock
+#define AT91C_PIO_PA12       ((unsigned int) 1 << 12) // Pin Controlled by PA12
+#define AT91C_PA12_SPI0_NPCS0 ((unsigned int) AT91C_PIO_PA12) //  SPI 0 Peripheral Chip Select 0
+#define AT91C_PIO_PA13       ((unsigned int) 1 << 13) // Pin Controlled by PA13
+#define AT91C_PA13_SPI0_NPCS1 ((unsigned int) AT91C_PIO_PA13) //  SPI 0 Peripheral Chip Select 1
+#define AT91C_PA13_PCK1     ((unsigned int) AT91C_PIO_PA13) //  PMC Programmable Clock Output 1
+#define AT91C_PIO_PA14       ((unsigned int) 1 << 14) // Pin Controlled by PA14
+#define AT91C_PA14_SPI0_NPCS2 ((unsigned int) AT91C_PIO_PA14) //  SPI 0 Peripheral Chip Select 2
+#define AT91C_PA14_IRQ1     ((unsigned int) AT91C_PIO_PA14) //  External Interrupt 1
+#define AT91C_PIO_PA15       ((unsigned int) 1 << 15) // Pin Controlled by PA15
+#define AT91C_PA15_SPI0_NPCS3 ((unsigned int) AT91C_PIO_PA15) //  SPI 0 Peripheral Chip Select 3
+#define AT91C_PA15_TCLK2    ((unsigned int) AT91C_PIO_PA15) //  Timer Counter 2 external clock input
+#define AT91C_PIO_PA16       ((unsigned int) 1 << 16) // Pin Controlled by PA16
+#define AT91C_PA16_SPI0_MISO ((unsigned int) AT91C_PIO_PA16) //  SPI 0 Master In Slave
+#define AT91C_PIO_PA17       ((unsigned int) 1 << 17) // Pin Controlled by PA17
+#define AT91C_PA17_SPI0_MOSI ((unsigned int) AT91C_PIO_PA17) //  SPI 0 Master Out Slave
+#define AT91C_PIO_PA18       ((unsigned int) 1 << 18) // Pin Controlled by PA18
+#define AT91C_PA18_SPI0_SPCK ((unsigned int) AT91C_PIO_PA18) //  SPI 0 Serial Clock
+#define AT91C_PIO_PA19       ((unsigned int) 1 << 19) // Pin Controlled by PA19
+#define AT91C_PA19_CANRX    ((unsigned int) AT91C_PIO_PA19) //  CAN Receive
+#define AT91C_PIO_PA2        ((unsigned int) 1 <<  2) // Pin Controlled by PA2
+#define AT91C_PA2_SCK0     ((unsigned int) AT91C_PIO_PA2) //  USART 0 Serial Clock
+#define AT91C_PA2_SPI1_NPCS1 ((unsigned int) AT91C_PIO_PA2) //  SPI 1 Peripheral Chip Select 1
+#define AT91C_PIO_PA20       ((unsigned int) 1 << 20) // Pin Controlled by PA20
+#define AT91C_PA20_CANTX    ((unsigned int) AT91C_PIO_PA20) //  CAN Transmit
+#define AT91C_PIO_PA21       ((unsigned int) 1 << 21) // Pin Controlled by PA21
+#define AT91C_PA21_TF       ((unsigned int) AT91C_PIO_PA21) //  SSC Transmit Frame Sync
+#define AT91C_PA21_SPI1_NPCS0 ((unsigned int) AT91C_PIO_PA21) //  SPI 1 Peripheral Chip Select 0
+#define AT91C_PIO_PA22       ((unsigned int) 1 << 22) // Pin Controlled by PA22
+#define AT91C_PA22_TK       ((unsigned int) AT91C_PIO_PA22) //  SSC Transmit Clock
+#define AT91C_PA22_SPI1_SPCK ((unsigned int) AT91C_PIO_PA22) //  SPI 1 Serial Clock
+#define AT91C_PIO_PA23       ((unsigned int) 1 << 23) // Pin Controlled by PA23
+#define AT91C_PA23_TD       ((unsigned int) AT91C_PIO_PA23) //  SSC Transmit data
+#define AT91C_PA23_SPI1_MOSI ((unsigned int) AT91C_PIO_PA23) //  SPI 1 Master Out Slave
+#define AT91C_PIO_PA24       ((unsigned int) 1 << 24) // Pin Controlled by PA24
+#define AT91C_PA24_RD       ((unsigned int) AT91C_PIO_PA24) //  SSC Receive Data
+#define AT91C_PA24_SPI1_MISO ((unsigned int) AT91C_PIO_PA24) //  SPI 1 Master In Slave
+#define AT91C_PIO_PA25       ((unsigned int) 1 << 25) // Pin Controlled by PA25
+#define AT91C_PA25_RK       ((unsigned int) AT91C_PIO_PA25) //  SSC Receive Clock
+#define AT91C_PA25_SPI1_NPCS1 ((unsigned int) AT91C_PIO_PA25) //  SPI 1 Peripheral Chip Select 1
+#define AT91C_PIO_PA26       ((unsigned int) 1 << 26) // Pin Controlled by PA26
+#define AT91C_PA26_RF       ((unsigned int) AT91C_PIO_PA26) //  SSC Receive Frame Sync
+#define AT91C_PA26_SPI1_NPCS2 ((unsigned int) AT91C_PIO_PA26) //  SPI 1 Peripheral Chip Select 2
+#define AT91C_PIO_PA27       ((unsigned int) 1 << 27) // Pin Controlled by PA27
+#define AT91C_PA27_DRXD     ((unsigned int) AT91C_PIO_PA27) //  DBGU Debug Receive Data
+#define AT91C_PA27_PCK3     ((unsigned int) AT91C_PIO_PA27) //  PMC Programmable Clock Output 3
+#define AT91C_PIO_PA28       ((unsigned int) 1 << 28) // Pin Controlled by PA28
+#define AT91C_PA28_DTXD     ((unsigned int) AT91C_PIO_PA28) //  DBGU Debug Transmit Data
+#define AT91C_PIO_PA29       ((unsigned int) 1 << 29) // Pin Controlled by PA29
+#define AT91C_PA29_FIQ      ((unsigned int) AT91C_PIO_PA29) //  AIC Fast Interrupt Input
+#define AT91C_PA29_SPI1_NPCS3 ((unsigned int) AT91C_PIO_PA29) //  SPI 1 Peripheral Chip Select 3
+#define AT91C_PIO_PA3        ((unsigned int) 1 <<  3) // Pin Controlled by PA3
+#define AT91C_PA3_RTS0     ((unsigned int) AT91C_PIO_PA3) //  USART 0 Ready To Send
+#define AT91C_PA3_SPI1_NPCS2 ((unsigned int) AT91C_PIO_PA3) //  SPI 1 Peripheral Chip Select 2
+#define AT91C_PIO_PA30       ((unsigned int) 1 << 30) // Pin Controlled by PA30
+#define AT91C_PA30_IRQ0     ((unsigned int) AT91C_PIO_PA30) //  External Interrupt 0
+#define AT91C_PA30_PCK2     ((unsigned int) AT91C_PIO_PA30) //  PMC Programmable Clock Output 2
+#define AT91C_PIO_PA4        ((unsigned int) 1 <<  4) // Pin Controlled by PA4
+#define AT91C_PA4_CTS0     ((unsigned int) AT91C_PIO_PA4) //  USART 0 Clear To Send
+#define AT91C_PA4_SPI1_NPCS3 ((unsigned int) AT91C_PIO_PA4) //  SPI 1 Peripheral Chip Select 3
+#define AT91C_PIO_PA5        ((unsigned int) 1 <<  5) // Pin Controlled by PA5
+#define AT91C_PA5_RXD1     ((unsigned int) AT91C_PIO_PA5) //  USART 1 Receive Data
+#define AT91C_PIO_PA6        ((unsigned int) 1 <<  6) // Pin Controlled by PA6
+#define AT91C_PA6_TXD1     ((unsigned int) AT91C_PIO_PA6) //  USART 1 Transmit Data
+#define AT91C_PIO_PA7        ((unsigned int) 1 <<  7) // Pin Controlled by PA7
+#define AT91C_PA7_SCK1     ((unsigned int) AT91C_PIO_PA7) //  USART 1 Serial Clock
+#define AT91C_PA7_SPI0_NPCS1 ((unsigned int) AT91C_PIO_PA7) //  SPI 0 Peripheral Chip Select 1
+#define AT91C_PIO_PA8        ((unsigned int) 1 <<  8) // Pin Controlled by PA8
+#define AT91C_PA8_RTS1     ((unsigned int) AT91C_PIO_PA8) //  USART 1 Ready To Send
+#define AT91C_PA8_SPI0_NPCS2 ((unsigned int) AT91C_PIO_PA8) //  SPI 0 Peripheral Chip Select 2
+#define AT91C_PIO_PA9        ((unsigned int) 1 <<  9) // Pin Controlled by PA9
+#define AT91C_PA9_CTS1     ((unsigned int) AT91C_PIO_PA9) //  USART 1 Clear To Send
+#define AT91C_PA9_SPI0_NPCS3 ((unsigned int) AT91C_PIO_PA9) //  SPI 0 Peripheral Chip Select 3
+#define AT91C_PIO_PB0        ((unsigned int) 1 <<  0) // Pin Controlled by PB0
+#define AT91C_PB0_ETXCK_EREFCK ((unsigned int) AT91C_PIO_PB0) //  Ethernet MAC Transmit Clock/Reference Clock
+#define AT91C_PB0_PCK0     ((unsigned int) AT91C_PIO_PB0) //  PMC Programmable Clock Output 0
+#define AT91C_PIO_PB1        ((unsigned int) 1 <<  1) // Pin Controlled by PB1
+#define AT91C_PB1_ETXEN    ((unsigned int) AT91C_PIO_PB1) //  Ethernet MAC Transmit Enable
+#define AT91C_PIO_PB10       ((unsigned int) 1 << 10) // Pin Controlled by PB10
+#define AT91C_PB10_ETX2     ((unsigned int) AT91C_PIO_PB10) //  Ethernet MAC Transmit Data 2
+#define AT91C_PB10_SPI1_NPCS1 ((unsigned int) AT91C_PIO_PB10) //  SPI 1 Peripheral Chip Select 1
+#define AT91C_PIO_PB11       ((unsigned int) 1 << 11) // Pin Controlled by PB11
+#define AT91C_PB11_ETX3     ((unsigned int) AT91C_PIO_PB11) //  Ethernet MAC Transmit Data 3
+#define AT91C_PB11_SPI1_NPCS2 ((unsigned int) AT91C_PIO_PB11) //  SPI 1 Peripheral Chip Select 2
+#define AT91C_PIO_PB12       ((unsigned int) 1 << 12) // Pin Controlled by PB12
+#define AT91C_PB12_ETXER    ((unsigned int) AT91C_PIO_PB12) //  Ethernet MAC Transmikt Coding Error
+#define AT91C_PB12_TCLK0    ((unsigned int) AT91C_PIO_PB12) //  Timer Counter 0 external clock input
+#define AT91C_PIO_PB13       ((unsigned int) 1 << 13) // Pin Controlled by PB13
+#define AT91C_PB13_ERX2     ((unsigned int) AT91C_PIO_PB13) //  Ethernet MAC Receive Data 2
+#define AT91C_PB13_SPI0_NPCS1 ((unsigned int) AT91C_PIO_PB13) //  SPI 0 Peripheral Chip Select 1
+#define AT91C_PIO_PB14       ((unsigned int) 1 << 14) // Pin Controlled by PB14
+#define AT91C_PB14_ERX3     ((unsigned int) AT91C_PIO_PB14) //  Ethernet MAC Receive Data 3
+#define AT91C_PB14_SPI0_NPCS2 ((unsigned int) AT91C_PIO_PB14) //  SPI 0 Peripheral Chip Select 2
+#define AT91C_PIO_PB15       ((unsigned int) 1 << 15) // Pin Controlled by PB15
+#define AT91C_PB15_ERXDV_ECRSDV ((unsigned int) AT91C_PIO_PB15) //  Ethernet MAC Receive Data Valid
+#define AT91C_PIO_PB16       ((unsigned int) 1 << 16) // Pin Controlled by PB16
+#define AT91C_PB16_ECOL     ((unsigned int) AT91C_PIO_PB16) //  Ethernet MAC Collision Detected
+#define AT91C_PB16_SPI1_NPCS3 ((unsigned int) AT91C_PIO_PB16) //  SPI 1 Peripheral Chip Select 3
+#define AT91C_PIO_PB17       ((unsigned int) 1 << 17) // Pin Controlled by PB17
+#define AT91C_PB17_ERXCK    ((unsigned int) AT91C_PIO_PB17) //  Ethernet MAC Receive Clock
+#define AT91C_PB17_SPI0_NPCS3 ((unsigned int) AT91C_PIO_PB17) //  SPI 0 Peripheral Chip Select 3
+#define AT91C_PIO_PB18       ((unsigned int) 1 << 18) // Pin Controlled by PB18
+#define AT91C_PB18_EF100    ((unsigned int) AT91C_PIO_PB18) //  Ethernet MAC Force 100 Mbits/sec
+#define AT91C_PB18_ADTRG    ((unsigned int) AT91C_PIO_PB18) //  ADC External Trigger
+#define AT91C_PIO_PB19       ((unsigned int) 1 << 19) // Pin Controlled by PB19
+#define AT91C_PB19_PWM0     ((unsigned int) AT91C_PIO_PB19) //  PWM Channel 0
+#define AT91C_PB19_TCLK1    ((unsigned int) AT91C_PIO_PB19) //  Timer Counter 1 external clock input
+#define AT91C_PIO_PB2        ((unsigned int) 1 <<  2) // Pin Controlled by PB2
+#define AT91C_PB2_ETX0     ((unsigned int) AT91C_PIO_PB2) //  Ethernet MAC Transmit Data 0
+#define AT91C_PIO_PB20       ((unsigned int) 1 << 20) // Pin Controlled by PB20
+#define AT91C_PB20_PWM1     ((unsigned int) AT91C_PIO_PB20) //  PWM Channel 1
+#define AT91C_PB20_PCK0     ((unsigned int) AT91C_PIO_PB20) //  PMC Programmable Clock Output 0
+#define AT91C_PIO_PB21       ((unsigned int) 1 << 21) // Pin Controlled by PB21
+#define AT91C_PB21_PWM2     ((unsigned int) AT91C_PIO_PB21) //  PWM Channel 2
+#define AT91C_PB21_PCK1     ((unsigned int) AT91C_PIO_PB21) //  PMC Programmable Clock Output 1
+#define AT91C_PIO_PB22       ((unsigned int) 1 << 22) // Pin Controlled by PB22
+#define AT91C_PB22_PWM3     ((unsigned int) AT91C_PIO_PB22) //  PWM Channel 3
+#define AT91C_PB22_PCK2     ((unsigned int) AT91C_PIO_PB22) //  PMC Programmable Clock Output 2
+#define AT91C_PIO_PB23       ((unsigned int) 1 << 23) // Pin Controlled by PB23
+#define AT91C_PB23_TIOA0    ((unsigned int) AT91C_PIO_PB23) //  Timer Counter 0 Multipurpose Timer I/O Pin A
+#define AT91C_PB23_DCD1     ((unsigned int) AT91C_PIO_PB23) //  USART 1 Data Carrier Detect
+#define AT91C_PIO_PB24       ((unsigned int) 1 << 24) // Pin Controlled by PB24
+#define AT91C_PB24_TIOB0    ((unsigned int) AT91C_PIO_PB24) //  Timer Counter 0 Multipurpose Timer I/O Pin B
+#define AT91C_PB24_DSR1     ((unsigned int) AT91C_PIO_PB24) //  USART 1 Data Set ready
+#define AT91C_PIO_PB25       ((unsigned int) 1 << 25) // Pin Controlled by PB25
+#define AT91C_PB25_TIOA1    ((unsigned int) AT91C_PIO_PB25) //  Timer Counter 1 Multipurpose Timer I/O Pin A
+#define AT91C_PB25_DTR1     ((unsigned int) AT91C_PIO_PB25) //  USART 1 Data Terminal ready
+#define AT91C_PIO_PB26       ((unsigned int) 1 << 26) // Pin Controlled by PB26
+#define AT91C_PB26_TIOB1    ((unsigned int) AT91C_PIO_PB26) //  Timer Counter 1 Multipurpose Timer I/O Pin B
+#define AT91C_PB26_RI1      ((unsigned int) AT91C_PIO_PB26) //  USART 1 Ring Indicator
+#define AT91C_PIO_PB27       ((unsigned int) 1 << 27) // Pin Controlled by PB27
+#define AT91C_PB27_TIOA2    ((unsigned int) AT91C_PIO_PB27) //  Timer Counter 2 Multipurpose Timer I/O Pin A
+#define AT91C_PB27_PWM0     ((unsigned int) AT91C_PIO_PB27) //  PWM Channel 0
+#define AT91C_PIO_PB28       ((unsigned int) 1 << 28) // Pin Controlled by PB28
+#define AT91C_PB28_TIOB2    ((unsigned int) AT91C_PIO_PB28) //  Timer Counter 2 Multipurpose Timer I/O Pin B
+#define AT91C_PB28_PWM1     ((unsigned int) AT91C_PIO_PB28) //  PWM Channel 1
+#define AT91C_PIO_PB29       ((unsigned int) 1 << 29) // Pin Controlled by PB29
+#define AT91C_PB29_PCK1     ((unsigned int) AT91C_PIO_PB29) //  PMC Programmable Clock Output 1
+#define AT91C_PB29_PWM2     ((unsigned int) AT91C_PIO_PB29) //  PWM Channel 2
+#define AT91C_PIO_PB3        ((unsigned int) 1 <<  3) // Pin Controlled by PB3
+#define AT91C_PB3_ETX1     ((unsigned int) AT91C_PIO_PB3) //  Ethernet MAC Transmit Data 1
+#define AT91C_PIO_PB30       ((unsigned int) 1 << 30) // Pin Controlled by PB30
+#define AT91C_PB30_PCK2     ((unsigned int) AT91C_PIO_PB30) //  PMC Programmable Clock Output 2
+#define AT91C_PB30_PWM3     ((unsigned int) AT91C_PIO_PB30) //  PWM Channel 3
+#define AT91C_PIO_PB4        ((unsigned int) 1 <<  4) // Pin Controlled by PB4
+#define AT91C_PB4_ECRS     ((unsigned int) AT91C_PIO_PB4) //  Ethernet MAC Carrier Sense/Carrier Sense and Data Valid
+#define AT91C_PIO_PB5        ((unsigned int) 1 <<  5) // Pin Controlled by PB5
+#define AT91C_PB5_ERX0     ((unsigned int) AT91C_PIO_PB5) //  Ethernet MAC Receive Data 0
+#define AT91C_PIO_PB6        ((unsigned int) 1 <<  6) // Pin Controlled by PB6
+#define AT91C_PB6_ERX1     ((unsigned int) AT91C_PIO_PB6) //  Ethernet MAC Receive Data 1
+#define AT91C_PIO_PB7        ((unsigned int) 1 <<  7) // Pin Controlled by PB7
+#define AT91C_PB7_ERXER    ((unsigned int) AT91C_PIO_PB7) //  Ethernet MAC Receive Error
+#define AT91C_PIO_PB8        ((unsigned int) 1 <<  8) // Pin Controlled by PB8
+#define AT91C_PB8_EMDC     ((unsigned int) AT91C_PIO_PB8) //  Ethernet MAC Management Data Clock
+#define AT91C_PIO_PB9        ((unsigned int) 1 <<  9) // Pin Controlled by PB9
+#define AT91C_PB9_EMDIO    ((unsigned int) AT91C_PIO_PB9) //  Ethernet MAC Management Data Input/Output
+
+// *****************************************************************************
+//               PERIPHERAL ID DEFINITIONS FOR AT91SAM7X256
+// *****************************************************************************
+#define AT91C_ID_FIQ    ((unsigned int)  0) // Advanced Interrupt Controller (FIQ)
+#define AT91C_ID_SYS    ((unsigned int)  1) // System Peripheral
+#define AT91C_ID_PIOA   ((unsigned int)  2) // Parallel IO Controller A
+#define AT91C_ID_PIOB   ((unsigned int)  3) // Parallel IO Controller B
+#define AT91C_ID_SPI0   ((unsigned int)  4) // Serial Peripheral Interface 0
+#define AT91C_ID_SPI1   ((unsigned int)  5) // Serial Peripheral Interface 1
+#define AT91C_ID_US0    ((unsigned int)  6) // USART 0
+#define AT91C_ID_US1    ((unsigned int)  7) // USART 1
+#define AT91C_ID_SSC    ((unsigned int)  8) // Serial Synchronous Controller
+#define AT91C_ID_TWI    ((unsigned int)  9) // Two-Wire Interface
+#define AT91C_ID_PWMC   ((unsigned int) 10) // PWM Controller
+#define AT91C_ID_UDP    ((unsigned int) 11) // USB Device Port
+#define AT91C_ID_TC0    ((unsigned int) 12) // Timer Counter 0
+#define AT91C_ID_TC1    ((unsigned int) 13) // Timer Counter 1
+#define AT91C_ID_TC2    ((unsigned int) 14) // Timer Counter 2
+#define AT91C_ID_CAN    ((unsigned int) 15) // Control Area Network Controller
+#define AT91C_ID_EMAC   ((unsigned int) 16) // Ethernet MAC
+#define AT91C_ID_ADC    ((unsigned int) 17) // Analog-to-Digital Converter
+#define AT91C_ID_18_Reserved ((unsigned int) 18) // Reserved
+#define AT91C_ID_19_Reserved ((unsigned int) 19) // Reserved
+#define AT91C_ID_20_Reserved ((unsigned int) 20) // Reserved
+#define AT91C_ID_21_Reserved ((unsigned int) 21) // Reserved
+#define AT91C_ID_22_Reserved ((unsigned int) 22) // Reserved
+#define AT91C_ID_23_Reserved ((unsigned int) 23) // Reserved
+#define AT91C_ID_24_Reserved ((unsigned int) 24) // Reserved
+#define AT91C_ID_25_Reserved ((unsigned int) 25) // Reserved
+#define AT91C_ID_26_Reserved ((unsigned int) 26) // Reserved
+#define AT91C_ID_27_Reserved ((unsigned int) 27) // Reserved
+#define AT91C_ID_28_Reserved ((unsigned int) 28) // Reserved
+#define AT91C_ID_29_Reserved ((unsigned int) 29) // Reserved
+#define AT91C_ID_IRQ0   ((unsigned int) 30) // Advanced Interrupt Controller (IRQ0)
+#define AT91C_ID_IRQ1   ((unsigned int) 31) // Advanced Interrupt Controller (IRQ1)
+#define AT91C_ALL_INT   ((unsigned int) 0xC003FFFF) // ALL VALID INTERRUPTS
+
+// *****************************************************************************
+//               BASE ADDRESS DEFINITIONS FOR AT91SAM7X256
+// *****************************************************************************
+#define AT91C_BASE_SYS       ((AT91PS_SYS) 	0xFFFFF000) // (SYS) Base Address
+#define AT91C_BASE_AIC       ((AT91PS_AIC) 	0xFFFFF000) // (AIC) Base Address
+#define AT91C_BASE_PDC_DBGU  ((AT91PS_PDC) 	0xFFFFF300) // (PDC_DBGU) Base Address
+#define AT91C_BASE_DBGU      ((AT91PS_DBGU) 	0xFFFFF200) // (DBGU) Base Address
+#define AT91C_BASE_PIOA      ((AT91PS_PIO) 	0xFFFFF400) // (PIOA) Base Address
+#define AT91C_BASE_PIOB      ((AT91PS_PIO) 	0xFFFFF600) // (PIOB) Base Address
+#define AT91C_BASE_CKGR      ((AT91PS_CKGR) 	0xFFFFFC20) // (CKGR) Base Address
+#define AT91C_BASE_PMC       ((AT91PS_PMC) 	0xFFFFFC00) // (PMC) Base Address
+#define AT91C_BASE_RSTC      ((AT91PS_RSTC) 	0xFFFFFD00) // (RSTC) Base Address
+#define AT91C_BASE_RTTC      ((AT91PS_RTTC) 	0xFFFFFD20) // (RTTC) Base Address
+#define AT91C_BASE_PITC      ((AT91PS_PITC) 	0xFFFFFD30) // (PITC) Base Address
+#define AT91C_BASE_WDTC      ((AT91PS_WDTC) 	0xFFFFFD40) // (WDTC) Base Address
+#define AT91C_BASE_VREG      ((AT91PS_VREG) 	0xFFFFFD60) // (VREG) Base Address
+#define AT91C_BASE_MC        ((AT91PS_MC) 	0xFFFFFF00) // (MC) Base Address
+#define AT91C_BASE_PDC_SPI1  ((AT91PS_PDC) 	0xFFFE4100) // (PDC_SPI1) Base Address
+#define AT91C_BASE_SPI1      ((AT91PS_SPI) 	0xFFFE4000) // (SPI1) Base Address
+#define AT91C_BASE_PDC_SPI0  ((AT91PS_PDC) 	0xFFFE0100) // (PDC_SPI0) Base Address
+#define AT91C_BASE_SPI0      ((AT91PS_SPI) 	0xFFFE0000) // (SPI0) Base Address
+#define AT91C_BASE_PDC_US1   ((AT91PS_PDC) 	0xFFFC4100) // (PDC_US1) Base Address
+#define AT91C_BASE_US1       ((AT91PS_USART) 	0xFFFC4000) // (US1) Base Address
+#define AT91C_BASE_PDC_US0   ((AT91PS_PDC) 	0xFFFC0100) // (PDC_US0) Base Address
+#define AT91C_BASE_US0       ((AT91PS_USART) 	0xFFFC0000) // (US0) Base Address
+#define AT91C_BASE_PDC_SSC   ((AT91PS_PDC) 	0xFFFD4100) // (PDC_SSC) Base Address
+#define AT91C_BASE_SSC       ((AT91PS_SSC) 	0xFFFD4000) // (SSC) Base Address
+#define AT91C_BASE_TWI       ((AT91PS_TWI) 	0xFFFB8000) // (TWI) Base Address
+#define AT91C_BASE_PWMC_CH3  ((AT91PS_PWMC_CH) 	0xFFFCC260) // (PWMC_CH3) Base Address
+#define AT91C_BASE_PWMC_CH2  ((AT91PS_PWMC_CH) 	0xFFFCC240) // (PWMC_CH2) Base Address
+#define AT91C_BASE_PWMC_CH1  ((AT91PS_PWMC_CH) 	0xFFFCC220) // (PWMC_CH1) Base Address
+#define AT91C_BASE_PWMC_CH0  ((AT91PS_PWMC_CH) 	0xFFFCC200) // (PWMC_CH0) Base Address
+#define AT91C_BASE_PWMC      ((AT91PS_PWMC) 	0xFFFCC000) // (PWMC) Base Address
+#define AT91C_BASE_UDP       ((AT91PS_UDP) 	0xFFFB0000) // (UDP) Base Address
+#define AT91C_BASE_TC0       ((AT91PS_TC) 	0xFFFA0000) // (TC0) Base Address
+#define AT91C_BASE_TC1       ((AT91PS_TC) 	0xFFFA0040) // (TC1) Base Address
+#define AT91C_BASE_TC2       ((AT91PS_TC) 	0xFFFA0080) // (TC2) Base Address
+#define AT91C_BASE_TCB       ((AT91PS_TCB) 	0xFFFA0000) // (TCB) Base Address
+#define AT91C_BASE_CAN_MB0   ((AT91PS_CAN_MB) 	0xFFFD0200) // (CAN_MB0) Base Address
+#define AT91C_BASE_CAN_MB1   ((AT91PS_CAN_MB) 	0xFFFD0220) // (CAN_MB1) Base Address
+#define AT91C_BASE_CAN_MB2   ((AT91PS_CAN_MB) 	0xFFFD0240) // (CAN_MB2) Base Address
+#define AT91C_BASE_CAN_MB3   ((AT91PS_CAN_MB) 	0xFFFD0260) // (CAN_MB3) Base Address
+#define AT91C_BASE_CAN_MB4   ((AT91PS_CAN_MB) 	0xFFFD0280) // (CAN_MB4) Base Address
+#define AT91C_BASE_CAN_MB5   ((AT91PS_CAN_MB) 	0xFFFD02A0) // (CAN_MB5) Base Address
+#define AT91C_BASE_CAN_MB6   ((AT91PS_CAN_MB) 	0xFFFD02C0) // (CAN_MB6) Base Address
+#define AT91C_BASE_CAN_MB7   ((AT91PS_CAN_MB) 	0xFFFD02E0) // (CAN_MB7) Base Address
+#define AT91C_BASE_CAN       ((AT91PS_CAN) 	0xFFFD0000) // (CAN) Base Address
+#define AT91C_BASE_EMAC      ((AT91PS_EMAC) 	0xFFFDC000) // (EMAC) Base Address
+#define AT91C_BASE_PDC_ADC   ((AT91PS_PDC) 	0xFFFD8100) // (PDC_ADC) Base Address
+#define AT91C_BASE_ADC       ((AT91PS_ADC) 	0xFFFD8000) // (ADC) Base Address
+
+// *****************************************************************************
+//               MEMORY MAPPING DEFINITIONS FOR AT91SAM7X256
+// *****************************************************************************
+// ISRAM
+#define AT91C_ISRAM	 ((char *) 	0x00200000) // Internal SRAM base address
+#define AT91C_ISRAM_SIZE	 ((unsigned int) 0x00010000) // Internal SRAM size in byte (64 Kbytes)
+// IFLASH
+#define AT91C_IFLASH	 ((char *) 	0x00100000) // Internal FLASH base address
+#define AT91C_IFLASH_SIZE	 ((unsigned int) 0x00040000) // Internal FLASH size in byte (256 Kbytes)
+#define AT91C_IFLASH_PAGE_SIZE	 ((unsigned int) 256) // Internal FLASH Page Size: 256 bytes
+#define AT91C_IFLASH_LOCK_REGION_SIZE	 ((unsigned int) 16384) // Internal FLASH Lock Region Size: 16 Kbytes
+#define AT91C_IFLASH_NB_OF_PAGES	 ((unsigned int) 1024) // Internal FLASH Number of Pages: 1024 bytes
+#define AT91C_IFLASH_NB_OF_LOCK_BITS	 ((unsigned int) 16) // Internal FLASH Number of Lock Bits: 16 bytes
+#endif /* __IAR_SYSTEMS_ICC__ */
+
+#ifdef __IAR_SYSTEMS_ASM__
+
+// - Hardware register definition
+
+// - *****************************************************************************
+// -              SOFTWARE API DEFINITION  FOR System Peripherals
+// - *****************************************************************************
+
+// - *****************************************************************************
+// -              SOFTWARE API DEFINITION  FOR Advanced Interrupt Controller
+// - *****************************************************************************
+// - -------- AIC_SMR : (AIC Offset: 0x0) Control Register -------- 
+AT91C_AIC_PRIOR           EQU (0x7 <<  0) ;- (AIC) Priority Level
+AT91C_AIC_PRIOR_LOWEST    EQU (0x0) ;- (AIC) Lowest priority level
+AT91C_AIC_PRIOR_HIGHEST   EQU (0x7) ;- (AIC) Highest priority level
+AT91C_AIC_SRCTYPE         EQU (0x3 <<  5) ;- (AIC) Interrupt Source Type
+AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL EQU (0x0 <<  5) ;- (AIC) Internal Sources Code Label High-level Sensitive
+AT91C_AIC_SRCTYPE_EXT_LOW_LEVEL EQU (0x0 <<  5) ;- (AIC) External Sources Code Label Low-level Sensitive
+AT91C_AIC_SRCTYPE_INT_POSITIVE_EDGE EQU (0x1 <<  5) ;- (AIC) Internal Sources Code Label Positive Edge triggered
+AT91C_AIC_SRCTYPE_EXT_NEGATIVE_EDGE EQU (0x1 <<  5) ;- (AIC) External Sources Code Label Negative Edge triggered
+AT91C_AIC_SRCTYPE_HIGH_LEVEL EQU (0x2 <<  5) ;- (AIC) Internal Or External Sources Code Label High-level Sensitive
+AT91C_AIC_SRCTYPE_POSITIVE_EDGE EQU (0x3 <<  5) ;- (AIC) Internal Or External Sources Code Label Positive Edge triggered
+// - -------- AIC_CISR : (AIC Offset: 0x114) AIC Core Interrupt Status Register -------- 
+AT91C_AIC_NFIQ            EQU (0x1 <<  0) ;- (AIC) NFIQ Status
+AT91C_AIC_NIRQ            EQU (0x1 <<  1) ;- (AIC) NIRQ Status
+// - -------- AIC_DCR : (AIC Offset: 0x138) AIC Debug Control Register (Protect) -------- 
+AT91C_AIC_DCR_PROT        EQU (0x1 <<  0) ;- (AIC) Protection Mode
+AT91C_AIC_DCR_GMSK        EQU (0x1 <<  1) ;- (AIC) General Mask
+
+// - *****************************************************************************
+// -              SOFTWARE API DEFINITION  FOR Peripheral DMA Controller
+// - *****************************************************************************
+// - -------- PDC_PTCR : (PDC Offset: 0x20) PDC Transfer Control Register -------- 
+AT91C_PDC_RXTEN           EQU (0x1 <<  0) ;- (PDC) Receiver Transfer Enable
+AT91C_PDC_RXTDIS          EQU (0x1 <<  1) ;- (PDC) Receiver Transfer Disable
+AT91C_PDC_TXTEN           EQU (0x1 <<  8) ;- (PDC) Transmitter Transfer Enable
+AT91C_PDC_TXTDIS          EQU (0x1 <<  9) ;- (PDC) Transmitter Transfer Disable
+// - -------- PDC_PTSR : (PDC Offset: 0x24) PDC Transfer Status Register -------- 
+
+// - *****************************************************************************
+// -              SOFTWARE API DEFINITION  FOR Debug Unit
+// - *****************************************************************************
+// - -------- DBGU_CR : (DBGU Offset: 0x0) Debug Unit Control Register -------- 
+AT91C_US_RSTRX            EQU (0x1 <<  2) ;- (DBGU) Reset Receiver
+AT91C_US_RSTTX            EQU (0x1 <<  3) ;- (DBGU) Reset Transmitter
+AT91C_US_RXEN             EQU (0x1 <<  4) ;- (DBGU) Receiver Enable
+AT91C_US_RXDIS            EQU (0x1 <<  5) ;- (DBGU) Receiver Disable
+AT91C_US_TXEN             EQU (0x1 <<  6) ;- (DBGU) Transmitter Enable
+AT91C_US_TXDIS            EQU (0x1 <<  7) ;- (DBGU) Transmitter Disable
+AT91C_US_RSTSTA           EQU (0x1 <<  8) ;- (DBGU) Reset Status Bits
+// - -------- DBGU_MR : (DBGU Offset: 0x4) Debug Unit Mode Register -------- 
+AT91C_US_PAR              EQU (0x7 <<  9) ;- (DBGU) Parity type
+AT91C_US_PAR_EVEN         EQU (0x0 <<  9) ;- (DBGU) Even Parity
+AT91C_US_PAR_ODD          EQU (0x1 <<  9) ;- (DBGU) Odd Parity
+AT91C_US_PAR_SPACE        EQU (0x2 <<  9) ;- (DBGU) Parity forced to 0 (Space)
+AT91C_US_PAR_MARK         EQU (0x3 <<  9) ;- (DBGU) Parity forced to 1 (Mark)
+AT91C_US_PAR_NONE         EQU (0x4 <<  9) ;- (DBGU) No Parity
+AT91C_US_PAR_MULTI_DROP   EQU (0x6 <<  9) ;- (DBGU) Multi-drop mode
+AT91C_US_CHMODE           EQU (0x3 << 14) ;- (DBGU) Channel Mode
+AT91C_US_CHMODE_NORMAL    EQU (0x0 << 14) ;- (DBGU) Normal Mode: The USART channel operates as an RX/TX USART.
+AT91C_US_CHMODE_AUTO      EQU (0x1 << 14) ;- (DBGU) Automatic Echo: Receiver Data Input is connected to the TXD pin.
+AT91C_US_CHMODE_LOCAL     EQU (0x2 << 14) ;- (DBGU) Local Loopback: Transmitter Output Signal is connected to Receiver Input Signal.
+AT91C_US_CHMODE_REMOTE    EQU (0x3 << 14) ;- (DBGU) Remote Loopback: RXD pin is internally connected to TXD pin.
+// - -------- DBGU_IER : (DBGU Offset: 0x8) Debug Unit Interrupt Enable Register -------- 
+AT91C_US_RXRDY            EQU (0x1 <<  0) ;- (DBGU) RXRDY Interrupt
+AT91C_US_TXRDY            EQU (0x1 <<  1) ;- (DBGU) TXRDY Interrupt
+AT91C_US_ENDRX            EQU (0x1 <<  3) ;- (DBGU) End of Receive Transfer Interrupt
+AT91C_US_ENDTX            EQU (0x1 <<  4) ;- (DBGU) End of Transmit Interrupt
+AT91C_US_OVRE             EQU (0x1 <<  5) ;- (DBGU) Overrun Interrupt
+AT91C_US_FRAME            EQU (0x1 <<  6) ;- (DBGU) Framing Error Interrupt
+AT91C_US_PARE             EQU (0x1 <<  7) ;- (DBGU) Parity Error Interrupt
+AT91C_US_TXEMPTY          EQU (0x1 <<  9) ;- (DBGU) TXEMPTY Interrupt
+AT91C_US_TXBUFE           EQU (0x1 << 11) ;- (DBGU) TXBUFE Interrupt
+AT91C_US_RXBUFF           EQU (0x1 << 12) ;- (DBGU) RXBUFF Interrupt
+AT91C_US_COMM_TX          EQU (0x1 << 30) ;- (DBGU) COMM_TX Interrupt
+AT91C_US_COMM_RX          EQU (0x1 << 31) ;- (DBGU) COMM_RX Interrupt
+// - -------- DBGU_IDR : (DBGU Offset: 0xc) Debug Unit Interrupt Disable Register -------- 
+// - -------- DBGU_IMR : (DBGU Offset: 0x10) Debug Unit Interrupt Mask Register -------- 
+// - -------- DBGU_CSR : (DBGU Offset: 0x14) Debug Unit Channel Status Register -------- 
+// - -------- DBGU_FNTR : (DBGU Offset: 0x48) Debug Unit FORCE_NTRST Register -------- 
+AT91C_US_FORCE_NTRST      EQU (0x1 <<  0) ;- (DBGU) Force NTRST in JTAG
+
+// - *****************************************************************************
+// -              SOFTWARE API DEFINITION  FOR Parallel Input Output Controler
+// - *****************************************************************************
+
+// - *****************************************************************************
+// -              SOFTWARE API DEFINITION  FOR Clock Generator Controler
+// - *****************************************************************************
+// - -------- CKGR_MOR : (CKGR Offset: 0x0) Main Oscillator Register -------- 
+AT91C_CKGR_MOSCEN         EQU (0x1 <<  0) ;- (CKGR) Main Oscillator Enable
+AT91C_CKGR_OSCBYPASS      EQU (0x1 <<  1) ;- (CKGR) Main Oscillator Bypass
+AT91C_CKGR_OSCOUNT        EQU (0xFF <<  8) ;- (CKGR) Main Oscillator Start-up Time
+// - -------- CKGR_MCFR : (CKGR Offset: 0x4) Main Clock Frequency Register -------- 
+AT91C_CKGR_MAINF          EQU (0xFFFF <<  0) ;- (CKGR) Main Clock Frequency
+AT91C_CKGR_MAINRDY        EQU (0x1 << 16) ;- (CKGR) Main Clock Ready
+// - -------- CKGR_PLLR : (CKGR Offset: 0xc) PLL B Register -------- 
+AT91C_CKGR_DIV            EQU (0xFF <<  0) ;- (CKGR) Divider Selected
+AT91C_CKGR_DIV_0          EQU (0x0) ;- (CKGR) Divider output is 0
+AT91C_CKGR_DIV_BYPASS     EQU (0x1) ;- (CKGR) Divider is bypassed
+AT91C_CKGR_PLLCOUNT       EQU (0x3F <<  8) ;- (CKGR) PLL Counter
+AT91C_CKGR_OUT            EQU (0x3 << 14) ;- (CKGR) PLL Output Frequency Range
+AT91C_CKGR_OUT_0          EQU (0x0 << 14) ;- (CKGR) Please refer to the PLL datasheet
+AT91C_CKGR_OUT_1          EQU (0x1 << 14) ;- (CKGR) Please refer to the PLL datasheet
+AT91C_CKGR_OUT_2          EQU (0x2 << 14) ;- (CKGR) Please refer to the PLL datasheet
+AT91C_CKGR_OUT_3          EQU (0x3 << 14) ;- (CKGR) Please refer to the PLL datasheet
+AT91C_CKGR_MUL            EQU (0x7FF << 16) ;- (CKGR) PLL Multiplier
+AT91C_CKGR_USBDIV         EQU (0x3 << 28) ;- (CKGR) Divider for USB Clocks
+AT91C_CKGR_USBDIV_0       EQU (0x0 << 28) ;- (CKGR) Divider output is PLL clock output
+AT91C_CKGR_USBDIV_1       EQU (0x1 << 28) ;- (CKGR) Divider output is PLL clock output divided by 2
+AT91C_CKGR_USBDIV_2       EQU (0x2 << 28) ;- (CKGR) Divider output is PLL clock output divided by 4
+
+// - *****************************************************************************
+// -              SOFTWARE API DEFINITION  FOR Power Management Controler
+// - *****************************************************************************
+// - -------- PMC_SCER : (PMC Offset: 0x0) System Clock Enable Register -------- 
+AT91C_PMC_PCK             EQU (0x1 <<  0) ;- (PMC) Processor Clock
+AT91C_PMC_UDP             EQU (0x1 <<  7) ;- (PMC) USB Device Port Clock
+AT91C_PMC_PCK0            EQU (0x1 <<  8) ;- (PMC) Programmable Clock Output
+AT91C_PMC_PCK1            EQU (0x1 <<  9) ;- (PMC) Programmable Clock Output
+AT91C_PMC_PCK2            EQU (0x1 << 10) ;- (PMC) Programmable Clock Output
+AT91C_PMC_PCK3            EQU (0x1 << 11) ;- (PMC) Programmable Clock Output
+// - -------- PMC_SCDR : (PMC Offset: 0x4) System Clock Disable Register -------- 
+// - -------- PMC_SCSR : (PMC Offset: 0x8) System Clock Status Register -------- 
+// - -------- CKGR_MOR : (PMC Offset: 0x20) Main Oscillator Register -------- 
+// - -------- CKGR_MCFR : (PMC Offset: 0x24) Main Clock Frequency Register -------- 
+// - -------- CKGR_PLLR : (PMC Offset: 0x2c) PLL B Register -------- 
+// - -------- PMC_MCKR : (PMC Offset: 0x30) Master Clock Register -------- 
+AT91C_PMC_CSS             EQU (0x3 <<  0) ;- (PMC) Programmable Clock Selection
+AT91C_PMC_CSS_SLOW_CLK    EQU (0x0) ;- (PMC) Slow Clock is selected
+AT91C_PMC_CSS_MAIN_CLK    EQU (0x1) ;- (PMC) Main Clock is selected
+AT91C_PMC_CSS_PLL_CLK     EQU (0x3) ;- (PMC) Clock from PLL is selected
+AT91C_PMC_PRES            EQU (0x7 <<  2) ;- (PMC) Programmable Clock Prescaler
+AT91C_PMC_PRES_CLK        EQU (0x0 <<  2) ;- (PMC) Selected clock
+AT91C_PMC_PRES_CLK_2      EQU (0x1 <<  2) ;- (PMC) Selected clock divided by 2
+AT91C_PMC_PRES_CLK_4      EQU (0x2 <<  2) ;- (PMC) Selected clock divided by 4
+AT91C_PMC_PRES_CLK_8      EQU (0x3 <<  2) ;- (PMC) Selected clock divided by 8
+AT91C_PMC_PRES_CLK_16     EQU (0x4 <<  2) ;- (PMC) Selected clock divided by 16
+AT91C_PMC_PRES_CLK_32     EQU (0x5 <<  2) ;- (PMC) Selected clock divided by 32
+AT91C_PMC_PRES_CLK_64     EQU (0x6 <<  2) ;- (PMC) Selected clock divided by 64
+// - -------- PMC_PCKR : (PMC Offset: 0x40) Programmable Clock Register -------- 
+// - -------- PMC_IER : (PMC Offset: 0x60) PMC Interrupt Enable Register -------- 
+AT91C_PMC_MOSCS           EQU (0x1 <<  0) ;- (PMC) MOSC Status/Enable/Disable/Mask
+AT91C_PMC_LOCK            EQU (0x1 <<  2) ;- (PMC) PLL Status/Enable/Disable/Mask
+AT91C_PMC_MCKRDY          EQU (0x1 <<  3) ;- (PMC) MCK_RDY Status/Enable/Disable/Mask
+AT91C_PMC_PCK0RDY         EQU (0x1 <<  8) ;- (PMC) PCK0_RDY Status/Enable/Disable/Mask
+AT91C_PMC_PCK1RDY         EQU (0x1 <<  9) ;- (PMC) PCK1_RDY Status/Enable/Disable/Mask
+AT91C_PMC_PCK2RDY         EQU (0x1 << 10) ;- (PMC) PCK2_RDY Status/Enable/Disable/Mask
+AT91C_PMC_PCK3RDY         EQU (0x1 << 11) ;- (PMC) PCK3_RDY Status/Enable/Disable/Mask
+// - -------- PMC_IDR : (PMC Offset: 0x64) PMC Interrupt Disable Register -------- 
+// - -------- PMC_SR : (PMC Offset: 0x68) PMC Status Register -------- 
+// - -------- PMC_IMR : (PMC Offset: 0x6c) PMC Interrupt Mask Register -------- 
+
+// - *****************************************************************************
+// -              SOFTWARE API DEFINITION  FOR Reset Controller Interface
+// - *****************************************************************************
+// - -------- RSTC_RCR : (RSTC Offset: 0x0) Reset Control Register -------- 
+AT91C_RSTC_PROCRST        EQU (0x1 <<  0) ;- (RSTC) Processor Reset
+AT91C_RSTC_PERRST         EQU (0x1 <<  2) ;- (RSTC) Peripheral Reset
+AT91C_RSTC_EXTRST         EQU (0x1 <<  3) ;- (RSTC) External Reset
+AT91C_RSTC_KEY            EQU (0xFF << 24) ;- (RSTC) Password
+// - -------- RSTC_RSR : (RSTC Offset: 0x4) Reset Status Register -------- 
+AT91C_RSTC_URSTS          EQU (0x1 <<  0) ;- (RSTC) User Reset Status
+AT91C_RSTC_BODSTS         EQU (0x1 <<  1) ;- (RSTC) Brownout Detection Status
+AT91C_RSTC_RSTTYP         EQU (0x7 <<  8) ;- (RSTC) Reset Type
+AT91C_RSTC_RSTTYP_POWERUP EQU (0x0 <<  8) ;- (RSTC) Power-up Reset. VDDCORE rising.
+AT91C_RSTC_RSTTYP_WAKEUP  EQU (0x1 <<  8) ;- (RSTC) WakeUp Reset. VDDCORE rising.
+AT91C_RSTC_RSTTYP_WATCHDOG EQU (0x2 <<  8) ;- (RSTC) Watchdog Reset. Watchdog overflow occured.
+AT91C_RSTC_RSTTYP_SOFTWARE EQU (0x3 <<  8) ;- (RSTC) Software Reset. Processor reset required by the software.
+AT91C_RSTC_RSTTYP_USER    EQU (0x4 <<  8) ;- (RSTC) User Reset. NRST pin detected low.
+AT91C_RSTC_RSTTYP_BROWNOUT EQU (0x5 <<  8) ;- (RSTC) Brownout Reset occured.
+AT91C_RSTC_NRSTL          EQU (0x1 << 16) ;- (RSTC) NRST pin level
+AT91C_RSTC_SRCMP          EQU (0x1 << 17) ;- (RSTC) Software Reset Command in Progress.
+// - -------- RSTC_RMR : (RSTC Offset: 0x8) Reset Mode Register -------- 
+AT91C_RSTC_URSTEN         EQU (0x1 <<  0) ;- (RSTC) User Reset Enable
+AT91C_RSTC_URSTIEN        EQU (0x1 <<  4) ;- (RSTC) User Reset Interrupt Enable
+AT91C_RSTC_ERSTL          EQU (0xF <<  8) ;- (RSTC) User Reset Length
+AT91C_RSTC_BODIEN         EQU (0x1 << 16) ;- (RSTC) Brownout Detection Interrupt Enable
+
+// - *****************************************************************************
+// -              SOFTWARE API DEFINITION  FOR Real Time Timer Controller Interface
+// - *****************************************************************************
+// - -------- RTTC_RTMR : (RTTC Offset: 0x0) Real-time Mode Register -------- 
+AT91C_RTTC_RTPRES         EQU (0xFFFF <<  0) ;- (RTTC) Real-time Timer Prescaler Value
+AT91C_RTTC_ALMIEN         EQU (0x1 << 16) ;- (RTTC) Alarm Interrupt Enable
+AT91C_RTTC_RTTINCIEN      EQU (0x1 << 17) ;- (RTTC) Real Time Timer Increment Interrupt Enable
+AT91C_RTTC_RTTRST         EQU (0x1 << 18) ;- (RTTC) Real Time Timer Restart
+// - -------- RTTC_RTAR : (RTTC Offset: 0x4) Real-time Alarm Register -------- 
+AT91C_RTTC_ALMV           EQU (0x0 <<  0) ;- (RTTC) Alarm Value
+// - -------- RTTC_RTVR : (RTTC Offset: 0x8) Current Real-time Value Register -------- 
+AT91C_RTTC_CRTV           EQU (0x0 <<  0) ;- (RTTC) Current Real-time Value
+// - -------- RTTC_RTSR : (RTTC Offset: 0xc) Real-time Status Register -------- 
+AT91C_RTTC_ALMS           EQU (0x1 <<  0) ;- (RTTC) Real-time Alarm Status
+AT91C_RTTC_RTTINC         EQU (0x1 <<  1) ;- (RTTC) Real-time Timer Increment
+
+// - *****************************************************************************
+// -              SOFTWARE API DEFINITION  FOR Periodic Interval Timer Controller Interface
+// - *****************************************************************************
+// - -------- PITC_PIMR : (PITC Offset: 0x0) Periodic Interval Mode Register -------- 
+AT91C_PITC_PIV            EQU (0xFFFFF <<  0) ;- (PITC) Periodic Interval Value
+AT91C_PITC_PITEN          EQU (0x1 << 24) ;- (PITC) Periodic Interval Timer Enabled
+AT91C_PITC_PITIEN         EQU (0x1 << 25) ;- (PITC) Periodic Interval Timer Interrupt Enable
+// - -------- PITC_PISR : (PITC Offset: 0x4) Periodic Interval Status Register -------- 
+AT91C_PITC_PITS           EQU (0x1 <<  0) ;- (PITC) Periodic Interval Timer Status
+// - -------- PITC_PIVR : (PITC Offset: 0x8) Periodic Interval Value Register -------- 
+AT91C_PITC_CPIV           EQU (0xFFFFF <<  0) ;- (PITC) Current Periodic Interval Value
+AT91C_PITC_PICNT          EQU (0xFFF << 20) ;- (PITC) Periodic Interval Counter
+// - -------- PITC_PIIR : (PITC Offset: 0xc) Periodic Interval Image Register -------- 
+
+// - *****************************************************************************
+// -              SOFTWARE API DEFINITION  FOR Watchdog Timer Controller Interface
+// - *****************************************************************************
+// - -------- WDTC_WDCR : (WDTC Offset: 0x0) Periodic Interval Image Register -------- 
+AT91C_WDTC_WDRSTT         EQU (0x1 <<  0) ;- (WDTC) Watchdog Restart
+AT91C_WDTC_KEY            EQU (0xFF << 24) ;- (WDTC) Watchdog KEY Password
+// - -------- WDTC_WDMR : (WDTC Offset: 0x4) Watchdog Mode Register -------- 
+AT91C_WDTC_WDV            EQU (0xFFF <<  0) ;- (WDTC) Watchdog Timer Restart
+AT91C_WDTC_WDFIEN         EQU (0x1 << 12) ;- (WDTC) Watchdog Fault Interrupt Enable
+AT91C_WDTC_WDRSTEN        EQU (0x1 << 13) ;- (WDTC) Watchdog Reset Enable
+AT91C_WDTC_WDRPROC        EQU (0x1 << 14) ;- (WDTC) Watchdog Timer Restart
+AT91C_WDTC_WDDIS          EQU (0x1 << 15) ;- (WDTC) Watchdog Disable
+AT91C_WDTC_WDD            EQU (0xFFF << 16) ;- (WDTC) Watchdog Delta Value
+AT91C_WDTC_WDDBGHLT       EQU (0x1 << 28) ;- (WDTC) Watchdog Debug Halt
+AT91C_WDTC_WDIDLEHLT      EQU (0x1 << 29) ;- (WDTC) Watchdog Idle Halt
+// - -------- WDTC_WDSR : (WDTC Offset: 0x8) Watchdog Status Register -------- 
+AT91C_WDTC_WDUNF          EQU (0x1 <<  0) ;- (WDTC) Watchdog Underflow
+AT91C_WDTC_WDERR          EQU (0x1 <<  1) ;- (WDTC) Watchdog Error
+
+// - *****************************************************************************
+// -              SOFTWARE API DEFINITION  FOR Voltage Regulator Mode Controller Interface
+// - *****************************************************************************
+// - -------- VREG_MR : (VREG Offset: 0x0) Voltage Regulator Mode Register -------- 
+AT91C_VREG_PSTDBY         EQU (0x1 <<  0) ;- (VREG) Voltage Regulator Power Standby Mode
+
+// - *****************************************************************************
+// -              SOFTWARE API DEFINITION  FOR Memory Controller Interface
+// - *****************************************************************************
+// - -------- MC_RCR : (MC Offset: 0x0) MC Remap Control Register -------- 
+AT91C_MC_RCB              EQU (0x1 <<  0) ;- (MC) Remap Command Bit
+// - -------- MC_ASR : (MC Offset: 0x4) MC Abort Status Register -------- 
+AT91C_MC_UNDADD           EQU (0x1 <<  0) ;- (MC) Undefined Addess Abort Status
+AT91C_MC_MISADD           EQU (0x1 <<  1) ;- (MC) Misaligned Addess Abort Status
+AT91C_MC_ABTSZ            EQU (0x3 <<  8) ;- (MC) Abort Size Status
+AT91C_MC_ABTSZ_BYTE       EQU (0x0 <<  8) ;- (MC) Byte
+AT91C_MC_ABTSZ_HWORD      EQU (0x1 <<  8) ;- (MC) Half-word
+AT91C_MC_ABTSZ_WORD       EQU (0x2 <<  8) ;- (MC) Word
+AT91C_MC_ABTTYP           EQU (0x3 << 10) ;- (MC) Abort Type Status
+AT91C_MC_ABTTYP_DATAR     EQU (0x0 << 10) ;- (MC) Data Read
+AT91C_MC_ABTTYP_DATAW     EQU (0x1 << 10) ;- (MC) Data Write
+AT91C_MC_ABTTYP_FETCH     EQU (0x2 << 10) ;- (MC) Code Fetch
+AT91C_MC_MST0             EQU (0x1 << 16) ;- (MC) Master 0 Abort Source
+AT91C_MC_MST1             EQU (0x1 << 17) ;- (MC) Master 1 Abort Source
+AT91C_MC_SVMST0           EQU (0x1 << 24) ;- (MC) Saved Master 0 Abort Source
+AT91C_MC_SVMST1           EQU (0x1 << 25) ;- (MC) Saved Master 1 Abort Source
+// - -------- MC_FMR : (MC Offset: 0x60) MC Flash Mode Register -------- 
+AT91C_MC_FRDY             EQU (0x1 <<  0) ;- (MC) Flash Ready
+AT91C_MC_LOCKE            EQU (0x1 <<  2) ;- (MC) Lock Error
+AT91C_MC_PROGE            EQU (0x1 <<  3) ;- (MC) Programming Error
+AT91C_MC_NEBP             EQU (0x1 <<  7) ;- (MC) No Erase Before Programming
+AT91C_MC_FWS              EQU (0x3 <<  8) ;- (MC) Flash Wait State
+AT91C_MC_FWS_0FWS         EQU (0x0 <<  8) ;- (MC) 1 cycle for Read, 2 for Write operations
+AT91C_MC_FWS_1FWS         EQU (0x1 <<  8) ;- (MC) 2 cycles for Read, 3 for Write operations
+AT91C_MC_FWS_2FWS         EQU (0x2 <<  8) ;- (MC) 3 cycles for Read, 4 for Write operations
+AT91C_MC_FWS_3FWS         EQU (0x3 <<  8) ;- (MC) 4 cycles for Read, 4 for Write operations
+AT91C_MC_FMCN             EQU (0xFF << 16) ;- (MC) Flash Microsecond Cycle Number
+// - -------- MC_FCR : (MC Offset: 0x64) MC Flash Command Register -------- 
+AT91C_MC_FCMD             EQU (0xF <<  0) ;- (MC) Flash Command
+AT91C_MC_FCMD_START_PROG  EQU (0x1) ;- (MC) Starts the programming of th epage specified by PAGEN.
+AT91C_MC_FCMD_LOCK        EQU (0x2) ;- (MC) Starts a lock sequence of the sector defined by the bits 4 to 7 of the field PAGEN.
+AT91C_MC_FCMD_PROG_AND_LOCK EQU (0x3) ;- (MC) The lock sequence automatically happens after the programming sequence is completed.
+AT91C_MC_FCMD_UNLOCK      EQU (0x4) ;- (MC) Starts an unlock sequence of the sector defined by the bits 4 to 7 of the field PAGEN.
+AT91C_MC_FCMD_ERASE_ALL   EQU (0x8) ;- (MC) Starts the erase of the entire flash.If at least a page is locked, the command is cancelled.
+AT91C_MC_FCMD_SET_GP_NVM  EQU (0xB) ;- (MC) Set General Purpose NVM bits.
+AT91C_MC_FCMD_CLR_GP_NVM  EQU (0xD) ;- (MC) Clear General Purpose NVM bits.
+AT91C_MC_FCMD_SET_SECURITY EQU (0xF) ;- (MC) Set Security Bit.
+AT91C_MC_PAGEN            EQU (0x3FF <<  8) ;- (MC) Page Number
+AT91C_MC_KEY              EQU (0xFF << 24) ;- (MC) Writing Protect Key
+// - -------- MC_FSR : (MC Offset: 0x68) MC Flash Command Register -------- 
+AT91C_MC_SECURITY         EQU (0x1 <<  4) ;- (MC) Security Bit Status
+AT91C_MC_GPNVM0           EQU (0x1 <<  8) ;- (MC) Sector 0 Lock Status
+AT91C_MC_GPNVM1           EQU (0x1 <<  9) ;- (MC) Sector 1 Lock Status
+AT91C_MC_GPNVM2           EQU (0x1 << 10) ;- (MC) Sector 2 Lock Status
+AT91C_MC_GPNVM3           EQU (0x1 << 11) ;- (MC) Sector 3 Lock Status
+AT91C_MC_GPNVM4           EQU (0x1 << 12) ;- (MC) Sector 4 Lock Status
+AT91C_MC_GPNVM5           EQU (0x1 << 13) ;- (MC) Sector 5 Lock Status
+AT91C_MC_GPNVM6           EQU (0x1 << 14) ;- (MC) Sector 6 Lock Status
+AT91C_MC_GPNVM7           EQU (0x1 << 15) ;- (MC) Sector 7 Lock Status
+AT91C_MC_LOCKS0           EQU (0x1 << 16) ;- (MC) Sector 0 Lock Status
+AT91C_MC_LOCKS1           EQU (0x1 << 17) ;- (MC) Sector 1 Lock Status
+AT91C_MC_LOCKS2           EQU (0x1 << 18) ;- (MC) Sector 2 Lock Status
+AT91C_MC_LOCKS3           EQU (0x1 << 19) ;- (MC) Sector 3 Lock Status
+AT91C_MC_LOCKS4           EQU (0x1 << 20) ;- (MC) Sector 4 Lock Status
+AT91C_MC_LOCKS5           EQU (0x1 << 21) ;- (MC) Sector 5 Lock Status
+AT91C_MC_LOCKS6           EQU (0x1 << 22) ;- (MC) Sector 6 Lock Status
+AT91C_MC_LOCKS7           EQU (0x1 << 23) ;- (MC) Sector 7 Lock Status
+AT91C_MC_LOCKS8           EQU (0x1 << 24) ;- (MC) Sector 8 Lock Status
+AT91C_MC_LOCKS9           EQU (0x1 << 25) ;- (MC) Sector 9 Lock Status
+AT91C_MC_LOCKS10          EQU (0x1 << 26) ;- (MC) Sector 10 Lock Status
+AT91C_MC_LOCKS11          EQU (0x1 << 27) ;- (MC) Sector 11 Lock Status
+AT91C_MC_LOCKS12          EQU (0x1 << 28) ;- (MC) Sector 12 Lock Status
+AT91C_MC_LOCKS13          EQU (0x1 << 29) ;- (MC) Sector 13 Lock Status
+AT91C_MC_LOCKS14          EQU (0x1 << 30) ;- (MC) Sector 14 Lock Status
+AT91C_MC_LOCKS15          EQU (0x1 << 31) ;- (MC) Sector 15 Lock Status
+
+// - *****************************************************************************
+// -              SOFTWARE API DEFINITION  FOR Serial Parallel Interface
+// - *****************************************************************************
+// - -------- SPI_CR : (SPI Offset: 0x0) SPI Control Register -------- 
+AT91C_SPI_SPIEN           EQU (0x1 <<  0) ;- (SPI) SPI Enable
+AT91C_SPI_SPIDIS          EQU (0x1 <<  1) ;- (SPI) SPI Disable
+AT91C_SPI_SWRST           EQU (0x1 <<  7) ;- (SPI) SPI Software reset
+AT91C_SPI_LASTXFER        EQU (0x1 << 24) ;- (SPI) SPI Last Transfer
+// - -------- SPI_MR : (SPI Offset: 0x4) SPI Mode Register -------- 
+AT91C_SPI_MSTR            EQU (0x1 <<  0) ;- (SPI) Master/Slave Mode
+AT91C_SPI_PS              EQU (0x1 <<  1) ;- (SPI) Peripheral Select
+AT91C_SPI_PS_FIXED        EQU (0x0 <<  1) ;- (SPI) Fixed Peripheral Select
+AT91C_SPI_PS_VARIABLE     EQU (0x1 <<  1) ;- (SPI) Variable Peripheral Select
+AT91C_SPI_PCSDEC          EQU (0x1 <<  2) ;- (SPI) Chip Select Decode
+AT91C_SPI_FDIV            EQU (0x1 <<  3) ;- (SPI) Clock Selection
+AT91C_SPI_MODFDIS         EQU (0x1 <<  4) ;- (SPI) Mode Fault Detection
+AT91C_SPI_LLB             EQU (0x1 <<  7) ;- (SPI) Clock Selection
+AT91C_SPI_PCS             EQU (0xF << 16) ;- (SPI) Peripheral Chip Select
+AT91C_SPI_DLYBCS          EQU (0xFF << 24) ;- (SPI) Delay Between Chip Selects
+// - -------- SPI_RDR : (SPI Offset: 0x8) Receive Data Register -------- 
+AT91C_SPI_RD              EQU (0xFFFF <<  0) ;- (SPI) Receive Data
+AT91C_SPI_RPCS            EQU (0xF << 16) ;- (SPI) Peripheral Chip Select Status
+// - -------- SPI_TDR : (SPI Offset: 0xc) Transmit Data Register -------- 
+AT91C_SPI_TD              EQU (0xFFFF <<  0) ;- (SPI) Transmit Data
+AT91C_SPI_TPCS            EQU (0xF << 16) ;- (SPI) Peripheral Chip Select Status
+// - -------- SPI_SR : (SPI Offset: 0x10) Status Register -------- 
+AT91C_SPI_RDRF            EQU (0x1 <<  0) ;- (SPI) Receive Data Register Full
+AT91C_SPI_TDRE            EQU (0x1 <<  1) ;- (SPI) Transmit Data Register Empty
+AT91C_SPI_MODF            EQU (0x1 <<  2) ;- (SPI) Mode Fault Error
+AT91C_SPI_OVRES           EQU (0x1 <<  3) ;- (SPI) Overrun Error Status
+AT91C_SPI_ENDRX           EQU (0x1 <<  4) ;- (SPI) End of Receiver Transfer
+AT91C_SPI_ENDTX           EQU (0x1 <<  5) ;- (SPI) End of Receiver Transfer
+AT91C_SPI_RXBUFF          EQU (0x1 <<  6) ;- (SPI) RXBUFF Interrupt
+AT91C_SPI_TXBUFE          EQU (0x1 <<  7) ;- (SPI) TXBUFE Interrupt
+AT91C_SPI_NSSR            EQU (0x1 <<  8) ;- (SPI) NSSR Interrupt
+AT91C_SPI_TXEMPTY         EQU (0x1 <<  9) ;- (SPI) TXEMPTY Interrupt
+AT91C_SPI_SPIENS          EQU (0x1 << 16) ;- (SPI) Enable Status
+// - -------- SPI_IER : (SPI Offset: 0x14) Interrupt Enable Register -------- 
+// - -------- SPI_IDR : (SPI Offset: 0x18) Interrupt Disable Register -------- 
+// - -------- SPI_IMR : (SPI Offset: 0x1c) Interrupt Mask Register -------- 
+// - -------- SPI_CSR : (SPI Offset: 0x30) Chip Select Register -------- 
+AT91C_SPI_CPOL            EQU (0x1 <<  0) ;- (SPI) Clock Polarity
+AT91C_SPI_NCPHA           EQU (0x1 <<  1) ;- (SPI) Clock Phase
+AT91C_SPI_CSAAT           EQU (0x1 <<  3) ;- (SPI) Chip Select Active After Transfer
+AT91C_SPI_BITS            EQU (0xF <<  4) ;- (SPI) Bits Per Transfer
+AT91C_SPI_BITS_8          EQU (0x0 <<  4) ;- (SPI) 8 Bits Per transfer
+AT91C_SPI_BITS_9          EQU (0x1 <<  4) ;- (SPI) 9 Bits Per transfer
+AT91C_SPI_BITS_10         EQU (0x2 <<  4) ;- (SPI) 10 Bits Per transfer
+AT91C_SPI_BITS_11         EQU (0x3 <<  4) ;- (SPI) 11 Bits Per transfer
+AT91C_SPI_BITS_12         EQU (0x4 <<  4) ;- (SPI) 12 Bits Per transfer
+AT91C_SPI_BITS_13         EQU (0x5 <<  4) ;- (SPI) 13 Bits Per transfer
+AT91C_SPI_BITS_14         EQU (0x6 <<  4) ;- (SPI) 14 Bits Per transfer
+AT91C_SPI_BITS_15         EQU (0x7 <<  4) ;- (SPI) 15 Bits Per transfer
+AT91C_SPI_BITS_16         EQU (0x8 <<  4) ;- (SPI) 16 Bits Per transfer
+AT91C_SPI_SCBR            EQU (0xFF <<  8) ;- (SPI) Serial Clock Baud Rate
+AT91C_SPI_DLYBS           EQU (0xFF << 16) ;- (SPI) Delay Before SPCK
+AT91C_SPI_DLYBCT          EQU (0xFF << 24) ;- (SPI) Delay Between Consecutive Transfers
+
+// - *****************************************************************************
+// -              SOFTWARE API DEFINITION  FOR Usart
+// - *****************************************************************************
+// - -------- US_CR : (USART Offset: 0x0) Debug Unit Control Register -------- 
+AT91C_US_STTBRK           EQU (0x1 <<  9) ;- (USART) Start Break
+AT91C_US_STPBRK           EQU (0x1 << 10) ;- (USART) Stop Break
+AT91C_US_STTTO            EQU (0x1 << 11) ;- (USART) Start Time-out
+AT91C_US_SENDA            EQU (0x1 << 12) ;- (USART) Send Address
+AT91C_US_RSTIT            EQU (0x1 << 13) ;- (USART) Reset Iterations
+AT91C_US_RSTNACK          EQU (0x1 << 14) ;- (USART) Reset Non Acknowledge
+AT91C_US_RETTO            EQU (0x1 << 15) ;- (USART) Rearm Time-out
+AT91C_US_DTREN            EQU (0x1 << 16) ;- (USART) Data Terminal ready Enable
+AT91C_US_DTRDIS           EQU (0x1 << 17) ;- (USART) Data Terminal ready Disable
+AT91C_US_RTSEN            EQU (0x1 << 18) ;- (USART) Request to Send enable
+AT91C_US_RTSDIS           EQU (0x1 << 19) ;- (USART) Request to Send Disable
+// - -------- US_MR : (USART Offset: 0x4) Debug Unit Mode Register -------- 
+AT91C_US_USMODE           EQU (0xF <<  0) ;- (USART) Usart mode
+AT91C_US_USMODE_NORMAL    EQU (0x0) ;- (USART) Normal
+AT91C_US_USMODE_RS485     EQU (0x1) ;- (USART) RS485
+AT91C_US_USMODE_HWHSH     EQU (0x2) ;- (USART) Hardware Handshaking
+AT91C_US_USMODE_MODEM     EQU (0x3) ;- (USART) Modem
+AT91C_US_USMODE_ISO7816_0 EQU (0x4) ;- (USART) ISO7816 protocol: T = 0
+AT91C_US_USMODE_ISO7816_1 EQU (0x6) ;- (USART) ISO7816 protocol: T = 1
+AT91C_US_USMODE_IRDA      EQU (0x8) ;- (USART) IrDA
+AT91C_US_USMODE_SWHSH     EQU (0xC) ;- (USART) Software Handshaking
+AT91C_US_CLKS             EQU (0x3 <<  4) ;- (USART) Clock Selection (Baud Rate generator Input Clock
+AT91C_US_CLKS_CLOCK       EQU (0x0 <<  4) ;- (USART) Clock
+AT91C_US_CLKS_FDIV1       EQU (0x1 <<  4) ;- (USART) fdiv1
+AT91C_US_CLKS_SLOW        EQU (0x2 <<  4) ;- (USART) slow_clock (ARM)
+AT91C_US_CLKS_EXT         EQU (0x3 <<  4) ;- (USART) External (SCK)
+AT91C_US_CHRL             EQU (0x3 <<  6) ;- (USART) Clock Selection (Baud Rate generator Input Clock
+AT91C_US_CHRL_5_BITS      EQU (0x0 <<  6) ;- (USART) Character Length: 5 bits
+AT91C_US_CHRL_6_BITS      EQU (0x1 <<  6) ;- (USART) Character Length: 6 bits
+AT91C_US_CHRL_7_BITS      EQU (0x2 <<  6) ;- (USART) Character Length: 7 bits
+AT91C_US_CHRL_8_BITS      EQU (0x3 <<  6) ;- (USART) Character Length: 8 bits
+AT91C_US_SYNC             EQU (0x1 <<  8) ;- (USART) Synchronous Mode Select
+AT91C_US_NBSTOP           EQU (0x3 << 12) ;- (USART) Number of Stop bits
+AT91C_US_NBSTOP_1_BIT     EQU (0x0 << 12) ;- (USART) 1 stop bit
+AT91C_US_NBSTOP_15_BIT    EQU (0x1 << 12) ;- (USART) Asynchronous (SYNC=0) 2 stop bits Synchronous (SYNC=1) 2 stop bits
+AT91C_US_NBSTOP_2_BIT     EQU (0x2 << 12) ;- (USART) 2 stop bits
+AT91C_US_MSBF             EQU (0x1 << 16) ;- (USART) Bit Order
+AT91C_US_MODE9            EQU (0x1 << 17) ;- (USART) 9-bit Character length
+AT91C_US_CKLO             EQU (0x1 << 18) ;- (USART) Clock Output Select
+AT91C_US_OVER             EQU (0x1 << 19) ;- (USART) Over Sampling Mode
+AT91C_US_INACK            EQU (0x1 << 20) ;- (USART) Inhibit Non Acknowledge
+AT91C_US_DSNACK           EQU (0x1 << 21) ;- (USART) Disable Successive NACK
+AT91C_US_MAX_ITER         EQU (0x1 << 24) ;- (USART) Number of Repetitions
+AT91C_US_FILTER           EQU (0x1 << 28) ;- (USART) Receive Line Filter
+// - -------- US_IER : (USART Offset: 0x8) Debug Unit Interrupt Enable Register -------- 
+AT91C_US_RXBRK            EQU (0x1 <<  2) ;- (USART) Break Received/End of Break
+AT91C_US_TIMEOUT          EQU (0x1 <<  8) ;- (USART) Receiver Time-out
+AT91C_US_ITERATION        EQU (0x1 << 10) ;- (USART) Max number of Repetitions Reached
+AT91C_US_NACK             EQU (0x1 << 13) ;- (USART) Non Acknowledge
+AT91C_US_RIIC             EQU (0x1 << 16) ;- (USART) Ring INdicator Input Change Flag
+AT91C_US_DSRIC            EQU (0x1 << 17) ;- (USART) Data Set Ready Input Change Flag
+AT91C_US_DCDIC            EQU (0x1 << 18) ;- (USART) Data Carrier Flag
+AT91C_US_CTSIC            EQU (0x1 << 19) ;- (USART) Clear To Send Input Change Flag
+// - -------- US_IDR : (USART Offset: 0xc) Debug Unit Interrupt Disable Register -------- 
+// - -------- US_IMR : (USART Offset: 0x10) Debug Unit Interrupt Mask Register -------- 
+// - -------- US_CSR : (USART Offset: 0x14) Debug Unit Channel Status Register -------- 
+AT91C_US_RI               EQU (0x1 << 20) ;- (USART) Image of RI Input
+AT91C_US_DSR              EQU (0x1 << 21) ;- (USART) Image of DSR Input
+AT91C_US_DCD              EQU (0x1 << 22) ;- (USART) Image of DCD Input
+AT91C_US_CTS              EQU (0x1 << 23) ;- (USART) Image of CTS Input
+
+// - *****************************************************************************
+// -              SOFTWARE API DEFINITION  FOR Synchronous Serial Controller Interface
+// - *****************************************************************************
+// - -------- SSC_CR : (SSC Offset: 0x0) SSC Control Register -------- 
+AT91C_SSC_RXEN            EQU (0x1 <<  0) ;- (SSC) Receive Enable
+AT91C_SSC_RXDIS           EQU (0x1 <<  1) ;- (SSC) Receive Disable
+AT91C_SSC_TXEN            EQU (0x1 <<  8) ;- (SSC) Transmit Enable
+AT91C_SSC_TXDIS           EQU (0x1 <<  9) ;- (SSC) Transmit Disable
+AT91C_SSC_SWRST           EQU (0x1 << 15) ;- (SSC) Software Reset
+// - -------- SSC_RCMR : (SSC Offset: 0x10) SSC Receive Clock Mode Register -------- 
+AT91C_SSC_CKS             EQU (0x3 <<  0) ;- (SSC) Receive/Transmit Clock Selection
+AT91C_SSC_CKS_DIV         EQU (0x0) ;- (SSC) Divided Clock
+AT91C_SSC_CKS_TK          EQU (0x1) ;- (SSC) TK Clock signal
+AT91C_SSC_CKS_RK          EQU (0x2) ;- (SSC) RK pin
+AT91C_SSC_CKO             EQU (0x7 <<  2) ;- (SSC) Receive/Transmit Clock Output Mode Selection
+AT91C_SSC_CKO_NONE        EQU (0x0 <<  2) ;- (SSC) Receive/Transmit Clock Output Mode: None RK pin: Input-only
+AT91C_SSC_CKO_CONTINOUS   EQU (0x1 <<  2) ;- (SSC) Continuous Receive/Transmit Clock RK pin: Output
+AT91C_SSC_CKO_DATA_TX     EQU (0x2 <<  2) ;- (SSC) Receive/Transmit Clock only during data transfers RK pin: Output
+AT91C_SSC_CKI             EQU (0x1 <<  5) ;- (SSC) Receive/Transmit Clock Inversion
+AT91C_SSC_CKG             EQU (0x3 <<  6) ;- (SSC) Receive/Transmit Clock Gating Selection
+AT91C_SSC_CKG_NONE        EQU (0x0 <<  6) ;- (SSC) Receive/Transmit Clock Gating: None, continuous clock
+AT91C_SSC_CKG_LOW         EQU (0x1 <<  6) ;- (SSC) Receive/Transmit Clock enabled only if RF Low
+AT91C_SSC_CKG_HIGH        EQU (0x2 <<  6) ;- (SSC) Receive/Transmit Clock enabled only if RF High
+AT91C_SSC_START           EQU (0xF <<  8) ;- (SSC) Receive/Transmit Start Selection
+AT91C_SSC_START_CONTINOUS EQU (0x0 <<  8) ;- (SSC) Continuous, as soon as the receiver is enabled, and immediately after the end of transfer of the previous data.
+AT91C_SSC_START_TX        EQU (0x1 <<  8) ;- (SSC) Transmit/Receive start
+AT91C_SSC_START_LOW_RF    EQU (0x2 <<  8) ;- (SSC) Detection of a low level on RF input
+AT91C_SSC_START_HIGH_RF   EQU (0x3 <<  8) ;- (SSC) Detection of a high level on RF input
+AT91C_SSC_START_FALL_RF   EQU (0x4 <<  8) ;- (SSC) Detection of a falling edge on RF input
+AT91C_SSC_START_RISE_RF   EQU (0x5 <<  8) ;- (SSC) Detection of a rising edge on RF input
+AT91C_SSC_START_LEVEL_RF  EQU (0x6 <<  8) ;- (SSC) Detection of any level change on RF input
+AT91C_SSC_START_EDGE_RF   EQU (0x7 <<  8) ;- (SSC) Detection of any edge on RF input
+AT91C_SSC_START_0         EQU (0x8 <<  8) ;- (SSC) Compare 0
+AT91C_SSC_STOP            EQU (0x1 << 12) ;- (SSC) Receive Stop Selection
+AT91C_SSC_STTDLY          EQU (0xFF << 16) ;- (SSC) Receive/Transmit Start Delay
+AT91C_SSC_PERIOD          EQU (0xFF << 24) ;- (SSC) Receive/Transmit Period Divider Selection
+// - -------- SSC_RFMR : (SSC Offset: 0x14) SSC Receive Frame Mode Register -------- 
+AT91C_SSC_DATLEN          EQU (0x1F <<  0) ;- (SSC) Data Length
+AT91C_SSC_LOOP            EQU (0x1 <<  5) ;- (SSC) Loop Mode
+AT91C_SSC_MSBF            EQU (0x1 <<  7) ;- (SSC) Most Significant Bit First
+AT91C_SSC_DATNB           EQU (0xF <<  8) ;- (SSC) Data Number per Frame
+AT91C_SSC_FSLEN           EQU (0xF << 16) ;- (SSC) Receive/Transmit Frame Sync length
+AT91C_SSC_FSOS            EQU (0x7 << 20) ;- (SSC) Receive/Transmit Frame Sync Output Selection
+AT91C_SSC_FSOS_NONE       EQU (0x0 << 20) ;- (SSC) Selected Receive/Transmit Frame Sync Signal: None RK pin Input-only
+AT91C_SSC_FSOS_NEGATIVE   EQU (0x1 << 20) ;- (SSC) Selected Receive/Transmit Frame Sync Signal: Negative Pulse
+AT91C_SSC_FSOS_POSITIVE   EQU (0x2 << 20) ;- (SSC) Selected Receive/Transmit Frame Sync Signal: Positive Pulse
+AT91C_SSC_FSOS_LOW        EQU (0x3 << 20) ;- (SSC) Selected Receive/Transmit Frame Sync Signal: Driver Low during data transfer
+AT91C_SSC_FSOS_HIGH       EQU (0x4 << 20) ;- (SSC) Selected Receive/Transmit Frame Sync Signal: Driver High during data transfer
+AT91C_SSC_FSOS_TOGGLE     EQU (0x5 << 20) ;- (SSC) Selected Receive/Transmit Frame Sync Signal: Toggling at each start of data transfer
+AT91C_SSC_FSEDGE          EQU (0x1 << 24) ;- (SSC) Frame Sync Edge Detection
+// - -------- SSC_TCMR : (SSC Offset: 0x18) SSC Transmit Clock Mode Register -------- 
+// - -------- SSC_TFMR : (SSC Offset: 0x1c) SSC Transmit Frame Mode Register -------- 
+AT91C_SSC_DATDEF          EQU (0x1 <<  5) ;- (SSC) Data Default Value
+AT91C_SSC_FSDEN           EQU (0x1 << 23) ;- (SSC) Frame Sync Data Enable
+// - -------- SSC_SR : (SSC Offset: 0x40) SSC Status Register -------- 
+AT91C_SSC_TXRDY           EQU (0x1 <<  0) ;- (SSC) Transmit Ready
+AT91C_SSC_TXEMPTY         EQU (0x1 <<  1) ;- (SSC) Transmit Empty
+AT91C_SSC_ENDTX           EQU (0x1 <<  2) ;- (SSC) End Of Transmission
+AT91C_SSC_TXBUFE          EQU (0x1 <<  3) ;- (SSC) Transmit Buffer Empty
+AT91C_SSC_RXRDY           EQU (0x1 <<  4) ;- (SSC) Receive Ready
+AT91C_SSC_OVRUN           EQU (0x1 <<  5) ;- (SSC) Receive Overrun
+AT91C_SSC_ENDRX           EQU (0x1 <<  6) ;- (SSC) End of Reception
+AT91C_SSC_RXBUFF          EQU (0x1 <<  7) ;- (SSC) Receive Buffer Full
+AT91C_SSC_CP0             EQU (0x1 <<  8) ;- (SSC) Compare 0
+AT91C_SSC_CP1             EQU (0x1 <<  9) ;- (SSC) Compare 1
+AT91C_SSC_TXSYN           EQU (0x1 << 10) ;- (SSC) Transmit Sync
+AT91C_SSC_RXSYN           EQU (0x1 << 11) ;- (SSC) Receive Sync
+AT91C_SSC_TXENA           EQU (0x1 << 16) ;- (SSC) Transmit Enable
+AT91C_SSC_RXENA           EQU (0x1 << 17) ;- (SSC) Receive Enable
+// - -------- SSC_IER : (SSC Offset: 0x44) SSC Interrupt Enable Register -------- 
+// - -------- SSC_IDR : (SSC Offset: 0x48) SSC Interrupt Disable Register -------- 
+// - -------- SSC_IMR : (SSC Offset: 0x4c) SSC Interrupt Mask Register -------- 
+
+// - *****************************************************************************
+// -              SOFTWARE API DEFINITION  FOR Two-wire Interface
+// - *****************************************************************************
+// - -------- TWI_CR : (TWI Offset: 0x0) TWI Control Register -------- 
+AT91C_TWI_START           EQU (0x1 <<  0) ;- (TWI) Send a START Condition
+AT91C_TWI_STOP            EQU (0x1 <<  1) ;- (TWI) Send a STOP Condition
+AT91C_TWI_MSEN            EQU (0x1 <<  2) ;- (TWI) TWI Master Transfer Enabled
+AT91C_TWI_MSDIS           EQU (0x1 <<  3) ;- (TWI) TWI Master Transfer Disabled
+AT91C_TWI_SWRST           EQU (0x1 <<  7) ;- (TWI) Software Reset
+// - -------- TWI_MMR : (TWI Offset: 0x4) TWI Master Mode Register -------- 
+AT91C_TWI_IADRSZ          EQU (0x3 <<  8) ;- (TWI) Internal Device Address Size
+AT91C_TWI_IADRSZ_NO       EQU (0x0 <<  8) ;- (TWI) No internal device address
+AT91C_TWI_IADRSZ_1_BYTE   EQU (0x1 <<  8) ;- (TWI) One-byte internal device address
+AT91C_TWI_IADRSZ_2_BYTE   EQU (0x2 <<  8) ;- (TWI) Two-byte internal device address
+AT91C_TWI_IADRSZ_3_BYTE   EQU (0x3 <<  8) ;- (TWI) Three-byte internal device address
+AT91C_TWI_MREAD           EQU (0x1 << 12) ;- (TWI) Master Read Direction
+AT91C_TWI_DADR            EQU (0x7F << 16) ;- (TWI) Device Address
+// - -------- TWI_CWGR : (TWI Offset: 0x10) TWI Clock Waveform Generator Register -------- 
+AT91C_TWI_CLDIV           EQU (0xFF <<  0) ;- (TWI) Clock Low Divider
+AT91C_TWI_CHDIV           EQU (0xFF <<  8) ;- (TWI) Clock High Divider
+AT91C_TWI_CKDIV           EQU (0x7 << 16) ;- (TWI) Clock Divider
+// - -------- TWI_SR : (TWI Offset: 0x20) TWI Status Register -------- 
+AT91C_TWI_TXCOMP          EQU (0x1 <<  0) ;- (TWI) Transmission Completed
+AT91C_TWI_RXRDY           EQU (0x1 <<  1) ;- (TWI) Receive holding register ReaDY
+AT91C_TWI_TXRDY           EQU (0x1 <<  2) ;- (TWI) Transmit holding register ReaDY
+AT91C_TWI_OVRE            EQU (0x1 <<  6) ;- (TWI) Overrun Error
+AT91C_TWI_UNRE            EQU (0x1 <<  7) ;- (TWI) Underrun Error
+AT91C_TWI_NACK            EQU (0x1 <<  8) ;- (TWI) Not Acknowledged
+// - -------- TWI_IER : (TWI Offset: 0x24) TWI Interrupt Enable Register -------- 
+// - -------- TWI_IDR : (TWI Offset: 0x28) TWI Interrupt Disable Register -------- 
+// - -------- TWI_IMR : (TWI Offset: 0x2c) TWI Interrupt Mask Register -------- 
+
+// - *****************************************************************************
+// -              SOFTWARE API DEFINITION  FOR PWMC Channel Interface
+// - *****************************************************************************
+// - -------- PWMC_CMR : (PWMC_CH Offset: 0x0) PWMC Channel Mode Register -------- 
+AT91C_PWMC_CPRE           EQU (0xF <<  0) ;- (PWMC_CH) Channel Pre-scaler : PWMC_CLKx
+AT91C_PWMC_CPRE_MCK       EQU (0x0) ;- (PWMC_CH) 
+AT91C_PWMC_CPRE_MCKA      EQU (0xB) ;- (PWMC_CH) 
+AT91C_PWMC_CPRE_MCKB      EQU (0xC) ;- (PWMC_CH) 
+AT91C_PWMC_CALG           EQU (0x1 <<  8) ;- (PWMC_CH) Channel Alignment
+AT91C_PWMC_CPOL           EQU (0x1 <<  9) ;- (PWMC_CH) Channel Polarity
+AT91C_PWMC_CPD            EQU (0x1 << 10) ;- (PWMC_CH) Channel Update Period
+// - -------- PWMC_CDTYR : (PWMC_CH Offset: 0x4) PWMC Channel Duty Cycle Register -------- 
+AT91C_PWMC_CDTY           EQU (0x0 <<  0) ;- (PWMC_CH) Channel Duty Cycle
+// - -------- PWMC_CPRDR : (PWMC_CH Offset: 0x8) PWMC Channel Period Register -------- 
+AT91C_PWMC_CPRD           EQU (0x0 <<  0) ;- (PWMC_CH) Channel Period
+// - -------- PWMC_CCNTR : (PWMC_CH Offset: 0xc) PWMC Channel Counter Register -------- 
+AT91C_PWMC_CCNT           EQU (0x0 <<  0) ;- (PWMC_CH) Channel Counter
+// - -------- PWMC_CUPDR : (PWMC_CH Offset: 0x10) PWMC Channel Update Register -------- 
+AT91C_PWMC_CUPD           EQU (0x0 <<  0) ;- (PWMC_CH) Channel Update
+
+// - *****************************************************************************
+// -              SOFTWARE API DEFINITION  FOR Pulse Width Modulation Controller Interface
+// - *****************************************************************************
+// - -------- PWMC_MR : (PWMC Offset: 0x0) PWMC Mode Register -------- 
+AT91C_PWMC_DIVA           EQU (0xFF <<  0) ;- (PWMC) CLKA divide factor.
+AT91C_PWMC_PREA           EQU (0xF <<  8) ;- (PWMC) Divider Input Clock Prescaler A
+AT91C_PWMC_PREA_MCK       EQU (0x0 <<  8) ;- (PWMC) 
+AT91C_PWMC_DIVB           EQU (0xFF << 16) ;- (PWMC) CLKB divide factor.
+AT91C_PWMC_PREB           EQU (0xF << 24) ;- (PWMC) Divider Input Clock Prescaler B
+AT91C_PWMC_PREB_MCK       EQU (0x0 << 24) ;- (PWMC) 
+// - -------- PWMC_ENA : (PWMC Offset: 0x4) PWMC Enable Register -------- 
+AT91C_PWMC_CHID0          EQU (0x1 <<  0) ;- (PWMC) Channel ID 0
+AT91C_PWMC_CHID1          EQU (0x1 <<  1) ;- (PWMC) Channel ID 1
+AT91C_PWMC_CHID2          EQU (0x1 <<  2) ;- (PWMC) Channel ID 2
+AT91C_PWMC_CHID3          EQU (0x1 <<  3) ;- (PWMC) Channel ID 3
+// - -------- PWMC_DIS : (PWMC Offset: 0x8) PWMC Disable Register -------- 
+// - -------- PWMC_SR : (PWMC Offset: 0xc) PWMC Status Register -------- 
+// - -------- PWMC_IER : (PWMC Offset: 0x10) PWMC Interrupt Enable Register -------- 
+// - -------- PWMC_IDR : (PWMC Offset: 0x14) PWMC Interrupt Disable Register -------- 
+// - -------- PWMC_IMR : (PWMC Offset: 0x18) PWMC Interrupt Mask Register -------- 
+// - -------- PWMC_ISR : (PWMC Offset: 0x1c) PWMC Interrupt Status Register -------- 
+
+// - *****************************************************************************
+// -              SOFTWARE API DEFINITION  FOR USB Device Interface
+// - *****************************************************************************
+// - -------- UDP_FRM_NUM : (UDP Offset: 0x0) USB Frame Number Register -------- 
+AT91C_UDP_FRM_NUM         EQU (0x7FF <<  0) ;- (UDP) Frame Number as Defined in the Packet Field Formats
+AT91C_UDP_FRM_ERR         EQU (0x1 << 16) ;- (UDP) Frame Error
+AT91C_UDP_FRM_OK          EQU (0x1 << 17) ;- (UDP) Frame OK
+// - -------- UDP_GLB_STATE : (UDP Offset: 0x4) USB Global State Register -------- 
+AT91C_UDP_FADDEN          EQU (0x1 <<  0) ;- (UDP) Function Address Enable
+AT91C_UDP_CONFG           EQU (0x1 <<  1) ;- (UDP) Configured
+AT91C_UDP_ESR             EQU (0x1 <<  2) ;- (UDP) Enable Send Resume
+AT91C_UDP_RSMINPR         EQU (0x1 <<  3) ;- (UDP) A Resume Has Been Sent to the Host
+AT91C_UDP_RMWUPE          EQU (0x1 <<  4) ;- (UDP) Remote Wake Up Enable
+// - -------- UDP_FADDR : (UDP Offset: 0x8) USB Function Address Register -------- 
+AT91C_UDP_FADD            EQU (0xFF <<  0) ;- (UDP) Function Address Value
+AT91C_UDP_FEN             EQU (0x1 <<  8) ;- (UDP) Function Enable
+// - -------- UDP_IER : (UDP Offset: 0x10) USB Interrupt Enable Register -------- 
+AT91C_UDP_EPINT0          EQU (0x1 <<  0) ;- (UDP) Endpoint 0 Interrupt
+AT91C_UDP_EPINT1          EQU (0x1 <<  1) ;- (UDP) Endpoint 0 Interrupt
+AT91C_UDP_EPINT2          EQU (0x1 <<  2) ;- (UDP) Endpoint 2 Interrupt
+AT91C_UDP_EPINT3          EQU (0x1 <<  3) ;- (UDP) Endpoint 3 Interrupt
+AT91C_UDP_EPINT4          EQU (0x1 <<  4) ;- (UDP) Endpoint 4 Interrupt
+AT91C_UDP_EPINT5          EQU (0x1 <<  5) ;- (UDP) Endpoint 5 Interrupt
+AT91C_UDP_RXSUSP          EQU (0x1 <<  8) ;- (UDP) USB Suspend Interrupt
+AT91C_UDP_RXRSM           EQU (0x1 <<  9) ;- (UDP) USB Resume Interrupt
+AT91C_UDP_EXTRSM          EQU (0x1 << 10) ;- (UDP) USB External Resume Interrupt
+AT91C_UDP_SOFINT          EQU (0x1 << 11) ;- (UDP) USB Start Of frame Interrupt
+AT91C_UDP_WAKEUP          EQU (0x1 << 13) ;- (UDP) USB Resume Interrupt
+// - -------- UDP_IDR : (UDP Offset: 0x14) USB Interrupt Disable Register -------- 
+// - -------- UDP_IMR : (UDP Offset: 0x18) USB Interrupt Mask Register -------- 
+// - -------- UDP_ISR : (UDP Offset: 0x1c) USB Interrupt Status Register -------- 
+AT91C_UDP_ENDBUSRES       EQU (0x1 << 12) ;- (UDP) USB End Of Bus Reset Interrupt
+// - -------- UDP_ICR : (UDP Offset: 0x20) USB Interrupt Clear Register -------- 
+// - -------- UDP_RST_EP : (UDP Offset: 0x28) USB Reset Endpoint Register -------- 
+AT91C_UDP_EP0             EQU (0x1 <<  0) ;- (UDP) Reset Endpoint 0
+AT91C_UDP_EP1             EQU (0x1 <<  1) ;- (UDP) Reset Endpoint 1
+AT91C_UDP_EP2             EQU (0x1 <<  2) ;- (UDP) Reset Endpoint 2
+AT91C_UDP_EP3             EQU (0x1 <<  3) ;- (UDP) Reset Endpoint 3
+AT91C_UDP_EP4             EQU (0x1 <<  4) ;- (UDP) Reset Endpoint 4
+AT91C_UDP_EP5             EQU (0x1 <<  5) ;- (UDP) Reset Endpoint 5
+// - -------- UDP_CSR : (UDP Offset: 0x30) USB Endpoint Control and Status Register -------- 
+AT91C_UDP_TXCOMP          EQU (0x1 <<  0) ;- (UDP) Generates an IN packet with data previously written in the DPR
+AT91C_UDP_RX_DATA_BK0     EQU (0x1 <<  1) ;- (UDP) Receive Data Bank 0
+AT91C_UDP_RXSETUP         EQU (0x1 <<  2) ;- (UDP) Sends STALL to the Host (Control endpoints)
+AT91C_UDP_ISOERROR        EQU (0x1 <<  3) ;- (UDP) Isochronous error (Isochronous endpoints)
+AT91C_UDP_TXPKTRDY        EQU (0x1 <<  4) ;- (UDP) Transmit Packet Ready
+AT91C_UDP_FORCESTALL      EQU (0x1 <<  5) ;- (UDP) Force Stall (used by Control, Bulk and Isochronous endpoints).
+AT91C_UDP_RX_DATA_BK1     EQU (0x1 <<  6) ;- (UDP) Receive Data Bank 1 (only used by endpoints with ping-pong attributes).
+AT91C_UDP_DIR             EQU (0x1 <<  7) ;- (UDP) Transfer Direction
+AT91C_UDP_EPTYPE          EQU (0x7 <<  8) ;- (UDP) Endpoint type
+AT91C_UDP_EPTYPE_CTRL     EQU (0x0 <<  8) ;- (UDP) Control
+AT91C_UDP_EPTYPE_ISO_OUT  EQU (0x1 <<  8) ;- (UDP) Isochronous OUT
+AT91C_UDP_EPTYPE_BULK_OUT EQU (0x2 <<  8) ;- (UDP) Bulk OUT
+AT91C_UDP_EPTYPE_INT_OUT  EQU (0x3 <<  8) ;- (UDP) Interrupt OUT
+AT91C_UDP_EPTYPE_ISO_IN   EQU (0x5 <<  8) ;- (UDP) Isochronous IN
+AT91C_UDP_EPTYPE_BULK_IN  EQU (0x6 <<  8) ;- (UDP) Bulk IN
+AT91C_UDP_EPTYPE_INT_IN   EQU (0x7 <<  8) ;- (UDP) Interrupt IN
+AT91C_UDP_DTGLE           EQU (0x1 << 11) ;- (UDP) Data Toggle
+AT91C_UDP_EPEDS           EQU (0x1 << 15) ;- (UDP) Endpoint Enable Disable
+AT91C_UDP_RXBYTECNT       EQU (0x7FF << 16) ;- (UDP) Number Of Bytes Available in the FIFO
+// - -------- UDP_TXVC : (UDP Offset: 0x74) Transceiver Control Register -------- 
+AT91C_UDP_TXVDIS          EQU (0x1 <<  8) ;- (UDP) 
+AT91C_UDP_PUON            EQU (0x1 <<  9) ;- (UDP) Pull-up ON
+
+// - *****************************************************************************
+// -              SOFTWARE API DEFINITION  FOR Timer Counter Channel Interface
+// - *****************************************************************************
+// - -------- TC_CCR : (TC Offset: 0x0) TC Channel Control Register -------- 
+AT91C_TC_CLKEN            EQU (0x1 <<  0) ;- (TC) Counter Clock Enable Command
+AT91C_TC_CLKDIS           EQU (0x1 <<  1) ;- (TC) Counter Clock Disable Command
+AT91C_TC_SWTRG            EQU (0x1 <<  2) ;- (TC) Software Trigger Command
+// - -------- TC_CMR : (TC Offset: 0x4) TC Channel Mode Register: Capture Mode / Waveform Mode -------- 
+AT91C_TC_CLKS             EQU (0x7 <<  0) ;- (TC) Clock Selection
+AT91C_TC_CLKS_TIMER_DIV1_CLOCK EQU (0x0) ;- (TC) Clock selected: TIMER_DIV1_CLOCK
+AT91C_TC_CLKS_TIMER_DIV2_CLOCK EQU (0x1) ;- (TC) Clock selected: TIMER_DIV2_CLOCK
+AT91C_TC_CLKS_TIMER_DIV3_CLOCK EQU (0x2) ;- (TC) Clock selected: TIMER_DIV3_CLOCK
+AT91C_TC_CLKS_TIMER_DIV4_CLOCK EQU (0x3) ;- (TC) Clock selected: TIMER_DIV4_CLOCK
+AT91C_TC_CLKS_TIMER_DIV5_CLOCK EQU (0x4) ;- (TC) Clock selected: TIMER_DIV5_CLOCK
+AT91C_TC_CLKS_XC0         EQU (0x5) ;- (TC) Clock selected: XC0
+AT91C_TC_CLKS_XC1         EQU (0x6) ;- (TC) Clock selected: XC1
+AT91C_TC_CLKS_XC2         EQU (0x7) ;- (TC) Clock selected: XC2
+AT91C_TC_CLKI             EQU (0x1 <<  3) ;- (TC) Clock Invert
+AT91C_TC_BURST            EQU (0x3 <<  4) ;- (TC) Burst Signal Selection
+AT91C_TC_BURST_NONE       EQU (0x0 <<  4) ;- (TC) The clock is not gated by an external signal
+AT91C_TC_BURST_XC0        EQU (0x1 <<  4) ;- (TC) XC0 is ANDed with the selected clock
+AT91C_TC_BURST_XC1        EQU (0x2 <<  4) ;- (TC) XC1 is ANDed with the selected clock
+AT91C_TC_BURST_XC2        EQU (0x3 <<  4) ;- (TC) XC2 is ANDed with the selected clock
+AT91C_TC_CPCSTOP          EQU (0x1 <<  6) ;- (TC) Counter Clock Stopped with RC Compare
+AT91C_TC_LDBSTOP          EQU (0x1 <<  6) ;- (TC) Counter Clock Stopped with RB Loading
+AT91C_TC_CPCDIS           EQU (0x1 <<  7) ;- (TC) Counter Clock Disable with RC Compare
+AT91C_TC_LDBDIS           EQU (0x1 <<  7) ;- (TC) Counter Clock Disabled with RB Loading
+AT91C_TC_ETRGEDG          EQU (0x3 <<  8) ;- (TC) External Trigger Edge Selection
+AT91C_TC_ETRGEDG_NONE     EQU (0x0 <<  8) ;- (TC) Edge: None
+AT91C_TC_ETRGEDG_RISING   EQU (0x1 <<  8) ;- (TC) Edge: rising edge
+AT91C_TC_ETRGEDG_FALLING  EQU (0x2 <<  8) ;- (TC) Edge: falling edge
+AT91C_TC_ETRGEDG_BOTH     EQU (0x3 <<  8) ;- (TC) Edge: each edge
+AT91C_TC_EEVTEDG          EQU (0x3 <<  8) ;- (TC) External Event Edge Selection
+AT91C_TC_EEVTEDG_NONE     EQU (0x0 <<  8) ;- (TC) Edge: None
+AT91C_TC_EEVTEDG_RISING   EQU (0x1 <<  8) ;- (TC) Edge: rising edge
+AT91C_TC_EEVTEDG_FALLING  EQU (0x2 <<  8) ;- (TC) Edge: falling edge
+AT91C_TC_EEVTEDG_BOTH     EQU (0x3 <<  8) ;- (TC) Edge: each edge
+AT91C_TC_EEVT             EQU (0x3 << 10) ;- (TC) External Event  Selection
+AT91C_TC_EEVT_TIOB        EQU (0x0 << 10) ;- (TC) Signal selected as external event: TIOB TIOB direction: input
+AT91C_TC_EEVT_XC0         EQU (0x1 << 10) ;- (TC) Signal selected as external event: XC0 TIOB direction: output
+AT91C_TC_EEVT_XC1         EQU (0x2 << 10) ;- (TC) Signal selected as external event: XC1 TIOB direction: output
+AT91C_TC_EEVT_XC2         EQU (0x3 << 10) ;- (TC) Signal selected as external event: XC2 TIOB direction: output
+AT91C_TC_ABETRG           EQU (0x1 << 10) ;- (TC) TIOA or TIOB External Trigger Selection
+AT91C_TC_ENETRG           EQU (0x1 << 12) ;- (TC) External Event Trigger enable
+AT91C_TC_WAVESEL          EQU (0x3 << 13) ;- (TC) Waveform  Selection
+AT91C_TC_WAVESEL_UP       EQU (0x0 << 13) ;- (TC) UP mode without atomatic trigger on RC Compare
+AT91C_TC_WAVESEL_UPDOWN   EQU (0x1 << 13) ;- (TC) UPDOWN mode without automatic trigger on RC Compare
+AT91C_TC_WAVESEL_UP_AUTO  EQU (0x2 << 13) ;- (TC) UP mode with automatic trigger on RC Compare
+AT91C_TC_WAVESEL_UPDOWN_AUTO EQU (0x3 << 13) ;- (TC) UPDOWN mode with automatic trigger on RC Compare
+AT91C_TC_CPCTRG           EQU (0x1 << 14) ;- (TC) RC Compare Trigger Enable
+AT91C_TC_WAVE             EQU (0x1 << 15) ;- (TC) 
+AT91C_TC_ACPA             EQU (0x3 << 16) ;- (TC) RA Compare Effect on TIOA
+AT91C_TC_ACPA_NONE        EQU (0x0 << 16) ;- (TC) Effect: none
+AT91C_TC_ACPA_SET         EQU (0x1 << 16) ;- (TC) Effect: set
+AT91C_TC_ACPA_CLEAR       EQU (0x2 << 16) ;- (TC) Effect: clear
+AT91C_TC_ACPA_TOGGLE      EQU (0x3 << 16) ;- (TC) Effect: toggle
+AT91C_TC_LDRA             EQU (0x3 << 16) ;- (TC) RA Loading Selection
+AT91C_TC_LDRA_NONE        EQU (0x0 << 16) ;- (TC) Edge: None
+AT91C_TC_LDRA_RISING      EQU (0x1 << 16) ;- (TC) Edge: rising edge of TIOA
+AT91C_TC_LDRA_FALLING     EQU (0x2 << 16) ;- (TC) Edge: falling edge of TIOA
+AT91C_TC_LDRA_BOTH        EQU (0x3 << 16) ;- (TC) Edge: each edge of TIOA
+AT91C_TC_ACPC             EQU (0x3 << 18) ;- (TC) RC Compare Effect on TIOA
+AT91C_TC_ACPC_NONE        EQU (0x0 << 18) ;- (TC) Effect: none
+AT91C_TC_ACPC_SET         EQU (0x1 << 18) ;- (TC) Effect: set
+AT91C_TC_ACPC_CLEAR       EQU (0x2 << 18) ;- (TC) Effect: clear
+AT91C_TC_ACPC_TOGGLE      EQU (0x3 << 18) ;- (TC) Effect: toggle
+AT91C_TC_LDRB             EQU (0x3 << 18) ;- (TC) RB Loading Selection
+AT91C_TC_LDRB_NONE        EQU (0x0 << 18) ;- (TC) Edge: None
+AT91C_TC_LDRB_RISING      EQU (0x1 << 18) ;- (TC) Edge: rising edge of TIOA
+AT91C_TC_LDRB_FALLING     EQU (0x2 << 18) ;- (TC) Edge: falling edge of TIOA
+AT91C_TC_LDRB_BOTH        EQU (0x3 << 18) ;- (TC) Edge: each edge of TIOA
+AT91C_TC_AEEVT            EQU (0x3 << 20) ;- (TC) External Event Effect on TIOA
+AT91C_TC_AEEVT_NONE       EQU (0x0 << 20) ;- (TC) Effect: none
+AT91C_TC_AEEVT_SET        EQU (0x1 << 20) ;- (TC) Effect: set
+AT91C_TC_AEEVT_CLEAR      EQU (0x2 << 20) ;- (TC) Effect: clear
+AT91C_TC_AEEVT_TOGGLE     EQU (0x3 << 20) ;- (TC) Effect: toggle
+AT91C_TC_ASWTRG           EQU (0x3 << 22) ;- (TC) Software Trigger Effect on TIOA
+AT91C_TC_ASWTRG_NONE      EQU (0x0 << 22) ;- (TC) Effect: none
+AT91C_TC_ASWTRG_SET       EQU (0x1 << 22) ;- (TC) Effect: set
+AT91C_TC_ASWTRG_CLEAR     EQU (0x2 << 22) ;- (TC) Effect: clear
+AT91C_TC_ASWTRG_TOGGLE    EQU (0x3 << 22) ;- (TC) Effect: toggle
+AT91C_TC_BCPB             EQU (0x3 << 24) ;- (TC) RB Compare Effect on TIOB
+AT91C_TC_BCPB_NONE        EQU (0x0 << 24) ;- (TC) Effect: none
+AT91C_TC_BCPB_SET         EQU (0x1 << 24) ;- (TC) Effect: set
+AT91C_TC_BCPB_CLEAR       EQU (0x2 << 24) ;- (TC) Effect: clear
+AT91C_TC_BCPB_TOGGLE      EQU (0x3 << 24) ;- (TC) Effect: toggle
+AT91C_TC_BCPC             EQU (0x3 << 26) ;- (TC) RC Compare Effect on TIOB
+AT91C_TC_BCPC_NONE        EQU (0x0 << 26) ;- (TC) Effect: none
+AT91C_TC_BCPC_SET         EQU (0x1 << 26) ;- (TC) Effect: set
+AT91C_TC_BCPC_CLEAR       EQU (0x2 << 26) ;- (TC) Effect: clear
+AT91C_TC_BCPC_TOGGLE      EQU (0x3 << 26) ;- (TC) Effect: toggle
+AT91C_TC_BEEVT            EQU (0x3 << 28) ;- (TC) External Event Effect on TIOB
+AT91C_TC_BEEVT_NONE       EQU (0x0 << 28) ;- (TC) Effect: none
+AT91C_TC_BEEVT_SET        EQU (0x1 << 28) ;- (TC) Effect: set
+AT91C_TC_BEEVT_CLEAR      EQU (0x2 << 28) ;- (TC) Effect: clear
+AT91C_TC_BEEVT_TOGGLE     EQU (0x3 << 28) ;- (TC) Effect: toggle
+AT91C_TC_BSWTRG           EQU (0x3 << 30) ;- (TC) Software Trigger Effect on TIOB
+AT91C_TC_BSWTRG_NONE      EQU (0x0 << 30) ;- (TC) Effect: none
+AT91C_TC_BSWTRG_SET       EQU (0x1 << 30) ;- (TC) Effect: set
+AT91C_TC_BSWTRG_CLEAR     EQU (0x2 << 30) ;- (TC) Effect: clear
+AT91C_TC_BSWTRG_TOGGLE    EQU (0x3 << 30) ;- (TC) Effect: toggle
+// - -------- TC_SR : (TC Offset: 0x20) TC Channel Status Register -------- 
+AT91C_TC_COVFS            EQU (0x1 <<  0) ;- (TC) Counter Overflow
+AT91C_TC_LOVRS            EQU (0x1 <<  1) ;- (TC) Load Overrun
+AT91C_TC_CPAS             EQU (0x1 <<  2) ;- (TC) RA Compare
+AT91C_TC_CPBS             EQU (0x1 <<  3) ;- (TC) RB Compare
+AT91C_TC_CPCS             EQU (0x1 <<  4) ;- (TC) RC Compare
+AT91C_TC_LDRAS            EQU (0x1 <<  5) ;- (TC) RA Loading
+AT91C_TC_LDRBS            EQU (0x1 <<  6) ;- (TC) RB Loading
+AT91C_TC_ETRGS            EQU (0x1 <<  7) ;- (TC) External Trigger
+AT91C_TC_CLKSTA           EQU (0x1 << 16) ;- (TC) Clock Enabling
+AT91C_TC_MTIOA            EQU (0x1 << 17) ;- (TC) TIOA Mirror
+AT91C_TC_MTIOB            EQU (0x1 << 18) ;- (TC) TIOA Mirror
+// - -------- TC_IER : (TC Offset: 0x24) TC Channel Interrupt Enable Register -------- 
+// - -------- TC_IDR : (TC Offset: 0x28) TC Channel Interrupt Disable Register -------- 
+// - -------- TC_IMR : (TC Offset: 0x2c) TC Channel Interrupt Mask Register -------- 
+
+// - *****************************************************************************
+// -              SOFTWARE API DEFINITION  FOR Timer Counter Interface
+// - *****************************************************************************
+// - -------- TCB_BCR : (TCB Offset: 0xc0) TC Block Control Register -------- 
+AT91C_TCB_SYNC            EQU (0x1 <<  0) ;- (TCB) Synchro Command
+// - -------- TCB_BMR : (TCB Offset: 0xc4) TC Block Mode Register -------- 
+AT91C_TCB_TC0XC0S         EQU (0x3 <<  0) ;- (TCB) External Clock Signal 0 Selection
+AT91C_TCB_TC0XC0S_TCLK0   EQU (0x0) ;- (TCB) TCLK0 connected to XC0
+AT91C_TCB_TC0XC0S_NONE    EQU (0x1) ;- (TCB) None signal connected to XC0
+AT91C_TCB_TC0XC0S_TIOA1   EQU (0x2) ;- (TCB) TIOA1 connected to XC0
+AT91C_TCB_TC0XC0S_TIOA2   EQU (0x3) ;- (TCB) TIOA2 connected to XC0
+AT91C_TCB_TC1XC1S         EQU (0x3 <<  2) ;- (TCB) External Clock Signal 1 Selection
+AT91C_TCB_TC1XC1S_TCLK1   EQU (0x0 <<  2) ;- (TCB) TCLK1 connected to XC1
+AT91C_TCB_TC1XC1S_NONE    EQU (0x1 <<  2) ;- (TCB) None signal connected to XC1
+AT91C_TCB_TC1XC1S_TIOA0   EQU (0x2 <<  2) ;- (TCB) TIOA0 connected to XC1
+AT91C_TCB_TC1XC1S_TIOA2   EQU (0x3 <<  2) ;- (TCB) TIOA2 connected to XC1
+AT91C_TCB_TC2XC2S         EQU (0x3 <<  4) ;- (TCB) External Clock Signal 2 Selection
+AT91C_TCB_TC2XC2S_TCLK2   EQU (0x0 <<  4) ;- (TCB) TCLK2 connected to XC2
+AT91C_TCB_TC2XC2S_NONE    EQU (0x1 <<  4) ;- (TCB) None signal connected to XC2
+AT91C_TCB_TC2XC2S_TIOA0   EQU (0x2 <<  4) ;- (TCB) TIOA0 connected to XC2
+AT91C_TCB_TC2XC2S_TIOA1   EQU (0x3 <<  4) ;- (TCB) TIOA2 connected to XC2
+
+// - *****************************************************************************
+// -              SOFTWARE API DEFINITION  FOR Control Area Network MailBox Interface
+// - *****************************************************************************
+// - -------- CAN_MMR : (CAN_MB Offset: 0x0) CAN Message Mode Register -------- 
+AT91C_CAN_MTIMEMARK       EQU (0xFFFF <<  0) ;- (CAN_MB) Mailbox Timemark
+AT91C_CAN_PRIOR           EQU (0xF << 16) ;- (CAN_MB) Mailbox Priority
+AT91C_CAN_MOT             EQU (0x7 << 24) ;- (CAN_MB) Mailbox Object Type
+AT91C_CAN_MOT_DIS         EQU (0x0 << 24) ;- (CAN_MB) 
+AT91C_CAN_MOT_RX          EQU (0x1 << 24) ;- (CAN_MB) 
+AT91C_CAN_MOT_RXOVERWRITE EQU (0x2 << 24) ;- (CAN_MB) 
+AT91C_CAN_MOT_TX          EQU (0x3 << 24) ;- (CAN_MB) 
+AT91C_CAN_MOT_CONSUMER    EQU (0x4 << 24) ;- (CAN_MB) 
+AT91C_CAN_MOT_PRODUCER    EQU (0x5 << 24) ;- (CAN_MB) 
+// - -------- CAN_MAM : (CAN_MB Offset: 0x4) CAN Message Acceptance Mask Register -------- 
+AT91C_CAN_MIDvB           EQU (0x3FFFF <<  0) ;- (CAN_MB) Complementary bits for identifier in extended mode
+AT91C_CAN_MIDvA           EQU (0x7FF << 18) ;- (CAN_MB) Identifier for standard frame mode
+AT91C_CAN_MIDE            EQU (0x1 << 29) ;- (CAN_MB) Identifier Version
+// - -------- CAN_MID : (CAN_MB Offset: 0x8) CAN Message ID Register -------- 
+// - -------- CAN_MFID : (CAN_MB Offset: 0xc) CAN Message Family ID Register -------- 
+// - -------- CAN_MSR : (CAN_MB Offset: 0x10) CAN Message Status Register -------- 
+AT91C_CAN_MTIMESTAMP      EQU (0xFFFF <<  0) ;- (CAN_MB) Timer Value
+AT91C_CAN_MDLC            EQU (0xF << 16) ;- (CAN_MB) Mailbox Data Length Code
+AT91C_CAN_MRTR            EQU (0x1 << 20) ;- (CAN_MB) Mailbox Remote Transmission Request
+AT91C_CAN_MABT            EQU (0x1 << 22) ;- (CAN_MB) Mailbox Message Abort
+AT91C_CAN_MRDY            EQU (0x1 << 23) ;- (CAN_MB) Mailbox Ready
+AT91C_CAN_MMI             EQU (0x1 << 24) ;- (CAN_MB) Mailbox Message Ignored
+// - -------- CAN_MDL : (CAN_MB Offset: 0x14) CAN Message Data Low Register -------- 
+// - -------- CAN_MDH : (CAN_MB Offset: 0x18) CAN Message Data High Register -------- 
+// - -------- CAN_MCR : (CAN_MB Offset: 0x1c) CAN Message Control Register -------- 
+AT91C_CAN_MACR            EQU (0x1 << 22) ;- (CAN_MB) Abort Request for Mailbox
+AT91C_CAN_MTCR            EQU (0x1 << 23) ;- (CAN_MB) Mailbox Transfer Command
+
+// - *****************************************************************************
+// -              SOFTWARE API DEFINITION  FOR Control Area Network Interface
+// - *****************************************************************************
+// - -------- CAN_MR : (CAN Offset: 0x0) CAN Mode Register -------- 
+AT91C_CAN_CANEN           EQU (0x1 <<  0) ;- (CAN) CAN Controller Enable
+AT91C_CAN_LPM             EQU (0x1 <<  1) ;- (CAN) Disable/Enable Low Power Mode
+AT91C_CAN_ABM             EQU (0x1 <<  2) ;- (CAN) Disable/Enable Autobaud/Listen Mode
+AT91C_CAN_OVL             EQU (0x1 <<  3) ;- (CAN) Disable/Enable Overload Frame
+AT91C_CAN_TEOF            EQU (0x1 <<  4) ;- (CAN) Time Stamp messages at each end of Frame
+AT91C_CAN_TTM             EQU (0x1 <<  5) ;- (CAN) Disable/Enable Time Trigger Mode
+AT91C_CAN_TIMFRZ          EQU (0x1 <<  6) ;- (CAN) Enable Timer Freeze
+AT91C_CAN_DRPT            EQU (0x1 <<  7) ;- (CAN) Disable Repeat
+// - -------- CAN_IER : (CAN Offset: 0x4) CAN Interrupt Enable Register -------- 
+AT91C_CAN_MB0             EQU (0x1 <<  0) ;- (CAN) Mailbox 0 Flag
+AT91C_CAN_MB1             EQU (0x1 <<  1) ;- (CAN) Mailbox 1 Flag
+AT91C_CAN_MB2             EQU (0x1 <<  2) ;- (CAN) Mailbox 2 Flag
+AT91C_CAN_MB3             EQU (0x1 <<  3) ;- (CAN) Mailbox 3 Flag
+AT91C_CAN_MB4             EQU (0x1 <<  4) ;- (CAN) Mailbox 4 Flag
+AT91C_CAN_MB5             EQU (0x1 <<  5) ;- (CAN) Mailbox 5 Flag
+AT91C_CAN_MB6             EQU (0x1 <<  6) ;- (CAN) Mailbox 6 Flag
+AT91C_CAN_MB7             EQU (0x1 <<  7) ;- (CAN) Mailbox 7 Flag
+AT91C_CAN_MB8             EQU (0x1 <<  8) ;- (CAN) Mailbox 8 Flag
+AT91C_CAN_MB9             EQU (0x1 <<  9) ;- (CAN) Mailbox 9 Flag
+AT91C_CAN_MB10            EQU (0x1 << 10) ;- (CAN) Mailbox 10 Flag
+AT91C_CAN_MB11            EQU (0x1 << 11) ;- (CAN) Mailbox 11 Flag
+AT91C_CAN_MB12            EQU (0x1 << 12) ;- (CAN) Mailbox 12 Flag
+AT91C_CAN_MB13            EQU (0x1 << 13) ;- (CAN) Mailbox 13 Flag
+AT91C_CAN_MB14            EQU (0x1 << 14) ;- (CAN) Mailbox 14 Flag
+AT91C_CAN_MB15            EQU (0x1 << 15) ;- (CAN) Mailbox 15 Flag
+AT91C_CAN_ERRA            EQU (0x1 << 16) ;- (CAN) Error Active Mode Flag
+AT91C_CAN_WARN            EQU (0x1 << 17) ;- (CAN) Warning Limit Flag
+AT91C_CAN_ERRP            EQU (0x1 << 18) ;- (CAN) Error Passive Mode Flag
+AT91C_CAN_BOFF            EQU (0x1 << 19) ;- (CAN) Bus Off Mode Flag
+AT91C_CAN_SLEEP           EQU (0x1 << 20) ;- (CAN) Sleep Flag
+AT91C_CAN_WAKEUP          EQU (0x1 << 21) ;- (CAN) Wakeup Flag
+AT91C_CAN_TOVF            EQU (0x1 << 22) ;- (CAN) Timer Overflow Flag
+AT91C_CAN_TSTP            EQU (0x1 << 23) ;- (CAN) Timestamp Flag
+AT91C_CAN_CERR            EQU (0x1 << 24) ;- (CAN) CRC Error
+AT91C_CAN_SERR            EQU (0x1 << 25) ;- (CAN) Stuffing Error
+AT91C_CAN_AERR            EQU (0x1 << 26) ;- (CAN) Acknowledgment Error
+AT91C_CAN_FERR            EQU (0x1 << 27) ;- (CAN) Form Error
+AT91C_CAN_BERR            EQU (0x1 << 28) ;- (CAN) Bit Error
+// - -------- CAN_IDR : (CAN Offset: 0x8) CAN Interrupt Disable Register -------- 
+// - -------- CAN_IMR : (CAN Offset: 0xc) CAN Interrupt Mask Register -------- 
+// - -------- CAN_SR : (CAN Offset: 0x10) CAN Status Register -------- 
+AT91C_CAN_RBSY            EQU (0x1 << 29) ;- (CAN) Receiver Busy
+AT91C_CAN_TBSY            EQU (0x1 << 30) ;- (CAN) Transmitter Busy
+AT91C_CAN_OVLY            EQU (0x1 << 31) ;- (CAN) Overload Busy
+// - -------- CAN_BR : (CAN Offset: 0x14) CAN Baudrate Register -------- 
+AT91C_CAN_PHASE2          EQU (0x7 <<  0) ;- (CAN) Phase 2 segment
+AT91C_CAN_PHASE1          EQU (0x7 <<  4) ;- (CAN) Phase 1 segment
+AT91C_CAN_PROPAG          EQU (0x7 <<  8) ;- (CAN) Programmation time segment
+AT91C_CAN_SYNC            EQU (0x3 << 12) ;- (CAN) Re-synchronization jump width segment
+AT91C_CAN_BRP             EQU (0x7F << 16) ;- (CAN) Baudrate Prescaler
+AT91C_CAN_SMP             EQU (0x1 << 24) ;- (CAN) Sampling mode
+// - -------- CAN_TIM : (CAN Offset: 0x18) CAN Timer Register -------- 
+AT91C_CAN_TIMER           EQU (0xFFFF <<  0) ;- (CAN) Timer field
+// - -------- CAN_TIMESTP : (CAN Offset: 0x1c) CAN Timestamp Register -------- 
+// - -------- CAN_ECR : (CAN Offset: 0x20) CAN Error Counter Register -------- 
+AT91C_CAN_REC             EQU (0xFF <<  0) ;- (CAN) Receive Error Counter
+AT91C_CAN_TEC             EQU (0xFF << 16) ;- (CAN) Transmit Error Counter
+// - -------- CAN_TCR : (CAN Offset: 0x24) CAN Transfer Command Register -------- 
+AT91C_CAN_TIMRST          EQU (0x1 << 31) ;- (CAN) Timer Reset Field
+// - -------- CAN_ACR : (CAN Offset: 0x28) CAN Abort Command Register -------- 
+
+// - *****************************************************************************
+// -              SOFTWARE API DEFINITION  FOR Ethernet MAC 10/100
+// - *****************************************************************************
+// - -------- EMAC_NCR : (EMAC Offset: 0x0)  -------- 
+AT91C_EMAC_LB             EQU (0x1 <<  0) ;- (EMAC) Loopback. Optional. When set, loopback signal is at high level.
+AT91C_EMAC_LLB            EQU (0x1 <<  1) ;- (EMAC) Loopback local. 
+AT91C_EMAC_RE             EQU (0x1 <<  2) ;- (EMAC) Receive enable. 
+AT91C_EMAC_TE             EQU (0x1 <<  3) ;- (EMAC) Transmit enable. 
+AT91C_EMAC_MPE            EQU (0x1 <<  4) ;- (EMAC) Management port enable. 
+AT91C_EMAC_CLRSTAT        EQU (0x1 <<  5) ;- (EMAC) Clear statistics registers. 
+AT91C_EMAC_INCSTAT        EQU (0x1 <<  6) ;- (EMAC) Increment statistics registers. 
+AT91C_EMAC_WESTAT         EQU (0x1 <<  7) ;- (EMAC) Write enable for statistics registers. 
+AT91C_EMAC_BP             EQU (0x1 <<  8) ;- (EMAC) Back pressure. 
+AT91C_EMAC_TSTART         EQU (0x1 <<  9) ;- (EMAC) Start Transmission. 
+AT91C_EMAC_THALT          EQU (0x1 << 10) ;- (EMAC) Transmission Halt. 
+AT91C_EMAC_TPFR           EQU (0x1 << 11) ;- (EMAC) Transmit pause frame 
+AT91C_EMAC_TZQ            EQU (0x1 << 12) ;- (EMAC) Transmit zero quantum pause frame
+// - -------- EMAC_NCFGR : (EMAC Offset: 0x4) Network Configuration Register -------- 
+AT91C_EMAC_SPD            EQU (0x1 <<  0) ;- (EMAC) Speed. 
+AT91C_EMAC_FD             EQU (0x1 <<  1) ;- (EMAC) Full duplex. 
+AT91C_EMAC_JFRAME         EQU (0x1 <<  3) ;- (EMAC) Jumbo Frames. 
+AT91C_EMAC_CAF            EQU (0x1 <<  4) ;- (EMAC) Copy all frames. 
+AT91C_EMAC_NBC            EQU (0x1 <<  5) ;- (EMAC) No broadcast. 
+AT91C_EMAC_MTI            EQU (0x1 <<  6) ;- (EMAC) Multicast hash event enable
+AT91C_EMAC_UNI            EQU (0x1 <<  7) ;- (EMAC) Unicast hash enable. 
+AT91C_EMAC_BIG            EQU (0x1 <<  8) ;- (EMAC) Receive 1522 bytes. 
+AT91C_EMAC_EAE            EQU (0x1 <<  9) ;- (EMAC) External address match enable. 
+AT91C_EMAC_CLK            EQU (0x3 << 10) ;- (EMAC) 
+AT91C_EMAC_CLK_HCLK_8     EQU (0x0 << 10) ;- (EMAC) HCLK divided by 8
+AT91C_EMAC_CLK_HCLK_16    EQU (0x1 << 10) ;- (EMAC) HCLK divided by 16
+AT91C_EMAC_CLK_HCLK_32    EQU (0x2 << 10) ;- (EMAC) HCLK divided by 32
+AT91C_EMAC_CLK_HCLK_64    EQU (0x3 << 10) ;- (EMAC) HCLK divided by 64
+AT91C_EMAC_RTY            EQU (0x1 << 12) ;- (EMAC) 
+AT91C_EMAC_PAE            EQU (0x1 << 13) ;- (EMAC) 
+AT91C_EMAC_RBOF           EQU (0x3 << 14) ;- (EMAC) 
+AT91C_EMAC_RBOF_OFFSET_0  EQU (0x0 << 14) ;- (EMAC) no offset from start of receive buffer
+AT91C_EMAC_RBOF_OFFSET_1  EQU (0x1 << 14) ;- (EMAC) one byte offset from start of receive buffer
+AT91C_EMAC_RBOF_OFFSET_2  EQU (0x2 << 14) ;- (EMAC) two bytes offset from start of receive buffer
+AT91C_EMAC_RBOF_OFFSET_3  EQU (0x3 << 14) ;- (EMAC) three bytes offset from start of receive buffer
+AT91C_EMAC_RLCE           EQU (0x1 << 16) ;- (EMAC) Receive Length field Checking Enable
+AT91C_EMAC_DRFCS          EQU (0x1 << 17) ;- (EMAC) Discard Receive FCS
+AT91C_EMAC_EFRHD          EQU (0x1 << 18) ;- (EMAC) 
+AT91C_EMAC_IRXFCS         EQU (0x1 << 19) ;- (EMAC) Ignore RX FCS
+// - -------- EMAC_NSR : (EMAC Offset: 0x8) Network Status Register -------- 
+AT91C_EMAC_LINKR          EQU (0x1 <<  0) ;- (EMAC) 
+AT91C_EMAC_MDIO           EQU (0x1 <<  1) ;- (EMAC) 
+AT91C_EMAC_IDLE           EQU (0x1 <<  2) ;- (EMAC) 
+// - -------- EMAC_TSR : (EMAC Offset: 0x14) Transmit Status Register -------- 
+AT91C_EMAC_UBR            EQU (0x1 <<  0) ;- (EMAC) 
+AT91C_EMAC_COL            EQU (0x1 <<  1) ;- (EMAC) 
+AT91C_EMAC_RLES           EQU (0x1 <<  2) ;- (EMAC) 
+AT91C_EMAC_TGO            EQU (0x1 <<  3) ;- (EMAC) Transmit Go
+AT91C_EMAC_BEX            EQU (0x1 <<  4) ;- (EMAC) Buffers exhausted mid frame
+AT91C_EMAC_COMP           EQU (0x1 <<  5) ;- (EMAC) 
+AT91C_EMAC_UND            EQU (0x1 <<  6) ;- (EMAC) 
+// - -------- EMAC_RSR : (EMAC Offset: 0x20) Receive Status Register -------- 
+AT91C_EMAC_BNA            EQU (0x1 <<  0) ;- (EMAC) 
+AT91C_EMAC_REC            EQU (0x1 <<  1) ;- (EMAC) 
+AT91C_EMAC_OVR            EQU (0x1 <<  2) ;- (EMAC) 
+// - -------- EMAC_ISR : (EMAC Offset: 0x24) Interrupt Status Register -------- 
+AT91C_EMAC_MFD            EQU (0x1 <<  0) ;- (EMAC) 
+AT91C_EMAC_RCOMP          EQU (0x1 <<  1) ;- (EMAC) 
+AT91C_EMAC_RXUBR          EQU (0x1 <<  2) ;- (EMAC) 
+AT91C_EMAC_TXUBR          EQU (0x1 <<  3) ;- (EMAC) 
+AT91C_EMAC_TUNDR          EQU (0x1 <<  4) ;- (EMAC) 
+AT91C_EMAC_RLEX           EQU (0x1 <<  5) ;- (EMAC) 
+AT91C_EMAC_TXERR          EQU (0x1 <<  6) ;- (EMAC) 
+AT91C_EMAC_TCOMP          EQU (0x1 <<  7) ;- (EMAC) 
+AT91C_EMAC_LINK           EQU (0x1 <<  9) ;- (EMAC) 
+AT91C_EMAC_ROVR           EQU (0x1 << 10) ;- (EMAC) 
+AT91C_EMAC_HRESP          EQU (0x1 << 11) ;- (EMAC) 
+AT91C_EMAC_PFRE           EQU (0x1 << 12) ;- (EMAC) 
+AT91C_EMAC_PTZ            EQU (0x1 << 13) ;- (EMAC) 
+// - -------- EMAC_IER : (EMAC Offset: 0x28) Interrupt Enable Register -------- 
+// - -------- EMAC_IDR : (EMAC Offset: 0x2c) Interrupt Disable Register -------- 
+// - -------- EMAC_IMR : (EMAC Offset: 0x30) Interrupt Mask Register -------- 
+// - -------- EMAC_MAN : (EMAC Offset: 0x34) PHY Maintenance Register -------- 
+AT91C_EMAC_DATA           EQU (0xFFFF <<  0) ;- (EMAC) 
+AT91C_EMAC_CODE           EQU (0x3 << 16) ;- (EMAC) 
+AT91C_EMAC_REGA           EQU (0x1F << 18) ;- (EMAC) 
+AT91C_EMAC_PHYA           EQU (0x1F << 23) ;- (EMAC) 
+AT91C_EMAC_RW             EQU (0x3 << 28) ;- (EMAC) 
+AT91C_EMAC_SOF            EQU (0x3 << 30) ;- (EMAC) 
+// - -------- EMAC_USRIO : (EMAC Offset: 0xc0) USER Input Output Register -------- 
+AT91C_EMAC_RMII           EQU (0x1 <<  0) ;- (EMAC) Reduce MII
+AT91C_EMAC_CLKEN          EQU (0x1 <<  1) ;- (EMAC) Clock Enable
+// - -------- EMAC_WOL : (EMAC Offset: 0xc4) Wake On LAN Register -------- 
+AT91C_EMAC_IP             EQU (0xFFFF <<  0) ;- (EMAC) ARP request IP address
+AT91C_EMAC_MAG            EQU (0x1 << 16) ;- (EMAC) Magic packet event enable
+AT91C_EMAC_ARP            EQU (0x1 << 17) ;- (EMAC) ARP request event enable
+AT91C_EMAC_SA1            EQU (0x1 << 18) ;- (EMAC) Specific address register 1 event enable
+// - -------- EMAC_REV : (EMAC Offset: 0xfc) Revision Register -------- 
+AT91C_EMAC_REVREF         EQU (0xFFFF <<  0) ;- (EMAC) 
+AT91C_EMAC_PARTREF        EQU (0xFFFF << 16) ;- (EMAC) 
+
+// - *****************************************************************************
+// -              SOFTWARE API DEFINITION  FOR Analog to Digital Convertor
+// - *****************************************************************************
+// - -------- ADC_CR : (ADC Offset: 0x0) ADC Control Register -------- 
+AT91C_ADC_SWRST           EQU (0x1 <<  0) ;- (ADC) Software Reset
+AT91C_ADC_START           EQU (0x1 <<  1) ;- (ADC) Start Conversion
+// - -------- ADC_MR : (ADC Offset: 0x4) ADC Mode Register -------- 
+AT91C_ADC_TRGEN           EQU (0x1 <<  0) ;- (ADC) Trigger Enable
+AT91C_ADC_TRGEN_DIS       EQU (0x0) ;- (ADC) Hradware triggers are disabled. Starting a conversion is only possible by software
+AT91C_ADC_TRGEN_EN        EQU (0x1) ;- (ADC) Hardware trigger selected by TRGSEL field is enabled.
+AT91C_ADC_TRGSEL          EQU (0x7 <<  1) ;- (ADC) Trigger Selection
+AT91C_ADC_TRGSEL_TIOA0    EQU (0x0 <<  1) ;- (ADC) Selected TRGSEL = TIAO0
+AT91C_ADC_TRGSEL_TIOA1    EQU (0x1 <<  1) ;- (ADC) Selected TRGSEL = TIAO1
+AT91C_ADC_TRGSEL_TIOA2    EQU (0x2 <<  1) ;- (ADC) Selected TRGSEL = TIAO2
+AT91C_ADC_TRGSEL_TIOA3    EQU (0x3 <<  1) ;- (ADC) Selected TRGSEL = TIAO3
+AT91C_ADC_TRGSEL_TIOA4    EQU (0x4 <<  1) ;- (ADC) Selected TRGSEL = TIAO4
+AT91C_ADC_TRGSEL_TIOA5    EQU (0x5 <<  1) ;- (ADC) Selected TRGSEL = TIAO5
+AT91C_ADC_TRGSEL_EXT      EQU (0x6 <<  1) ;- (ADC) Selected TRGSEL = External Trigger
+AT91C_ADC_LOWRES          EQU (0x1 <<  4) ;- (ADC) Resolution.
+AT91C_ADC_LOWRES_10_BIT   EQU (0x0 <<  4) ;- (ADC) 10-bit resolution
+AT91C_ADC_LOWRES_8_BIT    EQU (0x1 <<  4) ;- (ADC) 8-bit resolution
+AT91C_ADC_SLEEP           EQU (0x1 <<  5) ;- (ADC) Sleep Mode
+AT91C_ADC_SLEEP_NORMAL_MODE EQU (0x0 <<  5) ;- (ADC) Normal Mode
+AT91C_ADC_SLEEP_MODE      EQU (0x1 <<  5) ;- (ADC) Sleep Mode
+AT91C_ADC_PRESCAL         EQU (0x3F <<  8) ;- (ADC) Prescaler rate selection
+AT91C_ADC_STARTUP         EQU (0x1F << 16) ;- (ADC) Startup Time
+AT91C_ADC_SHTIM           EQU (0xF << 24) ;- (ADC) Sample & Hold Time
+// - -------- 	ADC_CHER : (ADC Offset: 0x10) ADC Channel Enable Register -------- 
+AT91C_ADC_CH0             EQU (0x1 <<  0) ;- (ADC) Channel 0
+AT91C_ADC_CH1             EQU (0x1 <<  1) ;- (ADC) Channel 1
+AT91C_ADC_CH2             EQU (0x1 <<  2) ;- (ADC) Channel 2
+AT91C_ADC_CH3             EQU (0x1 <<  3) ;- (ADC) Channel 3
+AT91C_ADC_CH4             EQU (0x1 <<  4) ;- (ADC) Channel 4
+AT91C_ADC_CH5             EQU (0x1 <<  5) ;- (ADC) Channel 5
+AT91C_ADC_CH6             EQU (0x1 <<  6) ;- (ADC) Channel 6
+AT91C_ADC_CH7             EQU (0x1 <<  7) ;- (ADC) Channel 7
+// - -------- 	ADC_CHDR : (ADC Offset: 0x14) ADC Channel Disable Register -------- 
+// - -------- 	ADC_CHSR : (ADC Offset: 0x18) ADC Channel Status Register -------- 
+// - -------- ADC_SR : (ADC Offset: 0x1c) ADC Status Register -------- 
+AT91C_ADC_EOC0            EQU (0x1 <<  0) ;- (ADC) End of Conversion
+AT91C_ADC_EOC1            EQU (0x1 <<  1) ;- (ADC) End of Conversion
+AT91C_ADC_EOC2            EQU (0x1 <<  2) ;- (ADC) End of Conversion
+AT91C_ADC_EOC3            EQU (0x1 <<  3) ;- (ADC) End of Conversion
+AT91C_ADC_EOC4            EQU (0x1 <<  4) ;- (ADC) End of Conversion
+AT91C_ADC_EOC5            EQU (0x1 <<  5) ;- (ADC) End of Conversion
+AT91C_ADC_EOC6            EQU (0x1 <<  6) ;- (ADC) End of Conversion
+AT91C_ADC_EOC7            EQU (0x1 <<  7) ;- (ADC) End of Conversion
+AT91C_ADC_OVRE0           EQU (0x1 <<  8) ;- (ADC) Overrun Error
+AT91C_ADC_OVRE1           EQU (0x1 <<  9) ;- (ADC) Overrun Error
+AT91C_ADC_OVRE2           EQU (0x1 << 10) ;- (ADC) Overrun Error
+AT91C_ADC_OVRE3           EQU (0x1 << 11) ;- (ADC) Overrun Error
+AT91C_ADC_OVRE4           EQU (0x1 << 12) ;- (ADC) Overrun Error
+AT91C_ADC_OVRE5           EQU (0x1 << 13) ;- (ADC) Overrun Error
+AT91C_ADC_OVRE6           EQU (0x1 << 14) ;- (ADC) Overrun Error
+AT91C_ADC_OVRE7           EQU (0x1 << 15) ;- (ADC) Overrun Error
+AT91C_ADC_DRDY            EQU (0x1 << 16) ;- (ADC) Data Ready
+AT91C_ADC_GOVRE           EQU (0x1 << 17) ;- (ADC) General Overrun
+AT91C_ADC_ENDRX           EQU (0x1 << 18) ;- (ADC) End of Receiver Transfer
+AT91C_ADC_RXBUFF          EQU (0x1 << 19) ;- (ADC) RXBUFF Interrupt
+// - -------- ADC_LCDR : (ADC Offset: 0x20) ADC Last Converted Data Register -------- 
+AT91C_ADC_LDATA           EQU (0x3FF <<  0) ;- (ADC) Last Data Converted
+// - -------- ADC_IER : (ADC Offset: 0x24) ADC Interrupt Enable Register -------- 
+// - -------- ADC_IDR : (ADC Offset: 0x28) ADC Interrupt Disable Register -------- 
+// - -------- ADC_IMR : (ADC Offset: 0x2c) ADC Interrupt Mask Register -------- 
+// - -------- ADC_CDR0 : (ADC Offset: 0x30) ADC Channel Data Register 0 -------- 
+AT91C_ADC_DATA            EQU (0x3FF <<  0) ;- (ADC) Converted Data
+// - -------- ADC_CDR1 : (ADC Offset: 0x34) ADC Channel Data Register 1 -------- 
+// - -------- ADC_CDR2 : (ADC Offset: 0x38) ADC Channel Data Register 2 -------- 
+// - -------- ADC_CDR3 : (ADC Offset: 0x3c) ADC Channel Data Register 3 -------- 
+// - -------- ADC_CDR4 : (ADC Offset: 0x40) ADC Channel Data Register 4 -------- 
+// - -------- ADC_CDR5 : (ADC Offset: 0x44) ADC Channel Data Register 5 -------- 
+// - -------- ADC_CDR6 : (ADC Offset: 0x48) ADC Channel Data Register 6 -------- 
+// - -------- ADC_CDR7 : (ADC Offset: 0x4c) ADC Channel Data Register 7 -------- 
+
+// - *****************************************************************************
+// -               REGISTER ADDRESS DEFINITION FOR AT91SAM7X256
+// - *****************************************************************************
+// - ========== Register definition for SYS peripheral ========== 
+// - ========== Register definition for AIC peripheral ========== 
+AT91C_AIC_IVR             EQU (0xFFFFF100) ;- (AIC) IRQ Vector Register
+AT91C_AIC_SMR             EQU (0xFFFFF000) ;- (AIC) Source Mode Register
+AT91C_AIC_FVR             EQU (0xFFFFF104) ;- (AIC) FIQ Vector Register
+AT91C_AIC_DCR             EQU (0xFFFFF138) ;- (AIC) Debug Control Register (Protect)
+AT91C_AIC_EOICR           EQU (0xFFFFF130) ;- (AIC) End of Interrupt Command Register
+AT91C_AIC_SVR             EQU (0xFFFFF080) ;- (AIC) Source Vector Register
+AT91C_AIC_FFSR            EQU (0xFFFFF148) ;- (AIC) Fast Forcing Status Register
+AT91C_AIC_ICCR            EQU (0xFFFFF128) ;- (AIC) Interrupt Clear Command Register
+AT91C_AIC_ISR             EQU (0xFFFFF108) ;- (AIC) Interrupt Status Register
+AT91C_AIC_IMR             EQU (0xFFFFF110) ;- (AIC) Interrupt Mask Register
+AT91C_AIC_IPR             EQU (0xFFFFF10C) ;- (AIC) Interrupt Pending Register
+AT91C_AIC_FFER            EQU (0xFFFFF140) ;- (AIC) Fast Forcing Enable Register
+AT91C_AIC_IECR            EQU (0xFFFFF120) ;- (AIC) Interrupt Enable Command Register
+AT91C_AIC_ISCR            EQU (0xFFFFF12C) ;- (AIC) Interrupt Set Command Register
+AT91C_AIC_FFDR            EQU (0xFFFFF144) ;- (AIC) Fast Forcing Disable Register
+AT91C_AIC_CISR            EQU (0xFFFFF114) ;- (AIC) Core Interrupt Status Register
+AT91C_AIC_IDCR            EQU (0xFFFFF124) ;- (AIC) Interrupt Disable Command Register
+AT91C_AIC_SPU             EQU (0xFFFFF134) ;- (AIC) Spurious Vector Register
+// - ========== Register definition for PDC_DBGU peripheral ========== 
+AT91C_DBGU_TCR            EQU (0xFFFFF30C) ;- (PDC_DBGU) Transmit Counter Register
+AT91C_DBGU_RNPR           EQU (0xFFFFF310) ;- (PDC_DBGU) Receive Next Pointer Register
+AT91C_DBGU_TNPR           EQU (0xFFFFF318) ;- (PDC_DBGU) Transmit Next Pointer Register
+AT91C_DBGU_TPR            EQU (0xFFFFF308) ;- (PDC_DBGU) Transmit Pointer Register
+AT91C_DBGU_RPR            EQU (0xFFFFF300) ;- (PDC_DBGU) Receive Pointer Register
+AT91C_DBGU_RCR            EQU (0xFFFFF304) ;- (PDC_DBGU) Receive Counter Register
+AT91C_DBGU_RNCR           EQU (0xFFFFF314) ;- (PDC_DBGU) Receive Next Counter Register
+AT91C_DBGU_PTCR           EQU (0xFFFFF320) ;- (PDC_DBGU) PDC Transfer Control Register
+AT91C_DBGU_PTSR           EQU (0xFFFFF324) ;- (PDC_DBGU) PDC Transfer Status Register
+AT91C_DBGU_TNCR           EQU (0xFFFFF31C) ;- (PDC_DBGU) Transmit Next Counter Register
+// - ========== Register definition for DBGU peripheral ========== 
+AT91C_DBGU_EXID           EQU (0xFFFFF244) ;- (DBGU) Chip ID Extension Register
+AT91C_DBGU_BRGR           EQU (0xFFFFF220) ;- (DBGU) Baud Rate Generator Register
+AT91C_DBGU_IDR            EQU (0xFFFFF20C) ;- (DBGU) Interrupt Disable Register
+AT91C_DBGU_CSR            EQU (0xFFFFF214) ;- (DBGU) Channel Status Register
+AT91C_DBGU_CIDR           EQU (0xFFFFF240) ;- (DBGU) Chip ID Register
+AT91C_DBGU_MR             EQU (0xFFFFF204) ;- (DBGU) Mode Register
+AT91C_DBGU_IMR            EQU (0xFFFFF210) ;- (DBGU) Interrupt Mask Register
+AT91C_DBGU_CR             EQU (0xFFFFF200) ;- (DBGU) Control Register
+AT91C_DBGU_FNTR           EQU (0xFFFFF248) ;- (DBGU) Force NTRST Register
+AT91C_DBGU_THR            EQU (0xFFFFF21C) ;- (DBGU) Transmitter Holding Register
+AT91C_DBGU_RHR            EQU (0xFFFFF218) ;- (DBGU) Receiver Holding Register
+AT91C_DBGU_IER            EQU (0xFFFFF208) ;- (DBGU) Interrupt Enable Register
+// - ========== Register definition for PIOA peripheral ========== 
+AT91C_PIOA_ODR            EQU (0xFFFFF414) ;- (PIOA) Output Disable Registerr
+AT91C_PIOA_SODR           EQU (0xFFFFF430) ;- (PIOA) Set Output Data Register
+AT91C_PIOA_ISR            EQU (0xFFFFF44C) ;- (PIOA) Interrupt Status Register
+AT91C_PIOA_ABSR           EQU (0xFFFFF478) ;- (PIOA) AB Select Status Register
+AT91C_PIOA_IER            EQU (0xFFFFF440) ;- (PIOA) Interrupt Enable Register
+AT91C_PIOA_PPUDR          EQU (0xFFFFF460) ;- (PIOA) Pull-up Disable Register
+AT91C_PIOA_IMR            EQU (0xFFFFF448) ;- (PIOA) Interrupt Mask Register
+AT91C_PIOA_PER            EQU (0xFFFFF400) ;- (PIOA) PIO Enable Register
+AT91C_PIOA_IFDR           EQU (0xFFFFF424) ;- (PIOA) Input Filter Disable Register
+AT91C_PIOA_OWDR           EQU (0xFFFFF4A4) ;- (PIOA) Output Write Disable Register
+AT91C_PIOA_MDSR           EQU (0xFFFFF458) ;- (PIOA) Multi-driver Status Register
+AT91C_PIOA_IDR            EQU (0xFFFFF444) ;- (PIOA) Interrupt Disable Register
+AT91C_PIOA_ODSR           EQU (0xFFFFF438) ;- (PIOA) Output Data Status Register
+AT91C_PIOA_PPUSR          EQU (0xFFFFF468) ;- (PIOA) Pull-up Status Register
+AT91C_PIOA_OWSR           EQU (0xFFFFF4A8) ;- (PIOA) Output Write Status Register
+AT91C_PIOA_BSR            EQU (0xFFFFF474) ;- (PIOA) Select B Register
+AT91C_PIOA_OWER           EQU (0xFFFFF4A0) ;- (PIOA) Output Write Enable Register
+AT91C_PIOA_IFER           EQU (0xFFFFF420) ;- (PIOA) Input Filter Enable Register
+AT91C_PIOA_PDSR           EQU (0xFFFFF43C) ;- (PIOA) Pin Data Status Register
+AT91C_PIOA_PPUER          EQU (0xFFFFF464) ;- (PIOA) Pull-up Enable Register
+AT91C_PIOA_OSR            EQU (0xFFFFF418) ;- (PIOA) Output Status Register
+AT91C_PIOA_ASR            EQU (0xFFFFF470) ;- (PIOA) Select A Register
+AT91C_PIOA_MDDR           EQU (0xFFFFF454) ;- (PIOA) Multi-driver Disable Register
+AT91C_PIOA_CODR           EQU (0xFFFFF434) ;- (PIOA) Clear Output Data Register
+AT91C_PIOA_MDER           EQU (0xFFFFF450) ;- (PIOA) Multi-driver Enable Register
+AT91C_PIOA_PDR            EQU (0xFFFFF404) ;- (PIOA) PIO Disable Register
+AT91C_PIOA_IFSR           EQU (0xFFFFF428) ;- (PIOA) Input Filter Status Register
+AT91C_PIOA_OER            EQU (0xFFFFF410) ;- (PIOA) Output Enable Register
+AT91C_PIOA_PSR            EQU (0xFFFFF408) ;- (PIOA) PIO Status Register
+// - ========== Register definition for PIOB peripheral ========== 
+AT91C_PIOB_OWDR           EQU (0xFFFFF6A4) ;- (PIOB) Output Write Disable Register
+AT91C_PIOB_MDER           EQU (0xFFFFF650) ;- (PIOB) Multi-driver Enable Register
+AT91C_PIOB_PPUSR          EQU (0xFFFFF668) ;- (PIOB) Pull-up Status Register
+AT91C_PIOB_IMR            EQU (0xFFFFF648) ;- (PIOB) Interrupt Mask Register
+AT91C_PIOB_ASR            EQU (0xFFFFF670) ;- (PIOB) Select A Register
+AT91C_PIOB_PPUDR          EQU (0xFFFFF660) ;- (PIOB) Pull-up Disable Register
+AT91C_PIOB_PSR            EQU (0xFFFFF608) ;- (PIOB) PIO Status Register
+AT91C_PIOB_IER            EQU (0xFFFFF640) ;- (PIOB) Interrupt Enable Register
+AT91C_PIOB_CODR           EQU (0xFFFFF634) ;- (PIOB) Clear Output Data Register
+AT91C_PIOB_OWER           EQU (0xFFFFF6A0) ;- (PIOB) Output Write Enable Register
+AT91C_PIOB_ABSR           EQU (0xFFFFF678) ;- (PIOB) AB Select Status Register
+AT91C_PIOB_IFDR           EQU (0xFFFFF624) ;- (PIOB) Input Filter Disable Register
+AT91C_PIOB_PDSR           EQU (0xFFFFF63C) ;- (PIOB) Pin Data Status Register
+AT91C_PIOB_IDR            EQU (0xFFFFF644) ;- (PIOB) Interrupt Disable Register
+AT91C_PIOB_OWSR           EQU (0xFFFFF6A8) ;- (PIOB) Output Write Status Register
+AT91C_PIOB_PDR            EQU (0xFFFFF604) ;- (PIOB) PIO Disable Register
+AT91C_PIOB_ODR            EQU (0xFFFFF614) ;- (PIOB) Output Disable Registerr
+AT91C_PIOB_IFSR           EQU (0xFFFFF628) ;- (PIOB) Input Filter Status Register
+AT91C_PIOB_PPUER          EQU (0xFFFFF664) ;- (PIOB) Pull-up Enable Register
+AT91C_PIOB_SODR           EQU (0xFFFFF630) ;- (PIOB) Set Output Data Register
+AT91C_PIOB_ISR            EQU (0xFFFFF64C) ;- (PIOB) Interrupt Status Register
+AT91C_PIOB_ODSR           EQU (0xFFFFF638) ;- (PIOB) Output Data Status Register
+AT91C_PIOB_OSR            EQU (0xFFFFF618) ;- (PIOB) Output Status Register
+AT91C_PIOB_MDSR           EQU (0xFFFFF658) ;- (PIOB) Multi-driver Status Register
+AT91C_PIOB_IFER           EQU (0xFFFFF620) ;- (PIOB) Input Filter Enable Register
+AT91C_PIOB_BSR            EQU (0xFFFFF674) ;- (PIOB) Select B Register
+AT91C_PIOB_MDDR           EQU (0xFFFFF654) ;- (PIOB) Multi-driver Disable Register
+AT91C_PIOB_OER            EQU (0xFFFFF610) ;- (PIOB) Output Enable Register
+AT91C_PIOB_PER            EQU (0xFFFFF600) ;- (PIOB) PIO Enable Register
+// - ========== Register definition for CKGR peripheral ========== 
+AT91C_CKGR_MOR            EQU (0xFFFFFC20) ;- (CKGR) Main Oscillator Register
+AT91C_CKGR_PLLR           EQU (0xFFFFFC2C) ;- (CKGR) PLL Register
+AT91C_CKGR_MCFR           EQU (0xFFFFFC24) ;- (CKGR) Main Clock  Frequency Register
+// - ========== Register definition for PMC peripheral ========== 
+AT91C_PMC_IDR             EQU (0xFFFFFC64) ;- (PMC) Interrupt Disable Register
+AT91C_PMC_MOR             EQU (0xFFFFFC20) ;- (PMC) Main Oscillator Register
+AT91C_PMC_PLLR            EQU (0xFFFFFC2C) ;- (PMC) PLL Register
+AT91C_PMC_PCER            EQU (0xFFFFFC10) ;- (PMC) Peripheral Clock Enable Register
+AT91C_PMC_PCKR            EQU (0xFFFFFC40) ;- (PMC) Programmable Clock Register
+AT91C_PMC_MCKR            EQU (0xFFFFFC30) ;- (PMC) Master Clock Register
+AT91C_PMC_SCDR            EQU (0xFFFFFC04) ;- (PMC) System Clock Disable Register
+AT91C_PMC_PCDR            EQU (0xFFFFFC14) ;- (PMC) Peripheral Clock Disable Register
+AT91C_PMC_SCSR            EQU (0xFFFFFC08) ;- (PMC) System Clock Status Register
+AT91C_PMC_PCSR            EQU (0xFFFFFC18) ;- (PMC) Peripheral Clock Status Register
+AT91C_PMC_MCFR            EQU (0xFFFFFC24) ;- (PMC) Main Clock  Frequency Register
+AT91C_PMC_SCER            EQU (0xFFFFFC00) ;- (PMC) System Clock Enable Register
+AT91C_PMC_IMR             EQU (0xFFFFFC6C) ;- (PMC) Interrupt Mask Register
+AT91C_PMC_IER             EQU (0xFFFFFC60) ;- (PMC) Interrupt Enable Register
+AT91C_PMC_SR              EQU (0xFFFFFC68) ;- (PMC) Status Register
+// - ========== Register definition for RSTC peripheral ========== 
+AT91C_RSTC_RCR            EQU (0xFFFFFD00) ;- (RSTC) Reset Control Register
+AT91C_RSTC_RMR            EQU (0xFFFFFD08) ;- (RSTC) Reset Mode Register
+AT91C_RSTC_RSR            EQU (0xFFFFFD04) ;- (RSTC) Reset Status Register
+// - ========== Register definition for RTTC peripheral ========== 
+AT91C_RTTC_RTSR           EQU (0xFFFFFD2C) ;- (RTTC) Real-time Status Register
+AT91C_RTTC_RTMR           EQU (0xFFFFFD20) ;- (RTTC) Real-time Mode Register
+AT91C_RTTC_RTVR           EQU (0xFFFFFD28) ;- (RTTC) Real-time Value Register
+AT91C_RTTC_RTAR           EQU (0xFFFFFD24) ;- (RTTC) Real-time Alarm Register
+// - ========== Register definition for PITC peripheral ========== 
+AT91C_PITC_PIVR           EQU (0xFFFFFD38) ;- (PITC) Period Interval Value Register
+AT91C_PITC_PISR           EQU (0xFFFFFD34) ;- (PITC) Period Interval Status Register
+AT91C_PITC_PIIR           EQU (0xFFFFFD3C) ;- (PITC) Period Interval Image Register
+AT91C_PITC_PIMR           EQU (0xFFFFFD30) ;- (PITC) Period Interval Mode Register
+// - ========== Register definition for WDTC peripheral ========== 
+AT91C_WDTC_WDCR           EQU (0xFFFFFD40) ;- (WDTC) Watchdog Control Register
+AT91C_WDTC_WDSR           EQU (0xFFFFFD48) ;- (WDTC) Watchdog Status Register
+AT91C_WDTC_WDMR           EQU (0xFFFFFD44) ;- (WDTC) Watchdog Mode Register
+// - ========== Register definition for VREG peripheral ========== 
+AT91C_VREG_MR             EQU (0xFFFFFD60) ;- (VREG) Voltage Regulator Mode Register
+// - ========== Register definition for MC peripheral ========== 
+AT91C_MC_ASR              EQU (0xFFFFFF04) ;- (MC) MC Abort Status Register
+AT91C_MC_RCR              EQU (0xFFFFFF00) ;- (MC) MC Remap Control Register
+AT91C_MC_FCR              EQU (0xFFFFFF64) ;- (MC) MC Flash Command Register
+AT91C_MC_AASR             EQU (0xFFFFFF08) ;- (MC) MC Abort Address Status Register
+AT91C_MC_FSR              EQU (0xFFFFFF68) ;- (MC) MC Flash Status Register
+AT91C_MC_FMR              EQU (0xFFFFFF60) ;- (MC) MC Flash Mode Register
+// - ========== Register definition for PDC_SPI1 peripheral ========== 
+AT91C_SPI1_PTCR           EQU (0xFFFE4120) ;- (PDC_SPI1) PDC Transfer Control Register
+AT91C_SPI1_RPR            EQU (0xFFFE4100) ;- (PDC_SPI1) Receive Pointer Register
+AT91C_SPI1_TNCR           EQU (0xFFFE411C) ;- (PDC_SPI1) Transmit Next Counter Register
+AT91C_SPI1_TPR            EQU (0xFFFE4108) ;- (PDC_SPI1) Transmit Pointer Register
+AT91C_SPI1_TNPR           EQU (0xFFFE4118) ;- (PDC_SPI1) Transmit Next Pointer Register
+AT91C_SPI1_TCR            EQU (0xFFFE410C) ;- (PDC_SPI1) Transmit Counter Register
+AT91C_SPI1_RCR            EQU (0xFFFE4104) ;- (PDC_SPI1) Receive Counter Register
+AT91C_SPI1_RNPR           EQU (0xFFFE4110) ;- (PDC_SPI1) Receive Next Pointer Register
+AT91C_SPI1_RNCR           EQU (0xFFFE4114) ;- (PDC_SPI1) Receive Next Counter Register
+AT91C_SPI1_PTSR           EQU (0xFFFE4124) ;- (PDC_SPI1) PDC Transfer Status Register
+// - ========== Register definition for SPI1 peripheral ========== 
+AT91C_SPI1_IMR            EQU (0xFFFE401C) ;- (SPI1) Interrupt Mask Register
+AT91C_SPI1_IER            EQU (0xFFFE4014) ;- (SPI1) Interrupt Enable Register
+AT91C_SPI1_MR             EQU (0xFFFE4004) ;- (SPI1) Mode Register
+AT91C_SPI1_RDR            EQU (0xFFFE4008) ;- (SPI1) Receive Data Register
+AT91C_SPI1_IDR            EQU (0xFFFE4018) ;- (SPI1) Interrupt Disable Register
+AT91C_SPI1_SR             EQU (0xFFFE4010) ;- (SPI1) Status Register
+AT91C_SPI1_TDR            EQU (0xFFFE400C) ;- (SPI1) Transmit Data Register
+AT91C_SPI1_CR             EQU (0xFFFE4000) ;- (SPI1) Control Register
+AT91C_SPI1_CSR            EQU (0xFFFE4030) ;- (SPI1) Chip Select Register
+// - ========== Register definition for PDC_SPI0 peripheral ========== 
+AT91C_SPI0_PTCR           EQU (0xFFFE0120) ;- (PDC_SPI0) PDC Transfer Control Register
+AT91C_SPI0_TPR            EQU (0xFFFE0108) ;- (PDC_SPI0) Transmit Pointer Register
+AT91C_SPI0_TCR            EQU (0xFFFE010C) ;- (PDC_SPI0) Transmit Counter Register
+AT91C_SPI0_RCR            EQU (0xFFFE0104) ;- (PDC_SPI0) Receive Counter Register
+AT91C_SPI0_PTSR           EQU (0xFFFE0124) ;- (PDC_SPI0) PDC Transfer Status Register
+AT91C_SPI0_RNPR           EQU (0xFFFE0110) ;- (PDC_SPI0) Receive Next Pointer Register
+AT91C_SPI0_RPR            EQU (0xFFFE0100) ;- (PDC_SPI0) Receive Pointer Register
+AT91C_SPI0_TNCR           EQU (0xFFFE011C) ;- (PDC_SPI0) Transmit Next Counter Register
+AT91C_SPI0_RNCR           EQU (0xFFFE0114) ;- (PDC_SPI0) Receive Next Counter Register
+AT91C_SPI0_TNPR           EQU (0xFFFE0118) ;- (PDC_SPI0) Transmit Next Pointer Register
+// - ========== Register definition for SPI0 peripheral ========== 
+AT91C_SPI0_IER            EQU (0xFFFE0014) ;- (SPI0) Interrupt Enable Register
+AT91C_SPI0_SR             EQU (0xFFFE0010) ;- (SPI0) Status Register
+AT91C_SPI0_IDR            EQU (0xFFFE0018) ;- (SPI0) Interrupt Disable Register
+AT91C_SPI0_CR             EQU (0xFFFE0000) ;- (SPI0) Control Register
+AT91C_SPI0_MR             EQU (0xFFFE0004) ;- (SPI0) Mode Register
+AT91C_SPI0_IMR            EQU (0xFFFE001C) ;- (SPI0) Interrupt Mask Register
+AT91C_SPI0_TDR            EQU (0xFFFE000C) ;- (SPI0) Transmit Data Register
+AT91C_SPI0_RDR            EQU (0xFFFE0008) ;- (SPI0) Receive Data Register
+AT91C_SPI0_CSR            EQU (0xFFFE0030) ;- (SPI0) Chip Select Register
+// - ========== Register definition for PDC_US1 peripheral ========== 
+AT91C_US1_RNCR            EQU (0xFFFC4114) ;- (PDC_US1) Receive Next Counter Register
+AT91C_US1_PTCR            EQU (0xFFFC4120) ;- (PDC_US1) PDC Transfer Control Register
+AT91C_US1_TCR             EQU (0xFFFC410C) ;- (PDC_US1) Transmit Counter Register
+AT91C_US1_PTSR            EQU (0xFFFC4124) ;- (PDC_US1) PDC Transfer Status Register
+AT91C_US1_TNPR            EQU (0xFFFC4118) ;- (PDC_US1) Transmit Next Pointer Register
+AT91C_US1_RCR             EQU (0xFFFC4104) ;- (PDC_US1) Receive Counter Register
+AT91C_US1_RNPR            EQU (0xFFFC4110) ;- (PDC_US1) Receive Next Pointer Register
+AT91C_US1_RPR             EQU (0xFFFC4100) ;- (PDC_US1) Receive Pointer Register
+AT91C_US1_TNCR            EQU (0xFFFC411C) ;- (PDC_US1) Transmit Next Counter Register
+AT91C_US1_TPR             EQU (0xFFFC4108) ;- (PDC_US1) Transmit Pointer Register
+// - ========== Register definition for US1 peripheral ========== 
+AT91C_US1_IF              EQU (0xFFFC404C) ;- (US1) IRDA_FILTER Register
+AT91C_US1_NER             EQU (0xFFFC4044) ;- (US1) Nb Errors Register
+AT91C_US1_RTOR            EQU (0xFFFC4024) ;- (US1) Receiver Time-out Register
+AT91C_US1_CSR             EQU (0xFFFC4014) ;- (US1) Channel Status Register
+AT91C_US1_IDR             EQU (0xFFFC400C) ;- (US1) Interrupt Disable Register
+AT91C_US1_IER             EQU (0xFFFC4008) ;- (US1) Interrupt Enable Register
+AT91C_US1_THR             EQU (0xFFFC401C) ;- (US1) Transmitter Holding Register
+AT91C_US1_TTGR            EQU (0xFFFC4028) ;- (US1) Transmitter Time-guard Register
+AT91C_US1_RHR             EQU (0xFFFC4018) ;- (US1) Receiver Holding Register
+AT91C_US1_BRGR            EQU (0xFFFC4020) ;- (US1) Baud Rate Generator Register
+AT91C_US1_IMR             EQU (0xFFFC4010) ;- (US1) Interrupt Mask Register
+AT91C_US1_FIDI            EQU (0xFFFC4040) ;- (US1) FI_DI_Ratio Register
+AT91C_US1_CR              EQU (0xFFFC4000) ;- (US1) Control Register
+AT91C_US1_MR              EQU (0xFFFC4004) ;- (US1) Mode Register
+// - ========== Register definition for PDC_US0 peripheral ========== 
+AT91C_US0_TNPR            EQU (0xFFFC0118) ;- (PDC_US0) Transmit Next Pointer Register
+AT91C_US0_RNPR            EQU (0xFFFC0110) ;- (PDC_US0) Receive Next Pointer Register
+AT91C_US0_TCR             EQU (0xFFFC010C) ;- (PDC_US0) Transmit Counter Register
+AT91C_US0_PTCR            EQU (0xFFFC0120) ;- (PDC_US0) PDC Transfer Control Register
+AT91C_US0_PTSR            EQU (0xFFFC0124) ;- (PDC_US0) PDC Transfer Status Register
+AT91C_US0_TNCR            EQU (0xFFFC011C) ;- (PDC_US0) Transmit Next Counter Register
+AT91C_US0_TPR             EQU (0xFFFC0108) ;- (PDC_US0) Transmit Pointer Register
+AT91C_US0_RCR             EQU (0xFFFC0104) ;- (PDC_US0) Receive Counter Register
+AT91C_US0_RPR             EQU (0xFFFC0100) ;- (PDC_US0) Receive Pointer Register
+AT91C_US0_RNCR            EQU (0xFFFC0114) ;- (PDC_US0) Receive Next Counter Register
+// - ========== Register definition for US0 peripheral ========== 
+AT91C_US0_BRGR            EQU (0xFFFC0020) ;- (US0) Baud Rate Generator Register
+AT91C_US0_NER             EQU (0xFFFC0044) ;- (US0) Nb Errors Register
+AT91C_US0_CR              EQU (0xFFFC0000) ;- (US0) Control Register
+AT91C_US0_IMR             EQU (0xFFFC0010) ;- (US0) Interrupt Mask Register
+AT91C_US0_FIDI            EQU (0xFFFC0040) ;- (US0) FI_DI_Ratio Register
+AT91C_US0_TTGR            EQU (0xFFFC0028) ;- (US0) Transmitter Time-guard Register
+AT91C_US0_MR              EQU (0xFFFC0004) ;- (US0) Mode Register
+AT91C_US0_RTOR            EQU (0xFFFC0024) ;- (US0) Receiver Time-out Register
+AT91C_US0_CSR             EQU (0xFFFC0014) ;- (US0) Channel Status Register
+AT91C_US0_RHR             EQU (0xFFFC0018) ;- (US0) Receiver Holding Register
+AT91C_US0_IDR             EQU (0xFFFC000C) ;- (US0) Interrupt Disable Register
+AT91C_US0_THR             EQU (0xFFFC001C) ;- (US0) Transmitter Holding Register
+AT91C_US0_IF              EQU (0xFFFC004C) ;- (US0) IRDA_FILTER Register
+AT91C_US0_IER             EQU (0xFFFC0008) ;- (US0) Interrupt Enable Register
+// - ========== Register definition for PDC_SSC peripheral ========== 
+AT91C_SSC_TNCR            EQU (0xFFFD411C) ;- (PDC_SSC) Transmit Next Counter Register
+AT91C_SSC_RPR             EQU (0xFFFD4100) ;- (PDC_SSC) Receive Pointer Register
+AT91C_SSC_RNCR            EQU (0xFFFD4114) ;- (PDC_SSC) Receive Next Counter Register
+AT91C_SSC_TPR             EQU (0xFFFD4108) ;- (PDC_SSC) Transmit Pointer Register
+AT91C_SSC_PTCR            EQU (0xFFFD4120) ;- (PDC_SSC) PDC Transfer Control Register
+AT91C_SSC_TCR             EQU (0xFFFD410C) ;- (PDC_SSC) Transmit Counter Register
+AT91C_SSC_RCR             EQU (0xFFFD4104) ;- (PDC_SSC) Receive Counter Register
+AT91C_SSC_RNPR            EQU (0xFFFD4110) ;- (PDC_SSC) Receive Next Pointer Register
+AT91C_SSC_TNPR            EQU (0xFFFD4118) ;- (PDC_SSC) Transmit Next Pointer Register
+AT91C_SSC_PTSR            EQU (0xFFFD4124) ;- (PDC_SSC) PDC Transfer Status Register
+// - ========== Register definition for SSC peripheral ========== 
+AT91C_SSC_RHR             EQU (0xFFFD4020) ;- (SSC) Receive Holding Register
+AT91C_SSC_RSHR            EQU (0xFFFD4030) ;- (SSC) Receive Sync Holding Register
+AT91C_SSC_TFMR            EQU (0xFFFD401C) ;- (SSC) Transmit Frame Mode Register
+AT91C_SSC_IDR             EQU (0xFFFD4048) ;- (SSC) Interrupt Disable Register
+AT91C_SSC_THR             EQU (0xFFFD4024) ;- (SSC) Transmit Holding Register
+AT91C_SSC_RCMR            EQU (0xFFFD4010) ;- (SSC) Receive Clock ModeRegister
+AT91C_SSC_IER             EQU (0xFFFD4044) ;- (SSC) Interrupt Enable Register
+AT91C_SSC_TSHR            EQU (0xFFFD4034) ;- (SSC) Transmit Sync Holding Register
+AT91C_SSC_SR              EQU (0xFFFD4040) ;- (SSC) Status Register
+AT91C_SSC_CMR             EQU (0xFFFD4004) ;- (SSC) Clock Mode Register
+AT91C_SSC_TCMR            EQU (0xFFFD4018) ;- (SSC) Transmit Clock Mode Register
+AT91C_SSC_CR              EQU (0xFFFD4000) ;- (SSC) Control Register
+AT91C_SSC_IMR             EQU (0xFFFD404C) ;- (SSC) Interrupt Mask Register
+AT91C_SSC_RFMR            EQU (0xFFFD4014) ;- (SSC) Receive Frame Mode Register
+// - ========== Register definition for TWI peripheral ========== 
+AT91C_TWI_IER             EQU (0xFFFB8024) ;- (TWI) Interrupt Enable Register
+AT91C_TWI_CR              EQU (0xFFFB8000) ;- (TWI) Control Register
+AT91C_TWI_SR              EQU (0xFFFB8020) ;- (TWI) Status Register
+AT91C_TWI_IMR             EQU (0xFFFB802C) ;- (TWI) Interrupt Mask Register
+AT91C_TWI_THR             EQU (0xFFFB8034) ;- (TWI) Transmit Holding Register
+AT91C_TWI_IDR             EQU (0xFFFB8028) ;- (TWI) Interrupt Disable Register
+AT91C_TWI_IADR            EQU (0xFFFB800C) ;- (TWI) Internal Address Register
+AT91C_TWI_MMR             EQU (0xFFFB8004) ;- (TWI) Master Mode Register
+AT91C_TWI_CWGR            EQU (0xFFFB8010) ;- (TWI) Clock Waveform Generator Register
+AT91C_TWI_RHR             EQU (0xFFFB8030) ;- (TWI) Receive Holding Register
+// - ========== Register definition for PWMC_CH3 peripheral ========== 
+AT91C_PWMC_CH3_CUPDR      EQU (0xFFFCC270) ;- (PWMC_CH3) Channel Update Register
+AT91C_PWMC_CH3_Reserved   EQU (0xFFFCC274) ;- (PWMC_CH3) Reserved
+AT91C_PWMC_CH3_CPRDR      EQU (0xFFFCC268) ;- (PWMC_CH3) Channel Period Register
+AT91C_PWMC_CH3_CDTYR      EQU (0xFFFCC264) ;- (PWMC_CH3) Channel Duty Cycle Register
+AT91C_PWMC_CH3_CCNTR      EQU (0xFFFCC26C) ;- (PWMC_CH3) Channel Counter Register
+AT91C_PWMC_CH3_CMR        EQU (0xFFFCC260) ;- (PWMC_CH3) Channel Mode Register
+// - ========== Register definition for PWMC_CH2 peripheral ========== 
+AT91C_PWMC_CH2_Reserved   EQU (0xFFFCC254) ;- (PWMC_CH2) Reserved
+AT91C_PWMC_CH2_CMR        EQU (0xFFFCC240) ;- (PWMC_CH2) Channel Mode Register
+AT91C_PWMC_CH2_CCNTR      EQU (0xFFFCC24C) ;- (PWMC_CH2) Channel Counter Register
+AT91C_PWMC_CH2_CPRDR      EQU (0xFFFCC248) ;- (PWMC_CH2) Channel Period Register
+AT91C_PWMC_CH2_CUPDR      EQU (0xFFFCC250) ;- (PWMC_CH2) Channel Update Register
+AT91C_PWMC_CH2_CDTYR      EQU (0xFFFCC244) ;- (PWMC_CH2) Channel Duty Cycle Register
+// - ========== Register definition for PWMC_CH1 peripheral ========== 
+AT91C_PWMC_CH1_Reserved   EQU (0xFFFCC234) ;- (PWMC_CH1) Reserved
+AT91C_PWMC_CH1_CUPDR      EQU (0xFFFCC230) ;- (PWMC_CH1) Channel Update Register
+AT91C_PWMC_CH1_CPRDR      EQU (0xFFFCC228) ;- (PWMC_CH1) Channel Period Register
+AT91C_PWMC_CH1_CCNTR      EQU (0xFFFCC22C) ;- (PWMC_CH1) Channel Counter Register
+AT91C_PWMC_CH1_CDTYR      EQU (0xFFFCC224) ;- (PWMC_CH1) Channel Duty Cycle Register
+AT91C_PWMC_CH1_CMR        EQU (0xFFFCC220) ;- (PWMC_CH1) Channel Mode Register
+// - ========== Register definition for PWMC_CH0 peripheral ========== 
+AT91C_PWMC_CH0_Reserved   EQU (0xFFFCC214) ;- (PWMC_CH0) Reserved
+AT91C_PWMC_CH0_CPRDR      EQU (0xFFFCC208) ;- (PWMC_CH0) Channel Period Register
+AT91C_PWMC_CH0_CDTYR      EQU (0xFFFCC204) ;- (PWMC_CH0) Channel Duty Cycle Register
+AT91C_PWMC_CH0_CMR        EQU (0xFFFCC200) ;- (PWMC_CH0) Channel Mode Register
+AT91C_PWMC_CH0_CUPDR      EQU (0xFFFCC210) ;- (PWMC_CH0) Channel Update Register
+AT91C_PWMC_CH0_CCNTR      EQU (0xFFFCC20C) ;- (PWMC_CH0) Channel Counter Register
+// - ========== Register definition for PWMC peripheral ========== 
+AT91C_PWMC_IDR            EQU (0xFFFCC014) ;- (PWMC) PWMC Interrupt Disable Register
+AT91C_PWMC_DIS            EQU (0xFFFCC008) ;- (PWMC) PWMC Disable Register
+AT91C_PWMC_IER            EQU (0xFFFCC010) ;- (PWMC) PWMC Interrupt Enable Register
+AT91C_PWMC_VR             EQU (0xFFFCC0FC) ;- (PWMC) PWMC Version Register
+AT91C_PWMC_ISR            EQU (0xFFFCC01C) ;- (PWMC) PWMC Interrupt Status Register
+AT91C_PWMC_SR             EQU (0xFFFCC00C) ;- (PWMC) PWMC Status Register
+AT91C_PWMC_IMR            EQU (0xFFFCC018) ;- (PWMC) PWMC Interrupt Mask Register
+AT91C_PWMC_MR             EQU (0xFFFCC000) ;- (PWMC) PWMC Mode Register
+AT91C_PWMC_ENA            EQU (0xFFFCC004) ;- (PWMC) PWMC Enable Register
+// - ========== Register definition for UDP peripheral ========== 
+AT91C_UDP_IMR             EQU (0xFFFB0018) ;- (UDP) Interrupt Mask Register
+AT91C_UDP_FADDR           EQU (0xFFFB0008) ;- (UDP) Function Address Register
+AT91C_UDP_NUM             EQU (0xFFFB0000) ;- (UDP) Frame Number Register
+AT91C_UDP_FDR             EQU (0xFFFB0050) ;- (UDP) Endpoint FIFO Data Register
+AT91C_UDP_ISR             EQU (0xFFFB001C) ;- (UDP) Interrupt Status Register
+AT91C_UDP_CSR             EQU (0xFFFB0030) ;- (UDP) Endpoint Control and Status Register
+AT91C_UDP_IDR             EQU (0xFFFB0014) ;- (UDP) Interrupt Disable Register
+AT91C_UDP_ICR             EQU (0xFFFB0020) ;- (UDP) Interrupt Clear Register
+AT91C_UDP_RSTEP           EQU (0xFFFB0028) ;- (UDP) Reset Endpoint Register
+AT91C_UDP_TXVC            EQU (0xFFFB0074) ;- (UDP) Transceiver Control Register
+AT91C_UDP_GLBSTATE        EQU (0xFFFB0004) ;- (UDP) Global State Register
+AT91C_UDP_IER             EQU (0xFFFB0010) ;- (UDP) Interrupt Enable Register
+// - ========== Register definition for TC0 peripheral ========== 
+AT91C_TC0_SR              EQU (0xFFFA0020) ;- (TC0) Status Register
+AT91C_TC0_RC              EQU (0xFFFA001C) ;- (TC0) Register C
+AT91C_TC0_RB              EQU (0xFFFA0018) ;- (TC0) Register B
+AT91C_TC0_CCR             EQU (0xFFFA0000) ;- (TC0) Channel Control Register
+AT91C_TC0_CMR             EQU (0xFFFA0004) ;- (TC0) Channel Mode Register (Capture Mode / Waveform Mode)
+AT91C_TC0_IER             EQU (0xFFFA0024) ;- (TC0) Interrupt Enable Register
+AT91C_TC0_RA              EQU (0xFFFA0014) ;- (TC0) Register A
+AT91C_TC0_IDR             EQU (0xFFFA0028) ;- (TC0) Interrupt Disable Register
+AT91C_TC0_CV              EQU (0xFFFA0010) ;- (TC0) Counter Value
+AT91C_TC0_IMR             EQU (0xFFFA002C) ;- (TC0) Interrupt Mask Register
+// - ========== Register definition for TC1 peripheral ========== 
+AT91C_TC1_RB              EQU (0xFFFA0058) ;- (TC1) Register B
+AT91C_TC1_CCR             EQU (0xFFFA0040) ;- (TC1) Channel Control Register
+AT91C_TC1_IER             EQU (0xFFFA0064) ;- (TC1) Interrupt Enable Register
+AT91C_TC1_IDR             EQU (0xFFFA0068) ;- (TC1) Interrupt Disable Register
+AT91C_TC1_SR              EQU (0xFFFA0060) ;- (TC1) Status Register
+AT91C_TC1_CMR             EQU (0xFFFA0044) ;- (TC1) Channel Mode Register (Capture Mode / Waveform Mode)
+AT91C_TC1_RA              EQU (0xFFFA0054) ;- (TC1) Register A
+AT91C_TC1_RC              EQU (0xFFFA005C) ;- (TC1) Register C
+AT91C_TC1_IMR             EQU (0xFFFA006C) ;- (TC1) Interrupt Mask Register
+AT91C_TC1_CV              EQU (0xFFFA0050) ;- (TC1) Counter Value
+// - ========== Register definition for TC2 peripheral ========== 
+AT91C_TC2_CMR             EQU (0xFFFA0084) ;- (TC2) Channel Mode Register (Capture Mode / Waveform Mode)
+AT91C_TC2_CCR             EQU (0xFFFA0080) ;- (TC2) Channel Control Register
+AT91C_TC2_CV              EQU (0xFFFA0090) ;- (TC2) Counter Value
+AT91C_TC2_RA              EQU (0xFFFA0094) ;- (TC2) Register A
+AT91C_TC2_RB              EQU (0xFFFA0098) ;- (TC2) Register B
+AT91C_TC2_IDR             EQU (0xFFFA00A8) ;- (TC2) Interrupt Disable Register
+AT91C_TC2_IMR             EQU (0xFFFA00AC) ;- (TC2) Interrupt Mask Register
+AT91C_TC2_RC              EQU (0xFFFA009C) ;- (TC2) Register C
+AT91C_TC2_IER             EQU (0xFFFA00A4) ;- (TC2) Interrupt Enable Register
+AT91C_TC2_SR              EQU (0xFFFA00A0) ;- (TC2) Status Register
+// - ========== Register definition for TCB peripheral ========== 
+AT91C_TCB_BMR             EQU (0xFFFA00C4) ;- (TCB) TC Block Mode Register
+AT91C_TCB_BCR             EQU (0xFFFA00C0) ;- (TCB) TC Block Control Register
+// - ========== Register definition for CAN_MB0 peripheral ========== 
+AT91C_CAN_MB0_MDL         EQU (0xFFFD0214) ;- (CAN_MB0) MailBox Data Low Register
+AT91C_CAN_MB0_MAM         EQU (0xFFFD0204) ;- (CAN_MB0) MailBox Acceptance Mask Register
+AT91C_CAN_MB0_MCR         EQU (0xFFFD021C) ;- (CAN_MB0) MailBox Control Register
+AT91C_CAN_MB0_MID         EQU (0xFFFD0208) ;- (CAN_MB0) MailBox ID Register
+AT91C_CAN_MB0_MSR         EQU (0xFFFD0210) ;- (CAN_MB0) MailBox Status Register
+AT91C_CAN_MB0_MFID        EQU (0xFFFD020C) ;- (CAN_MB0) MailBox Family ID Register
+AT91C_CAN_MB0_MDH         EQU (0xFFFD0218) ;- (CAN_MB0) MailBox Data High Register
+AT91C_CAN_MB0_MMR         EQU (0xFFFD0200) ;- (CAN_MB0) MailBox Mode Register
+// - ========== Register definition for CAN_MB1 peripheral ========== 
+AT91C_CAN_MB1_MDL         EQU (0xFFFD0234) ;- (CAN_MB1) MailBox Data Low Register
+AT91C_CAN_MB1_MID         EQU (0xFFFD0228) ;- (CAN_MB1) MailBox ID Register
+AT91C_CAN_MB1_MMR         EQU (0xFFFD0220) ;- (CAN_MB1) MailBox Mode Register
+AT91C_CAN_MB1_MSR         EQU (0xFFFD0230) ;- (CAN_MB1) MailBox Status Register
+AT91C_CAN_MB1_MAM         EQU (0xFFFD0224) ;- (CAN_MB1) MailBox Acceptance Mask Register
+AT91C_CAN_MB1_MDH         EQU (0xFFFD0238) ;- (CAN_MB1) MailBox Data High Register
+AT91C_CAN_MB1_MCR         EQU (0xFFFD023C) ;- (CAN_MB1) MailBox Control Register
+AT91C_CAN_MB1_MFID        EQU (0xFFFD022C) ;- (CAN_MB1) MailBox Family ID Register
+// - ========== Register definition for CAN_MB2 peripheral ========== 
+AT91C_CAN_MB2_MCR         EQU (0xFFFD025C) ;- (CAN_MB2) MailBox Control Register
+AT91C_CAN_MB2_MDH         EQU (0xFFFD0258) ;- (CAN_MB2) MailBox Data High Register
+AT91C_CAN_MB2_MID         EQU (0xFFFD0248) ;- (CAN_MB2) MailBox ID Register
+AT91C_CAN_MB2_MDL         EQU (0xFFFD0254) ;- (CAN_MB2) MailBox Data Low Register
+AT91C_CAN_MB2_MMR         EQU (0xFFFD0240) ;- (CAN_MB2) MailBox Mode Register
+AT91C_CAN_MB2_MAM         EQU (0xFFFD0244) ;- (CAN_MB2) MailBox Acceptance Mask Register
+AT91C_CAN_MB2_MFID        EQU (0xFFFD024C) ;- (CAN_MB2) MailBox Family ID Register
+AT91C_CAN_MB2_MSR         EQU (0xFFFD0250) ;- (CAN_MB2) MailBox Status Register
+// - ========== Register definition for CAN_MB3 peripheral ========== 
+AT91C_CAN_MB3_MFID        EQU (0xFFFD026C) ;- (CAN_MB3) MailBox Family ID Register
+AT91C_CAN_MB3_MAM         EQU (0xFFFD0264) ;- (CAN_MB3) MailBox Acceptance Mask Register
+AT91C_CAN_MB3_MID         EQU (0xFFFD0268) ;- (CAN_MB3) MailBox ID Register
+AT91C_CAN_MB3_MCR         EQU (0xFFFD027C) ;- (CAN_MB3) MailBox Control Register
+AT91C_CAN_MB3_MMR         EQU (0xFFFD0260) ;- (CAN_MB3) MailBox Mode Register
+AT91C_CAN_MB3_MSR         EQU (0xFFFD0270) ;- (CAN_MB3) MailBox Status Register
+AT91C_CAN_MB3_MDL         EQU (0xFFFD0274) ;- (CAN_MB3) MailBox Data Low Register
+AT91C_CAN_MB3_MDH         EQU (0xFFFD0278) ;- (CAN_MB3) MailBox Data High Register
+// - ========== Register definition for CAN_MB4 peripheral ========== 
+AT91C_CAN_MB4_MID         EQU (0xFFFD0288) ;- (CAN_MB4) MailBox ID Register
+AT91C_CAN_MB4_MMR         EQU (0xFFFD0280) ;- (CAN_MB4) MailBox Mode Register
+AT91C_CAN_MB4_MDH         EQU (0xFFFD0298) ;- (CAN_MB4) MailBox Data High Register
+AT91C_CAN_MB4_MFID        EQU (0xFFFD028C) ;- (CAN_MB4) MailBox Family ID Register
+AT91C_CAN_MB4_MSR         EQU (0xFFFD0290) ;- (CAN_MB4) MailBox Status Register
+AT91C_CAN_MB4_MCR         EQU (0xFFFD029C) ;- (CAN_MB4) MailBox Control Register
+AT91C_CAN_MB4_MDL         EQU (0xFFFD0294) ;- (CAN_MB4) MailBox Data Low Register
+AT91C_CAN_MB4_MAM         EQU (0xFFFD0284) ;- (CAN_MB4) MailBox Acceptance Mask Register
+// - ========== Register definition for CAN_MB5 peripheral ========== 
+AT91C_CAN_MB5_MSR         EQU (0xFFFD02B0) ;- (CAN_MB5) MailBox Status Register
+AT91C_CAN_MB5_MCR         EQU (0xFFFD02BC) ;- (CAN_MB5) MailBox Control Register
+AT91C_CAN_MB5_MFID        EQU (0xFFFD02AC) ;- (CAN_MB5) MailBox Family ID Register
+AT91C_CAN_MB5_MDH         EQU (0xFFFD02B8) ;- (CAN_MB5) MailBox Data High Register
+AT91C_CAN_MB5_MID         EQU (0xFFFD02A8) ;- (CAN_MB5) MailBox ID Register
+AT91C_CAN_MB5_MMR         EQU (0xFFFD02A0) ;- (CAN_MB5) MailBox Mode Register
+AT91C_CAN_MB5_MDL         EQU (0xFFFD02B4) ;- (CAN_MB5) MailBox Data Low Register
+AT91C_CAN_MB5_MAM         EQU (0xFFFD02A4) ;- (CAN_MB5) MailBox Acceptance Mask Register
+// - ========== Register definition for CAN_MB6 peripheral ========== 
+AT91C_CAN_MB6_MFID        EQU (0xFFFD02CC) ;- (CAN_MB6) MailBox Family ID Register
+AT91C_CAN_MB6_MID         EQU (0xFFFD02C8) ;- (CAN_MB6) MailBox ID Register
+AT91C_CAN_MB6_MAM         EQU (0xFFFD02C4) ;- (CAN_MB6) MailBox Acceptance Mask Register
+AT91C_CAN_MB6_MSR         EQU (0xFFFD02D0) ;- (CAN_MB6) MailBox Status Register
+AT91C_CAN_MB6_MDL         EQU (0xFFFD02D4) ;- (CAN_MB6) MailBox Data Low Register
+AT91C_CAN_MB6_MCR         EQU (0xFFFD02DC) ;- (CAN_MB6) MailBox Control Register
+AT91C_CAN_MB6_MDH         EQU (0xFFFD02D8) ;- (CAN_MB6) MailBox Data High Register
+AT91C_CAN_MB6_MMR         EQU (0xFFFD02C0) ;- (CAN_MB6) MailBox Mode Register
+// - ========== Register definition for CAN_MB7 peripheral ========== 
+AT91C_CAN_MB7_MCR         EQU (0xFFFD02FC) ;- (CAN_MB7) MailBox Control Register
+AT91C_CAN_MB7_MDH         EQU (0xFFFD02F8) ;- (CAN_MB7) MailBox Data High Register
+AT91C_CAN_MB7_MFID        EQU (0xFFFD02EC) ;- (CAN_MB7) MailBox Family ID Register
+AT91C_CAN_MB7_MDL         EQU (0xFFFD02F4) ;- (CAN_MB7) MailBox Data Low Register
+AT91C_CAN_MB7_MID         EQU (0xFFFD02E8) ;- (CAN_MB7) MailBox ID Register
+AT91C_CAN_MB7_MMR         EQU (0xFFFD02E0) ;- (CAN_MB7) MailBox Mode Register
+AT91C_CAN_MB7_MAM         EQU (0xFFFD02E4) ;- (CAN_MB7) MailBox Acceptance Mask Register
+AT91C_CAN_MB7_MSR         EQU (0xFFFD02F0) ;- (CAN_MB7) MailBox Status Register
+// - ========== Register definition for CAN peripheral ========== 
+AT91C_CAN_TCR             EQU (0xFFFD0024) ;- (CAN) Transfer Command Register
+AT91C_CAN_IMR             EQU (0xFFFD000C) ;- (CAN) Interrupt Mask Register
+AT91C_CAN_IER             EQU (0xFFFD0004) ;- (CAN) Interrupt Enable Register
+AT91C_CAN_ECR             EQU (0xFFFD0020) ;- (CAN) Error Counter Register
+AT91C_CAN_TIMESTP         EQU (0xFFFD001C) ;- (CAN) Time Stamp Register
+AT91C_CAN_MR              EQU (0xFFFD0000) ;- (CAN) Mode Register
+AT91C_CAN_IDR             EQU (0xFFFD0008) ;- (CAN) Interrupt Disable Register
+AT91C_CAN_ACR             EQU (0xFFFD0028) ;- (CAN) Abort Command Register
+AT91C_CAN_TIM             EQU (0xFFFD0018) ;- (CAN) Timer Register
+AT91C_CAN_SR              EQU (0xFFFD0010) ;- (CAN) Status Register
+AT91C_CAN_BR              EQU (0xFFFD0014) ;- (CAN) Baudrate Register
+AT91C_CAN_VR              EQU (0xFFFD00FC) ;- (CAN) Version Register
+// - ========== Register definition for EMAC peripheral ========== 
+AT91C_EMAC_ISR            EQU (0xFFFDC024) ;- (EMAC) Interrupt Status Register
+AT91C_EMAC_SA4H           EQU (0xFFFDC0B4) ;- (EMAC) Specific Address 4 Top, Last 2 bytes
+AT91C_EMAC_SA1L           EQU (0xFFFDC098) ;- (EMAC) Specific Address 1 Bottom, First 4 bytes
+AT91C_EMAC_ELE            EQU (0xFFFDC078) ;- (EMAC) Excessive Length Errors Register
+AT91C_EMAC_LCOL           EQU (0xFFFDC05C) ;- (EMAC) Late Collision Register
+AT91C_EMAC_RLE            EQU (0xFFFDC088) ;- (EMAC) Receive Length Field Mismatch Register
+AT91C_EMAC_WOL            EQU (0xFFFDC0C4) ;- (EMAC) Wake On LAN Register
+AT91C_EMAC_DTF            EQU (0xFFFDC058) ;- (EMAC) Deferred Transmission Frame Register
+AT91C_EMAC_TUND           EQU (0xFFFDC064) ;- (EMAC) Transmit Underrun Error Register
+AT91C_EMAC_NCR            EQU (0xFFFDC000) ;- (EMAC) Network Control Register
+AT91C_EMAC_SA4L           EQU (0xFFFDC0B0) ;- (EMAC) Specific Address 4 Bottom, First 4 bytes
+AT91C_EMAC_RSR            EQU (0xFFFDC020) ;- (EMAC) Receive Status Register
+AT91C_EMAC_SA3L           EQU (0xFFFDC0A8) ;- (EMAC) Specific Address 3 Bottom, First 4 bytes
+AT91C_EMAC_TSR            EQU (0xFFFDC014) ;- (EMAC) Transmit Status Register
+AT91C_EMAC_IDR            EQU (0xFFFDC02C) ;- (EMAC) Interrupt Disable Register
+AT91C_EMAC_RSE            EQU (0xFFFDC074) ;- (EMAC) Receive Symbol Errors Register
+AT91C_EMAC_ECOL           EQU (0xFFFDC060) ;- (EMAC) Excessive Collision Register
+AT91C_EMAC_TID            EQU (0xFFFDC0B8) ;- (EMAC) Type ID Checking Register
+AT91C_EMAC_HRB            EQU (0xFFFDC090) ;- (EMAC) Hash Address Bottom[31:0]
+AT91C_EMAC_TBQP           EQU (0xFFFDC01C) ;- (EMAC) Transmit Buffer Queue Pointer
+AT91C_EMAC_USRIO          EQU (0xFFFDC0C0) ;- (EMAC) USER Input/Output Register
+AT91C_EMAC_PTR            EQU (0xFFFDC038) ;- (EMAC) Pause Time Register
+AT91C_EMAC_SA2H           EQU (0xFFFDC0A4) ;- (EMAC) Specific Address 2 Top, Last 2 bytes
+AT91C_EMAC_ROV            EQU (0xFFFDC070) ;- (EMAC) Receive Overrun Errors Register
+AT91C_EMAC_ALE            EQU (0xFFFDC054) ;- (EMAC) Alignment Error Register
+AT91C_EMAC_RJA            EQU (0xFFFDC07C) ;- (EMAC) Receive Jabbers Register
+AT91C_EMAC_RBQP           EQU (0xFFFDC018) ;- (EMAC) Receive Buffer Queue Pointer
+AT91C_EMAC_TPF            EQU (0xFFFDC08C) ;- (EMAC) Transmitted Pause Frames Register
+AT91C_EMAC_NCFGR          EQU (0xFFFDC004) ;- (EMAC) Network Configuration Register
+AT91C_EMAC_HRT            EQU (0xFFFDC094) ;- (EMAC) Hash Address Top[63:32]
+AT91C_EMAC_USF            EQU (0xFFFDC080) ;- (EMAC) Undersize Frames Register
+AT91C_EMAC_FCSE           EQU (0xFFFDC050) ;- (EMAC) Frame Check Sequence Error Register
+AT91C_EMAC_TPQ            EQU (0xFFFDC0BC) ;- (EMAC) Transmit Pause Quantum Register
+AT91C_EMAC_MAN            EQU (0xFFFDC034) ;- (EMAC) PHY Maintenance Register
+AT91C_EMAC_FTO            EQU (0xFFFDC040) ;- (EMAC) Frames Transmitted OK Register
+AT91C_EMAC_REV            EQU (0xFFFDC0FC) ;- (EMAC) Revision Register
+AT91C_EMAC_IMR            EQU (0xFFFDC030) ;- (EMAC) Interrupt Mask Register
+AT91C_EMAC_SCF            EQU (0xFFFDC044) ;- (EMAC) Single Collision Frame Register
+AT91C_EMAC_PFR            EQU (0xFFFDC03C) ;- (EMAC) Pause Frames received Register
+AT91C_EMAC_MCF            EQU (0xFFFDC048) ;- (EMAC) Multiple Collision Frame Register
+AT91C_EMAC_NSR            EQU (0xFFFDC008) ;- (EMAC) Network Status Register
+AT91C_EMAC_SA2L           EQU (0xFFFDC0A0) ;- (EMAC) Specific Address 2 Bottom, First 4 bytes
+AT91C_EMAC_FRO            EQU (0xFFFDC04C) ;- (EMAC) Frames Received OK Register
+AT91C_EMAC_IER            EQU (0xFFFDC028) ;- (EMAC) Interrupt Enable Register
+AT91C_EMAC_SA1H           EQU (0xFFFDC09C) ;- (EMAC) Specific Address 1 Top, Last 2 bytes
+AT91C_EMAC_CSE            EQU (0xFFFDC068) ;- (EMAC) Carrier Sense Error Register
+AT91C_EMAC_SA3H           EQU (0xFFFDC0AC) ;- (EMAC) Specific Address 3 Top, Last 2 bytes
+AT91C_EMAC_RRE            EQU (0xFFFDC06C) ;- (EMAC) Receive Ressource Error Register
+AT91C_EMAC_STE            EQU (0xFFFDC084) ;- (EMAC) SQE Test Error Register
+// - ========== Register definition for PDC_ADC peripheral ========== 
+AT91C_ADC_PTSR            EQU (0xFFFD8124) ;- (PDC_ADC) PDC Transfer Status Register
+AT91C_ADC_PTCR            EQU (0xFFFD8120) ;- (PDC_ADC) PDC Transfer Control Register
+AT91C_ADC_TNPR            EQU (0xFFFD8118) ;- (PDC_ADC) Transmit Next Pointer Register
+AT91C_ADC_TNCR            EQU (0xFFFD811C) ;- (PDC_ADC) Transmit Next Counter Register
+AT91C_ADC_RNPR            EQU (0xFFFD8110) ;- (PDC_ADC) Receive Next Pointer Register
+AT91C_ADC_RNCR            EQU (0xFFFD8114) ;- (PDC_ADC) Receive Next Counter Register
+AT91C_ADC_RPR             EQU (0xFFFD8100) ;- (PDC_ADC) Receive Pointer Register
+AT91C_ADC_TCR             EQU (0xFFFD810C) ;- (PDC_ADC) Transmit Counter Register
+AT91C_ADC_TPR             EQU (0xFFFD8108) ;- (PDC_ADC) Transmit Pointer Register
+AT91C_ADC_RCR             EQU (0xFFFD8104) ;- (PDC_ADC) Receive Counter Register
+// - ========== Register definition for ADC peripheral ========== 
+AT91C_ADC_CDR2            EQU (0xFFFD8038) ;- (ADC) ADC Channel Data Register 2
+AT91C_ADC_CDR3            EQU (0xFFFD803C) ;- (ADC) ADC Channel Data Register 3
+AT91C_ADC_CDR0            EQU (0xFFFD8030) ;- (ADC) ADC Channel Data Register 0
+AT91C_ADC_CDR5            EQU (0xFFFD8044) ;- (ADC) ADC Channel Data Register 5
+AT91C_ADC_CHDR            EQU (0xFFFD8014) ;- (ADC) ADC Channel Disable Register
+AT91C_ADC_SR              EQU (0xFFFD801C) ;- (ADC) ADC Status Register
+AT91C_ADC_CDR4            EQU (0xFFFD8040) ;- (ADC) ADC Channel Data Register 4
+AT91C_ADC_CDR1            EQU (0xFFFD8034) ;- (ADC) ADC Channel Data Register 1
+AT91C_ADC_LCDR            EQU (0xFFFD8020) ;- (ADC) ADC Last Converted Data Register
+AT91C_ADC_IDR             EQU (0xFFFD8028) ;- (ADC) ADC Interrupt Disable Register
+AT91C_ADC_CR              EQU (0xFFFD8000) ;- (ADC) ADC Control Register
+AT91C_ADC_CDR7            EQU (0xFFFD804C) ;- (ADC) ADC Channel Data Register 7
+AT91C_ADC_CDR6            EQU (0xFFFD8048) ;- (ADC) ADC Channel Data Register 6
+AT91C_ADC_IER             EQU (0xFFFD8024) ;- (ADC) ADC Interrupt Enable Register
+AT91C_ADC_CHER            EQU (0xFFFD8010) ;- (ADC) ADC Channel Enable Register
+AT91C_ADC_CHSR            EQU (0xFFFD8018) ;- (ADC) ADC Channel Status Register
+AT91C_ADC_MR              EQU (0xFFFD8004) ;- (ADC) ADC Mode Register
+AT91C_ADC_IMR             EQU (0xFFFD802C) ;- (ADC) ADC Interrupt Mask Register
+
+// - *****************************************************************************
+// -               PIO DEFINITIONS FOR AT91SAM7X256
+// - *****************************************************************************
+AT91C_PIO_PA0             EQU (1 <<  0) ;- Pin Controlled by PA0
+AT91C_PA0_RXD0            EQU (AT91C_PIO_PA0) ;-  USART 0 Receive Data
+AT91C_PIO_PA1             EQU (1 <<  1) ;- Pin Controlled by PA1
+AT91C_PA1_TXD0            EQU (AT91C_PIO_PA1) ;-  USART 0 Transmit Data
+AT91C_PIO_PA10            EQU (1 << 10) ;- Pin Controlled by PA10
+AT91C_PA10_TWD            EQU (AT91C_PIO_PA10) ;-  TWI Two-wire Serial Data
+AT91C_PIO_PA11            EQU (1 << 11) ;- Pin Controlled by PA11
+AT91C_PA11_TWCK           EQU (AT91C_PIO_PA11) ;-  TWI Two-wire Serial Clock
+AT91C_PIO_PA12            EQU (1 << 12) ;- Pin Controlled by PA12
+AT91C_PA12_SPI0_NPCS0     EQU (AT91C_PIO_PA12) ;-  SPI 0 Peripheral Chip Select 0
+AT91C_PIO_PA13            EQU (1 << 13) ;- Pin Controlled by PA13
+AT91C_PA13_SPI0_NPCS1     EQU (AT91C_PIO_PA13) ;-  SPI 0 Peripheral Chip Select 1
+AT91C_PA13_PCK1           EQU (AT91C_PIO_PA13) ;-  PMC Programmable Clock Output 1
+AT91C_PIO_PA14            EQU (1 << 14) ;- Pin Controlled by PA14
+AT91C_PA14_SPI0_NPCS2     EQU (AT91C_PIO_PA14) ;-  SPI 0 Peripheral Chip Select 2
+AT91C_PA14_IRQ1           EQU (AT91C_PIO_PA14) ;-  External Interrupt 1
+AT91C_PIO_PA15            EQU (1 << 15) ;- Pin Controlled by PA15
+AT91C_PA15_SPI0_NPCS3     EQU (AT91C_PIO_PA15) ;-  SPI 0 Peripheral Chip Select 3
+AT91C_PA15_TCLK2          EQU (AT91C_PIO_PA15) ;-  Timer Counter 2 external clock input
+AT91C_PIO_PA16            EQU (1 << 16) ;- Pin Controlled by PA16
+AT91C_PA16_SPI0_MISO      EQU (AT91C_PIO_PA16) ;-  SPI 0 Master In Slave
+AT91C_PIO_PA17            EQU (1 << 17) ;- Pin Controlled by PA17
+AT91C_PA17_SPI0_MOSI      EQU (AT91C_PIO_PA17) ;-  SPI 0 Master Out Slave
+AT91C_PIO_PA18            EQU (1 << 18) ;- Pin Controlled by PA18
+AT91C_PA18_SPI0_SPCK      EQU (AT91C_PIO_PA18) ;-  SPI 0 Serial Clock
+AT91C_PIO_PA19            EQU (1 << 19) ;- Pin Controlled by PA19
+AT91C_PA19_CANRX          EQU (AT91C_PIO_PA19) ;-  CAN Receive
+AT91C_PIO_PA2             EQU (1 <<  2) ;- Pin Controlled by PA2
+AT91C_PA2_SCK0            EQU (AT91C_PIO_PA2) ;-  USART 0 Serial Clock
+AT91C_PA2_SPI1_NPCS1      EQU (AT91C_PIO_PA2) ;-  SPI 1 Peripheral Chip Select 1
+AT91C_PIO_PA20            EQU (1 << 20) ;- Pin Controlled by PA20
+AT91C_PA20_CANTX          EQU (AT91C_PIO_PA20) ;-  CAN Transmit
+AT91C_PIO_PA21            EQU (1 << 21) ;- Pin Controlled by PA21
+AT91C_PA21_TF             EQU (AT91C_PIO_PA21) ;-  SSC Transmit Frame Sync
+AT91C_PA21_SPI1_NPCS0     EQU (AT91C_PIO_PA21) ;-  SPI 1 Peripheral Chip Select 0
+AT91C_PIO_PA22            EQU (1 << 22) ;- Pin Controlled by PA22
+AT91C_PA22_TK             EQU (AT91C_PIO_PA22) ;-  SSC Transmit Clock
+AT91C_PA22_SPI1_SPCK      EQU (AT91C_PIO_PA22) ;-  SPI 1 Serial Clock
+AT91C_PIO_PA23            EQU (1 << 23) ;- Pin Controlled by PA23
+AT91C_PA23_TD             EQU (AT91C_PIO_PA23) ;-  SSC Transmit data
+AT91C_PA23_SPI1_MOSI      EQU (AT91C_PIO_PA23) ;-  SPI 1 Master Out Slave
+AT91C_PIO_PA24            EQU (1 << 24) ;- Pin Controlled by PA24
+AT91C_PA24_RD             EQU (AT91C_PIO_PA24) ;-  SSC Receive Data
+AT91C_PA24_SPI1_MISO      EQU (AT91C_PIO_PA24) ;-  SPI 1 Master In Slave
+AT91C_PIO_PA25            EQU (1 << 25) ;- Pin Controlled by PA25
+AT91C_PA25_RK             EQU (AT91C_PIO_PA25) ;-  SSC Receive Clock
+AT91C_PA25_SPI1_NPCS1     EQU (AT91C_PIO_PA25) ;-  SPI 1 Peripheral Chip Select 1
+AT91C_PIO_PA26            EQU (1 << 26) ;- Pin Controlled by PA26
+AT91C_PA26_RF             EQU (AT91C_PIO_PA26) ;-  SSC Receive Frame Sync
+AT91C_PA26_SPI1_NPCS2     EQU (AT91C_PIO_PA26) ;-  SPI 1 Peripheral Chip Select 2
+AT91C_PIO_PA27            EQU (1 << 27) ;- Pin Controlled by PA27
+AT91C_PA27_DRXD           EQU (AT91C_PIO_PA27) ;-  DBGU Debug Receive Data
+AT91C_PA27_PCK3           EQU (AT91C_PIO_PA27) ;-  PMC Programmable Clock Output 3
+AT91C_PIO_PA28            EQU (1 << 28) ;- Pin Controlled by PA28
+AT91C_PA28_DTXD           EQU (AT91C_PIO_PA28) ;-  DBGU Debug Transmit Data
+AT91C_PIO_PA29            EQU (1 << 29) ;- Pin Controlled by PA29
+AT91C_PA29_FIQ            EQU (AT91C_PIO_PA29) ;-  AIC Fast Interrupt Input
+AT91C_PA29_SPI1_NPCS3     EQU (AT91C_PIO_PA29) ;-  SPI 1 Peripheral Chip Select 3
+AT91C_PIO_PA3             EQU (1 <<  3) ;- Pin Controlled by PA3
+AT91C_PA3_RTS0            EQU (AT91C_PIO_PA3) ;-  USART 0 Ready To Send
+AT91C_PA3_SPI1_NPCS2      EQU (AT91C_PIO_PA3) ;-  SPI 1 Peripheral Chip Select 2
+AT91C_PIO_PA30            EQU (1 << 30) ;- Pin Controlled by PA30
+AT91C_PA30_IRQ0           EQU (AT91C_PIO_PA30) ;-  External Interrupt 0
+AT91C_PA30_PCK2           EQU (AT91C_PIO_PA30) ;-  PMC Programmable Clock Output 2
+AT91C_PIO_PA4             EQU (1 <<  4) ;- Pin Controlled by PA4
+AT91C_PA4_CTS0            EQU (AT91C_PIO_PA4) ;-  USART 0 Clear To Send
+AT91C_PA4_SPI1_NPCS3      EQU (AT91C_PIO_PA4) ;-  SPI 1 Peripheral Chip Select 3
+AT91C_PIO_PA5             EQU (1 <<  5) ;- Pin Controlled by PA5
+AT91C_PA5_RXD1            EQU (AT91C_PIO_PA5) ;-  USART 1 Receive Data
+AT91C_PIO_PA6             EQU (1 <<  6) ;- Pin Controlled by PA6
+AT91C_PA6_TXD1            EQU (AT91C_PIO_PA6) ;-  USART 1 Transmit Data
+AT91C_PIO_PA7             EQU (1 <<  7) ;- Pin Controlled by PA7
+AT91C_PA7_SCK1            EQU (AT91C_PIO_PA7) ;-  USART 1 Serial Clock
+AT91C_PA7_SPI0_NPCS1      EQU (AT91C_PIO_PA7) ;-  SPI 0 Peripheral Chip Select 1
+AT91C_PIO_PA8             EQU (1 <<  8) ;- Pin Controlled by PA8
+AT91C_PA8_RTS1            EQU (AT91C_PIO_PA8) ;-  USART 1 Ready To Send
+AT91C_PA8_SPI0_NPCS2      EQU (AT91C_PIO_PA8) ;-  SPI 0 Peripheral Chip Select 2
+AT91C_PIO_PA9             EQU (1 <<  9) ;- Pin Controlled by PA9
+AT91C_PA9_CTS1            EQU (AT91C_PIO_PA9) ;-  USART 1 Clear To Send
+AT91C_PA9_SPI0_NPCS3      EQU (AT91C_PIO_PA9) ;-  SPI 0 Peripheral Chip Select 3
+AT91C_PIO_PB0             EQU (1 <<  0) ;- Pin Controlled by PB0
+AT91C_PB0_ETXCK_EREFCK    EQU (AT91C_PIO_PB0) ;-  Ethernet MAC Transmit Clock/Reference Clock
+AT91C_PB0_PCK0            EQU (AT91C_PIO_PB0) ;-  PMC Programmable Clock Output 0
+AT91C_PIO_PB1             EQU (1 <<  1) ;- Pin Controlled by PB1
+AT91C_PB1_ETXEN           EQU (AT91C_PIO_PB1) ;-  Ethernet MAC Transmit Enable
+AT91C_PIO_PB10            EQU (1 << 10) ;- Pin Controlled by PB10
+AT91C_PB10_ETX2           EQU (AT91C_PIO_PB10) ;-  Ethernet MAC Transmit Data 2
+AT91C_PB10_SPI1_NPCS1     EQU (AT91C_PIO_PB10) ;-  SPI 1 Peripheral Chip Select 1
+AT91C_PIO_PB11            EQU (1 << 11) ;- Pin Controlled by PB11
+AT91C_PB11_ETX3           EQU (AT91C_PIO_PB11) ;-  Ethernet MAC Transmit Data 3
+AT91C_PB11_SPI1_NPCS2     EQU (AT91C_PIO_PB11) ;-  SPI 1 Peripheral Chip Select 2
+AT91C_PIO_PB12            EQU (1 << 12) ;- Pin Controlled by PB12
+AT91C_PB12_ETXER          EQU (AT91C_PIO_PB12) ;-  Ethernet MAC Transmikt Coding Error
+AT91C_PB12_TCLK0          EQU (AT91C_PIO_PB12) ;-  Timer Counter 0 external clock input
+AT91C_PIO_PB13            EQU (1 << 13) ;- Pin Controlled by PB13
+AT91C_PB13_ERX2           EQU (AT91C_PIO_PB13) ;-  Ethernet MAC Receive Data 2
+AT91C_PB13_SPI0_NPCS1     EQU (AT91C_PIO_PB13) ;-  SPI 0 Peripheral Chip Select 1
+AT91C_PIO_PB14            EQU (1 << 14) ;- Pin Controlled by PB14
+AT91C_PB14_ERX3           EQU (AT91C_PIO_PB14) ;-  Ethernet MAC Receive Data 3
+AT91C_PB14_SPI0_NPCS2     EQU (AT91C_PIO_PB14) ;-  SPI 0 Peripheral Chip Select 2
+AT91C_PIO_PB15            EQU (1 << 15) ;- Pin Controlled by PB15
+AT91C_PB15_ERXDV_ECRSDV   EQU (AT91C_PIO_PB15) ;-  Ethernet MAC Receive Data Valid
+AT91C_PIO_PB16            EQU (1 << 16) ;- Pin Controlled by PB16
+AT91C_PB16_ECOL           EQU (AT91C_PIO_PB16) ;-  Ethernet MAC Collision Detected
+AT91C_PB16_SPI1_NPCS3     EQU (AT91C_PIO_PB16) ;-  SPI 1 Peripheral Chip Select 3
+AT91C_PIO_PB17            EQU (1 << 17) ;- Pin Controlled by PB17
+AT91C_PB17_ERXCK          EQU (AT91C_PIO_PB17) ;-  Ethernet MAC Receive Clock
+AT91C_PB17_SPI0_NPCS3     EQU (AT91C_PIO_PB17) ;-  SPI 0 Peripheral Chip Select 3
+AT91C_PIO_PB18            EQU (1 << 18) ;- Pin Controlled by PB18
+AT91C_PB18_EF100          EQU (AT91C_PIO_PB18) ;-  Ethernet MAC Force 100 Mbits/sec
+AT91C_PB18_ADTRG          EQU (AT91C_PIO_PB18) ;-  ADC External Trigger
+AT91C_PIO_PB19            EQU (1 << 19) ;- Pin Controlled by PB19
+AT91C_PB19_PWM0           EQU (AT91C_PIO_PB19) ;-  PWM Channel 0
+AT91C_PB19_TCLK1          EQU (AT91C_PIO_PB19) ;-  Timer Counter 1 external clock input
+AT91C_PIO_PB2             EQU (1 <<  2) ;- Pin Controlled by PB2
+AT91C_PB2_ETX0            EQU (AT91C_PIO_PB2) ;-  Ethernet MAC Transmit Data 0
+AT91C_PIO_PB20            EQU (1 << 20) ;- Pin Controlled by PB20
+AT91C_PB20_PWM1           EQU (AT91C_PIO_PB20) ;-  PWM Channel 1
+AT91C_PB20_PCK0           EQU (AT91C_PIO_PB20) ;-  PMC Programmable Clock Output 0
+AT91C_PIO_PB21            EQU (1 << 21) ;- Pin Controlled by PB21
+AT91C_PB21_PWM2           EQU (AT91C_PIO_PB21) ;-  PWM Channel 2
+AT91C_PB21_PCK1           EQU (AT91C_PIO_PB21) ;-  PMC Programmable Clock Output 1
+AT91C_PIO_PB22            EQU (1 << 22) ;- Pin Controlled by PB22
+AT91C_PB22_PWM3           EQU (AT91C_PIO_PB22) ;-  PWM Channel 3
+AT91C_PB22_PCK2           EQU (AT91C_PIO_PB22) ;-  PMC Programmable Clock Output 2
+AT91C_PIO_PB23            EQU (1 << 23) ;- Pin Controlled by PB23
+AT91C_PB23_TIOA0          EQU (AT91C_PIO_PB23) ;-  Timer Counter 0 Multipurpose Timer I/O Pin A
+AT91C_PB23_DCD1           EQU (AT91C_PIO_PB23) ;-  USART 1 Data Carrier Detect
+AT91C_PIO_PB24            EQU (1 << 24) ;- Pin Controlled by PB24
+AT91C_PB24_TIOB0          EQU (AT91C_PIO_PB24) ;-  Timer Counter 0 Multipurpose Timer I/O Pin B
+AT91C_PB24_DSR1           EQU (AT91C_PIO_PB24) ;-  USART 1 Data Set ready
+AT91C_PIO_PB25            EQU (1 << 25) ;- Pin Controlled by PB25
+AT91C_PB25_TIOA1          EQU (AT91C_PIO_PB25) ;-  Timer Counter 1 Multipurpose Timer I/O Pin A
+AT91C_PB25_DTR1           EQU (AT91C_PIO_PB25) ;-  USART 1 Data Terminal ready
+AT91C_PIO_PB26            EQU (1 << 26) ;- Pin Controlled by PB26
+AT91C_PB26_TIOB1          EQU (AT91C_PIO_PB26) ;-  Timer Counter 1 Multipurpose Timer I/O Pin B
+AT91C_PB26_RI1            EQU (AT91C_PIO_PB26) ;-  USART 1 Ring Indicator
+AT91C_PIO_PB27            EQU (1 << 27) ;- Pin Controlled by PB27
+AT91C_PB27_TIOA2          EQU (AT91C_PIO_PB27) ;-  Timer Counter 2 Multipurpose Timer I/O Pin A
+AT91C_PB27_PWM0           EQU (AT91C_PIO_PB27) ;-  PWM Channel 0
+AT91C_PIO_PB28            EQU (1 << 28) ;- Pin Controlled by PB28
+AT91C_PB28_TIOB2          EQU (AT91C_PIO_PB28) ;-  Timer Counter 2 Multipurpose Timer I/O Pin B
+AT91C_PB28_PWM1           EQU (AT91C_PIO_PB28) ;-  PWM Channel 1
+AT91C_PIO_PB29            EQU (1 << 29) ;- Pin Controlled by PB29
+AT91C_PB29_PCK1           EQU (AT91C_PIO_PB29) ;-  PMC Programmable Clock Output 1
+AT91C_PB29_PWM2           EQU (AT91C_PIO_PB29) ;-  PWM Channel 2
+AT91C_PIO_PB3             EQU (1 <<  3) ;- Pin Controlled by PB3
+AT91C_PB3_ETX1            EQU (AT91C_PIO_PB3) ;-  Ethernet MAC Transmit Data 1
+AT91C_PIO_PB30            EQU (1 << 30) ;- Pin Controlled by PB30
+AT91C_PB30_PCK2           EQU (AT91C_PIO_PB30) ;-  PMC Programmable Clock Output 2
+AT91C_PB30_PWM3           EQU (AT91C_PIO_PB30) ;-  PWM Channel 3
+AT91C_PIO_PB4             EQU (1 <<  4) ;- Pin Controlled by PB4
+AT91C_PB4_ECRS            EQU (AT91C_PIO_PB4) ;-  Ethernet MAC Carrier Sense/Carrier Sense and Data Valid
+AT91C_PIO_PB5             EQU (1 <<  5) ;- Pin Controlled by PB5
+AT91C_PB5_ERX0            EQU (AT91C_PIO_PB5) ;-  Ethernet MAC Receive Data 0
+AT91C_PIO_PB6             EQU (1 <<  6) ;- Pin Controlled by PB6
+AT91C_PB6_ERX1            EQU (AT91C_PIO_PB6) ;-  Ethernet MAC Receive Data 1
+AT91C_PIO_PB7             EQU (1 <<  7) ;- Pin Controlled by PB7
+AT91C_PB7_ERXER           EQU (AT91C_PIO_PB7) ;-  Ethernet MAC Receive Error
+AT91C_PIO_PB8             EQU (1 <<  8) ;- Pin Controlled by PB8
+AT91C_PB8_EMDC            EQU (AT91C_PIO_PB8) ;-  Ethernet MAC Management Data Clock
+AT91C_PIO_PB9             EQU (1 <<  9) ;- Pin Controlled by PB9
+AT91C_PB9_EMDIO           EQU (AT91C_PIO_PB9) ;-  Ethernet MAC Management Data Input/Output
+
+// - *****************************************************************************
+// -               PERIPHERAL ID DEFINITIONS FOR AT91SAM7X256
+// - *****************************************************************************
+AT91C_ID_FIQ              EQU ( 0) ;- Advanced Interrupt Controller (FIQ)
+AT91C_ID_SYS              EQU ( 1) ;- System Peripheral
+AT91C_ID_PIOA             EQU ( 2) ;- Parallel IO Controller A
+AT91C_ID_PIOB             EQU ( 3) ;- Parallel IO Controller B
+AT91C_ID_SPI0             EQU ( 4) ;- Serial Peripheral Interface 0
+AT91C_ID_SPI1             EQU ( 5) ;- Serial Peripheral Interface 1
+AT91C_ID_US0              EQU ( 6) ;- USART 0
+AT91C_ID_US1              EQU ( 7) ;- USART 1
+AT91C_ID_SSC              EQU ( 8) ;- Serial Synchronous Controller
+AT91C_ID_TWI              EQU ( 9) ;- Two-Wire Interface
+AT91C_ID_PWMC             EQU (10) ;- PWM Controller
+AT91C_ID_UDP              EQU (11) ;- USB Device Port
+AT91C_ID_TC0              EQU (12) ;- Timer Counter 0
+AT91C_ID_TC1              EQU (13) ;- Timer Counter 1
+AT91C_ID_TC2              EQU (14) ;- Timer Counter 2
+AT91C_ID_CAN              EQU (15) ;- Control Area Network Controller
+AT91C_ID_EMAC             EQU (16) ;- Ethernet MAC
+AT91C_ID_ADC              EQU (17) ;- Analog-to-Digital Converter
+AT91C_ID_18_Reserved      EQU (18) ;- Reserved
+AT91C_ID_19_Reserved      EQU (19) ;- Reserved
+AT91C_ID_20_Reserved      EQU (20) ;- Reserved
+AT91C_ID_21_Reserved      EQU (21) ;- Reserved
+AT91C_ID_22_Reserved      EQU (22) ;- Reserved
+AT91C_ID_23_Reserved      EQU (23) ;- Reserved
+AT91C_ID_24_Reserved      EQU (24) ;- Reserved
+AT91C_ID_25_Reserved      EQU (25) ;- Reserved
+AT91C_ID_26_Reserved      EQU (26) ;- Reserved
+AT91C_ID_27_Reserved      EQU (27) ;- Reserved
+AT91C_ID_28_Reserved      EQU (28) ;- Reserved
+AT91C_ID_29_Reserved      EQU (29) ;- Reserved
+AT91C_ID_IRQ0             EQU (30) ;- Advanced Interrupt Controller (IRQ0)
+AT91C_ID_IRQ1             EQU (31) ;- Advanced Interrupt Controller (IRQ1)
+AT91C_ALL_INT             EQU (0xC003FFFF) ;- ALL VALID INTERRUPTS
+
+// - *****************************************************************************
+// -               BASE ADDRESS DEFINITIONS FOR AT91SAM7X256
+// - *****************************************************************************
+AT91C_BASE_SYS            EQU (0xFFFFF000) ;- (SYS) Base Address
+AT91C_BASE_AIC            EQU (0xFFFFF000) ;- (AIC) Base Address
+AT91C_BASE_PDC_DBGU       EQU (0xFFFFF300) ;- (PDC_DBGU) Base Address
+AT91C_BASE_DBGU           EQU (0xFFFFF200) ;- (DBGU) Base Address
+AT91C_BASE_PIOA           EQU (0xFFFFF400) ;- (PIOA) Base Address
+AT91C_BASE_PIOB           EQU (0xFFFFF600) ;- (PIOB) Base Address
+AT91C_BASE_CKGR           EQU (0xFFFFFC20) ;- (CKGR) Base Address
+AT91C_BASE_PMC            EQU (0xFFFFFC00) ;- (PMC) Base Address
+AT91C_BASE_RSTC           EQU (0xFFFFFD00) ;- (RSTC) Base Address
+AT91C_BASE_RTTC           EQU (0xFFFFFD20) ;- (RTTC) Base Address
+AT91C_BASE_PITC           EQU (0xFFFFFD30) ;- (PITC) Base Address
+AT91C_BASE_WDTC           EQU (0xFFFFFD40) ;- (WDTC) Base Address
+AT91C_BASE_VREG           EQU (0xFFFFFD60) ;- (VREG) Base Address
+AT91C_BASE_MC             EQU (0xFFFFFF00) ;- (MC) Base Address
+AT91C_BASE_PDC_SPI1       EQU (0xFFFE4100) ;- (PDC_SPI1) Base Address
+AT91C_BASE_SPI1           EQU (0xFFFE4000) ;- (SPI1) Base Address
+AT91C_BASE_PDC_SPI0       EQU (0xFFFE0100) ;- (PDC_SPI0) Base Address
+AT91C_BASE_SPI0           EQU (0xFFFE0000) ;- (SPI0) Base Address
+AT91C_BASE_PDC_US1        EQU (0xFFFC4100) ;- (PDC_US1) Base Address
+AT91C_BASE_US1            EQU (0xFFFC4000) ;- (US1) Base Address
+AT91C_BASE_PDC_US0        EQU (0xFFFC0100) ;- (PDC_US0) Base Address
+AT91C_BASE_US0            EQU (0xFFFC0000) ;- (US0) Base Address
+AT91C_BASE_PDC_SSC        EQU (0xFFFD4100) ;- (PDC_SSC) Base Address
+AT91C_BASE_SSC            EQU (0xFFFD4000) ;- (SSC) Base Address
+AT91C_BASE_TWI            EQU (0xFFFB8000) ;- (TWI) Base Address
+AT91C_BASE_PWMC_CH3       EQU (0xFFFCC260) ;- (PWMC_CH3) Base Address
+AT91C_BASE_PWMC_CH2       EQU (0xFFFCC240) ;- (PWMC_CH2) Base Address
+AT91C_BASE_PWMC_CH1       EQU (0xFFFCC220) ;- (PWMC_CH1) Base Address
+AT91C_BASE_PWMC_CH0       EQU (0xFFFCC200) ;- (PWMC_CH0) Base Address
+AT91C_BASE_PWMC           EQU (0xFFFCC000) ;- (PWMC) Base Address
+AT91C_BASE_UDP            EQU (0xFFFB0000) ;- (UDP) Base Address
+AT91C_BASE_TC0            EQU (0xFFFA0000) ;- (TC0) Base Address
+AT91C_BASE_TC1            EQU (0xFFFA0040) ;- (TC1) Base Address
+AT91C_BASE_TC2            EQU (0xFFFA0080) ;- (TC2) Base Address
+AT91C_BASE_TCB            EQU (0xFFFA0000) ;- (TCB) Base Address
+AT91C_BASE_CAN_MB0        EQU (0xFFFD0200) ;- (CAN_MB0) Base Address
+AT91C_BASE_CAN_MB1        EQU (0xFFFD0220) ;- (CAN_MB1) Base Address
+AT91C_BASE_CAN_MB2        EQU (0xFFFD0240) ;- (CAN_MB2) Base Address
+AT91C_BASE_CAN_MB3        EQU (0xFFFD0260) ;- (CAN_MB3) Base Address
+AT91C_BASE_CAN_MB4        EQU (0xFFFD0280) ;- (CAN_MB4) Base Address
+AT91C_BASE_CAN_MB5        EQU (0xFFFD02A0) ;- (CAN_MB5) Base Address
+AT91C_BASE_CAN_MB6        EQU (0xFFFD02C0) ;- (CAN_MB6) Base Address
+AT91C_BASE_CAN_MB7        EQU (0xFFFD02E0) ;- (CAN_MB7) Base Address
+AT91C_BASE_CAN            EQU (0xFFFD0000) ;- (CAN) Base Address
+AT91C_BASE_EMAC           EQU (0xFFFDC000) ;- (EMAC) Base Address
+AT91C_BASE_PDC_ADC        EQU (0xFFFD8100) ;- (PDC_ADC) Base Address
+AT91C_BASE_ADC            EQU (0xFFFD8000) ;- (ADC) Base Address
+
+// - *****************************************************************************
+// -               MEMORY MAPPING DEFINITIONS FOR AT91SAM7X256
+// - *****************************************************************************
+// - ISRAM
+AT91C_ISRAM               EQU (0x00200000) ;- Internal SRAM base address
+AT91C_ISRAM_SIZE          EQU (0x00010000) ;- Internal SRAM size in byte (64 Kbytes)
+// - IFLASH
+AT91C_IFLASH              EQU (0x00100000) ;- Internal FLASH base address
+AT91C_IFLASH_SIZE         EQU (0x00040000) ;- Internal FLASH size in byte (256 Kbytes)
+AT91C_IFLASH_PAGE_SIZE    EQU (256) ;- Internal FLASH Page Size: 256 bytes
+AT91C_IFLASH_LOCK_REGION_SIZE EQU (16384) ;- Internal FLASH Lock Region Size: 16 Kbytes
+AT91C_IFLASH_NB_OF_PAGES  EQU (1024) ;- Internal FLASH Number of Pages: 1024 bytes
+AT91C_IFLASH_NB_OF_LOCK_BITS EQU (16) ;- Internal FLASH Number of Lock Bits: 16 bytes
+#endif /* __IAR_SYSTEMS_ASM__ */
+
+
+#endif /* AT91SAM7X256_H */
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/incIAR/lib_AT91SAM7X256.h b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/incIAR/lib_AT91SAM7X256.h
new file mode 100644
index 000000000..95492d0c3
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/incIAR/lib_AT91SAM7X256.h
@@ -0,0 +1,4211 @@
+//* ----------------------------------------------------------------------------
+//*         ATMEL Microcontroller Software Support  -  ROUSSET  -
+//* ----------------------------------------------------------------------------
+//* DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+//* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+//* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+//* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+//* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+//* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+//* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+//* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+//* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+//* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//* ----------------------------------------------------------------------------
+//* File Name           : lib_AT91SAM7X256.h
+//* Object              : AT91SAM7X256 inlined functions
+//* Generated           : AT91 SW Application Group  11/02/2005 (15:17:24)
+//*
+//* CVS Reference       : /lib_dbgu.h/1.1/Thu Aug 25 12:56:22 2005//
+//* CVS Reference       : /lib_pmc_SAM7X.h/1.4/Tue Aug 30 13:00:36 2005//
+//* CVS Reference       : /lib_VREG_6085B.h/1.1/Tue Feb  1 16:20:47 2005//
+//* CVS Reference       : /lib_rstc_6098A.h/1.1/Wed Oct  6 10:39:20 2004//
+//* CVS Reference       : /lib_ssc.h/1.4/Fri Jan 31 12:19:20 2003//
+//* CVS Reference       : /lib_wdtc_6080A.h/1.1/Wed Oct  6 10:38:30 2004//
+//* CVS Reference       : /lib_usart.h/1.5/Thu Nov 21 16:01:54 2002//
+//* CVS Reference       : /lib_spi2.h/1.2/Tue Aug 23 15:37:28 2005//
+//* CVS Reference       : /lib_pitc_6079A.h/1.2/Tue Nov  9 14:43:56 2004//
+//* CVS Reference       : /lib_aic_6075b.h/1.2/Thu Jul  7 07:48:22 2005//
+//* CVS Reference       : /lib_twi.h/1.3/Mon Jul 19 14:27:58 2004//
+//* CVS Reference       : /lib_adc.h/1.6/Fri Oct 17 09:12:38 2003//
+//* CVS Reference       : /lib_rttc_6081A.h/1.1/Wed Oct  6 10:39:38 2004//
+//* CVS Reference       : /lib_udp.h/1.5/Tue Aug 30 12:13:47 2005//
+//* CVS Reference       : /lib_tc_1753b.h/1.1/Fri Jan 31 12:20:02 2003//
+//* CVS Reference       : /lib_MC_SAM7X.h/1.1/Thu Mar 25 15:19:14 2004//
+//* CVS Reference       : /lib_pio.h/1.3/Fri Jan 31 12:18:56 2003//
+//* CVS Reference       : /lib_can_AT91.h/1.5/Tue Aug 23 15:37:07 2005//
+//* CVS Reference       : /lib_PWM_SAM.h/1.3/Thu Jan 22 10:10:50 2004//
+//* CVS Reference       : /lib_pdc.h/1.2/Tue Jul  2 13:29:40 2002//
+//* ----------------------------------------------------------------------------
+
+#ifndef lib_AT91SAM7X256_H
+#define lib_AT91SAM7X256_H
+
+/* *****************************************************************************
+                SOFTWARE API FOR AIC
+   ***************************************************************************** */
+#define AT91C_AIC_BRANCH_OPCODE ((void (*) ()) 0xE51FFF20) // ldr, pc, [pc, #-&F20]
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_AIC_ConfigureIt
+//* \brief Interrupt Handler Initialization
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_AIC_ConfigureIt (
+	AT91PS_AIC pAic,  // \arg pointer to the AIC registers
+	unsigned int irq_id,     // \arg interrupt number to initialize
+	unsigned int priority,   // \arg priority to give to the interrupt
+	unsigned int src_type,   // \arg activation and sense of activation
+	void (*newHandler) () ) // \arg address of the interrupt handler
+{
+	unsigned int oldHandler;
+    unsigned int mask ;
+
+    oldHandler = pAic->AIC_SVR[irq_id];
+
+    mask = 0x1 << irq_id ;
+    //* Disable the interrupt on the interrupt controller
+    pAic->AIC_IDCR = mask ;
+    //* Save the interrupt handler routine pointer and the interrupt priority
+    pAic->AIC_SVR[irq_id] = (unsigned int) newHandler ;
+    //* Store the Source Mode Register
+    pAic->AIC_SMR[irq_id] = src_type | priority  ;
+    //* Clear the interrupt on the interrupt controller
+    pAic->AIC_ICCR = mask ;
+
+	return oldHandler;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_AIC_EnableIt
+//* \brief Enable corresponding IT number
+//*----------------------------------------------------------------------------
+__inline void AT91F_AIC_EnableIt (
+	AT91PS_AIC pAic,      // \arg pointer to the AIC registers
+	unsigned int irq_id ) // \arg interrupt number to initialize
+{
+    //* Enable the interrupt on the interrupt controller
+    pAic->AIC_IECR = 0x1 << irq_id ;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_AIC_DisableIt
+//* \brief Disable corresponding IT number
+//*----------------------------------------------------------------------------
+__inline void AT91F_AIC_DisableIt (
+	AT91PS_AIC pAic,      // \arg pointer to the AIC registers
+	unsigned int irq_id ) // \arg interrupt number to initialize
+{
+    unsigned int mask = 0x1 << irq_id;
+    //* Disable the interrupt on the interrupt controller
+    pAic->AIC_IDCR = mask ;
+    //* Clear the interrupt on the Interrupt Controller ( if one is pending )
+    pAic->AIC_ICCR = mask ;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_AIC_ClearIt
+//* \brief Clear corresponding IT number
+//*----------------------------------------------------------------------------
+__inline void AT91F_AIC_ClearIt (
+	AT91PS_AIC pAic,     // \arg pointer to the AIC registers
+	unsigned int irq_id) // \arg interrupt number to initialize
+{
+    //* Clear the interrupt on the Interrupt Controller ( if one is pending )
+    pAic->AIC_ICCR = (0x1 << irq_id);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_AIC_AcknowledgeIt
+//* \brief Acknowledge corresponding IT number
+//*----------------------------------------------------------------------------
+__inline void AT91F_AIC_AcknowledgeIt (
+	AT91PS_AIC pAic)     // \arg pointer to the AIC registers
+{
+    pAic->AIC_EOICR = pAic->AIC_EOICR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_AIC_SetExceptionVector
+//* \brief Configure vector handler
+//*----------------------------------------------------------------------------
+__inline unsigned int  AT91F_AIC_SetExceptionVector (
+	unsigned int *pVector, // \arg pointer to the AIC registers
+	void (*Handler) () )   // \arg Interrupt Handler
+{
+	unsigned int oldVector = *pVector;
+
+	if ((unsigned int) Handler == (unsigned int) AT91C_AIC_BRANCH_OPCODE)
+		*pVector = (unsigned int) AT91C_AIC_BRANCH_OPCODE;
+	else
+		*pVector = (((((unsigned int) Handler) - ((unsigned int) pVector) - 0x8) >> 2) & 0x00FFFFFF) | 0xEA000000;
+
+	return oldVector;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_AIC_Trig
+//* \brief Trig an IT
+//*----------------------------------------------------------------------------
+__inline void  AT91F_AIC_Trig (
+	AT91PS_AIC pAic,     // \arg pointer to the AIC registers
+	unsigned int irq_id) // \arg interrupt number
+{
+	pAic->AIC_ISCR = (0x1 << irq_id) ;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_AIC_IsActive
+//* \brief Test if an IT is active
+//*----------------------------------------------------------------------------
+__inline unsigned int  AT91F_AIC_IsActive (
+	AT91PS_AIC pAic,     // \arg pointer to the AIC registers
+	unsigned int irq_id) // \arg Interrupt Number
+{
+	return (pAic->AIC_ISR & (0x1 << irq_id));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_AIC_IsPending
+//* \brief Test if an IT is pending
+//*----------------------------------------------------------------------------
+__inline unsigned int  AT91F_AIC_IsPending (
+	AT91PS_AIC pAic,     // \arg pointer to the AIC registers
+	unsigned int irq_id) // \arg Interrupt Number
+{
+	return (pAic->AIC_IPR & (0x1 << irq_id));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_AIC_Open
+//* \brief Set exception vectors and AIC registers to default values
+//*----------------------------------------------------------------------------
+__inline void AT91F_AIC_Open(
+	AT91PS_AIC pAic,        // \arg pointer to the AIC registers
+	void (*IrqHandler) (),  // \arg Default IRQ vector exception
+	void (*FiqHandler) (),  // \arg Default FIQ vector exception
+	void (*DefaultHandler)  (), // \arg Default Handler set in ISR
+	void (*SpuriousHandler) (), // \arg Default Spurious Handler
+	unsigned int protectMode)   // \arg Debug Control Register
+{
+	int i;
+
+	// Disable all interrupts and set IVR to the default handler
+	for (i = 0; i < 32; ++i) {
+		AT91F_AIC_DisableIt(pAic, i);
+		AT91F_AIC_ConfigureIt(pAic, i, AT91C_AIC_PRIOR_LOWEST, AT91C_AIC_SRCTYPE_HIGH_LEVEL, DefaultHandler);
+	}
+
+	// Set the IRQ exception vector
+	AT91F_AIC_SetExceptionVector((unsigned int *) 0x18, IrqHandler);
+	// Set the Fast Interrupt exception vector
+	AT91F_AIC_SetExceptionVector((unsigned int *) 0x1C, FiqHandler);
+
+	pAic->AIC_SPU = (unsigned int) SpuriousHandler;
+	pAic->AIC_DCR = protectMode;
+}
+/* *****************************************************************************
+                SOFTWARE API FOR PDC
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_SetNextRx
+//* \brief Set the next receive transfer descriptor
+//*----------------------------------------------------------------------------
+__inline void AT91F_PDC_SetNextRx (
+	AT91PS_PDC pPDC,     // \arg pointer to a PDC controller
+	char *address,       // \arg address to the next bloc to be received
+	unsigned int bytes)  // \arg number of bytes to be received
+{
+	pPDC->PDC_RNPR = (unsigned int) address;
+	pPDC->PDC_RNCR = bytes;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_SetNextTx
+//* \brief Set the next transmit transfer descriptor
+//*----------------------------------------------------------------------------
+__inline void AT91F_PDC_SetNextTx (
+	AT91PS_PDC pPDC,       // \arg pointer to a PDC controller
+	char *address,         // \arg address to the next bloc to be transmitted
+	unsigned int bytes)    // \arg number of bytes to be transmitted
+{
+	pPDC->PDC_TNPR = (unsigned int) address;
+	pPDC->PDC_TNCR = bytes;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_SetRx
+//* \brief Set the receive transfer descriptor
+//*----------------------------------------------------------------------------
+__inline void AT91F_PDC_SetRx (
+	AT91PS_PDC pPDC,       // \arg pointer to a PDC controller
+	char *address,         // \arg address to the next bloc to be received
+	unsigned int bytes)    // \arg number of bytes to be received
+{
+	pPDC->PDC_RPR = (unsigned int) address;
+	pPDC->PDC_RCR = bytes;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_SetTx
+//* \brief Set the transmit transfer descriptor
+//*----------------------------------------------------------------------------
+__inline void AT91F_PDC_SetTx (
+	AT91PS_PDC pPDC,       // \arg pointer to a PDC controller
+	char *address,         // \arg address to the next bloc to be transmitted
+	unsigned int bytes)    // \arg number of bytes to be transmitted
+{
+	pPDC->PDC_TPR = (unsigned int) address;
+	pPDC->PDC_TCR = bytes;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_EnableTx
+//* \brief Enable transmit
+//*----------------------------------------------------------------------------
+__inline void AT91F_PDC_EnableTx (
+	AT91PS_PDC pPDC )       // \arg pointer to a PDC controller
+{
+	pPDC->PDC_PTCR = AT91C_PDC_TXTEN;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_EnableRx
+//* \brief Enable receive
+//*----------------------------------------------------------------------------
+__inline void AT91F_PDC_EnableRx (
+	AT91PS_PDC pPDC )       // \arg pointer to a PDC controller
+{
+	pPDC->PDC_PTCR = AT91C_PDC_RXTEN;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_DisableTx
+//* \brief Disable transmit
+//*----------------------------------------------------------------------------
+__inline void AT91F_PDC_DisableTx (
+	AT91PS_PDC pPDC )       // \arg pointer to a PDC controller
+{
+	pPDC->PDC_PTCR = AT91C_PDC_TXTDIS;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_DisableRx
+//* \brief Disable receive
+//*----------------------------------------------------------------------------
+__inline void AT91F_PDC_DisableRx (
+	AT91PS_PDC pPDC )       // \arg pointer to a PDC controller
+{
+	pPDC->PDC_PTCR = AT91C_PDC_RXTDIS;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_IsTxEmpty
+//* \brief Test if the current transfer descriptor has been sent
+//*----------------------------------------------------------------------------
+__inline int AT91F_PDC_IsTxEmpty ( // \return return 1 if transfer is complete
+	AT91PS_PDC pPDC )       // \arg pointer to a PDC controller
+{
+	return !(pPDC->PDC_TCR);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_IsNextTxEmpty
+//* \brief Test if the next transfer descriptor has been moved to the current td
+//*----------------------------------------------------------------------------
+__inline int AT91F_PDC_IsNextTxEmpty ( // \return return 1 if transfer is complete
+	AT91PS_PDC pPDC )       // \arg pointer to a PDC controller
+{
+	return !(pPDC->PDC_TNCR);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_IsRxEmpty
+//* \brief Test if the current transfer descriptor has been filled
+//*----------------------------------------------------------------------------
+__inline int AT91F_PDC_IsRxEmpty ( // \return return 1 if transfer is complete
+	AT91PS_PDC pPDC )       // \arg pointer to a PDC controller
+{
+	return !(pPDC->PDC_RCR);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_IsNextRxEmpty
+//* \brief Test if the next transfer descriptor has been moved to the current td
+//*----------------------------------------------------------------------------
+__inline int AT91F_PDC_IsNextRxEmpty ( // \return return 1 if transfer is complete
+	AT91PS_PDC pPDC )       // \arg pointer to a PDC controller
+{
+	return !(pPDC->PDC_RNCR);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_Open
+//* \brief Open PDC: disable TX and RX reset transfer descriptors, re-enable RX and TX
+//*----------------------------------------------------------------------------
+__inline void AT91F_PDC_Open (
+	AT91PS_PDC pPDC)       // \arg pointer to a PDC controller
+{
+    //* Disable the RX and TX PDC transfer requests
+	AT91F_PDC_DisableRx(pPDC);
+	AT91F_PDC_DisableTx(pPDC);
+
+	//* Reset all Counter register Next buffer first
+	AT91F_PDC_SetNextTx(pPDC, (char *) 0, 0);
+	AT91F_PDC_SetNextRx(pPDC, (char *) 0, 0);
+	AT91F_PDC_SetTx(pPDC, (char *) 0, 0);
+	AT91F_PDC_SetRx(pPDC, (char *) 0, 0);
+
+    //* Enable the RX and TX PDC transfer requests
+	AT91F_PDC_EnableRx(pPDC);
+	AT91F_PDC_EnableTx(pPDC);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_Close
+//* \brief Close PDC: disable TX and RX reset transfer descriptors
+//*----------------------------------------------------------------------------
+__inline void AT91F_PDC_Close (
+	AT91PS_PDC pPDC)       // \arg pointer to a PDC controller
+{
+    //* Disable the RX and TX PDC transfer requests
+	AT91F_PDC_DisableRx(pPDC);
+	AT91F_PDC_DisableTx(pPDC);
+
+	//* Reset all Counter register Next buffer first
+	AT91F_PDC_SetNextTx(pPDC, (char *) 0, 0);
+	AT91F_PDC_SetNextRx(pPDC, (char *) 0, 0);
+	AT91F_PDC_SetTx(pPDC, (char *) 0, 0);
+	AT91F_PDC_SetRx(pPDC, (char *) 0, 0);
+
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_SendFrame
+//* \brief Close PDC: disable TX and RX reset transfer descriptors
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PDC_SendFrame(
+	AT91PS_PDC pPDC,
+	char *pBuffer,
+	unsigned int szBuffer,
+	char *pNextBuffer,
+	unsigned int szNextBuffer )
+{
+	if (AT91F_PDC_IsTxEmpty(pPDC)) {
+		//* Buffer and next buffer can be initialized
+		AT91F_PDC_SetTx(pPDC, pBuffer, szBuffer);
+		AT91F_PDC_SetNextTx(pPDC, pNextBuffer, szNextBuffer);
+		return 2;
+	}
+	else if (AT91F_PDC_IsNextTxEmpty(pPDC)) {
+		//* Only one buffer can be initialized
+		AT91F_PDC_SetNextTx(pPDC, pBuffer, szBuffer);
+		return 1;
+	}
+	else {
+		//* All buffer are in use...
+		return 0;
+	}
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_ReceiveFrame
+//* \brief Close PDC: disable TX and RX reset transfer descriptors
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PDC_ReceiveFrame (
+	AT91PS_PDC pPDC,
+	char *pBuffer,
+	unsigned int szBuffer,
+	char *pNextBuffer,
+	unsigned int szNextBuffer )
+{
+	if (AT91F_PDC_IsRxEmpty(pPDC)) {
+		//* Buffer and next buffer can be initialized
+		AT91F_PDC_SetRx(pPDC, pBuffer, szBuffer);
+		AT91F_PDC_SetNextRx(pPDC, pNextBuffer, szNextBuffer);
+		return 2;
+	}
+	else if (AT91F_PDC_IsNextRxEmpty(pPDC)) {
+		//* Only one buffer can be initialized
+		AT91F_PDC_SetNextRx(pPDC, pBuffer, szBuffer);
+		return 1;
+	}
+	else {
+		//* All buffer are in use...
+		return 0;
+	}
+}
+/* *****************************************************************************
+                SOFTWARE API FOR DBGU
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_DBGU_InterruptEnable
+//* \brief Enable DBGU Interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_DBGU_InterruptEnable(
+        AT91PS_DBGU pDbgu,   // \arg  pointer to a DBGU controller
+        unsigned int flag) // \arg  dbgu interrupt to be enabled
+{
+        pDbgu->DBGU_IER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_DBGU_InterruptDisable
+//* \brief Disable DBGU Interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_DBGU_InterruptDisable(
+        AT91PS_DBGU pDbgu,   // \arg  pointer to a DBGU controller
+        unsigned int flag) // \arg  dbgu interrupt to be disabled
+{
+        pDbgu->DBGU_IDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_DBGU_GetInterruptMaskStatus
+//* \brief Return DBGU Interrupt Mask Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_DBGU_GetInterruptMaskStatus( // \return DBGU Interrupt Mask Status
+        AT91PS_DBGU pDbgu) // \arg  pointer to a DBGU controller
+{
+        return pDbgu->DBGU_IMR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_DBGU_IsInterruptMasked
+//* \brief Test if DBGU Interrupt is Masked 
+//*----------------------------------------------------------------------------
+__inline int AT91F_DBGU_IsInterruptMasked(
+        AT91PS_DBGU pDbgu,   // \arg  pointer to a DBGU controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (AT91F_DBGU_GetInterruptMaskStatus(pDbgu) & flag);
+}
+
+/* *****************************************************************************
+                SOFTWARE API FOR PIO
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_CfgPeriph
+//* \brief Enable pins to be drived by peripheral
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_CfgPeriph(
+	AT91PS_PIO pPio,             // \arg pointer to a PIO controller
+	unsigned int periphAEnable,  // \arg PERIPH A to enable
+	unsigned int periphBEnable)  // \arg PERIPH B to enable
+
+{
+	pPio->PIO_ASR = periphAEnable;
+	pPio->PIO_BSR = periphBEnable;
+	pPio->PIO_PDR = (periphAEnable | periphBEnable); // Set in Periph mode
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_CfgOutput
+//* \brief Enable PIO in output mode
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_CfgOutput(
+	AT91PS_PIO pPio,             // \arg pointer to a PIO controller
+	unsigned int pioEnable)      // \arg PIO to be enabled
+{
+	pPio->PIO_PER = pioEnable; // Set in PIO mode
+	pPio->PIO_OER = pioEnable; // Configure in Output
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_CfgInput
+//* \brief Enable PIO in input mode
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_CfgInput(
+	AT91PS_PIO pPio,             // \arg pointer to a PIO controller
+	unsigned int inputEnable)      // \arg PIO to be enabled
+{
+	// Disable output
+	pPio->PIO_ODR  = inputEnable;
+	pPio->PIO_PER  = inputEnable;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_CfgOpendrain
+//* \brief Configure PIO in open drain
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_CfgOpendrain(
+	AT91PS_PIO pPio,             // \arg pointer to a PIO controller
+	unsigned int multiDrvEnable) // \arg pio to be configured in open drain
+{
+	// Configure the multi-drive option
+	pPio->PIO_MDDR = ~multiDrvEnable;
+	pPio->PIO_MDER = multiDrvEnable;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_CfgPullup
+//* \brief Enable pullup on PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_CfgPullup(
+	AT91PS_PIO pPio,             // \arg pointer to a PIO controller
+	unsigned int pullupEnable)   // \arg enable pullup on PIO
+{
+		// Connect or not Pullup
+	pPio->PIO_PPUDR = ~pullupEnable;
+	pPio->PIO_PPUER = pullupEnable;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_CfgDirectDrive
+//* \brief Enable direct drive on PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_CfgDirectDrive(
+	AT91PS_PIO pPio,             // \arg pointer to a PIO controller
+	unsigned int directDrive)    // \arg PIO to be configured with direct drive
+
+{
+	// Configure the Direct Drive
+	pPio->PIO_OWDR  = ~directDrive;
+	pPio->PIO_OWER  = directDrive;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_CfgInputFilter
+//* \brief Enable input filter on input PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_CfgInputFilter(
+	AT91PS_PIO pPio,             // \arg pointer to a PIO controller
+	unsigned int inputFilter)    // \arg PIO to be configured with input filter
+
+{
+	// Configure the Direct Drive
+	pPio->PIO_IFDR  = ~inputFilter;
+	pPio->PIO_IFER  = inputFilter;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_GetInput
+//* \brief Return PIO input value
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PIO_GetInput( // \return PIO input
+	AT91PS_PIO pPio) // \arg  pointer to a PIO controller
+{
+	return pPio->PIO_PDSR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_IsInputSet
+//* \brief Test if PIO is input flag is active
+//*----------------------------------------------------------------------------
+__inline int AT91F_PIO_IsInputSet(
+	AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+	unsigned int flag) // \arg  flag to be tested
+{
+	return (AT91F_PIO_GetInput(pPio) & flag);
+}
+
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_SetOutput
+//* \brief Set to 1 output PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_SetOutput(
+	AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+	unsigned int flag) // \arg  output to be set
+{
+	pPio->PIO_SODR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_ClearOutput
+//* \brief Set to 0 output PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_ClearOutput(
+	AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+	unsigned int flag) // \arg  output to be cleared
+{
+	pPio->PIO_CODR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_ForceOutput
+//* \brief Force output when Direct drive option is enabled
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_ForceOutput(
+	AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+	unsigned int flag) // \arg  output to be forced
+{
+	pPio->PIO_ODSR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_Enable
+//* \brief Enable PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_Enable(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  pio to be enabled 
+{
+        pPio->PIO_PER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_Disable
+//* \brief Disable PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_Disable(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  pio to be disabled 
+{
+        pPio->PIO_PDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_GetStatus
+//* \brief Return PIO Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PIO_GetStatus( // \return PIO Status
+        AT91PS_PIO pPio) // \arg  pointer to a PIO controller
+{
+        return pPio->PIO_PSR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_IsSet
+//* \brief Test if PIO is Set
+//*----------------------------------------------------------------------------
+__inline int AT91F_PIO_IsSet(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (AT91F_PIO_GetStatus(pPio) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_OutputEnable
+//* \brief Output Enable PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_OutputEnable(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  pio output to be enabled
+{
+        pPio->PIO_OER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_OutputDisable
+//* \brief Output Enable PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_OutputDisable(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  pio output to be disabled
+{
+        pPio->PIO_ODR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_GetOutputStatus
+//* \brief Return PIO Output Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PIO_GetOutputStatus( // \return PIO Output Status
+        AT91PS_PIO pPio) // \arg  pointer to a PIO controller
+{
+        return pPio->PIO_OSR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_IsOuputSet
+//* \brief Test if PIO Output is Set
+//*----------------------------------------------------------------------------
+__inline int AT91F_PIO_IsOutputSet(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (AT91F_PIO_GetOutputStatus(pPio) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_InputFilterEnable
+//* \brief Input Filter Enable PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_InputFilterEnable(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  pio input filter to be enabled
+{
+        pPio->PIO_IFER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_InputFilterDisable
+//* \brief Input Filter Disable PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_InputFilterDisable(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  pio input filter to be disabled
+{
+        pPio->PIO_IFDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_GetInputFilterStatus
+//* \brief Return PIO Input Filter Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PIO_GetInputFilterStatus( // \return PIO Input Filter Status
+        AT91PS_PIO pPio) // \arg  pointer to a PIO controller
+{
+        return pPio->PIO_IFSR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_IsInputFilterSet
+//* \brief Test if PIO Input filter is Set
+//*----------------------------------------------------------------------------
+__inline int AT91F_PIO_IsInputFilterSet(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (AT91F_PIO_GetInputFilterStatus(pPio) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_GetOutputDataStatus
+//* \brief Return PIO Output Data Status 
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PIO_GetOutputDataStatus( // \return PIO Output Data Status 
+	AT91PS_PIO pPio) // \arg  pointer to a PIO controller
+{
+        return pPio->PIO_ODSR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_InterruptEnable
+//* \brief Enable PIO Interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_InterruptEnable(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  pio interrupt to be enabled
+{
+        pPio->PIO_IER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_InterruptDisable
+//* \brief Disable PIO Interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_InterruptDisable(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  pio interrupt to be disabled
+{
+        pPio->PIO_IDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_GetInterruptMaskStatus
+//* \brief Return PIO Interrupt Mask Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PIO_GetInterruptMaskStatus( // \return PIO Interrupt Mask Status
+        AT91PS_PIO pPio) // \arg  pointer to a PIO controller
+{
+        return pPio->PIO_IMR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_GetInterruptStatus
+//* \brief Return PIO Interrupt Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PIO_GetInterruptStatus( // \return PIO Interrupt Status
+        AT91PS_PIO pPio) // \arg  pointer to a PIO controller
+{
+        return pPio->PIO_ISR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_IsInterruptMasked
+//* \brief Test if PIO Interrupt is Masked 
+//*----------------------------------------------------------------------------
+__inline int AT91F_PIO_IsInterruptMasked(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (AT91F_PIO_GetInterruptMaskStatus(pPio) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_IsInterruptSet
+//* \brief Test if PIO Interrupt is Set
+//*----------------------------------------------------------------------------
+__inline int AT91F_PIO_IsInterruptSet(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (AT91F_PIO_GetInterruptStatus(pPio) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_MultiDriverEnable
+//* \brief Multi Driver Enable PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_MultiDriverEnable(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  pio to be enabled
+{
+        pPio->PIO_MDER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_MultiDriverDisable
+//* \brief Multi Driver Disable PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_MultiDriverDisable(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  pio to be disabled
+{
+        pPio->PIO_MDDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_GetMultiDriverStatus
+//* \brief Return PIO Multi Driver Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PIO_GetMultiDriverStatus( // \return PIO Multi Driver Status
+        AT91PS_PIO pPio) // \arg  pointer to a PIO controller
+{
+        return pPio->PIO_MDSR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_IsMultiDriverSet
+//* \brief Test if PIO MultiDriver is Set
+//*----------------------------------------------------------------------------
+__inline int AT91F_PIO_IsMultiDriverSet(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (AT91F_PIO_GetMultiDriverStatus(pPio) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_A_RegisterSelection
+//* \brief PIO A Register Selection 
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_A_RegisterSelection(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  pio A register selection
+{
+        pPio->PIO_ASR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_B_RegisterSelection
+//* \brief PIO B Register Selection 
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_B_RegisterSelection(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  pio B register selection 
+{
+        pPio->PIO_BSR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_Get_AB_RegisterStatus
+//* \brief Return PIO Interrupt Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PIO_Get_AB_RegisterStatus( // \return PIO AB Register Status
+        AT91PS_PIO pPio) // \arg  pointer to a PIO controller
+{
+        return pPio->PIO_ABSR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_IsAB_RegisterSet
+//* \brief Test if PIO AB Register is Set
+//*----------------------------------------------------------------------------
+__inline int AT91F_PIO_IsAB_RegisterSet(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (AT91F_PIO_Get_AB_RegisterStatus(pPio) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_OutputWriteEnable
+//* \brief Output Write Enable PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_OutputWriteEnable(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  pio output write to be enabled
+{
+        pPio->PIO_OWER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_OutputWriteDisable
+//* \brief Output Write Disable PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_OutputWriteDisable(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  pio output write to be disabled
+{
+        pPio->PIO_OWDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_GetOutputWriteStatus
+//* \brief Return PIO Output Write Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PIO_GetOutputWriteStatus( // \return PIO Output Write Status
+        AT91PS_PIO pPio) // \arg  pointer to a PIO controller
+{
+        return pPio->PIO_OWSR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_IsOutputWriteSet
+//* \brief Test if PIO OutputWrite is Set
+//*----------------------------------------------------------------------------
+__inline int AT91F_PIO_IsOutputWriteSet(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (AT91F_PIO_GetOutputWriteStatus(pPio) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_GetCfgPullup
+//* \brief Return PIO Configuration Pullup
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PIO_GetCfgPullup( // \return PIO Configuration Pullup 
+        AT91PS_PIO pPio) // \arg  pointer to a PIO controller
+{
+        return pPio->PIO_PPUSR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_IsOutputDataStatusSet
+//* \brief Test if PIO Output Data Status is Set 
+//*----------------------------------------------------------------------------
+__inline int AT91F_PIO_IsOutputDataStatusSet(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (AT91F_PIO_GetOutputDataStatus(pPio) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_IsCfgPullupStatusSet
+//* \brief Test if PIO Configuration Pullup Status is Set
+//*----------------------------------------------------------------------------
+__inline int AT91F_PIO_IsCfgPullupStatusSet(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (~AT91F_PIO_GetCfgPullup(pPio) & flag);
+}
+
+/* *****************************************************************************
+                SOFTWARE API FOR PMC
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_CfgSysClkEnableReg
+//* \brief Configure the System Clock Enable Register of the PMC controller
+//*----------------------------------------------------------------------------
+__inline void AT91F_PMC_CfgSysClkEnableReg (
+	AT91PS_PMC pPMC, // \arg pointer to PMC controller
+	unsigned int mode)
+{
+	//* Write to the SCER register
+	pPMC->PMC_SCER = mode;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_CfgSysClkDisableReg
+//* \brief Configure the System Clock Disable Register of the PMC controller
+//*----------------------------------------------------------------------------
+__inline void AT91F_PMC_CfgSysClkDisableReg (
+	AT91PS_PMC pPMC, // \arg pointer to PMC controller
+	unsigned int mode)
+{
+	//* Write to the SCDR register
+	pPMC->PMC_SCDR = mode;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_GetSysClkStatusReg
+//* \brief Return the System Clock Status Register of the PMC controller
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PMC_GetSysClkStatusReg (
+	AT91PS_PMC pPMC // pointer to a CAN controller
+	)
+{
+	return pPMC->PMC_SCSR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_EnablePeriphClock
+//* \brief Enable peripheral clock
+//*----------------------------------------------------------------------------
+__inline void AT91F_PMC_EnablePeriphClock (
+	AT91PS_PMC pPMC, // \arg pointer to PMC controller
+	unsigned int periphIds)  // \arg IDs of peripherals to enable
+{
+	pPMC->PMC_PCER = periphIds;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_DisablePeriphClock
+//* \brief Disable peripheral clock
+//*----------------------------------------------------------------------------
+__inline void AT91F_PMC_DisablePeriphClock (
+	AT91PS_PMC pPMC, // \arg pointer to PMC controller
+	unsigned int periphIds)  // \arg IDs of peripherals to enable
+{
+	pPMC->PMC_PCDR = periphIds;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_GetPeriphClock
+//* \brief Get peripheral clock status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PMC_GetPeriphClock (
+	AT91PS_PMC pPMC) // \arg pointer to PMC controller
+{
+	return pPMC->PMC_PCSR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CKGR_CfgMainOscillatorReg
+//* \brief Cfg the main oscillator
+//*----------------------------------------------------------------------------
+__inline void AT91F_CKGR_CfgMainOscillatorReg (
+	AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller
+	unsigned int mode)
+{
+	pCKGR->CKGR_MOR = mode;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CKGR_GetMainOscillatorReg
+//* \brief Cfg the main oscillator
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CKGR_GetMainOscillatorReg (
+	AT91PS_CKGR pCKGR) // \arg pointer to CKGR controller
+{
+	return pCKGR->CKGR_MOR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CKGR_EnableMainOscillator
+//* \brief Enable the main oscillator
+//*----------------------------------------------------------------------------
+__inline void AT91F_CKGR_EnableMainOscillator(
+	AT91PS_CKGR pCKGR) // \arg pointer to CKGR controller
+{
+	pCKGR->CKGR_MOR |= AT91C_CKGR_MOSCEN;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CKGR_DisableMainOscillator
+//* \brief Disable the main oscillator
+//*----------------------------------------------------------------------------
+__inline void AT91F_CKGR_DisableMainOscillator (
+	AT91PS_CKGR pCKGR) // \arg pointer to CKGR controller
+{
+	pCKGR->CKGR_MOR &= ~AT91C_CKGR_MOSCEN;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CKGR_CfgMainOscStartUpTime
+//* \brief Cfg MOR Register according to the main osc startup time
+//*----------------------------------------------------------------------------
+__inline void AT91F_CKGR_CfgMainOscStartUpTime (
+	AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller
+	unsigned int startup_time,  // \arg main osc startup time in microsecond (us)
+	unsigned int slowClock)  // \arg slowClock in Hz
+{
+	pCKGR->CKGR_MOR &= ~AT91C_CKGR_OSCOUNT;
+	pCKGR->CKGR_MOR |= ((slowClock * startup_time)/(8*1000000)) << 8;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CKGR_GetMainClockFreqReg
+//* \brief Cfg the main oscillator
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CKGR_GetMainClockFreqReg (
+	AT91PS_CKGR pCKGR) // \arg pointer to CKGR controller
+{
+	return pCKGR->CKGR_MCFR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CKGR_GetMainClock
+//* \brief Return Main clock in Hz
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CKGR_GetMainClock (
+	AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller
+	unsigned int slowClock)  // \arg slowClock in Hz
+{
+	return ((pCKGR->CKGR_MCFR  & AT91C_CKGR_MAINF) * slowClock) >> 4;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_CfgMCKReg
+//* \brief Cfg Master Clock Register
+//*----------------------------------------------------------------------------
+__inline void AT91F_PMC_CfgMCKReg (
+	AT91PS_PMC pPMC, // \arg pointer to PMC controller
+	unsigned int mode)
+{
+	pPMC->PMC_MCKR = mode;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_GetMCKReg
+//* \brief Return Master Clock Register
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PMC_GetMCKReg(
+	AT91PS_PMC pPMC) // \arg pointer to PMC controller
+{
+	return pPMC->PMC_MCKR;
+}
+
+//*------------------------------------------------------------------------------
+//* \fn    AT91F_PMC_GetMasterClock
+//* \brief Return master clock in Hz which correponds to processor clock for ARM7
+//*------------------------------------------------------------------------------
+__inline unsigned int AT91F_PMC_GetMasterClock (
+	AT91PS_PMC pPMC, // \arg pointer to PMC controller
+	AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller
+	unsigned int slowClock)  // \arg slowClock in Hz
+{
+	unsigned int reg = pPMC->PMC_MCKR;
+	unsigned int prescaler = (1 << ((reg & AT91C_PMC_PRES) >> 2));
+	unsigned int pllDivider, pllMultiplier;
+
+	switch (reg & AT91C_PMC_CSS) {
+		case AT91C_PMC_CSS_SLOW_CLK: // Slow clock selected
+			return slowClock / prescaler;
+		case AT91C_PMC_CSS_MAIN_CLK: // Main clock is selected
+			return AT91F_CKGR_GetMainClock(pCKGR, slowClock) / prescaler;
+		case AT91C_PMC_CSS_PLL_CLK: // PLLB clock is selected
+			reg = pCKGR->CKGR_PLLR;
+			pllDivider    = (reg  & AT91C_CKGR_DIV);
+			pllMultiplier = ((reg  & AT91C_CKGR_MUL) >> 16) + 1;
+			return AT91F_CKGR_GetMainClock(pCKGR, slowClock) / pllDivider * pllMultiplier / prescaler;
+	}
+	return 0;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_EnablePCK
+//* \brief Enable peripheral clock
+//*----------------------------------------------------------------------------
+__inline void AT91F_PMC_EnablePCK (
+	AT91PS_PMC pPMC, // \arg pointer to PMC controller
+	unsigned int pck,  // \arg Peripheral clock identifier 0 .. 7
+	unsigned int mode)
+{
+	pPMC->PMC_PCKR[pck] = mode;
+	pPMC->PMC_SCER = (1 << pck) << 8;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_DisablePCK
+//* \brief Enable peripheral clock
+//*----------------------------------------------------------------------------
+__inline void AT91F_PMC_DisablePCK (
+	AT91PS_PMC pPMC, // \arg pointer to PMC controller
+	unsigned int pck)  // \arg Peripheral clock identifier 0 .. 7
+{
+	pPMC->PMC_SCDR = (1 << pck) << 8;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_EnableIt
+//* \brief Enable PMC interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_PMC_EnableIt (
+	AT91PS_PMC pPMC,     // pointer to a PMC controller
+	unsigned int flag)   // IT to be enabled
+{
+	//* Write to the IER register
+	pPMC->PMC_IER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_DisableIt
+//* \brief Disable PMC interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_PMC_DisableIt (
+	AT91PS_PMC pPMC, // pointer to a PMC controller
+	unsigned int flag) // IT to be disabled
+{
+	//* Write to the IDR register
+	pPMC->PMC_IDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_GetStatus
+//* \brief Return PMC Interrupt Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PMC_GetStatus( // \return PMC Interrupt Status
+	AT91PS_PMC pPMC) // pointer to a PMC controller
+{
+	return pPMC->PMC_SR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_GetInterruptMaskStatus
+//* \brief Return PMC Interrupt Mask Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PMC_GetInterruptMaskStatus( // \return PMC Interrupt Mask Status
+	AT91PS_PMC pPMC) // pointer to a PMC controller
+{
+	return pPMC->PMC_IMR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_IsInterruptMasked
+//* \brief Test if PMC Interrupt is Masked
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PMC_IsInterruptMasked(
+        AT91PS_PMC pPMC,   // \arg  pointer to a PMC controller
+        unsigned int flag) // \arg  flag to be tested
+{
+	return (AT91F_PMC_GetInterruptMaskStatus(pPMC) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_IsStatusSet
+//* \brief Test if PMC Status is Set
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PMC_IsStatusSet(
+        AT91PS_PMC pPMC,   // \arg  pointer to a PMC controller
+        unsigned int flag) // \arg  flag to be tested
+{
+	return (AT91F_PMC_GetStatus(pPMC) & flag);
+}
+
+// ----------------------------------------------------------------------------
+//  \fn    AT91F_CKGR_CfgPLLReg
+//  \brief Cfg the PLL Register
+// ----------------------------------------------------------------------------
+__inline void AT91F_CKGR_CfgPLLReg (
+	AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller
+	unsigned int mode)
+{
+	pCKGR->CKGR_PLLR = mode;
+}
+
+// ----------------------------------------------------------------------------
+//  \fn    AT91F_CKGR_GetPLLReg
+//  \brief Get the PLL Register
+// ----------------------------------------------------------------------------
+__inline unsigned int AT91F_CKGR_GetPLLReg (
+	AT91PS_CKGR pCKGR) // \arg pointer to CKGR controller
+{
+	return pCKGR->CKGR_PLLR;
+}
+
+
+/* *****************************************************************************
+                SOFTWARE API FOR RSTC
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_RSTSoftReset
+//* \brief Start Software Reset
+//*----------------------------------------------------------------------------
+__inline void AT91F_RSTSoftReset(
+        AT91PS_RSTC pRSTC,
+        unsigned int reset)
+{
+	pRSTC->RSTC_RCR = (0xA5000000 | reset);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_RSTSetMode
+//* \brief Set Reset Mode
+//*----------------------------------------------------------------------------
+__inline void AT91F_RSTSetMode(
+        AT91PS_RSTC pRSTC,
+        unsigned int mode)
+{
+	pRSTC->RSTC_RMR = (0xA5000000 | mode);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_RSTGetMode
+//* \brief Get Reset Mode
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_RSTGetMode(
+        AT91PS_RSTC pRSTC)
+{
+	return (pRSTC->RSTC_RMR);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_RSTGetStatus
+//* \brief Get Reset Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_RSTGetStatus(
+        AT91PS_RSTC pRSTC)
+{
+	return (pRSTC->RSTC_RSR);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_RSTIsSoftRstActive
+//* \brief Return !=0 if software reset is still not completed
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_RSTIsSoftRstActive(
+        AT91PS_RSTC pRSTC)
+{
+	return ((pRSTC->RSTC_RSR) & AT91C_RSTC_SRCMP);
+}
+/* *****************************************************************************
+                SOFTWARE API FOR RTTC
+   ***************************************************************************** */
+//*--------------------------------------------------------------------------------------
+//* \fn     AT91F_SetRTT_TimeBase()
+//* \brief  Set the RTT prescaler according to the TimeBase in ms
+//*--------------------------------------------------------------------------------------
+__inline unsigned int AT91F_RTTSetTimeBase(
+        AT91PS_RTTC pRTTC, 
+        unsigned int ms)
+{
+	if (ms > 2000)
+		return 1;   // AT91C_TIME_OUT_OF_RANGE
+	pRTTC->RTTC_RTMR &= ~0xFFFF;	
+	pRTTC->RTTC_RTMR |= (((ms << 15) /1000) & 0xFFFF);	
+	return 0;
+}
+
+//*--------------------------------------------------------------------------------------
+//* \fn     AT91F_RTTSetPrescaler()
+//* \brief  Set the new prescaler value
+//*--------------------------------------------------------------------------------------
+__inline unsigned int AT91F_RTTSetPrescaler(
+        AT91PS_RTTC pRTTC, 
+        unsigned int rtpres)
+{
+	pRTTC->RTTC_RTMR &= ~0xFFFF;	
+	pRTTC->RTTC_RTMR |= (rtpres & 0xFFFF);	
+	return (pRTTC->RTTC_RTMR);
+}
+
+//*--------------------------------------------------------------------------------------
+//* \fn     AT91F_RTTRestart()
+//* \brief  Restart the RTT prescaler
+//*--------------------------------------------------------------------------------------
+__inline void AT91F_RTTRestart(
+        AT91PS_RTTC pRTTC)
+{
+	pRTTC->RTTC_RTMR |= AT91C_RTTC_RTTRST;	
+}
+
+
+//*--------------------------------------------------------------------------------------
+//* \fn     AT91F_RTT_SetAlarmINT()
+//* \brief  Enable RTT Alarm Interrupt
+//*--------------------------------------------------------------------------------------
+__inline void AT91F_RTTSetAlarmINT(
+        AT91PS_RTTC pRTTC)
+{
+	pRTTC->RTTC_RTMR |= AT91C_RTTC_ALMIEN;
+}
+
+//*--------------------------------------------------------------------------------------
+//* \fn     AT91F_RTT_ClearAlarmINT()
+//* \brief  Disable RTT Alarm Interrupt
+//*--------------------------------------------------------------------------------------
+__inline void AT91F_RTTClearAlarmINT(
+        AT91PS_RTTC pRTTC)
+{
+	pRTTC->RTTC_RTMR &= ~AT91C_RTTC_ALMIEN;
+}
+
+//*--------------------------------------------------------------------------------------
+//* \fn     AT91F_RTT_SetRttIncINT()
+//* \brief  Enable RTT INC Interrupt
+//*--------------------------------------------------------------------------------------
+__inline void AT91F_RTTSetRttIncINT(
+        AT91PS_RTTC pRTTC)
+{
+	pRTTC->RTTC_RTMR |= AT91C_RTTC_RTTINCIEN;
+}
+
+//*--------------------------------------------------------------------------------------
+//* \fn     AT91F_RTT_ClearRttIncINT()
+//* \brief  Disable RTT INC Interrupt
+//*--------------------------------------------------------------------------------------
+__inline void AT91F_RTTClearRttIncINT(
+        AT91PS_RTTC pRTTC)
+{
+	pRTTC->RTTC_RTMR &= ~AT91C_RTTC_RTTINCIEN;
+}
+
+//*--------------------------------------------------------------------------------------
+//* \fn     AT91F_RTT_SetAlarmValue()
+//* \brief  Set RTT Alarm Value
+//*--------------------------------------------------------------------------------------
+__inline void AT91F_RTTSetAlarmValue(
+        AT91PS_RTTC pRTTC, unsigned int alarm)
+{
+	pRTTC->RTTC_RTAR = alarm;
+}
+
+//*--------------------------------------------------------------------------------------
+//* \fn     AT91F_RTT_GetAlarmValue()
+//* \brief  Get RTT Alarm Value
+//*--------------------------------------------------------------------------------------
+__inline unsigned int AT91F_RTTGetAlarmValue(
+        AT91PS_RTTC pRTTC)
+{
+	return(pRTTC->RTTC_RTAR);
+}
+
+//*--------------------------------------------------------------------------------------
+//* \fn     AT91F_RTTGetStatus()
+//* \brief  Read the RTT status
+//*--------------------------------------------------------------------------------------
+__inline unsigned int AT91F_RTTGetStatus(
+        AT91PS_RTTC pRTTC)
+{
+	return(pRTTC->RTTC_RTSR);
+}
+
+//*--------------------------------------------------------------------------------------
+//* \fn     AT91F_RTT_ReadValue()
+//* \brief  Read the RTT value
+//*--------------------------------------------------------------------------------------
+__inline unsigned int AT91F_RTTReadValue(
+        AT91PS_RTTC pRTTC)
+{
+        register volatile unsigned int val1,val2;
+	do
+	{
+		val1 = pRTTC->RTTC_RTVR;
+		val2 = pRTTC->RTTC_RTVR;
+	}	
+	while(val1 != val2);
+	return(val1);
+}
+/* *****************************************************************************
+                SOFTWARE API FOR PITC
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PITInit
+//* \brief System timer init : period in µsecond, system clock freq in MHz
+//*----------------------------------------------------------------------------
+__inline void AT91F_PITInit(
+        AT91PS_PITC pPITC,
+        unsigned int period,
+        unsigned int pit_frequency)
+{
+	pPITC->PITC_PIMR = period? (period * pit_frequency + 8) >> 4 : 0; // +8 to avoid %10 and /10
+	pPITC->PITC_PIMR |= AT91C_PITC_PITEN;	 
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PITSetPIV
+//* \brief Set the PIT Periodic Interval Value 
+//*----------------------------------------------------------------------------
+__inline void AT91F_PITSetPIV(
+        AT91PS_PITC pPITC,
+        unsigned int piv)
+{
+	pPITC->PITC_PIMR = piv | (pPITC->PITC_PIMR & (AT91C_PITC_PITEN | AT91C_PITC_PITIEN));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PITEnableInt
+//* \brief Enable PIT periodic interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_PITEnableInt(
+        AT91PS_PITC pPITC)
+{
+	pPITC->PITC_PIMR |= AT91C_PITC_PITIEN;	 
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PITDisableInt
+//* \brief Disable PIT periodic interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_PITDisableInt(
+        AT91PS_PITC pPITC)
+{
+	pPITC->PITC_PIMR &= ~AT91C_PITC_PITIEN;	 
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PITGetMode
+//* \brief Read PIT mode register
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PITGetMode(
+        AT91PS_PITC pPITC)
+{
+	return(pPITC->PITC_PIMR);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PITGetStatus
+//* \brief Read PIT status register
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PITGetStatus(
+        AT91PS_PITC pPITC)
+{
+	return(pPITC->PITC_PISR);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PITGetPIIR
+//* \brief Read PIT CPIV and PICNT without ressetting the counters
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PITGetPIIR(
+        AT91PS_PITC pPITC)
+{
+	return(pPITC->PITC_PIIR);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PITGetPIVR
+//* \brief Read System timer CPIV and PICNT without ressetting the counters
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PITGetPIVR(
+        AT91PS_PITC pPITC)
+{
+	return(pPITC->PITC_PIVR);
+}
+/* *****************************************************************************
+                SOFTWARE API FOR WDTC
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_WDTSetMode
+//* \brief Set Watchdog Mode Register
+//*----------------------------------------------------------------------------
+__inline void AT91F_WDTSetMode(
+        AT91PS_WDTC pWDTC,
+        unsigned int Mode)
+{
+	pWDTC->WDTC_WDMR = Mode;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_WDTRestart
+//* \brief Restart Watchdog
+//*----------------------------------------------------------------------------
+__inline void AT91F_WDTRestart(
+        AT91PS_WDTC pWDTC)
+{
+	pWDTC->WDTC_WDCR = 0xA5000001;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_WDTSGettatus
+//* \brief Get Watchdog Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_WDTSGettatus(
+        AT91PS_WDTC pWDTC)
+{
+	return(pWDTC->WDTC_WDSR & 0x3);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_WDTGetPeriod
+//* \brief Translate ms into Watchdog Compatible value
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_WDTGetPeriod(unsigned int ms)
+{
+	if ((ms < 4) || (ms > 16000))
+		return 0;
+	return((ms << 8) / 1000);
+}
+/* *****************************************************************************
+                SOFTWARE API FOR VREG
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_VREG_Enable_LowPowerMode
+//* \brief Enable VREG Low Power Mode
+//*----------------------------------------------------------------------------
+__inline void AT91F_VREG_Enable_LowPowerMode(
+        AT91PS_VREG pVREG)
+{
+	pVREG->VREG_MR |= AT91C_VREG_PSTDBY;	 
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_VREG_Disable_LowPowerMode
+//* \brief Disable VREG Low Power Mode
+//*----------------------------------------------------------------------------
+__inline void AT91F_VREG_Disable_LowPowerMode(
+        AT91PS_VREG pVREG)
+{
+	pVREG->VREG_MR &= ~AT91C_VREG_PSTDBY;	 
+}/* *****************************************************************************
+                SOFTWARE API FOR MC
+   ***************************************************************************** */
+
+#define AT91C_MC_CORRECT_KEY  ((unsigned int) 0x5A << 24) // (MC) Correct Protect Key
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_MC_Remap
+//* \brief Make Remap
+//*----------------------------------------------------------------------------
+__inline void AT91F_MC_Remap (void)     //  
+{
+    AT91PS_MC pMC = (AT91PS_MC) AT91C_BASE_MC;
+    
+    pMC->MC_RCR = AT91C_MC_RCB;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_MC_EFC_CfgModeReg
+//* \brief Configure the EFC Mode Register of the MC controller
+//*----------------------------------------------------------------------------
+__inline void AT91F_MC_EFC_CfgModeReg (
+	AT91PS_MC pMC, // pointer to a MC controller
+	unsigned int mode)        // mode register 
+{
+	// Write to the FMR register
+	pMC->MC_FMR = mode;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_MC_EFC_GetModeReg
+//* \brief Return MC EFC Mode Regsiter
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_MC_EFC_GetModeReg(
+	AT91PS_MC pMC) // pointer to a MC controller
+{
+	return pMC->MC_FMR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_MC_EFC_ComputeFMCN
+//* \brief Return MC EFC Mode Regsiter
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_MC_EFC_ComputeFMCN(
+	int master_clock) // master clock in Hz
+{
+	return (master_clock/1000000 +2);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_MC_EFC_PerformCmd
+//* \brief Perform EFC Command
+//*----------------------------------------------------------------------------
+__inline void AT91F_MC_EFC_PerformCmd (
+	AT91PS_MC pMC, // pointer to a MC controller
+    unsigned int transfer_cmd)
+{
+	pMC->MC_FCR = transfer_cmd;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_MC_EFC_GetStatus
+//* \brief Return MC EFC Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_MC_EFC_GetStatus(
+	AT91PS_MC pMC) // pointer to a MC controller
+{
+	return pMC->MC_FSR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_MC_EFC_IsInterruptMasked
+//* \brief Test if EFC MC Interrupt is Masked 
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_MC_EFC_IsInterruptMasked(
+        AT91PS_MC pMC,   // \arg  pointer to a MC controller
+        unsigned int flag) // \arg  flag to be tested
+{
+	return (AT91F_MC_EFC_GetModeReg(pMC) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_MC_EFC_IsInterruptSet
+//* \brief Test if EFC MC Interrupt is Set
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_MC_EFC_IsInterruptSet(
+        AT91PS_MC pMC,   // \arg  pointer to a MC controller
+        unsigned int flag) // \arg  flag to be tested
+{
+	return (AT91F_MC_EFC_GetStatus(pMC) & flag);
+}
+
+/* *****************************************************************************
+                SOFTWARE API FOR SPI
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_CfgCs
+//* \brief Configure SPI chip select register
+//*----------------------------------------------------------------------------
+__inline void AT91F_SPI_CfgCs (
+	AT91PS_SPI pSPI,     // pointer to a SPI controller
+	int cs,     // SPI cs number (0 to 3)
+ 	int val)   //  chip select register
+{
+	//* Write to the CSR register
+	*(pSPI->SPI_CSR + cs) = val;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_EnableIt
+//* \brief Enable SPI interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_SPI_EnableIt (
+	AT91PS_SPI pSPI,     // pointer to a SPI controller
+	unsigned int flag)   // IT to be enabled
+{
+	//* Write to the IER register
+	pSPI->SPI_IER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_DisableIt
+//* \brief Disable SPI interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_SPI_DisableIt (
+	AT91PS_SPI pSPI, // pointer to a SPI controller
+	unsigned int flag) // IT to be disabled
+{
+	//* Write to the IDR register
+	pSPI->SPI_IDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_Reset
+//* \brief Reset the SPI controller
+//*----------------------------------------------------------------------------
+__inline void AT91F_SPI_Reset (
+	AT91PS_SPI pSPI // pointer to a SPI controller
+	)
+{
+	//* Write to the CR register
+	pSPI->SPI_CR = AT91C_SPI_SWRST;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_Enable
+//* \brief Enable the SPI controller
+//*----------------------------------------------------------------------------
+__inline void AT91F_SPI_Enable (
+	AT91PS_SPI pSPI // pointer to a SPI controller
+	)
+{
+	//* Write to the CR register
+	pSPI->SPI_CR = AT91C_SPI_SPIEN;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_Disable
+//* \brief Disable the SPI controller
+//*----------------------------------------------------------------------------
+__inline void AT91F_SPI_Disable (
+	AT91PS_SPI pSPI // pointer to a SPI controller
+	)
+{
+	//* Write to the CR register
+	pSPI->SPI_CR = AT91C_SPI_SPIDIS;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_CfgMode
+//* \brief Enable the SPI controller
+//*----------------------------------------------------------------------------
+__inline void AT91F_SPI_CfgMode (
+	AT91PS_SPI pSPI, // pointer to a SPI controller
+	int mode)        // mode register 
+{
+	//* Write to the MR register
+	pSPI->SPI_MR = mode;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_CfgPCS
+//* \brief Switch to the correct PCS of SPI Mode Register : Fixed Peripheral Selected
+//*----------------------------------------------------------------------------
+__inline void AT91F_SPI_CfgPCS (
+	AT91PS_SPI pSPI, // pointer to a SPI controller
+	char PCS_Device) // PCS of the Device
+{	
+ 	//* Write to the MR register
+	pSPI->SPI_MR &= 0xFFF0FFFF;
+	pSPI->SPI_MR |= ( (PCS_Device<<16) & AT91C_SPI_PCS );
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_ReceiveFrame
+//* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is busy
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_SPI_ReceiveFrame (
+	AT91PS_SPI pSPI,
+	char *pBuffer,
+	unsigned int szBuffer,
+	char *pNextBuffer,
+	unsigned int szNextBuffer )
+{
+	return AT91F_PDC_ReceiveFrame(
+		(AT91PS_PDC) &(pSPI->SPI_RPR),
+		pBuffer,
+		szBuffer,
+		pNextBuffer,
+		szNextBuffer);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_SendFrame
+//* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is bSPIy
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_SPI_SendFrame(
+	AT91PS_SPI pSPI,
+	char *pBuffer,
+	unsigned int szBuffer,
+	char *pNextBuffer,
+	unsigned int szNextBuffer )
+{
+	return AT91F_PDC_SendFrame(
+		(AT91PS_PDC) &(pSPI->SPI_RPR),
+		pBuffer,
+		szBuffer,
+		pNextBuffer,
+		szNextBuffer);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_Close
+//* \brief Close SPI: disable IT disable transfert, close PDC
+//*----------------------------------------------------------------------------
+__inline void AT91F_SPI_Close (
+	AT91PS_SPI pSPI)     // \arg pointer to a SPI controller
+{
+    //* Reset all the Chip Select register
+    pSPI->SPI_CSR[0] = 0 ;
+    pSPI->SPI_CSR[1] = 0 ;
+    pSPI->SPI_CSR[2] = 0 ;
+    pSPI->SPI_CSR[3] = 0 ;
+
+    //* Reset the SPI mode
+    pSPI->SPI_MR = 0  ;
+
+    //* Disable all interrupts
+    pSPI->SPI_IDR = 0xFFFFFFFF ;
+
+    //* Abort the Peripheral Data Transfers
+    AT91F_PDC_Close((AT91PS_PDC) &(pSPI->SPI_RPR));
+
+    //* Disable receiver and transmitter and stop any activity immediately
+    pSPI->SPI_CR = AT91C_SPI_SPIDIS;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_PutChar
+//* \brief Send a character,does not check if ready to send
+//*----------------------------------------------------------------------------
+__inline void AT91F_SPI_PutChar (
+	AT91PS_SPI pSPI,
+	unsigned int character,
+             unsigned int cs_number )
+{
+    unsigned int value_for_cs;
+    value_for_cs = (~(1 << cs_number)) & 0xF;  //Place a zero among a 4 ONEs number
+    pSPI->SPI_TDR = (character & 0xFFFF) | (value_for_cs << 16);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_GetChar
+//* \brief Receive a character,does not check if a character is available
+//*----------------------------------------------------------------------------
+__inline int AT91F_SPI_GetChar (
+	const AT91PS_SPI pSPI)
+{
+    return((pSPI->SPI_RDR) & 0xFFFF);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_GetInterruptMaskStatus
+//* \brief Return SPI Interrupt Mask Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_SPI_GetInterruptMaskStatus( // \return SPI Interrupt Mask Status
+        AT91PS_SPI pSpi) // \arg  pointer to a SPI controller
+{
+        return pSpi->SPI_IMR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_IsInterruptMasked
+//* \brief Test if SPI Interrupt is Masked 
+//*----------------------------------------------------------------------------
+__inline int AT91F_SPI_IsInterruptMasked(
+        AT91PS_SPI pSpi,   // \arg  pointer to a SPI controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (AT91F_SPI_GetInterruptMaskStatus(pSpi) & flag);
+}
+
+/* *****************************************************************************
+                SOFTWARE API FOR USART
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_Baudrate
+//* \brief Calculate the baudrate
+//* Standard Asynchronous Mode : 8 bits , 1 stop , no parity
+#define AT91C_US_ASYNC_MODE ( AT91C_US_USMODE_NORMAL + \
+                        AT91C_US_NBSTOP_1_BIT + \
+                        AT91C_US_PAR_NONE + \
+                        AT91C_US_CHRL_8_BITS + \
+                        AT91C_US_CLKS_CLOCK )
+
+//* Standard External Asynchronous Mode : 8 bits , 1 stop , no parity
+#define AT91C_US_ASYNC_SCK_MODE ( AT91C_US_USMODE_NORMAL + \
+                            AT91C_US_NBSTOP_1_BIT + \
+                            AT91C_US_PAR_NONE + \
+                            AT91C_US_CHRL_8_BITS + \
+                            AT91C_US_CLKS_EXT )
+
+//* Standard Synchronous Mode : 8 bits , 1 stop , no parity
+#define AT91C_US_SYNC_MODE ( AT91C_US_SYNC + \
+                       AT91C_US_USMODE_NORMAL + \
+                       AT91C_US_NBSTOP_1_BIT + \
+                       AT91C_US_PAR_NONE + \
+                       AT91C_US_CHRL_8_BITS + \
+                       AT91C_US_CLKS_CLOCK )
+
+//* SCK used Label
+#define AT91C_US_SCK_USED (AT91C_US_CKLO | AT91C_US_CLKS_EXT)
+
+//* Standard ISO T=0 Mode : 8 bits , 1 stop , parity
+#define AT91C_US_ISO_READER_MODE ( AT91C_US_USMODE_ISO7816_0 + \
+					   		 AT91C_US_CLKS_CLOCK +\
+                       		 AT91C_US_NBSTOP_1_BIT + \
+                       		 AT91C_US_PAR_EVEN + \
+                       		 AT91C_US_CHRL_8_BITS + \
+                       		 AT91C_US_CKLO +\
+                       		 AT91C_US_OVER)
+
+//* Standard IRDA mode
+#define AT91C_US_ASYNC_IRDA_MODE (  AT91C_US_USMODE_IRDA + \
+                            AT91C_US_NBSTOP_1_BIT + \
+                            AT91C_US_PAR_NONE + \
+                            AT91C_US_CHRL_8_BITS + \
+                            AT91C_US_CLKS_CLOCK )
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_Baudrate
+//* \brief Caluculate baud_value according to the main clock and the baud rate
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_US_Baudrate (
+	const unsigned int main_clock, // \arg peripheral clock
+	const unsigned int baud_rate)  // \arg UART baudrate
+{
+	unsigned int baud_value = ((main_clock*10)/(baud_rate * 16));
+	if ((baud_value % 10) >= 5)
+		baud_value = (baud_value / 10) + 1;
+	else
+		baud_value /= 10;
+	return baud_value;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_SetBaudrate
+//* \brief Set the baudrate according to the CPU clock
+//*----------------------------------------------------------------------------
+__inline void AT91F_US_SetBaudrate (
+	AT91PS_USART pUSART,    // \arg pointer to a USART controller
+	unsigned int mainClock, // \arg peripheral clock
+	unsigned int speed)     // \arg UART baudrate
+{
+	//* Define the baud rate divisor register
+	pUSART->US_BRGR = AT91F_US_Baudrate(mainClock, speed);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_SetTimeguard
+//* \brief Set USART timeguard
+//*----------------------------------------------------------------------------
+__inline void AT91F_US_SetTimeguard (
+	AT91PS_USART pUSART,    // \arg pointer to a USART controller
+	unsigned int timeguard) // \arg timeguard value
+{
+	//* Write the Timeguard Register
+	pUSART->US_TTGR = timeguard ;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_EnableIt
+//* \brief Enable USART IT
+//*----------------------------------------------------------------------------
+__inline void AT91F_US_EnableIt (
+	AT91PS_USART pUSART, // \arg pointer to a USART controller
+	unsigned int flag)   // \arg IT to be enabled
+{
+	//* Write to the IER register
+	pUSART->US_IER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_DisableIt
+//* \brief Disable USART IT
+//*----------------------------------------------------------------------------
+__inline void AT91F_US_DisableIt (
+	AT91PS_USART pUSART, // \arg pointer to a USART controller
+	unsigned int flag)   // \arg IT to be disabled
+{
+	//* Write to the IER register
+	pUSART->US_IDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_Configure
+//* \brief Configure USART
+//*----------------------------------------------------------------------------
+__inline void AT91F_US_Configure (
+	AT91PS_USART pUSART,     // \arg pointer to a USART controller
+	unsigned int mainClock,  // \arg peripheral clock
+	unsigned int mode ,      // \arg mode Register to be programmed
+	unsigned int baudRate ,  // \arg baudrate to be programmed
+	unsigned int timeguard ) // \arg timeguard to be programmed
+{
+    //* Disable interrupts
+    pUSART->US_IDR = (unsigned int) -1;
+
+    //* Reset receiver and transmitter
+    pUSART->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RXDIS | AT91C_US_TXDIS ;
+
+	//* Define the baud rate divisor register
+	AT91F_US_SetBaudrate(pUSART, mainClock, baudRate);
+
+	//* Write the Timeguard Register
+	AT91F_US_SetTimeguard(pUSART, timeguard);
+
+    //* Clear Transmit and Receive Counters
+    AT91F_PDC_Open((AT91PS_PDC) &(pUSART->US_RPR));
+
+    //* Define the USART mode
+    pUSART->US_MR = mode  ;
+
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_EnableRx
+//* \brief Enable receiving characters
+//*----------------------------------------------------------------------------
+__inline void AT91F_US_EnableRx (
+	AT91PS_USART pUSART)     // \arg pointer to a USART controller
+{
+    //* Enable receiver
+    pUSART->US_CR = AT91C_US_RXEN;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_EnableTx
+//* \brief Enable sending characters
+//*----------------------------------------------------------------------------
+__inline void AT91F_US_EnableTx (
+	AT91PS_USART pUSART)     // \arg pointer to a USART controller
+{
+    //* Enable  transmitter
+    pUSART->US_CR = AT91C_US_TXEN;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_ResetRx
+//* \brief Reset Receiver and re-enable it
+//*----------------------------------------------------------------------------
+__inline void AT91F_US_ResetRx (
+	AT91PS_USART pUSART)     // \arg pointer to a USART controller
+{
+	//* Reset receiver
+	pUSART->US_CR = AT91C_US_RSTRX;
+    //* Re-Enable receiver
+    pUSART->US_CR = AT91C_US_RXEN;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_ResetTx
+//* \brief Reset Transmitter and re-enable it
+//*----------------------------------------------------------------------------
+__inline void AT91F_US_ResetTx (
+	AT91PS_USART pUSART)     // \arg pointer to a USART controller
+{
+	//* Reset transmitter
+	pUSART->US_CR = AT91C_US_RSTTX;
+    //* Enable transmitter
+    pUSART->US_CR = AT91C_US_TXEN;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_DisableRx
+//* \brief Disable Receiver
+//*----------------------------------------------------------------------------
+__inline void AT91F_US_DisableRx (
+	AT91PS_USART pUSART)     // \arg pointer to a USART controller
+{
+    //* Disable receiver
+    pUSART->US_CR = AT91C_US_RXDIS;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_DisableTx
+//* \brief Disable Transmitter
+//*----------------------------------------------------------------------------
+__inline void AT91F_US_DisableTx (
+	AT91PS_USART pUSART)     // \arg pointer to a USART controller
+{
+    //* Disable transmitter
+    pUSART->US_CR = AT91C_US_TXDIS;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_Close
+//* \brief Close USART: disable IT disable receiver and transmitter, close PDC
+//*----------------------------------------------------------------------------
+__inline void AT91F_US_Close (
+	AT91PS_USART pUSART)     // \arg pointer to a USART controller
+{
+    //* Reset the baud rate divisor register
+    pUSART->US_BRGR = 0 ;
+
+    //* Reset the USART mode
+    pUSART->US_MR = 0  ;
+
+    //* Reset the Timeguard Register
+    pUSART->US_TTGR = 0;
+
+    //* Disable all interrupts
+    pUSART->US_IDR = 0xFFFFFFFF ;
+
+    //* Abort the Peripheral Data Transfers
+    AT91F_PDC_Close((AT91PS_PDC) &(pUSART->US_RPR));
+
+    //* Disable receiver and transmitter and stop any activity immediately
+    pUSART->US_CR = AT91C_US_TXDIS | AT91C_US_RXDIS | AT91C_US_RSTTX | AT91C_US_RSTRX ;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_TxReady
+//* \brief Return 1 if a character can be written in US_THR
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_US_TxReady (
+	AT91PS_USART pUSART )     // \arg pointer to a USART controller
+{
+    return (pUSART->US_CSR & AT91C_US_TXRDY);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_RxReady
+//* \brief Return 1 if a character can be read in US_RHR
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_US_RxReady (
+	AT91PS_USART pUSART )     // \arg pointer to a USART controller
+{
+    return (pUSART->US_CSR & AT91C_US_RXRDY);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_Error
+//* \brief Return the error flag
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_US_Error (
+	AT91PS_USART pUSART )     // \arg pointer to a USART controller
+{
+    return (pUSART->US_CSR &
+    	(AT91C_US_OVRE |  // Overrun error
+    	 AT91C_US_FRAME | // Framing error
+    	 AT91C_US_PARE));  // Parity error
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_PutChar
+//* \brief Send a character,does not check if ready to send
+//*----------------------------------------------------------------------------
+__inline void AT91F_US_PutChar (
+	AT91PS_USART pUSART,
+	int character )
+{
+    pUSART->US_THR = (character & 0x1FF);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_GetChar
+//* \brief Receive a character,does not check if a character is available
+//*----------------------------------------------------------------------------
+__inline int AT91F_US_GetChar (
+	const AT91PS_USART pUSART)
+{
+    return((pUSART->US_RHR) & 0x1FF);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_SendFrame
+//* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is busy
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_US_SendFrame(
+	AT91PS_USART pUSART,
+	char *pBuffer,
+	unsigned int szBuffer,
+	char *pNextBuffer,
+	unsigned int szNextBuffer )
+{
+	return AT91F_PDC_SendFrame(
+		(AT91PS_PDC) &(pUSART->US_RPR),
+		pBuffer,
+		szBuffer,
+		pNextBuffer,
+		szNextBuffer);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_ReceiveFrame
+//* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is busy
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_US_ReceiveFrame (
+	AT91PS_USART pUSART,
+	char *pBuffer,
+	unsigned int szBuffer,
+	char *pNextBuffer,
+	unsigned int szNextBuffer )
+{
+	return AT91F_PDC_ReceiveFrame(
+		(AT91PS_PDC) &(pUSART->US_RPR),
+		pBuffer,
+		szBuffer,
+		pNextBuffer,
+		szNextBuffer);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_SetIrdaFilter
+//* \brief Set the value of IrDa filter tregister
+//*----------------------------------------------------------------------------
+__inline void AT91F_US_SetIrdaFilter (
+	AT91PS_USART pUSART,
+	unsigned char value
+)
+{
+	pUSART->US_IF = value;
+}
+
+/* *****************************************************************************
+                SOFTWARE API FOR SSC
+   ***************************************************************************** */
+//* Define the standard I2S mode configuration
+
+//* Configuration to set in the SSC Transmit Clock Mode Register
+//* Parameters :  nb_bit_by_slot : 8, 16 or 32 bits
+//* 			  nb_slot_by_frame : number of channels
+#define AT91C_I2S_ASY_MASTER_TX_SETTING(nb_bit_by_slot, nb_slot_by_frame)( +\
+									   AT91C_SSC_CKS_DIV   +\
+                            		   AT91C_SSC_CKO_CONTINOUS      +\
+                            		   AT91C_SSC_CKG_NONE    +\
+                                       AT91C_SSC_START_FALL_RF +\
+                           			   AT91C_SSC_STTOUT  +\
+                            		   ((1<<16) & AT91C_SSC_STTDLY) +\
+                            		   ((((nb_bit_by_slot*nb_slot_by_frame)/2)-1) <<24))
+
+
+//* Configuration to set in the SSC Transmit Frame Mode Register
+//* Parameters : nb_bit_by_slot : 8, 16 or 32 bits
+//* 			 nb_slot_by_frame : number of channels
+#define AT91C_I2S_ASY_TX_FRAME_SETTING(nb_bit_by_slot, nb_slot_by_frame)( +\
+									(nb_bit_by_slot-1)  +\
+                            		AT91C_SSC_MSBF   +\
+                            		(((nb_slot_by_frame-1)<<8) & AT91C_SSC_DATNB)  +\
+                            		(((nb_bit_by_slot-1)<<16) & AT91C_SSC_FSLEN) +\
+                            		AT91C_SSC_FSOS_NEGATIVE)
+
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SSC_SetBaudrate
+//* \brief Set the baudrate according to the CPU clock
+//*----------------------------------------------------------------------------
+__inline void AT91F_SSC_SetBaudrate (
+        AT91PS_SSC pSSC,        // \arg pointer to a SSC controller
+        unsigned int mainClock, // \arg peripheral clock
+        unsigned int speed)     // \arg SSC baudrate
+{
+        unsigned int baud_value;
+        //* Define the baud rate divisor register
+        if (speed == 0)
+           baud_value = 0;
+        else
+        {
+           baud_value = (unsigned int) (mainClock * 10)/(2*speed);
+           if ((baud_value % 10) >= 5)
+                  baud_value = (baud_value / 10) + 1;
+           else
+                  baud_value /= 10;
+        }
+
+        pSSC->SSC_CMR = baud_value;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SSC_Configure
+//* \brief Configure SSC
+//*----------------------------------------------------------------------------
+__inline void AT91F_SSC_Configure (
+             AT91PS_SSC pSSC,          // \arg pointer to a SSC controller
+             unsigned int syst_clock,  // \arg System Clock Frequency
+             unsigned int baud_rate,   // \arg Expected Baud Rate Frequency
+             unsigned int clock_rx,    // \arg Receiver Clock Parameters
+             unsigned int mode_rx,     // \arg mode Register to be programmed
+             unsigned int clock_tx,    // \arg Transmitter Clock Parameters
+             unsigned int mode_tx)     // \arg mode Register to be programmed
+{
+    //* Disable interrupts
+	pSSC->SSC_IDR = (unsigned int) -1;
+
+    //* Reset receiver and transmitter
+	pSSC->SSC_CR = AT91C_SSC_SWRST | AT91C_SSC_RXDIS | AT91C_SSC_TXDIS ;
+
+    //* Define the Clock Mode Register
+	AT91F_SSC_SetBaudrate(pSSC, syst_clock, baud_rate);
+
+     //* Write the Receive Clock Mode Register
+	pSSC->SSC_RCMR =  clock_rx;
+
+     //* Write the Transmit Clock Mode Register
+	pSSC->SSC_TCMR =  clock_tx;
+
+     //* Write the Receive Frame Mode Register
+	pSSC->SSC_RFMR =  mode_rx;
+
+     //* Write the Transmit Frame Mode Register
+	pSSC->SSC_TFMR =  mode_tx;
+
+    //* Clear Transmit and Receive Counters
+	AT91F_PDC_Open((AT91PS_PDC) &(pSSC->SSC_RPR));
+
+
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SSC_EnableRx
+//* \brief Enable receiving datas
+//*----------------------------------------------------------------------------
+__inline void AT91F_SSC_EnableRx (
+	AT91PS_SSC pSSC)     // \arg pointer to a SSC controller
+{
+    //* Enable receiver
+    pSSC->SSC_CR = AT91C_SSC_RXEN;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SSC_DisableRx
+//* \brief Disable receiving datas
+//*----------------------------------------------------------------------------
+__inline void AT91F_SSC_DisableRx (
+	AT91PS_SSC pSSC)     // \arg pointer to a SSC controller
+{
+    //* Disable receiver
+    pSSC->SSC_CR = AT91C_SSC_RXDIS;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SSC_EnableTx
+//* \brief Enable sending datas
+//*----------------------------------------------------------------------------
+__inline void AT91F_SSC_EnableTx (
+	AT91PS_SSC pSSC)     // \arg pointer to a SSC controller
+{
+    //* Enable  transmitter
+    pSSC->SSC_CR = AT91C_SSC_TXEN;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SSC_DisableTx
+//* \brief Disable sending datas
+//*----------------------------------------------------------------------------
+__inline void AT91F_SSC_DisableTx (
+	AT91PS_SSC pSSC)     // \arg pointer to a SSC controller
+{
+    //* Disable  transmitter
+    pSSC->SSC_CR = AT91C_SSC_TXDIS;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SSC_EnableIt
+//* \brief Enable SSC IT
+//*----------------------------------------------------------------------------
+__inline void AT91F_SSC_EnableIt (
+	AT91PS_SSC pSSC, // \arg pointer to a SSC controller
+	unsigned int flag)   // \arg IT to be enabled
+{
+	//* Write to the IER register
+	pSSC->SSC_IER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SSC_DisableIt
+//* \brief Disable SSC IT
+//*----------------------------------------------------------------------------
+__inline void AT91F_SSC_DisableIt (
+	AT91PS_SSC pSSC, // \arg pointer to a SSC controller
+	unsigned int flag)   // \arg IT to be disabled
+{
+	//* Write to the IDR register
+	pSSC->SSC_IDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SSC_ReceiveFrame
+//* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initialized with Next Buffer, 0 if PDC is busy
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_SSC_ReceiveFrame (
+	AT91PS_SSC pSSC,
+	char *pBuffer,
+	unsigned int szBuffer,
+	char *pNextBuffer,
+	unsigned int szNextBuffer )
+{
+	return AT91F_PDC_ReceiveFrame(
+		(AT91PS_PDC) &(pSSC->SSC_RPR),
+		pBuffer,
+		szBuffer,
+		pNextBuffer,
+		szNextBuffer);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SSC_SendFrame
+//* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initialized with Next Buffer, 0 if PDC is busy
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_SSC_SendFrame(
+	AT91PS_SSC pSSC,
+	char *pBuffer,
+	unsigned int szBuffer,
+	char *pNextBuffer,
+	unsigned int szNextBuffer )
+{
+	return AT91F_PDC_SendFrame(
+		(AT91PS_PDC) &(pSSC->SSC_RPR),
+		pBuffer,
+		szBuffer,
+		pNextBuffer,
+		szNextBuffer);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SSC_GetInterruptMaskStatus
+//* \brief Return SSC Interrupt Mask Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_SSC_GetInterruptMaskStatus( // \return SSC Interrupt Mask Status
+        AT91PS_SSC pSsc) // \arg  pointer to a SSC controller
+{
+        return pSsc->SSC_IMR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SSC_IsInterruptMasked
+//* \brief Test if SSC Interrupt is Masked 
+//*----------------------------------------------------------------------------
+__inline int AT91F_SSC_IsInterruptMasked(
+        AT91PS_SSC pSsc,   // \arg  pointer to a SSC controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (AT91F_SSC_GetInterruptMaskStatus(pSsc) & flag);
+}
+
+/* *****************************************************************************
+                SOFTWARE API FOR TWI
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TWI_EnableIt
+//* \brief Enable TWI IT
+//*----------------------------------------------------------------------------
+__inline void AT91F_TWI_EnableIt (
+	AT91PS_TWI pTWI, // \arg pointer to a TWI controller
+	unsigned int flag)   // \arg IT to be enabled
+{
+	//* Write to the IER register
+	pTWI->TWI_IER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TWI_DisableIt
+//* \brief Disable TWI IT
+//*----------------------------------------------------------------------------
+__inline void AT91F_TWI_DisableIt (
+	AT91PS_TWI pTWI, // \arg pointer to a TWI controller
+	unsigned int flag)   // \arg IT to be disabled
+{
+	//* Write to the IDR register
+	pTWI->TWI_IDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TWI_Configure
+//* \brief Configure TWI in master mode
+//*----------------------------------------------------------------------------
+__inline void AT91F_TWI_Configure ( AT91PS_TWI pTWI )          // \arg pointer to a TWI controller
+{
+    //* Disable interrupts
+	pTWI->TWI_IDR = (unsigned int) -1;
+
+    //* Reset peripheral
+	pTWI->TWI_CR = AT91C_TWI_SWRST;
+
+	//* Set Master mode
+	pTWI->TWI_CR = AT91C_TWI_MSEN;
+
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TWI_GetInterruptMaskStatus
+//* \brief Return TWI Interrupt Mask Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_TWI_GetInterruptMaskStatus( // \return TWI Interrupt Mask Status
+        AT91PS_TWI pTwi) // \arg  pointer to a TWI controller
+{
+        return pTwi->TWI_IMR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TWI_IsInterruptMasked
+//* \brief Test if TWI Interrupt is Masked 
+//*----------------------------------------------------------------------------
+__inline int AT91F_TWI_IsInterruptMasked(
+        AT91PS_TWI pTwi,   // \arg  pointer to a TWI controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (AT91F_TWI_GetInterruptMaskStatus(pTwi) & flag);
+}
+
+/* *****************************************************************************
+                SOFTWARE API FOR PWMC
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWM_GetStatus
+//* \brief Return PWM Interrupt Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PWMC_GetStatus( // \return PWM Interrupt Status
+	AT91PS_PWMC pPWM) // pointer to a PWM controller
+{
+	return pPWM->PWMC_SR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWM_InterruptEnable
+//* \brief Enable PWM Interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_PWMC_InterruptEnable(
+        AT91PS_PWMC pPwm,   // \arg  pointer to a PWM controller
+        unsigned int flag) // \arg  PWM interrupt to be enabled
+{
+        pPwm->PWMC_IER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWM_InterruptDisable
+//* \brief Disable PWM Interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_PWMC_InterruptDisable(
+        AT91PS_PWMC pPwm,   // \arg  pointer to a PWM controller
+        unsigned int flag) // \arg  PWM interrupt to be disabled
+{
+        pPwm->PWMC_IDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWM_GetInterruptMaskStatus
+//* \brief Return PWM Interrupt Mask Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PWMC_GetInterruptMaskStatus( // \return PWM Interrupt Mask Status
+        AT91PS_PWMC pPwm) // \arg  pointer to a PWM controller
+{
+        return pPwm->PWMC_IMR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWM_IsInterruptMasked
+//* \brief Test if PWM Interrupt is Masked
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PWMC_IsInterruptMasked(
+        AT91PS_PWMC pPWM,   // \arg  pointer to a PWM controller
+        unsigned int flag) // \arg  flag to be tested
+{
+	return (AT91F_PWMC_GetInterruptMaskStatus(pPWM) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWM_IsStatusSet
+//* \brief Test if PWM Interrupt is Set
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PWMC_IsStatusSet(
+        AT91PS_PWMC pPWM,   // \arg  pointer to a PWM controller
+        unsigned int flag) // \arg  flag to be tested
+{
+	return (AT91F_PWMC_GetStatus(pPWM) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWM_CfgChannel
+//* \brief Test if PWM Interrupt is Set
+//*----------------------------------------------------------------------------
+__inline void AT91F_PWMC_CfgChannel(
+        AT91PS_PWMC pPWM,   // \arg  pointer to a PWM controller
+        unsigned int channelId, // \arg PWM channel ID
+        unsigned int mode, // \arg  PWM mode
+        unsigned int period, // \arg PWM period
+        unsigned int duty) // \arg PWM duty cycle
+{
+	pPWM->PWMC_CH[channelId].PWMC_CMR = mode;
+	pPWM->PWMC_CH[channelId].PWMC_CDTYR = duty;
+	pPWM->PWMC_CH[channelId].PWMC_CPRDR = period;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWM_StartChannel
+//* \brief Enable channel
+//*----------------------------------------------------------------------------
+__inline void AT91F_PWMC_StartChannel(
+        AT91PS_PWMC pPWM,   // \arg  pointer to a PWM controller
+        unsigned int flag) // \arg  Channels IDs to be enabled
+{
+	pPWM->PWMC_ENA = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWM_StopChannel
+//* \brief Disable channel
+//*----------------------------------------------------------------------------
+__inline void AT91F_PWMC_StopChannel(
+        AT91PS_PWMC pPWM,   // \arg  pointer to a PWM controller
+        unsigned int flag) // \arg  Channels IDs to be enabled
+{
+	pPWM->PWMC_DIS = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWM_UpdateChannel
+//* \brief Update Period or Duty Cycle
+//*----------------------------------------------------------------------------
+__inline void AT91F_PWMC_UpdateChannel(
+        AT91PS_PWMC pPWM,   // \arg  pointer to a PWM controller
+        unsigned int channelId, // \arg PWM channel ID
+        unsigned int update) // \arg  Channels IDs to be enabled
+{
+	pPWM->PWMC_CH[channelId].PWMC_CUPDR = update;
+}
+
+/* *****************************************************************************
+                SOFTWARE API FOR UDP
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_EnableIt
+//* \brief Enable UDP IT
+//*----------------------------------------------------------------------------
+__inline void AT91F_UDP_EnableIt (
+	AT91PS_UDP pUDP,     // \arg pointer to a UDP controller
+	unsigned int flag)   // \arg IT to be enabled
+{
+	//* Write to the IER register
+	pUDP->UDP_IER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_DisableIt
+//* \brief Disable UDP IT
+//*----------------------------------------------------------------------------
+__inline void AT91F_UDP_DisableIt (
+	AT91PS_UDP pUDP,     // \arg pointer to a UDP controller
+	unsigned int flag)   // \arg IT to be disabled
+{
+	//* Write to the IDR register
+	pUDP->UDP_IDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_SetAddress
+//* \brief Set UDP functional address
+//*----------------------------------------------------------------------------
+__inline void AT91F_UDP_SetAddress (
+	AT91PS_UDP pUDP,     // \arg pointer to a UDP controller
+	unsigned char address)   // \arg new UDP address
+{
+	pUDP->UDP_FADDR = (AT91C_UDP_FEN | address);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_EnableEp
+//* \brief Enable Endpoint
+//*----------------------------------------------------------------------------
+__inline void AT91F_UDP_EnableEp (
+	AT91PS_UDP pUDP,     // \arg pointer to a UDP controller
+	unsigned char endpoint)   // \arg endpoint number
+{
+	pUDP->UDP_CSR[endpoint] |= AT91C_UDP_EPEDS;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_DisableEp
+//* \brief Enable Endpoint
+//*----------------------------------------------------------------------------
+__inline void AT91F_UDP_DisableEp (
+	AT91PS_UDP pUDP,     // \arg pointer to a UDP controller
+	unsigned char endpoint)   // \arg endpoint number
+{
+	pUDP->UDP_CSR[endpoint] &= ~AT91C_UDP_EPEDS;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_SetState
+//* \brief Set UDP Device state
+//*----------------------------------------------------------------------------
+__inline void AT91F_UDP_SetState (
+	AT91PS_UDP pUDP,     // \arg pointer to a UDP controller
+	unsigned int flag)   // \arg new UDP address
+{
+	pUDP->UDP_GLBSTATE  &= ~(AT91C_UDP_FADDEN | AT91C_UDP_CONFG);
+	pUDP->UDP_GLBSTATE  |= flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_GetState
+//* \brief return UDP Device state
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_UDP_GetState ( // \return the UDP device state
+	AT91PS_UDP pUDP)     // \arg pointer to a UDP controller
+{
+	return (pUDP->UDP_GLBSTATE  & (AT91C_UDP_FADDEN | AT91C_UDP_CONFG));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_ResetEp
+//* \brief Reset UDP endpoint
+//*----------------------------------------------------------------------------
+__inline void AT91F_UDP_ResetEp ( // \return the UDP device state
+	AT91PS_UDP pUDP,     // \arg pointer to a UDP controller
+	unsigned int flag)   // \arg Endpoints to be reset
+{
+	pUDP->UDP_RSTEP = flag;
+	pUDP->UDP_RSTEP = 0;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_EpStall
+//* \brief Endpoint will STALL requests
+//*----------------------------------------------------------------------------
+__inline void AT91F_UDP_EpStall(
+	AT91PS_UDP pUDP,     // \arg pointer to a UDP controller
+	unsigned char endpoint)   // \arg endpoint number
+{
+	pUDP->UDP_CSR[endpoint] |= AT91C_UDP_FORCESTALL;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_EpWrite
+//* \brief Write value in the DPR
+//*----------------------------------------------------------------------------
+__inline void AT91F_UDP_EpWrite(
+	AT91PS_UDP pUDP,         // \arg pointer to a UDP controller
+	unsigned char endpoint,  // \arg endpoint number
+	unsigned char value)     // \arg value to be written in the DPR
+{
+	pUDP->UDP_FDR[endpoint] = value;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_EpRead
+//* \brief Return value from the DPR
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_UDP_EpRead(
+	AT91PS_UDP pUDP,         // \arg pointer to a UDP controller
+	unsigned char endpoint)  // \arg endpoint number
+{
+	return pUDP->UDP_FDR[endpoint];
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_EpEndOfWr
+//* \brief Notify the UDP that values in DPR are ready to be sent
+//*----------------------------------------------------------------------------
+__inline void AT91F_UDP_EpEndOfWr(
+	AT91PS_UDP pUDP,         // \arg pointer to a UDP controller
+	unsigned char endpoint)  // \arg endpoint number
+{
+	pUDP->UDP_CSR[endpoint] |= AT91C_UDP_TXPKTRDY;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_EpClear
+//* \brief Clear flag in the endpoint CSR register
+//*----------------------------------------------------------------------------
+__inline void AT91F_UDP_EpClear(
+	AT91PS_UDP pUDP,         // \arg pointer to a UDP controller
+	unsigned char endpoint,  // \arg endpoint number
+	unsigned int flag)       // \arg flag to be cleared
+{
+	pUDP->UDP_CSR[endpoint] &= ~(flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_EpSet
+//* \brief Set flag in the endpoint CSR register
+//*----------------------------------------------------------------------------
+__inline void AT91F_UDP_EpSet(
+	AT91PS_UDP pUDP,         // \arg pointer to a UDP controller
+	unsigned char endpoint,  // \arg endpoint number
+	unsigned int flag)       // \arg flag to be cleared
+{
+	pUDP->UDP_CSR[endpoint] |= flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_EpStatus
+//* \brief Return the endpoint CSR register
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_UDP_EpStatus(
+	AT91PS_UDP pUDP,         // \arg pointer to a UDP controller
+	unsigned char endpoint)  // \arg endpoint number
+{
+	return pUDP->UDP_CSR[endpoint];
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_GetInterruptMaskStatus
+//* \brief Return UDP Interrupt Mask Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_UDP_GetInterruptMaskStatus(
+  AT91PS_UDP pUdp)        // \arg  pointer to a UDP controller
+{
+  return pUdp->UDP_IMR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_IsInterruptMasked
+//* \brief Test if UDP Interrupt is Masked 
+//*----------------------------------------------------------------------------
+__inline int AT91F_UDP_IsInterruptMasked(
+  AT91PS_UDP pUdp,       // \arg  pointer to a UDP controller
+  unsigned int flag)     // \arg  flag to be tested
+{
+  return (AT91F_UDP_GetInterruptMaskStatus(pUdp) & flag);
+}
+
+// ----------------------------------------------------------------------------
+//  \fn    AT91F_UDP_InterruptStatusRegister
+//  \brief Return the Interrupt Status Register
+// ----------------------------------------------------------------------------
+__inline unsigned int AT91F_UDP_InterruptStatusRegister( 
+  AT91PS_UDP pUDP )      // \arg  pointer to a UDP controller
+{
+  return pUDP->UDP_ISR;
+}
+
+// ----------------------------------------------------------------------------
+//  \fn    AT91F_UDP_InterruptClearRegister
+//  \brief Clear Interrupt Register
+// ----------------------------------------------------------------------------
+__inline void AT91F_UDP_InterruptClearRegister (
+  AT91PS_UDP pUDP,       // \arg pointer to UDP controller
+  unsigned int flag)     // \arg IT to be cleat
+{
+  pUDP->UDP_ICR = flag; 
+}
+
+// ----------------------------------------------------------------------------
+//  \fn    AT91F_UDP_EnableTransceiver
+//  \brief Enable transceiver
+// ----------------------------------------------------------------------------
+__inline void AT91F_UDP_EnableTransceiver( 
+  AT91PS_UDP pUDP )      // \arg  pointer to a UDP controller
+{
+    pUDP->UDP_TXVC &= ~AT91C_UDP_TXVDIS; 
+}
+
+// ----------------------------------------------------------------------------
+//  \fn    AT91F_UDP_DisableTransceiver
+//  \brief Disable transceiver
+// ----------------------------------------------------------------------------
+__inline void AT91F_UDP_DisableTransceiver( 
+  AT91PS_UDP pUDP )      // \arg  pointer to a UDP controller
+{
+    pUDP->UDP_TXVC = AT91C_UDP_TXVDIS; 
+}
+
+/* *****************************************************************************
+                SOFTWARE API FOR TC
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TC_InterruptEnable
+//* \brief Enable TC Interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_TC_InterruptEnable(
+        AT91PS_TC pTc,   // \arg  pointer to a TC controller
+        unsigned int flag) // \arg  TC interrupt to be enabled
+{
+        pTc->TC_IER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TC_InterruptDisable
+//* \brief Disable TC Interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_TC_InterruptDisable(
+        AT91PS_TC pTc,   // \arg  pointer to a TC controller
+        unsigned int flag) // \arg  TC interrupt to be disabled
+{
+        pTc->TC_IDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TC_GetInterruptMaskStatus
+//* \brief Return TC Interrupt Mask Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_TC_GetInterruptMaskStatus( // \return TC Interrupt Mask Status
+        AT91PS_TC pTc) // \arg  pointer to a TC controller
+{
+        return pTc->TC_IMR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TC_IsInterruptMasked
+//* \brief Test if TC Interrupt is Masked 
+//*----------------------------------------------------------------------------
+__inline int AT91F_TC_IsInterruptMasked(
+        AT91PS_TC pTc,   // \arg  pointer to a TC controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (AT91F_TC_GetInterruptMaskStatus(pTc) & flag);
+}
+
+/* *****************************************************************************
+                SOFTWARE API FOR CAN
+   ***************************************************************************** */
+#define	STANDARD_FORMAT 0
+#define	EXTENDED_FORMAT 1
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_InitMailboxRegisters()
+//* \brief Configure the corresponding mailbox
+//*----------------------------------------------------------------------------
+__inline void AT91F_InitMailboxRegisters(AT91PS_CAN_MB	CAN_Mailbox,
+								int  			mode_reg,
+								int 			acceptance_mask_reg,
+								int  			id_reg,
+								int  			data_low_reg,
+								int  			data_high_reg,
+								int  			control_reg)
+{
+	CAN_Mailbox->CAN_MB_MCR 	= 0x0;
+	CAN_Mailbox->CAN_MB_MMR 	= mode_reg;
+	CAN_Mailbox->CAN_MB_MAM 	= acceptance_mask_reg;
+	CAN_Mailbox->CAN_MB_MID 	= id_reg;
+	CAN_Mailbox->CAN_MB_MDL 	= data_low_reg; 		
+	CAN_Mailbox->CAN_MB_MDH 	= data_high_reg;
+	CAN_Mailbox->CAN_MB_MCR 	= control_reg;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_EnableCAN()
+//* \brief 
+//*----------------------------------------------------------------------------
+__inline void AT91F_EnableCAN(
+	AT91PS_CAN pCAN)     // pointer to a CAN controller
+{
+	pCAN->CAN_MR |= AT91C_CAN_CANEN;
+
+	// Wait for WAKEUP flag raising <=> 11-recessive-bit were scanned by the transceiver
+	while( (pCAN->CAN_SR & AT91C_CAN_WAKEUP) != AT91C_CAN_WAKEUP );
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_DisableCAN()
+//* \brief 
+//*----------------------------------------------------------------------------
+__inline void AT91F_DisableCAN(
+	AT91PS_CAN pCAN)     // pointer to a CAN controller
+{
+	pCAN->CAN_MR &= ~AT91C_CAN_CANEN;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_EnableIt
+//* \brief Enable CAN interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_CAN_EnableIt (
+	AT91PS_CAN pCAN,     // pointer to a CAN controller
+	unsigned int flag)   // IT to be enabled
+{
+	//* Write to the IER register
+	pCAN->CAN_IER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_DisableIt
+//* \brief Disable CAN interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_CAN_DisableIt (
+	AT91PS_CAN pCAN, // pointer to a CAN controller
+	unsigned int flag) // IT to be disabled
+{
+	//* Write to the IDR register
+	pCAN->CAN_IDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_GetStatus
+//* \brief Return CAN Interrupt Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_GetStatus( // \return CAN Interrupt Status
+	AT91PS_CAN pCAN) // pointer to a CAN controller
+{
+	return pCAN->CAN_SR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_GetInterruptMaskStatus
+//* \brief Return CAN Interrupt Mask Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_GetInterruptMaskStatus( // \return CAN Interrupt Mask Status
+	AT91PS_CAN pCAN) // pointer to a CAN controller
+{
+	return pCAN->CAN_IMR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_IsInterruptMasked
+//* \brief Test if CAN Interrupt is Masked 
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_IsInterruptMasked(
+        AT91PS_CAN pCAN,   // \arg  pointer to a CAN controller
+        unsigned int flag) // \arg  flag to be tested
+{
+	return (AT91F_CAN_GetInterruptMaskStatus(pCAN) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_IsStatusSet
+//* \brief Test if CAN Interrupt is Set
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_IsStatusSet(
+        AT91PS_CAN pCAN,   // \arg  pointer to a CAN controller
+        unsigned int flag) // \arg  flag to be tested
+{
+	return (AT91F_CAN_GetStatus(pCAN) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_CfgModeReg
+//* \brief Configure the Mode Register of the CAN controller
+//*----------------------------------------------------------------------------
+__inline void AT91F_CAN_CfgModeReg (
+	AT91PS_CAN pCAN, // pointer to a CAN controller
+	unsigned int mode)        // mode register 
+{
+	//* Write to the MR register
+	pCAN->CAN_MR = mode;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_GetModeReg
+//* \brief Return the Mode Register of the CAN controller value
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_GetModeReg (
+	AT91PS_CAN pCAN // pointer to a CAN controller
+	)
+{
+	return pCAN->CAN_MR;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_CfgBaudrateReg
+//* \brief Configure the Baudrate of the CAN controller for the network
+//*----------------------------------------------------------------------------
+__inline void AT91F_CAN_CfgBaudrateReg (
+	AT91PS_CAN pCAN, // pointer to a CAN controller
+	unsigned int baudrate_cfg)
+{
+	//* Write to the BR register
+	pCAN->CAN_BR = baudrate_cfg;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_GetBaudrate
+//* \brief Return the Baudrate of the CAN controller for the network value
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_GetBaudrate (
+	AT91PS_CAN pCAN // pointer to a CAN controller
+	)
+{
+	return pCAN->CAN_BR;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_GetInternalCounter
+//* \brief Return CAN Timer Regsiter Value
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_GetInternalCounter (
+	AT91PS_CAN pCAN // pointer to a CAN controller
+	)
+{
+	return pCAN->CAN_TIM;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_GetTimestamp
+//* \brief Return CAN Timestamp Register Value
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_GetTimestamp (
+	AT91PS_CAN pCAN // pointer to a CAN controller
+	)
+{
+	return pCAN->CAN_TIMESTP;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_GetErrorCounter
+//* \brief Return CAN Error Counter Register Value
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_GetErrorCounter (
+	AT91PS_CAN pCAN // pointer to a CAN controller
+	)
+{
+	return pCAN->CAN_ECR;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_InitTransferRequest
+//* \brief Request for a transfer on the corresponding mailboxes
+//*----------------------------------------------------------------------------
+__inline void AT91F_CAN_InitTransferRequest (
+	AT91PS_CAN pCAN, // pointer to a CAN controller
+    unsigned int transfer_cmd)
+{
+	pCAN->CAN_TCR = transfer_cmd;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_InitAbortRequest
+//* \brief Abort the corresponding mailboxes
+//*----------------------------------------------------------------------------
+__inline void AT91F_CAN_InitAbortRequest (
+	AT91PS_CAN pCAN, // pointer to a CAN controller
+    unsigned int abort_cmd)
+{
+	pCAN->CAN_ACR = abort_cmd;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_CfgMessageModeReg
+//* \brief Program the Message Mode Register
+//*----------------------------------------------------------------------------
+__inline void AT91F_CAN_CfgMessageModeReg (
+	AT91PS_CAN_MB	CAN_Mailbox, // pointer to a CAN Mailbox
+    unsigned int mode)
+{
+	CAN_Mailbox->CAN_MB_MMR = mode;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_GetMessageModeReg
+//* \brief Return the Message Mode Register
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_GetMessageModeReg (
+	AT91PS_CAN_MB	CAN_Mailbox) // pointer to a CAN Mailbox
+{
+	return CAN_Mailbox->CAN_MB_MMR;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_CfgMessageIDReg
+//* \brief Program the Message ID Register
+//* \brief Version == 0 for Standard messsage, Version == 1 for Extended  
+//*----------------------------------------------------------------------------
+__inline void AT91F_CAN_CfgMessageIDReg (
+	AT91PS_CAN_MB	CAN_Mailbox, // pointer to a CAN Mailbox
+    unsigned int id,
+    unsigned char version)
+{
+	if(version==0)	// IDvA Standard Format
+		CAN_Mailbox->CAN_MB_MID = id<<18;
+	else	// IDvB Extended Format
+		CAN_Mailbox->CAN_MB_MID = id | (1<<29);	// set MIDE bit
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_GetMessageIDReg
+//* \brief Return the Message ID Register
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_GetMessageIDReg (
+	AT91PS_CAN_MB	CAN_Mailbox) // pointer to a CAN Mailbox
+{
+	return CAN_Mailbox->CAN_MB_MID;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_CfgMessageAcceptanceMaskReg
+//* \brief Program the Message Acceptance Mask Register
+//*----------------------------------------------------------------------------
+__inline void AT91F_CAN_CfgMessageAcceptanceMaskReg (
+	AT91PS_CAN_MB	CAN_Mailbox, // pointer to a CAN Mailbox
+    unsigned int mask)
+{
+	CAN_Mailbox->CAN_MB_MAM = mask;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_GetMessageAcceptanceMaskReg
+//* \brief Return the Message Acceptance Mask Register
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_GetMessageAcceptanceMaskReg (
+	AT91PS_CAN_MB	CAN_Mailbox) // pointer to a CAN Mailbox
+{
+	return CAN_Mailbox->CAN_MB_MAM;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_GetFamilyID
+//* \brief Return the Message ID Register
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_GetFamilyID (
+	AT91PS_CAN_MB	CAN_Mailbox) // pointer to a CAN Mailbox
+{
+	return CAN_Mailbox->CAN_MB_MFID;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_CfgMessageCtrl
+//* \brief Request and config for a transfer on the corresponding mailbox
+//*----------------------------------------------------------------------------
+__inline void AT91F_CAN_CfgMessageCtrlReg (
+	AT91PS_CAN_MB	CAN_Mailbox, // pointer to a CAN Mailbox
+    unsigned int message_ctrl_cmd)
+{
+	CAN_Mailbox->CAN_MB_MCR = message_ctrl_cmd;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_GetMessageStatus
+//* \brief Return CAN Mailbox Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_GetMessageStatus (
+	AT91PS_CAN_MB	CAN_Mailbox) // pointer to a CAN Mailbox
+{
+	return CAN_Mailbox->CAN_MB_MSR;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_CfgMessageDataLow
+//* \brief Program data low value
+//*----------------------------------------------------------------------------
+__inline void AT91F_CAN_CfgMessageDataLow (
+	AT91PS_CAN_MB	CAN_Mailbox, // pointer to a CAN Mailbox
+    unsigned int data)
+{
+	CAN_Mailbox->CAN_MB_MDL = data;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_GetMessageDataLow
+//* \brief Return data low value
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_GetMessageDataLow (
+	AT91PS_CAN_MB	CAN_Mailbox) // pointer to a CAN Mailbox
+{
+	return CAN_Mailbox->CAN_MB_MDL;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_CfgMessageDataHigh
+//* \brief Program data high value
+//*----------------------------------------------------------------------------
+__inline void AT91F_CAN_CfgMessageDataHigh (
+	AT91PS_CAN_MB	CAN_Mailbox, // pointer to a CAN Mailbox
+    unsigned int data)
+{
+	CAN_Mailbox->CAN_MB_MDH = data;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_GetMessageDataHigh
+//* \brief Return data high value
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_GetMessageDataHigh (
+	AT91PS_CAN_MB	CAN_Mailbox) // pointer to a CAN Mailbox
+{
+	return CAN_Mailbox->CAN_MB_MDH;	
+}
+
+/* *****************************************************************************
+                SOFTWARE API FOR ADC
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_EnableIt
+//* \brief Enable ADC interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_ADC_EnableIt (
+	AT91PS_ADC pADC,     // pointer to a ADC controller
+	unsigned int flag)   // IT to be enabled
+{
+	//* Write to the IER register
+	pADC->ADC_IER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_DisableIt
+//* \brief Disable ADC interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_ADC_DisableIt (
+	AT91PS_ADC pADC, // pointer to a ADC controller
+	unsigned int flag) // IT to be disabled
+{
+	//* Write to the IDR register
+	pADC->ADC_IDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_GetStatus
+//* \brief Return ADC Interrupt Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_GetStatus( // \return ADC Interrupt Status
+	AT91PS_ADC pADC) // pointer to a ADC controller
+{
+	return pADC->ADC_SR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_GetInterruptMaskStatus
+//* \brief Return ADC Interrupt Mask Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_GetInterruptMaskStatus( // \return ADC Interrupt Mask Status
+	AT91PS_ADC pADC) // pointer to a ADC controller
+{
+	return pADC->ADC_IMR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_IsInterruptMasked
+//* \brief Test if ADC Interrupt is Masked 
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_IsInterruptMasked(
+        AT91PS_ADC pADC,   // \arg  pointer to a ADC controller
+        unsigned int flag) // \arg  flag to be tested
+{
+	return (AT91F_ADC_GetInterruptMaskStatus(pADC) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_IsStatusSet
+//* \brief Test if ADC Status is Set
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_IsStatusSet(
+        AT91PS_ADC pADC,   // \arg  pointer to a ADC controller
+        unsigned int flag) // \arg  flag to be tested
+{
+	return (AT91F_ADC_GetStatus(pADC) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_CfgModeReg
+//* \brief Configure the Mode Register of the ADC controller
+//*----------------------------------------------------------------------------
+__inline void AT91F_ADC_CfgModeReg (
+	AT91PS_ADC pADC, // pointer to a ADC controller
+	unsigned int mode)        // mode register 
+{
+	//* Write to the MR register
+	pADC->ADC_MR = mode;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_GetModeReg
+//* \brief Return the Mode Register of the ADC controller value
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_GetModeReg (
+	AT91PS_ADC pADC // pointer to a ADC controller
+	)
+{
+	return pADC->ADC_MR;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_CfgTimings
+//* \brief Configure the different necessary timings of the ADC controller
+//*----------------------------------------------------------------------------
+__inline void AT91F_ADC_CfgTimings (
+	AT91PS_ADC pADC, // pointer to a ADC controller
+	unsigned int mck_clock, // in MHz 
+	unsigned int adc_clock, // in MHz 
+	unsigned int startup_time, // in us 
+	unsigned int sample_and_hold_time)	// in ns  
+{
+	unsigned int prescal,startup,shtim;
+	
+	prescal = mck_clock/(2*adc_clock) - 1;
+	startup = adc_clock*startup_time/8 - 1;
+	shtim = adc_clock*sample_and_hold_time/1000 - 1;
+	
+	//* Write to the MR register
+	pADC->ADC_MR = ( (prescal<<8) & AT91C_ADC_PRESCAL) | ( (startup<<16) & AT91C_ADC_STARTUP) | ( (shtim<<24) & AT91C_ADC_SHTIM);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_EnableChannel
+//* \brief Return ADC Timer Register Value
+//*----------------------------------------------------------------------------
+__inline void AT91F_ADC_EnableChannel (
+	AT91PS_ADC pADC, // pointer to a ADC controller
+	unsigned int channel)        // mode register 
+{
+	//* Write to the CHER register
+	pADC->ADC_CHER = channel;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_DisableChannel
+//* \brief Return ADC Timer Register Value
+//*----------------------------------------------------------------------------
+__inline void AT91F_ADC_DisableChannel (
+	AT91PS_ADC pADC, // pointer to a ADC controller
+	unsigned int channel)        // mode register 
+{
+	//* Write to the CHDR register
+	pADC->ADC_CHDR = channel;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_GetChannelStatus
+//* \brief Return ADC Timer Register Value
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_GetChannelStatus (
+	AT91PS_ADC pADC // pointer to a ADC controller
+	)
+{
+	return pADC->ADC_CHSR;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_StartConversion
+//* \brief Software request for a analog to digital conversion 
+//*----------------------------------------------------------------------------
+__inline void AT91F_ADC_StartConversion (
+	AT91PS_ADC pADC // pointer to a ADC controller
+	)
+{
+	pADC->ADC_CR = AT91C_ADC_START;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_SoftReset
+//* \brief Software reset
+//*----------------------------------------------------------------------------
+__inline void AT91F_ADC_SoftReset (
+	AT91PS_ADC pADC // pointer to a ADC controller
+	)
+{
+	pADC->ADC_CR = AT91C_ADC_SWRST;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_GetLastConvertedData
+//* \brief Return the Last Converted Data
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_GetLastConvertedData (
+	AT91PS_ADC pADC // pointer to a ADC controller
+	)
+{
+	return pADC->ADC_LCDR;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_GetConvertedDataCH0
+//* \brief Return the Channel 0 Converted Data
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_GetConvertedDataCH0 (
+	AT91PS_ADC pADC // pointer to a ADC controller
+	)
+{
+	return pADC->ADC_CDR0;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_GetConvertedDataCH1
+//* \brief Return the Channel 1 Converted Data
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_GetConvertedDataCH1 (
+	AT91PS_ADC pADC // pointer to a ADC controller
+	)
+{
+	return pADC->ADC_CDR1;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_GetConvertedDataCH2
+//* \brief Return the Channel 2 Converted Data
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_GetConvertedDataCH2 (
+	AT91PS_ADC pADC // pointer to a ADC controller
+	)
+{
+	return pADC->ADC_CDR2;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_GetConvertedDataCH3
+//* \brief Return the Channel 3 Converted Data
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_GetConvertedDataCH3 (
+	AT91PS_ADC pADC // pointer to a ADC controller
+	)
+{
+	return pADC->ADC_CDR3;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_GetConvertedDataCH4
+//* \brief Return the Channel 4 Converted Data
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_GetConvertedDataCH4 (
+	AT91PS_ADC pADC // pointer to a ADC controller
+	)
+{
+	return pADC->ADC_CDR4;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_GetConvertedDataCH5
+//* \brief Return the Channel 5 Converted Data
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_GetConvertedDataCH5 (
+	AT91PS_ADC pADC // pointer to a ADC controller
+	)
+{
+	return pADC->ADC_CDR5;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_GetConvertedDataCH6
+//* \brief Return the Channel 6 Converted Data
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_GetConvertedDataCH6 (
+	AT91PS_ADC pADC // pointer to a ADC controller
+	)
+{
+	return pADC->ADC_CDR6;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_GetConvertedDataCH7
+//* \brief Return the Channel 7 Converted Data
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_GetConvertedDataCH7 (
+	AT91PS_ADC pADC // pointer to a ADC controller
+	)
+{
+	return pADC->ADC_CDR7;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_DBGU_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  DBGU
+//*----------------------------------------------------------------------------
+__inline void AT91F_DBGU_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_SYS));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_DBGU_CfgPIO
+//* \brief Configure PIO controllers to drive DBGU signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_DBGU_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOA, // PIO controller base address
+		((unsigned int) AT91C_PA27_DRXD    ) |
+		((unsigned int) AT91C_PA28_DTXD    ), // Peripheral A
+		0); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  PMC
+//*----------------------------------------------------------------------------
+__inline void AT91F_PMC_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_SYS));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_CfgPIO
+//* \brief Configure PIO controllers to drive PMC signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_PMC_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOB, // PIO controller base address
+		((unsigned int) AT91C_PB30_PCK2    ) |
+		((unsigned int) AT91C_PB29_PCK1    ), // Peripheral A
+		((unsigned int) AT91C_PB20_PCK0    ) |
+		((unsigned int) AT91C_PB0_PCK0    ) |
+		((unsigned int) AT91C_PB22_PCK2    ) |
+		((unsigned int) AT91C_PB21_PCK1    )); // Peripheral B
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOA, // PIO controller base address
+		0, // Peripheral A
+		((unsigned int) AT91C_PA30_PCK2    ) |
+		((unsigned int) AT91C_PA13_PCK1    ) |
+		((unsigned int) AT91C_PA27_PCK3    )); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_VREG_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  VREG
+//*----------------------------------------------------------------------------
+__inline void AT91F_VREG_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_SYS));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_RSTC_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  RSTC
+//*----------------------------------------------------------------------------
+__inline void AT91F_RSTC_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_SYS));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SSC_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  SSC
+//*----------------------------------------------------------------------------
+__inline void AT91F_SSC_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_SSC));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SSC_CfgPIO
+//* \brief Configure PIO controllers to drive SSC signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_SSC_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOA, // PIO controller base address
+		((unsigned int) AT91C_PA25_RK      ) |
+		((unsigned int) AT91C_PA22_TK      ) |
+		((unsigned int) AT91C_PA21_TF      ) |
+		((unsigned int) AT91C_PA24_RD      ) |
+		((unsigned int) AT91C_PA26_RF      ) |
+		((unsigned int) AT91C_PA23_TD      ), // Peripheral A
+		0); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_WDTC_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  WDTC
+//*----------------------------------------------------------------------------
+__inline void AT91F_WDTC_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_SYS));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US1_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  US1
+//*----------------------------------------------------------------------------
+__inline void AT91F_US1_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_US1));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US1_CfgPIO
+//* \brief Configure PIO controllers to drive US1 signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_US1_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOB, // PIO controller base address
+		0, // Peripheral A
+		((unsigned int) AT91C_PB26_RI1     ) |
+		((unsigned int) AT91C_PB24_DSR1    ) |
+		((unsigned int) AT91C_PB23_DCD1    ) |
+		((unsigned int) AT91C_PB25_DTR1    )); // Peripheral B
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOA, // PIO controller base address
+		((unsigned int) AT91C_PA7_SCK1    ) |
+		((unsigned int) AT91C_PA8_RTS1    ) |
+		((unsigned int) AT91C_PA6_TXD1    ) |
+		((unsigned int) AT91C_PA5_RXD1    ) |
+		((unsigned int) AT91C_PA9_CTS1    ), // Peripheral A
+		0); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US0_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  US0
+//*----------------------------------------------------------------------------
+__inline void AT91F_US0_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_US0));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US0_CfgPIO
+//* \brief Configure PIO controllers to drive US0 signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_US0_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOA, // PIO controller base address
+		((unsigned int) AT91C_PA0_RXD0    ) |
+		((unsigned int) AT91C_PA4_CTS0    ) |
+		((unsigned int) AT91C_PA3_RTS0    ) |
+		((unsigned int) AT91C_PA2_SCK0    ) |
+		((unsigned int) AT91C_PA1_TXD0    ), // Peripheral A
+		0); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI1_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  SPI1
+//*----------------------------------------------------------------------------
+__inline void AT91F_SPI1_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_SPI1));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI1_CfgPIO
+//* \brief Configure PIO controllers to drive SPI1 signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_SPI1_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOB, // PIO controller base address
+		0, // Peripheral A
+		((unsigned int) AT91C_PB11_SPI1_NPCS2) |
+		((unsigned int) AT91C_PB10_SPI1_NPCS1) |
+		((unsigned int) AT91C_PB16_SPI1_NPCS3)); // Peripheral B
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOA, // PIO controller base address
+		0, // Peripheral A
+		((unsigned int) AT91C_PA22_SPI1_SPCK) |
+		((unsigned int) AT91C_PA3_SPI1_NPCS2) |
+		((unsigned int) AT91C_PA26_SPI1_NPCS2) |
+		((unsigned int) AT91C_PA25_SPI1_NPCS1) |
+		((unsigned int) AT91C_PA2_SPI1_NPCS1) |
+		((unsigned int) AT91C_PA24_SPI1_MISO) |
+		((unsigned int) AT91C_PA4_SPI1_NPCS3) |
+		((unsigned int) AT91C_PA29_SPI1_NPCS3) |
+		((unsigned int) AT91C_PA21_SPI1_NPCS0) |
+		((unsigned int) AT91C_PA23_SPI1_MOSI)); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI0_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  SPI0
+//*----------------------------------------------------------------------------
+__inline void AT91F_SPI0_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_SPI0));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI0_CfgPIO
+//* \brief Configure PIO controllers to drive SPI0 signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_SPI0_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOB, // PIO controller base address
+		0, // Peripheral A
+		((unsigned int) AT91C_PB13_SPI0_NPCS1) |
+		((unsigned int) AT91C_PB14_SPI0_NPCS2) |
+		((unsigned int) AT91C_PB17_SPI0_NPCS3)); // Peripheral B
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOA, // PIO controller base address
+		((unsigned int) AT91C_PA16_SPI0_MISO) |
+		((unsigned int) AT91C_PA13_SPI0_NPCS1) |
+		((unsigned int) AT91C_PA14_SPI0_NPCS2) |
+		((unsigned int) AT91C_PA12_SPI0_NPCS0) |
+		((unsigned int) AT91C_PA17_SPI0_MOSI) |
+		((unsigned int) AT91C_PA15_SPI0_NPCS3) |
+		((unsigned int) AT91C_PA18_SPI0_SPCK), // Peripheral A
+		((unsigned int) AT91C_PA7_SPI0_NPCS1) |
+		((unsigned int) AT91C_PA8_SPI0_NPCS2) |
+		((unsigned int) AT91C_PA9_SPI0_NPCS3)); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PITC_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  PITC
+//*----------------------------------------------------------------------------
+__inline void AT91F_PITC_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_SYS));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_AIC_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  AIC
+//*----------------------------------------------------------------------------
+__inline void AT91F_AIC_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_FIQ) |
+		((unsigned int) 1 << AT91C_ID_IRQ0) |
+		((unsigned int) 1 << AT91C_ID_IRQ1));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_AIC_CfgPIO
+//* \brief Configure PIO controllers to drive AIC signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_AIC_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOA, // PIO controller base address
+		((unsigned int) AT91C_PA30_IRQ0    ) |
+		((unsigned int) AT91C_PA29_FIQ     ), // Peripheral A
+		((unsigned int) AT91C_PA14_IRQ1    )); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TWI_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  TWI
+//*----------------------------------------------------------------------------
+__inline void AT91F_TWI_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_TWI));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TWI_CfgPIO
+//* \brief Configure PIO controllers to drive TWI signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_TWI_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOA, // PIO controller base address
+		((unsigned int) AT91C_PA11_TWCK    ) |
+		((unsigned int) AT91C_PA10_TWD     ), // Peripheral A
+		0); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  ADC
+//*----------------------------------------------------------------------------
+__inline void AT91F_ADC_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_ADC));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_CfgPIO
+//* \brief Configure PIO controllers to drive ADC signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_ADC_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOB, // PIO controller base address
+		0, // Peripheral A
+		((unsigned int) AT91C_PB18_ADTRG   )); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWMC_CH3_CfgPIO
+//* \brief Configure PIO controllers to drive PWMC_CH3 signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_PWMC_CH3_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOB, // PIO controller base address
+		((unsigned int) AT91C_PB22_PWM3    ), // Peripheral A
+		((unsigned int) AT91C_PB30_PWM3    )); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWMC_CH2_CfgPIO
+//* \brief Configure PIO controllers to drive PWMC_CH2 signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_PWMC_CH2_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOB, // PIO controller base address
+		((unsigned int) AT91C_PB21_PWM2    ), // Peripheral A
+		((unsigned int) AT91C_PB29_PWM2    )); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWMC_CH1_CfgPIO
+//* \brief Configure PIO controllers to drive PWMC_CH1 signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_PWMC_CH1_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOB, // PIO controller base address
+		((unsigned int) AT91C_PB20_PWM1    ), // Peripheral A
+		((unsigned int) AT91C_PB28_PWM1    )); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWMC_CH0_CfgPIO
+//* \brief Configure PIO controllers to drive PWMC_CH0 signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_PWMC_CH0_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOB, // PIO controller base address
+		((unsigned int) AT91C_PB19_PWM0    ), // Peripheral A
+		((unsigned int) AT91C_PB27_PWM0    )); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_RTTC_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  RTTC
+//*----------------------------------------------------------------------------
+__inline void AT91F_RTTC_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_SYS));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  UDP
+//*----------------------------------------------------------------------------
+__inline void AT91F_UDP_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_UDP));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_EMAC_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  EMAC
+//*----------------------------------------------------------------------------
+__inline void AT91F_EMAC_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_EMAC));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_EMAC_CfgPIO
+//* \brief Configure PIO controllers to drive EMAC signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_EMAC_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOB, // PIO controller base address
+		((unsigned int) AT91C_PB2_ETX0    ) |
+		((unsigned int) AT91C_PB12_ETXER   ) |
+		((unsigned int) AT91C_PB16_ECOL    ) |
+		((unsigned int) AT91C_PB15_ERXDV_ECRSDV) |
+		((unsigned int) AT91C_PB11_ETX3    ) |
+		((unsigned int) AT91C_PB6_ERX1    ) |
+		((unsigned int) AT91C_PB13_ERX2    ) |
+		((unsigned int) AT91C_PB3_ETX1    ) |
+		((unsigned int) AT91C_PB4_ECRS    ) |
+		((unsigned int) AT91C_PB8_EMDC    ) |
+		((unsigned int) AT91C_PB5_ERX0    ) |
+		((unsigned int) AT91C_PB18_EF100   ) |
+		((unsigned int) AT91C_PB14_ERX3    ) |
+		((unsigned int) AT91C_PB1_ETXEN   ) |
+		((unsigned int) AT91C_PB10_ETX2    ) |
+		((unsigned int) AT91C_PB0_ETXCK_EREFCK) |
+		((unsigned int) AT91C_PB9_EMDIO   ) |
+		((unsigned int) AT91C_PB7_ERXER   ) |
+		((unsigned int) AT91C_PB17_ERXCK   ), // Peripheral A
+		0); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TC0_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  TC0
+//*----------------------------------------------------------------------------
+__inline void AT91F_TC0_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_TC0));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TC0_CfgPIO
+//* \brief Configure PIO controllers to drive TC0 signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_TC0_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOB, // PIO controller base address
+		((unsigned int) AT91C_PB23_TIOA0   ) |
+		((unsigned int) AT91C_PB24_TIOB0   ), // Peripheral A
+		((unsigned int) AT91C_PB12_TCLK0   )); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TC1_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  TC1
+//*----------------------------------------------------------------------------
+__inline void AT91F_TC1_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_TC1));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TC1_CfgPIO
+//* \brief Configure PIO controllers to drive TC1 signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_TC1_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOB, // PIO controller base address
+		((unsigned int) AT91C_PB25_TIOA1   ) |
+		((unsigned int) AT91C_PB26_TIOB1   ), // Peripheral A
+		((unsigned int) AT91C_PB19_TCLK1   )); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TC2_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  TC2
+//*----------------------------------------------------------------------------
+__inline void AT91F_TC2_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_TC2));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TC2_CfgPIO
+//* \brief Configure PIO controllers to drive TC2 signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_TC2_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOB, // PIO controller base address
+		((unsigned int) AT91C_PB28_TIOB2   ) |
+		((unsigned int) AT91C_PB27_TIOA2   ), // Peripheral A
+		0); // Peripheral B
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOA, // PIO controller base address
+		0, // Peripheral A
+		((unsigned int) AT91C_PA15_TCLK2   )); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_MC_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  MC
+//*----------------------------------------------------------------------------
+__inline void AT91F_MC_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_SYS));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIOA_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  PIOA
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIOA_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_PIOA));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIOB_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  PIOB
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIOB_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_PIOB));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  CAN
+//*----------------------------------------------------------------------------
+__inline void AT91F_CAN_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_CAN));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_CfgPIO
+//* \brief Configure PIO controllers to drive CAN signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_CAN_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOA, // PIO controller base address
+		((unsigned int) AT91C_PA20_CANTX   ) |
+		((unsigned int) AT91C_PA19_CANRX   ), // Peripheral A
+		0); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWMC_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  PWMC
+//*----------------------------------------------------------------------------
+__inline void AT91F_PWMC_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_PWMC));
+}
+
+#endif // lib_AT91SAM7X256_H
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/settings/cmock_demo.cspy.bat b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/settings/cmock_demo.cspy.bat
new file mode 100644
index 000000000..46433e0a5
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/settings/cmock_demo.cspy.bat
@@ -0,0 +1,32 @@
+@REM This bat file has been generated by the IAR Embeddded Workbench
+@REM C-SPY interactive debugger,as an aid to preparing a command
+@REM line for running the cspybat command line utility with the
+@REM appropriate settings.
+@REM
+@REM After making some adjustments to this file, you can launch cspybat
+@REM by typing the name of this file followed by the name of the debug
+@REM file (usually an ubrof file). Note that this file is generated
+@REM every time a new debug session is initialized, so you may want to
+@REM move or rename the file before making changes.
+@REM
+@REM Note: some command line arguments cannot be properly generated
+@REM by this process. Specifically, the plugin which is responsible
+@REM for the Terminal I/O window (and other C runtime functionality)
+@REM comes in a special version for cspybat, and the name of that
+@REM plugin dll is not known when generating this file. It resides in
+@REM the $TOOLKIT_DIR$\bin folder and is usually called XXXbat.dll or
+@REM XXXlibsupportbat.dll, where XXX is the name of the corresponding
+@REM tool chain. Replace the '<libsupport_plugin>' parameter
+@REM below with the appropriate file name. Other plugins loaded by
+@REM C-SPY are usually not needed by, or will not work in, cspybat
+@REM but they are listed at the end of this file for reference.
+
+
+"C:\Program Files\IAR Systems\Embedded Workbench 4.0\common\bin\cspybat" "C:\Program Files\IAR Systems\Embedded Workbench 4.0\ARM\bin\armproc.dll" "C:\Program Files\IAR Systems\Embedded Workbench 4.0\ARM\bin\armjlink.dll"  %1 --plugin "C:\Program Files\IAR Systems\Embedded Workbench 4.0\ARM\bin\<libsupport_plugin>" --macro "C:\svn\cmock\iar\iar_v4\Resource\SAM7_FLASH.mac" --backend -B "--endian" "little" "--cpu" "ARM7TDMI" "--fpu" "None" "--proc_device_desc_file" "C:\Program Files\IAR Systems\Embedded Workbench 4.0\ARM\CONFIG\ioAT91SAM7X256.ddf" "--drv_verify_download" "all" "--proc_driver" "jlink" "--jlink_connection" "USB:0" "--jlink_initial_speed" "32" 
+
+
+@REM loaded plugins:
+@REM    armlibsupport.dll
+@REM    C:\Program Files\IAR Systems\Embedded Workbench 4.0\common\plugins\CodeCoverage\CodeCoverage.dll
+@REM    C:\Program Files\IAR Systems\Embedded Workbench 4.0\common\plugins\Profiling\Profiling.dll
+@REM    C:\Program Files\IAR Systems\Embedded Workbench 4.0\common\plugins\stack\stack.dll
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/settings/cmock_demo.dbgdt b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/settings/cmock_demo.dbgdt
new file mode 100644
index 000000000..7243596cc
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/settings/cmock_demo.dbgdt
@@ -0,0 +1,86 @@
+<?xml version="1.0" encoding="iso-8859-1"?>

+

+<Project>

+  <Desktop>

+    <Static>

+      <Debug-Log/>

+      <Workspace>

+        <ColumnWidths>

+          

+          

+          

+          

+        <Column0>185</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>

+      </Workspace>

+      <Disassembly>

+        

+        

+        

+      <MixedMode>1</MixedMode><CodeCovEnabled>0</CodeCovEnabled><CodeCovShow>0</CodeCovShow></Disassembly>

+      <Build>

+        <ColumnWidth0>20</ColumnWidth0>

+        <ColumnWidth1>1115</ColumnWidth1>

+        <ColumnWidth2>297</ColumnWidth2>

+        <ColumnWidth3>74</ColumnWidth3>

+      </Build>

+    <TerminalIO><InputSource>1</InputSource><InputMode>10</InputMode><Filename>$PROJ_DIR$\TermIOInput.txt</Filename><InputEcho>1</InputEcho><ShowReset>0</ShowReset></TerminalIO></Static>

+    <Windows>

+      

+      

+      

+    <Wnd0>

+        <Tabs>

+          <Tab>

+            <Identity>TabID-23656-3537</Identity>

+            <TabName>Debug Log</TabName>

+            <Factory>Debug-Log</Factory>

+            <Session/>

+          </Tab>

+          <Tab>

+            <Identity>TabID-22088-3567</Identity>

+            <TabName>Build</TabName>

+            <Factory>Build</Factory>

+            <Session/>

+          </Tab>

+        <Tab><Identity>TabID-16970-5692</Identity><TabName>Terminal I/O</TabName><Factory>TerminalIO</Factory><Session/></Tab></Tabs>

+        

+      <SelectedTab>0</SelectedTab></Wnd0><Wnd1>

+        <Tabs>

+          <Tab>

+            <Identity>TabID-1637-3541</Identity>

+            <TabName>Workspace</TabName>

+            <Factory>Workspace</Factory>

+            <Session>

+              

+            <NodeDict><ExpandedNode>cmock_demo</ExpandedNode><ExpandedNode>cmock_demo/source</ExpandedNode></NodeDict></Session>

+          </Tab>

+        </Tabs>

+        

+      <SelectedTab>0</SelectedTab></Wnd1><Wnd2>

+        <Tabs>

+          <Tab>

+            <Identity>TabID-12385-3544</Identity>

+            <TabName>Disassembly</TabName>

+            <Factory>Disassembly</Factory>

+            <Session/>

+          </Tab>

+        </Tabs>

+        

+      <SelectedTab>0</SelectedTab></Wnd2></Windows>

+    <Editor>

+      

+      

+      

+      

+    <Pane><Tab><Factory>TextEditor</Factory><Filename>C:\svn\cmock\examples\src\Main.c</Filename><XPos>0</XPos><YPos>27</YPos><SelStart>806</SelStart><SelEnd>806</SelEnd></Tab><ActiveTab>0</ActiveTab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>

+    <Positions>

+      

+      

+      

+      

+      

+    <Top><Row0><Sizes><Toolbar-008fe8c8><key>iaridepm1</key></Toolbar-008fe8c8></Sizes></Row0><Row1><Sizes><Toolbar-02331890><key>debuggergui1</key></Toolbar-02331890></Sizes></Row1></Top><Left><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>509</Bottom><Right>276</Right><x>-2</x><y>-2</y><xscreen>179</xscreen><yscreen>148</yscreen><sizeHorzCX>129149</sizeHorzCX><sizeHorzCY>173302</sizeHorzCY><sizeVertCX>200577</sizeVertCX><sizeVertCY>598361</sizeVertCY></Rect></Wnd1></Sizes></Row0></Left><Right><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>509</Bottom><Right>177</Right><x>-2</x><y>-2</y><xscreen>179</xscreen><yscreen>148</yscreen><sizeHorzCX>129149</sizeHorzCX><sizeHorzCY>173302</sizeHorzCY><sizeVertCX>129149</sizeVertCX><sizeVertCY>598361</sizeVertCY></Rect></Wnd2></Sizes></Row0></Right><Bottom><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>277</Bottom><Right>1388</Right><x>-2</x><y>-2</y><xscreen>1390</xscreen><yscreen>279</yscreen><sizeHorzCX>1002886</sizeHorzCX><sizeHorzCY>326698</sizeHorzCY><sizeVertCX>129149</sizeVertCX><sizeVertCY>173302</sizeVertCY></Rect></Wnd0></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>

+  </Desktop>

+</Project>

+

+

diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/settings/cmock_demo.dni b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/settings/cmock_demo.dni
new file mode 100644
index 000000000..149ec3d7d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/settings/cmock_demo.dni
@@ -0,0 +1,42 @@
+[JLinkDriver]

+WatchCond=_ 0

+Watch0=_ 0 "" 0 "" 0 "" 0 "" 0 0 0 0

+Watch1=_ 0 "" 0 "" 0 "" 0 "" 0 0 0 0

+[DisAssemblyWindow]

+NumStates=_ 1

+State 1=_ 1

+[StackPlugin]

+Enabled=1

+OverflowWarningsEnabled=1

+WarningThreshold=90

+SpWarningsEnabled=1

+WarnHow=0

+UseTrigger=1

+TriggerName=main

+LimitSize=0

+ByteLimit=50

+[Log file]

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+LogFile=_ ""

+Category=_ 0

+[TermIOLog]

+LoggingEnabled=_ 0

+LogFile=_ ""

+[Interrupts]

+Enabled=1

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+Base=0

+UseAuto=0

+TypeViolation=1

+UnspecRange=1

+ActionState=1

+[Disassemble mode]

+mode=0

+[Breakpoints]

+Count=0

+[TraceHelper]

+Enabled=0

+ShowSource=1

diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/settings/cmock_demo.wsdt b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/settings/cmock_demo.wsdt
new file mode 100644
index 000000000..5b92806fe
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/settings/cmock_demo.wsdt
@@ -0,0 +1,76 @@
+<?xml version="1.0" encoding="iso-8859-1"?>

+

+<Workspace>

+  <ConfigDictionary>

+    

+  <CurrentConfigs><Project>cmock_demo/Debug</Project></CurrentConfigs></ConfigDictionary>

+  <Desktop>

+    <Static>

+      <Workspace>

+        <ColumnWidths>

+          

+          

+          

+          

+        <Column0>237</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>

+      </Workspace>

+      <Build>

+        

+        

+        

+        

+      <ColumnWidth0>20</ColumnWidth0><ColumnWidth1>1115</ColumnWidth1><ColumnWidth2>297</ColumnWidth2><ColumnWidth3>74</ColumnWidth3></Build>

+      <Debug-Log/>

+      <TerminalIO/>

+      <CodeCoveragePlugin/>

+      <Profiling/>

+    <Disassembly><MixedMode>1</MixedMode><CodeCovEnabled>0</CodeCovEnabled><CodeCovShow>0</CodeCovShow></Disassembly></Static>

+    <Windows>

+      

+      

+    <Wnd1>

+        <Tabs>

+          <Tab>

+            <Identity>TabID-20770-112</Identity>

+            <TabName>Workspace</TabName>

+            <Factory>Workspace</Factory>

+            <Session>

+              

+            <NodeDict><ExpandedNode>cmock_demo</ExpandedNode><ExpandedNode>cmock_demo/Source</ExpandedNode><ExpandedNode>cmock_demo/source</ExpandedNode></NodeDict></Session>

+          </Tab>

+        </Tabs>

+        

+      <SelectedTab>0</SelectedTab></Wnd1><Wnd3>

+        <Tabs>

+          <Tab>

+            <Identity>TabID-10733-1323</Identity>

+            <TabName>Build</TabName>

+            <Factory>Build</Factory>

+            <Session/>

+          </Tab>

+          <Tab>

+            <Identity>TabID-27316-3469</Identity>

+            <TabName>Debug Log</TabName>

+            <Factory>Debug-Log</Factory>

+            <Session/>

+          </Tab>

+        </Tabs>

+        

+      <SelectedTab>0</SelectedTab></Wnd3></Windows>

+    <Editor>

+      

+      

+      

+      

+    <Pane><Tab><Factory>TextEditor</Factory><Filename>C:\svn\cmock\examples\src\Main.c</Filename><XPos>0</XPos><YPos>0</YPos><SelStart>568</SelStart><SelEnd>568</SelEnd></Tab><ActiveTab>0</ActiveTab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>

+    <Positions>

+      

+      

+      

+      

+      

+    <Top><Row0><Sizes><Toolbar-008fe830><key>iaridepm1</key></Toolbar-008fe830></Sizes></Row0></Top><Left><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>554</Bottom><Right>328</Right><x>-2</x><y>-2</y><xscreen>179</xscreen><yscreen>148</yscreen><sizeHorzCX>129149</sizeHorzCX><sizeHorzCY>173302</sizeHorzCY><sizeVertCX>238095</sizeVertCX><sizeVertCY>651054</sizeVertCY></Rect></Wnd1></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd3><Rect><Top>-2</Top><Left>-2</Left><Bottom>256</Bottom><Right>1388</Right><x>-2</x><y>-2</y><xscreen>1390</xscreen><yscreen>258</yscreen><sizeHorzCX>1002886</sizeHorzCX><sizeHorzCY>302108</sizeHorzCY><sizeVertCX>129149</sizeVertCX><sizeVertCY>173302</sizeVertCY></Rect></Wnd3></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>

+  </Desktop>

+</Workspace>

+

+

diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/srcIAR/Cstartup.s79 b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/srcIAR/Cstartup.s79
new file mode 100644
index 000000000..73a53fca5
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/srcIAR/Cstartup.s79
@@ -0,0 +1,266 @@
+;-  ----------------------------------------------------------------------------
+;-          ATMEL Microcontroller Software Support  -  ROUSSET  -
+;-  ----------------------------------------------------------------------------
+;-  DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+;-  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+;-  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+;-  DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+;-  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;-  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+;-  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+;-  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+;-  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+;-  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;-  ----------------------------------------------------------------------------
+;- File source          : Cstartup.s79
+;- Object               : Generic CStartup
+;- 1.0 01/Sep/05 FBr    : Creation
+;- 1.1 09/Sep/05 JPP    : Change Interrupt management
+;------------------------------------------------------------------------------
+
+;------------------------------------------------------------------------------
+; Include your AT91 Library files
+;------------------------------------------------------------------------------
+#include "AT91SAM7X256_inc.h"
+;------------------------------------------------------------------------------
+
+;------------------------------------------------------------------------------
+; ?RESET
+; Reset Vector.
+; Normally, segment INTVEC is linked at address 0.
+; For debugging purposes, INTVEC may be placed at other addresses.
+; A debugger that honors the entry point will start the
+; program in a normal way even if INTVEC is not at address 0.
+;------------------------------------------------------------------------------
+
+    PROGRAM	?RESET              ;- Begins a program module
+    RSEG	INTRAMEND_REMAP     ;- Begins a relocatable segment
+    RSEG	ICODE:CODE (2)      ;- Begins a relocatable segment : corresponding address is 32-bit aligned
+    CODE32	                    ;- Always ARM mode after reset	
+    ORG	0	                    ;- Sets the location counter: corresponds to the RESET vector address
+
+;------------------------------------------------------------------------------
+;- Exception vectors
+;------------------------------------------------------------------------------
+;- These vectors can be read at address 0 or at RAM address
+;- They ABSOLUTELY requires to be in relative addresssing mode in order to
+;- guarantee a valid jump. For the moment, all are just looping.
+;- If an exception occurs before remap, this would result in an infinite loop.
+;- To ensure if a exeption occurs before start application to infinite loop.
+;------------------------------------------------------------------------------
+
+reset
+                B           InitReset           ; 0x00 Reset handler
+undefvec:
+                B           undefvec            ; 0x04 Undefined Instruction
+swivec:
+                B           swivec              ; 0x08 Software Interrupt
+pabtvec:
+                B           pabtvec             ; 0x0C Prefetch Abort
+dabtvec:
+                B           dabtvec             ; 0x10 Data Abort
+rsvdvec:
+                B           rsvdvec             ; 0x14 reserved
+irqvec:
+                B           IRQ_Handler_Entry   ; 0x18 IRQ
+              				
+fiqvec:               				; 0x1c FIQ
+;------------------------------------------------------------------------------
+;- Function             : FIQ_Handler_Entry
+;- Treatments           : FIQ Controller Interrupt Handler.
+;- Called Functions     : AIC_FVR[interrupt]
+;------------------------------------------------------------------------------
+
+FIQ_Handler_Entry:
+
+;- Switch in SVC/User Mode to allow User Stack access for C code
+; because the FIQ is not yet acknowledged
+
+;- Save and r0 in FIQ_Register
+            mov         r9,r0
+	    ldr         r0 , [r8, #AIC_FVR]
+            msr         CPSR_c,#I_BIT | F_BIT | ARM_MODE_SVC
+;- Save scratch/used registers and LR in User Stack
+            stmfd       sp!, { r1-r3, r12, lr}
+
+;- Branch to the routine pointed by the AIC_FVR
+            mov         r14, pc
+            bx          r0
+
+;- Restore scratch/used registers and LR from User Stack
+            ldmia       sp!, { r1-r3, r12, lr}
+
+;- Leave Interrupts disabled and switch back in FIQ mode
+            msr         CPSR_c, #I_BIT | F_BIT | ARM_MODE_FIQ
+
+;- Restore the R0 ARM_MODE_SVC register
+            mov         r0,r9
+
+;- Restore the Program Counter using the LR_fiq directly in the PC
+            subs        pc,lr,#4
+
+;------------------------------------------------------------------------------
+;- Manage exception: The exception must be ensure in ARM mode
+;------------------------------------------------------------------------------
+;------------------------------------------------------------------------------
+;- Function             : IRQ_Handler_Entry
+;- Treatments           : IRQ Controller Interrupt Handler.
+;- Called Functions     : AIC_IVR[interrupt]
+;------------------------------------------------------------------------------
+IRQ_Handler_Entry:
+
+;-------------------------
+;- Manage Exception Entry
+;-------------------------
+;- Adjust and save LR_irq in IRQ stack
+    sub         lr, lr, #4
+    stmfd       sp!, {lr}
+
+;- Save r0 and SPSR (need to be saved for nested interrupt)
+    mrs         r14, SPSR
+    stmfd       sp!, {r0,r14}
+
+;- Write in the IVR to support Protect Mode
+;- No effect in Normal Mode
+;- De-assert the NIRQ and clear the source in Protect Mode
+    ldr         r14, =AT91C_BASE_AIC
+    ldr         r0 , [r14, #AIC_IVR]
+    str         r14, [r14, #AIC_IVR]
+
+;- Enable Interrupt and Switch in Supervisor Mode
+    msr         CPSR_c, #ARM_MODE_SVC
+
+;- Save scratch/used registers and LR in User Stack
+    stmfd       sp!, { r1-r3, r12, r14}
+
+;----------------------------------------------
+;- Branch to the routine pointed by the AIC_IVR
+;----------------------------------------------
+    mov         r14, pc
+    bx          r0
+
+;----------------------------------------------
+;- Manage Exception Exit
+;----------------------------------------------
+;- Restore scratch/used registers and LR from User Stack
+    ldmia       sp!, { r1-r3, r12, r14}
+
+;- Disable Interrupt and switch back in IRQ mode
+    msr         CPSR_c, #I_BIT | ARM_MODE_IRQ
+
+;- Mark the End of Interrupt on the AIC
+    ldr         r14, =AT91C_BASE_AIC
+    str         r14, [r14, #AIC_EOICR]
+
+;- Restore SPSR_irq and r0 from IRQ stack
+    ldmia       sp!, {r0,r14}
+    msr         SPSR_cxsf, r14
+
+;- Restore adjusted  LR_irq from IRQ stack directly in the PC
+    ldmia       sp!, {pc}^
+
+
+
+InitReset:
+
+;------------------------------------------------------------------------------
+;- Low level Init is performed in a C function: AT91F_LowLevelInit
+;- Init Stack Pointer to a valid memory area before calling AT91F_LowLevelInit
+;------------------------------------------------------------------------------
+
+;- Retrieve end of RAM address
+__iramend EQU SFB(INTRAMEND_REMAP)      ;- Segment begin
+
+    EXTERN   AT91F_LowLevelInit
+    ldr     r13,=__iramend              ;- Temporary stack in internal RAM for Low Level Init execution
+    ldr	    r0,=AT91F_LowLevelInit
+    mov     lr, pc
+    bx	    r0                          ;- Branch on C function (with interworking)
+
+;------------------------------------------------------------------------------
+;- Top of Stack Definition
+;------------------------------------------------------------------------------
+;- Interrupt and Supervisor Stack are located at the top of internal memory in
+;- order to speed the exception handling context saving and restoring.
+;- ARM_MODE_SVC (Application, C) Stack is located at the top of the external memory.
+;------------------------------------------------------------------------------
+
+IRQ_STACK_SIZE          EQU     (3*8*4)     ; 3 words to be saved per interrupt priority level
+ARM_MODE_FIQ            EQU     0x11
+ARM_MODE_IRQ            EQU     0x12
+ARM_MODE_SVC            EQU     0x13
+I_BIT                   EQU     0x80
+F_BIT                   EQU     0x40
+
+;------------------------------------------------------------------------------
+;- Setup the stack for each mode
+;------------------------------------------------------------------------------
+    ldr     r0, =__iramend
+
+;- Set up Fast Interrupt Mode and set FIQ Mode Stack
+            msr     CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT
+;- Init the FIQ register
+            ldr     r8, =AT91C_BASE_AIC
+
+;- Set up Interrupt Mode and set IRQ Mode Stack
+    msr     CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT
+    mov     r13, r0                     ; Init stack IRQ
+    sub     r0, r0, #IRQ_STACK_SIZE
+
+;- Enable interrupt & Set up Supervisor Mode and set Supervisor Mode Stack
+    msr     CPSR_c, #ARM_MODE_SVC
+    mov     r13, r0
+
+;------------------------------------------------------------------------------
+; Initialize segments.
+;------------------------------------------------------------------------------
+; __segment_init is assumed to use
+; instruction set and to be reachable by BL from the ICODE segment
+; (it is safest to link them in segment ICODE).
+;------------------------------------------------------------------------------
+    EXTERN	__segment_init
+    ldr	r0,=__segment_init
+    mov     lr, pc
+    bx	r0
+
+;------------------------------------------------------------------------------
+;- Branch on C code Main function (with interworking)
+;------------------------------------------------------------------------------
+    EXTERN	main
+    PUBLIC	__main
+?jump_to_main:
+    ldr	lr,=?call_exit
+    ldr	r0,=main
+__main:
+    bx	r0
+
+;------------------------------------------------------------------------------
+;- Loop for ever
+;------------------------------------------------------------------------------
+;- End of application. Normally, never occur.
+;- Could jump on Software Reset ( B 0x0 ).
+;------------------------------------------------------------------------------
+?call_exit:
+End
+    b       End
+
+;------------------------------------------------------------------------------
+;- Exception Vectors
+;------------------------------------------------------------------------------
+    PUBLIC    AT91F_Default_FIQ_handler
+    PUBLIC    AT91F_Default_IRQ_handler
+    PUBLIC    AT91F_Spurious_handler
+
+    CODE32      ; Always ARM mode after exeption
+
+AT91F_Default_FIQ_handler
+    b         AT91F_Default_FIQ_handler
+
+AT91F_Default_IRQ_handler
+    b         AT91F_Default_IRQ_handler
+
+AT91F_Spurious_handler
+    b         AT91F_Spurious_handler
+
+    ENDMOD      ;- Terminates the assembly of the current module
+    END         ;- Terminates the assembly of the last module in a file
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/srcIAR/Cstartup_SAM7.c b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/srcIAR/Cstartup_SAM7.c
new file mode 100644
index 000000000..0913da3dd
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v4/srcIAR/Cstartup_SAM7.c
@@ -0,0 +1,98 @@
+// ----------------------------------------------------------------------------
+//         ATMEL Microcontroller Software Support  -  ROUSSET  -
+// ----------------------------------------------------------------------------
+// DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+// IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+// DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+// OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+// EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+// ----------------------------------------------------------------------------
+// File Name           : Cstartup_SAM7.c
+// Object              : Low level initialisations written in C for IAR Tools
+// Creation            : FBr   01-Sep-2005
+// 1.0 08-Sep-2005 JPP : Suppress Reset
+// ----------------------------------------------------------------------------
+
+#include "AT91SAM7X256.h"
+
+// The following functions must be write in ARM mode this function called directly by exception vector
+extern void AT91F_Spurious_handler(void);
+extern void AT91F_Default_IRQ_handler(void);
+extern void AT91F_Default_FIQ_handler(void);
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_LowLevelInit
+//* \brief This function performs very low level HW initialization
+//*        this function can use a Stack, depending the compilation
+//*        optimization mode
+//*----------------------------------------------------------------------------
+void AT91F_LowLevelInit(void)
+{
+    unsigned char i;
+    /////////////////////////////////////////////////////////////////////////////////////////////////////
+    // EFC Init
+    /////////////////////////////////////////////////////////////////////////////////////////////////////
+    AT91C_BASE_MC->MC_FMR = AT91C_MC_FWS_1FWS;      // 1 Wait State necessary to work at 48MHz
+
+    /////////////////////////////////////////////////////////////////////////////////////////////////////
+    // Init PMC Step 1. Enable Main Oscillator
+    // Main Oscillator startup time is board specific:
+    // Main Oscillator Startup Time worst case (3MHz) corresponds to 15ms (0x40 for AT91C_CKGR_OSCOUNT field)
+    /////////////////////////////////////////////////////////////////////////////////////////////////////
+    AT91C_BASE_PMC->PMC_MOR = (( AT91C_CKGR_OSCOUNT & (0x40 <<8) | AT91C_CKGR_MOSCEN ));
+#ifndef SIMULATE
+    // Wait Main Oscillator stabilization
+    while(!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS));
+#endif
+
+    /////////////////////////////////////////////////////////////////////////////////////////////////////
+    // Init PMC Step 2.
+    // Set PLL to 96MHz (96,109MHz) and UDP Clock to 48MHz
+    // PLL Startup time depends on PLL RC filter: worst case is choosen
+    // UDP Clock (48,058MHz) is compliant with the Universal Serial Bus Specification (+/- 0.25% for full speed)
+    /////////////////////////////////////////////////////////////////////////////////////////////////////
+    AT91C_BASE_PMC->PMC_PLLR = AT91C_CKGR_USBDIV_1 | AT91C_CKGR_OUT_0 | AT91C_CKGR_PLLCOUNT |
+      (AT91C_CKGR_MUL & (72 << 16)) | (AT91C_CKGR_DIV & 14);
+#ifndef SIMULATE
+    // Wait for PLL stabilization
+    while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCK) );
+    // Wait until the master clock is established for the case we already turn on the PLL
+    while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) );
+#endif
+
+    /////////////////////////////////////////////////////////////////////////////////////////////////////
+    // Init PMC Step 3.
+    // Selection of Master Clock MCK (equal to Processor Clock PCK) equal to PLL/2 = 48MHz
+    // The PMC_MCKR register must not be programmed in a single write operation (see. Product Errata Sheet)
+    /////////////////////////////////////////////////////////////////////////////////////////////////////
+    AT91C_BASE_PMC->PMC_MCKR = AT91C_PMC_PRES_CLK_2;
+#ifndef SIMULATE
+    // Wait until the master clock is established
+    while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) );
+#endif
+
+    AT91C_BASE_PMC->PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK;
+#ifndef SIMULATE
+    // Wait until the master clock is established
+    while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) );
+#endif
+
+    /////////////////////////////////////////////////////////////////////////////////////////////////////
+    //  Disable Watchdog (write once register)
+    /////////////////////////////////////////////////////////////////////////////////////////////////////
+    AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
+
+    ////////////////////////////////////////////////////////////////////////////////////////////////////
+    //  Init AIC: assign corresponding handler for each interrupt source
+    /////////////////////////////////////////////////////////////////////////////////////////////////////
+    AT91C_BASE_AIC->AIC_SVR[0] = (int) AT91F_Default_FIQ_handler ;
+    for (i = 1; i < 31; i++) {
+        AT91C_BASE_AIC->AIC_SVR[i] = (int) AT91F_Default_IRQ_handler ;
+    }
+    AT91C_BASE_AIC->AIC_SPU = (unsigned int) AT91F_Spurious_handler;
+}
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/Resource/SAM7_FLASH.mac b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/Resource/SAM7_FLASH.mac
new file mode 100644
index 000000000..7c4021aad
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/Resource/SAM7_FLASH.mac
@@ -0,0 +1,71 @@
+//  ----------------------------------------------------------------------------

+//          ATMEL Microcontroller Software Support  -  ROUSSET  -

+//  ----------------------------------------------------------------------------

+//  DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR

+//  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF

+//  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE

+//  DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,

+//  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT

+//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,

+//  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF

+//  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING

+//  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,

+//  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+//  ----------------------------------------------------------------------------

+//  File Name           : SAM7_FLASH.mac

+//  Object              : Generic Macro File for IAR

+//  1.0 17/Aug/05 FBr   : Creation

+//  ----------------------------------------------------------------------------

+

+/*********************************************************************

+*

+*       _InitRSTC()

+*

+* Function description

+*   Initializes the RSTC (Reset controller).

+*   This makes sense since the default is to not allow user resets, which makes it impossible to

+*   apply a second RESET via J-Link

+*/

+_InitRSTC() {

+    __writeMemory32(0xA5000001, 0xFFFFFD08,"Memory");    // Allow user reset

+}

+

+/*********************************************************************

+*

+*       _InitPLL()

+* Function description

+*   Initializes the PMC.

+*   1. Enable the Main Oscillator

+*   2. Configure PLL to 96MHz

+*   3. Switch Master Clock (MCK) on PLL/2 = 48MHz

+*/

+    _InitPLL() {

+

+    __message "Enable Main Oscillator";

+    __writeMemory32(0x00000601,0xFFFFFc20,"Memory");    // MOSC

+    while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x1)  );

+

+    __message "Set PLL to 96MHz";

+    __writeMemory32(0x10191c05,0xFFFFFc2c,"Memory");    // LOCK

+    while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x4)  );

+

+    __message "Set Master Clock to 48MHz";

+    __writeMemory32(0x00000004,0xFFFFFc30,"Memory");    // MCKRDY

+    while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x8)  );

+    __writeMemory32(0x00000007,0xFFFFFc30,"Memory");    // MCKRDY

+    while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x8)  );

+}

+

+/*********************************************************************

+*

+*       execUserReset() : JTAG set initially to Full Speed

+*/

+execUserReset() {

+    __message "execUserReset()";

+    __emulatorSpeed(30000);             // Set JTAG speed to 30kHz to make a hardware reset

+    __hwReset(0);                       // Hardware Reset: CPU is automatically halted after the reset (JTAG is already configured to 32kHz)

+    _InitPLL();                         // Allow to debug at JTAG Full Speed

+    _InitRSTC();                        // Enable User Reset to allow execUserReset() execution

+    __emulatorSpeed(0);                 // Set JTAG speed to full speed

+}

+

diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/Resource/SAM7_RAM.mac b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/Resource/SAM7_RAM.mac
new file mode 100644
index 000000000..a1bf81dc7
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/Resource/SAM7_RAM.mac
@@ -0,0 +1,94 @@
+//  ----------------------------------------------------------------------------

+//          ATMEL Microcontroller Software Support  -  ROUSSET  -

+//  ----------------------------------------------------------------------------

+//  DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR

+//  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF

+//  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE

+//  DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,

+//  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT

+//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,

+//  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF

+//  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING

+//  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,

+//  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

+//  ----------------------------------------------------------------------------

+//  File Name           : SAM7_RAM.mac

+//  Object              : Generic Macro File for IAR

+//  1.0 17/Aug/05 FBr   : Creation

+//  ----------------------------------------------------------------------------

+

+/*********************************************************************

+*

+*       _MapRAMAt0()

+*

+* Function description

+*   Maps RAM at 0.

+*/

+_MapRAMAt0(){

+    __message "Changing mapping: RAM mapped to 0";

+    __writeMemory32(0x00000001,0xFFFFFF00,"Memory");

+}

+

+/*********************************************************************

+*

+*       _InitRSTC()

+*

+* Function description

+*   Initializes the RSTC (Reset controller).

+*   This makes sense since the default is to not allow user resets, which makes it impossible to

+*   apply a second RESET via J-Link

+*/

+_InitRSTC() {

+    __writeMemory32(0xA5000001, 0xFFFFFD08,"Memory");    // Allow user reset

+}

+

+/*********************************************************************

+*

+*       _InitPLL()

+* Function description

+*   Initializes the PMC.

+*   1. Enable the Main Oscillator

+*   2. Configure PLL to 96MHz

+*   3. Switch Master Clock (MCK) on PLL/2 = 48MHz

+*/

+    _InitPLL() {

+

+    __message "Set Main Oscillator";

+    __writeMemory32(0x00004001,0xFFFFFc20,"Memory");    // MOSC

+    while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x1)  );

+

+    __message "Set PLL to 96MHz";

+    __writeMemory32(0x10483f0e,0xFFFFFc2c,"Memory");    // LOCK

+    while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x4)  );

+

+    __message "Set Master Clock to 48MHz";

+    __writeMemory32(0x00000004,0xFFFFFc30,"Memory");    // MCKRDY

+    while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x8)  );

+    __writeMemory32(0x00000007,0xFFFFFc30,"Memory");    // MCKRDY

+    while( !(__readMemory32(0xFFFFFc68,"Memory") & 0x8)  );

+}

+

+/*********************************************************************

+*

+*       execUserReset() : JTAG set initially to Full Speed

+*/

+execUserReset() {

+    __message "execUserReset()";

+    __emulatorSpeed(30000);             // Set JTAG speed to 30kHz to make a hardware reset

+    __hwReset(0);                       // Hardware Reset: CPU is automatically halted after the reset

+    _InitPLL();                         // Allow to debug at JTAG Full Speed

+    _MapRAMAt0();                       // Remap RAM to address 0

+    __emulatorSpeed(0);                 // Set JTAG speed to full speed

+}

+

+/*********************************************************************

+*

+*       execUserPreload() : JTAG set initially to 32kHz

+*/

+execUserPreload() {

+    __message "execUserPreload()";

+    __hwReset(0);                       // Hardware Reset: CPU is automatically halted after the reset (JTAG is already configured to 32kHz)

+    _InitPLL();                         // Allow to load Code at JTAG Full Speed

+    _MapRAMAt0();                       // Remap RAM to address 0

+    _InitRSTC();                        // Enable User Reset to allow execUserReset() execution

+}

diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/Resource/SAM7_SIM.mac b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/Resource/SAM7_SIM.mac
new file mode 100644
index 000000000..2be1a4c9b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/Resource/SAM7_SIM.mac
@@ -0,0 +1,67 @@
+//=========================================================

+// Simulation setup file for esc07_demo project

+//=========================================================

+

+__var _timer0_interrupt_ID;

+

+irqBreak()

+{

+  __var __AIC_SMR;

+  __var __AIC_IECR;

+  __var __AIC_IVR;

+

+  // read AIC_IECR instead, since not fully supported by simulator

+  __AIC_IECR = __readMemory32(0xFFFFF120, "Memory");

+  if(__AIC_IECR & 0x1000)

+  {

+    __AIC_SMR = __readMemory32(0xFFFFF060, "Memory");

+    __AIC_IVR = __readMemory32(0xFFFFF0B0, "Memory"); //AIC_IVR = AIC_SVR[x]

+    __writeMemory32(__AIC_IVR, 0xFFFFF100, "Memory"); //AIC_IVR

+    __writeMemory32(0x1000, 0xFFFFF10C, "Memory");    //AIC_IPR

+    __writeMemory32(0x2, 0xFFFFF114, "Memory");       //AIC_CISR

+  }

+

+  return 0;

+}

+

+setupProcessorRegisters()

+{

+  // Write TC0_SR.CPCS with correct status for ISR (Clock enabled; RC Compare Flag = TRUE)

+  __writeMemory32(0x00010010, 0xfffa0020, "Memory");

+

+  // Set TX ready flag in USART0 status register

+  // USART0_BASE->US_CSR = AT91C_US_TXRDY

+  __writeMemory32(0x00000002, 0xfffc0014, "Memory");

+}

+

+configureTimer0Interrupt()

+{

+  __var _master_clock_frequency;

+  __var _timer0_period_cycles;

+

+  // Calculate timer0 frequency in master clock cycles

+  _master_clock_frequency = 48054857;

+  _timer0_period_cycles = _master_clock_frequency / 100;

+  if((_master_clock_frequency % 100) >= 50)

+  {

+    _timer0_period_cycles++;

+  }

+

+  __cancelAllInterrupts();

+  __enableInterrupts();

+

+  _timer0_interrupt_ID = __orderInterrupt("IRQ", _timer0_period_cycles, _timer0_period_cycles, 0, 0, 0, 100);

+

+  if(-1 == _timer0_interrupt_ID)

+  {

+    __message "ERROR: failed to order timer 0 interrupt";

+  }

+

+  __setCodeBreak("0x18", 0, "irqBreak()", "TRUE", "");

+}

+

+execUserReset()

+{

+  setupProcessorRegisters();

+  configureTimer0Interrupt();

+}

diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/Resource/at91SAM7X256_FLASH.icf b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/Resource/at91SAM7X256_FLASH.icf
new file mode 100644
index 000000000..ab842a2f5
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/Resource/at91SAM7X256_FLASH.icf
@@ -0,0 +1,43 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__      = 0x00000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__  = 0x00000100;
+define symbol __ICFEDIT_region_ROM_end__    = 0x0003FFFF;
+define symbol __ICFEDIT_region_RAM_start__  = 0x00200000;
+define symbol __ICFEDIT_region_RAM_end__    = 0x0020FFFF;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__   = 0x400;
+define symbol __ICFEDIT_size_svcstack__ = 0x100;
+define symbol __ICFEDIT_size_irqstack__ = 0x100;
+define symbol __ICFEDIT_size_fiqstack__ = 0x40;
+define symbol __ICFEDIT_size_undstack__ = 0x40;
+define symbol __ICFEDIT_size_abtstack__ = 0x40;
+define symbol __ICFEDIT_size_heap__     = 0x400;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block SVC_STACK with alignment = 8, size = __ICFEDIT_size_svcstack__ { };
+define block IRQ_STACK with alignment = 8, size = __ICFEDIT_size_irqstack__ { };
+define block FIQ_STACK with alignment = 8, size = __ICFEDIT_size_fiqstack__ { };
+define block UND_STACK with alignment = 8, size = __ICFEDIT_size_undstack__ { };
+define block ABT_STACK with alignment = 8, size = __ICFEDIT_size_abtstack__ { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__    { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block SVC_STACK, block IRQ_STACK, block FIQ_STACK,
+                        block UND_STACK, block ABT_STACK, block HEAP };
+
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/Resource/at91SAM7X256_RAM.icf b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/Resource/at91SAM7X256_RAM.icf
new file mode 100644
index 000000000..cc79cda29
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/Resource/at91SAM7X256_RAM.icf
@@ -0,0 +1,42 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__      = 0x00000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__  = 0x00;
+define symbol __ICFEDIT_region_ROM_end__    = 0x00;
+define symbol __ICFEDIT_region_RAM_start__  = 0x00000100;
+define symbol __ICFEDIT_region_RAM_end__    = 0x0000FFFF;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__   = 0x400;
+define symbol __ICFEDIT_size_svcstack__ = 0x100;
+define symbol __ICFEDIT_size_irqstack__ = 0x100;
+define symbol __ICFEDIT_size_fiqstack__ = 0x40;
+define symbol __ICFEDIT_size_undstack__ = 0x40;
+define symbol __ICFEDIT_size_abtstack__ = 0x40;
+define symbol __ICFEDIT_size_heap__     = 0x800;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block SVC_STACK with alignment = 8, size = __ICFEDIT_size_svcstack__ { };
+define block IRQ_STACK with alignment = 8, size = __ICFEDIT_size_irqstack__ { };
+define block FIQ_STACK with alignment = 8, size = __ICFEDIT_size_fiqstack__ { };
+define block UND_STACK with alignment = 8, size = __ICFEDIT_size_undstack__ { };
+define block ABT_STACK with alignment = 8, size = __ICFEDIT_size_abtstack__ { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__    { readonly section .intvec };
+
+place in RAM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block SVC_STACK, block IRQ_STACK, block FIQ_STACK,
+                        block UND_STACK, block ABT_STACK, block HEAP };
+
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/cmock_demo.dep b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/cmock_demo.dep
new file mode 100644
index 000000000..456f4dbae
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/cmock_demo.dep
@@ -0,0 +1,4204 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<project>
+  <fileVersion>2</fileVersion>
+  <fileChecksum>3270150602</fileChecksum>
+  <configuration>
+    <name>Binary</name>
+    <outputs>
+      <file>$PROJ_DIR$\Binary\Obj\TimerConductor.o</file>
+      <file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>
+      <file>$TOOLKIT_DIR$\inc\DLib_Threads.h</file>
+      <file>$PROJ_DIR$\Binary\Obj\TimerConductor.pbi</file>
+      <file>$PROJ_DIR$\Binary\List\TimerInterruptConfigurator.lst</file>
+      <file>$PROJ_DIR$\Binary\Obj\AdcTemperatureSensor.o</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerInterruptConfigurator.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerModel.h</file>
+      <file>$TOOLKIT_DIR$\inc\ymath.h</file>
+      <file>$PROJ_DIR$\Binary\Obj\Cstartup_SAM7.o</file>
+      <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>
+      <file>$TOOLKIT_DIR$\inc\math.h</file>
+      <file>$PROJ_DIR$\Binary\Exe\cmock_demo.hex</file>
+      <file>$PROJ_DIR$\Binary\Obj\UsartPutChar.pbi</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerInterruptHandler.h</file>
+      <file>$PROJ_DIR$\Binary\Obj\AdcConductor.pbi</file>
+      <file>$PROJ_DIR$\Binary\List\TimerConfigurator.lst</file>
+      <file>$PROJ_DIR$\Binary\List\TaskScheduler.lst</file>
+      <file>$PROJ_DIR$\Binary\List\TemperatureCalculator.lst</file>
+      <file>$PROJ_DIR$\Binary\List\UsartConductor.lst</file>
+      <file>$PROJ_DIR$\Binary\Obj\UsartConductor.o</file>
+      <file>$PROJ_DIR$\Binary\Obj\TimerModel.o</file>
+      <file>$PROJ_DIR$\Binary\Obj\UsartConfigurator.pbi</file>
+      <file>$PROJ_DIR$\Binary\Obj\TimerInterruptConfigurator.o</file>
+      <file>$PROJ_DIR$\Binary\List\Cstartup.lst</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\Executor.h</file>
+      <file>$PROJ_DIR$\incIAR\project.h</file>
+      <file>$PROJ_DIR$\Binary\Obj\Executor.pbi</file>
+      <file>$PROJ_DIR$\Binary\List\TimerConductor.lst</file>
+      <file>$PROJ_DIR$\Binary\Obj\TimerModel.pbi</file>
+      <file>$TOOLKIT_DIR$\inc\intrinsics.h</file>
+      <file>$PROJ_DIR$\Binary\Obj\Model.pbi</file>
+      <file>$PROJ_DIR$\Binary\Obj\UsartBaudRateRegisterCalculator.o</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartBaudRateRegisterCalculator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartModel.h</file>
+      <file>$PROJ_DIR$\Binary\Obj\TaskScheduler.pbi</file>
+      <file>$PROJ_DIR$\Binary\Obj\Executor.o</file>
+      <file>$PROJ_DIR$\Binary\Obj\TemperatureCalculator.o</file>
+      <file>$PROJ_DIR$\Binary\Obj\Cstartup_SAM7.pbi</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AT91SAM7X256.h</file>
+      <file>$PROJ_DIR$\Binary\Obj\IntrinsicsWrapper.pbi</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartHardware.h</file>
+      <file>$PROJ_DIR$\Binary\List\Main.lst</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartConfigurator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartTransmitBufferStatus.h</file>
+      <file>$PROJ_DIR$\Binary\List\TimerHardware.lst</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartBaudRateRegisterCalculator.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TemperatureCalculator.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartPutChar.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TaskScheduler.h</file>
+      <file>$PROJ_DIR$\Binary\List\UsartTransmitBufferStatus.lst</file>
+      <file>$PROJ_DIR$\Binary\Obj\AdcTemperatureSensor.pbi</file>
+      <file>$PROJ_DIR$\Binary\Obj\Main.pbi</file>
+      <file>$PROJ_DIR$\Binary\List\UsartModel.lst</file>
+      <file>$PROJ_DIR$\Binary\Obj\TemperatureFilter.pbi</file>
+      <file>$PROJ_DIR$\Binary\List\AdcHardware.lst</file>
+      <file>$PROJ_DIR$\Binary\List\AdcTemperatureSensor.lst</file>
+      <file>$PROJ_DIR$\Binary\Obj\UsartTransmitBufferStatus.pbi</file>
+      <file>$PROJ_DIR$\Binary\Obj\AdcHardware.pbi</file>
+      <file>$PROJ_DIR$\Binary\Obj\TemperatureCalculator.pbi</file>
+      <file>$TOOLKIT_DIR$\lib\dl4t_tl_in.a</file>
+      <file>$TOOLKIT_DIR$\inc\ycheck.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\ModelConfig.h</file>
+      <file>$PROJ_DIR$\Binary\List\AdcConductor.lst</file>
+      <file>$PROJ_DIR$\Binary\List\AdcHardwareConfigurator.lst</file>
+      <file>$PROJ_DIR$\Binary\Obj\TimerHardware.o</file>
+      <file>$PROJ_DIR$\Binary\Obj\TimerInterruptHandler.o</file>
+      <file>$TOOLKIT_DIR$\inc\stdio.h</file>
+      <file>$PROJ_DIR$\Binary\Obj\UsartHardware.o</file>
+      <file>$PROJ_DIR$\Binary\Obj\TimerInterruptHandler.pbi</file>
+      <file>$PROJ_DIR$\Binary\Obj\UsartModel.o</file>
+      <file>$TOOLKIT_DIR$\inc\DLib_Config_Normal.h</file>
+      <file>$PROJ_DIR$\Binary\List\TemperatureFilter.lst</file>
+      <file>$PROJ_DIR$\Binary\List\UsartPutChar.lst</file>
+      <file>$PROJ_DIR$\Binary\Obj\UsartConfigurator.o</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartConductor.h</file>
+      <file>$PROJ_DIR$\Binary\List\AdcModel.lst</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TemperatureFilter.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\Types.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerConfigurator.h</file>
+      <file>$TOOLKIT_DIR$\inc\yvals.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartModel.h</file>
+      <file>$PROJ_DIR$\Binary\Obj\UsartTransmitBufferStatus.o</file>
+      <file>$TOOLKIT_DIR$\lib\rt4t_al.a</file>
+      <file>$PROJ_DIR$\Binary\List\UsartHardware.lst</file>
+      <file>$TOOLKIT_DIR$\inc\ysizet.h</file>
+      <file>$PROJ_DIR$\Binary\Obj\AdcModel.o</file>
+      <file>$PROJ_DIR$\Binary\Obj\AdcConductor.o</file>
+      <file>$PROJ_DIR$\Binary\Exe\cmock_demo.out</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcConductor.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcTemperatureSensor.h</file>
+      <file>$PROJ_DIR$\Binary\Obj\UsartModel.pbi</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerHardware.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcModel.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcHardware.h</file>
+      <file>$PROJ_DIR$\Binary\List\UsartBaudRateRegisterCalculator.lst</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\Model.h</file>
+      <file>$TOOLKIT_DIR$\lib\shs_l.a</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartConfigurator.h</file>
+      <file>$PROJ_DIR$\Binary\Obj\TimerInterruptConfigurator.pbi</file>
+      <file>$PROJ_DIR$\Binary\List\UsartConfigurator.lst</file>
+      <file>$PROJ_DIR$\Binary\List\TimerModel.lst</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Executor.h</file>
+      <file>$PROJ_DIR$\Binary\Obj\IntrinsicsWrapper.o</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerConfigurator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartConductor.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcTemperatureSensor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerConductor.h</file>
+      <file>$PROJ_DIR$\Binary\Obj\AdcHardwareConfigurator.o</file>
+      <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\Main.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcHardwareConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcConductor.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcHardware.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerModel.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcModel.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerInterruptHandler.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\Executor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Model.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\Model.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\IntrinsicsWrapper.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartPutChar.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerInterruptConfigurator.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TemperatureFilter.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TemperatureCalculator.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TaskScheduler.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerInterruptConfigurator.c</file>
+      <file>$PROJ_DIR$\Binary\Obj\AdcModel.pbi</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerConductor.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerInterruptHandler.c</file>
+      <file>$PROJ_DIR$\Binary\Obj\AdcHardware.o</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerHardware.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartTransmitBufferStatus.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcModel.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerModel.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartBaudRateRegisterCalculator.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartConductor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcHardware.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TemperatureFilter.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartHardware.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartModel.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartPutChar.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcTemperatureSensor.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\ModelConfig.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcHardwareConfigurator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Types.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TemperatureCalculator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcConductor.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AT91SAM7X256.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TaskScheduler.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerHardware.h</file>
+      <file>$PROJ_DIR$\Binary\Obj\TimerHardware.pbi</file>
+      <file>$PROJ_DIR$\Binary\Obj\TimerConfigurator.o</file>
+      <file>$PROJ_DIR$\Binary\List\Model.lst</file>
+      <file>$PROJ_DIR$\Binary\Obj\Cstartup.o</file>
+      <file>$PROJ_DIR$\Binary\Obj\TaskScheduler.o</file>
+      <file>$PROJ_DIR$\Binary\Obj\TemperatureFilter.o</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerConductor.h</file>
+      <file>$PROJ_DIR$\Binary\Obj\Model.o</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartTransmitBufferStatus.h</file>
+      <file>$PROJ_DIR$\Binary\Obj\UsartHardware.pbi</file>
+      <file>$PROJ_DIR$\Binary\List\TimerInterruptHandler.lst</file>
+      <file>$PROJ_DIR$\Binary\Obj\cmock_demo.pbd</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartHardware.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcHardwareConfigurator.h</file>
+      <file>$PROJ_DIR$\Binary\Obj\UsartConductor.pbi</file>
+      <file>$PROJ_DIR$\srcIAR\Cstartup_SAM7.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcHardwareConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcConductor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcHardware.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcModel.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcTemperatureSensor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Executor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Main.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\IntrinsicsWrapper.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Model.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TemperatureCalculator.c</file>
+      <file>$PROJ_DIR$\Resource\at91SAM7X256_FLASH.icf</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TaskScheduler.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerInterruptConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TemperatureFilter.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerConductor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerHardware.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerInterruptHandler.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerModel.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartModel.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartBaudRateRegisterCalculator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartConductor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartHardware.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartTransmitBufferStatus.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartPutChar.c</file>
+      <file>$PROJ_DIR$\srcIAR\Cstartup.s</file>
+      <file>$PROJ_DIR$\Binary\Obj\UsartPutChar.o</file>
+      <file>$PROJ_DIR$\Binary\Obj\TimerConfigurator.pbi</file>
+      <file>$PROJ_DIR$\Binary\Obj\Main.o</file>
+      <file>$PROJ_DIR$\Binary\List\Executor.lst</file>
+      <file>$PROJ_DIR$\incIAR\AT91SAM7X-EK.h</file>
+      <file>$PROJ_DIR$\incIAR\lib_AT91SAM7X256.h</file>
+      <file>$PROJ_DIR$\incIAR\AT91SAM7X256_inc.h</file>
+      <file>$PROJ_DIR$\Binary\Obj\AdcHardwareConfigurator.pbi</file>
+      <file>$PROJ_DIR$\Binary\Obj\UsartBaudRateRegisterCalculator.pbi</file>
+    </outputs>
+    <file>
+      <name>[ROOT_NODE]</name>
+      <outputs>
+        <tool>
+          <name>ILINK</name>
+          <file> 88</file>
+        </tool>
+      </outputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\Binary\Exe\cmock_demo.out</name>
+      <outputs>
+        <tool>
+          <name>OBJCOPY</name>
+          <file> 12</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ILINK</name>
+          <file> 179 87 131 108 86 5 156 9 36 103 198 160 157 37 158 0 154 65 23 66 21 32 20 74 68 70 196 82 97 83 60</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\AdcTemperatureSensor.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 51</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 56 5</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 78 39 90</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 78 39 90</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\Main.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 52</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 42 198</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 78 39 25 96 49 47 77 75 165 98 48 81 46 161 159 92 79 6 14 7 89 94 166 90 93</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
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+        <tool>
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+        <tool>
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+        <tool>
+          <name>ICCARM</name>
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+        <tool>
+          <name>ICCARM</name>
+          <file> 72 158</file>
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+        <tool>
+          <name>ICCARM</name>
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+        <tool>
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+        <tool>
+          <name>ICCARM</name>
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+        <tool>
+          <name>ICCARM</name>
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+        <tool>
+          <name>ICCARM</name>
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+        <tool>
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+          <file> 163 66</file>
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+        <tool>
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+        <tool>
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+        <tool>
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+          <file> 50 82</file>
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+        <tool>
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+        <tool>
+          <name>ICCARM</name>
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+        <tool>
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+          <file> 91</file>
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+        <tool>
+          <name>ICCARM</name>
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+        <tool>
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+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerModel.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 29</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 147 150 114 151</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartModel.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 91</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 147 150 34 145 33 140 67 61 80 1 10 109 2 85 11 8</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartBaudRateRegisterCalculator.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 204</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 147 150 33</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartConductor.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 167</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 147 150 105 41 34 151</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 22</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 147 150 43</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartHardware.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 162</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 147 150 41 43 121</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartTransmitBufferStatus.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 57</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 147 150 44</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartPutChar.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 13</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 147 150 121 44</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\srcIAR\Cstartup.s</name>
+      <outputs>
+        <tool>
+          <name>AARM</name>
+          <file> 156 24</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>AARM</name>
+          <file> 202</file>
+        </tool>
+      </inputs>
+    </file>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\srcIAR\Cstartup_SAM7.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcHardwareConfigurator.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcHardware.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcModel.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcTemperatureSensor.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\..\examples\src\Executor.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\..\examples\src\Main.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\..\examples\src\IntrinsicsWrapper.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\..\examples\src\Model.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\..\examples\src\TemperatureCalculator.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\..\examples\src\TaskScheduler.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerInterruptConfigurator.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\..\examples\src\TemperatureFilter.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerConductor.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerConfigurator.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerHardware.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerInterruptHandler.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerModel.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartModel.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartBaudRateRegisterCalculator.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartConductor.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartConfigurator.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartHardware.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartTransmitBufferStatus.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartPutChar.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+  </configuration>
+  <configuration>
+    <name>FLASH_Debug</name>
+    <outputs>
+      <file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>
+      <file>$TOOLKIT_DIR$\inc\DLib_Threads.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerInterruptConfigurator.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerModel.h</file>
+      <file>$TOOLKIT_DIR$\inc\ymath.h</file>
+      <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>
+      <file>$TOOLKIT_DIR$\inc\math.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerInterruptHandler.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\Executor.h</file>
+      <file>$PROJ_DIR$\incIAR\project.h</file>
+      <file>$TOOLKIT_DIR$\inc\intrinsics.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartBaudRateRegisterCalculator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartModel.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AT91SAM7X256.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartHardware.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartConfigurator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartTransmitBufferStatus.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartBaudRateRegisterCalculator.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TemperatureCalculator.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartPutChar.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TaskScheduler.h</file>
+      <file>$TOOLKIT_DIR$\lib\dl4t_tl_in.a</file>
+      <file>$TOOLKIT_DIR$\inc\ycheck.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\ModelConfig.h</file>
+      <file>$TOOLKIT_DIR$\inc\stdio.h</file>
+      <file>$TOOLKIT_DIR$\inc\DLib_Config_Normal.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartConductor.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TemperatureFilter.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\Types.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerConfigurator.h</file>
+      <file>$TOOLKIT_DIR$\inc\yvals.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartModel.h</file>
+      <file>$TOOLKIT_DIR$\lib\rt4t_al.a</file>
+      <file>$TOOLKIT_DIR$\inc\ysizet.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcConductor.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcTemperatureSensor.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerHardware.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcModel.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcHardware.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\Model.h</file>
+      <file>$TOOLKIT_DIR$\lib\shs_l.a</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartConfigurator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Executor.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerConfigurator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartConductor.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcTemperatureSensor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerConductor.h</file>
+      <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\cmock_demo.pbd</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\Main.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcHardwareConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcConductor.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcHardware.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerModel.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcModel.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerInterruptHandler.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\Executor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Model.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\Model.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\IntrinsicsWrapper.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartPutChar.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerInterruptConfigurator.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TemperatureFilter.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TemperatureCalculator.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TaskScheduler.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerInterruptConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerConductor.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerInterruptHandler.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerHardware.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartTransmitBufferStatus.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcModel.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerModel.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartBaudRateRegisterCalculator.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartConductor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcHardware.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TemperatureFilter.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartHardware.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartModel.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartPutChar.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcTemperatureSensor.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\ModelConfig.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcHardwareConfigurator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Types.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TemperatureCalculator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcConductor.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AT91SAM7X256.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TaskScheduler.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerHardware.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerConductor.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartTransmitBufferStatus.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartHardware.h</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\Main.o</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcHardwareConfigurator.h</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\TimerHardware.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\ext_irq.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\Cstartup.o</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\TimerConfigurator.pbi</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\UsartHardware.lst</file>
+      <file>$PROJ_DIR$\..\src\ext_irq.c</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\interrupt_Usart.o</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\interrupt_Usart.pbi</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\TimerModel.o</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\main.pbi</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\Model.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\AdcModel.o</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\UsartHardware.o</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\UsartPutChar.o</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\TemperatureCalculator.pbi</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\AdcConductor.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\UsartTransmitBufferStatus.pbi</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\AdcConductor.pbi</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\Model.pbi</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\Cstartup_SAM7.o</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\IntrinsicsWrapper.o</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\IntrinsicsWrapper.pbi</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\AdcHardware.o</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\UsartPutChar.pbi</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\UsartBaudRateRegisterCalculator.pbi</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\interrupt_timer.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\Cstartup_SAM7.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\AdcHardwareConfigurator.o</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\AdcHardwareConfigurator.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\TemperatureFilter.pbi</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\TimerConductor.pbi</file>
+      <file>$PROJ_DIR$\..\..\include\lib_AT91SAM7X256.h</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\TaskScheduler.o</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\TemperatureFilter.o</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\ext_irq.pbi</file>
+      <file>$PROJ_DIR$\..\..\include\AT91SAM7X256.h</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\AdcModel.pbi</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\TimerInterruptConfigurator.o</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\AdcModel.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\interrupt_Usart.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\Cstartup.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\UsartHardware.pbi</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\TimerModel.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\UsartConductor.o</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\UsartConfigurator.o</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\UsartPutChar.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\TemperatureFilter.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\TimerInterruptHandler.pbi</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\TemperatureCalculator.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\UsartTransmitBufferStatus.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\UsartModel.pbi</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\UsartConductor.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\TimerConfigurator.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\Model.o</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\Executor.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\UsartModel.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\TimerInterruptHandler.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\Main.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\TimerInterruptConfigurator.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Exe\cmock_demo.out</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\TimerHardware.pbi</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\TaskScheduler.pbi</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\TimerModel.pbi</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\AdcConductor.o</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\AdcTemperatureSensor.o</file>
+      <file>$PROJ_DIR$\..\src\AT91SAM7X-EK.h</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\UsartTransmitBufferStatus.o</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\AdcHardware.pbi</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\UsartBaudRateRegisterCalculator.o</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\ext_irq.o</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\AdcTemperatureSensor.pbi</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\TemperatureCalculator.o</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\TimerHardware.o</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\UsartModel.o</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\UsartConfigurator.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\TimerConductor.o</file>
+      <file>$PROJ_DIR$\srcIAR\project.h</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\UsartBaudRateRegisterCalculator.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\AdcHardwareConfigurator.pbi</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\TimerInterruptHandler.o</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\TimerConductor.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\Cstartup_SAM7.pbi</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\UsartConductor.pbi</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\UsartConfigurator.pbi</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\Executor.o</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\AdcHardware.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\Executor.pbi</file>
+      <file>$PROJ_DIR$\..\src\interrupt_timer.c</file>
+      <file>$PROJ_DIR$\..\src\interrupt_Usart.c</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\TimerInterruptConfigurator.pbi</file>
+      <file>$PROJ_DIR$\..\src\main.c</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\TimerConfigurator.o</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\AdcTemperatureSensor.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\TaskScheduler.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\interrupt_timer.o</file>
+      <file>$PROJ_DIR$\FLASH_Debug\List\IntrinsicsWrapper.lst</file>
+      <file>$PROJ_DIR$\FLASH_Debug\Obj\interrupt_timer.pbi</file>
+      <file>$PROJ_DIR$\srcIAR\Cstartup_SAM7.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcHardwareConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcConductor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcHardware.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcModel.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcTemperatureSensor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Executor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Main.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\IntrinsicsWrapper.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Model.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TemperatureCalculator.c</file>
+      <file>$PROJ_DIR$\Resource\at91SAM7X256_FLASH.icf</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TaskScheduler.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerInterruptConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TemperatureFilter.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerConductor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerHardware.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerInterruptHandler.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerModel.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartModel.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartBaudRateRegisterCalculator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartConductor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartHardware.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartTransmitBufferStatus.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartPutChar.c</file>
+      <file>$PROJ_DIR$\srcIAR\Cstartup.s</file>
+      <file>$PROJ_DIR$\incIAR\AT91SAM7X-EK.h</file>
+      <file>$PROJ_DIR$\incIAR\lib_AT91SAM7X256.h</file>
+      <file>$PROJ_DIR$\incIAR\AT91SAM7X256_inc.h</file>
+    </outputs>
+    <file>
+      <name>[ROOT_NODE]</name>
+      <outputs>
+        <tool>
+          <name>ILINK</name>
+          <file> 154</file>
+        </tool>
+      </outputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\AdcTemperatureSensor.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 165</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 187 159</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 28 13 35</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\FLASH_Debug\Obj\cmock_demo.pbd</name>
+      <inputs>
+        <tool>
+          <name>BILINK</name>
+          <file> 112 162 173 131 165 176 181 116 113 156 109 124 125 98 155 184 142 157 119 177 178 136 145 118 111 104</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\Main.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 104</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 152 93</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 28 13 8 39 20 18 27 26 92 41 19 31 17 91 90 36 29 2 7 3 34 38 94 35 37</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\AdcHardwareConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 173</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 123 122</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 28 13 94 23</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\AdcConductor.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 112</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 110 158</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 28 13 34 37 38</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\AdcHardware.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 162</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 180 117</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 28 13 38 94 35</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\AdcModel.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 131</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 133 106</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 28 13 37 20 18 27</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\Executor.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 181</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 149 179</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 28 13 8 39 26 90 34 10 22</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\Model.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 113</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 105 148</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 39 28 13 20 27</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\TemperatureFilter.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 124</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 141 128</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 28 13 27 6 22 4 30 0 25 5 47 1</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\TimerConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 98</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 147 186</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 28 13 29 2</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\TemperatureCalculator.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 109</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 143 166</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 28 13 18 6 22 4 30 0 25 5 47 1</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\TaskScheduler.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 156</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 188 127</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 28 13 20</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\TimerInterruptConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 184</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 153 132</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 28 13 2 7</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\TimerConductor.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 125</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 175 170</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 28 13 90 3 36 7</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\TimerInterruptHandler.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 142</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 151 174</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 28 13 7 2</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\UsartConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 178</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 169 139</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 28 13 41</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\TimerHardware.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 155</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 95 167</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 28 13 36 29</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\UsartTransmitBufferStatus.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 111</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 144 161</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 28 13 91</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\TimerModel.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 157</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 137 103</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 28 13 3 20</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\UsartBaudRateRegisterCalculator.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 119</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 172 163</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 28 13 17</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\UsartConductor.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 177</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 146 138</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 28 13 26 92 31 20</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\UsartHardware.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 136</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 99 107</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 28 13 92 41 19</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\UsartModel.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 145</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 150 168</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 28 13 31 23 17 27 24 22 30 0 25 5 47 1 33 6 4</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\UsartPutChar.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 118</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 140 108</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 28 13 19 91</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\src\ext_irq.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 129</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 96 164</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 171 10 22 160 130 126</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 171 10 22 160 130 126</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\FLASH_Debug\Exe\cmock_demo.out</name>
+      <inputs>
+        <tool>
+          <name>ILINK</name>
+          <file> 203 158 117 122 106 159 97 114 179 115 93 148 127 166 128 170 186 167 132 174 103 163 138 139 107 168 108 161 40 32 21</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\src\interrupt_timer.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 191</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 120 189</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 171 10 22 160 130 126</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 171 10 22 160 130 126</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\src\interrupt_Usart.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 102</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 134 101</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 171 10 22 160 130 126</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 171 10 22 160 130 126</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\src\main.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 104</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 152 93</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 171 10 22 160 130 126</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 171 10 22 160 130 126</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\srcIAR\Cstartup_SAM7.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 176</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 121 114</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 9 10 22 220 221</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 9 10 22 220 87 221</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcHardwareConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 173</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 123 122</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 83 82</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 83 82</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcConductor.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 112</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 110 158</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 86 72 76</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 86 72 76</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcHardware.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 162</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 180 117</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 76 83 81</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 76 83 81</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcModel.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 131</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 133 106</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 72 88 85 77</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 72 88 85 77</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcTemperatureSensor.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 165</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 187 159</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 81</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 81</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\Executor.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 181</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 149 179</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 42 57 44 46 86 59</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 42 57 44 46 86 59</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\Main.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 104</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 152 93</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 59 42 57 88 85 77 44 14 15 60 12 11 16 46 89 43 61 55 53 86 76 83 81 72</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 59 42 57 88 85 77 44 14 15 60 12 11 16 46 89 43 61 55 53 86 76 83 81 72</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\IntrinsicsWrapper.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 116</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 190 115</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 59 10 22</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 59 10 22</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\Model.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 113</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 105 148</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 57 84 87 88 77</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 57 84 87 88 77</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TemperatureCalculator.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 109</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 143 166</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 85 6 22 4 30 0 5 47 1</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 85 6 22 4 30 0 25 5 47 1</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TaskScheduler.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 156</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 188 127</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 88</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 88</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerInterruptConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 184</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 153 132</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 61 55</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 61 55</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TemperatureFilter.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 124</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 141 128</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 77 6 22 4 30 0 5 47 1</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 77 6 22 4 30 0 25 5 47 1</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerConductor.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 125</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 175 170</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 46 53 89 55</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 46 53 89 55</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 98</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 147 186</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 43 61</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 43 61</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerHardware.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 155</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 95 167</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 89 43</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 89 43</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerInterruptHandler.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 142</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 151 174</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 55 61</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 55 61</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerModel.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 157</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 137 103</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 53 88</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 53 88</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartModel.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 145</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 150 168</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 12 82 11 77 24 22 30 0 25 5 47 1 33 6 4</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartBaudRateRegisterCalculator.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 119</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 172 163</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 11</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 11</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartConductor.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 177</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 146 138</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 44 14 12 88</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 44 14 12 88</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 178</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 169 139</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 15</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 15</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartHardware.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 136</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 99 107</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 14 15 60</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 14 15 60</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartTransmitBufferStatus.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 111</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 144 161</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 16</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartPutChar.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 118</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 140 108</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 60 16</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\srcIAR\Cstartup.s</name>
+      <outputs>
+        <tool>
+          <name>AARM</name>
+          <file> 97 135</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>AARM</name>
+          <file> 222</file>
+        </tool>
+      </inputs>
+    </file>
+  </configuration>
+  <configuration>
+    <name>RAM_Debug</name>
+    <outputs>
+      <file>$PROJ_DIR$\Resource\SAM7_FLASH.mac</file>
+      <file>$TOOLKIT_DIR$\inc\DLib_Defaults.h</file>
+      <file>$TOOLKIT_DIR$\inc\DLib_Threads.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerInterruptConfigurator.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerModel.h</file>
+      <file>$TOOLKIT_DIR$\inc\ymath.h</file>
+      <file>$TOOLKIT_DIR$\inc\DLib_Product.h</file>
+      <file>$TOOLKIT_DIR$\inc\math.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerInterruptHandler.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\Executor.h</file>
+      <file>$PROJ_DIR$\incIAR\project.h</file>
+      <file>$TOOLKIT_DIR$\inc\intrinsics.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartBaudRateRegisterCalculator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartModel.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AT91SAM7X256.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartHardware.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartConfigurator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartTransmitBufferStatus.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartBaudRateRegisterCalculator.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TemperatureCalculator.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartPutChar.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TaskScheduler.h</file>
+      <file>$TOOLKIT_DIR$\lib\dl4t_tl_in.a</file>
+      <file>$TOOLKIT_DIR$\inc\ycheck.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\ModelConfig.h</file>
+      <file>$TOOLKIT_DIR$\inc\stdio.h</file>
+      <file>$TOOLKIT_DIR$\inc\DLib_Config_Normal.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartConductor.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TemperatureFilter.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\Types.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerConfigurator.h</file>
+      <file>$TOOLKIT_DIR$\inc\yvals.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartModel.h</file>
+      <file>$TOOLKIT_DIR$\lib\rt4t_al.a</file>
+      <file>$TOOLKIT_DIR$\inc\ysizet.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcConductor.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcTemperatureSensor.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerHardware.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcModel.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcHardware.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\Model.h</file>
+      <file>$TOOLKIT_DIR$\lib\shs_l.a</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartConfigurator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Executor.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerConfigurator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartConductor.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcTemperatureSensor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerConductor.h</file>
+      <file>$TOOLKIT_DIR$\inc\xencoding_limits.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\Main.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcHardwareConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcConductor.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcHardware.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerModel.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcModel.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerInterruptHandler.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\Executor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Model.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\Model.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\IntrinsicsWrapper.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartPutChar.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerInterruptConfigurator.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TemperatureFilter.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TemperatureCalculator.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TaskScheduler.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerInterruptConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerConductor.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerInterruptHandler.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerHardware.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartTransmitBufferStatus.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcModel.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerModel.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartBaudRateRegisterCalculator.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartConductor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcHardware.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TemperatureFilter.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartHardware.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartModel.c</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartPutChar.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcTemperatureSensor.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\ModelConfig.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcHardwareConfigurator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Types.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TemperatureCalculator.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcConductor.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AT91SAM7X256.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TaskScheduler.h</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerHardware.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\TimerConductor.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartTransmitBufferStatus.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\UsartHardware.h</file>
+      <file>$PROJ_DIR$\..\..\test\system\src\AdcHardwareConfigurator.h</file>
+      <file>$PROJ_DIR$\..\src\ext_irq.c</file>
+      <file>$PROJ_DIR$\..\src\interrupt_timer.c</file>
+      <file>$PROJ_DIR$\..\src\interrupt_Usart.c</file>
+      <file>$PROJ_DIR$\..\src\main.c</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\UsartConductor.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\List\AdcConductor.lst</file>
+      <file>$PROJ_DIR$\RAM_Debug\List\TimerInterruptHandler.lst</file>
+      <file>$PROJ_DIR$\RAM_Debug\List\AdcHardwareConfigurator.lst</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\TimerHardware.pbi</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\UsartHardware.pbi</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\UsartConductor.pbi</file>
+      <file>$PROJ_DIR$\RAM_Debug\List\TimerConfigurator.lst</file>
+      <file>$PROJ_DIR$\RAM_Debug\List\UsartPutChar.lst</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\TimerConductor.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\TimerConfigurator.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\UsartBaudRateRegisterCalculator.pbi</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\AdcHardwareConfigurator.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\List\AdcModel.lst</file>
+      <file>$PROJ_DIR$\RAM_Debug\List\TimerConductor.lst</file>
+      <file>$PROJ_DIR$\RAM_Debug\List\TimerHardware.lst</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\AdcHardware.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\List\TemperatureFilter.lst</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\AdcModel.pbi</file>
+      <file>$PROJ_DIR$\RAM_Debug\List\IntrinsicsWrapper.lst</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\Cstartup.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\interrupt_Usart.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\AdcHardwareConfigurator.pbi</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\main.pbi</file>
+      <file>$PROJ_DIR$\RAM_Debug\List\AdcTemperatureSensor.lst</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\TimerInterruptHandler.pbi</file>
+      <file>$PROJ_DIR$\RAM_Debug\List\Model.lst</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\Model.pbi</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\AdcHardware.pbi</file>
+      <file>$PROJ_DIR$\RAM_Debug\List\UsartBaudRateRegisterCalculator.lst</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\ext_irq.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\TimerInterruptHandler.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\List\Cstartup.lst</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\TimerConfigurator.pbi</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\Cstartup_SAM7.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\AdcTemperatureSensor.pbi</file>
+      <file>$PROJ_DIR$\RAM_Debug\List\UsartConfigurator.lst</file>
+      <file>$PROJ_DIR$\RAM_Debug\List\UsartTransmitBufferStatus.lst</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\UsartPutChar.pbi</file>
+      <file>$PROJ_DIR$\RAM_Debug\List\TaskScheduler.lst</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\interrupt_timer.pbi</file>
+      <file>$PROJ_DIR$\RAM_Debug\List\UsartHardware.lst</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\TaskScheduler.pbi</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\Cstartup_SAM7.pbi</file>
+      <file>$PROJ_DIR$\RAM_Debug\List\Cstartup_SAM7.lst</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\UsartTransmitBufferStatus.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\TimerModel.pbi</file>
+      <file>$PROJ_DIR$\RAM_Debug\List\UsartConductor.lst</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\UsartPutChar.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\TimerInterruptConfigurator.pbi</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\TimerHardware.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\AdcTemperatureSensor.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\AdcModel.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\Executor.pbi</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\TemperatureFilter.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\AdcConductor.pbi</file>
+      <file>$PROJ_DIR$\RAM_Debug\List\TimerInterruptConfigurator.lst</file>
+      <file>$PROJ_DIR$\RAM_Debug\List\UsartModel.lst</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\UsartConfigurator.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\cmock_demo.pbd</file>
+      <file>$PROJ_DIR$\RAM_Debug\Exe\cmock_demo.out</file>
+      <file>$PROJ_DIR$\srcIAR\Cstartup_SAM7.c</file>
+      <file>$PROJ_DIR$\RAM_Debug\List\TemperatureCalculator.lst</file>
+      <file>$PROJ_DIR$\RAM_Debug\List\AdcHardware.lst</file>
+      <file>$PROJ_DIR$\RAM_Debug\List\Executor.lst</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\UsartModel.pbi</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\TimerConductor.pbi</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\UsartConfigurator.pbi</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\UsartHardware.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\TemperatureCalculator.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\AdcConductor.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\IntrinsicsWrapper.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\Model.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\UsartTransmitBufferStatus.pbi</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\TimerModel.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\Executor.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\TemperatureCalculator.pbi</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\UsartBaudRateRegisterCalculator.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\TimerInterruptConfigurator.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\interrupt_Usart.pbi</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\TaskScheduler.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\Main.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\ext_irq.pbi</file>
+      <file>$PROJ_DIR$\RAM_Debug\List\Main.lst</file>
+      <file>$PROJ_DIR$\RAM_Debug\List\TimerModel.lst</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\interrupt_timer.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\UsartModel.o</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\TemperatureFilter.pbi</file>
+      <file>$PROJ_DIR$\RAM_Debug\Obj\IntrinsicsWrapper.pbi</file>
+      <file>$PROJ_DIR$\Resource\at91SAM7X256_RAM.icf</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcHardwareConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcConductor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcHardware.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcModel.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\AdcTemperatureSensor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Executor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Main.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\IntrinsicsWrapper.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\Model.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TemperatureCalculator.c</file>
+      <file>$PROJ_DIR$\Resource\SAM7_RAM.mac</file>
+      <file>$PROJ_DIR$\Resource\at91SAM7X256_FLASH.icf</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TaskScheduler.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerInterruptConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TemperatureFilter.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerConductor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerHardware.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerInterruptHandler.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\TimerModel.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartModel.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartBaudRateRegisterCalculator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartConductor.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartConfigurator.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartHardware.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartTransmitBufferStatus.c</file>
+      <file>$PROJ_DIR$\..\..\examples\src\UsartPutChar.c</file>
+      <file>$PROJ_DIR$\srcIAR\Cstartup.s</file>
+      <file>$PROJ_DIR$\incIAR\AT91SAM7X-EK.h</file>
+      <file>$PROJ_DIR$\incIAR\lib_AT91SAM7X256.h</file>
+      <file>$PROJ_DIR$\incIAR\AT91SAM7X256_inc.h</file>
+    </outputs>
+    <file>
+      <name>[ROOT_NODE]</name>
+      <outputs>
+        <tool>
+          <name>ILINK</name>
+          <file> 158</file>
+        </tool>
+      </outputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\AdcTemperatureSensor.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 133</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 122 149</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 29 14 36</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 29 14 36</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\Main.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 121</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 181 179</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 29 14 9 40 21 19 28 27 92 42 20 32 18 91 90 37 30 3 8 4 35 39 93 36 38</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 29 14 9 40 21 19 28 27 92 42 20 32 18 91 90 37 30 3 8 4 35 39 93 36 38</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\AdcHardwareConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 120</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 101 110</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 29 14 93 24</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 29 14 93 24</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\AdcConductor.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 153</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 99 168</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 29 14 35 38 39</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 29 14 35 38 39</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\AdcHardware.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 126</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 161 114</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 29 14 39 93 36</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 29 14 39 93 36</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\AdcModel.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 116</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 111 150</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 29 14 38 21 19 28</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 29 14 38 21 19 28</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\Executor.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 151</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 162 173</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 29 14 9 40 27 90 35 11 23</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 29 14 9 40 27 90 35 11 23</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\Model.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 125</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 124 170</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 40 29 14 21 28</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 40 29 14 21 28</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\TemperatureFilter.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 185</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 115 152</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 29 14 28 7 23 5 31 1 6 48 2</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 29 14 28 7 23 5 31 1 26 6 48 2</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\TimerConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 131</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 105 108</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 29 14 30 3</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 29 14 30 3</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\TemperatureCalculator.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 174</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 160 167</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 29 14 19 7 23 5 31 1 6 48 2</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 29 14 19 7 23 5 31 1 26 6 48 2</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\TaskScheduler.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 140</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 137 178</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 29 14 21</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 29 14 21</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\TimerInterruptConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 147</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 154 176</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 29 14 3 8</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 29 14 3 8</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\TimerConductor.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 164</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 112 107</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 29 14 90 4 37 8</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 29 14 90 4 37 8</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\TimerInterruptHandler.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 123</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 100 129</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 29 14 8 3</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 29 14 8 3</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\UsartConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 165</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 134 156</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 29 14 42</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 29 14 42</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\TimerHardware.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 102</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 113 148</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 29 14 37 30</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 29 14 37 30</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\UsartTransmitBufferStatus.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 171</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 135 143</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 29 14 91</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 29 14 91</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\TimerModel.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 144</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 182 172</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 29 14 4 21</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 29 14 4 21</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\UsartBaudRateRegisterCalculator.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 109</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 127 175</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 29 14 18</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 29 14 18</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\UsartConductor.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 104</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 145 98</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 29 14 27 92 32 21</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 29 14 27 92 32 21</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\UsartHardware.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 103</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 139 166</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 29 14 92 42 20</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 29 14 92 42 20</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\UsartModel.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 163</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 155 184</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 29 14 32 24 18 28 25 23 31 1 6 48 2 34 7 5</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 29 14 32 24 18 28 25 23 31 1 26 6 48 2 34 7 5</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\test\system\src\UsartPutChar.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 136</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 106 146</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 29 14 20 91</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 29 14 20 91</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\src\ext_irq.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 180</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 128</file>
+        </tool>
+      </outputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\src\interrupt_timer.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 138</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 183</file>
+        </tool>
+      </outputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\src\interrupt_Usart.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 177</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 119</file>
+        </tool>
+      </outputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\src\main.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 121</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 179</file>
+        </tool>
+      </outputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\RAM_Debug\Obj\cmock_demo.pbd</name>
+      <inputs>
+        <tool>
+          <name>BILINK</name>
+          <file> 153 126 120 116 133 141 151 186 125 140 174 185 164 131 102 147 123 144 109 104 165 103 163 136 171 121</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\RAM_Debug\Exe\cmock_demo.out</name>
+      <inputs>
+        <tool>
+          <name>ILINK</name>
+          <file> 187 168 114 110 150 149 118 132 173 169 179 170 178 167 152 107 108 148 176 129 172 175 98 156 166 184 146 143 41 33 22</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\srcIAR\Cstartup_SAM7.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 141</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 142 132</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 10 11 23 216 87 217</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 10 11 23 216 87 217</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcHardwareConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 120</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 101 110</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 83 82</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 83 82</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcConductor.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 153</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 99 168</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 86 72 76</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 86 72 76</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcHardware.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 126</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 161 114</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 76 83 81</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 76 83 81</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcModel.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 116</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 111 150</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 72 88 85 77</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 72 88 85 77</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcTemperatureSensor.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 133</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 122 149</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 81</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 81</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\Executor.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 151</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 162 173</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 43 57 45 47 86 59</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 43 57 45 47 86 59</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\Main.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 121</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 181 179</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 59 43 57 88 85 77 45 15 16 60 13 12 17 47 89 44 61 55 53 86 76 83 81 72</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 59 43 57 88 85 77 45 15 16 60 13 12 17 47 89 44 61 55 53 86 76 83 81 72</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\IntrinsicsWrapper.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 186</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 117 169</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 59 11 23</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 59 11 23</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\Model.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 125</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 124 170</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 57 84 87 88 77</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 57 84 87 88 77</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TemperatureCalculator.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 174</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 160 167</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 85 7 23 5 31 1 6 48 2</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 85 7 23 5 31 1 26 6 48 2</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TaskScheduler.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 140</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 137 178</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 88</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 88</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerInterruptConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 147</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 154 176</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 61 55</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 61 55</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TemperatureFilter.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 185</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 115 152</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 77 7 23 5 31 1 6 48 2</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 77 7 23 5 31 1 26 6 48 2</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerConductor.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 164</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 112 107</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 47 53 89 55</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 47 53 89 55</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 131</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 105 108</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 44 61</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 44 61</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerHardware.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 102</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 113 148</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 89 44</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 89 44</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerInterruptHandler.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 123</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 100 129</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 55 61</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 55 61</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerModel.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 144</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 182 172</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 53 88</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 53 88</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartModel.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 163</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 155 184</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 13 82 12 77 25 23 31 1 6 48 2 34 7 5</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 13 82 12 77 25 23 31 1 26 6 48 2 34 7 5</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartBaudRateRegisterCalculator.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 109</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 127 175</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 12</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 12</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartConductor.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 104</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 145 98</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 45 15 13 88</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 45 15 13 88</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartConfigurator.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 165</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 134 156</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 16</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 16</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartHardware.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 103</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 139 166</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 15 16 60</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 15 16 60</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartTransmitBufferStatus.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 171</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 135 143</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 17</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 17</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartPutChar.c</name>
+      <outputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 136</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 106 146</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>BICOMP</name>
+          <file> 84 87 60 17</file>
+        </tool>
+        <tool>
+          <name>ICCARM</name>
+          <file> 84 87 60 17</file>
+        </tool>
+      </inputs>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\srcIAR\Cstartup.s</name>
+      <outputs>
+        <tool>
+          <name>AARM</name>
+          <file> 118 130</file>
+        </tool>
+      </outputs>
+      <inputs>
+        <tool>
+          <name>AARM</name>
+          <file> 218</file>
+        </tool>
+      </inputs>
+    </file>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\src\ext_irq.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\src\interrupt_timer.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\src\interrupt_Usart.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+    <forcedrebuild>
+      <name>$PROJ_DIR$\..\src\main.c</name>
+      <tool>ICCARM</tool>
+    </forcedrebuild>
+  </configuration>
+</project>
+
+
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/cmock_demo.ewd b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/cmock_demo.ewd
new file mode 100644
index 000000000..2d881366b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/cmock_demo.ewd
@@ -0,0 +1,1906 @@
+<?xml version="1.0" encoding="iso-8859-1"?>

+

+<project>

+  <fileVersion>2</fileVersion>

+  <configuration>

+    <name>RAM_Debug</name>

+    <toolchain>

+      <name>ARM</name>

+    </toolchain>

+    <debug>1</debug>

+    <settings>

+      <name>C-SPY</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>18</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>CInput</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CEndian</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CProcessor</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>OCVariant</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>MacOverride</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>MacFile</name>

+          <state>$PROJ_DIR$\Resource\SAM7_RAM.mac</state>

+        </option>

+        <option>

+          <name>MemOverride</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>MemFile</name>

+          <state>$TOOLKIT_DIR$\CONFIG\debugger\Atmel\ioAT91SAM7X256.ddf</state>

+        </option>

+        <option>

+          <name>RunToEnable</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>RunToName</name>

+          <state>main</state>

+        </option>

+        <option>

+          <name>CExtraOptionsCheck</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CExtraOptions</name>

+          <state></state>

+        </option>

+        <option>

+          <name>CFpuProcessor</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>OCDDFArgumentProducer</name>

+          <state></state>

+        </option>

+        <option>

+          <name>OCDownloadSuppressDownload</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCDownloadVerifyAll</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>OCProductVersion</name>

+          <state>4.30A</state>

+        </option>

+        <option>

+          <name>OCDynDriverList</name>

+          <state>JLINK_ID</state>

+        </option>

+        <option>

+          <name>OCLastSavedByProductVersion</name>

+          <state>5.20.0.50986</state>

+        </option>

+        <option>

+          <name>OCDownloadAttachToProgram</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>UseFlashLoader</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CLowLevel</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>OCBE8Slave</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>MacFile2</name>

+          <state></state>

+        </option>

+        <option>

+          <name>CDevice</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>FlashLoadersV2</name>

+          <state>,,,,(default),ATMEL</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>ARMSIM_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>1</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>OCSimDriverInfo</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>OCSimEnablePSP</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCSimPspOverrideConfig</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCSimPspConfigFile</name>

+          <state></state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>ANGEL_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>0</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>CCAngelHeartbeat</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CAngelCommunication</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CAngelCommBaud</name>

+          <version>0</version>

+          <state>3</state>

+        </option>

+        <option>

+          <name>CAngelCommPort</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>ANGELTCPIP</name>

+          <state>aaa.bbb.ccc.ddd</state>

+        </option>

+        <option>

+          <name>DoAngelLogfile</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>AngelLogFile</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>GDBSERVER_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>0</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>TCPIP</name>

+          <state>aaa.bbb.ccc.ddd</state>

+        </option>

+        <option>

+          <name>DoLogfile</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>LogFile</name>

+          <state>$PROJ_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>CCJTagBreakpointRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJTagDoUpdateBreakpoints</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJTagUpdateBreakpoints</name>

+          <state>main</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>IARROM_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>0</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>CRomLogFileCheck</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CRomLogFileEditB</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>CRomCommunication</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CRomCommPort</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CRomCommBaud</name>

+          <version>0</version>

+          <state>7</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>JLINK_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>10</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>JLinkSpeed</name>

+          <state>32</state>

+        </option>

+        <option>

+          <name>CCJLinkDoLogfile</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkLogFile</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>CCJLinkHWResetDelay</name>

+          <state>500</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>JLinkInitialSpeed</name>

+          <state>32</state>

+        </option>

+        <option>

+          <name>CCDoJlinkMultiTarget</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCScanChainNonARMDevices</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkMultiTarget</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkIRLength</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkCommRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkTCPIP</name>

+          <state>aaa.bbb.ccc.ddd</state>

+        </option>

+        <option>

+          <name>CCJLinkSpeedRadioV2</name>

+          <state>2</state>

+        </option>

+        <option>

+          <name>CCUSBDevice</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchReset</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchUndef</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchSWI</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchData</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchPrefetch</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchIRQ</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchFIQ</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkBreakpointRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkDoUpdateBreakpoints</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkUpdateBreakpoints</name>

+          <state>main</state>

+        </option>

+        <option>

+          <name>CCJLinkInterfaceRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCJLinkAttachSlave</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CCJLinkResetList</name>

+          <version>0</version>

+          <state>5</state>

+        </option>

+        <option>

+          <name>CCJLinkInterfaceCmdLine</name>

+          <state>0</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>LMIFTDI_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>1</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>LmiftdiSpeed</name>

+          <state>500</state>

+        </option>

+        <option>

+          <name>CCLmiftdiDoLogfile</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCLmiftdiLogFile</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>MACRAIGOR_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>3</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>jtag</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>EmuSpeed</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>TCPIP</name>

+          <state>aaa.bbb.ccc.ddd</state>

+        </option>

+        <option>

+          <name>DoLogfile</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>LogFile</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>DoEmuMultiTarget</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>EmuMultiTarget</name>

+          <state>0@ARM7TDMI</state>

+        </option>

+        <option>

+          <name>EmuHWReset</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CEmuCommBaud</name>

+          <version>0</version>

+          <state>4</state>

+        </option>

+        <option>

+          <name>CEmuCommPort</name>

+          <version>0</version>

+          <state>4</state>

+        </option>

+        <option>

+          <name>jtago</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>UnusedAddr</name>

+          <state>0x00800000</state>

+        </option>

+        <option>

+          <name>CCMacraigorHWResetDelay</name>

+          <state></state>

+        </option>

+        <option>

+          <name>CCJTagBreakpointRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJTagDoUpdateBreakpoints</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJTagUpdateBreakpoints</name>

+          <state>main</state>

+        </option>

+        <option>

+          <name>CCMacraigorInterfaceRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCMacraigorInterfaceCmdLine</name>

+          <state>0</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>RDI_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>1</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>CRDIDriverDll</name>

+          <state>Browse to your RDI driver</state>

+        </option>

+        <option>

+          <name>CRDILogFileCheck</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CRDILogFileEdit</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>CCRDIHWReset</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchReset</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchUndef</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchSWI</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchData</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchPrefetch</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchIRQ</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchFIQ</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDIUseETM</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>THIRDPARTY_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>0</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>CThirdPartyDriverDll</name>

+          <state>Browse to your third-party driver</state>

+        </option>

+        <option>

+          <name>CThirdPartyLogFileCheck</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CThirdPartyLogFileEditB</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <debuggerPlugins>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>

+        <loadFlag>1</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin</file>

+        <loadFlag>1</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin</file>

+        <loadFlag>1</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$EW_DIR$\common\plugins\SymList\SymList.ENU.ewplugin</file>

+        <loadFlag>1</loadFlag>

+      </plugin>

+    </debuggerPlugins>

+  </configuration>

+  <configuration>

+    <name>FLASH_Debug</name>

+    <toolchain>

+      <name>ARM</name>

+    </toolchain>

+    <debug>1</debug>

+    <settings>

+      <name>C-SPY</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>18</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>CInput</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CEndian</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CProcessor</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>OCVariant</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>MacOverride</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>MacFile</name>

+          <state>$PROJ_DIR$\Resource\SAM7_FLASH.mac</state>

+        </option>

+        <option>

+          <name>MemOverride</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>MemFile</name>

+          <state>$TOOLKIT_DIR$\CONFIG\debugger\Atmel\ioAT91SAM7X256.ddf</state>

+        </option>

+        <option>

+          <name>RunToEnable</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>RunToName</name>

+          <state>main</state>

+        </option>

+        <option>

+          <name>CExtraOptionsCheck</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CExtraOptions</name>

+          <state></state>

+        </option>

+        <option>

+          <name>CFpuProcessor</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>OCDDFArgumentProducer</name>

+          <state></state>

+        </option>

+        <option>

+          <name>OCDownloadSuppressDownload</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCDownloadVerifyAll</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>OCProductVersion</name>

+          <state>4.30A</state>

+        </option>

+        <option>

+          <name>OCDynDriverList</name>

+          <state>JLINK_ID</state>

+        </option>

+        <option>

+          <name>OCLastSavedByProductVersion</name>

+          <state>5.20.0.50986</state>

+        </option>

+        <option>

+          <name>OCDownloadAttachToProgram</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>UseFlashLoader</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CLowLevel</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>OCBE8Slave</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>MacFile2</name>

+          <state></state>

+        </option>

+        <option>

+          <name>CDevice</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>FlashLoadersV2</name>

+          <state>,,,,(default),</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>ARMSIM_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>1</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>OCSimDriverInfo</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>OCSimEnablePSP</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCSimPspOverrideConfig</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCSimPspConfigFile</name>

+          <state></state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>ANGEL_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>0</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>CCAngelHeartbeat</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CAngelCommunication</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CAngelCommBaud</name>

+          <version>0</version>

+          <state>3</state>

+        </option>

+        <option>

+          <name>CAngelCommPort</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>ANGELTCPIP</name>

+          <state>aaa.bbb.ccc.ddd</state>

+        </option>

+        <option>

+          <name>DoAngelLogfile</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>AngelLogFile</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>GDBSERVER_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>0</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>TCPIP</name>

+          <state>aaa.bbb.ccc.ddd</state>

+        </option>

+        <option>

+          <name>DoLogfile</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>LogFile</name>

+          <state>$PROJ_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>CCJTagBreakpointRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJTagDoUpdateBreakpoints</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJTagUpdateBreakpoints</name>

+          <state>main</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>IARROM_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>0</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>CRomLogFileCheck</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CRomLogFileEditB</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>CRomCommunication</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CRomCommPort</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CRomCommBaud</name>

+          <version>0</version>

+          <state>7</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>JLINK_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>10</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>JLinkSpeed</name>

+          <state>32</state>

+        </option>

+        <option>

+          <name>CCJLinkDoLogfile</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkLogFile</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>CCJLinkHWResetDelay</name>

+          <state>50</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>JLinkInitialSpeed</name>

+          <state>32</state>

+        </option>

+        <option>

+          <name>CCDoJlinkMultiTarget</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCScanChainNonARMDevices</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkMultiTarget</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkIRLength</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkCommRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkTCPIP</name>

+          <state>aaa.bbb.ccc.ddd</state>

+        </option>

+        <option>

+          <name>CCJLinkSpeedRadioV2</name>

+          <state>2</state>

+        </option>

+        <option>

+          <name>CCUSBDevice</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchReset</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchUndef</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchSWI</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchData</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchPrefetch</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchIRQ</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchFIQ</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkBreakpointRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkDoUpdateBreakpoints</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkUpdateBreakpoints</name>

+          <state>main</state>

+        </option>

+        <option>

+          <name>CCJLinkInterfaceRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCJLinkAttachSlave</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CCJLinkResetList</name>

+          <version>0</version>

+          <state>5</state>

+        </option>

+        <option>

+          <name>CCJLinkInterfaceCmdLine</name>

+          <state>0</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>LMIFTDI_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>1</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>LmiftdiSpeed</name>

+          <state>500</state>

+        </option>

+        <option>

+          <name>CCLmiftdiDoLogfile</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCLmiftdiLogFile</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>MACRAIGOR_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>3</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>jtag</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>EmuSpeed</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>TCPIP</name>

+          <state>aaa.bbb.ccc.ddd</state>

+        </option>

+        <option>

+          <name>DoLogfile</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>LogFile</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>DoEmuMultiTarget</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>EmuMultiTarget</name>

+          <state>0@ARM7TDMI</state>

+        </option>

+        <option>

+          <name>EmuHWReset</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CEmuCommBaud</name>

+          <version>0</version>

+          <state>4</state>

+        </option>

+        <option>

+          <name>CEmuCommPort</name>

+          <version>0</version>

+          <state>4</state>

+        </option>

+        <option>

+          <name>jtago</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>UnusedAddr</name>

+          <state>0x00800000</state>

+        </option>

+        <option>

+          <name>CCMacraigorHWResetDelay</name>

+          <state></state>

+        </option>

+        <option>

+          <name>CCJTagBreakpointRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJTagDoUpdateBreakpoints</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJTagUpdateBreakpoints</name>

+          <state>main</state>

+        </option>

+        <option>

+          <name>CCMacraigorInterfaceRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCMacraigorInterfaceCmdLine</name>

+          <state>0</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>RDI_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>1</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>CRDIDriverDll</name>

+          <state>Browse to your RDI driver</state>

+        </option>

+        <option>

+          <name>CRDILogFileCheck</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CRDILogFileEdit</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>CCRDIHWReset</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchReset</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchUndef</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchSWI</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchData</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchPrefetch</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchIRQ</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchFIQ</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDIUseETM</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>THIRDPARTY_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>0</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>CThirdPartyDriverDll</name>

+          <state>Browse to your third-party driver</state>

+        </option>

+        <option>

+          <name>CThirdPartyLogFileCheck</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CThirdPartyLogFileEditB</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <debuggerPlugins>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>

+        <loadFlag>1</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin</file>

+        <loadFlag>1</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin</file>

+        <loadFlag>1</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$EW_DIR$\common\plugins\SymList\SymList.ENU.ewplugin</file>

+        <loadFlag>1</loadFlag>

+      </plugin>

+    </debuggerPlugins>

+  </configuration>

+  <configuration>

+    <name>Binary</name>

+    <toolchain>

+      <name>ARM</name>

+    </toolchain>

+    <debug>1</debug>

+    <settings>

+      <name>C-SPY</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>18</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>CInput</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CEndian</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CProcessor</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>OCVariant</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>MacOverride</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>MacFile</name>

+          <state>$PROJ_DIR$\Resource\SAM7_FLASH.mac</state>

+        </option>

+        <option>

+          <name>MemOverride</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>MemFile</name>

+          <state>$TOOLKIT_DIR$\CONFIG\debugger\Atmel\ioAT91SAM7X256.ddf</state>

+        </option>

+        <option>

+          <name>RunToEnable</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>RunToName</name>

+          <state>main</state>

+        </option>

+        <option>

+          <name>CExtraOptionsCheck</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CExtraOptions</name>

+          <state></state>

+        </option>

+        <option>

+          <name>CFpuProcessor</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>OCDDFArgumentProducer</name>

+          <state></state>

+        </option>

+        <option>

+          <name>OCDownloadSuppressDownload</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCDownloadVerifyAll</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>OCProductVersion</name>

+          <state>4.30A</state>

+        </option>

+        <option>

+          <name>OCDynDriverList</name>

+          <state>JLINK_ID</state>

+        </option>

+        <option>

+          <name>OCLastSavedByProductVersion</name>

+          <state>5.20.0.50986</state>

+        </option>

+        <option>

+          <name>OCDownloadAttachToProgram</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>UseFlashLoader</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CLowLevel</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>OCBE8Slave</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>MacFile2</name>

+          <state></state>

+        </option>

+        <option>

+          <name>CDevice</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>FlashLoadersV2</name>

+          <state>,,,,(default),</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>ARMSIM_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>1</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>OCSimDriverInfo</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>OCSimEnablePSP</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCSimPspOverrideConfig</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCSimPspConfigFile</name>

+          <state></state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>ANGEL_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>0</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>CCAngelHeartbeat</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CAngelCommunication</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CAngelCommBaud</name>

+          <version>0</version>

+          <state>3</state>

+        </option>

+        <option>

+          <name>CAngelCommPort</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>ANGELTCPIP</name>

+          <state>aaa.bbb.ccc.ddd</state>

+        </option>

+        <option>

+          <name>DoAngelLogfile</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>AngelLogFile</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>GDBSERVER_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>0</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>TCPIP</name>

+          <state>aaa.bbb.ccc.ddd</state>

+        </option>

+        <option>

+          <name>DoLogfile</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>LogFile</name>

+          <state>$PROJ_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>CCJTagBreakpointRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJTagDoUpdateBreakpoints</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJTagUpdateBreakpoints</name>

+          <state>main</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>IARROM_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>0</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>CRomLogFileCheck</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CRomLogFileEditB</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>CRomCommunication</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CRomCommPort</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CRomCommBaud</name>

+          <version>0</version>

+          <state>7</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>JLINK_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>10</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>JLinkSpeed</name>

+          <state>32</state>

+        </option>

+        <option>

+          <name>CCJLinkDoLogfile</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkLogFile</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>CCJLinkHWResetDelay</name>

+          <state>50</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>JLinkInitialSpeed</name>

+          <state>32</state>

+        </option>

+        <option>

+          <name>CCDoJlinkMultiTarget</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCScanChainNonARMDevices</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkMultiTarget</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkIRLength</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkCommRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkTCPIP</name>

+          <state>aaa.bbb.ccc.ddd</state>

+        </option>

+        <option>

+          <name>CCJLinkSpeedRadioV2</name>

+          <state>2</state>

+        </option>

+        <option>

+          <name>CCUSBDevice</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchReset</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchUndef</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchSWI</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchData</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchPrefetch</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchIRQ</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchFIQ</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkBreakpointRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkDoUpdateBreakpoints</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJLinkUpdateBreakpoints</name>

+          <state>main</state>

+        </option>

+        <option>

+          <name>CCJLinkInterfaceRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCJLinkAttachSlave</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>CCJLinkResetList</name>

+          <version>0</version>

+          <state>5</state>

+        </option>

+        <option>

+          <name>CCJLinkInterfaceCmdLine</name>

+          <state>0</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>LMIFTDI_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>1</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>LmiftdiSpeed</name>

+          <state>500</state>

+        </option>

+        <option>

+          <name>CCLmiftdiDoLogfile</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCLmiftdiLogFile</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>MACRAIGOR_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>3</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>jtag</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>EmuSpeed</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>TCPIP</name>

+          <state>aaa.bbb.ccc.ddd</state>

+        </option>

+        <option>

+          <name>DoLogfile</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>LogFile</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>DoEmuMultiTarget</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>EmuMultiTarget</name>

+          <state>0@ARM7TDMI</state>

+        </option>

+        <option>

+          <name>EmuHWReset</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CEmuCommBaud</name>

+          <version>0</version>

+          <state>4</state>

+        </option>

+        <option>

+          <name>CEmuCommPort</name>

+          <version>0</version>

+          <state>4</state>

+        </option>

+        <option>

+          <name>jtago</name>

+          <version>0</version>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+        <option>

+          <name>UnusedAddr</name>

+          <state>0x00800000</state>

+        </option>

+        <option>

+          <name>CCMacraigorHWResetDelay</name>

+          <state></state>

+        </option>

+        <option>

+          <name>CCJTagBreakpointRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJTagDoUpdateBreakpoints</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCJTagUpdateBreakpoints</name>

+          <state>main</state>

+        </option>

+        <option>

+          <name>CCMacraigorInterfaceRadio</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCMacraigorInterfaceCmdLine</name>

+          <state>0</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>RDI_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>1</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>CRDIDriverDll</name>

+          <state>Browse to your RDI driver</state>

+        </option>

+        <option>

+          <name>CRDILogFileCheck</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CRDILogFileEdit</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>CCRDIHWReset</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchReset</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchUndef</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchSWI</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchData</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchPrefetch</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchIRQ</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDICatchFIQ</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CCRDIUseETM</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <settings>

+      <name>THIRDPARTY_ID</name>

+      <archiveVersion>2</archiveVersion>

+      <data>

+        <version>0</version>

+        <wantNonLocal>1</wantNonLocal>

+        <debug>1</debug>

+        <option>

+          <name>CThirdPartyDriverDll</name>

+          <state>Browse to your third-party driver</state>

+        </option>

+        <option>

+          <name>CThirdPartyLogFileCheck</name>

+          <state>0</state>

+        </option>

+        <option>

+          <name>CThirdPartyLogFileEditB</name>

+          <state>$TOOLKIT_DIR$\cspycomm.log</state>

+        </option>

+        <option>

+          <name>OCDriverInfo</name>

+          <state>1</state>

+        </option>

+      </data>

+    </settings>

+    <debuggerPlugins>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\OSE\OseEpsilonPlugin.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\PowerPac\PowerPacRTOS.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>

+        <loadFlag>1</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>

+        <loadFlag>0</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$EW_DIR$\common\plugins\Profiling\Profiling.ENU.ewplugin</file>

+        <loadFlag>1</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$EW_DIR$\common\plugins\Stack\Stack.ENU.ewplugin</file>

+        <loadFlag>1</loadFlag>

+      </plugin>

+      <plugin>

+        <file>$EW_DIR$\common\plugins\SymList\SymList.ENU.ewplugin</file>

+        <loadFlag>1</loadFlag>

+      </plugin>

+    </debuggerPlugins>

+  </configuration>

+</project>

+

+

diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/cmock_demo.ewp b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/cmock_demo.ewp
new file mode 100644
index 000000000..4524d9107
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/cmock_demo.ewp
@@ -0,0 +1,2426 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<project>
+  <fileVersion>2</fileVersion>
+  <configuration>
+    <name>RAM_Debug</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>16</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>RAM_Debug\Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>RAM_Debug\Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>RAM_Debug\List</state>
+        </option>
+        <option>
+          <name>Variant</name>
+          <version>8</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input variant</name>
+          <version>1</version>
+          <state>3</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing.</state>
+        </option>
+        <option>
+          <name>Output variant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FPU</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>RTConfigPath</name>
+          <state>$TOOLKIT_DIR$\INC\DLib_Config_Normal.h</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.30A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>5.20.0.50986</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>AT91SAM7X256	Atmel AT91SAM7X256</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>20</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>0000000</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCMultibyteSupport</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLangSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$\..\..\examples\src</state>
+          <state>$PROJ_DIR$\incIAR</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCStdIncludePath</name>
+          <state>$TOOLKIT_DIR$\INC\</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IInterwork2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>7</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>ADebug</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AltRegisterNames</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ADefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AList</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AListHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AListing</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Includes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacDefs</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacExps</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacExec</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OnlyAssed</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MultiLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLengthCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLength</name>
+          <state>80</state>
+        </option>
+        <option>
+          <name>TabSpacing</name>
+          <state>8</state>
+        </option>
+        <option>
+          <name>AXRef</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDefines</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefInternal</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDual</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>AMultibyteSupport</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
+        </option>
+        <option>
+          <name>AIgnoreStdInclude</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AStdIncludes</name>
+          <state>$TOOLKIT_DIR$\INC\</state>
+        </option>
+        <option>
+          <name>AUserIncludes</name>
+          <state>$PROJ_DIR$\incIAR</state>
+        </option>
+        <option>
+          <name>AExtraOptionsCheckV2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>OBJCOPY</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OOCOutputFormat</name>
+          <version>2</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCOutputOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OOCOutputFile</name>
+          <state>cmock_demo.srec</state>
+        </option>
+        <option>
+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>CUSTOM</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <extensions></extensions>
+        <cmdline></cmdline>
+      </data>
+    </settings>
+    <settings>
+      <name>BICOMP</name>
+      <archiveVersion>0</archiveVersion>
+      <data/>
+    </settings>
+    <settings>
+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
+      <data>
+        <prebuild></prebuild>
+        <postbuild></postbuild>
+      </data>
+    </settings>
+    <settings>
+      <name>ILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>6</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IlinkLibIOConfig</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>XLinkMisraHandler</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOutputFile</name>
+          <state>cmock_demo.out</state>
+        </option>
+        <option>
+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkKeepSymbols</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySymbol</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySegment</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryAlign</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkMapFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$\Resource\at91SAM7X256_RAM.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>IlinkNXPLPCChecksum</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlgo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data/>
+    </settings>
+  </configuration>
+  <configuration>
+    <name>FLASH_Debug</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>1</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>16</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>ExePath</name>
+          <state>FLASH_Debug\Exe</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>FLASH_Debug\Obj</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>FLASH_Debug\List</state>
+        </option>
+        <option>
+          <name>Variant</name>
+          <version>8</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input variant</name>
+          <version>1</version>
+          <state>3</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>No specifier n, no float nor long long, no scan set, no assignment suppressing.</state>
+        </option>
+        <option>
+          <name>Output variant</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>No specifier a, A.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FPU</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the normal configuration of the C/C++ runtime library. No locale interface, C locale, no file descriptor support, no multibytes in printf and scanf, and no hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>RTConfigPath</name>
+          <state>$TOOLKIT_DIR$\INC\DLib_Config_Normal.h</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>4.30A</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>5.20.0.50986</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>AT91SAM7X256	Atmel AT91SAM7X256</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>20</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>CCDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>0000000</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCMultibyteSupport</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLangSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$\..\..\examples\src\</state>
+          <state>$PROJ_DIR$\incIAR</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCStdIncludePath</name>
+          <state>$TOOLKIT_DIR$\INC\</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IInterwork2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>7</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>ADebug</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AltRegisterNames</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ADefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AList</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AListHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AListing</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Includes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacDefs</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacExps</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacExec</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OnlyAssed</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MultiLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLengthCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLength</name>
+          <state>80</state>
+        </option>
+        <option>
+          <name>TabSpacing</name>
+          <state>8</state>
+        </option>
+        <option>
+          <name>AXRef</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDefines</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefInternal</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDual</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>AMultibyteSupport</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
+        </option>
+        <option>
+          <name>AIgnoreStdInclude</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AStdIncludes</name>
+          <state>$TOOLKIT_DIR$\INC\</state>
+        </option>
+        <option>
+          <name>AUserIncludes</name>
+          <state>$PROJ_DIR$\incIAR</state>
+        </option>
+        <option>
+          <name>AExtraOptionsCheckV2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>OBJCOPY</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>OOCOutputFormat</name>
+          <version>2</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCOutputOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OOCOutputFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>CUSTOM</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <extensions></extensions>
+        <cmdline></cmdline>
+      </data>
+    </settings>
+    <settings>
+      <name>BICOMP</name>
+      <archiveVersion>0</archiveVersion>
+      <data/>
+    </settings>
+    <settings>
+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
+      <data>
+        <prebuild></prebuild>
+        <postbuild></postbuild>
+      </data>
+    </settings>
+    <settings>
+      <name>ILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>6</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IlinkLibIOConfig</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>XLinkMisraHandler</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOutputFile</name>
+          <state>cmock_demo.out</state>
+        </option>
+        <option>
+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkKeepSymbols</name>
+          <state></state>
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+          <state></state>
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+          <state>1</state>
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+          <state>1</state>
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+          <name>IlinkAdditionalLibs</name>
+          <state></state>
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+          <state>__iar_program_start</state>
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+          <state>1</state>
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+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
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+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
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+          <state>Binary\Obj</state>
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+          <state>Binary\List</state>
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+          <state></state>
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+          <state></state>
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+          <state>80</state>
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+          <state>8</state>
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+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+          <state>$PROJ_DIR$\Resource\at91SAM7X256_FLASH.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>IlinkNXPLPCChecksum</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlgo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>1</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data/>
+    </settings>
+  </configuration>
+  <mfc>
+    <configuration>Binary</configuration>
+  </mfc>
+  <group>
+    <name>Resource</name>
+    <file>
+      <name>$PROJ_DIR$\Resource\at91SAM7X256_FLASH.icf</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\Resource\at91SAM7X256_RAM.icf</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\Resource\SAM7_FLASH.mac</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\Resource\SAM7_RAM.mac</name>
+    </file>
+  </group>
+  <group>
+    <name>Source</name>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcConductor.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcHardware.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcHardwareConfigurator.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcModel.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\AdcTemperatureSensor.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\Executor.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\IntrinsicsWrapper.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\Main.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\Model.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TaskScheduler.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TemperatureCalculator.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TemperatureFilter.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerConductor.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerConfigurator.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerHardware.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerInterruptConfigurator.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerInterruptHandler.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\TimerModel.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartBaudRateRegisterCalculator.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartConductor.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartConfigurator.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartHardware.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartModel.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartPutChar.c</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\..\..\examples\src\UsartTransmitBufferStatus.c</name>
+    </file>
+  </group>
+  <group>
+    <name>Startup</name>
+    <file>
+      <name>$PROJ_DIR$\srcIAR\Cstartup.s</name>
+    </file>
+    <file>
+      <name>$PROJ_DIR$\srcIAR\Cstartup_SAM7.c</name>
+    </file>
+  </group>
+</project>
+
+
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/cmock_demo.eww b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/cmock_demo.eww
new file mode 100644
index 000000000..cbf8dd8de
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/cmock_demo.eww
@@ -0,0 +1,26 @@
+<?xml version="1.0" encoding="iso-8859-1"?>

+

+<workspace>

+  <project>

+    <path>$WS_DIR$\cmock_demo.ewp</path>

+  </project>

+  <batchBuild>

+    <batchDefinition>

+      <name>All</name>

+      <member>

+        <project>cmock_demo</project>

+        <configuration>Binary</configuration>

+      </member>

+      <member>

+        <project>cmock_demo</project>

+        <configuration>FLASH_Debug</configuration>

+      </member>

+      <member>

+        <project>cmock_demo</project>

+        <configuration>RAM_Debug</configuration>

+      </member>

+    </batchDefinition>

+  </batchBuild>

+</workspace>

+

+

diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/incIAR/AT91SAM7X-EK.h b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/incIAR/AT91SAM7X-EK.h
new file mode 100644
index 000000000..98346759b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/incIAR/AT91SAM7X-EK.h
@@ -0,0 +1,61 @@
+// ----------------------------------------------------------------------------
+//         ATMEL Microcontroller Software Support  -  ROUSSET  -
+// ----------------------------------------------------------------------------
+// DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+// IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+// DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+// OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+// EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+// ----------------------------------------------------------------------------
+// File Name           : AT91SAM7X-EK.h
+// Object              : AT91SAM7X-EK Evaluation Board Features Definition File
+//
+//  ----------------------------------------------------------------------------
+
+#ifndef AT91SAM7X_EK_H
+#define AT91SAM7X_EK_H
+
+/*-----------------*/
+/* LEDs Definition */
+/*-----------------*/
+#define AT91B_LED1            (1<<19)       // AT91C_PIO_PB19 AT91C_PB19_PWM0 AT91C_PB19_TCLK1
+#define AT91B_LED2            (1<<20)       // AT91C_PIO_PB20 AT91C_PB20_PWM1 AT91C_PB20_PWM1
+#define AT91B_LED3            (AT91C_PIO_PB21)       // AT91C_PIO_PB21 AT91C_PB21_PWM2 AT91C_PB21_PCK1
+#define AT91B_LED4            (AT91C_PIO_PB22)       // AT91C_PIO_PB22 AT91C_PB22_PWM3 AT91C_PB22_PCK2
+#define AT91B_NB_LEB          4
+#define AT91B_LED_MASK        (AT91B_LED1|AT91B_LED2|AT91B_LED3|AT91B_LED4)
+#define AT91D_BASE_PIO_LED 	  (AT91C_BASE_PIOB)
+
+#define AT91B_POWERLED        (1<<25)       // PB25
+
+
+/*-------------------------------*/
+/* JOYSTICK Position Definition  */
+/*-------------------------------*/
+#define AT91B_SW1           (1<<21)  // PA21 Up Button	  AT91C_PA21_TF  AT91C_PA21_NPCS10
+#define AT91B_SW2           (1<<22)  // PA22 Down Button  AT91C_PA22_TK	 AT91C_PA22_SPCK1
+#define AT91B_SW3           (1<<23)  // PA23 Left Button  AT91C_PA23_TD  AT91C_PA23_MOSI1
+#define AT91B_SW4           (1<<24)  // PA24 Right Button AT91C_PA24_RD	 AT91C_PA24_MISO1
+#define AT91B_SW5           (1<<25)  // PA25 Push Button  AT91C_PA25_RK	 AT91C_PA25_NPCS11
+#define AT91B_SW_MASK       (AT91B_SW1|AT91B_SW2|AT91B_SW3|AT91B_SW4|AT91B_SW5)
+
+
+#define AT91D_BASE_PIO_SW   (AT91C_BASE_PIOA)
+
+/*------------------*/
+/* CAN Definition   */
+/*------------------*/
+#define AT91B_CAN_TRANSCEIVER_RS  (1<<2)    // PA2
+
+/*--------------*/
+/* Clocks       */
+/*--------------*/
+#define AT91B_MAIN_OSC        18432000               // Main Oscillator MAINCK
+#define AT91B_MCK             ((18432000*73/14)/2)   // Output PLL Clock
+
+#endif /* AT91SAM7X-EK_H */
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/incIAR/AT91SAM7X256_inc.h b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/incIAR/AT91SAM7X256_inc.h
new file mode 100644
index 000000000..18e58d41e
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/incIAR/AT91SAM7X256_inc.h
@@ -0,0 +1,2268 @@
+//  ----------------------------------------------------------------------------
+//          ATMEL Microcontroller Software Support  -  ROUSSET  -
+//  ----------------------------------------------------------------------------
+//  DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+//  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+//  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+//  DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+//  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+//  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+//  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+//  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+//  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+//  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//  ----------------------------------------------------------------------------
+// File Name           : AT91SAM7X256.h
+// Object              : AT91SAM7X256 definitions
+// Generated           : AT91 SW Application Group  01/16/2006 (16:36:22)
+// 
+// CVS Reference       : /AT91SAM7X256.pl/1.15/Wed Nov  2 13:56:49 2005//
+// CVS Reference       : /SYS_SAM7X.pl/1.3/Tue Feb  1 17:01:43 2005//
+// CVS Reference       : /MC_SAM7X.pl/1.2/Fri May 20 14:13:04 2005//
+// CVS Reference       : /PMC_SAM7X.pl/1.4/Tue Feb  8 13:58:10 2005//
+// CVS Reference       : /RSTC_SAM7X.pl/1.2/Wed Jul 13 14:57:50 2005//
+// CVS Reference       : /UDP_SAM7X.pl/1.1/Tue May 10 11:35:35 2005//
+// CVS Reference       : /PWM_SAM7X.pl/1.1/Tue May 10 11:53:07 2005//
+// CVS Reference       : /AIC_6075B.pl/1.3/Fri May 20 14:01:30 2005//
+// CVS Reference       : /PIO_6057A.pl/1.2/Thu Feb  3 10:18:28 2005//
+// CVS Reference       : /RTTC_6081A.pl/1.2/Tue Nov  9 14:43:58 2004//
+// CVS Reference       : /PITC_6079A.pl/1.2/Tue Nov  9 14:43:56 2004//
+// CVS Reference       : /WDTC_6080A.pl/1.3/Tue Nov  9 14:44:00 2004//
+// CVS Reference       : /VREG_6085B.pl/1.1/Tue Feb  1 16:05:48 2005//
+// CVS Reference       : /PDC_6074C.pl/1.2/Thu Feb  3 08:48:54 2005//
+// CVS Reference       : /DBGU_6059D.pl/1.1/Mon Jan 31 13:15:32 2005//
+// CVS Reference       : /SPI_6088D.pl/1.3/Fri May 20 14:08:59 2005//
+// CVS Reference       : /US_6089C.pl/1.1/Mon Jul 12 18:23:26 2004//
+// CVS Reference       : /SSC_6078B.pl/1.1/Wed Jul 13 15:19:19 2005//
+// CVS Reference       : /TWI_6061A.pl/1.1/Tue Jul 13 07:38:06 2004//
+// CVS Reference       : /TC_6082A.pl/1.7/Fri Mar 11 12:52:17 2005//
+// CVS Reference       : /CAN_6019B.pl/1.1/Tue Mar  8 12:42:22 2005//
+// CVS Reference       : /EMACB_6119A.pl/1.6/Wed Jul 13 15:05:35 2005//
+// CVS Reference       : /ADC_6051C.pl/1.1/Fri Oct 17 09:12:38 2003//
+//  ----------------------------------------------------------------------------
+
+// Hardware register definition
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR System Peripherals
+// *****************************************************************************
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Advanced Interrupt Controller
+// *****************************************************************************
+// *** Register offset in AT91S_AIC structure ***
+#define AIC_SMR         ( 0) // Source Mode Register
+#define AIC_SVR         (128) // Source Vector Register
+#define AIC_IVR         (256) // IRQ Vector Register
+#define AIC_FVR         (260) // FIQ Vector Register
+#define AIC_ISR         (264) // Interrupt Status Register
+#define AIC_IPR         (268) // Interrupt Pending Register
+#define AIC_IMR         (272) // Interrupt Mask Register
+#define AIC_CISR        (276) // Core Interrupt Status Register
+#define AIC_IECR        (288) // Interrupt Enable Command Register
+#define AIC_IDCR        (292) // Interrupt Disable Command Register
+#define AIC_ICCR        (296) // Interrupt Clear Command Register
+#define AIC_ISCR        (300) // Interrupt Set Command Register
+#define AIC_EOICR       (304) // End of Interrupt Command Register
+#define AIC_SPU         (308) // Spurious Vector Register
+#define AIC_DCR         (312) // Debug Control Register (Protect)
+#define AIC_FFER        (320) // Fast Forcing Enable Register
+#define AIC_FFDR        (324) // Fast Forcing Disable Register
+#define AIC_FFSR        (328) // Fast Forcing Status Register
+// -------- AIC_SMR : (AIC Offset: 0x0) Control Register -------- 
+#define AT91C_AIC_PRIOR           (0x7 <<  0) // (AIC) Priority Level
+#define 	AT91C_AIC_PRIOR_LOWEST               (0x0) // (AIC) Lowest priority level
+#define 	AT91C_AIC_PRIOR_HIGHEST              (0x7) // (AIC) Highest priority level
+#define AT91C_AIC_SRCTYPE         (0x3 <<  5) // (AIC) Interrupt Source Type
+#define 	AT91C_AIC_SRCTYPE_EXT_LOW_LEVEL        (0x0 <<  5) // (AIC) External Sources Code Label Low-level Sensitive
+#define 	AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL       (0x0 <<  5) // (AIC) Internal Sources Code Label High-level Sensitive
+#define 	AT91C_AIC_SRCTYPE_INT_POSITIVE_EDGE    (0x1 <<  5) // (AIC) Internal Sources Code Label Positive Edge triggered
+#define 	AT91C_AIC_SRCTYPE_EXT_NEGATIVE_EDGE    (0x1 <<  5) // (AIC) External Sources Code Label Negative Edge triggered
+#define 	AT91C_AIC_SRCTYPE_HIGH_LEVEL           (0x2 <<  5) // (AIC) Internal Or External Sources Code Label High-level Sensitive
+#define 	AT91C_AIC_SRCTYPE_POSITIVE_EDGE        (0x3 <<  5) // (AIC) Internal Or External Sources Code Label Positive Edge triggered
+// -------- AIC_CISR : (AIC Offset: 0x114) AIC Core Interrupt Status Register -------- 
+#define AT91C_AIC_NFIQ            (0x1 <<  0) // (AIC) NFIQ Status
+#define AT91C_AIC_NIRQ            (0x1 <<  1) // (AIC) NIRQ Status
+// -------- AIC_DCR : (AIC Offset: 0x138) AIC Debug Control Register (Protect) -------- 
+#define AT91C_AIC_DCR_PROT        (0x1 <<  0) // (AIC) Protection Mode
+#define AT91C_AIC_DCR_GMSK        (0x1 <<  1) // (AIC) General Mask
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Peripheral DMA Controller
+// *****************************************************************************
+// *** Register offset in AT91S_PDC structure ***
+#define PDC_RPR         ( 0) // Receive Pointer Register
+#define PDC_RCR         ( 4) // Receive Counter Register
+#define PDC_TPR         ( 8) // Transmit Pointer Register
+#define PDC_TCR         (12) // Transmit Counter Register
+#define PDC_RNPR        (16) // Receive Next Pointer Register
+#define PDC_RNCR        (20) // Receive Next Counter Register
+#define PDC_TNPR        (24) // Transmit Next Pointer Register
+#define PDC_TNCR        (28) // Transmit Next Counter Register
+#define PDC_PTCR        (32) // PDC Transfer Control Register
+#define PDC_PTSR        (36) // PDC Transfer Status Register
+// -------- PDC_PTCR : (PDC Offset: 0x20) PDC Transfer Control Register -------- 
+#define AT91C_PDC_RXTEN           (0x1 <<  0) // (PDC) Receiver Transfer Enable
+#define AT91C_PDC_RXTDIS          (0x1 <<  1) // (PDC) Receiver Transfer Disable
+#define AT91C_PDC_TXTEN           (0x1 <<  8) // (PDC) Transmitter Transfer Enable
+#define AT91C_PDC_TXTDIS          (0x1 <<  9) // (PDC) Transmitter Transfer Disable
+// -------- PDC_PTSR : (PDC Offset: 0x24) PDC Transfer Status Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Debug Unit
+// *****************************************************************************
+// *** Register offset in AT91S_DBGU structure ***
+#define DBGU_CR         ( 0) // Control Register
+#define DBGU_MR         ( 4) // Mode Register
+#define DBGU_IER        ( 8) // Interrupt Enable Register
+#define DBGU_IDR        (12) // Interrupt Disable Register
+#define DBGU_IMR        (16) // Interrupt Mask Register
+#define DBGU_CSR        (20) // Channel Status Register
+#define DBGU_RHR        (24) // Receiver Holding Register
+#define DBGU_THR        (28) // Transmitter Holding Register
+#define DBGU_BRGR       (32) // Baud Rate Generator Register
+#define DBGU_CIDR       (64) // Chip ID Register
+#define DBGU_EXID       (68) // Chip ID Extension Register
+#define DBGU_FNTR       (72) // Force NTRST Register
+#define DBGU_RPR        (256) // Receive Pointer Register
+#define DBGU_RCR        (260) // Receive Counter Register
+#define DBGU_TPR        (264) // Transmit Pointer Register
+#define DBGU_TCR        (268) // Transmit Counter Register
+#define DBGU_RNPR       (272) // Receive Next Pointer Register
+#define DBGU_RNCR       (276) // Receive Next Counter Register
+#define DBGU_TNPR       (280) // Transmit Next Pointer Register
+#define DBGU_TNCR       (284) // Transmit Next Counter Register
+#define DBGU_PTCR       (288) // PDC Transfer Control Register
+#define DBGU_PTSR       (292) // PDC Transfer Status Register
+// -------- DBGU_CR : (DBGU Offset: 0x0) Debug Unit Control Register -------- 
+#define AT91C_US_RSTRX            (0x1 <<  2) // (DBGU) Reset Receiver
+#define AT91C_US_RSTTX            (0x1 <<  3) // (DBGU) Reset Transmitter
+#define AT91C_US_RXEN             (0x1 <<  4) // (DBGU) Receiver Enable
+#define AT91C_US_RXDIS            (0x1 <<  5) // (DBGU) Receiver Disable
+#define AT91C_US_TXEN             (0x1 <<  6) // (DBGU) Transmitter Enable
+#define AT91C_US_TXDIS            (0x1 <<  7) // (DBGU) Transmitter Disable
+#define AT91C_US_RSTSTA           (0x1 <<  8) // (DBGU) Reset Status Bits
+// -------- DBGU_MR : (DBGU Offset: 0x4) Debug Unit Mode Register -------- 
+#define AT91C_US_PAR              (0x7 <<  9) // (DBGU) Parity type
+#define 	AT91C_US_PAR_EVEN                 (0x0 <<  9) // (DBGU) Even Parity
+#define 	AT91C_US_PAR_ODD                  (0x1 <<  9) // (DBGU) Odd Parity
+#define 	AT91C_US_PAR_SPACE                (0x2 <<  9) // (DBGU) Parity forced to 0 (Space)
+#define 	AT91C_US_PAR_MARK                 (0x3 <<  9) // (DBGU) Parity forced to 1 (Mark)
+#define 	AT91C_US_PAR_NONE                 (0x4 <<  9) // (DBGU) No Parity
+#define 	AT91C_US_PAR_MULTI_DROP           (0x6 <<  9) // (DBGU) Multi-drop mode
+#define AT91C_US_CHMODE           (0x3 << 14) // (DBGU) Channel Mode
+#define 	AT91C_US_CHMODE_NORMAL               (0x0 << 14) // (DBGU) Normal Mode: The USART channel operates as an RX/TX USART.
+#define 	AT91C_US_CHMODE_AUTO                 (0x1 << 14) // (DBGU) Automatic Echo: Receiver Data Input is connected to the TXD pin.
+#define 	AT91C_US_CHMODE_LOCAL                (0x2 << 14) // (DBGU) Local Loopback: Transmitter Output Signal is connected to Receiver Input Signal.
+#define 	AT91C_US_CHMODE_REMOTE               (0x3 << 14) // (DBGU) Remote Loopback: RXD pin is internally connected to TXD pin.
+// -------- DBGU_IER : (DBGU Offset: 0x8) Debug Unit Interrupt Enable Register -------- 
+#define AT91C_US_RXRDY            (0x1 <<  0) // (DBGU) RXRDY Interrupt
+#define AT91C_US_TXRDY            (0x1 <<  1) // (DBGU) TXRDY Interrupt
+#define AT91C_US_ENDRX            (0x1 <<  3) // (DBGU) End of Receive Transfer Interrupt
+#define AT91C_US_ENDTX            (0x1 <<  4) // (DBGU) End of Transmit Interrupt
+#define AT91C_US_OVRE             (0x1 <<  5) // (DBGU) Overrun Interrupt
+#define AT91C_US_FRAME            (0x1 <<  6) // (DBGU) Framing Error Interrupt
+#define AT91C_US_PARE             (0x1 <<  7) // (DBGU) Parity Error Interrupt
+#define AT91C_US_TXEMPTY          (0x1 <<  9) // (DBGU) TXEMPTY Interrupt
+#define AT91C_US_TXBUFE           (0x1 << 11) // (DBGU) TXBUFE Interrupt
+#define AT91C_US_RXBUFF           (0x1 << 12) // (DBGU) RXBUFF Interrupt
+#define AT91C_US_COMM_TX          (0x1 << 30) // (DBGU) COMM_TX Interrupt
+#define AT91C_US_COMM_RX          (0x1 << 31) // (DBGU) COMM_RX Interrupt
+// -------- DBGU_IDR : (DBGU Offset: 0xc) Debug Unit Interrupt Disable Register -------- 
+// -------- DBGU_IMR : (DBGU Offset: 0x10) Debug Unit Interrupt Mask Register -------- 
+// -------- DBGU_CSR : (DBGU Offset: 0x14) Debug Unit Channel Status Register -------- 
+// -------- DBGU_FNTR : (DBGU Offset: 0x48) Debug Unit FORCE_NTRST Register -------- 
+#define AT91C_US_FORCE_NTRST      (0x1 <<  0) // (DBGU) Force NTRST in JTAG
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Parallel Input Output Controler
+// *****************************************************************************
+// *** Register offset in AT91S_PIO structure ***
+#define PIO_PER         ( 0) // PIO Enable Register
+#define PIO_PDR         ( 4) // PIO Disable Register
+#define PIO_PSR         ( 8) // PIO Status Register
+#define PIO_OER         (16) // Output Enable Register
+#define PIO_ODR         (20) // Output Disable Registerr
+#define PIO_OSR         (24) // Output Status Register
+#define PIO_IFER        (32) // Input Filter Enable Register
+#define PIO_IFDR        (36) // Input Filter Disable Register
+#define PIO_IFSR        (40) // Input Filter Status Register
+#define PIO_SODR        (48) // Set Output Data Register
+#define PIO_CODR        (52) // Clear Output Data Register
+#define PIO_ODSR        (56) // Output Data Status Register
+#define PIO_PDSR        (60) // Pin Data Status Register
+#define PIO_IER         (64) // Interrupt Enable Register
+#define PIO_IDR         (68) // Interrupt Disable Register
+#define PIO_IMR         (72) // Interrupt Mask Register
+#define PIO_ISR         (76) // Interrupt Status Register
+#define PIO_MDER        (80) // Multi-driver Enable Register
+#define PIO_MDDR        (84) // Multi-driver Disable Register
+#define PIO_MDSR        (88) // Multi-driver Status Register
+#define PIO_PPUDR       (96) // Pull-up Disable Register
+#define PIO_PPUER       (100) // Pull-up Enable Register
+#define PIO_PPUSR       (104) // Pull-up Status Register
+#define PIO_ASR         (112) // Select A Register
+#define PIO_BSR         (116) // Select B Register
+#define PIO_ABSR        (120) // AB Select Status Register
+#define PIO_OWER        (160) // Output Write Enable Register
+#define PIO_OWDR        (164) // Output Write Disable Register
+#define PIO_OWSR        (168) // Output Write Status Register
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Clock Generator Controler
+// *****************************************************************************
+// *** Register offset in AT91S_CKGR structure ***
+#define CKGR_MOR        ( 0) // Main Oscillator Register
+#define CKGR_MCFR       ( 4) // Main Clock  Frequency Register
+#define CKGR_PLLR       (12) // PLL Register
+// -------- CKGR_MOR : (CKGR Offset: 0x0) Main Oscillator Register -------- 
+#define AT91C_CKGR_MOSCEN         (0x1 <<  0) // (CKGR) Main Oscillator Enable
+#define AT91C_CKGR_OSCBYPASS      (0x1 <<  1) // (CKGR) Main Oscillator Bypass
+#define AT91C_CKGR_OSCOUNT        (0xFF <<  8) // (CKGR) Main Oscillator Start-up Time
+// -------- CKGR_MCFR : (CKGR Offset: 0x4) Main Clock Frequency Register -------- 
+#define AT91C_CKGR_MAINF          (0xFFFF <<  0) // (CKGR) Main Clock Frequency
+#define AT91C_CKGR_MAINRDY        (0x1 << 16) // (CKGR) Main Clock Ready
+// -------- CKGR_PLLR : (CKGR Offset: 0xc) PLL B Register -------- 
+#define AT91C_CKGR_DIV            (0xFF <<  0) // (CKGR) Divider Selected
+#define 	AT91C_CKGR_DIV_0                    (0x0) // (CKGR) Divider output is 0
+#define 	AT91C_CKGR_DIV_BYPASS               (0x1) // (CKGR) Divider is bypassed
+#define AT91C_CKGR_PLLCOUNT       (0x3F <<  8) // (CKGR) PLL Counter
+#define AT91C_CKGR_OUT            (0x3 << 14) // (CKGR) PLL Output Frequency Range
+#define 	AT91C_CKGR_OUT_0                    (0x0 << 14) // (CKGR) Please refer to the PLL datasheet
+#define 	AT91C_CKGR_OUT_1                    (0x1 << 14) // (CKGR) Please refer to the PLL datasheet
+#define 	AT91C_CKGR_OUT_2                    (0x2 << 14) // (CKGR) Please refer to the PLL datasheet
+#define 	AT91C_CKGR_OUT_3                    (0x3 << 14) // (CKGR) Please refer to the PLL datasheet
+#define AT91C_CKGR_MUL            (0x7FF << 16) // (CKGR) PLL Multiplier
+#define AT91C_CKGR_USBDIV         (0x3 << 28) // (CKGR) Divider for USB Clocks
+#define 	AT91C_CKGR_USBDIV_0                    (0x0 << 28) // (CKGR) Divider output is PLL clock output
+#define 	AT91C_CKGR_USBDIV_1                    (0x1 << 28) // (CKGR) Divider output is PLL clock output divided by 2
+#define 	AT91C_CKGR_USBDIV_2                    (0x2 << 28) // (CKGR) Divider output is PLL clock output divided by 4
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Power Management Controler
+// *****************************************************************************
+// *** Register offset in AT91S_PMC structure ***
+#define PMC_SCER        ( 0) // System Clock Enable Register
+#define PMC_SCDR        ( 4) // System Clock Disable Register
+#define PMC_SCSR        ( 8) // System Clock Status Register
+#define PMC_PCER        (16) // Peripheral Clock Enable Register
+#define PMC_PCDR        (20) // Peripheral Clock Disable Register
+#define PMC_PCSR        (24) // Peripheral Clock Status Register
+#define PMC_MOR         (32) // Main Oscillator Register
+#define PMC_MCFR        (36) // Main Clock  Frequency Register
+#define PMC_PLLR        (44) // PLL Register
+#define PMC_MCKR        (48) // Master Clock Register
+#define PMC_PCKR        (64) // Programmable Clock Register
+#define PMC_IER         (96) // Interrupt Enable Register
+#define PMC_IDR         (100) // Interrupt Disable Register
+#define PMC_SR          (104) // Status Register
+#define PMC_IMR         (108) // Interrupt Mask Register
+// -------- PMC_SCER : (PMC Offset: 0x0) System Clock Enable Register -------- 
+#define AT91C_PMC_PCK             (0x1 <<  0) // (PMC) Processor Clock
+#define AT91C_PMC_UDP             (0x1 <<  7) // (PMC) USB Device Port Clock
+#define AT91C_PMC_PCK0            (0x1 <<  8) // (PMC) Programmable Clock Output
+#define AT91C_PMC_PCK1            (0x1 <<  9) // (PMC) Programmable Clock Output
+#define AT91C_PMC_PCK2            (0x1 << 10) // (PMC) Programmable Clock Output
+#define AT91C_PMC_PCK3            (0x1 << 11) // (PMC) Programmable Clock Output
+// -------- PMC_SCDR : (PMC Offset: 0x4) System Clock Disable Register -------- 
+// -------- PMC_SCSR : (PMC Offset: 0x8) System Clock Status Register -------- 
+// -------- CKGR_MOR : (PMC Offset: 0x20) Main Oscillator Register -------- 
+// -------- CKGR_MCFR : (PMC Offset: 0x24) Main Clock Frequency Register -------- 
+// -------- CKGR_PLLR : (PMC Offset: 0x2c) PLL B Register -------- 
+// -------- PMC_MCKR : (PMC Offset: 0x30) Master Clock Register -------- 
+#define AT91C_PMC_CSS             (0x3 <<  0) // (PMC) Programmable Clock Selection
+#define 	AT91C_PMC_CSS_SLOW_CLK             (0x0) // (PMC) Slow Clock is selected
+#define 	AT91C_PMC_CSS_MAIN_CLK             (0x1) // (PMC) Main Clock is selected
+#define 	AT91C_PMC_CSS_PLL_CLK              (0x3) // (PMC) Clock from PLL is selected
+#define AT91C_PMC_PRES            (0x7 <<  2) // (PMC) Programmable Clock Prescaler
+#define 	AT91C_PMC_PRES_CLK                  (0x0 <<  2) // (PMC) Selected clock
+#define 	AT91C_PMC_PRES_CLK_2                (0x1 <<  2) // (PMC) Selected clock divided by 2
+#define 	AT91C_PMC_PRES_CLK_4                (0x2 <<  2) // (PMC) Selected clock divided by 4
+#define 	AT91C_PMC_PRES_CLK_8                (0x3 <<  2) // (PMC) Selected clock divided by 8
+#define 	AT91C_PMC_PRES_CLK_16               (0x4 <<  2) // (PMC) Selected clock divided by 16
+#define 	AT91C_PMC_PRES_CLK_32               (0x5 <<  2) // (PMC) Selected clock divided by 32
+#define 	AT91C_PMC_PRES_CLK_64               (0x6 <<  2) // (PMC) Selected clock divided by 64
+// -------- PMC_PCKR : (PMC Offset: 0x40) Programmable Clock Register -------- 
+// -------- PMC_IER : (PMC Offset: 0x60) PMC Interrupt Enable Register -------- 
+#define AT91C_PMC_MOSCS           (0x1 <<  0) // (PMC) MOSC Status/Enable/Disable/Mask
+#define AT91C_PMC_LOCK            (0x1 <<  2) // (PMC) PLL Status/Enable/Disable/Mask
+#define AT91C_PMC_MCKRDY          (0x1 <<  3) // (PMC) MCK_RDY Status/Enable/Disable/Mask
+#define AT91C_PMC_PCK0RDY         (0x1 <<  8) // (PMC) PCK0_RDY Status/Enable/Disable/Mask
+#define AT91C_PMC_PCK1RDY         (0x1 <<  9) // (PMC) PCK1_RDY Status/Enable/Disable/Mask
+#define AT91C_PMC_PCK2RDY         (0x1 << 10) // (PMC) PCK2_RDY Status/Enable/Disable/Mask
+#define AT91C_PMC_PCK3RDY         (0x1 << 11) // (PMC) PCK3_RDY Status/Enable/Disable/Mask
+// -------- PMC_IDR : (PMC Offset: 0x64) PMC Interrupt Disable Register -------- 
+// -------- PMC_SR : (PMC Offset: 0x68) PMC Status Register -------- 
+// -------- PMC_IMR : (PMC Offset: 0x6c) PMC Interrupt Mask Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Reset Controller Interface
+// *****************************************************************************
+// *** Register offset in AT91S_RSTC structure ***
+#define RSTC_RCR        ( 0) // Reset Control Register
+#define RSTC_RSR        ( 4) // Reset Status Register
+#define RSTC_RMR        ( 8) // Reset Mode Register
+// -------- RSTC_RCR : (RSTC Offset: 0x0) Reset Control Register -------- 
+#define AT91C_RSTC_PROCRST        (0x1 <<  0) // (RSTC) Processor Reset
+#define AT91C_RSTC_PERRST         (0x1 <<  2) // (RSTC) Peripheral Reset
+#define AT91C_RSTC_EXTRST         (0x1 <<  3) // (RSTC) External Reset
+#define AT91C_RSTC_KEY            (0xFF << 24) // (RSTC) Password
+// -------- RSTC_RSR : (RSTC Offset: 0x4) Reset Status Register -------- 
+#define AT91C_RSTC_URSTS          (0x1 <<  0) // (RSTC) User Reset Status
+#define AT91C_RSTC_BODSTS         (0x1 <<  1) // (RSTC) Brownout Detection Status
+#define AT91C_RSTC_RSTTYP         (0x7 <<  8) // (RSTC) Reset Type
+#define 	AT91C_RSTC_RSTTYP_POWERUP              (0x0 <<  8) // (RSTC) Power-up Reset. VDDCORE rising.
+#define 	AT91C_RSTC_RSTTYP_WAKEUP               (0x1 <<  8) // (RSTC) WakeUp Reset. VDDCORE rising.
+#define 	AT91C_RSTC_RSTTYP_WATCHDOG             (0x2 <<  8) // (RSTC) Watchdog Reset. Watchdog overflow occured.
+#define 	AT91C_RSTC_RSTTYP_SOFTWARE             (0x3 <<  8) // (RSTC) Software Reset. Processor reset required by the software.
+#define 	AT91C_RSTC_RSTTYP_USER                 (0x4 <<  8) // (RSTC) User Reset. NRST pin detected low.
+#define 	AT91C_RSTC_RSTTYP_BROWNOUT             (0x5 <<  8) // (RSTC) Brownout Reset occured.
+#define AT91C_RSTC_NRSTL          (0x1 << 16) // (RSTC) NRST pin level
+#define AT91C_RSTC_SRCMP          (0x1 << 17) // (RSTC) Software Reset Command in Progress.
+// -------- RSTC_RMR : (RSTC Offset: 0x8) Reset Mode Register -------- 
+#define AT91C_RSTC_URSTEN         (0x1 <<  0) // (RSTC) User Reset Enable
+#define AT91C_RSTC_URSTIEN        (0x1 <<  4) // (RSTC) User Reset Interrupt Enable
+#define AT91C_RSTC_ERSTL          (0xF <<  8) // (RSTC) User Reset Length
+#define AT91C_RSTC_BODIEN         (0x1 << 16) // (RSTC) Brownout Detection Interrupt Enable
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Real Time Timer Controller Interface
+// *****************************************************************************
+// *** Register offset in AT91S_RTTC structure ***
+#define RTTC_RTMR       ( 0) // Real-time Mode Register
+#define RTTC_RTAR       ( 4) // Real-time Alarm Register
+#define RTTC_RTVR       ( 8) // Real-time Value Register
+#define RTTC_RTSR       (12) // Real-time Status Register
+// -------- RTTC_RTMR : (RTTC Offset: 0x0) Real-time Mode Register -------- 
+#define AT91C_RTTC_RTPRES         (0xFFFF <<  0) // (RTTC) Real-time Timer Prescaler Value
+#define AT91C_RTTC_ALMIEN         (0x1 << 16) // (RTTC) Alarm Interrupt Enable
+#define AT91C_RTTC_RTTINCIEN      (0x1 << 17) // (RTTC) Real Time Timer Increment Interrupt Enable
+#define AT91C_RTTC_RTTRST         (0x1 << 18) // (RTTC) Real Time Timer Restart
+// -------- RTTC_RTAR : (RTTC Offset: 0x4) Real-time Alarm Register -------- 
+#define AT91C_RTTC_ALMV           (0x0 <<  0) // (RTTC) Alarm Value
+// -------- RTTC_RTVR : (RTTC Offset: 0x8) Current Real-time Value Register -------- 
+#define AT91C_RTTC_CRTV           (0x0 <<  0) // (RTTC) Current Real-time Value
+// -------- RTTC_RTSR : (RTTC Offset: 0xc) Real-time Status Register -------- 
+#define AT91C_RTTC_ALMS           (0x1 <<  0) // (RTTC) Real-time Alarm Status
+#define AT91C_RTTC_RTTINC         (0x1 <<  1) // (RTTC) Real-time Timer Increment
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Periodic Interval Timer Controller Interface
+// *****************************************************************************
+// *** Register offset in AT91S_PITC structure ***
+#define PITC_PIMR       ( 0) // Period Interval Mode Register
+#define PITC_PISR       ( 4) // Period Interval Status Register
+#define PITC_PIVR       ( 8) // Period Interval Value Register
+#define PITC_PIIR       (12) // Period Interval Image Register
+// -------- PITC_PIMR : (PITC Offset: 0x0) Periodic Interval Mode Register -------- 
+#define AT91C_PITC_PIV            (0xFFFFF <<  0) // (PITC) Periodic Interval Value
+#define AT91C_PITC_PITEN          (0x1 << 24) // (PITC) Periodic Interval Timer Enabled
+#define AT91C_PITC_PITIEN         (0x1 << 25) // (PITC) Periodic Interval Timer Interrupt Enable
+// -------- PITC_PISR : (PITC Offset: 0x4) Periodic Interval Status Register -------- 
+#define AT91C_PITC_PITS           (0x1 <<  0) // (PITC) Periodic Interval Timer Status
+// -------- PITC_PIVR : (PITC Offset: 0x8) Periodic Interval Value Register -------- 
+#define AT91C_PITC_CPIV           (0xFFFFF <<  0) // (PITC) Current Periodic Interval Value
+#define AT91C_PITC_PICNT          (0xFFF << 20) // (PITC) Periodic Interval Counter
+// -------- PITC_PIIR : (PITC Offset: 0xc) Periodic Interval Image Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Watchdog Timer Controller Interface
+// *****************************************************************************
+// *** Register offset in AT91S_WDTC structure ***
+#define WDTC_WDCR       ( 0) // Watchdog Control Register
+#define WDTC_WDMR       ( 4) // Watchdog Mode Register
+#define WDTC_WDSR       ( 8) // Watchdog Status Register
+// -------- WDTC_WDCR : (WDTC Offset: 0x0) Periodic Interval Image Register -------- 
+#define AT91C_WDTC_WDRSTT         (0x1 <<  0) // (WDTC) Watchdog Restart
+#define AT91C_WDTC_KEY            (0xFF << 24) // (WDTC) Watchdog KEY Password
+// -------- WDTC_WDMR : (WDTC Offset: 0x4) Watchdog Mode Register -------- 
+#define AT91C_WDTC_WDV            (0xFFF <<  0) // (WDTC) Watchdog Timer Restart
+#define AT91C_WDTC_WDFIEN         (0x1 << 12) // (WDTC) Watchdog Fault Interrupt Enable
+#define AT91C_WDTC_WDRSTEN        (0x1 << 13) // (WDTC) Watchdog Reset Enable
+#define AT91C_WDTC_WDRPROC        (0x1 << 14) // (WDTC) Watchdog Timer Restart
+#define AT91C_WDTC_WDDIS          (0x1 << 15) // (WDTC) Watchdog Disable
+#define AT91C_WDTC_WDD            (0xFFF << 16) // (WDTC) Watchdog Delta Value
+#define AT91C_WDTC_WDDBGHLT       (0x1 << 28) // (WDTC) Watchdog Debug Halt
+#define AT91C_WDTC_WDIDLEHLT      (0x1 << 29) // (WDTC) Watchdog Idle Halt
+// -------- WDTC_WDSR : (WDTC Offset: 0x8) Watchdog Status Register -------- 
+#define AT91C_WDTC_WDUNF          (0x1 <<  0) // (WDTC) Watchdog Underflow
+#define AT91C_WDTC_WDERR          (0x1 <<  1) // (WDTC) Watchdog Error
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Voltage Regulator Mode Controller Interface
+// *****************************************************************************
+// *** Register offset in AT91S_VREG structure ***
+#define VREG_MR         ( 0) // Voltage Regulator Mode Register
+// -------- VREG_MR : (VREG Offset: 0x0) Voltage Regulator Mode Register -------- 
+#define AT91C_VREG_PSTDBY         (0x1 <<  0) // (VREG) Voltage Regulator Power Standby Mode
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Memory Controller Interface
+// *****************************************************************************
+// *** Register offset in AT91S_MC structure ***
+#define MC_RCR          ( 0) // MC Remap Control Register
+#define MC_ASR          ( 4) // MC Abort Status Register
+#define MC_AASR         ( 8) // MC Abort Address Status Register
+#define MC_FMR          (96) // MC Flash Mode Register
+#define MC_FCR          (100) // MC Flash Command Register
+#define MC_FSR          (104) // MC Flash Status Register
+// -------- MC_RCR : (MC Offset: 0x0) MC Remap Control Register -------- 
+#define AT91C_MC_RCB              (0x1 <<  0) // (MC) Remap Command Bit
+// -------- MC_ASR : (MC Offset: 0x4) MC Abort Status Register -------- 
+#define AT91C_MC_UNDADD           (0x1 <<  0) // (MC) Undefined Addess Abort Status
+#define AT91C_MC_MISADD           (0x1 <<  1) // (MC) Misaligned Addess Abort Status
+#define AT91C_MC_ABTSZ            (0x3 <<  8) // (MC) Abort Size Status
+#define 	AT91C_MC_ABTSZ_BYTE                 (0x0 <<  8) // (MC) Byte
+#define 	AT91C_MC_ABTSZ_HWORD                (0x1 <<  8) // (MC) Half-word
+#define 	AT91C_MC_ABTSZ_WORD                 (0x2 <<  8) // (MC) Word
+#define AT91C_MC_ABTTYP           (0x3 << 10) // (MC) Abort Type Status
+#define 	AT91C_MC_ABTTYP_DATAR                (0x0 << 10) // (MC) Data Read
+#define 	AT91C_MC_ABTTYP_DATAW                (0x1 << 10) // (MC) Data Write
+#define 	AT91C_MC_ABTTYP_FETCH                (0x2 << 10) // (MC) Code Fetch
+#define AT91C_MC_MST0             (0x1 << 16) // (MC) Master 0 Abort Source
+#define AT91C_MC_MST1             (0x1 << 17) // (MC) Master 1 Abort Source
+#define AT91C_MC_SVMST0           (0x1 << 24) // (MC) Saved Master 0 Abort Source
+#define AT91C_MC_SVMST1           (0x1 << 25) // (MC) Saved Master 1 Abort Source
+// -------- MC_FMR : (MC Offset: 0x60) MC Flash Mode Register -------- 
+#define AT91C_MC_FRDY             (0x1 <<  0) // (MC) Flash Ready
+#define AT91C_MC_LOCKE            (0x1 <<  2) // (MC) Lock Error
+#define AT91C_MC_PROGE            (0x1 <<  3) // (MC) Programming Error
+#define AT91C_MC_NEBP             (0x1 <<  7) // (MC) No Erase Before Programming
+#define AT91C_MC_FWS              (0x3 <<  8) // (MC) Flash Wait State
+#define 	AT91C_MC_FWS_0FWS                 (0x0 <<  8) // (MC) 1 cycle for Read, 2 for Write operations
+#define 	AT91C_MC_FWS_1FWS                 (0x1 <<  8) // (MC) 2 cycles for Read, 3 for Write operations
+#define 	AT91C_MC_FWS_2FWS                 (0x2 <<  8) // (MC) 3 cycles for Read, 4 for Write operations
+#define 	AT91C_MC_FWS_3FWS                 (0x3 <<  8) // (MC) 4 cycles for Read, 4 for Write operations
+#define AT91C_MC_FMCN             (0xFF << 16) // (MC) Flash Microsecond Cycle Number
+// -------- MC_FCR : (MC Offset: 0x64) MC Flash Command Register -------- 
+#define AT91C_MC_FCMD             (0xF <<  0) // (MC) Flash Command
+#define 	AT91C_MC_FCMD_START_PROG           (0x1) // (MC) Starts the programming of th epage specified by PAGEN.
+#define 	AT91C_MC_FCMD_LOCK                 (0x2) // (MC) Starts a lock sequence of the sector defined by the bits 4 to 7 of the field PAGEN.
+#define 	AT91C_MC_FCMD_PROG_AND_LOCK        (0x3) // (MC) The lock sequence automatically happens after the programming sequence is completed.
+#define 	AT91C_MC_FCMD_UNLOCK               (0x4) // (MC) Starts an unlock sequence of the sector defined by the bits 4 to 7 of the field PAGEN.
+#define 	AT91C_MC_FCMD_ERASE_ALL            (0x8) // (MC) Starts the erase of the entire flash.If at least a page is locked, the command is cancelled.
+#define 	AT91C_MC_FCMD_SET_GP_NVM           (0xB) // (MC) Set General Purpose NVM bits.
+#define 	AT91C_MC_FCMD_CLR_GP_NVM           (0xD) // (MC) Clear General Purpose NVM bits.
+#define 	AT91C_MC_FCMD_SET_SECURITY         (0xF) // (MC) Set Security Bit.
+#define AT91C_MC_PAGEN            (0x3FF <<  8) // (MC) Page Number
+#define AT91C_MC_KEY              (0xFF << 24) // (MC) Writing Protect Key
+// -------- MC_FSR : (MC Offset: 0x68) MC Flash Command Register -------- 
+#define AT91C_MC_SECURITY         (0x1 <<  4) // (MC) Security Bit Status
+#define AT91C_MC_GPNVM0           (0x1 <<  8) // (MC) Sector 0 Lock Status
+#define AT91C_MC_GPNVM1           (0x1 <<  9) // (MC) Sector 1 Lock Status
+#define AT91C_MC_GPNVM2           (0x1 << 10) // (MC) Sector 2 Lock Status
+#define AT91C_MC_GPNVM3           (0x1 << 11) // (MC) Sector 3 Lock Status
+#define AT91C_MC_GPNVM4           (0x1 << 12) // (MC) Sector 4 Lock Status
+#define AT91C_MC_GPNVM5           (0x1 << 13) // (MC) Sector 5 Lock Status
+#define AT91C_MC_GPNVM6           (0x1 << 14) // (MC) Sector 6 Lock Status
+#define AT91C_MC_GPNVM7           (0x1 << 15) // (MC) Sector 7 Lock Status
+#define AT91C_MC_LOCKS0           (0x1 << 16) // (MC) Sector 0 Lock Status
+#define AT91C_MC_LOCKS1           (0x1 << 17) // (MC) Sector 1 Lock Status
+#define AT91C_MC_LOCKS2           (0x1 << 18) // (MC) Sector 2 Lock Status
+#define AT91C_MC_LOCKS3           (0x1 << 19) // (MC) Sector 3 Lock Status
+#define AT91C_MC_LOCKS4           (0x1 << 20) // (MC) Sector 4 Lock Status
+#define AT91C_MC_LOCKS5           (0x1 << 21) // (MC) Sector 5 Lock Status
+#define AT91C_MC_LOCKS6           (0x1 << 22) // (MC) Sector 6 Lock Status
+#define AT91C_MC_LOCKS7           (0x1 << 23) // (MC) Sector 7 Lock Status
+#define AT91C_MC_LOCKS8           (0x1 << 24) // (MC) Sector 8 Lock Status
+#define AT91C_MC_LOCKS9           (0x1 << 25) // (MC) Sector 9 Lock Status
+#define AT91C_MC_LOCKS10          (0x1 << 26) // (MC) Sector 10 Lock Status
+#define AT91C_MC_LOCKS11          (0x1 << 27) // (MC) Sector 11 Lock Status
+#define AT91C_MC_LOCKS12          (0x1 << 28) // (MC) Sector 12 Lock Status
+#define AT91C_MC_LOCKS13          (0x1 << 29) // (MC) Sector 13 Lock Status
+#define AT91C_MC_LOCKS14          (0x1 << 30) // (MC) Sector 14 Lock Status
+#define AT91C_MC_LOCKS15          (0x1 << 31) // (MC) Sector 15 Lock Status
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Serial Parallel Interface
+// *****************************************************************************
+// *** Register offset in AT91S_SPI structure ***
+#define SPI_CR          ( 0) // Control Register
+#define SPI_MR          ( 4) // Mode Register
+#define SPI_RDR         ( 8) // Receive Data Register
+#define SPI_TDR         (12) // Transmit Data Register
+#define SPI_SR          (16) // Status Register
+#define SPI_IER         (20) // Interrupt Enable Register
+#define SPI_IDR         (24) // Interrupt Disable Register
+#define SPI_IMR         (28) // Interrupt Mask Register
+#define SPI_CSR         (48) // Chip Select Register
+#define SPI_RPR         (256) // Receive Pointer Register
+#define SPI_RCR         (260) // Receive Counter Register
+#define SPI_TPR         (264) // Transmit Pointer Register
+#define SPI_TCR         (268) // Transmit Counter Register
+#define SPI_RNPR        (272) // Receive Next Pointer Register
+#define SPI_RNCR        (276) // Receive Next Counter Register
+#define SPI_TNPR        (280) // Transmit Next Pointer Register
+#define SPI_TNCR        (284) // Transmit Next Counter Register
+#define SPI_PTCR        (288) // PDC Transfer Control Register
+#define SPI_PTSR        (292) // PDC Transfer Status Register
+// -------- SPI_CR : (SPI Offset: 0x0) SPI Control Register -------- 
+#define AT91C_SPI_SPIEN           (0x1 <<  0) // (SPI) SPI Enable
+#define AT91C_SPI_SPIDIS          (0x1 <<  1) // (SPI) SPI Disable
+#define AT91C_SPI_SWRST           (0x1 <<  7) // (SPI) SPI Software reset
+#define AT91C_SPI_LASTXFER        (0x1 << 24) // (SPI) SPI Last Transfer
+// -------- SPI_MR : (SPI Offset: 0x4) SPI Mode Register -------- 
+#define AT91C_SPI_MSTR            (0x1 <<  0) // (SPI) Master/Slave Mode
+#define AT91C_SPI_PS              (0x1 <<  1) // (SPI) Peripheral Select
+#define 	AT91C_SPI_PS_FIXED                (0x0 <<  1) // (SPI) Fixed Peripheral Select
+#define 	AT91C_SPI_PS_VARIABLE             (0x1 <<  1) // (SPI) Variable Peripheral Select
+#define AT91C_SPI_PCSDEC          (0x1 <<  2) // (SPI) Chip Select Decode
+#define AT91C_SPI_FDIV            (0x1 <<  3) // (SPI) Clock Selection
+#define AT91C_SPI_MODFDIS         (0x1 <<  4) // (SPI) Mode Fault Detection
+#define AT91C_SPI_LLB             (0x1 <<  7) // (SPI) Clock Selection
+#define AT91C_SPI_PCS             (0xF << 16) // (SPI) Peripheral Chip Select
+#define AT91C_SPI_DLYBCS          (0xFF << 24) // (SPI) Delay Between Chip Selects
+// -------- SPI_RDR : (SPI Offset: 0x8) Receive Data Register -------- 
+#define AT91C_SPI_RD              (0xFFFF <<  0) // (SPI) Receive Data
+#define AT91C_SPI_RPCS            (0xF << 16) // (SPI) Peripheral Chip Select Status
+// -------- SPI_TDR : (SPI Offset: 0xc) Transmit Data Register -------- 
+#define AT91C_SPI_TD              (0xFFFF <<  0) // (SPI) Transmit Data
+#define AT91C_SPI_TPCS            (0xF << 16) // (SPI) Peripheral Chip Select Status
+// -------- SPI_SR : (SPI Offset: 0x10) Status Register -------- 
+#define AT91C_SPI_RDRF            (0x1 <<  0) // (SPI) Receive Data Register Full
+#define AT91C_SPI_TDRE            (0x1 <<  1) // (SPI) Transmit Data Register Empty
+#define AT91C_SPI_MODF            (0x1 <<  2) // (SPI) Mode Fault Error
+#define AT91C_SPI_OVRES           (0x1 <<  3) // (SPI) Overrun Error Status
+#define AT91C_SPI_ENDRX           (0x1 <<  4) // (SPI) End of Receiver Transfer
+#define AT91C_SPI_ENDTX           (0x1 <<  5) // (SPI) End of Receiver Transfer
+#define AT91C_SPI_RXBUFF          (0x1 <<  6) // (SPI) RXBUFF Interrupt
+#define AT91C_SPI_TXBUFE          (0x1 <<  7) // (SPI) TXBUFE Interrupt
+#define AT91C_SPI_NSSR            (0x1 <<  8) // (SPI) NSSR Interrupt
+#define AT91C_SPI_TXEMPTY         (0x1 <<  9) // (SPI) TXEMPTY Interrupt
+#define AT91C_SPI_SPIENS          (0x1 << 16) // (SPI) Enable Status
+// -------- SPI_IER : (SPI Offset: 0x14) Interrupt Enable Register -------- 
+// -------- SPI_IDR : (SPI Offset: 0x18) Interrupt Disable Register -------- 
+// -------- SPI_IMR : (SPI Offset: 0x1c) Interrupt Mask Register -------- 
+// -------- SPI_CSR : (SPI Offset: 0x30) Chip Select Register -------- 
+#define AT91C_SPI_CPOL            (0x1 <<  0) // (SPI) Clock Polarity
+#define AT91C_SPI_NCPHA           (0x1 <<  1) // (SPI) Clock Phase
+#define AT91C_SPI_CSAAT           (0x1 <<  3) // (SPI) Chip Select Active After Transfer
+#define AT91C_SPI_BITS            (0xF <<  4) // (SPI) Bits Per Transfer
+#define 	AT91C_SPI_BITS_8                    (0x0 <<  4) // (SPI) 8 Bits Per transfer
+#define 	AT91C_SPI_BITS_9                    (0x1 <<  4) // (SPI) 9 Bits Per transfer
+#define 	AT91C_SPI_BITS_10                   (0x2 <<  4) // (SPI) 10 Bits Per transfer
+#define 	AT91C_SPI_BITS_11                   (0x3 <<  4) // (SPI) 11 Bits Per transfer
+#define 	AT91C_SPI_BITS_12                   (0x4 <<  4) // (SPI) 12 Bits Per transfer
+#define 	AT91C_SPI_BITS_13                   (0x5 <<  4) // (SPI) 13 Bits Per transfer
+#define 	AT91C_SPI_BITS_14                   (0x6 <<  4) // (SPI) 14 Bits Per transfer
+#define 	AT91C_SPI_BITS_15                   (0x7 <<  4) // (SPI) 15 Bits Per transfer
+#define 	AT91C_SPI_BITS_16                   (0x8 <<  4) // (SPI) 16 Bits Per transfer
+#define AT91C_SPI_SCBR            (0xFF <<  8) // (SPI) Serial Clock Baud Rate
+#define AT91C_SPI_DLYBS           (0xFF << 16) // (SPI) Delay Before SPCK
+#define AT91C_SPI_DLYBCT          (0xFF << 24) // (SPI) Delay Between Consecutive Transfers
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Usart
+// *****************************************************************************
+// *** Register offset in AT91S_USART structure ***
+#define US_CR           ( 0) // Control Register
+#define US_MR           ( 4) // Mode Register
+#define US_IER          ( 8) // Interrupt Enable Register
+#define US_IDR          (12) // Interrupt Disable Register
+#define US_IMR          (16) // Interrupt Mask Register
+#define US_CSR          (20) // Channel Status Register
+#define US_RHR          (24) // Receiver Holding Register
+#define US_THR          (28) // Transmitter Holding Register
+#define US_BRGR         (32) // Baud Rate Generator Register
+#define US_RTOR         (36) // Receiver Time-out Register
+#define US_TTGR         (40) // Transmitter Time-guard Register
+#define US_FIDI         (64) // FI_DI_Ratio Register
+#define US_NER          (68) // Nb Errors Register
+#define US_IF           (76) // IRDA_FILTER Register
+#define US_RPR          (256) // Receive Pointer Register
+#define US_RCR          (260) // Receive Counter Register
+#define US_TPR          (264) // Transmit Pointer Register
+#define US_TCR          (268) // Transmit Counter Register
+#define US_RNPR         (272) // Receive Next Pointer Register
+#define US_RNCR         (276) // Receive Next Counter Register
+#define US_TNPR         (280) // Transmit Next Pointer Register
+#define US_TNCR         (284) // Transmit Next Counter Register
+#define US_PTCR         (288) // PDC Transfer Control Register
+#define US_PTSR         (292) // PDC Transfer Status Register
+// -------- US_CR : (USART Offset: 0x0) Debug Unit Control Register -------- 
+#define AT91C_US_STTBRK           (0x1 <<  9) // (USART) Start Break
+#define AT91C_US_STPBRK           (0x1 << 10) // (USART) Stop Break
+#define AT91C_US_STTTO            (0x1 << 11) // (USART) Start Time-out
+#define AT91C_US_SENDA            (0x1 << 12) // (USART) Send Address
+#define AT91C_US_RSTIT            (0x1 << 13) // (USART) Reset Iterations
+#define AT91C_US_RSTNACK          (0x1 << 14) // (USART) Reset Non Acknowledge
+#define AT91C_US_RETTO            (0x1 << 15) // (USART) Rearm Time-out
+#define AT91C_US_DTREN            (0x1 << 16) // (USART) Data Terminal ready Enable
+#define AT91C_US_DTRDIS           (0x1 << 17) // (USART) Data Terminal ready Disable
+#define AT91C_US_RTSEN            (0x1 << 18) // (USART) Request to Send enable
+#define AT91C_US_RTSDIS           (0x1 << 19) // (USART) Request to Send Disable
+// -------- US_MR : (USART Offset: 0x4) Debug Unit Mode Register -------- 
+#define AT91C_US_USMODE           (0xF <<  0) // (USART) Usart mode
+#define 	AT91C_US_USMODE_NORMAL               (0x0) // (USART) Normal
+#define 	AT91C_US_USMODE_RS485                (0x1) // (USART) RS485
+#define 	AT91C_US_USMODE_HWHSH                (0x2) // (USART) Hardware Handshaking
+#define 	AT91C_US_USMODE_MODEM                (0x3) // (USART) Modem
+#define 	AT91C_US_USMODE_ISO7816_0            (0x4) // (USART) ISO7816 protocol: T = 0
+#define 	AT91C_US_USMODE_ISO7816_1            (0x6) // (USART) ISO7816 protocol: T = 1
+#define 	AT91C_US_USMODE_IRDA                 (0x8) // (USART) IrDA
+#define 	AT91C_US_USMODE_SWHSH                (0xC) // (USART) Software Handshaking
+#define AT91C_US_CLKS             (0x3 <<  4) // (USART) Clock Selection (Baud Rate generator Input Clock
+#define 	AT91C_US_CLKS_CLOCK                (0x0 <<  4) // (USART) Clock
+#define 	AT91C_US_CLKS_FDIV1                (0x1 <<  4) // (USART) fdiv1
+#define 	AT91C_US_CLKS_SLOW                 (0x2 <<  4) // (USART) slow_clock (ARM)
+#define 	AT91C_US_CLKS_EXT                  (0x3 <<  4) // (USART) External (SCK)
+#define AT91C_US_CHRL             (0x3 <<  6) // (USART) Clock Selection (Baud Rate generator Input Clock
+#define 	AT91C_US_CHRL_5_BITS               (0x0 <<  6) // (USART) Character Length: 5 bits
+#define 	AT91C_US_CHRL_6_BITS               (0x1 <<  6) // (USART) Character Length: 6 bits
+#define 	AT91C_US_CHRL_7_BITS               (0x2 <<  6) // (USART) Character Length: 7 bits
+#define 	AT91C_US_CHRL_8_BITS               (0x3 <<  6) // (USART) Character Length: 8 bits
+#define AT91C_US_SYNC             (0x1 <<  8) // (USART) Synchronous Mode Select
+#define AT91C_US_NBSTOP           (0x3 << 12) // (USART) Number of Stop bits
+#define 	AT91C_US_NBSTOP_1_BIT                (0x0 << 12) // (USART) 1 stop bit
+#define 	AT91C_US_NBSTOP_15_BIT               (0x1 << 12) // (USART) Asynchronous (SYNC=0) 2 stop bits Synchronous (SYNC=1) 2 stop bits
+#define 	AT91C_US_NBSTOP_2_BIT                (0x2 << 12) // (USART) 2 stop bits
+#define AT91C_US_MSBF             (0x1 << 16) // (USART) Bit Order
+#define AT91C_US_MODE9            (0x1 << 17) // (USART) 9-bit Character length
+#define AT91C_US_CKLO             (0x1 << 18) // (USART) Clock Output Select
+#define AT91C_US_OVER             (0x1 << 19) // (USART) Over Sampling Mode
+#define AT91C_US_INACK            (0x1 << 20) // (USART) Inhibit Non Acknowledge
+#define AT91C_US_DSNACK           (0x1 << 21) // (USART) Disable Successive NACK
+#define AT91C_US_MAX_ITER         (0x1 << 24) // (USART) Number of Repetitions
+#define AT91C_US_FILTER           (0x1 << 28) // (USART) Receive Line Filter
+// -------- US_IER : (USART Offset: 0x8) Debug Unit Interrupt Enable Register -------- 
+#define AT91C_US_RXBRK            (0x1 <<  2) // (USART) Break Received/End of Break
+#define AT91C_US_TIMEOUT          (0x1 <<  8) // (USART) Receiver Time-out
+#define AT91C_US_ITERATION        (0x1 << 10) // (USART) Max number of Repetitions Reached
+#define AT91C_US_NACK             (0x1 << 13) // (USART) Non Acknowledge
+#define AT91C_US_RIIC             (0x1 << 16) // (USART) Ring INdicator Input Change Flag
+#define AT91C_US_DSRIC            (0x1 << 17) // (USART) Data Set Ready Input Change Flag
+#define AT91C_US_DCDIC            (0x1 << 18) // (USART) Data Carrier Flag
+#define AT91C_US_CTSIC            (0x1 << 19) // (USART) Clear To Send Input Change Flag
+// -------- US_IDR : (USART Offset: 0xc) Debug Unit Interrupt Disable Register -------- 
+// -------- US_IMR : (USART Offset: 0x10) Debug Unit Interrupt Mask Register -------- 
+// -------- US_CSR : (USART Offset: 0x14) Debug Unit Channel Status Register -------- 
+#define AT91C_US_RI               (0x1 << 20) // (USART) Image of RI Input
+#define AT91C_US_DSR              (0x1 << 21) // (USART) Image of DSR Input
+#define AT91C_US_DCD              (0x1 << 22) // (USART) Image of DCD Input
+#define AT91C_US_CTS              (0x1 << 23) // (USART) Image of CTS Input
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Synchronous Serial Controller Interface
+// *****************************************************************************
+// *** Register offset in AT91S_SSC structure ***
+#define SSC_CR          ( 0) // Control Register
+#define SSC_CMR         ( 4) // Clock Mode Register
+#define SSC_RCMR        (16) // Receive Clock ModeRegister
+#define SSC_RFMR        (20) // Receive Frame Mode Register
+#define SSC_TCMR        (24) // Transmit Clock Mode Register
+#define SSC_TFMR        (28) // Transmit Frame Mode Register
+#define SSC_RHR         (32) // Receive Holding Register
+#define SSC_THR         (36) // Transmit Holding Register
+#define SSC_RSHR        (48) // Receive Sync Holding Register
+#define SSC_TSHR        (52) // Transmit Sync Holding Register
+#define SSC_SR          (64) // Status Register
+#define SSC_IER         (68) // Interrupt Enable Register
+#define SSC_IDR         (72) // Interrupt Disable Register
+#define SSC_IMR         (76) // Interrupt Mask Register
+#define SSC_RPR         (256) // Receive Pointer Register
+#define SSC_RCR         (260) // Receive Counter Register
+#define SSC_TPR         (264) // Transmit Pointer Register
+#define SSC_TCR         (268) // Transmit Counter Register
+#define SSC_RNPR        (272) // Receive Next Pointer Register
+#define SSC_RNCR        (276) // Receive Next Counter Register
+#define SSC_TNPR        (280) // Transmit Next Pointer Register
+#define SSC_TNCR        (284) // Transmit Next Counter Register
+#define SSC_PTCR        (288) // PDC Transfer Control Register
+#define SSC_PTSR        (292) // PDC Transfer Status Register
+// -------- SSC_CR : (SSC Offset: 0x0) SSC Control Register -------- 
+#define AT91C_SSC_RXEN            (0x1 <<  0) // (SSC) Receive Enable
+#define AT91C_SSC_RXDIS           (0x1 <<  1) // (SSC) Receive Disable
+#define AT91C_SSC_TXEN            (0x1 <<  8) // (SSC) Transmit Enable
+#define AT91C_SSC_TXDIS           (0x1 <<  9) // (SSC) Transmit Disable
+#define AT91C_SSC_SWRST           (0x1 << 15) // (SSC) Software Reset
+// -------- SSC_RCMR : (SSC Offset: 0x10) SSC Receive Clock Mode Register -------- 
+#define AT91C_SSC_CKS             (0x3 <<  0) // (SSC) Receive/Transmit Clock Selection
+#define 	AT91C_SSC_CKS_DIV                  (0x0) // (SSC) Divided Clock
+#define 	AT91C_SSC_CKS_TK                   (0x1) // (SSC) TK Clock signal
+#define 	AT91C_SSC_CKS_RK                   (0x2) // (SSC) RK pin
+#define AT91C_SSC_CKO             (0x7 <<  2) // (SSC) Receive/Transmit Clock Output Mode Selection
+#define 	AT91C_SSC_CKO_NONE                 (0x0 <<  2) // (SSC) Receive/Transmit Clock Output Mode: None RK pin: Input-only
+#define 	AT91C_SSC_CKO_CONTINOUS            (0x1 <<  2) // (SSC) Continuous Receive/Transmit Clock RK pin: Output
+#define 	AT91C_SSC_CKO_DATA_TX              (0x2 <<  2) // (SSC) Receive/Transmit Clock only during data transfers RK pin: Output
+#define AT91C_SSC_CKI             (0x1 <<  5) // (SSC) Receive/Transmit Clock Inversion
+#define AT91C_SSC_CKG             (0x3 <<  6) // (SSC) Receive/Transmit Clock Gating Selection
+#define 	AT91C_SSC_CKG_NONE                 (0x0 <<  6) // (SSC) Receive/Transmit Clock Gating: None, continuous clock
+#define 	AT91C_SSC_CKG_LOW                  (0x1 <<  6) // (SSC) Receive/Transmit Clock enabled only if RF Low
+#define 	AT91C_SSC_CKG_HIGH                 (0x2 <<  6) // (SSC) Receive/Transmit Clock enabled only if RF High
+#define AT91C_SSC_START           (0xF <<  8) // (SSC) Receive/Transmit Start Selection
+#define 	AT91C_SSC_START_CONTINOUS            (0x0 <<  8) // (SSC) Continuous, as soon as the receiver is enabled, and immediately after the end of transfer of the previous data.
+#define 	AT91C_SSC_START_TX                   (0x1 <<  8) // (SSC) Transmit/Receive start
+#define 	AT91C_SSC_START_LOW_RF               (0x2 <<  8) // (SSC) Detection of a low level on RF input
+#define 	AT91C_SSC_START_HIGH_RF              (0x3 <<  8) // (SSC) Detection of a high level on RF input
+#define 	AT91C_SSC_START_FALL_RF              (0x4 <<  8) // (SSC) Detection of a falling edge on RF input
+#define 	AT91C_SSC_START_RISE_RF              (0x5 <<  8) // (SSC) Detection of a rising edge on RF input
+#define 	AT91C_SSC_START_LEVEL_RF             (0x6 <<  8) // (SSC) Detection of any level change on RF input
+#define 	AT91C_SSC_START_EDGE_RF              (0x7 <<  8) // (SSC) Detection of any edge on RF input
+#define 	AT91C_SSC_START_0                    (0x8 <<  8) // (SSC) Compare 0
+#define AT91C_SSC_STOP            (0x1 << 12) // (SSC) Receive Stop Selection
+#define AT91C_SSC_STTDLY          (0xFF << 16) // (SSC) Receive/Transmit Start Delay
+#define AT91C_SSC_PERIOD          (0xFF << 24) // (SSC) Receive/Transmit Period Divider Selection
+// -------- SSC_RFMR : (SSC Offset: 0x14) SSC Receive Frame Mode Register -------- 
+#define AT91C_SSC_DATLEN          (0x1F <<  0) // (SSC) Data Length
+#define AT91C_SSC_LOOP            (0x1 <<  5) // (SSC) Loop Mode
+#define AT91C_SSC_MSBF            (0x1 <<  7) // (SSC) Most Significant Bit First
+#define AT91C_SSC_DATNB           (0xF <<  8) // (SSC) Data Number per Frame
+#define AT91C_SSC_FSLEN           (0xF << 16) // (SSC) Receive/Transmit Frame Sync length
+#define AT91C_SSC_FSOS            (0x7 << 20) // (SSC) Receive/Transmit Frame Sync Output Selection
+#define 	AT91C_SSC_FSOS_NONE                 (0x0 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: None RK pin Input-only
+#define 	AT91C_SSC_FSOS_NEGATIVE             (0x1 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Negative Pulse
+#define 	AT91C_SSC_FSOS_POSITIVE             (0x2 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Positive Pulse
+#define 	AT91C_SSC_FSOS_LOW                  (0x3 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Driver Low during data transfer
+#define 	AT91C_SSC_FSOS_HIGH                 (0x4 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Driver High during data transfer
+#define 	AT91C_SSC_FSOS_TOGGLE               (0x5 << 20) // (SSC) Selected Receive/Transmit Frame Sync Signal: Toggling at each start of data transfer
+#define AT91C_SSC_FSEDGE          (0x1 << 24) // (SSC) Frame Sync Edge Detection
+// -------- SSC_TCMR : (SSC Offset: 0x18) SSC Transmit Clock Mode Register -------- 
+// -------- SSC_TFMR : (SSC Offset: 0x1c) SSC Transmit Frame Mode Register -------- 
+#define AT91C_SSC_DATDEF          (0x1 <<  5) // (SSC) Data Default Value
+#define AT91C_SSC_FSDEN           (0x1 << 23) // (SSC) Frame Sync Data Enable
+// -------- SSC_SR : (SSC Offset: 0x40) SSC Status Register -------- 
+#define AT91C_SSC_TXRDY           (0x1 <<  0) // (SSC) Transmit Ready
+#define AT91C_SSC_TXEMPTY         (0x1 <<  1) // (SSC) Transmit Empty
+#define AT91C_SSC_ENDTX           (0x1 <<  2) // (SSC) End Of Transmission
+#define AT91C_SSC_TXBUFE          (0x1 <<  3) // (SSC) Transmit Buffer Empty
+#define AT91C_SSC_RXRDY           (0x1 <<  4) // (SSC) Receive Ready
+#define AT91C_SSC_OVRUN           (0x1 <<  5) // (SSC) Receive Overrun
+#define AT91C_SSC_ENDRX           (0x1 <<  6) // (SSC) End of Reception
+#define AT91C_SSC_RXBUFF          (0x1 <<  7) // (SSC) Receive Buffer Full
+#define AT91C_SSC_CP0             (0x1 <<  8) // (SSC) Compare 0
+#define AT91C_SSC_CP1             (0x1 <<  9) // (SSC) Compare 1
+#define AT91C_SSC_TXSYN           (0x1 << 10) // (SSC) Transmit Sync
+#define AT91C_SSC_RXSYN           (0x1 << 11) // (SSC) Receive Sync
+#define AT91C_SSC_TXENA           (0x1 << 16) // (SSC) Transmit Enable
+#define AT91C_SSC_RXENA           (0x1 << 17) // (SSC) Receive Enable
+// -------- SSC_IER : (SSC Offset: 0x44) SSC Interrupt Enable Register -------- 
+// -------- SSC_IDR : (SSC Offset: 0x48) SSC Interrupt Disable Register -------- 
+// -------- SSC_IMR : (SSC Offset: 0x4c) SSC Interrupt Mask Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Two-wire Interface
+// *****************************************************************************
+// *** Register offset in AT91S_TWI structure ***
+#define TWI_CR          ( 0) // Control Register
+#define TWI_MMR         ( 4) // Master Mode Register
+#define TWI_IADR        (12) // Internal Address Register
+#define TWI_CWGR        (16) // Clock Waveform Generator Register
+#define TWI_SR          (32) // Status Register
+#define TWI_IER         (36) // Interrupt Enable Register
+#define TWI_IDR         (40) // Interrupt Disable Register
+#define TWI_IMR         (44) // Interrupt Mask Register
+#define TWI_RHR         (48) // Receive Holding Register
+#define TWI_THR         (52) // Transmit Holding Register
+// -------- TWI_CR : (TWI Offset: 0x0) TWI Control Register -------- 
+#define AT91C_TWI_START           (0x1 <<  0) // (TWI) Send a START Condition
+#define AT91C_TWI_STOP            (0x1 <<  1) // (TWI) Send a STOP Condition
+#define AT91C_TWI_MSEN            (0x1 <<  2) // (TWI) TWI Master Transfer Enabled
+#define AT91C_TWI_MSDIS           (0x1 <<  3) // (TWI) TWI Master Transfer Disabled
+#define AT91C_TWI_SWRST           (0x1 <<  7) // (TWI) Software Reset
+// -------- TWI_MMR : (TWI Offset: 0x4) TWI Master Mode Register -------- 
+#define AT91C_TWI_IADRSZ          (0x3 <<  8) // (TWI) Internal Device Address Size
+#define 	AT91C_TWI_IADRSZ_NO                   (0x0 <<  8) // (TWI) No internal device address
+#define 	AT91C_TWI_IADRSZ_1_BYTE               (0x1 <<  8) // (TWI) One-byte internal device address
+#define 	AT91C_TWI_IADRSZ_2_BYTE               (0x2 <<  8) // (TWI) Two-byte internal device address
+#define 	AT91C_TWI_IADRSZ_3_BYTE               (0x3 <<  8) // (TWI) Three-byte internal device address
+#define AT91C_TWI_MREAD           (0x1 << 12) // (TWI) Master Read Direction
+#define AT91C_TWI_DADR            (0x7F << 16) // (TWI) Device Address
+// -------- TWI_CWGR : (TWI Offset: 0x10) TWI Clock Waveform Generator Register -------- 
+#define AT91C_TWI_CLDIV           (0xFF <<  0) // (TWI) Clock Low Divider
+#define AT91C_TWI_CHDIV           (0xFF <<  8) // (TWI) Clock High Divider
+#define AT91C_TWI_CKDIV           (0x7 << 16) // (TWI) Clock Divider
+// -------- TWI_SR : (TWI Offset: 0x20) TWI Status Register -------- 
+#define AT91C_TWI_TXCOMP          (0x1 <<  0) // (TWI) Transmission Completed
+#define AT91C_TWI_RXRDY           (0x1 <<  1) // (TWI) Receive holding register ReaDY
+#define AT91C_TWI_TXRDY           (0x1 <<  2) // (TWI) Transmit holding register ReaDY
+#define AT91C_TWI_OVRE            (0x1 <<  6) // (TWI) Overrun Error
+#define AT91C_TWI_UNRE            (0x1 <<  7) // (TWI) Underrun Error
+#define AT91C_TWI_NACK            (0x1 <<  8) // (TWI) Not Acknowledged
+// -------- TWI_IER : (TWI Offset: 0x24) TWI Interrupt Enable Register -------- 
+// -------- TWI_IDR : (TWI Offset: 0x28) TWI Interrupt Disable Register -------- 
+// -------- TWI_IMR : (TWI Offset: 0x2c) TWI Interrupt Mask Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR PWMC Channel Interface
+// *****************************************************************************
+// *** Register offset in AT91S_PWMC_CH structure ***
+#define PWMC_CMR        ( 0) // Channel Mode Register
+#define PWMC_CDTYR      ( 4) // Channel Duty Cycle Register
+#define PWMC_CPRDR      ( 8) // Channel Period Register
+#define PWMC_CCNTR      (12) // Channel Counter Register
+#define PWMC_CUPDR      (16) // Channel Update Register
+#define PWMC_Reserved   (20) // Reserved
+// -------- PWMC_CMR : (PWMC_CH Offset: 0x0) PWMC Channel Mode Register -------- 
+#define AT91C_PWMC_CPRE           (0xF <<  0) // (PWMC_CH) Channel Pre-scaler : PWMC_CLKx
+#define 	AT91C_PWMC_CPRE_MCK                  (0x0) // (PWMC_CH) 
+#define 	AT91C_PWMC_CPRE_MCKA                 (0xB) // (PWMC_CH) 
+#define 	AT91C_PWMC_CPRE_MCKB                 (0xC) // (PWMC_CH) 
+#define AT91C_PWMC_CALG           (0x1 <<  8) // (PWMC_CH) Channel Alignment
+#define AT91C_PWMC_CPOL           (0x1 <<  9) // (PWMC_CH) Channel Polarity
+#define AT91C_PWMC_CPD            (0x1 << 10) // (PWMC_CH) Channel Update Period
+// -------- PWMC_CDTYR : (PWMC_CH Offset: 0x4) PWMC Channel Duty Cycle Register -------- 
+#define AT91C_PWMC_CDTY           (0x0 <<  0) // (PWMC_CH) Channel Duty Cycle
+// -------- PWMC_CPRDR : (PWMC_CH Offset: 0x8) PWMC Channel Period Register -------- 
+#define AT91C_PWMC_CPRD           (0x0 <<  0) // (PWMC_CH) Channel Period
+// -------- PWMC_CCNTR : (PWMC_CH Offset: 0xc) PWMC Channel Counter Register -------- 
+#define AT91C_PWMC_CCNT           (0x0 <<  0) // (PWMC_CH) Channel Counter
+// -------- PWMC_CUPDR : (PWMC_CH Offset: 0x10) PWMC Channel Update Register -------- 
+#define AT91C_PWMC_CUPD           (0x0 <<  0) // (PWMC_CH) Channel Update
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Pulse Width Modulation Controller Interface
+// *****************************************************************************
+// *** Register offset in AT91S_PWMC structure ***
+#define PWMC_MR         ( 0) // PWMC Mode Register
+#define PWMC_ENA        ( 4) // PWMC Enable Register
+#define PWMC_DIS        ( 8) // PWMC Disable Register
+#define PWMC_SR         (12) // PWMC Status Register
+#define PWMC_IER        (16) // PWMC Interrupt Enable Register
+#define PWMC_IDR        (20) // PWMC Interrupt Disable Register
+#define PWMC_IMR        (24) // PWMC Interrupt Mask Register
+#define PWMC_ISR        (28) // PWMC Interrupt Status Register
+#define PWMC_VR         (252) // PWMC Version Register
+#define PWMC_CH         (512) // PWMC Channel
+// -------- PWMC_MR : (PWMC Offset: 0x0) PWMC Mode Register -------- 
+#define AT91C_PWMC_DIVA           (0xFF <<  0) // (PWMC) CLKA divide factor.
+#define AT91C_PWMC_PREA           (0xF <<  8) // (PWMC) Divider Input Clock Prescaler A
+#define 	AT91C_PWMC_PREA_MCK                  (0x0 <<  8) // (PWMC) 
+#define AT91C_PWMC_DIVB           (0xFF << 16) // (PWMC) CLKB divide factor.
+#define AT91C_PWMC_PREB           (0xF << 24) // (PWMC) Divider Input Clock Prescaler B
+#define 	AT91C_PWMC_PREB_MCK                  (0x0 << 24) // (PWMC) 
+// -------- PWMC_ENA : (PWMC Offset: 0x4) PWMC Enable Register -------- 
+#define AT91C_PWMC_CHID0          (0x1 <<  0) // (PWMC) Channel ID 0
+#define AT91C_PWMC_CHID1          (0x1 <<  1) // (PWMC) Channel ID 1
+#define AT91C_PWMC_CHID2          (0x1 <<  2) // (PWMC) Channel ID 2
+#define AT91C_PWMC_CHID3          (0x1 <<  3) // (PWMC) Channel ID 3
+// -------- PWMC_DIS : (PWMC Offset: 0x8) PWMC Disable Register -------- 
+// -------- PWMC_SR : (PWMC Offset: 0xc) PWMC Status Register -------- 
+// -------- PWMC_IER : (PWMC Offset: 0x10) PWMC Interrupt Enable Register -------- 
+// -------- PWMC_IDR : (PWMC Offset: 0x14) PWMC Interrupt Disable Register -------- 
+// -------- PWMC_IMR : (PWMC Offset: 0x18) PWMC Interrupt Mask Register -------- 
+// -------- PWMC_ISR : (PWMC Offset: 0x1c) PWMC Interrupt Status Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR USB Device Interface
+// *****************************************************************************
+// *** Register offset in AT91S_UDP structure ***
+#define UDP_NUM         ( 0) // Frame Number Register
+#define UDP_GLBSTATE    ( 4) // Global State Register
+#define UDP_FADDR       ( 8) // Function Address Register
+#define UDP_IER         (16) // Interrupt Enable Register
+#define UDP_IDR         (20) // Interrupt Disable Register
+#define UDP_IMR         (24) // Interrupt Mask Register
+#define UDP_ISR         (28) // Interrupt Status Register
+#define UDP_ICR         (32) // Interrupt Clear Register
+#define UDP_RSTEP       (40) // Reset Endpoint Register
+#define UDP_CSR         (48) // Endpoint Control and Status Register
+#define UDP_FDR         (80) // Endpoint FIFO Data Register
+#define UDP_TXVC        (116) // Transceiver Control Register
+// -------- UDP_FRM_NUM : (UDP Offset: 0x0) USB Frame Number Register -------- 
+#define AT91C_UDP_FRM_NUM         (0x7FF <<  0) // (UDP) Frame Number as Defined in the Packet Field Formats
+#define AT91C_UDP_FRM_ERR         (0x1 << 16) // (UDP) Frame Error
+#define AT91C_UDP_FRM_OK          (0x1 << 17) // (UDP) Frame OK
+// -------- UDP_GLB_STATE : (UDP Offset: 0x4) USB Global State Register -------- 
+#define AT91C_UDP_FADDEN          (0x1 <<  0) // (UDP) Function Address Enable
+#define AT91C_UDP_CONFG           (0x1 <<  1) // (UDP) Configured
+#define AT91C_UDP_ESR             (0x1 <<  2) // (UDP) Enable Send Resume
+#define AT91C_UDP_RSMINPR         (0x1 <<  3) // (UDP) A Resume Has Been Sent to the Host
+#define AT91C_UDP_RMWUPE          (0x1 <<  4) // (UDP) Remote Wake Up Enable
+// -------- UDP_FADDR : (UDP Offset: 0x8) USB Function Address Register -------- 
+#define AT91C_UDP_FADD            (0xFF <<  0) // (UDP) Function Address Value
+#define AT91C_UDP_FEN             (0x1 <<  8) // (UDP) Function Enable
+// -------- UDP_IER : (UDP Offset: 0x10) USB Interrupt Enable Register -------- 
+#define AT91C_UDP_EPINT0          (0x1 <<  0) // (UDP) Endpoint 0 Interrupt
+#define AT91C_UDP_EPINT1          (0x1 <<  1) // (UDP) Endpoint 0 Interrupt
+#define AT91C_UDP_EPINT2          (0x1 <<  2) // (UDP) Endpoint 2 Interrupt
+#define AT91C_UDP_EPINT3          (0x1 <<  3) // (UDP) Endpoint 3 Interrupt
+#define AT91C_UDP_EPINT4          (0x1 <<  4) // (UDP) Endpoint 4 Interrupt
+#define AT91C_UDP_EPINT5          (0x1 <<  5) // (UDP) Endpoint 5 Interrupt
+#define AT91C_UDP_RXSUSP          (0x1 <<  8) // (UDP) USB Suspend Interrupt
+#define AT91C_UDP_RXRSM           (0x1 <<  9) // (UDP) USB Resume Interrupt
+#define AT91C_UDP_EXTRSM          (0x1 << 10) // (UDP) USB External Resume Interrupt
+#define AT91C_UDP_SOFINT          (0x1 << 11) // (UDP) USB Start Of frame Interrupt
+#define AT91C_UDP_WAKEUP          (0x1 << 13) // (UDP) USB Resume Interrupt
+// -------- UDP_IDR : (UDP Offset: 0x14) USB Interrupt Disable Register -------- 
+// -------- UDP_IMR : (UDP Offset: 0x18) USB Interrupt Mask Register -------- 
+// -------- UDP_ISR : (UDP Offset: 0x1c) USB Interrupt Status Register -------- 
+#define AT91C_UDP_ENDBUSRES       (0x1 << 12) // (UDP) USB End Of Bus Reset Interrupt
+// -------- UDP_ICR : (UDP Offset: 0x20) USB Interrupt Clear Register -------- 
+// -------- UDP_RST_EP : (UDP Offset: 0x28) USB Reset Endpoint Register -------- 
+#define AT91C_UDP_EP0             (0x1 <<  0) // (UDP) Reset Endpoint 0
+#define AT91C_UDP_EP1             (0x1 <<  1) // (UDP) Reset Endpoint 1
+#define AT91C_UDP_EP2             (0x1 <<  2) // (UDP) Reset Endpoint 2
+#define AT91C_UDP_EP3             (0x1 <<  3) // (UDP) Reset Endpoint 3
+#define AT91C_UDP_EP4             (0x1 <<  4) // (UDP) Reset Endpoint 4
+#define AT91C_UDP_EP5             (0x1 <<  5) // (UDP) Reset Endpoint 5
+// -------- UDP_CSR : (UDP Offset: 0x30) USB Endpoint Control and Status Register -------- 
+#define AT91C_UDP_TXCOMP          (0x1 <<  0) // (UDP) Generates an IN packet with data previously written in the DPR
+#define AT91C_UDP_RX_DATA_BK0     (0x1 <<  1) // (UDP) Receive Data Bank 0
+#define AT91C_UDP_RXSETUP         (0x1 <<  2) // (UDP) Sends STALL to the Host (Control endpoints)
+#define AT91C_UDP_ISOERROR        (0x1 <<  3) // (UDP) Isochronous error (Isochronous endpoints)
+#define AT91C_UDP_TXPKTRDY        (0x1 <<  4) // (UDP) Transmit Packet Ready
+#define AT91C_UDP_FORCESTALL      (0x1 <<  5) // (UDP) Force Stall (used by Control, Bulk and Isochronous endpoints).
+#define AT91C_UDP_RX_DATA_BK1     (0x1 <<  6) // (UDP) Receive Data Bank 1 (only used by endpoints with ping-pong attributes).
+#define AT91C_UDP_DIR             (0x1 <<  7) // (UDP) Transfer Direction
+#define AT91C_UDP_EPTYPE          (0x7 <<  8) // (UDP) Endpoint type
+#define 	AT91C_UDP_EPTYPE_CTRL                 (0x0 <<  8) // (UDP) Control
+#define 	AT91C_UDP_EPTYPE_ISO_OUT              (0x1 <<  8) // (UDP) Isochronous OUT
+#define 	AT91C_UDP_EPTYPE_BULK_OUT             (0x2 <<  8) // (UDP) Bulk OUT
+#define 	AT91C_UDP_EPTYPE_INT_OUT              (0x3 <<  8) // (UDP) Interrupt OUT
+#define 	AT91C_UDP_EPTYPE_ISO_IN               (0x5 <<  8) // (UDP) Isochronous IN
+#define 	AT91C_UDP_EPTYPE_BULK_IN              (0x6 <<  8) // (UDP) Bulk IN
+#define 	AT91C_UDP_EPTYPE_INT_IN               (0x7 <<  8) // (UDP) Interrupt IN
+#define AT91C_UDP_DTGLE           (0x1 << 11) // (UDP) Data Toggle
+#define AT91C_UDP_EPEDS           (0x1 << 15) // (UDP) Endpoint Enable Disable
+#define AT91C_UDP_RXBYTECNT       (0x7FF << 16) // (UDP) Number Of Bytes Available in the FIFO
+// -------- UDP_TXVC : (UDP Offset: 0x74) Transceiver Control Register -------- 
+#define AT91C_UDP_TXVDIS          (0x1 <<  8) // (UDP) 
+#define AT91C_UDP_PUON            (0x1 <<  9) // (UDP) Pull-up ON
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Timer Counter Channel Interface
+// *****************************************************************************
+// *** Register offset in AT91S_TC structure ***
+#define TC_CCR          ( 0) // Channel Control Register
+#define TC_CMR          ( 4) // Channel Mode Register (Capture Mode / Waveform Mode)
+#define TC_CV           (16) // Counter Value
+#define TC_RA           (20) // Register A
+#define TC_RB           (24) // Register B
+#define TC_RC           (28) // Register C
+#define TC_SR           (32) // Status Register
+#define TC_IER          (36) // Interrupt Enable Register
+#define TC_IDR          (40) // Interrupt Disable Register
+#define TC_IMR          (44) // Interrupt Mask Register
+// -------- TC_CCR : (TC Offset: 0x0) TC Channel Control Register -------- 
+#define AT91C_TC_CLKEN            (0x1 <<  0) // (TC) Counter Clock Enable Command
+#define AT91C_TC_CLKDIS           (0x1 <<  1) // (TC) Counter Clock Disable Command
+#define AT91C_TC_SWTRG            (0x1 <<  2) // (TC) Software Trigger Command
+// -------- TC_CMR : (TC Offset: 0x4) TC Channel Mode Register: Capture Mode / Waveform Mode -------- 
+#define AT91C_TC_CLKS             (0x7 <<  0) // (TC) Clock Selection
+#define 	AT91C_TC_CLKS_TIMER_DIV1_CLOCK     (0x0) // (TC) Clock selected: TIMER_DIV1_CLOCK
+#define 	AT91C_TC_CLKS_TIMER_DIV2_CLOCK     (0x1) // (TC) Clock selected: TIMER_DIV2_CLOCK
+#define 	AT91C_TC_CLKS_TIMER_DIV3_CLOCK     (0x2) // (TC) Clock selected: TIMER_DIV3_CLOCK
+#define 	AT91C_TC_CLKS_TIMER_DIV4_CLOCK     (0x3) // (TC) Clock selected: TIMER_DIV4_CLOCK
+#define 	AT91C_TC_CLKS_TIMER_DIV5_CLOCK     (0x4) // (TC) Clock selected: TIMER_DIV5_CLOCK
+#define 	AT91C_TC_CLKS_XC0                  (0x5) // (TC) Clock selected: XC0
+#define 	AT91C_TC_CLKS_XC1                  (0x6) // (TC) Clock selected: XC1
+#define 	AT91C_TC_CLKS_XC2                  (0x7) // (TC) Clock selected: XC2
+#define AT91C_TC_CLKI             (0x1 <<  3) // (TC) Clock Invert
+#define AT91C_TC_BURST            (0x3 <<  4) // (TC) Burst Signal Selection
+#define 	AT91C_TC_BURST_NONE                 (0x0 <<  4) // (TC) The clock is not gated by an external signal
+#define 	AT91C_TC_BURST_XC0                  (0x1 <<  4) // (TC) XC0 is ANDed with the selected clock
+#define 	AT91C_TC_BURST_XC1                  (0x2 <<  4) // (TC) XC1 is ANDed with the selected clock
+#define 	AT91C_TC_BURST_XC2                  (0x3 <<  4) // (TC) XC2 is ANDed with the selected clock
+#define AT91C_TC_CPCSTOP          (0x1 <<  6) // (TC) Counter Clock Stopped with RC Compare
+#define AT91C_TC_LDBSTOP          (0x1 <<  6) // (TC) Counter Clock Stopped with RB Loading
+#define AT91C_TC_LDBDIS           (0x1 <<  7) // (TC) Counter Clock Disabled with RB Loading
+#define AT91C_TC_CPCDIS           (0x1 <<  7) // (TC) Counter Clock Disable with RC Compare
+#define AT91C_TC_ETRGEDG          (0x3 <<  8) // (TC) External Trigger Edge Selection
+#define 	AT91C_TC_ETRGEDG_NONE                 (0x0 <<  8) // (TC) Edge: None
+#define 	AT91C_TC_ETRGEDG_RISING               (0x1 <<  8) // (TC) Edge: rising edge
+#define 	AT91C_TC_ETRGEDG_FALLING              (0x2 <<  8) // (TC) Edge: falling edge
+#define 	AT91C_TC_ETRGEDG_BOTH                 (0x3 <<  8) // (TC) Edge: each edge
+#define AT91C_TC_EEVTEDG          (0x3 <<  8) // (TC) External Event Edge Selection
+#define 	AT91C_TC_EEVTEDG_NONE                 (0x0 <<  8) // (TC) Edge: None
+#define 	AT91C_TC_EEVTEDG_RISING               (0x1 <<  8) // (TC) Edge: rising edge
+#define 	AT91C_TC_EEVTEDG_FALLING              (0x2 <<  8) // (TC) Edge: falling edge
+#define 	AT91C_TC_EEVTEDG_BOTH                 (0x3 <<  8) // (TC) Edge: each edge
+#define AT91C_TC_ABETRG           (0x1 << 10) // (TC) TIOA or TIOB External Trigger Selection
+#define AT91C_TC_EEVT             (0x3 << 10) // (TC) External Event  Selection
+#define 	AT91C_TC_EEVT_TIOB                 (0x0 << 10) // (TC) Signal selected as external event: TIOB TIOB direction: input
+#define 	AT91C_TC_EEVT_XC0                  (0x1 << 10) // (TC) Signal selected as external event: XC0 TIOB direction: output
+#define 	AT91C_TC_EEVT_XC1                  (0x2 << 10) // (TC) Signal selected as external event: XC1 TIOB direction: output
+#define 	AT91C_TC_EEVT_XC2                  (0x3 << 10) // (TC) Signal selected as external event: XC2 TIOB direction: output
+#define AT91C_TC_ENETRG           (0x1 << 12) // (TC) External Event Trigger enable
+#define AT91C_TC_WAVESEL          (0x3 << 13) // (TC) Waveform  Selection
+#define 	AT91C_TC_WAVESEL_UP                   (0x0 << 13) // (TC) UP mode without atomatic trigger on RC Compare
+#define 	AT91C_TC_WAVESEL_UPDOWN               (0x1 << 13) // (TC) UPDOWN mode without automatic trigger on RC Compare
+#define 	AT91C_TC_WAVESEL_UP_AUTO              (0x2 << 13) // (TC) UP mode with automatic trigger on RC Compare
+#define 	AT91C_TC_WAVESEL_UPDOWN_AUTO          (0x3 << 13) // (TC) UPDOWN mode with automatic trigger on RC Compare
+#define AT91C_TC_CPCTRG           (0x1 << 14) // (TC) RC Compare Trigger Enable
+#define AT91C_TC_WAVE             (0x1 << 15) // (TC) 
+#define AT91C_TC_LDRA             (0x3 << 16) // (TC) RA Loading Selection
+#define 	AT91C_TC_LDRA_NONE                 (0x0 << 16) // (TC) Edge: None
+#define 	AT91C_TC_LDRA_RISING               (0x1 << 16) // (TC) Edge: rising edge of TIOA
+#define 	AT91C_TC_LDRA_FALLING              (0x2 << 16) // (TC) Edge: falling edge of TIOA
+#define 	AT91C_TC_LDRA_BOTH                 (0x3 << 16) // (TC) Edge: each edge of TIOA
+#define AT91C_TC_ACPA             (0x3 << 16) // (TC) RA Compare Effect on TIOA
+#define 	AT91C_TC_ACPA_NONE                 (0x0 << 16) // (TC) Effect: none
+#define 	AT91C_TC_ACPA_SET                  (0x1 << 16) // (TC) Effect: set
+#define 	AT91C_TC_ACPA_CLEAR                (0x2 << 16) // (TC) Effect: clear
+#define 	AT91C_TC_ACPA_TOGGLE               (0x3 << 16) // (TC) Effect: toggle
+#define AT91C_TC_LDRB             (0x3 << 18) // (TC) RB Loading Selection
+#define 	AT91C_TC_LDRB_NONE                 (0x0 << 18) // (TC) Edge: None
+#define 	AT91C_TC_LDRB_RISING               (0x1 << 18) // (TC) Edge: rising edge of TIOA
+#define 	AT91C_TC_LDRB_FALLING              (0x2 << 18) // (TC) Edge: falling edge of TIOA
+#define 	AT91C_TC_LDRB_BOTH                 (0x3 << 18) // (TC) Edge: each edge of TIOA
+#define AT91C_TC_ACPC             (0x3 << 18) // (TC) RC Compare Effect on TIOA
+#define 	AT91C_TC_ACPC_NONE                 (0x0 << 18) // (TC) Effect: none
+#define 	AT91C_TC_ACPC_SET                  (0x1 << 18) // (TC) Effect: set
+#define 	AT91C_TC_ACPC_CLEAR                (0x2 << 18) // (TC) Effect: clear
+#define 	AT91C_TC_ACPC_TOGGLE               (0x3 << 18) // (TC) Effect: toggle
+#define AT91C_TC_AEEVT            (0x3 << 20) // (TC) External Event Effect on TIOA
+#define 	AT91C_TC_AEEVT_NONE                 (0x0 << 20) // (TC) Effect: none
+#define 	AT91C_TC_AEEVT_SET                  (0x1 << 20) // (TC) Effect: set
+#define 	AT91C_TC_AEEVT_CLEAR                (0x2 << 20) // (TC) Effect: clear
+#define 	AT91C_TC_AEEVT_TOGGLE               (0x3 << 20) // (TC) Effect: toggle
+#define AT91C_TC_ASWTRG           (0x3 << 22) // (TC) Software Trigger Effect on TIOA
+#define 	AT91C_TC_ASWTRG_NONE                 (0x0 << 22) // (TC) Effect: none
+#define 	AT91C_TC_ASWTRG_SET                  (0x1 << 22) // (TC) Effect: set
+#define 	AT91C_TC_ASWTRG_CLEAR                (0x2 << 22) // (TC) Effect: clear
+#define 	AT91C_TC_ASWTRG_TOGGLE               (0x3 << 22) // (TC) Effect: toggle
+#define AT91C_TC_BCPB             (0x3 << 24) // (TC) RB Compare Effect on TIOB
+#define 	AT91C_TC_BCPB_NONE                 (0x0 << 24) // (TC) Effect: none
+#define 	AT91C_TC_BCPB_SET                  (0x1 << 24) // (TC) Effect: set
+#define 	AT91C_TC_BCPB_CLEAR                (0x2 << 24) // (TC) Effect: clear
+#define 	AT91C_TC_BCPB_TOGGLE               (0x3 << 24) // (TC) Effect: toggle
+#define AT91C_TC_BCPC             (0x3 << 26) // (TC) RC Compare Effect on TIOB
+#define 	AT91C_TC_BCPC_NONE                 (0x0 << 26) // (TC) Effect: none
+#define 	AT91C_TC_BCPC_SET                  (0x1 << 26) // (TC) Effect: set
+#define 	AT91C_TC_BCPC_CLEAR                (0x2 << 26) // (TC) Effect: clear
+#define 	AT91C_TC_BCPC_TOGGLE               (0x3 << 26) // (TC) Effect: toggle
+#define AT91C_TC_BEEVT            (0x3 << 28) // (TC) External Event Effect on TIOB
+#define 	AT91C_TC_BEEVT_NONE                 (0x0 << 28) // (TC) Effect: none
+#define 	AT91C_TC_BEEVT_SET                  (0x1 << 28) // (TC) Effect: set
+#define 	AT91C_TC_BEEVT_CLEAR                (0x2 << 28) // (TC) Effect: clear
+#define 	AT91C_TC_BEEVT_TOGGLE               (0x3 << 28) // (TC) Effect: toggle
+#define AT91C_TC_BSWTRG           (0x3 << 30) // (TC) Software Trigger Effect on TIOB
+#define 	AT91C_TC_BSWTRG_NONE                 (0x0 << 30) // (TC) Effect: none
+#define 	AT91C_TC_BSWTRG_SET                  (0x1 << 30) // (TC) Effect: set
+#define 	AT91C_TC_BSWTRG_CLEAR                (0x2 << 30) // (TC) Effect: clear
+#define 	AT91C_TC_BSWTRG_TOGGLE               (0x3 << 30) // (TC) Effect: toggle
+// -------- TC_SR : (TC Offset: 0x20) TC Channel Status Register -------- 
+#define AT91C_TC_COVFS            (0x1 <<  0) // (TC) Counter Overflow
+#define AT91C_TC_LOVRS            (0x1 <<  1) // (TC) Load Overrun
+#define AT91C_TC_CPAS             (0x1 <<  2) // (TC) RA Compare
+#define AT91C_TC_CPBS             (0x1 <<  3) // (TC) RB Compare
+#define AT91C_TC_CPCS             (0x1 <<  4) // (TC) RC Compare
+#define AT91C_TC_LDRAS            (0x1 <<  5) // (TC) RA Loading
+#define AT91C_TC_LDRBS            (0x1 <<  6) // (TC) RB Loading
+#define AT91C_TC_ETRGS            (0x1 <<  7) // (TC) External Trigger
+#define AT91C_TC_CLKSTA           (0x1 << 16) // (TC) Clock Enabling
+#define AT91C_TC_MTIOA            (0x1 << 17) // (TC) TIOA Mirror
+#define AT91C_TC_MTIOB            (0x1 << 18) // (TC) TIOA Mirror
+// -------- TC_IER : (TC Offset: 0x24) TC Channel Interrupt Enable Register -------- 
+// -------- TC_IDR : (TC Offset: 0x28) TC Channel Interrupt Disable Register -------- 
+// -------- TC_IMR : (TC Offset: 0x2c) TC Channel Interrupt Mask Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Timer Counter Interface
+// *****************************************************************************
+// *** Register offset in AT91S_TCB structure ***
+#define TCB_TC0         ( 0) // TC Channel 0
+#define TCB_TC1         (64) // TC Channel 1
+#define TCB_TC2         (128) // TC Channel 2
+#define TCB_BCR         (192) // TC Block Control Register
+#define TCB_BMR         (196) // TC Block Mode Register
+// -------- TCB_BCR : (TCB Offset: 0xc0) TC Block Control Register -------- 
+#define AT91C_TCB_SYNC            (0x1 <<  0) // (TCB) Synchro Command
+// -------- TCB_BMR : (TCB Offset: 0xc4) TC Block Mode Register -------- 
+#define AT91C_TCB_TC0XC0S         (0x3 <<  0) // (TCB) External Clock Signal 0 Selection
+#define 	AT91C_TCB_TC0XC0S_TCLK0                (0x0) // (TCB) TCLK0 connected to XC0
+#define 	AT91C_TCB_TC0XC0S_NONE                 (0x1) // (TCB) None signal connected to XC0
+#define 	AT91C_TCB_TC0XC0S_TIOA1                (0x2) // (TCB) TIOA1 connected to XC0
+#define 	AT91C_TCB_TC0XC0S_TIOA2                (0x3) // (TCB) TIOA2 connected to XC0
+#define AT91C_TCB_TC1XC1S         (0x3 <<  2) // (TCB) External Clock Signal 1 Selection
+#define 	AT91C_TCB_TC1XC1S_TCLK1                (0x0 <<  2) // (TCB) TCLK1 connected to XC1
+#define 	AT91C_TCB_TC1XC1S_NONE                 (0x1 <<  2) // (TCB) None signal connected to XC1
+#define 	AT91C_TCB_TC1XC1S_TIOA0                (0x2 <<  2) // (TCB) TIOA0 connected to XC1
+#define 	AT91C_TCB_TC1XC1S_TIOA2                (0x3 <<  2) // (TCB) TIOA2 connected to XC1
+#define AT91C_TCB_TC2XC2S         (0x3 <<  4) // (TCB) External Clock Signal 2 Selection
+#define 	AT91C_TCB_TC2XC2S_TCLK2                (0x0 <<  4) // (TCB) TCLK2 connected to XC2
+#define 	AT91C_TCB_TC2XC2S_NONE                 (0x1 <<  4) // (TCB) None signal connected to XC2
+#define 	AT91C_TCB_TC2XC2S_TIOA0                (0x2 <<  4) // (TCB) TIOA0 connected to XC2
+#define 	AT91C_TCB_TC2XC2S_TIOA1                (0x3 <<  4) // (TCB) TIOA2 connected to XC2
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Control Area Network MailBox Interface
+// *****************************************************************************
+// *** Register offset in AT91S_CAN_MB structure ***
+#define CAN_MB_MMR      ( 0) // MailBox Mode Register
+#define CAN_MB_MAM      ( 4) // MailBox Acceptance Mask Register
+#define CAN_MB_MID      ( 8) // MailBox ID Register
+#define CAN_MB_MFID     (12) // MailBox Family ID Register
+#define CAN_MB_MSR      (16) // MailBox Status Register
+#define CAN_MB_MDL      (20) // MailBox Data Low Register
+#define CAN_MB_MDH      (24) // MailBox Data High Register
+#define CAN_MB_MCR      (28) // MailBox Control Register
+// -------- CAN_MMR : (CAN_MB Offset: 0x0) CAN Message Mode Register -------- 
+#define AT91C_CAN_MTIMEMARK       (0xFFFF <<  0) // (CAN_MB) Mailbox Timemark
+#define AT91C_CAN_PRIOR           (0xF << 16) // (CAN_MB) Mailbox Priority
+#define AT91C_CAN_MOT             (0x7 << 24) // (CAN_MB) Mailbox Object Type
+#define 	AT91C_CAN_MOT_DIS                  (0x0 << 24) // (CAN_MB) 
+#define 	AT91C_CAN_MOT_RX                   (0x1 << 24) // (CAN_MB) 
+#define 	AT91C_CAN_MOT_RXOVERWRITE          (0x2 << 24) // (CAN_MB) 
+#define 	AT91C_CAN_MOT_TX                   (0x3 << 24) // (CAN_MB) 
+#define 	AT91C_CAN_MOT_CONSUMER             (0x4 << 24) // (CAN_MB) 
+#define 	AT91C_CAN_MOT_PRODUCER             (0x5 << 24) // (CAN_MB) 
+// -------- CAN_MAM : (CAN_MB Offset: 0x4) CAN Message Acceptance Mask Register -------- 
+#define AT91C_CAN_MIDvB           (0x3FFFF <<  0) // (CAN_MB) Complementary bits for identifier in extended mode
+#define AT91C_CAN_MIDvA           (0x7FF << 18) // (CAN_MB) Identifier for standard frame mode
+#define AT91C_CAN_MIDE            (0x1 << 29) // (CAN_MB) Identifier Version
+// -------- CAN_MID : (CAN_MB Offset: 0x8) CAN Message ID Register -------- 
+// -------- CAN_MFID : (CAN_MB Offset: 0xc) CAN Message Family ID Register -------- 
+// -------- CAN_MSR : (CAN_MB Offset: 0x10) CAN Message Status Register -------- 
+#define AT91C_CAN_MTIMESTAMP      (0xFFFF <<  0) // (CAN_MB) Timer Value
+#define AT91C_CAN_MDLC            (0xF << 16) // (CAN_MB) Mailbox Data Length Code
+#define AT91C_CAN_MRTR            (0x1 << 20) // (CAN_MB) Mailbox Remote Transmission Request
+#define AT91C_CAN_MABT            (0x1 << 22) // (CAN_MB) Mailbox Message Abort
+#define AT91C_CAN_MRDY            (0x1 << 23) // (CAN_MB) Mailbox Ready
+#define AT91C_CAN_MMI             (0x1 << 24) // (CAN_MB) Mailbox Message Ignored
+// -------- CAN_MDL : (CAN_MB Offset: 0x14) CAN Message Data Low Register -------- 
+// -------- CAN_MDH : (CAN_MB Offset: 0x18) CAN Message Data High Register -------- 
+// -------- CAN_MCR : (CAN_MB Offset: 0x1c) CAN Message Control Register -------- 
+#define AT91C_CAN_MACR            (0x1 << 22) // (CAN_MB) Abort Request for Mailbox
+#define AT91C_CAN_MTCR            (0x1 << 23) // (CAN_MB) Mailbox Transfer Command
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Control Area Network Interface
+// *****************************************************************************
+// *** Register offset in AT91S_CAN structure ***
+#define CAN_MR          ( 0) // Mode Register
+#define CAN_IER         ( 4) // Interrupt Enable Register
+#define CAN_IDR         ( 8) // Interrupt Disable Register
+#define CAN_IMR         (12) // Interrupt Mask Register
+#define CAN_SR          (16) // Status Register
+#define CAN_BR          (20) // Baudrate Register
+#define CAN_TIM         (24) // Timer Register
+#define CAN_TIMESTP     (28) // Time Stamp Register
+#define CAN_ECR         (32) // Error Counter Register
+#define CAN_TCR         (36) // Transfer Command Register
+#define CAN_ACR         (40) // Abort Command Register
+#define CAN_VR          (252) // Version Register
+#define CAN_MB0         (512) // CAN Mailbox 0
+#define CAN_MB1         (544) // CAN Mailbox 1
+#define CAN_MB2         (576) // CAN Mailbox 2
+#define CAN_MB3         (608) // CAN Mailbox 3
+#define CAN_MB4         (640) // CAN Mailbox 4
+#define CAN_MB5         (672) // CAN Mailbox 5
+#define CAN_MB6         (704) // CAN Mailbox 6
+#define CAN_MB7         (736) // CAN Mailbox 7
+#define CAN_MB8         (768) // CAN Mailbox 8
+#define CAN_MB9         (800) // CAN Mailbox 9
+#define CAN_MB10        (832) // CAN Mailbox 10
+#define CAN_MB11        (864) // CAN Mailbox 11
+#define CAN_MB12        (896) // CAN Mailbox 12
+#define CAN_MB13        (928) // CAN Mailbox 13
+#define CAN_MB14        (960) // CAN Mailbox 14
+#define CAN_MB15        (992) // CAN Mailbox 15
+// -------- CAN_MR : (CAN Offset: 0x0) CAN Mode Register -------- 
+#define AT91C_CAN_CANEN           (0x1 <<  0) // (CAN) CAN Controller Enable
+#define AT91C_CAN_LPM             (0x1 <<  1) // (CAN) Disable/Enable Low Power Mode
+#define AT91C_CAN_ABM             (0x1 <<  2) // (CAN) Disable/Enable Autobaud/Listen Mode
+#define AT91C_CAN_OVL             (0x1 <<  3) // (CAN) Disable/Enable Overload Frame
+#define AT91C_CAN_TEOF            (0x1 <<  4) // (CAN) Time Stamp messages at each end of Frame
+#define AT91C_CAN_TTM             (0x1 <<  5) // (CAN) Disable/Enable Time Trigger Mode
+#define AT91C_CAN_TIMFRZ          (0x1 <<  6) // (CAN) Enable Timer Freeze
+#define AT91C_CAN_DRPT            (0x1 <<  7) // (CAN) Disable Repeat
+// -------- CAN_IER : (CAN Offset: 0x4) CAN Interrupt Enable Register -------- 
+#define AT91C_CAN_MB0             (0x1 <<  0) // (CAN) Mailbox 0 Flag
+#define AT91C_CAN_MB1             (0x1 <<  1) // (CAN) Mailbox 1 Flag
+#define AT91C_CAN_MB2             (0x1 <<  2) // (CAN) Mailbox 2 Flag
+#define AT91C_CAN_MB3             (0x1 <<  3) // (CAN) Mailbox 3 Flag
+#define AT91C_CAN_MB4             (0x1 <<  4) // (CAN) Mailbox 4 Flag
+#define AT91C_CAN_MB5             (0x1 <<  5) // (CAN) Mailbox 5 Flag
+#define AT91C_CAN_MB6             (0x1 <<  6) // (CAN) Mailbox 6 Flag
+#define AT91C_CAN_MB7             (0x1 <<  7) // (CAN) Mailbox 7 Flag
+#define AT91C_CAN_MB8             (0x1 <<  8) // (CAN) Mailbox 8 Flag
+#define AT91C_CAN_MB9             (0x1 <<  9) // (CAN) Mailbox 9 Flag
+#define AT91C_CAN_MB10            (0x1 << 10) // (CAN) Mailbox 10 Flag
+#define AT91C_CAN_MB11            (0x1 << 11) // (CAN) Mailbox 11 Flag
+#define AT91C_CAN_MB12            (0x1 << 12) // (CAN) Mailbox 12 Flag
+#define AT91C_CAN_MB13            (0x1 << 13) // (CAN) Mailbox 13 Flag
+#define AT91C_CAN_MB14            (0x1 << 14) // (CAN) Mailbox 14 Flag
+#define AT91C_CAN_MB15            (0x1 << 15) // (CAN) Mailbox 15 Flag
+#define AT91C_CAN_ERRA            (0x1 << 16) // (CAN) Error Active Mode Flag
+#define AT91C_CAN_WARN            (0x1 << 17) // (CAN) Warning Limit Flag
+#define AT91C_CAN_ERRP            (0x1 << 18) // (CAN) Error Passive Mode Flag
+#define AT91C_CAN_BOFF            (0x1 << 19) // (CAN) Bus Off Mode Flag
+#define AT91C_CAN_SLEEP           (0x1 << 20) // (CAN) Sleep Flag
+#define AT91C_CAN_WAKEUP          (0x1 << 21) // (CAN) Wakeup Flag
+#define AT91C_CAN_TOVF            (0x1 << 22) // (CAN) Timer Overflow Flag
+#define AT91C_CAN_TSTP            (0x1 << 23) // (CAN) Timestamp Flag
+#define AT91C_CAN_CERR            (0x1 << 24) // (CAN) CRC Error
+#define AT91C_CAN_SERR            (0x1 << 25) // (CAN) Stuffing Error
+#define AT91C_CAN_AERR            (0x1 << 26) // (CAN) Acknowledgment Error
+#define AT91C_CAN_FERR            (0x1 << 27) // (CAN) Form Error
+#define AT91C_CAN_BERR            (0x1 << 28) // (CAN) Bit Error
+// -------- CAN_IDR : (CAN Offset: 0x8) CAN Interrupt Disable Register -------- 
+// -------- CAN_IMR : (CAN Offset: 0xc) CAN Interrupt Mask Register -------- 
+// -------- CAN_SR : (CAN Offset: 0x10) CAN Status Register -------- 
+#define AT91C_CAN_RBSY            (0x1 << 29) // (CAN) Receiver Busy
+#define AT91C_CAN_TBSY            (0x1 << 30) // (CAN) Transmitter Busy
+#define AT91C_CAN_OVLY            (0x1 << 31) // (CAN) Overload Busy
+// -------- CAN_BR : (CAN Offset: 0x14) CAN Baudrate Register -------- 
+#define AT91C_CAN_PHASE2          (0x7 <<  0) // (CAN) Phase 2 segment
+#define AT91C_CAN_PHASE1          (0x7 <<  4) // (CAN) Phase 1 segment
+#define AT91C_CAN_PROPAG          (0x7 <<  8) // (CAN) Programmation time segment
+#define AT91C_CAN_SYNC            (0x3 << 12) // (CAN) Re-synchronization jump width segment
+#define AT91C_CAN_BRP             (0x7F << 16) // (CAN) Baudrate Prescaler
+#define AT91C_CAN_SMP             (0x1 << 24) // (CAN) Sampling mode
+// -------- CAN_TIM : (CAN Offset: 0x18) CAN Timer Register -------- 
+#define AT91C_CAN_TIMER           (0xFFFF <<  0) // (CAN) Timer field
+// -------- CAN_TIMESTP : (CAN Offset: 0x1c) CAN Timestamp Register -------- 
+// -------- CAN_ECR : (CAN Offset: 0x20) CAN Error Counter Register -------- 
+#define AT91C_CAN_REC             (0xFF <<  0) // (CAN) Receive Error Counter
+#define AT91C_CAN_TEC             (0xFF << 16) // (CAN) Transmit Error Counter
+// -------- CAN_TCR : (CAN Offset: 0x24) CAN Transfer Command Register -------- 
+#define AT91C_CAN_TIMRST          (0x1 << 31) // (CAN) Timer Reset Field
+// -------- CAN_ACR : (CAN Offset: 0x28) CAN Abort Command Register -------- 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Ethernet MAC 10/100
+// *****************************************************************************
+// *** Register offset in AT91S_EMAC structure ***
+#define EMAC_NCR        ( 0) // Network Control Register
+#define EMAC_NCFGR      ( 4) // Network Configuration Register
+#define EMAC_NSR        ( 8) // Network Status Register
+#define EMAC_TSR        (20) // Transmit Status Register
+#define EMAC_RBQP       (24) // Receive Buffer Queue Pointer
+#define EMAC_TBQP       (28) // Transmit Buffer Queue Pointer
+#define EMAC_RSR        (32) // Receive Status Register
+#define EMAC_ISR        (36) // Interrupt Status Register
+#define EMAC_IER        (40) // Interrupt Enable Register
+#define EMAC_IDR        (44) // Interrupt Disable Register
+#define EMAC_IMR        (48) // Interrupt Mask Register
+#define EMAC_MAN        (52) // PHY Maintenance Register
+#define EMAC_PTR        (56) // Pause Time Register
+#define EMAC_PFR        (60) // Pause Frames received Register
+#define EMAC_FTO        (64) // Frames Transmitted OK Register
+#define EMAC_SCF        (68) // Single Collision Frame Register
+#define EMAC_MCF        (72) // Multiple Collision Frame Register
+#define EMAC_FRO        (76) // Frames Received OK Register
+#define EMAC_FCSE       (80) // Frame Check Sequence Error Register
+#define EMAC_ALE        (84) // Alignment Error Register
+#define EMAC_DTF        (88) // Deferred Transmission Frame Register
+#define EMAC_LCOL       (92) // Late Collision Register
+#define EMAC_ECOL       (96) // Excessive Collision Register
+#define EMAC_TUND       (100) // Transmit Underrun Error Register
+#define EMAC_CSE        (104) // Carrier Sense Error Register
+#define EMAC_RRE        (108) // Receive Ressource Error Register
+#define EMAC_ROV        (112) // Receive Overrun Errors Register
+#define EMAC_RSE        (116) // Receive Symbol Errors Register
+#define EMAC_ELE        (120) // Excessive Length Errors Register
+#define EMAC_RJA        (124) // Receive Jabbers Register
+#define EMAC_USF        (128) // Undersize Frames Register
+#define EMAC_STE        (132) // SQE Test Error Register
+#define EMAC_RLE        (136) // Receive Length Field Mismatch Register
+#define EMAC_TPF        (140) // Transmitted Pause Frames Register
+#define EMAC_HRB        (144) // Hash Address Bottom[31:0]
+#define EMAC_HRT        (148) // Hash Address Top[63:32]
+#define EMAC_SA1L       (152) // Specific Address 1 Bottom, First 4 bytes
+#define EMAC_SA1H       (156) // Specific Address 1 Top, Last 2 bytes
+#define EMAC_SA2L       (160) // Specific Address 2 Bottom, First 4 bytes
+#define EMAC_SA2H       (164) // Specific Address 2 Top, Last 2 bytes
+#define EMAC_SA3L       (168) // Specific Address 3 Bottom, First 4 bytes
+#define EMAC_SA3H       (172) // Specific Address 3 Top, Last 2 bytes
+#define EMAC_SA4L       (176) // Specific Address 4 Bottom, First 4 bytes
+#define EMAC_SA4H       (180) // Specific Address 4 Top, Last 2 bytes
+#define EMAC_TID        (184) // Type ID Checking Register
+#define EMAC_TPQ        (188) // Transmit Pause Quantum Register
+#define EMAC_USRIO      (192) // USER Input/Output Register
+#define EMAC_WOL        (196) // Wake On LAN Register
+#define EMAC_REV        (252) // Revision Register
+// -------- EMAC_NCR : (EMAC Offset: 0x0)  -------- 
+#define AT91C_EMAC_LB             (0x1 <<  0) // (EMAC) Loopback. Optional. When set, loopback signal is at high level.
+#define AT91C_EMAC_LLB            (0x1 <<  1) // (EMAC) Loopback local. 
+#define AT91C_EMAC_RE             (0x1 <<  2) // (EMAC) Receive enable. 
+#define AT91C_EMAC_TE             (0x1 <<  3) // (EMAC) Transmit enable. 
+#define AT91C_EMAC_MPE            (0x1 <<  4) // (EMAC) Management port enable. 
+#define AT91C_EMAC_CLRSTAT        (0x1 <<  5) // (EMAC) Clear statistics registers. 
+#define AT91C_EMAC_INCSTAT        (0x1 <<  6) // (EMAC) Increment statistics registers. 
+#define AT91C_EMAC_WESTAT         (0x1 <<  7) // (EMAC) Write enable for statistics registers. 
+#define AT91C_EMAC_BP             (0x1 <<  8) // (EMAC) Back pressure. 
+#define AT91C_EMAC_TSTART         (0x1 <<  9) // (EMAC) Start Transmission. 
+#define AT91C_EMAC_THALT          (0x1 << 10) // (EMAC) Transmission Halt. 
+#define AT91C_EMAC_TPFR           (0x1 << 11) // (EMAC) Transmit pause frame 
+#define AT91C_EMAC_TZQ            (0x1 << 12) // (EMAC) Transmit zero quantum pause frame
+// -------- EMAC_NCFGR : (EMAC Offset: 0x4) Network Configuration Register -------- 
+#define AT91C_EMAC_SPD            (0x1 <<  0) // (EMAC) Speed. 
+#define AT91C_EMAC_FD             (0x1 <<  1) // (EMAC) Full duplex. 
+#define AT91C_EMAC_JFRAME         (0x1 <<  3) // (EMAC) Jumbo Frames. 
+#define AT91C_EMAC_CAF            (0x1 <<  4) // (EMAC) Copy all frames. 
+#define AT91C_EMAC_NBC            (0x1 <<  5) // (EMAC) No broadcast. 
+#define AT91C_EMAC_MTI            (0x1 <<  6) // (EMAC) Multicast hash event enable
+#define AT91C_EMAC_UNI            (0x1 <<  7) // (EMAC) Unicast hash enable. 
+#define AT91C_EMAC_BIG            (0x1 <<  8) // (EMAC) Receive 1522 bytes. 
+#define AT91C_EMAC_EAE            (0x1 <<  9) // (EMAC) External address match enable. 
+#define AT91C_EMAC_CLK            (0x3 << 10) // (EMAC) 
+#define 	AT91C_EMAC_CLK_HCLK_8               (0x0 << 10) // (EMAC) HCLK divided by 8
+#define 	AT91C_EMAC_CLK_HCLK_16              (0x1 << 10) // (EMAC) HCLK divided by 16
+#define 	AT91C_EMAC_CLK_HCLK_32              (0x2 << 10) // (EMAC) HCLK divided by 32
+#define 	AT91C_EMAC_CLK_HCLK_64              (0x3 << 10) // (EMAC) HCLK divided by 64
+#define AT91C_EMAC_RTY            (0x1 << 12) // (EMAC) 
+#define AT91C_EMAC_PAE            (0x1 << 13) // (EMAC) 
+#define AT91C_EMAC_RBOF           (0x3 << 14) // (EMAC) 
+#define 	AT91C_EMAC_RBOF_OFFSET_0             (0x0 << 14) // (EMAC) no offset from start of receive buffer
+#define 	AT91C_EMAC_RBOF_OFFSET_1             (0x1 << 14) // (EMAC) one byte offset from start of receive buffer
+#define 	AT91C_EMAC_RBOF_OFFSET_2             (0x2 << 14) // (EMAC) two bytes offset from start of receive buffer
+#define 	AT91C_EMAC_RBOF_OFFSET_3             (0x3 << 14) // (EMAC) three bytes offset from start of receive buffer
+#define AT91C_EMAC_RLCE           (0x1 << 16) // (EMAC) Receive Length field Checking Enable
+#define AT91C_EMAC_DRFCS          (0x1 << 17) // (EMAC) Discard Receive FCS
+#define AT91C_EMAC_EFRHD          (0x1 << 18) // (EMAC) 
+#define AT91C_EMAC_IRXFCS         (0x1 << 19) // (EMAC) Ignore RX FCS
+// -------- EMAC_NSR : (EMAC Offset: 0x8) Network Status Register -------- 
+#define AT91C_EMAC_LINKR          (0x1 <<  0) // (EMAC) 
+#define AT91C_EMAC_MDIO           (0x1 <<  1) // (EMAC) 
+#define AT91C_EMAC_IDLE           (0x1 <<  2) // (EMAC) 
+// -------- EMAC_TSR : (EMAC Offset: 0x14) Transmit Status Register -------- 
+#define AT91C_EMAC_UBR            (0x1 <<  0) // (EMAC) 
+#define AT91C_EMAC_COL            (0x1 <<  1) // (EMAC) 
+#define AT91C_EMAC_RLES           (0x1 <<  2) // (EMAC) 
+#define AT91C_EMAC_TGO            (0x1 <<  3) // (EMAC) Transmit Go
+#define AT91C_EMAC_BEX            (0x1 <<  4) // (EMAC) Buffers exhausted mid frame
+#define AT91C_EMAC_COMP           (0x1 <<  5) // (EMAC) 
+#define AT91C_EMAC_UND            (0x1 <<  6) // (EMAC) 
+// -------- EMAC_RSR : (EMAC Offset: 0x20) Receive Status Register -------- 
+#define AT91C_EMAC_BNA            (0x1 <<  0) // (EMAC) 
+#define AT91C_EMAC_REC            (0x1 <<  1) // (EMAC) 
+#define AT91C_EMAC_OVR            (0x1 <<  2) // (EMAC) 
+// -------- EMAC_ISR : (EMAC Offset: 0x24) Interrupt Status Register -------- 
+#define AT91C_EMAC_MFD            (0x1 <<  0) // (EMAC) 
+#define AT91C_EMAC_RCOMP          (0x1 <<  1) // (EMAC) 
+#define AT91C_EMAC_RXUBR          (0x1 <<  2) // (EMAC) 
+#define AT91C_EMAC_TXUBR          (0x1 <<  3) // (EMAC) 
+#define AT91C_EMAC_TUNDR          (0x1 <<  4) // (EMAC) 
+#define AT91C_EMAC_RLEX           (0x1 <<  5) // (EMAC) 
+#define AT91C_EMAC_TXERR          (0x1 <<  6) // (EMAC) 
+#define AT91C_EMAC_TCOMP          (0x1 <<  7) // (EMAC) 
+#define AT91C_EMAC_LINK           (0x1 <<  9) // (EMAC) 
+#define AT91C_EMAC_ROVR           (0x1 << 10) // (EMAC) 
+#define AT91C_EMAC_HRESP          (0x1 << 11) // (EMAC) 
+#define AT91C_EMAC_PFRE           (0x1 << 12) // (EMAC) 
+#define AT91C_EMAC_PTZ            (0x1 << 13) // (EMAC) 
+// -------- EMAC_IER : (EMAC Offset: 0x28) Interrupt Enable Register -------- 
+// -------- EMAC_IDR : (EMAC Offset: 0x2c) Interrupt Disable Register -------- 
+// -------- EMAC_IMR : (EMAC Offset: 0x30) Interrupt Mask Register -------- 
+// -------- EMAC_MAN : (EMAC Offset: 0x34) PHY Maintenance Register -------- 
+#define AT91C_EMAC_DATA           (0xFFFF <<  0) // (EMAC) 
+#define AT91C_EMAC_CODE           (0x3 << 16) // (EMAC) 
+#define AT91C_EMAC_REGA           (0x1F << 18) // (EMAC) 
+#define AT91C_EMAC_PHYA           (0x1F << 23) // (EMAC) 
+#define AT91C_EMAC_RW             (0x3 << 28) // (EMAC) 
+#define AT91C_EMAC_SOF            (0x3 << 30) // (EMAC) 
+// -------- EMAC_USRIO : (EMAC Offset: 0xc0) USER Input Output Register -------- 
+#define AT91C_EMAC_RMII           (0x1 <<  0) // (EMAC) Reduce MII
+#define AT91C_EMAC_CLKEN          (0x1 <<  1) // (EMAC) Clock Enable
+// -------- EMAC_WOL : (EMAC Offset: 0xc4) Wake On LAN Register -------- 
+#define AT91C_EMAC_IP             (0xFFFF <<  0) // (EMAC) ARP request IP address
+#define AT91C_EMAC_MAG            (0x1 << 16) // (EMAC) Magic packet event enable
+#define AT91C_EMAC_ARP            (0x1 << 17) // (EMAC) ARP request event enable
+#define AT91C_EMAC_SA1            (0x1 << 18) // (EMAC) Specific address register 1 event enable
+// -------- EMAC_REV : (EMAC Offset: 0xfc) Revision Register -------- 
+#define AT91C_EMAC_REVREF         (0xFFFF <<  0) // (EMAC) 
+#define AT91C_EMAC_PARTREF        (0xFFFF << 16) // (EMAC) 
+
+// *****************************************************************************
+//              SOFTWARE API DEFINITION  FOR Analog to Digital Convertor
+// *****************************************************************************
+// *** Register offset in AT91S_ADC structure ***
+#define ADC_CR          ( 0) // ADC Control Register
+#define ADC_MR          ( 4) // ADC Mode Register
+#define ADC_CHER        (16) // ADC Channel Enable Register
+#define ADC_CHDR        (20) // ADC Channel Disable Register
+#define ADC_CHSR        (24) // ADC Channel Status Register
+#define ADC_SR          (28) // ADC Status Register
+#define ADC_LCDR        (32) // ADC Last Converted Data Register
+#define ADC_IER         (36) // ADC Interrupt Enable Register
+#define ADC_IDR         (40) // ADC Interrupt Disable Register
+#define ADC_IMR         (44) // ADC Interrupt Mask Register
+#define ADC_CDR0        (48) // ADC Channel Data Register 0
+#define ADC_CDR1        (52) // ADC Channel Data Register 1
+#define ADC_CDR2        (56) // ADC Channel Data Register 2
+#define ADC_CDR3        (60) // ADC Channel Data Register 3
+#define ADC_CDR4        (64) // ADC Channel Data Register 4
+#define ADC_CDR5        (68) // ADC Channel Data Register 5
+#define ADC_CDR6        (72) // ADC Channel Data Register 6
+#define ADC_CDR7        (76) // ADC Channel Data Register 7
+#define ADC_RPR         (256) // Receive Pointer Register
+#define ADC_RCR         (260) // Receive Counter Register
+#define ADC_TPR         (264) // Transmit Pointer Register
+#define ADC_TCR         (268) // Transmit Counter Register
+#define ADC_RNPR        (272) // Receive Next Pointer Register
+#define ADC_RNCR        (276) // Receive Next Counter Register
+#define ADC_TNPR        (280) // Transmit Next Pointer Register
+#define ADC_TNCR        (284) // Transmit Next Counter Register
+#define ADC_PTCR        (288) // PDC Transfer Control Register
+#define ADC_PTSR        (292) // PDC Transfer Status Register
+// -------- ADC_CR : (ADC Offset: 0x0) ADC Control Register -------- 
+#define AT91C_ADC_SWRST           (0x1 <<  0) // (ADC) Software Reset
+#define AT91C_ADC_START           (0x1 <<  1) // (ADC) Start Conversion
+// -------- ADC_MR : (ADC Offset: 0x4) ADC Mode Register -------- 
+#define AT91C_ADC_TRGEN           (0x1 <<  0) // (ADC) Trigger Enable
+#define 	AT91C_ADC_TRGEN_DIS                  (0x0) // (ADC) Hradware triggers are disabled. Starting a conversion is only possible by software
+#define 	AT91C_ADC_TRGEN_EN                   (0x1) // (ADC) Hardware trigger selected by TRGSEL field is enabled.
+#define AT91C_ADC_TRGSEL          (0x7 <<  1) // (ADC) Trigger Selection
+#define 	AT91C_ADC_TRGSEL_TIOA0                (0x0 <<  1) // (ADC) Selected TRGSEL = TIAO0
+#define 	AT91C_ADC_TRGSEL_TIOA1                (0x1 <<  1) // (ADC) Selected TRGSEL = TIAO1
+#define 	AT91C_ADC_TRGSEL_TIOA2                (0x2 <<  1) // (ADC) Selected TRGSEL = TIAO2
+#define 	AT91C_ADC_TRGSEL_TIOA3                (0x3 <<  1) // (ADC) Selected TRGSEL = TIAO3
+#define 	AT91C_ADC_TRGSEL_TIOA4                (0x4 <<  1) // (ADC) Selected TRGSEL = TIAO4
+#define 	AT91C_ADC_TRGSEL_TIOA5                (0x5 <<  1) // (ADC) Selected TRGSEL = TIAO5
+#define 	AT91C_ADC_TRGSEL_EXT                  (0x6 <<  1) // (ADC) Selected TRGSEL = External Trigger
+#define AT91C_ADC_LOWRES          (0x1 <<  4) // (ADC) Resolution.
+#define 	AT91C_ADC_LOWRES_10_BIT               (0x0 <<  4) // (ADC) 10-bit resolution
+#define 	AT91C_ADC_LOWRES_8_BIT                (0x1 <<  4) // (ADC) 8-bit resolution
+#define AT91C_ADC_SLEEP           (0x1 <<  5) // (ADC) Sleep Mode
+#define 	AT91C_ADC_SLEEP_NORMAL_MODE          (0x0 <<  5) // (ADC) Normal Mode
+#define 	AT91C_ADC_SLEEP_MODE                 (0x1 <<  5) // (ADC) Sleep Mode
+#define AT91C_ADC_PRESCAL         (0x3F <<  8) // (ADC) Prescaler rate selection
+#define AT91C_ADC_STARTUP         (0x1F << 16) // (ADC) Startup Time
+#define AT91C_ADC_SHTIM           (0xF << 24) // (ADC) Sample & Hold Time
+// -------- 	ADC_CHER : (ADC Offset: 0x10) ADC Channel Enable Register -------- 
+#define AT91C_ADC_CH0             (0x1 <<  0) // (ADC) Channel 0
+#define AT91C_ADC_CH1             (0x1 <<  1) // (ADC) Channel 1
+#define AT91C_ADC_CH2             (0x1 <<  2) // (ADC) Channel 2
+#define AT91C_ADC_CH3             (0x1 <<  3) // (ADC) Channel 3
+#define AT91C_ADC_CH4             (0x1 <<  4) // (ADC) Channel 4
+#define AT91C_ADC_CH5             (0x1 <<  5) // (ADC) Channel 5
+#define AT91C_ADC_CH6             (0x1 <<  6) // (ADC) Channel 6
+#define AT91C_ADC_CH7             (0x1 <<  7) // (ADC) Channel 7
+// -------- 	ADC_CHDR : (ADC Offset: 0x14) ADC Channel Disable Register -------- 
+// -------- 	ADC_CHSR : (ADC Offset: 0x18) ADC Channel Status Register -------- 
+// -------- ADC_SR : (ADC Offset: 0x1c) ADC Status Register -------- 
+#define AT91C_ADC_EOC0            (0x1 <<  0) // (ADC) End of Conversion
+#define AT91C_ADC_EOC1            (0x1 <<  1) // (ADC) End of Conversion
+#define AT91C_ADC_EOC2            (0x1 <<  2) // (ADC) End of Conversion
+#define AT91C_ADC_EOC3            (0x1 <<  3) // (ADC) End of Conversion
+#define AT91C_ADC_EOC4            (0x1 <<  4) // (ADC) End of Conversion
+#define AT91C_ADC_EOC5            (0x1 <<  5) // (ADC) End of Conversion
+#define AT91C_ADC_EOC6            (0x1 <<  6) // (ADC) End of Conversion
+#define AT91C_ADC_EOC7            (0x1 <<  7) // (ADC) End of Conversion
+#define AT91C_ADC_OVRE0           (0x1 <<  8) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE1           (0x1 <<  9) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE2           (0x1 << 10) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE3           (0x1 << 11) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE4           (0x1 << 12) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE5           (0x1 << 13) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE6           (0x1 << 14) // (ADC) Overrun Error
+#define AT91C_ADC_OVRE7           (0x1 << 15) // (ADC) Overrun Error
+#define AT91C_ADC_DRDY            (0x1 << 16) // (ADC) Data Ready
+#define AT91C_ADC_GOVRE           (0x1 << 17) // (ADC) General Overrun
+#define AT91C_ADC_ENDRX           (0x1 << 18) // (ADC) End of Receiver Transfer
+#define AT91C_ADC_RXBUFF          (0x1 << 19) // (ADC) RXBUFF Interrupt
+// -------- ADC_LCDR : (ADC Offset: 0x20) ADC Last Converted Data Register -------- 
+#define AT91C_ADC_LDATA           (0x3FF <<  0) // (ADC) Last Data Converted
+// -------- ADC_IER : (ADC Offset: 0x24) ADC Interrupt Enable Register -------- 
+// -------- ADC_IDR : (ADC Offset: 0x28) ADC Interrupt Disable Register -------- 
+// -------- ADC_IMR : (ADC Offset: 0x2c) ADC Interrupt Mask Register -------- 
+// -------- ADC_CDR0 : (ADC Offset: 0x30) ADC Channel Data Register 0 -------- 
+#define AT91C_ADC_DATA            (0x3FF <<  0) // (ADC) Converted Data
+// -------- ADC_CDR1 : (ADC Offset: 0x34) ADC Channel Data Register 1 -------- 
+// -------- ADC_CDR2 : (ADC Offset: 0x38) ADC Channel Data Register 2 -------- 
+// -------- ADC_CDR3 : (ADC Offset: 0x3c) ADC Channel Data Register 3 -------- 
+// -------- ADC_CDR4 : (ADC Offset: 0x40) ADC Channel Data Register 4 -------- 
+// -------- ADC_CDR5 : (ADC Offset: 0x44) ADC Channel Data Register 5 -------- 
+// -------- ADC_CDR6 : (ADC Offset: 0x48) ADC Channel Data Register 6 -------- 
+// -------- ADC_CDR7 : (ADC Offset: 0x4c) ADC Channel Data Register 7 -------- 
+
+// *****************************************************************************
+//               REGISTER ADDRESS DEFINITION FOR AT91SAM7X256
+// *****************************************************************************
+// ========== Register definition for SYS peripheral ========== 
+// ========== Register definition for AIC peripheral ========== 
+#define AT91C_AIC_ICCR            (0xFFFFF128) // (AIC) Interrupt Clear Command Register
+#define AT91C_AIC_IECR            (0xFFFFF120) // (AIC) Interrupt Enable Command Register
+#define AT91C_AIC_SMR             (0xFFFFF000) // (AIC) Source Mode Register
+#define AT91C_AIC_ISCR            (0xFFFFF12C) // (AIC) Interrupt Set Command Register
+#define AT91C_AIC_EOICR           (0xFFFFF130) // (AIC) End of Interrupt Command Register
+#define AT91C_AIC_DCR             (0xFFFFF138) // (AIC) Debug Control Register (Protect)
+#define AT91C_AIC_FFER            (0xFFFFF140) // (AIC) Fast Forcing Enable Register
+#define AT91C_AIC_SVR             (0xFFFFF080) // (AIC) Source Vector Register
+#define AT91C_AIC_SPU             (0xFFFFF134) // (AIC) Spurious Vector Register
+#define AT91C_AIC_FFDR            (0xFFFFF144) // (AIC) Fast Forcing Disable Register
+#define AT91C_AIC_FVR             (0xFFFFF104) // (AIC) FIQ Vector Register
+#define AT91C_AIC_FFSR            (0xFFFFF148) // (AIC) Fast Forcing Status Register
+#define AT91C_AIC_IMR             (0xFFFFF110) // (AIC) Interrupt Mask Register
+#define AT91C_AIC_ISR             (0xFFFFF108) // (AIC) Interrupt Status Register
+#define AT91C_AIC_IVR             (0xFFFFF100) // (AIC) IRQ Vector Register
+#define AT91C_AIC_IDCR            (0xFFFFF124) // (AIC) Interrupt Disable Command Register
+#define AT91C_AIC_CISR            (0xFFFFF114) // (AIC) Core Interrupt Status Register
+#define AT91C_AIC_IPR             (0xFFFFF10C) // (AIC) Interrupt Pending Register
+// ========== Register definition for PDC_DBGU peripheral ========== 
+#define AT91C_DBGU_TNCR           (0xFFFFF31C) // (PDC_DBGU) Transmit Next Counter Register
+#define AT91C_DBGU_RNCR           (0xFFFFF314) // (PDC_DBGU) Receive Next Counter Register
+#define AT91C_DBGU_PTCR           (0xFFFFF320) // (PDC_DBGU) PDC Transfer Control Register
+#define AT91C_DBGU_PTSR           (0xFFFFF324) // (PDC_DBGU) PDC Transfer Status Register
+#define AT91C_DBGU_RCR            (0xFFFFF304) // (PDC_DBGU) Receive Counter Register
+#define AT91C_DBGU_TCR            (0xFFFFF30C) // (PDC_DBGU) Transmit Counter Register
+#define AT91C_DBGU_RPR            (0xFFFFF300) // (PDC_DBGU) Receive Pointer Register
+#define AT91C_DBGU_TPR            (0xFFFFF308) // (PDC_DBGU) Transmit Pointer Register
+#define AT91C_DBGU_RNPR           (0xFFFFF310) // (PDC_DBGU) Receive Next Pointer Register
+#define AT91C_DBGU_TNPR           (0xFFFFF318) // (PDC_DBGU) Transmit Next Pointer Register
+// ========== Register definition for DBGU peripheral ========== 
+#define AT91C_DBGU_EXID           (0xFFFFF244) // (DBGU) Chip ID Extension Register
+#define AT91C_DBGU_THR            (0xFFFFF21C) // (DBGU) Transmitter Holding Register
+#define AT91C_DBGU_CSR            (0xFFFFF214) // (DBGU) Channel Status Register
+#define AT91C_DBGU_IDR            (0xFFFFF20C) // (DBGU) Interrupt Disable Register
+#define AT91C_DBGU_MR             (0xFFFFF204) // (DBGU) Mode Register
+#define AT91C_DBGU_FNTR           (0xFFFFF248) // (DBGU) Force NTRST Register
+#define AT91C_DBGU_CIDR           (0xFFFFF240) // (DBGU) Chip ID Register
+#define AT91C_DBGU_BRGR           (0xFFFFF220) // (DBGU) Baud Rate Generator Register
+#define AT91C_DBGU_RHR            (0xFFFFF218) // (DBGU) Receiver Holding Register
+#define AT91C_DBGU_IMR            (0xFFFFF210) // (DBGU) Interrupt Mask Register
+#define AT91C_DBGU_IER            (0xFFFFF208) // (DBGU) Interrupt Enable Register
+#define AT91C_DBGU_CR             (0xFFFFF200) // (DBGU) Control Register
+// ========== Register definition for PIOA peripheral ========== 
+#define AT91C_PIOA_IMR            (0xFFFFF448) // (PIOA) Interrupt Mask Register
+#define AT91C_PIOA_IER            (0xFFFFF440) // (PIOA) Interrupt Enable Register
+#define AT91C_PIOA_OWDR           (0xFFFFF4A4) // (PIOA) Output Write Disable Register
+#define AT91C_PIOA_ISR            (0xFFFFF44C) // (PIOA) Interrupt Status Register
+#define AT91C_PIOA_PPUDR          (0xFFFFF460) // (PIOA) Pull-up Disable Register
+#define AT91C_PIOA_MDSR           (0xFFFFF458) // (PIOA) Multi-driver Status Register
+#define AT91C_PIOA_MDER           (0xFFFFF450) // (PIOA) Multi-driver Enable Register
+#define AT91C_PIOA_PER            (0xFFFFF400) // (PIOA) PIO Enable Register
+#define AT91C_PIOA_PSR            (0xFFFFF408) // (PIOA) PIO Status Register
+#define AT91C_PIOA_OER            (0xFFFFF410) // (PIOA) Output Enable Register
+#define AT91C_PIOA_BSR            (0xFFFFF474) // (PIOA) Select B Register
+#define AT91C_PIOA_PPUER          (0xFFFFF464) // (PIOA) Pull-up Enable Register
+#define AT91C_PIOA_MDDR           (0xFFFFF454) // (PIOA) Multi-driver Disable Register
+#define AT91C_PIOA_PDR            (0xFFFFF404) // (PIOA) PIO Disable Register
+#define AT91C_PIOA_ODR            (0xFFFFF414) // (PIOA) Output Disable Registerr
+#define AT91C_PIOA_IFDR           (0xFFFFF424) // (PIOA) Input Filter Disable Register
+#define AT91C_PIOA_ABSR           (0xFFFFF478) // (PIOA) AB Select Status Register
+#define AT91C_PIOA_ASR            (0xFFFFF470) // (PIOA) Select A Register
+#define AT91C_PIOA_PPUSR          (0xFFFFF468) // (PIOA) Pull-up Status Register
+#define AT91C_PIOA_ODSR           (0xFFFFF438) // (PIOA) Output Data Status Register
+#define AT91C_PIOA_SODR           (0xFFFFF430) // (PIOA) Set Output Data Register
+#define AT91C_PIOA_IFSR           (0xFFFFF428) // (PIOA) Input Filter Status Register
+#define AT91C_PIOA_IFER           (0xFFFFF420) // (PIOA) Input Filter Enable Register
+#define AT91C_PIOA_OSR            (0xFFFFF418) // (PIOA) Output Status Register
+#define AT91C_PIOA_IDR            (0xFFFFF444) // (PIOA) Interrupt Disable Register
+#define AT91C_PIOA_PDSR           (0xFFFFF43C) // (PIOA) Pin Data Status Register
+#define AT91C_PIOA_CODR           (0xFFFFF434) // (PIOA) Clear Output Data Register
+#define AT91C_PIOA_OWSR           (0xFFFFF4A8) // (PIOA) Output Write Status Register
+#define AT91C_PIOA_OWER           (0xFFFFF4A0) // (PIOA) Output Write Enable Register
+// ========== Register definition for PIOB peripheral ========== 
+#define AT91C_PIOB_OWSR           (0xFFFFF6A8) // (PIOB) Output Write Status Register
+#define AT91C_PIOB_PPUSR          (0xFFFFF668) // (PIOB) Pull-up Status Register
+#define AT91C_PIOB_PPUDR          (0xFFFFF660) // (PIOB) Pull-up Disable Register
+#define AT91C_PIOB_MDSR           (0xFFFFF658) // (PIOB) Multi-driver Status Register
+#define AT91C_PIOB_MDER           (0xFFFFF650) // (PIOB) Multi-driver Enable Register
+#define AT91C_PIOB_IMR            (0xFFFFF648) // (PIOB) Interrupt Mask Register
+#define AT91C_PIOB_OSR            (0xFFFFF618) // (PIOB) Output Status Register
+#define AT91C_PIOB_OER            (0xFFFFF610) // (PIOB) Output Enable Register
+#define AT91C_PIOB_PSR            (0xFFFFF608) // (PIOB) PIO Status Register
+#define AT91C_PIOB_PER            (0xFFFFF600) // (PIOB) PIO Enable Register
+#define AT91C_PIOB_BSR            (0xFFFFF674) // (PIOB) Select B Register
+#define AT91C_PIOB_PPUER          (0xFFFFF664) // (PIOB) Pull-up Enable Register
+#define AT91C_PIOB_IFDR           (0xFFFFF624) // (PIOB) Input Filter Disable Register
+#define AT91C_PIOB_ODR            (0xFFFFF614) // (PIOB) Output Disable Registerr
+#define AT91C_PIOB_ABSR           (0xFFFFF678) // (PIOB) AB Select Status Register
+#define AT91C_PIOB_ASR            (0xFFFFF670) // (PIOB) Select A Register
+#define AT91C_PIOB_IFER           (0xFFFFF620) // (PIOB) Input Filter Enable Register
+#define AT91C_PIOB_IFSR           (0xFFFFF628) // (PIOB) Input Filter Status Register
+#define AT91C_PIOB_SODR           (0xFFFFF630) // (PIOB) Set Output Data Register
+#define AT91C_PIOB_ODSR           (0xFFFFF638) // (PIOB) Output Data Status Register
+#define AT91C_PIOB_CODR           (0xFFFFF634) // (PIOB) Clear Output Data Register
+#define AT91C_PIOB_PDSR           (0xFFFFF63C) // (PIOB) Pin Data Status Register
+#define AT91C_PIOB_OWER           (0xFFFFF6A0) // (PIOB) Output Write Enable Register
+#define AT91C_PIOB_IER            (0xFFFFF640) // (PIOB) Interrupt Enable Register
+#define AT91C_PIOB_OWDR           (0xFFFFF6A4) // (PIOB) Output Write Disable Register
+#define AT91C_PIOB_MDDR           (0xFFFFF654) // (PIOB) Multi-driver Disable Register
+#define AT91C_PIOB_ISR            (0xFFFFF64C) // (PIOB) Interrupt Status Register
+#define AT91C_PIOB_IDR            (0xFFFFF644) // (PIOB) Interrupt Disable Register
+#define AT91C_PIOB_PDR            (0xFFFFF604) // (PIOB) PIO Disable Register
+// ========== Register definition for CKGR peripheral ========== 
+#define AT91C_CKGR_PLLR           (0xFFFFFC2C) // (CKGR) PLL Register
+#define AT91C_CKGR_MCFR           (0xFFFFFC24) // (CKGR) Main Clock  Frequency Register
+#define AT91C_CKGR_MOR            (0xFFFFFC20) // (CKGR) Main Oscillator Register
+// ========== Register definition for PMC peripheral ========== 
+#define AT91C_PMC_SCSR            (0xFFFFFC08) // (PMC) System Clock Status Register
+#define AT91C_PMC_SCER            (0xFFFFFC00) // (PMC) System Clock Enable Register
+#define AT91C_PMC_IMR             (0xFFFFFC6C) // (PMC) Interrupt Mask Register
+#define AT91C_PMC_IDR             (0xFFFFFC64) // (PMC) Interrupt Disable Register
+#define AT91C_PMC_PCDR            (0xFFFFFC14) // (PMC) Peripheral Clock Disable Register
+#define AT91C_PMC_SCDR            (0xFFFFFC04) // (PMC) System Clock Disable Register
+#define AT91C_PMC_SR              (0xFFFFFC68) // (PMC) Status Register
+#define AT91C_PMC_IER             (0xFFFFFC60) // (PMC) Interrupt Enable Register
+#define AT91C_PMC_MCKR            (0xFFFFFC30) // (PMC) Master Clock Register
+#define AT91C_PMC_MOR             (0xFFFFFC20) // (PMC) Main Oscillator Register
+#define AT91C_PMC_PCER            (0xFFFFFC10) // (PMC) Peripheral Clock Enable Register
+#define AT91C_PMC_PCSR            (0xFFFFFC18) // (PMC) Peripheral Clock Status Register
+#define AT91C_PMC_PLLR            (0xFFFFFC2C) // (PMC) PLL Register
+#define AT91C_PMC_MCFR            (0xFFFFFC24) // (PMC) Main Clock  Frequency Register
+#define AT91C_PMC_PCKR            (0xFFFFFC40) // (PMC) Programmable Clock Register
+// ========== Register definition for RSTC peripheral ========== 
+#define AT91C_RSTC_RSR            (0xFFFFFD04) // (RSTC) Reset Status Register
+#define AT91C_RSTC_RMR            (0xFFFFFD08) // (RSTC) Reset Mode Register
+#define AT91C_RSTC_RCR            (0xFFFFFD00) // (RSTC) Reset Control Register
+// ========== Register definition for RTTC peripheral ========== 
+#define AT91C_RTTC_RTSR           (0xFFFFFD2C) // (RTTC) Real-time Status Register
+#define AT91C_RTTC_RTAR           (0xFFFFFD24) // (RTTC) Real-time Alarm Register
+#define AT91C_RTTC_RTVR           (0xFFFFFD28) // (RTTC) Real-time Value Register
+#define AT91C_RTTC_RTMR           (0xFFFFFD20) // (RTTC) Real-time Mode Register
+// ========== Register definition for PITC peripheral ========== 
+#define AT91C_PITC_PIIR           (0xFFFFFD3C) // (PITC) Period Interval Image Register
+#define AT91C_PITC_PISR           (0xFFFFFD34) // (PITC) Period Interval Status Register
+#define AT91C_PITC_PIVR           (0xFFFFFD38) // (PITC) Period Interval Value Register
+#define AT91C_PITC_PIMR           (0xFFFFFD30) // (PITC) Period Interval Mode Register
+// ========== Register definition for WDTC peripheral ========== 
+#define AT91C_WDTC_WDMR           (0xFFFFFD44) // (WDTC) Watchdog Mode Register
+#define AT91C_WDTC_WDSR           (0xFFFFFD48) // (WDTC) Watchdog Status Register
+#define AT91C_WDTC_WDCR           (0xFFFFFD40) // (WDTC) Watchdog Control Register
+// ========== Register definition for VREG peripheral ========== 
+#define AT91C_VREG_MR             (0xFFFFFD60) // (VREG) Voltage Regulator Mode Register
+// ========== Register definition for MC peripheral ========== 
+#define AT91C_MC_FCR              (0xFFFFFF64) // (MC) MC Flash Command Register
+#define AT91C_MC_ASR              (0xFFFFFF04) // (MC) MC Abort Status Register
+#define AT91C_MC_FSR              (0xFFFFFF68) // (MC) MC Flash Status Register
+#define AT91C_MC_FMR              (0xFFFFFF60) // (MC) MC Flash Mode Register
+#define AT91C_MC_AASR             (0xFFFFFF08) // (MC) MC Abort Address Status Register
+#define AT91C_MC_RCR              (0xFFFFFF00) // (MC) MC Remap Control Register
+// ========== Register definition for PDC_SPI1 peripheral ========== 
+#define AT91C_SPI1_RNPR           (0xFFFE4110) // (PDC_SPI1) Receive Next Pointer Register
+#define AT91C_SPI1_TPR            (0xFFFE4108) // (PDC_SPI1) Transmit Pointer Register
+#define AT91C_SPI1_RPR            (0xFFFE4100) // (PDC_SPI1) Receive Pointer Register
+#define AT91C_SPI1_PTSR           (0xFFFE4124) // (PDC_SPI1) PDC Transfer Status Register
+#define AT91C_SPI1_RCR            (0xFFFE4104) // (PDC_SPI1) Receive Counter Register
+#define AT91C_SPI1_TCR            (0xFFFE410C) // (PDC_SPI1) Transmit Counter Register
+#define AT91C_SPI1_RNCR           (0xFFFE4114) // (PDC_SPI1) Receive Next Counter Register
+#define AT91C_SPI1_TNCR           (0xFFFE411C) // (PDC_SPI1) Transmit Next Counter Register
+#define AT91C_SPI1_TNPR           (0xFFFE4118) // (PDC_SPI1) Transmit Next Pointer Register
+#define AT91C_SPI1_PTCR           (0xFFFE4120) // (PDC_SPI1) PDC Transfer Control Register
+// ========== Register definition for SPI1 peripheral ========== 
+#define AT91C_SPI1_CSR            (0xFFFE4030) // (SPI1) Chip Select Register
+#define AT91C_SPI1_IDR            (0xFFFE4018) // (SPI1) Interrupt Disable Register
+#define AT91C_SPI1_SR             (0xFFFE4010) // (SPI1) Status Register
+#define AT91C_SPI1_RDR            (0xFFFE4008) // (SPI1) Receive Data Register
+#define AT91C_SPI1_CR             (0xFFFE4000) // (SPI1) Control Register
+#define AT91C_SPI1_IMR            (0xFFFE401C) // (SPI1) Interrupt Mask Register
+#define AT91C_SPI1_IER            (0xFFFE4014) // (SPI1) Interrupt Enable Register
+#define AT91C_SPI1_TDR            (0xFFFE400C) // (SPI1) Transmit Data Register
+#define AT91C_SPI1_MR             (0xFFFE4004) // (SPI1) Mode Register
+// ========== Register definition for PDC_SPI0 peripheral ========== 
+#define AT91C_SPI0_PTCR           (0xFFFE0120) // (PDC_SPI0) PDC Transfer Control Register
+#define AT91C_SPI0_TNPR           (0xFFFE0118) // (PDC_SPI0) Transmit Next Pointer Register
+#define AT91C_SPI0_RNPR           (0xFFFE0110) // (PDC_SPI0) Receive Next Pointer Register
+#define AT91C_SPI0_TPR            (0xFFFE0108) // (PDC_SPI0) Transmit Pointer Register
+#define AT91C_SPI0_RPR            (0xFFFE0100) // (PDC_SPI0) Receive Pointer Register
+#define AT91C_SPI0_PTSR           (0xFFFE0124) // (PDC_SPI0) PDC Transfer Status Register
+#define AT91C_SPI0_TNCR           (0xFFFE011C) // (PDC_SPI0) Transmit Next Counter Register
+#define AT91C_SPI0_RNCR           (0xFFFE0114) // (PDC_SPI0) Receive Next Counter Register
+#define AT91C_SPI0_TCR            (0xFFFE010C) // (PDC_SPI0) Transmit Counter Register
+#define AT91C_SPI0_RCR            (0xFFFE0104) // (PDC_SPI0) Receive Counter Register
+// ========== Register definition for SPI0 peripheral ========== 
+#define AT91C_SPI0_CSR            (0xFFFE0030) // (SPI0) Chip Select Register
+#define AT91C_SPI0_IDR            (0xFFFE0018) // (SPI0) Interrupt Disable Register
+#define AT91C_SPI0_SR             (0xFFFE0010) // (SPI0) Status Register
+#define AT91C_SPI0_RDR            (0xFFFE0008) // (SPI0) Receive Data Register
+#define AT91C_SPI0_CR             (0xFFFE0000) // (SPI0) Control Register
+#define AT91C_SPI0_IMR            (0xFFFE001C) // (SPI0) Interrupt Mask Register
+#define AT91C_SPI0_IER            (0xFFFE0014) // (SPI0) Interrupt Enable Register
+#define AT91C_SPI0_TDR            (0xFFFE000C) // (SPI0) Transmit Data Register
+#define AT91C_SPI0_MR             (0xFFFE0004) // (SPI0) Mode Register
+// ========== Register definition for PDC_US1 peripheral ========== 
+#define AT91C_US1_PTSR            (0xFFFC4124) // (PDC_US1) PDC Transfer Status Register
+#define AT91C_US1_TNCR            (0xFFFC411C) // (PDC_US1) Transmit Next Counter Register
+#define AT91C_US1_RNCR            (0xFFFC4114) // (PDC_US1) Receive Next Counter Register
+#define AT91C_US1_TCR             (0xFFFC410C) // (PDC_US1) Transmit Counter Register
+#define AT91C_US1_RCR             (0xFFFC4104) // (PDC_US1) Receive Counter Register
+#define AT91C_US1_PTCR            (0xFFFC4120) // (PDC_US1) PDC Transfer Control Register
+#define AT91C_US1_TNPR            (0xFFFC4118) // (PDC_US1) Transmit Next Pointer Register
+#define AT91C_US1_RNPR            (0xFFFC4110) // (PDC_US1) Receive Next Pointer Register
+#define AT91C_US1_TPR             (0xFFFC4108) // (PDC_US1) Transmit Pointer Register
+#define AT91C_US1_RPR             (0xFFFC4100) // (PDC_US1) Receive Pointer Register
+// ========== Register definition for US1 peripheral ========== 
+#define AT91C_US1_RHR             (0xFFFC4018) // (US1) Receiver Holding Register
+#define AT91C_US1_IMR             (0xFFFC4010) // (US1) Interrupt Mask Register
+#define AT91C_US1_IER             (0xFFFC4008) // (US1) Interrupt Enable Register
+#define AT91C_US1_CR              (0xFFFC4000) // (US1) Control Register
+#define AT91C_US1_RTOR            (0xFFFC4024) // (US1) Receiver Time-out Register
+#define AT91C_US1_THR             (0xFFFC401C) // (US1) Transmitter Holding Register
+#define AT91C_US1_CSR             (0xFFFC4014) // (US1) Channel Status Register
+#define AT91C_US1_IDR             (0xFFFC400C) // (US1) Interrupt Disable Register
+#define AT91C_US1_FIDI            (0xFFFC4040) // (US1) FI_DI_Ratio Register
+#define AT91C_US1_BRGR            (0xFFFC4020) // (US1) Baud Rate Generator Register
+#define AT91C_US1_TTGR            (0xFFFC4028) // (US1) Transmitter Time-guard Register
+#define AT91C_US1_IF              (0xFFFC404C) // (US1) IRDA_FILTER Register
+#define AT91C_US1_NER             (0xFFFC4044) // (US1) Nb Errors Register
+#define AT91C_US1_MR              (0xFFFC4004) // (US1) Mode Register
+// ========== Register definition for PDC_US0 peripheral ========== 
+#define AT91C_US0_PTCR            (0xFFFC0120) // (PDC_US0) PDC Transfer Control Register
+#define AT91C_US0_TNPR            (0xFFFC0118) // (PDC_US0) Transmit Next Pointer Register
+#define AT91C_US0_RNPR            (0xFFFC0110) // (PDC_US0) Receive Next Pointer Register
+#define AT91C_US0_TPR             (0xFFFC0108) // (PDC_US0) Transmit Pointer Register
+#define AT91C_US0_RPR             (0xFFFC0100) // (PDC_US0) Receive Pointer Register
+#define AT91C_US0_PTSR            (0xFFFC0124) // (PDC_US0) PDC Transfer Status Register
+#define AT91C_US0_TNCR            (0xFFFC011C) // (PDC_US0) Transmit Next Counter Register
+#define AT91C_US0_RNCR            (0xFFFC0114) // (PDC_US0) Receive Next Counter Register
+#define AT91C_US0_TCR             (0xFFFC010C) // (PDC_US0) Transmit Counter Register
+#define AT91C_US0_RCR             (0xFFFC0104) // (PDC_US0) Receive Counter Register
+// ========== Register definition for US0 peripheral ========== 
+#define AT91C_US0_TTGR            (0xFFFC0028) // (US0) Transmitter Time-guard Register
+#define AT91C_US0_BRGR            (0xFFFC0020) // (US0) Baud Rate Generator Register
+#define AT91C_US0_RHR             (0xFFFC0018) // (US0) Receiver Holding Register
+#define AT91C_US0_IMR             (0xFFFC0010) // (US0) Interrupt Mask Register
+#define AT91C_US0_NER             (0xFFFC0044) // (US0) Nb Errors Register
+#define AT91C_US0_RTOR            (0xFFFC0024) // (US0) Receiver Time-out Register
+#define AT91C_US0_FIDI            (0xFFFC0040) // (US0) FI_DI_Ratio Register
+#define AT91C_US0_CR              (0xFFFC0000) // (US0) Control Register
+#define AT91C_US0_IER             (0xFFFC0008) // (US0) Interrupt Enable Register
+#define AT91C_US0_IF              (0xFFFC004C) // (US0) IRDA_FILTER Register
+#define AT91C_US0_MR              (0xFFFC0004) // (US0) Mode Register
+#define AT91C_US0_IDR             (0xFFFC000C) // (US0) Interrupt Disable Register
+#define AT91C_US0_CSR             (0xFFFC0014) // (US0) Channel Status Register
+#define AT91C_US0_THR             (0xFFFC001C) // (US0) Transmitter Holding Register
+// ========== Register definition for PDC_SSC peripheral ========== 
+#define AT91C_SSC_PTCR            (0xFFFD4120) // (PDC_SSC) PDC Transfer Control Register
+#define AT91C_SSC_TNPR            (0xFFFD4118) // (PDC_SSC) Transmit Next Pointer Register
+#define AT91C_SSC_RNPR            (0xFFFD4110) // (PDC_SSC) Receive Next Pointer Register
+#define AT91C_SSC_TPR             (0xFFFD4108) // (PDC_SSC) Transmit Pointer Register
+#define AT91C_SSC_RPR             (0xFFFD4100) // (PDC_SSC) Receive Pointer Register
+#define AT91C_SSC_PTSR            (0xFFFD4124) // (PDC_SSC) PDC Transfer Status Register
+#define AT91C_SSC_TNCR            (0xFFFD411C) // (PDC_SSC) Transmit Next Counter Register
+#define AT91C_SSC_RNCR            (0xFFFD4114) // (PDC_SSC) Receive Next Counter Register
+#define AT91C_SSC_TCR             (0xFFFD410C) // (PDC_SSC) Transmit Counter Register
+#define AT91C_SSC_RCR             (0xFFFD4104) // (PDC_SSC) Receive Counter Register
+// ========== Register definition for SSC peripheral ========== 
+#define AT91C_SSC_RFMR            (0xFFFD4014) // (SSC) Receive Frame Mode Register
+#define AT91C_SSC_CMR             (0xFFFD4004) // (SSC) Clock Mode Register
+#define AT91C_SSC_IDR             (0xFFFD4048) // (SSC) Interrupt Disable Register
+#define AT91C_SSC_SR              (0xFFFD4040) // (SSC) Status Register
+#define AT91C_SSC_RSHR            (0xFFFD4030) // (SSC) Receive Sync Holding Register
+#define AT91C_SSC_RHR             (0xFFFD4020) // (SSC) Receive Holding Register
+#define AT91C_SSC_TCMR            (0xFFFD4018) // (SSC) Transmit Clock Mode Register
+#define AT91C_SSC_RCMR            (0xFFFD4010) // (SSC) Receive Clock ModeRegister
+#define AT91C_SSC_CR              (0xFFFD4000) // (SSC) Control Register
+#define AT91C_SSC_IMR             (0xFFFD404C) // (SSC) Interrupt Mask Register
+#define AT91C_SSC_IER             (0xFFFD4044) // (SSC) Interrupt Enable Register
+#define AT91C_SSC_TSHR            (0xFFFD4034) // (SSC) Transmit Sync Holding Register
+#define AT91C_SSC_THR             (0xFFFD4024) // (SSC) Transmit Holding Register
+#define AT91C_SSC_TFMR            (0xFFFD401C) // (SSC) Transmit Frame Mode Register
+// ========== Register definition for TWI peripheral ========== 
+#define AT91C_TWI_RHR             (0xFFFB8030) // (TWI) Receive Holding Register
+#define AT91C_TWI_IDR             (0xFFFB8028) // (TWI) Interrupt Disable Register
+#define AT91C_TWI_SR              (0xFFFB8020) // (TWI) Status Register
+#define AT91C_TWI_CWGR            (0xFFFB8010) // (TWI) Clock Waveform Generator Register
+#define AT91C_TWI_CR              (0xFFFB8000) // (TWI) Control Register
+#define AT91C_TWI_THR             (0xFFFB8034) // (TWI) Transmit Holding Register
+#define AT91C_TWI_IMR             (0xFFFB802C) // (TWI) Interrupt Mask Register
+#define AT91C_TWI_IER             (0xFFFB8024) // (TWI) Interrupt Enable Register
+#define AT91C_TWI_IADR            (0xFFFB800C) // (TWI) Internal Address Register
+#define AT91C_TWI_MMR             (0xFFFB8004) // (TWI) Master Mode Register
+// ========== Register definition for PWMC_CH3 peripheral ========== 
+#define AT91C_PWMC_CH3_CUPDR      (0xFFFCC270) // (PWMC_CH3) Channel Update Register
+#define AT91C_PWMC_CH3_CPRDR      (0xFFFCC268) // (PWMC_CH3) Channel Period Register
+#define AT91C_PWMC_CH3_CMR        (0xFFFCC260) // (PWMC_CH3) Channel Mode Register
+#define AT91C_PWMC_CH3_Reserved   (0xFFFCC274) // (PWMC_CH3) Reserved
+#define AT91C_PWMC_CH3_CCNTR      (0xFFFCC26C) // (PWMC_CH3) Channel Counter Register
+#define AT91C_PWMC_CH3_CDTYR      (0xFFFCC264) // (PWMC_CH3) Channel Duty Cycle Register
+// ========== Register definition for PWMC_CH2 peripheral ========== 
+#define AT91C_PWMC_CH2_CUPDR      (0xFFFCC250) // (PWMC_CH2) Channel Update Register
+#define AT91C_PWMC_CH2_CPRDR      (0xFFFCC248) // (PWMC_CH2) Channel Period Register
+#define AT91C_PWMC_CH2_CMR        (0xFFFCC240) // (PWMC_CH2) Channel Mode Register
+#define AT91C_PWMC_CH2_Reserved   (0xFFFCC254) // (PWMC_CH2) Reserved
+#define AT91C_PWMC_CH2_CCNTR      (0xFFFCC24C) // (PWMC_CH2) Channel Counter Register
+#define AT91C_PWMC_CH2_CDTYR      (0xFFFCC244) // (PWMC_CH2) Channel Duty Cycle Register
+// ========== Register definition for PWMC_CH1 peripheral ========== 
+#define AT91C_PWMC_CH1_CUPDR      (0xFFFCC230) // (PWMC_CH1) Channel Update Register
+#define AT91C_PWMC_CH1_CPRDR      (0xFFFCC228) // (PWMC_CH1) Channel Period Register
+#define AT91C_PWMC_CH1_CMR        (0xFFFCC220) // (PWMC_CH1) Channel Mode Register
+#define AT91C_PWMC_CH1_Reserved   (0xFFFCC234) // (PWMC_CH1) Reserved
+#define AT91C_PWMC_CH1_CCNTR      (0xFFFCC22C) // (PWMC_CH1) Channel Counter Register
+#define AT91C_PWMC_CH1_CDTYR      (0xFFFCC224) // (PWMC_CH1) Channel Duty Cycle Register
+// ========== Register definition for PWMC_CH0 peripheral ========== 
+#define AT91C_PWMC_CH0_CUPDR      (0xFFFCC210) // (PWMC_CH0) Channel Update Register
+#define AT91C_PWMC_CH0_CPRDR      (0xFFFCC208) // (PWMC_CH0) Channel Period Register
+#define AT91C_PWMC_CH0_CMR        (0xFFFCC200) // (PWMC_CH0) Channel Mode Register
+#define AT91C_PWMC_CH0_Reserved   (0xFFFCC214) // (PWMC_CH0) Reserved
+#define AT91C_PWMC_CH0_CCNTR      (0xFFFCC20C) // (PWMC_CH0) Channel Counter Register
+#define AT91C_PWMC_CH0_CDTYR      (0xFFFCC204) // (PWMC_CH0) Channel Duty Cycle Register
+// ========== Register definition for PWMC peripheral ========== 
+#define AT91C_PWMC_VR             (0xFFFCC0FC) // (PWMC) PWMC Version Register
+#define AT91C_PWMC_ISR            (0xFFFCC01C) // (PWMC) PWMC Interrupt Status Register
+#define AT91C_PWMC_IDR            (0xFFFCC014) // (PWMC) PWMC Interrupt Disable Register
+#define AT91C_PWMC_SR             (0xFFFCC00C) // (PWMC) PWMC Status Register
+#define AT91C_PWMC_ENA            (0xFFFCC004) // (PWMC) PWMC Enable Register
+#define AT91C_PWMC_IMR            (0xFFFCC018) // (PWMC) PWMC Interrupt Mask Register
+#define AT91C_PWMC_MR             (0xFFFCC000) // (PWMC) PWMC Mode Register
+#define AT91C_PWMC_DIS            (0xFFFCC008) // (PWMC) PWMC Disable Register
+#define AT91C_PWMC_IER            (0xFFFCC010) // (PWMC) PWMC Interrupt Enable Register
+// ========== Register definition for UDP peripheral ========== 
+#define AT91C_UDP_TXVC            (0xFFFB0074) // (UDP) Transceiver Control Register
+#define AT91C_UDP_ISR             (0xFFFB001C) // (UDP) Interrupt Status Register
+#define AT91C_UDP_IDR             (0xFFFB0014) // (UDP) Interrupt Disable Register
+#define AT91C_UDP_CSR             (0xFFFB0030) // (UDP) Endpoint Control and Status Register
+#define AT91C_UDP_RSTEP           (0xFFFB0028) // (UDP) Reset Endpoint Register
+#define AT91C_UDP_ICR             (0xFFFB0020) // (UDP) Interrupt Clear Register
+#define AT91C_UDP_GLBSTATE        (0xFFFB0004) // (UDP) Global State Register
+#define AT91C_UDP_NUM             (0xFFFB0000) // (UDP) Frame Number Register
+#define AT91C_UDP_FADDR           (0xFFFB0008) // (UDP) Function Address Register
+#define AT91C_UDP_IER             (0xFFFB0010) // (UDP) Interrupt Enable Register
+#define AT91C_UDP_IMR             (0xFFFB0018) // (UDP) Interrupt Mask Register
+#define AT91C_UDP_FDR             (0xFFFB0050) // (UDP) Endpoint FIFO Data Register
+// ========== Register definition for TC0 peripheral ========== 
+#define AT91C_TC0_IMR             (0xFFFA002C) // (TC0) Interrupt Mask Register
+#define AT91C_TC0_IER             (0xFFFA0024) // (TC0) Interrupt Enable Register
+#define AT91C_TC0_RC              (0xFFFA001C) // (TC0) Register C
+#define AT91C_TC0_RA              (0xFFFA0014) // (TC0) Register A
+#define AT91C_TC0_CMR             (0xFFFA0004) // (TC0) Channel Mode Register (Capture Mode / Waveform Mode)
+#define AT91C_TC0_IDR             (0xFFFA0028) // (TC0) Interrupt Disable Register
+#define AT91C_TC0_SR              (0xFFFA0020) // (TC0) Status Register
+#define AT91C_TC0_RB              (0xFFFA0018) // (TC0) Register B
+#define AT91C_TC0_CV              (0xFFFA0010) // (TC0) Counter Value
+#define AT91C_TC0_CCR             (0xFFFA0000) // (TC0) Channel Control Register
+// ========== Register definition for TC1 peripheral ========== 
+#define AT91C_TC1_IMR             (0xFFFA006C) // (TC1) Interrupt Mask Register
+#define AT91C_TC1_IER             (0xFFFA0064) // (TC1) Interrupt Enable Register
+#define AT91C_TC1_RC              (0xFFFA005C) // (TC1) Register C
+#define AT91C_TC1_RA              (0xFFFA0054) // (TC1) Register A
+#define AT91C_TC1_CMR             (0xFFFA0044) // (TC1) Channel Mode Register (Capture Mode / Waveform Mode)
+#define AT91C_TC1_IDR             (0xFFFA0068) // (TC1) Interrupt Disable Register
+#define AT91C_TC1_SR              (0xFFFA0060) // (TC1) Status Register
+#define AT91C_TC1_RB              (0xFFFA0058) // (TC1) Register B
+#define AT91C_TC1_CV              (0xFFFA0050) // (TC1) Counter Value
+#define AT91C_TC1_CCR             (0xFFFA0040) // (TC1) Channel Control Register
+// ========== Register definition for TC2 peripheral ========== 
+#define AT91C_TC2_IMR             (0xFFFA00AC) // (TC2) Interrupt Mask Register
+#define AT91C_TC2_IER             (0xFFFA00A4) // (TC2) Interrupt Enable Register
+#define AT91C_TC2_RC              (0xFFFA009C) // (TC2) Register C
+#define AT91C_TC2_RA              (0xFFFA0094) // (TC2) Register A
+#define AT91C_TC2_CMR             (0xFFFA0084) // (TC2) Channel Mode Register (Capture Mode / Waveform Mode)
+#define AT91C_TC2_IDR             (0xFFFA00A8) // (TC2) Interrupt Disable Register
+#define AT91C_TC2_SR              (0xFFFA00A0) // (TC2) Status Register
+#define AT91C_TC2_RB              (0xFFFA0098) // (TC2) Register B
+#define AT91C_TC2_CV              (0xFFFA0090) // (TC2) Counter Value
+#define AT91C_TC2_CCR             (0xFFFA0080) // (TC2) Channel Control Register
+// ========== Register definition for TCB peripheral ========== 
+#define AT91C_TCB_BMR             (0xFFFA00C4) // (TCB) TC Block Mode Register
+#define AT91C_TCB_BCR             (0xFFFA00C0) // (TCB) TC Block Control Register
+// ========== Register definition for CAN_MB0 peripheral ========== 
+#define AT91C_CAN_MB0_MCR         (0xFFFD021C) // (CAN_MB0) MailBox Control Register
+#define AT91C_CAN_MB0_MDL         (0xFFFD0214) // (CAN_MB0) MailBox Data Low Register
+#define AT91C_CAN_MB0_MFID        (0xFFFD020C) // (CAN_MB0) MailBox Family ID Register
+#define AT91C_CAN_MB0_MAM         (0xFFFD0204) // (CAN_MB0) MailBox Acceptance Mask Register
+#define AT91C_CAN_MB0_MDH         (0xFFFD0218) // (CAN_MB0) MailBox Data High Register
+#define AT91C_CAN_MB0_MSR         (0xFFFD0210) // (CAN_MB0) MailBox Status Register
+#define AT91C_CAN_MB0_MID         (0xFFFD0208) // (CAN_MB0) MailBox ID Register
+#define AT91C_CAN_MB0_MMR         (0xFFFD0200) // (CAN_MB0) MailBox Mode Register
+// ========== Register definition for CAN_MB1 peripheral ========== 
+#define AT91C_CAN_MB1_MCR         (0xFFFD023C) // (CAN_MB1) MailBox Control Register
+#define AT91C_CAN_MB1_MDL         (0xFFFD0234) // (CAN_MB1) MailBox Data Low Register
+#define AT91C_CAN_MB1_MFID        (0xFFFD022C) // (CAN_MB1) MailBox Family ID Register
+#define AT91C_CAN_MB1_MAM         (0xFFFD0224) // (CAN_MB1) MailBox Acceptance Mask Register
+#define AT91C_CAN_MB1_MDH         (0xFFFD0238) // (CAN_MB1) MailBox Data High Register
+#define AT91C_CAN_MB1_MSR         (0xFFFD0230) // (CAN_MB1) MailBox Status Register
+#define AT91C_CAN_MB1_MID         (0xFFFD0228) // (CAN_MB1) MailBox ID Register
+#define AT91C_CAN_MB1_MMR         (0xFFFD0220) // (CAN_MB1) MailBox Mode Register
+// ========== Register definition for CAN_MB2 peripheral ========== 
+#define AT91C_CAN_MB2_MCR         (0xFFFD025C) // (CAN_MB2) MailBox Control Register
+#define AT91C_CAN_MB2_MDL         (0xFFFD0254) // (CAN_MB2) MailBox Data Low Register
+#define AT91C_CAN_MB2_MFID        (0xFFFD024C) // (CAN_MB2) MailBox Family ID Register
+#define AT91C_CAN_MB2_MAM         (0xFFFD0244) // (CAN_MB2) MailBox Acceptance Mask Register
+#define AT91C_CAN_MB2_MDH         (0xFFFD0258) // (CAN_MB2) MailBox Data High Register
+#define AT91C_CAN_MB2_MSR         (0xFFFD0250) // (CAN_MB2) MailBox Status Register
+#define AT91C_CAN_MB2_MID         (0xFFFD0248) // (CAN_MB2) MailBox ID Register
+#define AT91C_CAN_MB2_MMR         (0xFFFD0240) // (CAN_MB2) MailBox Mode Register
+// ========== Register definition for CAN_MB3 peripheral ========== 
+#define AT91C_CAN_MB3_MCR         (0xFFFD027C) // (CAN_MB3) MailBox Control Register
+#define AT91C_CAN_MB3_MDL         (0xFFFD0274) // (CAN_MB3) MailBox Data Low Register
+#define AT91C_CAN_MB3_MFID        (0xFFFD026C) // (CAN_MB3) MailBox Family ID Register
+#define AT91C_CAN_MB3_MAM         (0xFFFD0264) // (CAN_MB3) MailBox Acceptance Mask Register
+#define AT91C_CAN_MB3_MDH         (0xFFFD0278) // (CAN_MB3) MailBox Data High Register
+#define AT91C_CAN_MB3_MSR         (0xFFFD0270) // (CAN_MB3) MailBox Status Register
+#define AT91C_CAN_MB3_MID         (0xFFFD0268) // (CAN_MB3) MailBox ID Register
+#define AT91C_CAN_MB3_MMR         (0xFFFD0260) // (CAN_MB3) MailBox Mode Register
+// ========== Register definition for CAN_MB4 peripheral ========== 
+#define AT91C_CAN_MB4_MCR         (0xFFFD029C) // (CAN_MB4) MailBox Control Register
+#define AT91C_CAN_MB4_MDL         (0xFFFD0294) // (CAN_MB4) MailBox Data Low Register
+#define AT91C_CAN_MB4_MFID        (0xFFFD028C) // (CAN_MB4) MailBox Family ID Register
+#define AT91C_CAN_MB4_MAM         (0xFFFD0284) // (CAN_MB4) MailBox Acceptance Mask Register
+#define AT91C_CAN_MB4_MDH         (0xFFFD0298) // (CAN_MB4) MailBox Data High Register
+#define AT91C_CAN_MB4_MSR         (0xFFFD0290) // (CAN_MB4) MailBox Status Register
+#define AT91C_CAN_MB4_MID         (0xFFFD0288) // (CAN_MB4) MailBox ID Register
+#define AT91C_CAN_MB4_MMR         (0xFFFD0280) // (CAN_MB4) MailBox Mode Register
+// ========== Register definition for CAN_MB5 peripheral ========== 
+#define AT91C_CAN_MB5_MCR         (0xFFFD02BC) // (CAN_MB5) MailBox Control Register
+#define AT91C_CAN_MB5_MDL         (0xFFFD02B4) // (CAN_MB5) MailBox Data Low Register
+#define AT91C_CAN_MB5_MFID        (0xFFFD02AC) // (CAN_MB5) MailBox Family ID Register
+#define AT91C_CAN_MB5_MAM         (0xFFFD02A4) // (CAN_MB5) MailBox Acceptance Mask Register
+#define AT91C_CAN_MB5_MDH         (0xFFFD02B8) // (CAN_MB5) MailBox Data High Register
+#define AT91C_CAN_MB5_MSR         (0xFFFD02B0) // (CAN_MB5) MailBox Status Register
+#define AT91C_CAN_MB5_MID         (0xFFFD02A8) // (CAN_MB5) MailBox ID Register
+#define AT91C_CAN_MB5_MMR         (0xFFFD02A0) // (CAN_MB5) MailBox Mode Register
+// ========== Register definition for CAN_MB6 peripheral ========== 
+#define AT91C_CAN_MB6_MAM         (0xFFFD02C4) // (CAN_MB6) MailBox Acceptance Mask Register
+#define AT91C_CAN_MB6_MDH         (0xFFFD02D8) // (CAN_MB6) MailBox Data High Register
+#define AT91C_CAN_MB6_MSR         (0xFFFD02D0) // (CAN_MB6) MailBox Status Register
+#define AT91C_CAN_MB6_MID         (0xFFFD02C8) // (CAN_MB6) MailBox ID Register
+#define AT91C_CAN_MB6_MMR         (0xFFFD02C0) // (CAN_MB6) MailBox Mode Register
+#define AT91C_CAN_MB6_MCR         (0xFFFD02DC) // (CAN_MB6) MailBox Control Register
+#define AT91C_CAN_MB6_MDL         (0xFFFD02D4) // (CAN_MB6) MailBox Data Low Register
+#define AT91C_CAN_MB6_MFID        (0xFFFD02CC) // (CAN_MB6) MailBox Family ID Register
+// ========== Register definition for CAN_MB7 peripheral ========== 
+#define AT91C_CAN_MB7_MDH         (0xFFFD02F8) // (CAN_MB7) MailBox Data High Register
+#define AT91C_CAN_MB7_MSR         (0xFFFD02F0) // (CAN_MB7) MailBox Status Register
+#define AT91C_CAN_MB7_MID         (0xFFFD02E8) // (CAN_MB7) MailBox ID Register
+#define AT91C_CAN_MB7_MMR         (0xFFFD02E0) // (CAN_MB7) MailBox Mode Register
+#define AT91C_CAN_MB7_MCR         (0xFFFD02FC) // (CAN_MB7) MailBox Control Register
+#define AT91C_CAN_MB7_MDL         (0xFFFD02F4) // (CAN_MB7) MailBox Data Low Register
+#define AT91C_CAN_MB7_MFID        (0xFFFD02EC) // (CAN_MB7) MailBox Family ID Register
+#define AT91C_CAN_MB7_MAM         (0xFFFD02E4) // (CAN_MB7) MailBox Acceptance Mask Register
+// ========== Register definition for CAN peripheral ========== 
+#define AT91C_CAN_IMR             (0xFFFD000C) // (CAN) Interrupt Mask Register
+#define AT91C_CAN_IER             (0xFFFD0004) // (CAN) Interrupt Enable Register
+#define AT91C_CAN_ECR             (0xFFFD0020) // (CAN) Error Counter Register
+#define AT91C_CAN_TIM             (0xFFFD0018) // (CAN) Timer Register
+#define AT91C_CAN_SR              (0xFFFD0010) // (CAN) Status Register
+#define AT91C_CAN_IDR             (0xFFFD0008) // (CAN) Interrupt Disable Register
+#define AT91C_CAN_MR              (0xFFFD0000) // (CAN) Mode Register
+#define AT91C_CAN_BR              (0xFFFD0014) // (CAN) Baudrate Register
+#define AT91C_CAN_TIMESTP         (0xFFFD001C) // (CAN) Time Stamp Register
+#define AT91C_CAN_TCR             (0xFFFD0024) // (CAN) Transfer Command Register
+#define AT91C_CAN_ACR             (0xFFFD0028) // (CAN) Abort Command Register
+#define AT91C_CAN_VR              (0xFFFD00FC) // (CAN) Version Register
+// ========== Register definition for EMAC peripheral ========== 
+#define AT91C_EMAC_TID            (0xFFFDC0B8) // (EMAC) Type ID Checking Register
+#define AT91C_EMAC_SA3L           (0xFFFDC0A8) // (EMAC) Specific Address 3 Bottom, First 4 bytes
+#define AT91C_EMAC_STE            (0xFFFDC084) // (EMAC) SQE Test Error Register
+#define AT91C_EMAC_RSE            (0xFFFDC074) // (EMAC) Receive Symbol Errors Register
+#define AT91C_EMAC_IDR            (0xFFFDC02C) // (EMAC) Interrupt Disable Register
+#define AT91C_EMAC_TBQP           (0xFFFDC01C) // (EMAC) Transmit Buffer Queue Pointer
+#define AT91C_EMAC_TPQ            (0xFFFDC0BC) // (EMAC) Transmit Pause Quantum Register
+#define AT91C_EMAC_SA1L           (0xFFFDC098) // (EMAC) Specific Address 1 Bottom, First 4 bytes
+#define AT91C_EMAC_RLE            (0xFFFDC088) // (EMAC) Receive Length Field Mismatch Register
+#define AT91C_EMAC_IMR            (0xFFFDC030) // (EMAC) Interrupt Mask Register
+#define AT91C_EMAC_SA1H           (0xFFFDC09C) // (EMAC) Specific Address 1 Top, Last 2 bytes
+#define AT91C_EMAC_PFR            (0xFFFDC03C) // (EMAC) Pause Frames received Register
+#define AT91C_EMAC_FCSE           (0xFFFDC050) // (EMAC) Frame Check Sequence Error Register
+#define AT91C_EMAC_FTO            (0xFFFDC040) // (EMAC) Frames Transmitted OK Register
+#define AT91C_EMAC_TUND           (0xFFFDC064) // (EMAC) Transmit Underrun Error Register
+#define AT91C_EMAC_ALE            (0xFFFDC054) // (EMAC) Alignment Error Register
+#define AT91C_EMAC_SCF            (0xFFFDC044) // (EMAC) Single Collision Frame Register
+#define AT91C_EMAC_SA3H           (0xFFFDC0AC) // (EMAC) Specific Address 3 Top, Last 2 bytes
+#define AT91C_EMAC_ELE            (0xFFFDC078) // (EMAC) Excessive Length Errors Register
+#define AT91C_EMAC_CSE            (0xFFFDC068) // (EMAC) Carrier Sense Error Register
+#define AT91C_EMAC_DTF            (0xFFFDC058) // (EMAC) Deferred Transmission Frame Register
+#define AT91C_EMAC_RSR            (0xFFFDC020) // (EMAC) Receive Status Register
+#define AT91C_EMAC_USRIO          (0xFFFDC0C0) // (EMAC) USER Input/Output Register
+#define AT91C_EMAC_SA4L           (0xFFFDC0B0) // (EMAC) Specific Address 4 Bottom, First 4 bytes
+#define AT91C_EMAC_RRE            (0xFFFDC06C) // (EMAC) Receive Ressource Error Register
+#define AT91C_EMAC_RJA            (0xFFFDC07C) // (EMAC) Receive Jabbers Register
+#define AT91C_EMAC_TPF            (0xFFFDC08C) // (EMAC) Transmitted Pause Frames Register
+#define AT91C_EMAC_ISR            (0xFFFDC024) // (EMAC) Interrupt Status Register
+#define AT91C_EMAC_MAN            (0xFFFDC034) // (EMAC) PHY Maintenance Register
+#define AT91C_EMAC_WOL            (0xFFFDC0C4) // (EMAC) Wake On LAN Register
+#define AT91C_EMAC_USF            (0xFFFDC080) // (EMAC) Undersize Frames Register
+#define AT91C_EMAC_HRB            (0xFFFDC090) // (EMAC) Hash Address Bottom[31:0]
+#define AT91C_EMAC_PTR            (0xFFFDC038) // (EMAC) Pause Time Register
+#define AT91C_EMAC_HRT            (0xFFFDC094) // (EMAC) Hash Address Top[63:32]
+#define AT91C_EMAC_REV            (0xFFFDC0FC) // (EMAC) Revision Register
+#define AT91C_EMAC_MCF            (0xFFFDC048) // (EMAC) Multiple Collision Frame Register
+#define AT91C_EMAC_SA2L           (0xFFFDC0A0) // (EMAC) Specific Address 2 Bottom, First 4 bytes
+#define AT91C_EMAC_NCR            (0xFFFDC000) // (EMAC) Network Control Register
+#define AT91C_EMAC_FRO            (0xFFFDC04C) // (EMAC) Frames Received OK Register
+#define AT91C_EMAC_LCOL           (0xFFFDC05C) // (EMAC) Late Collision Register
+#define AT91C_EMAC_SA4H           (0xFFFDC0B4) // (EMAC) Specific Address 4 Top, Last 2 bytes
+#define AT91C_EMAC_NCFGR          (0xFFFDC004) // (EMAC) Network Configuration Register
+#define AT91C_EMAC_TSR            (0xFFFDC014) // (EMAC) Transmit Status Register
+#define AT91C_EMAC_SA2H           (0xFFFDC0A4) // (EMAC) Specific Address 2 Top, Last 2 bytes
+#define AT91C_EMAC_ECOL           (0xFFFDC060) // (EMAC) Excessive Collision Register
+#define AT91C_EMAC_ROV            (0xFFFDC070) // (EMAC) Receive Overrun Errors Register
+#define AT91C_EMAC_NSR            (0xFFFDC008) // (EMAC) Network Status Register
+#define AT91C_EMAC_RBQP           (0xFFFDC018) // (EMAC) Receive Buffer Queue Pointer
+#define AT91C_EMAC_IER            (0xFFFDC028) // (EMAC) Interrupt Enable Register
+// ========== Register definition for PDC_ADC peripheral ========== 
+#define AT91C_ADC_PTCR            (0xFFFD8120) // (PDC_ADC) PDC Transfer Control Register
+#define AT91C_ADC_TNPR            (0xFFFD8118) // (PDC_ADC) Transmit Next Pointer Register
+#define AT91C_ADC_RNPR            (0xFFFD8110) // (PDC_ADC) Receive Next Pointer Register
+#define AT91C_ADC_TPR             (0xFFFD8108) // (PDC_ADC) Transmit Pointer Register
+#define AT91C_ADC_RPR             (0xFFFD8100) // (PDC_ADC) Receive Pointer Register
+#define AT91C_ADC_PTSR            (0xFFFD8124) // (PDC_ADC) PDC Transfer Status Register
+#define AT91C_ADC_TNCR            (0xFFFD811C) // (PDC_ADC) Transmit Next Counter Register
+#define AT91C_ADC_RNCR            (0xFFFD8114) // (PDC_ADC) Receive Next Counter Register
+#define AT91C_ADC_TCR             (0xFFFD810C) // (PDC_ADC) Transmit Counter Register
+#define AT91C_ADC_RCR             (0xFFFD8104) // (PDC_ADC) Receive Counter Register
+// ========== Register definition for ADC peripheral ========== 
+#define AT91C_ADC_IMR             (0xFFFD802C) // (ADC) ADC Interrupt Mask Register
+#define AT91C_ADC_CDR4            (0xFFFD8040) // (ADC) ADC Channel Data Register 4
+#define AT91C_ADC_CDR2            (0xFFFD8038) // (ADC) ADC Channel Data Register 2
+#define AT91C_ADC_CDR0            (0xFFFD8030) // (ADC) ADC Channel Data Register 0
+#define AT91C_ADC_CDR7            (0xFFFD804C) // (ADC) ADC Channel Data Register 7
+#define AT91C_ADC_CDR1            (0xFFFD8034) // (ADC) ADC Channel Data Register 1
+#define AT91C_ADC_CDR3            (0xFFFD803C) // (ADC) ADC Channel Data Register 3
+#define AT91C_ADC_CDR5            (0xFFFD8044) // (ADC) ADC Channel Data Register 5
+#define AT91C_ADC_MR              (0xFFFD8004) // (ADC) ADC Mode Register
+#define AT91C_ADC_CDR6            (0xFFFD8048) // (ADC) ADC Channel Data Register 6
+#define AT91C_ADC_CR              (0xFFFD8000) // (ADC) ADC Control Register
+#define AT91C_ADC_CHER            (0xFFFD8010) // (ADC) ADC Channel Enable Register
+#define AT91C_ADC_CHSR            (0xFFFD8018) // (ADC) ADC Channel Status Register
+#define AT91C_ADC_IER             (0xFFFD8024) // (ADC) ADC Interrupt Enable Register
+#define AT91C_ADC_SR              (0xFFFD801C) // (ADC) ADC Status Register
+#define AT91C_ADC_CHDR            (0xFFFD8014) // (ADC) ADC Channel Disable Register
+#define AT91C_ADC_IDR             (0xFFFD8028) // (ADC) ADC Interrupt Disable Register
+#define AT91C_ADC_LCDR            (0xFFFD8020) // (ADC) ADC Last Converted Data Register
+
+// *****************************************************************************
+//               PIO DEFINITIONS FOR AT91SAM7X256
+// *****************************************************************************
+#define AT91C_PIO_PA0             (1 <<  0) // Pin Controlled by PA0
+#define AT91C_PA0_RXD0            (AT91C_PIO_PA0) //  USART 0 Receive Data
+#define AT91C_PIO_PA1             (1 <<  1) // Pin Controlled by PA1
+#define AT91C_PA1_TXD0            (AT91C_PIO_PA1) //  USART 0 Transmit Data
+#define AT91C_PIO_PA10            (1 << 10) // Pin Controlled by PA10
+#define AT91C_PA10_TWD            (AT91C_PIO_PA10) //  TWI Two-wire Serial Data
+#define AT91C_PIO_PA11            (1 << 11) // Pin Controlled by PA11
+#define AT91C_PA11_TWCK           (AT91C_PIO_PA11) //  TWI Two-wire Serial Clock
+#define AT91C_PIO_PA12            (1 << 12) // Pin Controlled by PA12
+#define AT91C_PA12_SPI0_NPCS0     (AT91C_PIO_PA12) //  SPI 0 Peripheral Chip Select 0
+#define AT91C_PIO_PA13            (1 << 13) // Pin Controlled by PA13
+#define AT91C_PA13_SPI0_NPCS1     (AT91C_PIO_PA13) //  SPI 0 Peripheral Chip Select 1
+#define AT91C_PA13_PCK1           (AT91C_PIO_PA13) //  PMC Programmable Clock Output 1
+#define AT91C_PIO_PA14            (1 << 14) // Pin Controlled by PA14
+#define AT91C_PA14_SPI0_NPCS2     (AT91C_PIO_PA14) //  SPI 0 Peripheral Chip Select 2
+#define AT91C_PA14_IRQ1           (AT91C_PIO_PA14) //  External Interrupt 1
+#define AT91C_PIO_PA15            (1 << 15) // Pin Controlled by PA15
+#define AT91C_PA15_SPI0_NPCS3     (AT91C_PIO_PA15) //  SPI 0 Peripheral Chip Select 3
+#define AT91C_PA15_TCLK2          (AT91C_PIO_PA15) //  Timer Counter 2 external clock input
+#define AT91C_PIO_PA16            (1 << 16) // Pin Controlled by PA16
+#define AT91C_PA16_SPI0_MISO      (AT91C_PIO_PA16) //  SPI 0 Master In Slave
+#define AT91C_PIO_PA17            (1 << 17) // Pin Controlled by PA17
+#define AT91C_PA17_SPI0_MOSI      (AT91C_PIO_PA17) //  SPI 0 Master Out Slave
+#define AT91C_PIO_PA18            (1 << 18) // Pin Controlled by PA18
+#define AT91C_PA18_SPI0_SPCK      (AT91C_PIO_PA18) //  SPI 0 Serial Clock
+#define AT91C_PIO_PA19            (1 << 19) // Pin Controlled by PA19
+#define AT91C_PA19_CANRX          (AT91C_PIO_PA19) //  CAN Receive
+#define AT91C_PIO_PA2             (1 <<  2) // Pin Controlled by PA2
+#define AT91C_PA2_SCK0            (AT91C_PIO_PA2) //  USART 0 Serial Clock
+#define AT91C_PA2_SPI1_NPCS1      (AT91C_PIO_PA2) //  SPI 1 Peripheral Chip Select 1
+#define AT91C_PIO_PA20            (1 << 20) // Pin Controlled by PA20
+#define AT91C_PA20_CANTX          (AT91C_PIO_PA20) //  CAN Transmit
+#define AT91C_PIO_PA21            (1 << 21) // Pin Controlled by PA21
+#define AT91C_PA21_TF             (AT91C_PIO_PA21) //  SSC Transmit Frame Sync
+#define AT91C_PA21_SPI1_NPCS0     (AT91C_PIO_PA21) //  SPI 1 Peripheral Chip Select 0
+#define AT91C_PIO_PA22            (1 << 22) // Pin Controlled by PA22
+#define AT91C_PA22_TK             (AT91C_PIO_PA22) //  SSC Transmit Clock
+#define AT91C_PA22_SPI1_SPCK      (AT91C_PIO_PA22) //  SPI 1 Serial Clock
+#define AT91C_PIO_PA23            (1 << 23) // Pin Controlled by PA23
+#define AT91C_PA23_TD             (AT91C_PIO_PA23) //  SSC Transmit data
+#define AT91C_PA23_SPI1_MOSI      (AT91C_PIO_PA23) //  SPI 1 Master Out Slave
+#define AT91C_PIO_PA24            (1 << 24) // Pin Controlled by PA24
+#define AT91C_PA24_RD             (AT91C_PIO_PA24) //  SSC Receive Data
+#define AT91C_PA24_SPI1_MISO      (AT91C_PIO_PA24) //  SPI 1 Master In Slave
+#define AT91C_PIO_PA25            (1 << 25) // Pin Controlled by PA25
+#define AT91C_PA25_RK             (AT91C_PIO_PA25) //  SSC Receive Clock
+#define AT91C_PA25_SPI1_NPCS1     (AT91C_PIO_PA25) //  SPI 1 Peripheral Chip Select 1
+#define AT91C_PIO_PA26            (1 << 26) // Pin Controlled by PA26
+#define AT91C_PA26_RF             (AT91C_PIO_PA26) //  SSC Receive Frame Sync
+#define AT91C_PA26_SPI1_NPCS2     (AT91C_PIO_PA26) //  SPI 1 Peripheral Chip Select 2
+#define AT91C_PIO_PA27            (1 << 27) // Pin Controlled by PA27
+#define AT91C_PA27_DRXD           (AT91C_PIO_PA27) //  DBGU Debug Receive Data
+#define AT91C_PA27_PCK3           (AT91C_PIO_PA27) //  PMC Programmable Clock Output 3
+#define AT91C_PIO_PA28            (1 << 28) // Pin Controlled by PA28
+#define AT91C_PA28_DTXD           (AT91C_PIO_PA28) //  DBGU Debug Transmit Data
+#define AT91C_PIO_PA29            (1 << 29) // Pin Controlled by PA29
+#define AT91C_PA29_FIQ            (AT91C_PIO_PA29) //  AIC Fast Interrupt Input
+#define AT91C_PA29_SPI1_NPCS3     (AT91C_PIO_PA29) //  SPI 1 Peripheral Chip Select 3
+#define AT91C_PIO_PA3             (1 <<  3) // Pin Controlled by PA3
+#define AT91C_PA3_RTS0            (AT91C_PIO_PA3) //  USART 0 Ready To Send
+#define AT91C_PA3_SPI1_NPCS2      (AT91C_PIO_PA3) //  SPI 1 Peripheral Chip Select 2
+#define AT91C_PIO_PA30            (1 << 30) // Pin Controlled by PA30
+#define AT91C_PA30_IRQ0           (AT91C_PIO_PA30) //  External Interrupt 0
+#define AT91C_PA30_PCK2           (AT91C_PIO_PA30) //  PMC Programmable Clock Output 2
+#define AT91C_PIO_PA4             (1 <<  4) // Pin Controlled by PA4
+#define AT91C_PA4_CTS0            (AT91C_PIO_PA4) //  USART 0 Clear To Send
+#define AT91C_PA4_SPI1_NPCS3      (AT91C_PIO_PA4) //  SPI 1 Peripheral Chip Select 3
+#define AT91C_PIO_PA5             (1 <<  5) // Pin Controlled by PA5
+#define AT91C_PA5_RXD1            (AT91C_PIO_PA5) //  USART 1 Receive Data
+#define AT91C_PIO_PA6             (1 <<  6) // Pin Controlled by PA6
+#define AT91C_PA6_TXD1            (AT91C_PIO_PA6) //  USART 1 Transmit Data
+#define AT91C_PIO_PA7             (1 <<  7) // Pin Controlled by PA7
+#define AT91C_PA7_SCK1            (AT91C_PIO_PA7) //  USART 1 Serial Clock
+#define AT91C_PA7_SPI0_NPCS1      (AT91C_PIO_PA7) //  SPI 0 Peripheral Chip Select 1
+#define AT91C_PIO_PA8             (1 <<  8) // Pin Controlled by PA8
+#define AT91C_PA8_RTS1            (AT91C_PIO_PA8) //  USART 1 Ready To Send
+#define AT91C_PA8_SPI0_NPCS2      (AT91C_PIO_PA8) //  SPI 0 Peripheral Chip Select 2
+#define AT91C_PIO_PA9             (1 <<  9) // Pin Controlled by PA9
+#define AT91C_PA9_CTS1            (AT91C_PIO_PA9) //  USART 1 Clear To Send
+#define AT91C_PA9_SPI0_NPCS3      (AT91C_PIO_PA9) //  SPI 0 Peripheral Chip Select 3
+#define AT91C_PIO_PB0             (1 <<  0) // Pin Controlled by PB0
+#define AT91C_PB0_ETXCK_EREFCK    (AT91C_PIO_PB0) //  Ethernet MAC Transmit Clock/Reference Clock
+#define AT91C_PB0_PCK0            (AT91C_PIO_PB0) //  PMC Programmable Clock Output 0
+#define AT91C_PIO_PB1             (1 <<  1) // Pin Controlled by PB1
+#define AT91C_PB1_ETXEN           (AT91C_PIO_PB1) //  Ethernet MAC Transmit Enable
+#define AT91C_PIO_PB10            (1 << 10) // Pin Controlled by PB10
+#define AT91C_PB10_ETX2           (AT91C_PIO_PB10) //  Ethernet MAC Transmit Data 2
+#define AT91C_PB10_SPI1_NPCS1     (AT91C_PIO_PB10) //  SPI 1 Peripheral Chip Select 1
+#define AT91C_PIO_PB11            (1 << 11) // Pin Controlled by PB11
+#define AT91C_PB11_ETX3           (AT91C_PIO_PB11) //  Ethernet MAC Transmit Data 3
+#define AT91C_PB11_SPI1_NPCS2     (AT91C_PIO_PB11) //  SPI 1 Peripheral Chip Select 2
+#define AT91C_PIO_PB12            (1 << 12) // Pin Controlled by PB12
+#define AT91C_PB12_ETXER          (AT91C_PIO_PB12) //  Ethernet MAC Transmikt Coding Error
+#define AT91C_PB12_TCLK0          (AT91C_PIO_PB12) //  Timer Counter 0 external clock input
+#define AT91C_PIO_PB13            (1 << 13) // Pin Controlled by PB13
+#define AT91C_PB13_ERX2           (AT91C_PIO_PB13) //  Ethernet MAC Receive Data 2
+#define AT91C_PB13_SPI0_NPCS1     (AT91C_PIO_PB13) //  SPI 0 Peripheral Chip Select 1
+#define AT91C_PIO_PB14            (1 << 14) // Pin Controlled by PB14
+#define AT91C_PB14_ERX3           (AT91C_PIO_PB14) //  Ethernet MAC Receive Data 3
+#define AT91C_PB14_SPI0_NPCS2     (AT91C_PIO_PB14) //  SPI 0 Peripheral Chip Select 2
+#define AT91C_PIO_PB15            (1 << 15) // Pin Controlled by PB15
+#define AT91C_PB15_ERXDV_ECRSDV   (AT91C_PIO_PB15) //  Ethernet MAC Receive Data Valid
+#define AT91C_PIO_PB16            (1 << 16) // Pin Controlled by PB16
+#define AT91C_PB16_ECOL           (AT91C_PIO_PB16) //  Ethernet MAC Collision Detected
+#define AT91C_PB16_SPI1_NPCS3     (AT91C_PIO_PB16) //  SPI 1 Peripheral Chip Select 3
+#define AT91C_PIO_PB17            (1 << 17) // Pin Controlled by PB17
+#define AT91C_PB17_ERXCK          (AT91C_PIO_PB17) //  Ethernet MAC Receive Clock
+#define AT91C_PB17_SPI0_NPCS3     (AT91C_PIO_PB17) //  SPI 0 Peripheral Chip Select 3
+#define AT91C_PIO_PB18            (1 << 18) // Pin Controlled by PB18
+#define AT91C_PB18_EF100          (AT91C_PIO_PB18) //  Ethernet MAC Force 100 Mbits/sec
+#define AT91C_PB18_ADTRG          (AT91C_PIO_PB18) //  ADC External Trigger
+#define AT91C_PIO_PB19            (1 << 19) // Pin Controlled by PB19
+#define AT91C_PB19_PWM0           (AT91C_PIO_PB19) //  PWM Channel 0
+#define AT91C_PB19_TCLK1          (AT91C_PIO_PB19) //  Timer Counter 1 external clock input
+#define AT91C_PIO_PB2             (1 <<  2) // Pin Controlled by PB2
+#define AT91C_PB2_ETX0            (AT91C_PIO_PB2) //  Ethernet MAC Transmit Data 0
+#define AT91C_PIO_PB20            (1 << 20) // Pin Controlled by PB20
+#define AT91C_PB20_PWM1           (AT91C_PIO_PB20) //  PWM Channel 1
+#define AT91C_PB20_PCK0           (AT91C_PIO_PB20) //  PMC Programmable Clock Output 0
+#define AT91C_PIO_PB21            (1 << 21) // Pin Controlled by PB21
+#define AT91C_PB21_PWM2           (AT91C_PIO_PB21) //  PWM Channel 2
+#define AT91C_PB21_PCK1           (AT91C_PIO_PB21) //  PMC Programmable Clock Output 1
+#define AT91C_PIO_PB22            (1 << 22) // Pin Controlled by PB22
+#define AT91C_PB22_PWM3           (AT91C_PIO_PB22) //  PWM Channel 3
+#define AT91C_PB22_PCK2           (AT91C_PIO_PB22) //  PMC Programmable Clock Output 2
+#define AT91C_PIO_PB23            (1 << 23) // Pin Controlled by PB23
+#define AT91C_PB23_TIOA0          (AT91C_PIO_PB23) //  Timer Counter 0 Multipurpose Timer I/O Pin A
+#define AT91C_PB23_DCD1           (AT91C_PIO_PB23) //  USART 1 Data Carrier Detect
+#define AT91C_PIO_PB24            (1 << 24) // Pin Controlled by PB24
+#define AT91C_PB24_TIOB0          (AT91C_PIO_PB24) //  Timer Counter 0 Multipurpose Timer I/O Pin B
+#define AT91C_PB24_DSR1           (AT91C_PIO_PB24) //  USART 1 Data Set ready
+#define AT91C_PIO_PB25            (1 << 25) // Pin Controlled by PB25
+#define AT91C_PB25_TIOA1          (AT91C_PIO_PB25) //  Timer Counter 1 Multipurpose Timer I/O Pin A
+#define AT91C_PB25_DTR1           (AT91C_PIO_PB25) //  USART 1 Data Terminal ready
+#define AT91C_PIO_PB26            (1 << 26) // Pin Controlled by PB26
+#define AT91C_PB26_TIOB1          (AT91C_PIO_PB26) //  Timer Counter 1 Multipurpose Timer I/O Pin B
+#define AT91C_PB26_RI1            (AT91C_PIO_PB26) //  USART 1 Ring Indicator
+#define AT91C_PIO_PB27            (1 << 27) // Pin Controlled by PB27
+#define AT91C_PB27_TIOA2          (AT91C_PIO_PB27) //  Timer Counter 2 Multipurpose Timer I/O Pin A
+#define AT91C_PB27_PWM0           (AT91C_PIO_PB27) //  PWM Channel 0
+#define AT91C_PIO_PB28            (1 << 28) // Pin Controlled by PB28
+#define AT91C_PB28_TIOB2          (AT91C_PIO_PB28) //  Timer Counter 2 Multipurpose Timer I/O Pin B
+#define AT91C_PB28_PWM1           (AT91C_PIO_PB28) //  PWM Channel 1
+#define AT91C_PIO_PB29            (1 << 29) // Pin Controlled by PB29
+#define AT91C_PB29_PCK1           (AT91C_PIO_PB29) //  PMC Programmable Clock Output 1
+#define AT91C_PB29_PWM2           (AT91C_PIO_PB29) //  PWM Channel 2
+#define AT91C_PIO_PB3             (1 <<  3) // Pin Controlled by PB3
+#define AT91C_PB3_ETX1            (AT91C_PIO_PB3) //  Ethernet MAC Transmit Data 1
+#define AT91C_PIO_PB30            (1 << 30) // Pin Controlled by PB30
+#define AT91C_PB30_PCK2           (AT91C_PIO_PB30) //  PMC Programmable Clock Output 2
+#define AT91C_PB30_PWM3           (AT91C_PIO_PB30) //  PWM Channel 3
+#define AT91C_PIO_PB4             (1 <<  4) // Pin Controlled by PB4
+#define AT91C_PB4_ECRS            (AT91C_PIO_PB4) //  Ethernet MAC Carrier Sense/Carrier Sense and Data Valid
+#define AT91C_PIO_PB5             (1 <<  5) // Pin Controlled by PB5
+#define AT91C_PB5_ERX0            (AT91C_PIO_PB5) //  Ethernet MAC Receive Data 0
+#define AT91C_PIO_PB6             (1 <<  6) // Pin Controlled by PB6
+#define AT91C_PB6_ERX1            (AT91C_PIO_PB6) //  Ethernet MAC Receive Data 1
+#define AT91C_PIO_PB7             (1 <<  7) // Pin Controlled by PB7
+#define AT91C_PB7_ERXER           (AT91C_PIO_PB7) //  Ethernet MAC Receive Error
+#define AT91C_PIO_PB8             (1 <<  8) // Pin Controlled by PB8
+#define AT91C_PB8_EMDC            (AT91C_PIO_PB8) //  Ethernet MAC Management Data Clock
+#define AT91C_PIO_PB9             (1 <<  9) // Pin Controlled by PB9
+#define AT91C_PB9_EMDIO           (AT91C_PIO_PB9) //  Ethernet MAC Management Data Input/Output
+
+// *****************************************************************************
+//               PERIPHERAL ID DEFINITIONS FOR AT91SAM7X256
+// *****************************************************************************
+#define AT91C_ID_FIQ              ( 0) // Advanced Interrupt Controller (FIQ)
+#define AT91C_ID_SYS              ( 1) // System Peripheral
+#define AT91C_ID_PIOA             ( 2) // Parallel IO Controller A
+#define AT91C_ID_PIOB             ( 3) // Parallel IO Controller B
+#define AT91C_ID_SPI0             ( 4) // Serial Peripheral Interface 0
+#define AT91C_ID_SPI1             ( 5) // Serial Peripheral Interface 1
+#define AT91C_ID_US0              ( 6) // USART 0
+#define AT91C_ID_US1              ( 7) // USART 1
+#define AT91C_ID_SSC              ( 8) // Serial Synchronous Controller
+#define AT91C_ID_TWI              ( 9) // Two-Wire Interface
+#define AT91C_ID_PWMC             (10) // PWM Controller
+#define AT91C_ID_UDP              (11) // USB Device Port
+#define AT91C_ID_TC0              (12) // Timer Counter 0
+#define AT91C_ID_TC1              (13) // Timer Counter 1
+#define AT91C_ID_TC2              (14) // Timer Counter 2
+#define AT91C_ID_CAN              (15) // Control Area Network Controller
+#define AT91C_ID_EMAC             (16) // Ethernet MAC
+#define AT91C_ID_ADC              (17) // Analog-to-Digital Converter
+#define AT91C_ID_18_Reserved      (18) // Reserved
+#define AT91C_ID_19_Reserved      (19) // Reserved
+#define AT91C_ID_20_Reserved      (20) // Reserved
+#define AT91C_ID_21_Reserved      (21) // Reserved
+#define AT91C_ID_22_Reserved      (22) // Reserved
+#define AT91C_ID_23_Reserved      (23) // Reserved
+#define AT91C_ID_24_Reserved      (24) // Reserved
+#define AT91C_ID_25_Reserved      (25) // Reserved
+#define AT91C_ID_26_Reserved      (26) // Reserved
+#define AT91C_ID_27_Reserved      (27) // Reserved
+#define AT91C_ID_28_Reserved      (28) // Reserved
+#define AT91C_ID_29_Reserved      (29) // Reserved
+#define AT91C_ID_IRQ0             (30) // Advanced Interrupt Controller (IRQ0)
+#define AT91C_ID_IRQ1             (31) // Advanced Interrupt Controller (IRQ1)
+#define AT91C_ALL_INT             (0xC003FFFF) // ALL VALID INTERRUPTS
+
+// *****************************************************************************
+//               BASE ADDRESS DEFINITIONS FOR AT91SAM7X256
+// *****************************************************************************
+#define AT91C_BASE_SYS            (0xFFFFF000) // (SYS) Base Address
+#define AT91C_BASE_AIC            (0xFFFFF000) // (AIC) Base Address
+#define AT91C_BASE_PDC_DBGU       (0xFFFFF300) // (PDC_DBGU) Base Address
+#define AT91C_BASE_DBGU           (0xFFFFF200) // (DBGU) Base Address
+#define AT91C_BASE_PIOA           (0xFFFFF400) // (PIOA) Base Address
+#define AT91C_BASE_PIOB           (0xFFFFF600) // (PIOB) Base Address
+#define AT91C_BASE_CKGR           (0xFFFFFC20) // (CKGR) Base Address
+#define AT91C_BASE_PMC            (0xFFFFFC00) // (PMC) Base Address
+#define AT91C_BASE_RSTC           (0xFFFFFD00) // (RSTC) Base Address
+#define AT91C_BASE_RTTC           (0xFFFFFD20) // (RTTC) Base Address
+#define AT91C_BASE_PITC           (0xFFFFFD30) // (PITC) Base Address
+#define AT91C_BASE_WDTC           (0xFFFFFD40) // (WDTC) Base Address
+#define AT91C_BASE_VREG           (0xFFFFFD60) // (VREG) Base Address
+#define AT91C_BASE_MC             (0xFFFFFF00) // (MC) Base Address
+#define AT91C_BASE_PDC_SPI1       (0xFFFE4100) // (PDC_SPI1) Base Address
+#define AT91C_BASE_SPI1           (0xFFFE4000) // (SPI1) Base Address
+#define AT91C_BASE_PDC_SPI0       (0xFFFE0100) // (PDC_SPI0) Base Address
+#define AT91C_BASE_SPI0           (0xFFFE0000) // (SPI0) Base Address
+#define AT91C_BASE_PDC_US1        (0xFFFC4100) // (PDC_US1) Base Address
+#define AT91C_BASE_US1            (0xFFFC4000) // (US1) Base Address
+#define AT91C_BASE_PDC_US0        (0xFFFC0100) // (PDC_US0) Base Address
+#define AT91C_BASE_US0            (0xFFFC0000) // (US0) Base Address
+#define AT91C_BASE_PDC_SSC        (0xFFFD4100) // (PDC_SSC) Base Address
+#define AT91C_BASE_SSC            (0xFFFD4000) // (SSC) Base Address
+#define AT91C_BASE_TWI            (0xFFFB8000) // (TWI) Base Address
+#define AT91C_BASE_PWMC_CH3       (0xFFFCC260) // (PWMC_CH3) Base Address
+#define AT91C_BASE_PWMC_CH2       (0xFFFCC240) // (PWMC_CH2) Base Address
+#define AT91C_BASE_PWMC_CH1       (0xFFFCC220) // (PWMC_CH1) Base Address
+#define AT91C_BASE_PWMC_CH0       (0xFFFCC200) // (PWMC_CH0) Base Address
+#define AT91C_BASE_PWMC           (0xFFFCC000) // (PWMC) Base Address
+#define AT91C_BASE_UDP            (0xFFFB0000) // (UDP) Base Address
+#define AT91C_BASE_TC0            (0xFFFA0000) // (TC0) Base Address
+#define AT91C_BASE_TC1            (0xFFFA0040) // (TC1) Base Address
+#define AT91C_BASE_TC2            (0xFFFA0080) // (TC2) Base Address
+#define AT91C_BASE_TCB            (0xFFFA0000) // (TCB) Base Address
+#define AT91C_BASE_CAN_MB0        (0xFFFD0200) // (CAN_MB0) Base Address
+#define AT91C_BASE_CAN_MB1        (0xFFFD0220) // (CAN_MB1) Base Address
+#define AT91C_BASE_CAN_MB2        (0xFFFD0240) // (CAN_MB2) Base Address
+#define AT91C_BASE_CAN_MB3        (0xFFFD0260) // (CAN_MB3) Base Address
+#define AT91C_BASE_CAN_MB4        (0xFFFD0280) // (CAN_MB4) Base Address
+#define AT91C_BASE_CAN_MB5        (0xFFFD02A0) // (CAN_MB5) Base Address
+#define AT91C_BASE_CAN_MB6        (0xFFFD02C0) // (CAN_MB6) Base Address
+#define AT91C_BASE_CAN_MB7        (0xFFFD02E0) // (CAN_MB7) Base Address
+#define AT91C_BASE_CAN            (0xFFFD0000) // (CAN) Base Address
+#define AT91C_BASE_EMAC           (0xFFFDC000) // (EMAC) Base Address
+#define AT91C_BASE_PDC_ADC        (0xFFFD8100) // (PDC_ADC) Base Address
+#define AT91C_BASE_ADC            (0xFFFD8000) // (ADC) Base Address
+
+// *****************************************************************************
+//               MEMORY MAPPING DEFINITIONS FOR AT91SAM7X256
+// *****************************************************************************
+// ISRAM
+#define AT91C_ISRAM	              (0x00200000) // Internal SRAM base address
+#define AT91C_ISRAM_SIZE	         (0x00010000) // Internal SRAM size in byte (64 Kbytes)
+// IFLASH
+#define AT91C_IFLASH	             (0x00100000) // Internal FLASH base address
+#define AT91C_IFLASH_SIZE	        (0x00040000) // Internal FLASH size in byte (256 Kbytes)
+#define AT91C_IFLASH_PAGE_SIZE	   (256) // Internal FLASH Page Size: 256 bytes
+#define AT91C_IFLASH_LOCK_REGION_SIZE	 (16384) // Internal FLASH Lock Region Size: 16 Kbytes
+#define AT91C_IFLASH_NB_OF_PAGES	 (1024) // Internal FLASH Number of Pages: 1024 bytes
+#define AT91C_IFLASH_NB_OF_LOCK_BITS	 (16) // Internal FLASH Number of Lock Bits: 16 bytes
+
+
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/incIAR/lib_AT91SAM7X256.h b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/incIAR/lib_AT91SAM7X256.h
new file mode 100644
index 000000000..8bd8f04d2
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/incIAR/lib_AT91SAM7X256.h
@@ -0,0 +1,4211 @@
+//* ----------------------------------------------------------------------------
+//*         ATMEL Microcontroller Software Support  -  ROUSSET  -
+//* ----------------------------------------------------------------------------
+//* DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+//* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+//* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+//* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+//* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+//* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+//* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+//* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+//* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+//* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//* ----------------------------------------------------------------------------
+//* File Name           : lib_AT91SAM7X256.h
+//* Object              : AT91SAM7X256 inlined functions
+//* Generated           : AT91 SW Application Group  01/16/2006 (16:36:21)
+//*
+//* CVS Reference       : /lib_MC_SAM7X.h/1.1/Thu Mar 25 15:19:14 2004//
+//* CVS Reference       : /lib_pdc.h/1.2/Tue Jul  2 13:29:40 2002//
+//* CVS Reference       : /lib_dbgu.h/1.1/Thu Aug 25 12:56:22 2005//
+//* CVS Reference       : /lib_VREG_6085B.h/1.1/Tue Feb  1 16:20:47 2005//
+//* CVS Reference       : /lib_ssc.h/1.4/Fri Jan 31 12:19:20 2003//
+//* CVS Reference       : /lib_spi2.h/1.2/Tue Aug 23 15:37:28 2005//
+//* CVS Reference       : /lib_PWM_SAM.h/1.3/Thu Jan 22 10:10:50 2004//
+//* CVS Reference       : /lib_tc_1753b.h/1.1/Fri Jan 31 12:20:02 2003//
+//* CVS Reference       : /lib_pitc_6079A.h/1.2/Tue Nov  9 14:43:56 2004//
+//* CVS Reference       : /lib_adc.h/1.6/Fri Oct 17 09:12:38 2003//
+//* CVS Reference       : /lib_pmc_SAM7X.h/1.5/Fri Nov  4 09:41:32 2005//
+//* CVS Reference       : /lib_rstc_6098A.h/1.1/Wed Oct  6 10:39:20 2004//
+//* CVS Reference       : /lib_rttc_6081A.h/1.1/Wed Oct  6 10:39:38 2004//
+//* CVS Reference       : /lib_pio.h/1.3/Fri Jan 31 12:18:56 2003//
+//* CVS Reference       : /lib_twi.h/1.3/Mon Jul 19 14:27:58 2004//
+//* CVS Reference       : /lib_wdtc_6080A.h/1.1/Wed Oct  6 10:38:30 2004//
+//* CVS Reference       : /lib_usart.h/1.5/Thu Nov 21 16:01:54 2002//
+//* CVS Reference       : /lib_udp.h/1.5/Tue Aug 30 12:13:47 2005//
+//* CVS Reference       : /lib_aic_6075b.h/1.2/Thu Jul  7 07:48:22 2005//
+//* CVS Reference       : /lib_can_AT91.h/1.5/Tue Aug 23 15:37:07 2005//
+//* ----------------------------------------------------------------------------
+
+#ifndef lib_AT91SAM7X256_H
+#define lib_AT91SAM7X256_H
+
+/* *****************************************************************************
+                SOFTWARE API FOR AIC
+   ***************************************************************************** */
+#define AT91C_AIC_BRANCH_OPCODE ((void (*) ()) 0xE51FFF20) // ldr, pc, [pc, #-&F20]
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_AIC_ConfigureIt
+//* \brief Interrupt Handler Initialization
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_AIC_ConfigureIt (
+	AT91PS_AIC pAic,  // \arg pointer to the AIC registers
+	unsigned int irq_id,     // \arg interrupt number to initialize
+	unsigned int priority,   // \arg priority to give to the interrupt
+	unsigned int src_type,   // \arg activation and sense of activation
+	void (*newHandler) () ) // \arg address of the interrupt handler
+{
+	unsigned int oldHandler;
+    unsigned int mask ;
+
+    oldHandler = pAic->AIC_SVR[irq_id];
+
+    mask = 0x1 << irq_id ;
+    //* Disable the interrupt on the interrupt controller
+    pAic->AIC_IDCR = mask ;
+    //* Save the interrupt handler routine pointer and the interrupt priority
+    pAic->AIC_SVR[irq_id] = (unsigned int) newHandler ;
+    //* Store the Source Mode Register
+    pAic->AIC_SMR[irq_id] = src_type | priority  ;
+    //* Clear the interrupt on the interrupt controller
+    pAic->AIC_ICCR = mask ;
+
+	return oldHandler;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_AIC_EnableIt
+//* \brief Enable corresponding IT number
+//*----------------------------------------------------------------------------
+__inline void AT91F_AIC_EnableIt (
+	AT91PS_AIC pAic,      // \arg pointer to the AIC registers
+	unsigned int irq_id ) // \arg interrupt number to initialize
+{
+    //* Enable the interrupt on the interrupt controller
+    pAic->AIC_IECR = 0x1 << irq_id ;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_AIC_DisableIt
+//* \brief Disable corresponding IT number
+//*----------------------------------------------------------------------------
+__inline void AT91F_AIC_DisableIt (
+	AT91PS_AIC pAic,      // \arg pointer to the AIC registers
+	unsigned int irq_id ) // \arg interrupt number to initialize
+{
+    unsigned int mask = 0x1 << irq_id;
+    //* Disable the interrupt on the interrupt controller
+    pAic->AIC_IDCR = mask ;
+    //* Clear the interrupt on the Interrupt Controller ( if one is pending )
+    pAic->AIC_ICCR = mask ;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_AIC_ClearIt
+//* \brief Clear corresponding IT number
+//*----------------------------------------------------------------------------
+__inline void AT91F_AIC_ClearIt (
+	AT91PS_AIC pAic,     // \arg pointer to the AIC registers
+	unsigned int irq_id) // \arg interrupt number to initialize
+{
+    //* Clear the interrupt on the Interrupt Controller ( if one is pending )
+    pAic->AIC_ICCR = (0x1 << irq_id);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_AIC_AcknowledgeIt
+//* \brief Acknowledge corresponding IT number
+//*----------------------------------------------------------------------------
+__inline void AT91F_AIC_AcknowledgeIt (
+	AT91PS_AIC pAic)     // \arg pointer to the AIC registers
+{
+    pAic->AIC_EOICR = pAic->AIC_EOICR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_AIC_SetExceptionVector
+//* \brief Configure vector handler
+//*----------------------------------------------------------------------------
+__inline unsigned int  AT91F_AIC_SetExceptionVector (
+	unsigned int *pVector, // \arg pointer to the AIC registers
+	void (*Handler) () )   // \arg Interrupt Handler
+{
+	unsigned int oldVector = *pVector;
+
+	if ((unsigned int) Handler == (unsigned int) AT91C_AIC_BRANCH_OPCODE)
+		*pVector = (unsigned int) AT91C_AIC_BRANCH_OPCODE;
+	else
+		*pVector = (((((unsigned int) Handler) - ((unsigned int) pVector) - 0x8) >> 2) & 0x00FFFFFF) | 0xEA000000;
+
+	return oldVector;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_AIC_Trig
+//* \brief Trig an IT
+//*----------------------------------------------------------------------------
+__inline void  AT91F_AIC_Trig (
+	AT91PS_AIC pAic,     // \arg pointer to the AIC registers
+	unsigned int irq_id) // \arg interrupt number
+{
+	pAic->AIC_ISCR = (0x1 << irq_id) ;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_AIC_IsActive
+//* \brief Test if an IT is active
+//*----------------------------------------------------------------------------
+__inline unsigned int  AT91F_AIC_IsActive (
+	AT91PS_AIC pAic,     // \arg pointer to the AIC registers
+	unsigned int irq_id) // \arg Interrupt Number
+{
+	return (pAic->AIC_ISR & (0x1 << irq_id));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_AIC_IsPending
+//* \brief Test if an IT is pending
+//*----------------------------------------------------------------------------
+__inline unsigned int  AT91F_AIC_IsPending (
+	AT91PS_AIC pAic,     // \arg pointer to the AIC registers
+	unsigned int irq_id) // \arg Interrupt Number
+{
+	return (pAic->AIC_IPR & (0x1 << irq_id));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_AIC_Open
+//* \brief Set exception vectors and AIC registers to default values
+//*----------------------------------------------------------------------------
+__inline void AT91F_AIC_Open(
+	AT91PS_AIC pAic,        // \arg pointer to the AIC registers
+	void (*IrqHandler) (),  // \arg Default IRQ vector exception
+	void (*FiqHandler) (),  // \arg Default FIQ vector exception
+	void (*DefaultHandler)  (), // \arg Default Handler set in ISR
+	void (*SpuriousHandler) (), // \arg Default Spurious Handler
+	unsigned int protectMode)   // \arg Debug Control Register
+{
+	int i;
+
+	// Disable all interrupts and set IVR to the default handler
+	for (i = 0; i < 32; ++i) {
+		AT91F_AIC_DisableIt(pAic, i);
+		AT91F_AIC_ConfigureIt(pAic, i, AT91C_AIC_PRIOR_LOWEST, AT91C_AIC_SRCTYPE_HIGH_LEVEL, DefaultHandler);
+	}
+
+	// Set the IRQ exception vector
+	AT91F_AIC_SetExceptionVector((unsigned int *) 0x18, IrqHandler);
+	// Set the Fast Interrupt exception vector
+	AT91F_AIC_SetExceptionVector((unsigned int *) 0x1C, FiqHandler);
+
+	pAic->AIC_SPU = (unsigned int) SpuriousHandler;
+	pAic->AIC_DCR = protectMode;
+}
+/* *****************************************************************************
+                SOFTWARE API FOR PDC
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_SetNextRx
+//* \brief Set the next receive transfer descriptor
+//*----------------------------------------------------------------------------
+__inline void AT91F_PDC_SetNextRx (
+	AT91PS_PDC pPDC,     // \arg pointer to a PDC controller
+	char *address,       // \arg address to the next bloc to be received
+	unsigned int bytes)  // \arg number of bytes to be received
+{
+	pPDC->PDC_RNPR = (unsigned int) address;
+	pPDC->PDC_RNCR = bytes;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_SetNextTx
+//* \brief Set the next transmit transfer descriptor
+//*----------------------------------------------------------------------------
+__inline void AT91F_PDC_SetNextTx (
+	AT91PS_PDC pPDC,       // \arg pointer to a PDC controller
+	char *address,         // \arg address to the next bloc to be transmitted
+	unsigned int bytes)    // \arg number of bytes to be transmitted
+{
+	pPDC->PDC_TNPR = (unsigned int) address;
+	pPDC->PDC_TNCR = bytes;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_SetRx
+//* \brief Set the receive transfer descriptor
+//*----------------------------------------------------------------------------
+__inline void AT91F_PDC_SetRx (
+	AT91PS_PDC pPDC,       // \arg pointer to a PDC controller
+	char *address,         // \arg address to the next bloc to be received
+	unsigned int bytes)    // \arg number of bytes to be received
+{
+	pPDC->PDC_RPR = (unsigned int) address;
+	pPDC->PDC_RCR = bytes;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_SetTx
+//* \brief Set the transmit transfer descriptor
+//*----------------------------------------------------------------------------
+__inline void AT91F_PDC_SetTx (
+	AT91PS_PDC pPDC,       // \arg pointer to a PDC controller
+	char *address,         // \arg address to the next bloc to be transmitted
+	unsigned int bytes)    // \arg number of bytes to be transmitted
+{
+	pPDC->PDC_TPR = (unsigned int) address;
+	pPDC->PDC_TCR = bytes;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_EnableTx
+//* \brief Enable transmit
+//*----------------------------------------------------------------------------
+__inline void AT91F_PDC_EnableTx (
+	AT91PS_PDC pPDC )       // \arg pointer to a PDC controller
+{
+	pPDC->PDC_PTCR = AT91C_PDC_TXTEN;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_EnableRx
+//* \brief Enable receive
+//*----------------------------------------------------------------------------
+__inline void AT91F_PDC_EnableRx (
+	AT91PS_PDC pPDC )       // \arg pointer to a PDC controller
+{
+	pPDC->PDC_PTCR = AT91C_PDC_RXTEN;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_DisableTx
+//* \brief Disable transmit
+//*----------------------------------------------------------------------------
+__inline void AT91F_PDC_DisableTx (
+	AT91PS_PDC pPDC )       // \arg pointer to a PDC controller
+{
+	pPDC->PDC_PTCR = AT91C_PDC_TXTDIS;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_DisableRx
+//* \brief Disable receive
+//*----------------------------------------------------------------------------
+__inline void AT91F_PDC_DisableRx (
+	AT91PS_PDC pPDC )       // \arg pointer to a PDC controller
+{
+	pPDC->PDC_PTCR = AT91C_PDC_RXTDIS;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_IsTxEmpty
+//* \brief Test if the current transfer descriptor has been sent
+//*----------------------------------------------------------------------------
+__inline int AT91F_PDC_IsTxEmpty ( // \return return 1 if transfer is complete
+	AT91PS_PDC pPDC )       // \arg pointer to a PDC controller
+{
+	return !(pPDC->PDC_TCR);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_IsNextTxEmpty
+//* \brief Test if the next transfer descriptor has been moved to the current td
+//*----------------------------------------------------------------------------
+__inline int AT91F_PDC_IsNextTxEmpty ( // \return return 1 if transfer is complete
+	AT91PS_PDC pPDC )       // \arg pointer to a PDC controller
+{
+	return !(pPDC->PDC_TNCR);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_IsRxEmpty
+//* \brief Test if the current transfer descriptor has been filled
+//*----------------------------------------------------------------------------
+__inline int AT91F_PDC_IsRxEmpty ( // \return return 1 if transfer is complete
+	AT91PS_PDC pPDC )       // \arg pointer to a PDC controller
+{
+	return !(pPDC->PDC_RCR);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_IsNextRxEmpty
+//* \brief Test if the next transfer descriptor has been moved to the current td
+//*----------------------------------------------------------------------------
+__inline int AT91F_PDC_IsNextRxEmpty ( // \return return 1 if transfer is complete
+	AT91PS_PDC pPDC )       // \arg pointer to a PDC controller
+{
+	return !(pPDC->PDC_RNCR);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_Open
+//* \brief Open PDC: disable TX and RX reset transfer descriptors, re-enable RX and TX
+//*----------------------------------------------------------------------------
+__inline void AT91F_PDC_Open (
+	AT91PS_PDC pPDC)       // \arg pointer to a PDC controller
+{
+    //* Disable the RX and TX PDC transfer requests
+	AT91F_PDC_DisableRx(pPDC);
+	AT91F_PDC_DisableTx(pPDC);
+
+	//* Reset all Counter register Next buffer first
+	AT91F_PDC_SetNextTx(pPDC, (char *) 0, 0);
+	AT91F_PDC_SetNextRx(pPDC, (char *) 0, 0);
+	AT91F_PDC_SetTx(pPDC, (char *) 0, 0);
+	AT91F_PDC_SetRx(pPDC, (char *) 0, 0);
+
+    //* Enable the RX and TX PDC transfer requests
+	AT91F_PDC_EnableRx(pPDC);
+	AT91F_PDC_EnableTx(pPDC);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_Close
+//* \brief Close PDC: disable TX and RX reset transfer descriptors
+//*----------------------------------------------------------------------------
+__inline void AT91F_PDC_Close (
+	AT91PS_PDC pPDC)       // \arg pointer to a PDC controller
+{
+    //* Disable the RX and TX PDC transfer requests
+	AT91F_PDC_DisableRx(pPDC);
+	AT91F_PDC_DisableTx(pPDC);
+
+	//* Reset all Counter register Next buffer first
+	AT91F_PDC_SetNextTx(pPDC, (char *) 0, 0);
+	AT91F_PDC_SetNextRx(pPDC, (char *) 0, 0);
+	AT91F_PDC_SetTx(pPDC, (char *) 0, 0);
+	AT91F_PDC_SetRx(pPDC, (char *) 0, 0);
+
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_SendFrame
+//* \brief Close PDC: disable TX and RX reset transfer descriptors
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PDC_SendFrame(
+	AT91PS_PDC pPDC,
+	char *pBuffer,
+	unsigned int szBuffer,
+	char *pNextBuffer,
+	unsigned int szNextBuffer )
+{
+	if (AT91F_PDC_IsTxEmpty(pPDC)) {
+		//* Buffer and next buffer can be initialized
+		AT91F_PDC_SetTx(pPDC, pBuffer, szBuffer);
+		AT91F_PDC_SetNextTx(pPDC, pNextBuffer, szNextBuffer);
+		return 2;
+	}
+	else if (AT91F_PDC_IsNextTxEmpty(pPDC)) {
+		//* Only one buffer can be initialized
+		AT91F_PDC_SetNextTx(pPDC, pBuffer, szBuffer);
+		return 1;
+	}
+	else {
+		//* All buffer are in use...
+		return 0;
+	}
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PDC_ReceiveFrame
+//* \brief Close PDC: disable TX and RX reset transfer descriptors
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PDC_ReceiveFrame (
+	AT91PS_PDC pPDC,
+	char *pBuffer,
+	unsigned int szBuffer,
+	char *pNextBuffer,
+	unsigned int szNextBuffer )
+{
+	if (AT91F_PDC_IsRxEmpty(pPDC)) {
+		//* Buffer and next buffer can be initialized
+		AT91F_PDC_SetRx(pPDC, pBuffer, szBuffer);
+		AT91F_PDC_SetNextRx(pPDC, pNextBuffer, szNextBuffer);
+		return 2;
+	}
+	else if (AT91F_PDC_IsNextRxEmpty(pPDC)) {
+		//* Only one buffer can be initialized
+		AT91F_PDC_SetNextRx(pPDC, pBuffer, szBuffer);
+		return 1;
+	}
+	else {
+		//* All buffer are in use...
+		return 0;
+	}
+}
+/* *****************************************************************************
+                SOFTWARE API FOR DBGU
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_DBGU_InterruptEnable
+//* \brief Enable DBGU Interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_DBGU_InterruptEnable(
+        AT91PS_DBGU pDbgu,   // \arg  pointer to a DBGU controller
+        unsigned int flag) // \arg  dbgu interrupt to be enabled
+{
+        pDbgu->DBGU_IER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_DBGU_InterruptDisable
+//* \brief Disable DBGU Interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_DBGU_InterruptDisable(
+        AT91PS_DBGU pDbgu,   // \arg  pointer to a DBGU controller
+        unsigned int flag) // \arg  dbgu interrupt to be disabled
+{
+        pDbgu->DBGU_IDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_DBGU_GetInterruptMaskStatus
+//* \brief Return DBGU Interrupt Mask Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_DBGU_GetInterruptMaskStatus( // \return DBGU Interrupt Mask Status
+        AT91PS_DBGU pDbgu) // \arg  pointer to a DBGU controller
+{
+        return pDbgu->DBGU_IMR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_DBGU_IsInterruptMasked
+//* \brief Test if DBGU Interrupt is Masked 
+//*----------------------------------------------------------------------------
+__inline int AT91F_DBGU_IsInterruptMasked(
+        AT91PS_DBGU pDbgu,   // \arg  pointer to a DBGU controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (AT91F_DBGU_GetInterruptMaskStatus(pDbgu) & flag);
+}
+
+/* *****************************************************************************
+                SOFTWARE API FOR PIO
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_CfgPeriph
+//* \brief Enable pins to be drived by peripheral
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_CfgPeriph(
+	AT91PS_PIO pPio,             // \arg pointer to a PIO controller
+	unsigned int periphAEnable,  // \arg PERIPH A to enable
+	unsigned int periphBEnable)  // \arg PERIPH B to enable
+
+{
+	pPio->PIO_ASR = periphAEnable;
+	pPio->PIO_BSR = periphBEnable;
+	pPio->PIO_PDR = (periphAEnable | periphBEnable); // Set in Periph mode
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_CfgOutput
+//* \brief Enable PIO in output mode
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_CfgOutput(
+	AT91PS_PIO pPio,             // \arg pointer to a PIO controller
+	unsigned int pioEnable)      // \arg PIO to be enabled
+{
+	pPio->PIO_PER = pioEnable; // Set in PIO mode
+	pPio->PIO_OER = pioEnable; // Configure in Output
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_CfgInput
+//* \brief Enable PIO in input mode
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_CfgInput(
+	AT91PS_PIO pPio,             // \arg pointer to a PIO controller
+	unsigned int inputEnable)      // \arg PIO to be enabled
+{
+	// Disable output
+	pPio->PIO_ODR  = inputEnable;
+	pPio->PIO_PER  = inputEnable;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_CfgOpendrain
+//* \brief Configure PIO in open drain
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_CfgOpendrain(
+	AT91PS_PIO pPio,             // \arg pointer to a PIO controller
+	unsigned int multiDrvEnable) // \arg pio to be configured in open drain
+{
+	// Configure the multi-drive option
+	pPio->PIO_MDDR = ~multiDrvEnable;
+	pPio->PIO_MDER = multiDrvEnable;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_CfgPullup
+//* \brief Enable pullup on PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_CfgPullup(
+	AT91PS_PIO pPio,             // \arg pointer to a PIO controller
+	unsigned int pullupEnable)   // \arg enable pullup on PIO
+{
+		// Connect or not Pullup
+	pPio->PIO_PPUDR = ~pullupEnable;
+	pPio->PIO_PPUER = pullupEnable;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_CfgDirectDrive
+//* \brief Enable direct drive on PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_CfgDirectDrive(
+	AT91PS_PIO pPio,             // \arg pointer to a PIO controller
+	unsigned int directDrive)    // \arg PIO to be configured with direct drive
+
+{
+	// Configure the Direct Drive
+	pPio->PIO_OWDR  = ~directDrive;
+	pPio->PIO_OWER  = directDrive;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_CfgInputFilter
+//* \brief Enable input filter on input PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_CfgInputFilter(
+	AT91PS_PIO pPio,             // \arg pointer to a PIO controller
+	unsigned int inputFilter)    // \arg PIO to be configured with input filter
+
+{
+	// Configure the Direct Drive
+	pPio->PIO_IFDR  = ~inputFilter;
+	pPio->PIO_IFER  = inputFilter;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_GetInput
+//* \brief Return PIO input value
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PIO_GetInput( // \return PIO input
+	AT91PS_PIO pPio) // \arg  pointer to a PIO controller
+{
+	return pPio->PIO_PDSR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_IsInputSet
+//* \brief Test if PIO is input flag is active
+//*----------------------------------------------------------------------------
+__inline int AT91F_PIO_IsInputSet(
+	AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+	unsigned int flag) // \arg  flag to be tested
+{
+	return (AT91F_PIO_GetInput(pPio) & flag);
+}
+
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_SetOutput
+//* \brief Set to 1 output PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_SetOutput(
+	AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+	unsigned int flag) // \arg  output to be set
+{
+	pPio->PIO_SODR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_ClearOutput
+//* \brief Set to 0 output PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_ClearOutput(
+	AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+	unsigned int flag) // \arg  output to be cleared
+{
+	pPio->PIO_CODR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_ForceOutput
+//* \brief Force output when Direct drive option is enabled
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_ForceOutput(
+	AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+	unsigned int flag) // \arg  output to be forced
+{
+	pPio->PIO_ODSR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_Enable
+//* \brief Enable PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_Enable(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  pio to be enabled 
+{
+        pPio->PIO_PER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_Disable
+//* \brief Disable PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_Disable(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  pio to be disabled 
+{
+        pPio->PIO_PDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_GetStatus
+//* \brief Return PIO Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PIO_GetStatus( // \return PIO Status
+        AT91PS_PIO pPio) // \arg  pointer to a PIO controller
+{
+        return pPio->PIO_PSR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_IsSet
+//* \brief Test if PIO is Set
+//*----------------------------------------------------------------------------
+__inline int AT91F_PIO_IsSet(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (AT91F_PIO_GetStatus(pPio) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_OutputEnable
+//* \brief Output Enable PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_OutputEnable(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  pio output to be enabled
+{
+        pPio->PIO_OER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_OutputDisable
+//* \brief Output Enable PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_OutputDisable(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  pio output to be disabled
+{
+        pPio->PIO_ODR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_GetOutputStatus
+//* \brief Return PIO Output Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PIO_GetOutputStatus( // \return PIO Output Status
+        AT91PS_PIO pPio) // \arg  pointer to a PIO controller
+{
+        return pPio->PIO_OSR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_IsOuputSet
+//* \brief Test if PIO Output is Set
+//*----------------------------------------------------------------------------
+__inline int AT91F_PIO_IsOutputSet(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (AT91F_PIO_GetOutputStatus(pPio) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_InputFilterEnable
+//* \brief Input Filter Enable PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_InputFilterEnable(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  pio input filter to be enabled
+{
+        pPio->PIO_IFER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_InputFilterDisable
+//* \brief Input Filter Disable PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_InputFilterDisable(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  pio input filter to be disabled
+{
+        pPio->PIO_IFDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_GetInputFilterStatus
+//* \brief Return PIO Input Filter Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PIO_GetInputFilterStatus( // \return PIO Input Filter Status
+        AT91PS_PIO pPio) // \arg  pointer to a PIO controller
+{
+        return pPio->PIO_IFSR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_IsInputFilterSet
+//* \brief Test if PIO Input filter is Set
+//*----------------------------------------------------------------------------
+__inline int AT91F_PIO_IsInputFilterSet(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (AT91F_PIO_GetInputFilterStatus(pPio) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_GetOutputDataStatus
+//* \brief Return PIO Output Data Status 
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PIO_GetOutputDataStatus( // \return PIO Output Data Status 
+	AT91PS_PIO pPio) // \arg  pointer to a PIO controller
+{
+        return pPio->PIO_ODSR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_InterruptEnable
+//* \brief Enable PIO Interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_InterruptEnable(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  pio interrupt to be enabled
+{
+        pPio->PIO_IER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_InterruptDisable
+//* \brief Disable PIO Interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_InterruptDisable(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  pio interrupt to be disabled
+{
+        pPio->PIO_IDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_GetInterruptMaskStatus
+//* \brief Return PIO Interrupt Mask Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PIO_GetInterruptMaskStatus( // \return PIO Interrupt Mask Status
+        AT91PS_PIO pPio) // \arg  pointer to a PIO controller
+{
+        return pPio->PIO_IMR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_GetInterruptStatus
+//* \brief Return PIO Interrupt Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PIO_GetInterruptStatus( // \return PIO Interrupt Status
+        AT91PS_PIO pPio) // \arg  pointer to a PIO controller
+{
+        return pPio->PIO_ISR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_IsInterruptMasked
+//* \brief Test if PIO Interrupt is Masked 
+//*----------------------------------------------------------------------------
+__inline int AT91F_PIO_IsInterruptMasked(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (AT91F_PIO_GetInterruptMaskStatus(pPio) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_IsInterruptSet
+//* \brief Test if PIO Interrupt is Set
+//*----------------------------------------------------------------------------
+__inline int AT91F_PIO_IsInterruptSet(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (AT91F_PIO_GetInterruptStatus(pPio) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_MultiDriverEnable
+//* \brief Multi Driver Enable PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_MultiDriverEnable(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  pio to be enabled
+{
+        pPio->PIO_MDER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_MultiDriverDisable
+//* \brief Multi Driver Disable PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_MultiDriverDisable(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  pio to be disabled
+{
+        pPio->PIO_MDDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_GetMultiDriverStatus
+//* \brief Return PIO Multi Driver Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PIO_GetMultiDriverStatus( // \return PIO Multi Driver Status
+        AT91PS_PIO pPio) // \arg  pointer to a PIO controller
+{
+        return pPio->PIO_MDSR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_IsMultiDriverSet
+//* \brief Test if PIO MultiDriver is Set
+//*----------------------------------------------------------------------------
+__inline int AT91F_PIO_IsMultiDriverSet(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (AT91F_PIO_GetMultiDriverStatus(pPio) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_A_RegisterSelection
+//* \brief PIO A Register Selection 
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_A_RegisterSelection(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  pio A register selection
+{
+        pPio->PIO_ASR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_B_RegisterSelection
+//* \brief PIO B Register Selection 
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_B_RegisterSelection(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  pio B register selection 
+{
+        pPio->PIO_BSR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_Get_AB_RegisterStatus
+//* \brief Return PIO Interrupt Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PIO_Get_AB_RegisterStatus( // \return PIO AB Register Status
+        AT91PS_PIO pPio) // \arg  pointer to a PIO controller
+{
+        return pPio->PIO_ABSR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_IsAB_RegisterSet
+//* \brief Test if PIO AB Register is Set
+//*----------------------------------------------------------------------------
+__inline int AT91F_PIO_IsAB_RegisterSet(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (AT91F_PIO_Get_AB_RegisterStatus(pPio) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_OutputWriteEnable
+//* \brief Output Write Enable PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_OutputWriteEnable(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  pio output write to be enabled
+{
+        pPio->PIO_OWER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_OutputWriteDisable
+//* \brief Output Write Disable PIO
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIO_OutputWriteDisable(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  pio output write to be disabled
+{
+        pPio->PIO_OWDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_GetOutputWriteStatus
+//* \brief Return PIO Output Write Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PIO_GetOutputWriteStatus( // \return PIO Output Write Status
+        AT91PS_PIO pPio) // \arg  pointer to a PIO controller
+{
+        return pPio->PIO_OWSR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_IsOutputWriteSet
+//* \brief Test if PIO OutputWrite is Set
+//*----------------------------------------------------------------------------
+__inline int AT91F_PIO_IsOutputWriteSet(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (AT91F_PIO_GetOutputWriteStatus(pPio) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_GetCfgPullup
+//* \brief Return PIO Configuration Pullup
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PIO_GetCfgPullup( // \return PIO Configuration Pullup 
+        AT91PS_PIO pPio) // \arg  pointer to a PIO controller
+{
+        return pPio->PIO_PPUSR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_IsOutputDataStatusSet
+//* \brief Test if PIO Output Data Status is Set 
+//*----------------------------------------------------------------------------
+__inline int AT91F_PIO_IsOutputDataStatusSet(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (AT91F_PIO_GetOutputDataStatus(pPio) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIO_IsCfgPullupStatusSet
+//* \brief Test if PIO Configuration Pullup Status is Set
+//*----------------------------------------------------------------------------
+__inline int AT91F_PIO_IsCfgPullupStatusSet(
+        AT91PS_PIO pPio,   // \arg  pointer to a PIO controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (~AT91F_PIO_GetCfgPullup(pPio) & flag);
+}
+
+/* *****************************************************************************
+                SOFTWARE API FOR PMC
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_CfgSysClkEnableReg
+//* \brief Configure the System Clock Enable Register of the PMC controller
+//*----------------------------------------------------------------------------
+__inline void AT91F_PMC_CfgSysClkEnableReg (
+	AT91PS_PMC pPMC, // \arg pointer to PMC controller
+	unsigned int mode)
+{
+	//* Write to the SCER register
+	pPMC->PMC_SCER = mode;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_CfgSysClkDisableReg
+//* \brief Configure the System Clock Disable Register of the PMC controller
+//*----------------------------------------------------------------------------
+__inline void AT91F_PMC_CfgSysClkDisableReg (
+	AT91PS_PMC pPMC, // \arg pointer to PMC controller
+	unsigned int mode)
+{
+	//* Write to the SCDR register
+	pPMC->PMC_SCDR = mode;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_GetSysClkStatusReg
+//* \brief Return the System Clock Status Register of the PMC controller
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PMC_GetSysClkStatusReg (
+	AT91PS_PMC pPMC // pointer to a CAN controller
+	)
+{
+	return pPMC->PMC_SCSR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_EnablePeriphClock
+//* \brief Enable peripheral clock
+//*----------------------------------------------------------------------------
+__inline void AT91F_PMC_EnablePeriphClock (
+	AT91PS_PMC pPMC, // \arg pointer to PMC controller
+	unsigned int periphIds)  // \arg IDs of peripherals
+{
+	pPMC->PMC_PCER = periphIds;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_DisablePeriphClock
+//* \brief Disable peripheral clock
+//*----------------------------------------------------------------------------
+__inline void AT91F_PMC_DisablePeriphClock (
+	AT91PS_PMC pPMC, // \arg pointer to PMC controller
+	unsigned int periphIds)  // \arg IDs of peripherals
+{
+	pPMC->PMC_PCDR = periphIds;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_GetPeriphClock
+//* \brief Get peripheral clock status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PMC_GetPeriphClock (
+	AT91PS_PMC pPMC) // \arg pointer to PMC controller
+{
+	return pPMC->PMC_PCSR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CKGR_CfgMainOscillatorReg
+//* \brief Cfg the main oscillator
+//*----------------------------------------------------------------------------
+__inline void AT91F_CKGR_CfgMainOscillatorReg (
+	AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller
+	unsigned int mode)
+{
+	pCKGR->CKGR_MOR = mode;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CKGR_GetMainOscillatorReg
+//* \brief Cfg the main oscillator
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CKGR_GetMainOscillatorReg (
+	AT91PS_CKGR pCKGR) // \arg pointer to CKGR controller
+{
+	return pCKGR->CKGR_MOR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CKGR_EnableMainOscillator
+//* \brief Enable the main oscillator
+//*----------------------------------------------------------------------------
+__inline void AT91F_CKGR_EnableMainOscillator(
+	AT91PS_CKGR pCKGR) // \arg pointer to CKGR controller
+{
+	pCKGR->CKGR_MOR |= AT91C_CKGR_MOSCEN;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CKGR_DisableMainOscillator
+//* \brief Disable the main oscillator
+//*----------------------------------------------------------------------------
+__inline void AT91F_CKGR_DisableMainOscillator (
+	AT91PS_CKGR pCKGR) // \arg pointer to CKGR controller
+{
+	pCKGR->CKGR_MOR &= ~AT91C_CKGR_MOSCEN;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CKGR_CfgMainOscStartUpTime
+//* \brief Cfg MOR Register according to the main osc startup time
+//*----------------------------------------------------------------------------
+__inline void AT91F_CKGR_CfgMainOscStartUpTime (
+	AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller
+	unsigned int startup_time,  // \arg main osc startup time in microsecond (us)
+	unsigned int slowClock)  // \arg slowClock in Hz
+{
+	pCKGR->CKGR_MOR &= ~AT91C_CKGR_OSCOUNT;
+	pCKGR->CKGR_MOR |= ((slowClock * startup_time)/(8*1000000)) << 8;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CKGR_GetMainClockFreqReg
+//* \brief Cfg the main oscillator
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CKGR_GetMainClockFreqReg (
+	AT91PS_CKGR pCKGR) // \arg pointer to CKGR controller
+{
+	return pCKGR->CKGR_MCFR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CKGR_GetMainClock
+//* \brief Return Main clock in Hz
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CKGR_GetMainClock (
+	AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller
+	unsigned int slowClock)  // \arg slowClock in Hz
+{
+	return ((pCKGR->CKGR_MCFR  & AT91C_CKGR_MAINF) * slowClock) >> 4;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_CfgMCKReg
+//* \brief Cfg Master Clock Register
+//*----------------------------------------------------------------------------
+__inline void AT91F_PMC_CfgMCKReg (
+	AT91PS_PMC pPMC, // \arg pointer to PMC controller
+	unsigned int mode)
+{
+	pPMC->PMC_MCKR = mode;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_GetMCKReg
+//* \brief Return Master Clock Register
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PMC_GetMCKReg(
+	AT91PS_PMC pPMC) // \arg pointer to PMC controller
+{
+	return pPMC->PMC_MCKR;
+}
+
+//*------------------------------------------------------------------------------
+//* \fn    AT91F_PMC_GetMasterClock
+//* \brief Return master clock in Hz which correponds to processor clock for ARM7
+//*------------------------------------------------------------------------------
+__inline unsigned int AT91F_PMC_GetMasterClock (
+	AT91PS_PMC pPMC, // \arg pointer to PMC controller
+	AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller
+	unsigned int slowClock)  // \arg slowClock in Hz
+{
+	unsigned int reg = pPMC->PMC_MCKR;
+	unsigned int prescaler = (1 << ((reg & AT91C_PMC_PRES) >> 2));
+	unsigned int pllDivider, pllMultiplier;
+
+	switch (reg & AT91C_PMC_CSS) {
+		case AT91C_PMC_CSS_SLOW_CLK: // Slow clock selected
+			return slowClock / prescaler;
+		case AT91C_PMC_CSS_MAIN_CLK: // Main clock is selected
+			return AT91F_CKGR_GetMainClock(pCKGR, slowClock) / prescaler;
+		case AT91C_PMC_CSS_PLL_CLK: // PLLB clock is selected
+			reg = pCKGR->CKGR_PLLR;
+			pllDivider    = (reg  & AT91C_CKGR_DIV);
+			pllMultiplier = ((reg  & AT91C_CKGR_MUL) >> 16) + 1;
+			return AT91F_CKGR_GetMainClock(pCKGR, slowClock) / pllDivider * pllMultiplier / prescaler;
+	}
+	return 0;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_EnablePCK
+//* \brief Enable Programmable Clock x Output
+//*----------------------------------------------------------------------------
+__inline void AT91F_PMC_EnablePCK (
+	AT91PS_PMC pPMC, // \arg pointer to PMC controller
+	unsigned int pck,  // \arg Programmable Clock x Output
+	unsigned int mode)
+{
+	pPMC->PMC_PCKR[pck] = mode;
+	pPMC->PMC_SCER = (1 << pck) << 8;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_DisablePCK
+//* \brief Disable Programmable Clock x Output
+//*----------------------------------------------------------------------------
+__inline void AT91F_PMC_DisablePCK (
+	AT91PS_PMC pPMC, // \arg pointer to PMC controller
+	unsigned int pck)  // \arg Programmable Clock x Output
+{
+	pPMC->PMC_SCDR = (1 << pck) << 8;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_EnableIt
+//* \brief Enable PMC interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_PMC_EnableIt (
+	AT91PS_PMC pPMC,     // pointer to a PMC controller
+	unsigned int flag)   // IT to be enabled
+{
+	//* Write to the IER register
+	pPMC->PMC_IER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_DisableIt
+//* \brief Disable PMC interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_PMC_DisableIt (
+	AT91PS_PMC pPMC, // pointer to a PMC controller
+	unsigned int flag) // IT to be disabled
+{
+	//* Write to the IDR register
+	pPMC->PMC_IDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_GetStatus
+//* \brief Return PMC Interrupt Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PMC_GetStatus( // \return PMC Interrupt Status
+	AT91PS_PMC pPMC) // pointer to a PMC controller
+{
+	return pPMC->PMC_SR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_GetInterruptMaskStatus
+//* \brief Return PMC Interrupt Mask Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PMC_GetInterruptMaskStatus( // \return PMC Interrupt Mask Status
+	AT91PS_PMC pPMC) // pointer to a PMC controller
+{
+	return pPMC->PMC_IMR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_IsInterruptMasked
+//* \brief Test if PMC Interrupt is Masked
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PMC_IsInterruptMasked(
+        AT91PS_PMC pPMC,   // \arg  pointer to a PMC controller
+        unsigned int flag) // \arg  flag to be tested
+{
+	return (AT91F_PMC_GetInterruptMaskStatus(pPMC) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_IsStatusSet
+//* \brief Test if PMC Status is Set
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PMC_IsStatusSet(
+        AT91PS_PMC pPMC,   // \arg  pointer to a PMC controller
+        unsigned int flag) // \arg  flag to be tested
+{
+	return (AT91F_PMC_GetStatus(pPMC) & flag);
+}
+
+// ----------------------------------------------------------------------------
+//  \fn    AT91F_CKGR_CfgPLLReg
+//  \brief Cfg the PLL Register
+// ----------------------------------------------------------------------------
+__inline void AT91F_CKGR_CfgPLLReg (
+	AT91PS_CKGR pCKGR, // \arg pointer to CKGR controller
+	unsigned int mode)
+{
+	pCKGR->CKGR_PLLR = mode;
+}
+
+// ----------------------------------------------------------------------------
+//  \fn    AT91F_CKGR_GetPLLReg
+//  \brief Get the PLL Register
+// ----------------------------------------------------------------------------
+__inline unsigned int AT91F_CKGR_GetPLLReg (
+	AT91PS_CKGR pCKGR) // \arg pointer to CKGR controller
+{
+	return pCKGR->CKGR_PLLR;
+}
+
+
+/* *****************************************************************************
+                SOFTWARE API FOR RSTC
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_RSTSoftReset
+//* \brief Start Software Reset
+//*----------------------------------------------------------------------------
+__inline void AT91F_RSTSoftReset(
+        AT91PS_RSTC pRSTC,
+        unsigned int reset)
+{
+	pRSTC->RSTC_RCR = (0xA5000000 | reset);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_RSTSetMode
+//* \brief Set Reset Mode
+//*----------------------------------------------------------------------------
+__inline void AT91F_RSTSetMode(
+        AT91PS_RSTC pRSTC,
+        unsigned int mode)
+{
+	pRSTC->RSTC_RMR = (0xA5000000 | mode);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_RSTGetMode
+//* \brief Get Reset Mode
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_RSTGetMode(
+        AT91PS_RSTC pRSTC)
+{
+	return (pRSTC->RSTC_RMR);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_RSTGetStatus
+//* \brief Get Reset Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_RSTGetStatus(
+        AT91PS_RSTC pRSTC)
+{
+	return (pRSTC->RSTC_RSR);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_RSTIsSoftRstActive
+//* \brief Return !=0 if software reset is still not completed
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_RSTIsSoftRstActive(
+        AT91PS_RSTC pRSTC)
+{
+	return ((pRSTC->RSTC_RSR) & AT91C_RSTC_SRCMP);
+}
+/* *****************************************************************************
+                SOFTWARE API FOR RTTC
+   ***************************************************************************** */
+//*--------------------------------------------------------------------------------------
+//* \fn     AT91F_SetRTT_TimeBase()
+//* \brief  Set the RTT prescaler according to the TimeBase in ms
+//*--------------------------------------------------------------------------------------
+__inline unsigned int AT91F_RTTSetTimeBase(
+        AT91PS_RTTC pRTTC, 
+        unsigned int ms)
+{
+	if (ms > 2000)
+		return 1;   // AT91C_TIME_OUT_OF_RANGE
+	pRTTC->RTTC_RTMR &= ~0xFFFF;	
+	pRTTC->RTTC_RTMR |= (((ms << 15) /1000) & 0xFFFF);	
+	return 0;
+}
+
+//*--------------------------------------------------------------------------------------
+//* \fn     AT91F_RTTSetPrescaler()
+//* \brief  Set the new prescaler value
+//*--------------------------------------------------------------------------------------
+__inline unsigned int AT91F_RTTSetPrescaler(
+        AT91PS_RTTC pRTTC, 
+        unsigned int rtpres)
+{
+	pRTTC->RTTC_RTMR &= ~0xFFFF;	
+	pRTTC->RTTC_RTMR |= (rtpres & 0xFFFF);	
+	return (pRTTC->RTTC_RTMR);
+}
+
+//*--------------------------------------------------------------------------------------
+//* \fn     AT91F_RTTRestart()
+//* \brief  Restart the RTT prescaler
+//*--------------------------------------------------------------------------------------
+__inline void AT91F_RTTRestart(
+        AT91PS_RTTC pRTTC)
+{
+	pRTTC->RTTC_RTMR |= AT91C_RTTC_RTTRST;	
+}
+
+
+//*--------------------------------------------------------------------------------------
+//* \fn     AT91F_RTT_SetAlarmINT()
+//* \brief  Enable RTT Alarm Interrupt
+//*--------------------------------------------------------------------------------------
+__inline void AT91F_RTTSetAlarmINT(
+        AT91PS_RTTC pRTTC)
+{
+	pRTTC->RTTC_RTMR |= AT91C_RTTC_ALMIEN;
+}
+
+//*--------------------------------------------------------------------------------------
+//* \fn     AT91F_RTT_ClearAlarmINT()
+//* \brief  Disable RTT Alarm Interrupt
+//*--------------------------------------------------------------------------------------
+__inline void AT91F_RTTClearAlarmINT(
+        AT91PS_RTTC pRTTC)
+{
+	pRTTC->RTTC_RTMR &= ~AT91C_RTTC_ALMIEN;
+}
+
+//*--------------------------------------------------------------------------------------
+//* \fn     AT91F_RTT_SetRttIncINT()
+//* \brief  Enable RTT INC Interrupt
+//*--------------------------------------------------------------------------------------
+__inline void AT91F_RTTSetRttIncINT(
+        AT91PS_RTTC pRTTC)
+{
+	pRTTC->RTTC_RTMR |= AT91C_RTTC_RTTINCIEN;
+}
+
+//*--------------------------------------------------------------------------------------
+//* \fn     AT91F_RTT_ClearRttIncINT()
+//* \brief  Disable RTT INC Interrupt
+//*--------------------------------------------------------------------------------------
+__inline void AT91F_RTTClearRttIncINT(
+        AT91PS_RTTC pRTTC)
+{
+	pRTTC->RTTC_RTMR &= ~AT91C_RTTC_RTTINCIEN;
+}
+
+//*--------------------------------------------------------------------------------------
+//* \fn     AT91F_RTT_SetAlarmValue()
+//* \brief  Set RTT Alarm Value
+//*--------------------------------------------------------------------------------------
+__inline void AT91F_RTTSetAlarmValue(
+        AT91PS_RTTC pRTTC, unsigned int alarm)
+{
+	pRTTC->RTTC_RTAR = alarm;
+}
+
+//*--------------------------------------------------------------------------------------
+//* \fn     AT91F_RTT_GetAlarmValue()
+//* \brief  Get RTT Alarm Value
+//*--------------------------------------------------------------------------------------
+__inline unsigned int AT91F_RTTGetAlarmValue(
+        AT91PS_RTTC pRTTC)
+{
+	return(pRTTC->RTTC_RTAR);
+}
+
+//*--------------------------------------------------------------------------------------
+//* \fn     AT91F_RTTGetStatus()
+//* \brief  Read the RTT status
+//*--------------------------------------------------------------------------------------
+__inline unsigned int AT91F_RTTGetStatus(
+        AT91PS_RTTC pRTTC)
+{
+	return(pRTTC->RTTC_RTSR);
+}
+
+//*--------------------------------------------------------------------------------------
+//* \fn     AT91F_RTT_ReadValue()
+//* \brief  Read the RTT value
+//*--------------------------------------------------------------------------------------
+__inline unsigned int AT91F_RTTReadValue(
+        AT91PS_RTTC pRTTC)
+{
+        register volatile unsigned int val1,val2;
+	do
+	{
+		val1 = pRTTC->RTTC_RTVR;
+		val2 = pRTTC->RTTC_RTVR;
+	}	
+	while(val1 != val2);
+	return(val1);
+}
+/* *****************************************************************************
+                SOFTWARE API FOR PITC
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PITInit
+//* \brief System timer init : period in µsecond, system clock freq in MHz
+//*----------------------------------------------------------------------------
+__inline void AT91F_PITInit(
+        AT91PS_PITC pPITC,
+        unsigned int period,
+        unsigned int pit_frequency)
+{
+	pPITC->PITC_PIMR = period? (period * pit_frequency + 8) >> 4 : 0; // +8 to avoid %10 and /10
+	pPITC->PITC_PIMR |= AT91C_PITC_PITEN;	 
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PITSetPIV
+//* \brief Set the PIT Periodic Interval Value 
+//*----------------------------------------------------------------------------
+__inline void AT91F_PITSetPIV(
+        AT91PS_PITC pPITC,
+        unsigned int piv)
+{
+	pPITC->PITC_PIMR = piv | (pPITC->PITC_PIMR & (AT91C_PITC_PITEN | AT91C_PITC_PITIEN));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PITEnableInt
+//* \brief Enable PIT periodic interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_PITEnableInt(
+        AT91PS_PITC pPITC)
+{
+	pPITC->PITC_PIMR |= AT91C_PITC_PITIEN;	 
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PITDisableInt
+//* \brief Disable PIT periodic interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_PITDisableInt(
+        AT91PS_PITC pPITC)
+{
+	pPITC->PITC_PIMR &= ~AT91C_PITC_PITIEN;	 
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PITGetMode
+//* \brief Read PIT mode register
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PITGetMode(
+        AT91PS_PITC pPITC)
+{
+	return(pPITC->PITC_PIMR);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PITGetStatus
+//* \brief Read PIT status register
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PITGetStatus(
+        AT91PS_PITC pPITC)
+{
+	return(pPITC->PITC_PISR);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PITGetPIIR
+//* \brief Read PIT CPIV and PICNT without ressetting the counters
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PITGetPIIR(
+        AT91PS_PITC pPITC)
+{
+	return(pPITC->PITC_PIIR);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PITGetPIVR
+//* \brief Read System timer CPIV and PICNT without ressetting the counters
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PITGetPIVR(
+        AT91PS_PITC pPITC)
+{
+	return(pPITC->PITC_PIVR);
+}
+/* *****************************************************************************
+                SOFTWARE API FOR WDTC
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_WDTSetMode
+//* \brief Set Watchdog Mode Register
+//*----------------------------------------------------------------------------
+__inline void AT91F_WDTSetMode(
+        AT91PS_WDTC pWDTC,
+        unsigned int Mode)
+{
+	pWDTC->WDTC_WDMR = Mode;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_WDTRestart
+//* \brief Restart Watchdog
+//*----------------------------------------------------------------------------
+__inline void AT91F_WDTRestart(
+        AT91PS_WDTC pWDTC)
+{
+	pWDTC->WDTC_WDCR = 0xA5000001;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_WDTSGettatus
+//* \brief Get Watchdog Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_WDTSGettatus(
+        AT91PS_WDTC pWDTC)
+{
+	return(pWDTC->WDTC_WDSR & 0x3);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_WDTGetPeriod
+//* \brief Translate ms into Watchdog Compatible value
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_WDTGetPeriod(unsigned int ms)
+{
+	if ((ms < 4) || (ms > 16000))
+		return 0;
+	return((ms << 8) / 1000);
+}
+/* *****************************************************************************
+                SOFTWARE API FOR VREG
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_VREG_Enable_LowPowerMode
+//* \brief Enable VREG Low Power Mode
+//*----------------------------------------------------------------------------
+__inline void AT91F_VREG_Enable_LowPowerMode(
+        AT91PS_VREG pVREG)
+{
+	pVREG->VREG_MR |= AT91C_VREG_PSTDBY;	 
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_VREG_Disable_LowPowerMode
+//* \brief Disable VREG Low Power Mode
+//*----------------------------------------------------------------------------
+__inline void AT91F_VREG_Disable_LowPowerMode(
+        AT91PS_VREG pVREG)
+{
+	pVREG->VREG_MR &= ~AT91C_VREG_PSTDBY;	 
+}/* *****************************************************************************
+                SOFTWARE API FOR MC
+   ***************************************************************************** */
+
+#define AT91C_MC_CORRECT_KEY  ((unsigned int) 0x5A << 24) // (MC) Correct Protect Key
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_MC_Remap
+//* \brief Make Remap
+//*----------------------------------------------------------------------------
+__inline void AT91F_MC_Remap (void)     //  
+{
+    AT91PS_MC pMC = (AT91PS_MC) AT91C_BASE_MC;
+    
+    pMC->MC_RCR = AT91C_MC_RCB;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_MC_EFC_CfgModeReg
+//* \brief Configure the EFC Mode Register of the MC controller
+//*----------------------------------------------------------------------------
+__inline void AT91F_MC_EFC_CfgModeReg (
+	AT91PS_MC pMC, // pointer to a MC controller
+	unsigned int mode)        // mode register 
+{
+	// Write to the FMR register
+	pMC->MC_FMR = mode;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_MC_EFC_GetModeReg
+//* \brief Return MC EFC Mode Regsiter
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_MC_EFC_GetModeReg(
+	AT91PS_MC pMC) // pointer to a MC controller
+{
+	return pMC->MC_FMR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_MC_EFC_ComputeFMCN
+//* \brief Return MC EFC Mode Regsiter
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_MC_EFC_ComputeFMCN(
+	int master_clock) // master clock in Hz
+{
+	return (master_clock/1000000 +2);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_MC_EFC_PerformCmd
+//* \brief Perform EFC Command
+//*----------------------------------------------------------------------------
+__inline void AT91F_MC_EFC_PerformCmd (
+	AT91PS_MC pMC, // pointer to a MC controller
+    unsigned int transfer_cmd)
+{
+	pMC->MC_FCR = transfer_cmd;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_MC_EFC_GetStatus
+//* \brief Return MC EFC Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_MC_EFC_GetStatus(
+	AT91PS_MC pMC) // pointer to a MC controller
+{
+	return pMC->MC_FSR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_MC_EFC_IsInterruptMasked
+//* \brief Test if EFC MC Interrupt is Masked 
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_MC_EFC_IsInterruptMasked(
+        AT91PS_MC pMC,   // \arg  pointer to a MC controller
+        unsigned int flag) // \arg  flag to be tested
+{
+	return (AT91F_MC_EFC_GetModeReg(pMC) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_MC_EFC_IsInterruptSet
+//* \brief Test if EFC MC Interrupt is Set
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_MC_EFC_IsInterruptSet(
+        AT91PS_MC pMC,   // \arg  pointer to a MC controller
+        unsigned int flag) // \arg  flag to be tested
+{
+	return (AT91F_MC_EFC_GetStatus(pMC) & flag);
+}
+
+/* *****************************************************************************
+                SOFTWARE API FOR SPI
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_CfgCs
+//* \brief Configure SPI chip select register
+//*----------------------------------------------------------------------------
+__inline void AT91F_SPI_CfgCs (
+	AT91PS_SPI pSPI,     // pointer to a SPI controller
+	int cs,     // SPI cs number (0 to 3)
+ 	int val)   //  chip select register
+{
+	//* Write to the CSR register
+	*(pSPI->SPI_CSR + cs) = val;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_EnableIt
+//* \brief Enable SPI interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_SPI_EnableIt (
+	AT91PS_SPI pSPI,     // pointer to a SPI controller
+	unsigned int flag)   // IT to be enabled
+{
+	//* Write to the IER register
+	pSPI->SPI_IER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_DisableIt
+//* \brief Disable SPI interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_SPI_DisableIt (
+	AT91PS_SPI pSPI, // pointer to a SPI controller
+	unsigned int flag) // IT to be disabled
+{
+	//* Write to the IDR register
+	pSPI->SPI_IDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_Reset
+//* \brief Reset the SPI controller
+//*----------------------------------------------------------------------------
+__inline void AT91F_SPI_Reset (
+	AT91PS_SPI pSPI // pointer to a SPI controller
+	)
+{
+	//* Write to the CR register
+	pSPI->SPI_CR = AT91C_SPI_SWRST;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_Enable
+//* \brief Enable the SPI controller
+//*----------------------------------------------------------------------------
+__inline void AT91F_SPI_Enable (
+	AT91PS_SPI pSPI // pointer to a SPI controller
+	)
+{
+	//* Write to the CR register
+	pSPI->SPI_CR = AT91C_SPI_SPIEN;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_Disable
+//* \brief Disable the SPI controller
+//*----------------------------------------------------------------------------
+__inline void AT91F_SPI_Disable (
+	AT91PS_SPI pSPI // pointer to a SPI controller
+	)
+{
+	//* Write to the CR register
+	pSPI->SPI_CR = AT91C_SPI_SPIDIS;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_CfgMode
+//* \brief Enable the SPI controller
+//*----------------------------------------------------------------------------
+__inline void AT91F_SPI_CfgMode (
+	AT91PS_SPI pSPI, // pointer to a SPI controller
+	int mode)        // mode register 
+{
+	//* Write to the MR register
+	pSPI->SPI_MR = mode;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_CfgPCS
+//* \brief Switch to the correct PCS of SPI Mode Register : Fixed Peripheral Selected
+//*----------------------------------------------------------------------------
+__inline void AT91F_SPI_CfgPCS (
+	AT91PS_SPI pSPI, // pointer to a SPI controller
+	char PCS_Device) // PCS of the Device
+{	
+ 	//* Write to the MR register
+	pSPI->SPI_MR &= 0xFFF0FFFF;
+	pSPI->SPI_MR |= ( (PCS_Device<<16) & AT91C_SPI_PCS );
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_ReceiveFrame
+//* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is busy
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_SPI_ReceiveFrame (
+	AT91PS_SPI pSPI,
+	char *pBuffer,
+	unsigned int szBuffer,
+	char *pNextBuffer,
+	unsigned int szNextBuffer )
+{
+	return AT91F_PDC_ReceiveFrame(
+		(AT91PS_PDC) &(pSPI->SPI_RPR),
+		pBuffer,
+		szBuffer,
+		pNextBuffer,
+		szNextBuffer);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_SendFrame
+//* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is bSPIy
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_SPI_SendFrame(
+	AT91PS_SPI pSPI,
+	char *pBuffer,
+	unsigned int szBuffer,
+	char *pNextBuffer,
+	unsigned int szNextBuffer )
+{
+	return AT91F_PDC_SendFrame(
+		(AT91PS_PDC) &(pSPI->SPI_RPR),
+		pBuffer,
+		szBuffer,
+		pNextBuffer,
+		szNextBuffer);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_Close
+//* \brief Close SPI: disable IT disable transfert, close PDC
+//*----------------------------------------------------------------------------
+__inline void AT91F_SPI_Close (
+	AT91PS_SPI pSPI)     // \arg pointer to a SPI controller
+{
+    //* Reset all the Chip Select register
+    pSPI->SPI_CSR[0] = 0 ;
+    pSPI->SPI_CSR[1] = 0 ;
+    pSPI->SPI_CSR[2] = 0 ;
+    pSPI->SPI_CSR[3] = 0 ;
+
+    //* Reset the SPI mode
+    pSPI->SPI_MR = 0  ;
+
+    //* Disable all interrupts
+    pSPI->SPI_IDR = 0xFFFFFFFF ;
+
+    //* Abort the Peripheral Data Transfers
+    AT91F_PDC_Close((AT91PS_PDC) &(pSPI->SPI_RPR));
+
+    //* Disable receiver and transmitter and stop any activity immediately
+    pSPI->SPI_CR = AT91C_SPI_SPIDIS;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_PutChar
+//* \brief Send a character,does not check if ready to send
+//*----------------------------------------------------------------------------
+__inline void AT91F_SPI_PutChar (
+	AT91PS_SPI pSPI,
+	unsigned int character,
+             unsigned int cs_number )
+{
+    unsigned int value_for_cs;
+    value_for_cs = (~(1 << cs_number)) & 0xF;  //Place a zero among a 4 ONEs number
+    pSPI->SPI_TDR = (character & 0xFFFF) | (value_for_cs << 16);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_GetChar
+//* \brief Receive a character,does not check if a character is available
+//*----------------------------------------------------------------------------
+__inline int AT91F_SPI_GetChar (
+	const AT91PS_SPI pSPI)
+{
+    return((pSPI->SPI_RDR) & 0xFFFF);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_GetInterruptMaskStatus
+//* \brief Return SPI Interrupt Mask Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_SPI_GetInterruptMaskStatus( // \return SPI Interrupt Mask Status
+        AT91PS_SPI pSpi) // \arg  pointer to a SPI controller
+{
+        return pSpi->SPI_IMR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI_IsInterruptMasked
+//* \brief Test if SPI Interrupt is Masked 
+//*----------------------------------------------------------------------------
+__inline int AT91F_SPI_IsInterruptMasked(
+        AT91PS_SPI pSpi,   // \arg  pointer to a SPI controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (AT91F_SPI_GetInterruptMaskStatus(pSpi) & flag);
+}
+
+/* *****************************************************************************
+                SOFTWARE API FOR USART
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_Baudrate
+//* \brief Calculate the baudrate
+//* Standard Asynchronous Mode : 8 bits , 1 stop , no parity
+#define AT91C_US_ASYNC_MODE ( AT91C_US_USMODE_NORMAL + \
+                        AT91C_US_NBSTOP_1_BIT + \
+                        AT91C_US_PAR_NONE + \
+                        AT91C_US_CHRL_8_BITS + \
+                        AT91C_US_CLKS_CLOCK )
+
+//* Standard External Asynchronous Mode : 8 bits , 1 stop , no parity
+#define AT91C_US_ASYNC_SCK_MODE ( AT91C_US_USMODE_NORMAL + \
+                            AT91C_US_NBSTOP_1_BIT + \
+                            AT91C_US_PAR_NONE + \
+                            AT91C_US_CHRL_8_BITS + \
+                            AT91C_US_CLKS_EXT )
+
+//* Standard Synchronous Mode : 8 bits , 1 stop , no parity
+#define AT91C_US_SYNC_MODE ( AT91C_US_SYNC + \
+                       AT91C_US_USMODE_NORMAL + \
+                       AT91C_US_NBSTOP_1_BIT + \
+                       AT91C_US_PAR_NONE + \
+                       AT91C_US_CHRL_8_BITS + \
+                       AT91C_US_CLKS_CLOCK )
+
+//* SCK used Label
+#define AT91C_US_SCK_USED (AT91C_US_CKLO | AT91C_US_CLKS_EXT)
+
+//* Standard ISO T=0 Mode : 8 bits , 1 stop , parity
+#define AT91C_US_ISO_READER_MODE ( AT91C_US_USMODE_ISO7816_0 + \
+					   		 AT91C_US_CLKS_CLOCK +\
+                       		 AT91C_US_NBSTOP_1_BIT + \
+                       		 AT91C_US_PAR_EVEN + \
+                       		 AT91C_US_CHRL_8_BITS + \
+                       		 AT91C_US_CKLO +\
+                       		 AT91C_US_OVER)
+
+//* Standard IRDA mode
+#define AT91C_US_ASYNC_IRDA_MODE (  AT91C_US_USMODE_IRDA + \
+                            AT91C_US_NBSTOP_1_BIT + \
+                            AT91C_US_PAR_NONE + \
+                            AT91C_US_CHRL_8_BITS + \
+                            AT91C_US_CLKS_CLOCK )
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_Baudrate
+//* \brief Caluculate baud_value according to the main clock and the baud rate
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_US_Baudrate (
+	const unsigned int main_clock, // \arg peripheral clock
+	const unsigned int baud_rate)  // \arg UART baudrate
+{
+	unsigned int baud_value = ((main_clock*10)/(baud_rate * 16));
+	if ((baud_value % 10) >= 5)
+		baud_value = (baud_value / 10) + 1;
+	else
+		baud_value /= 10;
+	return baud_value;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_SetBaudrate
+//* \brief Set the baudrate according to the CPU clock
+//*----------------------------------------------------------------------------
+__inline void AT91F_US_SetBaudrate (
+	AT91PS_USART pUSART,    // \arg pointer to a USART controller
+	unsigned int mainClock, // \arg peripheral clock
+	unsigned int speed)     // \arg UART baudrate
+{
+	//* Define the baud rate divisor register
+	pUSART->US_BRGR = AT91F_US_Baudrate(mainClock, speed);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_SetTimeguard
+//* \brief Set USART timeguard
+//*----------------------------------------------------------------------------
+__inline void AT91F_US_SetTimeguard (
+	AT91PS_USART pUSART,    // \arg pointer to a USART controller
+	unsigned int timeguard) // \arg timeguard value
+{
+	//* Write the Timeguard Register
+	pUSART->US_TTGR = timeguard ;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_EnableIt
+//* \brief Enable USART IT
+//*----------------------------------------------------------------------------
+__inline void AT91F_US_EnableIt (
+	AT91PS_USART pUSART, // \arg pointer to a USART controller
+	unsigned int flag)   // \arg IT to be enabled
+{
+	//* Write to the IER register
+	pUSART->US_IER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_DisableIt
+//* \brief Disable USART IT
+//*----------------------------------------------------------------------------
+__inline void AT91F_US_DisableIt (
+	AT91PS_USART pUSART, // \arg pointer to a USART controller
+	unsigned int flag)   // \arg IT to be disabled
+{
+	//* Write to the IER register
+	pUSART->US_IDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_Configure
+//* \brief Configure USART
+//*----------------------------------------------------------------------------
+__inline void AT91F_US_Configure (
+	AT91PS_USART pUSART,     // \arg pointer to a USART controller
+	unsigned int mainClock,  // \arg peripheral clock
+	unsigned int mode ,      // \arg mode Register to be programmed
+	unsigned int baudRate ,  // \arg baudrate to be programmed
+	unsigned int timeguard ) // \arg timeguard to be programmed
+{
+    //* Disable interrupts
+    pUSART->US_IDR = (unsigned int) -1;
+
+    //* Reset receiver and transmitter
+    pUSART->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX | AT91C_US_RXDIS | AT91C_US_TXDIS ;
+
+	//* Define the baud rate divisor register
+	AT91F_US_SetBaudrate(pUSART, mainClock, baudRate);
+
+	//* Write the Timeguard Register
+	AT91F_US_SetTimeguard(pUSART, timeguard);
+
+    //* Clear Transmit and Receive Counters
+    AT91F_PDC_Open((AT91PS_PDC) &(pUSART->US_RPR));
+
+    //* Define the USART mode
+    pUSART->US_MR = mode  ;
+
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_EnableRx
+//* \brief Enable receiving characters
+//*----------------------------------------------------------------------------
+__inline void AT91F_US_EnableRx (
+	AT91PS_USART pUSART)     // \arg pointer to a USART controller
+{
+    //* Enable receiver
+    pUSART->US_CR = AT91C_US_RXEN;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_EnableTx
+//* \brief Enable sending characters
+//*----------------------------------------------------------------------------
+__inline void AT91F_US_EnableTx (
+	AT91PS_USART pUSART)     // \arg pointer to a USART controller
+{
+    //* Enable  transmitter
+    pUSART->US_CR = AT91C_US_TXEN;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_ResetRx
+//* \brief Reset Receiver and re-enable it
+//*----------------------------------------------------------------------------
+__inline void AT91F_US_ResetRx (
+	AT91PS_USART pUSART)     // \arg pointer to a USART controller
+{
+	//* Reset receiver
+	pUSART->US_CR = AT91C_US_RSTRX;
+    //* Re-Enable receiver
+    pUSART->US_CR = AT91C_US_RXEN;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_ResetTx
+//* \brief Reset Transmitter and re-enable it
+//*----------------------------------------------------------------------------
+__inline void AT91F_US_ResetTx (
+	AT91PS_USART pUSART)     // \arg pointer to a USART controller
+{
+	//* Reset transmitter
+	pUSART->US_CR = AT91C_US_RSTTX;
+    //* Enable transmitter
+    pUSART->US_CR = AT91C_US_TXEN;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_DisableRx
+//* \brief Disable Receiver
+//*----------------------------------------------------------------------------
+__inline void AT91F_US_DisableRx (
+	AT91PS_USART pUSART)     // \arg pointer to a USART controller
+{
+    //* Disable receiver
+    pUSART->US_CR = AT91C_US_RXDIS;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_DisableTx
+//* \brief Disable Transmitter
+//*----------------------------------------------------------------------------
+__inline void AT91F_US_DisableTx (
+	AT91PS_USART pUSART)     // \arg pointer to a USART controller
+{
+    //* Disable transmitter
+    pUSART->US_CR = AT91C_US_TXDIS;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_Close
+//* \brief Close USART: disable IT disable receiver and transmitter, close PDC
+//*----------------------------------------------------------------------------
+__inline void AT91F_US_Close (
+	AT91PS_USART pUSART)     // \arg pointer to a USART controller
+{
+    //* Reset the baud rate divisor register
+    pUSART->US_BRGR = 0 ;
+
+    //* Reset the USART mode
+    pUSART->US_MR = 0  ;
+
+    //* Reset the Timeguard Register
+    pUSART->US_TTGR = 0;
+
+    //* Disable all interrupts
+    pUSART->US_IDR = 0xFFFFFFFF ;
+
+    //* Abort the Peripheral Data Transfers
+    AT91F_PDC_Close((AT91PS_PDC) &(pUSART->US_RPR));
+
+    //* Disable receiver and transmitter and stop any activity immediately
+    pUSART->US_CR = AT91C_US_TXDIS | AT91C_US_RXDIS | AT91C_US_RSTTX | AT91C_US_RSTRX ;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_TxReady
+//* \brief Return 1 if a character can be written in US_THR
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_US_TxReady (
+	AT91PS_USART pUSART )     // \arg pointer to a USART controller
+{
+    return (pUSART->US_CSR & AT91C_US_TXRDY);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_RxReady
+//* \brief Return 1 if a character can be read in US_RHR
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_US_RxReady (
+	AT91PS_USART pUSART )     // \arg pointer to a USART controller
+{
+    return (pUSART->US_CSR & AT91C_US_RXRDY);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_Error
+//* \brief Return the error flag
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_US_Error (
+	AT91PS_USART pUSART )     // \arg pointer to a USART controller
+{
+    return (pUSART->US_CSR &
+    	(AT91C_US_OVRE |  // Overrun error
+    	 AT91C_US_FRAME | // Framing error
+    	 AT91C_US_PARE));  // Parity error
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_PutChar
+//* \brief Send a character,does not check if ready to send
+//*----------------------------------------------------------------------------
+__inline void AT91F_US_PutChar (
+	AT91PS_USART pUSART,
+	int character )
+{
+    pUSART->US_THR = (character & 0x1FF);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_GetChar
+//* \brief Receive a character,does not check if a character is available
+//*----------------------------------------------------------------------------
+__inline int AT91F_US_GetChar (
+	const AT91PS_USART pUSART)
+{
+    return((pUSART->US_RHR) & 0x1FF);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_SendFrame
+//* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is busy
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_US_SendFrame(
+	AT91PS_USART pUSART,
+	char *pBuffer,
+	unsigned int szBuffer,
+	char *pNextBuffer,
+	unsigned int szNextBuffer )
+{
+	return AT91F_PDC_SendFrame(
+		(AT91PS_PDC) &(pUSART->US_RPR),
+		pBuffer,
+		szBuffer,
+		pNextBuffer,
+		szNextBuffer);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_ReceiveFrame
+//* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initializaed with Next Buffer, 0 if PDC is busy
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_US_ReceiveFrame (
+	AT91PS_USART pUSART,
+	char *pBuffer,
+	unsigned int szBuffer,
+	char *pNextBuffer,
+	unsigned int szNextBuffer )
+{
+	return AT91F_PDC_ReceiveFrame(
+		(AT91PS_PDC) &(pUSART->US_RPR),
+		pBuffer,
+		szBuffer,
+		pNextBuffer,
+		szNextBuffer);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US_SetIrdaFilter
+//* \brief Set the value of IrDa filter tregister
+//*----------------------------------------------------------------------------
+__inline void AT91F_US_SetIrdaFilter (
+	AT91PS_USART pUSART,
+	unsigned char value
+)
+{
+	pUSART->US_IF = value;
+}
+
+/* *****************************************************************************
+                SOFTWARE API FOR SSC
+   ***************************************************************************** */
+//* Define the standard I2S mode configuration
+
+//* Configuration to set in the SSC Transmit Clock Mode Register
+//* Parameters :  nb_bit_by_slot : 8, 16 or 32 bits
+//* 			  nb_slot_by_frame : number of channels
+#define AT91C_I2S_ASY_MASTER_TX_SETTING(nb_bit_by_slot, nb_slot_by_frame)( +\
+									   AT91C_SSC_CKS_DIV   +\
+                            		   AT91C_SSC_CKO_CONTINOUS      +\
+                            		   AT91C_SSC_CKG_NONE    +\
+                                       AT91C_SSC_START_FALL_RF +\
+                           			   AT91C_SSC_STTOUT  +\
+                            		   ((1<<16) & AT91C_SSC_STTDLY) +\
+                            		   ((((nb_bit_by_slot*nb_slot_by_frame)/2)-1) <<24))
+
+
+//* Configuration to set in the SSC Transmit Frame Mode Register
+//* Parameters : nb_bit_by_slot : 8, 16 or 32 bits
+//* 			 nb_slot_by_frame : number of channels
+#define AT91C_I2S_ASY_TX_FRAME_SETTING(nb_bit_by_slot, nb_slot_by_frame)( +\
+									(nb_bit_by_slot-1)  +\
+                            		AT91C_SSC_MSBF   +\
+                            		(((nb_slot_by_frame-1)<<8) & AT91C_SSC_DATNB)  +\
+                            		(((nb_bit_by_slot-1)<<16) & AT91C_SSC_FSLEN) +\
+                            		AT91C_SSC_FSOS_NEGATIVE)
+
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SSC_SetBaudrate
+//* \brief Set the baudrate according to the CPU clock
+//*----------------------------------------------------------------------------
+__inline void AT91F_SSC_SetBaudrate (
+        AT91PS_SSC pSSC,        // \arg pointer to a SSC controller
+        unsigned int mainClock, // \arg peripheral clock
+        unsigned int speed)     // \arg SSC baudrate
+{
+        unsigned int baud_value;
+        //* Define the baud rate divisor register
+        if (speed == 0)
+           baud_value = 0;
+        else
+        {
+           baud_value = (unsigned int) (mainClock * 10)/(2*speed);
+           if ((baud_value % 10) >= 5)
+                  baud_value = (baud_value / 10) + 1;
+           else
+                  baud_value /= 10;
+        }
+
+        pSSC->SSC_CMR = baud_value;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SSC_Configure
+//* \brief Configure SSC
+//*----------------------------------------------------------------------------
+__inline void AT91F_SSC_Configure (
+             AT91PS_SSC pSSC,          // \arg pointer to a SSC controller
+             unsigned int syst_clock,  // \arg System Clock Frequency
+             unsigned int baud_rate,   // \arg Expected Baud Rate Frequency
+             unsigned int clock_rx,    // \arg Receiver Clock Parameters
+             unsigned int mode_rx,     // \arg mode Register to be programmed
+             unsigned int clock_tx,    // \arg Transmitter Clock Parameters
+             unsigned int mode_tx)     // \arg mode Register to be programmed
+{
+    //* Disable interrupts
+	pSSC->SSC_IDR = (unsigned int) -1;
+
+    //* Reset receiver and transmitter
+	pSSC->SSC_CR = AT91C_SSC_SWRST | AT91C_SSC_RXDIS | AT91C_SSC_TXDIS ;
+
+    //* Define the Clock Mode Register
+	AT91F_SSC_SetBaudrate(pSSC, syst_clock, baud_rate);
+
+     //* Write the Receive Clock Mode Register
+	pSSC->SSC_RCMR =  clock_rx;
+
+     //* Write the Transmit Clock Mode Register
+	pSSC->SSC_TCMR =  clock_tx;
+
+     //* Write the Receive Frame Mode Register
+	pSSC->SSC_RFMR =  mode_rx;
+
+     //* Write the Transmit Frame Mode Register
+	pSSC->SSC_TFMR =  mode_tx;
+
+    //* Clear Transmit and Receive Counters
+	AT91F_PDC_Open((AT91PS_PDC) &(pSSC->SSC_RPR));
+
+
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SSC_EnableRx
+//* \brief Enable receiving datas
+//*----------------------------------------------------------------------------
+__inline void AT91F_SSC_EnableRx (
+	AT91PS_SSC pSSC)     // \arg pointer to a SSC controller
+{
+    //* Enable receiver
+    pSSC->SSC_CR = AT91C_SSC_RXEN;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SSC_DisableRx
+//* \brief Disable receiving datas
+//*----------------------------------------------------------------------------
+__inline void AT91F_SSC_DisableRx (
+	AT91PS_SSC pSSC)     // \arg pointer to a SSC controller
+{
+    //* Disable receiver
+    pSSC->SSC_CR = AT91C_SSC_RXDIS;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SSC_EnableTx
+//* \brief Enable sending datas
+//*----------------------------------------------------------------------------
+__inline void AT91F_SSC_EnableTx (
+	AT91PS_SSC pSSC)     // \arg pointer to a SSC controller
+{
+    //* Enable  transmitter
+    pSSC->SSC_CR = AT91C_SSC_TXEN;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SSC_DisableTx
+//* \brief Disable sending datas
+//*----------------------------------------------------------------------------
+__inline void AT91F_SSC_DisableTx (
+	AT91PS_SSC pSSC)     // \arg pointer to a SSC controller
+{
+    //* Disable  transmitter
+    pSSC->SSC_CR = AT91C_SSC_TXDIS;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SSC_EnableIt
+//* \brief Enable SSC IT
+//*----------------------------------------------------------------------------
+__inline void AT91F_SSC_EnableIt (
+	AT91PS_SSC pSSC, // \arg pointer to a SSC controller
+	unsigned int flag)   // \arg IT to be enabled
+{
+	//* Write to the IER register
+	pSSC->SSC_IER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SSC_DisableIt
+//* \brief Disable SSC IT
+//*----------------------------------------------------------------------------
+__inline void AT91F_SSC_DisableIt (
+	AT91PS_SSC pSSC, // \arg pointer to a SSC controller
+	unsigned int flag)   // \arg IT to be disabled
+{
+	//* Write to the IDR register
+	pSSC->SSC_IDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SSC_ReceiveFrame
+//* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initialized with Next Buffer, 0 if PDC is busy
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_SSC_ReceiveFrame (
+	AT91PS_SSC pSSC,
+	char *pBuffer,
+	unsigned int szBuffer,
+	char *pNextBuffer,
+	unsigned int szNextBuffer )
+{
+	return AT91F_PDC_ReceiveFrame(
+		(AT91PS_PDC) &(pSSC->SSC_RPR),
+		pBuffer,
+		szBuffer,
+		pNextBuffer,
+		szNextBuffer);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SSC_SendFrame
+//* \brief Return 2 if PDC has been initialized with Buffer and Next Buffer, 1 if PDC has been initialized with Next Buffer, 0 if PDC is busy
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_SSC_SendFrame(
+	AT91PS_SSC pSSC,
+	char *pBuffer,
+	unsigned int szBuffer,
+	char *pNextBuffer,
+	unsigned int szNextBuffer )
+{
+	return AT91F_PDC_SendFrame(
+		(AT91PS_PDC) &(pSSC->SSC_RPR),
+		pBuffer,
+		szBuffer,
+		pNextBuffer,
+		szNextBuffer);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SSC_GetInterruptMaskStatus
+//* \brief Return SSC Interrupt Mask Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_SSC_GetInterruptMaskStatus( // \return SSC Interrupt Mask Status
+        AT91PS_SSC pSsc) // \arg  pointer to a SSC controller
+{
+        return pSsc->SSC_IMR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SSC_IsInterruptMasked
+//* \brief Test if SSC Interrupt is Masked 
+//*----------------------------------------------------------------------------
+__inline int AT91F_SSC_IsInterruptMasked(
+        AT91PS_SSC pSsc,   // \arg  pointer to a SSC controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (AT91F_SSC_GetInterruptMaskStatus(pSsc) & flag);
+}
+
+/* *****************************************************************************
+                SOFTWARE API FOR TWI
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TWI_EnableIt
+//* \brief Enable TWI IT
+//*----------------------------------------------------------------------------
+__inline void AT91F_TWI_EnableIt (
+	AT91PS_TWI pTWI, // \arg pointer to a TWI controller
+	unsigned int flag)   // \arg IT to be enabled
+{
+	//* Write to the IER register
+	pTWI->TWI_IER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TWI_DisableIt
+//* \brief Disable TWI IT
+//*----------------------------------------------------------------------------
+__inline void AT91F_TWI_DisableIt (
+	AT91PS_TWI pTWI, // \arg pointer to a TWI controller
+	unsigned int flag)   // \arg IT to be disabled
+{
+	//* Write to the IDR register
+	pTWI->TWI_IDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TWI_Configure
+//* \brief Configure TWI in master mode
+//*----------------------------------------------------------------------------
+__inline void AT91F_TWI_Configure ( AT91PS_TWI pTWI )          // \arg pointer to a TWI controller
+{
+    //* Disable interrupts
+	pTWI->TWI_IDR = (unsigned int) -1;
+
+    //* Reset peripheral
+	pTWI->TWI_CR = AT91C_TWI_SWRST;
+
+	//* Set Master mode
+	pTWI->TWI_CR = AT91C_TWI_MSEN;
+
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TWI_GetInterruptMaskStatus
+//* \brief Return TWI Interrupt Mask Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_TWI_GetInterruptMaskStatus( // \return TWI Interrupt Mask Status
+        AT91PS_TWI pTwi) // \arg  pointer to a TWI controller
+{
+        return pTwi->TWI_IMR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TWI_IsInterruptMasked
+//* \brief Test if TWI Interrupt is Masked 
+//*----------------------------------------------------------------------------
+__inline int AT91F_TWI_IsInterruptMasked(
+        AT91PS_TWI pTwi,   // \arg  pointer to a TWI controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (AT91F_TWI_GetInterruptMaskStatus(pTwi) & flag);
+}
+
+/* *****************************************************************************
+                SOFTWARE API FOR PWMC
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWM_GetStatus
+//* \brief Return PWM Interrupt Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PWMC_GetStatus( // \return PWM Interrupt Status
+	AT91PS_PWMC pPWM) // pointer to a PWM controller
+{
+	return pPWM->PWMC_SR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWM_InterruptEnable
+//* \brief Enable PWM Interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_PWMC_InterruptEnable(
+        AT91PS_PWMC pPwm,   // \arg  pointer to a PWM controller
+        unsigned int flag) // \arg  PWM interrupt to be enabled
+{
+        pPwm->PWMC_IER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWM_InterruptDisable
+//* \brief Disable PWM Interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_PWMC_InterruptDisable(
+        AT91PS_PWMC pPwm,   // \arg  pointer to a PWM controller
+        unsigned int flag) // \arg  PWM interrupt to be disabled
+{
+        pPwm->PWMC_IDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWM_GetInterruptMaskStatus
+//* \brief Return PWM Interrupt Mask Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PWMC_GetInterruptMaskStatus( // \return PWM Interrupt Mask Status
+        AT91PS_PWMC pPwm) // \arg  pointer to a PWM controller
+{
+        return pPwm->PWMC_IMR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWM_IsInterruptMasked
+//* \brief Test if PWM Interrupt is Masked
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PWMC_IsInterruptMasked(
+        AT91PS_PWMC pPWM,   // \arg  pointer to a PWM controller
+        unsigned int flag) // \arg  flag to be tested
+{
+	return (AT91F_PWMC_GetInterruptMaskStatus(pPWM) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWM_IsStatusSet
+//* \brief Test if PWM Interrupt is Set
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_PWMC_IsStatusSet(
+        AT91PS_PWMC pPWM,   // \arg  pointer to a PWM controller
+        unsigned int flag) // \arg  flag to be tested
+{
+	return (AT91F_PWMC_GetStatus(pPWM) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWM_CfgChannel
+//* \brief Test if PWM Interrupt is Set
+//*----------------------------------------------------------------------------
+__inline void AT91F_PWMC_CfgChannel(
+        AT91PS_PWMC pPWM,   // \arg  pointer to a PWM controller
+        unsigned int channelId, // \arg PWM channel ID
+        unsigned int mode, // \arg  PWM mode
+        unsigned int period, // \arg PWM period
+        unsigned int duty) // \arg PWM duty cycle
+{
+	pPWM->PWMC_CH[channelId].PWMC_CMR = mode;
+	pPWM->PWMC_CH[channelId].PWMC_CDTYR = duty;
+	pPWM->PWMC_CH[channelId].PWMC_CPRDR = period;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWM_StartChannel
+//* \brief Enable channel
+//*----------------------------------------------------------------------------
+__inline void AT91F_PWMC_StartChannel(
+        AT91PS_PWMC pPWM,   // \arg  pointer to a PWM controller
+        unsigned int flag) // \arg  Channels IDs to be enabled
+{
+	pPWM->PWMC_ENA = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWM_StopChannel
+//* \brief Disable channel
+//*----------------------------------------------------------------------------
+__inline void AT91F_PWMC_StopChannel(
+        AT91PS_PWMC pPWM,   // \arg  pointer to a PWM controller
+        unsigned int flag) // \arg  Channels IDs to be enabled
+{
+	pPWM->PWMC_DIS = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWM_UpdateChannel
+//* \brief Update Period or Duty Cycle
+//*----------------------------------------------------------------------------
+__inline void AT91F_PWMC_UpdateChannel(
+        AT91PS_PWMC pPWM,   // \arg  pointer to a PWM controller
+        unsigned int channelId, // \arg PWM channel ID
+        unsigned int update) // \arg  Channels IDs to be enabled
+{
+	pPWM->PWMC_CH[channelId].PWMC_CUPDR = update;
+}
+
+/* *****************************************************************************
+                SOFTWARE API FOR UDP
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_EnableIt
+//* \brief Enable UDP IT
+//*----------------------------------------------------------------------------
+__inline void AT91F_UDP_EnableIt (
+	AT91PS_UDP pUDP,     // \arg pointer to a UDP controller
+	unsigned int flag)   // \arg IT to be enabled
+{
+	//* Write to the IER register
+	pUDP->UDP_IER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_DisableIt
+//* \brief Disable UDP IT
+//*----------------------------------------------------------------------------
+__inline void AT91F_UDP_DisableIt (
+	AT91PS_UDP pUDP,     // \arg pointer to a UDP controller
+	unsigned int flag)   // \arg IT to be disabled
+{
+	//* Write to the IDR register
+	pUDP->UDP_IDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_SetAddress
+//* \brief Set UDP functional address
+//*----------------------------------------------------------------------------
+__inline void AT91F_UDP_SetAddress (
+	AT91PS_UDP pUDP,     // \arg pointer to a UDP controller
+	unsigned char address)   // \arg new UDP address
+{
+	pUDP->UDP_FADDR = (AT91C_UDP_FEN | address);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_EnableEp
+//* \brief Enable Endpoint
+//*----------------------------------------------------------------------------
+__inline void AT91F_UDP_EnableEp (
+	AT91PS_UDP pUDP,     // \arg pointer to a UDP controller
+	unsigned char endpoint)   // \arg endpoint number
+{
+	pUDP->UDP_CSR[endpoint] |= AT91C_UDP_EPEDS;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_DisableEp
+//* \brief Enable Endpoint
+//*----------------------------------------------------------------------------
+__inline void AT91F_UDP_DisableEp (
+	AT91PS_UDP pUDP,     // \arg pointer to a UDP controller
+	unsigned char endpoint)   // \arg endpoint number
+{
+	pUDP->UDP_CSR[endpoint] &= ~AT91C_UDP_EPEDS;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_SetState
+//* \brief Set UDP Device state
+//*----------------------------------------------------------------------------
+__inline void AT91F_UDP_SetState (
+	AT91PS_UDP pUDP,     // \arg pointer to a UDP controller
+	unsigned int flag)   // \arg new UDP address
+{
+	pUDP->UDP_GLBSTATE  &= ~(AT91C_UDP_FADDEN | AT91C_UDP_CONFG);
+	pUDP->UDP_GLBSTATE  |= flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_GetState
+//* \brief return UDP Device state
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_UDP_GetState ( // \return the UDP device state
+	AT91PS_UDP pUDP)     // \arg pointer to a UDP controller
+{
+	return (pUDP->UDP_GLBSTATE  & (AT91C_UDP_FADDEN | AT91C_UDP_CONFG));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_ResetEp
+//* \brief Reset UDP endpoint
+//*----------------------------------------------------------------------------
+__inline void AT91F_UDP_ResetEp ( // \return the UDP device state
+	AT91PS_UDP pUDP,     // \arg pointer to a UDP controller
+	unsigned int flag)   // \arg Endpoints to be reset
+{
+	pUDP->UDP_RSTEP = flag;
+	pUDP->UDP_RSTEP = 0;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_EpStall
+//* \brief Endpoint will STALL requests
+//*----------------------------------------------------------------------------
+__inline void AT91F_UDP_EpStall(
+	AT91PS_UDP pUDP,     // \arg pointer to a UDP controller
+	unsigned char endpoint)   // \arg endpoint number
+{
+	pUDP->UDP_CSR[endpoint] |= AT91C_UDP_FORCESTALL;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_EpWrite
+//* \brief Write value in the DPR
+//*----------------------------------------------------------------------------
+__inline void AT91F_UDP_EpWrite(
+	AT91PS_UDP pUDP,         // \arg pointer to a UDP controller
+	unsigned char endpoint,  // \arg endpoint number
+	unsigned char value)     // \arg value to be written in the DPR
+{
+	pUDP->UDP_FDR[endpoint] = value;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_EpRead
+//* \brief Return value from the DPR
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_UDP_EpRead(
+	AT91PS_UDP pUDP,         // \arg pointer to a UDP controller
+	unsigned char endpoint)  // \arg endpoint number
+{
+	return pUDP->UDP_FDR[endpoint];
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_EpEndOfWr
+//* \brief Notify the UDP that values in DPR are ready to be sent
+//*----------------------------------------------------------------------------
+__inline void AT91F_UDP_EpEndOfWr(
+	AT91PS_UDP pUDP,         // \arg pointer to a UDP controller
+	unsigned char endpoint)  // \arg endpoint number
+{
+	pUDP->UDP_CSR[endpoint] |= AT91C_UDP_TXPKTRDY;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_EpClear
+//* \brief Clear flag in the endpoint CSR register
+//*----------------------------------------------------------------------------
+__inline void AT91F_UDP_EpClear(
+	AT91PS_UDP pUDP,         // \arg pointer to a UDP controller
+	unsigned char endpoint,  // \arg endpoint number
+	unsigned int flag)       // \arg flag to be cleared
+{
+	pUDP->UDP_CSR[endpoint] &= ~(flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_EpSet
+//* \brief Set flag in the endpoint CSR register
+//*----------------------------------------------------------------------------
+__inline void AT91F_UDP_EpSet(
+	AT91PS_UDP pUDP,         // \arg pointer to a UDP controller
+	unsigned char endpoint,  // \arg endpoint number
+	unsigned int flag)       // \arg flag to be cleared
+{
+	pUDP->UDP_CSR[endpoint] |= flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_EpStatus
+//* \brief Return the endpoint CSR register
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_UDP_EpStatus(
+	AT91PS_UDP pUDP,         // \arg pointer to a UDP controller
+	unsigned char endpoint)  // \arg endpoint number
+{
+	return pUDP->UDP_CSR[endpoint];
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_GetInterruptMaskStatus
+//* \brief Return UDP Interrupt Mask Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_UDP_GetInterruptMaskStatus(
+  AT91PS_UDP pUdp)        // \arg  pointer to a UDP controller
+{
+  return pUdp->UDP_IMR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_IsInterruptMasked
+//* \brief Test if UDP Interrupt is Masked 
+//*----------------------------------------------------------------------------
+__inline int AT91F_UDP_IsInterruptMasked(
+  AT91PS_UDP pUdp,       // \arg  pointer to a UDP controller
+  unsigned int flag)     // \arg  flag to be tested
+{
+  return (AT91F_UDP_GetInterruptMaskStatus(pUdp) & flag);
+}
+
+// ----------------------------------------------------------------------------
+//  \fn    AT91F_UDP_InterruptStatusRegister
+//  \brief Return the Interrupt Status Register
+// ----------------------------------------------------------------------------
+__inline unsigned int AT91F_UDP_InterruptStatusRegister( 
+  AT91PS_UDP pUDP )      // \arg  pointer to a UDP controller
+{
+  return pUDP->UDP_ISR;
+}
+
+// ----------------------------------------------------------------------------
+//  \fn    AT91F_UDP_InterruptClearRegister
+//  \brief Clear Interrupt Register
+// ----------------------------------------------------------------------------
+__inline void AT91F_UDP_InterruptClearRegister (
+  AT91PS_UDP pUDP,       // \arg pointer to UDP controller
+  unsigned int flag)     // \arg IT to be cleat
+{
+  pUDP->UDP_ICR = flag; 
+}
+
+// ----------------------------------------------------------------------------
+//  \fn    AT91F_UDP_EnableTransceiver
+//  \brief Enable transceiver
+// ----------------------------------------------------------------------------
+__inline void AT91F_UDP_EnableTransceiver( 
+  AT91PS_UDP pUDP )      // \arg  pointer to a UDP controller
+{
+    pUDP->UDP_TXVC &= ~AT91C_UDP_TXVDIS; 
+}
+
+// ----------------------------------------------------------------------------
+//  \fn    AT91F_UDP_DisableTransceiver
+//  \brief Disable transceiver
+// ----------------------------------------------------------------------------
+__inline void AT91F_UDP_DisableTransceiver( 
+  AT91PS_UDP pUDP )      // \arg  pointer to a UDP controller
+{
+    pUDP->UDP_TXVC = AT91C_UDP_TXVDIS; 
+}
+
+/* *****************************************************************************
+                SOFTWARE API FOR TC
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TC_InterruptEnable
+//* \brief Enable TC Interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_TC_InterruptEnable(
+        AT91PS_TC pTc,   // \arg  pointer to a TC controller
+        unsigned int flag) // \arg  TC interrupt to be enabled
+{
+        pTc->TC_IER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TC_InterruptDisable
+//* \brief Disable TC Interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_TC_InterruptDisable(
+        AT91PS_TC pTc,   // \arg  pointer to a TC controller
+        unsigned int flag) // \arg  TC interrupt to be disabled
+{
+        pTc->TC_IDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TC_GetInterruptMaskStatus
+//* \brief Return TC Interrupt Mask Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_TC_GetInterruptMaskStatus( // \return TC Interrupt Mask Status
+        AT91PS_TC pTc) // \arg  pointer to a TC controller
+{
+        return pTc->TC_IMR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TC_IsInterruptMasked
+//* \brief Test if TC Interrupt is Masked 
+//*----------------------------------------------------------------------------
+__inline int AT91F_TC_IsInterruptMasked(
+        AT91PS_TC pTc,   // \arg  pointer to a TC controller
+        unsigned int flag) // \arg  flag to be tested
+{
+        return (AT91F_TC_GetInterruptMaskStatus(pTc) & flag);
+}
+
+/* *****************************************************************************
+                SOFTWARE API FOR CAN
+   ***************************************************************************** */
+#define	STANDARD_FORMAT 0
+#define	EXTENDED_FORMAT 1
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_InitMailboxRegisters()
+//* \brief Configure the corresponding mailbox
+//*----------------------------------------------------------------------------
+__inline void AT91F_InitMailboxRegisters(AT91PS_CAN_MB	CAN_Mailbox,
+								int  			mode_reg,
+								int 			acceptance_mask_reg,
+								int  			id_reg,
+								int  			data_low_reg,
+								int  			data_high_reg,
+								int  			control_reg)
+{
+	CAN_Mailbox->CAN_MB_MCR 	= 0x0;
+	CAN_Mailbox->CAN_MB_MMR 	= mode_reg;
+	CAN_Mailbox->CAN_MB_MAM 	= acceptance_mask_reg;
+	CAN_Mailbox->CAN_MB_MID 	= id_reg;
+	CAN_Mailbox->CAN_MB_MDL 	= data_low_reg; 		
+	CAN_Mailbox->CAN_MB_MDH 	= data_high_reg;
+	CAN_Mailbox->CAN_MB_MCR 	= control_reg;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_EnableCAN()
+//* \brief 
+//*----------------------------------------------------------------------------
+__inline void AT91F_EnableCAN(
+	AT91PS_CAN pCAN)     // pointer to a CAN controller
+{
+	pCAN->CAN_MR |= AT91C_CAN_CANEN;
+
+	// Wait for WAKEUP flag raising <=> 11-recessive-bit were scanned by the transceiver
+	while( (pCAN->CAN_SR & AT91C_CAN_WAKEUP) != AT91C_CAN_WAKEUP );
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_DisableCAN()
+//* \brief 
+//*----------------------------------------------------------------------------
+__inline void AT91F_DisableCAN(
+	AT91PS_CAN pCAN)     // pointer to a CAN controller
+{
+	pCAN->CAN_MR &= ~AT91C_CAN_CANEN;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_EnableIt
+//* \brief Enable CAN interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_CAN_EnableIt (
+	AT91PS_CAN pCAN,     // pointer to a CAN controller
+	unsigned int flag)   // IT to be enabled
+{
+	//* Write to the IER register
+	pCAN->CAN_IER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_DisableIt
+//* \brief Disable CAN interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_CAN_DisableIt (
+	AT91PS_CAN pCAN, // pointer to a CAN controller
+	unsigned int flag) // IT to be disabled
+{
+	//* Write to the IDR register
+	pCAN->CAN_IDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_GetStatus
+//* \brief Return CAN Interrupt Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_GetStatus( // \return CAN Interrupt Status
+	AT91PS_CAN pCAN) // pointer to a CAN controller
+{
+	return pCAN->CAN_SR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_GetInterruptMaskStatus
+//* \brief Return CAN Interrupt Mask Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_GetInterruptMaskStatus( // \return CAN Interrupt Mask Status
+	AT91PS_CAN pCAN) // pointer to a CAN controller
+{
+	return pCAN->CAN_IMR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_IsInterruptMasked
+//* \brief Test if CAN Interrupt is Masked 
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_IsInterruptMasked(
+        AT91PS_CAN pCAN,   // \arg  pointer to a CAN controller
+        unsigned int flag) // \arg  flag to be tested
+{
+	return (AT91F_CAN_GetInterruptMaskStatus(pCAN) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_IsStatusSet
+//* \brief Test if CAN Interrupt is Set
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_IsStatusSet(
+        AT91PS_CAN pCAN,   // \arg  pointer to a CAN controller
+        unsigned int flag) // \arg  flag to be tested
+{
+	return (AT91F_CAN_GetStatus(pCAN) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_CfgModeReg
+//* \brief Configure the Mode Register of the CAN controller
+//*----------------------------------------------------------------------------
+__inline void AT91F_CAN_CfgModeReg (
+	AT91PS_CAN pCAN, // pointer to a CAN controller
+	unsigned int mode)        // mode register 
+{
+	//* Write to the MR register
+	pCAN->CAN_MR = mode;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_GetModeReg
+//* \brief Return the Mode Register of the CAN controller value
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_GetModeReg (
+	AT91PS_CAN pCAN // pointer to a CAN controller
+	)
+{
+	return pCAN->CAN_MR;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_CfgBaudrateReg
+//* \brief Configure the Baudrate of the CAN controller for the network
+//*----------------------------------------------------------------------------
+__inline void AT91F_CAN_CfgBaudrateReg (
+	AT91PS_CAN pCAN, // pointer to a CAN controller
+	unsigned int baudrate_cfg)
+{
+	//* Write to the BR register
+	pCAN->CAN_BR = baudrate_cfg;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_GetBaudrate
+//* \brief Return the Baudrate of the CAN controller for the network value
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_GetBaudrate (
+	AT91PS_CAN pCAN // pointer to a CAN controller
+	)
+{
+	return pCAN->CAN_BR;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_GetInternalCounter
+//* \brief Return CAN Timer Regsiter Value
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_GetInternalCounter (
+	AT91PS_CAN pCAN // pointer to a CAN controller
+	)
+{
+	return pCAN->CAN_TIM;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_GetTimestamp
+//* \brief Return CAN Timestamp Register Value
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_GetTimestamp (
+	AT91PS_CAN pCAN // pointer to a CAN controller
+	)
+{
+	return pCAN->CAN_TIMESTP;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_GetErrorCounter
+//* \brief Return CAN Error Counter Register Value
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_GetErrorCounter (
+	AT91PS_CAN pCAN // pointer to a CAN controller
+	)
+{
+	return pCAN->CAN_ECR;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_InitTransferRequest
+//* \brief Request for a transfer on the corresponding mailboxes
+//*----------------------------------------------------------------------------
+__inline void AT91F_CAN_InitTransferRequest (
+	AT91PS_CAN pCAN, // pointer to a CAN controller
+    unsigned int transfer_cmd)
+{
+	pCAN->CAN_TCR = transfer_cmd;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_InitAbortRequest
+//* \brief Abort the corresponding mailboxes
+//*----------------------------------------------------------------------------
+__inline void AT91F_CAN_InitAbortRequest (
+	AT91PS_CAN pCAN, // pointer to a CAN controller
+    unsigned int abort_cmd)
+{
+	pCAN->CAN_ACR = abort_cmd;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_CfgMessageModeReg
+//* \brief Program the Message Mode Register
+//*----------------------------------------------------------------------------
+__inline void AT91F_CAN_CfgMessageModeReg (
+	AT91PS_CAN_MB	CAN_Mailbox, // pointer to a CAN Mailbox
+    unsigned int mode)
+{
+	CAN_Mailbox->CAN_MB_MMR = mode;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_GetMessageModeReg
+//* \brief Return the Message Mode Register
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_GetMessageModeReg (
+	AT91PS_CAN_MB	CAN_Mailbox) // pointer to a CAN Mailbox
+{
+	return CAN_Mailbox->CAN_MB_MMR;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_CfgMessageIDReg
+//* \brief Program the Message ID Register
+//* \brief Version == 0 for Standard messsage, Version == 1 for Extended  
+//*----------------------------------------------------------------------------
+__inline void AT91F_CAN_CfgMessageIDReg (
+	AT91PS_CAN_MB	CAN_Mailbox, // pointer to a CAN Mailbox
+    unsigned int id,
+    unsigned char version)
+{
+	if(version==0)	// IDvA Standard Format
+		CAN_Mailbox->CAN_MB_MID = id<<18;
+	else	// IDvB Extended Format
+		CAN_Mailbox->CAN_MB_MID = id | (1<<29);	// set MIDE bit
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_GetMessageIDReg
+//* \brief Return the Message ID Register
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_GetMessageIDReg (
+	AT91PS_CAN_MB	CAN_Mailbox) // pointer to a CAN Mailbox
+{
+	return CAN_Mailbox->CAN_MB_MID;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_CfgMessageAcceptanceMaskReg
+//* \brief Program the Message Acceptance Mask Register
+//*----------------------------------------------------------------------------
+__inline void AT91F_CAN_CfgMessageAcceptanceMaskReg (
+	AT91PS_CAN_MB	CAN_Mailbox, // pointer to a CAN Mailbox
+    unsigned int mask)
+{
+	CAN_Mailbox->CAN_MB_MAM = mask;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_GetMessageAcceptanceMaskReg
+//* \brief Return the Message Acceptance Mask Register
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_GetMessageAcceptanceMaskReg (
+	AT91PS_CAN_MB	CAN_Mailbox) // pointer to a CAN Mailbox
+{
+	return CAN_Mailbox->CAN_MB_MAM;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_GetFamilyID
+//* \brief Return the Message ID Register
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_GetFamilyID (
+	AT91PS_CAN_MB	CAN_Mailbox) // pointer to a CAN Mailbox
+{
+	return CAN_Mailbox->CAN_MB_MFID;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_CfgMessageCtrl
+//* \brief Request and config for a transfer on the corresponding mailbox
+//*----------------------------------------------------------------------------
+__inline void AT91F_CAN_CfgMessageCtrlReg (
+	AT91PS_CAN_MB	CAN_Mailbox, // pointer to a CAN Mailbox
+    unsigned int message_ctrl_cmd)
+{
+	CAN_Mailbox->CAN_MB_MCR = message_ctrl_cmd;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_GetMessageStatus
+//* \brief Return CAN Mailbox Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_GetMessageStatus (
+	AT91PS_CAN_MB	CAN_Mailbox) // pointer to a CAN Mailbox
+{
+	return CAN_Mailbox->CAN_MB_MSR;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_CfgMessageDataLow
+//* \brief Program data low value
+//*----------------------------------------------------------------------------
+__inline void AT91F_CAN_CfgMessageDataLow (
+	AT91PS_CAN_MB	CAN_Mailbox, // pointer to a CAN Mailbox
+    unsigned int data)
+{
+	CAN_Mailbox->CAN_MB_MDL = data;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_GetMessageDataLow
+//* \brief Return data low value
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_GetMessageDataLow (
+	AT91PS_CAN_MB	CAN_Mailbox) // pointer to a CAN Mailbox
+{
+	return CAN_Mailbox->CAN_MB_MDL;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_CfgMessageDataHigh
+//* \brief Program data high value
+//*----------------------------------------------------------------------------
+__inline void AT91F_CAN_CfgMessageDataHigh (
+	AT91PS_CAN_MB	CAN_Mailbox, // pointer to a CAN Mailbox
+    unsigned int data)
+{
+	CAN_Mailbox->CAN_MB_MDH = data;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_GetMessageDataHigh
+//* \brief Return data high value
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_CAN_GetMessageDataHigh (
+	AT91PS_CAN_MB	CAN_Mailbox) // pointer to a CAN Mailbox
+{
+	return CAN_Mailbox->CAN_MB_MDH;	
+}
+
+/* *****************************************************************************
+                SOFTWARE API FOR ADC
+   ***************************************************************************** */
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_EnableIt
+//* \brief Enable ADC interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_ADC_EnableIt (
+	AT91PS_ADC pADC,     // pointer to a ADC controller
+	unsigned int flag)   // IT to be enabled
+{
+	//* Write to the IER register
+	pADC->ADC_IER = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_DisableIt
+//* \brief Disable ADC interrupt
+//*----------------------------------------------------------------------------
+__inline void AT91F_ADC_DisableIt (
+	AT91PS_ADC pADC, // pointer to a ADC controller
+	unsigned int flag) // IT to be disabled
+{
+	//* Write to the IDR register
+	pADC->ADC_IDR = flag;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_GetStatus
+//* \brief Return ADC Interrupt Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_GetStatus( // \return ADC Interrupt Status
+	AT91PS_ADC pADC) // pointer to a ADC controller
+{
+	return pADC->ADC_SR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_GetInterruptMaskStatus
+//* \brief Return ADC Interrupt Mask Status
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_GetInterruptMaskStatus( // \return ADC Interrupt Mask Status
+	AT91PS_ADC pADC) // pointer to a ADC controller
+{
+	return pADC->ADC_IMR;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_IsInterruptMasked
+//* \brief Test if ADC Interrupt is Masked 
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_IsInterruptMasked(
+        AT91PS_ADC pADC,   // \arg  pointer to a ADC controller
+        unsigned int flag) // \arg  flag to be tested
+{
+	return (AT91F_ADC_GetInterruptMaskStatus(pADC) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_IsStatusSet
+//* \brief Test if ADC Status is Set
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_IsStatusSet(
+        AT91PS_ADC pADC,   // \arg  pointer to a ADC controller
+        unsigned int flag) // \arg  flag to be tested
+{
+	return (AT91F_ADC_GetStatus(pADC) & flag);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_CfgModeReg
+//* \brief Configure the Mode Register of the ADC controller
+//*----------------------------------------------------------------------------
+__inline void AT91F_ADC_CfgModeReg (
+	AT91PS_ADC pADC, // pointer to a ADC controller
+	unsigned int mode)        // mode register 
+{
+	//* Write to the MR register
+	pADC->ADC_MR = mode;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_GetModeReg
+//* \brief Return the Mode Register of the ADC controller value
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_GetModeReg (
+	AT91PS_ADC pADC // pointer to a ADC controller
+	)
+{
+	return pADC->ADC_MR;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_CfgTimings
+//* \brief Configure the different necessary timings of the ADC controller
+//*----------------------------------------------------------------------------
+__inline void AT91F_ADC_CfgTimings (
+	AT91PS_ADC pADC, // pointer to a ADC controller
+	unsigned int mck_clock, // in MHz 
+	unsigned int adc_clock, // in MHz 
+	unsigned int startup_time, // in us 
+	unsigned int sample_and_hold_time)	// in ns  
+{
+	unsigned int prescal,startup,shtim;
+	
+	prescal = mck_clock/(2*adc_clock) - 1;
+	startup = adc_clock*startup_time/8 - 1;
+	shtim = adc_clock*sample_and_hold_time/1000 - 1;
+	
+	//* Write to the MR register
+	pADC->ADC_MR = ( (prescal<<8) & AT91C_ADC_PRESCAL) | ( (startup<<16) & AT91C_ADC_STARTUP) | ( (shtim<<24) & AT91C_ADC_SHTIM);
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_EnableChannel
+//* \brief Return ADC Timer Register Value
+//*----------------------------------------------------------------------------
+__inline void AT91F_ADC_EnableChannel (
+	AT91PS_ADC pADC, // pointer to a ADC controller
+	unsigned int channel)        // mode register 
+{
+	//* Write to the CHER register
+	pADC->ADC_CHER = channel;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_DisableChannel
+//* \brief Return ADC Timer Register Value
+//*----------------------------------------------------------------------------
+__inline void AT91F_ADC_DisableChannel (
+	AT91PS_ADC pADC, // pointer to a ADC controller
+	unsigned int channel)        // mode register 
+{
+	//* Write to the CHDR register
+	pADC->ADC_CHDR = channel;
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_GetChannelStatus
+//* \brief Return ADC Timer Register Value
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_GetChannelStatus (
+	AT91PS_ADC pADC // pointer to a ADC controller
+	)
+{
+	return pADC->ADC_CHSR;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_StartConversion
+//* \brief Software request for a analog to digital conversion 
+//*----------------------------------------------------------------------------
+__inline void AT91F_ADC_StartConversion (
+	AT91PS_ADC pADC // pointer to a ADC controller
+	)
+{
+	pADC->ADC_CR = AT91C_ADC_START;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_SoftReset
+//* \brief Software reset
+//*----------------------------------------------------------------------------
+__inline void AT91F_ADC_SoftReset (
+	AT91PS_ADC pADC // pointer to a ADC controller
+	)
+{
+	pADC->ADC_CR = AT91C_ADC_SWRST;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_GetLastConvertedData
+//* \brief Return the Last Converted Data
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_GetLastConvertedData (
+	AT91PS_ADC pADC // pointer to a ADC controller
+	)
+{
+	return pADC->ADC_LCDR;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_GetConvertedDataCH0
+//* \brief Return the Channel 0 Converted Data
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_GetConvertedDataCH0 (
+	AT91PS_ADC pADC // pointer to a ADC controller
+	)
+{
+	return pADC->ADC_CDR0;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_GetConvertedDataCH1
+//* \brief Return the Channel 1 Converted Data
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_GetConvertedDataCH1 (
+	AT91PS_ADC pADC // pointer to a ADC controller
+	)
+{
+	return pADC->ADC_CDR1;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_GetConvertedDataCH2
+//* \brief Return the Channel 2 Converted Data
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_GetConvertedDataCH2 (
+	AT91PS_ADC pADC // pointer to a ADC controller
+	)
+{
+	return pADC->ADC_CDR2;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_GetConvertedDataCH3
+//* \brief Return the Channel 3 Converted Data
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_GetConvertedDataCH3 (
+	AT91PS_ADC pADC // pointer to a ADC controller
+	)
+{
+	return pADC->ADC_CDR3;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_GetConvertedDataCH4
+//* \brief Return the Channel 4 Converted Data
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_GetConvertedDataCH4 (
+	AT91PS_ADC pADC // pointer to a ADC controller
+	)
+{
+	return pADC->ADC_CDR4;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_GetConvertedDataCH5
+//* \brief Return the Channel 5 Converted Data
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_GetConvertedDataCH5 (
+	AT91PS_ADC pADC // pointer to a ADC controller
+	)
+{
+	return pADC->ADC_CDR5;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_GetConvertedDataCH6
+//* \brief Return the Channel 6 Converted Data
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_GetConvertedDataCH6 (
+	AT91PS_ADC pADC // pointer to a ADC controller
+	)
+{
+	return pADC->ADC_CDR6;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_GetConvertedDataCH7
+//* \brief Return the Channel 7 Converted Data
+//*----------------------------------------------------------------------------
+__inline unsigned int AT91F_ADC_GetConvertedDataCH7 (
+	AT91PS_ADC pADC // pointer to a ADC controller
+	)
+{
+	return pADC->ADC_CDR7;	
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_MC_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  MC
+//*----------------------------------------------------------------------------
+__inline void AT91F_MC_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_SYS));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_DBGU_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  DBGU
+//*----------------------------------------------------------------------------
+__inline void AT91F_DBGU_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_SYS));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_DBGU_CfgPIO
+//* \brief Configure PIO controllers to drive DBGU signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_DBGU_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOA, // PIO controller base address
+		((unsigned int) AT91C_PA28_DTXD    ) |
+		((unsigned int) AT91C_PA27_DRXD    ), // Peripheral A
+		0); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWMC_CH3_CfgPIO
+//* \brief Configure PIO controllers to drive PWMC_CH3 signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_PWMC_CH3_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOB, // PIO controller base address
+		((unsigned int) AT91C_PB22_PWM3    ), // Peripheral A
+		((unsigned int) AT91C_PB30_PWM3    )); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWMC_CH2_CfgPIO
+//* \brief Configure PIO controllers to drive PWMC_CH2 signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_PWMC_CH2_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOB, // PIO controller base address
+		((unsigned int) AT91C_PB21_PWM2    ), // Peripheral A
+		((unsigned int) AT91C_PB29_PWM2    )); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWMC_CH1_CfgPIO
+//* \brief Configure PIO controllers to drive PWMC_CH1 signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_PWMC_CH1_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOB, // PIO controller base address
+		((unsigned int) AT91C_PB20_PWM1    ), // Peripheral A
+		((unsigned int) AT91C_PB28_PWM1    )); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWMC_CH0_CfgPIO
+//* \brief Configure PIO controllers to drive PWMC_CH0 signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_PWMC_CH0_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOB, // PIO controller base address
+		((unsigned int) AT91C_PB19_PWM0    ), // Peripheral A
+		((unsigned int) AT91C_PB27_PWM0    )); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_EMAC_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  EMAC
+//*----------------------------------------------------------------------------
+__inline void AT91F_EMAC_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_EMAC));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_EMAC_CfgPIO
+//* \brief Configure PIO controllers to drive EMAC signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_EMAC_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOB, // PIO controller base address
+		((unsigned int) AT91C_PB9_EMDIO   ) |
+		((unsigned int) AT91C_PB17_ERXCK   ) |
+		((unsigned int) AT91C_PB15_ERXDV_ECRSDV) |
+		((unsigned int) AT91C_PB8_EMDC    ) |
+		((unsigned int) AT91C_PB16_ECOL    ) |
+		((unsigned int) AT91C_PB7_ERXER   ) |
+		((unsigned int) AT91C_PB5_ERX0    ) |
+		((unsigned int) AT91C_PB6_ERX1    ) |
+		((unsigned int) AT91C_PB13_ERX2    ) |
+		((unsigned int) AT91C_PB1_ETXEN   ) |
+		((unsigned int) AT91C_PB14_ERX3    ) |
+		((unsigned int) AT91C_PB12_ETXER   ) |
+		((unsigned int) AT91C_PB2_ETX0    ) |
+		((unsigned int) AT91C_PB3_ETX1    ) |
+		((unsigned int) AT91C_PB10_ETX2    ) |
+		((unsigned int) AT91C_PB18_EF100   ) |
+		((unsigned int) AT91C_PB11_ETX3    ) |
+		((unsigned int) AT91C_PB4_ECRS    ) |
+		((unsigned int) AT91C_PB0_ETXCK_EREFCK), // Peripheral A
+		0); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_VREG_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  VREG
+//*----------------------------------------------------------------------------
+__inline void AT91F_VREG_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_SYS));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SSC_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  SSC
+//*----------------------------------------------------------------------------
+__inline void AT91F_SSC_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_SSC));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SSC_CfgPIO
+//* \brief Configure PIO controllers to drive SSC signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_SSC_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOA, // PIO controller base address
+		((unsigned int) AT91C_PA23_TD      ) |
+		((unsigned int) AT91C_PA21_TF      ) |
+		((unsigned int) AT91C_PA25_RK      ) |
+		((unsigned int) AT91C_PA24_RD      ) |
+		((unsigned int) AT91C_PA26_RF      ) |
+		((unsigned int) AT91C_PA22_TK      ), // Peripheral A
+		0); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI1_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  SPI1
+//*----------------------------------------------------------------------------
+__inline void AT91F_SPI1_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_SPI1));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI1_CfgPIO
+//* \brief Configure PIO controllers to drive SPI1 signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_SPI1_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOA, // PIO controller base address
+		0, // Peripheral A
+		((unsigned int) AT91C_PA23_SPI1_MOSI) |
+		((unsigned int) AT91C_PA21_SPI1_NPCS0) |
+		((unsigned int) AT91C_PA25_SPI1_NPCS1) |
+		((unsigned int) AT91C_PA2_SPI1_NPCS1) |
+		((unsigned int) AT91C_PA24_SPI1_MISO) |
+		((unsigned int) AT91C_PA22_SPI1_SPCK) |
+		((unsigned int) AT91C_PA26_SPI1_NPCS2) |
+		((unsigned int) AT91C_PA3_SPI1_NPCS2) |
+		((unsigned int) AT91C_PA29_SPI1_NPCS3) |
+		((unsigned int) AT91C_PA4_SPI1_NPCS3)); // Peripheral B
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOB, // PIO controller base address
+		0, // Peripheral A
+		((unsigned int) AT91C_PB10_SPI1_NPCS1) |
+		((unsigned int) AT91C_PB11_SPI1_NPCS2) |
+		((unsigned int) AT91C_PB16_SPI1_NPCS3)); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI0_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  SPI0
+//*----------------------------------------------------------------------------
+__inline void AT91F_SPI0_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_SPI0));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_SPI0_CfgPIO
+//* \brief Configure PIO controllers to drive SPI0 signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_SPI0_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOA, // PIO controller base address
+		((unsigned int) AT91C_PA17_SPI0_MOSI) |
+		((unsigned int) AT91C_PA12_SPI0_NPCS0) |
+		((unsigned int) AT91C_PA13_SPI0_NPCS1) |
+		((unsigned int) AT91C_PA16_SPI0_MISO) |
+		((unsigned int) AT91C_PA14_SPI0_NPCS2) |
+		((unsigned int) AT91C_PA18_SPI0_SPCK) |
+		((unsigned int) AT91C_PA15_SPI0_NPCS3), // Peripheral A
+		((unsigned int) AT91C_PA7_SPI0_NPCS1) |
+		((unsigned int) AT91C_PA8_SPI0_NPCS2) |
+		((unsigned int) AT91C_PA9_SPI0_NPCS3)); // Peripheral B
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOB, // PIO controller base address
+		0, // Peripheral A
+		((unsigned int) AT91C_PB13_SPI0_NPCS1) |
+		((unsigned int) AT91C_PB14_SPI0_NPCS2) |
+		((unsigned int) AT91C_PB17_SPI0_NPCS3)); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PWMC_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  PWMC
+//*----------------------------------------------------------------------------
+__inline void AT91F_PWMC_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_PWMC));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TC0_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  TC0
+//*----------------------------------------------------------------------------
+__inline void AT91F_TC0_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_TC0));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TC0_CfgPIO
+//* \brief Configure PIO controllers to drive TC0 signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_TC0_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOB, // PIO controller base address
+		((unsigned int) AT91C_PB23_TIOA0   ) |
+		((unsigned int) AT91C_PB24_TIOB0   ), // Peripheral A
+		((unsigned int) AT91C_PB12_TCLK0   )); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TC1_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  TC1
+//*----------------------------------------------------------------------------
+__inline void AT91F_TC1_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_TC1));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TC1_CfgPIO
+//* \brief Configure PIO controllers to drive TC1 signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_TC1_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOB, // PIO controller base address
+		((unsigned int) AT91C_PB25_TIOA1   ) |
+		((unsigned int) AT91C_PB26_TIOB1   ), // Peripheral A
+		((unsigned int) AT91C_PB19_TCLK1   )); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TC2_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  TC2
+//*----------------------------------------------------------------------------
+__inline void AT91F_TC2_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_TC2));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TC2_CfgPIO
+//* \brief Configure PIO controllers to drive TC2 signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_TC2_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOA, // PIO controller base address
+		0, // Peripheral A
+		((unsigned int) AT91C_PA15_TCLK2   )); // Peripheral B
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOB, // PIO controller base address
+		((unsigned int) AT91C_PB27_TIOA2   ) |
+		((unsigned int) AT91C_PB28_TIOB2   ), // Peripheral A
+		0); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PITC_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  PITC
+//*----------------------------------------------------------------------------
+__inline void AT91F_PITC_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_SYS));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  ADC
+//*----------------------------------------------------------------------------
+__inline void AT91F_ADC_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_ADC));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_ADC_CfgPIO
+//* \brief Configure PIO controllers to drive ADC signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_ADC_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOB, // PIO controller base address
+		0, // Peripheral A
+		((unsigned int) AT91C_PB18_ADTRG   )); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  PMC
+//*----------------------------------------------------------------------------
+__inline void AT91F_PMC_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_SYS));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PMC_CfgPIO
+//* \brief Configure PIO controllers to drive PMC signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_PMC_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOA, // PIO controller base address
+		0, // Peripheral A
+		((unsigned int) AT91C_PA13_PCK1    ) |
+		((unsigned int) AT91C_PA30_PCK2    ) |
+		((unsigned int) AT91C_PA27_PCK3    )); // Peripheral B
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOB, // PIO controller base address
+		((unsigned int) AT91C_PB29_PCK1    ) |
+		((unsigned int) AT91C_PB30_PCK2    ), // Peripheral A
+		((unsigned int) AT91C_PB21_PCK1    ) |
+		((unsigned int) AT91C_PB22_PCK2    ) |
+		((unsigned int) AT91C_PB20_PCK0    ) |
+		((unsigned int) AT91C_PB0_PCK0    )); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_RSTC_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  RSTC
+//*----------------------------------------------------------------------------
+__inline void AT91F_RSTC_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_SYS));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_RTTC_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  RTTC
+//*----------------------------------------------------------------------------
+__inline void AT91F_RTTC_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_SYS));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIOA_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  PIOA
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIOA_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_PIOA));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_PIOB_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  PIOB
+//*----------------------------------------------------------------------------
+__inline void AT91F_PIOB_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_PIOB));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TWI_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  TWI
+//*----------------------------------------------------------------------------
+__inline void AT91F_TWI_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_TWI));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_TWI_CfgPIO
+//* \brief Configure PIO controllers to drive TWI signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_TWI_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOA, // PIO controller base address
+		((unsigned int) AT91C_PA10_TWD     ) |
+		((unsigned int) AT91C_PA11_TWCK    ), // Peripheral A
+		0); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_WDTC_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  WDTC
+//*----------------------------------------------------------------------------
+__inline void AT91F_WDTC_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_SYS));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US1_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  US1
+//*----------------------------------------------------------------------------
+__inline void AT91F_US1_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_US1));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US1_CfgPIO
+//* \brief Configure PIO controllers to drive US1 signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_US1_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOA, // PIO controller base address
+		((unsigned int) AT91C_PA5_RXD1    ) |
+		((unsigned int) AT91C_PA6_TXD1    ) |
+		((unsigned int) AT91C_PA8_RTS1    ) |
+		((unsigned int) AT91C_PA7_SCK1    ) |
+		((unsigned int) AT91C_PA9_CTS1    ), // Peripheral A
+		0); // Peripheral B
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOB, // PIO controller base address
+		0, // Peripheral A
+		((unsigned int) AT91C_PB25_DTR1    ) |
+		((unsigned int) AT91C_PB23_DCD1    ) |
+		((unsigned int) AT91C_PB24_DSR1    ) |
+		((unsigned int) AT91C_PB26_RI1     )); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US0_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  US0
+//*----------------------------------------------------------------------------
+__inline void AT91F_US0_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_US0));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_US0_CfgPIO
+//* \brief Configure PIO controllers to drive US0 signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_US0_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOA, // PIO controller base address
+		((unsigned int) AT91C_PA0_RXD0    ) |
+		((unsigned int) AT91C_PA1_TXD0    ) |
+		((unsigned int) AT91C_PA3_RTS0    ) |
+		((unsigned int) AT91C_PA2_SCK0    ) |
+		((unsigned int) AT91C_PA4_CTS0    ), // Peripheral A
+		0); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_UDP_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  UDP
+//*----------------------------------------------------------------------------
+__inline void AT91F_UDP_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_UDP));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_AIC_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  AIC
+//*----------------------------------------------------------------------------
+__inline void AT91F_AIC_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_IRQ0) |
+		((unsigned int) 1 << AT91C_ID_FIQ) |
+		((unsigned int) 1 << AT91C_ID_IRQ1));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_AIC_CfgPIO
+//* \brief Configure PIO controllers to drive AIC signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_AIC_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOA, // PIO controller base address
+		((unsigned int) AT91C_PA30_IRQ0    ) |
+		((unsigned int) AT91C_PA29_FIQ     ), // Peripheral A
+		((unsigned int) AT91C_PA14_IRQ1    )); // Peripheral B
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_CfgPMC
+//* \brief Enable Peripheral clock in PMC for  CAN
+//*----------------------------------------------------------------------------
+__inline void AT91F_CAN_CfgPMC (void)
+{
+	AT91F_PMC_EnablePeriphClock(
+		AT91C_BASE_PMC, // PIO controller base address
+		((unsigned int) 1 << AT91C_ID_CAN));
+}
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_CAN_CfgPIO
+//* \brief Configure PIO controllers to drive CAN signals
+//*----------------------------------------------------------------------------
+__inline void AT91F_CAN_CfgPIO (void)
+{
+	// Configure PIO controllers to periph mode
+	AT91F_PIO_CfgPeriph(
+		AT91C_BASE_PIOA, // PIO controller base address
+		((unsigned int) AT91C_PA20_CANTX   ) |
+		((unsigned int) AT91C_PA19_CANRX   ), // Peripheral A
+		0); // Peripheral B
+}
+
+#endif // lib_AT91SAM7X256_H
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/incIAR/project.h b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/incIAR/project.h
new file mode 100644
index 000000000..24fb698d3
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/incIAR/project.h
@@ -0,0 +1,30 @@
+//-----------------------------------------------------------------------------
+//           ATMEL Microcontroller Software Support  -  ROUSSET  -
+//-----------------------------------------------------------------------------
+// DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+// IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+// DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+// OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+// EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//-----------------------------------------------------------------------------
+//  File Name           : project.h
+//  Object              : project specific include file to AT91SAM7X256
+//  Creation            : JPP   14-Sep-2006
+//-----------------------------------------------------------------------------
+#ifndef _PROJECT_H
+#define _PROJECT_H
+
+/// Include your AT91 Library files and specific compiler definitions
+
+#include <intrinsics.h>
+#include "AT91SAM7X-EK.h"
+#include "AT91SAM7X256.h"
+#define __inline inline
+#include "lib_AT91SAM7X256.h"
+
+#endif  // _PROJECT_H
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/BasicInterrupt_SAM7X.cspy.bat b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/BasicInterrupt_SAM7X.cspy.bat
new file mode 100644
index 000000000..aa07e50c6
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/BasicInterrupt_SAM7X.cspy.bat
@@ -0,0 +1,33 @@
+@REM This bat file has been generated by the IAR Embeddded Workbench
+@REM C-SPY interactive debugger,as an aid to preparing a command
+@REM line for running the cspybat command line utility with the
+@REM appropriate settings.
+@REM
+@REM After making some adjustments to this file, you can launch cspybat
+@REM by typing the name of this file followed by the name of the debug
+@REM file (usually an ubrof file). Note that this file is generated
+@REM every time a new debug session is initialized, so you may want to
+@REM move or rename the file before making changes.
+@REM
+@REM Note: some command line arguments cannot be properly generated
+@REM by this process. Specifically, the plugin which is responsible
+@REM for the Terminal I/O window (and other C runtime functionality)
+@REM comes in a special version for cspybat, and the name of that
+@REM plugin dll is not known when generating this file. It resides in
+@REM the $TOOLKIT_DIR$\bin folder and is usually called XXXbat.dll or
+@REM XXXlibsupportbat.dll, where XXX is the name of the corresponding
+@REM tool chain. Replace the '<libsupport_plugin>' parameter
+@REM below with the appropriate file name. Other plugins loaded by
+@REM C-SPY are usually not needed by, or will not work in, cspybat
+@REM but they are listed at the end of this file for reference.
+
+
+"C:\Program Files\IAR Systems\Embedded Workbench 5.0 Kickstart\common\bin\cspybat" "C:\Program Files\IAR Systems\Embedded Workbench 5.0 Kickstart\ARM\bin\armproc.dll" "C:\Program Files\IAR Systems\Embedded Workbench 5.0 Kickstart\ARM\bin\armjlink.dll"  %1 --plugin "C:\Program Files\IAR Systems\Embedded Workbench 5.0 Kickstart\ARM\bin\<libsupport_plugin>" --macro "C:\Documents and Settings\Greg\Desktop\SAM7X256\AT91SAM7X-Interrupt_SAM7X\Compil\resource\SAM7_FLASH.mac" --backend -B "--endian=little" "--cpu=ARM7TDMI" "--fpu=None" "-p" "C:\Program Files\IAR Systems\Embedded Workbench 5.0 Kickstart\ARM\CONFIG\debugger\Atmel\ioAT91SAM7X256.ddf" "--drv_verify_download" "--semihosting" "--device=AT91SAM7X256" "-d" "jlink" "--drv_communication=USB0" "--jlink_speed=adaptive" 
+
+
+@REM Loaded plugins:
+@REM    C:\Program Files\IAR Systems\Embedded Workbench 5.0 Kickstart\ARM\bin\armlibsupport.dll
+@REM    C:\Program Files\IAR Systems\Embedded Workbench 5.0 Kickstart\common\plugins\CodeCoverage\CodeCoverage.dll
+@REM    C:\Program Files\IAR Systems\Embedded Workbench 5.0 Kickstart\common\plugins\Profiling\Profiling.dll
+@REM    C:\Program Files\IAR Systems\Embedded Workbench 5.0 Kickstart\common\plugins\stack\stack.dll
+@REM    C:\Program Files\IAR Systems\Embedded Workbench 5.0 Kickstart\common\plugins\SymList\SymList.dll
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/BasicInterrupt_SAM7X.dbgdt b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/BasicInterrupt_SAM7X.dbgdt
new file mode 100644
index 000000000..33f4649c2
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/BasicInterrupt_SAM7X.dbgdt
@@ -0,0 +1,5 @@
+<?xml version="1.0" encoding="iso-8859-1"?>

+

+<Project/>

+

+

diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/BasicInterrupt_SAM7X.dni b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/BasicInterrupt_SAM7X.dni
new file mode 100644
index 000000000..bc8e3f96d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/BasicInterrupt_SAM7X.dni
@@ -0,0 +1,18 @@
+[JLinkDriver]

+WatchCond=_ 0

+Watch0=_ 0 "" 0 "" 0 "" 0 "" 0 0 0 0

+Watch1=_ 0 "" 0 "" 0 "" 0 "" 0 0 0 0

+[TermIOLog]

+LoggingEnabled=_ 0

+LogFile=_ ""

+[Log file]

+LoggingEnabled=_ 0

+LogFile=_ ""

+Category=_ 0

+[Disassemble mode]

+mode=0

+[Breakpoints]

+Count=0

+[TraceHelper]

+Enabled=0

+ShowSource=1

diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/BasicInterrupt_SAM7X.wsdt b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/BasicInterrupt_SAM7X.wsdt
new file mode 100644
index 000000000..39488f056
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/BasicInterrupt_SAM7X.wsdt
@@ -0,0 +1,74 @@
+<?xml version="1.0" encoding="iso-8859-1"?>

+

+<Workspace>

+  <ConfigDictionary>

+    

+  <CurrentConfigs><Project>BasicInterrupt_SAM7X/FLASH_Debug</Project></CurrentConfigs></ConfigDictionary>

+  <Desktop>

+    <Static>

+      <Workspace>

+        <ColumnWidths>

+          

+          

+          

+          

+        <Column0>271</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>

+      </Workspace>

+      <Build>

+        <ColumnWidth0>20</ColumnWidth0>

+        <ColumnWidth1>995</ColumnWidth1>

+        <ColumnWidth2>265</ColumnWidth2>

+        <ColumnWidth3>66</ColumnWidth3>

+      </Build>

+      <TerminalIO/>

+      <Debug-Log/>

+    </Static>

+    <Windows>

+      

+      

+    <Wnd0>

+        <Tabs>

+          <Tab>

+            <Identity>TabID-26686-579</Identity>

+            <TabName>Workspace</TabName>

+            <Factory>Workspace</Factory>

+            <Session>

+              

+            <NodeDict><ExpandedNode>BasicInterrupt_SAM7X</ExpandedNode></NodeDict></Session>

+          </Tab>

+        </Tabs>

+        

+      <SelectedTab>0</SelectedTab></Wnd0><Wnd1>

+        <Tabs>

+          <Tab>

+            <Identity>TabID-13847-615</Identity>

+            <TabName>Build</TabName>

+            <Factory>Build</Factory>

+            <Session/>

+          </Tab>

+          <Tab>

+            <Identity>TabID-20936-687</Identity>

+            <TabName>Debug Log</TabName>

+            <Factory>Debug-Log</Factory>

+            <Session/>

+          </Tab>

+        </Tabs>

+        

+      <SelectedTab>1</SelectedTab></Wnd1></Windows>

+    <Editor>

+      

+      

+      

+      

+    <Pane/><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>

+    <Positions>

+      

+      

+      

+      

+      

+    <Top><Row0><Sizes><Toolbar-00aa8dd8><key>iaridepm.enu1</key></Toolbar-00aa8dd8></Sizes></Row0></Top><Left><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>612</Bottom><Right>345</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>144300</sizeHorzCX><sizeHorzCY>234192</sizeHorzCY><sizeVertCX>250361</sizeVertCX><sizeVertCY>718970</sizeVertCY></Rect></Wnd0></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>198</Bottom><Right>1388</Right><x>-2</x><y>-2</y><xscreen>1390</xscreen><yscreen>200</yscreen><sizeHorzCX>1002886</sizeHorzCX><sizeHorzCY>234192</sizeHorzCY><sizeVertCX>144300</sizeVertCX><sizeVertCY>234192</sizeVertCY></Rect></Wnd1></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>

+  </Desktop>

+</Workspace>

+

+

diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/BasicInterrupt_SAM7X_FLASH_Debug.jlink b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/BasicInterrupt_SAM7X_FLASH_Debug.jlink
new file mode 100644
index 000000000..ecbb0a811
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/BasicInterrupt_SAM7X_FLASH_Debug.jlink
@@ -0,0 +1,12 @@
+[FLASH]
+SkipProgOnCRCMatch = 1
+VerifyDownload = 1
+AllowCaching = 1
+EnableFlashDL = 2
+Override = 0
+Device="ADUC7020X62"
+[BREAKPOINTS]
+ShowInfoWin = 1
+EnableFlashBP = 2
+[CPU]
+AllowSimulation = 1
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/cmock_demo.cspy.bat b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/cmock_demo.cspy.bat
new file mode 100644
index 000000000..0e4d17756
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/cmock_demo.cspy.bat
@@ -0,0 +1,33 @@
+@REM This bat file has been generated by the IAR Embeddded Workbench
+@REM C-SPY interactive debugger,as an aid to preparing a command
+@REM line for running the cspybat command line utility with the
+@REM appropriate settings.
+@REM
+@REM After making some adjustments to this file, you can launch cspybat
+@REM by typing the name of this file followed by the name of the debug
+@REM file (usually an ubrof file). Note that this file is generated
+@REM every time a new debug session is initialized, so you may want to
+@REM move or rename the file before making changes.
+@REM
+@REM Note: some command line arguments cannot be properly generated
+@REM by this process. Specifically, the plugin which is responsible
+@REM for the Terminal I/O window (and other C runtime functionality)
+@REM comes in a special version for cspybat, and the name of that
+@REM plugin dll is not known when generating this file. It resides in
+@REM the $TOOLKIT_DIR$\bin folder and is usually called XXXbat.dll or
+@REM XXXlibsupportbat.dll, where XXX is the name of the corresponding
+@REM tool chain. Replace the '<libsupport_plugin>' parameter
+@REM below with the appropriate file name. Other plugins loaded by
+@REM C-SPY are usually not needed by, or will not work in, cspybat
+@REM but they are listed at the end of this file for reference.
+
+
+"C:\Program Files\IAR Systems\Embedded Workbench 5.0 Kickstart\common\bin\cspybat" "C:\Program Files\IAR Systems\Embedded Workbench 5.0 Kickstart\ARM\bin\armproc.dll" "C:\Program Files\IAR Systems\Embedded Workbench 5.0 Kickstart\ARM\bin\armjlink.dll"  %1 --plugin "C:\Program Files\IAR Systems\Embedded Workbench 5.0 Kickstart\ARM\bin\<libsupport_plugin>" --macro "C:\svn\cmock\iar\iar_v5\Resource\SAM7_RAM.mac" --backend -B "--endian=little" "--cpu=ARM7TDMI" "--fpu=None" "-p" "C:\Program Files\IAR Systems\Embedded Workbench 5.0 Kickstart\ARM\CONFIG\debugger\Atmel\ioAT91SAM7X256.ddf" "--drv_verify_download" "--semihosting" "--device=AT91SAM7X256" "-d" "jlink" "--drv_communication=USB0" "--jlink_speed=adaptive" 
+
+
+@REM Loaded plugins:
+@REM    C:\Program Files\IAR Systems\Embedded Workbench 5.0 Kickstart\ARM\bin\armlibsupport.dll
+@REM    C:\Program Files\IAR Systems\Embedded Workbench 5.0 Kickstart\common\plugins\CodeCoverage\CodeCoverage.dll
+@REM    C:\Program Files\IAR Systems\Embedded Workbench 5.0 Kickstart\common\plugins\Profiling\Profiling.dll
+@REM    C:\Program Files\IAR Systems\Embedded Workbench 5.0 Kickstart\common\plugins\stack\stack.dll
+@REM    C:\Program Files\IAR Systems\Embedded Workbench 5.0 Kickstart\common\plugins\SymList\SymList.dll
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/cmock_demo.dbgdt b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/cmock_demo.dbgdt
new file mode 100644
index 000000000..75a616f19
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/cmock_demo.dbgdt
@@ -0,0 +1,85 @@
+<?xml version="1.0" encoding="iso-8859-1"?>

+

+<Project>

+  <Desktop>

+    <Static>

+      <Debug-Log/>

+      <Build>

+        <ColumnWidth0>20</ColumnWidth0>

+        <ColumnWidth1>995</ColumnWidth1>

+        <ColumnWidth2>265</ColumnWidth2>

+        <ColumnWidth3>66</ColumnWidth3>

+      </Build>

+      <Workspace>

+        <ColumnWidths>

+          

+          

+          

+          

+        <Column0>124</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>

+      </Workspace>

+      <Disassembly>

+        

+        

+      <MixedMode>1</MixedMode><CodeCovShow>0</CodeCovShow></Disassembly>

+    </Static>

+    <Windows>

+      

+      

+      

+    <Wnd0>

+        <Tabs>

+          <Tab>

+            <Identity>TabID-27249-27051</Identity>

+            <TabName>Debug Log</TabName>

+            <Factory>Debug-Log</Factory>

+            <Session/>

+          </Tab>

+          <Tab>

+            <Identity>TabID-4707-27064</Identity>

+            <TabName>Build</TabName>

+            <Factory>Build</Factory>

+            <Session/>

+          </Tab>

+        </Tabs>

+        

+      <SelectedTab>0</SelectedTab></Wnd0><Wnd1>

+        <Tabs>

+          <Tab>

+            <Identity>TabID-5230-27054</Identity>

+            <TabName>Workspace</TabName>

+            <Factory>Workspace</Factory>

+            <Session>

+              

+            <NodeDict><ExpandedNode>cmock_demo</ExpandedNode></NodeDict></Session>

+          </Tab>

+        </Tabs>

+        

+      <SelectedTab>0</SelectedTab></Wnd1><Wnd2>

+        <Tabs>

+          <Tab>

+            <Identity>TabID-15978-27058</Identity>

+            <TabName>Disassembly</TabName>

+            <Factory>Disassembly</Factory>

+            <Session/>

+          </Tab>

+        </Tabs>

+        

+      <SelectedTab>0</SelectedTab></Wnd2></Windows>

+    <Editor>

+      

+      

+      

+      

+    <Pane><Tab><Factory>TextEditor</Factory><Filename>C:\svn\cmock\examples\src\Main.c</Filename><XPos>0</XPos><YPos>25</YPos><SelStart>835</SelStart><SelEnd>835</SelEnd></Tab><ActiveTab>0</ActiveTab><Tab><Factory>TextEditor</Factory><Filename>C:\svn\cmock\examples\src\TaskScheduler.c</Filename><XPos>0</XPos><YPos>43</YPos><SelStart>981</SelStart><SelEnd>981</SelEnd></Tab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>

+    <Positions>

+      

+      

+      

+      

+      

+    <Top><Row0><Sizes><Toolbar-00aa9190><key>iaridepm.enu1</key></Toolbar-00aa9190></Sizes></Row0><Row1><Sizes><Toolbar-021dff40><key>debuggergui.enu1</key></Toolbar-021dff40></Sizes></Row1></Top><Left><Row0><Sizes><Wnd1><Rect><Top>-2</Top><Left>-2</Left><Bottom>588</Bottom><Right>198</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>144300</sizeHorzCX><sizeHorzCY>234192</sizeHorzCY><sizeVertCX>144300</sizeVertCX><sizeVertCY>690867</sizeVertCY></Rect></Wnd1></Sizes></Row0></Left><Right><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>588</Bottom><Right>198</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>144300</sizeHorzCX><sizeHorzCY>234192</sizeHorzCY><sizeVertCX>144300</sizeVertCX><sizeVertCY>690867</sizeVertCY></Rect></Wnd2></Sizes></Row0></Right><Bottom><Row0><Sizes><Wnd0><Rect><Top>-2</Top><Left>-2</Left><Bottom>198</Bottom><Right>1388</Right><x>-2</x><y>-2</y><xscreen>1390</xscreen><yscreen>200</yscreen><sizeHorzCX>1002886</sizeHorzCX><sizeHorzCY>234192</sizeHorzCY><sizeVertCX>144300</sizeVertCX><sizeVertCY>234192</sizeVertCY></Rect></Wnd0></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>

+  </Desktop>

+</Project>

+

+

diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/cmock_demo.dni b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/cmock_demo.dni
new file mode 100644
index 000000000..4ec3ceeab
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/cmock_demo.dni
@@ -0,0 +1,44 @@
+[JLinkDriver]

+WatchCond=_ 0

+Watch0=_ 0 "" 0 "" 0 "" 0 "" 0 0 0 0

+Watch1=_ 0 "" 0 "" 0 "" 0 "" 0 0 0 0

+[DisAssemblyWindow]

+NumStates=_ 1

+State 1=_ 1

+[CodeCoverage]

+Enabled=_ 0

+[Profiling]

+Enabled=0

+[StackPlugin]

+Enabled=1

+OverflowWarningsEnabled=1

+WarningThreshold=90

+SpWarningsEnabled=1

+WarnHow=0

+UseTrigger=1

+TriggerName=main

+LimitSize=0

+ByteLimit=50

+[Interrupts]

+Enabled=1

+[MemoryMap]

+Enabled=0

+Base=0

+UseAuto=0

+TypeViolation=1

+UnspecRange=1

+ActionState=1

+[Log file]

+LoggingEnabled=_ 0

+LogFile=_ ""

+Category=_ 0

+[TermIOLog]

+LoggingEnabled=_ 0

+LogFile=_ ""

+[Disassemble mode]

+mode=0

+[Breakpoints]

+Count=0

+[TraceHelper]

+Enabled=0

+ShowSource=1

diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/cmock_demo.wsdt b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/cmock_demo.wsdt
new file mode 100644
index 000000000..3bfdc76bf
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/cmock_demo.wsdt
@@ -0,0 +1,73 @@
+<?xml version="1.0" encoding="iso-8859-1"?>

+

+<Workspace>

+  <ConfigDictionary>

+    

+  <CurrentConfigs><Project>cmock_demo/RAM_Debug</Project></CurrentConfigs></ConfigDictionary>

+  <Desktop>

+    <Static>

+      <Build>

+        

+        

+        

+        

+      <ColumnWidth0>20</ColumnWidth0><ColumnWidth1>995</ColumnWidth1><ColumnWidth2>265</ColumnWidth2><ColumnWidth3>66</ColumnWidth3></Build>

+      <Workspace>

+        <ColumnWidths>

+          

+          

+          

+          

+        <Column0>216</Column0><Column1>27</Column1><Column2>27</Column2><Column3>27</Column3></ColumnWidths>

+      </Workspace>

+      <Debug-Log/>

+    <TerminalIO/></Static>

+    <Windows>

+      

+      

+    <Wnd2>

+        <Tabs>

+          <Tab>

+            <Identity>TabID-7530-24964</Identity>

+            <TabName>Build</TabName>

+            <Factory>Build</Factory>

+            <Session/>

+          </Tab>

+          <Tab>

+            <Identity>TabID-25388-26881</Identity>

+            <TabName>Debug Log</TabName>

+            <Factory>Debug-Log</Factory>

+            <Session/>

+          </Tab>

+        </Tabs>

+        

+      <SelectedTab>0</SelectedTab></Wnd2><Wnd3>

+        <Tabs>

+          <Tab>

+            <Identity>TabID-18278-24968</Identity>

+            <TabName>Workspace</TabName>

+            <Factory>Workspace</Factory>

+            <Session>

+              

+            <NodeDict><ExpandedNode>cmock_demo</ExpandedNode><ExpandedNode>cmock_demo/Source</ExpandedNode><ExpandedNode>cmock_demo/src</ExpandedNode><ExpandedNode>cmock_demo/srcIAR</ExpandedNode></NodeDict></Session>

+          </Tab>

+        </Tabs>

+        

+      <SelectedTab>0</SelectedTab></Wnd3></Windows>

+    <Editor>

+      

+      

+      

+      

+    <Pane><Tab><Factory>TextEditor</Factory><Filename>C:\svn\cmock\examples\src\Main.c</Filename><XPos>0</XPos><YPos>25</YPos><SelStart>820</SelStart><SelEnd>820</SelEnd></Tab><ActiveTab>0</ActiveTab></Pane><ActivePane>0</ActivePane><Sizes><Pane><X>1000000</X><Y>1000000</Y></Pane></Sizes><SplitMode>1</SplitMode></Editor>

+    <Positions>

+      

+      

+      

+      

+      

+    <Top><Row0><Sizes><Toolbar-00aa9198><key>iaridepm.enu1</key></Toolbar-00aa9198></Sizes></Row0></Top><Left><Row0><Sizes><Wnd3><Rect><Top>-2</Top><Left>-2</Left><Bottom>513</Bottom><Right>307</Right><x>-2</x><y>-2</y><xscreen>200</xscreen><yscreen>200</yscreen><sizeHorzCX>144300</sizeHorzCX><sizeHorzCY>234192</sizeHorzCY><sizeVertCX>222944</sizeVertCX><sizeVertCY>603044</sizeVertCY></Rect></Wnd3></Sizes></Row0></Left><Right><Row0><Sizes/></Row0></Right><Bottom><Row0><Sizes><Wnd2><Rect><Top>-2</Top><Left>-2</Left><Bottom>297</Bottom><Right>1388</Right><x>-2</x><y>-2</y><xscreen>1390</xscreen><yscreen>299</yscreen><sizeHorzCX>1002886</sizeHorzCX><sizeHorzCY>350117</sizeHorzCY><sizeVertCX>144300</sizeVertCX><sizeVertCY>234192</sizeVertCY></Rect></Wnd2></Sizes></Row0></Bottom><Float><Sizes/></Float></Positions>

+  </Desktop>

+</Workspace>

+

+

diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/cmock_demo_Binary.jlink b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/cmock_demo_Binary.jlink
new file mode 100644
index 000000000..ecbb0a811
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/cmock_demo_Binary.jlink
@@ -0,0 +1,12 @@
+[FLASH]
+SkipProgOnCRCMatch = 1
+VerifyDownload = 1
+AllowCaching = 1
+EnableFlashDL = 2
+Override = 0
+Device="ADUC7020X62"
+[BREAKPOINTS]
+ShowInfoWin = 1
+EnableFlashBP = 2
+[CPU]
+AllowSimulation = 1
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/cmock_demo_FLASH_Debug.jlink b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/cmock_demo_FLASH_Debug.jlink
new file mode 100644
index 000000000..ecbb0a811
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/cmock_demo_FLASH_Debug.jlink
@@ -0,0 +1,12 @@
+[FLASH]
+SkipProgOnCRCMatch = 1
+VerifyDownload = 1
+AllowCaching = 1
+EnableFlashDL = 2
+Override = 0
+Device="ADUC7020X62"
+[BREAKPOINTS]
+ShowInfoWin = 1
+EnableFlashBP = 2
+[CPU]
+AllowSimulation = 1
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/cmock_demo_RAM_Debug.jlink b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/cmock_demo_RAM_Debug.jlink
new file mode 100644
index 000000000..ecbb0a811
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/settings/cmock_demo_RAM_Debug.jlink
@@ -0,0 +1,12 @@
+[FLASH]
+SkipProgOnCRCMatch = 1
+VerifyDownload = 1
+AllowCaching = 1
+EnableFlashDL = 2
+Override = 0
+Device="ADUC7020X62"
+[BREAKPOINTS]
+ShowInfoWin = 1
+EnableFlashBP = 2
+[CPU]
+AllowSimulation = 1
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/srcIAR/Cstartup.s b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/srcIAR/Cstartup.s
new file mode 100644
index 000000000..7113c8035
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/srcIAR/Cstartup.s
@@ -0,0 +1,299 @@
+;* ----------------------------------------------------------------------------
+;*         ATMEL Microcontroller Software Support  -  ROUSSET  -
+;* ----------------------------------------------------------------------------
+;* Copyright (c) 2006, Atmel Corporation
+;
+;* All rights reserved.
+;*
+;* Redistribution and use in source and binary forms, with or without
+;* modification, are permitted provided that the following conditions are met:
+;*
+;* - Redistributions of source code must retain the above copyright notice,
+;* this list of conditions and the disclaimer below.
+;*
+;* - Redistributions in binary form must reproduce the above copyright notice,
+;* this list of conditions and the disclaimer below in the documentation and/or
+;* other materials provided with the distribution.
+;*
+;* Atmel's name may not be used to endorse or promote products derived from
+;* this software without specific prior written permission.
+;*
+;* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+;* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+;* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+;* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+;* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+;* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+;* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+;* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+;* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;* ----------------------------------------------------------------------------
+
+;------------------------------------------------------------------------------
+; Include your AT91 Library files
+;------------------------------------------------------------------------------
+#include "AT91SAM7X256_inc.h"
+;------------------------------------------------------------------------------
+
+#define TOP_OF_MEMORY    (AT91C_ISRAM + AT91C_ISRAM_SIZE)
+#define IRQ_STACK_SIZE   (3*8*4)
+     ; 3 words to be saved per interrupt priority level
+
+; Mode, correspords to bits 0-5 in CPSR
+MODE_BITS DEFINE  0x1F    ; Bit mask for mode bits in CPSR
+USR_MODE  DEFINE  0x10    ; User mode
+FIQ_MODE  DEFINE  0x11    ; Fast Interrupt Request mode
+IRQ_MODE  DEFINE  0x12    ; Interrupt Request mode
+SVC_MODE  DEFINE  0x13    ; Supervisor mode
+ABT_MODE  DEFINE  0x17    ; Abort mode
+UND_MODE  DEFINE  0x1B    ; Undefined Instruction mode
+SYS_MODE  DEFINE  0x1F    ; System mode
+
+I_BIT     DEFINE  0x80
+F_BIT     DEFINE  0x40
+
+;------------------------------------------------------------------------------
+; ?RESET
+; Reset Vector.
+; Normally, segment INTVEC is linked at address 0.
+; For debugging purposes, INTVEC may be placed at other addresses.
+; A debugger that honors the entry point will start the
+; program in a normal way even if INTVEC is not at address 0.
+;------------------------------------------------------------------------------
+        SECTION .intvec:CODE:NOROOT(2)
+        PUBLIC  __vector
+        PUBLIC  __iar_program_start
+
+        ARM
+__vector:
+        ldr  pc,[pc,#+24]             ;; Reset
+__und_handler:
+        ldr  pc,[pc,#+24]             ;; Undefined instructions
+__swi_handler:
+        ldr  pc,[pc,#+24]             ;; Software interrupt (SWI/SVC)
+__prefetch_handler:
+        ldr  pc,[pc,#+24]             ;; Prefetch abort
+__data_handler:
+        ldr  pc,[pc,#+24]             ;; Data abort
+        DC32  0xFFFFFFFF              ;; RESERVED
+__irq_handler:
+        ldr  pc,[pc,#+24]             ;; IRQ
+__fiq_handler:
+        ldr  pc,[pc,#+24]             ;; FIQ
+
+        DC32  __iar_program_start
+        DC32  __und_handler
+        DC32  __swi_handler
+        DC32  __prefetch_handler
+        DC32  __data_handler
+        B .
+        DC32  IRQ_Handler_Entry
+        DC32  FIQ_Handler_Entry
+
+;------------------------------------------------------------------------------
+;- Manage exception: The exception must be ensure in ARM mode
+;------------------------------------------------------------------------------
+        SECTION text:CODE:NOROOT(2)
+        ARM
+;------------------------------------------------------------------------------
+;- Function             : FIQ_Handler_Entry
+;- Treatments           : FIQ Controller Interrupt Handler.
+;-                        R8 is initialize in Cstartup
+;- Called Functions     : None only by FIQ
+;------------------------------------------------------------------------------
+FIQ_Handler_Entry:
+
+;- Switch in SVC/User Mode to allow User Stack access for C code
+; because the FIQ is not yet acknowledged
+
+;- Save and r0 in FIQ_Register
+        mov         r9,r0
+        ldr         r0 , [r8, #AIC_FVR]
+        msr         CPSR_c,#I_BIT | F_BIT | SVC_MODE
+;- Save scratch/used registers and LR in User Stack
+        stmfd       sp!, { r1-r3, r12, lr}
+
+;- Branch to the routine pointed by the AIC_FVR
+        mov         r14, pc
+        bx          r0
+
+;- Restore scratch/used registers and LR from User Stack
+        ldmia       sp!, { r1-r3, r12, lr}
+
+;- Leave Interrupts disabled and switch back in FIQ mode
+        msr         CPSR_c, #I_BIT | F_BIT | FIQ_MODE
+
+;- Restore the R0 ARM_MODE_SVC register
+        mov         r0,r9
+
+;- Restore the Program Counter using the LR_fiq directly in the PC
+        subs        pc,lr,#4
+;------------------------------------------------------------------------------
+;- Function             : IRQ_Handler_Entry
+;- Treatments           : IRQ Controller Interrupt Handler.
+;- Called Functions     : AIC_IVR[interrupt]
+;------------------------------------------------------------------------------
+IRQ_Handler_Entry:
+;-------------------------
+;- Manage Exception Entry
+;-------------------------
+;- Adjust and save LR_irq in IRQ stack
+    sub         lr, lr, #4
+    stmfd       sp!, {lr}
+
+;- Save r0 and SPSR (need to be saved for nested interrupt)
+    mrs         r14, SPSR
+    stmfd       sp!, {r0,r14}
+
+;- Write in the IVR to support Protect Mode
+;- No effect in Normal Mode
+;- De-assert the NIRQ and clear the source in Protect Mode
+    ldr         r14, =AT91C_BASE_AIC
+    ldr         r0 , [r14, #AIC_IVR]
+    str         r14, [r14, #AIC_IVR]
+
+;- Enable Interrupt and Switch in Supervisor Mode
+    msr         CPSR_c, #SVC_MODE
+
+;- Save scratch/used registers and LR in User Stack
+    stmfd       sp!, { r1-r3, r12, r14}
+
+;----------------------------------------------
+;- Branch to the routine pointed by the AIC_IVR
+;----------------------------------------------
+    mov         r14, pc
+    bx          r0
+
+;----------------------------------------------
+;- Manage Exception Exit
+;----------------------------------------------
+;- Restore scratch/used registers and LR from User Stack
+    ldmia       sp!, { r1-r3, r12, r14}
+
+;- Disable Interrupt and switch back in IRQ mode
+    msr         CPSR_c, #I_BIT | IRQ_MODE
+
+;- Mark the End of Interrupt on the AIC
+    ldr         r14, =AT91C_BASE_AIC
+    str         r14, [r14, #AIC_EOICR]
+
+;- Restore SPSR_irq and r0 from IRQ stack
+    ldmia       sp!, {r0,r14}
+    msr         SPSR_cxsf, r14
+
+;- Restore adjusted  LR_irq from IRQ stack directly in the PC
+    ldmia       sp!, {pc}^
+
+;------------------------------------------------------------------------------
+;- Exception Vectors
+;------------------------------------------------------------------------------
+    PUBLIC    AT91F_Default_FIQ_handler
+    PUBLIC    AT91F_Default_IRQ_handler
+    PUBLIC    AT91F_Spurious_handler
+
+    ARM      ; Always ARM mode after exeption
+
+AT91F_Default_FIQ_handler
+    b         AT91F_Default_FIQ_handler
+
+AT91F_Default_IRQ_handler
+    b         AT91F_Default_IRQ_handler
+
+AT91F_Spurious_handler
+    b         AT91F_Spurious_handler
+
+
+;------------------------------------------------------------------------------
+; ?INIT
+; Program entry.
+;------------------------------------------------------------------------------
+
+    SECTION FIQ_STACK:DATA:NOROOT(3)
+    SECTION IRQ_STACK:DATA:NOROOT(3)
+    SECTION SVC_STACK:DATA:NOROOT(3)
+    SECTION ABT_STACK:DATA:NOROOT(3)
+    SECTION UND_STACK:DATA:NOROOT(3)
+    SECTION CSTACK:DATA:NOROOT(3)
+    SECTION text:CODE:NOROOT(2)
+    REQUIRE __vector
+    EXTERN  ?main
+    PUBLIC  __iar_program_start
+    EXTERN  AT91F_LowLevelInit
+
+
+__iar_program_start:
+
+;------------------------------------------------------------------------------
+;- Low level Init is performed in a C function: AT91F_LowLevelInit
+;- Init Stack Pointer to a valid memory area before calling AT91F_LowLevelInit
+;------------------------------------------------------------------------------
+
+;- Retrieve end of RAM address
+
+                ldr     r13,=TOP_OF_MEMORY          ;- Temporary stack in internal RAM for Low Level Init execution
+                ldr     r0,=AT91F_LowLevelInit
+                mov     lr, pc
+                bx      r0                          ;- Branch on C function (with interworking)
+
+; Initialize the stack pointers.
+; The pattern below can be used for any of the exception stacks:
+; FIQ, IRQ, SVC, ABT, UND, SYS.
+; The USR mode uses the same stack as SYS.
+; The stack segments must be defined in the linker command file,
+; and be declared above.
+
+                mrs     r0,cpsr                             ; Original PSR value
+                bic     r0,r0,#MODE_BITS                    ; Clear the mode bits
+                orr     r0,r0,#SVC_MODE                     ; Set SVC mode bits
+                msr     cpsr_c,r0                           ; Change the mode
+                ldr     sp,=SFE(SVC_STACK)                  ; End of SVC_STACK
+
+                bic     r0,r0,#MODE_BITS                    ; Clear the mode bits
+                orr     r0,r0,#UND_MODE                     ; Set UND mode bits
+                msr     cpsr_c,r0                           ; Change the mode
+                ldr     sp,=SFE(UND_STACK)                  ; End of UND_STACK
+
+                bic     r0,r0,#MODE_BITS                    ; Clear the mode bits
+                orr     r0,r0,#ABT_MODE                     ; Set ABT mode bits
+                msr     cpsr_c,r0                           ; Change the mode
+                ldr     sp,=SFE(ABT_STACK)                  ; End of ABT_STACK
+
+                bic     r0,r0,#MODE_BITS                    ; Clear the mode bits
+                orr     r0,r0,#FIQ_MODE                     ; Set FIQ mode bits
+                msr     cpsr_c,r0                           ; Change the mode
+                ldr     sp,=SFE(FIQ_STACK)                  ; End of FIQ_STACK
+                ;- Init the FIQ register
+                ldr     r8, =AT91C_BASE_AIC
+
+                bic     r0,r0,#MODE_BITS                    ; Clear the mode bits
+                orr     r0,r0,#IRQ_MODE                     ; Set IRQ mode bits
+                msr     cpsr_c,r0                           ; Change the mode
+                ldr     sp,=SFE(IRQ_STACK)                  ; End of IRQ_STACK
+
+                bic     r0,r0,#MODE_BITS                    ; Clear the mode bits
+                orr     r0,r0,#SYS_MODE                     ; Set System mode bits
+                msr     cpsr_c,r0                           ; Change the mode
+                ldr     sp,=SFE(CSTACK)                     ; End of CSTACK
+
+#ifdef __ARMVFP__
+; Enable the VFP coprocessor.
+                mov     r0, #0x40000000                 ; Set EN bit in VFP
+                fmxr    fpexc, r0                       ; FPEXC, clear others.
+
+; Disable underflow exceptions by setting flush to zero mode.
+; For full IEEE 754 underflow compliance this code should be removed
+; and the appropriate exception handler installed.
+                mov     r0, #0x01000000		        ; Set FZ bit in VFP
+                fmxr    fpscr, r0                       ; FPSCR, clear others.
+#endif
+
+; Add more initialization here
+
+
+; Continue to ?main for more IAR specific system startup
+
+                ldr     r0,=?main
+                bx      r0
+
+    END         ;- Terminates the assembly of the last module in a file
diff --git a/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/srcIAR/Cstartup_SAM7.c b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/srcIAR/Cstartup_SAM7.c
new file mode 100644
index 000000000..a7c72b9a3
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/iar/iar_v5/srcIAR/Cstartup_SAM7.c
@@ -0,0 +1,98 @@
+//-----------------------------------------------------------------------------
+//         ATMEL Microcontroller Software Support  -  ROUSSET  -
+//-----------------------------------------------------------------------------
+// DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
+// IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+// MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
+// DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
+// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
+// OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
+// EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//-----------------------------------------------------------------------------
+// File Name           : Cstartup_SAM7.c
+// Object              : Low level initialisations written in C for Tools
+//                       For AT91SAM7X256 with 2 flash plane
+// Creation            : JPP  14-Sep-2006
+//-----------------------------------------------------------------------------
+
+#include "project.h"
+
+
+//  The following functions must be write in ARM mode this function called
+// directly by exception vector
+extern void AT91F_Spurious_handler(void);
+extern void AT91F_Default_IRQ_handler(void);
+extern void AT91F_Default_FIQ_handler(void);
+
+//*----------------------------------------------------------------------------
+//* \fn    AT91F_LowLevelInit
+//* \brief This function performs very low level HW initialization
+//*        this function can use a Stack, depending the compilation
+//*        optimization mode
+//*----------------------------------------------------------------------------
+void AT91F_LowLevelInit(void) @ "ICODE"
+{
+    unsigned char i;
+    ///////////////////////////////////////////////////////////////////////////
+    // EFC Init
+    ///////////////////////////////////////////////////////////////////////////
+    AT91C_BASE_MC->MC_FMR = AT91C_MC_FWS_1FWS ;
+
+    ///////////////////////////////////////////////////////////////////////////
+    // Init PMC Step 1. Enable Main Oscillator
+    // Main Oscillator startup time is board specific:
+    // Main Oscillator Startup Time worst case (3MHz) corresponds to 15ms
+    // (0x40 for AT91C_CKGR_OSCOUNT field)
+    ///////////////////////////////////////////////////////////////////////////
+    AT91C_BASE_PMC->PMC_MOR = (( AT91C_CKGR_OSCOUNT & (0x40 <<8) | AT91C_CKGR_MOSCEN ));
+    // Wait Main Oscillator stabilization
+    while(!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS));
+
+    ///////////////////////////////////////////////////////////////////////////
+    // Init PMC Step 2.
+    // Set PLL to 96MHz (96,109MHz) and UDP Clock to 48MHz
+    // PLL Startup time depends on PLL RC filter: worst case is choosen
+    // UDP Clock (48,058MHz) is compliant with the Universal Serial Bus
+    // Specification (+/- 0.25% for full speed)
+    ///////////////////////////////////////////////////////////////////////////
+    AT91C_BASE_PMC->PMC_PLLR = AT91C_CKGR_USBDIV_1           |
+    						   (16 << 8)                     |
+                               (AT91C_CKGR_MUL & (72 << 16)) |
+                               (AT91C_CKGR_DIV & 14);
+    // Wait for PLL stabilization
+    while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCK) );
+    // Wait until the master clock is established for the case we already
+    // turn on the PLL
+    while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) );
+
+    ///////////////////////////////////////////////////////////////////////////
+    // Init PMC Step 3.
+    // Selection of Master Clock MCK equal to (Processor Clock PCK) PLL/2=48MHz
+    // The PMC_MCKR register must not be programmed in a single write operation
+    // (see. Product Errata Sheet)
+    ///////////////////////////////////////////////////////////////////////////
+    AT91C_BASE_PMC->PMC_MCKR = AT91C_PMC_PRES_CLK_2;
+    // Wait until the master clock is established
+    while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) );
+
+    AT91C_BASE_PMC->PMC_MCKR |= AT91C_PMC_CSS_PLL_CLK;
+    // Wait until the master clock is established
+    while( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) );
+
+    ///////////////////////////////////////////////////////////////////////////
+    //  Disable Watchdog (write once register)
+    ///////////////////////////////////////////////////////////////////////////
+    AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
+
+    ///////////////////////////////////////////////////////////////////////////
+    //  Init AIC: assign corresponding handler for each interrupt source
+    ///////////////////////////////////////////////////////////////////////////
+    AT91C_BASE_AIC->AIC_SVR[0] = (int) AT91F_Default_FIQ_handler ;
+    for (i = 1; i < 31; i++) {
+        AT91C_BASE_AIC->AIC_SVR[i] = (int) AT91F_Default_IRQ_handler ;
+    }
+    AT91C_BASE_AIC->AIC_SPU = (unsigned int) AT91F_Spurious_handler;
+}
diff --git a/FreeRTOS-Plus/Test/CMock/test/rakefile b/FreeRTOS-Plus/Test/CMock/test/rakefile
new file mode 100644
index 000000000..c57c71539
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/rakefile
@@ -0,0 +1,147 @@
+# ==============================================================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007-2014 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==============================================================================
+
+require '../config/test_environment'
+require 'rake'
+require 'rake/clean'
+require 'rake/testtask'
+require './rakefile_helper'
+
+include RakefileHelpers
+
+DEFAULT_CONFIG_FILE = 'gcc.yml'
+CMOCK_TEST_ROOT = File.expand_path(File.dirname(__FILE__))
+
+SYSTEM_TEST_SUPPORT_DIRS = [
+  File.join(CMOCK_TEST_ROOT, 'system/generated'),
+  File.join(CMOCK_TEST_ROOT, 'system/build')
+]
+
+SYSTEM_TEST_SUPPORT_DIRS.each do |dir|
+  directory(dir)
+  CLOBBER.include(dir)
+end
+
+
+task :prep_system_tests => SYSTEM_TEST_SUPPORT_DIRS
+
+configure_clean
+configure_toolchain(DEFAULT_CONFIG_FILE)
+
+task :default => [:test]
+task :ci      => [:no_color, :default, 'test:examples', 'style:check']
+task :cruise  => :ci
+
+desc "Load configuration"
+task :config, :config_file do |t, args|
+  args = {:config_file => DEFAULT_CONFIG_FILE} if args[:config_file].nil?
+  args = {:config_file => args[:config_file] + '.yml'} unless args[:config_file] =~ /\.yml$/i
+  configure_toolchain(args[:config_file])
+end
+
+# Still support testing everything with just 'test' but switch default to ceedling-like test:all
+task :test => ['test:all']
+
+namespace :test do
+  desc "Run all unit, c, and system tests"
+  task :all => [:clobber, :prep_system_tests, 'test:units', 'test:c', 'test:system']
+
+  desc "Run Unit Tests"
+  Rake::TestTask.new('units') do |t|
+    t.pattern = 'unit/*_test.rb'
+    t.verbose = true
+  end
+
+  #individual unit tests
+  FileList['unit/*_test.rb'].each do |test|
+    Rake::TestTask.new(File.basename(test,'.*').sub('_test','')) do |t|
+      t.pattern = test
+      t.verbose = true
+    end
+  end
+
+  desc "Run C Unit Tests"
+  task :c => [:prep_system_tests] do
+    unless ($cfg['unsupported'].include? "C")
+      build_and_test_c_files
+    end
+  end
+
+  desc "Run System Tests"
+  task :system => [:clobber, :prep_system_tests] do
+    #get a list of all system tests, removing unsupported tests for this compiler
+    sys_unsupported  = $cfg['unsupported'].map {|a| 'system/test_interactions/'+a+'.yml'}
+    sys_tests_to_run = FileList['system/test_interactions/*.yml'] - sys_unsupported
+    compile_unsupported  = $cfg['unsupported'].map {|a| SYSTEST_COMPILE_MOCKABLES_PATH+a+'.h'}
+    compile_tests_to_run = FileList[SYSTEST_COMPILE_MOCKABLES_PATH + '*.h'] - compile_unsupported
+    unless (sys_unsupported.empty? and compile_unsupported.empty?)
+      report "\nIgnoring these system tests..."
+      sys_unsupported.each {|a| report a}
+      compile_unsupported.each {|a| report a}
+    end
+    report "\nRunning system tests..."
+    tests_failed = run_system_test_interactions(sys_tests_to_run)
+    raise "System tests failed." if (tests_failed > 0)
+
+    run_system_test_compilations(compile_tests_to_run)
+  end
+
+  desc "Test cmock examples"
+  task :examples => [:prep_system_tests] do
+    run_examples()
+  end
+
+  #individual system tests
+  FileList['system/test_interactions/*.yml'].each do |test|
+    basename = File.basename(test,'.*')
+    #desc "Run system test #{basename}"
+    task basename do
+      run_system_test_interactions([test])
+    end
+  end
+
+  desc "Profile Mock Generation"
+  task :profile => [:clobber, :prep_system_tests] do
+    run_system_test_profiles(FileList[SYSTEST_COMPILE_MOCKABLES_PATH + '*.h'])
+  end
+end
+
+task :no_color do
+  $colour_output = false
+end
+
+################### CODING STYLE VALIDATION
+namespace :style do
+  desc "Check style"
+  task :check do
+    report "\nVERIFYING RUBY STYLE"
+    report execute("rubocop ../lib ../examples ../config ../scripts --config ../vendor/unity/test/.rubocop.yml", true)
+    report "Styling Ruby:PASS"
+  end
+
+  desc "Fix Style of all C Code"
+  task :c do
+    run_astyle("../src/*.* ../extras/fixture/src/*.*")
+  end
+
+  desc "Attempt to Autocorrect style"
+  task :auto  => ['style:clean'] do
+    report execute("rubocop ../lib ../examples ../config ../scripts --auto-correct --config ../vendor/unity/test/.rubocop.yml", true)
+    report "Autocorrected What We Could."
+  end
+
+  desc "Update style todo list"
+  task :todo  => ['style:clean'] do
+    report execute("rubocop ../lib ../examples ../config ../scripts --auto-gen-config --config ../vendor/unity/test/.rubocop.yml", true)
+    report "Updated Style TODO List."
+  end
+
+  task :clean do
+    File.delete(".rubocop_todo.yml") if File.exists?(".rubocop_todo.yml")
+  end
+end
+
+task :style => ['style:check']
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/CMock/test/rakefile_helper.rb b/FreeRTOS-Plus/Test/CMock/test/rakefile_helper.rb
new file mode 100644
index 000000000..3d898905e
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/rakefile_helper.rb
@@ -0,0 +1,403 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+require 'yaml'
+require 'fileutils'
+require '../vendor/unity/auto/generate_test_runner'
+require '../vendor/unity/auto/unity_test_summary'
+require '../vendor/unity/auto/colour_reporter.rb'
+require './system/systest_generator'
+
+module RakefileHelpers
+
+  SYSTEST_GENERATED_FILES_PATH   = './system/generated/'
+  SYSTEST_BUILD_FILES_PATH       = './system/build/'
+  SYSTEST_COMPILE_MOCKABLES_PATH = './system/test_compilation/'
+  C_EXTENSION = '.c'
+  RESULT_EXTENSION = '.result'
+
+  def load_configuration(config_file)
+    $cfg_file = config_file
+    $cfg = YAML.load(File.read('./targets/' + $cfg_file))
+    $colour_output = false unless $cfg['colour']
+  end
+
+  def configure_clean
+    CLEAN.include(SYSTEST_GENERATED_FILES_PATH + '*.*')
+    CLEAN.include(SYSTEST_BUILD_FILES_PATH + '*.*')
+  end
+
+  def configure_toolchain(config_file)
+    load_configuration(config_file)
+    configure_clean
+  end
+
+  def get_local_include_dirs
+    include_dirs = $cfg['compiler']['includes']['items'].dup
+    include_dirs.delete_if {|dir| dir.is_a?(Array)}
+    return include_dirs
+  end
+
+  def extract_headers(filename)
+    includes = []
+    lines = File.readlines(filename)
+    lines.each do |line|
+      m = line.match(/^\s*#include\s+\"\s*(.+\.[hH])\s*\"/)
+      if not m.nil?
+        includes << m[1]
+      end
+    end
+    includes << File.basename(filename,".c").slice(5,256) + "_unity_helper.h"
+    return includes
+  end
+
+  def find_source_file(header, paths)
+    paths.each do |dir|
+      src_file = dir + header.ext(C_EXTENSION)
+      if (File.exists?(src_file))
+        return src_file
+      end
+    end
+    return nil
+  end
+
+  def squash(prefix, items)
+    result = ''
+    items.each { |item| result += " #{prefix}#{tackit(item)}" }
+    return result
+  end
+
+  def build_compiler_fields
+    command  = tackit($cfg['compiler']['path'])
+    if $cfg['compiler']['defines']['items'].nil?
+      defines  = ''
+    else
+      defines  = squash($cfg['compiler']['defines']['prefix'], $cfg['compiler']['defines']['items'])
+    end
+    options  = squash('', $cfg['compiler']['options'])
+    includes = squash($cfg['compiler']['includes']['prefix'], $cfg['compiler']['includes']['items'])
+    includes = includes.gsub(/\\ /, ' ').gsub(/\\\"/, '"').gsub(/\\$/, '') # Remove trailing slashes (for IAR)
+    return {:command => command, :defines => defines, :options => options, :includes => includes}
+  end
+
+  def compile(file, defines=[])
+    compiler = build_compiler_fields
+    cmd_str = "#{compiler[:command]}#{compiler[:defines]}#{defines.inject(''){|all, a| ' -D'+a+all }}#{compiler[:options]}#{compiler[:includes]} #{file} " +
+      "#{$cfg['compiler']['object_files']['prefix']}#{$cfg['compiler']['object_files']['destination']}"
+    obj_file = "#{File.basename(file, C_EXTENSION)}#{$cfg['compiler']['object_files']['extension']}"
+    execute(cmd_str + obj_file)
+    return obj_file
+  end
+
+  def build_linker_fields
+    command  = tackit($cfg['linker']['path'])
+    if $cfg['linker']['options'].nil?
+      options  = ''
+    else
+      options  = squash('', $cfg['linker']['options'])
+    end
+    if ($cfg['linker']['includes'].nil? || $cfg['linker']['includes']['items'].nil?)
+      includes = ''
+    else
+      includes = squash($cfg['linker']['includes']['prefix'], $cfg['linker']['includes']['items'])
+    end
+    includes = includes.gsub(/\\ /, ' ').gsub(/\\\"/, '"').gsub(/\\$/, '') # Remove trailing slashes (for IAR)
+    return {:command => command, :options => options, :includes => includes}
+  end
+
+  def link_it(exe_name, obj_list)
+    linker = build_linker_fields
+    cmd_str = "#{linker[:command]}#{linker[:options]}#{linker[:includes]} " +
+      (obj_list.map{|obj|"#{$cfg['linker']['object_files']['path']}#{obj} "}).uniq.join +
+      $cfg['linker']['bin_files']['prefix'] + ' ' +
+      $cfg['linker']['bin_files']['destination'] +
+      exe_name + $cfg['linker']['bin_files']['extension']
+    execute(cmd_str)
+  end
+
+  def build_simulator_fields
+    return nil if $cfg['simulator'].nil?
+    if $cfg['simulator']['path'].nil?
+      command = ''
+    else
+      command = (tackit($cfg['simulator']['path']) + ' ')
+    end
+    if $cfg['simulator']['pre_support'].nil?
+      pre_support = ''
+    else
+      pre_support = squash('', $cfg['simulator']['pre_support'])
+    end
+    if $cfg['simulator']['post_support'].nil?
+      post_support = ''
+    else
+      post_support = squash('', $cfg['simulator']['post_support'])
+    end
+    return {:command => command, :pre_support => pre_support, :post_support => post_support}
+  end
+
+  def execute(command_string, verbose=true, raise_on_failure=true)
+    #report command_string
+    output = `#{command_string}`.chomp
+    report(output) if (verbose && !output.nil? && (output.length > 0))
+    if ($?.exitstatus != 0) and (raise_on_failure)
+      raise "#{command_string} failed. (Returned #{$?.exitstatus})"
+    end
+    return output
+  end
+
+  def tackit(strings)
+    case(strings)
+      when Array
+        "\"#{strings.join}\""
+      when /^-/
+        strings
+      when /\s/
+        "\"#{strings}\""
+      else
+        strings
+    end
+  end
+
+  def run_astyle(style_what)
+    report "Styling C Code..."
+    command = "AStyle " \
+              "--style=allman --indent=spaces=4 --indent-switches --indent-preproc-define --indent-preproc-block " \
+              "--pad-oper --pad-comma --unpad-paren --pad-header " \
+              "--align-pointer=type --align-reference=name " \
+              "--add-brackets --mode=c --suffix=none " \
+              "#{style_what}"
+    execute(command, false)
+    report "Styling C:PASS"
+  end
+
+  def report_summary
+    summary = UnityTestSummary.new
+    summary.root = File.expand_path(File.dirname(__FILE__)) + '/'
+    results_glob = "#{$cfg['compiler']['build_path']}*.test*"
+    results_glob.gsub!(/\\/, '/')
+    results = Dir[results_glob]
+    summary.targets = results
+    summary.run
+    fail_out "FAIL: There were failures" if (summary.failures > 0)
+  end
+
+  def run_system_test_interactions(test_case_files)
+    load '../lib/cmock.rb'
+
+    SystemTestGenerator.new.generate_files(test_case_files)
+    test_files = FileList.new(SYSTEST_GENERATED_FILES_PATH + 'test*.c')
+
+    load_configuration($cfg_file)
+    $cfg['compiler']['defines']['items'] = [] if $cfg['compiler']['defines']['items'].nil?
+
+    include_dirs = get_local_include_dirs
+
+    # Build and execute each unit test
+    test_files.each do |test|
+
+      obj_list = []
+
+      test_base    = File.basename(test, C_EXTENSION)
+      cmock_config = test_base.gsub(/test_/, '') + '_cmock.yml'
+
+      report "Executing system tests in #{File.basename(test)}..."
+
+      # Detect dependencies and build required required modules
+      extract_headers(test).each do |header|
+
+        # Generate any needed mocks
+        if header =~ /^mock_(.*)\.h/i
+          module_name = $1
+          cmock = CMock.new(SYSTEST_GENERATED_FILES_PATH + cmock_config)
+          cmock.setup_mocks("#{$cfg['compiler']['source_path']}#{module_name}.h")
+        end
+        # Compile corresponding source file if it exists
+        src_file = find_source_file(header, include_dirs)
+        if !src_file.nil?
+          obj_list << compile(src_file)
+        end
+      end
+
+      # Generate and build the test suite runner
+      runner_name = test_base + '_runner.c'
+      runner_path = $cfg['compiler']['source_path'] + runner_name
+      UnityTestRunnerGenerator.new(SYSTEST_GENERATED_FILES_PATH + cmock_config).run(test, runner_path)
+      obj_list << compile(runner_path)
+
+      # Build the test module
+      obj_list << compile(test)
+
+      # Link the test executable
+      link_it(test_base, obj_list)
+
+      # Execute unit test and generate results file
+      simulator = build_simulator_fields
+      executable = $cfg['linker']['bin_files']['destination'] + test_base + $cfg['linker']['bin_files']['extension']
+      if simulator.nil?
+        cmd_str = executable
+      else
+        cmd_str = "#{simulator[:command]} #{simulator[:pre_support]} #{executable} #{simulator[:post_support]}"
+      end
+      output = execute(cmd_str, false, false)
+      test_results = $cfg['compiler']['build_path'] + test_base + RESULT_EXTENSION
+      File.open(test_results, 'w') { |f| f.print output }
+    end
+
+    # Parse and report test results
+    total_tests = 0
+    total_failures = 0
+    failure_messages = []
+
+    test_case_files.each do |test_case|
+      tests = (YAML.load_file(test_case))[:systest][:tests][:units]
+      total_tests += tests.size
+
+      test_file    = 'test_' + File.basename(test_case).ext(C_EXTENSION)
+      result_file  = test_file.ext(RESULT_EXTENSION)
+      test_results = File.readlines(SYSTEST_BUILD_FILES_PATH + result_file).reject {|line| line.size < 10 } # we're rejecting lines that are too short to be realistic, which handles line ending problems
+      tests.each_with_index do |test, index|
+        # compare test's intended pass/fail state with pass/fail state in actual results;
+        # if they don't match, the system test has failed
+        this_failed = case(test[:pass])
+          when :ignore
+            (test_results[index] =~ /:IGNORE/).nil?
+          when true
+            (test_results[index] =~ /:PASS/).nil?
+          when false
+            (test_results[index] =~ /:FAIL/).nil?
+        end
+        if (this_failed)
+          total_failures += 1
+          test_results[index] =~ /test#{index+1}:(.+)/
+          failure_messages << "#{test_file}:test#{index+1}:should #{test[:should]}:#{$1}"
+        end
+        # some tests have additional requirements to check for (checking the actual output message)
+        if (test[:verify_error]) and not (test_results[index] =~ /test#{index+1}:.*#{test[:verify_error]}/)
+          total_failures += 1
+          failure_messages << "#{test_file}:test#{index+1}:should #{test[:should]}:should have output matching '#{test[:verify_error]}' but was '#{test_results[index]}'"
+        end
+      end
+    end
+
+    report "\n"
+    report "------------------------------------\n"
+    report "SYSTEM TEST MOCK INTERACTION SUMMARY\n"
+    report "------------------------------------\n"
+    report "#{total_tests} Tests #{total_failures} Failures 0 Ignored\n"
+    report "\n"
+
+    if (failure_messages.size > 0)
+      report 'System test failures:'
+      failure_messages.each do |failure|
+        report failure
+      end
+    end
+
+    report ''
+
+    return total_failures
+  end
+
+  def profile_this(filename)
+    profile = true
+    begin
+      require 'ruby-prof'
+      RubyProf.start
+    rescue
+      profile = false
+    end
+
+    yield
+
+    if (profile)
+      profile_result = RubyProf.stop
+      File.open("Profile_#{filename}.html", 'w') do |f|
+        RubyProf::GraphHtmlPrinter.new(profile_result).print(f)
+      end
+    end
+  end
+
+  def run_system_test_compilations(mockables)
+    load '../lib/cmock.rb'
+
+    load_configuration($cfg_file)
+    $cfg['compiler']['defines']['items'] = [] if $cfg['compiler']['defines']['items'].nil?
+
+    report "\n"
+    report "------------------------------------\n"
+    report "SYSTEM TEST MOCK COMPILATION SUMMARY\n"
+    report "------------------------------------\n"
+    mockables.each do |header|
+      mock_filename = 'mock_' + File.basename(header).ext('.c')
+      CMock.new(SYSTEST_COMPILE_MOCKABLES_PATH + 'config.yml').setup_mocks(header)
+      report "Compiling #{mock_filename}..."
+      compile(SYSTEST_GENERATED_FILES_PATH + mock_filename)
+    end
+  end
+
+  def run_system_test_profiles(mockables)
+    load '../lib/cmock.rb'
+
+    load_configuration($cfg_file)
+    $cfg['compiler']['defines']['items'] = [] if $cfg['compiler']['defines']['items'].nil?
+
+    report "\n"
+    report "--------------------------\n"
+    report "SYSTEM TEST MOCK PROFILING\n"
+    report "--------------------------\n"
+    mockables.each do |header|
+      mock_filename = 'mock_' + File.basename(header).ext('.c')
+      profile_this(mock_filename.gsub('.c','')) do
+        10.times do
+          CMock.new(SYSTEST_COMPILE_MOCKABLES_PATH + 'config.yml').setup_mocks(header)
+        end
+      end
+      report "Compiling #{mock_filename}..."
+      compile(SYSTEST_GENERATED_FILES_PATH + mock_filename)
+    end
+  end
+
+  def build_and_test_c_files
+    report "\n"
+    report "----------------\n"
+    report "UNIT TEST C CODE\n"
+    report "----------------\n"
+    errors = false
+    FileList.new("c/*.yml").each do |yaml_file|
+      test = YAML.load(File.read(yaml_file))
+      report "\nTesting #{yaml_file.sub('.yml','')}"
+      report "(#{test[:options].join(', ')})"
+      test[:files].each { |f| compile(f, test[:options]) }
+      obj_files = test[:files].map { |f| f.gsub!(/.*\//,'').gsub!(C_EXTENSION, $cfg['compiler']['object_files']['extension']) }
+      link_it('TestCMockC', obj_files)
+      if $cfg['simulator'].nil?
+        execute($cfg['linker']['bin_files']['destination'] + 'TestCMockC' + $cfg['linker']['bin_files']['extension'])
+      else
+        execute(tackit($cfg['simulator']['path'].join) + ' ' +
+            $cfg['simulator']['pre_support'].map{|o| tackit(o)}.join(' ') + ' ' +
+            $cfg['linker']['bin_files']['destination'] +
+            'TestCMockC' +
+            $cfg['linker']['bin_files']['extension'] + ' ' +
+            $cfg['simulator']['post_support'].map{|o| tackit(o)}.join(' ') )
+      end
+    end
+  end
+
+  def run_examples()
+    [ "cd #{File.join("..","examples","make_example")} && make clean && make setup && make test",
+      "cd #{File.join("..","examples","temp_sensor")} && rake ci"
+    ].each do |cmd|
+      report "Testing '#{cmd}'"
+      execute(cmd, false)
+    end
+  end
+
+  def fail_out(msg)
+    puts msg
+    exit(-1)
+  end
+end
+
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/systest_generator.rb b/FreeRTOS-Plus/Test/CMock/test/system/systest_generator.rb
new file mode 100644
index 000000000..490a56eb1
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/systest_generator.rb
@@ -0,0 +1,205 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+require 'yaml'
+
+SYS_TEST_GEN_ROOT = File.expand_path( File.dirname( __FILE__ ) ) + '/'
+GENERATED_PATH    = SYS_TEST_GEN_ROOT + 'generated/'
+BUILD_PATH        = SYS_TEST_GEN_ROOT + 'build/'
+CASES_PATH        = SYS_TEST_GEN_ROOT + 'cases/'
+
+TYPES_H          = 'types.h'
+UNITY_H          = 'unity.h'
+CMOCK_H          = 'cmock.h'
+UNITY_HELPER_H   = 'unity_helper.h'
+UNITY_HELPER_C   = 'unity_helper.c'
+MOCKABLE_H       = 'mockable.h'
+
+YAML_EXTENSION = '.yml'
+TEST_PREFIX    = 'test_'
+MOCK_PREFIX    = 'mock_'
+H_EXTENSION    = '.h'
+C_EXTENSION    = '.c'
+
+
+class SystemTestGenerator
+
+  def generate_files(test_cases)
+    test_cases.each do |filename|
+      yaml_hash = YAML.load_file(filename)
+
+      name = File.basename(filename, YAML_EXTENSION)
+      namix = "#{name}_"
+
+      generate_cmock_config(yaml_hash, namix)
+      generate_code(yaml_hash, namix, name)
+    end
+  end
+
+  private
+
+  def generate_cmock_config(yaml_hash, namix)
+    cmock_yaml = yaml_hash.clone
+    cmock_yaml.delete(:systest)
+    cmock = cmock_yaml[:cmock]
+
+    cmock[:mock_path]   = GENERATED_PATH
+    cmock[:includes]    = (cmock[:includes] || []) + [namix + TYPES_H]
+    cmock[:mock_prefix] = MOCK_PREFIX
+    if not yaml_hash[:systest][:unity_helper].nil?
+      cmock[:includes]     << namix + UNITY_HELPER_H
+      cmock[:unity_helper_path]  = GENERATED_PATH + namix + UNITY_HELPER_H
+    end
+
+    File.open(GENERATED_PATH + namix + 'cmock' + YAML_EXTENSION, 'w') do |out|
+      YAML.dump(cmock_yaml, out)
+    end
+  end
+
+  def generate_code(yaml_hash, namix, name)
+    generate_types_file(yaml_hash, namix)
+    generate_mockable_file(yaml_hash, namix)
+    generate_unity_helper_files(yaml_hash, namix)
+
+    generate_test_file(yaml_hash, namix, name)
+    generate_source_file(yaml_hash, namix, name)
+    generate_skeleton_file(yaml_hash, namix, name)
+  end
+
+  def generate_types_file(yaml_hash, namix)
+    types = yaml_hash[:systest][:types]
+    return if types.nil?
+
+    write_header_file(GENERATED_PATH + namix + TYPES_H, namix.upcase + 'TYPES_H') do |out|
+      out.puts(types)
+    end
+  end
+
+  def generate_mockable_file(yaml_hash, namix)
+    mockable = yaml_hash[:systest][:mockable]
+    return if mockable.nil?
+
+    write_header_file(GENERATED_PATH + namix + MOCKABLE_H, namix.upcase + 'MOCKABLE_H', [namix + TYPES_H]) do |out|
+      out.puts(mockable)
+    end
+  end
+
+  def generate_unity_helper_files(yaml_hash, namix)
+    unity_helper = yaml_hash[:systest][:unity_helper]
+    return if unity_helper.nil?
+
+    write_header_file(GENERATED_PATH + namix + UNITY_HELPER_H, namix.upcase + 'UNITY_HELPER_H', [namix + TYPES_H]) do |out|
+      out.puts(unity_helper[:header])
+    end
+
+    write_source_file(GENERATED_PATH + namix + UNITY_HELPER_C, ["unity.h", namix + UNITY_HELPER_H]) do |out|
+      out.puts(unity_helper[:code])
+    end
+  end
+
+  def generate_test_file(yaml_hash, namix, name)
+    tests = yaml_hash[:systest][:tests]
+    return if tests.nil?
+
+    includes = [UNITY_H, CMOCK_H]
+    includes << [MOCK_PREFIX + namix + MOCKABLE_H]
+    includes << [name + H_EXTENSION]
+
+    write_source_file(GENERATED_PATH + TEST_PREFIX + name + C_EXTENSION, includes.flatten) do |out|
+      out.puts(tests[:common])
+      out.puts('')
+
+      tests[:units].each_with_index do |test, index|
+        out.puts('// should ' + test[:should])
+        out.puts(test[:code].gsub!(/test\(\)/, "void test#{index+1}(void)"))
+        out.puts('')
+      end
+    end
+  end
+
+  def generate_source_file(yaml_hash, namix, name)
+    source = yaml_hash[:systest][:source]
+    return if source.nil?
+
+    header_file = name + H_EXTENSION
+
+    includes = yaml_hash[:systest][:types].nil? ? [] : [(namix + TYPES_H)]
+
+    write_header_file(GENERATED_PATH + header_file, name.upcase, includes) do |out|
+      out.puts(source[:header])
+    end
+
+    includes = []
+    includes << (namix + TYPES_H) if not yaml_hash[:systest][:types].nil?
+    includes << (namix + MOCKABLE_H) if not yaml_hash[:systest][:mockable].nil?
+    includes << header_file
+
+    unless (source[:code].nil?)
+      write_source_file(GENERATED_PATH + name + C_EXTENSION, includes.flatten) do |out|
+        out.puts(source[:code])
+      end
+    end
+  end
+
+  def generate_skeleton_file(yaml_hash, namix, name)
+    source = yaml_hash[:systest][:skeleton]
+    return if source.nil?
+
+    require 'cmock.rb'
+    cmock = CMock.new(GENERATED_PATH + namix + 'cmock' + YAML_EXTENSION)
+    cmock.setup_skeletons("#{$cfg['compiler']['source_path']}#{name}.h")
+  end
+
+  def write_header_file(filename, upcase_name, include_list=[])
+    File.open(filename, 'w') do |out|
+      out.puts("#ifndef _#{upcase_name}")
+      out.puts("#define _#{upcase_name}")
+      out.puts('')
+      include_list.each do |include|
+        out.puts("#include \"#{include}\"")
+      end
+      out.puts('')
+      out.puts("#if defined(__GNUC__) && !defined(__ICC)")
+      out.puts("#if !defined(__clang__)")
+      out.puts("#pragma GCC diagnostic ignored \"-Wpragmas\"")
+      out.puts("#endif")
+      out.puts('#pragma GCC diagnostic ignored "-Wunknown-pragmas"')
+      out.puts('#pragma GCC diagnostic ignored "-Wduplicate-decl-specifier"')
+      out.puts("#endif")
+      out.puts('')
+      yield(out)
+      out.puts('')
+      out.puts("#endif // _#{upcase_name}")
+      out.puts('')
+    end
+  end
+
+  def write_source_file(filename, include_list=[])
+    File.open(filename, 'w') do |out|
+      include_list.each do |include|
+        out.puts("#include \"#{include}\"")
+      end
+      out.puts('')
+      out.puts("#if defined(__GNUC__) && !defined(__ICC)")
+      out.puts("#if !defined(__clang__)")
+      out.puts("#pragma GCC diagnostic ignored \"-Wpragmas\"")
+      out.puts("#endif")
+      out.puts('#pragma GCC diagnostic ignored "-Wunknown-pragmas"')
+      out.puts('#pragma GCC diagnostic ignored "-Wduplicate-decl-specifier"')
+      out.puts("#endif")
+      out.puts('')
+      yield(out)
+      out.puts('')
+    end
+  end
+
+end
+
+
+if ($0 == __FILE__)
+  SystemTestGenerator.new.generate_files(Dir[CASES_PATH + "*#{YAML_EXTENSION}"])
+end
+
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_compilation/callingconv.h b/FreeRTOS-Plus/Test/CMock/test/system/test_compilation/callingconv.h
new file mode 100644
index 000000000..beae0619f
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_compilation/callingconv.h
@@ -0,0 +1,11 @@
+/* ==========================================
+    CMock Project - Automatic Mock Generation for C
+    Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+========================================== */
+
+#ifndef __stdcall
+#define __stdcall
+#endif
+
+int __stdcall this_uses_calling_conventions(int b);
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_compilation/config.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_compilation/config.yml
new file mode 100644
index 000000000..787e2e1f6
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_compilation/config.yml
@@ -0,0 +1,10 @@
+---
+:cmock:
+  :plugins: []
+  :includes: []
+  :mock_path: ./system/generated/
+  :mock_prefix: mock_
+  :treat_inlines: :include
+  :treat_as_void:
+  - OSEK_TASK
+  - VOID_TYPE_CRAZINESS
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_compilation/const.h b/FreeRTOS-Plus/Test/CMock/test/system/test_compilation/const.h
new file mode 100644
index 000000000..71426bc3b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_compilation/const.h
@@ -0,0 +1,37 @@
+/* ==========================================
+    CMock Project - Automatic Mock Generation for C
+    Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+========================================== */
+
+#if defined(__GNUC__) && !defined(__ICC)
+#if !defined(__clang__)
+#pragma GCC diagnostic ignored "-Wpragmas"
+#endif
+#pragma GCC diagnostic ignored "-Wunknown-pragmas"
+#pragma GCC diagnostic ignored "-Wduplicate-decl-specifier"
+#endif
+
+struct _DUMMY_T { unsigned int a; float b; };
+
+void const_variants1( const char* a, int const, unsigned short const * c );
+
+void const_variants2(
+	struct _DUMMY_T const * const param1,
+	const unsigned long int const * const param2,
+	const struct _DUMMY_T const * param3 );
+
+const int * const_retval1(void);        /* nicety version for pointer to constant int */
+int const * const_retval2(void);        /* formal version for pointer to constant int */
+//int * const const_retval3(void);        /* formal version for constant pointer to int */
+//int const * const const_retval4(void);  /* formal version for constant pointer to constant int */
+
+const int* const_retval5(void);         /* sticky-left nicety version for pointer to constant int */
+int const* const_retval6(void);         /* sticky-left formal version for pointer to constant int */
+//int* const const_retval7(void);         /* sticky-left formal version for constant pointer to int */
+//int const* const const_retval8(void);   /* sticky-left formal version for constant pointer to constant int */
+
+const int *const_retval9(void);         /* sticky-right nicety version for pointer to constant int */
+int const *const_retvalA(void);         /* sticky-right formal version for pointer to constant int */
+//int *const const_retvalB(void);         /* sticky-right formal version for constant pointer to int */
+//int const *const const_retvalC(void);   /* sticky-right formal version for constant pointer to constant int */
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_compilation/inline.h b/FreeRTOS-Plus/Test/CMock/test/system/test_compilation/inline.h
new file mode 100644
index 000000000..06e33c184
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_compilation/inline.h
@@ -0,0 +1,23 @@
+
+static inline int dummy_func_0(void) {
+	return 5;
+}
+
+inline static int dummy_func_1(int a) {
+	int a = dummy_func_0();
+	int b = 10;
+
+	return a + b;
+}
+
+int inline static dummy_func_2(int a, char b, float c) {
+	c += 3.14;
+	b -= 32;
+	return a + (int)(b) + (int)c;
+}
+
+void dummy_normal_func(int a);
+
+inline void dummy_func_3(void) {
+	//NOP
+}
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_compilation/osek.h b/FreeRTOS-Plus/Test/CMock/test/system/test_compilation/osek.h
new file mode 100644
index 000000000..f3abe7b57
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_compilation/osek.h
@@ -0,0 +1,275 @@
+/* ==========================================
+    CMock Project - Automatic Mock Generation for C
+    Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+========================================== */
+
+typedef unsigned char OSServiceIdType;
+typedef void (*OSEKOS_VOIDFUNCPTR)(void);
+
+typedef unsigned char StatusType;
+typedef unsigned char OSEK_U8;
+typedef unsigned short OSEK_U16;
+typedef unsigned long OSEK_U32;
+
+void OSEKOSDisableAll(void);
+void OSEKOSEnableAll(void);
+
+typedef unsigned long * OSEKOSSaveType;
+typedef void OSEK_TASK;
+typedef OSEK_U8 OSEKOSPrioType;
+
+enum {
+Task_DbgCAN
+,
+Task_ALS
+,
+CalibrateMagTask
+,
+Task_IAQ
+,
+SmartBeam
+,
+Task_QbertTestImage
+,
+Task_TestQbertMem
+,
+Task_Cyclic1000
+,
+ProcessMagForCompass
+,
+ReadMag
+,
+Task_Cyclic10
+,
+Task_Wdm
+,
+BackgroundTask
+,
+Task_Cyclic20
+,
+Task_Cyclic2
+};
+
+OSEK_TASK OSEKOS_T_Task_DbgCAN(void);
+OSEK_TASK OSEKOS_T_Task_ALS(void);
+OSEK_TASK OSEKOS_T_CalibrateMagTask(void);
+OSEK_TASK OSEKOS_T_Task_IAQ(void);
+OSEK_TASK OSEKOS_T_SmartBeam(void);
+OSEK_TASK OSEKOS_T_Task_QbertTestImage(void);
+OSEK_TASK OSEKOS_T_Task_TestQbertMem(void);
+OSEK_TASK OSEKOS_T_Task_Cyclic1000(void);
+OSEK_TASK OSEKOS_T_ProcessMagForCompass(void);
+OSEK_TASK OSEKOS_T_ReadMag(void);
+OSEK_TASK OSEKOS_T_Task_Cyclic10(void);
+OSEK_TASK OSEKOS_T_Task_Wdm(void);
+OSEK_TASK OSEKOS_T_BackgroundTask(void);
+OSEK_TASK OSEKOS_T_Task_Cyclic20(void);
+OSEK_TASK OSEKOS_T_Task_Cyclic2(void);
+OSEK_TASK OSEKOS_Twrap_Task_DbgCAN(void);
+OSEK_TASK OSEKOS_Twrap_Task_ALS(void);
+OSEK_TASK OSEKOS_Twrap_CalibrateMagTask(void);
+OSEK_TASK OSEKOS_Twrap_Task_IAQ(void);
+OSEK_TASK OSEKOS_Twrap_SmartBeam(void);
+OSEK_TASK OSEKOS_Twrap_Task_QbertTestImage(void);
+OSEK_TASK OSEKOS_Twrap_Task_TestQbertMem(void);
+OSEK_TASK OSEKOS_Twrap_Task_Cyclic1000(void);
+OSEK_TASK OSEKOS_Twrap_ProcessMagForCompass(void);
+OSEK_TASK OSEKOS_Twrap_ReadMag(void);
+OSEK_TASK OSEKOS_Twrap_Task_Cyclic10(void);
+OSEK_TASK OSEKOS_Twrap_Task_Wdm(void);
+OSEK_TASK OSEKOS_Twrap_BackgroundTask(void);
+OSEK_TASK OSEKOS_Twrap_Task_Cyclic20(void);
+OSEK_TASK OSEKOS_Twrap_Task_Cyclic2(void);
+
+typedef OSEK_U8 TaskType;
+typedef OSEK_U8 TaskStateType;
+typedef OSEK_U16 EventMaskType;
+typedef OSEK_U8 ResourceType;
+
+void OSEKOSEnableSystemTimers(void);
+
+typedef OSEK_U8 CounterType;
+typedef OSEK_U32 TickType;
+typedef OSEK_U8 AlarmType;
+
+void OSEKOS_ISR_CanTxInterrupt(void);
+void OSEKOS_ISR_CanRxInterrupt(void);
+void OSEKOS_ISR_CanErrInterrupt(void);
+void OSEKOS_ISR_SCIRxInterrupt(void);
+void OSEKOS_ISR_SCITxInterrupt(void);
+void OSEKOS_ISR_UP_DMA_Interrupt_0(void);
+void OSEKOS_ISR_UP_DMA_Interrupt_1(void);
+void OSEKOS_ISR_UP_DMA_Interrupt_2(void);
+void OSEKOS_ISR_UP_DMA_Interrupt_3(void);
+void OSEKOS_ISR_CompFreqHandler(void);
+void OSEKOS_ISR_AmbientReturnInt(void);
+void OSEKOS_ISR_GlareReturnInt(void);
+void OSEKOS_ISR_ALSTimeoutInt(void);
+void OSEKOS_ISR_LINTimerInt(void);
+void OSEKOS_ISR_LINDelayInt(void);
+void OSEKOS_ISR_TimerMExpire(void);
+void OSEKOS_ISR_LINRxTx_SCI1(void);
+void OSEKOS_ISR_CanRxInterrupt_1(void);
+void OSEKOS_ISR_LINError_SCI1(void);
+void OSEKOS_ISR_SysCounter(void);
+
+
+// defined multiple times (slightly different forms)  These should be ignored because they are externed
+extern void OSEKOS_ISR_CanTxInterrupt( void );
+extern void OSEKOS_ISR_CanRxInterrupt( void );
+
+
+unsigned long OSEKOSrtcGetSeconds ( void );
+void OSEKOSrtcIncrement ( unsigned long nsec );
+
+enum
+{
+   E_OS_ACCESS = 1,
+   E_OS_CALLEVEL = 2,
+   E_OS_ID = 3,
+   E_OS_LIMIT = 4,
+   E_OS_NOFUNC = 5,
+   E_OS_RESOURCE = 6,
+   E_OS_STATE = 7,
+   E_OS_VALUE = 8,
+   E_OS_SYS_StackOverflow = 20,
+   E_OS_SYS_StackUnderflow = 21,
+   E_OS_SYS_INIT = 22,
+   E_OS_SYS_CONFIG = 23,
+   E_OS_SYS_CODE = 24,
+   E_OS_SYS_TOOL = 25,
+   E_OS_SYS_TimerRange = 26
+};
+
+enum
+{
+   SUSPENDED = 0x00,
+   READY = 0x01,
+   RUNNING = 0x02,
+   WAITING = 0x03,
+   INTSTART = 0x08,
+   SETSTART = 0x10,
+   NPRTASK = 0x20,
+   USEFP = 0x40
+};
+
+typedef struct
+{
+   TickType maxallowedvalue;
+   TickType ticksperbase;
+} AlarmBaseType;
+
+typedef TaskType *TaskRefType;
+typedef TaskStateType *TaskStateRefType;
+typedef EventMaskType *EventMaskRefType;
+typedef TickType *TickRefType;
+typedef AlarmBaseType *AlarmBaseRefType;
+typedef OSEK_U8 AppModeType;
+typedef OSEK_U8 OSEKOSTaskActCntType;
+
+TaskType OSEKOStidact;
+OSEKOSPrioType OSEKOSrunprio;
+
+StatusType OSEKOSError ( register StatusType );
+void ErrorHook ( StatusType );
+void StartupHook ( void );
+void ShutdownHook ( StatusType );
+
+int getUsedTaskStack ( TaskType );
+int getUnusedTaskStack ( TaskType );
+int getUsedIsrStack ( void );
+int getUnusedIsrStack ( void );
+void OSEKOStaskStackCheckInit ( void );
+signed char OSEKOStaskStackCheck ( OSEK_U8 * );
+signed char OSEKOSisrStackCheck ( OSEK_U8 * );
+void OSEKOStaskStackCheckFatal ( OSEK_U8 * );
+void OSEKOSisrStackCheckFatal ( OSEK_U8 * );
+OSEK_U8 * OSEKOSgetStackPointer ( void );
+void OSEKOSTaskSwitch ( void );
+StatusType OSEKOSReturn ( StatusType );
+StatusType OSEKOSActivateTask ( register TaskType );
+void OSEKOSTerminateTask ( TaskType, TaskType );
+
+   extern void OSEKOSGetResource ( ResourceType );
+   extern void OSEKOSReleaseResource ( ResourceType );
+
+int OSEKOSSetEvent ( TaskType, EventMaskType );
+int OSEKOSWaitEvent ( EventMaskType );
+TickType OSEKOSGetAlarm(register AlarmType);
+void OSEKOSSetAlarm ( AlarmType, TickType, TickType );
+StatusType OSEKOSSetAbsAlarm ( AlarmType a, TickType b, TickType c );
+
+StatusType OSEKOSCancelAlarm ( register AlarmType );
+void OSEKOSAdvCntr ( void );
+AppModeType GetActiveApplicationMode ( void );
+
+void StartOS ( AppModeType );
+
+void OSEKOSShutdownOS ( StatusType );
+
+StatusType ActivateTask ( TaskType A );
+StatusType TerminateTask ( void );
+StatusType ChainTask ( TaskType A );
+StatusType GetTaskState ( TaskType A, TaskStateRefType B );
+StatusType GetTaskID ( TaskRefType A );
+StatusType Schedule ( void );
+StatusType GetResource ( ResourceType A );
+StatusType ReleaseResource ( ResourceType A );
+StatusType SetEvent ( TaskType A, EventMaskType B );
+StatusType ClearEvent ( EventMaskType A );
+StatusType WaitEvent ( EventMaskType A );
+StatusType GetEvent ( TaskType A, EventMaskRefType B );
+StatusType GetAlarm ( AlarmType A, TickRefType B );
+StatusType GetAlarmBase ( AlarmType A, AlarmBaseRefType B );
+StatusType SetRelAlarm ( AlarmType A, TickType B, TickType C );
+StatusType SetAbsAlarm ( AlarmType A, TickType B, TickType C );
+StatusType CancelAlarm ( AlarmType A );
+StatusType AdvCntr ( CounterType A );
+StatusType IAdvCntr ( CounterType A );
+void SuspendOSInterrupts ( void );
+void ResumeOSInterrupts ( void );
+void SuspendAllInterrupts ( void );
+void ResumeAllInterrupts ( void );
+void DisableAllInterrupts ( void );
+void EnableAllInterrupts ( void );
+
+void OSEKOSDisable(void);
+void OSEKOSEnable(void);
+void OSEKOSAsmIDispatch(unsigned long *);
+void OSEKOSAsmDispatch(OSEKOSPrioType p);
+void OSEKOSStartupEnable(void);
+void OSEKOSNop(void);
+unsigned int OSEKOSV850CheckIsrSwitch(void);
+void OSEKOSV850InitInterrupts(void);
+void OSEKOSV850SetupInterrupts();
+void OSEKOSV850SyncContextLoad(OSEKOSSaveType);
+void OSEKOSV850SyncContextLoadFromIRQ(OSEKOSSaveType);
+void OSEKOSV850ASyncContextLoad(OSEKOSSaveType);
+void OSEKOSV850ASyncContextLoadFromIRQ(OSEKOSSaveType);
+
+// arrays of function pointers - they look like function prototypes
+void ( ( * const OSEKOStaskStartAddress [10] ) ( void ) );
+StatusType (* OSEKOStaskStatuses [10][5]) ( void );
+
+void OSEKOSV850StartContext
+(
+    OSEK_TASK (( * const ) ( void )),
+    OSEK_U8 * const
+);
+void OSEKOSV850StartContextFromIRQ
+(
+    OSEK_TASK (( * const ) ( void )),
+    OSEK_U8 * const
+);
+
+void OSEKOSSuspendOSInterrupts(void);
+void OSEKOSResumeOSInterrupts(void);
+void OSEKOSSuspendAllInterrupts(void);
+void OSEKOSResumeAllInterrupts(void);
+void OSEKOScheckSuspendResumeNesting(void);
+
+
+void OSEKOSgetSR(void);
+void OSEKOSEnableInterrupt_intern(int nr);
+void OSEKOSDisableInterrupt_intern(int nr);
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_compilation/parsing.h b/FreeRTOS-Plus/Test/CMock/test/system/test_compilation/parsing.h
new file mode 100644
index 000000000..d4734f448
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_compilation/parsing.h
@@ -0,0 +1,89 @@
+/* ==========================================
+    CMock Project - Automatic Mock Generation for C
+    Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+========================================== */
+
+typedef unsigned short U16;
+typedef signed int int32_t;
+
+/* CMock should handle UTF-8 characters in comments. The world is an awesomely diverse place! */
+/* my µC Rocks! Open Source, not ©! My language has no Ümlauts! ǺƜ�ƧǾɱɛ! */ /**! Illegal: åäö */
+
+typedef struct _POINT_T
+{
+  int x;
+  int y;
+} POINT_T;
+
+// typedef edge case;
+// not ANSI C but it has been done and will break cmock if not handled
+typedef void VOID_TYPE_CRAZINESS;
+
+/* fun parsing & mock generation cases */
+
+void var_args1(int a, ...);
+void var_args2(int a, int b, ...);
+
+VOID_TYPE_CRAZINESS void_type_craziness1(int, float, double, char, short, long, long int, long long, void*);
+int void_type_craziness2( VOID_TYPE_CRAZINESS );
+
+   void  crazy_whitespace  (   int    lint, double shot  ,  short  stack )  ;
+
+char
+ crazy_multiline
+(
+  int a,
+  unsigned int b);
+
+U16  *ptr_return1(int a);
+U16*  ptr_return2(int a);
+U16 * ptr_return3(int a);
+
+unsigned int** ptr_ptr_return1(unsigned int** a);
+unsigned int* *ptr_ptr_return2(unsigned int* *a);
+unsigned int **ptr_ptr_return3(unsigned int **a);
+unsigned int ** ptr_ptr_return4(unsigned int ** a);
+
+extern unsigned long int incredible_descriptors(register const unsigned short a);
+
+int32_t example_c99_type(int32_t param1);
+
+void I2CIntRegister(uint32_t ui32Base, void (*pfnHandler)(void));
+
+/* these are function pointers, not function declarations USING a function pointer, and so should NOT get mocked */
+int (* func_pointer)(void);
+extern int (*another_func_pointer)(unsigned int argument);
+struct struct_to_be_ignored {
+  union {
+    int i32;
+    void *p;
+  } variant;
+  void (*a_function_pointer_in_a_struct)(void *);
+};
+
+typedef struct
+{
+  uint32_t a;
+  struct
+  {
+    uint32_t bb;
+    float bc;
+    float bd;
+  } b;
+  int (*another_function_pointer_in_a_struct) (void);
+} another_thing_that_should_get_ignored;
+
+inline int stuff(int num)
+{
+    int reg = 0x12;
+    if (num > 0)
+    {
+      reg |= (0x0Eu);
+    }
+    else
+    {
+      reg |= (0x07u);
+    }
+    return reg;
+}
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/all_plugins_but_other_limits.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/all_plugins_but_other_limits.yml
new file mode 100644
index 000000000..9349c00f6
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/all_plugins_but_other_limits.yml
@@ -0,0 +1,375 @@
+---
+#this test is different than all_plugins_coexist primarily because of these options
+:cmock:
+  :enforce_strict_ordering: 1
+  :treat_externs: :include
+  :plugins:
+  - :array
+  - :cexception
+  - :ignore
+  - :callback
+  - :return_thru_ptr
+  - :ignore_arg
+  - :expect_any_args
+
+:systest:
+  :types: |
+    typedef struct _POINT_T {
+      int x;
+      int y;
+    } POINT_T;
+
+  :mockable: |
+    #include  "CException.h"
+    void foo(POINT_T* a);
+    POINT_T* bar(void);
+    void fooa(POINT_T a[]);
+    void foos(const char * a);
+    extern const char* bars(void);
+    void no_pointers(int a, const char* b);
+    int mixed(int a, int* b, int c);
+    void no_args(void);
+
+  :source:
+    :header: |
+      #include "CException.h"
+      void function_a(void);
+      void function_b(void);
+      void function_c(void);
+      int function_d(void);
+      void function_e(void);
+
+    :code: |
+      void function_a(void)
+      {
+        foo(bar());
+      }
+
+      void function_b(void) {
+        fooa(bar());
+      }
+
+      void function_c(void) {
+        CEXCEPTION_T e;
+        Try {
+          foos(bars());
+        } Catch(e) { foos("err"); }
+      }
+
+      int function_d(void) {
+        int test_list[] = { 1, 2, 3, 4, 5 };
+        no_pointers(1, "silly");
+        return mixed(6, test_list, 7);
+      }
+
+      void function_e(void) {
+        foos("Hello");
+        foos("Tuna");
+        foos("Oranges");
+      }
+
+  :tests:
+    :common: |
+      #include "CException.h"
+      void setUp(void) {}
+      void tearDown(void) {}
+
+    :units:
+    - :pass: TRUE
+      :should: 'handle the situation where we pass nulls to pointers'
+      :code: |
+        test()
+        {
+          bar_ExpectAndReturn(NULL);
+          foo_Expect(NULL);
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'handle the situation where we expected nulls to pointers but did not get that'
+      :code: |
+        test()
+        {
+          POINT_T pt = {1, 2};
+          bar_ExpectAndReturn(&pt);
+          foo_Expect(NULL);
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'handle the situation where we did not expect nulls to pointers but got null'
+      :code: |
+        test()
+        {
+          POINT_T ex = {1, 2};
+          bar_ExpectAndReturn(NULL);
+          foo_Expect(&ex);
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'handle the situation where we pass single object with expect and it is wrong'
+      :code: |
+        test()
+        {
+          POINT_T pt = {1, 2};
+          POINT_T ex = {1, 3};
+          bar_ExpectAndReturn(&pt);
+          foo_Expect(&ex);
+
+          function_a();
+        }
+
+    - :pass: TRUE
+      :should: 'handle the situation where we pass single object with expect and use array handler'
+      :code: |
+        test()
+        {
+          POINT_T pt = {1, 2};
+          POINT_T ex = {1, 2};
+          bar_ExpectAndReturn(&pt);
+          foo_ExpectWithArray(&ex, 1);
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'handle the situation where we pass single object with expect and use array handler and it is wrong'
+      :code: |
+        test()
+        {
+          POINT_T pt = {1, 2};
+          POINT_T ex = {1, 3};
+          bar_ExpectAndReturn(&pt);
+          foo_ExpectWithArray(&ex, 1);
+
+          function_a();
+        }
+
+    - :pass: TRUE
+      :should: 'handle the situation where we pass multiple objects with expect and use array handler'
+      :code: |
+        test()
+        {
+          POINT_T pt[] = {{1, 2}, {3, 4}, {5, 6}};
+          POINT_T ex[] = {{1, 2}, {3, 4}, {5, 6}};
+          bar_ExpectAndReturn(pt);
+          foo_ExpectWithArray(ex, 3);
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'handle the situation where we pass multiple objects with expect and use array handler and it is wrong at end'
+      :code: |
+        test()
+        {
+          POINT_T pt[] = {{1, 2}, {3, 4}, {5, 6}};
+          POINT_T ex[] = {{1, 2}, {3, 4}, {5, 9}};
+          bar_ExpectAndReturn(pt);
+          foo_ExpectWithArray(ex, 3);
+
+          function_a();
+        }
+
+    - :pass: TRUE
+      :should: 'handle the situation where we pass single array element with expect'
+      :code: |
+        test()
+        {
+          POINT_T pt = {1, 2};
+          POINT_T ex = {1, 2};
+          bar_ExpectAndReturn(&pt);
+          fooa_Expect(&ex);
+
+          function_b();
+        }
+
+    - :pass: TRUE
+      :should: 'handle standard c string as null terminated and not do crappy memory compares of a byte, passing'
+      :code: |
+        test()
+        {
+          const char* constretval = "This is a\0 silly string";
+          char* retval = (char*)constretval;
+          bars_ExpectAndReturn(retval);
+          foos_Expect("This is a\0 wacky string");
+
+          function_c();
+        }
+
+    - :pass: FALSE
+      :should: 'handle standard c string as null terminated and not do crappy memory compares of a byte, finding failures'
+      :code: |
+        test()
+        {
+          const char* constretval = "This is a silly string";
+          char* retval = (char*)constretval;
+          bars_ExpectAndReturn(retval);
+          foos_Expect("This is a wacky string");
+
+          function_c();
+        }
+
+    - :pass: TRUE
+      :should: 'handle creating array expects when we have mixed arguments for single object'
+      :code: |
+        test()
+        {
+          int expect_list[] = { 1, 9 };
+          no_pointers_Expect(1, "silly");
+          mixed_ExpectAndReturn(6, expect_list, 7, 13);
+
+          TEST_ASSERT_EQUAL(13, function_d());
+        }
+
+    - :pass: FALSE
+      :should: 'handle creating array expects when we have mixed arguments and handle failures for single object'
+      :code: |
+        test()
+        {
+          int expect_list[] = { 9, 1 };
+          no_pointers_Expect(1, "silly");
+          mixed_ExpectAndReturn(6, expect_list, 7, 13);
+
+          TEST_ASSERT_EQUAL(13, function_d());
+        }
+
+    - :pass: TRUE
+      :should: 'handle creating array expects when we have mixed arguments for multiple objects'
+      :code: |
+        test()
+        {
+          int expect_list[] = { 1, 2, 3, 4, 6 };
+          no_pointers_Expect(1, "silly");
+          mixed_ExpectWithArrayAndReturn(6, expect_list, 4, 7, 13);
+
+          TEST_ASSERT_EQUAL(13, function_d());
+        }
+
+    - :pass: FALSE
+      :should: 'handle creating array expects when we have mixed arguments and handle failures for multiple objects'
+      :code: |
+        test()
+        {
+          int expect_list[] = { 1, 2, 3, 4, 6 };
+          no_pointers_Expect(1, "silly");
+          mixed_ExpectWithArrayAndReturn(6, expect_list, 5, 7, 13);
+
+          TEST_ASSERT_EQUAL(13, function_d());
+        }
+
+    - :pass: TRUE
+      :should: 'handle an exception being caught'
+      :code: |
+        test()
+        {
+          const char* constretval = "This is a\0 silly string";
+          char* retval = (char*)constretval;
+          bars_ExpectAndReturn(retval);
+          foos_ExpectAndThrow("This is a\0 wacky string", 55);
+          foos_Expect("err");
+
+          function_c();
+        }
+
+    - :pass: FALSE
+      :should: 'handle an exception being caught but still catch following errors'
+      :code: |
+        test()
+        {
+          const char* constretval = "This is a\0 silly string";
+          char* retval = (char*)constretval;
+          bars_ExpectAndReturn(retval);
+          foos_ExpectAndThrow("This is a\0 wacky string", 55);
+          foos_Expect("wrong error");
+
+          function_c();
+        }
+
+    - :pass: FALSE
+      :should: 'fail strict ordering problems even though we would otherwise have passed'
+      :code: |
+        test()
+        {
+          int expect_list[] = { 1, 2, 3, 4, 6 };
+          mixed_ExpectWithArrayAndReturn(6, expect_list, 4, 7, 13);
+          no_pointers_Expect(1, "silly");
+
+          TEST_ASSERT_EQUAL(13, function_d());
+        }
+
+    - :pass: TRUE
+      :should: 'properly ExpectAnyArgs first function but the other will work properly'
+      :code: |
+        test()
+        {
+          int expect_list[] = { 1, 2, 3, 4, 6 };
+          no_pointers_ExpectAnyArgs();
+          mixed_ExpectWithArrayAndReturn(6, expect_list, 4, 7, 13);
+
+          TEST_ASSERT_EQUAL(13, function_d());
+        }
+
+    - :pass: TRUE
+      :should: 'properly ExpectAnyArgs last function but the other will work properly'
+      :code: |
+        test()
+        {
+          no_pointers_Expect(1, "silly");
+          mixed_ExpectAnyArgsAndReturn(13);
+
+          TEST_ASSERT_EQUAL(13, function_d());
+        }
+
+    - :pass: TRUE
+      :should: 'be ok if we ExpectAnyArgs a call each because we are counting calls'
+      :code: |
+        test()
+        {
+          foos_ExpectAnyArgs();
+          foos_ExpectAnyArgs();
+          foos_ExpectAnyArgs();
+
+          function_e();
+        }
+
+    - :pass: TRUE
+      :should: 'be ok if we ExpectAnyArgs and Expect intermixed because we are counting calls'
+      :code: |
+        test()
+        {
+          foos_Expect("Hello");
+          foos_ExpectAnyArgs();
+          foos_ExpectAnyArgs();
+
+          function_e();
+        }
+
+    - :pass: FALSE
+      :should: 'be able to detect Expect problem if we ExpectAnyArgs and Expect intermixed'
+      :code: |
+        test()
+        {
+          foos_Expect("Hello");
+          foos_ExpectAnyArgs();
+          foos_Expect("Wrong");
+
+          function_e();
+        }
+
+    - :pass: FALSE
+      :should: 'fail if we do not ExpectAnyArgs a call once because we are counting calls'
+      :code: |
+        test()
+        {
+          foos_ExpectAnyArgs();
+          foos_ExpectAnyArgs();
+
+          function_e();
+        }
+
+...
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/all_plugins_coexist.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/all_plugins_coexist.yml
new file mode 100644
index 000000000..f1c4e38a4
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/all_plugins_coexist.yml
@@ -0,0 +1,460 @@
+---
+:cmock:
+  :enforce_strict_ordering: 1
+  :plugins:
+  - :array
+  - :cexception
+  - :ignore
+  - :callback
+  - :return_thru_ptr
+  - :ignore_arg
+  - :expect_any_args
+  :callback_after_arg_check: true
+  :callback_include_count: false
+  :treat_externs: :include
+  :treat_inlines: :include
+
+:systest:
+  :types: |
+    typedef struct _POINT_T {
+      int x;
+      int y;
+    } POINT_T;
+
+  :mockable: |
+    #include  "CException.h"
+    extern void foo(POINT_T* a);
+    POINT_T* bar(void);
+    void fooa(POINT_T a[]);
+    void foos(const char * a);
+    const char * bars(void);
+    void no_pointers(int a, const char* b);
+    int mixed(int a, int* b, int c);
+    void no_args(void);
+
+  :source:
+    :header: |
+      #include "CException.h"
+      void function_a(void);
+      void function_b(void);
+      void function_c(void);
+      int function_d(void);
+      void function_e(void);
+      int function_f(void);
+
+    :code: |
+      void function_a(void)
+      {
+        foo(bar());
+      }
+
+      void function_b(void) {
+        fooa(bar());
+      }
+
+      void function_c(void) {
+        CEXCEPTION_T e;
+        Try {
+          foos(bars());
+        } Catch(e) { foos("err"); }
+      }
+
+      int function_d(void) {
+        int test_list[] = { 1, 2, 3, 4, 5 };
+        no_pointers(1, "silly");
+        return mixed(6, test_list, 7);
+      }
+
+      void function_e(void) {
+        foos("Hello");
+        foos("Tuna");
+        foos("Oranges");
+      }
+
+      int function_f(void) {
+        int a = 1;
+        int b = 2;
+        int c;
+        POINT_T* pt = bar();
+        c = pt->x;
+        c = mixed(a, &b, c);
+        return b + c;
+      }
+
+  :tests:
+    :common: |
+      #include "CException.h"
+      void setUp(void) {}
+      void tearDown(void) {}
+      void my_foo_callback(POINT_T* a) { TEST_ASSERT_EQUAL_INT(2, a->x); }
+      int  my_mixed_callback(int a, int* b, int c) { return a + *b + c; }
+
+    :units:
+    - :pass: TRUE
+      :should: 'handle the situation where we pass nulls to pointers'
+      :code: |
+        test()
+        {
+          bar_ExpectAndReturn(NULL);
+          foo_Expect(NULL);
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'handle the situation where we expected nulls to pointers but did not get that'
+      :code: |
+        test()
+        {
+          POINT_T pt = {1, 2};
+          bar_ExpectAndReturn(&pt);
+          foo_Expect(NULL);
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'handle the situation where we did not expect nulls to pointers but got null'
+      :code: |
+        test()
+        {
+          POINT_T ex = {1, 2};
+          bar_ExpectAndReturn(NULL);
+          foo_Expect(&ex);
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'handle the situation where we pass single object with expect and it is wrong'
+      :code: |
+        test()
+        {
+          POINT_T pt = {1, 2};
+          POINT_T ex = {1, 3};
+          bar_ExpectAndReturn(&pt);
+          foo_Expect(&ex);
+
+          function_a();
+        }
+
+    - :pass: TRUE
+      :should: 'handle the situation where we pass single object with expect and use array handler'
+      :code: |
+        test()
+        {
+          POINT_T pt = {1, 2};
+          POINT_T ex = {1, 2};
+          bar_ExpectAndReturn(&pt);
+          foo_ExpectWithArray(&ex, 1);
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'handle the situation where we pass single object with expect and use array handler and it is wrong'
+      :code: |
+        test()
+        {
+          POINT_T pt = {1, 2};
+          POINT_T ex = {1, 3};
+          bar_ExpectAndReturn(&pt);
+          foo_ExpectWithArray(&ex, 1);
+
+          function_a();
+        }
+
+    - :pass: TRUE
+      :should: 'handle the situation where we pass multiple objects with expect and use array handler'
+      :code: |
+        test()
+        {
+          POINT_T pt[] = {{1, 2}, {3, 4}, {5, 6}};
+          POINT_T ex[] = {{1, 2}, {3, 4}, {5, 6}};
+          bar_ExpectAndReturn(pt);
+          foo_ExpectWithArray(ex, 3);
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'handle the situation where we pass multiple objects with expect and use array handler and it is wrong at end'
+      :code: |
+        test()
+        {
+          POINT_T pt[] = {{1, 2}, {3, 4}, {5, 6}};
+          POINT_T ex[] = {{1, 2}, {3, 4}, {5, 9}};
+          bar_ExpectAndReturn(pt);
+          foo_ExpectWithArray(ex, 3);
+
+          function_a();
+        }
+
+    - :pass: TRUE
+      :should: 'handle the situation where we pass single array element with expect'
+      :code: |
+        test()
+        {
+          POINT_T pt = {1, 2};
+          POINT_T ex = {1, 2};
+          bar_ExpectAndReturn(&pt);
+          fooa_Expect(&ex);
+
+          function_b();
+        }
+
+    - :pass: TRUE
+      :should: 'handle standard c string as null terminated and not do crappy memory compares of a byte, passing'
+      :code: |
+        test()
+        {
+          const char* retval = "This is a\0 silly string";
+          bars_ExpectAndReturn((char*)retval);
+          foos_Expect("This is a\0 wacky string");
+
+          function_c();
+        }
+
+    - :pass: FALSE
+      :should: 'handle standard c string as null terminated and not do crappy memory compares of a byte, finding failures'
+      :code: |
+        test()
+        {
+          const char* retval = "This is a silly string";
+          bars_ExpectAndReturn((char*)retval);
+          foos_Expect("This is a wacky string");
+
+          function_c();
+        }
+
+    - :pass: TRUE
+      :should: 'handle creating array expects when we have mixed arguments for single object'
+      :code: |
+        test()
+        {
+          int expect_list[] = { 1, 9 };
+          no_pointers_Expect(1, "silly");
+          mixed_ExpectAndReturn(6, expect_list, 7, 13);
+
+          TEST_ASSERT_EQUAL(13, function_d());
+        }
+
+    - :pass: FALSE
+      :should: 'handle creating array expects when we have mixed arguments and handle failures for single object'
+      :code: |
+        test()
+        {
+          int expect_list[] = { 9, 1 };
+          no_pointers_Expect(1, "silly");
+          mixed_ExpectAndReturn(6, expect_list, 7, 13);
+
+          TEST_ASSERT_EQUAL(13, function_d());
+        }
+
+    - :pass: TRUE
+      :should: 'handle creating array expects when we have mixed arguments for multiple objects'
+      :code: |
+        test()
+        {
+          int expect_list[] = { 1, 2, 3, 4, 6 };
+          no_pointers_Expect(1, "silly");
+          mixed_ExpectWithArrayAndReturn(6, expect_list, 4, 7, 13);
+
+          TEST_ASSERT_EQUAL(13, function_d());
+        }
+
+    - :pass: FALSE
+      :should: 'handle creating array expects when we have mixed arguments and handle failures for multiple objects'
+      :code: |
+        test()
+        {
+          int expect_list[] = { 1, 2, 3, 4, 6 };
+          no_pointers_Expect(1, "silly");
+          mixed_ExpectWithArrayAndReturn(6, expect_list, 5, 7, 13);
+
+          TEST_ASSERT_EQUAL(13, function_d());
+        }
+
+    - :pass: TRUE
+      :should: 'handle an exception being caught'
+      :code: |
+        test()
+        {
+          const char* retval = "This is a\0 silly string";
+          bars_ExpectAndReturn((char*)retval);
+          foos_ExpectAndThrow("This is a\0 wacky string", 55);
+          foos_Expect("err");
+
+          function_c();
+        }
+
+    - :pass: FALSE
+      :should: 'handle an exception being caught but still catch following errors'
+      :code: |
+        test()
+        {
+          const char* retval = "This is a\0 silly string";
+          bars_ExpectAndReturn((char*)retval);
+          foos_ExpectAndThrow("This is a\0 wacky string", 55);
+          foos_Expect("wrong error");
+
+          function_c();
+        }
+
+    - :pass: FALSE
+      :should: 'fail strict ordering problems even though we would otherwise have passed'
+      :code: |
+        test()
+        {
+          int expect_list[] = { 1, 2, 3, 4, 6 };
+          mixed_ExpectWithArrayAndReturn(6, expect_list, 4, 7, 13);
+          no_pointers_Expect(1, "silly");
+
+          TEST_ASSERT_EQUAL(13, function_d());
+        }
+
+    - :pass: TRUE
+      :should: 'that we can properly ignore last  function but the other will work properly'
+      :code: |
+        test()
+        {
+          int expect_list[] = { 1, 2, 3, 4, 6 };
+          mixed_ExpectWithArrayAndReturn(6, expect_list, 4, 7, 13);
+          no_pointers_Ignore();
+
+          TEST_ASSERT_EQUAL(13, function_d());
+        }
+
+    - :pass: TRUE
+      :should: 'that we can properly ignore first function but the other will work properly'
+      :code: |
+        test()
+        {
+          mixed_IgnoreAndReturn(13);
+          no_pointers_Expect(1, "silly");
+
+          TEST_ASSERT_EQUAL(13, function_d());
+        }
+
+    - :pass: TRUE
+      :should: 'that we just have to ignore a call once because we are not counting calls'
+      :code: |
+        test()
+        {
+          foos_Ignore();
+
+          function_e();
+        }
+
+    - :pass: TRUE
+      :should: 'that we can use a callback and an expect'
+      :code: |
+        test()
+        {
+          POINT_T pt1 = {2, 3};
+          POINT_T pt2 = {2, 3};
+          bar_ExpectAndReturn(&pt1);
+          foo_Expect(&pt2);
+          foo_StubWithCallback((CMOCK_foo_CALLBACK)my_foo_callback);
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'that we can fail even when using a callback if we want to expect call but did not and we are checking that'
+      :code: |
+        test()
+        {
+          POINT_T pt = {2, 3};
+          bar_ExpectAndReturn(&pt);
+          foo_StubWithCallback((CMOCK_foo_CALLBACK)my_foo_callback);
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'that we can fail even when using a callback if args are wrong and we are checking those'
+      :code: |
+        test()
+        {
+          POINT_T pt1 = {2, 3};
+          POINT_T pt2 = {1, 3};
+          bar_ExpectAndReturn(&pt1);
+          foo_Expect(&pt2);
+          foo_StubWithCallback((CMOCK_foo_CALLBACK)my_foo_callback);
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'that we can fail from the callback itself'
+      :code: |
+        test()
+        {
+          POINT_T pt = {3, 3};
+          bar_ExpectAndReturn(&pt);
+          foo_Expect(&pt);
+          foo_StubWithCallback((CMOCK_foo_CALLBACK)my_foo_callback);
+
+          function_a();
+        }
+
+    - :pass: TRUE
+      :should: 'that a callback return value overrides the one from ExpectAndReturn'
+      :code: |
+        test()
+        {
+          int b = 2;
+          POINT_T pt1 = {3, 4};
+          bar_ExpectAndReturn(&pt1);
+          mixed_StubWithCallback((CMOCK_mixed_CALLBACK)my_mixed_callback);
+          mixed_ExpectAndReturn(1,&b,3,100);
+
+          TEST_ASSERT_EQUAL(8, function_f());
+        }
+
+    - :pass: TRUE
+      :should: 'that a callback return value overrides the one from ExpectAndReturn AND ReturnThruPtr still works'
+      :code: |
+        test()
+        {
+          int b_in = 2;
+          int b_out = 3;
+          POINT_T pt1 = {3, 4};
+          bar_ExpectAndReturn(&pt1);
+          mixed_StubWithCallback((CMOCK_mixed_CALLBACK)my_mixed_callback);
+          mixed_ExpectAndReturn(1,&b_in,3,100);
+          mixed_ReturnThruPtr_b(&b_out);
+
+          TEST_ASSERT_EQUAL(9, function_f()); // (a=1, bin=2, c=pt.x=3, bout=3, sum=9)
+        }
+
+    - :pass: TRUE
+      :should: 'that a callback return value overrides the one from ExpectAnyArgs'
+      :code: |
+        test()
+        {
+          POINT_T pt1 = {5, 4};
+          bar_ExpectAndReturn(&pt1);
+          mixed_StubWithCallback((CMOCK_mixed_CALLBACK)my_mixed_callback);
+          mixed_ExpectAnyArgsAndReturn(100);
+
+          TEST_ASSERT_EQUAL(10, function_f()); // (a=1, bin=2, c=pt.x=5, bout=2, sum=10)
+        }
+
+    - :pass: TRUE
+      :should: 'that a callback return value overrides the one from ExpectAnyArgs AND ReturnThruPtr still works'
+      :code: |
+        test()
+        {
+          int b_out = 3;
+          POINT_T pt1 = {5, 4};
+          bar_ExpectAndReturn(&pt1);
+          mixed_StubWithCallback((CMOCK_mixed_CALLBACK)my_mixed_callback);
+          mixed_ExpectAnyArgsAndReturn(100);
+          mixed_ReturnThruPtr_b(&b_out);
+
+          TEST_ASSERT_EQUAL(11, function_f()); // (a=1, bin=2, c=pt.x=5, bout=3, sum=11)
+        }
+
+...
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/array_and_pointer_handling.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/array_and_pointer_handling.yml
new file mode 100644
index 000000000..ce8928741
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/array_and_pointer_handling.yml
@@ -0,0 +1,446 @@
+---
+:cmock:
+  :when_ptr: :smart
+  :plugins:
+  - :array
+
+:systest:
+  :types: |
+    typedef struct _POINT_T {
+      int x;
+      int y;
+    } POINT_T;
+    #define ARRAY_A_SIZE  (5)
+
+  :mockable: |
+    void foo(POINT_T* a);
+    POINT_T* bar(void);
+    void fooa(POINT_T a[ARRAY_A_SIZE+1-1]);
+    void foos(const char * a);
+    const char * bars(void);
+    void no_pointers(int a, const char* b);
+    int mixed(int a, int* b, int c);
+    void potential_packing_problem(short *a);
+    void voidpointerfunc(void* a);
+
+  :source:
+    :header: |
+      void function_a(void);
+      void function_b(void);
+      void function_c(void);
+      int  function_d(void);
+      void function_e(void);
+      void function_f(void);
+
+    :code: |
+      void function_a(void)
+      {
+        foo(bar());
+      }
+
+      void function_b(void) {
+        fooa(bar());
+      }
+
+      void function_c(void) {
+        foos(bars());
+      }
+
+      int function_d(void) {
+        int test_list[] = { 1, 2, 3, 4, 5 };
+        no_pointers(1, "silly");
+        return mixed(6, test_list, 7);
+      }
+
+      void function_e(void) {
+        short test_list[] = {-1, -2, -3, -4};
+        potential_packing_problem(&test_list[1]);
+      }
+
+      void function_f(void) {
+        char arg[6] = "hello";
+        voidpointerfunc(arg);
+      }
+
+  :tests:
+    :common: |
+      void setUp(void) {}
+      void tearDown(void) {}
+
+    :units:
+    - :pass: TRUE
+      :should: 'handle the situation where we pass nulls to pointers'
+      :code: |
+        test()
+        {
+          bar_ExpectAndReturn(NULL);
+          foo_Expect(NULL);
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'handle the situation where we expected nulls to pointers but did not get that'
+      :code: |
+        test()
+        {
+          POINT_T pt = {1, 2};
+          bar_ExpectAndReturn(&pt);
+          foo_Expect(NULL);
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'handle the situation where we did not expect nulls to pointers but got null'
+      :code: |
+        test()
+        {
+          POINT_T ex = {1, 2};
+          bar_ExpectAndReturn(NULL);
+          foo_Expect(&ex);
+
+          function_a();
+        }
+
+    - :pass: TRUE
+      :should: 'handle the situation where it falls back to pointers because you asked it to compare 0 elements'
+      :code: |
+        test()
+        {
+          POINT_T ex = {1, 2};
+          bar_ExpectAndReturn(&ex);
+          foo_ExpectWithArray(&ex, 0);
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'handle the situation where it fails because you asked it to compare zero elements and the pointers do not match'
+      :code: |
+        test()
+        {
+          POINT_T ex = {1, 2};
+          POINT_T pt = {1, 2};
+          bar_ExpectAndReturn(&pt);
+          foo_ExpectWithArray(&ex, 0);
+
+          function_a();
+        }
+
+    - :pass: TRUE
+      :should: 'handle the situation where we pass single object with expect'
+      :code: |
+        test()
+        {
+          POINT_T pt = {1, 2};
+          POINT_T ex = {1, 2};
+          bar_ExpectAndReturn(&pt);
+          foo_Expect(&ex);
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'handle the situation where we pass single object with expect and it is wrong'
+      :code: |
+        test()
+        {
+          POINT_T pt = {1, 2};
+          POINT_T ex = {1, 3};
+          bar_ExpectAndReturn(&pt);
+          foo_Expect(&ex);
+
+          function_a();
+        }
+
+    - :pass: TRUE
+      :should: 'handle the situation where we pass single object with expect and use array handler'
+      :code: |
+        test()
+        {
+          POINT_T pt = {1, 2};
+          POINT_T ex = {1, 2};
+          bar_ExpectAndReturn(&pt);
+          foo_ExpectWithArray(&ex, 1);
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'handle the situation where we pass single object with expect and use array handler and it is wrong'
+      :code: |
+        test()
+        {
+          POINT_T pt = {1, 2};
+          POINT_T ex = {1, 3};
+          bar_ExpectAndReturn(&pt);
+          foo_ExpectWithArray(&ex, 1);
+
+          function_a();
+        }
+
+    - :pass: TRUE
+      :should: 'handle the situation where we pass multiple objects with expect and use array handler'
+      :code: |
+        test()
+        {
+          POINT_T pt[] = {{1, 2}, {3, 4}, {5, 6}};
+          POINT_T ex[] = {{1, 2}, {3, 4}, {5, 6}};
+          bar_ExpectAndReturn(pt);
+          foo_ExpectWithArray(ex, 3);
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'handle the situation where we pass multiple objects with expect and use array handler and it is wrong at start'
+      :code: |
+        test()
+        {
+          POINT_T pt[] = {{1, 2}, {3, 4}, {5, 6}};
+          POINT_T ex[] = {{9, 2}, {3, 4}, {5, 6}};
+          bar_ExpectAndReturn(pt);
+          foo_ExpectWithArray(ex, 3);
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'handle the situation where we pass multiple objects with expect and use array handler and it is wrong at end'
+      :code: |
+        test()
+        {
+          POINT_T pt[] = {{1, 2}, {3, 4}, {5, 6}};
+          POINT_T ex[] = {{1, 2}, {3, 4}, {5, 9}};
+          bar_ExpectAndReturn(pt);
+          foo_ExpectWithArray(ex, 3);
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'handle the situation where we pass multiple objects with expect and use array handler and it is wrong in middle'
+      :code: |
+        test()
+        {
+          POINT_T pt[] = {{1, 2}, {3, 4}, {5, 6}};
+          POINT_T ex[] = {{1, 2}, {3, 9}, {5, 6}};
+          bar_ExpectAndReturn(pt);
+          foo_ExpectWithArray(ex, 3);
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'handle the situation where we pass nulls to pointers and fail'
+      :code: |
+        test()
+        {
+          POINT_T pt = {1, 2};
+          bar_ExpectAndReturn(&pt);
+          foo_Expect(NULL);
+
+          function_a();
+        }
+
+    - :pass: TRUE
+      :should: 'handle the situation where we pass nulls to arrays'
+      :code: |
+        test()
+        {
+          bar_ExpectAndReturn(NULL);
+          fooa_Expect(NULL);
+
+          function_b();
+        }
+
+    - :pass: TRUE
+      :should: 'handle the situation where we pass single array element with expect'
+      :code: |
+        test()
+        {
+          POINT_T pt = {1, 2};
+          POINT_T ex = {1, 2};
+          bar_ExpectAndReturn(&pt);
+          fooa_Expect(&ex);
+
+          function_b();
+        }
+
+    - :pass: FALSE
+      :should: 'handle the situation where we pass single array element with expect and it is wrong'
+      :code: |
+        test()
+        {
+          POINT_T pt = {1, 2};
+          POINT_T ex = {1, 3};
+          bar_ExpectAndReturn(&pt);
+          fooa_Expect(&ex);
+
+          function_b();
+        }
+
+    - :pass: FALSE
+      :should: 'handle the situation where we pass nulls to arrays and fail'
+      :code: |
+        test()
+        {
+          POINT_T pt = {1, 2};
+          bar_ExpectAndReturn(&pt);
+          fooa_Expect(NULL);
+
+          function_b();
+        }
+
+    - :pass: TRUE
+      :should: 'handle standard c string as null terminated on not do crappy memory compares of a byte, passing'
+      :code: |
+        test()
+        {
+          const char* retval = "This is a\0 silly string";
+          bars_ExpectAndReturn((char*)retval);
+          foos_Expect("This is a\0 wacky string");
+
+          function_c();
+        }
+
+    - :pass: FALSE
+      :should: 'handle standard c string as null terminated on not do crappy memory compares of a byte, finding failures'
+      :code: |
+        test()
+        {
+          const char* retval = "This is a silly string";
+          bars_ExpectAndReturn((char*)retval);
+          foos_Expect("This is a wacky string");
+
+          function_c();
+        }
+
+    - :pass: TRUE
+      :should: 'handle creating array expects when we have mixed arguments for single object'
+      :code: |
+        test()
+        {
+          int expect_list[] = { 1, 9 };
+          no_pointers_Expect(1, "silly");
+          mixed_ExpectAndReturn(6, expect_list, 7, 13);
+
+          TEST_ASSERT_EQUAL(13, function_d());
+        }
+
+    - :pass: FALSE
+      :should: 'handle creating array expects when we have mixed arguments and handle failures for single object'
+      :code: |
+        test()
+        {
+          int expect_list[] = { 9, 1 };
+          no_pointers_Expect(1, "silly");
+          mixed_ExpectAndReturn(6, expect_list, 7, 13);
+
+          TEST_ASSERT_EQUAL(13, function_d());
+        }
+
+    - :pass: TRUE
+      :should: 'handle creating array expects when we have mixed arguments for multiple objects'
+      :code: |
+        test()
+        {
+          int expect_list[] = { 1, 2, 3, 4, 6 };
+          no_pointers_Expect(1, "silly");
+          mixed_ExpectWithArrayAndReturn(6, expect_list, 4, 7, 13);
+
+          TEST_ASSERT_EQUAL(13, function_d());
+        }
+
+    - :pass: FALSE
+      :should: 'handle creating array expects when we have mixed arguments and handle failures for multiple objects'
+      :code: |
+        test()
+        {
+          int expect_list[] = { 1, 2, 3, 4, 6 };
+          no_pointers_Expect(1, "silly");
+          mixed_ExpectWithArrayAndReturn(6, expect_list, 5, 7, 13);
+
+          TEST_ASSERT_EQUAL(13, function_d());
+        }
+
+    - :pass: TRUE
+      :should: 'handle a passing version of a potential packing problem (particularly try with ARM simulators)'
+      :code: |
+        test()
+        {
+          short expect_list[] = { -2, -3, -4 };
+          potential_packing_problem_ExpectWithArray(expect_list, 3);
+
+          function_e();
+        }
+
+    - :pass: FALSE
+      :should: 'handle a failing version of a potential packing problem (particularly try with ARM simulators)'
+      :code: |
+        test()
+        {
+          short expect_list[] = { -2, -3, 4 };
+          potential_packing_problem_ExpectWithArray(expect_list, 3);
+
+          function_e();
+        }
+
+    - :pass: TRUE
+      :should: 'handle a void pointers as arguments and still be able to use the array plugin'
+      :code: |
+        test()
+        {
+          char expect_list[6] = "hello";
+          voidpointerfunc_ExpectWithArray(expect_list, 5);
+
+          function_f();
+        }
+
+    - :pass: TRUE
+      :should: 'handle a void pointers as arguments and still be able to use the array plugin (short)'
+      :code: |
+        test()
+        {
+          char expect_list[6] = "help!";
+          voidpointerfunc_ExpectWithArray(expect_list, 3);
+
+          function_f();
+        }
+
+    - :pass: FALSE
+      :should: 'handle a void pointers as arguments and still be able to use the array plugin (fail)'
+      :code: |
+        test()
+        {
+          char expect_list[6] = "help!";
+          voidpointerfunc_ExpectWithArray(expect_list, 4);
+
+          function_f();
+        }
+
+    - :pass: TRUE
+      :should: 'handle a void pointer with a standard expectation (pass)'
+      :code: |
+        test()
+        {
+          char expect_list[2] = "h";
+          voidpointerfunc_Expect(expect_list);
+
+          function_f();
+        }
+
+    - :pass: FALSE
+      :should: 'handle a void pointer with a standard expectation (fail)'
+      :code: |
+        test()
+        {
+          char expect_list[2] = "g";
+          voidpointerfunc_Expect(expect_list);
+
+          function_f();
+        }
+
+
+...
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/basic_expect_and_return.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/basic_expect_and_return.yml
new file mode 100644
index 000000000..38d4edff4
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/basic_expect_and_return.yml
@@ -0,0 +1,124 @@
+---
+:cmock:
+  :plugins:
+  - # none
+
+:systest:
+  :types: |
+    #define UINT32 unsigned int
+
+    typedef signed int custom_type;
+
+  :mockable: |
+    UINT32 foo(custom_type a);
+    UINT32 bar(custom_type b);
+    UINT32 foo_varargs(custom_type a, ...);
+    const char* foo_char_strings(const char a[], const char* b);
+
+  :source:
+    :header: |
+      UINT32 function_a(int a, int b);
+      void function_b(void);
+      UINT32 function_c(int a);
+      const char* function_d(const char a[], const char* b);
+
+    :code: |
+      UINT32 function_a(int a, int b)
+      {
+        return foo((custom_type)a) + bar((custom_type)b);
+      }
+
+      void function_b(void) { }
+
+      UINT32 function_c(int a)
+      {
+        return foo_varargs((custom_type)a, "ignored", 5);
+      }
+
+      const char* function_d(const char a[], const char* b)
+      {
+        return foo_char_strings(a, b);
+      }
+
+  :tests:
+    :common: |
+      void setUp(void) {}
+      void tearDown(void) {}
+
+    :units:
+    - :pass: TRUE
+      :should: 'successfully exercise two simple ExpectAndReturn mock calls'
+      :code: |
+        test()
+        {
+          foo_ExpectAndReturn((custom_type)1, 10);
+          bar_ExpectAndReturn((custom_type)2, 20);
+          TEST_ASSERT_EQUAL(30, function_a(1, 2));
+        }
+
+    - :pass: FALSE
+      :should: 'fail because bar() is not called but is expected'
+      :code: |
+        test()
+        {
+          foo_ExpectAndReturn((custom_type)1, 10);
+          TEST_ASSERT_EQUAL(30, function_a(1, 2));
+        }
+
+    - :pass: FALSE
+      :should: 'fail because bar() is called but is not expected'
+      :code: |
+        test()
+        {
+          bar_ExpectAndReturn((custom_type)1, 10);
+          function_b();
+        }
+
+    - :pass: TRUE
+      :should: 'consume var args passed to mocked function'
+      :code: |
+        test()
+        {
+          foo_varargs_ExpectAndReturn((custom_type)3, 10);
+          TEST_ASSERT_EQUAL(10, function_c(3));
+        }
+
+    - :pass: TRUE
+      :should: 'handle char strings'
+      :code: |
+        test()
+        {
+          const char* retval = "moe";
+          foo_char_strings_ExpectAndReturn("larry", "curly", (char*)retval);
+          TEST_ASSERT_EQUAL_STRING("moe", function_d("larry", "curly"));
+        }
+
+    - :pass: TRUE
+      :should: 'successfully exercise multiple cycles of expecting and mocking and pass'
+      :code: |
+        test()
+        {
+          foo_ExpectAndReturn((custom_type)1, 10);
+          bar_ExpectAndReturn((custom_type)2, 20);
+          TEST_ASSERT_EQUAL(30, function_a(1, 2));
+
+          foo_ExpectAndReturn((custom_type)3, 30);
+          bar_ExpectAndReturn((custom_type)4, 40);
+          TEST_ASSERT_EQUAL(70, function_a(3, 4));
+        }
+
+    - :pass: FALSE
+      :should: 'successfully exercise multiple cycles of expecting and mocking and fail'
+      :code: |
+        test()
+        {
+          foo_ExpectAndReturn((custom_type)1, 10);
+          bar_ExpectAndReturn((custom_type)2, 20);
+          TEST_ASSERT_EQUAL(30, function_a(1, 2));
+
+          foo_ExpectAndReturn((custom_type)3, 30);
+          bar_ExpectAndReturn((custom_type)4, 40);
+          TEST_ASSERT_EQUAL(70, function_a(3, 5));
+        }
+
+...
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/const_primitives_handling.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/const_primitives_handling.yml
new file mode 100644
index 000000000..2fc1b2132
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/const_primitives_handling.yml
@@ -0,0 +1,87 @@
+---
+:cmock:
+  :plugins:
+  - # none
+
+:systest:
+  :types: |
+
+  :mockable: |
+    // no argument names
+    void foo(char const*, char* const, const char*);
+    
+    // argument names
+    void bar(char const* param1, char* const param2, const char* param3);
+
+  :source: 
+    :header: |
+      void exercise_const1(char const* param1, char* const param2, const char* param3);
+      void exercise_const2(char const* param1, char* const param2, const char* param3);
+
+    :code: |
+      char value1 = '1';
+      char value2 = '2';
+    
+      const char* A = &value1;
+      char* const B = &value2;
+      const char* C = "C";
+      const char* D = "D";
+    
+      void exercise_const1(char const* param1, char* const param2, const char* param3)
+      {
+        foo(param1, param2, param3);
+      }
+
+      void exercise_const2(char const* param1, char* const param2, const char* param3)
+      {
+        bar(param1, param2, param3);
+      }
+      
+  :tests:
+    :common: |
+      extern const char* A;
+      extern char* const B;
+      extern const char* C;
+      extern const char* D;
+      
+      void setUp(void) {}
+      void tearDown(void) {}
+    :units:
+    - :pass: TRUE
+      :should: 'successfully pass several const parameters'
+      :code: |
+        test()
+        {
+          foo_Expect( A, B, C );
+          exercise_const1( A, B, C );
+        }
+      
+    - :pass: FALSE
+      :should: 'should fail upon wrong const arguments passed'
+      :code: |
+        test()
+        {
+          foo_Expect( A, B, C );
+          exercise_const1( (const char*)B, (char * const)A, C );
+        }
+
+    - :pass: FALSE
+      :should: 'should fail upon wrong const arguments passed'
+      :code: |
+        test()
+        {
+          foo_Expect( A, B, C );
+          exercise_const1( A, B, D );
+        }
+
+    - :pass: FALSE
+      :should: 'should fail upon wrong const arguments passed'
+      :code: |
+        test()
+        {
+          bar_Expect( A, B, C );
+          exercise_const2( A, (char * const)C, (const char *)B );
+        }
+
+
+...
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/doesnt_leave_details_behind.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/doesnt_leave_details_behind.yml
new file mode 100644
index 000000000..a077839e1
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/doesnt_leave_details_behind.yml
@@ -0,0 +1,308 @@
+---
+:cmock:
+  :enforce_strict_ordering: 1
+  :plugins:
+  - :array
+  - :cexception
+  - :ignore
+  - :callback
+  - :return_thru_ptr
+  - :ignore_arg
+  - :expect_any_args
+  :callback_after_arg_check: false
+  :callback_include_count: false
+  :treat_externs: :include
+
+:systest:
+  :types: |
+    typedef struct _POINT_T {
+      int x;
+      int y;
+    } POINT_T;
+
+  :mockable: |
+    #include  "CException.h"
+    extern void foo(POINT_T* a);
+    POINT_T* bar(void);
+    void no_args(void);
+
+  :source:
+    :header: |
+      #include "CException.h"
+      void function_a(void);
+      int function_b(void);
+
+    :code: |
+      void function_a(void)
+      {
+        foo(bar());
+        no_args();
+      }
+
+      int function_b(void)
+      {
+        POINT_T pt = { 1, 2 };
+        foo(&pt);
+        return (pt.x + pt.y);
+      }
+
+  :tests:
+    :common: |
+      #include "CException.h"
+      void setUp(void) {}
+      void tearDown(void) {}
+      void my_foo_callback(POINT_T* a) { TEST_ASSERT_EQUAL_INT(2, a->x); }
+
+    :units:
+    - :pass: TRUE
+      :should: 'just pass if we do not insert anything ugly into it'
+      :code: |
+        test()
+        {
+          bar_ExpectAndReturn(NULL);
+          foo_Expect(NULL);
+          no_args_Expect();
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'not contain mock details in failed assertion after an expect and return'
+      :verify_error: 'FAIL: Expected 1 Was 2. CustomFail'
+      :code: |
+        test()
+        {
+          bar_ExpectAndReturn(NULL);
+          TEST_ASSERT_EQUAL_INT_MESSAGE(1,2,"CustomFail");
+          foo_Expect(NULL);
+          no_args_Expect();
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'not contain mock details in failed assertion after an expect'
+      :verify_error: 'FAIL: Expected 1 Was 2. CustomFail'
+      :code: |
+        test()
+        {
+          bar_ExpectAndReturn(NULL);
+          foo_Expect(NULL);
+          TEST_ASSERT_EQUAL_INT_MESSAGE(1,2,"CustomFail");
+          no_args_Expect();
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'not contain mock details in failed assertion after throw expectation'
+      :verify_error: 'FAIL: Expected 1 Was 2. CustomFail'
+      :code: |
+        test()
+        {
+          CEXCEPTION_T e;
+
+          bar_ExpectAndReturn(NULL);
+          foo_Expect(NULL);
+          no_args_ExpectAndThrow(5);
+          TEST_ASSERT_EQUAL_INT_MESSAGE(1,2,"CustomFail");
+
+          Try { function_a(); } Catch(e) {}
+        }
+
+    - :pass: FALSE
+      :should: 'not contain mock details in failed assertion after a mock call'
+      :verify_error: 'FAIL: Expected 1 Was 2. CustomFail'
+      :code: |
+        test()
+        {
+          bar_ExpectAndReturn(NULL);
+          foo_Expect(NULL);
+          no_args_Expect();
+
+          function_a();
+
+          TEST_ASSERT_EQUAL_INT_MESSAGE(1,2,"CustomFail");
+        }
+
+    - :pass: FALSE
+      :should: 'not contain mock details in failed assertion after throw'
+      :verify_error: 'FAIL: Expected 1 Was 2. CustomFail'
+      :code: |
+        test()
+        {
+          CEXCEPTION_T e;
+
+          bar_ExpectAndReturn(NULL);
+          foo_Expect(NULL);
+          no_args_ExpectAndThrow(5);
+
+          Try { function_a(); } Catch(e) {}
+
+          TEST_ASSERT_EQUAL_INT_MESSAGE(1,2,"CustomFail");
+        }
+
+    - :pass: FALSE
+      :should: 'not contain mock details in failed assertion after ignore'
+      :verify_error: 'FAIL: Expected 1 Was 2. CustomFail'
+      :code: |
+        test()
+        {
+          bar_ExpectAndReturn(NULL);
+          foo_Expect(NULL);
+          no_args_Ignore();
+
+          TEST_ASSERT_EQUAL_INT_MESSAGE(1,2,"CustomFail");
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'not contain mock details in failed assertion after ignored mock'
+      :verify_error: 'FAIL: Expected 1 Was 2. CustomFail'
+      :code: |
+        test()
+        {
+          bar_ExpectAndReturn(NULL);
+          foo_Expect(NULL);
+          no_args_Ignore();
+
+          function_a();
+
+          TEST_ASSERT_EQUAL_INT_MESSAGE(1,2,"CustomFail");
+        }
+
+    - :pass: FALSE
+      :should: 'not contain mock details in failed assertion after callback setup'
+      :verify_error: 'FAIL: Expected 1 Was 2. CustomFail'
+      :code: |
+        test()
+        {
+          POINT_T pt = { 2, 2 };
+          bar_ExpectAndReturn(&pt);
+          foo_StubWithCallback(my_foo_callback);
+
+          TEST_ASSERT_EQUAL_INT_MESSAGE(1,2,"CustomFail");
+
+          no_args_Expect();
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'not contain mock details in failed assertion after mock with callback'
+      :verify_error: 'FAIL: Expected 1 Was 2. CustomFail'
+      :code: |
+        test()
+        {
+          POINT_T pt = { 2, 2 };
+          bar_ExpectAndReturn(&pt);
+          foo_StubWithCallback(my_foo_callback);
+          no_args_Expect();
+
+          function_a();
+
+          TEST_ASSERT_EQUAL_INT_MESSAGE(1,2,"CustomFail");
+        }
+
+    - :pass: FALSE
+      :should: 'not contain mock details in failed assertion after expect any args'
+      :verify_error: 'FAIL: Expected 1 Was 2. CustomFail'
+      :code: |
+        test()
+        {
+          POINT_T pt = { 2, 2 };
+          bar_ExpectAndReturn(&pt);
+          foo_ExpectAnyArgs();
+
+          TEST_ASSERT_EQUAL_INT_MESSAGE(1,2,"CustomFail");
+
+          no_args_Expect();
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'not contain mock details in failed assertion after mock which expected any args'
+      :verify_error: 'FAIL: Expected 1 Was 2. CustomFail'
+      :code: |
+        test()
+        {
+          POINT_T pt = { 2, 2 };
+          bar_ExpectAndReturn(&pt);
+          foo_ExpectAnyArgs();
+          no_args_Expect();
+
+          function_a();
+
+          TEST_ASSERT_EQUAL_INT_MESSAGE(1,2,"CustomFail");
+        }
+
+    - :pass: FALSE
+      :should: 'not contain mock details in failed assertion after ignored arg'
+      :verify_error: 'FAIL: Expected 1 Was 2. CustomFail'
+      :code: |
+        test()
+        {
+          POINT_T pt = { 2, 2 };
+          bar_ExpectAndReturn(&pt);
+          foo_Expect(NULL);
+          foo_IgnoreArg_a();
+
+          TEST_ASSERT_EQUAL_INT_MESSAGE(1,2,"CustomFail");
+
+          no_args_Expect();
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'not contain mock details in failed assertion after mock which ignored an arg'
+      :verify_error: 'FAIL: Expected 1 Was 2. CustomFail'
+      :code: |
+        test()
+        {
+          POINT_T pt = { 2, 2 };
+          bar_ExpectAndReturn(&pt);
+          foo_Expect(NULL);
+          foo_IgnoreArg_a();
+          no_args_Expect();
+
+          function_a();
+
+          TEST_ASSERT_EQUAL_INT_MESSAGE(1,2,"CustomFail");
+        }
+
+    - :pass: FALSE
+      :should: 'not contain mock details in failed assertion after mock which threw a CException'
+      :verify_error: 'FAIL: Expected 1 Was 2. CustomFail'
+      :code: |
+        test()
+        {
+          CEXCEPTION_T e;
+          bar_ExpectAndThrow(0x12);
+
+          Try {
+            function_a();
+          }
+          Catch(e) {}
+
+          TEST_ASSERT_EQUAL_INT_MESSAGE(1,2,"CustomFail");
+        }
+
+    - :pass: FALSE
+      :should: 'not contain mock details in failed assertion after mock which used a return thru ptr'
+      :verify_error: 'FAIL: Expected 3 Was 7. CustomFail'
+      :code: |
+        test()
+        {
+          POINT_T pt1 = { 1, 2 };
+          POINT_T pt2 = { 3, 4 };
+
+          foo_Expect(&pt1);
+          foo_ReturnThruPtr_a(&pt2);
+
+          TEST_ASSERT_EQUAL_INT_MESSAGE(3, function_b(), "CustomFail");
+        }
+
+...
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/enforce_strict_ordering.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/enforce_strict_ordering.yml
new file mode 100644
index 000000000..7d777a4ec
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/enforce_strict_ordering.yml
@@ -0,0 +1,247 @@
+---
+:cmock:
+  :enforce_strict_ordering: 1
+  :plugins:
+  - :ignore
+  - :cexception
+
+:systest:
+  :types: |
+    #define UINT32 unsigned int
+
+    typedef signed int custom_type;
+
+  :mockable: |
+    #include  "CException.h"
+    UINT32 foo(custom_type a);
+    UINT32 bar(custom_type b);
+    void baz(custom_type c);
+
+  :source:
+    :header: |
+      #include "CException.h"
+      UINT32 function_a(int a, int b);
+      void function_b(void);
+      void function_c(void);
+      void function_d(void);
+
+    :code: |
+      UINT32 function_a(int a, int b)
+      {
+        return foo((custom_type)a) + bar((custom_type)b);
+      }
+
+      void function_b(void)
+      {
+        baz((custom_type)1);
+        foo((custom_type)2);
+        bar((custom_type)3);
+        baz((custom_type)4);
+        foo((custom_type)5);
+        bar((custom_type)6);
+        baz((custom_type)7);
+      }
+
+      void function_c(void)
+      {
+        foo((custom_type)1);
+        foo((custom_type)2);
+        bar((custom_type)3);
+        bar((custom_type)4);
+        foo((custom_type)5);
+      }
+
+      void function_d(void)
+      {
+        CEXCEPTION_T e;
+        Try
+        {
+          foo((custom_type)1);
+        }
+        Catch(e) {}
+        Try
+        {
+          bar((custom_type)2);
+        }
+        Catch(e) {}
+        Try
+        {
+          foo((custom_type)3);
+        }
+        Catch(e) {}
+      }
+
+  :tests:
+    :common: |
+      #include "CException.h"
+      void setUp(void) {}
+      void tearDown(void) {}
+
+    :units:
+    - :pass: TRUE
+      :should: 'successfully exercise two simple ExpectAndReturn mock calls'
+      :code: |
+        test()
+        {
+          foo_ExpectAndReturn((custom_type)1, 10);
+          bar_ExpectAndReturn((custom_type)2, 20);
+          TEST_ASSERT_EQUAL(30, function_a(1, 2));
+        }
+
+    - :pass: FALSE
+      :should: 'fail because bar() is called but is not expected'
+      :verify_error: 'Called more times than expected'
+      :code: |
+        test()
+        {
+          foo_ExpectAndReturn((custom_type)1, 10);
+          TEST_ASSERT_EQUAL(30, function_a(1, 2));
+        }
+
+    - :pass: FALSE
+      :should: 'fail because bar() is called twice but is expected once'
+      :verify_error: 'Called fewer times than expected'
+      :code: |
+        test()
+        {
+          foo_ExpectAndReturn((custom_type)1, 10);
+          bar_ExpectAndReturn((custom_type)2, 20);
+          bar_ExpectAndReturn((custom_type)3, 30);
+          TEST_ASSERT_EQUAL(30, function_a(1, 2));
+        }
+
+    - :pass: FALSE
+      :should: 'fail because bar and foo called in reverse order'
+      :verify_error: 'Called earlier than expected'
+      :code: |
+        test()
+        {
+          bar_ExpectAndReturn((custom_type)2, 20);
+          foo_ExpectAndReturn((custom_type)1, 10);
+          TEST_ASSERT_EQUAL(30, function_a(1, 2));
+        }
+
+    - :pass: TRUE
+      :should: 'pass because bar and foo called in order with multiple params'
+      :code: |
+        test()
+        {
+          foo_ExpectAndReturn((custom_type)1, 10);
+          foo_ExpectAndReturn((custom_type)2, 10);
+          bar_ExpectAndReturn((custom_type)3, 20);
+          bar_ExpectAndReturn((custom_type)4, 10);
+          foo_ExpectAndReturn((custom_type)5, 10);
+          function_c();
+        }
+
+    - :pass: FALSE
+      :should: 'fail because bar and foo called out of order at end'
+      :code: |
+        test()
+        {
+          foo_ExpectAndReturn((custom_type)1, 10);
+          foo_ExpectAndReturn((custom_type)2, 10);
+          bar_ExpectAndReturn((custom_type)3, 20);
+          foo_ExpectAndReturn((custom_type)5, 10);
+          bar_ExpectAndReturn((custom_type)4, 10);
+          function_c();
+        }
+
+    - :pass: FALSE
+      :should: 'fail because bar and foo called out of order at start'
+      :code: |
+        test()
+        {
+          foo_ExpectAndReturn((custom_type)2, 10);
+          foo_ExpectAndReturn((custom_type)1, 10);
+          bar_ExpectAndReturn((custom_type)3, 20);
+          bar_ExpectAndReturn((custom_type)4, 10);
+          foo_ExpectAndReturn((custom_type)5, 10);
+          function_c();
+        }
+
+    - :pass: TRUE
+      :should: 'pass because we are properly ignoring baz'
+      :code: |
+        test()
+        {
+          baz_Ignore();
+          foo_ExpectAndReturn((custom_type)2, 10);
+          bar_ExpectAndReturn((custom_type)3, 20);
+          foo_ExpectAndReturn((custom_type)5, 10);
+          bar_ExpectAndReturn((custom_type)6, 10);
+          function_b();
+        }
+
+    - :pass: FALSE
+      :should: 'fail because bar and foo out of order, even though baz is ignored'
+      :code: |
+        test()
+        {
+          baz_Ignore();
+          foo_ExpectAndReturn((custom_type)2, 10);
+          foo_ExpectAndReturn((custom_type)5, 10);
+          bar_ExpectAndReturn((custom_type)3, 20);
+          bar_ExpectAndReturn((custom_type)6, 10);
+          function_b();
+        }
+
+    - :pass: TRUE
+      :should: 'pass when using cexception, as long as the order is right'
+      :code: |
+        test()
+        {
+          foo_ExpectAndThrow((custom_type)1, 10);
+          bar_ExpectAndReturn((custom_type)2, 20);
+          foo_ExpectAndReturn((custom_type)3, 10);
+          function_d();
+        }
+
+    - :pass: FALSE
+      :should: 'fail when an throw call is made out of order'
+      :code: |
+        test()
+        {
+          bar_ExpectAndReturn((custom_type)2, 20);
+          foo_ExpectAndThrow((custom_type)1, 10);
+          foo_ExpectAndReturn((custom_type)3, 10);
+          function_d();
+        }
+
+    - :pass: TRUE
+      :should: 'successfully handle back to back ExpectAndReturn setup and mock calls'
+      :code: |
+        test()
+        {
+          foo_ExpectAndReturn((custom_type)1, 10);
+          bar_ExpectAndReturn((custom_type)2, 20);
+          TEST_ASSERT_EQUAL(30, function_a(1, 2));
+
+          foo_ExpectAndReturn((custom_type)3, 30);
+          bar_ExpectAndReturn((custom_type)4, 40);
+          TEST_ASSERT_EQUAL(70, function_a(3, 4));
+
+          foo_ExpectAndReturn((custom_type)1, 50);
+          bar_ExpectAndReturn((custom_type)9, 60);
+          TEST_ASSERT_EQUAL(110, function_a(1, 9));
+        }
+
+    - :pass: FALSE
+      :should: 'successfully catch errors during back to back ExpectAndReturn setup and mock calls'
+      :verify_error: 'Called earlier than expected'
+      :code: |
+        test()
+        {
+          foo_ExpectAndReturn((custom_type)1, 10);
+          bar_ExpectAndReturn((custom_type)2, 20);
+          TEST_ASSERT_EQUAL(30, function_a(1, 2));
+
+          foo_ExpectAndReturn((custom_type)3, 30);
+          bar_ExpectAndReturn((custom_type)4, 40);
+          TEST_ASSERT_EQUAL(70, function_a(3, 4));
+
+          bar_ExpectAndReturn((custom_type)9, 60);
+          foo_ExpectAndReturn((custom_type)1, 50);
+          TEST_ASSERT_EQUAL(110, function_a(1, 9));
+        }
+...
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/expect_and_return_custom_types.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/expect_and_return_custom_types.yml
new file mode 100644
index 000000000..5d9d44678
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/expect_and_return_custom_types.yml
@@ -0,0 +1,108 @@
+---
+:cmock:
+  :plugins:
+  - # none
+  :memcmp_if_unknown: false
+  :unity_helper_path: expect_and_return_custom_types_unity_helper.h
+
+:systest:
+  :types: |
+    typedef struct _EXAMPLE_STRUCT_T { int x; int y; } EXAMPLE_STRUCT_T;
+
+  :mockable: |
+    EXAMPLE_STRUCT_T foo(EXAMPLE_STRUCT_T a);
+
+  :source:
+    :header: |
+      EXAMPLE_STRUCT_T function_a(EXAMPLE_STRUCT_T a, EXAMPLE_STRUCT_T b);
+      EXAMPLE_STRUCT_T function_b(EXAMPLE_STRUCT_T a, EXAMPLE_STRUCT_T b);
+
+    :code: |
+      EXAMPLE_STRUCT_T function_a(EXAMPLE_STRUCT_T a, EXAMPLE_STRUCT_T b)
+      {
+        EXAMPLE_STRUCT_T retval = foo(a);
+        retval.x += b.x;
+        retval.y += b.y;
+        return retval;
+      }
+
+      EXAMPLE_STRUCT_T function_b(EXAMPLE_STRUCT_T a, EXAMPLE_STRUCT_T b)
+      {
+        EXAMPLE_STRUCT_T retval = foo(b);
+        retval.x *= a.x;
+        retval.y *= a.y;
+        return retval;
+      }
+
+  :tests:
+    :common: |
+      void setUp(void) {}
+      void tearDown(void) {}
+
+    :units:
+    - :pass: TRUE
+      :should: 'successfully exercise simple ExpectAndReturn mock calls'
+      :code: |
+        test()
+        {
+          EXAMPLE_STRUCT_T c = {1,2};
+          EXAMPLE_STRUCT_T d = {3,4};
+          EXAMPLE_STRUCT_T e = {2,4};
+          EXAMPLE_STRUCT_T f = {5,8};
+          foo_ExpectAndReturn(c, e);
+          TEST_ASSERT_EQUAL_EXAMPLE_STRUCT_T(f, function_a(c,d));
+        }
+
+    - :pass: FALSE
+      :should: 'fail because it is expecting to call foo with c not d'
+      :code: |
+        test()
+        {
+          EXAMPLE_STRUCT_T c = {1,2};
+          EXAMPLE_STRUCT_T d = {3,4};
+          EXAMPLE_STRUCT_T e = {2,4};
+          EXAMPLE_STRUCT_T f = {5,8};
+          foo_ExpectAndReturn(d, e);
+          TEST_ASSERT_EQUAL_EXAMPLE_STRUCT_T(f, function_a(c,d));
+        }
+
+    - :pass: TRUE
+      :should: 'successfully exercise simple ExpectAndReturn mock calls on other function'
+      :code: |
+        test()
+        {
+          EXAMPLE_STRUCT_T c = {1,2};
+          EXAMPLE_STRUCT_T d = {3,4};
+          EXAMPLE_STRUCT_T e = {2,4};
+          EXAMPLE_STRUCT_T f = {2,8};
+          foo_ExpectAndReturn(d, e);
+          TEST_ASSERT_EQUAL_EXAMPLE_STRUCT_T(f, function_b(c,d));
+        }
+
+    - :pass: FALSE
+      :should: 'fail because it is expecting to call foo with d not c'
+      :code: |
+        test()
+        {
+          EXAMPLE_STRUCT_T c = {1,2};
+          EXAMPLE_STRUCT_T d = {3,4};
+          EXAMPLE_STRUCT_T e = {2,4};
+          EXAMPLE_STRUCT_T f = {2,8};
+          foo_ExpectAndReturn(c, e);
+          TEST_ASSERT_EQUAL_EXAMPLE_STRUCT_T(f, function_b(c,d));
+        }
+
+  :unity_helper:
+    :header: |
+      void AssertEqualExampleStruct(EXAMPLE_STRUCT_T expected, EXAMPLE_STRUCT_T actual, unsigned short line);
+      #define UNITY_TEST_ASSERT_EQUAL_EXAMPLE_STRUCT_T(expected, actual, line, message) {AssertEqualExampleStruct(expected, actual, (unsigned short)line);}
+      #define TEST_ASSERT_EQUAL_EXAMPLE_STRUCT_T(expected, actual) UNITY_TEST_ASSERT_EQUAL_EXAMPLE_STRUCT_T(expected, actual, __LINE__, NULL);
+
+    :code: |
+      void AssertEqualExampleStruct(EXAMPLE_STRUCT_T expected, EXAMPLE_STRUCT_T actual, unsigned short line)
+      {
+        UNITY_TEST_ASSERT_EQUAL_INT(expected.x, actual.x, line, "Example Struct Failed For Field x");
+        UNITY_TEST_ASSERT_EQUAL_INT(expected.y, actual.y, line, "Example Struct Failed For Field y");
+      }
+
+...
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/expect_and_return_treat_as.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/expect_and_return_treat_as.yml
new file mode 100644
index 000000000..2c24f35d8
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/expect_and_return_treat_as.yml
@@ -0,0 +1,173 @@
+---
+:cmock:
+  :plugins:
+  - # none
+  :treat_as:
+    MY_STRING: STRING
+    MY_INT: INT
+    PTR_INT: INT*
+    MY_HEX: HEX32
+
+:systest:
+  :types: |
+    typedef const char* MY_STRING;
+    typedef int MY_INT;
+    typedef unsigned int MY_HEX;
+    typedef int* PTR_INT;
+
+  :mockable: |
+    MY_INT foo(MY_HEX a);
+    MY_INT bar(MY_HEX b);
+    MY_STRING foo_char_strings(MY_STRING a, MY_STRING b);
+    float float_adder(float a, float b);
+    MY_INT* pointer_foo(MY_HEX* a);
+    void pointer_bar(PTR_INT a);
+
+  :source:
+    :header: |
+      MY_INT function_a(MY_INT a, MY_INT b);
+      MY_STRING function_b(MY_STRING a, MY_STRING b);
+      float function_c(float a, float b);
+      MY_INT function_d(MY_HEX a);
+      void function_e(PTR_INT a);
+
+    :code: |
+      MY_INT function_a(MY_INT a, MY_INT b)
+      {
+        return foo((MY_HEX)a) + bar((MY_HEX)b);
+      }
+
+      MY_STRING function_b(MY_STRING a, MY_STRING b)
+      {
+        return foo_char_strings(a, b);
+      }
+
+      float function_c(float a, float b)
+      {
+        return float_adder(b, a);
+      }
+
+      MY_INT function_d(MY_HEX a)
+      {
+        MY_HEX b = a;
+        MY_INT* c = pointer_foo(&b);
+        return *c;
+      }
+
+      void function_e(PTR_INT a)
+      {
+        pointer_bar(a);
+      }
+
+  :tests:
+    :common: |
+      void setUp(void) {}
+      void tearDown(void) {}
+
+    :units:
+    - :pass: TRUE
+      :should: 'successfully exercise two simple ExpectAndReturn mock calls'
+      :code: |
+        test()
+        {
+          foo_ExpectAndReturn((MY_HEX)1, 10);
+          bar_ExpectAndReturn((MY_HEX)2, 20);
+          TEST_ASSERT_EQUAL(30, function_a(1, 2));
+        }
+
+    - :pass: FALSE
+      :should: 'fail because bar() is expected but not called'
+      :code: |
+        test()
+        {
+          foo_ExpectAndReturn((MY_HEX)1, 10);
+          TEST_ASSERT_EQUAL(30, function_a(1, 2));
+        }
+
+    - :pass: FALSE
+      :should: 'fail because foo_char_strings() is called but is not expected'
+      :code: |
+        test()
+        {
+          foo_char_strings_ExpectAndReturn((MY_STRING)"jello", (MY_STRING)"jiggle", (MY_STRING)"boing!");
+          function_a(1,2);
+        }
+
+    - :pass: TRUE
+      :should: 'handle char strings'
+      :code: |
+        test()
+        {
+          foo_char_strings_ExpectAndReturn((MY_STRING)"jello", (MY_STRING)"jiggle", (MY_STRING)"boing!");
+          TEST_ASSERT_EQUAL_STRING("boing!", function_b((MY_STRING)"jello", (MY_STRING)"jiggle"));
+        }
+
+    - :pass: TRUE
+      :should: 'handle floating point numbers with Unity support: pass'
+      :code: |
+        test()
+        {
+          float_adder_ExpectAndReturn(1.2345f, 6.7890f, 8.0235f);
+          TEST_ASSERT_EQUAL_FLOAT(8.0235f, function_c(6.7890f, 1.2345f));
+        }
+
+    - :pass: FALSE
+      :should: 'handle floating point numbers with Unity support: fail'
+      :code: |
+        test()
+        {
+          float_adder_ExpectAndReturn(1.2345f, 6.7892f, 8.0235f);
+          TEST_ASSERT_EQUAL_FLOAT(8.0235f, function_c(6.7890f, 1.2345f));
+        }
+
+    - :pass: TRUE
+      :should: 'handle pointers to treat_as values just as cleanly as the treat_as itself for passes'
+      :code: |
+        test()
+        {
+          MY_HEX TestHex = (MY_HEX)45;
+          MY_INT TestInt = (MY_INT)33;
+          pointer_foo_ExpectAndReturn(&TestHex, &TestInt);
+          TEST_ASSERT_EQUAL_INT(33, function_d(45));
+        }
+
+    - :pass: FALSE
+      :should: 'handle pointers to treat_as values just as cleanly as the treat_as itself for failures'
+      :verify_error: 'Element 0 Expected 0x0000002D Was 0x0000002B'
+      :code: |
+        test()
+        {
+          MY_HEX TestHex = (MY_HEX)45;
+          MY_INT TestInt = (MY_INT)33;
+          pointer_foo_ExpectAndReturn(&TestHex, &TestInt);
+          TEST_ASSERT_EQUAL_INT(33, function_d(43));
+        }
+
+    - :pass: TRUE
+      :should: 'handle treat_as values containing pointers for passes'
+      :code: |
+        test()
+        {
+          MY_INT ExpInt = (MY_INT)33;
+          PTR_INT ExpPtr = (PTR_INT)(&ExpInt);
+          MY_INT ActInt = (MY_INT)33;
+          PTR_INT ActPtr = (PTR_INT)(&ActInt);
+          pointer_bar_Expect(ExpPtr);
+          function_e(ActPtr);
+        }
+
+    - :pass: FALSE
+      :should: 'handle treat_as values containing pointers for failures'
+      :verify_error: 'Element 0 Expected 33 Was 45'
+      :code: |
+        test()
+        {
+          MY_INT ExpInt = (MY_INT)33;
+          PTR_INT ExpPtr = (PTR_INT)(&ExpInt);
+          MY_INT ActInt = (MY_INT)45;
+          PTR_INT ActPtr = (PTR_INT)(&ActInt);
+          pointer_bar_Expect(ExpPtr);
+          function_e(ActPtr);
+        }
+
+...
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/expect_and_throw.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/expect_and_throw.yml
new file mode 100644
index 000000000..c22524c64
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/expect_and_throw.yml
@@ -0,0 +1,170 @@
+---
+:cmock:
+  :plugins:
+  - :cexception
+
+:systest:
+  :types: |
+    #define UINT32 unsigned int
+    typedef signed int custom_type;
+
+  :mockable: |
+    #include "CException.h"
+    UINT32 foo(custom_type a);
+    UINT32 bar(custom_type b);
+    UINT32 foo_varargs(custom_type a, ...);
+
+  :source: 
+    :header: |
+      #include "CException.h"
+      UINT32 function_a(int a);
+      void function_b(char a);
+
+    :code: |
+      UINT32 function_a(int a)    
+      {
+        UINT32 r = 0;
+        CEXCEPTION_T e;
+        
+        Try
+        {
+          r = (UINT32)foo((custom_type)a);
+        }
+        Catch(e)
+        {
+          r = (UINT32)e*2;
+        }
+        return r;
+      }
+      
+      void function_b(char a)
+      {
+        if (a)
+        {
+          Throw((CEXCEPTION_T)a);
+        }
+      }
+      
+  :tests:
+    :common: |
+      #include "CException.h"
+      void setUp(void) {}
+      void tearDown(void) {}
+      
+    :units:
+    - :pass: TRUE
+      :should: 'successfully exercise a simple ExpectAndReturn mock calls'
+      :code: |
+        test()
+        {
+          foo_ExpectAndReturn((custom_type)1, 10);
+          TEST_ASSERT_EQUAL(10, function_a(1));
+        }
+      
+    - :pass: TRUE
+      :should: 'successfully throw an error on first call'
+      :code: |
+        test()
+        {
+          foo_ExpectAndThrow((custom_type)1, 55);
+          TEST_ASSERT_EQUAL(110, function_a(1));
+        }
+      
+    - :pass: TRUE
+      :should: 'successfully throw an error on later calls'
+      :code: |
+        test()
+        {
+          foo_ExpectAndReturn((custom_type)1, 10);
+          foo_ExpectAndReturn((custom_type)2, 20);
+          foo_ExpectAndThrow((custom_type)3, 15);
+          foo_ExpectAndReturn((custom_type)4, 40);
+          TEST_ASSERT_EQUAL(10, function_a(1));
+          TEST_ASSERT_EQUAL(20, function_a(2));
+          TEST_ASSERT_EQUAL(30, function_a(3));
+          TEST_ASSERT_EQUAL(40, function_a(4));
+        }
+      
+    - :pass: TRUE
+      :should: 'pass because we nothing happens'
+      :code: |
+        test()
+        {
+          function_b(0);
+        }
+      
+    - :pass: FALSE
+      :should: 'fail because we did not expect function B to throw'
+      :code: |
+        test()
+        {
+          function_b(1);
+        }
+      
+    - :pass: TRUE
+      :should: 'fail because we expect function B to throw'
+      :code: |
+        test()
+        {
+          CEXCEPTION_T e;
+          Try
+          {
+            function_b(3);
+            TEST_FAIL_MESSAGE("Should Have Thrown");
+          }
+          Catch(e)
+          {
+            TEST_ASSERT_EQUAL(3, e);
+          }
+        }
+      
+    - :pass: TRUE
+      :should: 'successfully throw an error on consecutive calls'
+      :code: |
+        test()
+        {
+          foo_ExpectAndReturn((custom_type)1, 10);
+          foo_ExpectAndReturn((custom_type)1, 20);
+          foo_ExpectAndThrow((custom_type)1, 15);
+          foo_ExpectAndThrow((custom_type)3, 40);
+          TEST_ASSERT_EQUAL(10, function_a(1));
+          TEST_ASSERT_EQUAL(20, function_a(1));
+          TEST_ASSERT_EQUAL(30, function_a(1));
+          TEST_ASSERT_EQUAL(80, function_a(3));
+        }
+      
+    - :pass: TRUE
+      :should: 'successfully throw an error on later calls and after a previous mock call'
+      :code: |
+        test()
+        {
+          foo_ExpectAndReturn((custom_type)1, 10);
+          foo_ExpectAndReturn((custom_type)1, 20);
+          foo_ExpectAndThrow((custom_type)1, 15);
+          TEST_ASSERT_EQUAL(10, function_a(1));
+          TEST_ASSERT_EQUAL(20, function_a(1));
+          TEST_ASSERT_EQUAL(30, function_a(1));
+          
+          foo_ExpectAndReturn((custom_type)2, 20);
+          foo_ExpectAndThrow((custom_type)3, 40);
+          TEST_ASSERT_EQUAL(20, function_a(2));
+          TEST_ASSERT_EQUAL(80, function_a(3));
+        }
+      
+    - :pass: TRUE
+      :should: 'successfully throw an error if expects and mocks called before it'
+      :code: |
+        test()
+        {
+          foo_ExpectAndReturn((custom_type)1, 10);
+          foo_ExpectAndReturn((custom_type)1, 20);
+          TEST_ASSERT_EQUAL(10, function_a(1));
+          TEST_ASSERT_EQUAL(20, function_a(1));
+          
+          foo_ExpectAndReturn((custom_type)2, 20);
+          foo_ExpectAndThrow((custom_type)3, 40);
+          TEST_ASSERT_EQUAL(20, function_a(2));
+          TEST_ASSERT_EQUAL(80, function_a(3));
+        }
+        
+...
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/expect_any_args.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/expect_any_args.yml
new file mode 100644
index 000000000..06eb6bb27
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/expect_any_args.yml
@@ -0,0 +1,238 @@
+---
+:cmock:
+  :plugins:
+  - 'expect_any_args'
+
+:systest:
+  :types: |
+
+  :mockable: |
+    int foo(int a);
+    void bar(int b);
+
+  :source:
+    :header: |
+      int function(int a, int b, int c);
+      void func_b(int a);
+    :code: |
+      int function(int a, int b, int c)
+      {
+        bar(b);
+        return foo(a) + foo(b) + foo(c);
+      }
+      void func_b(int a)
+      {
+        bar(a);
+      }
+
+  :tests:
+    :common: |
+      void setUp(void) {}
+      void tearDown(void) {}
+    :units:
+    - :pass: TRUE
+      :should: 'successfully exercise simple ExpectAndReturn mock calls'
+      :code: |
+        test()
+        {
+          bar_Expect(2);
+          foo_ExpectAndReturn(1, 10);
+          foo_ExpectAndReturn(2, 20);
+          foo_ExpectAndReturn(3, 30);
+          TEST_ASSERT_EQUAL(60, function(1, 2, 3));
+        }
+
+    - :pass: TRUE
+      :should: 'ignore foo() call details'
+      :code: |
+        test()
+        {
+          bar_Expect(4);
+          foo_ExpectAnyArgsAndReturn(10);
+          foo_ExpectAnyArgsAndReturn(40);
+          foo_ExpectAnyArgsAndReturn(80);
+          TEST_ASSERT_EQUAL(130, function(3, 4, 3));
+        }
+
+    - :pass: FALSE
+      :should: 'ignore foo() call details and notice if we called foo() more times than expected'
+      :code: |
+        test()
+        {
+          bar_Expect(4);
+          foo_ExpectAnyArgsAndReturn(20);
+          foo_ExpectAnyArgsAndReturn(30);
+          TEST_ASSERT_EQUAL(50, function(3, 4, 9));
+        }
+
+    - :pass: FALSE
+      :should: 'ignore foo() call details and notice if we called foo() fewer times than expected'
+      :code: |
+        test()
+        {
+          bar_Expect(4);
+          foo_ExpectAnyArgsAndReturn(20);
+          foo_ExpectAnyArgsAndReturn(10);
+          foo_ExpectAnyArgsAndReturn(50);
+          foo_ExpectAnyArgsAndReturn(60);
+          TEST_ASSERT_EQUAL(70, function(3, 4, 9));
+        }
+
+    - :pass: TRUE
+      :should: 'ignore bar() and foo() call details'
+      :code: |
+        test()
+        {
+          bar_ExpectAnyArgs();
+          foo_ExpectAnyArgsAndReturn(50);
+          foo_ExpectAnyArgsAndReturn(50);
+          foo_ExpectAnyArgsAndReturn(50);
+          TEST_ASSERT_EQUAL(150, function(0, 0, 0));
+        }
+
+    - :pass: TRUE
+      :should: 'be able to handle an expect after ignore calls since we are ignoring args only'
+      :code: |
+        test()
+        {
+          bar_ExpectAnyArgs();
+          foo_ExpectAnyArgsAndReturn(50);
+          foo_ExpectAnyArgsAndReturn(50);
+          foo_ExpectAndReturn(3, 50);
+          TEST_ASSERT_EQUAL(150, function(1, 2, 3));
+        }
+
+    - :pass: TRUE
+      :should: 'be able to handle an ignore after an expect call since we are ignoring args only'
+      :code: |
+        test()
+        {
+          bar_ExpectAnyArgs();
+          foo_ExpectAndReturn(1, 50);
+          foo_ExpectAnyArgsAndReturn(50);
+          foo_ExpectAnyArgsAndReturn(50);
+          TEST_ASSERT_EQUAL(150, function(1, 2, 3));
+        }
+
+    - :pass: TRUE
+      :should: 'be able to handle an ignore within expect calls since we are ignoring args only'
+      :code: |
+        test()
+        {
+          bar_ExpectAnyArgs();
+          foo_ExpectAndReturn(1, 50);
+          foo_ExpectAnyArgsAndReturn(50);
+          foo_ExpectAndReturn(3, 50);
+          TEST_ASSERT_EQUAL(150, function(1, 2, 3));
+        }
+
+    - :pass: FALSE
+      :should: 'be able to detect problems with an expect even when using ignores'
+      :code: |
+        test()
+        {
+          bar_ExpectAnyArgs();
+          foo_ExpectAndReturn(1, 50);
+          foo_ExpectAnyArgsAndReturn(50);
+          foo_ExpectAndReturn(4, 50);
+          TEST_ASSERT_EQUAL(150, function(1, 2, 3));
+        }
+
+    - :pass: TRUE
+      :should: 'be able to handle a lone ExpectAnyArg call'
+      :code: |
+        test()
+        {
+          bar_ExpectAnyArgs();
+          func_b(1);
+        }
+
+    - :pass: FALSE
+      :should: 'be able to handle a lone ExpectAnyArg call that does not get called'
+      :code: |
+        test()
+        {
+          bar_ExpectAnyArgs();
+        }
+
+    - :pass: FALSE
+      :should: 'be able to handle a missing ExpectAnyArg call'
+      :code: |
+        test()
+        {
+          func_b(1);
+        }
+
+    - :pass: TRUE
+      :should: 'ignore foo() calls over multiple mock calls'
+      :code: |
+        test()
+        {
+          bar_ExpectAnyArgs();
+          foo_ExpectAnyArgsAndReturn(50);
+          foo_ExpectAnyArgsAndReturn(60);
+          foo_ExpectAnyArgsAndReturn(70);
+          TEST_ASSERT_EQUAL(180, function(0, 0, 0));
+
+          bar_ExpectAnyArgs();
+          foo_ExpectAnyArgsAndReturn(30);
+          foo_ExpectAnyArgsAndReturn(80);
+          foo_ExpectAnyArgsAndReturn(10);
+          TEST_ASSERT_EQUAL(120, function(0, 0, 0));
+
+          bar_ExpectAnyArgs();
+          foo_ExpectAnyArgsAndReturn(70);
+          foo_ExpectAnyArgsAndReturn(20);
+          foo_ExpectAnyArgsAndReturn(20);
+          TEST_ASSERT_EQUAL(110, function(0, 0, 0));
+        }
+
+    - :pass: TRUE
+      :should: 'have multiple cycles of expects still pass when this plugin enabled'
+      :code: |
+        test()
+        {
+          bar_Expect(2);
+          foo_ExpectAndReturn(1, 50);
+          foo_ExpectAndReturn(2, 60);
+          foo_ExpectAndReturn(3, 70);
+          TEST_ASSERT_EQUAL(180, function(1, 2, 3));
+
+          bar_Expect(5);
+          foo_ExpectAndReturn(4, 30);
+          foo_ExpectAndReturn(5, 80);
+          foo_ExpectAndReturn(6, 10);
+          TEST_ASSERT_EQUAL(120, function(4, 5, 6));
+
+          bar_Expect(8);
+          foo_ExpectAndReturn(7, 70);
+          foo_ExpectAndReturn(8, 20);
+          foo_ExpectAndReturn(9, 20);
+          TEST_ASSERT_EQUAL(110, function(7, 8, 9));
+        }
+
+    - :pass: FALSE
+      :should: 'have multiple cycles of expects still fail when this plugin enabled'
+      :code: |
+        test()
+        {
+          bar_Expect(2);
+          foo_ExpectAndReturn(1, 50);
+          foo_ExpectAndReturn(2, 60);
+          foo_ExpectAndReturn(3, 70);
+          TEST_ASSERT_EQUAL(180, function(1, 2, 3));
+
+          bar_Expect(5);
+          foo_ExpectAndReturn(4, 30);
+          foo_ExpectAndReturn(5, 80);
+          foo_ExpectAndReturn(6, 10);
+          TEST_ASSERT_EQUAL(120, function(4, 5, 6));
+
+          bar_Expect(8);
+          foo_ExpectAndReturn(7, 70);
+          foo_ExpectAndReturn(8, 20);
+          foo_ExpectAndReturn(9, 20);
+          TEST_ASSERT_EQUAL(110, function(0, 8, 9));
+        }
+
+...
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/fancy_pointer_handling.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/fancy_pointer_handling.yml
new file mode 100644
index 000000000..2a47d23f7
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/fancy_pointer_handling.yml
@@ -0,0 +1,210 @@
+---
+:cmock:
+  :plugins:
+  - # none
+  :treat_as:
+    INT_PTR: INT*
+
+:systest:
+  :types: |
+    typedef struct _POINT_T {
+      int x;
+      int y;
+    } POINT_T;
+    typedef int* INT_PTR;
+
+  :mockable: |
+    void foo(POINT_T* a);
+    POINT_T* bar(void);
+    void fooa(POINT_T a[]);
+    void foos(const char *a);
+    const char* bars(void);
+    INT_PTR zoink(INT_PTR a);
+
+  :source:
+    :header: |
+      void function_a(void);
+      void function_b(void);
+      void function_c(void);
+      int  function_d(void);
+
+    :code: |
+      void function_a(void)
+      {
+        foo(bar());
+      }
+
+      void function_b(void) {
+        fooa(bar());
+      }
+
+      void function_c(void) {
+        foos(bars());
+      }
+
+      int function_d(void) {
+        int i = 456;
+        INT_PTR ptr = (INT_PTR)(&i);
+        return (int)(*(zoink(ptr)));
+      }
+
+  :tests:
+    :common: |
+      void setUp(void) {}
+      void tearDown(void) {}
+
+    :units:
+    - :pass: TRUE
+      :should: 'handle the situation where we pass nulls to pointers'
+      :code: |
+        test()
+        {
+          bar_ExpectAndReturn(NULL);
+          foo_Expect(NULL);
+
+          function_a();
+        }
+
+    - :pass: TRUE
+      :should: 'handle the situation where we pass single object with expect'
+      :code: |
+        test()
+        {
+          POINT_T pt = {1, 2};
+          POINT_T ex = {1, 2};
+          bar_ExpectAndReturn(&pt);
+          foo_Expect(&ex);
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'handle the situation where we pass single object with expect and it is wrong'
+      :code: |
+        test()
+        {
+          POINT_T pt = {1, 2};
+          POINT_T ex = {1, 3};
+          bar_ExpectAndReturn(&pt);
+          foo_Expect(&ex);
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'handle the situation where we pass nulls to pointers and fail'
+      :code: |
+        test()
+        {
+          POINT_T pt = {1, 2};
+          bar_ExpectAndReturn(&pt);
+          foo_Expect(NULL);
+
+          function_a();
+        }
+
+    - :pass: TRUE
+      :should: 'handle the situation where we pass nulls to arrays'
+      :code: |
+        test()
+        {
+          bar_ExpectAndReturn(NULL);
+          fooa_Expect(NULL);
+
+          function_b();
+        }
+
+    - :pass: TRUE
+      :should: 'handle the situation where we pass single array element with expect'
+      :code: |
+        test()
+        {
+          POINT_T pt = {1, 2};
+          POINT_T ex = {1, 2};
+          bar_ExpectAndReturn(&pt);
+          fooa_Expect(&ex);
+
+          function_b();
+        }
+
+    - :pass: FALSE
+      :should: 'handle the situation where we pass single array element with expect and it is wrong'
+      :code: |
+        test()
+        {
+          POINT_T pt = {1, 2};
+          POINT_T ex = {1, 3};
+          bar_ExpectAndReturn(&pt);
+          fooa_Expect(&ex);
+
+          function_b();
+        }
+
+    - :pass: FALSE
+      :should: 'handle the situation where we pass nulls to arrays and fail'
+      :code: |
+        test()
+        {
+          POINT_T pt = {1, 2};
+          bar_ExpectAndReturn(&pt);
+          fooa_Expect(NULL);
+
+          function_b();
+        }
+
+    - :pass: TRUE
+      :should: 'handle standard c string as null terminated on not do crappy memory compares of a byte, passing'
+      :code: |
+        test()
+        {
+          const char* retval = "This is a\0 silly string";
+          bars_ExpectAndReturn((char*)retval);
+          foos_Expect("This is a\0 wacky string");
+
+          function_c();
+        }
+
+    - :pass: FALSE
+      :should: 'handle standard c string as null terminated on not do crappy memory compares of a byte, finding failures'
+      :code: |
+        test()
+        {
+          const char* retval = "This is a silly string";
+          bars_ExpectAndReturn((char*)retval);
+          foos_Expect("This is a wacky string");
+
+          function_c();
+        }
+
+    - :pass: TRUE
+      :should: 'handle handle typedefs that ARE pointers by using treat_as'
+      :code: |
+        test()
+        {
+          int e = 456;
+          int r = 789;
+          INT_PTR ptr_e = (INT_PTR)(&e);
+          INT_PTR ptr_r = (INT_PTR)(&r);
+
+          zoink_ExpectAndReturn(ptr_e, ptr_r);
+
+          TEST_ASSERT_EQUAL(r, function_d());
+        }
+
+    - :pass: FALSE
+      :should: 'handle handle typedefs that ARE pointers by using treat_as and catch failures'
+      :code: |
+        test()
+        {
+          int e = 457;
+          int r = 789;
+          INT_PTR ptr_e = (INT_PTR)(&e);
+          INT_PTR ptr_r = (INT_PTR)(&r);
+
+          zoink_ExpectAndReturn(ptr_e, ptr_r);
+
+          TEST_ASSERT_EQUAL(r, function_d());
+        }
+
+
+...
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/function_pointer_handling.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/function_pointer_handling.yml
new file mode 100644
index 000000000..d286bdb25
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/function_pointer_handling.yml
@@ -0,0 +1,83 @@
+---
+:cmock:
+  :plugins:
+  - # none
+  :treat_as:
+    FUNCTION_T: PTR
+
+:systest:
+  :types: |
+    typedef void (*FUNCTION_T)(void);
+
+  :mockable: |
+    void takes_function_type( FUNCTION_T myfunc );
+    void takes_function_ptr( unsigned int (*func_ptr)(int, char) );
+    void takes_function_ptr_shorthand( unsigned int func_ptr(int, char*) );
+    void takes_const_function_ptr( unsigned int (* const)(int, char) );
+    unsigned short (*returns_function_ptr( const char op_code ))( int, long int );
+
+  :source:
+    :header: |
+      void exercise_function_pointer_param(void);
+      unsigned short (*exercise_function_pointer_return( const char op_code ))( int, long int );
+
+      // functions for function pointer tests
+      unsigned int dummy_function1(int a, char b);
+      unsigned short dummy_function2(int a, long int b);
+
+    :code: |
+      /*
+       * functions used in tests
+       */
+
+      unsigned int dummy_function1(int a, char b)
+      {
+        // prevent compiler warnings by using everything
+        return (unsigned int)a + (unsigned int)b;
+      }
+
+      unsigned short dummy_function2(int a, long int b)
+      {
+        // prevent compiler warnings by using everything
+        return (unsigned short)a + (unsigned short)b;
+      }
+
+      /*
+       * functions executed by tests
+       */
+
+      void exercise_function_pointer_param(void)
+      {
+        takes_function_ptr(dummy_function1);
+      }
+
+      unsigned short (*exercise_function_pointer_return( const char op_code ))( int, long int )
+      {
+        return returns_function_ptr(op_code);
+      }
+
+  :tests:
+    :common: |
+      void setUp(void) {}
+      void tearDown(void) {}
+    :units:
+    - :pass: TRUE
+      :should: 'expect a function pointer param'
+      :code: |
+        test()
+        {
+          takes_function_ptr_Expect(dummy_function1);
+          exercise_function_pointer_param();
+        }
+
+    - :pass: TRUE
+      :should: 'return a function pointer'
+      :code: |
+        test()
+        {
+          returns_function_ptr_ExpectAndReturn('z', dummy_function2);
+          TEST_ASSERT_EQUAL_PTR(dummy_function2, exercise_function_pointer_return('z'));
+        }
+
+
+...
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/ignore_and_return.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/ignore_and_return.yml
new file mode 100644
index 000000000..17f95beef
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/ignore_and_return.yml
@@ -0,0 +1,329 @@
+---
+:cmock:
+  :plugins:
+  - 'ignore'
+
+:systest:
+  :types: |
+
+  :mockable: |
+    int foo(int a);
+    void bar(int b);
+
+  :source:
+    :header: |
+      int function(int a, int b, int c);
+    :code: |
+      int function(int a, int b, int c)
+      {
+        bar(b);
+        return foo(a) + foo(b) + foo(c);
+      }
+
+  :tests:
+    :common: |
+      void setUp(void) {}
+      void tearDown(void) {}
+    :units:
+    - :pass: TRUE
+      :should: 'successfully exercise simple ExpectAndReturn mock calls'
+      :code: |
+        test()
+        {
+          bar_Expect(2);
+          foo_ExpectAndReturn(1, 10);
+          foo_ExpectAndReturn(2, 20);
+          foo_ExpectAndReturn(3, 30);
+          TEST_ASSERT_EQUAL(60, function(1, 2, 3));
+        }
+
+    - :pass: TRUE
+      :should: 'ignore foo() calls'
+      :code: |
+        test()
+        {
+          bar_Expect(4);
+          foo_IgnoreAndReturn(10);
+          foo_IgnoreAndReturn(40);
+          foo_IgnoreAndReturn(80);
+          TEST_ASSERT_EQUAL(130, function(3, 4, 3));
+        }
+
+    - :pass: TRUE
+      :should: 'ignore the situation where foo() is not called even though we explicitly ignored it'
+      :code: |
+        test()
+        {
+          foo_IgnoreAndReturn(20);
+          //notice we do not call foo
+        }
+
+    - :pass: TRUE
+      :should: 'ignore foo() calls and always return last item if we run out'
+      :code: |
+        test()
+        {
+          bar_Expect(4);
+          foo_IgnoreAndReturn(20);
+          foo_IgnoreAndReturn(30);
+          TEST_ASSERT_EQUAL(80, function(3, 4, 9));
+        }
+
+    - :pass: TRUE
+      :should: 'ignore foo() calls and always return only item if only one specified'
+      :code: |
+        test()
+        {
+          bar_Expect(4);
+          foo_IgnoreAndReturn(20);
+          TEST_ASSERT_EQUAL(60, function(3, 4, 9));
+        }
+
+    - :pass: TRUE
+      :should: 'ignore bar() and foo() calls'
+      :code: |
+        test()
+        {
+          bar_Ignore();
+          foo_IgnoreAndReturn(50);
+          TEST_ASSERT_EQUAL(150, function(0, 0, 0));
+        }
+
+    - :pass: TRUE
+      :should: 'ignore foo() calls over multiple mock calls'
+      :code: |
+        test()
+        {
+          bar_Ignore();
+          foo_IgnoreAndReturn(50);
+          foo_IgnoreAndReturn(60);
+          foo_IgnoreAndReturn(70);
+          TEST_ASSERT_EQUAL(180, function(0, 0, 0));
+
+          bar_Ignore();
+          foo_IgnoreAndReturn(30);
+          foo_IgnoreAndReturn(80);
+          foo_IgnoreAndReturn(10);
+          TEST_ASSERT_EQUAL(120, function(0, 0, 0));
+
+          foo_IgnoreAndReturn(70);
+          foo_IgnoreAndReturn(20);
+          TEST_ASSERT_EQUAL(110, function(0, 0, 0));
+        }
+
+    - :pass: TRUE
+      :should: 'multiple cycles of expects still pass when ignores enabled'
+      :code: |
+        test()
+        {
+          bar_Expect(2);
+          foo_ExpectAndReturn(1, 50);
+          foo_ExpectAndReturn(2, 60);
+          foo_ExpectAndReturn(3, 70);
+          TEST_ASSERT_EQUAL(180, function(1, 2, 3));
+
+          bar_Expect(5);
+          foo_ExpectAndReturn(4, 30);
+          foo_ExpectAndReturn(5, 80);
+          foo_ExpectAndReturn(6, 10);
+          TEST_ASSERT_EQUAL(120, function(4, 5, 6));
+
+          bar_Expect(8);
+          foo_ExpectAndReturn(7, 70);
+          foo_ExpectAndReturn(8, 20);
+          foo_ExpectAndReturn(9, 20);
+          TEST_ASSERT_EQUAL(110, function(7, 8, 9));
+        }
+
+    - :pass: FALSE
+      :should: 'multiple cycles of expects still fail when ignores enabled'
+      :code: |
+        test()
+        {
+          bar_Expect(2);
+          foo_ExpectAndReturn(1, 50);
+          foo_ExpectAndReturn(2, 60);
+          foo_ExpectAndReturn(3, 70);
+          TEST_ASSERT_EQUAL(180, function(1, 2, 3));
+
+          bar_Expect(5);
+          foo_ExpectAndReturn(4, 30);
+          foo_ExpectAndReturn(5, 80);
+          foo_ExpectAndReturn(6, 10);
+          TEST_ASSERT_EQUAL(120, function(4, 5, 6));
+
+          bar_Expect(8);
+          foo_ExpectAndReturn(7, 70);
+          foo_ExpectAndReturn(8, 20);
+          foo_ExpectAndReturn(9, 20);
+          TEST_ASSERT_EQUAL(110, function(0, 8, 9));
+        }
+
+    - :pass: FALSE
+      :should: 'With "fail_on_unexpected_calls" enabled, Expect/Ignore/... of bar is required and test fails.'
+      :code: |
+        test()
+        {
+          function(1, 2, 3);
+        }
+
+    - :pass: TRUE
+      :should: 'we can override an ignore with an expect and pass'
+      :code: |
+        test()
+        {
+          bar_Ignore();
+
+          bar_Expect(2);
+          foo_ExpectAndReturn(1, 50);
+          foo_ExpectAndReturn(2, 60);
+          foo_ExpectAndReturn(3, 70);
+          TEST_ASSERT_EQUAL(180, function(1, 2, 3));
+
+          bar_Expect(5);
+          foo_ExpectAndReturn(4, 30);
+          foo_ExpectAndReturn(5, 80);
+          foo_ExpectAndReturn(6, 10);
+          TEST_ASSERT_EQUAL(120, function(4, 5, 6));
+
+          bar_Expect(8);
+          foo_ExpectAndReturn(7, 70);
+          foo_ExpectAndReturn(8, 20);
+          foo_ExpectAndReturn(9, 20);
+          TEST_ASSERT_EQUAL(110, function(7, 8, 9));
+        }
+
+    - :pass: FALSE
+      :should: 'we can override an ignore with an expect and fail'
+      :code: |
+        test()
+        {
+          bar_Ignore();
+
+          bar_Expect(2);
+          foo_ExpectAndReturn(1, 50);
+          foo_ExpectAndReturn(2, 60);
+          foo_ExpectAndReturn(3, 70);
+          TEST_ASSERT_EQUAL(180, function(1, 2, 3));
+
+          bar_Expect(5);
+          foo_ExpectAndReturn(4, 30);
+          foo_ExpectAndReturn(5, 80);
+          foo_ExpectAndReturn(6, 10);
+          TEST_ASSERT_EQUAL(120, function(4, 5, 6));
+
+          bar_Expect(9);
+          foo_ExpectAndReturn(7, 70);
+          foo_ExpectAndReturn(8, 20);
+          foo_ExpectAndReturn(9, 20);
+          TEST_ASSERT_EQUAL(110, function(7, 8, 9));
+        }
+
+    - :pass: TRUE
+      :should: 'we can override an ignore and return with an expect and pass'
+      :code: |
+        test()
+        {
+          bar_Ignore();
+          foo_IgnoreAndReturn(30);
+          TEST_ASSERT_EQUAL(90, function(1, 2, 3));
+
+          bar_Expect(5);
+          foo_ExpectAndReturn(4, 30);
+          foo_ExpectAndReturn(5, 80);
+          foo_ExpectAndReturn(6, 10);
+          TEST_ASSERT_EQUAL(120, function(4, 5, 6));
+
+          bar_Expect(8);
+          foo_ExpectAndReturn(7, 70);
+          foo_ExpectAndReturn(8, 20);
+          foo_ExpectAndReturn(9, 20);
+          TEST_ASSERT_EQUAL(110, function(7, 8, 9));
+        }
+
+    - :pass: FALSE
+      :should: 'we can override an ignore and return with an expect and fail'
+      :code: |
+        test()
+        {
+          bar_Ignore();
+          foo_IgnoreAndReturn(0);
+          TEST_ASSERT_EQUAL(0, function(1, 2, 3));
+
+          bar_Expect(5);
+          foo_ExpectAndReturn(4, 30);
+          foo_ExpectAndReturn(5, 80);
+          foo_ExpectAndReturn(6, 10);
+          TEST_ASSERT_EQUAL(120, function(4, 5, 6));
+
+          bar_Expect(9);
+          foo_ExpectAndReturn(7, 70);
+          foo_ExpectAndReturn(8, 20);
+          foo_ExpectAndReturn(9, 20);
+          TEST_ASSERT_EQUAL(110, function(7, 8, 9));
+        }
+
+    - :pass: TRUE
+      :should: 'we can override an an expect with an ignore'
+      :code: |
+        test()
+        {
+          bar_Expect(5);
+          bar_Ignore();
+          foo_ExpectAndReturn(1, 50);
+          foo_ExpectAndReturn(2, 60);
+          foo_ExpectAndReturn(3, 70);
+          TEST_ASSERT_EQUAL(180, function(1, 2, 3));
+        }
+
+    - :pass: TRUE
+      :should: 'we can override an expect with an ignore and return and pass'
+      :code: |
+        test()
+        {
+          bar_Ignore();
+          foo_IgnoreAndReturn(0);
+          TEST_ASSERT_EQUAL(0, function(1, 2, 3));
+
+          bar_Expect(5);
+          foo_ExpectAndReturn(4, 30);
+          foo_ExpectAndReturn(5, 80);
+          foo_IgnoreAndReturn(10);
+          TEST_ASSERT_EQUAL(120, function(4, 5, 6));
+
+          bar_Ignore();
+          foo_IgnoreAndReturn(60);
+          TEST_ASSERT_EQUAL(180, function(7, 8, 9));
+        }
+
+    - :pass: FALSE
+      :should: 'we can override an expect with an ignore and return and fail after'
+      :code: |
+        test()
+        {
+          bar_Expect(5);
+          foo_ExpectAndReturn(4, 30);
+          foo_ExpectAndReturn(5, 50);
+          foo_IgnoreAndReturn(20);
+          TEST_ASSERT_EQUAL(100, function(4, 5, 6));
+
+          bar_Expect(5);
+          foo_ExpectAndReturn(9, 30); //THIS ONE WILL FAIL
+          foo_ExpectAndReturn(2, 80);
+          foo_ExpectAndReturn(3, 60);
+          TEST_ASSERT_EQUAL(170, function(1, 2, 3));
+        }
+
+    - :pass: TRUE
+      :should: 'we can override an expect with an ignore and return and the expected values are ignored'
+      :code: |
+        test()
+        {
+          bar_Expect(5);
+          foo_ExpectAndReturn(2, 30); //NOTE THIS WOULD NORMALLY FAIL
+          foo_ExpectAndReturn(5, 50);
+          foo_IgnoreAndReturn(20);    //BUT WE SAID WE NO LONGER CARE
+          TEST_ASSERT_EQUAL(100, function(4, 5, 6));
+        }
+
+...
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/ignore_strict_mock_calling.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/ignore_strict_mock_calling.yml
new file mode 100644
index 000000000..bcfe04c5e
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/ignore_strict_mock_calling.yml
@@ -0,0 +1,37 @@
+---
+:cmock:
+  :plugins:
+  - 'ignore'
+  :fail_on_unexpected_calls: FALSE
+
+:systest:
+  :types: |
+
+  :mockable: |
+    int foo(int a);
+    void bar(int b);
+
+  :source:
+    :header: |
+      int function(int a, int b, int c);
+    :code: |
+      int function(int a, int b, int c)
+      {
+        bar(b);
+        return foo(a) + foo(b) + foo(c);
+      }
+
+  :tests:
+    :common: |
+      void setUp(void) {}
+      void tearDown(void) {}
+    :units:
+    - :pass: TRUE
+      :should: 'With "fail_on_unexpected_calls" disabled, Expect/Ignore/... of bar is NOT required.'
+      :code: |
+        test()
+        {
+          function(1, 2, 3);
+        }
+
+...
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/newer_standards_stuff1.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/newer_standards_stuff1.yml
new file mode 100644
index 000000000..6843eae60
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/newer_standards_stuff1.yml
@@ -0,0 +1,52 @@
+---
+#The purpose of this test is to pull in some standard library stuff from C99
+:cmock:
+  :includes:
+    - "<stdint.h>"
+    - "<limits.h>"
+
+:systest:
+  :types: |
+    #include <stdint.h>
+    #include <limits.h>
+  
+  
+  :mockable: |
+    int32_t foo(int32_t a);
+
+  :source: 
+    :header: |    
+      int8_t function_a(void);
+
+    :code: |
+      int8_t function_a(void) {
+        return (int8_t)(INT_MIN == foo(INT_MAX));
+      }
+      
+  :tests:
+    :common: |
+      void setUp(void) {}
+      void tearDown(void) {}
+      
+    :units:
+    - :pass: TRUE
+      :should: 'handle handle a simple comparison of C99 types which pass'
+      :code: |
+        test()
+        {
+          foo_ExpectAndReturn(INT_MAX, INT_MIN);
+          
+          TEST_ASSERT_TRUE(function_a());
+        }
+
+    - :pass: FALSE
+      :should: 'handle handle a simple comparison of C99 types which fail'
+      :code: |
+        test()
+        {
+          foo_ExpectAndReturn(INT_MIN, INT_MIN);
+          
+          TEST_ASSERT_TRUE(function_a());
+        }
+        
+...
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/nonstandard_parsed_stuff_1.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/nonstandard_parsed_stuff_1.yml
new file mode 100644
index 000000000..01538ea32
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/nonstandard_parsed_stuff_1.yml
@@ -0,0 +1,91 @@
+---
+#The purpose of this test is to play with things like "const char const *" which isn't supported by some compilers
+:cmock:
+  :enforce_strict_ordering: 1
+  :plugins:
+  - :array
+  - :cexception
+  - :ignore
+
+:systest:
+  :types: |
+    typedef struct _POINT_T {
+      int x;
+      int y;
+    } POINT_T;
+
+  :mockable: |
+    #include  "CException.h"
+    void foos(const char const * a);
+    const char const * bars(void);
+
+  :source: 
+    :header: |   
+      #include "CException.h" 
+      void function_a(void);
+      void function_b(void);
+      void function_c(void);
+      int function_d(void);
+
+    :code: |
+      void function_c(void) {
+        CEXCEPTION_T e;
+        Try {
+          foos(bars());
+        } Catch(e) { foos("err"); }
+      }
+      
+  :tests:
+    :common: |
+      #include "CException.h"
+      void setUp(void) {}
+      void tearDown(void) {}
+      
+    :units:
+    - :pass: TRUE
+      :should: 'handle standard c string as null terminated on not do crappy memory compares of a byte, passing'
+      :code: |
+        test()
+        {
+          bars_ExpectAndReturn("This is a\0 silly string");
+          foos_Expect("This is a\0 wacky string");
+          
+          function_c();
+        }
+        
+    - :pass: FALSE
+      :should: 'handle standard c string as null terminated on not do crappy memory compares of a byte, finding failures'
+      :code: |
+        test()
+        {
+          bars_ExpectAndReturn("This is a silly string");
+          foos_Expect("This is a wacky string");
+          
+          function_c();
+        }
+
+    - :pass: TRUE
+      :should: 'handle an exception being caught'
+      :code: |
+        test()
+        {
+          bars_ExpectAndReturn("This is a\0 silly string");
+          foos_ExpectAndThrow("This is a\0 wacky string", 55);
+          foos_Expect("err");
+          
+          function_c();
+        }
+
+    - :pass: FALSE
+      :should: 'handle an exception being caught but still catch following errors'
+      :code: |
+        test()
+        {
+          bars_ExpectAndReturn("This is a\0 silly string");
+          foos_ExpectAndThrow("This is a\0 wacky string", 55);
+          foos_Expect("wrong error");
+          
+          function_c();
+        }
+
+...
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/nonstandard_parsed_stuff_2.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/nonstandard_parsed_stuff_2.yml
new file mode 100644
index 000000000..506e7ee8a
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/nonstandard_parsed_stuff_2.yml
@@ -0,0 +1,59 @@
+---
+#The purpose of this test is to play with our really rough multidimensional array support, which involves an implicit cast not supported everywhere
+:cmock:
+  :plugins:
+  - :array
+
+:systest:
+  :types: |
+
+
+  :mockable: |
+    void foo(unsigned char** a);
+    unsigned char** bar(void);
+
+  :source:
+    :header: |
+      void function_a(void);
+
+    :code: |
+      void function_a(void) {
+        foo(bar());
+      }
+
+  :tests:
+    :common: |
+      void setUp(void) {}
+      void tearDown(void) {}
+
+    :units:
+    - :pass: TRUE
+      :should: 'handle two dimensional array of unsigned characters just like we would handle a single dimensional array in expect (where we really only care about first element)'
+      :code: |
+        test()
+        {
+          unsigned char a[] = { 1, 2, 3, 4, 5, 6 };
+          unsigned char** pa = (unsigned char**)(&a);
+
+          bar_ExpectAndReturn(pa);
+          foo_Expect(pa);
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'handle two dimensional array of unsigned characters just like we would handle a single dimensional array in expect as failures (where we really only care about first element)'
+      :code: |
+        test()
+        {
+          unsigned char a[] = { 1, 2, 3, 4, 5, 6 };
+          unsigned char b[] = { 5, 6, 7, 8, 9, 0 };
+          unsigned char** pa = (unsigned char**)(&a);
+          unsigned char** pb = (unsigned char**)(&b);
+
+          bar_ExpectAndReturn(pa);
+          foo_Expect(pb);
+
+          function_a();
+        }
+...
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/out_of_memory.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/out_of_memory.yml
new file mode 100644
index 000000000..ed7bed5c1
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/out_of_memory.yml
@@ -0,0 +1,65 @@
+---
+:cmock:
+  :plugins: []
+  :treat_as:
+    custom_type: INT
+
+:systest:
+  :types: |
+    typedef struct _BIG_FAT_STRUCT_T
+    {
+      char bytes[512];
+    } BIG_FAT_STRUCT_T;
+
+  :mockable: |
+    void foo(BIG_FAT_STRUCT_T a);
+
+  :source:
+    :header: |
+      void   function_a(void);
+      void   function_b(void);
+
+    :code: |
+      void function_a(void)
+      {
+        BIG_FAT_STRUCT_T stuff = { { 8, 0 } };
+        foo(stuff);
+      }
+
+      void function_b(void)
+      {
+        BIG_FAT_STRUCT_T stuff1 = { { 9, 1, 0 } };
+        BIG_FAT_STRUCT_T stuff2 = { { 9, 2, 0 } };
+        foo(stuff1);
+        foo(stuff2);
+      }
+
+  :tests:
+    :common: |
+      void setUp(void) {}
+      void tearDown(void) {}
+
+    :units:
+    - :pass: TRUE
+      :should: 'successfully should be able to run function a because it only takes half the memory'
+      :code: |
+        test()
+        {
+          BIG_FAT_STRUCT_T expected = { { 8, 0 } };
+          foo_Expect(expected);
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'should error out because we do not have eough memory to handle two of these structures'
+      :code: |
+        test()
+        {
+          BIG_FAT_STRUCT_T expected1 = { { 9, 1, 0 } };
+          BIG_FAT_STRUCT_T expected2 = { { 9, 2, 0 } };
+          foo_Expect(expected1);
+          foo_Expect(expected2);
+          function_b();
+        }
+
+...
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/parsing_challenges.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/parsing_challenges.yml
new file mode 100644
index 000000000..77e857d86
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/parsing_challenges.yml
@@ -0,0 +1,242 @@
+---
+:cmock:
+  :plugins:
+  - # no plugins
+  :treat_as_void:
+  - VOID_TYPE_CRAZINESS_CFG
+  :treat_as:
+    TypeDefInt: HEX8
+    VOID_TYPE_CRAZINESS_CFG*: PTR
+
+:systest:
+  :types: |
+    typedef unsigned short U16;
+    typedef struct _POINT_T
+    {
+      int x;
+      int y;
+    } POINT_T;
+    typedef void VOID_TYPE_CRAZINESS_CFG;
+    typedef int TypeDefInt;
+
+  :mockable: |
+    /* Make sure we ignore the following
+    #include "NonExistantFile.h
+    */
+    //#include "AndIgnoreThisToo.h"
+    #ifdef __cplusplus
+    extern "C" {
+    #endif
+    #define SHOULD_IGNORE_NEXT_FUNC_DEF_AS_PART_OF_MACRO   \
+            void IgnoredFunction(NotAValidType ToMakeItFailIfWeActuallyMockedThis);
+
+    // typedef edge case; must be in mockable.h for test to compile
+    // not ANSI C but it has been done and will break cmock if not handled
+    typedef void VOID_TYPE_CRAZINESS_LCL;
+
+    VOID_TYPE_CRAZINESS_LCL void_type_craziness1(int * a, int *b, int* c);
+    void void_type_craziness2(VOID_TYPE_CRAZINESS_CFG);
+    void void_type_craziness3(VOID_TYPE_CRAZINESS_CFG* a);
+
+    // pointer parsing exercise
+    U16  *ptr_return1(int a);
+    U16*  ptr_return2(int a);
+    U16 * ptr_return3(int a);
+
+    unsigned int** ptr_ptr_return1(unsigned int** a);
+    unsigned int* *ptr_ptr_return2(unsigned int* *a);
+    unsigned int **ptr_ptr_return3(unsigned int **a);
+    unsigned int ** ptr_ptr_return4(unsigned int ** a);
+
+    // variable argument lists
+    void var_args1(int a, ...);
+    void var_args2(int a, int b, ...);
+
+    // parsing "stress tests"
+    char
+    crazy_multiline(
+      int a,
+      unsigned int b);
+
+    unsigned long int incredible_descriptors(register const unsigned short a);
+
+    TypeDefInt uses_typedef_like_names(TypeDefInt typedefvar);
+
+    void oh_brackets1(int fudge[5]);
+    void oh_brackets2(int caramel[]);
+    void oh_brackets3(int toffee[(32)]);
+    void oh_brackets4(int taffy[ (64) ]);
+    #ifdef __cplusplus
+    }
+    #endif
+
+  :source:
+    :header: |
+      U16* exercise_return_pointers(int a);
+      void exercise_var_args(int a, int b);
+      void exercise_arglist_pointers(void);
+      char exercise_multiline_declarations(int a, unsigned int b);
+      void exercise_double_pointers(unsigned int** a);
+      int  exercise_many_descriptors(int a);
+      void exercise_type_craziness3(VOID_TYPE_CRAZINESS_CFG* a);
+      TypeDefInt exercise_typedef_like_names(TypeDefInt a);
+
+    :code: |
+      int A, B, C;
+      unsigned int *pA, *pB, *pC;
+
+      U16* exercise_return_pointers(int a)
+      {
+        ptr_return1(a);
+        ptr_return2(a);
+        return ptr_return3(a);
+      }
+
+      void exercise_var_args(int a, int b)
+      {
+        var_args1(a, 3);
+        var_args2(a, b, 'c');
+      }
+
+      void exercise_arglist_pointers(void)
+      {
+        void_type_craziness1(&A, &B, &C);
+        void_type_craziness2();
+      }
+
+      char exercise_multiline_declarations(int a, unsigned int b)
+      {
+        return crazy_multiline(a, b);
+      }
+
+      void exercise_double_pointers(unsigned int** a)
+      {
+        ptr_ptr_return1((unsigned int**)a);
+        ptr_ptr_return2((unsigned int**)a);
+        ptr_ptr_return3((unsigned int**)a);
+        ptr_ptr_return4((unsigned int**)a);
+      }
+
+      int exercise_many_descriptors(int a)
+      {
+        return (int)incredible_descriptors((unsigned short)a);
+      }
+
+      void exercise_type_craziness3(VOID_TYPE_CRAZINESS_CFG* a)
+      {
+        void_type_craziness3(a);
+      }
+
+      TypeDefInt exercise_typedef_like_names(TypeDefInt a)
+      {
+        return uses_typedef_like_names(a);
+      }
+
+  :tests:
+    :common: |
+      extern int A, B, C;
+      extern unsigned int *pA, *pB, *pC;
+
+      void setUp(void)
+      {
+        A = 100;
+        B = 200;
+        C = 300;
+        pA = (unsigned int*)(&A);
+        pB = (unsigned int*)(&B);
+        pC = (unsigned int*)(&C);
+      }
+      void tearDown(void) {}
+    :units:
+    - :pass: TRUE
+      :should: 'execute simple pointer return value check'
+      :code: |
+        test()
+        {
+          U16 retval;
+          ptr_return1_ExpectAndReturn(2, NULL);
+          ptr_return2_ExpectAndReturn(2, NULL);
+          ptr_return3_ExpectAndReturn(2, &retval);
+          TEST_ASSERT_EQUAL_PTR(&retval, exercise_return_pointers(2));
+        }
+
+    - :pass: TRUE
+      :should: 'ignore var args in expect prototype generation'
+      :code: |
+        test()
+        {
+          var_args1_Expect(2);
+          var_args2_Expect(2, 3);
+          exercise_var_args(2, 3);
+        }
+
+    - :pass: TRUE
+      :should: "not process a typedef'd void as anything other than void"
+      :code: |
+        test()
+        {
+          void_type_craziness1_Expect(&A, &B, &C);
+          void_type_craziness2_Expect();
+          exercise_arglist_pointers();
+        }
+
+    - :pass: TRUE
+      :should: 'successfully mock crazy multline function prototypes'
+      :code: |
+        test()
+        {
+          crazy_multiline_ExpectAndReturn(-10, 11, 'z');
+          TEST_ASSERT_EQUAL('z', exercise_multiline_declarations(-10, 11));
+        }
+
+    - :pass: TRUE
+      :should: 'mock double pointers just fine'
+      :code: |
+        test()
+        {
+          ptr_ptr_return1_ExpectAndReturn(&pA, &pB);
+          ptr_ptr_return2_ExpectAndReturn(&pA, &pB);
+          ptr_ptr_return3_ExpectAndReturn(&pA, &pB);
+          ptr_ptr_return4_ExpectAndReturn(&pA, &pB);
+          exercise_double_pointers((unsigned int**)(&pA));
+        }
+
+    - :pass: TRUE
+      :should: 'mock prototypes with long lists of return and parameter type descriptors'
+      :code: |
+        test()
+        {
+          incredible_descriptors_ExpectAndReturn(888, 777);
+          TEST_ASSERT_EQUAL(777, exercise_many_descriptors(888));
+        }
+
+    - :pass: TRUE
+      :should: 'handle words like typdef as PART of a variable or type'
+      :code: |
+        test()
+        {
+          uses_typedef_like_names_ExpectAndReturn((TypeDefInt)54, (TypeDefInt)53);
+          TEST_ASSERT_EQUAL(53, exercise_typedef_like_names((TypeDefInt)54));
+        }
+
+    - :pass: FALSE
+      :should: 'handle words like typdef as PART of a variable or type during failing tests'
+      :code: |
+        test()
+        {
+          uses_typedef_like_names_ExpectAndReturn((TypeDefInt)52, (TypeDefInt)53);
+          TEST_ASSERT_EQUAL(53, exercise_typedef_like_names((TypeDefInt)54));
+        }
+
+    - :pass: TRUE
+      :should: 'handle typedef of void used as a void pointer'
+      :code: |
+        test()
+        {
+          char blah[5] = "blah";
+          void_type_craziness3_Expect(blah);
+          exercise_type_craziness3(blah);
+        }
+
+
+...
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/return_thru_ptr_and_expect_any_args.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/return_thru_ptr_and_expect_any_args.yml
new file mode 100644
index 000000000..40e0e7f62
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/return_thru_ptr_and_expect_any_args.yml
@@ -0,0 +1,235 @@
+---
+:cmock:
+    :mock_path: test/mocks
+    :mock_prefix: mock_
+    :treat_as:
+        abs_struct: PTR
+        intptr: INT*
+    :when_ptr: :smart
+    :plugins:
+        - :array
+        - :ignore_arg
+        - :return_thru_ptr
+
+:systest:
+  :types: |
+    typedef int *intptr;
+
+    struct a_struct
+    {
+        int i1;
+        int i2;
+        int i3;
+    };
+
+    struct _abs_struct
+    {
+        int abs_i1;
+        int abs_i2;
+    };
+
+    typedef struct _abs_struct abs_struct;
+
+  :mockable: |
+      void ptr_ret_int(int *r);
+      void ptr_ret_ints(int *r, int *s);
+      void ptr_ret_array(char r[], int len);
+      void ptr_ret_typedef(intptr r);
+      void ptr_ret_struct(struct a_struct *r);
+      void ptr_ret_abstract(abs_struct *r);
+      void ptr_ret_abstract_array(abs_struct *r, int len);
+      void ptr_ret_const_int(int *r, const int *s);
+      void ptr_ret_string(char *s);
+
+  :source:
+    :header: |
+      #include <string.h>
+      #define lengthof(x) (sizeof(x)/sizeof((x)[0]))
+
+    :code: |
+
+  :tests:
+    :common: |
+      void setUp(void) {}
+      void tearDown(void) {}
+
+    :units:
+    - :pass: TRUE
+      :should: "handle a single int* argument"
+      :code: |
+        test()
+        {
+          int r = 1;
+          int res = 4;
+
+          ptr_ret_int_Expect(&r);
+          ptr_ret_int_ReturnThruPtr_r(&res);
+          ptr_ret_int(&r);
+          TEST_ASSERT_EQUAL(4, r);
+        }
+
+    - :pass: TRUE
+      :should: "handle multiple calls"
+      :code: |
+        test()
+        {
+          int r = 1;
+          int res1 = 4;
+          int res2 = 8;
+          int res3 = 16;
+
+          ptr_ret_int_Expect(&r);
+          ptr_ret_int_ReturnThruPtr_r(&res1);
+          ptr_ret_int_Expect(&r);
+          ptr_ret_int_ReturnThruPtr_r(&res2);
+          ptr_ret_int_Expect(&r);
+          ptr_ret_int_ReturnThruPtr_r(&res3);
+
+          ptr_ret_int(&r);
+          TEST_ASSERT_EQUAL(4, r);
+          ptr_ret_int(&r);
+          TEST_ASSERT_EQUAL(8, r);
+          ptr_ret_int(&r);
+          TEST_ASSERT_EQUAL(16, r);
+
+        }
+
+    - :pass: TRUE
+      :should: "ignore an argument"
+      :code: |
+        test()
+        {
+          int r = 1, s = 2;
+          int res = 4;
+
+          ptr_ret_int_Expect(&r);
+          ptr_ret_int_IgnoreArg_r();
+          ptr_ret_int_ReturnThruPtr_r(&res);
+          ptr_ret_int(&s);
+          TEST_ASSERT_EQUAL(4, s);
+        }
+
+    - :pass: TRUE
+      :should: "ignore a null pointer argument"
+      :code: |
+        test()
+        {
+          int r = 1;
+          int res = 4;
+
+          ptr_ret_int_Expect(NULL);
+          ptr_ret_int_IgnoreArg_r();
+          ptr_ret_int_ReturnThruPtr_r(&res);
+          ptr_ret_int(&r);
+          TEST_ASSERT_EQUAL(4, r);
+        }
+
+    - :pass: TRUE
+      :should: "handle multiple int* arguments"
+      :code: |
+        test()
+        {
+          int r, s = 0x0880AA55;
+          int r_res = 4;
+          int s_res = 6;
+
+          ptr_ret_ints_Expect(&r, &s);
+          ptr_ret_ints_ReturnThruPtr_r(&r_res);
+          ptr_ret_ints_ReturnThruPtr_s(&s_res);
+          ptr_ret_ints(&r, &s);
+          TEST_ASSERT_EQUAL(4, r);
+          TEST_ASSERT_EQUAL(6, s);
+        }
+
+    - :pass: TRUE
+      :should: "only return through pointer when asked to"
+      :code: |
+        test()
+        {
+          int r = 0x0880AA55;
+          int s = 0xAA55;
+          int r_res = 4;
+
+          ptr_ret_ints_Expect(&r, &s);
+          ptr_ret_ints_ReturnThruPtr_r(&r_res);
+          ptr_ret_ints(&r, &s);
+          TEST_ASSERT_EQUAL(4, r);
+          TEST_ASSERT_EQUAL(0xAA55, s);
+        }
+
+    - :pass: TRUE
+      :should: "return an array through a pointer correctly"
+      :code: |
+        test()
+        {
+          char r_a[] = "booboorooboo";
+          char r_a_ret[] = "FEEFI";
+
+          ptr_ret_array_Expect(r_a, lengthof(r_a));
+          ptr_ret_array_ReturnArrayThruPtr_r(r_a_ret, (int)strlen(r_a_ret));
+          ptr_ret_array(r_a, lengthof(r_a));
+          TEST_ASSERT_EQUAL_STRING("FEEFIorooboo", r_a);
+        }
+
+    - :pass: TRUE
+      :should: "handle structs"
+      :code: |
+        test()
+        {
+          struct a_struct r_s = { .i1 = 2, .i2 = 3, .i3 = 4, };
+          struct a_struct r_s_ret = { .i1 = 8, .i2 = 16, .i3 = 32, };
+
+          ptr_ret_struct_Expect(&r_s);
+          ptr_ret_struct_ReturnThruPtr_r(&r_s_ret);
+          ptr_ret_struct(&r_s);
+          TEST_ASSERT_EQUAL_MEMORY(&r_s_ret, &r_s, sizeof(struct a_struct));
+        }
+
+    - :pass: TRUE
+      :should: "handle typedefs"
+      :code: |
+        test()
+        {
+          abs_struct r_as = {.abs_i1 = 0x1234, .abs_i2 = 0x4567};
+          abs_struct r_as_ret = {.abs_i1 = 0xFFAA55, .abs_i2 = 0xAAFFAA};
+          ptr_ret_abstract_Expect(&r_as);
+          ptr_ret_abstract_ReturnMemThruPtr_r(&r_as_ret, sizeof(abs_struct));
+          ptr_ret_abstract(&r_as);
+          TEST_ASSERT_EQUAL_MEMORY(&r_as_ret, &r_as, sizeof(abs_struct));
+        }
+
+    - :pass: TRUE
+      :should: "only generate ReturnThruPtr definitions for non-const arguments"
+      :code: |
+        test()
+        {
+        #if !defined(ptr_ret_const_int_ReturnThruPtr_r)
+            TEST_FAIL_MESSAGE("ReturnThruPtr not defined for a pointer argument.");
+        #endif
+
+        #if defined(ptr_ret_const_int_ReturnThruPtr_s)
+            TEST_FAIL_MESSAGE("ReturnThruPtr defined for a const pointer argument.");
+        #endif
+        }
+
+    - :pass: TRUE
+      :should: "generate ReturnThruPtr definitions for string arguments"
+      :code: |
+        test()
+        {
+        #if !defined(ptr_ret_string_ReturnThruPtr_s)
+            TEST_FAIL_MESSAGE("ReturnThruPtr not defined for a string argument.");
+        #endif
+        }
+
+    - :pass: TRUE
+      :should: "generate IgnoreArg definitions"
+      :code: |
+        test()
+        {
+        #if !defined(ptr_ret_array_IgnoreArg_r)         \
+            || !defined(ptr_ret_array_IgnoreArg_len)    \
+            || !defined(ptr_ret_const_int_IgnoreArg_s)
+            TEST_FAIL_MESSAGE("IgnoreArg not defined for an argument.");
+        #endif
+        }
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/return_thru_ptr_ignore_arg.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/return_thru_ptr_ignore_arg.yml
new file mode 100644
index 000000000..8b07be997
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/return_thru_ptr_ignore_arg.yml
@@ -0,0 +1,231 @@
+---
+:cmock:
+    :mock_path: test/mocks
+    :mock_prefix: mock_
+    :treat_as:
+        abs_struct: PTR
+        intptr: INT*
+    :when_ptr: :smart
+    :plugins:
+        - :array
+        - :expect_any_args
+        - :return_thru_ptr
+
+:systest:
+  :types: |
+    typedef int *intptr;
+
+    struct a_struct
+    {
+        int i1;
+        int i2;
+        int i3;
+    };
+
+    struct _abs_struct
+    {
+        int abs_i1;
+        int abs_i2;
+    };
+
+    typedef struct _abs_struct abs_struct;
+
+  :mockable: |
+      void ptr_ret_int(int *r);
+      void ptr_ret_ints(int *r, int *s);
+      void ptr_ret_array(char r[], int len);
+      void ptr_ret_typedef(intptr r);
+      void ptr_ret_struct(struct a_struct *r);
+      void ptr_ret_abstract(abs_struct *r);
+      void ptr_ret_abstract_array(abs_struct *r, int len);
+      void ptr_ret_const_int(int *r, const int *s);
+      void ptr_ret_string(char *s);
+
+  :source:
+    :header: |
+      #include <string.h>
+      #define lengthof(x) (sizeof(x)/sizeof((x)[0]))
+
+    :code: |
+
+  :tests:
+    :common: |
+      void setUp(void) {}
+      void tearDown(void) {}
+
+    :units:
+    - :pass: TRUE
+      :should: "handle a single int* argument"
+      :code: |
+        test()
+        {
+          int r = 1;
+          int res = 4;
+
+          ptr_ret_int_Expect(&r);
+          ptr_ret_int_ReturnThruPtr_r(&res);
+          ptr_ret_int(&r);
+          TEST_ASSERT_EQUAL(4, r);
+        }
+
+    - :pass: TRUE
+      :should: "handle multiple calls"
+      :code: |
+        test()
+        {
+          int r = 1;
+          int res1 = 4;
+          int res2 = 8;
+          int res3 = 16;
+
+          ptr_ret_int_Expect(&r);
+          ptr_ret_int_ReturnThruPtr_r(&res1);
+          ptr_ret_int_Expect(&r);
+          ptr_ret_int_ReturnThruPtr_r(&res2);
+          ptr_ret_int_Expect(&r);
+          ptr_ret_int_ReturnThruPtr_r(&res3);
+
+          ptr_ret_int(&r);
+          TEST_ASSERT_EQUAL(4, r);
+          ptr_ret_int(&r);
+          TEST_ASSERT_EQUAL(8, r);
+          ptr_ret_int(&r);
+          TEST_ASSERT_EQUAL(16, r);
+
+        }
+
+    - :pass: TRUE
+      :should: "ignore an argument"
+      :code: |
+        test()
+        {
+          int s = 2;
+          int res = 4;
+
+          ptr_ret_int_ExpectAnyArgs();
+          ptr_ret_int_ReturnThruPtr_r(&res);
+          ptr_ret_int(&s);
+          TEST_ASSERT_EQUAL(4, s);
+        }
+
+    - :pass: TRUE
+      :should: "ignore a null pointer argument"
+      :code: |
+        test()
+        {
+          int r = 1;
+          int res = 4;
+
+          ptr_ret_int_ExpectAnyArgs();
+          ptr_ret_int_ReturnThruPtr_r(&res);
+          ptr_ret_int(&r);
+          TEST_ASSERT_EQUAL(4, r);
+        }
+
+    - :pass: TRUE
+      :should: "handle multiple int* arguments"
+      :code: |
+        test()
+        {
+          int r, s = 0x0880AA55;
+          int r_res = 4;
+          int s_res = 6;
+
+          ptr_ret_ints_Expect(&r, &s);
+          ptr_ret_ints_ReturnThruPtr_r(&r_res);
+          ptr_ret_ints_ReturnThruPtr_s(&s_res);
+          ptr_ret_ints(&r, &s);
+          TEST_ASSERT_EQUAL(4, r);
+          TEST_ASSERT_EQUAL(6, s);
+        }
+
+    - :pass: TRUE
+      :should: "only return through pointer when asked to"
+      :code: |
+        test()
+        {
+          int r = 0x0880AA55;
+          int s = 0xAA55;
+          int r_res = 4;
+
+          ptr_ret_ints_Expect(&r, &s);
+          ptr_ret_ints_ReturnThruPtr_r(&r_res);
+          ptr_ret_ints(&r, &s);
+          TEST_ASSERT_EQUAL(4, r);
+          TEST_ASSERT_EQUAL(0xAA55, s);
+        }
+
+    - :pass: TRUE
+      :should: "return an array through a pointer correctly"
+      :code: |
+        test()
+        {
+          char r_a[] = "booboorooboo";
+          char r_a_ret[] = "FEEFI";
+
+          ptr_ret_array_Expect(r_a, lengthof(r_a));
+          ptr_ret_array_ReturnArrayThruPtr_r(r_a_ret, (int)strlen(r_a_ret));
+          ptr_ret_array(r_a, lengthof(r_a));
+          TEST_ASSERT_EQUAL_STRING("FEEFIorooboo", r_a);
+        }
+
+    - :pass: TRUE
+      :should: "handle structs"
+      :code: |
+        test()
+        {
+          struct a_struct r_s = { .i1 = 2, .i2 = 3, .i3 = 4, };
+          struct a_struct r_s_ret = { .i1 = 8, .i2 = 16, .i3 = 32, };
+
+          ptr_ret_struct_Expect(&r_s);
+          ptr_ret_struct_ReturnThruPtr_r(&r_s_ret);
+          ptr_ret_struct(&r_s);
+          TEST_ASSERT_EQUAL_MEMORY(&r_s_ret, &r_s, sizeof(struct a_struct));
+        }
+
+    - :pass: TRUE
+      :should: "handle typedefs"
+      :code: |
+        test()
+        {
+          abs_struct r_as = {.abs_i1 = 0x1234, .abs_i2 = 0x4567};
+          abs_struct r_as_ret = {.abs_i1 = 0xFFAA55, .abs_i2 = 0xAAFFAA};
+          ptr_ret_abstract_Expect(&r_as);
+          ptr_ret_abstract_ReturnMemThruPtr_r(&r_as_ret, sizeof(abs_struct));
+          ptr_ret_abstract(&r_as);
+          TEST_ASSERT_EQUAL_MEMORY(&r_as_ret, &r_as, sizeof(abs_struct));
+        }
+
+    - :pass: TRUE
+      :should: "only generate ReturnThruPtr definitions for non-const arguments"
+      :code: |
+        test()
+        {
+        #if !defined(ptr_ret_const_int_ReturnThruPtr_r)
+            TEST_FAIL_MESSAGE("ReturnThruPtr not defined for a pointer argument.");
+        #endif
+
+        #if defined(ptr_ret_const_int_ReturnThruPtr_s)
+            TEST_FAIL_MESSAGE("ReturnThruPtr defined for a const pointer argument.");
+        #endif
+        }
+
+    - :pass: TRUE
+      :should: "generate ReturnThruPtr definitions for string arguments"
+      :code: |
+        test()
+        {
+        #if !defined(ptr_ret_string_ReturnThruPtr_s)
+            TEST_FAIL_MESSAGE("ReturnThruPtr not defined for a string argument.");
+        #endif
+        }
+
+    - :pass: TRUE
+      :should: "generate ExpectAnyArgs definitions"
+      :code: |
+        test()
+        {
+        #if !defined(ptr_ret_array_ExpectAnyArgs)
+            TEST_FAIL_MESSAGE("ExpectAnyArgs not defined for an argument.");
+        #endif
+        }
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/skeleton.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/skeleton.yml
new file mode 100644
index 000000000..772080022
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/skeleton.yml
@@ -0,0 +1,55 @@
+---
+:cmock:
+  :plugins:
+  - # none
+  :skeleton_path: system/generated
+
+:systest:
+  :types: |
+    #define UINT32 unsigned int
+
+  :mockable: |
+    UINT32 something(int a);
+
+  :skeleton: skeleton.h
+
+  :source:
+    :header: |
+      void function_a(void);
+      int function_b(int a, int b);
+      const char* function_c(void);
+
+    # we are purposefully not including a :code section because it will be generated with skeleton
+
+  :tests:
+    :common: |
+      void setUp(void) {}
+      void tearDown(void) {}
+
+    :units:
+    - :pass: TRUE
+      :should: 'generate an empty shell for functions with no return values'
+      :code: |
+        test()
+        {
+          function_a();
+        }
+
+    - :pass: TRUE
+      :should: 'return numerical zero for numerical return values'
+      :code: |
+        test()
+        {
+          TEST_ASSERT_EQUAL_INT(0, function_b(1, 2));
+        }
+
+    - :pass: TRUE
+      :should: 'return null for pointer return values'
+      :code: |
+        test()
+        {
+          TEST_ASSERT_NULL(function_c());
+        }
+
+
+...
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/skeleton_update.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/skeleton_update.yml
new file mode 100644
index 000000000..757e8b13d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/skeleton_update.yml
@@ -0,0 +1,76 @@
+---
+:cmock:
+  :plugins:
+  - # none
+  :skeleton_path: system/generated
+
+:systest:
+  :types: |
+    #define UINT32 unsigned int
+
+  :mockable: |
+    UINT32 something(int a);
+
+  :skeleton: skeleton_update.h
+
+  :source:
+    :header: |
+      void function_a(void);
+      int function_b(int a, int b);
+      const char* function_c(void);
+
+    # note that this code section exists and will be updated by the skeleton generator
+    :code: |
+      const char* donuts = "donuts";
+      const char* function_c(void)
+      {
+        return donuts;
+      }
+
+      int function_d(void)
+      {
+        return 77;
+      }
+
+
+  :tests:
+    :common: |
+      void setUp(void) {}
+      void tearDown(void) {}
+      extern int function_d();
+
+    :units:
+    - :pass: TRUE
+      :should: 'generate an empty shell for functions with no return values'
+      :code: |
+        test()
+        {
+          function_a();
+        }
+
+    - :pass: TRUE
+      :should: 'return numerical zero for numerical return values'
+      :code: |
+        test()
+        {
+          TEST_ASSERT_EQUAL_INT(0, function_b(1, 2));
+        }
+
+    - :pass: TRUE
+      :should: 'not overwrite functions that already exist'
+      :code: |
+        test()
+        {
+          TEST_ASSERT_EQUAL_STRING("donuts", function_c());
+        }
+
+    - :pass: TRUE
+      :should: 'leave functions it has never heard of'
+      :code: |
+        test()
+        {
+          TEST_ASSERT_EQUAL_INT(77, function_d());
+        }
+
+
+...
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/struct_union_enum_expect_and_return.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/struct_union_enum_expect_and_return.yml
new file mode 100644
index 000000000..d4cf6af19
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/struct_union_enum_expect_and_return.yml
@@ -0,0 +1,277 @@
+---
+:cmock:
+  :plugins:
+  - # none
+
+:systest:
+  :types: |
+    struct THING { int a; int b; };
+
+    union STARS_AND_STRIPES { int a; char b; };
+    
+    enum HOKEY_POKEY { IN, OUT, SHAKE_IT_ALL_ABOUT };
+
+  :mockable: |
+    void foo_struct(struct THING*, struct THING);
+    struct THING foobar_struct(void);
+
+    void foo_union(union STARS_AND_STRIPES*, union STARS_AND_STRIPES);
+    union STARS_AND_STRIPES foobar_union(void);
+
+    void foo_enum(enum HOKEY_POKEY a, enum HOKEY_POKEY * b);
+    enum HOKEY_POKEY foobar_enum(void);
+
+  :source: 
+    :header: |    
+      void exercise_struct(struct THING* a, struct THING b);
+      struct THING return_struct(void);
+
+      void exercise_union(union STARS_AND_STRIPES* a, union STARS_AND_STRIPES b);
+      union STARS_AND_STRIPES return_union(void);
+
+      void exercise_enum(enum HOKEY_POKEY a, enum HOKEY_POKEY * b);
+      enum HOKEY_POKEY return_enum(void);
+
+    :code: |
+      void exercise_struct(struct THING* a, struct THING b)
+      {
+        foo_struct(a, b);
+      }
+      
+      struct THING return_struct(void)
+      {
+        return foobar_struct();
+      }
+    
+      void exercise_union(union STARS_AND_STRIPES* a, union STARS_AND_STRIPES b)
+      {
+        foo_union(a, b);
+      }
+      
+      union STARS_AND_STRIPES return_union(void)
+      {
+        return foobar_union();
+      }
+
+      void exercise_enum(enum HOKEY_POKEY a, enum HOKEY_POKEY * b)
+      {
+        foo_enum(a, b);
+      }
+
+      enum HOKEY_POKEY return_enum(void)
+      {
+        return foobar_enum();
+      }
+
+
+  :tests:
+    :common: |
+      struct THING struct1;
+      struct THING struct2;
+      struct THING struct3;
+      struct THING struct4;
+      struct THING struct5;
+      struct THING struct6;
+    
+      union STARS_AND_STRIPES union1;
+      union STARS_AND_STRIPES union2;
+      union STARS_AND_STRIPES union3;
+      union STARS_AND_STRIPES union4;
+      union STARS_AND_STRIPES union5;
+      union STARS_AND_STRIPES union6;
+      
+      enum HOKEY_POKEY enum1;
+      enum HOKEY_POKEY enum2;
+
+      void setUp(void)
+      {
+        struct1.a = 1;
+        struct1.b = 2;
+        
+        struct2.a = 3;
+        struct2.b = 4;
+
+        struct3.a = 5;
+        struct3.b = 6;
+
+        struct4.a = 7;
+        struct4.b = 8;
+        
+        struct5.a = 9;
+        struct5.b = 10;
+
+        struct6.a = 9;
+        struct6.b = 10;
+
+        union1.a = 1;
+        union2.a = 2;
+        union3.a = 3;
+        union4.a = 4;
+        union5.a = 5;
+        union6.a = 5;
+        
+        enum1 = OUT;
+        enum2 = IN;
+      }
+      
+      void tearDown(void) {}
+            
+    :units:
+    - :pass: TRUE
+      :should: 'successfully compare structs'
+      :code: |
+        test()
+        {
+          foo_struct_Expect(&struct1, struct2);
+          exercise_struct(&struct1, struct2);
+        }
+
+    - :pass: FALSE
+      :should: 'blow up on bad struct pointer comparison'
+      :code: |
+        test()
+        {
+          foo_struct_Expect(&struct1, struct2);
+          exercise_struct(&struct3, struct2);
+        }
+
+    - :pass: FALSE
+      :should: 'blow up on bad structure comparison'
+      :code: |
+        test()
+        {
+          foo_struct_Expect(&struct1, struct2);
+          exercise_struct(&struct1, struct4);
+        }
+
+    - :pass: TRUE
+      :should: 'compare returned structs as equal'
+      :code: |
+        test()
+        {
+          foobar_struct_ExpectAndReturn(struct5);
+          TEST_ASSERT_EQUAL_THING(struct6, return_struct());
+        }
+
+    - :pass: FALSE
+      :should: 'compare returned structs as unequal'
+      :code: |
+        test()
+        {
+          foobar_struct_ExpectAndReturn(struct4);
+          TEST_ASSERT_EQUAL_THING(struct5, return_struct());
+        }
+
+    - :pass: TRUE
+      :should: 'successfully compare unions'
+      :code: |
+        test()
+        {
+          foo_union_Expect(&union1, union2);
+          exercise_union(&union1, union2);
+        }
+
+    - :pass: FALSE
+      :should: 'blow up on bad union pointer comparison'
+      :code: |
+        test()
+        {
+          foo_union_Expect(&union1, union2);
+          exercise_union(&union3, union2);
+        }
+
+    - :pass: FALSE
+      :should: 'blow up on bad union comparison'
+      :code: |
+        test()
+        {
+          foo_union_Expect(&union1, union2);
+          exercise_union(&union1, union4);
+        }
+
+    - :pass: TRUE
+      :should: 'compare returned unions as equal'
+      :code: |
+        test()
+        {
+          foobar_union_ExpectAndReturn(union5);
+          TEST_ASSERT_EQUAL_STARS_AND_STRIPES(union6, return_union());
+        }
+
+    - :pass: FALSE
+      :should: 'compare returned unions as unequal'
+      :code: |
+        test()
+        {
+          foobar_union_ExpectAndReturn(union4);
+          TEST_ASSERT_EQUAL_STARS_AND_STRIPES(union5, return_union());
+        }
+
+    - :pass: TRUE
+      :should: 'successfully pass enum values'
+      :code: |
+        test()
+        {
+          foo_enum_Expect(OUT, &enum1);
+          exercise_enum(OUT, &enum1);
+        }
+
+    - :pass: FALSE
+      :should: 'blow up on bad enum pointer comparison'
+      :code: |
+        test()
+        {
+          foo_enum_Expect(IN, &enum1);
+          exercise_enum(IN, &enum2);
+        }
+
+    - :pass: FALSE
+      :should: 'blow up on bad enum comparison'
+      :code: |
+        test()
+        {
+          foo_enum_Expect(IN, &enum1);
+          exercise_enum(SHAKE_IT_ALL_ABOUT, &enum1);
+        }
+
+    - :pass: TRUE
+      :should: 'compare returned enums as equal'
+      :code: |
+        test()
+        {
+          foobar_enum_ExpectAndReturn(OUT);
+          TEST_ASSERT_EQUAL(OUT, return_enum());
+        }
+
+    - :pass: FALSE
+      :should: 'compare returned unions as unequal'
+      :code: |
+        test()
+        {
+          foobar_enum_ExpectAndReturn(OUT);
+          TEST_ASSERT_EQUAL(IN, return_enum());
+        }
+
+
+  :unity_helper:
+    :header: |
+      void AssertEqualTHINGStruct(struct THING expected, struct THING actual);
+      void AssertEqualSTARS_AND_STRIPESUnion(union STARS_AND_STRIPES expected, union STARS_AND_STRIPES actual);
+
+      #define TEST_ASSERT_EQUAL_THING(expected, actual) {AssertEqualTHINGStruct(expected, actual);}
+      #define TEST_ASSERT_EQUAL_STARS_AND_STRIPES(expected, actual) {AssertEqualSTARS_AND_STRIPESUnion(expected, actual);}
+
+    :code: |
+      void AssertEqualTHINGStruct(struct THING expected, struct THING actual)
+      {
+        TEST_ASSERT_EQUAL_INT_MESSAGE(expected.a, actual.a, "actual struct member \"a\" does not equal expected");
+        TEST_ASSERT_EQUAL_INT_MESSAGE(expected.b, actual.b, "actual struct member \"b\" does not equal expected");
+      }
+
+      void AssertEqualSTARS_AND_STRIPESUnion(union STARS_AND_STRIPES expected, union STARS_AND_STRIPES actual)
+      {
+        TEST_ASSERT_EQUAL_INT_MESSAGE(expected.a, actual.a, "actual union member \"a\" does not equal expected");
+        TEST_ASSERT_EQUAL_MESSAGE(expected.b, actual.b, "actual union member \"b\" does not equal expected");
+      }
+  
+...
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/struct_union_enum_expect_and_return_with_plugins.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/struct_union_enum_expect_and_return_with_plugins.yml
new file mode 100644
index 000000000..a54826ca4
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/struct_union_enum_expect_and_return_with_plugins.yml
@@ -0,0 +1,280 @@
+---
+:cmock:
+  :plugins:
+  - :array
+  - :ignore
+  - :callback
+  - :return_thru_ptr
+
+:systest:
+  :types: |
+    struct THING { int a; int b; };
+
+    union STARS_AND_STRIPES { int a; char b; };
+
+    enum HOKEY_POKEY { IN, OUT, SHAKE_IT_ALL_ABOUT };
+
+  :mockable: |
+    void foo_struct(struct THING*, struct THING);
+    struct THING foobar_struct(void);
+
+    void foo_union(union STARS_AND_STRIPES*, union STARS_AND_STRIPES);
+    union STARS_AND_STRIPES foobar_union(void);
+
+    void foo_enum(enum HOKEY_POKEY a, enum HOKEY_POKEY * b);
+    enum HOKEY_POKEY foobar_enum(void);
+
+  :source:
+    :header: |
+      void exercise_struct(struct THING* a, struct THING b);
+      struct THING return_struct(void);
+
+      void exercise_union(union STARS_AND_STRIPES* a, union STARS_AND_STRIPES b);
+      union STARS_AND_STRIPES return_union(void);
+
+      void exercise_enum(enum HOKEY_POKEY a, enum HOKEY_POKEY * b);
+      enum HOKEY_POKEY return_enum(void);
+
+    :code: |
+      void exercise_struct(struct THING* a, struct THING b)
+      {
+        foo_struct(a, b);
+      }
+
+      struct THING return_struct(void)
+      {
+        return foobar_struct();
+      }
+
+      void exercise_union(union STARS_AND_STRIPES* a, union STARS_AND_STRIPES b)
+      {
+        foo_union(a, b);
+      }
+
+      union STARS_AND_STRIPES return_union(void)
+      {
+        return foobar_union();
+      }
+
+      void exercise_enum(enum HOKEY_POKEY a, enum HOKEY_POKEY * b)
+      {
+        foo_enum(a, b);
+      }
+
+      enum HOKEY_POKEY return_enum(void)
+      {
+        return foobar_enum();
+      }
+
+
+  :tests:
+    :common: |
+      struct THING struct1;
+      struct THING struct2;
+      struct THING struct3;
+      struct THING struct4;
+      struct THING struct5;
+      struct THING struct6;
+
+      union STARS_AND_STRIPES union1;
+      union STARS_AND_STRIPES union2;
+      union STARS_AND_STRIPES union3;
+      union STARS_AND_STRIPES union4;
+      union STARS_AND_STRIPES union5;
+      union STARS_AND_STRIPES union6;
+
+      enum HOKEY_POKEY enum1;
+      enum HOKEY_POKEY enum2;
+
+      void setUp(void)
+      {
+        struct1.a = 1;
+        struct1.b = 2;
+
+        struct2.a = 3;
+        struct2.b = 4;
+
+        struct3.a = 5;
+        struct3.b = 6;
+
+        struct4.a = 7;
+        struct4.b = 8;
+
+        struct5.a = 9;
+        struct5.b = 10;
+
+        struct6.a = 9;
+        struct6.b = 10;
+
+        union1.a = 1;
+        union2.a = 2;
+        union3.a = 3;
+        union4.a = 4;
+        union5.a = 5;
+        union6.a = 5;
+
+        enum1 = OUT;
+        enum2 = IN;
+      }
+
+      void tearDown(void) {}
+
+    :units:
+    - :pass: TRUE
+      :should: 'successfully compare structs'
+      :code: |
+        test()
+        {
+          foo_struct_Expect(&struct1, struct2);
+          exercise_struct(&struct1, struct2);
+        }
+
+    - :pass: FALSE
+      :should: 'blow up on bad struct pointer comparison'
+      :code: |
+        test()
+        {
+          foo_struct_Expect(&struct1, struct2);
+          exercise_struct(&struct3, struct2);
+        }
+
+    - :pass: FALSE
+      :should: 'blow up on bad structure comparison'
+      :code: |
+        test()
+        {
+          foo_struct_Expect(&struct1, struct2);
+          exercise_struct(&struct1, struct4);
+        }
+
+    - :pass: TRUE
+      :should: 'compare returned structs as equal'
+      :code: |
+        test()
+        {
+          foobar_struct_ExpectAndReturn(struct5);
+          TEST_ASSERT_EQUAL_THING(struct6, return_struct());
+        }
+
+    - :pass: FALSE
+      :should: 'compare returned structs as unequal'
+      :code: |
+        test()
+        {
+          foobar_struct_ExpectAndReturn(struct4);
+          TEST_ASSERT_EQUAL_THING(struct5, return_struct());
+        }
+
+    - :pass: TRUE
+      :should: 'successfully compare unions'
+      :code: |
+        test()
+        {
+          foo_union_Expect(&union1, union2);
+          exercise_union(&union1, union2);
+        }
+
+    - :pass: FALSE
+      :should: 'blow up on bad union pointer comparison'
+      :code: |
+        test()
+        {
+          foo_union_Expect(&union1, union2);
+          exercise_union(&union3, union2);
+        }
+
+    - :pass: FALSE
+      :should: 'blow up on bad union comparison'
+      :code: |
+        test()
+        {
+          foo_union_Expect(&union1, union2);
+          exercise_union(&union1, union4);
+        }
+
+    - :pass: TRUE
+      :should: 'compare returned unions as equal'
+      :code: |
+        test()
+        {
+          foobar_union_ExpectAndReturn(union5);
+          TEST_ASSERT_EQUAL_STARS_AND_STRIPES(union6, return_union());
+        }
+
+    - :pass: FALSE
+      :should: 'compare returned unions as unequal'
+      :code: |
+        test()
+        {
+          foobar_union_ExpectAndReturn(union4);
+          TEST_ASSERT_EQUAL_STARS_AND_STRIPES(union5, return_union());
+        }
+
+    - :pass: TRUE
+      :should: 'successfully pass enum values'
+      :code: |
+        test()
+        {
+          foo_enum_Expect(OUT, &enum1);
+          exercise_enum(OUT, &enum1);
+        }
+
+    - :pass: FALSE
+      :should: 'blow up on bad enum pointer comparison'
+      :code: |
+        test()
+        {
+          foo_enum_Expect(IN, &enum1);
+          exercise_enum(IN, &enum2);
+        }
+
+    - :pass: FALSE
+      :should: 'blow up on bad enum comparison'
+      :code: |
+        test()
+        {
+          foo_enum_Expect(IN, &enum1);
+          exercise_enum(SHAKE_IT_ALL_ABOUT, &enum1);
+        }
+
+    - :pass: TRUE
+      :should: 'compare returned enums as equal'
+      :code: |
+        test()
+        {
+          foobar_enum_ExpectAndReturn(OUT);
+          TEST_ASSERT_EQUAL(OUT, return_enum());
+        }
+
+    - :pass: FALSE
+      :should: 'compare returned unions as unequal'
+      :code: |
+        test()
+        {
+          foobar_enum_ExpectAndReturn(OUT);
+          TEST_ASSERT_EQUAL(IN, return_enum());
+        }
+
+
+  :unity_helper:
+    :header: |
+      void AssertEqualTHINGStruct(struct THING expected, struct THING actual);
+      void AssertEqualSTARS_AND_STRIPESUnion(union STARS_AND_STRIPES expected, union STARS_AND_STRIPES actual);
+
+      #define TEST_ASSERT_EQUAL_THING(expected, actual) {AssertEqualTHINGStruct(expected, actual);}
+      #define TEST_ASSERT_EQUAL_STARS_AND_STRIPES(expected, actual) {AssertEqualSTARS_AND_STRIPESUnion(expected, actual);}
+
+    :code: |
+      void AssertEqualTHINGStruct(struct THING expected, struct THING actual)
+      {
+        TEST_ASSERT_EQUAL_INT_MESSAGE(expected.a, actual.a, "actual struct member \"a\" does not equal expected");
+        TEST_ASSERT_EQUAL_INT_MESSAGE(expected.b, actual.b, "actual struct member \"b\" does not equal expected");
+      }
+
+      void AssertEqualSTARS_AND_STRIPESUnion(union STARS_AND_STRIPES expected, union STARS_AND_STRIPES actual)
+      {
+        TEST_ASSERT_EQUAL_INT_MESSAGE(expected.a, actual.a, "actual union member \"a\" does not equal expected");
+        TEST_ASSERT_EQUAL_MESSAGE(expected.b, actual.b, "actual union member \"b\" does not equal expected");
+      }
+
+...
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/stubs_with_callbacks.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/stubs_with_callbacks.yml
new file mode 100644
index 000000000..1f2575481
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/stubs_with_callbacks.yml
@@ -0,0 +1,221 @@
+---
+:cmock:
+  :plugins:
+  - :callback
+  :treat_as:
+    custom_type: INT
+
+:systest:
+  :types: |
+    #define UINT32 unsigned int
+
+    typedef signed int custom_type;
+
+  :mockable: |
+    UINT32 foo(custom_type* a);
+    UINT32 bar(custom_type* b);
+    int    baz(void);
+    void   fuz(int* args, int num);
+
+  :source:
+    :header: |
+      void   function_a(int a, int b);
+      UINT32 function_b(void);
+      int    function_c(void);
+
+    :code: |
+      void function_a(int a, int b)
+      {
+        int args[6] = {0, 1, 2, 3, 5, 5};
+        args[0] = a;
+        fuz(args, b);
+      }
+
+      UINT32 function_b(void)
+      {
+        UINT32 sum = 0;
+        custom_type a = 0;
+        custom_type b = 0;
+        sum = foo(&a) + bar(&b);
+        return (UINT32)((custom_type)sum + a + b);
+      }
+
+      int function_c(void)
+      {
+        return (baz() + baz() + baz());
+      }
+
+  :tests:
+    :common: |
+      void setUp(void) {}
+      void tearDown(void) {}
+
+      UINT32 FooAndBarHelper(custom_type* data, int num)
+      {
+          num++;
+          *data = (custom_type)(num * 2);
+          return (UINT32)(*data * 2);
+      }
+
+      int BazCallbackPointless(int num)
+      {
+          return num;
+      }
+
+      int BazCallbackComplainsIfCalledMoreThanTwice(int num)
+      {
+          TEST_ASSERT_MESSAGE(num < 2, "Do Not Call Baz More Than Twice");
+          return num;
+      }
+
+      void FuzVerifier(int* args, int num_args, int num_calls)
+      {
+          int i;
+          TEST_ASSERT_MESSAGE(num_args < 5, "No More Than 5 Args Allowed");
+          for (i = 0; i < num_args; i++)
+          {
+              TEST_ASSERT_EQUAL(num_calls + i, args[i]);
+          }
+      }
+
+    :units:
+    - :pass: TRUE
+      :should: 'successfully exercise two simple ExpectAndReturn mock calls the normal way'
+      :code: |
+        test()
+        {
+          custom_type exp = 0;
+          foo_ExpectAndReturn(&exp, 10);
+          bar_ExpectAndReturn(&exp, 20);
+          TEST_ASSERT_EQUAL(30, function_b());
+        }
+
+    - :pass: FALSE
+      :should: 'successfully exercise two simple ExpectAndReturn mock calls and catch failure the normal way'
+      :code: |
+        test()
+        {
+          custom_type exp = 1;
+          foo_ExpectAndReturn(&exp, 10);
+          bar_ExpectAndReturn(&exp, 20);
+          TEST_ASSERT_EQUAL(30, function_b());
+        }
+
+    - :pass: TRUE
+      :should: 'successfully exercise using some basic callbacks'
+      :code: |
+        test()
+        {
+          foo_StubWithCallback((CMOCK_foo_CALLBACK)FooAndBarHelper);
+          bar_StubWithCallback((CMOCK_bar_CALLBACK)FooAndBarHelper);
+          TEST_ASSERT_EQUAL(12, function_b());
+        }
+
+    - :pass: TRUE
+      :should: 'successfully exercise using some basic callbacks even if there were expects'
+      :code: |
+        test()
+        {
+          custom_type exp = 500;
+          foo_ExpectAndReturn(&exp, 10);
+          foo_StubWithCallback((CMOCK_foo_CALLBACK)FooAndBarHelper);
+          bar_StubWithCallback((CMOCK_bar_CALLBACK)FooAndBarHelper);
+          TEST_ASSERT_EQUAL(12, function_b());
+        }
+
+    - :pass: FALSE
+      :should: 'successfully exercise using some basic callbacks and notice failures'
+      :code: |
+        test()
+        {
+          foo_StubWithCallback((CMOCK_foo_CALLBACK)FooAndBarHelper);
+          bar_StubWithCallback((CMOCK_bar_CALLBACK)FooAndBarHelper);
+          TEST_ASSERT_EQUAL(10, function_b());
+        }
+
+    - :pass: TRUE
+      :should: 'successfully exercise a callback with no arguments'
+      :code: |
+        test()
+        {
+          baz_StubWithCallback((CMOCK_baz_CALLBACK)BazCallbackPointless);
+          TEST_ASSERT_EQUAL(3, function_c());
+        }
+
+    - :pass: FALSE
+      :should: 'successfully throw a failure from within a callback function'
+      :code: |
+        test()
+        {
+          baz_StubWithCallback((CMOCK_baz_CALLBACK)BazCallbackComplainsIfCalledMoreThanTwice);
+          function_c();
+        }
+
+    - :pass: TRUE
+      :should: 'be usable for things like dynamically sized memory checking for passing conditions'
+      :code: |
+        test()
+        {
+          fuz_StubWithCallback((CMOCK_fuz_CALLBACK)FuzVerifier);
+          function_a(0, 4);
+        }
+
+    - :pass: FALSE
+      :should: 'be usable for things like dynamically sized memory checking for failing conditions'
+      :code: |
+        test()
+        {
+          fuz_StubWithCallback((CMOCK_fuz_CALLBACK)FuzVerifier);
+          function_a(0, 5);
+        }
+
+    - :pass: FALSE
+      :should: 'be usable for things like dynamically sized memory checking for failing conditions 2'
+      :code: |
+        test()
+        {
+          fuz_StubWithCallback((CMOCK_fuz_CALLBACK)FuzVerifier);
+          function_a(1, 4);
+        }
+
+    - :pass: TRUE
+      :should: 'run them interlaced'
+      :code: |
+        test()
+        {
+          custom_type exp = 0;
+          foo_ExpectAndReturn(&exp, 10);
+          foo_ExpectAndReturn(&exp, 15);
+          bar_ExpectAndReturn(&exp, 20);
+          bar_ExpectAndReturn(&exp, 40);
+          fuz_StubWithCallback((CMOCK_fuz_CALLBACK)FuzVerifier);
+          baz_StubWithCallback((CMOCK_baz_CALLBACK)BazCallbackPointless);
+
+          TEST_ASSERT_EQUAL(30, function_b());
+          TEST_ASSERT_EQUAL(55, function_b());
+          function_a(0, 4);
+          TEST_ASSERT_EQUAL(3, function_c());
+        }
+
+    - :pass: TRUE
+      :should: 'run them back to back'
+      :code: |
+        test()
+        {
+          custom_type exp = 0;
+          foo_ExpectAndReturn(&exp, 10);
+          bar_ExpectAndReturn(&exp, 20);
+          TEST_ASSERT_EQUAL(30, function_b());
+
+          foo_ExpectAndReturn(&exp, 15);
+          bar_ExpectAndReturn(&exp, 40);
+          TEST_ASSERT_EQUAL(55, function_b());
+
+          fuz_StubWithCallback((CMOCK_fuz_CALLBACK)FuzVerifier);
+          function_a(0, 4);
+
+          baz_StubWithCallback((CMOCK_baz_CALLBACK)BazCallbackPointless);
+          TEST_ASSERT_EQUAL(3, function_c());
+        }
+
+...
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/unity_64bit_support.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/unity_64bit_support.yml
new file mode 100644
index 000000000..861b15148
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/unity_64bit_support.yml
@@ -0,0 +1,77 @@
+---
+#The purpose of this test is to play with things 64-bit integers, which aren't supported by all compilers
+:cmock:
+  :plugins:
+  - :array
+  - :ignore
+
+:systest:
+  :types: |
+    #include "unity_internals.h"
+    typedef UNITY_UINT64 TEST64;
+
+  :mockable: |
+    TEST64 foo(TEST64 a);
+    TEST64* bar(TEST64* b);
+
+  :source:
+    :header: |
+      TEST64 function_a(void);
+
+    :code: |
+      TEST64 function_a(void) {
+        TEST64 a = 0x1234567890123456;
+        TEST64 b;
+        TEST64* c;
+
+        b = foo(a);
+        c = bar(&b);
+        return *c;
+      }
+
+  :tests:
+    :common: |
+      void setUp(void) {}
+      void tearDown(void) {}
+
+    :units:
+    - :pass: TRUE
+      :should: 'handle a straightforward 64-bit series of calls'
+      :code: |
+        test()
+        {
+          TEST64 a = 0x0987654321543210;
+          TEST64 b = 0x5a5a5a5a5a5a5a5a;
+          foo_ExpectAndReturn(0x1234567890123456, 0x0987654321543210);
+          bar_ExpectAndReturn(&a, &b);
+
+          TEST_ASSERT_EQUAL_HEX64(b, function_a());
+        }
+
+    - :pass: FALSE
+      :should: 'handle a straightforward 64-bit series of calls with a failure'
+      :code: |
+        test()
+        {
+          TEST64 a = 0x0987654321543210;
+          TEST64 b = 0x5a5a5a5a5a5a5a5a;
+          foo_ExpectAndReturn(0x1234567890123456, 0x0987654321543211);
+          bar_ExpectAndReturn(&a, &b);
+
+          TEST_ASSERT_EQUAL_HEX64(b, function_a());
+        }
+
+    - :pass: FALSE
+      :should: 'handle a straightforward 64-bit series of calls returning a failure'
+      :code: |
+        test()
+        {
+          TEST64 a = 0x0987654321543210;
+          TEST64 b = 0x5a5a5a5a5a5a5a5a;
+          foo_ExpectAndReturn(0x1234567890123456, 0x0987654321543210);
+          bar_ExpectAndReturn(&a, &b);
+
+          TEST_ASSERT_EQUAL_HEX64(b+1, function_a());
+        }
+
+...
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/unity_ignores.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/unity_ignores.yml
new file mode 100644
index 000000000..8595122b2
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/unity_ignores.yml
@@ -0,0 +1,139 @@
+---
+:cmock:
+  :plugins:
+  - # none
+
+:systest:
+  :types: |
+    #define UINT32 unsigned int
+
+  :mockable: |
+    UINT32 foo(UINT32 a);
+    void bar(void);
+
+  :source: 
+    :header: |
+      UINT32 function_a(int a);
+      void function_b(void);
+
+    :code: |
+      UINT32 function_a(int a)    
+      {
+        bar();
+        return foo((UINT32)a);
+      }    
+
+      void function_b(void) 
+      {
+        bar();
+      }
+      
+  :tests:
+    :common: |
+      void setUp(void) {}
+      void tearDown(void) {}
+      
+    :units:
+    - :pass: :ignore
+      :should: 'ignore incorrect expects after the TEST_IGNORE call'
+      :code: |
+        test()
+        {
+          TEST_IGNORE();
+          bar_Expect();
+          foo_ExpectAndReturn(10, 20);
+          TEST_ASSERT_EQUAL(40, function_a(30));
+        }
+      
+    - :pass: :ignore
+      :should: 'ignore missing expects after the TEST_IGNORE call'
+      :code: |
+        test()
+        {
+          TEST_IGNORE();
+          foo_ExpectAndReturn(10, 20);
+          TEST_ASSERT_EQUAL(20, function_a(10));
+        }
+      
+    - :pass: :ignore
+      :should: 'ignore extra expects after the TEST_IGNORE call'
+      :code: |
+        test()
+        {
+          TEST_IGNORE();
+          bar_Expect();
+          bar_Expect();
+          foo_ExpectAndReturn(10, 20);
+          foo_ExpectAndReturn(10, 20);
+          foo_ExpectAndReturn(10, 20);
+          TEST_ASSERT_EQUAL(20, function_a(10));
+        }
+      
+    - :pass: :ignore
+      :should: 'ignore no expects after the TEST_IGNORE call'
+      :code: |
+        test()
+        {
+          TEST_IGNORE();
+          TEST_ASSERT_EQUAL(20, function_a(10));
+        }
+        
+    - :pass: :ignore
+      :should: 'ignore extra expects after the TEST_IGNORE call even if it happens later'
+      :code: |
+        test()
+        {
+          bar_Expect();
+          foo_ExpectAndReturn(10, 20);
+          function_a(10);
+          
+          TEST_IGNORE();
+          bar_Expect();
+          foo_ExpectAndReturn(10, 20);
+          TEST_ASSERT_EQUAL(40, function_a(30));
+        }
+        
+    - :pass: false
+      :should: 'still fail if there are expect problems before the TEST_IGNORE'
+      :code: |
+        test()
+        {
+          bar_Expect();
+          foo_ExpectAndReturn(10, 20);
+          function_a(30);
+          
+          TEST_IGNORE();
+          bar_Expect();
+          foo_ExpectAndReturn(10, 20);
+          TEST_ASSERT_EQUAL(40, function_a(30));
+        }
+        
+    - :pass: false
+      :should: 'still fail if there are missing expect problems before the TEST_IGNORE'
+      :code: |
+        test()
+        {
+          bar_Expect();
+          function_a(10);
+          
+          TEST_IGNORE();
+          bar_Expect();
+          foo_ExpectAndReturn(10, 20);
+          TEST_ASSERT_EQUAL(40, function_a(30));
+        }
+        
+    - :pass: :ignore
+      :should: 'ignore if extra expects before the TEST_IGNORE because it ignored the rest of the test that might have made calls to it'
+      :code: |
+        test()
+        {
+          bar_Expect();
+          bar_Expect();
+          foo_ExpectAndReturn(10, 20);
+          function_a(10);
+          
+          TEST_IGNORE();
+          foo_ExpectAndReturn(10, 20);
+          TEST_ASSERT_EQUAL(40, function_a(30));
+        }
+...
diff --git a/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/unity_void_pointer_compare.yml b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/unity_void_pointer_compare.yml
new file mode 100644
index 000000000..1a49b0cd3
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/system/test_interactions/unity_void_pointer_compare.yml
@@ -0,0 +1,91 @@
+---
+#The purpose of this test is to verify we handle void pointers as memory compares
+:cmock:
+  :plugins:
+  - :array
+  :treat_as_array:
+    VOID_PTR: unsigned char
+
+:systest:
+  :types: |
+    #include "unity_internals.h"
+    typedef void* VOID_PTR;
+
+  :mockable: |
+    void* ret_v_ptr(void);
+    void get_v_ptr(void* ptr);
+    void get_v_ptr_typedefed(VOID_PTR ptr);
+
+  :source:
+    :header: |
+      void function_a(void);
+
+    :code: |
+      void function_a(void) {
+        void* stuff = ret_v_ptr();
+        get_v_ptr(stuff);
+        get_v_ptr_typedefed((VOID_PTR)stuff);
+      }
+
+  :tests:
+    :common: |
+      void setUp(void) {}
+      void tearDown(void) {}
+
+    :units:
+    - :pass: TRUE
+      :should: 'handle passing working expects'
+      :code: |
+        test()
+        {
+          char* a = "Hello";
+          char* b = "Hello";
+          ret_v_ptr_ExpectAndReturn(a);
+          get_v_ptr_Expect(b);
+          get_v_ptr_typedefed_Expect((VOID_PTR)b);
+
+          function_a();
+        }
+
+    - :pass: TRUE
+      :should: 'handle passing array expects'
+      :code: |
+        test()
+        {
+          char* a = "Hello";
+          char* b = "Hello";
+          ret_v_ptr_ExpectAndReturn(a);
+          get_v_ptr_ExpectWithArray(b,5);
+          get_v_ptr_typedefed_ExpectWithArray((VOID_PTR)b,5);
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'handle failing expects'
+      :code: |
+        test()
+        {
+          char* a = "Hello";
+          char* b = "Jello";
+          ret_v_ptr_ExpectAndReturn(a);
+          get_v_ptr_Expect(b);
+          get_v_ptr_typedefed_Expect((VOID_PTR)b);
+
+          function_a();
+        }
+
+    - :pass: FALSE
+      :should: 'handle failing array expects'
+      :code: |
+        test()
+        {
+          char* a = "Hello";
+          char* b = "Hella";
+          ret_v_ptr_ExpectAndReturn(a);
+          get_v_ptr_ExpectWithArray(b,5);
+          get_v_ptr_typedefed_ExpectWithArray((VOID_PTR)b,5);
+
+          function_a();
+        }
+...
diff --git a/FreeRTOS-Plus/Test/CMock/test/targets/clang_strict.yml b/FreeRTOS-Plus/Test/CMock/test/targets/clang_strict.yml
new file mode 100644
index 000000000..c86f1e126
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/targets/clang_strict.yml
@@ -0,0 +1,90 @@
+---
+compiler:
+  path: clang
+  source_path:     &systest_generated_path './system/generated/'
+  unit_tests_path: &unit_tests_path '../examples/test/'
+  mocks_path:      &systest_mocks_path './system/generated/'
+  build_path:      &systest_build_path './system/build/'
+  options:
+    - '-c'
+    - '-Wall'
+    - '-Wextra'
+    - '-Werror'
+    #- '-Wcast-qual'
+    - '-Wconversion'
+    - '-Wtautological-compare'
+    #- '-Wtautological-pointer-compare'
+    - '-Wdisabled-optimization'
+    - '-Wformat=2'
+    - '-Winit-self'
+    - '-Winline'
+    - '-Winvalid-pch'
+    - '-Wmissing-declarations'
+    - '-Wmissing-include-dirs'
+    - '-Wmissing-prototypes'
+    - '-Wnonnull'
+    - '-Wpacked'
+    - '-Wpointer-arith'
+    - '-Wredundant-decls'
+    - '-Wswitch-default'
+    - '-Wstrict-aliasing=2'
+    - '-Wstrict-overflow=5'
+    - '-Wuninitialized'
+    - '-Wunused'
+    - '-Wunreachable-code'
+    - '-Wreturn-type'
+    - '-Wshadow'
+    - '-Wundef'
+    - '-Wwrite-strings'
+    - '-Wbad-function-cast'
+    - '-Wno-missing-prototypes' #we've been lazy about things like setUp and tearDown
+    - '-Wno-invalid-token-paste'
+    - '-fms-extensions'
+    - '-fno-omit-frame-pointer'
+    #- '-ffloat-store'
+    - '-fno-common'
+    - '-fstrict-aliasing'
+    - '-std=gnu99'
+    - '-pedantic'
+    - '-O0'
+  includes:
+    prefix: '-I'
+    items:
+      - *systest_generated_path
+      - *unit_tests_path
+      - *systest_mocks_path
+      - '../src/'
+      - '../vendor/unity/src/'
+      - '../vendor/c_exception/lib/'
+      - './system/test_compilation/'
+      - './'
+  defines:
+    prefix: '-D'
+    items:
+      - CMOCK
+      - 'UNITY_SUPPORT_64'
+      - 'UNITY_POINTER_WIDTH=64'
+  object_files:
+    prefix: '-o'
+    extension: '.o'
+    destination: *systest_build_path
+
+linker:
+  path: gcc
+  options:
+    - -lm
+  includes:
+    prefix: '-I'
+  object_files:
+    path: *systest_build_path
+    extension: '.o'
+  bin_files:
+    prefix: '-o'
+    extension: '.exe'
+    destination: *systest_build_path
+
+unsupported:
+  - out_of_memory
+  - callingconv
+
+colour: true
diff --git a/FreeRTOS-Plus/Test/CMock/test/targets/gcc.yml b/FreeRTOS-Plus/Test/CMock/test/targets/gcc.yml
new file mode 100644
index 000000000..56ed82fd9
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/targets/gcc.yml
@@ -0,0 +1,58 @@
+---
+compiler:
+  path: gcc
+  source_path:     &systest_generated_path './system/generated/'
+  unit_tests_path: &unit_tests_path '../examples/test/'
+  mocks_path:      &systest_mocks_path './system/generated/'
+  build_path:      &systest_build_path './system/build/'
+  options:
+    - '-c'
+    - '-Wall'
+    - '-Wextra'
+    - '-Wunused-parameter'
+    - '-Wno-address'
+    - '-Wno-invalid-token-paste'
+    - '-std=c99'
+    - '-pedantic'
+    - '-O0'
+  includes:
+    prefix: '-I'
+    items:
+      - *systest_generated_path
+      - *unit_tests_path
+      - *systest_mocks_path
+      - '../src/'
+      - '../vendor/unity/src/'
+      - '../vendor/c_exception/lib/'
+      - './system/test_compilation/'
+      - './'
+  defines:
+    prefix: '-D'
+    items:
+      - CMOCK
+      - 'UNITY_SUPPORT_64'
+  object_files:
+    prefix: '-o'
+    extension: '.o'
+    destination: *systest_build_path
+
+linker:
+  path: gcc
+  options:
+    - -lm
+  includes:
+    prefix: '-I'
+  object_files:
+    path: *systest_build_path
+    extension: '.o'
+  bin_files:
+    prefix: '-o'
+    extension: '.exe'
+    destination: *systest_build_path
+
+unsupported:
+  - out_of_memory
+  - unity_64bit_support
+  - callingconv
+
+colour: true
diff --git a/FreeRTOS-Plus/Test/CMock/test/targets/gcc_64.yml b/FreeRTOS-Plus/Test/CMock/test/targets/gcc_64.yml
new file mode 100644
index 000000000..2702d5b5a
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/targets/gcc_64.yml
@@ -0,0 +1,58 @@
+---
+compiler:
+  path: gcc
+  source_path:     &systest_generated_path './system/generated/'
+  unit_tests_path: &unit_tests_path '../examples/test/'
+  mocks_path:      &systest_mocks_path './system/generated/'
+  build_path:      &systest_build_path './system/build/'
+  options:
+    - '-c'
+    - '-m64'
+    - '-Wall'
+    - '-Wunused-parameter'
+    - '-Wno-address'
+    - '-Wno-invalid-token-paste'
+    - '-std=c99'
+    - '-pedantic'
+  includes:
+    prefix: '-I'
+    items:
+      - *systest_generated_path
+      - *unit_tests_path
+      - *systest_mocks_path
+      - '../src/'
+      - '../vendor/unity/src/'
+      - '../vendor/c_exception/lib/'
+      - './system/test_compilation/'
+      - './'
+  defines:
+    prefix: '-D'
+    items:
+      - CMOCK
+      - 'UNITY_SUPPORT_64'
+      - 'UNITY_POINTER_WIDTH=64'
+  object_files:
+    prefix: '-o'
+    extension: '.o'
+    destination: *systest_build_path
+
+linker:
+  path: gcc
+  options:
+    - -lm
+    - '-m64'
+  includes:
+    prefix: '-I'
+  object_files:
+    path: *systest_build_path
+    extension: '.o'
+  bin_files:
+    prefix: '-o'
+    extension: '.exe'
+    destination: *systest_build_path
+
+unsupported:
+  - out_of_memory
+  - callingconv
+
+colour: true
diff --git a/FreeRTOS-Plus/Test/CMock/test/targets/gcc_tiny.yml b/FreeRTOS-Plus/Test/CMock/test/targets/gcc_tiny.yml
new file mode 100644
index 000000000..f7ab5e793
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/targets/gcc_tiny.yml
@@ -0,0 +1,80 @@
+---
+compiler:
+  path: gcc
+  source_path:     &systest_generated_path './system/generated/'
+  unit_tests_path: &unit_tests_path '../examples/test/'
+  mocks_path:      &systest_mocks_path './system/generated/'
+  build_path:      &systest_build_path './system/build/'
+  options:
+    - '-c'
+    - '-Wall'
+    - '-Wextra'
+    - '-Wunused-parameter'
+    - '-Wno-address'
+    - '-Wno-invalid-token-paste'
+    - '-std=c99'
+    - '-pedantic'
+    - '-O0'
+  includes:
+    prefix: '-I'
+    items:
+      - *systest_generated_path
+      - *unit_tests_path
+      - *systest_mocks_path
+      - '../src/'
+      - '../vendor/unity/src/'
+      - '../vendor/c_exception/lib/'
+      - './system/test_compilation/'
+      - './'
+  defines:
+    prefix: '-D'
+    items:
+      - CMOCK
+      - 'CMOCK_MEM_STATIC'
+      - 'CMOCK_MEM_SIZE=1024'
+  object_files:
+    prefix: '-o'
+    extension: '.o'
+    destination: *systest_build_path
+
+linker:
+  path: gcc
+  options:
+    - -lm
+  includes:
+    prefix: '-I'
+  object_files:
+    path: *systest_build_path
+    extension: '.o'
+  bin_files:
+    prefix: '-o'
+    extension: '.exe'
+    destination: *systest_build_path
+
+unsupported:
+  - all_plugins_but_other_limits
+  - all_plugins_coexist
+  - array_and_pointer_handling
+  - const_primitives_handling
+  - enforce_strict_ordering
+  - expect_and_return_custom_types
+  - expect_and_return_treat_as
+  - expect_and_throw
+  - expect_any_args
+  - fancy_pointer_handling
+  - function_pointer_handling
+  - newer_standards_stuff1
+  - nonstandard_pased_stuff_1
+  - nonstandard_pased_stuff_2
+  - parsing_challenges
+  - return_thru_ptr_and_expect_any_args
+  - return_thru_ptr_ignore_arg
+  - struct_union_enum_expect_and_return
+  - struct_union_enum_expect_and_return_with_plugins
+  - stubs_with_callbacks
+  - unity_64bit_support
+  - unity_ignores
+  - callingconv
+  - C
+
+colour: true
diff --git a/FreeRTOS-Plus/Test/CMock/test/targets/iar_arm_v4.yml b/FreeRTOS-Plus/Test/CMock/test/targets/iar_arm_v4.yml
new file mode 100644
index 000000000..61e0331e9
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/targets/iar_arm_v4.yml
@@ -0,0 +1,110 @@
+tools_root: &tools_root 'C:\Program Files\IAR Systems\Embedded Workbench 4.0\'
+compiler:
+  path:             [*tools_root, 'arm\bin\iccarm.exe']
+  source_path:     &systest_generated_path './system/generated/'
+  unit_tests_path: &unit_tests_path '../examples/test/'
+  mocks_path:      &systest_mocks_path './system/generated/'
+  build_path:      &systest_build_path './system/build/'
+  options:
+    - --dlib_config
+    - [*tools_root, 'arm\lib\dl4tptinl8n.h']
+    - -z3
+    - --no_cse
+    - --no_unroll
+    - --no_inline
+    - --no_code_motion
+    - --no_tbaa
+    - --no_clustering
+    - --no_scheduling
+    - --debug
+    - --cpu_mode thumb
+    - --endian little
+    - --cpu ARM7TDMI
+    - --stack_align 4
+    - --interwork
+    - -e
+    - --silent
+    - --warnings_are_errors
+    - --fpu None
+    #We are supressing some warnings here because we test CMock against some questionable code to make sure it still works
+    - --diag_suppress Pa050
+    - --diag_suppress Pe191
+    - --diag_suppress=Pe494
+    - --diag_suppress=Pe083
+  includes:
+    prefix: '-I'
+    items:
+      - [*tools_root, 'arm\inc\']
+      - *systest_generated_path
+      - *unit_tests_path
+      - *systest_mocks_path
+      - '../src/'
+      - '../vendor/unity/src/'
+      - '../vendor/c_exception/lib/'
+      - './system/test_compilation/'
+      - './'
+  defines:
+    prefix: '-D'
+    items:
+      - CMOCK
+  object_files:
+    prefix: '-o'
+    extension: '.r79'
+    destination: *systest_build_path
+
+linker:
+  path: [*tools_root, 'common\bin\xlink.exe']
+  options:
+    - -rt
+    - [*tools_root, 'arm\lib\dl4tptinl8n.r79']
+    - -D_L_EXTMEM_START=0
+    - -D_L_EXTMEM_SIZE=0
+    - -D_L_HEAP_SIZE=120
+    - -D_L_STACK_SIZE=32
+    - -e_small_write=_formatted_write
+    - -s
+    - __program_start
+    - '-f iar\iar_v4\Resource\at91SAM7X256_FLASH.xcl'
+  includes:
+    prefix: '-I'
+    items:
+      - *systest_generated_path
+      - *unit_tests_path
+      - *systest_mocks_path
+      - 'vendor/unity/src/'
+      - [*tools_root, 'arm\config\']
+      - [*tools_root, 'arm\lib\']
+  object_files:
+    path: *systest_build_path
+    extension: '.r79'
+  bin_files:
+    prefix: '-o'
+    extension: '.d79'
+    destination: *systest_build_path
+
+simulator:
+  path: [*tools_root, 'common\bin\CSpyBat.exe']
+  pre_support:
+    - --silent
+    - [*tools_root, 'arm\bin\armproc.dll']
+    - [*tools_root, 'arm\bin\armsim.dll']
+  post_support:
+    - --plugin
+    - [*tools_root, 'arm\bin\armbat.dll']
+    - --macro
+    - 'iar\iar_v4\Resource\SAM7_SIM.mac'
+    - --backend
+    - -B
+    - -p
+    - [*tools_root, 'arm\config\ioat91sam7X256.ddf']
+    - -d
+    - sim
+
+unsupported:
+  - out_of_memory
+  - nonstandard_parsed_stuff_1
+  - const
+  - callingconv
+  - unity_64bit_support
+
+colour: true
diff --git a/FreeRTOS-Plus/Test/CMock/test/targets/iar_arm_v5.yml b/FreeRTOS-Plus/Test/CMock/test/targets/iar_arm_v5.yml
new file mode 100644
index 000000000..bac2f7a9d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/targets/iar_arm_v5.yml
@@ -0,0 +1,95 @@
+tools_root: &tools_root 'C:\Program Files\IAR Systems\Embedded Workbench 5.3\'
+compiler:
+  path:             [*tools_root, 'arm\bin\iccarm.exe']
+  source_path:     &systest_generated_path './system/generated/'
+  unit_tests_path: &unit_tests_path '../examples/test/'
+  mocks_path:      &systest_mocks_path './system/generated/'
+  build_path:      &systest_build_path './system/build/'
+  options:
+    - --dlib_config
+    - [*tools_root, 'arm\inc\DLib_Config_Normal.h']
+    - --no_cse
+    - --no_unroll
+    - --no_inline
+    - --no_code_motion
+    - --no_tbaa
+    - --no_clustering
+    - --no_scheduling
+    - --debug
+    - --cpu_mode thumb
+    - --endian=little
+    - --cpu=ARM7TDMI
+    - --interwork
+    - --warnings_are_errors
+    - --fpu=None
+    - -e
+    - -On
+    #We are supressing some warnings here because we test CMock against some questionable code to make sure it still works
+    - --diag_suppress=Pa050
+    - --diag_suppress=Pe191
+    - --diag_suppress=Pe494
+    - --diag_suppress=Pe083
+  includes:
+    prefix: '-I'
+    items:
+      - [*tools_root, 'arm\inc\']
+      - *systest_generated_path
+      - *unit_tests_path
+      - *systest_mocks_path
+      - '../src/'
+      - '../vendor/unity/src/'
+      - '../vendor/c_exception/lib/'
+      - './system/test_compilation/'
+      - './'
+      - '.\iar\iar_v5\incIAR\'
+  defines:
+    prefix: '-D'
+    items:
+      - CMOCK
+  object_files:
+    prefix: '-o'
+    extension: '.r79'
+    destination: *systest_build_path
+
+linker:
+  path: [*tools_root, 'arm\bin\ilinkarm.exe']
+  options:
+    - --redirect _Printf=_PrintfLarge
+    - --redirect _Scanf=_ScanfSmall
+    - --semihosting
+    - --entry __iar_program_start
+    - --config iar\iar_v5\Resource\at91SAM7X256_RAM.icf
+  object_files:
+    path: *systest_build_path
+    extension: '.o'
+  bin_files:
+    prefix: '-o'
+    extension: '.out'
+    destination: *systest_build_path
+
+simulator:
+  path: [*tools_root, 'common\bin\CSpyBat.exe']
+  pre_support:
+    - --silent
+    - [*tools_root, 'arm\bin\armproc.dll']
+    - [*tools_root, 'arm\bin\armsim.dll']
+  post_support:
+    - --plugin
+    - [*tools_root, 'arm\bin\armbat.dll']
+    - --macro
+    - 'iar\iar_v5\Resource\SAM7_SIM.mac'
+    - --backend
+    - -B
+    - -p
+    - [*tools_root, 'arm\config\debugger\Atmel\ioat91sam7X256.ddf']
+    - -d
+    - sim
+
+unsupported:
+  - out_of_memory
+  - nonstandard_parsed_stuff_1
+  - const
+  - callingconv
+  - unity_64bit_support
+
+colour: true
diff --git a/FreeRTOS-Plus/Test/CMock/test/test_helper.rb b/FreeRTOS-Plus/Test/CMock/test/test_helper.rb
new file mode 100644
index 000000000..486196c0f
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/test_helper.rb
@@ -0,0 +1,44 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+
+require 'minitest/autorun'
+
+def create_mocks(*mocks)
+  mocks.each do |mock|
+    eval "@#{mock} = Minitest::Mock.new"
+  end
+end
+
+def create_stub(funcs)
+  stub = Class.new
+  blob = "class << stub\n"
+  funcs.each_pair {|k,v| blob += "def #{k.to_s}(unused=nil)\n #{v.inspect}\nend\n" }
+  blob += "end"
+  eval blob
+  stub
+end
+
+def test_return
+  {
+    :int     => {:type => "int",         :name => 'cmock_to_return', :ptr? => false, :const? => false, :void? => false, :str => 'int cmock_to_return'},
+    :int_ptr => {:type => "int*",        :name => 'cmock_to_return', :ptr? => true,  :const? => false, :void? => false, :str => 'int* cmock_to_return'},
+    :void    => {:type => "void",        :name => 'cmock_to_return', :ptr? => false, :const? => false, :void? => true,  :str => 'void cmock_to_return'},
+    :string  => {:type => "const char*", :name => 'cmock_to_return', :ptr? => false, :const? => true,  :void? => false, :str => 'const char* cmock_to_return'},
+  }
+end
+
+def test_arg
+  {
+    :int        => {:type => "int",         :name => 'MyInt',       :ptr? => false, :const? => false, :const_ptr? => false},
+    :int_ptr    => {:type => "int*",        :name => 'MyIntPtr',    :ptr? => true,  :const? => false, :const_ptr? => false},
+    :const_ptr  => {:type => "int*",        :name => 'MyConstPtr',  :ptr? => true,  :const? => false, :const_ptr? => true},
+    :double_ptr => {:type => "int const**", :name => 'MyDoublePtr', :ptr? => true,  :const? => true,  :const_ptr? => false},
+    :mytype     => {:type => "MY_TYPE",     :name => 'MyMyType',    :ptr? => false, :const? => true,  :const_ptr? => false},
+    :mytype_ptr => {:type => "MY_TYPE*",    :name => 'MyMyTypePtr', :ptr? => true,  :const? => false, :const_ptr? => false},
+    :string     => {:type => "const char*", :name => 'MyStr',       :ptr? => false, :const? => true,  :const_ptr? => false},
+  }
+end
diff --git a/FreeRTOS-Plus/Test/CMock/test/unit/cmock_config_test.rb b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_config_test.rb
new file mode 100644
index 000000000..8c5e410a7
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_config_test.rb
@@ -0,0 +1,126 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+
+require File.expand_path(File.dirname(__FILE__)) + "/../test_helper"
+require File.expand_path(File.dirname(__FILE__)) + '/../../lib/cmock_config'
+
+
+describe CMockConfig, "Verify CMockConfig Module" do
+
+  it "use default settings when no parameters are specified" do
+    config = CMockConfig.new
+    assert_equal(CMockConfig::CMOCK_DEFAULT_OPTIONS[:mock_path],             config.mock_path)
+    assert_nil(CMockConfig::CMOCK_DEFAULT_OPTIONS[:includes])
+    assert_nil(config.includes)
+    assert_equal(CMockConfig::CMOCK_DEFAULT_OPTIONS[:attributes],            config.attributes)
+    assert_equal(CMockConfig::CMOCK_DEFAULT_OPTIONS[:plugins],               config.plugins)
+    assert_equal(CMockConfig::CMOCK_DEFAULT_OPTIONS[:treat_externs],         config.treat_externs)
+    assert_equal(CMockConfig::CMOCK_DEFAULT_OPTIONS[:treat_inlines],         config.treat_inlines)
+    assert_equal(CMockConfig::CMOCK_DEFAULT_OPTIONS[:inline_function_patterns],   config.inline_function_patterns)
+  end
+
+  it "replace only options specified in a hash" do
+    test_includes = ['hello']
+    test_attributes = ['blah', 'bleh']
+    config = CMockConfig.new(:includes => test_includes, :attributes => test_attributes)
+    assert_equal(CMockConfig::CMOCK_DEFAULT_OPTIONS[:mock_path],              config.mock_path)
+    assert_equal(test_includes,                                             config.includes)
+    assert_equal(test_attributes,                                           config.attributes)
+    assert_equal(CMockConfig::CMOCK_DEFAULT_OPTIONS[:plugins],                config.plugins)
+    assert_equal(CMockConfig::CMOCK_DEFAULT_OPTIONS[:treat_externs],          config.treat_externs)
+    assert_equal(CMockConfig::CMOCK_DEFAULT_OPTIONS[:treat_inlines],          config.treat_inlines)
+    assert_equal(CMockConfig::CMOCK_DEFAULT_OPTIONS[:inline_function_patterns],   config.inline_function_patterns)
+  end
+
+  it "replace only options specified in a yaml file" do
+    test_plugins = [:soda, :pizza]
+    config = CMockConfig.new("#{File.expand_path(File.dirname(__FILE__))}/cmock_config_test.yml")
+    assert_equal(CMockConfig::CMOCK_DEFAULT_OPTIONS[:mock_path],              config.mock_path)
+    assert_nil(CMockConfig::CMOCK_DEFAULT_OPTIONS[:includes])
+    assert_nil(config.includes)
+    assert_equal(test_plugins,                                              config.plugins)
+    assert_equal(:include,                                                  config.treat_externs)
+    assert_equal(:include,                                                  config.treat_inlines)
+    assert_equal(['MY_INLINE_FUNCTION_DECLARATION_PATTERN'],                config.inline_function_patterns)
+  end
+
+  it "populate treat_as map with internal standard_treat_as_map defaults, redefine defaults, and add custom values" do
+
+    user_treat_as1 = {
+      'BOOL'          => 'UINT8', # redefine standard default
+      'unsigned long' => 'INT',   # redefine standard default
+      'U8'            => 'UINT8', # custom value
+      'U16'           => 'UINT16' # custom value
+    }
+    user_treat_as2 = {
+      'BOOL'          => 'INT16', # redefine standard default
+      'U16'           => 'HEX16'  # custom value
+    }
+
+    config1 = CMockConfig.new({:treat_as => user_treat_as1})
+    config2 = CMockConfig.new({:treat_as => user_treat_as2})
+
+    # ----- USER SET 1
+    # standard defaults
+    assert_equal('INT',      config1.treat_as['BOOL_T'])
+    assert_equal('HEX32',    config1.treat_as['unsigned int'])
+    assert_equal('HEX8_ARRAY',config1.treat_as['void*'])
+    assert_equal('STRING',   config1.treat_as['CSTRING'])
+    assert_equal('STRING',   config1.treat_as['char*'])
+    assert_equal('HEX8',     config1.treat_as['unsigned char'])
+    assert_equal('INT',      config1.treat_as['long'])
+    assert_equal('INT16',    config1.treat_as['short'])
+
+    # overrides
+    assert_equal('UINT8',    config1.treat_as['BOOL'])
+    assert_equal('INT',      config1.treat_as['unsigned long'])
+
+    # added custom values
+    assert_equal('UINT8',    config1.treat_as['U8'])
+    assert_equal('UINT16',   config1.treat_as['U16'])
+
+    # standard_treat_as_map: unchanged
+    assert_equal('INT',      config1.standard_treat_as_map['BOOL'])
+    assert_equal('HEX32',    config1.standard_treat_as_map['unsigned long'])
+    assert_equal('STRING',   config1.standard_treat_as_map['char*'])
+
+    # ----- USER SET 2
+    # standard defaults
+    assert_equal('INT',      config2.treat_as['BOOL_T'])
+    assert_equal('HEX32',    config2.treat_as['unsigned int'])
+    assert_equal('HEX8_ARRAY',config2.treat_as['void*'])
+    assert_equal('STRING',   config2.treat_as['CSTRING'])
+    assert_equal('STRING',   config2.treat_as['char*'])
+    assert_equal('HEX8',     config2.treat_as['unsigned char'])
+    assert_equal('INT',      config2.treat_as['long'])
+    assert_equal('INT16',    config2.treat_as['short'])
+    assert_equal('HEX32',    config2.treat_as['unsigned long'])
+
+    # overrides
+    assert_equal('INT16',    config2.treat_as['BOOL'])
+
+    # added custom values
+    assert_equal('HEX16',    config2.treat_as['U16'])
+
+    # standard_treat_as_map: unchanged
+    assert_equal('INT',      config2.standard_treat_as_map['BOOL'])
+    assert_equal('HEX32',    config2.standard_treat_as_map['unsigned long'])
+    assert_equal('STRING',   config2.standard_treat_as_map['char*'])
+  end
+
+  it "standard treat_as map should be incorruptable" do
+    config = CMockConfig.new({})
+
+    assert_equal('INT', config.standard_treat_as_map['BOOL_T'])
+
+    local = config.standard_treat_as_map
+    local['BOOL_T'] = "U8"
+
+    assert_equal('INT', config.standard_treat_as_map['BOOL_T'])
+  end
+
+end
diff --git a/FreeRTOS-Plus/Test/CMock/test/unit/cmock_config_test.yml b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_config_test.yml
new file mode 100644
index 000000000..eaee14b77
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_config_test.yml
@@ -0,0 +1,7 @@
+:cmock:
+  :plugins:
+    - 'soda'
+    - 'pizza'
+  :treat_externs:  :include
+  :treat_inlines:  :include
+  :inline_function_patterns: ['MY_INLINE_FUNCTION_DECLARATION_PATTERN']
diff --git a/FreeRTOS-Plus/Test/CMock/test/unit/cmock_file_writer_test.rb b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_file_writer_test.rb
new file mode 100644
index 000000000..932e7dcc8
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_file_writer_test.rb
@@ -0,0 +1,27 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+require File.expand_path(File.dirname(__FILE__)) + "/../test_helper"
+require File.expand_path(File.dirname(__FILE__)) + '/../../lib/cmock_file_writer'
+
+describe CMockFileWriter, "Verify CMockFileWriter Module" do
+
+  before do
+    create_mocks :config
+    @cmock_file_writer = CMockFileWriter.new(@config)
+  end
+
+  after do
+  end
+
+  it "complain if a block was not specified when calling create" do
+    begin
+      @cmock_file_writer.create_file("test.txt")
+      assert false, "Should Have Thrown An Error When Calling Without A Block"
+    rescue
+    end
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_main_test.rb b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_main_test.rb
new file mode 100644
index 000000000..846241250
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_main_test.rb
@@ -0,0 +1,686 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+$ThisIsOnlyATest = true
+
+require File.expand_path(File.dirname(__FILE__)) + "/../test_helper"
+require File.expand_path(File.dirname(__FILE__)) + '/../../lib/cmock_generator'
+
+class MockedPluginHelper
+  def initialize return_this
+    @return_this = return_this
+  end
+
+  def include_files
+    return @return_this
+  end
+
+  def instance_structure( name, args, rettype )
+    return "  #{@return_this}_#{name}(#{args}, #{rettype})"
+  end
+
+  def mock_verify( name )
+    return "  #{@return_this}_#{name}"
+  end
+
+  def mock_destroy( name, args, rettype )
+    return "  #{@return_this}_#{name}(#{args}, #{rettype})"
+  end
+
+  def mock_implementation(name, args)
+    return "  Mock#{name}#{@return_this}(#{args.join(", ")})"
+  end
+end
+
+describe CMockGenerator, "Verify CMockGenerator Module" do
+
+  before do
+    create_mocks :config, :file_writer, :utils, :plugins
+    @module_name = "PoutPoutFish"
+
+    #no strict handling
+    @config.expect :mock_prefix, "Mock"
+    @config.expect :mock_suffix, ""
+    @config.expect :weak, ""
+    @config.expect :enforce_strict_ordering, nil
+    @config.expect :framework, :unity
+    @config.expect :includes, ["ConfigRequiredHeader1.h","ConfigRequiredHeader2.h"]
+    #@config.expect :includes_h_pre_orig_header, nil #not called because includes called
+    @config.expect :includes_h_post_orig_header, nil
+    @config.expect :includes_c_pre_header, nil
+    @config.expect :includes_c_post_header, nil
+    @config.expect :subdir, nil
+    @config.expect :fail_on_unexpected_calls, true
+    @config.expect :treat_inlines, :exclude
+    @cmock_generator = CMockGenerator.new(@config, @file_writer, @utils, @plugins)
+    @cmock_generator.module_name = @module_name
+    @cmock_generator.module_ext = '.h'
+    @cmock_generator.mock_name = "Mock#{@module_name}"
+    @cmock_generator.clean_mock_name = "Mock#{@module_name}"
+
+    #strict handling
+    @config.expect :mock_prefix, "Mock"
+    @config.expect :mock_suffix, ""
+    @config.expect :weak, ""
+    @config.expect :enforce_strict_ordering, true
+    @config.expect :framework, :unity
+    @config.expect :includes, nil
+    @config.expect :includes_h_pre_orig_header, nil
+    @config.expect :includes_h_post_orig_header, nil
+    @config.expect :includes_c_pre_header, nil
+    @config.expect :includes_c_post_header, nil
+    @config.expect :subdir, nil
+    @config.expect :fail_on_unexpected_calls, true
+    @config.expect :treat_inlines, :exclude
+    @cmock_generator_strict = CMockGenerator.new(@config, @file_writer, @utils, @plugins)
+    @cmock_generator_strict.module_name = @module_name
+    @cmock_generator_strict.module_ext = '.h'
+    @cmock_generator_strict.mock_name = "Mock#{@module_name}"
+    @cmock_generator_strict.clean_mock_name = "Mock#{@module_name}"
+  end
+
+  after do
+  end
+
+  def helper_create_header_top_with_opt_incldues_form_config_and_plugin(ext)
+    @config.expect :mock_prefix, "Mock"
+    @config.expect :mock_suffix, ""
+    @config.expect :weak, ""
+    @cmock_generator.module_ext = ext
+    orig_filename = "PoutPoutFish#{ext}"
+    define_name = "MOCKPOUTPOUTFISH_H"
+    output = []
+    expected = [
+      "/* AUTOGENERATED FILE. DO NOT EDIT. */\n",
+      "#ifndef _#{define_name}\n",
+      "#define _#{define_name}\n\n",
+      "#include \"unity.h\"\n",
+      "#include \"ConfigRequiredHeader1.h\"\n",
+      "#include \"ConfigRequiredHeader2.h\"\n",
+      "#include \"#{orig_filename}\"\n",
+      "#include \"PluginRequiredHeader.h\"\n",
+      "\n",
+      "/* Ignore the following warnings, since we are copying code */\n",
+      "#if defined(__GNUC__) && !defined(__ICC) && !defined(__TMS470__)\n",
+      "#if __GNUC__ > 4 || (__GNUC__ == 4 && (__GNUC_MINOR__ > 6 || (__GNUC_MINOR__ == 6 && __GNUC_PATCHLEVEL__ > 0)))\n",
+      "#pragma GCC diagnostic push\n",
+      "#endif\n",
+      "#if !defined(__clang__)\n",
+      "#pragma GCC diagnostic ignored \"-Wpragmas\"\n",
+      "#endif\n",
+      "#pragma GCC diagnostic ignored \"-Wunknown-pragmas\"\n",
+      "#pragma GCC diagnostic ignored \"-Wduplicate-decl-specifier\"\n",
+      "#endif\n",
+      "\n",
+    ]
+
+    @config.expect :orig_header_include_fmt, "#include \"%s\""
+    @plugins.expect :run, "#include \"PluginRequiredHeader.h\"\n", [:include_files]
+
+    @cmock_generator.create_mock_header_header(output, "Mock#{orig_filename}")
+
+    assert_equal(expected, output)
+  end
+
+  it "create the top of a header file with optional include files from config and include file from plugin" do
+    ['.h','.hh','.hpp'].each do |ext|
+      helper_create_header_top_with_opt_incldues_form_config_and_plugin(ext)
+    end
+  end
+
+  it "handle dashes and spaces in the module name" do
+    #no strict handling
+    @config.expect :mock_prefix, "Mock"
+    @config.expect :mock_suffix, ""
+    @config.expect :weak, ""
+    @config.expect :enforce_strict_ordering, nil
+    @config.expect :framework, :unity
+    @config.expect :includes, ["ConfigRequiredHeader1.h","ConfigRequiredHeader2.h"]
+    @config.expect :includes_h_post_orig_header, nil
+    @config.expect :includes_c_pre_header, nil
+    @config.expect :includes_c_post_header, nil
+    @config.expect :subdir, nil
+    @config.expect :fail_on_unexpected_calls, true
+    @config.expect :treat_inlines, :exclude
+    @cmock_generator2 = CMockGenerator.new(@config, @file_writer, @utils, @plugins)
+    @cmock_generator2.module_name = "Pout-Pout Fish"
+    @cmock_generator2.module_ext = '.h'
+    @cmock_generator2.mock_name = "MockPout-Pout Fish"
+    @cmock_generator2.clean_mock_name = "MockPout_Pout_Fish"
+
+    @config.expect :mock_prefix, "Mock"
+    @config.expect :mock_suffix, ""
+    @config.expect :weak, ""
+    orig_filename = "Pout-Pout Fish.h"
+    define_name = "MOCKPOUT_POUT_FISH_H"
+    output = []
+    expected = [
+      "/* AUTOGENERATED FILE. DO NOT EDIT. */\n",
+      "#ifndef _#{define_name}\n",
+      "#define _#{define_name}\n\n",
+      "#include \"unity.h\"\n",
+      "#include \"ConfigRequiredHeader1.h\"\n",
+      "#include \"ConfigRequiredHeader2.h\"\n",
+      "#include \"#{orig_filename}\"\n",
+      "#include \"PluginRequiredHeader.h\"\n",
+      "\n",
+      "/* Ignore the following warnings, since we are copying code */\n",
+      "#if defined(__GNUC__) && !defined(__ICC) && !defined(__TMS470__)\n",
+      "#if __GNUC__ > 4 || (__GNUC__ == 4 && (__GNUC_MINOR__ > 6 || (__GNUC_MINOR__ == 6 && __GNUC_PATCHLEVEL__ > 0)))\n",
+      "#pragma GCC diagnostic push\n",
+      "#endif\n",
+      "#if !defined(__clang__)\n",
+      "#pragma GCC diagnostic ignored \"-Wpragmas\"\n",
+      "#endif\n",
+      "#pragma GCC diagnostic ignored \"-Wunknown-pragmas\"\n",
+      "#pragma GCC diagnostic ignored \"-Wduplicate-decl-specifier\"\n",
+      "#endif\n",
+      "\n",
+    ]
+
+    @config.expect :orig_header_include_fmt, "#include \"%s\""
+    @plugins.expect :run, "#include \"PluginRequiredHeader.h\"\n", [:include_files]
+
+    @cmock_generator2.create_mock_header_header(output, "MockPout-Pout Fish.h")
+
+    assert_equal(expected, output)
+  end
+
+  it "create the top of a header file with optional include files from config" do
+    @config.expect :mock_prefix, "Mock"
+    @config.expect :mock_suffix, ""
+    @config.expect :weak, ""
+    orig_filename = "PoutPoutFish.h"
+    define_name = "MOCKPOUTPOUTFISH_H"
+    output = []
+    expected = [
+      "/* AUTOGENERATED FILE. DO NOT EDIT. */\n",
+      "#ifndef _#{define_name}\n",
+      "#define _#{define_name}\n\n",
+      "#include \"unity.h\"\n",
+      "#include \"ConfigRequiredHeader1.h\"\n",
+      "#include \"ConfigRequiredHeader2.h\"\n",
+      "#include \"#{orig_filename}\"\n",
+      "\n",
+      "/* Ignore the following warnings, since we are copying code */\n",
+      "#if defined(__GNUC__) && !defined(__ICC) && !defined(__TMS470__)\n",
+      "#if __GNUC__ > 4 || (__GNUC__ == 4 && (__GNUC_MINOR__ > 6 || (__GNUC_MINOR__ == 6 && __GNUC_PATCHLEVEL__ > 0)))\n",
+      "#pragma GCC diagnostic push\n",
+      "#endif\n",
+      "#if !defined(__clang__)\n",
+      "#pragma GCC diagnostic ignored \"-Wpragmas\"\n",
+      "#endif\n",
+      "#pragma GCC diagnostic ignored \"-Wunknown-pragmas\"\n",
+      "#pragma GCC diagnostic ignored \"-Wduplicate-decl-specifier\"\n",
+      "#endif\n",
+      "\n",
+    ]
+
+    @config.expect :orig_header_include_fmt, "#include \"%s\""
+    @plugins.expect :run,  '', [:include_files]
+
+    @cmock_generator.create_mock_header_header(output, "MockPoutPoutFish.h")
+
+    assert_equal(expected, output)
+  end
+
+  it "create the top of a header file with include file from plugin" do
+    @config.expect :mock_prefix, "Mock"
+    @config.expect :mock_suffix, ""
+    @config.expect :weak, ""
+    orig_filename = "PoutPoutFish.h"
+    define_name = "MOCKPOUTPOUTFISH_H"
+    output = []
+    expected = [
+      "/* AUTOGENERATED FILE. DO NOT EDIT. */\n",
+      "#ifndef _#{define_name}\n",
+      "#define _#{define_name}\n\n",
+      "#include \"unity.h\"\n",
+      "#include \"ConfigRequiredHeader1.h\"\n",
+      "#include \"ConfigRequiredHeader2.h\"\n",
+      "#include \"#{orig_filename}\"\n",
+      "#include \"PluginRequiredHeader.h\"\n",
+      "\n",
+      "/* Ignore the following warnings, since we are copying code */\n",
+      "#if defined(__GNUC__) && !defined(__ICC) && !defined(__TMS470__)\n",
+      "#if __GNUC__ > 4 || (__GNUC__ == 4 && (__GNUC_MINOR__ > 6 || (__GNUC_MINOR__ == 6 && __GNUC_PATCHLEVEL__ > 0)))\n",
+      "#pragma GCC diagnostic push\n",
+      "#endif\n",
+      "#if !defined(__clang__)\n",
+      "#pragma GCC diagnostic ignored \"-Wpragmas\"\n",
+      "#endif\n",
+      "#pragma GCC diagnostic ignored \"-Wunknown-pragmas\"\n",
+      "#pragma GCC diagnostic ignored \"-Wduplicate-decl-specifier\"\n",
+      "#endif\n",
+      "\n",
+    ]
+
+    @config.expect :orig_header_include_fmt, "#include \"%s\""
+    @plugins.expect :run, "#include \"PluginRequiredHeader.h\"\n", [:include_files]
+
+    @cmock_generator.create_mock_header_header(output, "MockPoutPoutFish.h")
+
+    assert_equal(expected, output)
+  end
+
+  it "write typedefs" do
+    typedefs = [ 'typedef unsigned char U8;',
+                 'typedef char S8;',
+                 'typedef unsigned long U32;'
+                ]
+    output = []
+    expected = [ "\n",
+                 "typedef unsigned char U8;\n",
+                 "typedef char S8;\n",
+                 "typedef unsigned long U32;\n",
+                 "\n\n"
+               ]
+
+    @cmock_generator.create_typedefs(output, typedefs)
+
+    assert_equal(expected, output.flatten)
+  end
+
+  it "create the header file service call declarations" do
+    mock_name = "MockPoutPoutFish"
+
+    output = []
+    expected = [ "void #{mock_name}_Init(void);\n",
+                 "void #{mock_name}_Destroy(void);\n",
+                 "void #{mock_name}_Verify(void);\n\n"
+               ]
+
+    @cmock_generator.create_mock_header_service_call_declarations(output)
+
+    assert_equal(expected, output)
+  end
+
+  it "append the proper footer to the header file" do
+    output = []
+    expected = ["\n",
+                "#if defined(__GNUC__) && !defined(__ICC) && !defined(__TMS470__)\n",
+                "#if __GNUC__ > 4 || (__GNUC__ == 4 && (__GNUC_MINOR__ > 6 || (__GNUC_MINOR__ == 6 && __GNUC_PATCHLEVEL__ > 0)))\n",
+                "#pragma GCC diagnostic pop\n",
+                "#endif\n",
+                "#endif\n",
+                "\n",
+                "#endif\n"
+                ]
+
+    @cmock_generator.create_mock_header_footer(output)
+
+    assert_equal(expected, output)
+  end
+
+  it "create a proper heading for a source file" do
+    output = []
+    functions = [ { :name => "uno", :args => [ { :name => "arg1" }, { :name => "arg2" } ] },
+                  { :name => "dos", :args => [ { :name => "arg3" }, { :name => "arg2" } ] },
+                  { :name => "tres", :args => [] }
+                ]
+    expected = [ "/* AUTOGENERATED FILE. DO NOT EDIT. */\n",
+                 "#include <string.h>\n",
+                 "#include <stdlib.h>\n",
+                 "#include <setjmp.h>\n",
+                 "#include \"cmock.h\"\n",
+                 "#include \"MockPoutPoutFish.h\"\n",
+                 "\n",
+                 "static const char* CMockString_arg1 = \"arg1\";\n",
+                 "static const char* CMockString_arg2 = \"arg2\";\n",
+                 "static const char* CMockString_arg3 = \"arg3\";\n",
+                 "static const char* CMockString_dos = \"dos\";\n",
+                 "static const char* CMockString_tres = \"tres\";\n",
+                 "static const char* CMockString_uno = \"uno\";\n",
+                 "\n"
+               ]
+
+    @cmock_generator.create_source_header_section(output, "MockPoutPoutFish.c", functions)
+
+    assert_equal(expected, output)
+  end
+
+  it "create the instance structure where it is needed when no functions" do
+    output = []
+    functions = []
+    expected = [ "static struct MockPoutPoutFishInstance\n",
+                 "{\n",
+                 "  unsigned char placeHolder;\n",
+                 "} Mock;\n\n"
+               ].join
+
+    @cmock_generator.create_instance_structure(output, functions)
+
+    assert_equal(expected, output.join)
+  end
+
+  it "create the instance structure where it is needed when functions required" do
+    output = []
+    functions = [ { :name => "First", :args => "int Candy", :return => test_return[:int] },
+                  { :name => "Second", :args => "bool Smarty", :return => test_return[:string] }
+                ]
+    expected = [ "typedef struct _CMOCK_First_CALL_INSTANCE\n{\n",
+                 "  UNITY_LINE_TYPE LineNumber;\n",
+                 "  b1  b2",
+                 "\n} CMOCK_First_CALL_INSTANCE;\n\n",
+                 "typedef struct _CMOCK_Second_CALL_INSTANCE\n{\n",
+                 "  UNITY_LINE_TYPE LineNumber;\n",
+                 "\n} CMOCK_Second_CALL_INSTANCE;\n\n",
+                 "static struct MockPoutPoutFishInstance\n{\n",
+                 "  d1",
+                 "  CMOCK_MEM_INDEX_TYPE First_CallInstance;\n",
+                 "  e1  e2  e3",
+                 "  CMOCK_MEM_INDEX_TYPE Second_CallInstance;\n",
+                 "} Mock;\n\n"
+               ].join
+    @plugins.expect :run, ["  b1","  b2"],        [:instance_typedefs, functions[0]]
+    @plugins.expect :run, [],                     [:instance_typedefs, functions[1]]
+
+    @plugins.expect :run, ["  d1"],               [:instance_structure, functions[0]]
+    @plugins.expect :run, ["  e1","  e2","  e3"], [:instance_structure, functions[1]]
+
+    @cmock_generator.create_instance_structure(output, functions)
+
+    assert_equal(expected, output.join)
+  end
+
+  it "create extern declarations for source file" do
+    output = []
+    expected = [ "extern jmp_buf AbortFrame;\n",
+                 "\n" ]
+
+    @cmock_generator.create_extern_declarations(output)
+
+    assert_equal(expected, output.flatten)
+  end
+
+  it "create extern declarations for source file when using strict ordering" do
+    output = []
+    expected = [ "extern jmp_buf AbortFrame;\n",
+                 "extern int GlobalExpectCount;\n",
+                 "extern int GlobalVerifyOrder;\n",
+                 "\n" ]
+
+    @cmock_generator_strict.create_extern_declarations(output)
+
+    assert_equal(expected, output.flatten)
+  end
+
+  it "create mock verify functions in source file when no functions specified" do
+    functions = []
+    output = []
+    expected = "void MockPoutPoutFish_Verify(void)\n{\n}\n\n"
+
+    @cmock_generator.create_mock_verify_function(output, functions)
+
+    assert_equal(expected, output.join)
+  end
+
+  it "create mock verify functions in source file when extra functions specified" do
+    functions = [ { :name => "First", :args => "int Candy", :return => test_return[:int] },
+                  { :name => "Second", :args => "bool Smarty", :return => test_return[:string] }
+                ]
+    output = []
+    expected = [ "void MockPoutPoutFish_Verify(void)\n{\n",
+                 "  UNITY_LINE_TYPE cmock_line = TEST_LINE_NUM;\n",
+                 "  CMOCK_MEM_INDEX_TYPE call_instance;\n",
+                 "  call_instance = Mock.First_CallInstance;\n" +
+                 "  Uno_First" +
+                 "  Dos_First" +
+                 "  call_instance = Mock.Second_CallInstance;\n" +
+                 "  Uno_Second" +
+                 "  Dos_Second",
+                 "}\n\n"
+               ]
+    @plugins.expect :run, ["  Uno_First","  Dos_First"],   [:mock_verify, functions[0]]
+    @plugins.expect :run, ["  Uno_Second","  Dos_Second"], [:mock_verify, functions[1]]
+
+    @cmock_generator.ordered = true
+    @cmock_generator.create_mock_verify_function(output, functions)
+
+    assert_equal(expected, output.flatten)
+  end
+
+  it "create mock init functions in source file" do
+    output = []
+    expected = [ "void MockPoutPoutFish_Init(void)\n{\n",
+                 "  MockPoutPoutFish_Destroy();\n",
+                 "}\n\n"
+               ]
+
+    @cmock_generator.create_mock_init_function(output)
+
+    assert_equal(expected.join, output.join)
+  end
+
+  it "create mock destroy functions in source file" do
+    functions = []
+    output = []
+    expected = [ "void MockPoutPoutFish_Destroy(void)\n{\n",
+                 "  CMock_Guts_MemFreeAll();\n",
+                 "  memset(&Mock, 0, sizeof(Mock));\n",
+                 "}\n\n"
+               ]
+
+    @cmock_generator.create_mock_destroy_function(output, functions)
+
+    assert_equal(expected.join, output.join)
+  end
+
+  it "create mock destroy functions in source file when specified with strict ordering" do
+    functions = [ { :name => "First", :args => "int Candy", :return => test_return[:int] },
+                  { :name => "Second", :args => "bool Smarty", :return => test_return[:string] }
+                ]
+    output = []
+    expected = [ "void MockPoutPoutFish_Destroy(void)\n{\n",
+                 "  CMock_Guts_MemFreeAll();\n",
+                 "  memset(&Mock, 0, sizeof(Mock));\n",
+                 "  uno",
+                 "  GlobalExpectCount = 0;\n",
+                 "  GlobalVerifyOrder = 0;\n",
+                 "}\n\n"
+               ]
+    @plugins.expect :run, [],        [:mock_destroy, functions[0]]
+    @plugins.expect :run, ["  uno"], [:mock_destroy, functions[1]]
+
+    @cmock_generator_strict.create_mock_destroy_function(output, functions)
+
+    assert_equal(expected.join, output.join)
+  end
+
+  it "create mock implementation functions in source file" do
+    function = { :modifier => "static",
+                 :return => test_return[:int],
+                 :args_string => "uint32 sandwiches, const char* named",
+                 :args => ["uint32 sandwiches", "const char* named"],
+                 :var_arg => nil,
+                 :name => "SupaFunction",
+                 :unscoped_name => "SupaFunction",
+                 :namespace => [],
+                 :class => nil,
+                 :attributes => "__inline"
+               }
+    output = []
+    expected = [ "static int SupaFunction(uint32 sandwiches, const char* named)\n",
+                 "{\n",
+                 "  UNITY_LINE_TYPE cmock_line = TEST_LINE_NUM;\n",
+                 "  CMOCK_SupaFunction_CALL_INSTANCE* cmock_call_instance;\n",
+                 "  UNITY_SET_DETAIL(CMockString_SupaFunction);\n",
+                 "  cmock_call_instance = (CMOCK_SupaFunction_CALL_INSTANCE*)CMock_Guts_GetAddressFor(Mock.SupaFunction_CallInstance);\n",
+                 "  Mock.SupaFunction_CallInstance = CMock_Guts_MemNext(Mock.SupaFunction_CallInstance);\n",
+                 "  uno",
+                 "  UNITY_TEST_ASSERT_NOT_NULL(cmock_call_instance, cmock_line, CMockStringCalledMore);\n",
+                 "  cmock_line = cmock_call_instance->LineNumber;\n",
+                 "  dos",
+                 "  tres",
+                 "  UNITY_CLR_DETAILS();\n",
+                 "  return cmock_call_instance->ReturnVal;\n",
+                 "}\n\n"
+               ]
+    @plugins.expect :run, ["  uno"],          [:mock_implementation_precheck, function]
+    @plugins.expect :run, ["  dos","  tres"], [:mock_implementation, function]
+
+    @cmock_generator.create_mock_implementation(output, function)
+
+    assert_equal(expected.join, output.join)
+  end
+
+  it "create mock implementation functions in source file with different options" do
+    function = { :modifier => "",
+                 :c_calling_convention => "__stdcall",
+                 :return => test_return[:int],
+                 :args_string => "uint32 sandwiches",
+                 :args => ["uint32 sandwiches"],
+                 :var_arg => "corn ...",
+                 :name => "SupaFunction",
+                 :unscoped_name => "SupaFunction",
+                 :namespace => [],
+                 :class => nil,
+                 :attributes => nil
+               }
+    output = []
+    expected = [ "int __stdcall SupaFunction(uint32 sandwiches, corn ...)\n",
+                 "{\n",
+                 "  UNITY_LINE_TYPE cmock_line = TEST_LINE_NUM;\n",
+                 "  CMOCK_SupaFunction_CALL_INSTANCE* cmock_call_instance;\n",
+                 "  UNITY_SET_DETAIL(CMockString_SupaFunction);\n",
+                 "  cmock_call_instance = (CMOCK_SupaFunction_CALL_INSTANCE*)CMock_Guts_GetAddressFor(Mock.SupaFunction_CallInstance);\n",
+                 "  Mock.SupaFunction_CallInstance = CMock_Guts_MemNext(Mock.SupaFunction_CallInstance);\n",
+                 "  uno",
+                 "  UNITY_TEST_ASSERT_NOT_NULL(cmock_call_instance, cmock_line, CMockStringCalledMore);\n",
+                 "  cmock_line = cmock_call_instance->LineNumber;\n",
+                 "  dos",
+                 "  tres",
+                 "  UNITY_CLR_DETAILS();\n",
+                 "  return cmock_call_instance->ReturnVal;\n",
+                 "}\n\n"
+               ]
+    @plugins.expect :run, ["  uno"],          [:mock_implementation_precheck, function]
+    @plugins.expect :run, ["  dos","  tres"], [:mock_implementation, function]
+
+    @cmock_generator.create_mock_implementation(output, function)
+
+    assert_equal(expected.join, output.join)
+  end
+
+  it "create mock implementation function in source file for C++ static member" do
+    function = { :modifier => "static",
+                 :return => test_return[:int],
+                 :args_string => "uint32 sandwiches, const char* named",
+                 :args => ["uint32 sandwiches", "const char* named"],
+                 :var_arg => nil,
+                 :unscoped_name => "SupaFunction",
+                 :namespace => ["ns1", "ns2"],
+                 :class => "SupaClass",
+                 :name => "ns1_ns2_SupaClass_SupaFunction",
+                 :attributes => nil
+               }
+    output = []
+    expected = [ "namespace ns1 {\n",
+                 "namespace ns2 {\n",
+                 "static int SupaClass::SupaFunction(uint32 sandwiches, const char* named)\n",
+                 "{\n",
+                 "  UNITY_LINE_TYPE cmock_line = TEST_LINE_NUM;\n",
+                 "  CMOCK_ns1_ns2_SupaClass_SupaFunction_CALL_INSTANCE* cmock_call_instance;\n",
+                 "  UNITY_SET_DETAIL(CMockString_ns1_ns2_SupaClass_SupaFunction);\n",
+                 "  cmock_call_instance = (CMOCK_ns1_ns2_SupaClass_SupaFunction_CALL_INSTANCE*)CMock_Guts_GetAddressFor(Mock.ns1_ns2_SupaClass_SupaFunction_CallInstance);\n",
+                 "  Mock.ns1_ns2_SupaClass_SupaFunction_CallInstance = CMock_Guts_MemNext(Mock.ns1_ns2_SupaClass_SupaFunction_CallInstance);\n",
+                 "  uno",
+                 "  UNITY_TEST_ASSERT_NOT_NULL(cmock_call_instance, cmock_line, CMockStringCalledMore);\n",
+                 "  cmock_line = cmock_call_instance->LineNumber;\n",
+                 "  dos",
+                 "  tres",
+                 "  UNITY_CLR_DETAILS();\n",
+                 "  return cmock_call_instance->ReturnVal;\n",
+                 "}\n",
+                 "}\n",
+                 "}\n\n",
+               ]
+    @plugins.expect :run, ["  uno"],          [:mock_implementation_precheck, function]
+    @plugins.expect :run, ["  dos","  tres"], [:mock_implementation, function]
+
+    @cmock_generator.create_mock_implementation(output, function)
+
+    assert_equal(expected.join, output.join)
+  end
+
+  it "create mock implementation functions in source file with different options for C++ static member" do
+    function = { :modifier => "static",
+                 :c_calling_convention => "__stdcall",
+                 :return => test_return[:int],
+                 :args_string => "uint32 sandwiches",
+                 :args => ["uint32 sandwiches"],
+                 :var_arg => "corn ...",
+                 :name => "SupaClass_SupaFunction",
+                 :unscoped_name => "SupaFunction",
+                 :namespace => [],
+                 :class => "SupaClass",
+                 :attributes => nil
+               }
+    output = []
+    expected = [ "static int __stdcall SupaClass::SupaFunction(uint32 sandwiches, corn ...)\n",
+                 "{\n",
+                 "  UNITY_LINE_TYPE cmock_line = TEST_LINE_NUM;\n",
+                 "  CMOCK_SupaClass_SupaFunction_CALL_INSTANCE* cmock_call_instance;\n",
+                 "  UNITY_SET_DETAIL(CMockString_SupaClass_SupaFunction);\n",
+                 "  cmock_call_instance = (CMOCK_SupaClass_SupaFunction_CALL_INSTANCE*)CMock_Guts_GetAddressFor(Mock.SupaClass_SupaFunction_CallInstance);\n",
+                 "  Mock.SupaClass_SupaFunction_CallInstance = CMock_Guts_MemNext(Mock.SupaClass_SupaFunction_CallInstance);\n",
+                 "  uno",
+                 "  UNITY_TEST_ASSERT_NOT_NULL(cmock_call_instance, cmock_line, CMockStringCalledMore);\n",
+                 "  cmock_line = cmock_call_instance->LineNumber;\n",
+                 "  dos",
+                 "  tres",
+                 "  UNITY_CLR_DETAILS();\n",
+                 "  return cmock_call_instance->ReturnVal;\n",
+                 "}\n\n"
+               ]
+    @plugins.expect :run, ["  uno"],          [:mock_implementation_precheck, function]
+    @plugins.expect :run, ["  dos","  tres"], [:mock_implementation, function]
+
+    @cmock_generator.create_mock_implementation(output, function)
+
+    assert_equal(expected.join, output.join)
+  end
+
+  it "creates using statements for C++ static member in namespace" do
+    function = { :modifier => "static",
+                 :return => test_return[:int],
+                 :args_string => "uint32 sandwiches",
+                 :args => ["uint32 sandwiches"],
+                 :var_arg => nil,
+                 :unscoped_name => "SupaFunction",
+                 :namespace => ["ns1"],
+                 :class => "SupaClass",
+                 :name => "ns1_SupaClass_SupaFunction",
+                 :attributes => nil
+               }
+    output = []
+    expected = "using namespace ns1;\n"
+
+    @cmock_generator.create_using_statement(output, function)
+
+    assert_equal(expected, output.join)
+  end
+
+  it "creates using statements for C++ static member in nested namespace" do
+    function = { :modifier => "static",
+                 :return => test_return[:int],
+                 :args_string => "uint32 sandwiches",
+                 :args => ["uint32 sandwiches"],
+                 :var_arg => nil,
+                 :unscoped_name => "SupaFunction",
+                 :namespace => ["ns1", "ns2"],
+                 :class => "SupaClass",
+                 :name => "ns1_ns2_SupaClass_SupaFunction",
+                 :attributes => nil
+               }
+    output = []
+    expected = "using namespace ns1::ns2;\n"
+
+    @cmock_generator.create_using_statement(output, function)
+
+    assert_equal(expected, output.join)
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_plugin_array_test.rb b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_plugin_array_test.rb
new file mode 100644
index 000000000..64c0b2838
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_plugin_array_test.rb
@@ -0,0 +1,141 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+require File.expand_path(File.dirname(__FILE__)) + "/../test_helper"
+require File.expand_path(File.dirname(__FILE__)) + '/../../lib/cmock_generator_plugin_array'
+require File.expand_path(File.dirname(__FILE__)) + '/../../lib/cmock_generator_utils'
+
+class UtilsStub
+  def helpers
+    {}
+  end
+  def arg_type_with_const(arg)
+    CMockGeneratorUtils.arg_type_with_const(arg)
+  end
+  def code_add_base_expectation(func)
+    "mock_retval_0"
+  end
+end
+
+describe CMockGeneratorPluginArray, "Verify CMockPGeneratorluginArray Module" do
+  before do
+    #no strict ordering
+    @config = create_stub(
+      :when_ptr => :compare_data,
+      :enforce_strict_ordering => false,
+      :respond_to? => true )
+
+    @utils = UtilsStub.new
+
+    @cmock_generator_plugin_array = CMockGeneratorPluginArray.new(@config, @utils)
+  end
+
+  after do
+  end
+
+  it "have set up internal priority" do
+    assert_nil(@cmock_generator_plugin_array.unity_helper)
+    assert_equal(8, @cmock_generator_plugin_array.priority)
+  end
+
+  it "not include any additional include files" do
+    assert(!@cmock_generator_plugin_array.respond_to?(:include_files))
+  end
+
+  it "not add to typedef structure for functions of style 'int* func(void)'" do
+    function = {:name => "Oak", :args => [], :return => test_return[:int_ptr]}
+    returned = @cmock_generator_plugin_array.instance_typedefs(function)
+    assert_equal("", returned)
+  end
+
+  it "add to tyepdef structure mock needs of functions of style 'void func(int chicken, int* pork)'" do
+    function = {:name => "Cedar", :args => [{ :name => "chicken", :type => "int", :ptr? => false}, { :name => "pork", :type => "int*", :ptr? => true}], :return => test_return[:void]}
+    expected = "  int Expected_pork_Depth;\n"
+    returned = @cmock_generator_plugin_array.instance_typedefs(function)
+    assert_equal(expected, returned)
+  end
+
+  it "not add an additional mock interface for functions not containing pointers" do
+    function = {:name => "Maple", :args_string => "int blah", :return  => test_return[:string], :contains_ptr? => false}
+    returned = @cmock_generator_plugin_array.mock_function_declarations(function)
+    assert_nil(returned)
+  end
+
+  it "add another mock function declaration for functions of style 'void func(int* tofu)'" do
+    function = {:name => "Pine",
+                :args => [{ :type => "int*",
+                           :name => "tofu",
+                           :ptr? => true,
+                         }],
+                :return => test_return[:void],
+                :contains_ptr? => true }
+
+    expected = "#define #{function[:name]}_ExpectWithArray(tofu, tofu_Depth) #{function[:name]}_CMockExpectWithArray(__LINE__, tofu, tofu_Depth)\n" +
+               "void #{function[:name]}_CMockExpectWithArray(UNITY_LINE_TYPE cmock_line, int* tofu, int tofu_Depth);\n"
+    returned = @cmock_generator_plugin_array.mock_function_declarations(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add another mock function declaration for functions of style 'const char* func(int* tofu)'" do
+    function = {:name => "Pine",
+                :args => [{ :type => "int*",
+                           :name => "tofu",
+                           :ptr? => true,
+                         }],
+                :return => test_return[:string],
+                :contains_ptr? => true }
+
+    expected = "#define #{function[:name]}_ExpectWithArrayAndReturn(tofu, tofu_Depth, cmock_retval) #{function[:name]}_CMockExpectWithArrayAndReturn(__LINE__, tofu, tofu_Depth, cmock_retval)\n" +
+               "void #{function[:name]}_CMockExpectWithArrayAndReturn(UNITY_LINE_TYPE cmock_line, int* tofu, int tofu_Depth, const char* cmock_to_return);\n"
+    returned = @cmock_generator_plugin_array.mock_function_declarations(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add another mock function declaration for functions of style 'const char* func(const int* tofu)'" do
+    function = {:name => "Pine",
+                :args => [{ :type   => "const int*",
+                            :name   => "tofu",
+                            :ptr?   => true,
+                            :const? => true,
+                         }],
+                :return => test_return[:string],
+                :contains_ptr? => true }
+
+    expected = "#define #{function[:name]}_ExpectWithArrayAndReturn(tofu, tofu_Depth, cmock_retval) #{function[:name]}_CMockExpectWithArrayAndReturn(__LINE__, tofu, tofu_Depth, cmock_retval)\n" +
+               "void #{function[:name]}_CMockExpectWithArrayAndReturn(UNITY_LINE_TYPE cmock_line, const int* tofu, int tofu_Depth, const char* cmock_to_return);\n"
+    returned = @cmock_generator_plugin_array.mock_function_declarations(function)
+    assert_equal(expected, returned)
+  end
+
+  it "not have a mock function implementation" do
+    assert(!@cmock_generator_plugin_array.respond_to?(:mock_implementation))
+  end
+
+  it "not have a mock interfaces for functions of style 'int* func(void)'" do
+    function = {:name => "Pear", :args => [], :args_string => "void", :return => test_return[:int_ptr]}
+    returned = @cmock_generator_plugin_array.mock_interfaces(function)
+    assert_nil(returned)
+  end
+
+  it "add mock interfaces for functions of style 'int* func(int* pescado, int pes)'" do
+    function = {:name => "Lemon",
+                :args => [{ :type => "int*", :name => "pescado", :ptr? => true}, { :type => "int", :name => "pes", :ptr? => false}],
+                :args_string => "int* pescado, int pes",
+                :return  => test_return[:int_ptr],
+                :contains_ptr? => true }
+
+    expected = ["void Lemon_CMockExpectWithArrayAndReturn(UNITY_LINE_TYPE cmock_line, int* pescado, int pescado_Depth, int pes, int* cmock_to_return)\n",
+                "{\n",
+                "mock_retval_0",
+                "  CMockExpectParameters_Lemon(cmock_call_instance, pescado, pescado_Depth, pes);\n",
+                "  cmock_call_instance->ReturnVal = cmock_to_return;\n",
+                "}\n\n"
+               ].join
+    returned = @cmock_generator_plugin_array.mock_interfaces(function).join
+    assert_equal(expected, returned)
+  end
+
+end
diff --git a/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_plugin_callback_test.rb b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_plugin_callback_test.rb
new file mode 100644
index 000000000..0b5ce1eb8
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_plugin_callback_test.rb
@@ -0,0 +1,281 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+require File.expand_path(File.dirname(__FILE__)) + "/../test_helper"
+require File.expand_path(File.dirname(__FILE__)) + '/../../lib/cmock_generator_plugin_callback'
+
+describe CMockGeneratorPluginCallback, "Verify CMockGeneratorPluginCallback Module" do
+
+  before do
+    create_mocks :config, :utils
+
+    @config.expect :callback_include_count, true
+    @config.expect :callback_after_arg_check, false
+    @config.expect :plugins, [:ignore]
+
+    @cmock_generator_plugin_callback = CMockGeneratorPluginCallback.new(@config, @utils)
+  end
+
+  after do
+  end
+
+  it "have set up internal priority" do
+    assert_equal(6, @cmock_generator_plugin_callback.priority)
+  end
+
+  it "not include any additional include files" do
+    assert(!@cmock_generator_plugin_callback.respond_to?(:include_files))
+  end
+
+  it "add to instance structure" do
+    function = {:name => "Oak", :args => [:type => "int*", :name => "blah", :ptr? => true], :return => test_return[:int_ptr]}
+    expected = "  char Oak_CallbackBool;\n" +
+               "  CMOCK_Oak_CALLBACK Oak_CallbackFunctionPointer;\n" +
+               "  int Oak_CallbackCalls;\n"
+    returned = @cmock_generator_plugin_callback.instance_structure(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function declaration for function without arguments" do
+    function = {:name => "Maple", :args_string => "void", :args => [], :return => test_return[:void]}
+    expected = [ "typedef void (* CMOCK_Maple_CALLBACK)(int cmock_num_calls);\n",
+                 "void Maple_AddCallback(CMOCK_Maple_CALLBACK Callback);\n",
+                 "void Maple_Stub(CMOCK_Maple_CALLBACK Callback);\n",
+                 "#define Maple_StubWithCallback Maple_Stub\n" ].join
+    returned = @cmock_generator_plugin_callback.mock_function_declarations(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function declaration for function without arguments when count is also turned off" do
+    function = {:name => "Maple", :args_string => "void", :args => [], :return => test_return[:void]}
+    expected = [ "typedef void (* CMOCK_Maple_CALLBACK)(void);\n",
+                 "void Maple_AddCallback(CMOCK_Maple_CALLBACK Callback);\n",
+                 "void Maple_Stub(CMOCK_Maple_CALLBACK Callback);\n",
+                 "#define Maple_StubWithCallback Maple_Stub\n" ].join
+    @cmock_generator_plugin_callback.include_count = false
+    returned = @cmock_generator_plugin_callback.mock_function_declarations(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function declaration for function with arguments" do
+    function = {:name => "Maple", :args_string => "int* tofu", :args => [1], :return => test_return[:void]}
+    expected = [ "typedef void (* CMOCK_Maple_CALLBACK)(int* tofu, int cmock_num_calls);\n",
+                 "void Maple_AddCallback(CMOCK_Maple_CALLBACK Callback);\n",
+                 "void Maple_Stub(CMOCK_Maple_CALLBACK Callback);\n",
+                 "#define Maple_StubWithCallback Maple_Stub\n" ].join
+    returned = @cmock_generator_plugin_callback.mock_function_declarations(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function declaration for function with return values" do
+    function = {:name => "Maple", :args_string => "int* tofu", :args => [1], :return => test_return[:string]}
+    expected = [ "typedef const char* (* CMOCK_Maple_CALLBACK)(int* tofu, int cmock_num_calls);\n",
+                 "void Maple_AddCallback(CMOCK_Maple_CALLBACK Callback);\n",
+                 "void Maple_Stub(CMOCK_Maple_CALLBACK Callback);\n",
+                 "#define Maple_StubWithCallback Maple_Stub\n" ].join
+    returned = @cmock_generator_plugin_callback.mock_function_declarations(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function declaration for function with return values and count is turned off" do
+    function = {:name => "Maple", :args_string => "int* tofu", :args => [1], :return => test_return[:string]}
+    expected = [ "typedef const char* (* CMOCK_Maple_CALLBACK)(int* tofu);\n",
+                 "void Maple_AddCallback(CMOCK_Maple_CALLBACK Callback);\n",
+                 "void Maple_Stub(CMOCK_Maple_CALLBACK Callback);\n",
+                 "#define Maple_StubWithCallback Maple_Stub\n" ].join
+    @cmock_generator_plugin_callback.include_count = false
+    returned = @cmock_generator_plugin_callback.mock_function_declarations(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function implementation for functions with no arg check and of style 'void func(void)'" do
+    function = {:name => "Apple", :args => [], :args_string => "void", :return => test_return[:void]}
+    expected = ["  if (Mock.Apple_CallbackFunctionPointer != NULL)\n",
+                "  {\n",
+                "    Mock.Apple_CallbackFunctionPointer(Mock.Apple_CallbackCalls++);\n",
+                "  }\n"
+               ].join
+    returned = @cmock_generator_plugin_callback.mock_implementation(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function implementation for functions with no arg check and of style 'void func(void)' when count turned off" do
+    function = {:name => "Apple", :args => [], :args_string => "void", :return => test_return[:void]}
+    expected = ["  if (Mock.Apple_CallbackFunctionPointer != NULL)\n",
+                "  {\n",
+                "    Mock.Apple_CallbackFunctionPointer();\n",
+                "  }\n"
+               ].join
+    @cmock_generator_plugin_callback.include_count = false
+    returned = @cmock_generator_plugin_callback.mock_implementation(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function implementation for functions with no arg check and of style 'int func(void)'" do
+    function = {:name => "Apple", :args => [], :args_string => "void", :return => test_return[:int]}
+    expected = ["  if (Mock.Apple_CallbackFunctionPointer != NULL)\n",
+                "  {\n",
+                "    cmock_call_instance->ReturnVal = Mock.Apple_CallbackFunctionPointer(Mock.Apple_CallbackCalls++);\n",
+                "  }\n"
+               ].join
+    returned = @cmock_generator_plugin_callback.mock_implementation(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function implementation for functions with no arg check and of style 'void func(int* steak, uint8_t flag)'" do
+    function = {:name => "Apple",
+                :args => [ { :type => 'int*', :name => 'steak', :ptr? => true},
+                  { :type => 'uint8_t', :name => 'flag', :ptr? => false} ],
+                :args_string => "int* steak, uint8_t flag",
+                :return=> test_return[:void]}
+    expected = ["  if (Mock.Apple_CallbackFunctionPointer != NULL)\n",
+                "  {\n",
+                "    Mock.Apple_CallbackFunctionPointer(steak, flag, Mock.Apple_CallbackCalls++);\n",
+                "  }\n"
+               ].join
+    returned = @cmock_generator_plugin_callback.mock_implementation(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function implementation for functions with no arg check and of style 'void func(int* steak, uint8_t flag)' when count turned off" do
+    function = {:name => "Apple",
+                :args => [ { :type => 'int*', :name => 'steak', :ptr? => true},
+                  { :type => 'uint8_t', :name => 'flag', :ptr? => false} ],
+                :args_string => "int* steak, uint8_t flag",
+                :return=> test_return[:void]}
+    expected = ["  if (Mock.Apple_CallbackFunctionPointer != NULL)\n",
+                "  {\n",
+                "    Mock.Apple_CallbackFunctionPointer(steak, flag);\n",
+                "  }\n"
+               ].join
+    @cmock_generator_plugin_callback.include_count = false
+    returned = @cmock_generator_plugin_callback.mock_implementation(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function implementation for functions with no arg check and of style 'int16_t func(int* steak, uint8_t flag)'" do
+    function = {:name => "Apple",
+                :args => [ { :type => 'int*', :name => 'steak', :ptr? => true},
+                  { :type => 'uint8_t', :name => 'flag', :ptr? => false} ],
+                :args_string => "int* steak, uint8_t flag",
+                :return => test_return[:int]}
+    expected = ["  if (Mock.Apple_CallbackFunctionPointer != NULL)\n",
+                "  {\n",
+                "    cmock_call_instance->ReturnVal = Mock.Apple_CallbackFunctionPointer(steak, flag, Mock.Apple_CallbackCalls++);\n",
+                "  }\n"
+               ].join
+    returned = @cmock_generator_plugin_callback.mock_implementation(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function implementation for functions without arg check and of style 'void func(void)' when count turned off" do
+    function = {:name => "Apple", :args => [], :args_string => "void", :return => test_return[:void]}
+    expected = ["  if (!Mock.Apple_CallbackBool &&\n",
+                "      Mock.Apple_CallbackFunctionPointer != NULL)\n",
+                "  {\n",
+                "    Mock.Apple_CallbackFunctionPointer();\n",
+                "    UNITY_CLR_DETAILS();\n",
+                "    return;\n",
+                "  }\n"
+               ].join
+    @cmock_generator_plugin_callback.include_count = false
+    returned = @cmock_generator_plugin_callback.mock_implementation_precheck(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function implementation for functions without arg check and of style 'int func(void)'" do
+    function = {:name => "Apple", :args => [], :args_string => "void", :return => test_return[:int]}
+    expected = ["  if (!Mock.Apple_CallbackBool &&\n",
+                "      Mock.Apple_CallbackFunctionPointer != NULL)\n",
+                "  {\n",
+                "    int cmock_cb_ret = Mock.Apple_CallbackFunctionPointer(Mock.Apple_CallbackCalls++);\n",
+                "    UNITY_CLR_DETAILS();\n",
+                "    return cmock_cb_ret;\n",
+                "  }\n"
+               ].join
+    returned = @cmock_generator_plugin_callback.mock_implementation_precheck(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function implementation for functions without arg check and of style 'void func(int* steak, uint8_t flag)'" do
+    function = {:name => "Apple",
+                :args => [ { :type => 'int*', :name => 'steak', :ptr? => true},
+                  { :type => 'uint8_t', :name => 'flag', :ptr? => false} ],
+                :args_string => "int* steak, uint8_t flag",
+                :return=> test_return[:void]}
+    expected = ["  if (!Mock.Apple_CallbackBool &&\n",
+                "      Mock.Apple_CallbackFunctionPointer != NULL)\n",
+                "  {\n",
+                "    Mock.Apple_CallbackFunctionPointer(steak, flag, Mock.Apple_CallbackCalls++);\n",
+                "    UNITY_CLR_DETAILS();\n",
+                "    return;\n",
+                "  }\n"
+               ].join
+    returned = @cmock_generator_plugin_callback.mock_implementation_precheck(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function implementation for functions without arg check and of style 'void func(int* steak, uint8_t flag)' when count turned off" do
+    function = {:name => "Apple",
+                :args => [ { :type => 'int*', :name => 'steak', :ptr? => true},
+                  { :type => 'uint8_t', :name => 'flag', :ptr? => false} ],
+                :args_string => "int* steak, uint8_t flag",
+                :return=> test_return[:void]}
+    expected = ["  if (!Mock.Apple_CallbackBool &&\n",
+                "      Mock.Apple_CallbackFunctionPointer != NULL)\n",
+                "  {\n",
+                "    Mock.Apple_CallbackFunctionPointer(steak, flag);\n",
+                "    UNITY_CLR_DETAILS();\n",
+                "    return;\n",
+                "  }\n"
+               ].join
+    @cmock_generator_plugin_callback.include_count = false
+    returned = @cmock_generator_plugin_callback.mock_implementation_precheck(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function implementation for functions without arg check and of style 'int16_t func(int* steak, uint8_t flag)'" do
+    function = {:name => "Apple",
+                :args => [ { :type => 'int*', :name => 'steak', :ptr? => true},
+                  { :type => 'uint8_t', :name => 'flag', :ptr? => false} ],
+                :args_string => "int* steak, uint8_t flag",
+                :return => test_return[:int]}
+    expected = ["  if (!Mock.Apple_CallbackBool &&\n",
+                "      Mock.Apple_CallbackFunctionPointer != NULL)\n",
+                "  {\n",
+                "    int cmock_cb_ret = Mock.Apple_CallbackFunctionPointer(steak, flag, Mock.Apple_CallbackCalls++);\n",
+                "    UNITY_CLR_DETAILS();\n",
+                "    return cmock_cb_ret;\n",
+                "  }\n"
+               ].join
+    returned = @cmock_generator_plugin_callback.mock_implementation_precheck(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock interfaces for functions " do
+    function = {:name => "Lemon",
+                :args => [{ :type => "char*", :name => "pescado"}],
+                :args_string => "char* pescado",
+                :return => test_return[:int]
+               }
+
+    expected = ["void Lemon_AddCallback(CMOCK_Lemon_CALLBACK Callback)\n",
+                "{\n",
+                "  Mock.Lemon_IgnoreBool = (char)0;\n",
+                "  Mock.Lemon_CallbackBool = (char)1;\n",
+                "  Mock.Lemon_CallbackFunctionPointer = Callback;\n",
+                "}\n\n",
+                "void Lemon_Stub(CMOCK_Lemon_CALLBACK Callback)\n",
+                "{\n",
+                "  Mock.Lemon_IgnoreBool = (char)0;\n",
+                "  Mock.Lemon_CallbackBool = (char)0;\n",
+                "  Mock.Lemon_CallbackFunctionPointer = Callback;\n",
+                "}\n\n"
+               ].join
+    returned = @cmock_generator_plugin_callback.mock_interfaces(function)
+    assert_equal(expected, returned)
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_plugin_cexception_test.rb b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_plugin_cexception_test.rb
new file mode 100644
index 000000000..19699ea35
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_plugin_cexception_test.rb
@@ -0,0 +1,96 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+require File.expand_path(File.dirname(__FILE__)) + "/../test_helper"
+require File.expand_path(File.dirname(__FILE__)) + '/../../lib/cmock_generator_plugin_cexception'
+
+describe CMockGeneratorPluginCexception, "Verify CMockGeneratorPluginCexception Module" do
+
+  before do
+    create_mocks :config, :utils
+    @cmock_generator_plugin_cexception = CMockGeneratorPluginCexception.new(@config, @utils)
+  end
+
+  after do
+  end
+
+  it "have set up internal priority" do
+    assert_equal(7, @cmock_generator_plugin_cexception.priority)
+  end
+
+  it "include the cexception library" do
+    expected = "#include \"CException.h\"\n"
+    returned = @cmock_generator_plugin_cexception.include_files
+    assert_equal(expected, returned)
+  end
+
+  it "add to typedef structure mock needs" do
+    function = { :name => "Oak", :args => [], :return => test_return[:void] }
+    expected = "  CEXCEPTION_T ExceptionToThrow;\n"
+    returned = @cmock_generator_plugin_cexception.instance_typedefs(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function declarations for functions without arguments" do
+    function = { :name => "Spruce", :args_string => "void", :return => test_return[:void] }
+    expected = "#define Spruce_ExpectAndThrow(cmock_to_throw) Spruce_CMockExpectAndThrow(__LINE__, cmock_to_throw)\n"+
+               "void Spruce_CMockExpectAndThrow(UNITY_LINE_TYPE cmock_line, CEXCEPTION_T cmock_to_throw);\n"
+    returned = @cmock_generator_plugin_cexception.mock_function_declarations(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function declarations for functions with arguments" do
+    function = { :name => "Spruce", :args_string => "const char* Petunia, uint32_t Lily", :args_call => "Petunia, Lily", :return  => test_return[:void] }
+    expected = "#define Spruce_ExpectAndThrow(Petunia, Lily, cmock_to_throw) Spruce_CMockExpectAndThrow(__LINE__, Petunia, Lily, cmock_to_throw)\n" +
+               "void Spruce_CMockExpectAndThrow(UNITY_LINE_TYPE cmock_line, const char* Petunia, uint32_t Lily, CEXCEPTION_T cmock_to_throw);\n"
+    returned = @cmock_generator_plugin_cexception.mock_function_declarations(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add a mock implementation" do
+    function = {:name => "Cherry", :args => [], :return => test_return[:void]}
+    expected = "  if (cmock_call_instance->ExceptionToThrow != CEXCEPTION_NONE)\n" +
+               "  {\n" +
+               "    UNITY_CLR_DETAILS();\n" +
+               "    Throw(cmock_call_instance->ExceptionToThrow);\n" +
+               "  }\n"
+    returned = @cmock_generator_plugin_cexception.mock_implementation(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock interfaces for functions without arguments" do
+    function = {:name => "Pear", :args_string => "void", :args => [], :return  => test_return[:void]}
+    @utils.expect :code_add_base_expectation, "mock_retval_0", ["Pear"]
+    @utils.expect :code_call_argument_loader, "", [function]
+
+    expected = ["void Pear_CMockExpectAndThrow(UNITY_LINE_TYPE cmock_line, CEXCEPTION_T cmock_to_throw)\n",
+                "{\n",
+                "mock_retval_0",
+                "",
+                "  cmock_call_instance->ExceptionToThrow = cmock_to_throw;\n",
+                "}\n\n"
+               ].join
+    returned = @cmock_generator_plugin_cexception.mock_interfaces(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add a mock interfaces for functions with arguments" do
+    function = {:name => "Pear", :args_string => "int blah", :args => [{ :type => "int", :name => "blah" }], :return  => test_return[:void]}
+    @utils.expect :code_add_base_expectation, "mock_retval_0", ["Pear"]
+    @utils.expect :code_call_argument_loader, "mock_return_1", [function]
+
+    expected = ["void Pear_CMockExpectAndThrow(UNITY_LINE_TYPE cmock_line, int blah, CEXCEPTION_T cmock_to_throw)\n",
+                "{\n",
+                "mock_retval_0",
+                "mock_return_1",
+                "  cmock_call_instance->ExceptionToThrow = cmock_to_throw;\n",
+                "}\n\n"
+               ].join
+    returned = @cmock_generator_plugin_cexception.mock_interfaces(function)
+    assert_equal(expected, returned)
+  end
+
+end
diff --git a/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_plugin_expect_a_test.rb b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_plugin_expect_a_test.rb
new file mode 100644
index 000000000..dd86689a0
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_plugin_expect_a_test.rb
@@ -0,0 +1,185 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+require File.expand_path(File.dirname(__FILE__)) + "/../test_helper"
+require File.expand_path(File.dirname(__FILE__)) + '/../../lib/cmock_generator_plugin_expect'
+
+describe CMockGeneratorPluginExpect, "Verify CMockGeneratorPluginExpect Module Without Global Ordering" do
+
+  before do
+    create_mocks :config, :utils
+
+    @config = create_stub(
+      :when_ptr => :compare_data,
+      :enforce_strict_ordering => false,
+      :respond_to? => true,
+      :plugins => [ :expect ] )
+
+    @utils.expect :helpers, {}
+    @cmock_generator_plugin_expect = CMockGeneratorPluginExpect.new(@config, @utils)
+  end
+
+  after do
+  end
+
+  it "have set up internal priority on init" do
+    assert_nil(@cmock_generator_plugin_expect.unity_helper)
+    assert_equal(5, @cmock_generator_plugin_expect.priority)
+  end
+
+  it "not include any additional include files" do
+    assert(!@cmock_generator_plugin_expect.respond_to?(:include_files))
+  end
+
+  it "add to typedef structure mock needs of functions of style 'void func(void)'" do
+    function = {:name => "Oak", :args => [], :return => test_return[:void]}
+    expected = ""
+    returned = @cmock_generator_plugin_expect.instance_typedefs(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add to typedef structure mock needs of functions of style 'int func(void)'" do
+    function = {:name => "Elm", :args => [], :return => test_return[:int]}
+    expected = "  int ReturnVal;\n"
+    returned = @cmock_generator_plugin_expect.instance_typedefs(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add to typedef structure mock needs of functions of style 'void func(int chicken, char* pork)'" do
+    function = {:name => "Cedar", :args => [{ :name => "chicken", :type => "int"}, { :name => "pork", :type => "char*"}], :return => test_return[:void]}
+    expected = "  int Expected_chicken;\n  char* Expected_pork;\n"
+    returned = @cmock_generator_plugin_expect.instance_typedefs(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add to typedef structure mock needs of functions of style 'int func(float beef)'" do
+    function = {:name => "Birch", :args => [{ :name => "beef", :type => "float"}], :return => test_return[:int]}
+    expected = "  int ReturnVal;\n  float Expected_beef;\n"
+    returned = @cmock_generator_plugin_expect.instance_typedefs(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function declaration for functions of style 'void func(void)'" do
+    function = {:name => "Maple", :args => [], :return => test_return[:void]}
+    expected = "#define Maple_Expect() Maple_CMockExpect(__LINE__)\n" +
+               "void Maple_CMockExpect(UNITY_LINE_TYPE cmock_line);\n"
+    returned = @cmock_generator_plugin_expect.mock_function_declarations(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function declaration for functions of style 'int func(void)'" do
+    function = {:name => "Spruce", :args => [], :return => test_return[:int]}
+    expected = "#define Spruce_ExpectAndReturn(cmock_retval) Spruce_CMockExpectAndReturn(__LINE__, cmock_retval)\n" +
+               "void Spruce_CMockExpectAndReturn(UNITY_LINE_TYPE cmock_line, int cmock_to_return);\n"
+    returned = @cmock_generator_plugin_expect.mock_function_declarations(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function declaration for functions of style 'const char* func(int tofu)'" do
+    function = {:name => "Pine", :args => ["int tofu"], :args_string => "int tofu", :args_call => 'tofu', :return => test_return[:string]}
+    expected = "#define Pine_ExpectAndReturn(tofu, cmock_retval) Pine_CMockExpectAndReturn(__LINE__, tofu, cmock_retval)\n" +
+               "void Pine_CMockExpectAndReturn(UNITY_LINE_TYPE cmock_line, int tofu, const char* cmock_to_return);\n"
+    returned = @cmock_generator_plugin_expect.mock_function_declarations(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function implementation for functions of style 'void func(void)'" do
+    function = {:name => "Apple", :args => [], :return => test_return[:void]}
+    expected = ""
+    returned = @cmock_generator_plugin_expect.mock_implementation(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function implementation for functions of style 'int func(int veal, unsigned int sushi)'" do
+    function = {:name => "Cherry", :args => [ { :type => "int", :name => "veal" }, { :type => "unsigned int", :name => "sushi" } ], :return => test_return[:int]}
+
+    @utils.expect :code_verify_an_arg_expectation, " mocked_retval_1", [function, function[:args][0]]
+    @utils.expect :code_verify_an_arg_expectation, " mocked_retval_2", [function, function[:args][1]]
+    expected = " mocked_retval_1 mocked_retval_2"
+    returned = @cmock_generator_plugin_expect.mock_implementation(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function implementation using ordering if needed" do
+    function = {:name => "Apple", :args => [], :return => test_return[:void]}
+    expected = ""
+    @cmock_generator_plugin_expect.ordered = true
+    returned = @cmock_generator_plugin_expect.mock_implementation(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock interfaces for functions of style 'void func(void)'" do
+    function = {:name => "Pear", :args => [], :args_string => "void", :return => test_return[:void]}
+    @utils.expect :code_add_base_expectation, "mock_retval_0 ", ["Pear"]
+    @utils.expect :code_call_argument_loader, "mock_retval_1 ", [function]
+    expected = ["void Pear_CMockExpect(UNITY_LINE_TYPE cmock_line)\n",
+                "{\n",
+                "mock_retval_0 ",
+                "mock_retval_1 ",
+                "}\n\n"
+               ].join
+    returned = @cmock_generator_plugin_expect.mock_interfaces(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock interfaces for functions of style 'int func(void)'" do
+    function = {:name => "Orange", :args => [], :args_string => "void", :return => test_return[:int]}
+    @utils.expect :code_add_base_expectation, "mock_retval_0 ", ["Orange"]
+    @utils.expect :code_call_argument_loader, "mock_retval_1 ", [function]
+    @utils.expect :code_assign_argument_quickly, "mock_retval_2", ["cmock_call_instance->ReturnVal", function[:return]]
+    expected = ["void Orange_CMockExpectAndReturn(UNITY_LINE_TYPE cmock_line, int cmock_to_return)\n",
+                "{\n",
+                "mock_retval_0 ",
+                "mock_retval_1 ",
+                "mock_retval_2",
+                "}\n\n"
+               ].join
+    returned = @cmock_generator_plugin_expect.mock_interfaces(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock interfaces for functions of style 'int func(char* pescado)'" do
+    function = {:name => "Lemon", :args => [{ :type => "char*", :name => "pescado"}], :args_string => "char* pescado", :return => test_return[:int]}
+    @utils.expect :code_add_base_expectation, "mock_retval_0 ", ["Lemon"]
+    @utils.expect :code_call_argument_loader, "mock_retval_1 ", [function]
+    @utils.expect :code_assign_argument_quickly, "mock_retval_2", ["cmock_call_instance->ReturnVal", function[:return]]
+    expected = ["void Lemon_CMockExpectAndReturn(UNITY_LINE_TYPE cmock_line, char* pescado, int cmock_to_return)\n",
+                "{\n",
+                "mock_retval_0 ",
+                "mock_retval_1 ",
+                "mock_retval_2",
+                "}\n\n"
+               ].join
+    returned = @cmock_generator_plugin_expect.mock_interfaces(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock interfaces for functions when using ordering" do
+    function = {:name => "Pear", :args => [], :args_string => "void", :return => test_return[:void]}
+    @utils.expect :code_add_base_expectation, "mock_retval_0 ", ["Pear"]
+    @utils.expect :code_call_argument_loader, "mock_retval_1 ", [function]
+    expected = ["void Pear_CMockExpect(UNITY_LINE_TYPE cmock_line)\n",
+                "{\n",
+                "mock_retval_0 ",
+                "mock_retval_1 ",
+                "}\n\n"
+               ].join
+    @cmock_generator_plugin_expect.ordered = true
+    returned = @cmock_generator_plugin_expect.mock_interfaces(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock verify lines" do
+    function = {:name => "Banana" }
+    expected = "  if (CMOCK_GUTS_NONE != call_instance)\n" \
+               "  {\n" \
+               "    UNITY_SET_DETAIL(CMockString_Banana);\n" \
+               "    UNITY_TEST_FAIL(cmock_line, CMockStringCalledLess);\n" \
+               "  }\n"
+    returned = @cmock_generator_plugin_expect.mock_verify(function)
+    assert_equal(expected, returned)
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_plugin_expect_any_args_test.rb b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_plugin_expect_any_args_test.rb
new file mode 100644
index 000000000..5a014d6e3
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_plugin_expect_any_args_test.rb
@@ -0,0 +1,67 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+require File.expand_path(File.dirname(__FILE__)) + "/../test_helper"
+require File.expand_path(File.dirname(__FILE__)) + '/../../lib/cmock_generator_plugin_expect_any_args.rb'
+
+describe CMockGeneratorPluginExpectAnyArgs, "Verify CMockGeneratorPluginExpectAnyArgs Module" do
+
+  before do
+    create_mocks :config, :utils
+    @config = create_stub(:respond_to? => true)
+    @cmock_generator_plugin_expect_any_args = CMockGeneratorPluginExpectAnyArgs.new(@config, @utils)
+  end
+
+  after do
+  end
+
+  it "have set up internal priority" do
+    assert_equal(3, @cmock_generator_plugin_expect_any_args.priority)
+  end
+
+  it "not have any additional include file requirements" do
+    assert(!@cmock_generator_plugin_expect_any_args.respond_to?(:include_files))
+  end
+
+  it "ignore functions without arguments" do
+    function = {:name => "Mold", :args_string => "void", :args => [], :return => test_return[:void]}
+    expected = ""
+    returned = @cmock_generator_plugin_expect_any_args.mock_function_declarations(function)
+    assert_equal(expected, returned)
+  end
+
+  it "handle function declarations for functions without return values" do
+    function = {:name => "Mold", :args_string => "int meh", :args => [ :stuff ], :return => test_return[:void]}
+    expected = "#define Mold_ExpectAnyArgs() Mold_CMockExpectAnyArgs(__LINE__)\nvoid Mold_CMockExpectAnyArgs(UNITY_LINE_TYPE cmock_line);\n"
+    returned = @cmock_generator_plugin_expect_any_args.mock_function_declarations(function)
+    assert_equal(expected, returned)
+  end
+
+  it "handle function declarations for functions that returns something" do
+    function = {:name => "Fungus", :args_string => "int meh", :args => [ :stuff ], :return => test_return[:string]}
+    expected = "#define Fungus_ExpectAnyArgsAndReturn(cmock_retval) Fungus_CMockExpectAnyArgsAndReturn(__LINE__, cmock_retval)\n"+
+               "void Fungus_CMockExpectAnyArgsAndReturn(UNITY_LINE_TYPE cmock_line, const char* cmock_to_return);\n"
+    returned = @cmock_generator_plugin_expect_any_args.mock_function_declarations(function)
+    assert_equal(expected, returned)
+  end
+
+  it "should not respond to implementation requests" do
+    assert(!@cmock_generator_plugin_expect_any_args.respond_to?(:mock_implementation))
+  end
+
+  it "add a new mock interface for ignoring when function had no return value" do
+    function = {:name => "Slime",  :args_string => "int meh", :args => [ :stuff ], :return => test_return[:void]}
+    expected = ["void Slime_CMockExpectAnyArgs(UNITY_LINE_TYPE cmock_line)\n",
+                "{\n",
+                "mock_return_1",
+                "  cmock_call_instance->ExpectAnyArgsBool = (char)1;\n",
+                "}\n\n"
+               ].join
+    @utils.expect :code_add_base_expectation, "mock_return_1", ["Slime", true]
+    returned = @cmock_generator_plugin_expect_any_args.mock_interfaces(function)
+    assert_equal(expected, returned)
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_plugin_expect_b_test.rb b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_plugin_expect_b_test.rb
new file mode 100644
index 000000000..35d48715c
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_plugin_expect_b_test.rb
@@ -0,0 +1,201 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+require File.expand_path(File.dirname(__FILE__)) + "/../test_helper"
+require File.expand_path(File.dirname(__FILE__)) + '/../../lib/cmock_generator_plugin_expect'
+
+describe CMockGeneratorPluginExpect, "Verify CMockGeneratorPluginExpect Module with Global Ordering" do
+
+  before do
+    create_mocks :config, :utils
+
+    @config = create_stub(
+      :when_ptr => :compare_data,
+      :enforce_strict_ordering => true,
+      :respond_to? => true,
+      :plugins => [ :expect, :expect_any_args ] )
+
+    @utils.expect :helpers, {}
+    @cmock_generator_plugin_expect = CMockGeneratorPluginExpect.new(@config, @utils)
+  end
+
+  after do
+  end
+
+  it "have set up internal priority on init" do
+    assert_nil(@cmock_generator_plugin_expect.unity_helper)
+    assert_equal(5, @cmock_generator_plugin_expect.priority)
+  end
+
+  it "not include any additional include files" do
+    assert(!@cmock_generator_plugin_expect.respond_to?(:include_files))
+  end
+
+  it "add to typedef structure mock needs of functions of style 'void func(void)' and global ordering" do
+    function = {:name => "Oak", :args => [], :return => test_return[:void]}
+    expected = "  int CallOrder;\n"
+    returned = @cmock_generator_plugin_expect.instance_typedefs(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add to typedef structure mock needs of functions of style 'int func(void)'" do
+    function = {:name => "Elm", :args => [], :return => test_return[:int]}
+    expected = "  int ReturnVal;\n  int CallOrder;\n"
+    returned = @cmock_generator_plugin_expect.instance_typedefs(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add to typedef structure mock needs of functions of style 'void func(int chicken, char* pork)'" do
+    function = {:name => "Cedar", :args => [{ :name => "chicken", :type => "int"}, { :name => "pork", :type => "char*"}], :return => test_return[:void]}
+    expected = "  int CallOrder;\n  int Expected_chicken;\n  char* Expected_pork;\n"
+    returned = @cmock_generator_plugin_expect.instance_typedefs(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add to typedef structure mock needs of functions of style 'int func(float beef)'" do
+    function = {:name => "Birch", :args => [{ :name => "beef", :type => "float"}], :return => test_return[:int]}
+    expected = "  int ReturnVal;\n  int CallOrder;\n  float Expected_beef;\n"
+    returned = @cmock_generator_plugin_expect.instance_typedefs(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function declaration for functions of style 'void func(void)'" do
+    function = {:name => "Maple", :args => [], :return => test_return[:void]}
+    expected = "#define Maple_Expect() Maple_CMockExpect(__LINE__)\n" +
+               "void Maple_CMockExpect(UNITY_LINE_TYPE cmock_line);\n"
+    returned = @cmock_generator_plugin_expect.mock_function_declarations(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function declaration for functions of style 'int func(void)'" do
+    function = {:name => "Spruce", :args => [], :return => test_return[:int]}
+    expected = "#define Spruce_ExpectAndReturn(cmock_retval) Spruce_CMockExpectAndReturn(__LINE__, cmock_retval)\n" +
+               "void Spruce_CMockExpectAndReturn(UNITY_LINE_TYPE cmock_line, int cmock_to_return);\n"
+    returned = @cmock_generator_plugin_expect.mock_function_declarations(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function declaration for functions of style 'const char* func(int tofu)'" do
+    function = {:name => "Pine", :args => ["int tofu"], :args_string => "int tofu", :args_call => 'tofu', :return => test_return[:string]}
+    expected = "#define Pine_ExpectAndReturn(tofu, cmock_retval) Pine_CMockExpectAndReturn(__LINE__, tofu, cmock_retval)\n" +
+               "void Pine_CMockExpectAndReturn(UNITY_LINE_TYPE cmock_line, int tofu, const char* cmock_to_return);\n"
+    returned = @cmock_generator_plugin_expect.mock_function_declarations(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function implementation for functions of style 'void func(void)'" do
+    function = {:name => "Apple", :args => [], :return => test_return[:void]}
+    expected = ""
+    returned = @cmock_generator_plugin_expect.mock_implementation(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function implementation for functions of style 'int func(int veal, unsigned int sushi)'" do
+    function = {:name => "Cherry", :args => [ { :type => "int", :name => "veal" }, { :type => "unsigned int", :name => "sushi" } ], :return => test_return[:int]}
+
+    @utils.expect :code_verify_an_arg_expectation, "mocked_retval_1\n", [function, function[:args][0]]
+    @utils.expect :code_verify_an_arg_expectation, "mocked_retval_2\n", [function, function[:args][1]]
+    expected = "  if (!cmock_call_instance->ExpectAnyArgsBool)\n" +
+               "  {\n" +
+               "mocked_retval_1\n" +
+               "mocked_retval_2\n" +
+               "  }\n"
+    returned = @cmock_generator_plugin_expect.mock_implementation(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function implementation using ordering if needed" do
+    function = {:name => "Apple", :args => [], :return => test_return[:void]}
+    expected = ""
+    @cmock_generator_plugin_expect.ordered = true
+    returned = @cmock_generator_plugin_expect.mock_implementation(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function implementation for functions of style 'void func(int worm)' and strict ordering" do
+    function = {:name => "Apple", :args => [{ :type => "int", :name => "worm" }], :return => test_return[:void]}
+    @utils.expect :code_verify_an_arg_expectation, "mocked_retval_0\n", [function, function[:args][0]]
+    expected = "  if (!cmock_call_instance->ExpectAnyArgsBool)\n" +
+               "  {\n" +
+               "mocked_retval_0\n" +
+               "  }\n"
+    @cmock_generator_plugin_expect.ordered = true
+    returned = @cmock_generator_plugin_expect.mock_implementation(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock interfaces for functions of style 'void func(void)'" do
+    function = {:name => "Pear", :args => [], :args_string => "void", :return => test_return[:void]}
+    @utils.expect :code_add_base_expectation, "mock_retval_0\n", ["Pear"]
+    @utils.expect :code_call_argument_loader, "mock_retval_1\n", [function]
+    expected = ["void Pear_CMockExpect(UNITY_LINE_TYPE cmock_line)\n",
+                "{\n",
+                "mock_retval_0\n",
+                "mock_retval_1\n",
+                "}\n\n"
+               ].join
+    returned = @cmock_generator_plugin_expect.mock_interfaces(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock interfaces for functions of style 'int func(void)'" do
+    function = {:name => "Orange", :args => [], :args_string => "void", :return => test_return[:int]}
+    @utils.expect :code_add_base_expectation, "mock_retval_0\n", ["Orange"]
+    @utils.expect :code_call_argument_loader, "mock_retval_1\n", [function]
+    @utils.expect :code_assign_argument_quickly, "mock_retval_2\n", ["cmock_call_instance->ReturnVal", function[:return]]
+    expected = ["void Orange_CMockExpectAndReturn(UNITY_LINE_TYPE cmock_line, int cmock_to_return)\n",
+                "{\n",
+                "mock_retval_0\n",
+                "mock_retval_1\n",
+                "mock_retval_2\n",
+                "}\n\n"
+               ].join
+    returned = @cmock_generator_plugin_expect.mock_interfaces(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock interfaces for functions of style 'int func(char* pescado)'" do
+    function = {:name => "Lemon", :args => [{ :type => "char*", :name => "pescado"}], :args_string => "char* pescado", :return => test_return[:int]}
+    @utils.expect :code_add_base_expectation, "mock_retval_0\n", ["Lemon"]
+    @utils.expect :code_call_argument_loader, "mock_retval_1\n", [function]
+    @utils.expect :code_assign_argument_quickly, "mock_retval_2\n", ["cmock_call_instance->ReturnVal", function[:return]]
+    expected = ["void Lemon_CMockExpectAndReturn(UNITY_LINE_TYPE cmock_line, char* pescado, int cmock_to_return)\n",
+                "{\n",
+                "mock_retval_0\n",
+                "mock_retval_1\n",
+                "mock_retval_2\n",
+                "}\n\n"
+               ].join
+    returned = @cmock_generator_plugin_expect.mock_interfaces(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock interfaces for functions when using ordering" do
+    function = {:name => "Pear", :args => [], :args_string => "void", :return => test_return[:void]}
+    @utils.expect :code_add_base_expectation, "mock_retval_0\n", ["Pear"]
+    @utils.expect :code_call_argument_loader, "mock_retval_1\n", [function]
+    expected = ["void Pear_CMockExpect(UNITY_LINE_TYPE cmock_line)\n",
+                "{\n",
+                "mock_retval_0\n",
+                "mock_retval_1\n",
+                "}\n\n"
+               ].join
+    @cmock_generator_plugin_expect.ordered = true
+    returned = @cmock_generator_plugin_expect.mock_interfaces(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock verify lines" do
+    function = {:name => "Banana" }
+    expected = "  if (CMOCK_GUTS_NONE != call_instance)\n" \
+               "  {\n" \
+               "    UNITY_SET_DETAIL(CMockString_Banana);\n" \
+               "    UNITY_TEST_FAIL(cmock_line, CMockStringCalledLess);\n" \
+               "  }\n"
+    returned = @cmock_generator_plugin_expect.mock_verify(function)
+    assert_equal(expected, returned)
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_plugin_ignore_arg_test.rb b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_plugin_ignore_arg_test.rb
new file mode 100644
index 000000000..5fa18e8c1
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_plugin_ignore_arg_test.rb
@@ -0,0 +1,116 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+require File.expand_path(File.dirname(__FILE__)) + "/../test_helper"
+require File.expand_path(File.dirname(__FILE__)) + '/../../lib/cmock_generator_plugin_ignore_arg'
+
+describe CMockGeneratorPluginIgnoreArg, "Verify CMockGeneratorPluginIgnoreArg Module" do
+
+  before do
+    create_mocks :config, :utils
+
+    # int *Oak(void)"
+    @void_func = {:name => "Oak", :args => [], :return => test_return[:int_ptr]}
+
+    # void Pine(int chicken, const int beef, int *tofu)
+    @complex_func = {:name => "Pine",
+                     :args => [{ :type => "int",
+                                 :name => "chicken",
+                                 :ptr? => false,
+                               },
+                               { :type   => "const int*",
+                                 :name   => "beef",
+                                 :ptr?   => true,
+                                 :const? => true,
+                               },
+                               { :type => "int*",
+                                 :name => "tofu",
+                                 :ptr? => true,
+                               }],
+                     :return => test_return[:void],
+                     :contains_ptr? => true }
+
+    #no strict ordering
+    @cmock_generator_plugin_ignore_arg = CMockGeneratorPluginIgnoreArg.new(@config, @utils)
+  end
+
+  after do
+  end
+
+  it "have set up internal priority correctly on init" do
+    assert_equal(10,      @cmock_generator_plugin_ignore_arg.priority)
+  end
+
+  it "not include any additional include files" do
+    assert(!@cmock_generator_plugin_ignore_arg.respond_to?(:include_files))
+  end
+
+  it "not add to typedef structure for functions with no args" do
+    returned = @cmock_generator_plugin_ignore_arg.instance_typedefs(@void_func)
+    assert_equal("", returned)
+  end
+
+  it "add to tyepdef structure mock needs of functions of style 'void func(int chicken, int* pork)'" do
+    expected = "  char IgnoreArg_chicken;\n" +
+               "  char IgnoreArg_beef;\n" +
+               "  char IgnoreArg_tofu;\n"
+    returned = @cmock_generator_plugin_ignore_arg.instance_typedefs(@complex_func)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock function declarations for all arguments" do
+    expected =
+      "#define Pine_IgnoreArg_chicken()" +
+      " Pine_CMockIgnoreArg_chicken(__LINE__)\n" +
+      "void Pine_CMockIgnoreArg_chicken(UNITY_LINE_TYPE cmock_line);\n" +
+
+      "#define Pine_IgnoreArg_beef()" +
+      " Pine_CMockIgnoreArg_beef(__LINE__)\n" +
+      "void Pine_CMockIgnoreArg_beef(UNITY_LINE_TYPE cmock_line);\n" +
+
+      "#define Pine_IgnoreArg_tofu()" +
+      " Pine_CMockIgnoreArg_tofu(__LINE__)\n" +
+      "void Pine_CMockIgnoreArg_tofu(UNITY_LINE_TYPE cmock_line);\n"
+
+    returned = @cmock_generator_plugin_ignore_arg.mock_function_declarations(@complex_func)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock interfaces for all arguments" do
+    expected =
+      "void Pine_CMockIgnoreArg_chicken(UNITY_LINE_TYPE cmock_line)\n" +
+      "{\n" +
+      "  CMOCK_Pine_CALL_INSTANCE* cmock_call_instance = " +
+      "(CMOCK_Pine_CALL_INSTANCE*)CMock_Guts_GetAddressFor(CMock_Guts_MemEndOfChain(Mock.Pine_CallInstance));\n" +
+      "  UNITY_TEST_ASSERT_NOT_NULL(cmock_call_instance, cmock_line, CMockStringIgnPreExp);\n" +
+      "  cmock_call_instance->IgnoreArg_chicken = 1;\n" +
+      "}\n\n" +
+
+      "void Pine_CMockIgnoreArg_beef(UNITY_LINE_TYPE cmock_line)\n" +
+      "{\n" +
+      "  CMOCK_Pine_CALL_INSTANCE* cmock_call_instance = " +
+      "(CMOCK_Pine_CALL_INSTANCE*)CMock_Guts_GetAddressFor(CMock_Guts_MemEndOfChain(Mock.Pine_CallInstance));\n" +
+      "  UNITY_TEST_ASSERT_NOT_NULL(cmock_call_instance, cmock_line, CMockStringIgnPreExp);\n" +
+      "  cmock_call_instance->IgnoreArg_beef = 1;\n" +
+      "}\n\n" +
+
+      "void Pine_CMockIgnoreArg_tofu(UNITY_LINE_TYPE cmock_line)\n" +
+      "{\n" +
+      "  CMOCK_Pine_CALL_INSTANCE* cmock_call_instance = " +
+      "(CMOCK_Pine_CALL_INSTANCE*)CMock_Guts_GetAddressFor(CMock_Guts_MemEndOfChain(Mock.Pine_CallInstance));\n" +
+      "  UNITY_TEST_ASSERT_NOT_NULL(cmock_call_instance, cmock_line, CMockStringIgnPreExp);\n" +
+      "  cmock_call_instance->IgnoreArg_tofu = 1;\n" +
+      "}\n\n"
+
+    returned = @cmock_generator_plugin_ignore_arg.mock_interfaces(@complex_func).join("")
+    assert_equal(expected, returned)
+  end
+
+  it "not add a mock implementation" do
+    assert(!@cmock_generator_plugin_ignore_arg.respond_to?(:mock_implementation))
+  end
+
+end
diff --git a/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_plugin_ignore_test.rb b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_plugin_ignore_test.rb
new file mode 100644
index 000000000..c0c28b84d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_plugin_ignore_test.rb
@@ -0,0 +1,119 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+require File.expand_path(File.dirname(__FILE__)) + "/../test_helper"
+require File.expand_path(File.dirname(__FILE__)) + '/../../lib/cmock_generator_plugin_ignore'
+
+describe CMockGeneratorPluginIgnore, "Verify CMockGeneratorPluginIgnore Module" do
+
+  before do
+    create_mocks :config, :utils
+    @config = create_stub(:respond_to? => true)
+    @cmock_generator_plugin_ignore = CMockGeneratorPluginIgnore.new(@config, @utils)
+  end
+
+  after do
+  end
+
+  it "have set up internal priority" do
+    assert_equal(2, @cmock_generator_plugin_ignore.priority)
+  end
+
+  it "not have any additional include file requirements" do
+    assert(!@cmock_generator_plugin_ignore.respond_to?(:include_files))
+  end
+
+  it "add a required variable to the instance structure" do
+    function = {:name => "Grass", :args => [], :return => test_return[:void]}
+    expected = "  char Grass_IgnoreBool;\n"
+    returned = @cmock_generator_plugin_ignore.instance_structure(function)
+    assert_equal(expected, returned)
+  end
+
+  it "handle function declarations for functions without return values" do
+    function = {:name => "Mold", :args_string => "void", :return => test_return[:void]}
+    expected = "#define Mold_Ignore() Mold_CMockIgnore()\nvoid Mold_CMockIgnore(void);\n" +
+               "#define Mold_StopIgnore() Mold_CMockStopIgnore()\nvoid Mold_CMockStopIgnore(void);\n"
+    returned = @cmock_generator_plugin_ignore.mock_function_declarations(function)
+    assert_equal(expected, returned)
+  end
+
+  it "handle function declarations for functions that returns something" do
+    function = {:name => "Fungus", :args_string => "void", :return => test_return[:string]}
+    expected = "#define Fungus_IgnoreAndReturn(cmock_retval) Fungus_CMockIgnoreAndReturn(__LINE__, cmock_retval)\n"+
+               "void Fungus_CMockIgnoreAndReturn(UNITY_LINE_TYPE cmock_line, const char* cmock_to_return);\n" +
+               "#define Fungus_StopIgnore() Fungus_CMockStopIgnore()\n"+
+               "void Fungus_CMockStopIgnore(void);\n"
+    returned = @cmock_generator_plugin_ignore.mock_function_declarations(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add required code to implementation precheck with void function" do
+    function = {:name => "Mold", :args_string => "void", :return => test_return[:void]}
+    expected = ["  if (Mock.Mold_IgnoreBool)\n",
+                "  {\n",
+                "    UNITY_CLR_DETAILS();\n",
+                "    return;\n",
+                "  }\n"
+               ].join
+    returned = @cmock_generator_plugin_ignore.mock_implementation_precheck(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add required code to implementation precheck with return functions" do
+    function = {:name => "Fungus", :args_string => "void", :return => test_return[:int]}
+    retval = test_return[:int].merge({ :name => "cmock_call_instance->ReturnVal"})
+    @utils.expect :code_assign_argument_quickly, '  mock_retval_0', ["Mock.Fungus_FinalReturn", retval]
+    expected = ["  if (Mock.Fungus_IgnoreBool)\n",
+                "  {\n",
+                "    UNITY_CLR_DETAILS();\n",
+                "    if (cmock_call_instance == NULL)\n",
+                "      return Mock.Fungus_FinalReturn;\n",
+                "    mock_retval_0",
+                "    return cmock_call_instance->ReturnVal;\n",
+                "  }\n"
+               ].join
+    returned = @cmock_generator_plugin_ignore.mock_implementation_precheck(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add a new mock interface for ignoring when function had no return value" do
+    function = {:name => "Slime", :args => [], :args_string => "void", :return => test_return[:void]}
+    expected = ["void Slime_CMockIgnore(void)\n",
+                "{\n",
+                "  Mock.Slime_IgnoreBool = (char)1;\n",
+                "}\n\n",
+
+                "void Slime_CMockStopIgnore(void)\n",
+                "{\n",
+                "  Mock.Slime_IgnoreBool = (char)0;\n",
+                "}\n\n"
+               ].join
+    returned = @cmock_generator_plugin_ignore.mock_interfaces(function)
+    assert_equal(expected, returned)
+  end
+
+  it "add a new mock interface for ignoring when function has return value" do
+    function = {:name => "Slime", :args => [], :args_string => "void", :return => test_return[:int]}
+    @utils.expect :code_add_base_expectation, "mock_return_1", ["Slime", false]
+    expected = ["void Slime_CMockIgnoreAndReturn(UNITY_LINE_TYPE cmock_line, int cmock_to_return)\n",
+                "{\n",
+                "mock_return_1",
+                "  cmock_call_instance->ReturnVal = cmock_to_return;\n",
+                "  Mock.Slime_IgnoreBool = (char)1;\n",
+                "}\n\n",
+
+                "void Slime_CMockStopIgnore(void)\n{\n",
+                "  if(Mock.Slime_IgnoreBool)\n",
+                "    Mock.Slime_CallInstance = CMock_Guts_MemNext(Mock.Slime_CallInstance);\n",
+                "  Mock.Slime_IgnoreBool = (char)0;\n",
+                "}\n\n"
+               ].join
+    returned = @cmock_generator_plugin_ignore.mock_interfaces(function)
+    assert_equal(expected, returned)
+  end
+
+end
diff --git a/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_plugin_return_thru_ptr_test.rb b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_plugin_return_thru_ptr_test.rb
new file mode 100644
index 000000000..3c8b075da
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_plugin_return_thru_ptr_test.rb
@@ -0,0 +1,136 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+require File.expand_path(File.dirname(__FILE__)) + "/../test_helper"
+require File.expand_path(File.dirname(__FILE__)) + '/../../lib/cmock_generator_plugin_return_thru_ptr'
+
+describe CMockGeneratorPluginReturnThruPtr, "Verify CMockGeneratorPluginReturnThruPtr Module" do
+
+  before do
+    create_mocks :config, :utils
+
+    # int *Oak(void)"
+    @void_func = {:name => "Oak", :args => [], :return => test_return[:int_ptr]}
+
+    # char *Maple(int blah)
+    @simple_func = {:name => "Maple",
+                    :args => [{:name => "blah", :type => "int", :ptr? => false}],
+                    :return  => test_return[:string],
+                    :contains_ptr? => false}
+
+    # void Pine(int chicken, const int beef, int *tofu)
+    @complex_func = {:name => "Pine",
+                     :args => [{ :type => "int",
+                                 :name => "chicken",
+                                 :ptr? => false,
+                               },
+                               { :type   => "const int*",
+                                 :name   => "beef",
+                                 :ptr?   => true,
+                                 :const? => true,
+                               },
+                               { :type => "int*",
+                                 :name => "tofu",
+                                 :ptr? => true,
+                               }],
+                     :return => test_return[:void],
+                     :contains_ptr? => true }
+
+    #no strict ordering
+    @cmock_generator_plugin_return_thru_ptr = CMockGeneratorPluginReturnThruPtr.new(@config, @utils)
+  end
+
+  after do
+  end
+
+  def simple_func_expect
+    @utils.expect :ptr_or_str?, false, ['int']
+  end
+
+  def complex_func_expect
+    @utils.expect :ptr_or_str?, false, ['int']
+    @utils.expect :ptr_or_str?, true, ['const int*']
+    @utils.expect :ptr_or_str?, true, ['int*']
+  end
+
+  it "have set up internal priority correctly on init" do
+    assert_equal(9, @cmock_generator_plugin_return_thru_ptr.priority)
+  end
+
+  it "not include any additional include files" do
+    assert(!@cmock_generator_plugin_return_thru_ptr.respond_to?(:include_files))
+  end
+
+  it "not add to typedef structure for functions of style 'int* func(void)'" do
+    returned = @cmock_generator_plugin_return_thru_ptr.instance_typedefs(@void_func)
+    assert_equal("", returned)
+  end
+
+  it "add to tyepdef structure mock needs of functions of style 'void func(int chicken, int* pork)'" do
+    complex_func_expect()
+    expected = "  char ReturnThruPtr_tofu_Used;\n" +
+               "  int* ReturnThruPtr_tofu_Val;\n" +
+               "  int ReturnThruPtr_tofu_Size;\n"
+    returned = @cmock_generator_plugin_return_thru_ptr.instance_typedefs(@complex_func)
+    assert_equal(expected, returned)
+  end
+
+  it "not add an additional mock interface for functions not containing pointers" do
+    simple_func_expect()
+    returned = @cmock_generator_plugin_return_thru_ptr.mock_function_declarations(@simple_func)
+    assert_equal("", returned)
+  end
+
+  it "add a mock function declaration only for non-const pointer arguments" do
+    complex_func_expect();
+
+    expected =
+      "#define Pine_ReturnThruPtr_tofu(tofu)" +
+      " Pine_CMockReturnMemThruPtr_tofu(__LINE__, tofu, sizeof(int))\n" +
+      "#define Pine_ReturnArrayThruPtr_tofu(tofu, cmock_len)" +
+      " Pine_CMockReturnMemThruPtr_tofu(__LINE__, tofu, (int)(cmock_len * (int)sizeof(*tofu)))\n" +
+      "#define Pine_ReturnMemThruPtr_tofu(tofu, cmock_size)" +
+      " Pine_CMockReturnMemThruPtr_tofu(__LINE__, tofu, cmock_size)\n" +
+      "void Pine_CMockReturnMemThruPtr_tofu(UNITY_LINE_TYPE cmock_line, int* tofu, int cmock_size);\n"
+
+    returned = @cmock_generator_plugin_return_thru_ptr.mock_function_declarations(@complex_func)
+    assert_equal(expected, returned)
+  end
+
+  it "add mock interfaces only for non-const pointer arguments" do
+    complex_func_expect();
+
+    expected =
+      "void Pine_CMockReturnMemThruPtr_tofu(UNITY_LINE_TYPE cmock_line, int* tofu, int cmock_size)\n" +
+      "{\n" +
+      "  CMOCK_Pine_CALL_INSTANCE* cmock_call_instance = " +
+      "(CMOCK_Pine_CALL_INSTANCE*)CMock_Guts_GetAddressFor(CMock_Guts_MemEndOfChain(Mock.Pine_CallInstance));\n" +
+      "  UNITY_TEST_ASSERT_NOT_NULL(cmock_call_instance, cmock_line, CMockStringPtrPreExp);\n" +
+      "  cmock_call_instance->ReturnThruPtr_tofu_Used = 1;\n" +
+      "  cmock_call_instance->ReturnThruPtr_tofu_Val = tofu;\n" +
+      "  cmock_call_instance->ReturnThruPtr_tofu_Size = cmock_size;\n" +
+      "}\n\n"
+
+    returned = @cmock_generator_plugin_return_thru_ptr.mock_interfaces(@complex_func).join("")
+    assert_equal(expected, returned)
+  end
+
+  it "add mock implementations only for non-const pointer arguments" do
+    complex_func_expect()
+
+    expected =
+      "  if (cmock_call_instance->ReturnThruPtr_tofu_Used)\n" +
+      "  {\n" +
+      "    UNITY_TEST_ASSERT_NOT_NULL(tofu, cmock_line, CMockStringPtrIsNULL);\n" +
+      "    memcpy((void*)tofu, (void*)cmock_call_instance->ReturnThruPtr_tofu_Val,\n" +
+      "      cmock_call_instance->ReturnThruPtr_tofu_Size);\n" +
+      "  }\n"
+
+    returned = @cmock_generator_plugin_return_thru_ptr.mock_implementation(@complex_func).join("")
+    assert_equal(expected, returned)
+  end
+
+end
diff --git a/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_utils_test.rb b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_utils_test.rb
new file mode 100644
index 000000000..ab9df2a2c
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_generator_utils_test.rb
@@ -0,0 +1,398 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+require File.expand_path(File.dirname(__FILE__)) + "/../test_helper"
+require File.expand_path(File.dirname(__FILE__)) + '/../../lib/cmock_generator_utils'
+
+describe CMockGeneratorUtils, "Verify CMockGeneratorUtils Module" do
+
+  before do
+    create_mocks :config, :unity_helper, :unity_helper
+
+    @config.expect :when_ptr, :compare_ptr
+    @config.expect :enforce_strict_ordering, false
+    @config.expect :plugins, []
+    @config.expect :plugins, []
+    @config.expect :plugins, []
+    @config.expect :plugins, []
+    @config.expect :plugins, []
+    @config.expect :plugins, []
+    @config.expect :treat_as, {'int' => 'INT','short' => 'INT16','long' => 'INT','char' => 'INT8','const char*' => 'STRING'}
+    @cmock_generator_utils_simple = CMockGeneratorUtils.new(@config, {:unity_helper => @unity_helper})
+
+    @config.expect :when_ptr, :smart
+    @config.expect :enforce_strict_ordering, true
+    @config.expect :plugins, [:array, :cexception, :return_thru_ptr, :ignore_arg, :ignore]
+    @config.expect :plugins, [:array, :cexception, :return_thru_ptr, :ignore_arg, :ignore]
+    @config.expect :plugins, [:array, :cexception, :return_thru_ptr, :ignore_arg, :ignore]
+    @config.expect :plugins, [:array, :cexception, :return_thru_ptr, :ignore_arg, :ignore]
+    @config.expect :plugins, [:array, :cexception, :return_thru_ptr, :ignore_arg, :ignore]
+    @config.expect :plugins, [:array, :cexception, :return_thru_ptr, :ignore_arg, :ignore]
+    @config.expect :treat_as, {'int' => 'INT','short' => 'INT16','long' => 'INT','char' => 'INT8','uint32_t' => 'HEX32','const char*' => 'STRING'}
+    @cmock_generator_utils_complex = CMockGeneratorUtils.new(@config, {:unity_helper => @unity_helper, :A=>1, :B=>2})
+  end
+
+  after do
+  end
+
+  it "have set up internal accessors correctly on init" do
+    assert_equal(false,   @cmock_generator_utils_simple.arrays)
+    assert_equal(false,   @cmock_generator_utils_simple.cexception)
+  end
+
+  it "have set up internal accessors correctly on init, complete with passed helpers" do
+    assert_equal(true, @cmock_generator_utils_complex.arrays)
+    assert_equal(true, @cmock_generator_utils_complex.cexception)
+  end
+
+  it "detect pointers and strings" do
+    assert_equal(false, @cmock_generator_utils_simple.ptr_or_str?('int'))
+    assert_equal(true, @cmock_generator_utils_simple.ptr_or_str?('int*'))
+    assert_equal(true, @cmock_generator_utils_simple.ptr_or_str?('char*'))
+  end
+
+  it "add code for a base expectation with no plugins" do
+    expected =
+      "  CMOCK_MEM_INDEX_TYPE cmock_guts_index = CMock_Guts_MemNew(sizeof(CMOCK_Apple_CALL_INSTANCE));\n" +
+      "  CMOCK_Apple_CALL_INSTANCE* cmock_call_instance = (CMOCK_Apple_CALL_INSTANCE*)CMock_Guts_GetAddressFor(cmock_guts_index);\n" +
+      "  UNITY_TEST_ASSERT_NOT_NULL(cmock_call_instance, cmock_line, CMockStringOutOfMemory);\n" +
+      "  memset(cmock_call_instance, 0, sizeof(*cmock_call_instance));\n" +
+      "  Mock.Apple_CallInstance = CMock_Guts_MemChain(Mock.Apple_CallInstance, cmock_guts_index);\n" +
+      "  cmock_call_instance->LineNumber = cmock_line;\n"
+    output = @cmock_generator_utils_simple.code_add_base_expectation("Apple")
+    assert_equal(expected, output)
+  end
+
+  it "add code for a base expectation with all plugins" do
+    expected =
+      "  CMOCK_MEM_INDEX_TYPE cmock_guts_index = CMock_Guts_MemNew(sizeof(CMOCK_Apple_CALL_INSTANCE));\n" +
+      "  CMOCK_Apple_CALL_INSTANCE* cmock_call_instance = (CMOCK_Apple_CALL_INSTANCE*)CMock_Guts_GetAddressFor(cmock_guts_index);\n" +
+      "  UNITY_TEST_ASSERT_NOT_NULL(cmock_call_instance, cmock_line, CMockStringOutOfMemory);\n" +
+      "  memset(cmock_call_instance, 0, sizeof(*cmock_call_instance));\n" +
+      "  Mock.Apple_CallInstance = CMock_Guts_MemChain(Mock.Apple_CallInstance, cmock_guts_index);\n" +
+      "  Mock.Apple_IgnoreBool = (char)0;\n" +
+      "  cmock_call_instance->LineNumber = cmock_line;\n" +
+      "  cmock_call_instance->CallOrder = ++GlobalExpectCount;\n" +
+      "  cmock_call_instance->ExceptionToThrow = CEXCEPTION_NONE;\n"
+    output = @cmock_generator_utils_complex.code_add_base_expectation("Apple", true)
+    assert_equal(expected, output)
+  end
+
+  it "add code for a base expectation with all plugins and ordering not supported" do
+    expected =
+      "  CMOCK_MEM_INDEX_TYPE cmock_guts_index = CMock_Guts_MemNew(sizeof(CMOCK_Apple_CALL_INSTANCE));\n" +
+      "  CMOCK_Apple_CALL_INSTANCE* cmock_call_instance = (CMOCK_Apple_CALL_INSTANCE*)CMock_Guts_GetAddressFor(cmock_guts_index);\n" +
+      "  UNITY_TEST_ASSERT_NOT_NULL(cmock_call_instance, cmock_line, CMockStringOutOfMemory);\n" +
+      "  memset(cmock_call_instance, 0, sizeof(*cmock_call_instance));\n" +
+      "  Mock.Apple_CallInstance = CMock_Guts_MemChain(Mock.Apple_CallInstance, cmock_guts_index);\n" +
+      "  Mock.Apple_IgnoreBool = (char)0;\n" +
+      "  cmock_call_instance->LineNumber = cmock_line;\n" +
+      "  cmock_call_instance->ExceptionToThrow = CEXCEPTION_NONE;\n"
+    output = @cmock_generator_utils_complex.code_add_base_expectation("Apple", false)
+    assert_equal(expected, output)
+  end
+
+  it "add argument expectations for values when no array plugin" do
+    arg1 = { :name => "Orange", :const? => false, :type => 'int', :ptr? => false }
+    expected1 = "  cmock_call_instance->Expected_Orange = Orange;\n"
+
+    arg2 = { :name => "Lemon", :const? => true, :type => 'const char*', :ptr? => false }
+    expected2 = "  cmock_call_instance->Expected_Lemon = Lemon;\n"
+
+    arg3 = { :name => "Kiwi", :const? => false, :type => 'KIWI_T*', :ptr? => true }
+    expected3 = "  cmock_call_instance->Expected_Kiwi = Kiwi;\n"
+
+    arg4 = { :name => "Lime", :const? => false, :type => 'LIME_T', :ptr? => false }
+    expected4 = "  memcpy((void*)(&cmock_call_instance->Expected_Lime), (void*)(&Lime),\n" +
+                "         sizeof(LIME_T[sizeof(Lime) == sizeof(LIME_T) ? 1 : -1])); /* add LIME_T to :treat_as_array if this causes an error */\n"
+
+    assert_equal(expected1, @cmock_generator_utils_simple.code_add_an_arg_expectation(arg1))
+    assert_equal(expected2, @cmock_generator_utils_simple.code_add_an_arg_expectation(arg2))
+    assert_equal(expected3, @cmock_generator_utils_simple.code_add_an_arg_expectation(arg3))
+    assert_equal(expected4, @cmock_generator_utils_simple.code_add_an_arg_expectation(arg4))
+  end
+
+  it "add argument expectations for values when array plugin enabled" do
+    arg1 = { :name => "Orange", :const? => false, :type => 'int', :ptr? => false }
+    expected1 = "  cmock_call_instance->Expected_Orange = Orange;\n" +
+                "  cmock_call_instance->IgnoreArg_Orange = 0;\n"
+
+    arg2 = { :name => "Lemon", :const? => true, :type => 'const char*', :ptr? => false }
+    expected2 = "  cmock_call_instance->Expected_Lemon = Lemon;\n" +
+                "  cmock_call_instance->Expected_Lemon_Depth = Lemon_Depth;\n" +
+                "  cmock_call_instance->IgnoreArg_Lemon = 0;\n"
+
+    arg3 = { :name => "Kiwi", :const? => false, :type => 'KIWI_T*', :ptr? => true }
+    expected3 = "  cmock_call_instance->Expected_Kiwi = Kiwi;\n" +
+                "  cmock_call_instance->Expected_Kiwi_Depth = Kiwi_Depth;\n" +
+                "  cmock_call_instance->IgnoreArg_Kiwi = 0;\n" +
+                "  cmock_call_instance->ReturnThruPtr_Kiwi_Used = 0;\n"
+
+    arg4 = { :name => "Lime", :const? => false, :type => 'LIME_T', :ptr? => false }
+    expected4 = "  memcpy((void*)(&cmock_call_instance->Expected_Lime), (void*)(&Lime),\n" +
+                "         sizeof(LIME_T[sizeof(Lime) == sizeof(LIME_T) ? 1 : -1])); /* add LIME_T to :treat_as_array if this causes an error */\n" +
+                "  cmock_call_instance->IgnoreArg_Lime = 0;\n"
+
+    assert_equal(expected1, @cmock_generator_utils_complex.code_add_an_arg_expectation(arg1))
+    assert_equal(expected2, @cmock_generator_utils_complex.code_add_an_arg_expectation(arg2, 'Lemon_Depth'))
+    assert_equal(expected3, @cmock_generator_utils_complex.code_add_an_arg_expectation(arg3, 'Lemon_Depth'))
+    assert_equal(expected4, @cmock_generator_utils_complex.code_add_an_arg_expectation(arg4))
+  end
+
+  it 'not have an argument loader when the function has no arguments' do
+    function = { :name => "Melon", :args_string => "void" }
+
+    assert_equal("", @cmock_generator_utils_complex.code_add_argument_loader(function))
+  end
+
+  it 'create an argument loader when the function has arguments' do
+    function = { :name => "Melon",
+                 :args_string => "stuff",
+                 :args => [test_arg[:int_ptr], test_arg[:mytype], test_arg[:string]]
+    }
+    expected = "void CMockExpectParameters_Melon(CMOCK_Melon_CALL_INSTANCE* cmock_call_instance, stuff)\n{\n" +
+               "  cmock_call_instance->Expected_MyIntPtr = MyIntPtr;\n" +
+               "  memcpy((void*)(&cmock_call_instance->Expected_MyMyType), (void*)(&MyMyType),\n" +
+               "         sizeof(MY_TYPE[sizeof(MyMyType) == sizeof(MY_TYPE) ? 1 : -1])); /* add MY_TYPE to :treat_as_array if this causes an error */\n" +
+               "  cmock_call_instance->Expected_MyStr = MyStr;\n" +
+               "}\n\n"
+    assert_equal(expected, @cmock_generator_utils_simple.code_add_argument_loader(function))
+  end
+
+  it 'create an argument loader when the function has arguments supporting arrays' do
+    function = { :name => "Melon",
+                 :args_string => "stuff",
+                 :args => [test_arg[:int_ptr], test_arg[:mytype], test_arg[:string]]
+    }
+    expected = "void CMockExpectParameters_Melon(CMOCK_Melon_CALL_INSTANCE* cmock_call_instance, int* MyIntPtr, int MyIntPtr_Depth, const MY_TYPE MyMyType, const char* MyStr)\n{\n" +
+               "  cmock_call_instance->Expected_MyIntPtr = MyIntPtr;\n" +
+               "  cmock_call_instance->Expected_MyIntPtr_Depth = MyIntPtr_Depth;\n" +
+               "  cmock_call_instance->IgnoreArg_MyIntPtr = 0;\n" +
+               "  cmock_call_instance->ReturnThruPtr_MyIntPtr_Used = 0;\n" +
+               "  memcpy((void*)(&cmock_call_instance->Expected_MyMyType), (void*)(&MyMyType),\n" +
+               "         sizeof(MY_TYPE[sizeof(MyMyType) == sizeof(MY_TYPE) ? 1 : -1])); /* add MY_TYPE to :treat_as_array if this causes an error */\n" +
+               "  cmock_call_instance->IgnoreArg_MyMyType = 0;\n" +
+               "  cmock_call_instance->Expected_MyStr = MyStr;\n" +
+               "  cmock_call_instance->IgnoreArg_MyStr = 0;\n" +
+               "}\n\n"
+    assert_equal(expected, @cmock_generator_utils_complex.code_add_argument_loader(function))
+  end
+
+  it 'create an argument loader when the function has pointer arguments supporting arrays' do
+    function = { :name => "Melon",
+                 :args_string => "stuff",
+                 :args => [test_arg[:const_ptr], test_arg[:double_ptr]]
+    }
+    expected = "void CMockExpectParameters_Melon(CMOCK_Melon_CALL_INSTANCE* cmock_call_instance, int* const MyConstPtr, int MyConstPtr_Depth, int const** MyDoublePtr, int MyDoublePtr_Depth)\n{\n" +
+               "  cmock_call_instance->Expected_MyConstPtr = MyConstPtr;\n" +
+               "  cmock_call_instance->Expected_MyConstPtr_Depth = MyConstPtr_Depth;\n" +
+               "  cmock_call_instance->IgnoreArg_MyConstPtr = 0;\n" +
+               "  cmock_call_instance->ReturnThruPtr_MyConstPtr_Used = 0;\n" +
+               "  cmock_call_instance->Expected_MyDoublePtr = MyDoublePtr;\n" +
+               "  cmock_call_instance->Expected_MyDoublePtr_Depth = MyDoublePtr_Depth;\n" +
+               "  cmock_call_instance->IgnoreArg_MyDoublePtr = 0;\n" +
+               "}\n\n"
+    assert_equal(expected, @cmock_generator_utils_complex.code_add_argument_loader(function))
+  end
+
+  it "not call argument loader if there are no arguments to actually use for this function" do
+    function = { :name => "Pineapple", :args_string => "void" }
+
+    assert_equal("", @cmock_generator_utils_complex.code_call_argument_loader(function))
+  end
+
+  it 'call an argument loader when the function has arguments' do
+    function = { :name => "Pineapple",
+                 :args_string => "stuff",
+                 :args => [test_arg[:int_ptr], test_arg[:mytype], test_arg[:string]]
+    }
+    expected = "  CMockExpectParameters_Pineapple(cmock_call_instance, MyIntPtr, MyMyType, MyStr);\n"
+    assert_equal(expected, @cmock_generator_utils_simple.code_call_argument_loader(function))
+  end
+
+  it 'call an argument loader when the function has arguments with arrays' do
+    function = { :name => "Pineapple",
+                 :args_string => "stuff",
+                 :args => [test_arg[:int_ptr], test_arg[:mytype], test_arg[:string]]
+    }
+    expected = "  CMockExpectParameters_Pineapple(cmock_call_instance, MyIntPtr, 1, MyMyType, MyStr);\n"
+    assert_equal(expected, @cmock_generator_utils_complex.code_call_argument_loader(function))
+  end
+
+  it 'handle a simple assert when requested' do
+    function = { :name => 'Pear' }
+    arg      = test_arg[:int]
+    expected = "  {\n" +
+               "    UNITY_SET_DETAILS(CMockString_Pear,CMockString_MyInt);\n" +
+               "    UNITY_TEST_ASSERT_EQUAL_INT(cmock_call_instance->Expected_MyInt, MyInt, cmock_line, CMockStringMismatch);\n" +
+               "  }\n"
+    @unity_helper.expect :nil?, false
+    @unity_helper.expect :get_helper, ['UNITY_TEST_ASSERT_EQUAL_INT', ''],  ['int']
+    assert_equal(expected, @cmock_generator_utils_simple.code_verify_an_arg_expectation(function, arg))
+  end
+
+  it 'handle a pointer comparison when configured to do so' do
+    function = { :name => 'Pear' }
+    arg      = test_arg[:int_ptr]
+    expected = "  {\n" +
+               "    UNITY_SET_DETAILS(CMockString_Pear,CMockString_MyIntPtr);\n" +
+               "    UNITY_TEST_ASSERT_EQUAL_PTR(cmock_call_instance->Expected_MyIntPtr, MyIntPtr, cmock_line, CMockStringMismatch);\n" +
+               "  }\n"
+    assert_equal(expected, @cmock_generator_utils_simple.code_verify_an_arg_expectation(function, arg))
+  end
+
+  it 'handle const char as string compares ' do
+    function = { :name => 'Pear' }
+    arg      = test_arg[:string]
+    expected = "  {\n" +
+               "    UNITY_SET_DETAILS(CMockString_Pear,CMockString_MyStr);\n" +
+               "    UNITY_TEST_ASSERT_EQUAL_STRING(cmock_call_instance->Expected_MyStr, MyStr, cmock_line, CMockStringMismatch);\n" +
+               "  }\n"
+    @unity_helper.expect :nil?, false
+    @unity_helper.expect :get_helper, ['UNITY_TEST_ASSERT_EQUAL_STRING',''], ['const char*']
+    assert_equal(expected, @cmock_generator_utils_simple.code_verify_an_arg_expectation(function, arg))
+  end
+
+  it 'handle custom types as memory compares when we have no better way to do it' do
+    function = { :name => 'Pear' }
+    arg      = test_arg[:mytype]
+    expected = "  {\n" +
+               "    UNITY_SET_DETAILS(CMockString_Pear,CMockString_MyMyType);\n" +
+               "    UNITY_TEST_ASSERT_EQUAL_MEMORY((void*)(&cmock_call_instance->Expected_MyMyType), (void*)(&MyMyType), sizeof(MY_TYPE), cmock_line, CMockStringMismatch);\n" +
+               "  }\n"
+    @unity_helper.expect :nil?, false
+    @unity_helper.expect :get_helper, ['UNITY_TEST_ASSERT_EQUAL_MEMORY','&'], ['MY_TYPE']
+    assert_equal(expected, @cmock_generator_utils_simple.code_verify_an_arg_expectation(function, arg))
+  end
+
+  it 'handle custom types with custom handlers when available, even if they do not support the extra message' do
+    function = { :name => 'Pear' }
+    arg      = test_arg[:mytype]
+    expected = "  {\n" +
+               "    UNITY_SET_DETAILS(CMockString_Pear,CMockString_MyMyType);\n" +
+               "    UNITY_TEST_ASSERT_EQUAL_MY_TYPE(cmock_call_instance->Expected_MyMyType, MyMyType, cmock_line, CMockStringMismatch);\n" +
+               "  }\n"
+    @unity_helper.expect :nil?, false
+    @unity_helper.expect :get_helper, ['UNITY_TEST_ASSERT_EQUAL_MY_TYPE',''], ['MY_TYPE']
+    assert_equal(expected, @cmock_generator_utils_simple.code_verify_an_arg_expectation(function, arg))
+  end
+
+  it 'handle pointers to custom types with array handlers, even if the array extension is turned off' do
+    function = { :name => 'Pear' }
+    arg      = test_arg[:mytype]
+    expected = "  {\n" +
+               "    UNITY_SET_DETAILS(CMockString_Pear,CMockString_MyMyType);\n" +
+               "    UNITY_TEST_ASSERT_EQUAL_MY_TYPE_ARRAY(&cmock_call_instance->Expected_MyMyType, &MyMyType, 1, cmock_line, CMockStringMismatch);\n" +
+               "  }\n"
+    @unity_helper.expect :nil?, false
+    @unity_helper.expect :get_helper, ['UNITY_TEST_ASSERT_EQUAL_MY_TYPE_ARRAY','&'], ['MY_TYPE']
+    assert_equal(expected, @cmock_generator_utils_simple.code_verify_an_arg_expectation(function, arg))
+  end
+
+  it 'handle a simple assert when requested with array plugin enabled' do
+    function = { :name => 'Pear' }
+    arg      = test_arg[:int]
+    expected = "  if (!cmock_call_instance->IgnoreArg_MyInt)\n" +
+               "  {\n" +
+               "    UNITY_SET_DETAILS(CMockString_Pear,CMockString_MyInt);\n" +
+               "    UNITY_TEST_ASSERT_EQUAL_INT(cmock_call_instance->Expected_MyInt, MyInt, cmock_line, CMockStringMismatch);\n" +
+               "  }\n"
+    @unity_helper.expect :nil?, false
+    @unity_helper.expect :get_helper, ['UNITY_TEST_ASSERT_EQUAL_INT',''], ['int']
+    assert_equal(expected, @cmock_generator_utils_complex.code_verify_an_arg_expectation(function, arg))
+  end
+
+  it 'handle an array comparison with array plugin enabled' do
+    function = { :name => 'Pear' }
+    arg      = test_arg[:int_ptr]
+    expected = "  if (!cmock_call_instance->IgnoreArg_MyIntPtr)\n" +
+               "  {\n" +
+               "    UNITY_SET_DETAILS(CMockString_Pear,CMockString_MyIntPtr);\n" +
+               "    if (cmock_call_instance->Expected_MyIntPtr == NULL)\n" +
+               "      { UNITY_TEST_ASSERT_NULL(MyIntPtr, cmock_line, CMockStringExpNULL); }\n" +
+               "    else if (cmock_call_instance->Expected_MyIntPtr_Depth == 0)\n" +
+               "      { UNITY_TEST_ASSERT_EQUAL_PTR(cmock_call_instance->Expected_MyIntPtr, MyIntPtr, cmock_line, CMockStringMismatch); }\n" +
+               "    else\n" +
+               "      { UNITY_TEST_ASSERT_EQUAL_INT_ARRAY(cmock_call_instance->Expected_MyIntPtr, MyIntPtr, cmock_call_instance->Expected_MyIntPtr_Depth, cmock_line, CMockStringMismatch); }\n" +
+               "  }\n"
+    @unity_helper.expect :nil?, false
+    @unity_helper.expect :get_helper, ['UNITY_TEST_ASSERT_EQUAL_INT_ARRAY',''], ['int*']
+    assert_equal(expected, @cmock_generator_utils_complex.code_verify_an_arg_expectation(function, arg))
+  end
+
+  it 'handle const char as string compares with array plugin enabled' do
+    function = { :name => 'Pear' }
+    arg      = test_arg[:string]
+    expected = "  if (!cmock_call_instance->IgnoreArg_MyStr)\n" +
+               "  {\n" +
+               "    UNITY_SET_DETAILS(CMockString_Pear,CMockString_MyStr);\n" +
+               "    UNITY_TEST_ASSERT_EQUAL_STRING(cmock_call_instance->Expected_MyStr, MyStr, cmock_line, CMockStringMismatch);\n" +
+               "  }\n"
+    @unity_helper.expect :nil?, false
+    @unity_helper.expect :get_helper, ['UNITY_TEST_ASSERT_EQUAL_STRING',''], ['const char*']
+    assert_equal(expected, @cmock_generator_utils_complex.code_verify_an_arg_expectation(function, arg))
+  end
+
+  it 'handle custom types as memory compares when we have no better way to do it with array plugin enabled' do
+    function = { :name => 'Pear' }
+    arg      = test_arg[:mytype]
+    expected = "  if (!cmock_call_instance->IgnoreArg_MyMyType)\n" +
+               "  {\n" +
+               "    UNITY_SET_DETAILS(CMockString_Pear,CMockString_MyMyType);\n" +
+               "    if (cmock_call_instance->Expected_MyMyType == NULL)\n" +
+               "      { UNITY_TEST_ASSERT_NULL(MyMyType, cmock_line, CMockStringExpNULL); }\n" +
+               "    else\n" +
+               "      { UNITY_TEST_ASSERT_EQUAL_MEMORY_ARRAY((void*)(cmock_call_instance->Expected_MyMyType), (void*)(MyMyType), sizeof(MY_TYPE), 1, cmock_line, CMockStringMismatch); }\n" +
+               "  }\n"
+    @unity_helper.expect :nil?, false
+    @unity_helper.expect :get_helper, ['UNITY_TEST_ASSERT_EQUAL_MEMORY_ARRAY', ''],  ['MY_TYPE']
+    assert_equal(expected, @cmock_generator_utils_complex.code_verify_an_arg_expectation(function, arg))
+  end
+
+  it 'handle custom types with custom handlers when available, even if they do not support the extra message with array plugin enabled' do
+    function = { :name => 'Pear' }
+    arg      = test_arg[:mytype]
+    expected = "  if (!cmock_call_instance->IgnoreArg_MyMyType)\n" +
+               "  {\n" +
+               "    UNITY_SET_DETAILS(CMockString_Pear,CMockString_MyMyType);\n" +
+               "    UNITY_TEST_ASSERT_EQUAL_MY_TYPE(cmock_call_instance->Expected_MyMyType, MyMyType, cmock_line, CMockStringMismatch);\n" +
+               "  }\n"
+    @unity_helper.expect :nil?, false
+    @unity_helper.expect :get_helper, ['UNITY_TEST_ASSERT_EQUAL_MY_TYPE',  ''], ['MY_TYPE']
+    assert_equal(expected, @cmock_generator_utils_complex.code_verify_an_arg_expectation(function, arg))
+  end
+
+  it 'handle custom types with array handlers when array plugin is enabled' do
+    function = { :name => 'Pear' }
+    arg      = test_arg[:mytype_ptr]
+    expected = "  if (!cmock_call_instance->IgnoreArg_MyMyTypePtr)\n" +
+               "  {\n" +
+               "    UNITY_SET_DETAILS(CMockString_Pear,CMockString_MyMyTypePtr);\n" +
+               "    if (cmock_call_instance->Expected_MyMyTypePtr == NULL)\n" +
+               "      { UNITY_TEST_ASSERT_NULL(MyMyTypePtr, cmock_line, CMockStringExpNULL); }\n" +
+               "    else if (cmock_call_instance->Expected_MyMyTypePtr_Depth == 0)\n" +
+               "      { UNITY_TEST_ASSERT_EQUAL_PTR(cmock_call_instance->Expected_MyMyTypePtr, MyMyTypePtr, cmock_line, CMockStringMismatch); }\n" +
+               "    else\n" +
+               "      { UNITY_TEST_ASSERT_EQUAL_MY_TYPE_ARRAY(cmock_call_instance->Expected_MyMyTypePtr, MyMyTypePtr, cmock_call_instance->Expected_MyMyTypePtr_Depth, cmock_line, CMockStringMismatch); }\n" +
+               "  }\n"
+    @unity_helper.expect :nil?, false
+    @unity_helper.expect :get_helper, ['UNITY_TEST_ASSERT_EQUAL_MY_TYPE_ARRAY', ''], ['MY_TYPE*']
+    assert_equal(expected, @cmock_generator_utils_complex.code_verify_an_arg_expectation(function, arg))
+  end
+
+  it 'handle custom types with array handlers when array plugin is enabled for non-array types' do
+    function = { :name => 'Pear' }
+    arg      = test_arg[:mytype]
+    expected = "  if (!cmock_call_instance->IgnoreArg_MyMyType)\n" +
+               "  {\n" +
+               "    UNITY_SET_DETAILS(CMockString_Pear,CMockString_MyMyType);\n" +
+               "    UNITY_TEST_ASSERT_EQUAL_MY_TYPE_ARRAY(&cmock_call_instance->Expected_MyMyType, &MyMyType, 1, cmock_line, CMockStringMismatch);\n" +
+               "  }\n"
+    @unity_helper.expect :nil?, false
+    @unity_helper.expect :get_helper, ['UNITY_TEST_ASSERT_EQUAL_MY_TYPE_ARRAY', '&'], ['MY_TYPE']
+    assert_equal(expected, @cmock_generator_utils_complex.code_verify_an_arg_expectation(function, arg))
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/test/unit/cmock_header_parser_test.rb b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_header_parser_test.rb
new file mode 100644
index 000000000..5d5d2fcca
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_header_parser_test.rb
@@ -0,0 +1,2717 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+$ThisIsOnlyATest = true
+
+require File.expand_path(File.dirname(__FILE__)) + "/../test_helper"
+require File.expand_path(File.dirname(__FILE__)) + '/../../lib/cmock_header_parser'
+
+describe CMockHeaderParser, "Verify CMockHeaderParser Module" do
+
+  before do
+    create_mocks :config
+    @test_name = 'test_file.h'
+    @config.expect :strippables, ["STRIPPABLE"]
+    @config.expect :attributes, ['__ramfunc', 'funky_attrib', 'SQLITE_API']
+    @config.expect :c_calling_conventions, ['__stdcall']
+    @config.expect :treat_as_void, ['MY_FUNKY_VOID']
+    @config.expect :treat_as, { "BANJOS" => "INT", "TUBAS" => "HEX16"}
+    @config.expect :treat_as_array, {"IntArray" => "int", "Book" => "Page"}
+    @config.expect :when_no_prototypes, :error
+    @config.expect :verbosity, 1
+    @config.expect :treat_externs, :exclude
+    @config.expect :treat_inlines, :exclude
+    @config.expect :inline_function_patterns, ['(static\s+inline|inline\s+static)\s*', '(\bstatic\b|\binline\b)\s*']
+    @config.expect :array_size_type, ['int', 'size_t']
+    @config.expect :array_size_name, 'size|len'
+
+    @parser = CMockHeaderParser.new(@config)
+  end
+
+  after do
+  end
+
+  it "create and initialize variables to defaults appropriately" do
+    assert_equal([], @parser.funcs)
+    assert_equal(['const', '__ramfunc', 'funky_attrib', 'SQLITE_API'], @parser.c_attributes)
+    assert_equal(['void','MY_FUNKY_VOID'], @parser.treat_as_void)
+  end
+
+  it "strip out line comments" do
+    source =
+      " abcd;\n" +
+      "// hello;\n" +
+      "who // is you\n"
+
+    expected =
+    [
+      "abcd",
+      "who"
+    ]
+
+    assert_equal(expected, @parser.import_source(source).map!{|s|s.strip})
+  end
+
+  it "remove block comments" do
+    source =
+      " no_comments;\n" +
+      "// basic_line_comment;\n" +
+      "/* basic_block_comment;*/\n" +
+      "pre_block; /* start_of_block_comment;\n" +
+      "// embedded_line_comment_in_block_comment; */\n" +
+      "// /* commented_out_block_comment_line\n" +
+      "shown_because_block_comment_invalid_from_line_comment;\n" +
+      "// */\n" +
+      "//* shorter_commented_out_block_comment_line; \n" +
+      "shown_because_block_comment_invalid_from_shorter_line_comment;\n" +
+      "/*/\n" +
+      "not_shown_because_line_above_started_comment;\n" +
+      "//*/\n" +
+      "/* \n" +
+      "not_shown_because_block_comment_started_this_time;\n" +
+      "/*/\n" +
+      "shown_because_line_above_ended_comment_this_time;\n" +
+      "//*/\n"
+
+    expected =
+    [
+      "no_comments",
+      "pre_block",
+      "shown_because_block_comment_invalid_from_line_comment",
+      "shown_because_block_comment_invalid_from_shorter_line_comment",
+      "shown_because_line_above_ended_comment_this_time"
+    ]
+
+    assert_equal(expected, @parser.import_source(source).map!{|s|s.strip})
+  end
+
+  it "remove strippables from the beginning or end of function declarations" do
+    source =
+      "void* my_calloc(size_t, size_t) STRIPPABLE;\n" +
+      "void\n" +
+      "  my_realloc(void*, size_t) STRIPPABLE;\n" +
+      "extern int\n" +
+      "  my_printf (void *my_object, const char *my_format, ...)\n" +
+      "  STRIPPABLE;\n" +
+      "  void STRIPPABLE universal_handler ();\n"
+
+    expected =
+    [
+      "void* my_calloc(size_t, size_t)",
+      "void my_realloc(void*, size_t)",
+      "void universal_handler()"
+    ]
+
+    assert_equal(expected, @parser.import_source(source))
+  end
+
+  it "remove gcc's function __attribute__'s" do
+    source =
+      "void* my_calloc(size_t, size_t) __attribute__((alloc_size(1,2)));\n" +
+      "void\n" +
+      "  my_realloc(void*, size_t) __attribute__((alloc_size(2)));\n" +
+      "extern int\n" +
+      "  my_printf (void *my_object, const char *my_format, ...)\n" +
+      "  __attribute__ ((format (printf, 2, 3)));\n" +
+      "  void __attribute__ ((interrupt)) universal_handler ();\n"
+
+    expected =
+    [
+      "void* my_calloc(size_t, size_t)",
+      "void my_realloc(void*, size_t)",
+      "void universal_handler()"
+    ]
+
+    assert_equal(expected, @parser.import_source(source))
+  end
+
+  it "remove preprocessor directives" do
+    source =
+      "#when stuff_happens\n" +
+      "#ifdef _TEST\n" +
+      "#pragma stack_switch"
+
+    expected = []
+
+    assert_equal(expected, @parser.import_source(source))
+  end
+
+
+  it "remove assembler pragma sections" do
+    source =
+      " #pragma\tasm\n" +
+      "  .foo\n" +
+      "  lda %m\n" +
+      "  nop\n" +
+      "# pragma  endasm \n" +
+      "foo"
+
+    expected = ["foo"]
+
+    assert_equal(expected, @parser.import_source(source))
+  end
+
+
+  it "smush lines together that contain continuation characters" do
+    source =
+      "hoo hah \\\n" +
+      "when \\ \n"
+
+    expected =
+    [
+      "hoo hah when"
+    ]
+
+    assert_equal(expected, @parser.import_source(source).map!{|s|s.strip})
+  end
+
+
+  it "remove C macro definitions" do
+    source =
+      "#define this is the first line\\\n" +
+      "and the second\\\n" +
+      "and the third that should be removed\n" +
+      "but I'm here\n"
+
+    expected = ["but I'm here"]
+
+    assert_equal(expected, @parser.import_source(source))
+  end
+
+
+  it "remove typedef statements" do
+    source =
+      "typedef uint32 (unsigned int);\n" +
+      "const typedef int INT;\n" +
+      "int notatypedef;\n" +
+      "int typedef_isnt_me;\n" +
+      " typedef who cares what really comes here \n" + # exercise multiline typedef
+      "   continuation;\n" +
+      "this should remain!;\n" +
+      "typedef blah bleh;\n" +
+      "typedef struct shell_command_struct {\n" +
+      "  char_ptr COMMAND;\n" +
+      "  int_32 (*SHELL_FUNC)(int_32 argc);\n" +
+      "} SHELL_COMMAND_STRUCT, * SHELL_COMMAND_PTR;\n" +
+      "typedef struct shell_command_struct  {\n" +
+      "  char_ptr  COMMAND;\n" +
+      "  int_32      (*SHELL_FUNC)(int_32 argc, char_ptr argv[]);\n" +
+      "} SHELL_COMMAND_STRUCT, * SHELL_COMMAND_PTR;\n" +
+      "typedef struct shell_command_struct {\n" +
+      " char_ptr COMMAND;\n" +
+      " int_32 (*SHELL_FUNC)(int_32 argc);\n" +
+      "};\n"
+
+    expected =
+    [
+      "int notatypedef",
+      "int typedef_isnt_me",
+      "this should remain!"
+    ]
+
+    assert_equal(expected, @parser.import_source(source).map!{|s|s.strip})
+  end
+
+
+  it "remove enum statements" do
+    source =
+      "enum _NamedEnum {\n" +
+      " THING1 = (0x0001),\n" +
+      " THING2 = (0x0001 << 5),\n" +
+      "}ListOValues;\n\n" +
+      "don't delete me!!\n" +
+      " modifier_str enum _NamedEnum {THING1 = (0x0001), THING2 = (0x0001 << 5)} ListOValues;\n\n" +
+      "typedef enum {\n" +
+      " THING1,\n" +
+      " THING2,\n" +
+      "} Thinger;\n" +
+      "or me!!\n"
+
+    assert_equal(["don't delete me!! or me!!"], @parser.import_source(source).map!{|s|s.strip})
+  end
+
+
+  it "remove union statements" do
+    source =
+      "union _NamedDoohicky {\n" +
+      " unsigned int a;\n" +
+      " char b;\n" +
+      "} Doohicky;\n\n" +
+      "I want to live!!\n" +
+      "some_modifier union { unsigned int a; char b;} Whatever;\n" +
+      "typedef union {\n" +
+      " unsigned int a;\n" +
+      " char b;\n" +
+      "} Whatever;\n" +
+      "me too!!\n"
+
+    assert_equal(["I want to live!! me too!!"], @parser.import_source(source).map!{|s|s.strip})
+  end
+
+
+  it "remove struct statements" do
+    source =
+      "struct _NamedStruct1 {\n" +
+      " unsigned int a;\n" +
+      " signed long int b;\n" +
+      "} Thing ;\n\n" +
+      "extern struct ForwardDeclared_t TestDataType1;\n" +
+      "void foo(void);\n" +
+      "struct\n"+
+      "   MultilineForwardDeclared_t\n" +
+      "   TestDataType2;\n" +
+      "struct THINGER foo(void);\n" +
+      "typedef struct {\n" +
+      " unsigned int a;\n" +
+      " signed char b;\n" +
+      "}Thinger;\n" +
+      "I want to live!!\n"
+
+    assert_equal(["void foo(void)", "struct THINGER foo(void)", "I want to live!!"],
+                 @parser.import_source(source).map!{|s|s.strip})
+  end
+
+  it "remove externed and inline functions" do
+    source =
+      " extern uint32 foobar(unsigned int);\n" +
+      "uint32 extern_name_func(unsigned int);\n" +
+      "uint32 funcinline(unsigned int);\n" +
+      "extern void bar(unsigned int);\n" +
+      "inline void bar(unsigned int);\n" +
+      "extern\n" +
+      "void kinda_ugly_on_the_next_line(unsigned int);\n"
+
+    expected =
+    [
+      "uint32 extern_name_func(unsigned int)",
+      "uint32 funcinline(unsigned int)"
+    ]
+
+    assert_equal(expected, @parser.import_source(source).map!{|s|s.strip})
+  end
+
+  it "remove function definitions but keep function declarations" do
+    source =
+      "uint32 func_with_decl_a(unsigned int);\n" +
+      "uint32 func_with_decl_a(unsigned int a) { return a; }\n" +
+      "uint32 func_with_decl_b(unsigned int);\n" +
+      "uint32 func_with_decl_b(unsigned int a)\n" +
+      "{\n" +
+      "    bar((unsigned int) a);\n" +
+      "    stripme(a);\n" +
+      "}\n"
+
+    expected =
+    [
+      "uint32 func_with_decl_a(unsigned int)",
+      "uint32 func_with_decl_a",                 #okay. it's not going to be interpretted as another function
+      "uint32 func_with_decl_b(unsigned int)",
+      "uint32 func_with_decl_b",                 #okay. it's not going to be interpretted as another function
+    ]
+
+    assert_equal(expected, @parser.import_source(source).map!{|s|s.strip})
+  end
+
+  it "remove function definitions with nested braces but keep function declarations" do
+    source =
+      "uint32 func_with_decl_a(unsigned int);\n" +
+      "uint32 func_with_decl_a(unsigned int a) {\n" +
+      "  while (stuff) {\n" +
+      "    not_a_definition1(void);\n" +
+      "  }\n" +
+      "  not_a_definition2(blah, bleh);\n" +
+      "  return a;\n" +
+      "}\n" +
+      "uint32 func_with_decl_b(unsigned int);\n" +
+      "uint32 func_with_decl_b(unsigned int a)\n" +
+      "{\n" +
+      "    bar((unsigned int) a);\n" +
+      "    stripme(a);\n" +
+      "}\n" +
+      "uint32 func_with_decl_c(unsigned int);\n" +
+      "uint32 func_with_decl_c(unsigned int a)\n" +
+      "{\n" +
+      "    if(a > 0)\n" +
+      "    {\n" +
+      "       return 1;\n" +
+      "    }\n" +
+      "    else\n"+
+      "    {\n" +
+      "       return 2;\n" +
+      "    }\n" +
+      "}\n"
+
+    expected =
+    [
+      "uint32 func_with_decl_a(unsigned int)",
+      "uint32 func_with_decl_a",                 #okay. it's not going to be interpretted as another function
+      "uint32 func_with_decl_b(unsigned int)",
+      "uint32 func_with_decl_b",                 #okay. it's not going to be interpretted as another function
+      "uint32 func_with_decl_c(unsigned int)",
+      "uint32 func_with_decl_c",                 #okay. it's not going to be interpretted as another function
+    ]
+
+    assert_equal(expected, @parser.import_source(source).map!{|s|s.strip})
+  end
+
+  it "remove a fully defined inline function" do
+    source =
+      "inline void foo(unsigned int a) { oranges = a; }\n" +
+      "inline void bar(unsigned int a) { apples = a; };\n" +
+      "inline void bar(unsigned int a)\n" +
+      "{" +
+      "  bananas = a;\n" +
+      "}"
+
+    # ensure it's expected type of exception
+    assert_raises RuntimeError do
+      @parser.parse("module", source)
+    end
+
+    assert_equal([], @parser.funcs)
+
+    # verify exception message
+    begin
+      @parser.parse("module", source)
+    rescue RuntimeError => e
+      assert_equal("ERROR: No function prototypes found!", e.message)
+    end
+  end
+
+  it "remove a fully defined inline function that is multiple lines" do
+    source =
+      "inline void bar(unsigned int a)\n" +
+      "{" +
+      "  bananas = a;\n" +
+      "  grapes = a;\n" +
+      "  apples(bananas, grapes);\n" +
+      "}"
+
+    # ensure it's expected type of exception
+    assert_raises RuntimeError do
+      @parser.parse("module", source)
+    end
+
+    assert_equal([], @parser.funcs)
+
+    # verify exception message
+    begin
+      @parser.parse("module", source)
+    rescue RuntimeError => e
+      assert_equal("ERROR: No function prototypes found!", e.message)
+    end
+  end
+
+  it "remove a fully defined inline function that contains nested braces" do
+    source =
+      "inline void bar(unsigned int a)\n" +
+      "{" +
+      "  apples(bananas, grapes);\n" +
+      "  if (bananas == a)\n" +
+      "  {\n" +
+      "    oranges(a);\n" +
+      "    grapes = a;\n" +
+      "  }\n" +
+      "  grapefruit(bananas, grapes);\n" +
+      "}"
+
+    # ensure it's expected type of exception
+    assert_raises RuntimeError do
+      @parser.parse("module", source)
+    end
+
+    assert_equal([], @parser.funcs)
+
+    # verify exception message
+    begin
+      @parser.parse("module", source)
+    rescue RuntimeError => e
+      assert_equal("ERROR: No function prototypes found!", e.message)
+    end
+  end
+
+  it "remove just inline functions if externs to be included" do
+    source =
+      " extern uint32 foobar(unsigned int);\n" +
+      "uint32 extern_name_func(unsigned int);\n" +
+      "uint32 funcinline(unsigned int);\n" +
+      "extern void bar(unsigned int);\n" +
+      "inline void bar(unsigned int);\n" +
+      "extern\n" +
+      "void kinda_ugly_on_the_next_line(unsigned int);\n"
+
+    expected =
+    [ "extern uint32 foobar(unsigned int)",
+      "uint32 extern_name_func(unsigned int)",
+      "uint32 funcinline(unsigned int)",
+      "extern void bar(unsigned int)",
+      "extern void kinda_ugly_on_the_next_line(unsigned int)"
+    ]
+
+    @parser.treat_externs = :include
+    assert_equal(expected, @parser.import_source(source).map!{|s|s.strip})
+  end
+
+  it "leave inline functions if inline to be included" do
+    source =
+      "extern uint32 foobar(unsigned int);\n" +
+      "uint32 extern_name_func(unsigned int);\n" +
+      "uint32 funcinline(unsigned int);\n" +
+      "inline void inlineBar(unsigned int);\n" +
+      "extern int extern_bar(void);\n" +
+      "static inline void staticinlineBar(unsigned int);\n" +
+      "static inline void bar(unsigned int);\n" +
+      "static inline void bar(unsigned int)\n" +
+      "{\n" +
+      " // NOP\n" +
+      "}\n"
+
+    expected =
+    [ "uint32 extern_name_func(unsigned int)",
+      "uint32 funcinline(unsigned int)",
+      "void inlineBar(unsigned int)",
+      "void staticinlineBar(unsigned int)",
+      "void bar(unsigned int)"
+    ]
+
+    @parser.treat_inlines = :include
+    assert_equal(expected, @parser.import_source(source).map!{|s|s.strip})
+  end
+
+  it "leave inline and extern functions if inline and extern to be included" do
+    source =
+      "extern uint32 foobar(unsigned int);\n" +
+      "uint32 extern_name_func(unsigned int);\n" +
+      "uint32 funcinline(unsigned int);\n" +
+      "inline void inlineBar(unsigned int);\n" +
+      "extern int extern_bar(void);\n" +
+      "static inline void staticinlineBar(unsigned int);\n" +
+      "static inline void bar(unsigned int);\n" +
+      "static inline void bar(unsigned int)\n" +
+      "{\n" +
+      " // NOP\n" +
+      "}\n"
+
+    expected =
+    [ "extern uint32 foobar(unsigned int)",
+      "uint32 extern_name_func(unsigned int)",
+      "uint32 funcinline(unsigned int)",
+      "void inlineBar(unsigned int)",
+      "extern int extern_bar(void)",
+      "void staticinlineBar(unsigned int)",
+      "void bar(unsigned int)"
+    ]
+
+    @parser.treat_externs = :include
+    @parser.treat_inlines = :include
+    assert_equal(expected, @parser.import_source(source).map!{|s|s.strip})
+  end
+
+  it "Include inline functions that contain user defined inline function formats" do
+    source =
+      "uint32 foo(unsigned int);\n" +
+      "uint32 bar(unsigned int);\n" +
+      "inline void inlineBar(void)\n" +
+      "{\n" +
+      "    return 43;\n" +
+      "}\n" +
+      "static __inline__ __attribute__ ((always_inline)) int alwaysinlinefunc(int a)\n" +
+      "{\n" +
+      "    return a + inlineBar();\n" +
+      "}\n" +
+      "static __inline__ void inlinebar(unsigned int)\n" +
+      "{\n" +
+      " int a = alwaysinlinefunc()\n" +
+      "}\n"
+
+    expected =
+      [
+      "uint32 foo(unsigned int)",
+      "uint32 bar(unsigned int)",
+      "void inlineBar(void)",
+      "int alwaysinlinefunc(int a)",
+      "void inlinebar(unsigned int)"
+      ]
+
+    @parser.treat_inlines = :include
+    @parser.inline_function_patterns = ['static __inline__ __attribute__ \(\(always_inline\)\)', 'static __inline__', '\binline\b']
+    assert_equal(expected, @parser.import_source(source).map!{|s|s.strip})
+  end
+
+  it "remove defines" do
+    source =
+      "#define whatever you feel like defining\n" +
+      "void hello(void);\n" +
+      "#DEFINE I JUST DON'T CARE\n" +
+      "#deFINE\n" +
+      "#define get_foo() \\\n   ((Thing)foo.bar)" # exercise multiline define
+
+    expected =
+    [
+      "void hello(void)",
+    ]
+
+    assert_equal(expected, @parser.import_source(source).map!{|s|s.strip})
+  end
+
+
+  it "remove keywords that would keep things from going smoothly in the future" do
+    source =
+      "const int TheMatrix(register int Trinity, unsigned int *restrict Neo)"
+
+    expected =
+    [
+      "const int TheMatrix(int Trinity, unsigned int * Neo)",
+    ]
+
+    assert_equal(expected, @parser.import_source(source).map!{|s|s.strip})
+  end
+
+
+  # some code actually typedef's void even though it's not ANSI C and is, frankly, weird
+  # since cmock treats void specially, we can't let void be obfuscated
+  it "handle odd case of typedef'd void returned" do
+    source = "MY_FUNKY_VOID FunkyVoidReturned(int a)"
+    expected = { :var_arg=>nil,
+                 :name=>"FunkyVoidReturned",
+                 :unscoped_name=>"FunkyVoidReturned",
+                 :namespace=>[],
+                 :class=>nil,
+                 :return=>{ :type   => "void",
+                            :name   => 'cmock_to_return',
+                            :ptr?   => false,
+                            :const? => false,
+                            :const_ptr? => false,
+                            :str    => "void cmock_to_return",
+                            :void?  => true
+                          },
+                 :modifier=>"",
+                 :contains_ptr? => false,
+                 :args=>[{:type=>"int", :name=>"a", :ptr? => false, :const? => false, :const_ptr? => false}],
+                 :args_string=>"int a",
+                 :args_call=>"a"}
+    assert_equal(expected, @parser.parse_declaration(source))
+  end
+
+  it "handle odd case of typedef'd void as arg" do
+    source = "int FunkyVoidAsArg(MY_FUNKY_VOID)"
+    expected = { :var_arg=>nil,
+                 :name=>"FunkyVoidAsArg",
+                 :unscoped_name=>"FunkyVoidAsArg",
+                 :namespace=>[],
+                 :class=>nil,
+                 :return=>{ :type   => "int",
+                            :name   => 'cmock_to_return',
+                            :ptr?   => false,
+                            :const? => false,
+                            :const_ptr? => false,
+                            :str    => "int cmock_to_return",
+                            :void?  => false
+                          },
+                 :modifier=>"",
+                 :contains_ptr? => false,
+                 :args=>[],
+                 :args_string=>"void",
+                 :args_call=>"" }
+    assert_equal(expected, @parser.parse_declaration(source))
+  end
+
+  it "handle odd case of typedef'd void as arg pointer" do
+    source = "char FunkyVoidPointer(MY_FUNKY_VOID* bluh)"
+    expected = { :var_arg=>nil,
+                 :name=>"FunkyVoidPointer",
+                 :unscoped_name=>"FunkyVoidPointer",
+                 :namespace=>[],
+                 :class=>nil,
+                 :return=>{ :type   => "char",
+                            :name   => 'cmock_to_return',
+                            :ptr?   => false,
+                            :const? => false,
+                            :const_ptr? => false,
+                            :str    => "char cmock_to_return",
+                            :void?  => false
+                          },
+                 :modifier=>"",
+                 :contains_ptr? => true,
+                 :args=>[{:type=>"MY_FUNKY_VOID*", :name=>"bluh", :ptr? => true, :const? => false, :const_ptr? => false}],
+                 :args_string=>"MY_FUNKY_VOID* bluh",
+                 :args_call=>"bluh" }
+    assert_equal(expected, @parser.parse_declaration(source))
+  end
+
+
+  it "strip default values from function parameter lists" do
+    source =
+      "void Foo(int a = 57, float b=37.52, char c= 'd', char* e=\"junk\");\n"
+
+    expected =
+    [
+      "void Foo(int a, float b, char c, char* e)"
+    ]
+
+    assert_equal(expected, @parser.import_source(source).map!{|s|s.strip})
+  end
+
+
+  it "raise upon empty file" do
+    source = ''
+
+    # ensure it's expected type of exception
+    assert_raises RuntimeError do
+      @parser.parse("module", source)
+    end
+
+    assert_equal([], @parser.funcs)
+
+    # verify exception message
+    begin
+      @parser.parse("module", source)
+    rescue RuntimeError => e
+      assert_equal("ERROR: No function prototypes found!", e.message)
+    end
+  end
+
+  it "clean up module names that contain spaces, dashes, and such" do
+    source = 'void meh(int (*func)(int));'
+
+    retval = @parser.parse("C:\Ugly Module-Name", source)
+    assert (retval[:typedefs][0] =~ /CUglyModuleName/)
+  end
+
+  it "raise upon no function prototypes found in file" do
+    source =
+      "typedef void SILLY_VOID_TYPE1;\n" +
+      "typedef (void) SILLY_VOID_TYPE2 ;\n" +
+      "typedef ( void ) (*FUNCPTR)(void);\n\n" +
+      "#define get_foo() \\\n   ((Thing)foo.bar)"
+
+    # ensure it's expected type of exception
+    assert_raises(RuntimeError) do
+      @parser.parse("module", source)
+    end
+
+    assert_equal([], @parser.funcs)
+
+    # verify exception message
+    begin
+      @parser.parse("module", source)
+    rescue RuntimeError => e
+      assert_equal("ERROR: No function prototypes found!", e.message)
+    end
+  end
+
+
+  it "raise upon prototype parsing failure" do
+    source = "void (int, )"
+
+    # ensure it's expected type of exception
+    assert_raises(RuntimeError) do
+      @parser.parse("module", source)
+    end
+
+    # verify exception message
+    begin
+      @parser.parse("module", source)
+    rescue RuntimeError => e
+      assert(e.message.include?("Failed Parsing Declaration Prototype!"))
+    end
+  end
+
+  it "extract and return function declarations with retval and args" do
+
+    source = "int Foo(int a, unsigned int b)"
+    expected = { :var_arg=>nil,
+                 :name=>"Foo",
+                 :unscoped_name=>"Foo",
+                 :namespace=>[],
+                 :class=>nil,
+                 :return=>{ :type   => "int",
+                            :name   => 'cmock_to_return',
+                            :ptr?   => false,
+                            :const? => false,
+                            :const_ptr? => false,
+                            :str    => "int cmock_to_return",
+                            :void?  => false
+                          },
+                 :modifier=>"",
+                 :contains_ptr? => false,
+                 :args=>[ {:type=>"int", :name=>"a", :ptr? => false, :const? => false, :const_ptr? => false},
+                          {:type=>"unsigned int", :name=>"b", :ptr? => false, :const? => false, :const_ptr? => false}
+                        ],
+                 :args_string=>"int a, unsigned int b",
+                 :args_call=>"a, b" }
+    assert_equal(expected, @parser.parse_declaration(source))
+  end
+
+  it "extract and return function declarations with no retval" do
+
+    source = "void    FunkyChicken(    uint la,  int     de, bool da)"
+    expected = { :var_arg=>nil,
+                 :return=>{ :type   => "void",
+                            :name   => 'cmock_to_return',
+                            :ptr?   => false,
+                            :const? => false,
+                            :const_ptr? => false,
+                            :str    => "void cmock_to_return",
+                            :void?  => true
+                          },
+                 :name=>"FunkyChicken",
+                 :unscoped_name=>"FunkyChicken",
+                 :namespace=>[],
+                 :class=>nil,
+                 :modifier=>"",
+                 :contains_ptr? => false,
+                 :args=>[ {:type=>"uint", :name=>"la", :ptr? => false, :const? => false, :const_ptr? => false},
+                          {:type=>"int",  :name=>"de", :ptr? => false, :const? => false, :const_ptr? => false},
+                          {:type=>"bool", :name=>"da", :ptr? => false, :const? => false, :const_ptr? => false}
+                        ],
+                 :args_string=>"uint la, int     de, bool da",
+                 :args_call=>"la, de, da" }
+    assert_equal(expected, @parser.parse_declaration(source))
+  end
+
+  it "extract and return function declarations with implied voids" do
+
+    source = "void tat()"
+    expected = { :var_arg=>nil,
+                 :return=>{ :type   => "void",
+                            :name   => 'cmock_to_return',
+                            :ptr?   => false,
+                            :const? => false,
+                            :const_ptr? => false,
+                            :str    => "void cmock_to_return",
+                            :void?  => true
+                          },
+                 :name=>"tat",
+                 :unscoped_name=>"tat",
+                 :namespace=>[],
+                 :class=>nil,
+                 :modifier=>"",
+                 :contains_ptr? => false,
+                 :args=>[ ],
+                 :args_string=>"void",
+                 :args_call=>"" }
+    assert_equal(expected, @parser.parse_declaration(source))
+  end
+
+  it "extract modifiers properly" do
+
+    source = "const int TheMatrix(int Trinity, unsigned int * Neo)"
+    expected = { :var_arg=>nil,
+                 :return=>{ :type   => "int",
+                            :name   => 'cmock_to_return',
+                            :ptr?   => false,
+                            :const? => true,
+                            :const_ptr? => false,
+                            :str    => "int cmock_to_return",
+                            :void?  => false
+                          },
+                 :name=>"TheMatrix",
+                 :unscoped_name=>"TheMatrix",
+                 :namespace=>[],
+                 :class=>nil,
+                 :modifier=>"const",
+                 :contains_ptr? => true,
+                 :args=>[ {:type=>"int",           :name=>"Trinity", :ptr? => false, :const? => false, :const_ptr? => false},
+                          {:type=>"unsigned int*", :name=>"Neo",     :ptr? => true,  :const? => false, :const_ptr? => false}
+                        ],
+                 :args_string=>"int Trinity, unsigned int* Neo",
+                 :args_call=>"Trinity, Neo" }
+    assert_equal(expected, @parser.parse_declaration(source))
+  end
+
+  it "extract c calling conventions properly" do
+
+    source = "const int __stdcall TheMatrix(int Trinity, unsigned int * Neo)"
+    expected = { :var_arg=>nil,
+                 :return=>{ :type   => "int",
+                            :name   => 'cmock_to_return',
+                            :ptr?   => false,
+                            :const? => true,
+                            :const_ptr? => false,
+                            :str    => "int cmock_to_return",
+                            :void?  => false
+                          },
+                 :name=>"TheMatrix",
+                 :unscoped_name=>"TheMatrix",
+                 :namespace=>[],
+                 :class=>nil,
+                 :modifier=>"const",
+                 :c_calling_convention=>"__stdcall",
+                 :contains_ptr? => true,
+                 :args=>[ {:type=>"int",           :name=>"Trinity", :ptr? => false, :const? => false, :const_ptr? => false},
+                          {:type=>"unsigned int*", :name=>"Neo",     :ptr? => true,  :const? => false, :const_ptr? => false}
+                        ],
+                 :args_string=>"int Trinity, unsigned int* Neo",
+                 :args_call=>"Trinity, Neo" }
+    assert_equal(expected, @parser.parse_declaration(source))
+  end
+
+  it "extract and return function declarations inside namespace and class" do
+    source = "int Foo(int a, unsigned int b)"
+    expected = { :var_arg=>nil,
+                 :name=>"ns1_ns2_Bar_Foo",
+                 :unscoped_name=>"Foo",
+                 :class=>"Bar",
+                 :namespace=>["ns1", "ns2"],
+                 :return=>{ :type   => "int",
+                            :name   => 'cmock_to_return',
+                            :ptr?   => false,
+                            :const? => false,
+                            :const_ptr? => false,
+                            :str    => "int cmock_to_return",
+                            :void?  => false
+                          },
+                 :modifier=>"",
+                 :contains_ptr? => false,
+                 :args=>[ {:type=>"int", :name=>"a", :ptr? => false, :const? => false, :const_ptr? => false},
+                          {:type=>"unsigned int", :name=>"b", :ptr? => false, :const? => false, :const_ptr? => false}
+                        ],
+                 :args_string=>"int a, unsigned int b",
+                 :args_call=>"a, b" }
+    assert_equal(expected, @parser.parse_declaration(source, ["ns1", "ns2"], "Bar"))
+  end
+
+  it "fully parse multiple prototypes" do
+
+    source = "const int TheMatrix(int Trinity, unsigned int * Neo);\n" +
+             "int Morpheus(int, unsigned int*);\n"
+
+    expected = [{ :var_arg=>nil,
+                  :return=> { :type   => "int",
+                              :name   => 'cmock_to_return',
+                              :ptr?   => false,
+                              :const? => true,
+                              :const_ptr? => false,
+                              :str    => "int cmock_to_return",
+                              :void?  => false
+                            },
+                  :name=>"TheMatrix",
+                  :unscoped_name=>"TheMatrix",
+                  :namespace=>[],
+                  :class=>nil,
+                  :modifier=>"const",
+                  :contains_ptr? => true,
+                  :args=>[ {:type=>"int",           :name=>"Trinity", :ptr? => false, :const? => false, :const_ptr? => false},
+                           {:type=>"unsigned int*", :name=>"Neo",     :ptr? => true,  :const? => false, :const_ptr? => false}
+                         ],
+                  :args_string=>"int Trinity, unsigned int* Neo",
+                 :args_call=>"Trinity, Neo" },
+                { :var_arg=>nil,
+                  :return=> { :type   => "int",
+                              :name   => 'cmock_to_return',
+                              :ptr?   => false,
+                              :const? => false,
+                              :const_ptr? => false,
+                              :str    => "int cmock_to_return",
+                              :void?  => false
+                            },
+                  :name=>"Morpheus",
+                  :unscoped_name=>"Morpheus",
+                  :namespace=>[],
+                  :class=>nil,
+                  :modifier=>"",
+                  :contains_ptr? => true,
+                  :args=>[ {:type=>"int",           :name=>"cmock_arg1", :ptr? => false, :const? => false, :const_ptr? => false},
+                           {:type=>"unsigned int*", :name=>"cmock_arg2", :ptr? => true,  :const? => false, :const_ptr? => false}
+                         ],
+                  :args_string=>"int cmock_arg1, unsigned int* cmock_arg2",
+                 :args_call=>"cmock_arg1, cmock_arg2"
+                }]
+    assert_equal(expected, @parser.parse("module", source)[:functions])
+  end
+
+  it "not extract for mocking multiply defined prototypes" do
+
+    source = "const int TheMatrix(int Trinity, unsigned int * Neo);\n" +
+             "const int TheMatrix(int, unsigned int*);\n"
+
+    expected = [{ :var_arg=>nil,
+                  :name=>"TheMatrix",
+                  :unscoped_name=>"TheMatrix",
+                  :namespace=>[],
+                  :class=>nil,
+                  :return=> { :type   => "int",
+                              :name   => 'cmock_to_return',
+                              :ptr?   => false,
+                              :const? => true,
+                              :const_ptr? => false,
+                              :str    => "int cmock_to_return",
+                              :void?  => false
+                            },
+                  :modifier=>"const",
+                  :contains_ptr? => true,
+                  :args=>[ {:type=>"int",           :name=>"Trinity", :ptr? => false, :const? => false, :const_ptr? => false},
+                           {:type=>"unsigned int*", :name=>"Neo", :ptr? => true,      :const? => false, :const_ptr? => false}
+                         ],
+                  :args_string=>"int Trinity, unsigned int* Neo",
+                  :args_call=>"Trinity, Neo"
+                }]
+    assert_equal(expected, @parser.parse("module", source)[:functions])
+  end
+
+  it "should properly handle const before return type" do
+    sources = [
+      "const int * PorkRoast(void);\n",
+      "const int* PorkRoast(void);\n",
+      "const int *PorkRoast(void);\n"
+    ]
+
+    expected = [{ :var_arg => nil,
+                  :name    => "PorkRoast",
+                  :unscoped_name => "PorkRoast",
+                  :namespace=>[],
+                  :class=>nil,
+                  :return  => { :type       => "const int*",
+                                :name       => 'cmock_to_return',
+                                :ptr?       => true,
+                                :const?     => true,
+                                :const_ptr? => false,
+                                :str        => "const int* cmock_to_return",
+                                :void?      => false
+                              },
+                  :modifier      => "",
+                  :contains_ptr? => false,
+                  :args          => [],
+                  :args_string   => "void",
+                  :args_call     => ""
+                }]
+
+    sources.each do |source|
+      assert_equal(expected, @parser.parse("module", source)[:functions])
+    end
+  end
+
+  it "should properly handle const before return type" do
+    sources = [
+      "int const * PorkRoast(void);\n",
+      "int const* PorkRoast(void);\n",
+      "int const *PorkRoast(void);\n"
+    ]
+
+    expected = [{ :var_arg => nil,
+                  :name    => "PorkRoast",
+                  :unscoped_name => "PorkRoast",
+                  :namespace=>[],
+                  :class=>nil,
+                  :return  => { :type       => "int const*",
+                                :name       => 'cmock_to_return',
+                                :ptr?       => true,
+                                :const?     => true,
+                                :const_ptr? => false,
+                                :str        => "int const* cmock_to_return",
+                                :void?      => false
+                              },
+                  :modifier      => "",
+                  :contains_ptr? => false,
+                  :args          => [],
+                  :args_string   => "void",
+                  :args_call     => ""
+                }]
+
+    sources.each do |source|
+      assert_equal(expected, @parser.parse("module", source)[:functions])
+    end
+  end
+
+  it "should properly handle const applied after asterisk in return type (not legal C, but sometimes used)" do
+
+    source = "int * const PorkRoast(void);\n"
+
+    expected = [{ :var_arg=>nil,
+                  :name=>"PorkRoast",
+                  :unscoped_name=>"PorkRoast",
+                  :namespace=>[],
+                  :class=>nil,
+                  :return=> { :type   => "int*",
+                              :name   => 'cmock_to_return',
+                              :ptr?   => true,
+                              :const? => false,
+                              :const_ptr? => true,
+                              :str    => "int* cmock_to_return",
+                              :void?  => false
+                            },
+                  :modifier=>"const",
+                  :contains_ptr? => false,
+                  :args=>[],
+                  :args_string=>"void",
+                  :args_call=>""
+                }]
+    assert_equal(expected, @parser.parse("module", source)[:functions])
+  end
+
+  it "properly parse const and pointer argument types with no arg names" do
+
+    source = "void foo(int const*, int*const, const int*, const int*const, int const*const, int*, int, const int);\n"
+
+    expected = [{ :name => "foo",
+                  :unscoped_name => "foo",
+                  :namespace=>[],
+                  :class=>nil,
+                  :modifier => "",
+                  :return => { :type       => "void",
+                               :name       => "cmock_to_return",
+                               :str        => "void cmock_to_return",
+                               :void?      => true,
+                               :ptr?       => false,
+                               :const?     => false,
+                               :const_ptr? => false
+                             },
+                  :var_arg => nil,
+                  :args_string => "int const* cmock_arg1, int* const cmock_arg2, const int* cmock_arg3, const int* const cmock_arg4, " +
+                                  "int const* const cmock_arg5, int* cmock_arg6, int cmock_arg7, const int cmock_arg8",
+                  :args => [{ :type=>"int const*", :name => "cmock_arg1", :ptr? => true,  :const? => true,  :const_ptr? => false },
+                            { :type=>"int*",       :name => "cmock_arg2", :ptr? => true,  :const? => false, :const_ptr? => true  },
+                            { :type=>"const int*", :name => "cmock_arg3", :ptr? => true,  :const? => true,  :const_ptr? => false },
+                            { :type=>"const int*", :name => "cmock_arg4", :ptr? => true,  :const? => true,  :const_ptr? => true  },
+                            { :type=>"int const*", :name => "cmock_arg5", :ptr? => true,  :const? => true,  :const_ptr? => true  },
+                            { :type=>"int*",       :name => "cmock_arg6", :ptr? => true,  :const? => false, :const_ptr? => false },
+                            { :type=>"int",        :name => "cmock_arg7", :ptr? => false, :const? => false, :const_ptr? => false },
+                            { :type=>"int",        :name => "cmock_arg8", :ptr? => false, :const? => true,  :const_ptr? => false }],
+                  :args_call => "cmock_arg1, cmock_arg2, cmock_arg3, cmock_arg4, cmock_arg5, cmock_arg6, cmock_arg7, cmock_arg8",
+                  :contains_ptr? => true
+                }]
+    assert_equal(expected, @parser.parse("module", source)[:functions])
+  end
+
+  it "properly parse const and pointer argument types with arg names" do
+
+    source = "void bar(int const* param1, int*const param2, const int* param3, const int*const param4,\n" +
+             "         int const*const param5, int*param6, int param7, const int param8);\n"
+
+    expected = [{ :name => "bar",
+                  :unscoped_name => "bar",
+                  :namespace=>[],
+                  :class=>nil,
+                  :modifier => "",
+                  :return => { :type       => "void",
+                               :name       => "cmock_to_return",
+                               :str        => "void cmock_to_return",
+                               :void?      => true,
+                               :ptr?       => false,
+                               :const?     => false,
+                               :const_ptr? => false
+                             },
+                  :var_arg => nil,
+                  :args_string => "int const* param1, int* const param2, const int* param3, const int* const param4, " +
+                                  "int const* const param5, int* param6, int param7, const int param8",
+                  :args => [{ :type=>"int const*", :name => "param1", :ptr? => true,  :const? => true,  :const_ptr? => false },
+                            { :type=>"int*",       :name => "param2", :ptr? => true,  :const? => false, :const_ptr? => true  },
+                            { :type=>"const int*", :name => "param3", :ptr? => true,  :const? => true,  :const_ptr? => false },
+                            { :type=>"const int*", :name => "param4", :ptr? => true,  :const? => true,  :const_ptr? => true  },
+                            { :type=>"int const*", :name => "param5", :ptr? => true,  :const? => true,  :const_ptr? => true  },
+                            { :type=>"int*",       :name => "param6", :ptr? => true,  :const? => false, :const_ptr? => false },
+                            { :type=>"int",        :name => "param7", :ptr? => false, :const? => false, :const_ptr? => false },
+                            { :type=>"int",        :name => "param8", :ptr? => false, :const? => true,  :const_ptr? => false }],
+                  :args_call => "param1, param2, param3, param4, param5, param6, param7, param8",
+                  :contains_ptr? => true
+                }].freeze
+    assert_equal(expected, @parser.parse("module", source)[:functions])
+  end
+
+  it "converts typedef'd array arguments to pointers" do
+
+    source = "Book AddToBook(Book book, const IntArray values);\n"
+
+    expected = [{ :name => "AddToBook",
+                  :unscoped_name => "AddToBook",
+                  :namespace=>[],
+                  :class=>nil,
+                  :modifier=>"",
+                  :return  => { :type       => "Book",
+                                :name       => "cmock_to_return",
+                                :str        => "Book cmock_to_return",
+                                :void?      => false,
+                                :ptr?       => false,
+                                :const?     => false,
+                                :const_ptr? => false
+                              },
+                  :var_arg => nil,
+                  :args => [{ :type => "Page*",      :name => "book",   :ptr? => true, :const? => false, :const_ptr? => false },
+                            { :type => "const int*", :name => "values", :ptr? => true, :const? => true,  :const_ptr? => false }],
+                  :args_string => "Book book, const IntArray values",
+                  :args_call => "book, values",
+                  :contains_ptr? => true
+                }]
+
+    assert_equal(expected, @parser.parse("module", source)[:functions])
+
+  end
+
+  it "properly detect typedef'd variants of void and use those" do
+
+    source = "typedef (void) FUNKY_VOID_T;\n" +
+             "typedef void CHUNKY_VOID_T;\n" +
+             "FUNKY_VOID_T DrHorrible(int SingAlong);\n" +
+             "int CaptainHammer(CHUNKY_VOID_T);\n"
+
+    expected = [{ :var_arg=>nil,
+                  :name=>"DrHorrible",
+                  :unscoped_name=>"DrHorrible",
+                  :namespace=>[],
+                  :class=>nil,
+                  :return  => { :type   => "void",
+                                :name   => 'cmock_to_return',
+                                :ptr?   => false,
+                                :const? => false,
+                                :const_ptr? => false,
+                                :str    => "void cmock_to_return",
+                                :void?  => true
+                              },
+                  :modifier=>"",
+                  :contains_ptr? => false,
+                  :args=>[ {:type=>"int", :name=>"SingAlong", :ptr? => false, :const? => false, :const_ptr? => false} ],
+                  :args_string=>"int SingAlong",
+                  :args_call=>"SingAlong"
+                },
+                { :var_arg=>nil,
+                  :return=> { :type   => "int",
+                              :name   => 'cmock_to_return',
+                              :ptr?   => false,
+                              :const? => false,
+                              :const_ptr? => false,
+                              :str    => "int cmock_to_return",
+                              :void?  => false
+                            },
+                  :name=>"CaptainHammer",
+                  :unscoped_name=>"CaptainHammer",
+                  :namespace=>[],
+                  :class=>nil,
+                  :modifier=>"",
+                  :contains_ptr? => false,
+                  :args=>[ ],
+                  :args_string=>"void",
+                  :args_call=>""
+                }]
+    assert_equal(expected, @parser.parse("module", source)[:functions])
+  end
+
+  it "be ok with structs inside of function declarations" do
+
+    source = "int DrHorrible(struct SingAlong Blog);\n" +
+             "void Penny(struct const _KeepYourHeadUp_ * const BillyBuddy);\n" +
+             "struct TheseArentTheHammer CaptainHammer(void);\n"
+
+    expected = [{ :var_arg=>nil,
+                  :return =>{ :type   => "int",
+                              :name   => 'cmock_to_return',
+                              :ptr?   => false,
+                              :const? => false,
+                              :const_ptr? => false,
+                              :str    => "int cmock_to_return",
+                              :void?  => false
+                            },
+                  :name=>"DrHorrible",
+                  :unscoped_name=>"DrHorrible",
+                  :namespace=>[],
+                  :class=>nil,
+                  :modifier=>"",
+                  :contains_ptr? => false,
+                  :args=>[ {:type=>"struct SingAlong", :name=>"Blog", :ptr? => false, :const? => false, :const_ptr? => false} ],
+                  :args_string=>"struct SingAlong Blog",
+                  :args_call=>"Blog"
+                },
+                { :var_arg=>nil,
+                  :return=> { :type   => "void",
+                              :name   => 'cmock_to_return',
+                              :ptr?   => false,
+                              :const? => false,
+                              :const_ptr? => false,
+                              :str    => "void cmock_to_return",
+                              :void?  => true
+                            },
+                  :name=>"Penny",
+                  :unscoped_name=>"Penny",
+                  :namespace=>[],
+                  :class=>nil,
+                  :modifier=>"",
+                  :contains_ptr? => true,
+                  :args=>[ {:type=>"struct const _KeepYourHeadUp_*", :name=>"BillyBuddy", :ptr? => true, :const? => true, :const_ptr? => true} ],
+                  :args_string=>"struct const _KeepYourHeadUp_* const BillyBuddy",
+                  :args_call=>"BillyBuddy"
+                },
+                { :var_arg=>nil,
+                  :return=> { :type   => "struct TheseArentTheHammer",
+                              :name   => 'cmock_to_return',
+                              :ptr?   => false,
+                              :const? => false,
+                              :const_ptr? => false,
+                              :str    => "struct TheseArentTheHammer cmock_to_return",
+                              :void?  => false
+                            },
+                  :name=>"CaptainHammer",
+                  :unscoped_name=>"CaptainHammer",
+                  :namespace=>[],
+                  :class=>nil,
+                  :modifier=>"",
+                  :contains_ptr? => false,
+                  :args=>[ ],
+                  :args_string=>"void",
+                  :args_call=>""
+                }]
+    assert_equal(expected, @parser.parse("module", source)[:functions])
+  end
+
+  it "extract functions containing unions with union specifier" do
+    source = "void OrangePeel(union STARS_AND_STRIPES * a, union AFL_CIO b)"
+    expected = [{ :var_arg=>nil,
+                 :return=>{ :type   => "void",
+                            :name   => 'cmock_to_return',
+                            :ptr?   => false,
+                            :const? => false,
+                            :const_ptr? => false,
+                            :str    => "void cmock_to_return",
+                            :void?  => true
+                          },
+                 :name=>"OrangePeel",
+                 :unscoped_name=>"OrangePeel",
+                 :namespace=>[],
+                 :class=>nil,
+                 :modifier=>"",
+                 :contains_ptr? => true,
+                 :args=>[ {:type=>"union STARS_AND_STRIPES*", :name=>"a", :ptr? => true, :const? => false, :const_ptr? => false},
+                          {:type=>"union AFL_CIO", :name=>"b", :ptr? => false, :const? => false, :const_ptr? => false}
+                        ],
+                 :args_string=>"union STARS_AND_STRIPES* a, union AFL_CIO b",
+                 :args_call=>"a, b" }]
+    result = @parser.parse("module", source)
+    assert_equal(expected, result[:functions])
+  end
+
+  it "not be thwarted by variables named with primitive types as part of the name" do
+    source = "void ApplePeel(const unsigned int const_param, int int_param, int integer, char character, int* const constant)"
+    expected = [{ :var_arg=>nil,
+                 :return=>{ :type   => "void",
+                            :name   => 'cmock_to_return',
+                            :ptr?   => false,
+                            :const? => false,
+                            :const_ptr? => false,
+                            :str    => "void cmock_to_return",
+                            :void?  => true
+                          },
+                 :name=>"ApplePeel",
+                 :unscoped_name=>"ApplePeel",
+                 :namespace=>[],
+                 :class=>nil,
+                 :modifier=>"",
+                 :contains_ptr? => true,
+                 :args=>[ {:type=> "unsigned int", :name=>"const_param", :ptr? => false, :const? => true, :const_ptr? => false},
+                          {:type=>"int", :name=>"int_param", :ptr? => false, :const? => false, :const_ptr? => false},
+                          {:type=>"int", :name=>"integer", :ptr? => false, :const? => false, :const_ptr? => false},
+                          {:type=>"char", :name=>"character", :ptr? => false, :const? => false, :const_ptr? => false},
+                          {:type=>"int*", :name=>"constant", :ptr? => true, :const? => false, :const_ptr? => true}
+                        ],
+                 :args_string=>"const unsigned int const_param, int int_param, int integer, char character, int* const constant",
+                 :args_call=>"const_param, int_param, integer, character, constant" }]
+    result = @parser.parse("module", source)
+    assert_equal(expected, result[:functions])
+  end
+
+  it "not be thwarted by custom types named similarly to primitive types" do
+    source = "void LemonPeel(integer param, character thing, longint * junk, constant value, int32_t const number)"
+    expected = [{:var_arg=>nil,
+                 :return=>{ :type   => "void",
+                            :name   => 'cmock_to_return',
+                            :ptr?   => false,
+                            :const? => false,
+                            :const_ptr? => false,
+                            :str    => "void cmock_to_return",
+                            :void?  => true
+                          },
+                 :name=>"LemonPeel",
+                 :unscoped_name=>"LemonPeel",
+                 :namespace=>[],
+                 :class=>nil,
+                 :modifier=>"",
+                 :contains_ptr? => true,
+                 :args=>[ {:type=>"integer", :name=>"param", :ptr? => false, :const? => false, :const_ptr? => false},
+                          {:type=>"character", :name=>"thing", :ptr? => false, :const? => false, :const_ptr? => false},
+                          {:type=>"longint*", :name=>"junk", :ptr? => true, :const? => false, :const_ptr? => false},
+                          {:type=>"constant", :name=>"value", :ptr? => false, :const? => false, :const_ptr? => false},
+                          {:type=>"int32_t", :name=>"number", :ptr? => false, :const? => true, :const_ptr? => false}
+                        ],
+                 :args_string=>"integer param, character thing, longint* junk, constant value, int32_t const number",
+                 :args_call=>"param, thing, junk, value, number" }]
+    result = @parser.parse("module", source)
+    assert_equal(expected, result[:functions])
+  end
+
+  it "handle some of those chains of C name specifiers naturally" do
+    source = "void CoinOperated(signed char abc, const unsigned long int xyz_123, unsigned int const abc_123, long long arm_of_the_law)"
+    expected = [{:var_arg=>nil,
+                 :return=>{ :type   => "void",
+                            :name   => 'cmock_to_return',
+                            :ptr?   => false,
+                            :const? => false,
+                            :const_ptr? => false,
+                            :str    => "void cmock_to_return",
+                            :void?  => true
+                          },
+                 :name=>"CoinOperated",
+                 :unscoped_name=>"CoinOperated",
+                 :namespace=>[],
+                 :class=>nil,
+                 :modifier=>"",
+                 :contains_ptr? => false,
+                 :args=>[ {:type=>"signed char", :name=>"abc", :ptr? => false, :const? => false, :const_ptr? => false},
+                          {:type=>"unsigned long int", :name=>"xyz_123", :ptr? => false, :const? => true, :const_ptr? => false},
+                          {:type=>"unsigned int", :name=>"abc_123", :ptr? => false, :const? => true, :const_ptr? => false},
+                          {:type=>"long long", :name=>"arm_of_the_law", :ptr? => false, :const? => false, :const_ptr? => false}
+                        ],
+                 :args_string=>"signed char abc, const unsigned long int xyz_123, unsigned int const abc_123, long long arm_of_the_law",
+                 :args_call=>"abc, xyz_123, abc_123, arm_of_the_law" }]
+    result = @parser.parse("module", source)
+    assert_equal(expected, result[:functions])
+  end
+
+  it "handle custom types of various formats" do
+    source = "void CardOperated(CUSTOM_TYPE abc, CUSTOM_TYPE* xyz_123, CUSTOM_TYPE const abcxyz, struct CUSTOM_TYPE const * const abc123)"
+    expected = [{:var_arg=>nil,
+                 :return=>{ :type   => "void",
+                            :name   => 'cmock_to_return',
+                            :ptr?   => false,
+                            :const? => false,
+                            :const_ptr? => false,
+                            :str    => "void cmock_to_return",
+                            :void?  => true
+                          },
+                 :name=>"CardOperated",
+                 :unscoped_name=>"CardOperated",
+                 :namespace=>[],
+                 :class=>nil,
+                 :modifier=>"",
+                 :contains_ptr? => true,
+                 :args=>[ {:type=>"CUSTOM_TYPE", :name=>"abc", :ptr? => false, :const? => false, :const_ptr? => false},
+                          {:type=>"CUSTOM_TYPE*", :name=>"xyz_123", :ptr? => true, :const? => false, :const_ptr? => false},
+                          {:type=>"CUSTOM_TYPE", :name=>"abcxyz", :ptr? => false, :const? => true, :const_ptr? => false},
+                          {:type=>"struct CUSTOM_TYPE const*", :name=>"abc123", :ptr? => true, :const? => true, :const_ptr? => true}
+                        ],
+                 :args_string=>"CUSTOM_TYPE abc, CUSTOM_TYPE* xyz_123, CUSTOM_TYPE const abcxyz, struct CUSTOM_TYPE const* const abc123",
+                 :args_call=>"abc, xyz_123, abcxyz, abc123" }]
+    result = @parser.parse("module", source)
+    assert_equal(expected, result[:functions])
+  end
+
+  it "handle arrays and treat them as pointers or strings" do
+    source = 'void KeyOperated(CUSTOM_TYPE thing1[], int thing2 [ ], ' \
+             'char thing3 [][2 ][ 3], int* thing4[4], u8 thing5[((u8)((5 + 5*2)/3))])'
+    expected_args = [
+      { type: 'CUSTOM_TYPE*', name: 'thing1', ptr?: true,  const?: false, const_ptr?: false },
+      { type: 'int*',         name: 'thing2', ptr?: true,  const?: false, const_ptr?: false },
+      # this one will likely change in the future when we improve multidimensional array support
+      { type: 'char*',        name: 'thing3', ptr?: false, const?: false, const_ptr?: false },
+      # this one will likely change in the future when we improve multidimensional array support
+      { type: 'int**',        name: 'thing4', ptr?: true,  const?: false, const_ptr?: false },
+      { type: 'u8*',          name: 'thing5', ptr?: true,  const?: false, const_ptr?: false }
+    ]
+    expected = [{:var_arg=>nil,
+                 :return=>{ :type   => "void",
+                            :name   => 'cmock_to_return',
+                            :ptr?   => false,
+                            :const? => false,
+                            :const_ptr? => false,
+                            :str    => "void cmock_to_return",
+                            :void?  => true
+                          },
+                 :name=>"KeyOperated",
+                 :unscoped_name=>"KeyOperated",
+                 :namespace=>[],
+                 :class=>nil,
+                 :modifier=>"",
+                 :contains_ptr? => true,
+                 :args => expected_args,
+                 :args_string => 'CUSTOM_TYPE* thing1, int* thing2, ' \
+                                 'char* thing3, int** thing4, u8* thing5',
+                 :args_call => 'thing1, thing2, thing3, thing4, thing5' }]
+    result = @parser.parse("module", source)
+    assert_equal(expected, result[:functions])
+  end
+
+  it "give a reasonable guess when dealing with weird combinations of custom types and modifiers" do
+    source = "void Cheese(unsigned CUSTOM_TYPE abc, unsigned xyz, CUSTOM_TYPE1 CUSTOM_TYPE2 pdq)"
+    expected = [{:var_arg=>nil,
+                 :return=>{ :type   => "void",
+                            :name   => 'cmock_to_return',
+                            :ptr?   => false,
+                            :const? => false,
+                            :const_ptr? => false,
+                            :str    => "void cmock_to_return",
+                            :void?  => true
+                          },
+                 :name=>"Cheese",
+                 :unscoped_name=>"Cheese",
+                 :namespace=>[],
+                 :class=>nil,
+                 :modifier=>"",
+                 :contains_ptr? => false,
+                 :args=>[ {:type=>"unsigned CUSTOM_TYPE", :name=>"abc", :ptr? => false, :const? => false, :const_ptr? => false},
+                          {:type=>"unsigned", :name=>"xyz", :ptr? => false, :const? => false, :const_ptr? => false},
+                          {:type=>"CUSTOM_TYPE1 CUSTOM_TYPE2", :name=>"pdq", :ptr? => false, :const? => false, :const_ptr? => false}
+                        ],
+                 :args_string=>"unsigned CUSTOM_TYPE abc, unsigned xyz, CUSTOM_TYPE1 CUSTOM_TYPE2 pdq",
+                 :args_call=>"abc, xyz, pdq" }]
+    result = @parser.parse("module", source)
+    assert_equal(expected, result[:functions])
+  end
+
+  it "extract functions containing a function pointer" do
+    source = "void FunkyTurkey(unsigned int (*func_ptr)(int, char))"
+    expected = [{ :var_arg=>nil,
+                 :return=>{ :type   => "void",
+                            :name   => 'cmock_to_return',
+                            :ptr?   => false,
+                            :const? => false,
+                            :const_ptr? => false,
+                            :str    => "void cmock_to_return",
+                            :void?  => true
+                          },
+                 :name=>"FunkyTurkey",
+                 :unscoped_name=>"FunkyTurkey",
+                 :namespace=>[],
+                 :class=>nil,
+                 :modifier=>"",
+                 :contains_ptr? => false,
+                 :args=>[ {:type=>"cmock_module_func_ptr1", :name=>"func_ptr", :ptr? => false, :const? => false, :const_ptr? => false}
+                        ],
+                 :args_string=>"cmock_module_func_ptr1 func_ptr",
+                 :args_call=>"func_ptr" }]
+    typedefs = ["typedef unsigned int(*cmock_module_func_ptr1)(int, char);"]
+    result = @parser.parse("module", source)
+    assert_equal(expected, result[:functions])
+    assert_equal(typedefs, result[:typedefs])
+  end
+
+  it "extract functions using a function pointer with shorthand notation" do
+    source = "void FunkyTurkey(unsigned int func_ptr(int, char))"
+    expected = [{ :var_arg=>nil,
+                 :return=>{ :type   => "void",
+                            :name   => 'cmock_to_return',
+                            :ptr?   => false,
+                            :const? => false,
+                            :const_ptr? => false,
+                            :str    => "void cmock_to_return",
+                            :void?  => true
+                          },
+                 :name=>"FunkyTurkey",
+                 :unscoped_name=>"FunkyTurkey",
+                 :namespace=>[],
+                 :class=>nil,
+                 :modifier=>"",
+                 :contains_ptr? => false,
+                 :args=>[ {:type=>"cmock_module_func_ptr1", :name=>"func_ptr", :ptr? => false, :const? => false, :const_ptr? => false}
+                        ],
+                 :args_string=>"cmock_module_func_ptr1 func_ptr",
+                 :args_call=>"func_ptr" }]
+    typedefs = ["typedef unsigned int(*cmock_module_func_ptr1)(int, char);"]
+    result = @parser.parse("module", source)
+    assert_equal(expected, result[:functions])
+    assert_equal(typedefs, result[:typedefs])
+  end
+
+  it "extract functions containing a function pointer with a void" do
+    source = "void FunkyTurkey(void (*func_ptr)(void))"
+    expected = [{ :var_arg=>nil,
+                 :return=>{ :type   => "void",
+                            :name   => 'cmock_to_return',
+                            :ptr?   => false,
+                            :const? => false,
+                            :const_ptr? => false,
+                            :str    => "void cmock_to_return",
+                            :void?  => true
+                          },
+                 :name=>"FunkyTurkey",
+                 :unscoped_name=>"FunkyTurkey",
+                 :namespace=>[],
+                 :class=>nil,
+                 :modifier=>"",
+                 :contains_ptr? => false,
+                 :args=>[ {:type=>"cmock_module_func_ptr1", :name=>"func_ptr", :ptr? => false, :const? => false, :const_ptr? => false}
+                        ],
+                 :args_string=>"cmock_module_func_ptr1 func_ptr",
+                 :args_call=>"func_ptr" }]
+    typedefs = ["typedef void(*cmock_module_func_ptr1)(void);"]
+    result = @parser.parse("module", source)
+    assert_equal(expected, result[:functions])
+    assert_equal(typedefs, result[:typedefs])
+  end
+
+  it "extract functions containing a function pointer with an implied void" do
+    source = "void FunkyTurkey(unsigned int (*func_ptr)())"
+    expected = [{ :var_arg=>nil,
+                 :return=>{ :type   => "void",
+                            :name   => 'cmock_to_return',
+                            :ptr?   => false,
+                            :const? => false,
+                            :const_ptr? => false,
+                            :str    => "void cmock_to_return",
+                            :void?  => true
+                          },
+                 :name=>"FunkyTurkey",
+                 :unscoped_name=>"FunkyTurkey",
+                 :namespace=>[],
+                 :class=>nil,
+                 :modifier=>"",
+                 :contains_ptr? => false,
+                 :args=>[ {:type=>"cmock_module_func_ptr1", :name=>"func_ptr", :ptr? => false, :const? => false, :const_ptr? => false}
+                        ],
+                 :args_string=>"cmock_module_func_ptr1 func_ptr",
+                 :args_call=>"func_ptr" }]
+    typedefs = ["typedef unsigned int(*cmock_module_func_ptr1)();"]
+    result = @parser.parse("module", source)
+    assert_equal(expected, result[:functions])
+    assert_equal(typedefs, result[:typedefs])
+  end
+
+  it "extract functions containing a constant function pointer and a pointer in the nested arg list" do
+    source = "void FunkyChicken(unsigned int (* const func_ptr)(unsigned long int * , char))"
+    expected = [{ :var_arg=>nil,
+                 :return=>{ :type   => "void",
+                            :name   => 'cmock_to_return',
+                            :ptr?   => false,
+                            :const? => false,
+                            :const_ptr? => false,
+                            :str    => "void cmock_to_return",
+                            :void?  => true
+                          },
+                 :name=>"FunkyChicken",
+                 :unscoped_name=>"FunkyChicken",
+                 :namespace=>[],
+                 :class=>nil,
+                 :modifier=>"",
+                 :contains_ptr? => false,
+                 :args=>[ {:type=>"cmock_module_func_ptr1", :name=>"func_ptr", :ptr? => false, :const? => true, :const_ptr? => false}
+                        ],
+                 :args_string=>"cmock_module_func_ptr1 const func_ptr",
+                 :args_call=>"func_ptr" }]
+    typedefs = ["typedef unsigned int(*cmock_module_func_ptr1)(unsigned long int* , char);"]
+    result = @parser.parse("module", source)
+    assert_equal(expected, result[:functions])
+    assert_equal(typedefs, result[:typedefs])
+  end
+
+  # it "extract functions containing a function pointer taking a vararg" do
+    # source = "void FunkyParrot(unsigned int (*func_ptr)(int, char, ...))"
+    # expected = [{ :var_arg=>nil,
+                 # :return=>{ :type   => "void",
+                            # :name   => 'cmock_to_return',
+                            # :ptr?   => false,
+                            # :const? => false,
+                            # :const_ptr? => false,
+                            # :str    => "void cmock_to_return",
+                            # :void?  => true
+                          # },
+                 # :name=>"FunkyParrot",
+                 # :unscoped_name=>"FunkyParrot",
+                 # :namespace=>[],
+                 # :class=>nil,
+                 # :modifier=>"",
+                 # :contains_ptr? => false,
+                 # :args=>[ {:type=>"cmock_module_func_ptr1", :name=>"func_ptr", :ptr? => false, :const? => false, :const_ptr? => false}
+                        # ],
+                 # :args_string=>"cmock_module_func_ptr1 func_ptr",
+                 # :args_call=>"func_ptr" }]
+    # typedefs = ["typedef unsigned int(*cmock_module_func_ptr1)(int, char, ...);"]
+    # result = @parser.parse("module", source)
+    # assert_equal(expected, result[:functions])
+    # assert_equal(typedefs, result[:typedefs])
+  # end
+
+  it "extract functions containing a function pointer with extra parenthesis and two sets" do
+    source = "void FunkyBudgie(int (((* func_ptr1)(int, char))), void (*func_ptr2)(void))"
+    expected = [{ :var_arg=>nil,
+                 :return=>{ :type   => "void",
+                            :name   => 'cmock_to_return',
+                            :ptr?   => false,
+                            :const? => false,
+                            :const_ptr? => false,
+                            :str    => "void cmock_to_return",
+                            :void?  => true
+                          },
+                 :name=>"FunkyBudgie",
+                 :unscoped_name=>"FunkyBudgie",
+                 :namespace=>[],
+                 :class=>nil,
+                 :modifier=>"",
+                 :contains_ptr? => false,
+                 :args=>[ {:type=>"cmock_module_func_ptr1", :name=>"func_ptr1", :ptr? => false, :const? => false, :const_ptr? => false},
+                          {:type=>"cmock_module_func_ptr2", :name=>"func_ptr2", :ptr? => false, :const? => false, :const_ptr? => false}
+                        ],
+                 :args_string=>"cmock_module_func_ptr1 func_ptr1, cmock_module_func_ptr2 func_ptr2",
+                 :args_call=>"func_ptr1, func_ptr2" }]
+    typedefs = ["typedef int(*cmock_module_func_ptr1)(int, char);", "typedef void(*cmock_module_func_ptr2)(void);"]
+    result = @parser.parse("module", source)
+    assert_equal(expected, result[:functions])
+    assert_equal(typedefs, result[:typedefs])
+  end
+
+  it "extract functions containing a function pointers, structs and other things" do
+    source = "struct mytype *FunkyRobin(uint16_t num1, uint16_t num2, void (*func_ptr1)(uint16_t num3, struct mytype2 *s));"
+    expected = [{ :var_arg=>nil,
+                 :return=>{ :type   => "struct mytype*",
+                            :name   => 'cmock_to_return',
+                            :ptr?   => true,
+                            :const? => false,
+                            :const_ptr? => false,
+                            :str    => "struct mytype* cmock_to_return",
+                            :void?  => false
+                          },
+                 :name=>"FunkyRobin",
+                 :unscoped_name=>"FunkyRobin",
+                 :namespace=>[],
+                 :class=>nil,
+                 :modifier=>"",
+                 :contains_ptr? => false,
+                 :args=>[ {:type=>"uint16_t", :name=>"num1", :ptr? => false, :const? => false, :const_ptr? => false},
+                          {:type=>"uint16_t", :name=>"num2", :ptr? => false, :const? => false, :const_ptr? => false},
+                          {:type=>"cmock_module_func_ptr1", :name=>"func_ptr1", :ptr? => false, :const? => false, :const_ptr? => false}
+                        ],
+                 :args_string=>"uint16_t num1, uint16_t num2, cmock_module_func_ptr1 func_ptr1",
+                 :args_call=>"num1, num2, func_ptr1" }]
+    typedefs = ["typedef void(*cmock_module_func_ptr1)(uint16_t num3, struct mytype2* s);"]
+    result = @parser.parse("module", source)
+    assert_equal(expected, result[:functions])
+    assert_equal(typedefs, result[:typedefs])
+  end
+
+  it "extract functions containing an anonymous function pointer" do
+    source = "void FunkyFowl(unsigned int (* const)(int, char))"
+    expected = [{ :var_arg=>nil,
+                 :return=>{ :type   => "void",
+                            :name   => 'cmock_to_return',
+                            :ptr?   => false,
+                            :const? => false,
+                            :const_ptr? => false,
+                            :str    => "void cmock_to_return",
+                            :void?  => true
+                          },
+                 :name=>"FunkyFowl",
+                 :unscoped_name=>"FunkyFowl",
+                 :namespace=>[],
+                 :class=>nil,
+                 :modifier=>"",
+                 :contains_ptr? => false,
+                 :args=>[ {:type=>"cmock_module_func_ptr1", :name=>"cmock_arg1", :ptr? => false, :const? => true, :const_ptr? => false}
+                        ],
+                 :args_string=>"cmock_module_func_ptr1 const cmock_arg1",
+                 :args_call=>"cmock_arg1" }]
+    typedefs = ["typedef unsigned int(*cmock_module_func_ptr1)(int, char);"]
+    result = @parser.parse("module", source)
+    assert_equal(expected, result[:functions])
+    assert_equal(typedefs, result[:typedefs])
+  end
+
+  it "extract functions returning a function pointer" do
+    source = "unsigned short (*FunkyPidgeon( const char op_code ))( int, long int )"
+    expected = [{ :var_arg=>nil,
+                 :return=>{ :type   => "cmock_module_func_ptr1",
+                            :name   => 'cmock_to_return',
+                            :ptr?   => false,
+                            :const? => false,
+                            :const_ptr? => false,
+                            :str    => "cmock_module_func_ptr1 cmock_to_return",
+                            :void?  => false
+                          },
+                 :name=>"FunkyPidgeon",
+                 :unscoped_name=>"FunkyPidgeon",
+                 :namespace=>[],
+                 :class=>nil,
+                 :modifier=>"",
+                 :contains_ptr? => false,
+                 :args=>[ {:type=>"char", :name=>"op_code", :ptr? => false, :const? => true, :const_ptr? => false}
+                        ],
+                 :args_string=>"const char op_code",
+                 :args_call=>"op_code" }]
+    typedefs = ["typedef unsigned short(*cmock_module_func_ptr1)( int, long int );"]
+    result = @parser.parse("module", source)
+    assert_equal(expected, result[:functions])
+    assert_equal(typedefs, result[:typedefs])
+  end
+
+  it "extract functions returning a function pointer with implied void" do
+    source = "unsigned short (*FunkyTweetie())()"
+    expected = [{ :var_arg=>nil,
+                 :return=>{ :type   => "cmock_module_func_ptr1",
+                            :name   => 'cmock_to_return',
+                            :ptr?   => false,
+                            :const? => false,
+                            :const_ptr? => false,
+                            :str    => "cmock_module_func_ptr1 cmock_to_return",
+                            :void?  => false
+                          },
+                 :name=>"FunkyTweetie",
+                 :unscoped_name=>"FunkyTweetie",
+                 :namespace=>[],
+                 :class=>nil,
+                 :modifier=>"",
+                 :contains_ptr? => false,
+                 :args=>[],
+                 :args_string=>"void",
+                 :args_call=>"" }]
+    typedefs = ["typedef unsigned short(*cmock_module_func_ptr1)();"]
+    result = @parser.parse("module", source)
+    assert_equal(expected, result[:functions])
+    assert_equal(typedefs, result[:typedefs])
+  end
+
+  it "extract functions returning a function pointer where everything is a void" do
+    source = "void (*   FunkySeaGull(void))(void)"
+    expected = [{ :var_arg=>nil,
+                 :return=>{ :type   => "cmock_module_func_ptr1",
+                            :name   => 'cmock_to_return',
+                            :ptr?   => false,
+                            :const? => false,
+                            :const_ptr? => false,
+                            :str    => "cmock_module_func_ptr1 cmock_to_return",
+                            :void?  => false
+                          },
+                 :name=>"FunkySeaGull",
+                 :unscoped_name=>"FunkySeaGull",
+                 :namespace=>[],
+                 :class=>nil,
+                 :modifier=>"",
+                 :contains_ptr? => false,
+                 :args=>[],
+                 :args_string=>"void",
+                 :args_call=>"" }]
+    typedefs = ["typedef void(*cmock_module_func_ptr1)(void);"]
+    result = @parser.parse("module", source)
+    assert_equal(expected, result[:functions])
+    assert_equal(typedefs, result[:typedefs])
+  end
+
+  it "extract functions returning a function pointer with some pointer nonsense" do
+    source = "unsigned int * (* FunkyMacaw(double* foo, THING *bar))(unsigned int)"
+    expected = [{ :var_arg=>nil,
+                 :return=>{ :type   => "cmock_module_func_ptr1",
+                            :name   => 'cmock_to_return',
+                            :ptr?   => false,
+                            :const? => false,
+                            :const_ptr? => false,
+                            :str    => "cmock_module_func_ptr1 cmock_to_return",
+                            :void?  => false
+                          },
+                 :name=>"FunkyMacaw",
+                 :unscoped_name=>"FunkyMacaw",
+                 :namespace=>[],
+                 :class=>nil,
+                 :modifier=>"",
+                 :contains_ptr? => true,
+                 :args=>[ {:type=>"double*", :name=>"foo", :ptr? => true, :const? => false, :const_ptr? => false},
+                          {:type=>"THING*", :name=>"bar", :ptr? => true, :const? => false, :const_ptr? => false}
+                        ],
+                 :args_string=>"double* foo, THING* bar",
+                 :args_call=>"foo, bar" }]
+    typedefs = ["typedef unsigned int *(*cmock_module_func_ptr1)(unsigned int);"]
+    result = @parser.parse("module", source)
+    assert_equal(expected, result[:functions])
+    assert_equal(typedefs, result[:typedefs])
+  end
+
+  it "extract this SQLite3 function with an anonymous function pointer arg (regression test)" do
+    source = "SQLITE_API int sqlite3_bind_text(sqlite3_stmt*, int, const char*, int n, void(*)(void*))"
+    expected = [{ :var_arg=>nil,
+                  :return=>{ :type   => "int",
+                             :name   => "cmock_to_return",
+                             :ptr?   => false,
+                             :const? => false,
+                             :const_ptr? => false,
+                             :str    => "int cmock_to_return",
+                             :void?  => false
+                           },
+                   :name=>"sqlite3_bind_text",
+                   :unscoped_name=>"sqlite3_bind_text",
+                   :namespace=>[],
+                   :class=>nil,
+                   :modifier=>"SQLITE_API",
+                   :contains_ptr? => true,
+                   :args=>[ {:type=>"sqlite3_stmt*", :name=>"cmock_arg2", :ptr? => true, :const? => false, :const_ptr? => false},
+                            {:type=>"int", :name=>"cmock_arg3", :ptr? => false, :const? => false, :const_ptr? => false},
+                            {:type=>"const char*", :name=>"cmock_arg4", :ptr? => false, :const? => true, :const_ptr? => false},
+                            {:type=>"int", :name=>"n", :ptr? => false, :const? => false, :const_ptr? => false},
+                            {:type=>"cmock_module_func_ptr1", :name=>"cmock_arg1", :ptr? => false, :const? => false, :const_ptr? => false}
+                          ],
+                   :args_string=>"sqlite3_stmt* cmock_arg2, int cmock_arg3, const char* cmock_arg4, int n, cmock_module_func_ptr1 cmock_arg1",
+                   :args_call=>"cmock_arg2, cmock_arg3, cmock_arg4, n, cmock_arg1" }]
+    typedefs = ["typedef void(*cmock_module_func_ptr1)(void*);"]
+    result = @parser.parse("module", source)
+    assert_equal(expected, result[:functions])
+    assert_equal(typedefs, result[:typedefs])
+  end
+
+  it "extract functions with varargs" do
+    source = "int XFiles(int Scully, int Mulder, ...);\n"
+    expected = [{ :var_arg=>"...",
+                  :return=> { :type   => "int",
+                              :name   => 'cmock_to_return',
+                              :ptr?   => false,
+                              :const? => false,
+                              :const_ptr? => false,
+                              :str    => "int cmock_to_return",
+                              :void?  => false
+                            },
+                  :name=>"XFiles",
+                  :unscoped_name=>"XFiles",
+                  :namespace=>[],
+                  :class=>nil,
+                  :modifier=>"",
+                  :contains_ptr? => false,
+                  :args=>[ {:type=>"int", :name=>"Scully", :ptr? => false, :const? => false, :const_ptr? => false},
+                           {:type=>"int", :name=>"Mulder", :ptr? => false, :const? => false, :const_ptr? => false}
+                         ],
+                  :args_string=>"int Scully, int Mulder",
+                  :args_call=>"Scully, Mulder"
+               }]
+    assert_equal(expected, @parser.parse("module", source)[:functions])
+  end
+
+  it "extract functions with void pointers" do
+    source = "void* MoreSillySongs(void* stuff);\n"
+    expected = [{ :var_arg=>nil,
+                  :return=> { :type   => "void*",
+                              :name   => 'cmock_to_return',
+                              :ptr?   => true,
+                              :const? => false,
+                              :const_ptr? => false,
+                              :str    => "void* cmock_to_return",
+                              :void?  => false
+                            },
+                  :name=>"MoreSillySongs",
+                  :unscoped_name=>"MoreSillySongs",
+                  :namespace=>[],
+                  :class=>nil,
+                  :modifier=>"",
+                  :contains_ptr? => true,
+                  :args=>[ {:type=>"void*", :name=>"stuff", :ptr? => true, :const? => false, :const_ptr? => false}
+                         ],
+                  :args_string=>"void* stuff",
+                  :args_call=>"stuff"
+               }]
+    assert_equal(expected, @parser.parse("module", source)[:functions])
+  end
+
+  it "extract functions with strippable confusing junk like gcc attributes" do
+    source = "int LaverneAndShirley(int Lenny, int Squiggy) __attribute__((weak)) __attribute__ ((deprecated));\n"
+    expected = [{ :var_arg=>nil,
+                  :return=> { :type   => "int",
+                              :name   => 'cmock_to_return',
+                              :ptr?   => false,
+                              :const? => false,
+                              :const_ptr? => false,
+                              :str    => "int cmock_to_return",
+                              :void?  => false
+                            },
+                  :name=>"LaverneAndShirley",
+                  :unscoped_name=>"LaverneAndShirley",
+                  :namespace=>[],
+                  :class=>nil,
+                  :modifier=>"",
+                  :contains_ptr? => false,
+                  :args=>[ {:type=>"int", :name=>"Lenny", :ptr? => false, :const? => false, :const_ptr? => false},
+                           {:type=>"int", :name=>"Squiggy", :ptr? => false, :const? => false, :const_ptr? => false}
+                         ],
+                  :args_string=>"int Lenny, int Squiggy",
+                  :args_call=>"Lenny, Squiggy"
+               }]
+    assert_equal(expected, @parser.parse("module", source)[:functions])
+  end
+
+  it "extract functions with strippable confusing junk like gcc attributes with parenthesis" do
+    source = "int TheCosbyShow(int Cliff, int Claire) __attribute__((weak, alias (\"__f\"));\n"
+    expected = [{ :var_arg=>nil,
+                  :return=> { :type   => "int",
+                              :name   => 'cmock_to_return',
+                              :ptr?   => false,
+                              :const? => false,
+                              :const_ptr? => false,
+                              :str    => "int cmock_to_return",
+                              :void?  => false
+                            },
+                  :name=>"TheCosbyShow",
+                  :unscoped_name=>"TheCosbyShow",
+                  :namespace=>[],
+                  :class=>nil,
+                  :modifier=>"",
+                  :contains_ptr? => false,
+                  :args=>[ {:type=>"int", :name=>"Cliff", :ptr? => false, :const? => false, :const_ptr? => false},
+                           {:type=>"int", :name=>"Claire", :ptr? => false, :const? => false, :const_ptr? => false}
+                         ],
+                  :args_string=>"int Cliff, int Claire",
+                  :args_call=>"Cliff, Claire"
+               }]
+    assert_equal(expected, @parser.parse("module", source)[:functions])
+  end
+
+  it "divines all permutations of ptr, const, and const_ptr correctly" do
+    truth_table = [
+      # argument                                           ptr    const  const_ptr
+      [ "constNOTconst constNOTconst",                     false, false, false ],
+      [ "const constNOTconst constNOTconst",               false, true,  false ],
+      [ "constNOTconst const constNOTconst",               false, true,  false ],
+      [ "constNOTconst *constNOTconst",                    true,  false, false ],
+      [ "const constNOTconst *constNOTconst",              true,  true,  false ],
+      [ "constNOTconst const *constNOTconst",              true,  true,  false ],
+      [ "constNOTconst *const constNOTconst",              true,  false, true ],
+      [ "const constNOTconst *const constNOTconst",        true,  true,  true ],
+      [ "constNOTconst const *const constNOTconst",        true,  true,  true ],
+      [ "constNOTconst **constNOTconst",                   true,  false, false ],
+      [ "const constNOTconst **constNOTconst",             true,  false, false ],
+      [ "constNOTconst const **constNOTconst",             true,  false, false ],
+      [ "constNOTconst *const *constNOTconst",             true,  true,  false ],
+      [ "const constNOTconst *const *constNOTconst",       true,  true,  false ],
+      [ "constNOTconst const *const *constNOTconst",       true,  true,  false ],
+      [ "constNOTconst **const constNOTconst",             true,  false, true ],
+      [ "const constNOTconst **const constNOTconst",       true,  false, true ],
+      [ "constNOTconst const **const constNOTconst",       true,  false, true ],
+      [ "constNOTconst *const *const constNOTconst",       true,  true,  true ],
+      [ "const constNOTconst *const *const constNOTconst", true,  true,  true ],
+      [ "constNOTconst const *const *const constNOTconst", true,  true,  true ]
+    ]
+
+    truth_table.each do |entry|
+      assert_equal(@parser.divine_ptr(entry[0]), entry[1])
+      assert_equal(@parser.divine_const(entry[0]), entry[2])
+      assert_equal(@parser.divine_ptr_and_const(entry[0]),
+        { ptr?: entry[1], const?: entry[2], const_ptr?: entry[3] })
+    end
+  end
+
+  it "divines ptr correctly for string types" do
+    truth_table = [
+      # argument                      ptr
+      [ "char s",                     false ],
+      [ "const char s",               false ],
+      [ "char const s",               false ],
+      [ "char *s",                    false ],
+      [ "const char *s",              false ],
+      [ "char const *s",              false ],
+      [ "char *const s",              false ],
+      [ "const char *const s",        false ],
+      [ "char const *const s",        false ],
+      [ "char **s",                   true  ],
+      [ "const char **s",             true  ],
+      [ "char const **s",             true  ],
+      [ "char *const *s",             true  ],
+      [ "const char *const *s",       true  ],
+      [ "char const *const *s",       true  ],
+      [ "char **const s",             true  ],
+      [ "const char **const s",       true  ],
+      [ "char const **const s",       true  ],
+      [ "char *const *const s",       true  ],
+      [ "const char *const *const s", true  ],
+      [ "char const *const *const s", true  ]
+    ]
+
+    truth_table.each do |entry|
+      assert_equal(@parser.divine_ptr(entry[0]), entry[1])
+    end
+  end
+
+  it "Transform inline functions doesn't change a header with no inlines" do
+    source =
+      "#ifndef _NOINCLUDES\n" +
+      "#define _NOINCLUDES\n" +
+      "#include \"unity.h\"\n" +
+      "#include \"cmock.h\"\n" +
+      "#include \"YetAnotherHeader.h\"\n" +
+      "\n" +
+      "/* Ignore the following warnings since we are copying code */\n" +
+      "#if defined(__GNUC__) && !defined(__ICC) && !defined(__TMS470__)\n" +
+      "#if __GNUC__ > 4 || (__GNUC__ == 4 && (__GNUC_MINOR__ > 6 || (__GNUC_MINOR__ == 6 && __GNUC_PATCHLEVEL__ > 0)))\n" +
+      "#pragma GCC diagnostic push\n" +
+      "#endif\n" +
+      "#if !defined(__clang__)\n" +
+      "#pragma GCC diagnostic ignored \"-Wpragmas\"\n" +
+      "#endif\n" +
+      "#pragma GCC diagnostic ignored \"-Wunknown-pragmas\"\n" +
+      "#pragma GCC diagnostic ignored \"-Wduplicate-decl-specifier\"\n" +
+      "#endif\n" +
+      "\n" +
+      "struct my_struct {\n" +
+      "int a;\n" +
+      "int b;\n" +
+      "int b;\n" +
+      "char c;\n" +
+      "};\n" +
+      "int my_function(int a);\n" +
+      "int my_better_function(struct my_struct *s);\n" +
+      "\n" +
+      "#endif _NOINCLUDES\n"
+
+    assert_equal(source, @parser.transform_inline_functions(source))
+  end
+
+  it "Transform inline functions changes inline functions to function declarations" do
+    source =
+      "#ifndef _NOINCLUDES\n" +
+      "#define _NOINCLUDES\n" +
+      "#include \"unity.h\"\n" +
+      "#include \"cmock.h\"\n" +
+      "#include \"YetAnotherHeader.h\"\n" +
+      "\n" +
+      "/* Ignore the following warnings since we are copying code */\n" +
+      "#if defined(__GNUC__) && !defined(__ICC) && !defined(__TMS470__)\n" +
+      "#if __GNUC__ > 4 || (__GNUC__ == 4 && (__GNUC_MINOR__ > 6 || (__GNUC_MINOR__ == 6 && __GNUC_PATCHLEVEL__ > 0)))\n" +
+      "#pragma GCC diagnostic push\n" +
+      "#endif\n" +
+      "#if !defined(__clang__)\n" +
+      "#pragma GCC diagnostic ignored \"-Wpragmas\"\n" +
+      "#endif\n" +
+      "#pragma GCC diagnostic ignored \"-Wunknown-pragmas\"\n" +
+      "#pragma GCC diagnostic ignored \"-Wduplicate-decl-specifier\"\n" +
+      "#endif\n" +
+      "\n" +
+      "struct my_struct {\n" +
+      "int a;\n" +
+      "int b;\n" +
+      "int b;\n" +
+      "char c;\n" +
+      "};\n" +
+      "int my_function(int a);\n" +
+      "int my_better_function(struct my_struct *s);\n" +
+      "static inline int staticinlinebar(struct my_struct *s)\n" + # This is a function with a lot of indentation levels, we should be able to handle it
+      "{\n" +
+      "\t{\n" +
+      "\t\t{\n" +
+      "\t\t\treturn s->a;\n" +
+      "\t\t}\n" +
+      "\t}\n" +
+      "}\n" +
+      "static inline int staticinlinefunc(struct my_struct *s)\n" +
+      "{\n" +
+      "    return s->a;\n" +
+      "}\n" +
+      "int bar(struct my_struct *s);\n" + # A normal function to screw with our parser
+      "inline static int inlinestaticfunc(int a) {\n" +
+      "    return a + 42;\n" +
+      "}\n" +
+      "inline int StaticInlineFunc(struct my_struct *s)\n" +
+      "{\n" +
+      "    return get_member_a(s) + 42;\n" +
+      "}\n" +
+      "int inline StaticInlineBar(struct my_struct *s)\n" +
+      "{\n" +
+      "    return get_member_a(s) + 42;\n" +
+      "}\n" +
+      "struct staticinlinestruct {\n" + # Add a structure declaration between the inline functions, just to make sure we don't touch it!
+      "int a;\n" +
+      "};\n" +
+      "\n" +
+      "struct staticinlinestruct fubarstruct(struct my_struct *s);\n" + # Another normal function to screw with our parser
+      "static inline struct staticinlinestruct inlinefubarfunction(struct my_struct *s)\n" +
+      "{\n" +
+      "    return (struct staticinlinestruct)*s;\n" +
+      "}\n" +
+      "int fubar(struct my_struct *s);\n" + # Another normal function to screw with our parser
+      "inline int stuff(int num)" +
+      "{" +
+      "    int reg = 0x12;" +
+      "    if (num > 0)" +
+      "    {" +
+      "      reg |= (0x0Eu);" +
+      "    }" +
+      "    else" +
+      "    {" +
+      "      reg |= (0x07u);" +
+      "    }" +
+      "    return reg;" +
+      "}" +
+      "\n" +
+      "int inline static dummy_func_2(int a, char b, float c) {" + # This is a sneaky one, inline static is placed AFTER the return value
+      "	c += 3.14;" +
+      "	b -= 32;" +
+      "	return a + (int)(b) + (int)c;" +
+      "}" +
+      "#endif _NOINCLUDES\n"
+
+    expected =
+      "#ifndef _NOINCLUDES\n" +
+      "#define _NOINCLUDES\n" +
+      "#include \"unity.h\"\n" +
+      "#include \"cmock.h\"\n" +
+      "#include \"YetAnotherHeader.h\"\n" +
+      "\n" +
+      "/* Ignore the following warnings since we are copying code */\n" +
+      "#if defined(__GNUC__) && !defined(__ICC) && !defined(__TMS470__)\n" +
+      "#if __GNUC__ > 4 || (__GNUC__ == 4 && (__GNUC_MINOR__ > 6 || (__GNUC_MINOR__ == 6 && __GNUC_PATCHLEVEL__ > 0)))\n" +
+      "#pragma GCC diagnostic push\n" +
+      "#endif\n" +
+      "#if !defined(__clang__)\n" +
+      "#pragma GCC diagnostic ignored \"-Wpragmas\"\n" +
+      "#endif\n" +
+      "#pragma GCC diagnostic ignored \"-Wunknown-pragmas\"\n" +
+      "#pragma GCC diagnostic ignored \"-Wduplicate-decl-specifier\"\n" +
+      "#endif\n" +
+      "\n" +
+      "struct my_struct {\n" +
+      "int a;\n" +
+      "int b;\n" +
+      "int b;\n" +
+      "char c;\n" +
+      "};\n" +
+      "int my_function(int a);\n" +
+      "int my_better_function(struct my_struct *s);\n" +
+      "int staticinlinebar(struct my_struct *s);\n" +
+      "int staticinlinefunc(struct my_struct *s);\n" +
+      "int bar(struct my_struct *s);\n" +
+      "int inlinestaticfunc(int a);\n" +
+      "int StaticInlineFunc(struct my_struct *s);\n" +
+      "int StaticInlineBar(struct my_struct *s);\n" +
+      "struct staticinlinestruct {\n" +
+      "int a;\n" +
+      "};\n" +
+      "\n" +
+      "struct staticinlinestruct fubarstruct(struct my_struct *s);\n" +
+      "struct staticinlinestruct inlinefubarfunction(struct my_struct *s);\n" +
+      "int fubar(struct my_struct *s);\n" +
+      "int stuff(int num);\n" +
+      "int dummy_func_2(int a, char b, float c);" +
+      "#endif _NOINCLUDES\n"
+
+    assert_equal(expected, @parser.transform_inline_functions(source))
+  end
+
+  it "Count number of pairs of braces in function succesfully" do
+    source =
+      "int foo(struct my_struct *s)\n" +
+      "{\n" +
+      "    return get_member_a(s) + 42;\n" +
+      "}\n"
+    complex_source =
+      "int bar(struct my_struct *s)\n" +
+      "{\n" +
+      "\tint a = 6;\n" +
+      "\tint res = foo(&(struct my_struct){.nr = a});\n" +
+      "\t{\n" +
+      "\t\tint a = 5;\n" +
+      "\t\tint res = foo(&(struct my_struct){.nr = a});\n" +
+      "\t\t{\n" +
+      "\t\t\tstruct my_struct a = {.nr = 1};\n" +
+      "\t\t}\n" +
+      "\t}\n" +
+      "\treturn 42;\n" +
+      "}\n"
+
+    assert_equal(1, @parser.count_number_of_pairs_of_braces_in_function(source))
+    assert_equal(6, @parser.count_number_of_pairs_of_braces_in_function(complex_source))
+  end
+
+  it "Count number of pairs of braces returns 0 if bad source is supplied" do
+    bad_source_0 =
+      "int foo(struct my_struct *s)\n" +
+      "{\n" +
+      "    return get_member_a(s) + 42;\n" +
+      "\n"                      # Missing closing brace
+    bad_source_1 =
+      "int bar(struct my_struct *s)\n" +
+      "{\n" +
+      "\tint a = 6;\n" +
+      "\tint res = foo(&(struct my_struct){.nr = a});\n" +
+      "\t{\n" +
+      "\t\tint a = 5;\n" +
+      "\t\tint res = foo(&(struct my_struct){.nr = a});\n" +
+      "\t\t{\n" +
+      "\t\t\n" +                # Missing closing brace
+      "\t}\n" +
+      "\treturn 42;\n" +
+      "}\n"
+    bad_source_2 =
+      "int foo(struct my_struct *s)\n" +
+      "\n"                      # No braces in source
+
+    assert_equal(0, @parser.count_number_of_pairs_of_braces_in_function(bad_source_0))
+    assert_equal(0, @parser.count_number_of_pairs_of_braces_in_function(bad_source_1))
+    assert_equal(0, @parser.count_number_of_pairs_of_braces_in_function(bad_source_2))
+  end
+
+  it "handles parsing multiline functions" do
+    source = "int\nLaverneAndShirley(int Lenny,\n                   int Squiggy);\n"
+    expected = [{ :var_arg=>nil,
+                  :return=> { :type   => "int",
+                              :name   => 'cmock_to_return',
+                              :ptr?   => false,
+                              :const? => false,
+                              :const_ptr? => false,
+                              :str    => "int cmock_to_return",
+                              :void?  => false
+                            },
+                  :name=>"LaverneAndShirley",
+                  :unscoped_name=>"LaverneAndShirley",
+                  :namespace=>[],
+                  :class=>nil,
+                  :modifier=>"",
+                  :contains_ptr? => false,
+                  :args=>[ {:type=>"int", :name=>"Lenny", :ptr? => false, :const? => false, :const_ptr? => false},
+                           {:type=>"int", :name=>"Squiggy", :ptr? => false, :const? => false, :const_ptr? => false}
+                         ],
+                  :args_string=>"int Lenny, int Squiggy",
+                  :args_call=>"Lenny, Squiggy"
+               }]
+    assert_equal(expected, @parser.parse("module", source)[:functions])
+  end
+
+  it "imports C++ differently when asked" do
+    source =
+    [
+      "namespace ns1 {\n",
+      "  namespace ns2 {\n",
+      "\n",
+      "    class cls1 {\n",
+      "      public:\n",
+      "        int f_header_impl(int a, int b){\n",
+      "          return a + b;\n",
+      "        }\n",
+      "\n",
+      "        static void f_void();\n",
+      "        static int f_ret_simple();\n",
+      "\n",
+      "      protected:\n",
+      "        static void protected_f_void();\n",
+      "\n",
+      "      public:\n",
+      "      private:\n",
+      "        static void private_f_void();\n",
+      "    }; // cls1\n",
+      "  } // ns2\n",
+      "} // ns1\n"
+    ].join
+
+    expected =
+    [
+      "namespace ns1 { namespace ns2 { class cls1 { public: int f_header_impl",
+      "static void f_void()",
+      "static int f_ret_simple()",
+      "protected: static void protected_f_void()",
+      "public: private: static void private_f_void()",
+      "}",
+      "} }"
+    ]
+
+    assert_equal(expected, @parser.import_source(source, cpp=true))
+    refute_equal(expected, @parser.import_source(source))
+  end
+
+  # only so parse_functions does not raise an error
+  def dummy_source
+    "void dummy(void);"
+  end
+
+  # Expected result of above
+  def dummy_func
+    { :name => "dummy",
+      :unscoped_name => "dummy",
+      :class => nil,
+      :namespace => [],
+      :var_arg => nil,
+      :args_string => "void",
+      :args => [],
+      :args_call => "",
+      :contains_ptr? => false,
+      :modifier => "",
+      :return => {
+        :type => "void",
+        :name => "cmock_to_return",
+        :str => "void cmock_to_return",
+        :void? => true,
+        :ptr? => false,
+        :const? => false,
+        :const_ptr? => false}}
+  end
+
+  # Commonly used example function
+  def voidvoid_func(namespace=[], name="Classic_functional")
+    { :name => name,
+      :unscoped_name => "functional",
+      :class => "Classic",
+      :namespace => namespace,
+      :var_arg => nil,
+      :args_string => "void",
+      :args => [],
+      :args_call => "",
+      :contains_ptr? => false,
+      :modifier => "",
+      :return => {
+        :type=>"void",
+        :name=>"cmock_to_return",
+        :str=>"void cmock_to_return",
+        :void? => true,
+        :ptr? => false,
+        :const? => false,
+        :const_ptr? => false}}
+  end
+
+  it "parses public C++ functions" do
+    source = dummy_source + <<~SOURCE
+      class Classic {
+        public:
+          static void functional(void);
+      };
+    SOURCE
+
+    expected = [dummy_func, voidvoid_func]
+
+    assert_equal(expected, @parser.parse("module", source)[:functions])
+  end
+
+  it "handles a namespace" do
+    source = dummy_source + <<~SOURCE
+      namespace ns1 {
+        class Classic {
+          public:
+            static void functional(void);
+        };
+      } // ns1
+    SOURCE
+
+    expected = [dummy_func,
+      voidvoid_func(namespace=["ns1"], name="ns1_Classic_functional")]
+
+    assert_equal(expected, @parser.parse("module", source)[:functions])
+  end
+
+  it "handles nested namespaces" do
+    source = dummy_source + <<~SOURCE
+      namespace ns1 {
+        namespace ns2 {
+          class Classic {
+            public:
+              static void functional(void);
+          };
+        } // ns1
+      } // ns1
+    SOURCE
+
+    expected = [dummy_func,
+      voidvoid_func(namespace=["ns1", "ns2"], name="ns1_ns2_Classic_functional")]
+
+    assert_equal(expected, @parser.parse("module", source)[:functions])
+  end
+
+  it "ignores non-static C++ functions" do
+    source = dummy_source + <<~SOURCE
+      class Classic {
+        public:
+          void functional(void);
+      };
+    SOURCE
+
+    expected = [dummy_func]
+
+    assert_equal(expected, @parser.parse("module", source)[:functions])
+  end
+
+  it "ignores private functions" do
+    source = dummy_source + <<~SOURCE
+      class Classic {
+        private:
+          static void functional(void);
+      };
+    SOURCE
+
+    expected = [dummy_func]
+
+    assert_equal(expected, @parser.parse("module", source)[:functions])
+  end
+
+  it "parses public C++ functions after private functions" do
+    source = dummy_source + <<~SOURCE
+      class Classic {
+        private:
+          static void ignoreme(void);
+        public:
+          static void functional(void);
+      };
+    SOURCE
+
+    expected = [dummy_func, voidvoid_func]
+
+    assert_equal(expected, @parser.parse("module", source)[:functions])
+  end
+
+  it "ignores protected functions" do
+    source = dummy_source + <<~SOURCE
+      class Classic {
+        protected:
+          static void functional(void);
+      };
+    SOURCE
+
+    expected = [dummy_func]
+
+    assert_equal(expected, @parser.parse("module", source)[:functions])
+  end
+
+  it "parses public C++ functions after protected functions" do
+    source = dummy_source + <<~SOURCE
+      class Classic {
+        protected:
+          static void ignoreme(void);
+        public:
+          static void functional(void);
+      };
+    SOURCE
+
+    expected = [dummy_func, voidvoid_func]
+
+    assert_equal(expected, @parser.parse("module", source)[:functions])
+  end
+
+  it "parses multiple classes in same file with uniquely named functions" do
+    source = dummy_source + <<~SOURCE
+      namespace ns1 {
+        class Classic {
+          public:
+            static void functional(void);
+        };
+
+        class Classical {
+          public:
+            static int functionality(int a);
+        };
+      } // ns1
+
+      class Classy {
+        public:
+          static int* func(int* a);
+      };
+    SOURCE
+
+    expected = [dummy_func,
+      voidvoid_func(["ns1"], name="ns1_Classic_functional"),
+      { :name => "ns1_Classical_functionality",
+        :unscoped_name => "functionality",
+        :class => "Classical",
+        :namespace => ["ns1"],
+        :var_arg => nil,
+        :args_string => "int a",
+        :args => [
+          { :ptr? => false,
+            :const? => false,
+            :const_ptr? => false,
+            :name => "a",
+            :type => "int"}],
+        :args_call => "a",
+        :contains_ptr? => false,
+        :modifier => "",
+        :return => {
+          :type=>"int",
+          :name=>"cmock_to_return",
+          :str=>"int cmock_to_return",
+          :void? => false,
+          :ptr? => false,
+          :const? => false,
+          :const_ptr? => false}},
+      { :name => "Classy_func",
+        :unscoped_name => "func",
+        :class => "Classy",
+        :namespace => [],
+        :var_arg => nil,
+        :args_string => "int* a",
+        :args => [
+          { :ptr? => true,
+            :const? => false,
+            :const_ptr? => false,
+            :name => "a",
+            :type => "int*"}],
+        :args_call => "a",
+        :contains_ptr? => true,
+        :modifier => "",
+        :return => {
+          :type=>"int*",
+          :name=>"cmock_to_return",
+          :str=>"int* cmock_to_return",
+          :void? => false,
+          :ptr? => true,
+          :const? => false,
+          :const_ptr? => false}}]
+
+    assert_equal(expected, @parser.parse("module", source)[:functions])
+  end
+
+  it "handles multiple classes in same file with identically named functions" do
+    source = dummy_source + <<~SOURCE
+      namespace ns1 {
+        class Classic {
+          public:
+            static void functional(void);
+        };
+
+        class Classical {
+          public:
+            static int functional(int a);
+        };
+      } // ns1
+
+      class Classy {
+        public:
+          static int* functional(int* a);
+      };
+    SOURCE
+
+    expected = [dummy_func,
+      voidvoid_func(["ns1"], name="ns1_Classic_functional"),
+      { :name => "ns1_Classical_functional",
+        :unscoped_name => "functional",
+        :class => "Classical",
+        :namespace => ["ns1"],
+        :var_arg => nil,
+        :args_string => "int a",
+        :args => [
+          { :ptr? => false,
+            :const? => false,
+            :const_ptr? => false,
+            :name => "a",
+            :type => "int"}],
+        :args_call => "a",
+        :contains_ptr? => false,
+        :modifier => "",
+        :return => {
+          :type=>"int",
+          :name=>"cmock_to_return",
+          :str=>"int cmock_to_return",
+          :void? => false,
+          :ptr? => false,
+          :const? => false,
+          :const_ptr? => false}},
+      { :name => "Classy_functional",
+        :unscoped_name => "functional",
+        :class => "Classy",
+        :namespace => [],
+        :var_arg => nil,
+        :args_string => "int* a",
+        :args => [
+          { :ptr? => true,
+            :const? => false,
+            :const_ptr? => false,
+            :name => "a",
+            :type => "int*"}],
+        :args_call => "a",
+        :contains_ptr? => true,
+        :modifier => "",
+        :return => {
+          :type=>"int*",
+          :name=>"cmock_to_return",
+          :str=>"int* cmock_to_return",
+          :void? => false,
+          :ptr? => true,
+          :const? => false,
+          :const_ptr? => false}}]
+
+    assert_equal(expected, @parser.parse("module", source)[:functions])
+  end
+
+  it "Transform inline functions can handle inline function declarations" do
+    source =
+      "static inline int dummy_func_decl(int a, char b, float c);\n" + # First declaration
+      "static inline int dummy_func_decl2(int a, char b, float c)\n\n\n\n\n\n;\n" + # Second declaration with a lot of newlines before the semicolon to mess with the parser
+      "static inline int staticinlinefunc(struct my_struct *s)\n" + # 'normal' inline pattern
+      "{\n" +
+      "    return dummy_func_decl(1, 1, 1);\n" +
+      "}\n" +
+      "struct my_struct_with_inline_in_it\n" + # struct definition in between to mess with the parser
+      "{\n" +
+      "    int a;\n" +
+      "    char b;\n" +
+      "    float inlineb;\n" +
+      "};\n" +
+      "static inline int dummy_func_decl(int a, char b, float c) {\n" + # Second user pattern
+      "	return 42;\n" +
+      "}\n" +
+      "\n"
+
+    expected =
+      "int dummy_func_decl(int a, char b, float c);\n" +
+      "int dummy_func_decl2(int a, char b, float c)\n\n\n\n\n\n;\n" + # Second declaration with a lot of newlines until the semicolon to mess with the parser
+      "int staticinlinefunc(struct my_struct *s);\n" +
+      "struct my_struct_with_inline_in_it\n" +
+      "{\n" +
+      "    int a;\n" +
+      "    char b;\n" +
+      "    float inlineb;\n" +
+      "};\n" +
+      "int dummy_func_decl(int a, char b, float c);\n" +
+      "\n"
+
+    @parser.treat_inlines = :include
+    assert_equal(expected, @parser.transform_inline_functions(source))
+  end
+
+  it "Transform inline functions can handle header with only inline function declarations" do
+    source =
+      "static inline int dummy_func_decl(int a, char b, float c);\n" +
+      "\n"
+
+    expected =
+      "int dummy_func_decl(int a, char b, float c);\n" +
+      "\n"
+
+    @parser.treat_inlines = :include
+    assert_equal(expected, @parser.transform_inline_functions(source))
+  end
+
+  it "Transform inline functions takes user provided patterns into account" do
+    source =
+      "static __inline__ __attribute__ ((always_inline)) uint16_t _somefunc (uint32_t a)\n" +
+      "{\n" +
+      "    return _someotherfunc (a);\n" +
+      "}\n" +
+      "static __inline__ uint16_t _somefunc_0  (uint32_t a)\n" +
+      "{\n" +
+      "    return (uint16_t) a;\n" +
+      "}\n" +
+      "\n"
+
+    expected =
+      "uint16_t _somefunc (uint32_t a);\n" +
+      "uint16_t _somefunc_0  (uint32_t a);\n" +
+      "\n"
+
+    @parser.treat_inlines = :include
+    @parser.inline_function_patterns = ['static __inline__ __attribute__ \(\(always_inline\)\)', 'static __inline__']
+    assert_equal(expected, @parser.transform_inline_functions(source))
+  end
+
+  it "Transform inline functions limits deleting user macro to actual line/word" do
+    source =
+      "#if defined (FORCE_INLINE)\n" +
+      "#define MY_LIBRARY_INLINE static __inline__ __attribute__ ((always_inline))\n" +
+      "#else\n" +
+      "#define MY_LIBRARY_INLINE\n" +
+      "#endif\n" +
+      "#define INLINE static __inline__ __attribute__ ((always_inline))\n" +
+      "#define INLINE_TWO \\\nstatic\\\ninline\n" +
+      "INLINE uint16_t _somefunc (uint32_t a)\n" +
+      "{\n" +
+      "    return _someotherfunc (a);\n" +
+      "}\n" +
+      "static __inline__ uint16_t _somefunc_0  (uint32_t a)\n" +
+      "{\n" +
+      "    return (uint16_t) a;\n" +
+      "}\n" +
+      "static __inline__ __attribute__ \(\(always_inline\)\) uint16_t _somefunc_1  (uint32_t a)\n" +
+      "{\n" +
+      "    return (uint16_t) a;\n" +
+      "}\n" +
+      "INLINE_TWO uint16_t _somefunc_2(uint32_t a)\n" +
+      "{\n" +
+      "    return (uint16_t) a;\n" +
+      "}\n" +
+      "#define INLINE_THREE \\\nstatic\\\ninline"
+
+    expected =
+      "#if defined (FORCE_INLINE)\n" +
+      "#else\n" +
+      "#endif\n" +
+      "uint16_t _somefunc (uint32_t a);\n" +
+      "uint16_t _somefunc_0  (uint32_t a);\n" +
+      "uint16_t _somefunc_1  (uint32_t a);\n" +
+      "uint16_t _somefunc_2(uint32_t a);\n"
+
+    @parser.treat_inlines = :include
+    @parser.inline_function_patterns = ['MY_LIBRARY_INLINE', 'INLINE_THREE', 'INLINE_TWO', 'INLINE', 'static __inline__ __attribute__ \(\(always_inline\)\)', 'static __inline__']
+    assert_equal(expected, @parser.transform_inline_functions(source))
+  end
+
+end
diff --git a/FreeRTOS-Plus/Test/CMock/test/unit/cmock_plugin_manager_test.rb b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_plugin_manager_test.rb
new file mode 100644
index 000000000..f9f0e640c
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_plugin_manager_test.rb
@@ -0,0 +1,100 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+require File.expand_path(File.dirname(__FILE__)) + "/../test_helper"
+require File.expand_path(File.dirname(__FILE__)) + '/../../lib/cmock_plugin_manager'
+require File.expand_path(File.dirname(__FILE__)) + '/../../lib/cmock_generator_plugin_expect'
+require File.expand_path(File.dirname(__FILE__)) + '/../../lib/cmock_generator_plugin_ignore'
+require File.expand_path(File.dirname(__FILE__)) + '/../../lib/cmock_generator_plugin_cexception'
+
+describe CMockPluginManager, "Verify CMockPluginManager Module" do
+
+  before do
+    create_mocks :utils, :pluginA, :pluginB
+    @config = create_stub(
+      :respond_to => true,
+      :when_ptr => :compare_data,
+      :enforce_strict_ordering => false,
+      :ignore => :args_and_calls
+    )
+
+    def @config.plugins
+      if instance_variable_defined?(:@plugins)
+        @plugins || []
+      else
+        []
+      end
+    end
+
+    def @config.plugins=(val)
+      @plugins = val
+    end
+  end
+
+  after do
+  end
+
+  it "return all plugins by default" do
+    @config.plugins = ['cexception','ignore']
+    @utils.expect :helpers, {}
+
+    @cmock_plugins = CMockPluginManager.new(@config, @utils)
+
+    test_plugins = @cmock_plugins.plugins
+    contained = { :expect => false, :ignore => false, :cexception => false }
+    test_plugins.each do |plugin|
+      contained[:expect]     = true   if plugin.instance_of?(CMockGeneratorPluginExpect)
+      contained[:ignore]     = true   if plugin.instance_of?(CMockGeneratorPluginIgnore)
+      contained[:cexception] = true   if plugin.instance_of?(CMockGeneratorPluginCexception)
+    end
+    assert_equal(true, contained[:expect])
+    assert_equal(true, contained[:ignore])
+    assert_equal(true, contained[:cexception])
+  end
+
+  it "return restricted plugins based on config" do
+    @utils.expect :helpers, {}
+
+    @cmock_plugins = CMockPluginManager.new(@config, @utils)
+
+    test_plugins = @cmock_plugins.plugins
+    contained = { :expect => false, :ignore => false, :cexception => false }
+    test_plugins.each do |plugin|
+      contained[:expect]     = true   if plugin.instance_of?(CMockGeneratorPluginExpect)
+      contained[:ignore]     = true   if plugin.instance_of?(CMockGeneratorPluginIgnore)
+      contained[:cexception] = true   if plugin.instance_of?(CMockGeneratorPluginCexception)
+    end
+    assert_equal(true, contained[:expect])
+    assert_equal(false,contained[:ignore])
+    assert_equal(false,contained[:cexception])
+  end
+
+  it "run a desired method over each plugin requested and return the results" do
+    @utils.expect :helpers, {}
+    @cmock_plugins = CMockPluginManager.new(@config, @utils)
+
+    @pluginA = create_stub(:test_method => ["This Is An Awesome Test-"])
+    @pluginB = create_stub(:test_method => ["And This is Part 2-","Of An Awesome Test"])
+    @cmock_plugins.plugins = [@pluginA, @pluginB]
+
+    expected = "This Is An Awesome Test-And This is Part 2-Of An Awesome Test"
+    output   = @cmock_plugins.run(:test_method)
+    assert_equal(expected, output)
+  end
+
+  it "run a desired method and arg list over each plugin requested and return the results" do
+    @utils.expect :helpers, {}
+    @cmock_plugins = CMockPluginManager.new(@config, @utils)
+
+    @pluginA = create_stub(:test_method => ["This Is An Awesome Test-"])
+    @pluginB = create_stub(:test_method => ["And This is Part 2-","Of An Awesome Test"])
+    @cmock_plugins.plugins = [@pluginA, @pluginB]
+
+    expected = "This Is An Awesome Test-And This is Part 2-Of An Awesome Test"
+    output   = @cmock_plugins.run(:test_method, "chickenpotpie")
+    assert_equal(expected, output)
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/test/unit/cmock_unityhelper_parser_test.rb b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_unityhelper_parser_test.rb
new file mode 100644
index 000000000..987b0d697
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/test/unit/cmock_unityhelper_parser_test.rb
@@ -0,0 +1,223 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+require File.expand_path(File.dirname(__FILE__)) + "/../test_helper"
+require File.expand_path(File.dirname(__FILE__)) + '/../../lib/cmock_unityhelper_parser'
+
+describe CMockUnityHelperParser, "Verify CMockUnityHelperParser Module" do
+
+  before do
+    create_mocks :config
+  end
+
+  after do
+  end
+
+  it "ignore lines that are commented out" do
+    source =
+      " abcd;\n" +
+      "// #define UNITY_TEST_ASSERT_EQUAL_CHICKENS(a,b,line,msg) {...};\n" +
+      "or maybe // #define UNITY_TEST_ASSERT_EQUAL_CHICKENS(a,b,line,msg) {...};\n\n"
+    @config.expect :plugins, [] #not :array
+    @config.expect :treat_as, {}
+    @config.expect :load_unity_helper, source
+    @parser = CMockUnityHelperParser.new(@config)
+    expected = {}
+
+    assert_equal(expected, @parser.c_types)
+  end
+
+  it "ignore stuff in block comments" do
+    source =
+      " abcd; /*\n" +
+      "#define UNITY_TEST_ASSERT_EQUAL_CHICKENS(a,b,line,msg) {...};\n" +
+      "#define UNITY_TEST_ASSERT_EQUAL_CHICKENS(a,b,line,msg) {...};\n */\n"
+    @config.expect :plugins, [] #not :array
+    @config.expect :treat_as, {}
+    @config.expect :load_unity_helper, source
+    @parser = CMockUnityHelperParser.new(@config)
+    expected = {}
+
+    assert_equal(expected, @parser.c_types)
+  end
+
+  it "notice equal helpers in the proper form and ignore others" do
+    source =
+      "abcd;\n" +
+      "#define UNITY_TEST_ASSERT_EQUAL_TURKEYS_T(a,b,line,msg) {...};\n" +
+      "abcd;\n" +
+      "#define UNITY_TEST_ASSERT_EQUAL_WRONG_NUM_ARGS(a,b,c,d,e) {...};\n" +
+      "#define UNITY_TEST_ASSERT_WRONG_NAME_EQUAL(a,b,c,d) {...};\n" +
+      "#define UNITY_TEST_ASSERT_EQUAL_unsigned_funky_rabbits(a,b,c,d) {...};\n" +
+      "abcd;\n"
+    @config.expect :plugins, [] #not :array
+    @config.expect :treat_as, {}
+    @config.expect :load_unity_helper, source
+    @parser = CMockUnityHelperParser.new(@config)
+    expected = {
+      'TURKEYS_T' => "UNITY_TEST_ASSERT_EQUAL_TURKEYS_T",
+      'unsigned_funky_rabbits' => "UNITY_TEST_ASSERT_EQUAL_unsigned_funky_rabbits"
+    }
+
+    assert_equal(expected, @parser.c_types)
+  end
+
+  it "notice equal helpers that contain arrays" do
+    source =
+      "abcd;\n" +
+      "#define UNITY_TEST_ASSERT_EQUAL_TURKEYS_ARRAY(a,b,c,d,e) {...};\n" +
+      "abcd;\n" +
+      "#define UNITY_TEST_ASSERT_EQUAL_WRONG_NUM_ARGS_ARRAY(a,b,c,d,e,f) {...};\n" +
+      "#define UNITY_TEST_ASSERT_WRONG_NAME_EQUAL_ARRAY(a,b,c,d,e) {...};\n" +
+      "#define UNITY_TEST_ASSERT_EQUAL_unsigned_funky_rabbits_ARRAY(a,b,c,d,e) {...};\n" +
+      "abcd;\n"
+    @config.expect :plugins, [] #not :array
+    @config.expect :treat_as, {}
+    @config.expect :load_unity_helper, source
+    @parser = CMockUnityHelperParser.new(@config)
+    expected = {
+      'TURKEYS*' => "UNITY_TEST_ASSERT_EQUAL_TURKEYS_ARRAY",
+      'unsigned_funky_rabbits*' => "UNITY_TEST_ASSERT_EQUAL_unsigned_funky_rabbits_ARRAY"
+    }
+
+    assert_equal(expected, @parser.c_types)
+  end
+
+  it "pull in the standard set of helpers and add them to my list" do
+    pairs = {
+      "UINT"          => "HEX32",
+      "unsigned long" => "HEX64",
+    }
+    expected = {
+      "UINT"          => "UNITY_TEST_ASSERT_EQUAL_HEX32",
+      "unsigned_long" => "UNITY_TEST_ASSERT_EQUAL_HEX64",
+      "UINT*"         => "UNITY_TEST_ASSERT_EQUAL_HEX32_ARRAY",
+      "unsigned_long*"=> "UNITY_TEST_ASSERT_EQUAL_HEX64_ARRAY",
+    }
+    @config.expect :plugins, [] #not :array
+    @config.expect :treat_as, pairs
+    @config.expect :load_unity_helper, nil
+    @parser = CMockUnityHelperParser.new(@config)
+
+    assert_equal(expected, @parser.c_types)
+  end
+
+  it "pull in the user specified set of helpers and add them to my list" do
+    pairs = {
+      "char*"         => "STRING",
+      "unsigned  int" => "HEX32",
+    }
+    expected = {
+      "char*"         => "UNITY_TEST_ASSERT_EQUAL_STRING",
+      "unsigned_int"  => "UNITY_TEST_ASSERT_EQUAL_HEX32",
+      "char**"        => "UNITY_TEST_ASSERT_EQUAL_STRING_ARRAY",
+      "unsigned_int*" => "UNITY_TEST_ASSERT_EQUAL_HEX32_ARRAY",
+    }
+    @config.expect :plugins, [] #not :array
+    @config.expect :treat_as, pairs
+    @config.expect :load_unity_helper, nil
+    @parser = CMockUnityHelperParser.new(@config)
+
+    assert_equal(expected, @parser.c_types)
+  end
+
+  it "be able to fetch helpers on my list" do
+    @config.expect :plugins, [] #not :array
+    @config.expect :treat_as, {}
+    @config.expect :load_unity_helper, ""
+    @parser = CMockUnityHelperParser.new(@config)
+    @parser.c_types = {
+      'UINT8'     => "UNITY_TEST_ASSERT_EQUAL_UINT8",
+      'UINT16*'   => "UNITY_TEST_ASSERT_EQUAL_UINT16_ARRAY",
+      'SPINACH'   => "UNITY_TEST_ASSERT_EQUAL_SPINACH",
+      'LONG_LONG' => "UNITY_TEST_ASSERT_EQUAL_LONG_LONG"
+    }
+
+    [["UINT8","UINT8"],
+     ["UINT16*","UINT16_ARRAY"],
+     ["const SPINACH","SPINACH"],
+     ["LONG LONG","LONG_LONG"] ].each do |ctype, exptype|
+      assert_equal(["UNITY_TEST_ASSERT_EQUAL_#{exptype}",''], @parser.get_helper(ctype))
+    end
+  end
+
+  it "return memory comparison when asked to fetch helper of types not on my list" do
+    @config.expect :plugins, [] #not :array
+    @config.expect :treat_as, {}
+    @config.expect :load_unity_helper, ""
+    @parser = CMockUnityHelperParser.new(@config)
+    @parser.c_types = {
+      'UINT8'   => "UNITY_TEST_ASSERT_EQUAL_UINT8",
+      'UINT16*' => "UNITY_TEST_ASSERT_EQUAL_UINT16_ARRAY",
+      'SPINACH' => "UNITY_TEST_ASSERT_EQUAL_SPINACH",
+    }
+
+    ["UINT32","SPINACH_T","SALAD","PINEAPPLE"].each do |ctype|
+      @config.expect :memcmp_if_unknown, true
+      assert_equal(["UNITY_TEST_ASSERT_EQUAL_MEMORY",'&'], @parser.get_helper(ctype))
+    end
+  end
+
+  it "return memory array comparison when asked to fetch helper of types not on my list" do
+    @config.expect :plugins, [:array]
+    @config.expect :treat_as, {}
+    @config.expect :load_unity_helper, ""
+    @parser = CMockUnityHelperParser.new(@config)
+    @parser.c_types = {
+      'UINT8'   => "UNITY_TEST_ASSERT_EQUAL_UINT8",
+      'UINT16*' => "UNITY_TEST_ASSERT_EQUAL_UINT16_ARRAY",
+      'SPINACH' => "UNITY_TEST_ASSERT_EQUAL_SPINACH",
+    }
+
+    ["UINT32*","SPINACH_T*"].each do |ctype|
+      @config.expect :memcmp_if_unknown, true
+      assert_equal(["UNITY_TEST_ASSERT_EQUAL_MEMORY_ARRAY",''], @parser.get_helper(ctype))
+    end
+  end
+
+  it "return the array handler if we cannot find the normal handler" do
+    @config.expect :plugins, [] #not :array
+    @config.expect :treat_as, {}
+    @config.expect :load_unity_helper, ""
+    @parser = CMockUnityHelperParser.new(@config)
+    @parser.c_types = {
+      'UINT8'   => "UNITY_TEST_ASSERT_EQUAL_UINT8",
+      'UINT16*' => "UNITY_TEST_ASSERT_EQUAL_UINT16_ARRAY",
+      'SPINACH' => "UNITY_TEST_ASSERT_EQUAL_SPINACH",
+    }
+
+      assert_equal(["UNITY_TEST_ASSERT_EQUAL_UINT16_ARRAY",'&'], @parser.get_helper("UINT16"))
+  end
+
+  it "return the normal handler if we cannot find the array handler" do
+    @config.expect :plugins, [] #not :array
+    @config.expect :treat_as, {}
+    @config.expect :load_unity_helper, ""
+    @parser = CMockUnityHelperParser.new(@config)
+    @parser.c_types = {
+      'UINT8'   => "UNITY_TEST_ASSERT_EQUAL_UINT8",
+      'UINT16'  => "UNITY_TEST_ASSERT_EQUAL_UINT16",
+      'SPINACH' => "UNITY_TEST_ASSERT_EQUAL_SPINACH",
+    }
+
+      assert_equal(["UNITY_TEST_ASSERT_EQUAL_UINT8",'*'], @parser.get_helper("UINT8*"))
+  end
+
+  it "raise error when asked to fetch helper of type not on my list and not allowed to mem check" do
+    @config.expect :plugins, [] #not :array
+    @config.expect :treat_as, {}
+    @config.expect :load_unity_helper, ""
+    @config.expect :memcmp_if_unknown, false
+    @parser = CMockUnityHelperParser.new(@config)
+    @parser.c_types = {
+      'UINT8'   => "UNITY_TEST_ASSERT_EQUAL_UINT8",
+      'UINT32*' => "UNITY_TEST_ASSERT_EQUAL_UINT32_ARRAY",
+      'SPINACH' => "UNITY_TEST_ASSERT_EQUAL_SPINACH",
+    }
+
+    assert_raises (RuntimeError) { @parser.get_helper("UINT16") }
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/behaviors/Manifest.txt b/FreeRTOS-Plus/Test/CMock/vendor/behaviors/Manifest.txt
new file mode 100644
index 000000000..6c954ecce
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/behaviors/Manifest.txt
@@ -0,0 +1,9 @@
+Manifest.txt
+Rakefile
+lib/behaviors.rb
+lib/behaviors/reporttask.rb
+test/behaviors_tasks_test.rb
+test/behaviors_test.rb
+test/tasks_test/lib/user.rb
+test/tasks_test/Rakefile
+test/tasks_test/test/user_test.rb
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/behaviors/Rakefile b/FreeRTOS-Plus/Test/CMock/vendor/behaviors/Rakefile
new file mode 100644
index 000000000..d4d68b995
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/behaviors/Rakefile
@@ -0,0 +1,19 @@
+require 'rake'
+require 'rubygems'
+require 'hoe'
+
+Hoe.new('behaviors','1.0.3') do |p|
+  p.author = "Atomic Object LLC" 
+  p.email = "dev@atomicobject.com" 
+  p.url = "http://behaviors.rubyforge.org" 
+  p.summary = "behavior-driven unit test helper" 
+  p.description = <<-EOS
+Behaviors allows for Test::Unit test case methods to be defined as 
+human-readable descriptions of program behavior. It also provides 
+Rake tasks to list the behaviors of your project.
+  EOS
+  p.test_globs = ['test/*_test.rb']
+
+  p.changes = <<-EOS
+  EOS
+end
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/behaviors/lib/behaviors.rb b/FreeRTOS-Plus/Test/CMock/vendor/behaviors/lib/behaviors.rb
new file mode 100644
index 000000000..d8d70f704
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/behaviors/lib/behaviors.rb
@@ -0,0 +1,76 @@
+=begin rdoc
+= Usage
+Behaviors provides a single method: should.
+  
+Instead of naming test methods like:
+
+ def test_something
+ end
+
+You declare test methods like:
+
+ should "perform action" do
+ end
+
+You may omit the body of a <tt>should</tt> method to describe unimplemented behavior.
+
+ should "perform other action"
+
+When you run your unit tests, empty <tt>should</tt> methods will appear as an 'UNIMPLEMENTED CASE' along with the described behavior.
+This is useful for sketching out planned behavior quickly.
+
+Simply <tt>extend Behaviors</tt> in your <tt>TestCase</tt> to start using behaviors. 
+
+  require 'test/unit'
+  require 'behaviors'
+  require 'user'
+
+  class UserTest < Test::Unit::TestCase
+    extend Behaviors
+    ...
+  end
+
+= Motivation
+Test methods typically focus on the name of the method under test instead of its behavior.
+Creating test methods with <tt>should</tt> statements focuses on the behavior of an object.
+This helps you to think about the role of the object under test.
+
+Using a behavior-driven approach prevents the danger in assuming a one-to-one mapping of method names to 
+test method names.
+As always, you get the most value by writing the tests first.
+
+For a more complete BDD framework, try RSpec http://rspec.rubyforge.org/
+  
+= Rake tasks
+
+You can define a <tt>Behaviors::ReportTask</tt> in your <tt>Rakefile</tt> to generate rake tasks that
+summarize the behavior of your project.
+
+These tasks are named <tt>behaviors</tt> and <tt>behaviors_html</tt>. They will output to the
+console or an html file in the <tt>doc</tt> directory with a list all of your <tt>should</tt> tests.
+  Behaviors::ReportTask.new do |t|
+    t.pattern = 'test/**/*_test.rb'
+  end
+
+You may also initialize the <tt>ReportTask</tt> with a custom name to associate with a particular suite of tests.
+  Behaviors::ReportTask.new(:widget_subsystem) do |t|
+    t.pattern = 'test/widgets/*_test.rb'
+  end
+
+The html report will be placed in the <tt>doc</tt> directory by default.
+You can override this default by setting the <tt>html_dir</tt> in the <tt>ReportTask</tt>.
+  Behaviors::ReportTask.new do |t|
+    t.pattern = 'test/**/*_test.rb'
+    t.html_dir = 'behaviors_html_reports'
+  end
+=end
+module Behaviors
+  def should(behave,&block)
+    mname = "test_should_#{behave}"
+    if block
+      define_method mname, &block
+    else
+      puts ">>> UNIMPLEMENTED CASE: #{name.sub(/Test$/,'')} should #{behave}"
+    end
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/behaviors/lib/behaviors/reporttask.rb b/FreeRTOS-Plus/Test/CMock/vendor/behaviors/lib/behaviors/reporttask.rb
new file mode 100644
index 000000000..51c0eca09
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/behaviors/lib/behaviors/reporttask.rb
@@ -0,0 +1,158 @@
+require 'rake'
+require 'rake/tasklib'
+
+module Behaviors
+include Rake
+
+  class ReportTask < TaskLib
+    attr_accessor :pattern
+    attr_accessor :html_dir
+
+    def initialize(name=:behaviors)
+      @name = name
+      @html_dir = 'doc'
+      yield self if block_given?
+      define
+    end
+
+    def define
+      desc "List behavioral definitions for the classes specified (use for=<regexp> to further limit files included in report)"
+      task @name do
+        specifications.each do |spec|
+          puts "#{spec.name} should:\n"
+          spec.requirements.each do |req|
+            puts " - #{req}"
+          end
+        end
+      end
+
+      desc "Generate html report of behavioral definitions for the classes specified (use for=<regexp> to further limit files included in report)"
+      task "#{@name}_html" do
+        require 'erb'
+        txt =<<-EOS 
+<html>
+<head>
+<style>
+
+div.title
+{
+  width: 600px;
+  font: bold 14pt trebuchet ms;
+}
+
+div.specification 
+{
+  font: bold 12pt trebuchet ms;
+  border: solid 1px black;
+  width: 600px;
+  padding: 5px;
+  margin: 5px;
+}
+
+ul.requirements
+{
+  font: normal 11pt verdana;
+  padding-left: 0;
+  margin-left: 0;
+  border-bottom: 1px solid gray;
+  width: 600px;
+}
+
+ul.requirements li
+{
+  list-style: none;
+  margin: 0;
+  padding: 0.25em;
+  border-top: 1px solid gray;
+}
+</style>
+</head>
+<body>
+<div class="title">Specifications</div>
+<% specifications.each do |spec| %>
+<div class="specification">
+<%= spec.name %> should: 
+<ul class="requirements">
+<% spec.requirements.each do |req| %>
+<li><%= req %></li>
+<% end %>
+</ul>
+</div>
+<% end %>
+</body>
+</html>
+        EOS
+        output_dir = File.expand_path(@html_dir)
+        mkdir_p output_dir
+        output_filename = output_dir + "/behaviors.html"
+        File.open(output_filename,"w") do |f|
+          f.write ERB.new(txt).result(binding)
+        end
+        puts "(Wrote #{output_filename})"
+      end
+    end
+
+    private
+    def test_files
+      test_list = FileList[@pattern]
+      if ENV['for'] 
+        test_list = test_list.grep(/#{ENV['for']}/i)
+      end
+      test_list
+    end  
+
+    def specifications
+      test_files.map do |file|
+        spec = OpenStruct.new
+        m = %r".*/([^/].*)_test.rb".match(file)
+        class_name = titleize(m[1]) if m[1]
+        spec.name = class_name
+        spec.requirements = []
+        File::readlines(file).each do |line| 
+          if line =~ /^\s*should\s+\(?\s*["'](.*)["']/
+            spec.requirements << $1
+          end
+        end
+        spec
+      end
+    end
+
+    ############################################################
+    # STOLEN FROM inflector.rb
+    ############################################################
+    #--
+    # Copyright (c) 2005 David Heinemeier Hansson
+    #
+    # Permission is hereby granted, free of charge, to any person obtaining
+    # a copy of this software and associated documentation files (the
+    # "Software"), to deal in the Software without restriction, including
+    # without limitation the rights to use, copy, modify, merge, publish,
+    # distribute, sublicense, and/or sell copies of the Software, and to
+    # permit persons to whom the Software is furnished to do so, subject to
+    # the following conditions:
+    #
+    # The above copyright notice and this permission notice shall be
+    # included in all copies or substantial portions of the Software.
+    #
+    # THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+    # EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+    # MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+    # NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
+    # LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+    # OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+    # WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+    #++
+    def titleize(word)
+      humanize(underscore(word)).gsub(/\b([a-z])/) { $1.capitalize }
+    end    
+
+    def underscore(camel_cased_word)    camel_cased_word.to_s.gsub(/::/, '/').
+      gsub(/([A-Z]+)([A-Z][a-z])/,'\1_\2').gsub(/([a-z\d])([A-Z])/,'\1_\2').tr("-", "_").downcase
+    end
+
+    def humanize(lower_case_and_underscored_word)
+      lower_case_and_underscored_word.to_s.gsub(/_id$/, "").gsub(/_/, " ").capitalize
+    end
+
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/behaviors/test/behaviors_tasks_test.rb b/FreeRTOS-Plus/Test/CMock/vendor/behaviors/test/behaviors_tasks_test.rb
new file mode 100644
index 000000000..9382e0737
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/behaviors/test/behaviors_tasks_test.rb
@@ -0,0 +1,73 @@
+require 'test/unit'
+require 'fileutils'
+
+class BehaviorsTasksTest < Test::Unit::TestCase
+  include FileUtils
+
+  def setup
+    @here = File.expand_path(File.dirname(__FILE__))
+    @base_cmd = RUBY_PLATFORM[/mswin/] ? 'rake.cmd ' : 'rake '
+  end 
+
+  #
+  # HELPERS
+  #
+  def run_behaviors_task
+    run_cmd "behaviors"
+  end
+
+  def run_behaviors_html_task
+    run_cmd "behaviors_html"
+  end
+
+  def run_cmd(cmd)
+    cd "#{@here}/tasks_test" do
+      @report = %x[ #{@base_cmd} #{cmd} ]
+    end
+  end
+
+  def see_html_task_output_message
+    @html_output_filename = "#{@here}/tasks_test/behaviors_doc/behaviors.html"
+    assert_match(/Wrote #{@html_output_filename}/, @report)
+  end
+
+  def see_that_html_report_file_exits
+    assert File.exists?(@html_output_filename), "html output file should exist"
+  end
+
+  def html_report_file_should_contain(user_behaviors)
+    file_contents = File.read(@html_output_filename)
+    user_behaviors.each do |line|
+      assert_match(/#{line}/, file_contents)
+    end
+    rm_rf File.dirname(@html_output_filename)
+  end
+
+  #
+  # TESTS
+  #
+  def test_that_behaviors_tasks_should_list_behavioral_definitions_for_the_classes_under_test
+    run_behaviors_task
+    user_behaviors = [
+    "User should:",
+    " - be able set user name and age during construction",
+    " - be able to get user name and age",
+    " - be able to ask if a user is an adult"
+    ]
+    assert_match(/#{user_behaviors.join("\n")}/, @report)
+  end
+
+  def test_that_behaviors_tasks_should_list_behavioral_definitions_for_the_classes_under_test_in_html_output
+    run_behaviors_html_task
+    see_html_task_output_message
+    see_that_html_report_file_exits
+    user_behaviors = [
+      "User should:",
+      "be able set user name and age during construction",
+      "be able to get user name and age",
+      "be able to ask if a user is an adult"
+    ]
+    html_report_file_should_contain user_behaviors
+  end
+
+end
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/behaviors/test/behaviors_test.rb b/FreeRTOS-Plus/Test/CMock/vendor/behaviors/test/behaviors_test.rb
new file mode 100644
index 000000000..fd0a77fcb
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/behaviors/test/behaviors_test.rb
@@ -0,0 +1,50 @@
+require 'test/unit'
+require File.expand_path(File.dirname(__FILE__)) + '/../lib/behaviors'
+require 'stringio'
+
+loading_developer_test_class_stdout = StringIO.new
+saved_stdout = $stdout.dup
+$stdout = loading_developer_test_class_stdout
+
+class DeveloperTest
+  extend Behaviors
+  attr_accessor :flunk_msg, :tested_code
+
+  should "test their code" do
+    @tested_code = true
+  end
+  should "go to meetings"
+end
+
+$stdout = saved_stdout
+loading_developer_test_class_stdout.rewind
+$loading_developer_test_class_output = loading_developer_test_class_stdout.read
+
+class BehaviorsTest < Test::Unit::TestCase
+
+
+  def setup
+    @target = DeveloperTest.new
+    assert_nil @target.tested_code, "block called too early"
+  end
+
+  #
+  # TESTS
+  #
+  def test_should_called_with_a_block_defines_a_test
+    assert @target.methods.include?("test_should_test their code"), "Missing test method"
+
+    @target.send("test_should_test their code")
+
+    assert @target.tested_code, "block not called"
+  end
+
+  def test_should_called_without_a_block_does_not_create_a_test_method
+    assert !@target.methods.include?("test_should_go to meetings"), "Should not have method"
+  end
+
+  def test_should_called_without_a_block_will_give_unimplemented_output_when_class_loads
+    unimplemented_output = "UNIMPLEMENTED CASE: Developer should go to meetings"
+    assert_match(/#{unimplemented_output}/, $loading_developer_test_class_output)
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/behaviors/test/tasks_test/Rakefile b/FreeRTOS-Plus/Test/CMock/vendor/behaviors/test/tasks_test/Rakefile
new file mode 100644
index 000000000..ba71f715f
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/behaviors/test/tasks_test/Rakefile
@@ -0,0 +1,19 @@
+require 'rake'
+require 'rake/testtask'
+
+here = File.expand_path(File.dirname(__FILE__))
+require "#{here}/../../lib/behaviors/reporttask"
+
+desc 'Default: run unit tests.'
+task :default => :test
+
+Rake::TestTask.new(:test) do |t|
+  t.libs << "#{here}/../../lib"
+  t.pattern = 'test/**/*_test.rb'
+  t.verbose = true
+end
+
+Behaviors::ReportTask.new(:behaviors) do |t|
+  t.pattern = 'test/**/*_test.rb'
+  t.html_dir = 'behaviors_doc'
+end
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/behaviors/test/tasks_test/lib/user.rb b/FreeRTOS-Plus/Test/CMock/vendor/behaviors/test/tasks_test/lib/user.rb
new file mode 100644
index 000000000..40bc07ce4
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/behaviors/test/tasks_test/lib/user.rb
@@ -0,0 +1,2 @@
+class User
+end
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/behaviors/test/tasks_test/test/user_test.rb b/FreeRTOS-Plus/Test/CMock/vendor/behaviors/test/tasks_test/test/user_test.rb
new file mode 100644
index 000000000..ad3cd1b33
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/behaviors/test/tasks_test/test/user_test.rb
@@ -0,0 +1,17 @@
+require 'test/unit'
+require 'behaviors'
+
+require 'user'
+
+class UserTest < Test::Unit::TestCase
+  extend Behaviors
+
+  def setup
+  end
+
+  should "be able set user name and age during construction"
+  should "be able to get user name and age"
+  should "be able to ask if a user is an adult"
+  def test_DELETEME
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/c_exception/.gitattributes b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/.gitattributes
new file mode 100644
index 000000000..ad952260b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/.gitattributes
@@ -0,0 +1,30 @@
+*           text=auto
+
+# These files are text and should be normalized (convert crlf to lf)
+*.rb        text
+*.test      text
+*.c         text
+*.cpp       text
+*.h         text
+*.txt       text
+*.yml       text
+*.s79       text
+*.bat       text
+*.xcl       text
+*.inc       text
+*.info      text
+*.md        text
+makefile    text
+rakefile    text
+
+
+#These files are binary and should not be normalized
+*.doc       binary
+*.odt       binary
+*.pdf       binary
+*.ewd       binary
+*.eww       binary
+*.dni       binary
+*.wsdt      binary
+*.dbgdt     binary
+*.mac       binary
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/c_exception/.gitignore b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/.gitignore
new file mode 100644
index 000000000..c795b054e
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/.gitignore
@@ -0,0 +1 @@
+build
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/c_exception/.gitmodules b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/.gitmodules
new file mode 100644
index 000000000..e69de29bb
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/.gitmodules
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/c_exception/.travis.yml b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/.travis.yml
new file mode 100644
index 000000000..ac313a624
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/.travis.yml
@@ -0,0 +1,16 @@
+sudo: required
+language: ruby c
+
+os:
+  - linux
+
+rvm:
+  - "2.3"
+  - "2.4"
+  - "2.6"
+
+install:
+  - gem install ceedling
+
+script:
+  - ceedling clobber test:all
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/c_exception/Gemfile b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/Gemfile
new file mode 100644
index 000000000..0ab41bb5e
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/Gemfile
@@ -0,0 +1,4 @@
+source "http://rubygems.org/"
+
+gem "rake"
+gem "test-unit", "~> 2.4"
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/c_exception/Gemfile.lock b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/Gemfile.lock
new file mode 100644
index 000000000..862214260
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/Gemfile.lock
@@ -0,0 +1,12 @@
+GEM
+  remote: http://rubygems.org/
+  specs:
+    rake (12.3.3)
+    test-unit (2.5.5)
+
+PLATFORMS
+  ruby
+
+DEPENDENCIES
+  rake
+  test-unit (~> 2.4)
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/c_exception/README.md b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/README.md
new file mode 100644
index 000000000..53e52ea63
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/README.md
@@ -0,0 +1,249 @@
+CException - Lightweight exception library for C
+================================================
+
+[![CException Build Status](https://api.travis-ci.org/ThrowTheSwitch/CException.png?branch=master)](https://travis-ci.org/ThrowTheSwitch/CException)
+
+_This Documentation Is Released Under a Creative Commons 3.0 Attribution Share-Alike License_
+
+CException is simple exception handling in C. It is significantly faster than full-blown C++ exception handling 
+but loses some flexibility. It is portable to any platform supporting `setjmp`/`longjmp`.
+
+Getting Started
+================
+
+The simplest way to get started is to just grab the code and pull it into your project:
+
+```
+git clone https://github.com/throwtheswitch/cexception.git
+```
+
+If you want to contribute to this project, you'll also need to have Ruby and Ceedling installed to run the unit tests.
+
+Usage
+=====
+
+### So what's it good for?
+
+Mostly error handling. Passing errors down a long chain of function calls gets ugly. Sometimes really ugly. 
+So what if you could just specify certain places where you want to handle errors, and all your errors were 
+transferred there? Let's try a lame example:
+
+CException uses C standard library functions setjmp and longjmp to operate. As long as the target system 
+has these two functions defined, this library should be useable with very little configuration. It even 
+supports environments where multiple program flows are in use, such as real-time operating systems... 
+we started this project for use in embedded systems... but it obviously can be used for larger systems too.
+
+### Error Handling with CException:
+
+```
+void functionC(void) {
+  //do some stuff
+  if (there_was_a_problem)
+    Throw(ERR_BAD_BREATH);
+  //this stuff never gets called because of error
+}
+```
+
+There are about a gajillion exception frameworks using a similar setjmp/longjmp method out there... and there 
+will probably be more in the future. Unfortunately, when we started our last embedded project, all those that 
+existed either (a) did not support multiple tasks (therefore multiple stacks) or (b) were way more complex 
+than we really wanted. CException was born.
+
+Why?
+====
+
+### It's ANSI C
+
+...and it beats passing error codes around.
+
+### You want something simple...
+
+CException throws a single id. You can define those ID's to be whatever you like. 
+You might even choose which type that number is for your project. But that's as far as it goes. We weren't interested 
+in passing objects or structs or strings... just simple error codes. Fast. Easy to Use. Easy to Understand.
+
+### Performance...
+
+CException can be configured for single tasking or multitasking. In single tasking, there is 
+very little overhead past the setjmp/longjmp calls (which are already fast). In multitasking, your only additional 
+overhead is the time it takes you to determine a unique task id (0 to num_tasks).
+
+How?
+====
+
+Code that is to be protected are wrapped in `Try { }` blocks. The code inside the Try block is _protected_, 
+meaning that if any Throws occur, program control is directly transferred to the start of the Catch block. 
+The Catch block immediately follows the Try block. It's ignored if no errors have occurred.
+
+A numerical exception ID is included with Throw, and is passed into the Catch block. This allows you to handle 
+errors differently or to report which error has occurred... or maybe it just makes debugging easier so you 
+know where the problem was Thrown.
+
+Throws can occur from anywhere inside the Try block, directly in the function you're testing or even within 
+function calls (nested as deeply as you like). There can be as many Throws as you like, just remember that 
+execution of the guts of your Try block ends as soon as the first Throw is triggered. Once you throw, you're 
+transferred to the Catch block. A silly example:
+
+```
+void SillyExampleWhichPrintsZeroThroughFive(void) {
+  CEXCEPTION_T e;
+  int i;
+  while (i = 0; i < 6; i++) {
+    Try {
+      Throw(i);
+      //This spot is never reached
+    } 
+    Catch(e) {
+      printf(“%i “, e);
+    }
+  }
+}
+```
+
+Limitations
+===========
+
+This library was made to be as fast as possible, and provide basic exception handling. It is not a full-blown 
+exception library like C++. Because of this, there are a few limitations that should be observed in order to 
+successfully utilize this library:
+
+### Return & Goto
+
+Do not directly `return` from within a `Try` block, nor `goto` into or out of a `Try` block.
+The `Try` macro allocates some local memory and alters a global pointer. These are cleaned up at the 
+top of the `Catch` macro. Gotos and returns would bypass some of these steps, resulting in memory leaks 
+or unpredictable behavior.
+
+### Local Variables
+
+If (a) you change local (stack) variables within your `Try` block, and (b) wish to make use of the updated 
+values after an exception is thrown, those variables should be made `volatile`.
+
+Note that this is ONLY for locals and ONLY when you need access to them after a `Throw`.
+
+Compilers optimize (and thank goodness they do). There is no way to guarantee that the actual memory 
+location was updated and not just a register unless the variable is marked volatile.
+
+### Memory Management
+
+Memory which is `malloc`'d within a `Try` block is not automatically released when an error is thrown. This 
+will sometimes be desirable, and othertimes may not. It will be the responsibility of the code you put in 
+the `Catch` block to perform this kind of cleanup.
+
+There's just no easy way to track `malloc`'d memory, etc., without replacing or wrapping `malloc` 
+calls or something like that. This is a lightweight framework, so these options were not desirable.
+
+CException API
+==============
+
+### `Try { ... }`
+
+`Try` is a macro which starts a protected block. It MUST be followed by a pair of braces or a single 
+protected line (similar to an 'if'), enclosing the data that is to be protected. It MUST be followed by 
+a `Catch` block (don't worry, you'll get compiler errors to let you know if you mess any of that up).
+
+The `Try` block is your protected block. It contains your main program flow, where you can ignore errors 
+(other than a quick `Throw` call). You may nest multiple `Try` blocks if you want to handle errors at
+multiple levels, and you can even rethrow an error from within a nested `Catch`.
+
+### `Catch(e) { }`
+
+`Catch` is a macro which ends the `Try` block and starts the error handling block. The `Catch` block 
+is executed if and only if an exception was thrown while within the `Try` block. This error was thrown 
+by a `Throw` call somewhere within `Try` (or within a function called within `Try`, or a function called 
+by a function called within `Try`... you get the idea.).
+
+`Catch` receives a single id of type `CEXCEPTION_T` which you can ignore or use to handle the error in 
+some way. You may throw errors from within Catches, but they will be caught by a `Try` wrapping the `Catch`, 
+not the one immediately preceeding.
+
+### `Throw(e)`
+
+`Throw` is the method used to throw an error. `Throw`s should only occur from within a protected 
+(`Try`...`Catch`) block, though it may easily be nested many function calls deep without an impact 
+on performance or functionality. `Throw` takes a single argument, which is an exception id which will be 
+ passed to `Catch` as the reason for the error. If you wish to _re-throw_ an error, this can be done by
+calling `Throw(e)` with the error code you just caught. It _IS_ valid to throw from a `Catch` block.
+
+### `ExitTry()`
+
+`ExitTry` is a method used to immediately exit your current Try block but NOT treat this as an error. Don't 
+run the Catch. Just start executing from after the Catch as if nothing had happened.
+
+Configuration
+=============
+
+CException is a mostly portable library. It has one universal dependency, plus some macros which are required if 
+working in a multi-tasking environment.
+
+The standard C library setjmp must be available. Since this is part of the standard library, it's all good.
+
+If working in a multitasking environment, you need a stack frame for each task. Therefore, you must define 
+methods for obtaining an index into an array of frames and to get the overall number of id's are required. If 
+the OS supports a method to retrieve task ID's, and those tasks are number 0, 1, 2... you are in an ideal 
+situation. Otherwise, a more creative mapping function may be required. Note that this function is likely to 
+be called twice for each protected block and once during a throw. This is the only added overhead in the system.
+
+You have options for configuring the library, if the defaults aren't good enough for you. You can add defines 
+at the command prompt directly. You can always include a configuration file before including `CException.h`. 
+You can make sure `CEXCEPTION_USE_CONFIG_FILE` is defined, which will force make CException look for 
+`CExceptionConfig.h`, where you can define whatever you like. However you do it, you can override any or 
+all of the following:
+
+### `CEXCEPTION_T`
+
+Set this to the type you want your exception id's to be. Defaults to an 'unsigned int'.
+
+### `CEXCEPTION_NONE`
+
+Set this to a number which will never be an exception id in your system. Defaults to `0x5a5a5a5a`.
+
+### `CEXCEPTION_GET_ID`
+
+If in a multi-tasking environment, this should be set to be a call to the function described in #2 above. 
+It defaults to just return 0 all the time (good for single tasking environments, not so good otherwise).
+
+### `CEXCEPTION_NUM_ID`
+
+If in a multi-tasking environment, this should be set to the number of ID's required (usually the number 
+of tasks in the system). Defaults to 1 (good for single tasking environments or systems where you will only 
+use this from one task).
+
+### `CEXCEPTION_NO_CATCH_HANDLER (id)`
+
+This macro can be optionally specified. It allows you to specify code to be called when a Throw is made 
+outside of Try...Catch protection. Consider this the emergency fallback plan for when something has gone 
+terribly wrong.
+
+### And More!
+
+You may also want to include any header files which will commonly be needed by the rest of your application 
+where it uses exception handling here. For example, OS header files or exception codes would be useful.
+
+Finally, there are some hook macros which you can implement to inject your own target-specific code in 
+particular places. It is a rare instance where you will need these, but they are here if you need them:
+
+* `CEXCEPTION_HOOK_START_TRY` - called immediately before the Try block
+* `CEXCEPTION_HOOK_HAPPY_TRY` - called immediately after the Try block if no exception was thrown
+* `CEXCEPTION_HOOK_AFTER_TRY` - called immediately after the Try block OR before an exception is caught
+* `CEXCEPTION_HOOK_START_CATCH` - called immediately before the catch
+
+Testing
+=======
+
+If you want to validate that CException works with your tools or that it works with your custom 
+configuration, you may want to run the included test suite. This is the test suite (along with real 
+projects we've used it on) that we use to make sure that things actually work the way we claim.
+The test suite makes use of Ceedling, which uses the Unity Test Framework. It will require a native C compiler. 
+The example makefile and rakefile both use gcc. 
+
+License
+=======
+
+*This software is licensed under the MIT License:
+Copyright (c) 2007-2019 Mark VanderVoord*
+
+*Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
+The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.*
+
+*_THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE._*
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/c_exception/docs/CException.md b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/docs/CException.md
new file mode 100644
index 000000000..bfda613d6
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/docs/CException.md
@@ -0,0 +1,332 @@
+
+CException
+==========
+
+CException is a basic exception framework for C, suitable for use in
+embedded applications.  It provides an exception framework similar in
+use to C++, but with much less overhead.
+
+
+CException uses C standard library functions `setjmp` and `longjmp` to
+operate.  As long as the target system has these two functions defined,
+this library should be useable with very little configuration.  It
+even supports environments where multiple program flows are in use,
+such as real-time operating systems.
+
+
+There are about a gabillion exception frameworks using a similar
+setjmp/longjmp method out there... and there will probably be more
+in the future. Unfortunately, when we started our last embedded
+project, all those that existed either (a) did not support multiple
+tasks (therefore multiple stacks) or (b) were way more complex than
+we really wanted.  CException was born.
+
+
+*Why use CException?*
+
+
+0. It's ANSI C, and it beats passing error codes around.
+1. You want something simple... CException throws a single id. You can
+   define those ID's to be whatever you like. You might even choose which
+   type that number is for your project. But that's as far as it goes.
+   We weren't interested in passing objects or structs or strings...
+   just simple error codes.
+2. Performance... CException can be configured for single tasking or
+   multitasking. In single tasking, there is very little overhead past
+   the setjmp/longjmp calls (which are already fast). In multitasking,
+   your only additional overhead is the time it takes you to determine
+   a unique task id 0 - num_tasks.
+
+
+For the latest version, go to [ThrowTheSwitch.org](http://throwtheswitch.org)
+
+
+CONTENTS OF THIS DOCUMENT
+=========================
+
+* Usage
+* Limitations
+* API
+* Configuration
+* Testing
+* License
+
+
+Usage
+-----
+
+Code that is to be protected are wrapped in `Try { } Catch { }` blocks.
+The code directly following the Try call is "protected", meaning that
+if any Throws occur, program control is directly transferred to the
+start of the Catch block.
+
+
+A numerical exception ID is included with Throw, and is made accessible
+from the Catch block.
+
+
+Throws can occur from within function calls (nested as deeply as you
+like) or directly from within the function itself.
+
+
+
+Limitations
+-----------
+
+
+This library was made to be as fast as possible, and provide basic
+exception handling.  It is not a full-blown exception library.  Because
+of this, there are a few limitations that should be observed in order
+to successfully utilize this library:
+
+1. Do not directly "return" from within a `Try` block, nor `goto`
+   into or out of a `Try` block.
+
+   *Why?*
+
+   The `Try` macro allocates some local memory and alters a global
+   pointer.  These are cleaned up at the top of the `Catch` macro.
+   Gotos and returns would bypass some of these steps, resulting in
+   memory leaks or unpredictable behavior.
+
+
+2. If (a) you change local (stack) variables within your `Try` block,
+   AND (b) wish to make use of the updated values after an exception
+   is thrown, those variables should be made `volatile`. Note that this
+   is ONLY for locals and ONLY when you need access to them after a
+   `Throw`.
+
+   *Why?*
+
+   Compilers optimize.  There is no way to guarantee that the actual
+   memory location was updated and not just a register unless the
+   variable is marked volatile.
+
+   As an example, if we had the following code, the value `b` is 
+   very likely at risk. It is assigned to the value `3` inside the
+   `Try` block, but the compiler may or may not have written that 
+   variable to an actual memory location when the Throw happens. If 
+   it did, the `printf` will have a `3` for the second value. If not,
+   it will still have a `0`. Changing `b` to `volatile` would
+   guarantee it is the correct value.
+   
+   ```
+   void func(int *a)
+   {
+     // ...
+     int b = 0;
+     Try {
+       *a += 2;
+       b = *a;
+       Throw(MY_EX);
+     } Catch(e) {
+       // ...
+     }
+     printf("%d ?= %d", a, b);
+   }
+   void main()
+   {
+     int x = 1;
+     func(&x);
+     printf("%d", x);
+   }
+   ```
+   
+   With most compilers, the `*a` and `x` values are NOT at risk.
+   We're dereferencing the pointer, which usually will force 
+   memory interaction. Optimizing compilers DO optimize, though, 
+   and it IS possible that even these values may have been cached
+   and not written to the final memory location. In those instances,
+   they would both report `1`.
+   
+   If you have a lot of situations like this and a strong optimizing
+   compiler, it is best to reduce the optimization level when using
+   CException.
+
+3. Memory which is `malloc`'d or `new`'d is not automatically released
+   when an error is thrown.  This will sometimes be desirable, and
+   othertimes may not.  It will be the responsibility of the `Catch`
+   block to perform this kind of cleanup.
+
+   *Why?*
+
+   There's just no easy way to track `malloc`'d memory, etc., without
+   replacing or wrapping malloc calls or something like that.  This
+   is a light framework, so these options were not desirable.
+
+
+
+API
+---
+
+###Try
+
+`Try` is a macro which starts a protected block.  It MUST be followed by
+a pair of braces or a single protected line (similar to an 'if'),
+enclosing the data that is to be protected.  It **must** be followed by a
+`Catch` block (don't worry, you'll get compiler errors to let you know if
+you mess any of that up).
+
+
+###Catch(e)
+
+`Catch` is a macro which ends the `Try` block and starts the error handling
+block. The `Catch` block is called if and only if an exception was thrown
+while within the `Try` block.  This error was thrown by a `Throw` call
+somewhere within `Try` (or within a function called within `Try`, or a function
+called by a function called within `Try`, etc).
+
+The single parameter `e` is filled with the error code which was thrown.
+This can be used for reporting, conditional cleanup, etc. (or you can just
+ignore it if you really want... people ignore return codes all the time,
+right?).  `e` should be of type `EXCEPTION_T`
+
+
+###Throw(e)
+
+This is the method of throwing an error. A `Throw` should only occur from within a
+protected (`Try` ... `Catch`) block, though it may easily be nested many function
+calls deep without an impact on performance or functionality. `Throw` takes
+a single argument, which is an exception id which will be passed to `Catch`
+as the reason for the error.
+
+If you wish to rethrow an error, this can be done by calling `Throw(e)` with
+the error code you just caught.  It **is** valid to throw from a catch block.
+
+
+###ExitTry()
+
+On rare occasion, you might want to immediately exit your current `Try` block
+but **not** treat this as an error. Don't run the `Catch`. Just start executing
+from after the `Catch` as if nothing had happened... That's what `ExitTry` is
+for.
+
+
+CONFIGURATION
+-------------
+
+CException is a mostly portable library.  It has one universal
+dependency, and some macros which are required if working in a
+multi-tasking environment.
+
+1. The standard C library setjmp must be available.  Since this is part
+   of the standard library, chances are good that you'll be fine.
+
+2. If working in a multitasking environment, methods for obtaining an
+   index into an array of frames and to get the overall number of
+   id's are required.  If the OS supports a method to retrieve Task
+   ID's, and those Tasks are number 0, 1, 2... you are in an ideal
+   situation.  Otherwise, a more creative mapping function may be
+   required.  Note that this function is likely to be called twice
+   for each protected block and once during a throw.  This is the
+   only overhead in the system.
+
+
+Exception.h
+-----------
+
+By convention, most projects include `Exception.h` which defines any
+further requirements, then calls `CException.h` to do the gruntwork.  All
+of these are optional.  You could directly include `CException.h` if
+you wanted and just use the defaults provided.
+
+* `EXCEPTION_T`
+  * Set this to the type you want your exception id's to be.  Defaults to 'unsigned int'.
+
+* `EXCEPTION_NONE`
+  * Set this to a number which will never be an exception id in your system.  Defaults to `0x5a5a5a5a`.
+
+* `EXCEPTION_GET_ID`
+  * If in a multi-tasking environment, this should be
+    set to be a call to the function described in #2 above.
+    Defaults to just return `0` all the time (good for
+    single tasking environments)
+
+* `EXCEPTION_NUM_ID`
+  * If in a multi-tasking environment, this should be set
+    to the number of ID's required (usually the number of
+    tasks in the system).  Defaults to `1` (for single
+    tasking environments).
+
+* `CEXCEPTION_NO_CATCH_HANDLER(id)`
+  * This macro can be optionally specified.
+    It allows you to specify code to be called when a Throw
+    is made outside of `Try` ... `Catch` protection.  Consider
+    this the emergency fallback plan for when something has
+    gone terribly wrong.
+
+
+You may also want to include any header files which will commonly be
+needed by the rest of your application where it uses exception handling
+here.  For example, OS header files or exception codes would be useful.
+
+
+Finally, there are some hook macros which you can implement to inject
+your own target-specific code in particular places. It is a rare instance
+where you will need these, but they are here if you need them:
+
+
+* `CEXCEPTION_HOOK_START_TRY`
+  * called immediately before the Try block
+
+* `CEXCEPTION_HOOK_HAPPY_TRY`
+  * called immediately after the Try block if no exception was thrown
+
+* `CEXCEPTION_HOOK_AFTER_TRY`
+  * called immediately after the Try block OR before an exception is caught
+
+* `CEXCEPTION_HOOK_START_CATCH`
+  * called immediately before the catch
+
+
+
+TESTING
+-------
+
+
+If you want to validate that CException works with your tools or that
+it works with your custom configuration, you may want to run the test
+suite.
+
+
+The test suite included makes use of the `Unity` Test Framework.  It will
+require a native C compiler. The example makefile uses MinGW's gcc.
+Modify the makefile to include the proper paths to tools, then run `make`
+to compile and run the test application.
+
+* `C_COMPILER`
+  * The C compiler to use to perform the tests
+
+* `C_LIBS`
+  * The path to the C libraries (including setjmp)
+
+* `UNITY_DIR`
+  * The path to the Unity framework (required to run tests)
+    (get it at [ThrowTheSwitch.org](http://throwtheswitch.org))
+
+
+
+LICENSE
+-------
+
+This software is licensed under the MIT License
+
+Copyright (c) 2007-2020 Mark VanderVoord
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+THE SOFTWARE.
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/c_exception/docs/ThrowTheSwitchCodingStandard.md b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/docs/ThrowTheSwitchCodingStandard.md
new file mode 100644
index 000000000..a85adef3d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/docs/ThrowTheSwitchCodingStandard.md
@@ -0,0 +1,207 @@
+# ThrowTheSwitch.org Coding Standard
+
+Hi. Welcome to the coding standard for ThrowTheSwitch.org. For the most part,
+we try to follow these standards to unify our contributors' code into a cohesive
+unit (puns intended). You might find places where these standards aren't
+followed. We're not perfect. Please be polite where you notice these discrepancies
+and we'll try to be polite when we notice yours.
+
+;)
+
+
+## Why Have A Coding Standard?
+
+Being consistent makes code easier to understand. We've made an attempt to keep
+our standard simple because we also believe that we can only expect someone to
+follow something that is understandable. Please do your best.
+
+
+## Our Philosophy
+
+Before we get into details on syntax, let's take a moment to talk about our
+vision for these tools. We're C developers and embedded software developers.
+These tools are great to test any C code, but catering to embedded software has
+made us more tolerant of compiler quirks. There are a LOT of quirky compilers
+out there. By quirky I mean "doesn't follow standards because they feel like
+they have a license to do as they wish."
+
+Our philosophy is "support every compiler we can". Most often, this means that
+we aim for writing C code that is standards compliant (often C89... that seems
+to be a sweet spot that is almost always compatible). But it also means these
+tools are tolerant of things that aren't common. Some that aren't even
+compliant. There are configuration options to override the size of standard
+types. There are configuration options to force Unity to not use certain
+standard library functions. A lot of Unity is configurable and we have worked
+hard to make it not TOO ugly in the process.
+
+Similarly, our tools that parse C do their best. They aren't full C parsers
+(yet) and, even if they were, they would still have to accept non-standard
+additions like gcc extensions or specifying `@0x1000` to force a variable to
+compile to a particular location. It's just what we do, because we like
+everything to Just Workâ„¢.
+
+Speaking of having things Just Workâ„¢, that's our second philosophy. By that, we
+mean that we do our best to have EVERY configuration option have a logical
+default. We believe that if you're working with a simple compiler and target,
+you shouldn't need to configure very much... we try to make the tools guess as
+much as they can, but give the user the power to override it when it's wrong.
+
+
+## Naming Things
+
+Let's talk about naming things. Programming is all about naming things. We name
+files, functions, variables, and so much more. While we're not always going to
+find the best name for something, we actually put quite a bit of effort into
+finding *What Something WANTS to be Called*â„¢.
+
+When naming things, we more or less follow this hierarchy, the first being the
+most important to us (but we do all four whenever possible):
+1. Readable
+2. Descriptive
+3. Consistent
+4. Memorable
+
+
+#### Readable
+
+We want to read our code. This means we like names and flow that are more
+naturally read. We try to avoid double negatives. We try to avoid cryptic
+abbreviations (sticking to ones we feel are common).
+
+
+#### Descriptive
+
+We like descriptive names for things, especially functions and variables.
+Finding the right name for something is an important endeavor. You might notice
+from poking around our code that this often results in names that are a little
+longer than the average. Guilty. We're okay with a tiny bit more typing if it
+means our code is easier to understand.
+
+There are two exceptions to this rule that we also stick to as religiously as
+possible:
+
+First, while we realize hungarian notation (and similar systems for encoding
+type information into variable names) is providing a more descriptive name, we
+feel that (for the average developer) it takes away from readability and
+therefore is to be avoided.
+
+Second, loop counters and other local throw-away variables often have a purpose
+which is obvious. There's no need, therefore, to get carried away with complex
+naming. We find i, j, and k are better loop counters than loopCounterVar or
+whatnot. We only break this rule when we see that more description could improve
+understanding of an algorithm.
+
+
+#### Consistent
+
+We like consistency, but we're not really obsessed with it. We try to name our
+configuration macros in a consistent fashion... you'll notice a repeated use of
+UNITY_EXCLUDE_BLAH or UNITY_USES_BLAH macros. This helps users avoid having to
+remember each macro's details.
+
+
+#### Memorable
+
+Where ever it doesn't violate the above principles, we try to apply memorable
+names. Sometimes this means using something that is simply descriptive, but
+often we strive for descriptive AND unique... we like quirky names that stand
+out in our memory and are easier to search for. Take a look through the file
+names in Ceedling and you'll get a good idea of what we are talking about here.
+Why use preprocess when you can use preprocessinator? Or what better describes a
+module in charge of invoking tasks during releases than release_invoker? Don't
+get carried away. The names are still descriptive and fulfill the above
+requirements, but they don't feel stale.
+
+
+## C and C++ Details
+
+We don't really want to add to the style battles out there. Tabs or spaces?
+How many spaces? Where do the braces go? These are age-old questions that will
+never be answered... or at least not answered in a way that will make everyone
+happy.
+
+We've decided on our own style preferences. If you'd like to contribute to these
+projects (and we hope that you do), then we ask if you do your best to follow
+the same. It will only hurt a little. We promise.
+
+
+#### Whitespace
+
+Our C-style is to use spaces and to use 4 of them per indent level. It's a nice
+power-of-2 number that looks decent on a wide screen. We have no more reason
+than that. We break that rule when we have lines that wrap (macros or function
+arguments or whatnot). When that happens, we like to indent further to line
+things up in nice tidy columns.
+
+```C
+    if (stuff_happened)
+    {
+        do_something();
+    }
+```
+
+
+#### Case
+
+- Files - all lower case with underscores.
+- Variables - all lower case with underscores
+- Macros - all caps with underscores.
+- Typedefs - all caps with underscores. (also ends with _T).
+- Functions - camel cased. Usually named ModuleName_FuncName
+- Constants and Globals - camel cased.
+
+
+#### Braces
+
+The left brace is on the next line after the declaration. The right brace is
+directly below that. Everything in between in indented one level. If you're
+catching an error and you have a one-line, go ahead and to it on the same line.
+
+```C
+    while (blah)
+    {
+        //Like so. Even if only one line, we use braces.
+    }
+```
+
+
+#### Comments
+
+Do you know what we hate? Old-school C block comments. BUT, we're using them
+anyway. As we mentioned, our goal is to support every compiler we can,
+especially embedded compilers. There are STILL C compilers out there that only
+support old-school block comments. So that is what we're using. We apologize. We
+think they are ugly too.
+
+
+## Ruby Details
+
+Is there really such thing as a Ruby coding standard? Ruby is such a free form
+language, it seems almost sacrilegious to suggest that people should comply to
+one method! We'll keep it really brief!
+
+
+#### Whitespace
+
+Our Ruby style is to use spaces and to use 2 of them per indent level. It's a
+nice power-of-2 number that really grooves with Ruby's compact style. We have no
+more reason than that. We break that rule when we have lines that wrap. When
+that happens, we like to indent further to line things up in nice tidy columns.
+
+
+#### Case
+
+- Files - all lower case with underscores.
+- Variables - all lower case with underscores
+- Classes, Modules, etc - Camel cased.
+- Functions - all lower case with underscores
+- Constants - all upper case with underscores
+
+
+## Documentation
+
+Egad. Really? We use markdown and we like pdf files because they can be made to
+look nice while still being portable. Good enough?
+
+
+*Find The Latest of This And More at [ThrowTheSwitch.org](https://throwtheswitch.org)*
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/c_exception/lib/CException.c b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/lib/CException.c
new file mode 100644
index 000000000..fdff8f475
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/lib/CException.c
@@ -0,0 +1,46 @@
+#include "CException.h"
+
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wmissing-field-initializers"
+volatile CEXCEPTION_FRAME_T CExceptionFrames[CEXCEPTION_NUM_ID] = {{ 0 }};
+#pragma GCC diagnostic pop
+
+//------------------------------------------------------------------------------------------
+//  Throw
+//------------------------------------------------------------------------------------------
+void Throw(CEXCEPTION_T ExceptionID)
+{
+    unsigned int MY_ID = CEXCEPTION_GET_ID;
+    CExceptionFrames[MY_ID].Exception = ExceptionID;
+    if (CExceptionFrames[MY_ID].pFrame)
+    {
+        longjmp(*CExceptionFrames[MY_ID].pFrame, 1);
+    }
+    CEXCEPTION_NO_CATCH_HANDLER(ExceptionID);
+}
+
+//------------------------------------------------------------------------------------------
+//  Explanation of what it's all for:
+//------------------------------------------------------------------------------------------
+/*
+#define Try
+    {                                                                   <- give us some local scope.  most compilers are happy with this
+        jmp_buf *PrevFrame, NewFrame;                                   <- prev frame points to the last try block's frame.  new frame gets created on stack for this Try block
+        unsigned int MY_ID = CEXCEPTION_GET_ID;                         <- look up this task's id for use in frame array.  always 0 if single-tasking
+        PrevFrame = CExceptionFrames[CEXCEPTION_GET_ID].pFrame;         <- set pointer to point at old frame (which array is currently pointing at)
+        CExceptionFrames[MY_ID].pFrame = &NewFrame;                     <- set array to point at my new frame instead, now
+        CExceptionFrames[MY_ID].Exception = CEXCEPTION_NONE;            <- initialize my exception id to be NONE
+        if (setjmp(NewFrame) == 0) {                                    <- do setjmp.  it returns 1 if longjump called, otherwise 0
+            if (&PrevFrame)                                             <- this is here to force proper scoping.  it requires braces or a single line to be but after Try, otherwise won't compile.  This is always true at this point.
+
+#define Catch(e)
+            else { }                                                    <- this also forces proper scoping.  Without this they could stick their own 'else' in and it would get ugly
+            CExceptionFrames[MY_ID].Exception = CEXCEPTION_NONE;        <- no errors happened, so just set the exception id to NONE (in case it was corrupted)
+        }
+        else                                                            <- an exception occurred
+        { e = CExceptionFrames[MY_ID].Exception; e=e;}                  <- assign the caught exception id to the variable passed in.
+        CExceptionFrames[MY_ID].pFrame = PrevFrame;                     <- make the pointer in the array point at the previous frame again, as if NewFrame never existed.
+    }                                                                   <- finish off that local scope we created to have our own variables
+    if (CExceptionFrames[CEXCEPTION_GET_ID].Exception != CEXCEPTION_NONE)  <- start the actual 'catch' processing if we have an exception id saved away
+ */
+
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/c_exception/lib/CException.h b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/lib/CException.h
new file mode 100644
index 000000000..78f2f940c
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/lib/CException.h
@@ -0,0 +1,115 @@
+#ifndef _CEXCEPTION_H
+#define _CEXCEPTION_H
+
+#include <setjmp.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+
+#define CEXCEPTION_VERSION_MAJOR    1
+#define CEXCEPTION_VERSION_MINOR    3
+#define CEXCEPTION_VERSION_BUILD    2
+#define CEXCEPTION_VERSION          ((CEXCEPTION_VERSION_MAJOR << 16) | (CEXCEPTION_VERSION_MINOR << 8) | CEXCEPTION_VERSION_BUILD)
+
+//To Use CException, you have a number of options:
+//1. Just include it and run with the defaults
+//2. Define any of the following symbols at the command line to override them
+//3. Include a header file before CException.h everywhere which defines any of these
+//4. Create an Exception.h in your path, and just define EXCEPTION_USE_CONFIG_FILE first
+
+#ifdef CEXCEPTION_USE_CONFIG_FILE
+#include "CExceptionConfig.h"
+#endif
+
+//This is the value to assign when there isn't an exception
+#ifndef CEXCEPTION_NONE
+#define CEXCEPTION_NONE      (0x5A5A5A5A)
+#endif
+
+//This is number of exception stacks to keep track of (one per task)
+#ifndef CEXCEPTION_NUM_ID
+#define CEXCEPTION_NUM_ID    (1) //there is only the one stack by default
+#endif
+
+//This is the method of getting the current exception stack index (0 if only one stack)
+#ifndef CEXCEPTION_GET_ID
+#define CEXCEPTION_GET_ID    (0) //use the first index always because there is only one anyway
+#endif
+
+//The type to use to store the exception values.
+#ifndef CEXCEPTION_T
+#define CEXCEPTION_T         unsigned int
+#endif
+
+//This is an optional special handler for when there is no global Catch
+#ifndef CEXCEPTION_NO_CATCH_HANDLER
+#define CEXCEPTION_NO_CATCH_HANDLER(id)
+#endif
+
+//These hooks allow you to inject custom code into places, particularly useful for saving and restoring additional state
+#ifndef CEXCEPTION_HOOK_START_TRY
+#define CEXCEPTION_HOOK_START_TRY
+#endif
+#ifndef CEXCEPTION_HOOK_HAPPY_TRY
+#define CEXCEPTION_HOOK_HAPPY_TRY
+#endif
+#ifndef CEXCEPTION_HOOK_AFTER_TRY
+#define CEXCEPTION_HOOK_AFTER_TRY
+#endif
+#ifndef CEXCEPTION_HOOK_START_CATCH
+#define CEXCEPTION_HOOK_START_CATCH
+#endif
+
+//exception frame structures
+typedef struct {
+  jmp_buf* pFrame;
+  CEXCEPTION_T volatile Exception;
+} CEXCEPTION_FRAME_T;
+
+//actual root frame storage (only one if single-tasking)
+extern volatile CEXCEPTION_FRAME_T CExceptionFrames[];
+
+//Try (see C file for explanation)
+#define Try                                                         \
+    {                                                               \
+        jmp_buf *PrevFrame, NewFrame;                               \
+        unsigned int MY_ID = CEXCEPTION_GET_ID;                     \
+        PrevFrame = CExceptionFrames[MY_ID].pFrame;                 \
+        CExceptionFrames[MY_ID].pFrame = (jmp_buf*)(&NewFrame);     \
+        CExceptionFrames[MY_ID].Exception = CEXCEPTION_NONE;        \
+        CEXCEPTION_HOOK_START_TRY;                                  \
+        if (setjmp(NewFrame) == 0) {                                \
+            if (1)
+
+//Catch (see C file for explanation)
+#define Catch(e)                                                    \
+            else { }                                                \
+            CExceptionFrames[MY_ID].Exception = CEXCEPTION_NONE;    \
+            CEXCEPTION_HOOK_HAPPY_TRY;                              \
+        }                                                           \
+        else                                                        \
+        {                                                           \
+            e = CExceptionFrames[MY_ID].Exception;                  \
+            (void)e;                                                \
+            CEXCEPTION_HOOK_START_CATCH;                            \
+        }                                                           \
+        CExceptionFrames[MY_ID].pFrame = PrevFrame;                 \
+        CEXCEPTION_HOOK_AFTER_TRY;                                  \
+    }                                                               \
+    if (CExceptionFrames[CEXCEPTION_GET_ID].Exception != CEXCEPTION_NONE)
+
+//Throw an Error
+void Throw(CEXCEPTION_T ExceptionID);
+
+//Just exit the Try block and skip the Catch.
+#define ExitTry() Throw(CEXCEPTION_NONE)
+
+#ifdef __cplusplus
+}   // extern "C"
+#endif
+
+
+#endif // _CEXCEPTION_H
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/c_exception/lib/meson.build b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/lib/meson.build
new file mode 100644
index 000000000..c9afe2048
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/lib/meson.build
@@ -0,0 +1,11 @@
+#
+# build script written by : Michael Brockus.
+# github repo author: Mark VanderVoord.
+#
+# license: MIT
+#
+cexception_dir = include_directories('.')
+
+cexception_lib = static_library(meson.project_name(), 
+    sources: ['CException.c'],
+    include_directories: cexception_dir)
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/c_exception/meson.build b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/meson.build
new file mode 100644
index 000000000..e44cb906d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/meson.build
@@ -0,0 +1,48 @@
+#
+# build script written by : Michael Brockus.
+# github repo author: Mark VanderVoord.
+#
+# license: MIT
+#
+project('CException', 'c',
+    license: 'MIT',
+    meson_version: '>=0.53.0',
+    default_options: ['layout=flat', 'warning_level=3', 'werror=true', 'c_std=c11']
+)
+lang = 'c'
+cc = meson.get_compiler(lang)
+
+#
+# Meson: Add compiler flags
+if cc.get_id() == 'clang'
+    add_project_arguments(cc.get_supported_arguments(
+            [
+                '-Wexit-time-destructors',
+                '-Wglobal-constructors',
+                '-Wmissing-prototypes',
+                '-Wmissing-noreturn',
+                '-Wno-missing-braces',
+                '-Wold-style-cast', '-Wpointer-arith', '-Wweak-vtables',
+                '-Wcast-align', '-Wconversion', '-Wcast-qual', '-Wshadow'
+            ]
+        ), language: lang)
+endif
+
+if cc.get_argument_syntax() == 'gcc'
+    add_project_arguments(cc.get_supported_arguments(
+            [
+                '-Wformat', '-Waddress', '-Winit-self', '-Wno-multichar',
+                '-Wpointer-arith'       , '-Wwrite-strings'              ,
+                '-Wno-parentheses'      , '-Wno-type-limits'             ,
+                '-Wformat-security'     , '-Wunreachable-code'           ,
+                '-Waggregate-return'    , '-Wformat-nonliteral'          ,
+                '-Wmissing-declarations', '-Wmissing-include-dirs'       ,
+                '-Wno-unused-parameter'
+            ]
+        ), language: lang)
+endif
+
+#
+# Sub directory to project source code
+subdir('lib')
+cexception_dep = declare_dependency(link_with: cexception_lib, include_directories: cexception_dir)
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/c_exception/project.yml b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/project.yml
new file mode 100644
index 000000000..ab4a290af
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/project.yml
@@ -0,0 +1,37 @@
+---
+
+# This project file is for using Ceedling to run CException's self-tests. The
+# only requirement for USING CException is in the lib folder.
+
+:project:
+  :use_exceptions: FALSE
+  :use_test_preprocessor: FALSE
+  :use_auxiliary_dependencies: FALSE
+  :build_root: build
+  :test_file_prefix: Test
+  :which_ceedling: gem
+  :ceedling_version: 0.29.1
+  :default_tasks:
+    - clobber test:all
+
+:extension:
+  :executable: .out
+
+:paths:
+  :test:
+    - +:test/**
+    - -:test/support
+  :source:
+    - lib/**
+  :support:
+    - test/support
+
+:defines:
+  :test:
+    - TEST
+    - CEXCEPTION_USE_CONFIG_FILE
+  :test_preprocess:
+    - TEST
+    - CEXCEPTION_USE_CONFIG_FILE
+
+...
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/c_exception/test/TestException.c b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/test/TestException.c
new file mode 100644
index 000000000..e248cb0f2
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/test/TestException.c
@@ -0,0 +1,391 @@
+#include "unity.h"
+#include "CException.h"
+
+volatile int TestingTheFallback;
+volatile int TestingTheFallbackId;
+
+void setUp(void)
+{
+    CExceptionFrames[0].pFrame = NULL;
+    TestingTheFallback = 0;
+}
+
+void tearDown(void)
+{
+}
+
+void test_BasicTryDoesNothingIfNoThrow(void)
+{
+  int i = 0;
+  CEXCEPTION_T e = 0x5a;
+
+  Try
+  {
+    i += 1;
+  }
+  Catch(e)
+  {
+    TEST_FAIL_MESSAGE("Should Not Enter Catch If Not Thrown");
+  }
+
+  //verify that e was untouched
+  TEST_ASSERT_EQUAL(0x5a, e);
+
+  // verify that i was incremented once
+  TEST_ASSERT_EQUAL(1, i);
+}
+
+void test_BasicThrowAndCatch(void)
+{
+  CEXCEPTION_T e;
+
+  Try
+  {
+    Throw(0xBE);
+    TEST_FAIL_MESSAGE("Should Have Thrown An Error");
+  }
+  Catch(e)
+  {
+    //verify that e has the right data
+    TEST_ASSERT_EQUAL(0xBE, e);
+  }
+
+  //verify that e STILL has the right data
+  TEST_ASSERT_EQUAL(0xBE, e);
+}
+
+void test_BasicThrowAndCatch_WithMiniSyntax(void)
+{
+  CEXCEPTION_T e;
+
+  //Mini Throw and Catch
+  Try
+    Throw(0xEF);
+  Catch(e)
+    TEST_ASSERT_EQUAL(0xEF, e);
+  TEST_ASSERT_EQUAL(0xEF, e);
+
+  //Mini Passthrough
+  Try
+    e = 0;
+  Catch(e)
+    TEST_FAIL_MESSAGE("I shouldn't be caught because there was no throw");
+
+  TEST_ASSERT_EQUAL(0, e);
+}
+
+void test_VerifyVolatilesSurviveThrowAndCatch(void)
+{
+  volatile unsigned int VolVal = 0;
+  CEXCEPTION_T e;
+
+  Try
+  {
+    VolVal = 2;
+    Throw(0xBF);
+    TEST_FAIL_MESSAGE("Should Have Thrown An Error");
+  }
+  Catch(e)
+  {
+    VolVal += 2;
+    TEST_ASSERT_EQUAL(0xBF, e);
+  }
+
+  TEST_ASSERT_EQUAL(4, VolVal);
+  TEST_ASSERT_EQUAL(0xBF, e);
+}
+
+void HappyExceptionThrower(unsigned int ID)
+{
+  if (ID != 0)
+  {
+    Throw(ID);
+  }
+}
+
+void test_ThrowFromASubFunctionAndCatchInRootFunc(void)
+{
+  volatile  unsigned int ID = 0;
+  CEXCEPTION_T e;
+
+  Try
+  {
+
+    HappyExceptionThrower(0xBA);
+    TEST_FAIL_MESSAGE("Should Have Thrown An Exception");
+  }
+  Catch(e)
+  {
+    ID = e;
+  }
+
+  //verify that I can pass that value to something else
+  TEST_ASSERT_EQUAL(0xBA, e);
+  //verify that ID and e have the same value
+  TEST_ASSERT_EQUAL(ID, e);
+}
+
+void HappyExceptionRethrower(unsigned int ID)
+{
+  CEXCEPTION_T e;
+
+  Try
+  {
+    Throw(ID);
+  }
+  Catch(e)
+  {
+    switch (e)
+    {
+    case 0xBD:
+      Throw(0xBF);
+      break;
+    default:
+      break;
+    }
+  }
+}
+
+void test_ThrowAndCatchFromASubFunctionAndRethrowToCatchInRootFunc(void)
+{
+  volatile  unsigned int ID = 0;
+  CEXCEPTION_T e;
+
+  Try
+  {
+    HappyExceptionRethrower(0xBD);
+    TEST_FAIL_MESSAGE("Should Have Rethrown Exception");
+  }
+  Catch(e)
+  {
+    ID = 1;
+  }
+
+  TEST_ASSERT_EQUAL(0xBF, e);
+  TEST_ASSERT_EQUAL(1, ID);
+}
+
+void test_ThrowAndCatchFromASubFunctionAndNoRethrowToCatchInRootFunc(void)
+{
+  CEXCEPTION_T e = 3;
+
+  Try
+  {
+    HappyExceptionRethrower(0xBF);
+  }
+  Catch(e)
+  {
+    TEST_FAIL_MESSAGE("Should Not Have Re-thrown Error (it should have already been caught)");
+  }
+
+  //verify that THIS e is still untouched, even though subfunction was touched
+  TEST_ASSERT_EQUAL(3, e);
+}
+
+void test_ThrowAnErrorThenEnterATryBlockFromWithinCatch_VerifyThisDoesntCorruptExceptionId(void)
+{
+  CEXCEPTION_T e;
+
+  Try
+  {
+    HappyExceptionThrower(0xBF);
+    TEST_FAIL_MESSAGE("Should Have Thrown Exception");
+  }
+  Catch(e)
+  {
+    TEST_ASSERT_EQUAL(0xBF, e);
+    HappyExceptionRethrower(0x12);
+    TEST_ASSERT_EQUAL(0xBF, e);
+  }
+  TEST_ASSERT_EQUAL(0xBF, e);
+}
+
+void test_ThrowAnErrorThenEnterATryBlockFromWithinCatch_VerifyThatEachExceptionIdIndependent(void)
+{
+  CEXCEPTION_T e1, e2;
+
+  Try
+  {
+    HappyExceptionThrower(0xBF);
+    TEST_FAIL_MESSAGE("Should Have Thrown Exception");
+  }
+  Catch(e1)
+  {
+    TEST_ASSERT_EQUAL(0xBF, e1);
+    Try
+    {
+      HappyExceptionThrower(0x12);
+    }
+    Catch(e2)
+    {
+      TEST_ASSERT_EQUAL(0x12, e2);
+    }
+    TEST_ASSERT_EQUAL(0x12, e2);
+    TEST_ASSERT_EQUAL(0xBF, e1);
+  }
+  TEST_ASSERT_EQUAL(0x12, e2);
+  TEST_ASSERT_EQUAL(0xBF, e1);
+}
+
+void test_CanHaveMultipleTryBlocksInASingleFunction(void)
+{
+  CEXCEPTION_T e;
+
+  Try
+  {
+    HappyExceptionThrower(0x01);
+    TEST_FAIL_MESSAGE("Should Have Thrown Exception");
+  }
+  Catch(e)
+  {
+    TEST_ASSERT_EQUAL(0x01, e);
+  }
+
+  Try
+  {
+    HappyExceptionThrower(0xF0);
+    TEST_FAIL_MESSAGE("Should Have Thrown Exception");
+  }
+  Catch(e)
+  {
+    TEST_ASSERT_EQUAL(0xF0, e);
+  }
+}
+
+void test_CanHaveNestedTryBlocksInASingleFunction_ThrowInside(void)
+{
+  int i = 0;
+  CEXCEPTION_T e;
+
+  Try
+  {
+    Try
+    {
+      HappyExceptionThrower(0x01);
+      i = 1;
+      TEST_FAIL_MESSAGE("Should Have Rethrown Exception");
+    }
+    Catch(e)
+    {
+      TEST_ASSERT_EQUAL(0x01, e);
+    }
+  }
+  Catch(e)
+  {
+    TEST_FAIL_MESSAGE("Should Have Been Caught By Inside Catch");
+  }
+
+  // verify that i is still zero
+  TEST_ASSERT_EQUAL(0, i);
+}
+
+void test_CanHaveNestedTryBlocksInASingleFunction_ThrowOutside(void)
+{
+  int i = 0;
+  CEXCEPTION_T e;
+
+  Try
+  {
+    Try
+    {
+      i = 2;
+    }
+    Catch(e)
+    {
+      TEST_FAIL_MESSAGE("Should Not Be Caught Here");
+    }
+    HappyExceptionThrower(0x01);
+    TEST_FAIL_MESSAGE("Should Have Rethrown Exception");
+  }
+  Catch(e)
+  {
+    TEST_ASSERT_EQUAL(0x01, e);
+  }
+
+  // verify that i is 2
+  TEST_ASSERT_EQUAL(2, i);
+}
+
+void test_AThrowWithoutATryCatchWillUseDefaultHandlerIfSpecified(void)
+{
+    //Let the fallback handler know we're expecting it to get called this time, so don't fail
+    TestingTheFallback = 1;
+
+    Throw(0xBE);
+
+    //We know the fallback was run because it decrements the counter above
+    TEST_ASSERT_FALSE(TestingTheFallback);
+    TEST_ASSERT_EQUAL(0xBE, TestingTheFallbackId);
+}
+
+void test_AThrowWithoutOutsideATryCatchWillUseDefaultHandlerEvenAfterTryCatch(void)
+{
+    CEXCEPTION_T e;
+
+    Try
+    {
+        //It's not really important that we do anything here.
+    }
+    Catch(e)
+    {
+        //The entire purpose here is just to make sure things get set back to using the default handler when done
+    }
+
+    //Let the fallback handler know we're expecting it to get called this time, so don't fail
+    TestingTheFallback = 1;
+
+    Throw(0xBE);
+
+    //We know the fallback was run because it decrements the counter above
+    TEST_ASSERT_FALSE(TestingTheFallback);
+    TEST_ASSERT_EQUAL(0xBE, TestingTheFallbackId);
+}
+
+void test_AbilityToExitTryWithoutThrowingAnError(void)
+{
+    int i=0;
+    CEXCEPTION_T e;
+
+    Try
+    {
+        ExitTry();
+        i = 1;
+        TEST_FAIL_MESSAGE("Should Have Exited Try Before This");
+    }
+    Catch(e)
+    {
+        i = 2;
+        TEST_FAIL_MESSAGE("Should Not Have Been Caught");
+    }
+
+    // verify that i is still zero
+    TEST_ASSERT_EQUAL(0, i);
+}
+
+void test_AbilityToExitTryWillOnlyExitOneLevel(void)
+{
+    int i=0;
+    CEXCEPTION_T e;
+    CEXCEPTION_T e2;
+
+    Try
+    {
+        Try
+        {
+            ExitTry();
+            TEST_FAIL_MESSAGE("Should Have Exited Try Before This");
+        }
+        Catch(e)
+        {
+            TEST_FAIL_MESSAGE("Should Not Have Been Caught By Inside");
+        }
+        i = 1;
+    }
+    Catch(e2)
+    {
+        TEST_FAIL_MESSAGE("Should Not Have Been Caught By Outside");
+    }
+
+    // verify that we picked up and ran after first Try
+    TEST_ASSERT_EQUAL(1, i);
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/c_exception/test/support/CExceptionConfig.h b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/test/support/CExceptionConfig.h
new file mode 100644
index 000000000..66cb87e7b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/c_exception/test/support/CExceptionConfig.h
@@ -0,0 +1,46 @@
+#ifndef _EXCEPTION_H
+#define _EXCEPTION_H
+
+#include "unity.h"
+
+extern volatile int TestingTheFallback;
+extern volatile int TestingTheFallbackId;
+
+//Optionally define the exception type (something like an int which can be directly assigned)
+#define CEXCEPTION_T    int
+
+// Optionally define the reserved value representing NO EXCEPTION
+#define CEXCEPTION_NONE (1234)
+
+// Optionally define a special handler for unhandled exceptions
+#define CEXCEPTION_NO_CATCH_HANDLER(id)             \
+{                                                   \
+    if (!TestingTheFallback)                        \
+    {                                               \
+        TEST_FAIL_MESSAGE("Unexpected Exception!"); \
+    }                                               \
+    else                                            \
+    {                                               \
+        TestingTheFallbackId = id;                  \
+        TestingTheFallback--;                       \
+    }                                               \
+}
+
+// Multi-Tasking environments will need a couple of macros defined to make this library
+// properly handle  multiple exception stacks.  You will need to include and required
+// definitions, then define the following macros:
+//    EXCEPTION_GET_ID - returns the id of the current task indexed 0 to (numtasks - 1)
+//    EXCEPTION_NUM_ID - returns the number of tasks that might be returned
+//
+// For example, Quadros might include the following implementation:
+#ifndef TEST
+#include "OSAPI.h"
+#define CEXCEPTION_GET_ID    (KS_GetTaskID())
+#define CEXCEPTION_NUM_ID    (NTASKS + 1)
+#endif
+
+//This could be a good place to define/include some error ID's:
+#define ERROR_ID_EVERYTHING_IS_BROKEN  (0x88)
+#define ERROR_ID_ONLY_THIS_IS_BROKEN   (0x77)
+
+#endif // _EXCEPTION_H
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/.editorconfig b/FreeRTOS-Plus/Test/CMock/vendor/unity/.editorconfig
new file mode 100644
index 000000000..7b7a47a01
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/.editorconfig
@@ -0,0 +1,27 @@
+###############################################################################
+# Unity Project - A Test Framework for C
+# .editorconfig - F. Zahn 2019
+###############################################################################
+
+# This is the topmost .editorconfig file
+root = true
+
+# Settings that apply to all languages / files
+[*]
+charset = utf-8
+indent_size = 4
+indent_style = space
+insert_final_newline = true
+trim_trailing_whitespace = true
+
+[*.md]
+trim_trailing_whitespace = false
+
+[*.txt]
+trim_trailing_whitespace = false
+
+[*.rb]
+indent_size = 2
+
+[*.yml]
+indent_size = 2
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/.gitattributes b/FreeRTOS-Plus/Test/CMock/vendor/unity/.gitattributes
new file mode 100644
index 000000000..f84c1623a
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/.gitattributes
@@ -0,0 +1,31 @@
+*           text=auto
+
+# These files are text and should be normalized (convert crlf to lf)
+*.rb        text
+*.test      text
+*.c         text
+*.cpp       text
+*.h         text
+*.txt       text
+*.yml       text
+*.s79       text
+*.bat       text
+*.xcl       text
+*.inc       text
+*.info      text
+*.md        text
+makefile    text
+rakefile    text
+meson.build text
+
+
+#These files are binary and should not be normalized
+*.doc       binary
+*.odt       binary
+*.pdf       binary
+*.ewd       binary
+*.eww       binary
+*.dni       binary
+*.wsdt      binary
+*.dbgdt     binary
+*.mac       binary
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/.gitignore b/FreeRTOS-Plus/Test/CMock/vendor/unity/.gitignore
new file mode 100644
index 000000000..083b4f89b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/.gitignore
@@ -0,0 +1,11 @@
+build/
+builddir/
+test/sandbox
+.DS_Store
+examples/example_1/test1.exe
+examples/example_1/test2.exe
+examples/example_2/all_tests.exe
+examples/example_1/test1.out
+examples/example_1/test2.out
+examples/example_2/all_tests.out
+examples/example_4/builddir
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/.travis.yml b/FreeRTOS-Plus/Test/CMock/vendor/unity/.travis.yml
new file mode 100644
index 000000000..d3b9a18e2
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/.travis.yml
@@ -0,0 +1,26 @@
+sudo: required
+language: ruby c
+
+matrix:
+ include:
+    #- os: osx
+    #  compiler: clang
+    #  osx_image: xcode7.3
+    - os: linux
+      dist: trusty
+      rvm: "2.4"
+      compiler: gcc
+    - os: linux
+      dist: xenial
+      rvm: "2.7"
+      compiler: clang
+
+before_install:
+  - if [ "$TRAVIS_OS_NAME" == "linux" ]; then sudo apt-get install --assume-yes --quiet gcc-multilib; fi
+
+install:
+  - gem install rspec
+  - gem install rubocop -v 0.57.2
+
+script:
+  - cd test && rake ci
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/CMakeLists.txt b/FreeRTOS-Plus/Test/CMock/vendor/unity/CMakeLists.txt
new file mode 100644
index 000000000..3a9d8a94c
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/CMakeLists.txt
@@ -0,0 +1,133 @@
+###################################################################################
+#                                                                                 #
+# NAME: CMakeLists.txt                                                            #
+#                                                                                 #
+# AUTHOR: Mike Karlesky, Mark VanderVoord, Greg Williams.                         #
+# WRITTEN BY: Michael Brockus.                                                    #
+#                                                                                 #
+# License: MIT                                                                    #
+#                                                                                 #
+###################################################################################
+
+cmake_minimum_required(VERSION 3.12)
+
+# Read src/unity.h file and get project version from it
+set(UNITY_HEADER "src/unity.h")
+
+file(STRINGS "${UNITY_HEADER}" UNITY_HEADER_CONTENT 
+    REGEX "^#define UNITY_VERSION_(MAJOR|MINOR|BUILD) +[0-9]+$"
+)
+
+set(UNITY_HEADER_VERSION_MAJOR 0)
+set(UNITY_HEADER_VERSION_MINOR 0)
+set(UNITY_HEADER_VERSION_BUILD 0)
+
+foreach(VERSION_LINE IN LISTS UNITY_HEADER_CONTENT)
+    foreach(VERSION_PART MAJOR MINOR BUILD)
+        string(CONCAT REGEX_STRING "#define UNITY_VERSION_" 
+                                   "${VERSION_PART}" 
+                                   " +([0-9]+)"
+        )
+
+        if(VERSION_LINE MATCHES "${REGEX_STRING}")
+            set(UNITY_HEADER_VERSION_${VERSION_PART} "${CMAKE_MATCH_1}")
+        endif()
+    endforeach()
+endforeach()
+
+project(unity
+    VERSION     ${UNITY_HEADER_VERSION_MAJOR}.${UNITY_HEADER_VERSION_MINOR}.${UNITY_HEADER_VERSION_BUILD}
+    LANGUAGES   C
+    DESCRIPTION "C Unit testing framework."
+)
+
+# Main target ------------------------------------------------------------------
+add_library(${PROJECT_NAME} STATIC)
+add_library(${PROJECT_NAME}::framework ALIAS ${PROJECT_NAME})
+
+# Includes ---------------------------------------------------------------------
+include(GNUInstallDirs)
+include(CMakePackageConfigHelpers)
+
+target_sources(${PROJECT_NAME}
+    PRIVATE
+        src/unity.c
+)
+
+target_include_directories(${PROJECT_NAME}
+    PUBLIC
+        $<BUILD_INTERFACE:${CMAKE_CURRENT_SOURCE_DIR}/src>
+        $<BUILD_INTERFACE:${CMAKE_CURRENT_BINARY_DIR}>
+        $<INSTALL_INTERFACE:${CMAKE_INSTALL_INCLUDEDIR}/${PROJECT_NAME}>
+)
+
+set(${PROJECT_NAME}_PUBLIC_HEADERS src/unity.h
+                                   src/unity_internals.h
+)
+
+set_target_properties(${PROJECT_NAME}
+    PROPERTIES 
+        C_STANDARD          11
+        C_STANDARD_REQUIRED ON
+        C_EXTENSIONS        OFF
+        PUBLIC_HEADER       "${${PROJECT_NAME}_PUBLIC_HEADERS}"
+        EXPORT_NAME         framework
+)
+
+target_compile_options(${PROJECT_NAME}
+    PRIVATE
+        $<$<C_COMPILER_ID:Clang>:-Wcast-align
+                                 -Wcast-qual
+                                 -Wconversion
+                                 -Wexit-time-destructors
+                                 -Wglobal-constructors
+                                 -Wmissing-noreturn
+                                 -Wmissing-prototypes
+                                 -Wno-missing-braces
+                                 -Wold-style-cast
+                                 -Wshadow
+                                 -Wweak-vtables>
+        $<$<C_COMPILER_ID:GNU>:-Waddress
+                               -Waggregate-return
+                               -Wformat-nonliteral
+                               -Wformat-security
+                               -Wformat
+                               -Winit-self
+                               -Wmissing-declarations
+                               -Wmissing-include-dirs
+                               -Wno-multichar
+                               -Wno-parentheses
+                               -Wno-type-limits
+                               -Wno-unused-parameter
+                               -Wunreachable-code
+                               -Wwrite-strings
+                               -Wpointer-arith>
+        -Wall
+        -Werror
+)
+
+write_basic_package_version_file(${PROJECT_NAME}ConfigVersion.cmake
+    VERSION       ${PROJECT_VERSION}
+    COMPATIBILITY SameMajorVersion 
+)
+
+## Target installation
+install(TARGETS   ${PROJECT_NAME}
+    EXPORT        ${PROJECT_NAME}Targets
+    ARCHIVE       DESTINATION ${CMAKE_INSTALL_LIBDIR}
+    LIBRARY       DESTINATION ${CMAKE_INSTALL_LIBDIR}
+    PUBLIC_HEADER DESTINATION ${CMAKE_INSTALL_INCLUDEDIR}/${PROJECT_NAME}
+    COMPONENT     library
+)
+
+## Target's cmake files: targets export
+install(EXPORT  ${PROJECT_NAME}Targets
+    NAMESPACE   ${PROJECT_NAME}::
+    DESTINATION ${CMAKE_INSTALL_LIBDIR}/cmake/${PROJECT_NAME}
+)
+
+## Target's cmake files: config and version config for find_package()
+install(FILES   ${PROJECT_NAME}Config.cmake
+                ${CMAKE_CURRENT_BINARY_DIR}/${PROJECT_NAME}ConfigVersion.cmake
+    DESTINATION ${CMAKE_INSTALL_LIBDIR}/cmake/${PROJECT_NAME}
+)
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/LICENSE.txt b/FreeRTOS-Plus/Test/CMock/vendor/unity/LICENSE.txt
new file mode 100644
index 000000000..d66fba53e
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/LICENSE.txt
@@ -0,0 +1,21 @@
+The MIT License (MIT)
+
+Copyright (c) <year> 2007-14 Mike Karlesky, Mark VanderVoord, Greg Williams
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in
+all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+THE SOFTWARE.
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/README.md b/FreeRTOS-Plus/Test/CMock/vendor/unity/README.md
new file mode 100644
index 000000000..e6e7ea2d0
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/README.md
@@ -0,0 +1,191 @@
+Unity Test API
+==============
+
+[![Unity Build Status](https://api.travis-ci.org/ThrowTheSwitch/Unity.png?branch=master)](https://travis-ci.org/ThrowTheSwitch/Unity)
+__Copyright (c) 2007 - 2020 Unity Project by Mike Karlesky, Mark VanderVoord, and Greg Williams__
+
+Getting Started
+===============
+The [docs](docs/) folder contains a [getting started guide](docs/UnityGettingStartedGuide.md)
+and much more tips about using Unity. 
+
+Unity Assertion Summary
+=======================
+For the full list, see [UnityAssertionsReference.md](docs/UnityAssertionsReference.md).
+
+Basic Validity Tests
+--------------------
+
+    TEST_ASSERT_TRUE(condition)
+
+Evaluates whatever code is in condition and fails if it evaluates to false
+
+    TEST_ASSERT_FALSE(condition)
+
+Evaluates whatever code is in condition and fails if it evaluates to true
+
+    TEST_ASSERT(condition)
+
+Another way of calling `TEST_ASSERT_TRUE`
+
+    TEST_ASSERT_UNLESS(condition)
+
+Another way of calling `TEST_ASSERT_FALSE`
+
+    TEST_FAIL()
+    TEST_FAIL_MESSAGE(message)
+
+This test is automatically marked as a failure. The message is output stating why.
+
+Numerical Assertions: Integers
+------------------------------
+
+    TEST_ASSERT_EQUAL_INT(expected, actual)
+    TEST_ASSERT_EQUAL_INT8(expected, actual)
+    TEST_ASSERT_EQUAL_INT16(expected, actual)
+    TEST_ASSERT_EQUAL_INT32(expected, actual)
+    TEST_ASSERT_EQUAL_INT64(expected, actual)
+
+Compare two integers for equality and display errors as signed integers. A cast will be performed
+to your natural integer size so often this can just be used. When you need to specify the exact size,
+like when comparing arrays, you can use a specific version:
+
+    TEST_ASSERT_EQUAL_UINT(expected, actual)
+    TEST_ASSERT_EQUAL_UINT8(expected, actual)
+    TEST_ASSERT_EQUAL_UINT16(expected, actual)
+    TEST_ASSERT_EQUAL_UINT32(expected, actual)
+    TEST_ASSERT_EQUAL_UINT64(expected, actual)
+
+Compare two integers for equality and display errors as unsigned integers. Like INT, there are
+variants for different sizes also.
+
+    TEST_ASSERT_EQUAL_HEX(expected, actual)
+    TEST_ASSERT_EQUAL_HEX8(expected, actual)
+    TEST_ASSERT_EQUAL_HEX16(expected, actual)
+    TEST_ASSERT_EQUAL_HEX32(expected, actual)
+    TEST_ASSERT_EQUAL_HEX64(expected, actual)
+
+Compares two integers for equality and display errors as hexadecimal. Like the other integer comparisons,
+you can specify the size... here the size will also effect how many nibbles are shown (for example, `HEX16`
+will show 4 nibbles).
+
+    TEST_ASSERT_EQUAL(expected, actual)
+
+Another way of calling TEST_ASSERT_EQUAL_INT
+
+    TEST_ASSERT_INT_WITHIN(delta, expected, actual)
+
+Asserts that the actual value is within plus or minus delta of the expected value. This also comes in
+size specific variants.
+
+
+    TEST_ASSERT_GREATER_THAN(threshold, actual)
+
+Asserts that the actual value is greater than the threshold. This also comes in size specific variants.
+
+
+    TEST_ASSERT_LESS_THAN(threshold, actual)
+
+Asserts that the actual value is less than the threshold. This also comes in size specific variants.
+
+
+Arrays
+------
+
+    _ARRAY
+
+You can append `_ARRAY` to any of these macros to make an array comparison of that type.  Here you will
+need to care a bit more about the actual size of the value being checked.  You will also specify an
+additional argument which is the number of elements to compare.  For example:
+
+    TEST_ASSERT_EQUAL_HEX8_ARRAY(expected, actual, elements)
+
+    _EACH_EQUAL
+
+Another array comparison option is to check that EVERY element of an array is equal to a single expected
+value. You do this by specifying the EACH_EQUAL macro. For example:
+
+    TEST_ASSERT_EACH_EQUAL_INT32(expected, actual, elements)
+
+Numerical Assertions: Bitwise
+-----------------------------
+
+    TEST_ASSERT_BITS(mask, expected, actual)
+
+Use an integer mask to specify which bits should be compared between two other integers.  High bits in the mask are compared, low bits ignored.
+
+    TEST_ASSERT_BITS_HIGH(mask, actual)
+
+Use an integer mask to specify which bits should be inspected to determine if they are all set high.  High bits in the mask are compared, low bits ignored.
+
+    TEST_ASSERT_BITS_LOW(mask, actual)
+
+Use an integer mask to specify which bits should be inspected to determine if they are all set low.  High bits in the mask are compared, low bits ignored.
+
+    TEST_ASSERT_BIT_HIGH(bit, actual)
+
+Test a single bit and verify that it is high.  The bit is specified 0-31 for a 32-bit integer.
+
+    TEST_ASSERT_BIT_LOW(bit, actual)
+
+Test a single bit and verify that it is low.  The bit is specified 0-31 for a 32-bit integer.
+
+Numerical Assertions: Floats
+----------------------------
+
+    TEST_ASSERT_FLOAT_WITHIN(delta, expected, actual)
+
+Asserts that the actual value is within plus or minus delta of the expected value.
+
+    TEST_ASSERT_EQUAL_FLOAT(expected, actual)
+    TEST_ASSERT_EQUAL_DOUBLE(expected, actual)
+
+Asserts that two floating point values are "equal" within a small % delta of the expected value.
+
+String Assertions
+-----------------
+
+    TEST_ASSERT_EQUAL_STRING(expected, actual)
+
+Compare two null-terminate strings.  Fail if any character is different or if the lengths are different.
+
+    TEST_ASSERT_EQUAL_STRING_LEN(expected, actual, len)
+
+Compare two strings.  Fail if any character is different, stop comparing after len characters.
+
+    TEST_ASSERT_EQUAL_STRING_MESSAGE(expected, actual, message)
+
+Compare two null-terminate strings.  Fail if any character is different or if the lengths are different. Output a custom message on failure.
+
+    TEST_ASSERT_EQUAL_STRING_LEN_MESSAGE(expected, actual, len, message)
+
+Compare two strings. Fail if any character is different, stop comparing after len characters. Output a custom message on failure.
+
+Pointer Assertions
+------------------
+
+Most pointer operations can be performed by simply using the integer comparisons above. However, a couple of special cases are added for clarity.
+
+    TEST_ASSERT_NULL(pointer)
+
+Fails if the pointer is not equal to NULL
+
+    TEST_ASSERT_NOT_NULL(pointer)
+
+Fails if the pointer is equal to NULL
+
+Memory Assertions
+-----------------
+
+    TEST_ASSERT_EQUAL_MEMORY(expected, actual, len)
+
+Compare two blocks of memory.  This is a good generic assertion for types that can't be coerced into acting like
+standard types... but since it's a memory compare, you have to be careful that your data types are packed.
+
+\_MESSAGE
+---------
+
+you can append \_MESSAGE to any of the macros to make them take an additional argument.  This argument
+is a string that will be printed at the end of the failure strings.  This is useful for specifying more
+information about the problem.
+
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/colour_prompt.rb b/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/colour_prompt.rb
new file mode 100644
index 000000000..85cbfd80c
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/colour_prompt.rb
@@ -0,0 +1,119 @@
+# ==========================================
+#   Unity Project - A Test Framework for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+if RUBY_PLATFORM =~ /(win|w)32$/
+  begin
+    require 'Win32API'
+  rescue LoadError
+    puts 'ERROR! "Win32API" library not found'
+    puts '"Win32API" is required for colour on a windows machine'
+    puts '  try => "gem install Win32API" on the command line'
+    puts
+  end
+  # puts
+  # puts 'Windows Environment Detected...'
+  # puts 'Win32API Library Found.'
+  # puts
+end
+
+class ColourCommandLine
+  def initialize
+    return unless RUBY_PLATFORM =~ /(win|w)32$/
+
+    get_std_handle = Win32API.new('kernel32', 'GetStdHandle', ['L'], 'L')
+    @set_console_txt_attrb =
+      Win32API.new('kernel32', 'SetConsoleTextAttribute', %w[L N], 'I')
+    @hout = get_std_handle.call(-11)
+  end
+
+  def change_to(new_colour)
+    if RUBY_PLATFORM =~ /(win|w)32$/
+      @set_console_txt_attrb.call(@hout, win32_colour(new_colour))
+    else
+      "\033[30;#{posix_colour(new_colour)};22m"
+    end
+  end
+
+  def win32_colour(colour)
+    case colour
+    when :black then 0
+    when :dark_blue then 1
+    when :dark_green then 2
+    when :dark_cyan then 3
+    when :dark_red then 4
+    when :dark_purple then 5
+    when :dark_yellow, :narrative then 6
+    when :default_white, :default, :dark_white then 7
+    when :silver then 8
+    when :blue then 9
+    when :green, :success then 10
+    when :cyan, :output then 11
+    when :red, :failure then 12
+    when :purple then 13
+    when :yellow then 14
+    when :white then 15
+    else
+      0
+    end
+  end
+
+  def posix_colour(colour)
+    # ANSI Escape Codes - Foreground colors
+    # | Code | Color                     |
+    # | 39   | Default foreground color  |
+    # | 30   | Black                     |
+    # | 31   | Red                       |
+    # | 32   | Green                     |
+    # | 33   | Yellow                    |
+    # | 34   | Blue                      |
+    # | 35   | Magenta                   |
+    # | 36   | Cyan                      |
+    # | 37   | Light gray                |
+    # | 90   | Dark gray                 |
+    # | 91   | Light red                 |
+    # | 92   | Light green               |
+    # | 93   | Light yellow              |
+    # | 94   | Light blue                |
+    # | 95   | Light magenta             |
+    # | 96   | Light cyan                |
+    # | 97   | White                     |
+
+    case colour
+    when :black then 30
+    when :red, :failure then 31
+    when :green, :success then 32
+    when :yellow then 33
+    when :blue, :narrative then 34
+    when :purple, :magenta then 35
+    when :cyan, :output then 36
+    when :white, :default_white then 37
+    when :default then 39
+    else
+      39
+    end
+  end
+
+  def out_c(mode, colour, str)
+    case RUBY_PLATFORM
+    when /(win|w)32$/
+      change_to(colour)
+      $stdout.puts str if mode == :puts
+      $stdout.print str if mode == :print
+      change_to(:default_white)
+    else
+      $stdout.puts("#{change_to(colour)}#{str}\033[0m") if mode == :puts
+      $stdout.print("#{change_to(colour)}#{str}\033[0m") if mode == :print
+    end
+  end
+end
+
+def colour_puts(role, str)
+  ColourCommandLine.new.out_c(:puts, role, str)
+end
+
+def colour_print(role, str)
+  ColourCommandLine.new.out_c(:print, role, str)
+end
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/colour_reporter.rb b/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/colour_reporter.rb
new file mode 100644
index 000000000..1c3bc2162
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/colour_reporter.rb
@@ -0,0 +1,39 @@
+# ==========================================
+#   Unity Project - A Test Framework for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+require_relative 'colour_prompt'
+
+$colour_output = true
+
+def report(message)
+  if !$colour_output
+    $stdout.puts(message)
+  else
+    message = message.join('\n') if message.class == Array
+    message.each_line do |line|
+      line.chomp!
+      colour = case line
+               when /(?:total\s+)?tests:?\s+(\d+)\s+(?:total\s+)?failures:?\s+\d+\s+Ignored:?/i
+                 Regexp.last_match(1).to_i.zero? ? :green : :red
+               when /PASS/
+                 :green
+               when /^OK$/
+                 :green
+               when /(?:FAIL|ERROR)/
+                 :red
+               when /IGNORE/
+                 :yellow
+               when /^(?:Creating|Compiling|Linking)/
+                 :white
+               else
+                 :silver
+               end
+      colour_puts(colour, line)
+    end
+  end
+  $stdout.flush
+  $stderr.flush
+end
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/generate_config.yml b/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/generate_config.yml
new file mode 100644
index 000000000..4a5e47424
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/generate_config.yml
@@ -0,0 +1,36 @@
+#this is a sample configuration file for generate_module
+#you would use it by calling generate_module with the -ygenerate_config.yml option
+#files like this are useful for customizing generate_module to your environment
+:generate_module:
+  :defaults:
+    #these defaults are used in place of any missing options at the command line
+    :path_src: ../src/
+    :path_inc: ../src/
+    :path_tst: ../test/
+    :update_svn: true
+  :includes:
+    #use [] for no additional includes, otherwise list the includes on separate lines
+    :src:
+      - Defs.h
+      - Board.h
+    :inc: []
+    :tst:
+      - Defs.h
+      - Board.h
+      - Exception.h
+  :boilerplates: 
+    #these are inserted at the top of generated files.
+    #just comment out or remove if not desired.
+    #use %1$s where you would like the file name to appear (path/extension not included)
+    :src: |
+      //-------------------------------------------
+      // %1$s.c
+      //-------------------------------------------
+    :inc: |
+      //-------------------------------------------
+      // %1$s.h
+      //-------------------------------------------
+    :tst: |
+      //-------------------------------------------
+      // Test%1$s.c : Units tests for %1$s.c
+      //-------------------------------------------
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/generate_module.rb b/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/generate_module.rb
new file mode 100644
index 000000000..3d9ee8d6d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/generate_module.rb
@@ -0,0 +1,312 @@
+# ==========================================
+#   Unity Project - A Test Framework for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+# This script creates all the files with start code necessary for a new module.
+# A simple module only requires a source file, header file, and test file.
+# Triad modules require a source, header, and test file for each triad type (like model, conductor, and hardware).
+
+require 'rubygems'
+require 'fileutils'
+require 'pathname'
+
+# TEMPLATE_TST
+TEMPLATE_TST ||= '#include "unity.h"
+
+%2$s#include "%1$s.h"
+
+void setUp(void)
+{
+}
+
+void tearDown(void)
+{
+}
+
+void test_%4$s_NeedToImplement(void)
+{
+    TEST_IGNORE_MESSAGE("Need to Implement %1$s");
+}
+'.freeze
+
+# TEMPLATE_SRC
+TEMPLATE_SRC ||= '%2$s#include "%1$s.h"
+'.freeze
+
+# TEMPLATE_INC
+TEMPLATE_INC ||= '#ifndef %3$s_H
+#define %3$s_H
+%2$s
+
+#endif // %3$s_H
+'.freeze
+
+class UnityModuleGenerator
+  ############################
+  def initialize(options = nil)
+    @options = UnityModuleGenerator.default_options
+    case options
+    when NilClass then @options
+    when String   then @options.merge!(UnityModuleGenerator.grab_config(options))
+    when Hash     then @options.merge!(options)
+    else raise 'If you specify arguments, it should be a filename or a hash of options'
+    end
+
+    # Create default file paths if none were provided
+    @options[:path_src] = "#{__dir__}/../src/"   if @options[:path_src].nil?
+    @options[:path_inc] = @options[:path_src]    if @options[:path_inc].nil?
+    @options[:path_tst] = "#{__dir__}/../test/"  if @options[:path_tst].nil?
+    @options[:path_src] += '/'                unless @options[:path_src][-1] == 47
+    @options[:path_inc] += '/'                unless @options[:path_inc][-1] == 47
+    @options[:path_tst] += '/'                unless @options[:path_tst][-1] == 47
+
+    # Built in patterns
+    @patterns = {
+      'src'  =>  {
+        '' =>  { inc: [] }
+      },
+      'test' =>  {
+        '' =>  { inc: [] }
+      },
+      'dh'   =>  {
+        'Driver'    =>  { inc: [create_filename('%1$s', 'Hardware.h')] },
+        'Hardware'  =>  { inc: [] }
+      },
+      'dih'  =>  {
+        'Driver'    =>  { inc: [create_filename('%1$s', 'Hardware.h'), create_filename('%1$s', 'Interrupt.h')] },
+        'Interrupt' =>  { inc: [create_filename('%1$s', 'Hardware.h')] },
+        'Hardware'  =>  { inc: [] }
+      },
+      'mch'  =>  {
+        'Model'     =>  { inc: [] },
+        'Conductor' =>  { inc: [create_filename('%1$s', 'Model.h'), create_filename('%1$s', 'Hardware.h')] },
+        'Hardware'  =>  { inc: [] }
+      },
+      'mvp'  =>  {
+        'Model'     =>  { inc: [] },
+        'Presenter' =>  { inc: [create_filename('%1$s', 'Model.h'), create_filename('%1$s', 'View.h')] },
+        'View'      =>  { inc: [] }
+      }
+    }
+  end
+
+  ############################
+  def self.default_options
+    {
+      pattern: 'src',
+      includes: {
+        src: [],
+        inc: [],
+        tst: []
+      },
+      update_svn: false,
+      boilerplates: {},
+      test_prefix: 'Test',
+      mock_prefix: 'Mock'
+    }
+  end
+
+  ############################
+  def self.grab_config(config_file)
+    options = default_options
+    unless config_file.nil? || config_file.empty?
+      require 'yaml'
+      yaml_guts = YAML.load_file(config_file)
+      options.merge!(yaml_guts[:unity] || yaml_guts[:cmock])
+      raise "No :unity or :cmock section found in #{config_file}" unless options
+    end
+    options
+  end
+
+  ############################
+  def files_to_operate_on(module_name, pattern = nil)
+    # strip any leading path information from the module name and save for later
+    subfolder = File.dirname(module_name)
+    module_name = File.basename(module_name)
+
+    # create triad definition
+    prefix = @options[:test_prefix] || 'Test'
+    triad = [{ ext: '.c', path: @options[:path_src], prefix: '', template: TEMPLATE_SRC, inc: :src, boilerplate: @options[:boilerplates][:src] },
+             { ext: '.h', path: @options[:path_inc], prefix: '',     template: TEMPLATE_INC, inc: :inc, boilerplate: @options[:boilerplates][:inc] },
+             { ext: '.c', path: @options[:path_tst], prefix: prefix, template: TEMPLATE_TST, inc: :tst, boilerplate: @options[:boilerplates][:tst] }]
+
+    # prepare the pattern for use
+    pattern = (pattern || @options[:pattern] || 'src').downcase
+    patterns = @patterns[pattern]
+    raise "ERROR: The design pattern '#{pattern}' specified isn't one that I recognize!" if patterns.nil?
+
+    # single file patterns (currently just 'test') can reject the other parts of the triad
+    triad.select! { |v| v[:inc] == :tst } if pattern == 'test'
+
+    # Assemble the path/names of the files we need to work with.
+    files = []
+    triad.each do |cfg|
+      patterns.each_pair do |pattern_file, pattern_traits|
+        submodule_name = create_filename(module_name, pattern_file)
+        filename = cfg[:prefix] + submodule_name + cfg[:ext]
+        files << {
+          path: (Pathname.new("#{cfg[:path]}#{subfolder}") + filename).cleanpath,
+          name: submodule_name,
+          template: cfg[:template],
+          boilerplate: cfg[:boilerplate],
+          includes: case (cfg[:inc])
+                    when :src then (@options[:includes][:src] || []) | (pattern_traits[:inc].map { |f| format(f, module_name) })
+                    when :inc then (@options[:includes][:inc] || [])
+                    when :tst then (@options[:includes][:tst] || []) | (pattern_traits[:inc].map { |f| format("#{@options[:mock_prefix]}#{f}", module_name) })
+                    end
+        }
+      end
+    end
+
+    files
+  end
+
+  ############################
+  def neutralize_filename(name, start_cap=true)
+    return name if name.empty?
+    name = name.split(/(?:\s+|_|(?=[A-Z][a-z]))|(?<=[a-z])(?=[A-Z])/).map{|v|v.capitalize}.join('_')
+    if start_cap
+      return name
+    else
+      return name[0].downcase + name[1..-1]
+    end
+  end
+
+  ############################
+  def create_filename(part1, part2 = '')
+    name = part2.empty? ? part1 : part1 + '_' + part2
+    case (@options[:naming])
+    when 'bumpy' then neutralize_filename(name,false).gsub('_','')
+    when 'camel' then neutralize_filename(name).gsub('_','')
+    when 'snake' then neutralize_filename(name).downcase
+    when 'caps'  then neutralize_filename(name).upcase
+    else              name
+    end
+  end
+
+  ############################
+  def generate(module_name, pattern = nil)
+    files = files_to_operate_on(module_name, pattern)
+
+    # Abort if all of the module files already exist
+    all_files_exist = true
+    files.each do |file|
+      all_files_exist = false unless File.exist?(file[:path])
+    end
+    raise "ERROR: File #{files[0][:name]} already exists. Exiting." if all_files_exist
+
+    # Create Source Modules
+    files.each_with_index do |file, _i|
+      # If this file already exists, don't overwrite it.
+      if File.exist?(file[:path])
+        puts "File #{file[:path]} already exists!"
+        next
+      end
+      # Create the path first if necessary.
+      FileUtils.mkdir_p(File.dirname(file[:path]), verbose: false)
+      File.open(file[:path], 'w') do |f|
+        f.write("#{file[:boilerplate]}\n" % [file[:name]]) unless file[:boilerplate].nil?
+        f.write(file[:template] % [file[:name],
+                                   file[:includes].map { |ff| "#include \"#{ff}\"\n" }.join,
+                                   file[:name].upcase.gsub(/-/, '_'),
+                                   file[:name].gsub(/-/, '_')])
+      end
+      if @options[:update_svn]
+        `svn add \"#{file[:path]}\"`
+        if $!.exitstatus.zero?
+          puts "File #{file[:path]} created and added to source control"
+        else
+          puts "File #{file[:path]} created but FAILED adding to source control!"
+        end
+      else
+        puts "File #{file[:path]} created"
+      end
+    end
+    puts 'Generate Complete'
+  end
+
+  ############################
+  def destroy(module_name, pattern = nil)
+    files_to_operate_on(module_name, pattern).each do |filespec|
+      file = filespec[:path]
+      if File.exist?(file)
+        if @options[:update_svn]
+          `svn delete \"#{file}\" --force`
+          puts "File #{file} deleted and removed from source control"
+        else
+          FileUtils.remove(file)
+          puts "File #{file} deleted"
+        end
+      else
+        puts "File #{file} does not exist so cannot be removed."
+      end
+    end
+    puts 'Destroy Complete'
+  end
+end
+
+############################
+# Handle As Command Line If Called That Way
+if $0 == __FILE__
+  destroy = false
+  options = {}
+  module_name = nil
+
+  # Parse the command line parameters.
+  ARGV.each do |arg|
+    case arg
+    when /^-d/            then destroy = true
+    when /^-u/            then options[:update_svn] = true
+    when /^-p\"?(\w+)\"?/ then options[:pattern] = Regexp.last_match(1)
+    when /^-s\"?(.+)\"?/  then options[:path_src] = Regexp.last_match(1)
+    when /^-i\"?(.+)\"?/  then options[:path_inc] = Regexp.last_match(1)
+    when /^-t\"?(.+)\"?/  then options[:path_tst] = Regexp.last_match(1)
+    when /^-n\"?(.+)\"?/  then options[:naming] = Regexp.last_match(1)
+    when /^-y\"?(.+)\"?/  then options = UnityModuleGenerator.grab_config(Regexp.last_match(1))
+    when /^(\w+)/
+      raise "ERROR: You can't have more than one Module name specified!" unless module_name.nil?
+
+      module_name = arg
+    when /^-(h|-help)/
+      ARGV = [].freeze
+    else
+      raise "ERROR: Unknown option specified '#{arg}'"
+    end
+  end
+
+  unless ARGV[0]
+    puts ["\nGENERATE MODULE\n-------- ------",
+          "\nUsage: ruby generate_module [options] module_name",
+          "  -i\"include\" sets the path to output headers to 'include' (DEFAULT ../src)",
+          "  -s\"../src\"  sets the path to output source to '../src'   (DEFAULT ../src)",
+          "  -t\"C:/test\" sets the path to output source to 'C:/test'  (DEFAULT ../test)",
+          '  -p"MCH"     sets the output pattern to MCH.',
+          '              dh   - driver hardware.',
+          '              dih  - driver interrupt hardware.',
+          '              mch  - model conductor hardware.',
+          '              mvp  - model view presenter.',
+          '              src  - just a source module, header and test. (DEFAULT)',
+          '              test - just a test file.',
+          '  -d          destroy module instead of creating it.',
+          '  -n"camel"   sets the file naming convention.',
+          '              bumpy - BumpyCaseFilenames.',
+          '              camel - camelCaseFilenames.',
+          '              snake - snake_case_filenames.',
+          '              caps  - CAPS_CASE_FILENAMES.',
+          '  -u          update subversion too (requires subversion command line)',
+          '  -y"my.yml"  selects a different yaml config file for module generation',
+          ''].join("\n")
+    exit
+  end
+
+  raise 'ERROR: You must have a Module name specified! (use option -h for help)' if module_name.nil?
+
+  if destroy
+    UnityModuleGenerator.new(options).destroy(module_name)
+  else
+    UnityModuleGenerator.new(options).generate(module_name)
+  end
+
+end
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/generate_test_runner.rb b/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/generate_test_runner.rb
new file mode 100644
index 000000000..def615df7
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/generate_test_runner.rb
@@ -0,0 +1,511 @@
+# ==========================================
+#   Unity Project - A Test Framework for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+class UnityTestRunnerGenerator
+  def initialize(options = nil)
+    @options = UnityTestRunnerGenerator.default_options
+    case options
+    when NilClass
+      @options
+    when String
+      @options.merge!(UnityTestRunnerGenerator.grab_config(options))
+    when Hash
+      # Check if some of these have been specified
+      @options[:has_setup] = !options[:setup_name].nil?
+      @options[:has_teardown] = !options[:teardown_name].nil?
+      @options[:has_suite_setup] = !options[:suite_setup].nil?
+      @options[:has_suite_teardown] = !options[:suite_teardown].nil?
+      @options.merge!(options)
+    else
+      raise 'If you specify arguments, it should be a filename or a hash of options'
+    end
+    require_relative 'type_sanitizer'
+  end
+
+  def self.default_options
+    {
+      includes: [],
+      defines: [],
+      plugins: [],
+      framework: :unity,
+      test_prefix: 'test|spec|should',
+      mock_prefix: 'Mock',
+      mock_suffix: '',
+      setup_name: 'setUp',
+      teardown_name: 'tearDown',
+      test_reset_name: 'resetTest',
+      test_verify_name: 'verifyTest',
+      main_name: 'main', # set to :auto to automatically generate each time
+      main_export_decl: '',
+      cmdline_args: false,
+      omit_begin_end: false,
+      use_param_tests: false,
+      include_extensions: '(?:hpp|hh|H|h)',
+      source_extensions: '(?:cpp|cc|ino|C|c)'
+    }
+  end
+
+  def self.grab_config(config_file)
+    options = default_options
+    unless config_file.nil? || config_file.empty?
+      require 'yaml'
+      yaml_guts = YAML.load_file(config_file)
+      options.merge!(yaml_guts[:unity] || yaml_guts[:cmock])
+      raise "No :unity or :cmock section found in #{config_file}" unless options
+    end
+    options
+  end
+
+  def run(input_file, output_file, options = nil)
+    @options.merge!(options) unless options.nil?
+
+    # pull required data from source file
+    source = File.read(input_file)
+    source = source.force_encoding('ISO-8859-1').encode('utf-8', replace: nil)
+    tests = find_tests(source)
+    headers = find_includes(source)
+    testfile_includes = (headers[:local] + headers[:system])
+    used_mocks = find_mocks(testfile_includes)
+    testfile_includes = (testfile_includes - used_mocks)
+    testfile_includes.delete_if { |inc| inc =~ /(unity|cmock)/ }
+    find_setup_and_teardown(source)
+
+    # build runner file
+    generate(input_file, output_file, tests, used_mocks, testfile_includes)
+
+    # determine which files were used to return them
+    all_files_used = [input_file, output_file]
+    all_files_used += testfile_includes.map { |filename| filename + '.c' } unless testfile_includes.empty?
+    all_files_used += @options[:includes] unless @options[:includes].empty?
+    all_files_used += headers[:linkonly] unless headers[:linkonly].empty?
+    all_files_used.uniq
+  end
+
+  def generate(input_file, output_file, tests, used_mocks, testfile_includes)
+    File.open(output_file, 'w') do |output|
+      create_header(output, used_mocks, testfile_includes)
+      create_externs(output, tests, used_mocks)
+      create_mock_management(output, used_mocks)
+      create_setup(output)
+      create_teardown(output)
+      create_suite_setup(output)
+      create_suite_teardown(output)
+      create_reset(output)
+      create_run_test(output) unless tests.empty?
+      create_args_wrappers(output, tests)
+      create_main(output, input_file, tests, used_mocks)
+    end
+
+    return unless @options[:header_file] && !@options[:header_file].empty?
+
+    File.open(@options[:header_file], 'w') do |output|
+      create_h_file(output, @options[:header_file], tests, testfile_includes, used_mocks)
+    end
+  end
+
+  def find_tests(source)
+    tests_and_line_numbers = []
+
+    # contains characters which will be substituted from within strings, doing
+    # this prevents these characters from interfering with scrubbers
+    # @ is not a valid C character, so there should be no clashes with files genuinely containing these markers
+    substring_subs = { '{' => '@co@', '}' => '@cc@', ';' => '@ss@', '/' => '@fs@' }
+    substring_re = Regexp.union(substring_subs.keys)
+    substring_unsubs = substring_subs.invert                   # the inverse map will be used to fix the strings afterwords
+    substring_unsubs['@quote@'] = '\\"'
+    substring_unsubs['@apos@'] = '\\\''
+    substring_unre = Regexp.union(substring_unsubs.keys)
+    source_scrubbed = source.clone
+    source_scrubbed = source_scrubbed.gsub(/\\"/, '@quote@')   # hide escaped quotes to allow capture of the full string/char
+    source_scrubbed = source_scrubbed.gsub(/\\'/, '@apos@')    # hide escaped apostrophes to allow capture of the full string/char
+    source_scrubbed = source_scrubbed.gsub(/("[^"\n]*")|('[^'\n]*')/) { |s| s.gsub(substring_re, substring_subs) } # temporarily hide problematic characters within strings
+    source_scrubbed = source_scrubbed.gsub(/\/\/(?:.+\/\*|\*(?:$|[^\/])).*$/, '')  # remove line comments that comment out the start of blocks
+    source_scrubbed = source_scrubbed.gsub(/\/\*.*?\*\//m, '')                     # remove block comments
+    source_scrubbed = source_scrubbed.gsub(/\/\/.*$/, '')                          # remove line comments (all that remain)
+    lines = source_scrubbed.split(/(^\s*\#.*$) | (;|\{|\}) /x)                     # Treat preprocessor directives as a logical line. Match ;, {, and } as end of lines
+                           .map { |line| line.gsub(substring_unre, substring_unsubs) } # unhide the problematic characters previously removed
+
+    lines.each_with_index do |line, _index|
+      # find tests
+      next unless line =~ /^((?:\s*(?:TEST_CASE|TEST_RANGE)\s*\(.*?\)\s*)*)\s*void\s+((?:#{@options[:test_prefix]}).*)\s*\(\s*(.*)\s*\)/m
+
+      arguments = Regexp.last_match(1)
+      name = Regexp.last_match(2)
+      call = Regexp.last_match(3)
+      params = Regexp.last_match(4)
+      args = nil
+
+      if @options[:use_param_tests] && !arguments.empty?
+        args = []
+        arguments.scan(/\s*TEST_CASE\s*\((.*)\)\s*$/) { |a| args << a[0] }
+
+        arguments.scan(/\s*TEST_RANGE\s*\((.*)\)\s*$/).flatten.each do |range_str|
+          args += range_str.scan(/\[(-?\d+.?\d*), *(-?\d+.?\d*), *(-?\d+.?\d*)\]/).map do |arg_values_str|
+            arg_values_str.map do |arg_value_str|
+              arg_value_str.include?('.') ? arg_value_str.to_f : arg_value_str.to_i
+            end
+          end.map do |arg_values|
+            (arg_values[0]..arg_values[1]).step(arg_values[2]).to_a
+          end.reduce do |result, arg_range_expanded|
+            result.product(arg_range_expanded)
+          end.map do |arg_combinations|
+            arg_combinations.flatten.join(', ')
+          end
+        end
+      end
+
+      tests_and_line_numbers << { test: name, args: args, call: call, params: params, line_number: 0 }
+    end
+
+    tests_and_line_numbers.uniq! { |v| v[:test] }
+
+    # determine line numbers and create tests to run
+    source_lines = source.split("\n")
+    source_index = 0
+    tests_and_line_numbers.size.times do |i|
+      source_lines[source_index..-1].each_with_index do |line, index|
+        next unless line =~ /\s+#{tests_and_line_numbers[i][:test]}(?:\s|\()/
+
+        source_index += index
+        tests_and_line_numbers[i][:line_number] = source_index + 1
+        break
+      end
+    end
+
+    tests_and_line_numbers
+  end
+
+  def find_includes(source)
+    # remove comments (block and line, in three steps to ensure correct precedence)
+    source.gsub!(/\/\/(?:.+\/\*|\*(?:$|[^\/])).*$/, '')  # remove line comments that comment out the start of blocks
+    source.gsub!(/\/\*.*?\*\//m, '')                     # remove block comments
+    source.gsub!(/\/\/.*$/, '')                          # remove line comments (all that remain)
+
+    # parse out includes
+    includes = {
+      local: source.scan(/^\s*#include\s+\"\s*(.+\.#{@options[:include_extensions]})\s*\"/).flatten,
+      system: source.scan(/^\s*#include\s+<\s*(.+)\s*>/).flatten.map { |inc| "<#{inc}>" },
+      linkonly: source.scan(/^TEST_FILE\(\s*\"\s*(.+\.#{@options[:source_extensions]})\s*\"/).flatten
+    }
+    includes
+  end
+
+  def find_mocks(includes)
+    mock_headers = []
+    includes.each do |include_path|
+      include_file = File.basename(include_path)
+      mock_headers << include_path if include_file =~ /^#{@options[:mock_prefix]}.*#{@options[:mock_suffix]}$/i
+    end
+    mock_headers
+  end
+
+  def find_setup_and_teardown(source)
+    @options[:has_setup] = source =~ /void\s+#{@options[:setup_name]}\s*\(/
+    @options[:has_teardown] = source =~ /void\s+#{@options[:teardown_name]}\s*\(/
+    @options[:has_suite_setup] ||= (source =~ /void\s+suiteSetUp\s*\(/)
+    @options[:has_suite_teardown] ||= (source =~ /void\s+suiteTearDown\s*\(/)
+  end
+
+  def create_header(output, mocks, testfile_includes = [])
+    output.puts('/* AUTOGENERATED FILE. DO NOT EDIT. */')
+    output.puts("\n/*=======Automagically Detected Files To Include=====*/")
+    output.puts("#include \"#{@options[:framework]}.h\"")
+    output.puts('#include "cmock.h"') unless mocks.empty?
+    if @options[:defines] && !@options[:defines].empty?
+      @options[:defines].each { |d| output.puts("#ifndef #{d}\n#define #{d}\n#endif /* #{d} */") }
+    end
+    if @options[:header_file] && !@options[:header_file].empty?
+      output.puts("#include \"#{File.basename(@options[:header_file])}\"")
+    else
+      @options[:includes].flatten.uniq.compact.each do |inc|
+        output.puts("#include #{inc.include?('<') ? inc : "\"#{inc}\""}")
+      end
+      testfile_includes.each do |inc|
+        output.puts("#include #{inc.include?('<') ? inc : "\"#{inc}\""}")
+      end
+    end
+    mocks.each do |mock|
+      output.puts("#include \"#{mock}\"")
+    end
+    output.puts('#include "CException.h"') if @options[:plugins].include?(:cexception)
+
+    return unless @options[:enforce_strict_ordering]
+
+    output.puts('')
+    output.puts('int GlobalExpectCount;')
+    output.puts('int GlobalVerifyOrder;')
+    output.puts('char* GlobalOrderError;')
+  end
+
+  def create_externs(output, tests, _mocks)
+    output.puts("\n/*=======External Functions This Runner Calls=====*/")
+    output.puts("extern void #{@options[:setup_name]}(void);")
+    output.puts("extern void #{@options[:teardown_name]}(void);")
+    output.puts("\n#ifdef __cplusplus\nextern \"C\"\n{\n#endif") if @options[:externc]
+    tests.each do |test|
+      output.puts("extern void #{test[:test]}(#{test[:call] || 'void'});")
+    end
+    output.puts("#ifdef __cplusplus\n}\n#endif") if @options[:externc]
+    output.puts('')
+  end
+
+  def create_mock_management(output, mock_headers)
+    output.puts("\n/*=======Mock Management=====*/")
+    output.puts('static void CMock_Init(void)')
+    output.puts('{')
+
+    if @options[:enforce_strict_ordering]
+      output.puts('  GlobalExpectCount = 0;')
+      output.puts('  GlobalVerifyOrder = 0;')
+      output.puts('  GlobalOrderError = NULL;')
+    end
+
+    mocks = mock_headers.map { |mock| File.basename(mock, '.*') }
+    mocks.each do |mock|
+      mock_clean = TypeSanitizer.sanitize_c_identifier(mock)
+      output.puts("  #{mock_clean}_Init();")
+    end
+    output.puts("}\n")
+
+    output.puts('static void CMock_Verify(void)')
+    output.puts('{')
+    mocks.each do |mock|
+      mock_clean = TypeSanitizer.sanitize_c_identifier(mock)
+      output.puts("  #{mock_clean}_Verify();")
+    end
+    output.puts("}\n")
+
+    output.puts('static void CMock_Destroy(void)')
+    output.puts('{')
+    mocks.each do |mock|
+      mock_clean = TypeSanitizer.sanitize_c_identifier(mock)
+      output.puts("  #{mock_clean}_Destroy();")
+    end
+    output.puts("}\n")
+  end
+
+  def create_setup(output)
+    return if @options[:has_setup]
+
+    output.puts("\n/*=======Setup (stub)=====*/")
+    output.puts("void #{@options[:setup_name]}(void) {}")
+  end
+
+  def create_teardown(output)
+    return if @options[:has_teardown]
+
+    output.puts("\n/*=======Teardown (stub)=====*/")
+    output.puts("void #{@options[:teardown_name]}(void) {}")
+  end
+
+  def create_suite_setup(output)
+    return if @options[:suite_setup].nil?
+
+    output.puts("\n/*=======Suite Setup=====*/")
+    output.puts('void suiteSetUp(void)')
+    output.puts('{')
+    output.puts(@options[:suite_setup])
+    output.puts('}')
+  end
+
+  def create_suite_teardown(output)
+    return if @options[:suite_teardown].nil?
+
+    output.puts("\n/*=======Suite Teardown=====*/")
+    output.puts('int suiteTearDown(int num_failures)')
+    output.puts('{')
+    output.puts(@options[:suite_teardown])
+    output.puts('}')
+  end
+
+  def create_reset(output)
+    output.puts("\n/*=======Test Reset Options=====*/")
+    output.puts("void #{@options[:test_reset_name]}(void);")
+    output.puts("void #{@options[:test_reset_name]}(void)")
+    output.puts('{')
+    output.puts("  #{@options[:teardown_name]}();")
+    output.puts('  CMock_Verify();')
+    output.puts('  CMock_Destroy();')
+    output.puts('  CMock_Init();')
+    output.puts("  #{@options[:setup_name]}();")
+    output.puts('}')
+    output.puts("void #{@options[:test_verify_name]}(void);")
+    output.puts("void #{@options[:test_verify_name]}(void)")
+    output.puts('{')
+    output.puts('  CMock_Verify();')
+    output.puts('}')
+  end
+
+  def create_run_test(output)
+    require 'erb'
+    template = ERB.new(File.read(File.join(__dir__, 'run_test.erb')), nil, '<>')
+    output.puts("\n" + template.result(binding))
+  end
+
+  def create_args_wrappers(output, tests)
+    return unless @options[:use_param_tests]
+
+    output.puts("\n/*=======Parameterized Test Wrappers=====*/")
+    tests.each do |test|
+      next if test[:args].nil? || test[:args].empty?
+
+      test[:args].each.with_index(1) do |args, idx|
+        output.puts("static void runner_args#{idx}_#{test[:test]}(void)")
+        output.puts('{')
+        output.puts("    #{test[:test]}(#{args});")
+        output.puts("}\n")
+      end
+    end
+  end
+
+  def create_main(output, filename, tests, used_mocks)
+    output.puts("\n/*=======MAIN=====*/")
+    main_name = @options[:main_name].to_sym == :auto ? "main_#{filename.gsub('.c', '')}" : (@options[:main_name]).to_s
+    if @options[:cmdline_args]
+      if main_name != 'main'
+        output.puts("#{@options[:main_export_decl]} int #{main_name}(int argc, char** argv);")
+      end
+      output.puts("#{@options[:main_export_decl]} int #{main_name}(int argc, char** argv)")
+      output.puts('{')
+      output.puts('  int parse_status = UnityParseOptions(argc, argv);')
+      output.puts('  if (parse_status != 0)')
+      output.puts('  {')
+      output.puts('    if (parse_status < 0)')
+      output.puts('    {')
+      output.puts("      UnityPrint(\"#{filename.gsub('.c', '')}.\");")
+      output.puts('      UNITY_PRINT_EOL();')
+      tests.each do |test|
+        if (!@options[:use_param_tests]) || test[:args].nil? || test[:args].empty?
+          output.puts("      UnityPrint(\"  #{test[:test]}\");")
+          output.puts('      UNITY_PRINT_EOL();')
+        else
+          test[:args].each do |args|
+            output.puts("      UnityPrint(\"  #{test[:test]}(#{args})\");")
+            output.puts('      UNITY_PRINT_EOL();')
+          end
+        end
+      end
+      output.puts('      return 0;')
+      output.puts('    }')
+      output.puts('    return parse_status;')
+      output.puts('  }')
+    else
+      main_return = @options[:omit_begin_end] ? 'void' : 'int'
+      if main_name != 'main'
+        output.puts("#{@options[:main_export_decl]} #{main_return} #{main_name}(void);")
+      end
+      output.puts("#{main_return} #{main_name}(void)")
+      output.puts('{')
+    end
+    output.puts('  suiteSetUp();') if @options[:has_suite_setup]
+    if @options[:omit_begin_end]
+      output.puts("  UnitySetTestFile(\"#{filename.gsub(/\\/, '\\\\\\')}\");")
+    else
+      output.puts("  UnityBegin(\"#{filename.gsub(/\\/, '\\\\\\')}\");")
+    end
+    tests.each do |test|
+      if (!@options[:use_param_tests]) || test[:args].nil? || test[:args].empty?
+        output.puts("  run_test(#{test[:test]}, \"#{test[:test]}\", #{test[:line_number]});")
+      else
+        test[:args].each.with_index(1) do |args, idx|
+          wrapper = "runner_args#{idx}_#{test[:test]}"
+          testname = "#{test[:test]}(#{args})".dump
+          output.puts("  run_test(#{wrapper}, #{testname}, #{test[:line_number]});")
+        end
+      end
+    end
+    output.puts
+    output.puts('  CMock_Guts_MemFreeFinal();') unless used_mocks.empty?
+    if @options[:has_suite_teardown]
+      if @options[:omit_begin_end]
+        output.puts('  (void) suite_teardown(0);')
+      else
+        output.puts('  return suiteTearDown(UnityEnd());')
+      end
+    else
+      output.puts('  return UnityEnd();') unless @options[:omit_begin_end]
+    end
+    output.puts('}')
+  end
+
+  def create_h_file(output, filename, tests, testfile_includes, used_mocks)
+    filename = File.basename(filename).gsub(/[-\/\\\.\,\s]/, '_').upcase
+    output.puts('/* AUTOGENERATED FILE. DO NOT EDIT. */')
+    output.puts("#ifndef _#{filename}")
+    output.puts("#define _#{filename}\n\n")
+    output.puts("#include \"#{@options[:framework]}.h\"")
+    output.puts('#include "cmock.h"') unless used_mocks.empty?
+    @options[:includes].flatten.uniq.compact.each do |inc|
+      output.puts("#include #{inc.include?('<') ? inc : "\"#{inc}\""}")
+    end
+    testfile_includes.each do |inc|
+      output.puts("#include #{inc.include?('<') ? inc : "\"#{inc}\""}")
+    end
+    output.puts "\n"
+    tests.each do |test|
+      if test[:params].nil? || test[:params].empty?
+        output.puts("void #{test[:test]}(void);")
+      else
+        output.puts("void #{test[:test]}(#{test[:params]});")
+      end
+    end
+    output.puts("#endif\n\n")
+  end
+end
+
+if $0 == __FILE__
+  options = { includes: [] }
+
+  # parse out all the options first (these will all be removed as we go)
+  ARGV.reject! do |arg|
+    case arg
+    when '-cexception'
+      options[:plugins] = [:cexception]
+      true
+    when /\.*\.ya?ml$/
+      options = UnityTestRunnerGenerator.grab_config(arg)
+      true
+    when /--(\w+)=\"?(.*)\"?/
+      options[Regexp.last_match(1).to_sym] = Regexp.last_match(2)
+      true
+    when /\.*\.(?:hpp|hh|H|h)$/
+      options[:includes] << arg
+      true
+    else false
+    end
+  end
+
+  # make sure there is at least one parameter left (the input file)
+  unless ARGV[0]
+    puts ["\nusage: ruby #{__FILE__} (files) (options) input_test_file (output)",
+          "\n  input_test_file         - this is the C file you want to create a runner for",
+          '  output                  - this is the name of the runner file to generate',
+          '                            defaults to (input_test_file)_Runner',
+          '  files:',
+          '    *.yml / *.yaml        - loads configuration from here in :unity or :cmock',
+          '    *.h                   - header files are added as #includes in runner',
+          '  options:',
+          '    -cexception           - include cexception support',
+          '    -externc              - add extern "C" for cpp support',
+          '    --setup_name=""       - redefine setUp func name to something else',
+          '    --teardown_name=""    - redefine tearDown func name to something else',
+          '    --main_name=""        - redefine main func name to something else',
+          '    --test_prefix=""      - redefine test prefix from default test|spec|should',
+          '    --test_reset_name=""  - redefine resetTest func name to something else',
+          '    --test_verify_name="" - redefine verifyTest func name to something else',
+          '    --suite_setup=""      - code to execute for setup of entire suite',
+          '    --suite_teardown=""   - code to execute for teardown of entire suite',
+          '    --use_param_tests=1   - enable parameterized tests (disabled by default)',
+          '    --omit_begin_end=1    - omit calls to UnityBegin and UnityEnd (disabled by default)',
+          '    --header_file=""      - path/name of test header file to generate too'].join("\n")
+    exit 1
+  end
+
+  # create the default test runner name if not specified
+  ARGV[1] = ARGV[0].gsub('.c', '_Runner.c') unless ARGV[1]
+
+  UnityTestRunnerGenerator.new(options).run(ARGV[0], ARGV[1])
+end
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/parse_output.rb b/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/parse_output.rb
new file mode 100644
index 000000000..d72c6e8b2
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/parse_output.rb
@@ -0,0 +1,322 @@
+#============================================================
+#  Author: John Theofanopoulos
+#  A simple parser. Takes the output files generated during the
+#  build process and extracts information relating to the tests.
+#
+#  Notes:
+#    To capture an output file under VS builds use the following:
+#      devenv [build instructions] > Output.txt & type Output.txt
+#
+#    To capture an output file under Linux builds use the following:
+#      make | tee Output.txt
+#
+#    This script can handle the following output formats:
+#    - normal output (raw unity)
+#    - fixture output (unity_fixture.h/.c)
+#    - fixture output with verbose flag set ("-v")
+#
+#    To use this parser use the following command
+#    ruby parseOutput.rb [options] [file]
+#        options: -xml  : produce a JUnit compatible XML file
+#           file: file to scan for results
+#============================================================
+
+# Parser class for handling the input file
+class ParseOutput
+  def initialize
+    # internal data
+    @class_name_idx = 0
+    @path_delim = nil
+
+    # xml output related
+    @xml_out = false
+    @array_list = false
+
+    # current suite name and statistics
+    @test_suite = nil
+    @total_tests = 0
+    @test_passed = 0
+    @test_failed = 0
+    @test_ignored = 0
+  end
+
+  # Set the flag to indicate if there will be an XML output file or not
+  def set_xml_output
+    @xml_out = true
+  end
+
+  # If write our output to XML
+  def write_xml_output
+    output = File.open('report.xml', 'w')
+    output << "<?xml version=\"1.0\" encoding=\"UTF-8\"?>\n"
+    @array_list.each do |item|
+      output << item << "\n"
+    end
+  end
+
+  # Pushes the suite info as xml to the array list, which will be written later
+  def push_xml_output_suite_info
+    # Insert opening tag at front
+    heading = '<testsuite name="Unity" tests="' + @total_tests.to_s + '" failures="' + @test_failed.to_s + '"' + ' skips="' + @test_ignored.to_s + '">'
+    @array_list.insert(0, heading)
+    # Push back the closing tag
+    @array_list.push '</testsuite>'
+  end
+
+  # Pushes xml output data to the array list, which will be written later
+  def push_xml_output_passed(test_name)
+    @array_list.push '    <testcase classname="' + @test_suite + '" name="' + test_name + '"/>'
+  end
+
+  # Pushes xml output data to the array list, which will be written later
+  def push_xml_output_failed(test_name, reason)
+    @array_list.push '    <testcase classname="' + @test_suite + '" name="' + test_name + '">'
+    @array_list.push '        <failure type="ASSERT FAILED">' + reason + '</failure>'
+    @array_list.push '    </testcase>'
+  end
+
+  # Pushes xml output data to the array list, which will be written later
+  def push_xml_output_ignored(test_name, reason)
+    @array_list.push '    <testcase classname="' + @test_suite + '" name="' + test_name + '">'
+    @array_list.push '        <skipped type="TEST IGNORED">' + reason + '</skipped>'
+    @array_list.push '    </testcase>'
+  end
+
+  # This function will try and determine when the suite is changed. This is
+  # is the name that gets added to the classname parameter.
+  def test_suite_verify(test_suite_name)
+    # Split the path name
+    test_name = test_suite_name.split(@path_delim)
+
+    # Remove the extension and extract the base_name
+    base_name = test_name[test_name.size - 1].split('.')[0]
+
+    # Return if the test suite hasn't changed
+    return unless base_name.to_s != @test_suite.to_s
+
+    @test_suite = base_name
+    printf "New Test: %s\n", @test_suite
+  end
+
+  # Prepares the line for verbose fixture output ("-v")
+  def prepare_fixture_line(line)
+    line = line.sub('IGNORE_TEST(', '')
+    line = line.sub('TEST(', '')
+    line = line.sub(')', ',')
+    line = line.chomp
+    array = line.split(',')
+    array.map { |x| x.to_s.lstrip.chomp }
+  end
+
+  # Test was flagged as having passed so format the output.
+  # This is using the Unity fixture output and not the original Unity output.
+  def test_passed_unity_fixture(array)
+    class_name = array[0]
+    test_name  = array[1]
+    test_suite_verify(class_name)
+    printf "%-40s PASS\n", test_name
+
+    push_xml_output_passed(test_name) if @xml_out
+  end
+
+  # Test was flagged as having failed so format the output.
+  # This is using the Unity fixture output and not the original Unity output.
+  def test_failed_unity_fixture(array)
+    class_name = array[0]
+    test_name  = array[1]
+    test_suite_verify(class_name)
+    reason_array = array[2].split(':')
+    reason = reason_array[-1].lstrip.chomp + ' at line: ' + reason_array[-4]
+
+    printf "%-40s FAILED\n", test_name
+
+    push_xml_output_failed(test_name, reason) if @xml_out
+  end
+
+  # Test was flagged as being ignored so format the output.
+  # This is using the Unity fixture output and not the original Unity output.
+  def test_ignored_unity_fixture(array)
+    class_name = array[0]
+    test_name  = array[1]
+    reason = 'No reason given'
+    if array.size > 2
+      reason_array = array[2].split(':')
+      tmp_reason = reason_array[-1].lstrip.chomp
+      reason = tmp_reason == 'IGNORE' ? 'No reason given' : tmp_reason
+    end
+    test_suite_verify(class_name)
+    printf "%-40s IGNORED\n", test_name
+
+    push_xml_output_ignored(test_name, reason) if @xml_out
+  end
+
+  # Test was flagged as having passed so format the output
+  def test_passed(array)
+    last_item = array.length - 1
+    test_name = array[last_item - 1]
+    test_suite_verify(array[@class_name_idx])
+    printf "%-40s PASS\n", test_name
+
+    return unless @xml_out
+
+    push_xml_output_passed(test_name) if @xml_out
+  end
+
+  # Test was flagged as having failed so format the line
+  def test_failed(array)
+    last_item = array.length - 1
+    test_name = array[last_item - 2]
+    reason = array[last_item].chomp.lstrip + ' at line: ' + array[last_item - 3]
+    class_name = array[@class_name_idx]
+
+    if test_name.start_with? 'TEST('
+      array2 = test_name.split(' ')
+
+      test_suite = array2[0].sub('TEST(', '')
+      test_suite = test_suite.sub(',', '')
+      class_name = test_suite
+
+      test_name = array2[1].sub(')', '')
+    end
+
+    test_suite_verify(class_name)
+    printf "%-40s FAILED\n", test_name
+
+    push_xml_output_failed(test_name, reason) if @xml_out
+  end
+
+  # Test was flagged as being ignored so format the output
+  def test_ignored(array)
+    last_item = array.length - 1
+    test_name = array[last_item - 2]
+    reason = array[last_item].chomp.lstrip
+    class_name = array[@class_name_idx]
+
+    if test_name.start_with? 'TEST('
+      array2 = test_name.split(' ')
+
+      test_suite = array2[0].sub('TEST(', '')
+      test_suite = test_suite.sub(',', '')
+      class_name = test_suite
+
+      test_name = array2[1].sub(')', '')
+    end
+
+    test_suite_verify(class_name)
+    printf "%-40s IGNORED\n", test_name
+
+    push_xml_output_ignored(test_name, reason) if @xml_out
+  end
+
+  # Adjusts the os specific members according to the current path style
+  # (Windows or Unix based)
+  def detect_os_specifics(line)
+    if line.include? '\\'
+      # Windows X:\Y\Z
+      @class_name_idx = 1
+      @path_delim = '\\'
+    else
+      # Unix Based /X/Y/Z
+      @class_name_idx = 0
+      @path_delim = '/'
+    end
+  end
+
+  # Main function used to parse the file that was captured.
+  def process(file_name)
+    @array_list = []
+
+    puts 'Parsing file: ' + file_name
+
+    @test_passed = 0
+    @test_failed = 0
+    @test_ignored = 0
+    puts ''
+    puts '=================== RESULTS ====================='
+    puts ''
+    File.open(file_name).each do |line|
+      # Typical test lines look like these:
+      # ----------------------------------------------------
+      # 1. normal output:
+      # <path>/<test_file>.c:36:test_tc1000_opsys:FAIL: Expected 1 Was 0
+      # <path>/<test_file>.c:112:test_tc5004_initCanChannel:IGNORE: Not Yet Implemented
+      # <path>/<test_file>.c:115:test_tc5100_initCanVoidPtrs:PASS
+      #
+      # 2. fixture output
+      # <path>/<test_file>.c:63:TEST(<test_group>, <test_function>):FAIL: Expected 0x00001234 Was 0x00005A5A
+      # <path>/<test_file>.c:36:TEST(<test_group>, <test_function>):IGNORE
+      # Note: "PASS" information won't be generated in this mode
+      #
+      # 3. fixture output with verbose information ("-v")
+      # TEST(<test_group, <test_file>)<path>/<test_file>:168::FAIL: Expected 0x8D Was 0x8C
+      # TEST(<test_group>, <test_file>)<path>/<test_file>:22::IGNORE: This Test Was Ignored On Purpose
+      # IGNORE_TEST(<test_group, <test_file>)
+      # TEST(<test_group, <test_file>) PASS
+      #
+      # Note: Where path is different on Unix vs Windows devices (Windows leads with a drive letter)!
+      detect_os_specifics(line)
+      line_array = line.split(':')
+
+      # If we were able to split the line then we can look to see if any of our target words
+      # were found. Case is important.
+      next unless (line_array.size >= 4) || (line.start_with? 'TEST(') || (line.start_with? 'IGNORE_TEST(')
+
+      # check if the output is fixture output (with verbose flag "-v")
+      if (line.start_with? 'TEST(') || (line.start_with? 'IGNORE_TEST(')
+        line_array = prepare_fixture_line(line)
+        if line.include? ' PASS'
+          test_passed_unity_fixture(line_array)
+          @test_passed += 1
+        elsif line.include? 'FAIL'
+          test_failed_unity_fixture(line_array)
+          @test_failed += 1
+        elsif line.include? 'IGNORE'
+          test_ignored_unity_fixture(line_array)
+          @test_ignored += 1
+        end
+      # normal output / fixture output (without verbose "-v")
+      elsif line.include? ':PASS'
+        test_passed(line_array)
+        @test_passed += 1
+      elsif line.include? ':FAIL'
+        test_failed(line_array)
+        @test_failed += 1
+      elsif line.include? ':IGNORE:'
+        test_ignored(line_array)
+        @test_ignored += 1
+      elsif line.include? ':IGNORE'
+        line_array.push('No reason given')
+        test_ignored(line_array)
+        @test_ignored += 1
+      end
+      @total_tests = @test_passed + @test_failed + @test_ignored
+    end
+    puts ''
+    puts '=================== SUMMARY ====================='
+    puts ''
+    puts 'Tests Passed  : ' + @test_passed.to_s
+    puts 'Tests Failed  : ' + @test_failed.to_s
+    puts 'Tests Ignored : ' + @test_ignored.to_s
+
+    return unless @xml_out
+
+    # push information about the suite
+    push_xml_output_suite_info
+    # write xml output file
+    write_xml_output
+  end
+end
+
+# If the command line has no values in, used a default value of Output.txt
+parse_my_file = ParseOutput.new
+
+if ARGV.size >= 1
+  ARGV.each do |arg|
+    if arg == '-xml'
+      parse_my_file.set_xml_output
+    else
+      parse_my_file.process(arg)
+      break
+    end
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/run_test.erb b/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/run_test.erb
new file mode 100644
index 000000000..cb7f2b509
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/run_test.erb
@@ -0,0 +1,37 @@
+/*=======Test Runner Used To Run Each Test=====*/
+static void run_test(UnityTestFunction func, const char* name, int line_num)
+{
+    Unity.CurrentTestName = name;
+    Unity.CurrentTestLineNumber = line_num;
+#ifdef UNITY_USE_COMMAND_LINE_ARGS
+    if (!UnityTestMatches())
+        return;
+#endif
+    Unity.NumberOfTests++;
+    UNITY_CLR_DETAILS();
+    UNITY_EXEC_TIME_START();
+    CMock_Init();
+    if (TEST_PROTECT())
+    {
+<% if @options[:plugins].include?(:cexception) %>
+        CEXCEPTION_T e;
+        Try {
+            <%= @options[:setup_name] %>();
+            func();
+        } Catch(e) {
+            TEST_ASSERT_EQUAL_HEX32_MESSAGE(CEXCEPTION_NONE, e, "Unhandled Exception!");
+        }
+<% else %>
+        <%= @options[:setup_name] %>();
+        func();
+<% end %>
+    }
+    if (TEST_PROTECT())
+    {
+        <%= @options[:teardown_name] %>();
+        CMock_Verify();
+    }
+    CMock_Destroy();
+    UNITY_EXEC_TIME_STOP();
+    UnityConcludeTest();
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/stylize_as_junit.rb b/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/stylize_as_junit.rb
new file mode 100755
index 000000000..e01f7912a
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/stylize_as_junit.rb
@@ -0,0 +1,251 @@
+#!/usr/bin/ruby
+#
+# unity_to_junit.rb
+#
+require 'fileutils'
+require 'optparse'
+require 'ostruct'
+require 'set'
+
+require 'pp'
+
+VERSION = 1.0
+
+class ArgvParser
+  #
+  # Return a structure describing the options.
+  #
+  def self.parse(args)
+    # The options specified on the command line will be collected in *options*.
+    # We set default values here.
+    options = OpenStruct.new
+    options.results_dir = '.'
+    options.root_path = '.'
+    options.out_file = 'results.xml'
+
+    opts = OptionParser.new do |o|
+      o.banner = 'Usage: unity_to_junit.rb [options]'
+
+      o.separator ''
+      o.separator 'Specific options:'
+
+      o.on('-r', '--results <dir>', 'Look for Unity Results files here.') do |results|
+        # puts "results #{results}"
+        options.results_dir = results
+      end
+
+      o.on('-p', '--root_path <path>', 'Prepend this path to files in results.') do |root_path|
+        options.root_path = root_path
+      end
+
+      o.on('-o', '--output <filename>', 'XML file to generate.') do |out_file|
+        # puts "out_file: #{out_file}"
+        options.out_file = out_file
+      end
+
+      o.separator ''
+      o.separator 'Common options:'
+
+      # No argument, shows at tail.  This will print an options summary.
+      o.on_tail('-h', '--help', 'Show this message') do
+        puts o
+        exit
+      end
+
+      # Another typical switch to print the version.
+      o.on_tail('--version', 'Show version') do
+        puts "unity_to_junit.rb version #{VERSION}"
+        exit
+      end
+    end
+
+    opts.parse!(args)
+    options
+  end
+end
+
+class UnityToJUnit
+  include FileUtils::Verbose
+  attr_reader :report, :total_tests, :failures, :ignored
+  attr_writer :targets, :root, :out_file
+
+  def initialize
+    @report = ''
+    @unit_name = ''
+  end
+
+  def run
+    # Clean up result file names
+    results = @targets.map { |target| target.tr('\\', '/') }
+    # puts "Output File: #{@out_file}"
+    f = File.new(@out_file, 'w')
+    write_xml_header(f)
+    write_suites_header(f)
+    results.each do |result_file|
+      lines = File.readlines(result_file).map(&:chomp)
+
+      raise "Empty test result file: #{result_file}" if lines.empty?
+
+      result_output = get_details(result_file, lines)
+      tests, failures, ignored = parse_test_summary(lines)
+      result_output[:counts][:total] = tests
+      result_output[:counts][:failed] = failures
+      result_output[:counts][:ignored] = ignored
+      result_output[:counts][:passed] = (result_output[:counts][:total] - result_output[:counts][:failed] - result_output[:counts][:ignored])
+
+      # use line[0] from the test output to get the test_file path and name
+      test_file_str = lines[0].tr('\\', '/')
+      test_file_str = test_file_str.split(':')
+      test_file = if test_file_str.length < 2
+                    result_file
+                  else
+                    test_file_str[0] + ':' + test_file_str[1]
+                  end
+      result_output[:source][:path] = File.dirname(test_file)
+      result_output[:source][:file] = File.basename(test_file)
+
+      # save result_output
+      @unit_name = File.basename(test_file, '.*')
+
+      write_suite_header(result_output[:counts], f)
+      write_failures(result_output, f)
+      write_tests(result_output, f)
+      write_ignored(result_output, f)
+      write_suite_footer(f)
+    end
+    write_suites_footer(f)
+    f.close
+  end
+
+  def usage(err_msg = nil)
+    puts "\nERROR: "
+    puts err_msg if err_msg
+    puts 'Usage: unity_to_junit.rb [options]'
+    puts ''
+    puts 'Specific options:'
+    puts '    -r, --results <dir>              Look for Unity Results files here.'
+    puts '    -p, --root_path <path>           Prepend this path to files in results.'
+    puts '    -o, --output <filename>          XML file to generate.'
+    puts ''
+    puts 'Common options:'
+    puts '    -h, --help                       Show this message'
+    puts '        --version                    Show version'
+
+    exit 1
+  end
+
+  protected
+
+  def get_details(_result_file, lines)
+    results = results_structure
+    lines.each do |line|
+      line = line.tr('\\', '/')
+      _src_file, src_line, test_name, status, msg = line.split(/:/)
+      case status
+      when 'IGNORE' then results[:ignores] << { test: test_name, line: src_line, message: msg }
+      when 'FAIL'   then results[:failures] << { test: test_name, line: src_line, message: msg }
+      when 'PASS'   then results[:successes] << { test: test_name, line: src_line, message: msg }
+      end
+    end
+    results
+  end
+
+  def parse_test_summary(summary)
+    raise "Couldn't parse test results: #{summary}" unless summary.find { |v| v =~ /(\d+) Tests (\d+) Failures (\d+) Ignored/ }
+
+    [Regexp.last_match(1).to_i, Regexp.last_match(2).to_i, Regexp.last_match(3).to_i]
+  end
+
+  private
+
+  def results_structure
+    {
+      source: { path: '', file: '' },
+      successes: [],
+      failures: [],
+      ignores: [],
+      counts: { total: 0, passed: 0, failed: 0, ignored: 0 },
+      stdout: []
+    }
+  end
+
+  def write_xml_header(stream)
+    stream.puts "<?xml version='1.0' encoding='utf-8' ?>"
+  end
+
+  def write_suites_header(stream)
+    stream.puts '<testsuites>'
+  end
+
+  def write_suite_header(counts, stream)
+    stream.puts "\t<testsuite errors=\"0\" skipped=\"#{counts[:ignored]}\" failures=\"#{counts[:failed]}\" tests=\"#{counts[:total]}\" name=\"unity\">"
+  end
+
+  def write_failures(results, stream)
+    result = results[:failures]
+    result.each do |item|
+      filename = File.join(results[:source][:path], File.basename(results[:source][:file], '.*'))
+      stream.puts "\t\t<testcase classname=\"#{@unit_name}\" name=\"#{item[:test]}\" time=\"0\">"
+      stream.puts "\t\t\t<failure message=\"#{item[:message]}\" type=\"Assertion\"/>"
+      stream.puts "\t\t\t<system-err>&#xD;[File] #{filename}&#xD;[Line] #{item[:line]}&#xD;</system-err>"
+      stream.puts "\t\t</testcase>"
+    end
+  end
+
+  def write_tests(results, stream)
+    result = results[:successes]
+    result.each do |item|
+      stream.puts "\t\t<testcase classname=\"#{@unit_name}\" name=\"#{item[:test]}\" time=\"0\" />"
+    end
+  end
+
+  def write_ignored(results, stream)
+    result = results[:ignores]
+    result.each do |item|
+      filename = File.join(results[:source][:path], File.basename(results[:source][:file], '.*'))
+      puts "Writing ignored tests for test harness: #{filename}"
+      stream.puts "\t\t<testcase classname=\"#{@unit_name}\" name=\"#{item[:test]}\" time=\"0\">"
+      stream.puts "\t\t\t<skipped message=\"#{item[:message]}\" type=\"Assertion\"/>"
+      stream.puts "\t\t\t<system-err>&#xD;[File] #{filename}&#xD;[Line] #{item[:line]}&#xD;</system-err>"
+      stream.puts "\t\t</testcase>"
+    end
+  end
+
+  def write_suite_footer(stream)
+    stream.puts "\t</testsuite>"
+  end
+
+  def write_suites_footer(stream)
+    stream.puts '</testsuites>'
+  end
+end
+
+if $0 == __FILE__
+  # parse out the command options
+  options = ArgvParser.parse(ARGV)
+
+  # create an instance to work with
+  utj = UnityToJUnit.new
+  begin
+    # look in the specified or current directory for result files
+    targets = "#{options.results_dir.tr('\\', '/')}**/*.test*"
+
+    results = Dir[targets]
+
+    raise "No *.testpass, *.testfail, or *.testresults files found in '#{targets}'" if results.empty?
+
+    utj.targets = results
+
+    # set the root path
+    utj.root = options.root_path
+
+    # set the output XML file name
+    # puts "Output File from options: #{options.out_file}"
+    utj.out_file = options.out_file
+
+    # run the summarizer
+    puts utj.run
+  rescue StandardError => e
+    utj.usage e.message
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/test_file_filter.rb b/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/test_file_filter.rb
new file mode 100644
index 000000000..5c3a79fc6
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/test_file_filter.rb
@@ -0,0 +1,25 @@
+# ==========================================
+#   Unity Project - A Test Framework for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+require'yaml'
+
+module RakefileHelpers
+  class TestFileFilter
+    def initialize(all_files = false)
+      @all_files = all_files
+
+      return unless @all_files
+      return unless File.exist?('test_file_filter.yml')
+
+      filters = YAML.load_file('test_file_filter.yml')
+      @all_files = filters[:all_files]
+      @only_files = filters[:only_files]
+      @exclude_files = filters[:exclude_files]
+    end
+
+    attr_accessor :all_files, :only_files, :exclude_files
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/type_sanitizer.rb b/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/type_sanitizer.rb
new file mode 100644
index 000000000..dafb8826e
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/type_sanitizer.rb
@@ -0,0 +1,6 @@
+module TypeSanitizer
+  def self.sanitize_c_identifier(unsanitized)
+    # convert filename to valid C identifier by replacing invalid chars with '_'
+    unsanitized.gsub(/[-\/\\\.\,\s]/, '_')
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/unity_test_summary.py b/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/unity_test_summary.py
new file mode 100644
index 000000000..00c0da8cc
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/unity_test_summary.py
@@ -0,0 +1,139 @@
+#! python3
+# ==========================================
+#   Unity Project - A Test Framework for C
+#   Copyright (c) 2015 Alexander Mueller / XelaRellum@web.de
+#   [Released under MIT License. Please refer to license.txt for details]
+#   Based on the ruby script by  Mike Karlesky, Mark VanderVoord, Greg Williams
+# ==========================================
+import sys
+import os
+import re
+from glob import glob
+
+class UnityTestSummary:
+    def __init__(self):
+        self.report = ''
+        self.total_tests = 0
+        self.failures = 0
+        self.ignored = 0
+
+    def run(self):
+        # Clean up result file names
+        results = []
+        for target in self.targets:
+            results.append(target.replace('\\', '/'))
+
+        # Dig through each result file, looking for details on pass/fail:
+        failure_output = []
+        ignore_output = []
+
+        for result_file in results:
+            lines = list(map(lambda line: line.rstrip(), open(result_file, "r").read().split('\n')))
+            if len(lines) == 0:
+                raise Exception("Empty test result file: %s" % result_file)
+
+            details = self.get_details(result_file, lines)
+            failures = details['failures']
+            ignores = details['ignores']
+            if len(failures) > 0: failure_output.append('\n'.join(failures))
+            if len(ignores) > 0: ignore_output.append('n'.join(ignores))
+            tests,failures,ignored = self.parse_test_summary('\n'.join(lines))
+            self.total_tests += tests
+            self.failures += failures
+            self.ignored += ignored
+
+        if self.ignored > 0:
+            self.report += "\n"
+            self.report += "--------------------------\n"
+            self.report += "UNITY IGNORED TEST SUMMARY\n"
+            self.report += "--------------------------\n"
+            self.report += "\n".join(ignore_output)
+
+        if self.failures > 0:
+            self.report += "\n"
+            self.report += "--------------------------\n"
+            self.report += "UNITY FAILED TEST SUMMARY\n"
+            self.report += "--------------------------\n"
+            self.report += '\n'.join(failure_output)
+
+        self.report += "\n"
+        self.report += "--------------------------\n"
+        self.report += "OVERALL UNITY TEST SUMMARY\n"
+        self.report += "--------------------------\n"
+        self.report += "{total_tests} TOTAL TESTS {failures} TOTAL FAILURES {ignored} IGNORED\n".format(total_tests = self.total_tests, failures=self.failures, ignored=self.ignored)
+        self.report += "\n"
+
+        return self.report
+
+    def set_targets(self, target_array):
+            self.targets = target_array
+
+    def set_root_path(self, path):
+        self.root = path
+
+    def usage(self, err_msg=None):
+        print("\nERROR: ")
+        if err_msg:
+            print(err_msg)
+        print("\nUsage: unity_test_summary.py result_file_directory/ root_path/")
+        print("     result_file_directory - The location of your results files.")
+        print("                             Defaults to current directory if not specified.")
+        print("                             Should end in / if specified.")
+        print("     root_path - Helpful for producing more verbose output if using relative paths.")
+        sys.exit(1)
+
+    def get_details(self, result_file, lines):
+        results = { 'failures': [], 'ignores': [], 'successes': [] }
+        for line in lines:
+            parts = line.split(':')
+            if len(parts) == 5:
+                src_file,src_line,test_name,status,msg = parts
+            elif len(parts) == 4:
+                src_file,src_line,test_name,status = parts
+                msg = ''
+            else:
+                continue
+            if len(self.root) > 0:
+                line_out = "%s%s" % (self.root, line)
+            else:
+                line_out = line
+            if status == 'IGNORE':
+                results['ignores'].append(line_out)
+            elif status == 'FAIL':
+                results['failures'].append(line_out)
+            elif status == 'PASS':
+                results['successes'].append(line_out)
+        return results
+
+    def parse_test_summary(self, summary):
+        m = re.search(r"([0-9]+) Tests ([0-9]+) Failures ([0-9]+) Ignored", summary)
+        if not m:
+            raise Exception("Couldn't parse test results: %s" % summary)
+
+        return int(m.group(1)), int(m.group(2)), int(m.group(3))
+
+
+if __name__ == '__main__':
+  uts = UnityTestSummary()
+  try:
+    #look in the specified or current directory for result files
+    if len(sys.argv) > 1:
+        targets_dir = sys.argv[1]
+    else:
+        targets_dir = './'
+    targets = list(map(lambda x: x.replace('\\', '/'), glob(targets_dir + '**/*.test*', recursive=True)))
+    if len(targets) == 0:
+        raise Exception("No *.testpass or *.testfail files found in '%s'" % targets_dir)
+    uts.set_targets(targets)
+
+    #set the root path
+    if len(sys.argv) > 2:
+        root_path = sys.argv[2]
+    else:
+        root_path = os.path.split(__file__)[0]
+    uts.set_root_path(root_path)
+
+    #run the summarizer
+    print(uts.run())
+  except Exception as e:
+    uts.usage(e)
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/unity_test_summary.rb b/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/unity_test_summary.rb
new file mode 100644
index 000000000..b3fe8a699
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/unity_test_summary.rb
@@ -0,0 +1,135 @@
+# ==========================================
+#   Unity Project - A Test Framework for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+# !/usr/bin/ruby
+#
+# unity_test_summary.rb
+#
+require 'fileutils'
+require 'set'
+
+class UnityTestSummary
+  include FileUtils::Verbose
+
+  attr_reader :report, :total_tests, :failures, :ignored
+  attr_writer :targets, :root
+
+  def initialize(_opts = {})
+    @report = ''
+    @total_tests = 0
+    @failures = 0
+    @ignored = 0
+  end
+
+  def run
+    # Clean up result file names
+    results = @targets.map { |target| target.tr('\\', '/') }
+
+    # Dig through each result file, looking for details on pass/fail:
+    failure_output = []
+    ignore_output = []
+
+    results.each do |result_file|
+      lines = File.readlines(result_file).map(&:chomp)
+
+      raise "Empty test result file: #{result_file}" if lines.empty?
+
+      output = get_details(result_file, lines)
+      failure_output << output[:failures] unless output[:failures].empty?
+      ignore_output  << output[:ignores]  unless output[:ignores].empty?
+      tests, failures, ignored = parse_test_summary(lines)
+      @total_tests += tests
+      @failures += failures
+      @ignored += ignored
+    end
+
+    if @ignored > 0
+      @report += "\n"
+      @report += "--------------------------\n"
+      @report += "UNITY IGNORED TEST SUMMARY\n"
+      @report += "--------------------------\n"
+      @report += ignore_output.flatten.join("\n")
+    end
+
+    if @failures > 0
+      @report += "\n"
+      @report += "--------------------------\n"
+      @report += "UNITY FAILED TEST SUMMARY\n"
+      @report += "--------------------------\n"
+      @report += failure_output.flatten.join("\n")
+    end
+
+    @report += "\n"
+    @report += "--------------------------\n"
+    @report += "OVERALL UNITY TEST SUMMARY\n"
+    @report += "--------------------------\n"
+    @report += "#{@total_tests} TOTAL TESTS #{@failures} TOTAL FAILURES #{@ignored} IGNORED\n"
+    @report += "\n"
+  end
+
+  def usage(err_msg = nil)
+    puts "\nERROR: "
+    puts err_msg if err_msg
+    puts "\nUsage: unity_test_summary.rb result_file_directory/ root_path/"
+    puts '     result_file_directory - The location of your results files.'
+    puts '                             Defaults to current directory if not specified.'
+    puts '                             Should end in / if specified.'
+    puts '     root_path - Helpful for producing more verbose output if using relative paths.'
+    exit 1
+  end
+
+  protected
+
+  def get_details(_result_file, lines)
+    results = { failures: [], ignores: [], successes: [] }
+    lines.each do |line|
+      _src_file, _src_line, _test_name, status, _msg = line.split(/:/)
+      line_out = (@root && (@root != 0) ? "#{@root}#{line}" : line).gsub(/\//, '\\')
+      case status
+      when 'IGNORE' then results[:ignores]   << line_out
+      when 'FAIL'   then results[:failures]  << line_out
+      when 'PASS'   then results[:successes] << line_out
+      end
+    end
+    results
+  end
+
+  def parse_test_summary(summary)
+    raise "Couldn't parse test results: #{summary}" unless summary.find { |v| v =~ /(\d+) Tests (\d+) Failures (\d+) Ignored/ }
+
+    [Regexp.last_match(1).to_i, Regexp.last_match(2).to_i, Regexp.last_match(3).to_i]
+  end
+end
+
+if $0 == __FILE__
+
+  # parse out the command options
+  opts, args = ARGV.partition { |v| v =~ /^--\w+/ }
+  opts.map! { |v| v[2..-1].to_sym }
+
+  # create an instance to work with
+  uts = UnityTestSummary.new(opts)
+
+  begin
+    # look in the specified or current directory for result files
+    args[0] ||= './'
+    targets = "#{ARGV[0].tr('\\', '/')}**/*.test*"
+    results = Dir[targets]
+
+    raise "No *.testpass, *.testfail, or *.testresults files found in '#{targets}'" if results.empty?
+
+    uts.targets = results
+
+    # set the root path
+    args[1] ||= Dir.pwd + '/'
+    uts.root = ARGV[1]
+
+    # run the summarizer
+    puts uts.run
+  rescue StandardError => e
+    uts.usage e.message
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/unity_to_junit.py b/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/unity_to_junit.py
new file mode 100644
index 000000000..71dd56888
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/auto/unity_to_junit.py
@@ -0,0 +1,146 @@
+import sys
+import os
+from glob import glob
+
+from pyparsing import *
+from junit_xml import TestSuite, TestCase
+
+
+class UnityTestSummary:
+    def __init__(self):
+        self.report = ''
+        self.total_tests = 0
+        self.failures = 0
+        self.ignored = 0
+        self.targets = 0
+        self.root = None
+        self.test_suites = dict()
+
+    def run(self):
+        # Clean up result file names
+        results = []
+        for target in self.targets:
+            results.append(target.replace('\\', '/'))
+
+        # Dig through each result file, looking for details on pass/fail:
+        for result_file in results:
+            lines = list(map(lambda line: line.rstrip(), open(result_file, "r").read().split('\n')))
+            if len(lines) == 0:
+                raise Exception("Empty test result file: %s" % result_file)
+
+            # define an expression for your file reference
+            entry_one = Combine(
+                oneOf(list(alphas)) + ':/' +
+                Word(alphanums + '_-./'))
+
+            entry_two = Word(printables + ' ', excludeChars=':')
+            entry = entry_one | entry_two
+
+            delimiter = Literal(':').suppress()
+            tc_result_line = Group(entry.setResultsName('tc_file_name') + delimiter + entry.setResultsName(
+                'tc_line_nr') + delimiter + entry.setResultsName('tc_name') + delimiter + entry.setResultsName(
+                'tc_status') + Optional(
+                delimiter + entry.setResultsName('tc_msg'))).setResultsName("tc_line")
+
+            eol = LineEnd().suppress()
+            sol = LineStart().suppress()
+            blank_line = sol + eol
+
+            tc_summary_line = Group(Word(nums).setResultsName("num_of_tests") + "Tests" + Word(nums).setResultsName(
+                "num_of_fail") + "Failures" + Word(nums).setResultsName("num_of_ignore") + "Ignored").setResultsName(
+                "tc_summary")
+            tc_end_line = Or(Literal("FAIL"), Literal('Ok')).setResultsName("tc_result")
+
+            # run it and see...
+            pp1 = tc_result_line | Optional(tc_summary_line | tc_end_line)
+            pp1.ignore(blank_line | OneOrMore("-"))
+
+            result = list()
+            for l in lines:
+                result.append((pp1.parseString(l)).asDict())
+            # delete empty results
+            result = filter(None, result)
+
+            tc_list = list()
+            for r in result:
+                if 'tc_line' in r:
+                    tmp_tc_line = r['tc_line']
+
+                    # get only the file name which will be used as the classname
+                    file_name = tmp_tc_line['tc_file_name'].split('\\').pop().split('/').pop().rsplit('.', 1)[0]
+                    tmp_tc = TestCase(name=tmp_tc_line['tc_name'], classname=file_name)
+                    if 'tc_status' in tmp_tc_line:
+                        if str(tmp_tc_line['tc_status']) == 'IGNORE':
+                            if 'tc_msg' in tmp_tc_line:
+                                tmp_tc.add_skipped_info(message=tmp_tc_line['tc_msg'],
+                                                        output=r'[File]={0}, [Line]={1}'.format(
+                                                            tmp_tc_line['tc_file_name'], tmp_tc_line['tc_line_nr']))
+                            else:
+                                tmp_tc.add_skipped_info(message=" ")
+                        elif str(tmp_tc_line['tc_status']) == 'FAIL':
+                            if 'tc_msg' in tmp_tc_line:
+                                tmp_tc.add_failure_info(message=tmp_tc_line['tc_msg'],
+                                                        output=r'[File]={0}, [Line]={1}'.format(
+                                                            tmp_tc_line['tc_file_name'], tmp_tc_line['tc_line_nr']))
+                            else:
+                                tmp_tc.add_failure_info(message=" ")
+
+                    tc_list.append((str(result_file), tmp_tc))
+
+            for k, v in tc_list:
+                try:
+                    self.test_suites[k].append(v)
+                except KeyError:
+                    self.test_suites[k] = [v]
+        ts = []
+        for suite_name in self.test_suites:
+            ts.append(TestSuite(suite_name, self.test_suites[suite_name]))
+
+        with open('result.xml', 'w') as f:
+            TestSuite.to_file(f, ts, prettyprint='True', encoding='utf-8')
+
+        return self.report
+
+    def set_targets(self, target_array):
+        self.targets = target_array
+
+    def set_root_path(self, path):
+        self.root = path
+
+    @staticmethod
+    def usage(err_msg=None):
+        print("\nERROR: ")
+        if err_msg:
+            print(err_msg)
+        print("\nUsage: unity_test_summary.py result_file_directory/ root_path/")
+        print("     result_file_directory - The location of your results files.")
+        print("                             Defaults to current directory if not specified.")
+        print("                             Should end in / if specified.")
+        print("     root_path - Helpful for producing more verbose output if using relative paths.")
+        sys.exit(1)
+
+
+if __name__ == '__main__':
+    uts = UnityTestSummary()
+    try:
+        # look in the specified or current directory for result files
+        if len(sys.argv) > 1:
+            targets_dir = sys.argv[1]
+        else:
+            targets_dir = './'
+        targets = list(map(lambda x: x.replace('\\', '/'), glob(targets_dir + '*.test*')))
+        if len(targets) == 0:
+            raise Exception("No *.testpass or *.testfail files found in '%s'" % targets_dir)
+        uts.set_targets(targets)
+
+        # set the root path
+        if len(sys.argv) > 2:
+            root_path = sys.argv[2]
+        else:
+            root_path = os.path.split(__file__)[0]
+        uts.set_root_path(root_path)
+
+        # run the summarizer
+        print(uts.run())
+    except Exception as e:
+        UnityTestSummary.usage(e)
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/docs/ThrowTheSwitchCodingStandard.md b/FreeRTOS-Plus/Test/CMock/vendor/unity/docs/ThrowTheSwitchCodingStandard.md
new file mode 100644
index 000000000..bf4c099bb
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/docs/ThrowTheSwitchCodingStandard.md
@@ -0,0 +1,206 @@
+# ThrowTheSwitch.org Coding Standard
+
+Hi. Welcome to the coding standard for ThrowTheSwitch.org. For the most part,
+we try to follow these standards to unify our contributors' code into a cohesive
+unit (puns intended). You might find places where these standards aren't
+followed. We're not perfect. Please be polite where you notice these discrepancies
+and we'll try to be polite when we notice yours.
+
+;)
+
+
+## Why Have A Coding Standard?
+
+Being consistent makes code easier to understand. We've tried to keep
+our standard simple because we also believe that we can only expect someone to
+follow something that is understandable. Please do your best.
+
+
+## Our Philosophy
+
+Before we get into details on syntax, let's take a moment to talk about our
+vision for these tools. We're C developers and embedded software developers.
+These tools are great to test any C code, but catering to embedded software has
+made us more tolerant of compiler quirks. There are a LOT of quirky compilers
+out there. By quirky I mean "doesn't follow standards because they feel like
+they have a license to do as they wish."
+
+Our philosophy is "support every compiler we can". Most often, this means that
+we aim for writing C code that is standards compliant (often C89... that seems
+to be a sweet spot that is almost always compatible). But it also means these
+tools are tolerant of things that aren't common. Some that aren't even
+compliant. There are configuration options to override the size of standard
+types. There are configuration options to force Unity to not use certain
+standard library functions. A lot of Unity is configurable and we have worked
+hard to make it not TOO ugly in the process.
+
+Similarly, our tools that parse C do their best. They aren't full C parsers
+(yet) and, even if they were, they would still have to accept non-standard
+additions like gcc extensions or specifying `@0x1000` to force a variable to
+compile to a particular location. It's just what we do, because we like
+everything to Just Workâ„¢.
+
+Speaking of having things Just Workâ„¢, that's our second philosophy. By that, we
+mean that we do our best to have EVERY configuration option have a logical
+default. We believe that if you're working with a simple compiler and target,
+you shouldn't need to configure very much... we try to make the tools guess as
+much as they can, but give the user the power to override it when it's wrong.
+
+
+## Naming Things
+
+Let's talk about naming things. Programming is all about naming things. We name
+files, functions, variables, and so much more. While we're not always going to
+find the best name for something, we actually put a bit of effort into
+finding *What Something WANTS to be Called*â„¢.
+
+When naming things, we follow this hierarchy, the first being the
+most important to us (but we do all four when possible):
+1. Readable
+2. Descriptive
+3. Consistent
+4. Memorable
+
+
+#### Readable
+
+We want to read our code. This means we like names and flow that are more
+naturally read. We try to avoid double negatives. We try to avoid cryptic
+abbreviations (sticking to ones we feel are common).
+
+
+#### Descriptive
+
+We like descriptive names for things, especially functions and variables.
+Finding the right name for something is an important endeavor. You might notice
+from poking around our code that this often results in names that are a little
+longer than the average. Guilty. We're okay with a bit more typing if it
+means our code is easier to understand.
+
+There are two exceptions to this rule that we also stick to as religiously as
+possible:
+
+First, while we realize hungarian notation (and similar systems for encoding
+type information into variable names) is providing a more descriptive name, we
+feel that (for the average developer) it takes away from readability and is to be avoided.
+
+Second, loop counters and other local throw-away variables often have a purpose
+which is obvious. There's no need, therefore, to get carried away with complex
+naming. We find i, j, and k are better loop counters than loopCounterVar or
+whatnot. We only break this rule when we see that more description could improve
+understanding of an algorithm.
+
+
+#### Consistent
+
+We like consistency, but we're not really obsessed with it. We try to name our
+configuration macros in a consistent fashion... you'll notice a repeated use of
+UNITY_EXCLUDE_BLAH or UNITY_USES_BLAH macros. This helps users avoid having to
+remember each macro's details.
+
+
+#### Memorable
+
+Where ever it doesn't violate the above principles, we try to apply memorable
+names. Sometimes this means using something that is simply descriptive, but
+often we strive for descriptive AND unique... we like quirky names that stand
+out in our memory and are easier to search for. Take a look through the file
+names in Ceedling and you'll get a good idea of what we are talking about here.
+Why use preprocess when you can use preprocessinator? Or what better describes a
+module in charge of invoking tasks during releases than release_invoker? Don't
+get carried away. The names are still descriptive and fulfill the above
+requirements, but they don't feel stale.
+
+
+## C and C++ Details
+
+We don't really want to add to the style battles out there. Tabs or spaces?
+How many spaces? Where do the braces go? These are age-old questions that will
+never be answered... or at least not answered in a way that will make everyone
+happy.
+
+We've decided on our own style preferences. If you'd like to contribute to these
+projects (and we hope that you do), then we ask if you do your best to follow
+the same. It will only hurt a little. We promise.
+
+
+#### Whitespace
+
+Our C-style is to use spaces and to use 4 of them per indent level. It's a nice
+power-of-2 number that looks decent on a wide-screen. We have no more reason
+than that. We break that rule when we have lines that wrap (macros or function
+arguments or whatnot). When that happens, we like to indent further to line
+things up in nice tidy columns.
+
+```C
+    if (stuff_happened)
+    {
+        do_something();
+    }
+```
+
+
+#### Case
+
+- Files - all lower case with underscores.
+- Variables - all lower case with underscores
+- Macros - all caps with underscores.
+- Typedefs - all caps with underscores. (also ends with _T).
+- Functions - camel cased. Usually named ModuleName_FuncName
+- Constants and Globals - camel cased.
+
+
+#### Braces
+
+The left brace is on the next line after the declaration. The right brace is
+directly below that. Everything in between in indented one level. If you're
+catching an error and you have a one-line, go ahead and to it on the same line.
+
+```C
+    while (blah)
+    {
+        //Like so. Even if only one line, we use braces.
+    }
+```
+
+
+#### Comments
+
+Do you know what we hate? Old-school C block comments. BUT, we're using them
+anyway. As we mentioned, our goal is to support every compiler we can,
+especially embedded compilers. There are STILL C compilers out there that only
+support old-school block comments. So that is what we're using. We apologize. We
+think they are ugly too.
+
+
+## Ruby Details
+
+Is there really such thing as a Ruby coding standard? Ruby is such a free form
+language, it seems almost sacrilegious to suggest that people should comply to
+one method! We'll keep it really brief!
+
+
+#### Whitespace
+
+Our Ruby style is to use spaces and to use 2 of them per indent level. It's a
+nice power-of-2 number that really grooves with Ruby's compact style. We have no
+more reason than that. We break that rule when we have lines that wrap. When
+that happens, we like to indent further to line things up in nice tidy columns.
+
+
+#### Case
+
+- Files - all lower case with underscores.
+- Variables - all lower case with underscores
+- Classes, Modules, etc - Camel cased.
+- Functions - all lower case with underscores
+- Constants - all upper case with underscores
+
+
+## Documentation
+
+Egad. Really? We use mark down and we like pdf files because they can be made to
+look nice while still being portable. Good enough?
+
+
+*Find The Latest of This And More at [ThrowTheSwitch.org](https://throwtheswitch.org)*
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/docs/UnityAssertionsCheatSheetSuitableforPrintingandPossiblyFraming.pdf b/FreeRTOS-Plus/Test/CMock/vendor/unity/docs/UnityAssertionsCheatSheetSuitableforPrintingandPossiblyFraming.pdf
new file mode 100644
index 000000000..28f0c3214
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/docs/UnityAssertionsCheatSheetSuitableforPrintingandPossiblyFraming.pdf
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/docs/UnityAssertionsReference.md b/FreeRTOS-Plus/Test/CMock/vendor/unity/docs/UnityAssertionsReference.md
new file mode 100644
index 000000000..0957bcf6b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/docs/UnityAssertionsReference.md
@@ -0,0 +1,831 @@
+# Unity Assertions Reference
+
+## Background and Overview
+
+### Super Condensed Version
+
+- An assertion establishes truth (i.e. boolean True) for a single condition.
+Upon boolean False, an assertion stops execution and reports the failure.
+- Unity is mainly a rich collection of assertions and the support to gather up
+and easily execute those assertions.
+- The structure of Unity allows you to easily separate test assertions from
+source code in, well, test code.
+- Unity's assertions:
+- Come in many, many flavors to handle different C types and assertion cases.
+- Use context to provide detailed and helpful failure messages.
+- Document types, expected values, and basic behavior in your source code for
+free.
+
+
+### Unity Is Several Things But Mainly It's Assertions
+
+One way to think of Unity is simply as a rich collection of assertions you can
+use to establish whether your source code behaves the way you think it does.
+Unity provides a framework to easily organize and execute those assertions in
+test code separate from your source code.
+
+
+### What's an Assertion?
+
+At their core, assertions are an establishment of truth - boolean truth. Was this
+thing equal to that thing? Does that code doohickey have such-and-such property
+or not? You get the idea. Assertions are executable code (to appreciate the big
+picture on this read up on the difference between
+[link:Dynamic Verification and Static Analysis]). A failing assertion stops
+execution and reports an error through some appropriate I/O channel (e.g.
+stdout, GUI, file, blinky light).
+
+Fundamentally, for dynamic verification all you need is a single assertion
+mechanism. In fact, that's what the [assert() macro in C's standard library](http://en.wikipedia.org/en/wiki/Assert.h)
+is for. So why not just use it? Well, we can do far better in the reporting
+department. C's `assert()` is pretty dumb as-is and is particularly poor for
+handling common data types like arrays, structs, etc. And, without some other
+support, it's far too tempting to litter source code with C's `assert()`'s. It's
+generally much cleaner, manageable, and more useful to separate test and source
+code in the way Unity facilitates.
+
+
+### Unity's Assertions: Helpful Messages _and_ Free Source Code Documentation
+
+Asserting a simple truth condition is valuable, but using the context of the
+assertion is even more valuable. For instance, if you know you're comparing bit
+flags and not just integers, then why not use that context to give explicit,
+readable, bit-level feedback when an assertion fails?
+
+That's what Unity's collection of assertions do - capture context to give you
+helpful, meaningful assertion failure messages. In fact, the assertions
+themselves also serve as executable documentation about types and values in your
+source code. So long as your tests remain current with your source and all those
+tests pass, you have a detailed, up-to-date view of the intent and mechanisms in
+your source code. And due to a wondrous mystery, well-tested code usually tends
+to be well designed code.
+
+
+## Assertion Conventions and Configurations
+
+### Naming and Parameter Conventions
+
+The convention of assertion parameters generally follows this order:
+
+```
+TEST_ASSERT_X( {modifiers}, {expected}, actual, {size/count} )
+```
+
+The very simplest assertion possible uses only a single `actual` parameter (e.g.
+a simple null check).
+
+ - `Actual` is the value being tested and unlike the other parameters in an
+    assertion construction is the only parameter present in all assertion variants.
+ - `Modifiers` are masks, ranges, bit flag specifiers, floating point deltas.
+ - `Expected` is your expected value (duh) to compare to an `actual` value; it's
+    marked as an optional parameter because some assertions only need a single
+    `actual` parameter (e.g. null check).
+ - `Size/count` refers to string lengths, number of array elements, etc.
+
+Many of Unity's assertions are clear duplications in that the same data type
+is handled by several assertions. The differences among these are in how failure
+messages are presented. For instance, a `_HEX` variant of an assertion prints
+the expected and actual values of that assertion formatted as hexadecimal.
+
+
+#### TEST_ASSERT_X_MESSAGE Variants
+
+_All_ assertions are complemented with a variant that includes a simple string
+message as a final parameter. The string you specify is appended to an assertion
+failure message in Unity output.
+
+For brevity, the assertion variants with a message parameter are not listed
+below. Just tack on `_MESSAGE` as the final component to any assertion name in
+the reference list below and add a string as the final parameter.
+
+_Example:_
+
+```
+TEST_ASSERT_X( {modifiers}, {expected}, actual, {size/count} )
+```
+
+becomes messageified like thus...
+
+```
+TEST_ASSERT_X_MESSAGE( {modifiers}, {expected}, actual, {size/count}, message )
+```
+
+Notes:
+- The `_MESSAGE` variants intentionally do not support `printf` style formatting
+  since many embedded projects don't support or avoid `printf` for various reasons.
+  It is possible to use `sprintf` before the assertion to assemble a complex fail
+  message, if necessary.
+- If you want to output a counter value within an assertion fail message (e.g. from
+  a loop) , building up an array of results and then using one of the `_ARRAY`
+  assertions (see below) might be a handy alternative to `sprintf`.
+
+
+#### TEST_ASSERT_X_ARRAY Variants
+
+Unity provides a collection of assertions for arrays containing a variety of
+types. These are documented in the Array section below. These are almost on par
+with the `_MESSAGE`variants of Unity's Asserts in that for pretty much any Unity
+type assertion you can tack on `_ARRAY` and run assertions on an entire block of
+memory.
+
+```
+    TEST_ASSERT_EQUAL_TYPEX_ARRAY( expected, actual, {size/count} )
+```
+
+ - `Expected` is an array itself.
+ - `Size/count` is one or two parameters necessary to establish the number of array
+    elements and perhaps the length of elements within the array.
+
+Notes:
+
+ - The `_MESSAGE` variant convention still applies here to array assertions. The
+   `_MESSAGE` variants of the `_ARRAY` assertions have names ending with
+   `_ARRAY_MESSAGE`.
+ - Assertions for handling arrays of floating point values are grouped with float
+   and double assertions (see immediately following section).
+
+
+### TEST_ASSERT_EACH_EQUAL_X Variants
+
+Unity provides a collection of assertions for arrays containing a variety of
+types which can be compared to a single value as well. These are documented in
+the Each Equal section below. these are almost on par with the `_MESSAGE`
+variants of Unity's Asserts in that for pretty much any Unity type assertion you
+can inject `_EACH_EQUAL` and run assertions on an entire block of memory.
+
+```
+TEST_ASSERT_EACH_EQUAL_TYPEX( expected, actual, {size/count} )
+```
+
+ - `Expected` is a single value to compare to.
+ - `Actual` is an array where each element will be compared to the expected value.
+ - `Size/count` is one of two parameters necessary to establish the number of array
+    elements and perhaps the length of elements within the array.
+
+Notes:
+
+ - The `_MESSAGE` variant convention still applies here to Each Equal assertions.
+ - Assertions for handling Each Equal of floating point values are grouped with
+   float and double assertions (see immediately following section).
+
+
+### Configuration
+
+#### Floating Point Support Is Optional
+
+Support for floating point types is configurable. That is, by defining the
+appropriate preprocessor symbols, floats and doubles can be individually enabled
+or disabled in Unity code. This is useful for embedded targets with no floating
+point math support (i.e. Unity compiles free of errors for fixed point only
+platforms). See Unity documentation for specifics.
+
+
+#### Maximum Data Type Width Is Configurable
+
+Not all targets support 64 bit wide types or even 32 bit wide types. Define the
+appropriate preprocessor symbols and Unity will omit all operations from
+compilation that exceed the maximum width of your target. See Unity
+documentation for specifics.
+
+
+## The Assertions in All Their Blessed Glory
+
+### Basic Fail, Pass and Ignore
+
+##### `TEST_FAIL()`
+
+##### `TEST_FAIL_MESSAGE("message")`
+
+This fella is most often used in special conditions where your test code is
+performing logic beyond a simple assertion. That is, in practice, `TEST_FAIL()`
+will always be found inside a conditional code block.
+
+_Examples:_
+
+- Executing a state machine multiple times that increments a counter your test
+code then verifies as a final step.
+- Triggering an exception and verifying it (as in Try / Catch / Throw - see the
+[CException](https://github.com/ThrowTheSwitch/CException) project).
+
+##### `TEST_PASS()`
+
+##### `TEST_PASS_MESSAGE("message")`
+
+This will abort the remainder of the test, but count the test as a pass. Under
+normal circumstances, it is not necessary to include this macro in your tests...
+a lack of failure will automatically be counted as a `PASS`. It is occasionally
+useful for tests with `#ifdef`s and such.
+
+##### `TEST_IGNORE()`
+
+##### `TEST_IGNORE_MESSAGE("message")`
+
+Marks a test case (i.e. function meant to contain test assertions) as ignored.
+Usually this is employed as a breadcrumb to come back and implement a test case.
+An ignored test case has effects if other assertions are in the enclosing test
+case (see Unity documentation for more).
+
+##### `TEST_MESSAGE(message)`
+
+This can be useful for outputting `INFO` messages into the Unity output stream
+without actually ending the test. Like pass and fail messages, it will be output
+with the filename and line number.
+
+### Boolean
+
+##### `TEST_ASSERT (condition)`
+
+##### `TEST_ASSERT_TRUE (condition)`
+
+##### `TEST_ASSERT_FALSE (condition)`
+
+##### `TEST_ASSERT_UNLESS (condition)`
+
+A simple wording variation on `TEST_ASSERT_FALSE`.The semantics of
+`TEST_ASSERT_UNLESS` aid readability in certain test constructions or
+conditional statements.
+
+##### `TEST_ASSERT_NULL (pointer)`
+
+##### `TEST_ASSERT_NOT_NULL (pointer)`
+
+Verify if a pointer is or is not NULL.
+
+##### `TEST_ASSERT_EMPTY (pointer)`
+
+##### `TEST_ASSERT_NOT_EMPTY (pointer)`
+
+Verify if the first element dereferenced from a pointer is or is not zero. This
+is particularly useful for checking for empty (or non-empty) null-terminated
+C strings, but can be just as easily used for other null-terminated arrays.
+
+### Signed and Unsigned Integers (of all sizes)
+
+Large integer sizes can be disabled for build targets that do not support them.
+For example, if your target only supports up to 16 bit types, by defining the
+appropriate symbols Unity can be configured to omit 32 and 64 bit operations
+that would break compilation (see Unity documentation for more). Refer to
+Advanced Asserting later in this document for advice on dealing with other word
+sizes.
+
+##### `TEST_ASSERT_EQUAL_INT (expected, actual)`
+
+##### `TEST_ASSERT_EQUAL_INT8 (expected, actual)`
+
+##### `TEST_ASSERT_EQUAL_INT16 (expected, actual)`
+
+##### `TEST_ASSERT_EQUAL_INT32 (expected, actual)`
+
+##### `TEST_ASSERT_EQUAL_INT64 (expected, actual)`
+
+##### `TEST_ASSERT_EQUAL_UINT (expected, actual)`
+
+##### `TEST_ASSERT_EQUAL_UINT8 (expected, actual)`
+
+##### `TEST_ASSERT_EQUAL_UINT16 (expected, actual)`
+
+##### `TEST_ASSERT_EQUAL_UINT32 (expected, actual)`
+
+##### `TEST_ASSERT_EQUAL_UINT64 (expected, actual)`
+
+
+### Unsigned Integers (of all sizes) in Hexadecimal
+
+All `_HEX` assertions are identical in function to unsigned integer assertions
+but produce failure messages with the `expected` and `actual` values formatted
+in hexadecimal. Unity output is big endian.
+
+##### `TEST_ASSERT_EQUAL_HEX (expected, actual)`
+
+##### `TEST_ASSERT_EQUAL_HEX8 (expected, actual)`
+
+##### `TEST_ASSERT_EQUAL_HEX16 (expected, actual)`
+
+##### `TEST_ASSERT_EQUAL_HEX32 (expected, actual)`
+
+##### `TEST_ASSERT_EQUAL_HEX64 (expected, actual)`
+
+
+### Characters
+
+While you can use the 8-bit integer assertions to compare `char`, another option is
+to use this specialized assertion which will show printable characters as printables,
+otherwise showing the HEX escape code for the characters.
+
+##### `TEST_ASSERT_EQUAL_CHAR (expected, actual)`
+
+
+### Masked and Bit-level Assertions
+
+Masked and bit-level assertions produce output formatted in hexadecimal. Unity
+output is big endian.
+
+
+##### `TEST_ASSERT_BITS (mask, expected, actual)`
+
+Only compares the masked (i.e. high) bits of `expected` and `actual` parameters.
+
+
+##### `TEST_ASSERT_BITS_HIGH (mask, actual)`
+
+Asserts the masked bits of the `actual` parameter are high.
+
+
+##### `TEST_ASSERT_BITS_LOW (mask, actual)`
+
+Asserts the masked bits of the `actual` parameter are low.
+
+
+##### `TEST_ASSERT_BIT_HIGH (bit, actual)`
+
+Asserts the specified bit of the `actual` parameter is high.
+
+
+##### `TEST_ASSERT_BIT_LOW (bit, actual)`
+
+Asserts the specified bit of the `actual` parameter is low.
+
+### Integer Less Than / Greater Than
+
+These assertions verify that the `actual` parameter is less than or greater
+than `threshold` (exclusive). For example, if the threshold value is 0 for the
+greater than assertion will fail if it is 0 or less. There are assertions for
+all the various sizes of ints, as for the equality assertions. Some examples:
+
+##### `TEST_ASSERT_GREATER_THAN_INT8 (threshold, actual)`
+
+##### `TEST_ASSERT_GREATER_OR_EQUAL_INT16 (threshold, actual)`
+
+##### `TEST_ASSERT_LESS_THAN_INT32 (threshold, actual)`
+
+##### `TEST_ASSERT_LESS_OR_EQUAL_UINT (threshold, actual)`
+
+##### `TEST_ASSERT_NOT_EQUAL_UINT8 (threshold, actual)`
+
+
+### Integer Ranges (of all sizes)
+
+These assertions verify that the `expected` parameter is within +/- `delta`
+(inclusive) of the `actual` parameter. For example, if the expected value is 10
+and the delta is 3 then the assertion will fail for any value outside the range
+of 7 - 13.
+
+##### `TEST_ASSERT_INT_WITHIN (delta, expected, actual)`
+
+##### `TEST_ASSERT_INT8_WITHIN (delta, expected, actual)`
+
+##### `TEST_ASSERT_INT16_WITHIN (delta, expected, actual)`
+
+##### `TEST_ASSERT_INT32_WITHIN (delta, expected, actual)`
+
+##### `TEST_ASSERT_INT64_WITHIN (delta, expected, actual)`
+
+##### `TEST_ASSERT_UINT_WITHIN (delta, expected, actual)`
+
+##### `TEST_ASSERT_UINT8_WITHIN (delta, expected, actual)`
+
+##### `TEST_ASSERT_UINT16_WITHIN (delta, expected, actual)`
+
+##### `TEST_ASSERT_UINT32_WITHIN (delta, expected, actual)`
+
+##### `TEST_ASSERT_UINT64_WITHIN (delta, expected, actual)`
+
+##### `TEST_ASSERT_HEX_WITHIN (delta, expected, actual)`
+
+##### `TEST_ASSERT_HEX8_WITHIN (delta, expected, actual)`
+
+##### `TEST_ASSERT_HEX16_WITHIN (delta, expected, actual)`
+
+##### `TEST_ASSERT_HEX32_WITHIN (delta, expected, actual)`
+
+##### `TEST_ASSERT_HEX64_WITHIN (delta, expected, actual)`
+
+##### `TEST_ASSERT_CHAR_WITHIN (delta, expected, actual)`
+
+### Structs and Strings
+
+##### `TEST_ASSERT_EQUAL_PTR (expected, actual)`
+
+Asserts that the pointers point to the same memory location.
+
+
+##### `TEST_ASSERT_EQUAL_STRING (expected, actual)`
+
+Asserts that the null terminated (`'\0'`)strings are identical. If strings are
+of different lengths or any portion of the strings before their terminators
+differ, the assertion fails. Two NULL strings (i.e. zero length) are considered
+equivalent.
+
+
+##### `TEST_ASSERT_EQUAL_MEMORY (expected, actual, len)`
+
+Asserts that the contents of the memory specified by the `expected` and `actual`
+pointers is identical. The size of the memory blocks in bytes is specified by
+the `len` parameter.
+
+
+### Arrays
+
+`expected` and `actual` parameters are both arrays. `num_elements` specifies the
+number of elements in the arrays to compare.
+
+`_HEX` assertions produce failure messages with expected and actual array
+contents formatted in hexadecimal.
+
+For array of strings comparison behavior, see comments for
+`TEST_ASSERT_EQUAL_STRING` in the preceding section.
+
+Assertions fail upon the first element in the compared arrays found not to
+match. Failure messages specify the array index of the failed comparison.
+
+##### `TEST_ASSERT_EQUAL_INT_ARRAY (expected, actual, num_elements)`
+
+##### `TEST_ASSERT_EQUAL_INT8_ARRAY (expected, actual, num_elements)`
+
+##### `TEST_ASSERT_EQUAL_INT16_ARRAY (expected, actual, num_elements)`
+
+##### `TEST_ASSERT_EQUAL_INT32_ARRAY (expected, actual, num_elements)`
+
+##### `TEST_ASSERT_EQUAL_INT64_ARRAY (expected, actual, num_elements)`
+
+##### `TEST_ASSERT_EQUAL_UINT_ARRAY (expected, actual, num_elements)`
+
+##### `TEST_ASSERT_EQUAL_UINT8_ARRAY (expected, actual, num_elements)`
+
+##### `TEST_ASSERT_EQUAL_UINT16_ARRAY (expected, actual, num_elements)`
+
+##### `TEST_ASSERT_EQUAL_UINT32_ARRAY (expected, actual, num_elements)`
+
+##### `TEST_ASSERT_EQUAL_UINT64_ARRAY (expected, actual, num_elements)`
+
+##### `TEST_ASSERT_EQUAL_HEX_ARRAY (expected, actual, num_elements)`
+
+##### `TEST_ASSERT_EQUAL_HEX8_ARRAY (expected, actual, num_elements)`
+
+##### `TEST_ASSERT_EQUAL_HEX16_ARRAY (expected, actual, num_elements)`
+
+##### `TEST_ASSERT_EQUAL_HEX32_ARRAY (expected, actual, num_elements)`
+
+##### `TEST_ASSERT_EQUAL_HEX64_ARRAY (expected, actual, num_elements)`
+
+##### `TEST_ASSERT_EQUAL_CHAR_ARRAY (expected, actual, num_elements)`
+
+##### `TEST_ASSERT_EQUAL_PTR_ARRAY (expected, actual, num_elements)`
+
+##### `TEST_ASSERT_EQUAL_STRING_ARRAY (expected, actual, num_elements)`
+
+##### `TEST_ASSERT_EQUAL_MEMORY_ARRAY (expected, actual, len, num_elements)`
+
+`len` is the memory in bytes to be compared at each array element.
+
+### Integer Array Ranges (of all sizes)
+
+These assertions verify that the `expected` array parameter is within +/- `delta`
+(inclusive) of the `actual` array parameter. For example, if the expected value is
+\[10, 12\] and the delta is 3 then the assertion will fail for any value
+outside the range of \[7 - 13, 9 - 15\].
+
+##### `TEST_ASSERT_INT_ARRAY_WITHIN (delta, expected, actual, num_elements)`
+
+##### `TEST_ASSERT_INT8_ARRAY_WITHIN (delta, expected, actual, num_elements)`
+
+##### `TEST_ASSERT_INT16_ARRAY_WITHIN (delta, expected, actual, num_elements)`
+
+##### `TEST_ASSERT_INT32_ARRAY_WITHIN (delta, expected, actual, num_elements)`
+
+##### `TEST_ASSERT_INT64_ARRAY_WITHIN (delta, expected, actual, num_elements)`
+
+##### `TEST_ASSERT_UINT_ARRAY_WITHIN (delta, expected, actual, num_elements)`
+
+##### `TEST_ASSERT_UINT8_ARRAY_WITHIN (delta, expected, actual, num_elements)`
+
+##### `TEST_ASSERT_UINT16_ARRAY_WITHIN (delta, expected, actual, num_elements)`
+
+##### `TEST_ASSERT_UINT32_ARRAY_WITHIN (delta, expected, actual, num_elements)`
+
+##### `TEST_ASSERT_UINT64_ARRAY_WITHIN (delta, expected, actual, num_elements)`
+
+##### `TEST_ASSERT_HEX_ARRAY_WITHIN (delta, expected, actual, num_elements)`
+
+##### `TEST_ASSERT_HEX8_ARRAY_WITHIN (delta, expected, actual, num_elements)`
+
+##### `TEST_ASSERT_HEX16_ARRAY_WITHIN (delta, expected, actual, num_elements)`
+
+##### `TEST_ASSERT_HEX32_ARRAY_WITHIN (delta, expected, actual, num_elements)`
+
+##### `TEST_ASSERT_HEX64_ARRAY_WITHIN (delta, expected, actual, num_elements)`
+
+##### `TEST_ASSERT_CHAR_ARRAY_WITHIN (delta, expected, actual, num_elements)`
+
+### Each Equal (Arrays to Single Value)
+
+`expected` are single values and `actual` are arrays. `num_elements` specifies
+the number of elements in the arrays to compare.
+
+`_HEX` assertions produce failure messages with expected and actual array
+contents formatted in hexadecimal.
+
+Assertions fail upon the first element in the compared arrays found not to
+match. Failure messages specify the array index of the failed comparison.
+
+#### `TEST_ASSERT_EACH_EQUAL_INT (expected, actual, num_elements)`
+
+#### `TEST_ASSERT_EACH_EQUAL_INT8 (expected, actual, num_elements)`
+
+#### `TEST_ASSERT_EACH_EQUAL_INT16 (expected, actual, num_elements)`
+
+#### `TEST_ASSERT_EACH_EQUAL_INT32 (expected, actual, num_elements)`
+
+#### `TEST_ASSERT_EACH_EQUAL_INT64 (expected, actual, num_elements)`
+
+#### `TEST_ASSERT_EACH_EQUAL_UINT (expected, actual, num_elements)`
+
+#### `TEST_ASSERT_EACH_EQUAL_UINT8 (expected, actual, num_elements)`
+
+#### `TEST_ASSERT_EACH_EQUAL_UINT16 (expected, actual, num_elements)`
+
+#### `TEST_ASSERT_EACH_EQUAL_UINT32 (expected, actual, num_elements)`
+
+#### `TEST_ASSERT_EACH_EQUAL_UINT64 (expected, actual, num_elements)`
+
+#### `TEST_ASSERT_EACH_EQUAL_HEX (expected, actual, num_elements)`
+
+#### `TEST_ASSERT_EACH_EQUAL_HEX8 (expected, actual, num_elements)`
+
+#### `TEST_ASSERT_EACH_EQUAL_HEX16 (expected, actual, num_elements)`
+
+#### `TEST_ASSERT_EACH_EQUAL_HEX32 (expected, actual, num_elements)`
+
+#### `TEST_ASSERT_EACH_EQUAL_HEX64 (expected, actual, num_elements)`
+
+#### `TEST_ASSERT_EACH_EQUAL_CHAR (expected, actual, num_elements)`
+
+#### `TEST_ASSERT_EACH_EQUAL_PTR (expected, actual, num_elements)`
+
+#### `TEST_ASSERT_EACH_EQUAL_STRING (expected, actual, num_elements)`
+
+#### `TEST_ASSERT_EACH_EQUAL_MEMORY (expected, actual, len, num_elements)`
+
+`len` is the memory in bytes to be compared at each array element.
+
+
+### Floating Point (If enabled)
+
+##### `TEST_ASSERT_FLOAT_WITHIN (delta, expected, actual)`
+
+Asserts that the `actual` value is within +/- `delta` of the `expected` value.
+The nature of floating point representation is such that exact evaluations of
+equality are not guaranteed.
+
+
+##### `TEST_ASSERT_EQUAL_FLOAT (expected, actual)`
+
+Asserts that the ?actual?value is "close enough to be considered equal" to the
+`expected` value. If you are curious about the details, refer to the Advanced
+Asserting section for more details on this. Omitting a user-specified delta in a
+floating point assertion is both a shorthand convenience and a requirement of
+code generation conventions for CMock.
+
+
+##### `TEST_ASSERT_EQUAL_FLOAT_ARRAY (expected, actual, num_elements)`
+
+See Array assertion section for details. Note that individual array element
+float comparisons are executed using T?EST_ASSERT_EQUAL_FLOAT?.That is, user
+specified delta comparison values requires a custom-implemented floating point
+array assertion.
+
+
+##### `TEST_ASSERT_FLOAT_IS_INF (actual)`
+
+Asserts that `actual` parameter is equivalent to positive infinity floating
+point representation.
+
+
+##### `TEST_ASSERT_FLOAT_IS_NEG_INF (actual)`
+
+Asserts that `actual` parameter is equivalent to negative infinity floating
+point representation.
+
+
+##### `TEST_ASSERT_FLOAT_IS_NAN (actual)`
+
+Asserts that `actual` parameter is a Not A Number floating point representation.
+
+
+##### `TEST_ASSERT_FLOAT_IS_DETERMINATE (actual)`
+
+Asserts that ?actual?parameter is a floating point representation usable for
+mathematical operations. That is, the `actual` parameter is neither positive
+infinity nor negative infinity nor Not A Number floating point representations.
+
+
+##### `TEST_ASSERT_FLOAT_IS_NOT_INF (actual)`
+
+Asserts that `actual` parameter is a value other than positive infinity floating
+point representation.
+
+
+##### `TEST_ASSERT_FLOAT_IS_NOT_NEG_INF (actual)`
+
+Asserts that `actual` parameter is a value other than negative infinity floating
+point representation.
+
+
+##### `TEST_ASSERT_FLOAT_IS_NOT_NAN (actual)`
+
+Asserts that `actual` parameter is a value other than Not A Number floating
+point representation.
+
+
+##### `TEST_ASSERT_FLOAT_IS_NOT_DETERMINATE (actual)`
+
+Asserts that `actual` parameter is not usable for mathematical operations. That
+is, the `actual` parameter is either positive infinity or negative infinity or
+Not A Number floating point representations.
+
+
+### Double (If enabled)
+
+##### `TEST_ASSERT_DOUBLE_WITHIN (delta, expected, actual)`
+
+Asserts that the `actual` value is within +/- `delta` of the `expected` value.
+The nature of floating point representation is such that exact evaluations of
+equality are not guaranteed.
+
+
+##### `TEST_ASSERT_EQUAL_DOUBLE (expected, actual)`
+
+Asserts that the `actual` value is "close enough to be considered equal" to the
+`expected` value. If you are curious about the details, refer to the Advanced
+Asserting section for more details. Omitting a user-specified delta in a
+floating point assertion is both a shorthand convenience and a requirement of
+code generation conventions for CMock.
+
+
+##### `TEST_ASSERT_EQUAL_DOUBLE_ARRAY (expected, actual, num_elements)`
+
+See Array assertion section for details. Note that individual array element
+double comparisons are executed using `TEST_ASSERT_EQUAL_DOUBLE`.That is, user
+specified delta comparison values requires a custom implemented double array
+assertion.
+
+
+##### `TEST_ASSERT_DOUBLE_IS_INF (actual)`
+
+Asserts that `actual` parameter is equivalent to positive infinity floating
+point representation.
+
+
+##### `TEST_ASSERT_DOUBLE_IS_NEG_INF (actual)`
+
+Asserts that `actual` parameter is equivalent to negative infinity floating point
+representation.
+
+
+##### `TEST_ASSERT_DOUBLE_IS_NAN (actual)`
+
+Asserts that `actual` parameter is a Not A Number floating point representation.
+
+
+##### `TEST_ASSERT_DOUBLE_IS_DETERMINATE (actual)`
+
+Asserts that `actual` parameter is a floating point representation usable for
+mathematical operations. That is, the ?actual?parameter is neither positive
+infinity nor negative infinity nor Not A Number floating point representations.
+
+
+##### `TEST_ASSERT_DOUBLE_IS_NOT_INF (actual)`
+
+Asserts that `actual` parameter is a value other than positive infinity floating
+point representation.
+
+
+##### `TEST_ASSERT_DOUBLE_IS_NOT_NEG_INF (actual)`
+
+Asserts that `actual` parameter is a value other than negative infinity floating
+point representation.
+
+
+##### `TEST_ASSERT_DOUBLE_IS_NOT_NAN (actual)`
+
+Asserts that `actual` parameter is a value other than Not A Number floating
+point representation.
+
+
+##### `TEST_ASSERT_DOUBLE_IS_NOT_DETERMINATE (actual)`
+
+Asserts that `actual` parameter is not usable for mathematical operations. That
+is, the `actual` parameter is either positive infinity or negative infinity or
+Not A Number floating point representations.
+
+
+## Advanced Asserting: Details On Tricky Assertions
+
+This section helps you understand how to deal with some of the trickier
+assertion situations you may run into. It will give you a glimpse into some of
+the under-the-hood details of Unity's assertion mechanisms. If you're one of
+those people who likes to know what is going on in the background, read on. If
+not, feel free to ignore the rest of this document until you need it.
+
+
+### How do the EQUAL assertions work for FLOAT and DOUBLE?
+
+As you may know, directly checking for equality between a pair of floats or a
+pair of doubles is sloppy at best and an outright no-no at worst. Floating point
+values can often be represented in multiple ways, particularly after a series of
+operations on a value. Initializing a variable to the value of 2.0 is likely to
+result in a floating point representation of 2 x 20,but a series of
+mathematical operations might result in a representation of 8 x 2-2
+that also evaluates to a value of 2. At some point repeated operations cause
+equality checks to fail.
+
+So Unity doesn't do direct floating point comparisons for equality. Instead, it
+checks if two floating point values are "really close." If you leave Unity
+running with defaults, "really close" means "within a significant bit or two."
+Under the hood, `TEST_ASSERT_EQUAL_FLOAT` is really `TEST_ASSERT_FLOAT_WITHIN`
+with the `delta` parameter calculated on the fly. For single precision, delta is
+the expected value multiplied by 0.00001, producing a very small proportional
+range around the expected value.
+
+If you are expecting a value of 20,000.0 the delta is calculated to be 0.2. So
+any value between 19,999.8 and 20,000.2 will satisfy the equality check. This
+works out to be roughly a single bit of range for a single-precision number, and
+that's just about as tight a tolerance as you can reasonably get from a floating
+point value.
+
+So what happens when it's zero? Zero - even more than other floating point
+values - can be represented many different ways. It doesn't matter if you have
+0 x 20 or 0 x 263.It's still zero, right? Luckily, if you
+subtract these values from each other, they will always produce a difference of
+zero, which will still fall between 0 plus or minus a delta of 0. So it still
+works!
+
+Double precision floating point numbers use a much smaller multiplier, again
+approximating a single bit of error.
+
+If you don't like these ranges and you want to make your floating point equality
+assertions less strict, you can change these multipliers to whatever you like by
+defining UNITY_FLOAT_PRECISION and UNITY_DOUBLE_PRECISION. See Unity
+documentation for more.
+
+
+### How do we deal with targets with non-standard int sizes?
+
+It's "fun" that C is a standard where something as fundamental as an integer
+varies by target. According to the C standard, an `int` is to be the target's
+natural register size, and it should be at least 16-bits and a multiple of a
+byte. It also guarantees an order of sizes:
+
+```C
+char <= short <= int <= long <= long long
+```
+
+Most often, `int` is 32-bits. In many cases in the embedded world, `int` is
+16-bits. There are rare microcontrollers out there that have 24-bit integers,
+and this remains perfectly standard C.
+
+To make things even more interesting, there are compilers and targets out there
+that have a hard choice to make. What if their natural register size is 10-bits
+or 12-bits? Clearly they can't fulfill _both_ the requirement to be at least
+16-bits AND the requirement to match the natural register size. In these
+situations, they often choose the natural register size, leaving us with
+something like this:
+
+```C
+char (8 bit) <= short (12 bit) <= int (12 bit) <= long (16 bit)
+```
+
+Um... yikes. It's obviously breaking a rule or two... but they had to break SOME
+rules, so they made a choice.
+
+When the C99 standard rolled around, it introduced alternate standard-size types.
+It also introduced macros for pulling in MIN/MAX values for your integer types.
+It's glorious! Unfortunately, many embedded compilers can't be relied upon to
+use the C99 types (Sometimes because they have weird register sizes as described
+above. Sometimes because they don't feel like it?).
+
+A goal of Unity from the beginning was to support every combination of
+microcontroller or microprocessor and C compiler. Over time, we've gotten really
+close to this. There are a few tricks that you should be aware of, though, if
+you're going to do this effectively on some of these more idiosyncratic targets.
+
+First, when setting up Unity for a new target, you're going to want to pay
+special attention to the macros for automatically detecting types
+(where available) or manually configuring them yourself. You can get information
+on both of these in Unity's documentation.
+
+What about the times where you suddenly need to deal with something odd, like a
+24-bit `int`? The simplest solution is to use the next size up. If you have a
+24-bit `int`, configure Unity to use 32-bit integers. If you have a 12-bit
+`int`, configure Unity to use 16 bits. There are two ways this is going to
+affect you:
+
+1. When Unity displays errors for you, it's going to pad the upper unused bits
+with zeros.
+2. You're going to have to be careful of assertions that perform signed
+operations, particularly `TEST_ASSERT_INT_WITHIN`.Such assertions might wrap
+your `int` in the wrong place, and you could experience false failures. You can
+always back down to a simple `TEST_ASSERT` and do the operations yourself.
+
+
+*Find The Latest of This And More at [ThrowTheSwitch.org](https://throwtheswitch.org)*
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/docs/UnityConfigurationGuide.md b/FreeRTOS-Plus/Test/CMock/vendor/unity/docs/UnityConfigurationGuide.md
new file mode 100644
index 000000000..de691fdf2
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/docs/UnityConfigurationGuide.md
@@ -0,0 +1,563 @@
+# Unity Configuration Guide
+
+## C Standards, Compilers and Microcontrollers
+
+The embedded software world contains its challenges. Compilers support different
+revisions of the C Standard. They ignore requirements in places, sometimes to
+make the language more usable in some special regard. Sometimes it's to simplify
+their support. Sometimes it's due to specific quirks of the microcontroller they
+are targeting. Simulators add another dimension to this menagerie.
+
+Unity is designed to run on almost anything that is targeted by a C compiler. It
+would be awesome if this could be done with zero configuration. While there are
+some targets that come close to this dream, it is sadly not universal. It is
+likely that you are going to need at least a couple of the configuration options
+described in this document.
+
+All of Unity's configuration options are `#defines`. Most of these are simple
+definitions. A couple are macros with arguments. They live inside the
+unity_internals.h header file. We don't necessarily recommend opening that file
+unless you really need to. That file is proof that a cross-platform library is
+challenging to build. From a more positive perspective, it is also proof that a
+great deal of complexity can be centralized primarily to one place to
+provide a more consistent and simple experience elsewhere.
+
+
+### Using These Options
+
+It doesn't matter if you're using a target-specific compiler and a simulator or
+a native compiler. In either case, you've got a couple choices for configuring
+these options:
+
+1. Because these options are specified via C defines, you can pass most of these
+options to your compiler through command line compiler flags. Even if you're
+using an embedded target that forces you to use their overbearing IDE for all
+configuration, there will be a place somewhere in your project to configure
+defines for your compiler.
+2. You can create a custom `unity_config.h` configuration file (present in your
+toolchain's search paths). In this file, you will list definitions and macros
+specific to your target. All you must do is define `UNITY_INCLUDE_CONFIG_H` and
+Unity will rely on `unity_config.h` for any further definitions it may need.
+
+Unfortunately, it doesn't usually work well to just #define these things in the
+test itself. These defines need to take effect where ever unity.h is included.
+This would be test test, the test runner (if you're generating one), and from
+unity.c when it's compiled.
+
+## The Options
+
+### Integer Types
+
+If you've been a C developer for long, you probably already know that C's
+concept of an integer varies from target to target. The C Standard has rules
+about the `int` matching the register size of the target microprocessor. It has
+rules about the `int` and how its size relates to other integer types. An `int`
+on one target might be 16 bits while on another target it might be 64. There are
+more specific types in compilers compliant with C99 or later, but that's
+certainly not every compiler you are likely to encounter. Therefore, Unity has a
+number of features for helping to adjust itself to match your required integer
+sizes. It starts off by trying to do it automatically.
+
+
+##### `UNITY_EXCLUDE_STDINT_H`
+
+The first thing that Unity does to guess your types is check `stdint.h`.
+This file includes defines like `UINT_MAX` that Unity can use to
+learn a lot about your system. It's possible you don't want it to do this
+(um. why not?) or (more likely) it's possible that your system doesn't
+support `stdint.h`. If that's the case, you're going to want to define this.
+That way, Unity will know to skip the inclusion of this file and you won't
+be left with a compiler error.
+
+_Example:_
+```C
+#define UNITY_EXCLUDE_STDINT_H
+```
+
+
+##### `UNITY_EXCLUDE_LIMITS_H`
+
+The second attempt to guess your types is to check `limits.h`. Some compilers
+that don't support `stdint.h` could include `limits.h` instead. If you don't
+want Unity to check this file either, define this to make it skip the inclusion.
+
+_Example:_
+```C
+#define UNITY_EXCLUDE_LIMITS_H
+```
+
+If you've disabled both of the automatic options above, you're going to have to
+do the configuration yourself. Don't worry. Even this isn't too bad... there are
+just a handful of defines that you are going to specify if you don't like the
+defaults.
+
+
+##### `UNITY_INT_WIDTH`
+
+Define this to be the number of bits an `int` takes up on your system. The
+default, if not autodetected, is 32 bits.
+
+_Example:_
+```C
+#define UNITY_INT_WIDTH 16
+```
+
+
+##### `UNITY_LONG_WIDTH`
+
+Define this to be the number of bits a `long` takes up on your system. The
+default, if not autodetected, is 32 bits. This is used to figure out what kind
+of 64-bit support your system can handle. Does it need to specify a `long` or a
+`long long` to get a 64-bit value. On 16-bit systems, this option is going to be
+ignored.
+
+_Example:_
+```C
+#define UNITY_LONG_WIDTH 16
+```
+
+
+##### `UNITY_POINTER_WIDTH`
+
+Define this to be the number of bits a pointer takes up on your system. The
+default, if not autodetected, is 32-bits. If you're getting ugly compiler
+warnings about casting from pointers, this is the one to look at.
+
+_Hint:_ In order to support exotic processors (for example TI C55x with a pointer
+width of 23-bit), choose the next power of two (in this case 32-bit).
+
+_Supported values:_ 16, 32 and 64
+
+_Example:_
+```C
+// Choose on of these #defines to set your pointer width (if not autodetected)
+//#define UNITY_POINTER_WIDTH 16
+//#define UNITY_POINTER_WIDTH 32
+#define UNITY_POINTER_WIDTH 64 // Set UNITY_POINTER_WIDTH to 64-bit
+```
+
+
+##### `UNITY_SUPPORT_64`
+
+Unity will automatically include 64-bit support if it auto-detects it, or if
+your `int`, `long`, or pointer widths are greater than 32-bits. Define this to
+enable 64-bit support if none of the other options already did it for you. There
+can be a significant size and speed impact to enabling 64-bit support on small
+targets, so don't define it if you don't need it.
+
+_Example:_
+```C
+#define UNITY_SUPPORT_64
+```
+
+
+### Floating Point Types
+
+In the embedded world, it's not uncommon for targets to have no support for
+floating point operations at all or to have support that is limited to only
+single precision. We are able to guess integer sizes on the fly because integers
+are always available in at least one size. Floating point, on the other hand, is
+sometimes not available at all. Trying to include `float.h` on these platforms
+would result in an error. This leaves manual configuration as the only option.
+
+
+##### `UNITY_INCLUDE_FLOAT`
+
+##### `UNITY_EXCLUDE_FLOAT`
+
+##### `UNITY_INCLUDE_DOUBLE`
+
+##### `UNITY_EXCLUDE_DOUBLE`
+
+By default, Unity guesses that you will want single precision floating point
+support, but not double precision. It's easy to change either of these using the
+include and exclude options here. You may include neither, either, or both, as
+suits your needs. For features that are enabled, the following floating point
+options also become available.
+
+_Example:_
+```C
+//what manner of strange processor is this?
+#define UNITY_EXCLUDE_FLOAT
+#define UNITY_INCLUDE_DOUBLE
+```
+
+
+##### `UNITY_EXCLUDE_FLOAT_PRINT`
+
+Unity aims for as small of a footprint as possible and avoids most standard
+library calls (some embedded platforms don’t have a standard library!). Because
+of this, its routines for printing integer values are minimalist and hand-coded.
+Therefore, the display of floating point values during a failure are optional.
+By default, Unity will print the actual results of floating point assertion
+failure (e.g. �Expected 4.56 Was 4.68�). To not include this extra support, you
+can use this define to instead respond to a failed assertion with a message like
+�Values Not Within Delta�. If you would like verbose failure messages for floating
+point assertions, use these options to give more explicit failure messages.
+
+_Example:_
+```C
+#define UNITY_EXCLUDE_FLOAT_PRINT
+```
+
+
+##### `UNITY_FLOAT_TYPE`
+
+If enabled, Unity assumes you want your `FLOAT` asserts to compare standard C
+floats. If your compiler supports a specialty floating point type, you can
+always override this behavior by using this definition.
+
+_Example:_
+```C
+#define UNITY_FLOAT_TYPE float16_t
+```
+
+
+##### `UNITY_DOUBLE_TYPE`
+
+If enabled, Unity assumes you want your `DOUBLE` asserts to compare standard C
+doubles. If you would like to change this, you can specify something else by
+using this option. For example, defining `UNITY_DOUBLE_TYPE` to `long double`
+could enable gargantuan floating point types on your 64-bit processor instead of
+the standard `double`.
+
+_Example:_
+```C
+#define UNITY_DOUBLE_TYPE long double
+```
+
+
+##### `UNITY_FLOAT_PRECISION`
+
+##### `UNITY_DOUBLE_PRECISION`
+
+If you look up `UNITY_ASSERT_EQUAL_FLOAT` and `UNITY_ASSERT_EQUAL_DOUBLE` as
+documented in the big daddy Unity Assertion Guide, you will learn that they are
+not really asserting that two values are equal but rather that two values are
+"close enough" to equal. "Close enough" is controlled by these precision
+configuration options. If you are working with 32-bit floats and/or 64-bit
+doubles (the normal on most processors), you should have no need to change these
+options. They are both set to give you approximately 1 significant bit in either
+direction. The float precision is 0.00001 while the double is 10-12.
+For further details on how this works, see the appendix of the Unity Assertion
+Guide.
+
+_Example:_
+```C
+#define UNITY_FLOAT_PRECISION 0.001f
+```
+
+
+### Miscellaneous
+
+##### `UNITY_EXCLUDE_STDDEF_H`
+
+Unity uses the `NULL` macro, which defines the value of a null pointer constant,
+defined in `stddef.h` by default. If you want to provide
+your own macro for this, you should exclude the `stddef.h` header file by adding this
+define to your configuration.
+
+_Example:_
+```C
+#define UNITY_EXCLUDE_STDDEF_H
+```
+
+
+#### `UNITY_INCLUDE_PRINT_FORMATTED`
+
+Unity provides a simple (and very basic) printf-like string output implementation,
+which is able to print a string modified by the following format string modifiers:
+
+- __%d__ - signed value (decimal)
+- __%i__ - same as __%i__
+- __%u__ - unsigned value (decimal)
+- __%f__ - float/Double (if float support is activated)
+- __%g__ - same as __%f__
+- __%b__ - binary prefixed with "0b"
+- __%x__ - hexadecimal (upper case) prefixed with "0x"
+- __%X__ - same as __%x__
+- __%p__ - pointer (same as __%x__ or __%X__)
+- __%c__ - a single character
+- __%s__ - a string (e.g. "string")
+- __%%__ - The "%" symbol (escaped)
+
+_Example:_
+```C
+#define UNITY_INCLUDE_PRINT_FORMATTED
+
+int a = 0xfab1;
+TEST_PRINTF("Decimal   %d\n", -7);
+TEST_PRINTF("Unsigned  %u\n", 987);
+TEST_PRINTF("Float     %f\n", 3.1415926535897932384);
+TEST_PRINTF("Binary    %b\n", 0xA);
+TEST_PRINTF("Hex       %X\n", 0xFAB);
+TEST_PRINTF("Pointer   %p\n", &a);
+TEST_PRINTF("Character %c\n", 'F');
+TEST_PRINTF("String    %s\n", "My string");
+TEST_PRINTF("Percent   %%\n");
+TEST_PRINTF("Color Red \033[41mFAIL\033[00m\n");
+TEST_PRINTF("\n");
+TEST_PRINTF("Multiple (%d) (%i) (%u) (%x)\n", -100, 0, 200, 0x12345);
+```
+
+
+### Toolset Customization
+
+In addition to the options listed above, there are a number of other options
+which will come in handy to customize Unity's behavior for your specific
+toolchain. It is possible that you may not need to touch any of these... but
+certain platforms, particularly those running in simulators, may need to jump
+through extra hoops to run properly. These macros will help in those
+situations.
+
+
+##### `UNITY_OUTPUT_CHAR(a)`
+
+##### `UNITY_OUTPUT_FLUSH()`
+
+##### `UNITY_OUTPUT_START()`
+
+##### `UNITY_OUTPUT_COMPLETE()`
+
+By default, Unity prints its results to `stdout` as it runs. This works
+perfectly fine in most situations where you are using a native compiler for
+testing. It works on some simulators as well so long as they have `stdout`
+routed back to the command line. There are times, however, where the simulator
+will lack support for dumping results or you will want to route results
+elsewhere for other reasons. In these cases, you should define the
+`UNITY_OUTPUT_CHAR` macro. This macro accepts a single character at a time (as
+an `int`, since this is the parameter type of the standard C `putchar` function
+most commonly used). You may replace this with whatever function call you like.
+
+_Example:_
+Say you are forced to run your test suite on an embedded processor with no
+`stdout` option. You decide to route your test result output to a custom serial
+`RS232_putc()` function you wrote like thus:
+```C
+#include "RS232_header.h"
+...
+#define UNITY_OUTPUT_CHAR(a)    RS232_putc(a)
+#define UNITY_OUTPUT_START()    RS232_config(115200,1,8,0)
+#define UNITY_OUTPUT_FLUSH()    RS232_flush()
+#define UNITY_OUTPUT_COMPLETE() RS232_close()
+```
+
+_Note:_
+`UNITY_OUTPUT_FLUSH()` can be set to the standard out flush function simply by
+specifying `UNITY_USE_FLUSH_STDOUT`. No other defines are required.
+
+
+##### `UNITY_OUTPUT_FOR_ECLIPSE`
+
+##### `UNITY_OUTPUT_FOR_IAR_WORKBENCH`
+
+##### `UNITY_OUTPUT_FOR_QT_CREATOR`
+
+When managing your own builds, it is often handy to have messages output in a format which is
+recognized by your IDE. These are some standard formats which can be supported. If you're using
+Ceedling to manage your builds, it is better to stick with the standard format (leaving these
+all undefined) and allow Ceedling to use its own decorators.
+
+
+##### `UNITY_PTR_ATTRIBUTE`
+
+Some compilers require a custom attribute to be assigned to pointers, like
+`near` or `far`. In these cases, you can give Unity a safe default for these by
+defining this option with the attribute you would like.
+
+_Example:_
+```C
+#define UNITY_PTR_ATTRIBUTE __attribute__((far))
+#define UNITY_PTR_ATTRIBUTE near
+```
+
+##### `UNITY_PRINT_EOL`
+
+By default, Unity outputs \n at the end of each line of output. This is easy
+to parse by the scripts, by Ceedling, etc, but it might not be ideal for YOUR
+system. Feel free to override this and to make it whatever you wish.
+
+_Example:_
+```C
+#define UNITY_PRINT_EOL { UNITY_OUTPUT_CHAR('\r'); UNITY_OUTPUT_CHAR('\n') }
+```
+
+
+##### `UNITY_EXCLUDE_DETAILS`
+
+This is an option for if you absolutely must squeeze every byte of memory out of
+your system. Unity stores a set of internal scratchpads which are used to pass
+extra detail information around. It's used by systems like CMock in order to
+report which function or argument flagged an error. If you're not using CMock and
+you're not using these details for other things, then you can exclude them.
+
+_Example:_
+```C
+#define UNITY_EXCLUDE_DETAILS
+```
+
+##### `UNITY_PRINT_TEST_CONTEXT`
+
+This option allows you to specify your own function to print additional context
+as part of the error message when a test has failed. It can be useful if you
+want to output some specific information about the state of the test at the point
+of failure, and `UNITY_SET_DETAILS` isn't flexible enough for your needs.
+
+_Example:_
+```C
+#define UNITY_PRINT_TEST_CONTEXT PrintIterationCount
+
+extern int iteration_count;
+
+void PrintIterationCount(void)
+{
+  UnityPrintFormatted("At iteration #%d: ", iteration_count);
+}
+```
+
+##### `UNITY_EXCLUDE_SETJMP`
+
+If your embedded system doesn't support the standard library setjmp, you can
+exclude Unity's reliance on this by using this define. This dropped dependence
+comes at a price, though. You will be unable to use custom helper functions for
+your tests, and you will be unable to use tools like CMock. Very likely, if your
+compiler doesn't support setjmp, you wouldn't have had the memory space for those
+things anyway, though... so this option exists for those situations.
+
+_Example:_
+```C
+#define UNITY_EXCLUDE_SETJMP
+```
+
+##### `UNITY_OUTPUT_COLOR`
+
+If you want to add color using ANSI escape codes you can use this define.
+
+_Example:_
+```C
+#define UNITY_OUTPUT_COLOR
+```
+
+##### `UNITY_SHORTHAND_AS_INT`
+##### `UNITY_SHORTHAND_AS_MEM`
+##### `UNITY_SHORTHAND_AS_RAW`
+##### `UNITY_SHORTHAND_AS_NONE`
+
+These options  give you control of the `TEST_ASSERT_EQUAL` and the
+`TEST_ASSERT_NOT_EQUAL` shorthand assertions. Historically, Unity treated the
+former as an alias for an integer comparison. It treated the latter as a direct
+comparison using `!=`. This assymetry was confusing, but there was much
+disagreement as to how best to treat this pair of assertions. These four options
+will allow you to specify how Unity will treat these assertions.
+
+  - AS INT - the values will be cast to integers and directly compared. Arguments
+             that don't cast easily to integers will cause compiler errors.
+  - AS MEM - the address of both values will be taken and the entire object's
+             memory footprint will be compared byte by byte. Directly placing
+             constant numbers like `456` as expected values will cause errors.
+  - AS_RAW - Unity assumes that you can compare the two values using `==` and `!=`
+             and will do so. No details are given about mismatches, because it
+             doesn't really know what type it's dealing with.
+  - AS_NONE - Unity will disallow the use of these shorthand macros altogether,
+             insisting that developers choose a more descriptive option.
+
+#### `UNITY_SUPPORT_VARIADIC_MACROS`
+
+This will force Unity to support variadic macros when using its own built-in
+RUN_TEST macro. This will rarely be necessary. Most often, Unity will automatically
+detect if the compiler supports variadic macros by checking to see if it's C99+
+compatible. In the event that the compiler supports variadic macros, but is primarily
+C89 (ANSI), defining this option will allow you to use them. This option is also not
+necessary when using Ceedling or the test runner generator script.
+
+## Getting Into The Guts
+
+There will be cases where the options above aren't quite going to get everything
+perfect. They are likely sufficient for any situation where you are compiling
+and executing your tests with a native toolchain (e.g. clang on Mac). These
+options may even get you through the majority of cases encountered in working
+with a target simulator run from your local command line. But especially if you
+must run your test suite on your target hardware, your Unity configuration will
+require special help. This special help will usually reside in one of two
+places: the `main()` function or the `RUN_TEST` macro. Let's look at how these
+work.
+
+
+##### `main()`
+
+Each test module is compiled and run on its own, separate from the other test
+files in your project. Each test file, therefore, has a `main` function. This
+`main` function will need to contain whatever code is necessary to initialize
+your system to a workable state. This is particularly true for situations where
+you must set up a memory map or initialize a communication channel for the
+output of your test results.
+
+A simple main function looks something like this:
+
+```C
+int main(void) {
+    UNITY_BEGIN();
+    RUN_TEST(test_TheFirst);
+    RUN_TEST(test_TheSecond);
+    RUN_TEST(test_TheThird);
+    return UNITY_END();
+}
+```
+
+You can see that our main function doesn't bother taking any arguments. For our
+most barebones case, we'll never have arguments because we just run all the
+tests each time. Instead, we start by calling `UNITY_BEGIN`. We run each test
+(in whatever order we wish). Finally, we call `UNITY_END`, returning its return
+value (which is the total number of failures).
+
+It should be easy to see that you can add code before any test cases are run or
+after all the test cases have completed. This allows you to do any needed
+system-wide setup or teardown that might be required for your special
+circumstances.
+
+
+##### `RUN_TEST`
+
+The `RUN_TEST` macro is called with each test case function. Its job is to
+perform whatever setup and teardown is necessary for executing a single test
+case function. This includes catching failures, calling the test module's
+`setUp()` and `tearDown()` functions, and calling `UnityConcludeTest()`. If
+using CMock or test coverage, there will be additional stubs in use here. A
+simple minimalist RUN_TEST macro looks something like this:
+
+```C
+#define RUN_TEST(testfunc) \
+    UNITY_NEW_TEST(#testfunc) \
+    if (TEST_PROTECT()) { \
+        setUp(); \
+        testfunc(); \
+    } \
+    if (TEST_PROTECT() && (!TEST_IS_IGNORED)) \
+        tearDown(); \
+    UnityConcludeTest();
+```
+
+So that's quite a macro, huh? It gives you a glimpse of what kind of stuff Unity
+has to deal with for every single test case. For each test case, we declare that
+it is a new test. Then we run `setUp` and our test function. These are run
+within a `TEST_PROTECT` block, the function of which is to handle failures that
+occur during the test. Then, assuming our test is still running and hasn't been
+ignored, we run `tearDown`. No matter what, our last step is to conclude this
+test before moving on to the next.
+
+Let's say you need to add a call to `fsync` to force all of your output data to
+flush to a file after each test. You could easily insert this after your
+`UnityConcludeTest` call. Maybe you want to write an xml tag before and after
+each result set. Again, you could do this by adding lines to this macro. Updates
+to this macro are for the occasions when you need an action before or after
+every single test case throughout your entire suite of tests.
+
+
+## Happy Porting
+
+The defines and macros in this guide should help you port Unity to just about
+any C target we can imagine. If you run into a snag or two, don't be afraid of
+asking for help on the forums. We love a good challenge!
+
+
+*Find The Latest of This And More at [ThrowTheSwitch.org](https://throwtheswitch.org)*
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/docs/UnityGettingStartedGuide.md b/FreeRTOS-Plus/Test/CMock/vendor/unity/docs/UnityGettingStartedGuide.md
new file mode 100644
index 000000000..c054b3618
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/docs/UnityGettingStartedGuide.md
@@ -0,0 +1,251 @@
+# Unity - Getting Started
+
+## Welcome
+
+Congratulations. You're now the proud owner of your very own pile of bits! What
+are you going to do with all these ones and zeros? This document should be able
+to help you decide just that.
+
+Unity is a unit test framework. The goal has been to keep it small and
+functional. The core Unity test framework is three files: a single C file and a
+couple header files. These team up to provide functions and macros to make
+testing easier.
+
+Unity was designed to be cross-platform. It works hard to stick with C standards
+while still providing support for the many embedded C compilers that bend the
+rules. Unity has been used with many compilers, including GCC, IAR, Clang,
+Green Hills, Microchip, and MS Visual Studio. It's not much work to get it to
+work with a new target.
+
+
+### Overview of the Documents
+
+#### Unity Assertions reference
+
+This document will guide you through all the assertion options provided by
+Unity. This is going to be your unit testing bread and butter. You'll spend more
+time with assertions than any other part of Unity.
+
+
+#### Unity Assertions Cheat Sheet
+
+This document contains an abridged summary of the assertions described in the
+previous document. It's perfect for printing and referencing while you
+familiarize yourself with Unity's options.
+
+
+#### Unity Configuration Guide
+
+This document is the one to reference when you are going to use Unity with a new
+target or compiler. It'll guide you through the configuration options and will
+help you customize your testing experience to meet your needs.
+
+
+#### Unity Helper Scripts
+
+This document describes the helper scripts that are available for simplifying
+your testing workflow. It describes the collection of optional Ruby scripts
+included in the auto directory of your Unity installation. Neither Ruby nor
+these scripts are necessary for using Unity. They are provided as a convenience
+for those who wish to use them.
+
+
+#### Unity License
+
+What's an open source project without a license file? This brief document
+describes the terms you're agreeing to when you use this software. Basically, we
+want it to be useful to you in whatever context you want to use it, but please
+don't blame us if you run into problems.
+
+
+### Overview of the Folders
+
+If you have obtained Unity through Github or something similar, you might be
+surprised by just how much stuff you suddenly have staring you in the face.
+Don't worry, Unity itself is very small. The rest of it is just there to make
+your life easier. You can ignore it or use it at your convenience. Here's an
+overview of everything in the project.
+
+- `src` - This is the code you care about! This folder contains a C file and two
+header files. These three files _are_ Unity.
+- `docs` - You're reading this document, so it's possible you have found your way
+into this folder already. This is where all the handy documentation can be
+found.
+- `examples` - This contains a few examples of using Unity.
+- `extras` - These are optional add ons to Unity that are not part of the core
+project. If you've reached us through James Grenning's book, you're going to
+want to look here.
+- `test` - This is how Unity and its scripts are all tested. If you're just using
+Unity, you'll likely never need to go in here. If you are the lucky team member
+who gets to port Unity to a new toolchain, this is a good place to verify
+everything is configured properly.
+- `auto` - Here you will find helpful Ruby scripts for simplifying your test
+workflow. They are purely optional and are not required to make use of Unity.
+
+
+## How to Create A Test File
+
+Test files are C files. Most often you will create a single test file for each C
+module that you want to test. The test file should include unity.h and the
+header for your C module to be tested.
+
+Next, a test file will include a `setUp()` and `tearDown()` function. The setUp
+function can contain anything you would like to run before each test. The
+tearDown function can contain anything you would like to run after each test.
+Both functions accept no arguments and return nothing. You may leave either or
+both of these blank if you have no need for them.
+
+If you're using Ceedling or the test runner generator script, you may leave these off
+completely. Not sure? Give it a try. If you compiler complains that it can't
+find setUp or tearDown when it links, you'll know you need to at least include
+an empty function for these.
+
+The majority of the file will be a series of test functions. Test functions
+follow the convention of starting with the word "test_" or "spec_". You don't HAVE
+to name them this way, but it makes it clear what functions are tests for other
+developers.  Also, the automated scripts that come with Unity or Ceedling will default
+to looking for test functions to be prefixed this way. Test functions take no arguments
+and return nothing. All test accounting is handled internally in Unity.
+
+Finally, at the bottom of your test file, you will write a `main()` function.
+This function will call `UNITY_BEGIN()`, then `RUN_TEST` for each test, and
+finally `UNITY_END()`.This is what will actually trigger each of those test
+functions to run, so it is important that each function gets its own `RUN_TEST`
+call.
+
+Remembering to add each test to the main function can get to be tedious. If you
+enjoy using helper scripts in your build process, you might consider making use
+of our handy [generate_test_runner.rb](../auto/generate_test_runner.rb) script.
+This will create the main function and all the calls for you, assuming that you
+have followed the suggested naming conventions. In this case, there is no need
+for you to include the main function in your test file at all.
+
+When you're done, your test file will look something like this:
+
+```C
+#include "unity.h"
+#include "file_to_test.h"
+
+void setUp(void) {
+    // set stuff up here
+}
+
+void tearDown(void) {
+    // clean stuff up here
+}
+
+void test_function_should_doBlahAndBlah(void) {
+    //test stuff
+}
+
+void test_function_should_doAlsoDoBlah(void) {
+    //more test stuff
+}
+
+// not needed when using generate_test_runner.rb
+int main(void) {
+    UNITY_BEGIN();
+    RUN_TEST(test_function_should_doBlahAndBlah);
+    RUN_TEST(test_function_should_doAlsoDoBlah);
+    return UNITY_END();
+}
+```
+
+It's possible that you will need more customization than this, eventually.
+For that sort of thing, you're going to want to look at the configuration guide.
+This should be enough to get you going, though.
+
+### Running Test Functions
+When writing your own `main()` functions, for a test-runner. There are two ways
+to execute the test.
+
+The classic variant
+``` c
+RUN_TEST(func, linenum)
+```
+or its simpler replacement that starts at the beginning of the function.
+``` c
+RUN_TEST(func)
+```
+These macros perform the necessary setup before the test is called and
+handles cleanup and result tabulation afterwards.
+
+### Ignoring Test Functions
+There are times when a test is incomplete or not valid for some reason.
+At these times, TEST_IGNORE can be called. Control will immediately be
+returned to the caller of the test, and no failures will be returned.
+This is useful when your test runners are automatically generated.
+
+``` c
+TEST_IGNORE()
+```
+
+Ignore this test and return immediately
+
+``` c
+TEST_IGNORE_MESSAGE (message)
+```
+
+Ignore this test and return immediately. Output a message stating why the test was ignored.
+
+### Aborting Tests
+There are times when a test will contain an infinite loop on error conditions, or there may be reason to escape from the test early without executing the rest of the test.  A pair of macros support this functionality in Unity.  The first `TEST_PROTECT` sets up the feature, and handles emergency abort cases. `TEST_ABORT` can then be used at any time within the tests to return to the last `TEST_PROTECT` call.
+
+    TEST_PROTECT()
+
+Setup and Catch macro
+
+    TEST_ABORT()
+
+Abort Test macro
+
+Example:
+
+    main()
+    {
+        if (TEST_PROTECT())
+        {
+            MyTest();
+        }
+    }
+
+If MyTest calls `TEST_ABORT`, program control will immediately return to `TEST_PROTECT` with a return value of zero.
+
+
+
+## How to Build and Run A Test File
+
+This is the single biggest challenge to picking up a new unit testing framework,
+at least in a language like C or C++. These languages are REALLY good at getting
+you "close to the metal" (why is the phrase metal? Wouldn't it be more accurate
+to say "close to the silicon"?). While this feature is usually a good thing, it
+can make testing more challenging.
+
+You have two really good options for toolchains. Depending on where you're
+coming from, it might surprise you that neither of these options is running the
+unit tests on your hardware.
+There are many reasons for this, but here's a short version:
+- On hardware, you have too many constraints (processing power, memory, etc),
+- On hardware, you don't have complete control over all registers,
+- On hardware, unit testing is more challenging,
+- Unit testing isn't System testing. Keep them separate.
+
+Instead of running your tests on your actual hardware, most developers choose to
+develop them as native applications (using gcc or MSVC for example) or as
+applications running on a simulator. Either is a good option. Native apps have
+the advantages of being faster and easier to set up. Simulator apps have the
+advantage of working with the same compiler as your target application. The
+options for configuring these are discussed in the configuration guide.
+
+To get either to work, you might need to make a few changes to the file
+containing your register set (discussed later).
+
+In either case, a test is built by linking unity, the test file, and the C
+file(s) being tested. These files create an executable which can be run as the
+test set for that module. Then, this process is repeated for the next test file.
+This flexibility of separating tests into individual executables allows us to
+much more thoroughly unit test our system and it keeps all the test code out of
+our final release!
+
+
+*Find The Latest of This And More at [ThrowTheSwitch.org](https://throwtheswitch.org)*
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/docs/UnityHelperScriptsGuide.md b/FreeRTOS-Plus/Test/CMock/vendor/unity/docs/UnityHelperScriptsGuide.md
new file mode 100644
index 000000000..46c9d74df
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/docs/UnityHelperScriptsGuide.md
@@ -0,0 +1,278 @@
+# Unity Helper Scripts
+
+## With a Little Help From Our Friends
+
+Sometimes what it takes to be a really efficient C programmer is a little non-C.
+The Unity project includes a couple of Ruby scripts for making your life just a tad
+easier. They are completely optional. If you choose to use them, you'll need a
+copy of Ruby, of course. Just install whatever the latest version is, and it is
+likely to work. You can find Ruby at [ruby-lang.org](https://ruby-labg.org/).
+
+
+### `generate_test_runner.rb`
+
+Are you tired of creating your own `main` function in your test file? Do you
+keep forgetting to add a `RUN_TEST` call when you add a new test case to your
+suite? Do you want to use CMock or other fancy add-ons but don't want to figure
+out how to create your own `RUN_TEST` macro?
+
+Well then we have the perfect script for you!
+
+The `generate_test_runner` script processes a given test file and automatically
+creates a separate test runner file that includes ?main?to execute the test
+cases within the scanned test file. All you do then is add the generated runner
+to your list of files to be compiled and linked, and presto you're done!
+
+This script searches your test file for void function signatures having a
+function name beginning with "test" or "spec". It treats each of these
+functions as a test case and builds up a test suite of them. For example, the
+following includes three test cases:
+
+```C
+void testVerifyThatUnityIsAwesomeAndWillMakeYourLifeEasier(void)
+{
+  ASSERT_TRUE(1);
+}
+void test_FunctionName_should_WorkProperlyAndReturn8(void) {
+  ASSERT_EQUAL_INT(8, FunctionName());
+}
+void spec_Function_should_DoWhatItIsSupposedToDo(void) {
+  ASSERT_NOT_NULL(Function(5));
+}
+```
+
+You can run this script a couple of ways. The first is from the command line:
+
+```Shell
+ruby generate_test_runner.rb TestFile.c NameOfRunner.c
+```
+
+Alternatively, if you include only the test file parameter, the script will copy
+the name of the test file and automatically append `_Runner` to the name of the
+generated file. The example immediately below will create TestFile_Runner.c.
+
+```Shell
+ruby generate_test_runner.rb TestFile.c
+```
+
+You can also add a [YAML](http://www.yaml.org/) file to configure extra options.
+Conveniently, this YAML file is of the same format as that used by Unity and
+CMock. So if you are using YAML files already, you can simply pass the very same
+file into the generator script.
+
+```Shell
+ruby generate_test_runner.rb TestFile.c my_config.yml
+```
+
+The contents of the YAML file `my_config.yml` could look something like the
+example below. If you're wondering what some of these options do, you're going
+to love the next section of this document.
+
+```YAML
+:unity:
+  :includes:
+    - stdio.h
+    - microdefs.h
+  :cexception: 1
+  :suit_setup: "blah = malloc(1024);"
+  :suite_teardown: "free(blah);"
+```
+
+If you would like to force your generated test runner to include one or more
+header files, you can just include those at the command line too. Just make sure
+these are _after_ the YAML file, if you are using one:
+
+```Shell
+ruby generate_test_runner.rb TestFile.c my_config.yml extras.h
+```
+
+Another option, particularly if you are already using Ruby to orchestrate your
+builds - or more likely the Ruby-based build tool Rake - is requiring this
+script directly. Anything that you would have specified in a YAML file can be
+passed to the script as part of a hash. Let's push the exact same requirement
+set as we did above but this time through Ruby code directly:
+
+```Ruby
+require "generate_test_runner.rb"
+options = {
+  :includes => ["stdio.h", "microdefs.h"],
+  :cexception => 1,
+  :suite_setup => "blah = malloc(1024);",
+  :suite_teardown => "free(blah);"
+}
+UnityTestRunnerGenerator.new.run(testfile, runner_name, options)
+```
+
+If you have multiple files to generate in a build script (such as a Rakefile),
+you might want to instantiate a generator object with your options and call it
+to generate each runner afterwards. Like thus:
+
+```Ruby
+gen = UnityTestRunnerGenerator.new(options)
+test_files.each do |f|
+  gen.run(f, File.basename(f,'.c')+"Runner.c"
+end
+```
+
+#### Options accepted by generate_test_runner.rb:
+
+The following options are available when executing `generate_test_runner`. You
+may pass these as a Ruby hash directly or specify them in a YAML file, both of
+which are described above. In the `examples` directory, Example 3's Rakefile
+demonstrates using a Ruby hash.
+
+
+##### `:includes`
+
+This option specifies an array of file names to be `#include`'d at the top of
+your runner C file. You might use it to reference custom types or anything else
+universally needed in your generated runners.
+
+
+##### `:suite_setup`
+
+Define this option with C code to be executed _before any_ test cases are run.
+
+Alternatively, if your C compiler supports weak symbols, you can leave this
+option unset and instead provide a `void suiteSetUp(void)` function in your test
+suite.  The linker will look for this symbol and fall back to a Unity-provided
+stub if it is not found.
+
+
+##### `:suite_teardown`
+
+Define this option with C code to be executed _after all_ test cases have
+finished.  An integer variable `num_failures` is available for diagnostics.
+The code should end with a `return` statement; the value returned will become
+the exit code of `main`.  You can normally just return `num_failures`.
+
+Alternatively, if your C compiler supports weak symbols, you can leave this
+option unset and instead provide a `int suiteTearDown(int num_failures)`
+function in your test suite.  The linker will look for this symbol and fall
+back to a Unity-provided stub if it is not found.
+
+
+##### `:enforce_strict_ordering`
+
+This option should be defined if you have the strict order feature enabled in
+CMock (see CMock documentation). This generates extra variables required for
+everything to run smoothly. If you provide the same YAML to the generator as
+used in CMock's configuration, you've already configured the generator properly.
+
+
+##### `:externc`
+
+This option should be defined if you are mixing C and CPP and want your test
+runners to automatically include extern "C" support when they are generated.
+
+##### `:mock_prefix` and `:mock_suffix`
+
+Unity automatically generates calls to Init, Verify and Destroy for every file
+included in the main test file that starts with the given mock prefix and ends
+with the given mock suffix, file extension not included. By default, Unity
+assumes a `Mock` prefix and no suffix.
+
+##### `:plugins`
+
+This option specifies an array of plugins to be used (of course, the array can
+contain only a single plugin). This is your opportunity to enable support for
+CException support, which will add a check for unhandled exceptions in each
+test, reporting a failure if one is detected. To enable this feature using Ruby:
+
+```Ruby
+:plugins => [ :cexception ]
+```
+
+Or as a yaml file:
+
+```YAML
+:plugins:
+  -:cexception
+```
+
+If you are using CMock, it is very likely that you are already passing an array
+of plugins to CMock. You can just use the same array here. This script will just
+ignore the plugins that don't require additional support.
+
+##### `:include_extensions`
+
+This option specifies the pattern for matching acceptable header file extensions.
+By default it will accept hpp, hh, H, and h files. If you need a different combination
+of files to search, update this from the default `'(?:hpp|hh|H|h)'`.
+
+##### `:source_extensions`
+
+This option specifies the pattern for matching acceptable source file extensions.
+By default it will accept cpp, cc, C, c, and ino files. If you need a different combination
+of files to search, update this from the default `'(?:cpp|cc|ino|C|c)'`.
+
+
+### `unity_test_summary.rb`
+
+A Unity test file contains one or more test case functions. Each test case can
+pass, fail, or be ignored. Each test file is run individually producing results
+for its collection of test cases. A given project will almost certainly be
+composed of multiple test files. Therefore, the suite of tests is comprised of
+one or more test cases spread across one or more test files. This script
+aggregates individual test file results to generate a summary of all executed
+test cases. The output includes how many tests were run, how many were ignored,
+and how many failed. In addition, the output includes a listing of which
+specific tests were ignored and failed. A good example of the breadth and
+details of these results can be found in the `examples` directory. Intentionally
+ignored and failing tests in this project generate corresponding entries in the
+summary report.
+
+If you're interested in other (prettier?) output formats, check into the
+Ceedling build tool project (ceedling.sourceforge.net) that works with Unity and
+CMock and supports xunit-style xml as well as other goodies.
+
+This script assumes the existence of files ending with the extensions
+`.testpass` and `.testfail`.The contents of these files includes the test
+results summary corresponding to each test file executed with the extension set
+according to the presence or absence of failures for that test file. The script
+searches a specified path for these files, opens each one it finds, parses the
+results, and aggregates and prints a summary. Calling it from the command line
+looks like this:
+
+```Shell
+ruby unity_test_summary.rb build/test/
+```
+
+You can optionally specify a root path as well. This is really helpful when you
+are using relative paths in your tools' setup, but you want to pull the summary
+into an IDE like Eclipse for clickable shortcuts.
+
+```Shell
+ruby unity_test_summary.rb build/test/ ~/projects/myproject/
+```
+
+Or, if you're more of a Windows sort of person:
+
+```Shell
+ruby unity_test_summary.rb build\teat\ C:\projects\myproject\
+```
+
+When configured correctly, you'll see a final summary, like so:
+
+```Shell
+--------------------------
+UNITY IGNORED TEST SUMMARY
+--------------------------
+blah.c:22:test_sandwiches_should_HaveBreadOnTwoSides:IGNORE
+
+-------------------------
+UNITY FAILED TEST SUMMARY
+-------------------------
+blah.c:87:test_sandwiches_should_HaveCondiments:FAIL:Expected 1 was 0
+meh.c:38:test_soda_should_BeCalledPop:FAIL:Expected "pop" was "coke"
+
+--------------------------
+OVERALL UNITY TEST SUMMARY
+--------------------------
+45 TOTAL TESTS 2 TOTAL FAILURES 1 IGNORED
+```
+
+How convenient is that?
+
+
+*Find The Latest of This And More at [ThrowTheSwitch.org](https://throwtheswitch.org)*
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/makefile b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/makefile
new file mode 100644
index 000000000..28409c104
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/makefile
@@ -0,0 +1,72 @@
+# ==========================================
+#   Unity Project - A Test Framework for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+#We try to detect the OS we are running on, and adjust commands as needed
+ifeq ($(OS),Windows_NT)
+  ifeq ($(shell uname -s),) # not in a bash-like shell
+	CLEANUP = del /F /Q
+	MKDIR = mkdir
+  else # in a bash-like shell, like msys
+	CLEANUP = rm -f
+	MKDIR = mkdir -p
+  endif
+	TARGET_EXTENSION=.exe
+else
+	CLEANUP = rm -f
+	MKDIR = mkdir -p
+	TARGET_EXTENSION=.out
+endif
+
+C_COMPILER=gcc
+ifeq ($(shell uname -s), Darwin)
+C_COMPILER=clang
+endif
+
+UNITY_ROOT=../..
+
+CFLAGS=-std=c89
+CFLAGS += -Wall
+CFLAGS += -Wextra
+CFLAGS += -Wpointer-arith
+CFLAGS += -Wcast-align
+CFLAGS += -Wwrite-strings
+CFLAGS += -Wswitch-default
+CFLAGS += -Wunreachable-code
+CFLAGS += -Winit-self
+CFLAGS += -Wmissing-field-initializers
+CFLAGS += -Wno-unknown-pragmas
+CFLAGS += -Wstrict-prototypes
+CFLAGS += -Wundef
+CFLAGS += -Wold-style-definition
+#CFLAGS += -Wno-misleading-indentation
+
+TARGET_BASE1=test1
+TARGET_BASE2=test2
+TARGET1 = $(TARGET_BASE1)$(TARGET_EXTENSION)
+TARGET2 = $(TARGET_BASE2)$(TARGET_EXTENSION)
+SRC_FILES1=$(UNITY_ROOT)/src/unity.c src/ProductionCode.c  test/TestProductionCode.c  test/test_runners/TestProductionCode_Runner.c
+SRC_FILES2=$(UNITY_ROOT)/src/unity.c src/ProductionCode2.c test/TestProductionCode2.c test/test_runners/TestProductionCode2_Runner.c
+INC_DIRS=-Isrc -I$(UNITY_ROOT)/src
+SYMBOLS=
+
+all: clean default
+
+default: $(SRC_FILES1) $(SRC_FILES2)
+	$(C_COMPILER) $(CFLAGS) $(INC_DIRS) $(SYMBOLS) $(SRC_FILES1) -o $(TARGET1)
+	$(C_COMPILER) $(CFLAGS) $(INC_DIRS) $(SYMBOLS) $(SRC_FILES2) -o $(TARGET2)
+	- ./$(TARGET1)
+	- ./$(TARGET2)
+
+test/test_runners/TestProductionCode_Runner.c: test/TestProductionCode.c
+	ruby $(UNITY_ROOT)/auto/generate_test_runner.rb test/TestProductionCode.c  test/test_runners/TestProductionCode_Runner.c
+test/test_runners/TestProductionCode2_Runner.c: test/TestProductionCode2.c
+	ruby $(UNITY_ROOT)/auto/generate_test_runner.rb test/TestProductionCode2.c test/test_runners/TestProductionCode2_Runner.c
+
+clean:
+	$(CLEANUP) $(TARGET1) $(TARGET2)
+
+ci: CFLAGS += -Werror
+ci: default
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/readme.txt b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/readme.txt
new file mode 100644
index 000000000..dfed81502
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/readme.txt
@@ -0,0 +1,5 @@
+Example 1
+=========
+
+Close to the simplest possible example of Unity, using only basic features.
+Run make to build & run the example tests.
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/src/ProductionCode.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/src/ProductionCode.c
new file mode 100644
index 000000000..db128e5bd
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/src/ProductionCode.c
@@ -0,0 +1,24 @@
+
+#include "ProductionCode.h"
+
+int Counter = 0;
+int NumbersToFind[9] = { 0, 34, 55, 66, 32, 11, 1, 77, 888 }; /* some obnoxious array to search that is 1-based indexing instead of 0. */
+
+/* This function is supposed to search through NumbersToFind and find a particular number.
+ * If it finds it, the index is returned.  Otherwise 0 is returned which sorta makes sense since
+ * NumbersToFind is indexed from 1.  Unfortunately it's broken
+ * (and should therefore be caught by our tests) */
+int FindFunction_WhichIsBroken(int NumberToFind)
+{
+    int i = 0;
+    while (i < 8) /* Notice I should have been in braces */
+        i++;
+        if (NumbersToFind[i] == NumberToFind) /* Yikes!  I'm getting run after the loop finishes instead of during it! */
+            return i;
+    return 0;
+}
+
+int FunctionWhichReturnsLocalVariable(void)
+{
+    return Counter;
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/src/ProductionCode.h b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/src/ProductionCode.h
new file mode 100644
index 000000000..250ca0dc6
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/src/ProductionCode.h
@@ -0,0 +1,3 @@
+
+int FindFunction_WhichIsBroken(int NumberToFind);
+int FunctionWhichReturnsLocalVariable(void);
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/src/ProductionCode2.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/src/ProductionCode2.c
new file mode 100644
index 000000000..98ee7eebc
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/src/ProductionCode2.c
@@ -0,0 +1,11 @@
+
+#include "ProductionCode2.h"
+
+char* ThisFunctionHasNotBeenTested(int Poor, char* LittleFunction)
+{
+  (void)Poor;
+  (void)LittleFunction;
+  /* Since There Are No Tests Yet, This Function Could Be Empty For All We Know.
+   * Which isn't terribly useful... but at least we put in a TEST_IGNORE so we won't forget */
+  return (char*)0;
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/src/ProductionCode2.h b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/src/ProductionCode2.h
new file mode 100644
index 000000000..34ae980d1
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/src/ProductionCode2.h
@@ -0,0 +1,2 @@
+
+char* ThisFunctionHasNotBeenTested(int Poor, char* LittleFunction);
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/test/TestProductionCode.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/test/TestProductionCode.c
new file mode 100644
index 000000000..404c37184
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/test/TestProductionCode.c
@@ -0,0 +1,62 @@
+
+#include "ProductionCode.h"
+#include "unity.h"
+
+/* sometimes you may want to get at local data in a module.
+ * for example: If you plan to pass by reference, this could be useful
+ * however, it should often be avoided */
+extern int Counter;
+
+void setUp(void)
+{
+  /* This is run before EACH TEST */
+  Counter = 0x5a5a;
+}
+
+void tearDown(void)
+{
+}
+
+void test_FindFunction_WhichIsBroken_ShouldReturnZeroIfItemIsNotInList_WhichWorksEvenInOurBrokenCode(void)
+{
+  /* All of these should pass */
+  TEST_ASSERT_EQUAL(0, FindFunction_WhichIsBroken(78));
+  TEST_ASSERT_EQUAL(0, FindFunction_WhichIsBroken(2));
+  TEST_ASSERT_EQUAL(0, FindFunction_WhichIsBroken(33));
+  TEST_ASSERT_EQUAL(0, FindFunction_WhichIsBroken(999));
+  TEST_ASSERT_EQUAL(0, FindFunction_WhichIsBroken(-1));
+}
+
+void test_FindFunction_WhichIsBroken_ShouldReturnTheIndexForItemsInList_WhichWillFailBecauseOurFunctionUnderTestIsBroken(void)
+{
+  /* You should see this line fail in your test summary */
+  TEST_ASSERT_EQUAL(1, FindFunction_WhichIsBroken(34));
+
+  /* Notice the rest of these didn't get a chance to run because the line above failed.
+   * Unit tests abort each test function on the first sign of trouble.
+   * Then NEXT test function runs as normal. */
+  TEST_ASSERT_EQUAL(8, FindFunction_WhichIsBroken(8888));
+}
+
+void test_FunctionWhichReturnsLocalVariable_ShouldReturnTheCurrentCounterValue(void)
+{
+    /* This should be true because setUp set this up for us before this test */
+    TEST_ASSERT_EQUAL_HEX(0x5a5a, FunctionWhichReturnsLocalVariable());
+
+    /* This should be true because we can still change our answer */
+    Counter = 0x1234;
+    TEST_ASSERT_EQUAL_HEX(0x1234, FunctionWhichReturnsLocalVariable());
+}
+
+void test_FunctionWhichReturnsLocalVariable_ShouldReturnTheCurrentCounterValueAgain(void)
+{
+    /* This should be true again because setup was rerun before this test (and after we changed it to 0x1234) */
+    TEST_ASSERT_EQUAL_HEX(0x5a5a, FunctionWhichReturnsLocalVariable());
+}
+
+void test_FunctionWhichReturnsLocalVariable_ShouldReturnCurrentCounter_ButFailsBecauseThisTestIsActuallyFlawed(void)
+{
+    /* Sometimes you get the test wrong.  When that happens, you get a failure too... and a quick look should tell
+     * you what actually happened...which in this case was a failure to setup the initial condition. */
+    TEST_ASSERT_EQUAL_HEX(0x1234, FunctionWhichReturnsLocalVariable());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/test/TestProductionCode2.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/test/TestProductionCode2.c
new file mode 100644
index 000000000..7d940c171
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/test/TestProductionCode2.c
@@ -0,0 +1,31 @@
+
+#include "ProductionCode2.h"
+#include "unity.h"
+
+/* These should be ignored because they are commented out in various ways:
+#include "whatever.h" 
+#include "somethingelse.h"
+*/
+
+void setUp(void)
+{
+}
+
+void tearDown(void)
+{
+}
+
+void test_IgnoredTest(void)
+{
+    TEST_IGNORE_MESSAGE("This Test Was Ignored On Purpose");
+}
+
+void test_AnotherIgnoredTest(void)
+{
+    TEST_IGNORE_MESSAGE("These Can Be Useful For Leaving Yourself Notes On What You Need To Do Yet");
+}
+
+void test_ThisFunctionHasNotBeenTested_NeedsToBeImplemented(void)
+{
+    TEST_IGNORE(); /* Like This */
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/test/test_runners/TestProductionCode2_Runner.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/test/test_runners/TestProductionCode2_Runner.c
new file mode 100644
index 000000000..cf72c219d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/test/test_runners/TestProductionCode2_Runner.c
@@ -0,0 +1,53 @@
+/* AUTOGENERATED FILE. DO NOT EDIT. */
+
+/*=======Test Runner Used To Run Each Test Below=====*/
+#define RUN_TEST(TestFunc, TestLineNum) \
+{ \
+  Unity.CurrentTestName = #TestFunc; \
+  Unity.CurrentTestLineNumber = TestLineNum; \
+  Unity.NumberOfTests++; \
+  if (TEST_PROTECT()) \
+  { \
+      setUp(); \
+      TestFunc(); \
+  } \
+  if (TEST_PROTECT()) \
+  { \
+    tearDown(); \
+  } \
+  UnityConcludeTest(); \
+}
+
+/*=======Automagically Detected Files To Include=====*/
+#include "unity.h"
+#include <setjmp.h>
+#include <stdio.h>
+#include "ProductionCode2.h"
+
+/*=======External Functions This Runner Calls=====*/
+extern void setUp(void);
+extern void tearDown(void);
+extern void test_IgnoredTest(void);
+extern void test_AnotherIgnoredTest(void);
+extern void test_ThisFunctionHasNotBeenTested_NeedsToBeImplemented(void);
+
+
+/*=======Test Reset Option=====*/
+void resetTest(void);
+void resetTest(void)
+{
+  tearDown();
+  setUp();
+}
+
+
+/*=======MAIN=====*/
+int main(void)
+{
+  UnityBegin("test/TestProductionCode2.c");
+  RUN_TEST(test_IgnoredTest, 18);
+  RUN_TEST(test_AnotherIgnoredTest, 23);
+  RUN_TEST(test_ThisFunctionHasNotBeenTested_NeedsToBeImplemented, 28);
+
+  return (UnityEnd());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/test/test_runners/TestProductionCode_Runner.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/test/test_runners/TestProductionCode_Runner.c
new file mode 100644
index 000000000..3b49af748
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_1/test/test_runners/TestProductionCode_Runner.c
@@ -0,0 +1,57 @@
+/* AUTOGENERATED FILE. DO NOT EDIT. */
+
+/*=======Test Runner Used To Run Each Test Below=====*/
+#define RUN_TEST(TestFunc, TestLineNum) \
+{ \
+  Unity.CurrentTestName = #TestFunc; \
+  Unity.CurrentTestLineNumber = TestLineNum; \
+  Unity.NumberOfTests++; \
+  if (TEST_PROTECT()) \
+  { \
+      setUp(); \
+      TestFunc(); \
+  } \
+  if (TEST_PROTECT()) \
+  { \
+    tearDown(); \
+  } \
+  UnityConcludeTest(); \
+}
+
+/*=======Automagically Detected Files To Include=====*/
+#include "unity.h"
+#include <setjmp.h>
+#include <stdio.h>
+#include "ProductionCode.h"
+
+/*=======External Functions This Runner Calls=====*/
+extern void setUp(void);
+extern void tearDown(void);
+extern void test_FindFunction_WhichIsBroken_ShouldReturnZeroIfItemIsNotInList_WhichWorksEvenInOurBrokenCode(void);
+extern void test_FindFunction_WhichIsBroken_ShouldReturnTheIndexForItemsInList_WhichWillFailBecauseOurFunctionUnderTestIsBroken(void);
+extern void test_FunctionWhichReturnsLocalVariable_ShouldReturnTheCurrentCounterValue(void);
+extern void test_FunctionWhichReturnsLocalVariable_ShouldReturnTheCurrentCounterValueAgain(void);
+extern void test_FunctionWhichReturnsLocalVariable_ShouldReturnCurrentCounter_ButFailsBecauseThisTestIsActuallyFlawed(void);
+
+
+/*=======Test Reset Option=====*/
+void resetTest(void);
+void resetTest(void)
+{
+  tearDown();
+  setUp();
+}
+
+
+/*=======MAIN=====*/
+int main(void)
+{
+  UnityBegin("test/TestProductionCode.c");
+  RUN_TEST(test_FindFunction_WhichIsBroken_ShouldReturnZeroIfItemIsNotInList_WhichWorksEvenInOurBrokenCode, 20);
+  RUN_TEST(test_FindFunction_WhichIsBroken_ShouldReturnTheIndexForItemsInList_WhichWillFailBecauseOurFunctionUnderTestIsBroken, 30);
+  RUN_TEST(test_FunctionWhichReturnsLocalVariable_ShouldReturnTheCurrentCounterValue, 41);
+  RUN_TEST(test_FunctionWhichReturnsLocalVariable_ShouldReturnTheCurrentCounterValueAgain, 51);
+  RUN_TEST(test_FunctionWhichReturnsLocalVariable_ShouldReturnCurrentCounter_ButFailsBecauseThisTestIsActuallyFlawed, 57);
+
+  return (UnityEnd());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/makefile b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/makefile
new file mode 100644
index 000000000..e2832173b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/makefile
@@ -0,0 +1,71 @@
+# ==========================================
+#   Unity Project - A Test Framework for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+#We try to detect the OS we are running on, and adjust commands as needed
+ifeq ($(OS),Windows_NT)
+  ifeq ($(shell uname -s),) # not in a bash-like shell
+	CLEANUP = del /F /Q
+	MKDIR = mkdir
+  else # in a bash-like shell, like msys
+	CLEANUP = rm -f
+	MKDIR = mkdir -p
+  endif
+	TARGET_EXTENSION=.exe
+else
+	CLEANUP = rm -f
+	MKDIR = mkdir -p
+	TARGET_EXTENSION=.out
+endif
+
+C_COMPILER=gcc
+ifeq ($(shell uname -s), Darwin)
+C_COMPILER=clang
+endif
+
+UNITY_ROOT=../..
+
+CFLAGS=-std=c99
+CFLAGS += -Wall
+CFLAGS += -Wextra
+CFLAGS += -Wpointer-arith
+CFLAGS += -Wcast-align
+CFLAGS += -Wwrite-strings
+CFLAGS += -Wswitch-default
+CFLAGS += -Wunreachable-code
+CFLAGS += -Winit-self
+CFLAGS += -Wmissing-field-initializers
+CFLAGS += -Wno-unknown-pragmas
+CFLAGS += -Wstrict-prototypes
+CFLAGS += -Wundef
+CFLAGS += -Wold-style-definition
+#CFLAGS += -Wno-misleading-indentation
+
+TARGET_BASE1=all_tests
+TARGET1 = $(TARGET_BASE1)$(TARGET_EXTENSION)
+SRC_FILES1=\
+  $(UNITY_ROOT)/src/unity.c \
+  $(UNITY_ROOT)/extras/fixture/src/unity_fixture.c \
+  src/ProductionCode.c \
+  src/ProductionCode2.c \
+  test/TestProductionCode.c \
+  test/TestProductionCode2.c \
+  test/test_runners/TestProductionCode_Runner.c \
+  test/test_runners/TestProductionCode2_Runner.c \
+  test/test_runners/all_tests.c
+INC_DIRS=-Isrc -I$(UNITY_ROOT)/src -I$(UNITY_ROOT)/extras/fixture/src
+SYMBOLS=-DUNITY_FIXTURE_NO_EXTRAS
+
+all: clean default
+
+default:
+	$(C_COMPILER) $(CFLAGS) $(INC_DIRS) $(SYMBOLS) $(SRC_FILES1) -o $(TARGET1)
+	- ./$(TARGET1) -v
+
+clean:
+	$(CLEANUP) $(TARGET1)
+
+ci: CFLAGS += -Werror
+ci: default
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/readme.txt b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/readme.txt
new file mode 100644
index 000000000..f0fce657c
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/readme.txt
@@ -0,0 +1,5 @@
+Example 2
+=========
+
+Same as the first example, but now using Unity's test fixture to group tests
+together. Using the test fixture also makes writing test runners much easier.
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/src/ProductionCode.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/src/ProductionCode.c
new file mode 100644
index 000000000..3bafe2056
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/src/ProductionCode.c
@@ -0,0 +1,24 @@
+
+#include "ProductionCode.h"
+
+int Counter = 0;
+int NumbersToFind[9] = { 0, 34, 55, 66, 32, 11, 1, 77, 888 }; //some obnoxious array to search that is 1-based indexing instead of 0.
+
+// This function is supposed to search through NumbersToFind and find a particular number.  
+// If it finds it, the index is returned.  Otherwise 0 is returned which sorta makes sense since 
+// NumbersToFind is indexed from 1.  Unfortunately it's broken 
+// (and should therefore be caught by our tests)
+int FindFunction_WhichIsBroken(int NumberToFind)
+{
+    int i = 0;
+    while (i < 8) //Notice I should have been in braces
+        i++;
+        if (NumbersToFind[i] == NumberToFind) //Yikes!  I'm getting run after the loop finishes instead of during it!
+            return i;
+    return 0;
+}
+
+int FunctionWhichReturnsLocalVariable(void)
+{
+    return Counter;
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/src/ProductionCode.h b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/src/ProductionCode.h
new file mode 100644
index 000000000..250ca0dc6
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/src/ProductionCode.h
@@ -0,0 +1,3 @@
+
+int FindFunction_WhichIsBroken(int NumberToFind);
+int FunctionWhichReturnsLocalVariable(void);
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/src/ProductionCode2.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/src/ProductionCode2.c
new file mode 100644
index 000000000..77c969f17
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/src/ProductionCode2.c
@@ -0,0 +1,11 @@
+
+#include "ProductionCode2.h"
+
+char* ThisFunctionHasNotBeenTested(int Poor, char* LittleFunction)
+{
+  (void)Poor;
+  (void)LittleFunction;
+  //Since There Are No Tests Yet, This Function Could Be Empty For All We Know.
+  // Which isn't terribly useful... but at least we put in a TEST_IGNORE so we won't forget
+  return (char*)0;
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/src/ProductionCode2.h b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/src/ProductionCode2.h
new file mode 100644
index 000000000..34ae980d1
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/src/ProductionCode2.h
@@ -0,0 +1,2 @@
+
+char* ThisFunctionHasNotBeenTested(int Poor, char* LittleFunction);
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/test/TestProductionCode.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/test/TestProductionCode.c
new file mode 100644
index 000000000..b8fb95c08
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/test/TestProductionCode.c
@@ -0,0 +1,64 @@
+#include "ProductionCode.h"
+#include "unity.h"
+#include "unity_fixture.h"
+
+TEST_GROUP(ProductionCode);
+
+//sometimes you may want to get at local data in a module.
+//for example: If you plan to pass by reference, this could be useful
+//however, it should often be avoided
+extern int Counter;
+
+TEST_SETUP(ProductionCode)
+{
+  //This is run before EACH TEST
+  Counter = 0x5a5a;
+}
+
+TEST_TEAR_DOWN(ProductionCode)
+{
+}
+
+TEST(ProductionCode, FindFunction_WhichIsBroken_ShouldReturnZeroIfItemIsNotInList_WhichWorksEvenInOurBrokenCode)
+{
+  //All of these should pass
+  TEST_ASSERT_EQUAL(0, FindFunction_WhichIsBroken(78));
+  TEST_ASSERT_EQUAL(0, FindFunction_WhichIsBroken(2));
+  TEST_ASSERT_EQUAL(0, FindFunction_WhichIsBroken(33));
+  TEST_ASSERT_EQUAL(0, FindFunction_WhichIsBroken(999));
+  TEST_ASSERT_EQUAL(0, FindFunction_WhichIsBroken(-1));
+}
+
+TEST(ProductionCode, FindFunction_WhichIsBroken_ShouldReturnTheIndexForItemsInList_WhichWillFailBecauseOurFunctionUnderTestIsBroken)
+{
+  // You should see this line fail in your test summary
+  TEST_ASSERT_EQUAL(1, FindFunction_WhichIsBroken(34));
+
+  // Notice the rest of these didn't get a chance to run because the line above failed.
+  // Unit tests abort each test function on the first sign of trouble.
+  // Then NEXT test function runs as normal.
+  TEST_ASSERT_EQUAL(8, FindFunction_WhichIsBroken(8888));
+}
+
+TEST(ProductionCode, FunctionWhichReturnsLocalVariable_ShouldReturnTheCurrentCounterValue)
+{
+    //This should be true because setUp set this up for us before this test
+    TEST_ASSERT_EQUAL_HEX(0x5a5a, FunctionWhichReturnsLocalVariable());
+
+    //This should be true because we can still change our answer
+    Counter = 0x1234;
+    TEST_ASSERT_EQUAL_HEX(0x1234, FunctionWhichReturnsLocalVariable());
+}
+
+TEST(ProductionCode, FunctionWhichReturnsLocalVariable_ShouldReturnTheCurrentCounterValueAgain)
+{
+    //This should be true again because setup was rerun before this test (and after we changed it to 0x1234)
+    TEST_ASSERT_EQUAL_HEX(0x5a5a, FunctionWhichReturnsLocalVariable());
+}
+
+TEST(ProductionCode, FunctionWhichReturnsLocalVariable_ShouldReturnCurrentCounter_ButFailsBecauseThisTestIsActuallyFlawed)
+{
+    //Sometimes you get the test wrong.  When that happens, you get a failure too... and a quick look should tell
+    // you what actually happened...which in this case was a failure to setup the initial condition.
+    TEST_ASSERT_EQUAL_HEX(0x1234, FunctionWhichReturnsLocalVariable());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/test/TestProductionCode2.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/test/TestProductionCode2.c
new file mode 100644
index 000000000..d9f4efe31
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/test/TestProductionCode2.c
@@ -0,0 +1,33 @@
+#include "ProductionCode2.h"
+#include "unity.h"
+#include "unity_fixture.h"
+
+TEST_GROUP(ProductionCode2);
+
+/* These should be ignored because they are commented out in various ways:
+#include "whatever.h"
+*/
+//#include "somethingelse.h"
+
+TEST_SETUP(ProductionCode2)
+{
+}
+
+TEST_TEAR_DOWN(ProductionCode2)
+{
+}
+
+TEST(ProductionCode2, IgnoredTest)
+{
+    TEST_IGNORE_MESSAGE("This Test Was Ignored On Purpose");
+}
+
+TEST(ProductionCode2, AnotherIgnoredTest)
+{
+    TEST_IGNORE_MESSAGE("These Can Be Useful For Leaving Yourself Notes On What You Need To Do Yet");
+}
+
+TEST(ProductionCode2, ThisFunctionHasNotBeenTested_NeedsToBeImplemented)
+{
+    TEST_IGNORE(); //Like This
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/test/test_runners/TestProductionCode2_Runner.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/test/test_runners/TestProductionCode2_Runner.c
new file mode 100644
index 000000000..6fcc3b120
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/test/test_runners/TestProductionCode2_Runner.c
@@ -0,0 +1,9 @@
+#include "unity.h"
+#include "unity_fixture.h"
+
+TEST_GROUP_RUNNER(ProductionCode2)
+{
+  RUN_TEST_CASE(ProductionCode2, IgnoredTest);
+  RUN_TEST_CASE(ProductionCode2, AnotherIgnoredTest);
+  RUN_TEST_CASE(ProductionCode2, ThisFunctionHasNotBeenTested_NeedsToBeImplemented);
+}
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/test/test_runners/TestProductionCode_Runner.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/test/test_runners/TestProductionCode_Runner.c
new file mode 100644
index 000000000..41a416a6e
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/test/test_runners/TestProductionCode_Runner.c
@@ -0,0 +1,11 @@
+#include "unity.h"
+#include "unity_fixture.h"
+
+TEST_GROUP_RUNNER(ProductionCode)
+{
+  RUN_TEST_CASE(ProductionCode, FindFunction_WhichIsBroken_ShouldReturnZeroIfItemIsNotInList_WhichWorksEvenInOurBrokenCode);
+  RUN_TEST_CASE(ProductionCode, FindFunction_WhichIsBroken_ShouldReturnTheIndexForItemsInList_WhichWillFailBecauseOurFunctionUnderTestIsBroken);
+  RUN_TEST_CASE(ProductionCode, FunctionWhichReturnsLocalVariable_ShouldReturnTheCurrentCounterValue);
+  RUN_TEST_CASE(ProductionCode, FunctionWhichReturnsLocalVariable_ShouldReturnTheCurrentCounterValueAgain);
+  RUN_TEST_CASE(ProductionCode, FunctionWhichReturnsLocalVariable_ShouldReturnCurrentCounter_ButFailsBecauseThisTestIsActuallyFlawed);
+}
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/test/test_runners/all_tests.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/test/test_runners/all_tests.c
new file mode 100644
index 000000000..e706ece7d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_2/test/test_runners/all_tests.c
@@ -0,0 +1,12 @@
+#include "unity_fixture.h"
+
+static void RunAllTests(void)
+{
+  RUN_TEST_GROUP(ProductionCode);
+  RUN_TEST_GROUP(ProductionCode2);
+}
+
+int main(int argc, const char * argv[])
+{
+  return UnityMain(argc, argv, RunAllTests);
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/helper/UnityHelper.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/helper/UnityHelper.c
new file mode 100644
index 000000000..9cf42c678
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/helper/UnityHelper.c
@@ -0,0 +1,10 @@
+#include "unity.h"
+#include "UnityHelper.h"
+#include <stdio.h>
+#include <string.h>
+
+void AssertEqualExampleStruct(const EXAMPLE_STRUCT_T expected, const EXAMPLE_STRUCT_T actual, const unsigned short line)
+{
+    UNITY_TEST_ASSERT_EQUAL_INT(expected.x, actual.x, line, "Example Struct Failed For Field x");
+    UNITY_TEST_ASSERT_EQUAL_INT(expected.y, actual.y, line, "Example Struct Failed For Field y");
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/helper/UnityHelper.h b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/helper/UnityHelper.h
new file mode 100644
index 000000000..151611158
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/helper/UnityHelper.h
@@ -0,0 +1,12 @@
+#ifndef _TESTHELPER_H
+#define _TESTHELPER_H
+
+#include "Types.h"
+
+void AssertEqualExampleStruct(const EXAMPLE_STRUCT_T expected, const EXAMPLE_STRUCT_T actual, const unsigned short line);
+
+#define UNITY_TEST_ASSERT_EQUAL_EXAMPLE_STRUCT_T(expected, actual, line, message) AssertEqualExampleStruct(expected, actual, line);
+
+#define TEST_ASSERT_EQUAL_EXAMPLE_STRUCT_T(expected, actual) UNITY_TEST_ASSERT_EQUAL_EXAMPLE_STRUCT_T(expected, actual, __LINE__, NULL);
+
+#endif // _TESTHELPER_H
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/rakefile.rb b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/rakefile.rb
new file mode 100644
index 000000000..c095af38e
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/rakefile.rb
@@ -0,0 +1,38 @@
+require 'rake'
+require 'rake/clean'
+require_relative 'rakefile_helper'
+
+TEMP_DIRS = [
+  File.join(__dir__, 'build')
+].freeze
+
+TEMP_DIRS.each do |dir|
+  directory(dir)
+  CLOBBER.include(dir)
+end
+
+task prepare_for_tests: TEMP_DIRS
+
+# Load default configuration, for now
+DEFAULT_CONFIG_FILE = 'target_gcc_32.yml'.freeze
+configure_toolchain(DEFAULT_CONFIG_FILE)
+
+task unit: [:prepare_for_tests] do
+  run_tests unit_test_files
+end
+
+desc 'Generate test summary'
+task :summary do
+  report_summary
+end
+
+desc 'Build and test Unity'
+task all: %i[clean unit summary]
+task default: %i[clobber all]
+task ci: [:default]
+task cruise: [:default]
+
+desc 'Load configuration'
+task :config, :config_file do |_t, args|
+  configure_toolchain(args[:config_file])
+end
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/rakefile_helper.rb b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/rakefile_helper.rb
new file mode 100644
index 000000000..64d20c95f
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/rakefile_helper.rb
@@ -0,0 +1,250 @@
+require 'yaml'
+require 'fileutils'
+require_relative '../../auto/unity_test_summary'
+require_relative '../../auto/generate_test_runner'
+require_relative '../../auto/colour_reporter'
+
+C_EXTENSION = '.c'.freeze
+
+def load_configuration(config_file)
+  $cfg_file = config_file
+  $cfg = YAML.load(File.read($cfg_file))
+end
+
+def configure_clean
+  CLEAN.include($cfg['compiler']['build_path'] + '*.*') unless $cfg['compiler']['build_path'].nil?
+end
+
+def configure_toolchain(config_file = DEFAULT_CONFIG_FILE)
+  config_file += '.yml' unless config_file =~ /\.yml$/
+  load_configuration(config_file)
+  configure_clean
+end
+
+def unit_test_files
+  path = $cfg['compiler']['unit_tests_path'] + 'Test*' + C_EXTENSION
+  path.tr!('\\', '/')
+  FileList.new(path)
+end
+
+def local_include_dirs
+  include_dirs = $cfg['compiler']['includes']['items'].dup
+  include_dirs.delete_if { |dir| dir.is_a?(Array) }
+  include_dirs
+end
+
+def extract_headers(filename)
+  includes = []
+  lines = File.readlines(filename)
+  lines.each do |line|
+    m = line.match(/^\s*#include\s+\"\s*(.+\.[hH])\s*\"/)
+    includes << m[1] unless m.nil?
+  end
+  includes
+end
+
+def find_source_file(header, paths)
+  paths.each do |dir|
+    src_file = dir + header.ext(C_EXTENSION)
+    return src_file if File.exist?(src_file)
+  end
+  nil
+end
+
+def tackit(strings)
+  result = if strings.is_a?(Array)
+             "\"#{strings.join}\""
+           else
+             strings
+           end
+  result
+end
+
+def squash(prefix, items)
+  result = ''
+  items.each { |item| result += " #{prefix}#{tackit(item)}" }
+  result
+end
+
+def build_compiler_fields
+  command = tackit($cfg['compiler']['path'])
+  defines = if $cfg['compiler']['defines']['items'].nil?
+              ''
+            else
+              squash($cfg['compiler']['defines']['prefix'], $cfg['compiler']['defines']['items'])
+            end
+  options = squash('', $cfg['compiler']['options'])
+  includes = squash($cfg['compiler']['includes']['prefix'], $cfg['compiler']['includes']['items'])
+  includes = includes.gsub(/\\ /, ' ').gsub(/\\\"/, '"').gsub(/\\$/, '') # Remove trailing slashes (for IAR)
+
+  { command: command, defines: defines, options: options, includes: includes }
+end
+
+def compile(file, _defines = [])
+  compiler = build_compiler_fields
+  cmd_str  = "#{compiler[:command]}#{compiler[:defines]}#{compiler[:options]}#{compiler[:includes]} #{file} " \
+             "#{$cfg['compiler']['object_files']['prefix']}#{$cfg['compiler']['object_files']['destination']}"
+  obj_file = "#{File.basename(file, C_EXTENSION)}#{$cfg['compiler']['object_files']['extension']}"
+  execute(cmd_str + obj_file)
+  obj_file
+end
+
+def build_linker_fields
+  command = tackit($cfg['linker']['path'])
+  options = if $cfg['linker']['options'].nil?
+              ''
+            else
+              squash('', $cfg['linker']['options'])
+            end
+  includes = if $cfg['linker']['includes'].nil? || $cfg['linker']['includes']['items'].nil?
+               ''
+             else
+               squash($cfg['linker']['includes']['prefix'], $cfg['linker']['includes']['items'])
+             end.gsub(/\\ /, ' ').gsub(/\\\"/, '"').gsub(/\\$/, '') # Remove trailing slashes (for IAR)
+
+  { command: command, options: options, includes: includes }
+end
+
+def link_it(exe_name, obj_list)
+  linker = build_linker_fields
+  cmd_str = "#{linker[:command]}#{linker[:options]}#{linker[:includes]} " +
+            (obj_list.map { |obj| "#{$cfg['linker']['object_files']['path']}#{obj} " }).join +
+            $cfg['linker']['bin_files']['prefix'] + ' ' +
+            $cfg['linker']['bin_files']['destination'] +
+            exe_name + $cfg['linker']['bin_files']['extension']
+  execute(cmd_str)
+end
+
+def build_simulator_fields
+  return nil if $cfg['simulator'].nil?
+
+  command = if $cfg['simulator']['path'].nil?
+              ''
+            else
+              (tackit($cfg['simulator']['path']) + ' ')
+            end
+  pre_support = if $cfg['simulator']['pre_support'].nil?
+                  ''
+                else
+                  squash('', $cfg['simulator']['pre_support'])
+                end
+  post_support = if $cfg['simulator']['post_support'].nil?
+                   ''
+                 else
+                   squash('', $cfg['simulator']['post_support'])
+                 end
+
+  { command: command, pre_support: pre_support, post_support: post_support }
+end
+
+def execute(command_string, verbose = true, raise_on_fail = true)
+  report command_string
+  output = `#{command_string}`.chomp
+  report(output) if verbose && !output.nil? && !output.empty?
+
+  if !$?.nil? && !$?.exitstatus.zero? && raise_on_fail
+    raise "Command failed. (Returned #{$?.exitstatus})"
+  end
+
+  output
+end
+
+def report_summary
+  summary = UnityTestSummary.new
+  summary.root = __dir__
+  results_glob = "#{$cfg['compiler']['build_path']}*.test*"
+  results_glob.tr!('\\', '/')
+  results = Dir[results_glob]
+  summary.targets = results
+  summary.run
+  fail_out 'FAIL: There were failures' if summary.failures > 0
+end
+
+def run_tests(test_files)
+  report 'Running system tests...'
+
+  # Tack on TEST define for compiling unit tests
+  load_configuration($cfg_file)
+  test_defines = ['TEST']
+  $cfg['compiler']['defines']['items'] = [] if $cfg['compiler']['defines']['items'].nil?
+  $cfg['compiler']['defines']['items'] << 'TEST'
+
+  include_dirs = local_include_dirs
+
+  # Build and execute each unit test
+  test_files.each do |test|
+    obj_list = []
+
+    # Detect dependencies and build required required modules
+    extract_headers(test).each do |header|
+      # Compile corresponding source file if it exists
+      src_file = find_source_file(header, include_dirs)
+      obj_list << compile(src_file, test_defines) unless src_file.nil?
+    end
+
+    # Build the test runner (generate if configured to do so)
+    test_base = File.basename(test, C_EXTENSION)
+    runner_name = test_base + '_Runner.c'
+    if $cfg['compiler']['runner_path'].nil?
+      runner_path = $cfg['compiler']['build_path'] + runner_name
+      test_gen = UnityTestRunnerGenerator.new($cfg_file)
+      test_gen.run(test, runner_path)
+    else
+      runner_path = $cfg['compiler']['runner_path'] + runner_name
+    end
+
+    obj_list << compile(runner_path, test_defines)
+
+    # Build the test module
+    obj_list << compile(test, test_defines)
+
+    # Link the test executable
+    link_it(test_base, obj_list)
+
+    # Execute unit test and generate results file
+    simulator = build_simulator_fields
+    executable = $cfg['linker']['bin_files']['destination'] + test_base + $cfg['linker']['bin_files']['extension']
+    cmd_str = if simulator.nil?
+                executable
+              else
+                "#{simulator[:command]} #{simulator[:pre_support]} #{executable} #{simulator[:post_support]}"
+              end
+    output = execute(cmd_str, true, false)
+    test_results = $cfg['compiler']['build_path'] + test_base
+    test_results += if output.match(/OK$/m).nil?
+                      '.testfail'
+                    else
+                      '.testpass'
+                    end
+    File.open(test_results, 'w') { |f| f.print output }
+  end
+end
+
+def build_application(main)
+  report 'Building application...'
+
+  obj_list = []
+  load_configuration($cfg_file)
+  main_path = $cfg['compiler']['source_path'] + main + C_EXTENSION
+
+  # Detect dependencies and build required required modules
+  include_dirs = get_local_include_dirs
+  extract_headers(main_path).each do |header|
+    src_file = find_source_file(header, include_dirs)
+    obj_list << compile(src_file) unless src_file.nil?
+  end
+
+  # Build the main source file
+  main_base = File.basename(main_path, C_EXTENSION)
+  obj_list << compile(main_path)
+
+  # Create the executable
+  link_it(main_base, obj_list)
+end
+
+def fail_out(msg)
+  puts msg
+  puts 'Not returning exit code so continuous integration can pass'
+  #    exit(-1) # Only removed to pass example_3, which has failing tests on purpose.
+  #               Still fail if the build fails for any other reason.
+end
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/readme.txt b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/readme.txt
new file mode 100644
index 000000000..7371fea05
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/readme.txt
@@ -0,0 +1,13 @@
+Example 3
+=========
+
+This example project gives an example of some passing, ignored, and failing tests.
+It's simple and meant for you to look over and get an idea for what all of this stuff does.
+
+You can build and test using rake. The rake version will let you test with gcc or a couple
+versions of IAR.  You can tweak the yaml files to get those versions running.
+
+Ruby is required if you're using the rake version (obviously).  This version shows off most of
+Unity's advanced features (automatically creating test runners, fancy summaries, etc.)
+Without ruby, you have to maintain your own test runners.  Do that for a while and you'll learn
+why you really want to start using the Ruby tools.
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/src/ProductionCode.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/src/ProductionCode.c
new file mode 100644
index 000000000..3bafe2056
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/src/ProductionCode.c
@@ -0,0 +1,24 @@
+
+#include "ProductionCode.h"
+
+int Counter = 0;
+int NumbersToFind[9] = { 0, 34, 55, 66, 32, 11, 1, 77, 888 }; //some obnoxious array to search that is 1-based indexing instead of 0.
+
+// This function is supposed to search through NumbersToFind and find a particular number.  
+// If it finds it, the index is returned.  Otherwise 0 is returned which sorta makes sense since 
+// NumbersToFind is indexed from 1.  Unfortunately it's broken 
+// (and should therefore be caught by our tests)
+int FindFunction_WhichIsBroken(int NumberToFind)
+{
+    int i = 0;
+    while (i < 8) //Notice I should have been in braces
+        i++;
+        if (NumbersToFind[i] == NumberToFind) //Yikes!  I'm getting run after the loop finishes instead of during it!
+            return i;
+    return 0;
+}
+
+int FunctionWhichReturnsLocalVariable(void)
+{
+    return Counter;
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/src/ProductionCode.h b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/src/ProductionCode.h
new file mode 100644
index 000000000..250ca0dc6
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/src/ProductionCode.h
@@ -0,0 +1,3 @@
+
+int FindFunction_WhichIsBroken(int NumberToFind);
+int FunctionWhichReturnsLocalVariable(void);
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/src/ProductionCode2.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/src/ProductionCode2.c
new file mode 100644
index 000000000..77c969f17
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/src/ProductionCode2.c
@@ -0,0 +1,11 @@
+
+#include "ProductionCode2.h"
+
+char* ThisFunctionHasNotBeenTested(int Poor, char* LittleFunction)
+{
+  (void)Poor;
+  (void)LittleFunction;
+  //Since There Are No Tests Yet, This Function Could Be Empty For All We Know.
+  // Which isn't terribly useful... but at least we put in a TEST_IGNORE so we won't forget
+  return (char*)0;
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/src/ProductionCode2.h b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/src/ProductionCode2.h
new file mode 100644
index 000000000..34ae980d1
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/src/ProductionCode2.h
@@ -0,0 +1,2 @@
+
+char* ThisFunctionHasNotBeenTested(int Poor, char* LittleFunction);
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/target_gcc_32.yml b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/target_gcc_32.yml
new file mode 100644
index 000000000..d7568ab81
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/target_gcc_32.yml
@@ -0,0 +1,47 @@
+# Copied from ~Unity/targets/gcc_32.yml
+unity_root:  &unity_root '../..'
+unity_source: &unity_source '../../src/'
+compiler:
+  path: gcc
+  source_path:     &source_path 'src/'
+  unit_tests_path: &unit_tests_path 'test/'
+  build_path:      &build_path 'build/'
+  options:
+    - '-c'
+    - '-m32'
+    - '-Wall'
+    - '-Wno-address'
+    - '-std=c99'
+    - '-pedantic'
+  includes:
+    prefix: '-I'
+    items:
+      - *source_path
+      - *unity_source
+      - *unit_tests_path
+  defines:
+    prefix: '-D'
+    items:
+      - UNITY_INCLUDE_DOUBLE
+      - UNITY_SUPPORT_TEST_CASES
+  object_files:
+    prefix: '-o'
+    extension: '.o'
+    destination: *build_path
+linker:
+  path: gcc
+  options:
+    - -lm
+    - '-m32'
+  includes:
+    prefix: '-I'
+  object_files:
+    path: *build_path
+    extension: '.o'
+  bin_files:
+    prefix: '-o'
+    extension: '.exe'
+    destination: *build_path
+colour: true
+:unity:
+  :plugins: []
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/test/TestProductionCode.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/test/TestProductionCode.c
new file mode 100644
index 000000000..28a55812c
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/test/TestProductionCode.c
@@ -0,0 +1,62 @@
+
+#include "ProductionCode.h"
+#include "unity.h"
+
+//sometimes you may want to get at local data in a module.
+//for example: If you plan to pass by reference, this could be useful
+//however, it should often be avoided
+extern int Counter; 
+
+void setUp(void)
+{
+  //This is run before EACH TEST
+  Counter = 0x5a5a;
+}
+
+void tearDown(void)
+{
+}
+
+void test_FindFunction_WhichIsBroken_ShouldReturnZeroIfItemIsNotInList_WhichWorksEvenInOurBrokenCode(void)
+{
+  //All of these should pass
+  TEST_ASSERT_EQUAL(0, FindFunction_WhichIsBroken(78));
+  TEST_ASSERT_EQUAL(0, FindFunction_WhichIsBroken(1));
+  TEST_ASSERT_EQUAL(0, FindFunction_WhichIsBroken(33));
+  TEST_ASSERT_EQUAL(0, FindFunction_WhichIsBroken(999));
+  TEST_ASSERT_EQUAL(0, FindFunction_WhichIsBroken(-1));
+}
+
+void test_FindFunction_WhichIsBroken_ShouldReturnTheIndexForItemsInList_WhichWillFailBecauseOurFunctionUnderTestIsBroken(void)
+{
+  // You should see this line fail in your test summary
+  TEST_ASSERT_EQUAL(1, FindFunction_WhichIsBroken(34));
+  
+  // Notice the rest of these didn't get a chance to run because the line above failed.  
+  // Unit tests abort each test function on the first sign of trouble. 
+  // Then NEXT test function runs as normal.
+  TEST_ASSERT_EQUAL(8, FindFunction_WhichIsBroken(8888));
+}
+
+void test_FunctionWhichReturnsLocalVariable_ShouldReturnTheCurrentCounterValue(void)
+{
+    //This should be true because setUp set this up for us before this test
+    TEST_ASSERT_EQUAL_HEX(0x5a5a, FunctionWhichReturnsLocalVariable());
+    
+    //This should be true because we can still change our answer
+    Counter = 0x1234;
+    TEST_ASSERT_EQUAL_HEX(0x1234, FunctionWhichReturnsLocalVariable());
+}
+
+void test_FunctionWhichReturnsLocalVariable_ShouldReturnTheCurrentCounterValueAgain(void)
+{
+    //This should be true again because setup was rerun before this test (and after we changed it to 0x1234)
+    TEST_ASSERT_EQUAL_HEX(0x5a5a, FunctionWhichReturnsLocalVariable());
+}
+
+void test_FunctionWhichReturnsLocalVariable_ShouldReturnCurrentCounter_ButFailsBecauseThisTestIsActuallyFlawed(void)
+{
+    //Sometimes you get the test wrong.  When that happens, you get a failure too... and a quick look should tell
+    // you what actually happened...which in this case was a failure to setup the initial condition.
+    TEST_ASSERT_EQUAL_HEX(0x1234, FunctionWhichReturnsLocalVariable());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/test/TestProductionCode2.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/test/TestProductionCode2.c
new file mode 100644
index 000000000..e2119cc38
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_3/test/TestProductionCode2.c
@@ -0,0 +1,31 @@
+
+#include "ProductionCode2.h"
+#include "unity.h"
+
+/* These should be ignored because they are commented out in various ways:
+#include "whatever.h" 
+*/
+//#include "somethingelse.h"
+
+void setUp(void)
+{
+}
+
+void tearDown(void)
+{
+}
+
+void test_IgnoredTest(void)
+{
+    TEST_IGNORE_MESSAGE("This Test Was Ignored On Purpose");
+}
+
+void test_AnotherIgnoredTest(void)
+{
+    TEST_IGNORE_MESSAGE("These Can Be Useful For Leaving Yourself Notes On What You Need To Do Yet");
+}
+
+void test_ThisFunctionHasNotBeenTested_NeedsToBeImplemented(void)
+{
+    TEST_IGNORE(); //Like This
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/meson.build b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/meson.build
new file mode 100644
index 000000000..f06c3fe3a
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/meson.build
@@ -0,0 +1,12 @@
+#
+# build script written by : Michael Brockus.
+# github repo author: Mike Karlesky, Mark VanderVoord, Greg Williams.
+#
+# license: MIT
+#
+project('example-4', 'c')
+
+unity_dep = dependency('unity', fallback : ['unity', 'unity_dep'])
+
+subdir('src')
+subdir('test')
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/readme.txt b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/readme.txt
new file mode 100644
index 000000000..c8f45a817
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/readme.txt
@@ -0,0 +1,15 @@
+Example 4
+=========
+
+Close to the simplest possible example of Unity, using only basic features.
+to build this example run "meson setup <build dir name>".
+
+Meson uses the Ninja build system to actually build the code. To start the 
+build, simply type the following command.  
+
+"ninja -C <build dir name>"
+
+Meson provides native support for running tests. The command to do that is simple.
+
+"meson test -C <build dir name>".
+ 
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/src/ProductionCode.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/src/ProductionCode.c
new file mode 100644
index 000000000..db128e5bd
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/src/ProductionCode.c
@@ -0,0 +1,24 @@
+
+#include "ProductionCode.h"
+
+int Counter = 0;
+int NumbersToFind[9] = { 0, 34, 55, 66, 32, 11, 1, 77, 888 }; /* some obnoxious array to search that is 1-based indexing instead of 0. */
+
+/* This function is supposed to search through NumbersToFind and find a particular number.
+ * If it finds it, the index is returned.  Otherwise 0 is returned which sorta makes sense since
+ * NumbersToFind is indexed from 1.  Unfortunately it's broken
+ * (and should therefore be caught by our tests) */
+int FindFunction_WhichIsBroken(int NumberToFind)
+{
+    int i = 0;
+    while (i < 8) /* Notice I should have been in braces */
+        i++;
+        if (NumbersToFind[i] == NumberToFind) /* Yikes!  I'm getting run after the loop finishes instead of during it! */
+            return i;
+    return 0;
+}
+
+int FunctionWhichReturnsLocalVariable(void)
+{
+    return Counter;
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/src/ProductionCode.h b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/src/ProductionCode.h
new file mode 100644
index 000000000..250ca0dc6
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/src/ProductionCode.h
@@ -0,0 +1,3 @@
+
+int FindFunction_WhichIsBroken(int NumberToFind);
+int FunctionWhichReturnsLocalVariable(void);
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/src/ProductionCode2.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/src/ProductionCode2.c
new file mode 100644
index 000000000..98ee7eebc
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/src/ProductionCode2.c
@@ -0,0 +1,11 @@
+
+#include "ProductionCode2.h"
+
+char* ThisFunctionHasNotBeenTested(int Poor, char* LittleFunction)
+{
+  (void)Poor;
+  (void)LittleFunction;
+  /* Since There Are No Tests Yet, This Function Could Be Empty For All We Know.
+   * Which isn't terribly useful... but at least we put in a TEST_IGNORE so we won't forget */
+  return (char*)0;
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/src/ProductionCode2.h b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/src/ProductionCode2.h
new file mode 100644
index 000000000..34ae980d1
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/src/ProductionCode2.h
@@ -0,0 +1,2 @@
+
+char* ThisFunctionHasNotBeenTested(int Poor, char* LittleFunction);
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/src/meson.build b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/src/meson.build
new file mode 100644
index 000000000..10c5735be
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/src/meson.build
@@ -0,0 +1,16 @@
+#
+# build script written by : Michael Brockus.
+# github repo author: Mike Karlesky, Mark VanderVoord, Greg Williams.
+#
+# license: MIT
+#
+inc_dir = include_directories('.')
+lib_list = {'a': ['ProductionCode.c' ], 'b': ['ProductionCode2.c']}
+
+foreach lib, src : lib_list
+    set_variable(lib + '_lib', 
+        static_library(lib + '_lib', sources: src, include_directories: inc_dir))
+endforeach
+
+a_dep = declare_dependency(link_with: a_lib, include_directories: inc_dir)
+b_dep = declare_dependency(link_with: b_lib, include_directories: inc_dir)
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/subprojects/unity.wrap b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/subprojects/unity.wrap
new file mode 100755
index 000000000..f2e54c84d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/subprojects/unity.wrap
@@ -0,0 +1,4 @@
+[wrap-git]
+directory = unity
+url = https://github.com/ThrowTheSwitch/Unity.git
+revision = head
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/test/TestProductionCode.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/test/TestProductionCode.c
new file mode 100644
index 000000000..526a84eb9
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/test/TestProductionCode.c
@@ -0,0 +1,63 @@
+
+#include "ProductionCode.h"
+#include "unity.h"
+
+/* sometimes you may want to get at local data in a module.
+ * for example: If you plan to pass by reference, this could be useful
+ * however, it should often be avoided */
+extern int Counter;
+
+void setUp(void)
+{
+  /* This is run before EACH TEST */
+  Counter = 0x5a5a;
+}
+
+void tearDown(void)
+{
+}
+
+
+void test_FindFunction_WhichIsBroken_ShouldReturnZeroIfItemIsNotInList_WhichWorksEvenInOurBrokenCode(void)
+{
+  /* All of these should pass */
+  TEST_ASSERT_EQUAL(0, FindFunction_WhichIsBroken(78));
+  TEST_ASSERT_EQUAL(0, FindFunction_WhichIsBroken(2));
+  TEST_ASSERT_EQUAL(0, FindFunction_WhichIsBroken(33));
+  TEST_ASSERT_EQUAL(0, FindFunction_WhichIsBroken(999));
+  TEST_ASSERT_EQUAL(0, FindFunction_WhichIsBroken(-1));
+}
+
+void test_FindFunction_WhichIsBroken_ShouldReturnTheIndexForItemsInList_WhichWillFailBecauseOurFunctionUnderTestIsBroken(void)
+{
+  /* You should see this line fail in your test summary */
+  TEST_ASSERT_EQUAL(1, FindFunction_WhichIsBroken(34));
+
+  /* Notice the rest of these didn't get a chance to run because the line above failed.
+   * Unit tests abort each test function on the first sign of trouble.
+   * Then NEXT test function runs as normal. */
+  TEST_ASSERT_EQUAL(8, FindFunction_WhichIsBroken(8888));
+}
+
+void test_FunctionWhichReturnsLocalVariable_ShouldReturnTheCurrentCounterValue(void)
+{
+    /* This should be true because setUp set this up for us before this test */
+    TEST_ASSERT_EQUAL_HEX(0x5a5a, FunctionWhichReturnsLocalVariable());
+
+    /* This should be true because we can still change our answer */
+    Counter = 0x1234;
+    TEST_ASSERT_EQUAL_HEX(0x1234, FunctionWhichReturnsLocalVariable());
+}
+
+void test_FunctionWhichReturnsLocalVariable_ShouldReturnTheCurrentCounterValueAgain(void)
+{
+    /* This should be true again because setup was rerun before this test (and after we changed it to 0x1234) */
+    TEST_ASSERT_EQUAL_HEX(0x5a5a, FunctionWhichReturnsLocalVariable());
+}
+
+void test_FunctionWhichReturnsLocalVariable_ShouldReturnCurrentCounter_ButFailsBecauseThisTestIsActuallyFlawed(void)
+{
+    /* Sometimes you get the test wrong.  When that happens, you get a failure too... and a quick look should tell
+     * you what actually happened...which in this case was a failure to setup the initial condition. */
+    TEST_ASSERT_EQUAL_HEX(0x1234, FunctionWhichReturnsLocalVariable());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/test/TestProductionCode2.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/test/TestProductionCode2.c
new file mode 100644
index 000000000..2578ca94e
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/test/TestProductionCode2.c
@@ -0,0 +1,35 @@
+
+#include "ProductionCode2.h"
+#include "unity.h"
+
+/* These should be ignored because they are commented out in various ways:
+#include "whatever.h" 
+#include "somethingelse.h"
+*/
+
+void setUp(void)
+{
+}
+
+void tearDown(void)
+{
+}
+
+void test_IgnoredTest(void);
+void test_AnotherIgnoredTest(void);
+void test_ThisFunctionHasNotBeenTested_NeedsToBeImplemented(void);
+
+void test_IgnoredTest(void)
+{
+    TEST_IGNORE_MESSAGE("This Test Was Ignored On Purpose");
+}
+
+void test_AnotherIgnoredTest(void)
+{
+    TEST_IGNORE_MESSAGE("These Can Be Useful For Leaving Yourself Notes On What You Need To Do Yet");
+}
+
+void test_ThisFunctionHasNotBeenTested_NeedsToBeImplemented(void)
+{
+    TEST_IGNORE(); /* Like This */
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/test/meson.build b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/test/meson.build
new file mode 100644
index 000000000..0e3c72f5c
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/test/meson.build
@@ -0,0 +1,7 @@
+#
+# build script written by : Michael Brockus.
+# github repo author: Mike Karlesky, Mark VanderVoord, Greg Williams.
+#
+# license: MIT
+#
+subdir('test_runners')
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/test/test_runners/TestProductionCode2_Runner.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/test/test_runners/TestProductionCode2_Runner.c
new file mode 100644
index 000000000..cf72c219d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/test/test_runners/TestProductionCode2_Runner.c
@@ -0,0 +1,53 @@
+/* AUTOGENERATED FILE. DO NOT EDIT. */
+
+/*=======Test Runner Used To Run Each Test Below=====*/
+#define RUN_TEST(TestFunc, TestLineNum) \
+{ \
+  Unity.CurrentTestName = #TestFunc; \
+  Unity.CurrentTestLineNumber = TestLineNum; \
+  Unity.NumberOfTests++; \
+  if (TEST_PROTECT()) \
+  { \
+      setUp(); \
+      TestFunc(); \
+  } \
+  if (TEST_PROTECT()) \
+  { \
+    tearDown(); \
+  } \
+  UnityConcludeTest(); \
+}
+
+/*=======Automagically Detected Files To Include=====*/
+#include "unity.h"
+#include <setjmp.h>
+#include <stdio.h>
+#include "ProductionCode2.h"
+
+/*=======External Functions This Runner Calls=====*/
+extern void setUp(void);
+extern void tearDown(void);
+extern void test_IgnoredTest(void);
+extern void test_AnotherIgnoredTest(void);
+extern void test_ThisFunctionHasNotBeenTested_NeedsToBeImplemented(void);
+
+
+/*=======Test Reset Option=====*/
+void resetTest(void);
+void resetTest(void)
+{
+  tearDown();
+  setUp();
+}
+
+
+/*=======MAIN=====*/
+int main(void)
+{
+  UnityBegin("test/TestProductionCode2.c");
+  RUN_TEST(test_IgnoredTest, 18);
+  RUN_TEST(test_AnotherIgnoredTest, 23);
+  RUN_TEST(test_ThisFunctionHasNotBeenTested_NeedsToBeImplemented, 28);
+
+  return (UnityEnd());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/test/test_runners/TestProductionCode_Runner.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/test/test_runners/TestProductionCode_Runner.c
new file mode 100644
index 000000000..3b49af748
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/test/test_runners/TestProductionCode_Runner.c
@@ -0,0 +1,57 @@
+/* AUTOGENERATED FILE. DO NOT EDIT. */
+
+/*=======Test Runner Used To Run Each Test Below=====*/
+#define RUN_TEST(TestFunc, TestLineNum) \
+{ \
+  Unity.CurrentTestName = #TestFunc; \
+  Unity.CurrentTestLineNumber = TestLineNum; \
+  Unity.NumberOfTests++; \
+  if (TEST_PROTECT()) \
+  { \
+      setUp(); \
+      TestFunc(); \
+  } \
+  if (TEST_PROTECT()) \
+  { \
+    tearDown(); \
+  } \
+  UnityConcludeTest(); \
+}
+
+/*=======Automagically Detected Files To Include=====*/
+#include "unity.h"
+#include <setjmp.h>
+#include <stdio.h>
+#include "ProductionCode.h"
+
+/*=======External Functions This Runner Calls=====*/
+extern void setUp(void);
+extern void tearDown(void);
+extern void test_FindFunction_WhichIsBroken_ShouldReturnZeroIfItemIsNotInList_WhichWorksEvenInOurBrokenCode(void);
+extern void test_FindFunction_WhichIsBroken_ShouldReturnTheIndexForItemsInList_WhichWillFailBecauseOurFunctionUnderTestIsBroken(void);
+extern void test_FunctionWhichReturnsLocalVariable_ShouldReturnTheCurrentCounterValue(void);
+extern void test_FunctionWhichReturnsLocalVariable_ShouldReturnTheCurrentCounterValueAgain(void);
+extern void test_FunctionWhichReturnsLocalVariable_ShouldReturnCurrentCounter_ButFailsBecauseThisTestIsActuallyFlawed(void);
+
+
+/*=======Test Reset Option=====*/
+void resetTest(void);
+void resetTest(void)
+{
+  tearDown();
+  setUp();
+}
+
+
+/*=======MAIN=====*/
+int main(void)
+{
+  UnityBegin("test/TestProductionCode.c");
+  RUN_TEST(test_FindFunction_WhichIsBroken_ShouldReturnZeroIfItemIsNotInList_WhichWorksEvenInOurBrokenCode, 20);
+  RUN_TEST(test_FindFunction_WhichIsBroken_ShouldReturnTheIndexForItemsInList_WhichWillFailBecauseOurFunctionUnderTestIsBroken, 30);
+  RUN_TEST(test_FunctionWhichReturnsLocalVariable_ShouldReturnTheCurrentCounterValue, 41);
+  RUN_TEST(test_FunctionWhichReturnsLocalVariable_ShouldReturnTheCurrentCounterValueAgain, 51);
+  RUN_TEST(test_FunctionWhichReturnsLocalVariable_ShouldReturnCurrentCounter_ButFailsBecauseThisTestIsActuallyFlawed, 57);
+
+  return (UnityEnd());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/test/test_runners/meson.build b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/test/test_runners/meson.build
new file mode 100644
index 000000000..f2a43c1b5
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/example_4/test/test_runners/meson.build
@@ -0,0 +1,13 @@
+#
+# build script written by : Michael Brockus.
+# github repo author: Mike Karlesky, Mark VanderVoord, Greg Williams.
+#
+# license: MIT
+#
+cases = [
+          ['TestProductionCode_Runner.c',  join_paths('..' ,'TestProductionCode.c' )], 
+          ['TestProductionCode2_Runner.c', join_paths('..' ,'TestProductionCode2.c')]
+        ]
+
+test('Running: 01-test-case', executable('01-test-case', cases[0], dependencies: [ a_dep, unity_dep ]))
+test('Running: 02-test-case', executable('02-test-case', cases[1], dependencies: [ b_dep, unity_dep ]))
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/unity_config.h b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/unity_config.h
new file mode 100644
index 000000000..fc6cdb05a
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/examples/unity_config.h
@@ -0,0 +1,244 @@
+/* Unity Configuration
+ * As of May 11th, 2016 at ThrowTheSwitch/Unity commit 837c529
+ * Update: December 29th, 2016
+ * See Also: Unity/docs/UnityConfigurationGuide.pdf
+ *
+ * Unity is designed to run on almost anything that is targeted by a C compiler.
+ * It would be awesome if this could be done with zero configuration. While
+ * there are some targets that come close to this dream, it is sadly not
+ * universal. It is likely that you are going to need at least a couple of the
+ * configuration options described in this document.
+ *
+ * All of Unity's configuration options are `#defines`. Most of these are simple
+ * definitions. A couple are macros with arguments. They live inside the
+ * unity_internals.h header file. We don't necessarily recommend opening that
+ * file unless you really need to. That file is proof that a cross-platform
+ * library is challenging to build. From a more positive perspective, it is also
+ * proof that a great deal of complexity can be centralized primarily to one
+ * place in order to provide a more consistent and simple experience elsewhere.
+ *
+ * Using These Options
+ * It doesn't matter if you're using a target-specific compiler and a simulator
+ * or a native compiler. In either case, you've got a couple choices for
+ * configuring these options:
+ *
+ *  1. Because these options are specified via C defines, you can pass most of
+ *     these options to your compiler through command line compiler flags. Even
+ *     if you're using an embedded target that forces you to use their
+ *     overbearing IDE for all configuration, there will be a place somewhere in
+ *     your project to configure defines for your compiler.
+ *  2. You can create a custom `unity_config.h` configuration file (present in
+ *     your toolchain's search paths). In this file, you will list definitions
+ *     and macros specific to your target. All you must do is define
+ *     `UNITY_INCLUDE_CONFIG_H` and Unity will rely on `unity_config.h` for any
+ *     further definitions it may need.
+ */
+
+#ifndef UNITY_CONFIG_H
+#define UNITY_CONFIG_H
+
+/* ************************* AUTOMATIC INTEGER TYPES ***************************
+ * C's concept of an integer varies from target to target. The C Standard has
+ * rules about the `int` matching the register size of the target
+ * microprocessor. It has rules about the `int` and how its size relates to
+ * other integer types. An `int` on one target might be 16 bits while on another
+ * target it might be 64. There are more specific types in compilers compliant
+ * with C99 or later, but that's certainly not every compiler you are likely to
+ * encounter. Therefore, Unity has a number of features for helping to adjust
+ * itself to match your required integer sizes. It starts off by trying to do it
+ * automatically.
+ **************************************************************************** */
+
+/* The first attempt to guess your types is to check `limits.h`. Some compilers
+ * that don't support `stdint.h` could include `limits.h`. If you don't
+ * want Unity to check this file, define this to make it skip the inclusion.
+ * Unity looks at UINT_MAX & ULONG_MAX, which were available since C89.
+ */
+/* #define UNITY_EXCLUDE_LIMITS_H */
+
+/* The second thing that Unity does to guess your types is check `stdint.h`.
+ * This file defines `UINTPTR_MAX`, since C99, that Unity can make use of to
+ * learn about your system. It's possible you don't want it to do this or it's
+ * possible that your system doesn't support `stdint.h`. If that's the case,
+ * you're going to want to define this. That way, Unity will know to skip the
+ * inclusion of this file and you won't be left with a compiler error.
+ */
+/* #define UNITY_EXCLUDE_STDINT_H */
+
+/* ********************** MANUAL INTEGER TYPE DEFINITION ***********************
+ * If you've disabled all of the automatic options above, you're going to have
+ * to do the configuration yourself. There are just a handful of defines that
+ * you are going to specify if you don't like the defaults.
+ **************************************************************************** */
+
+ /* Define this to be the number of bits an `int` takes up on your system. The
+ * default, if not auto-detected, is 32 bits.
+ *
+ * Example:
+ */
+/* #define UNITY_INT_WIDTH 16 */
+
+/* Define this to be the number of bits a `long` takes up on your system. The
+ * default, if not autodetected, is 32 bits. This is used to figure out what
+ * kind of 64-bit support your system can handle.  Does it need to specify a
+ * `long` or a `long long` to get a 64-bit value. On 16-bit systems, this option
+ * is going to be ignored.
+ *
+ * Example:
+ */
+/* #define UNITY_LONG_WIDTH 16 */
+
+/* Define this to be the number of bits a pointer takes up on your system. The
+ * default, if not autodetected, is 32-bits. If you're getting ugly compiler
+ * warnings about casting from pointers, this is the one to look at.
+ *
+ * Example:
+ */
+/* #define UNITY_POINTER_WIDTH 64 */
+
+/* Unity will automatically include 64-bit support if it auto-detects it, or if
+ * your `int`, `long`, or pointer widths are greater than 32-bits. Define this
+ * to enable 64-bit support if none of the other options already did it for you.
+ * There can be a significant size and speed impact to enabling 64-bit support
+ * on small targets, so don't define it if you don't need it.
+ */
+/* #define UNITY_INCLUDE_64 */
+
+
+/* *************************** FLOATING POINT TYPES ****************************
+ * In the embedded world, it's not uncommon for targets to have no support for
+ * floating point operations at all or to have support that is limited to only
+ * single precision. We are able to guess integer sizes on the fly because
+ * integers are always available in at least one size. Floating point, on the
+ * other hand, is sometimes not available at all. Trying to include `float.h` on
+ * these platforms would result in an error. This leaves manual configuration as
+ * the only option.
+ **************************************************************************** */
+
+ /* By default, Unity guesses that you will want single precision floating point
+  * support, but not double precision. It's easy to change either of these using
+  * the include and exclude options here. You may include neither, just float,
+  * or both, as suits your needs.
+  */
+/* #define UNITY_EXCLUDE_FLOAT  */
+/* #define UNITY_INCLUDE_DOUBLE */
+/* #define UNITY_EXCLUDE_DOUBLE */
+
+/* For features that are enabled, the following floating point options also
+ * become available.
+ */
+
+/* Unity aims for as small of a footprint as possible and avoids most standard
+ * library calls (some embedded platforms don't have a standard library!).
+ * Because of this, its routines for printing integer values are minimalist and
+ * hand-coded. To keep Unity universal, though, we eventually chose to develop
+ * our own floating point print routines. Still, the display of floating point
+ * values during a failure are optional. By default, Unity will print the
+ * actual results of floating point assertion failures. So a failed assertion
+ * will produce a message like "Expected 4.0 Was 4.25". If you would like less
+ * verbose failure messages for floating point assertions, use this option to
+ * give a failure message `"Values Not Within Delta"` and trim the binary size.
+ */
+/* #define UNITY_EXCLUDE_FLOAT_PRINT */
+
+/* If enabled, Unity assumes you want your `FLOAT` asserts to compare standard C
+ * floats. If your compiler supports a specialty floating point type, you can
+ * always override this behavior by using this definition.
+ *
+ * Example:
+ */
+/* #define UNITY_FLOAT_TYPE float16_t */
+
+/* If enabled, Unity assumes you want your `DOUBLE` asserts to compare standard
+ * C doubles. If you would like to change this, you can specify something else
+ * by using this option. For example, defining `UNITY_DOUBLE_TYPE` to `long
+ * double` could enable gargantuan floating point types on your 64-bit processor
+ * instead of the standard `double`.
+ *
+ * Example:
+ */
+/* #define UNITY_DOUBLE_TYPE long double */
+
+/* If you look up `UNITY_ASSERT_EQUAL_FLOAT` and `UNITY_ASSERT_EQUAL_DOUBLE` as
+ * documented in the Unity Assertion Guide, you will learn that they are not
+ * really asserting that two values are equal but rather that two values are
+ * "close enough" to equal. "Close enough" is controlled by these precision
+ * configuration options. If you are working with 32-bit floats and/or 64-bit
+ * doubles (the normal on most processors), you should have no need to change
+ * these options. They are both set to give you approximately 1 significant bit
+ * in either direction. The float precision is 0.00001 while the double is
+ * 10^-12. For further details on how this works, see the appendix of the Unity
+ * Assertion Guide.
+ *
+ * Example:
+ */
+/* #define UNITY_FLOAT_PRECISION 0.001f  */
+/* #define UNITY_DOUBLE_PRECISION 0.001f */
+
+
+/* *************************** MISCELLANEOUS ***********************************
+ * Miscellaneous configuration options for Unity
+ **************************************************************************** */
+
+/* Unity uses the stddef.h header included in the C standard library for the
+ * "NULL" macro. Define this in order to disable the include of stddef.h. If you
+ * do this, you have to make sure to provide your own "NULL" definition.
+ */
+/* #define UNITY_EXCLUDE_STDDEF_H */
+
+/* Define this to enable the unity formatted print macro:
+ * "TEST_PRINTF"
+ */
+/* #define UNITY_INCLUDE_PRINT_FORMATTED */
+
+
+/* *************************** TOOLSET CUSTOMIZATION ***************************
+ * In addition to the options listed above, there are a number of other options
+ * which will come in handy to customize Unity's behavior for your specific
+ * toolchain. It is possible that you may not need to touch any of these but
+ * certain platforms, particularly those running in simulators, may need to jump
+ * through extra hoops to operate properly. These macros will help in those
+ * situations.
+ **************************************************************************** */
+
+/* By default, Unity prints its results to `stdout` as it runs. This works
+ * perfectly fine in most situations where you are using a native compiler for
+ * testing. It works on some simulators as well so long as they have `stdout`
+ * routed back to the command line. There are times, however, where the
+ * simulator will lack support for dumping results or you will want to route
+ * results elsewhere for other reasons. In these cases, you should define the
+ * `UNITY_OUTPUT_CHAR` macro. This macro accepts a single character at a time
+ * (as an `int`, since this is the parameter type of the standard C `putchar`
+ * function most commonly used). You may replace this with whatever function
+ * call you like.
+ *
+ * Example:
+ * Say you are forced to run your test suite on an embedded processor with no
+ * `stdout` option. You decide to route your test result output to a custom
+ * serial `RS232_putc()` function you wrote like thus:
+ */
+/* #define UNITY_OUTPUT_CHAR(a)                    RS232_putc(a) */
+/* #define UNITY_OUTPUT_CHAR_HEADER_DECLARATION    RS232_putc(int) */
+/* #define UNITY_OUTPUT_FLUSH()                    RS232_flush() */
+/* #define UNITY_OUTPUT_FLUSH_HEADER_DECLARATION   RS232_flush(void) */
+/* #define UNITY_OUTPUT_START()                    RS232_config(115200,1,8,0) */
+/* #define UNITY_OUTPUT_COMPLETE()                 RS232_close() */
+
+/* Some compilers require a custom attribute to be assigned to pointers, like
+ * `near` or `far`. In these cases, you can give Unity a safe default for these
+ * by defining this option with the attribute you would like.
+ *
+ * Example:
+ */
+/* #define UNITY_PTR_ATTRIBUTE __attribute__((far)) */
+/* #define UNITY_PTR_ATTRIBUTE near */
+
+/* Print execution time of each test when executed in verbose mode
+ *
+ * Example:
+ *
+ * TEST - PASS (10 ms)
+ */
+/* #define UNITY_INCLUDE_EXEC_TIME */
+
+#endif /* UNITY_CONFIG_H */
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/eclipse/error_parsers.txt b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/eclipse/error_parsers.txt
new file mode 100644
index 000000000..94e34ff38
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/eclipse/error_parsers.txt
@@ -0,0 +1,26 @@
+Eclipse error parsers
+=====================
+
+These are a godsend for extracting  & quickly navigating to
+warnings & error messages from console output. Unforunately
+I don't know how to write an Eclipse plugin so you'll have
+to add them manually.
+
+To add a console parser to Eclipse, go to Window --> Preferences
+--> C/C++ --> Build --> Settings. Click on the 'Error Parsers'
+tab and then click the 'Add...' button. See the table below for
+the parser fields to add.
+
+Eclipse will only parse the console output during a build, so
+running your unit tests must be part of your build process.
+Either add this to your make/rakefile, or add it as a post-
+build step in your Eclipse project settings.
+
+
+Unity unit test error parsers
+-----------------------------
+Severity    Pattern                                 File    Line    Description
+-------------------------------------------------------------------------------
+Error       (\.+)(.*?):(\d+):(.*?):FAIL: (.*)       $2      $3      $5
+Warning     (\.+)(.*?):(\d+):(.*?):IGNORE: (.*)     $2      $3      $5
+Warning     (\.+)(.*?):(\d+):(.*?):IGNORE\s*$       $2      $3      Ignored test
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/fixture/readme.md b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/fixture/readme.md
new file mode 100644
index 000000000..2e0c2f06b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/fixture/readme.md
@@ -0,0 +1,29 @@
+# Unity Fixtures
+
+This Framework is an optional add-on to Unity.  By including unity_framework.h in place of unity.h,
+you may now work with Unity in a manner similar to CppUTest.  This framework adds the concepts of 
+test groups and gives finer control of your tests over the command line.
+
+This framework is primarily supplied for those working through James Grenning's book on Embedded
+Test Driven Development, or those coming to Unity from CppUTest. We should note that using this
+framework glosses over some of the features of Unity, and makes it more difficult
+to integrate with other testing tools like Ceedling and CMock.
+
+# Dependency Notification
+
+Fixtures, by default, uses the Memory addon as well. This is to make it simple for those trying to
+follow along with James' book. Using them together is completely optional. You may choose to use 
+Fixtures without Memory handling by defining `UNITY_FIXTURE_NO_EXTRAS`. It will then stop automatically
+pulling in extras and leave you to do it as desired.
+
+# Usage information
+
+By default the test executables produced by Unity Fixtures run all tests once, but the behavior can
+be configured with command-line flags. Run the test executable with the `--help` flag for more
+information.
+
+It's possible to add a custom line at the end of the help message, typically to point to
+project-specific or company-specific unit test documentation. Define `UNITY_CUSTOM_HELP_MSG` to
+provide a custom message, e.g.:
+
+    #define UNITY_CUSTOM_HELP_MSG "If any test fails see https://example.com/troubleshooting"
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/fixture/src/unity_fixture.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/fixture/src/unity_fixture.c
new file mode 100644
index 000000000..c3dda7963
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/fixture/src/unity_fixture.c
@@ -0,0 +1,310 @@
+/* Copyright (c) 2010 James Grenning and Contributed to Unity Project
+ * ==========================================
+ *  Unity Project - A Test Framework for C
+ *  Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+ *  [Released under MIT License. Please refer to license.txt for details]
+ * ========================================== */
+
+#include "unity_fixture.h"
+#include "unity_internals.h"
+#include <string.h>
+
+struct UNITY_FIXTURE_T UnityFixture;
+
+/* If you decide to use the function pointer approach.
+ * Build with -D UNITY_OUTPUT_CHAR=outputChar and include <stdio.h>
+ * int (*outputChar)(int) = putchar; */
+
+void setUp(void)    { /*does nothing*/ }
+void tearDown(void) { /*does nothing*/ }
+
+static void announceTestRun(unsigned int runNumber)
+{
+    UnityPrint("Unity test run ");
+    UnityPrintNumberUnsigned(runNumber+1);
+    UnityPrint(" of ");
+    UnityPrintNumberUnsigned(UnityFixture.RepeatCount);
+    UNITY_PRINT_EOL();
+}
+
+int UnityMain(int argc, const char* argv[], void (*runAllTests)(void))
+{
+    int result = UnityGetCommandLineOptions(argc, argv);
+    unsigned int r;
+    if (result != 0)
+        return result;
+
+    for (r = 0; r < UnityFixture.RepeatCount; r++)
+    {
+        UnityBegin(argv[0]);
+        announceTestRun(r);
+        runAllTests();
+        if (!UnityFixture.Verbose) UNITY_PRINT_EOL();
+        UnityEnd();
+    }
+
+    return (int)Unity.TestFailures;
+}
+
+static int selected(const char* filter, const char* name)
+{
+    if (filter == 0)
+        return 1;
+    return strstr(name, filter) ? 1 : 0;
+}
+
+static int testSelected(const char* test)
+{
+    return selected(UnityFixture.NameFilter, test);
+}
+
+static int groupSelected(const char* group)
+{
+    return selected(UnityFixture.GroupFilter, group);
+}
+
+void UnityTestRunner(unityfunction* setup,
+                     unityfunction* testBody,
+                     unityfunction* teardown,
+                     const char* printableName,
+                     const char* group,
+                     const char* name,
+                     const char* file,
+                     unsigned int line)
+{
+    if (testSelected(name) && groupSelected(group))
+    {
+        Unity.TestFile = file;
+        Unity.CurrentTestName = printableName;
+        Unity.CurrentTestLineNumber = line;
+        if (UnityFixture.Verbose)
+        {
+            UnityPrint(printableName);
+        #ifndef UNITY_REPEAT_TEST_NAME
+            Unity.CurrentTestName = NULL;
+        #endif
+        }
+        else if (UnityFixture.Silent)
+        {
+            /* Do Nothing */
+        }
+        else
+        {
+            UNITY_OUTPUT_CHAR('.');
+        }
+
+        Unity.NumberOfTests++;
+        UnityPointer_Init();
+
+        UNITY_EXEC_TIME_START();
+
+        if (TEST_PROTECT())
+        {
+            setup();
+            testBody();
+        }
+        if (TEST_PROTECT())
+        {
+            teardown();
+        }
+        if (TEST_PROTECT())
+        {
+            UnityPointer_UndoAllSets();
+        }
+        UnityConcludeFixtureTest();
+    }
+}
+
+void UnityIgnoreTest(const char* printableName, const char* group, const char* name)
+{
+    if (testSelected(name) && groupSelected(group))
+    {
+        Unity.NumberOfTests++;
+        Unity.TestIgnores++;
+        if (UnityFixture.Verbose)
+        {
+            UnityPrint(printableName);
+            UNITY_PRINT_EOL();
+        }
+        else if (UnityFixture.Silent)
+        {
+            /* Do Nothing */
+        }
+        else
+        {
+            UNITY_OUTPUT_CHAR('!');
+        }
+    }
+}
+
+/*-------------------------------------------------------- */
+/*Automatic pointer restoration functions */
+struct PointerPair
+{
+    void** pointer;
+    void* old_value;
+};
+
+static struct PointerPair pointer_store[UNITY_MAX_POINTERS];
+static int pointer_index = 0;
+
+void UnityPointer_Init(void)
+{
+    pointer_index = 0;
+}
+
+void UnityPointer_Set(void** pointer, void* newValue, UNITY_LINE_TYPE line)
+{
+    if (pointer_index >= UNITY_MAX_POINTERS)
+    {
+        UNITY_TEST_FAIL(line, "Too many pointers set");
+    }
+    else
+    {
+        pointer_store[pointer_index].pointer = pointer;
+        pointer_store[pointer_index].old_value = *pointer;
+        *pointer = newValue;
+        pointer_index++;
+    }
+}
+
+void UnityPointer_UndoAllSets(void)
+{
+    while (pointer_index > 0)
+    {
+        pointer_index--;
+        *(pointer_store[pointer_index].pointer) =
+            pointer_store[pointer_index].old_value;
+    }
+}
+
+int UnityGetCommandLineOptions(int argc, const char* argv[])
+{
+    int i;
+    UnityFixture.Verbose = 0;
+    UnityFixture.Silent = 0;
+    UnityFixture.GroupFilter = 0;
+    UnityFixture.NameFilter = 0;
+    UnityFixture.RepeatCount = 1;
+
+    if (argc == 1)
+        return 0;
+
+    for (i = 1; i < argc; )
+    {
+        if (strcmp(argv[i], "-h") == 0 || strcmp(argv[i], "--help") == 0)
+        {
+            /* Usage */
+            UnityPrint("Runs a series of unit tests.");
+            UNITY_PRINT_EOL();
+            UNITY_PRINT_EOL();
+            UnityPrint("When no flag is specified, all tests are run.");
+            UNITY_PRINT_EOL();
+            UNITY_PRINT_EOL();
+            UnityPrint("Optional flags:");
+            UNITY_PRINT_EOL();
+            UnityPrint("  -v          Verbose output: show all tests executed even if they pass");
+            UNITY_PRINT_EOL();
+            UnityPrint("  -s          Silent mode: minimal output showing only test failures");
+            UNITY_PRINT_EOL();
+            UnityPrint("  -g NAME     Only run tests in groups that contain the string NAME");
+            UNITY_PRINT_EOL();
+            UnityPrint("  -n NAME     Only run tests whose name contains the string NAME");
+            UNITY_PRINT_EOL();
+            UnityPrint("  -r NUMBER   Repeatedly run all tests NUMBER times");
+            UNITY_PRINT_EOL();
+            UnityPrint("  -h, --help  Display this help message");
+            UNITY_PRINT_EOL();
+            UNITY_PRINT_EOL();
+#ifdef UNITY_CUSTOM_HELP_MSG
+            /* User-defined help message, e.g. to point to project-specific documentation */
+            UnityPrint(UNITY_CUSTOM_HELP_MSG);
+            UNITY_PRINT_EOL();
+#else
+            /* Default help suffix if a custom one is not defined */
+            UnityPrint("More information about Unity: https://www.throwtheswitch.org/unity");
+            UNITY_PRINT_EOL();
+#endif
+            return 1;  /* Exit without running the tests */
+        }
+        else if (strcmp(argv[i], "-v") == 0)
+        {
+            UnityFixture.Verbose = 1;
+            i++;
+        }
+        else if (strcmp(argv[i], "-s") == 0)
+        {
+            UnityFixture.Silent = 1;
+            i++;
+        }
+        else if (strcmp(argv[i], "-g") == 0)
+        {
+            i++;
+            if (i >= argc)
+                return 1;
+            UnityFixture.GroupFilter = argv[i];
+            i++;
+        }
+        else if (strcmp(argv[i], "-n") == 0)
+        {
+            i++;
+            if (i >= argc)
+                return 1;
+            UnityFixture.NameFilter = argv[i];
+            i++;
+        }
+        else if (strcmp(argv[i], "-r") == 0)
+        {
+            UnityFixture.RepeatCount = 2;
+            i++;
+            if (i < argc)
+            {
+                if (*(argv[i]) >= '0' && *(argv[i]) <= '9')
+                {
+                    unsigned int digit = 0;
+                    UnityFixture.RepeatCount = 0;
+                    while (argv[i][digit] >= '0' && argv[i][digit] <= '9')
+                    {
+                        UnityFixture.RepeatCount *= 10;
+                        UnityFixture.RepeatCount += (unsigned int)argv[i][digit++] - '0';
+                    }
+                    i++;
+                }
+            }
+        }
+        else
+        {
+            /* ignore unknown parameter */
+            i++;
+        }
+    }
+    return 0;
+}
+
+void UnityConcludeFixtureTest(void)
+{
+    if (Unity.CurrentTestIgnored)
+    {
+        Unity.TestIgnores++;
+        UNITY_PRINT_EOL();
+    }
+    else if (!Unity.CurrentTestFailed)
+    {
+        if (UnityFixture.Verbose)
+        {
+            UnityPrint(" ");
+            UnityPrint(UnityStrPass);
+            UNITY_EXEC_TIME_STOP();
+            UNITY_PRINT_EXEC_TIME();
+            UNITY_PRINT_EOL();
+        }
+    }
+    else /* Unity.CurrentTestFailed */
+    {
+        Unity.TestFailures++;
+        UNITY_PRINT_EOL();
+    }
+
+    Unity.CurrentTestFailed = 0;
+    Unity.CurrentTestIgnored = 0;
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/fixture/src/unity_fixture.h b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/fixture/src/unity_fixture.h
new file mode 100644
index 000000000..4cc403ef0
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/fixture/src/unity_fixture.h
@@ -0,0 +1,83 @@
+/* Copyright (c) 2010 James Grenning and Contributed to Unity Project
+ * ==========================================
+ *  Unity Project - A Test Framework for C
+ *  Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+ *  [Released under MIT License. Please refer to license.txt for details]
+ * ========================================== */
+
+#ifndef UNITY_FIXTURE_H_
+#define UNITY_FIXTURE_H_
+
+#include "unity.h"
+#include "unity_internals.h"
+#include "unity_fixture_internals.h"
+
+#ifndef UNITY_FIXTURE_NO_EXTRAS
+#include "unity_memory.h"
+#endif
+
+int UnityMain(int argc, const char* argv[], void (*runAllTests)(void));
+
+
+#define TEST_GROUP(group)\
+    static const char* TEST_GROUP_##group = #group
+
+#define TEST_SETUP(group) void TEST_##group##_SETUP(void);\
+    void TEST_##group##_SETUP(void)
+
+#define TEST_TEAR_DOWN(group) void TEST_##group##_TEAR_DOWN(void);\
+    void TEST_##group##_TEAR_DOWN(void)
+
+
+#define TEST(group, name) \
+    void TEST_##group##_##name##_(void);\
+    void TEST_##group##_##name##_run(void);\
+    void TEST_##group##_##name##_run(void)\
+    {\
+        UnityTestRunner(TEST_##group##_SETUP,\
+            TEST_##group##_##name##_,\
+            TEST_##group##_TEAR_DOWN,\
+            "TEST(" #group ", " #name ")",\
+            TEST_GROUP_##group, #name,\
+            __FILE__, __LINE__);\
+    }\
+    void  TEST_##group##_##name##_(void)
+
+#define IGNORE_TEST(group, name) \
+    void TEST_##group##_##name##_(void);\
+    void TEST_##group##_##name##_run(void);\
+    void TEST_##group##_##name##_run(void)\
+    {\
+        UnityIgnoreTest("IGNORE_TEST(" #group ", " #name ")", TEST_GROUP_##group, #name);\
+    }\
+    void TEST_##group##_##name##_(void)
+
+/* Call this for each test, insider the group runner */
+#define RUN_TEST_CASE(group, name) \
+    { void TEST_##group##_##name##_run(void);\
+      TEST_##group##_##name##_run(); }
+
+/* This goes at the bottom of each test file or in a separate c file */
+#define TEST_GROUP_RUNNER(group)\
+    void TEST_##group##_GROUP_RUNNER(void);\
+    void TEST_##group##_GROUP_RUNNER(void)
+
+/* Call this from main */
+#define RUN_TEST_GROUP(group)\
+    { void TEST_##group##_GROUP_RUNNER(void);\
+      TEST_##group##_GROUP_RUNNER(); }
+
+/* CppUTest Compatibility Macros */
+#ifndef UNITY_EXCLUDE_CPPUTEST_ASSERTS
+/* Sets a pointer and automatically restores it to its old value after teardown */
+#define UT_PTR_SET(ptr, newPointerValue)               UnityPointer_Set((void**)&(ptr), (void*)(newPointerValue), __LINE__)
+#define TEST_ASSERT_POINTERS_EQUAL(expected, actual)   TEST_ASSERT_EQUAL_PTR((expected), (actual))
+#define TEST_ASSERT_BYTES_EQUAL(expected, actual)      TEST_ASSERT_EQUAL_HEX8(0xff & (expected), 0xff & (actual))
+#define FAIL(message)                                  TEST_FAIL_MESSAGE((message))
+#define CHECK(condition)                               TEST_ASSERT_TRUE((condition))
+#define LONGS_EQUAL(expected, actual)                  TEST_ASSERT_EQUAL_INT((expected), (actual))
+#define STRCMP_EQUAL(expected, actual)                 TEST_ASSERT_EQUAL_STRING((expected), (actual))
+#define DOUBLES_EQUAL(expected, actual, delta)         TEST_ASSERT_DOUBLE_WITHIN((delta), (expected), (actual))
+#endif
+
+#endif /* UNITY_FIXTURE_H_ */
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/fixture/src/unity_fixture_internals.h b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/fixture/src/unity_fixture_internals.h
new file mode 100644
index 000000000..1c51aa986
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/fixture/src/unity_fixture_internals.h
@@ -0,0 +1,50 @@
+/* Copyright (c) 2010 James Grenning and Contributed to Unity Project
+ * ==========================================
+ *  Unity Project - A Test Framework for C
+ *  Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+ *  [Released under MIT License. Please refer to license.txt for details]
+ * ========================================== */
+
+#ifndef UNITY_FIXTURE_INTERNALS_H_
+#define UNITY_FIXTURE_INTERNALS_H_
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+struct UNITY_FIXTURE_T
+{
+    int Verbose;
+    int Silent;
+    unsigned int RepeatCount;
+    const char* NameFilter;
+    const char* GroupFilter;
+};
+extern struct UNITY_FIXTURE_T UnityFixture;
+
+typedef void unityfunction(void);
+void UnityTestRunner(unityfunction* setup,
+                     unityfunction* testBody,
+                     unityfunction* teardown,
+                     const char* printableName,
+                     const char* group,
+                     const char* name,
+                     const char* file, unsigned int line);
+
+void UnityIgnoreTest(const char* printableName, const char* group, const char* name);
+int UnityGetCommandLineOptions(int argc, const char* argv[]);
+void UnityConcludeFixtureTest(void);
+
+void UnityPointer_Set(void** pointer, void* newValue, UNITY_LINE_TYPE line);
+void UnityPointer_UndoAllSets(void);
+void UnityPointer_Init(void);
+#ifndef UNITY_MAX_POINTERS
+#define UNITY_MAX_POINTERS 5
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* UNITY_FIXTURE_INTERNALS_H_ */
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/fixture/test/Makefile b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/fixture/test/Makefile
new file mode 100644
index 000000000..bbe32410e
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/fixture/test/Makefile
@@ -0,0 +1,72 @@
+CC = gcc
+ifeq ($(shell uname -s), Darwin)
+CC = clang
+endif
+#DEBUG = -O0 -g
+CFLAGS += -std=c99 -pedantic -Wall -Wextra -Werror -DUNITY_FIXTURE_NO_EXTRAS
+CFLAGS += $(DEBUG)
+SRC = ../src/unity_fixture.c \
+      ../../../src/unity.c   \
+      unity_fixture_Test.c   \
+      unity_fixture_TestRunner.c \
+      main/AllTests.c
+
+INC_DIR = -I../src -I../../../src/
+BUILD_DIR = ../build
+TARGET = ../build/fixture_tests.exe
+
+all: default noStdlibMalloc 32bits
+
+default: $(BUILD_DIR)
+	$(CC) $(CFLAGS) $(DEFINES) $(SRC) $(INC_DIR) -o $(TARGET) -D UNITY_SUPPORT_64
+	@ echo "default build"
+	./$(TARGET)
+
+32bits: $(BUILD_DIR)
+	$(CC) $(CFLAGS) $(DEFINES) $(SRC) $(INC_DIR) -o $(TARGET) -m32
+	@ echo "32bits build"
+	./$(TARGET)
+
+noStdlibMalloc: $(BUILD_DIR)
+	$(CC) $(CFLAGS) $(DEFINES) $(SRC) $(INC_DIR) -o $(TARGET) -D UNITY_EXCLUDE_STDLIB_MALLOC
+	@ echo "build with noStdlibMalloc"
+	./$(TARGET)
+
+C89: CFLAGS += -D UNITY_EXCLUDE_STDINT_H # C89 did not have type 'long long', <stdint.h>
+C89: $(BUILD_DIR)
+	$(CC) $(CFLAGS) $(DEFINES) $(SRC) $(INC_DIR) -o $(TARGET) -std=c89 && ./$(TARGET)
+	$(CC) $(CFLAGS) $(DEFINES) $(SRC) $(INC_DIR) -o $(TARGET) -D UNITY_EXCLUDE_STDLIB_MALLOC -std=c89
+	./$(TARGET)
+
+$(BUILD_DIR):
+	mkdir -p $(BUILD_DIR)
+
+clean:
+	rm -f $(TARGET) $(BUILD_DIR)/*.gc*
+
+cov: $(BUILD_DIR)
+	cd $(BUILD_DIR) && \
+	$(CC) $(DEFINES) $(foreach i, $(SRC), ../test/$(i)) $(INC_DIR) -o $(TARGET) -fprofile-arcs -ftest-coverage
+	rm -f $(BUILD_DIR)/*.gcda
+	./$(TARGET) > /dev/null ; ./$(TARGET) -v > /dev/null
+	cd $(BUILD_DIR) && \
+	gcov unity_fixture.c | head -3
+	grep '###' $(BUILD_DIR)/unity_fixture.c.gcov -C2 || true # Show uncovered lines
+
+# These extended flags DO get included before any target build runs
+CFLAGS += -Wbad-function-cast
+CFLAGS += -Wcast-qual
+CFLAGS += -Wconversion
+CFLAGS += -Wformat=2
+CFLAGS += -Wmissing-prototypes
+CFLAGS += -Wold-style-definition
+CFLAGS += -Wpointer-arith
+CFLAGS += -Wshadow
+CFLAGS += -Wstrict-overflow=5
+CFLAGS += -Wstrict-prototypes
+CFLAGS += -Wswitch-default
+CFLAGS += -Wundef
+CFLAGS += -Wno-error=undef  # Warning only, this should not stop the build
+CFLAGS += -Wunreachable-code
+CFLAGS += -Wunused
+CFLAGS += -fstrict-aliasing
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/fixture/test/main/AllTests.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/fixture/test/main/AllTests.c
new file mode 100644
index 000000000..30242cb30
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/fixture/test/main/AllTests.c
@@ -0,0 +1,20 @@
+/* Copyright (c) 2010 James Grenning and Contributed to Unity Project
+ * ==========================================
+ *  Unity Project - A Test Framework for C
+ *  Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+ *  [Released under MIT License. Please refer to license.txt for details]
+ * ========================================== */
+
+#include "unity_fixture.h"
+
+static void runAllTests(void)
+{
+    RUN_TEST_GROUP(UnityFixture);
+    RUN_TEST_GROUP(UnityCommandOptions);
+}
+
+int main(int argc, const char* argv[])
+{
+    return UnityMain(argc, argv, runAllTests);
+}
+
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/fixture/test/template_fixture_tests.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/fixture/test/template_fixture_tests.c
new file mode 100644
index 000000000..18bbb89e8
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/fixture/test/template_fixture_tests.c
@@ -0,0 +1,39 @@
+/* Copyright (c) 2010 James Grenning and Contributed to Unity Project
+ * ==========================================
+ *  Unity Project - A Test Framework for C
+ *  Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+ *  [Released under MIT License. Please refer to license.txt for details]
+ * ========================================== */
+
+#include "unity_fixture.h"
+
+static int data = -1;
+
+TEST_GROUP(mygroup);
+
+TEST_SETUP(mygroup)
+{
+    data = 0;
+}
+
+TEST_TEAR_DOWN(mygroup)
+{
+    data = -1;
+}
+
+TEST(mygroup, test1)
+{
+    TEST_ASSERT_EQUAL_INT(0, data);
+}
+
+TEST(mygroup, test2)
+{
+    TEST_ASSERT_EQUAL_INT(0, data);
+    data = 5;
+}
+
+TEST(mygroup, test3)
+{
+    data = 7;
+    TEST_ASSERT_EQUAL_INT(7, data);
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/fixture/test/unity_fixture_Test.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/fixture/test/unity_fixture_Test.c
new file mode 100644
index 000000000..1422b4896
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/fixture/test/unity_fixture_Test.c
@@ -0,0 +1,245 @@
+/* Copyright (c) 2010 James Grenning and Contributed to Unity Project
+ * ==========================================
+ *  Unity Project - A Test Framework for C
+ *  Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+ *  [Released under MIT License. Please refer to license.txt for details]
+ * ========================================== */
+
+#include "unity_fixture.h"
+#include <stdlib.h>
+#include <string.h>
+
+TEST_GROUP(UnityFixture);
+
+TEST_SETUP(UnityFixture)
+{
+}
+
+TEST_TEAR_DOWN(UnityFixture)
+{
+}
+
+static int* pointer1 = 0;
+static int* pointer2 = (int*)2;
+static int* pointer3 = (int*)3;
+static int int1;
+static int int2;
+static int int3;
+static int int4;
+
+TEST(UnityFixture, PointerSetting)
+{
+    TEST_ASSERT_POINTERS_EQUAL(pointer1, 0);
+    UT_PTR_SET(pointer1, &int1);
+    UT_PTR_SET(pointer2, &int2);
+    UT_PTR_SET(pointer3, &int3);
+    TEST_ASSERT_POINTERS_EQUAL(pointer1, &int1);
+    TEST_ASSERT_POINTERS_EQUAL(pointer2, &int2);
+    TEST_ASSERT_POINTERS_EQUAL(pointer3, &int3);
+    UT_PTR_SET(pointer1, &int4);
+    UnityPointer_UndoAllSets();
+    TEST_ASSERT_POINTERS_EQUAL(pointer1, 0);
+    TEST_ASSERT_POINTERS_EQUAL(pointer2, (int*)2);
+    TEST_ASSERT_POINTERS_EQUAL(pointer3, (int*)3);
+}
+
+static char *p1;
+static char *p2;
+
+TEST(UnityFixture, PointerSet)
+{
+    char c1;
+    char c2;
+    char newC1;
+    char newC2;
+    p1 = &c1;
+    p2 = &c2;
+
+    UnityPointer_Init();
+    UT_PTR_SET(p1, &newC1);
+    UT_PTR_SET(p2, &newC2);
+    TEST_ASSERT_POINTERS_EQUAL(&newC1, p1);
+    TEST_ASSERT_POINTERS_EQUAL(&newC2, p2);
+    UnityPointer_UndoAllSets();
+    TEST_ASSERT_POINTERS_EQUAL(&c1, p1);
+    TEST_ASSERT_POINTERS_EQUAL(&c2, p2);
+}
+
+TEST(UnityFixture, FreeNULLSafety)
+{
+    free(NULL);
+}
+
+TEST(UnityFixture, ConcludeTestIncrementsFailCount)
+{
+    UNITY_UINT savedFails = Unity.TestFailures;
+    UNITY_UINT savedIgnores = Unity.TestIgnores;
+    Unity.CurrentTestFailed = 1;
+    UnityConcludeFixtureTest(); /* Resets TestFailed for this test to pass */
+    Unity.CurrentTestIgnored = 1;
+    UnityConcludeFixtureTest(); /* Resets TestIgnored */
+    TEST_ASSERT_EQUAL(savedFails + 1, Unity.TestFailures);
+    TEST_ASSERT_EQUAL(savedIgnores + 1, Unity.TestIgnores);
+    Unity.TestFailures = savedFails;
+    Unity.TestIgnores = savedIgnores;
+}
+
+/*------------------------------------------------------------ */
+
+TEST_GROUP(UnityCommandOptions);
+
+static int savedVerbose;
+static unsigned int savedRepeat;
+static const char* savedName;
+static const char* savedGroup;
+
+TEST_SETUP(UnityCommandOptions)
+{
+    savedVerbose = UnityFixture.Verbose;
+    savedRepeat = UnityFixture.RepeatCount;
+    savedName = UnityFixture.NameFilter;
+    savedGroup = UnityFixture.GroupFilter;
+}
+
+TEST_TEAR_DOWN(UnityCommandOptions)
+{
+    UnityFixture.Verbose = savedVerbose;
+    UnityFixture.RepeatCount= savedRepeat;
+    UnityFixture.NameFilter = savedName;
+    UnityFixture.GroupFilter = savedGroup;
+}
+
+
+static const char* noOptions[] = {
+        "testrunner.exe"
+};
+
+TEST(UnityCommandOptions, DefaultOptions)
+{
+    UnityGetCommandLineOptions(1, noOptions);
+    TEST_ASSERT_EQUAL(0, UnityFixture.Verbose);
+    TEST_ASSERT_POINTERS_EQUAL(0, UnityFixture.GroupFilter);
+    TEST_ASSERT_POINTERS_EQUAL(0, UnityFixture.NameFilter);
+    TEST_ASSERT_EQUAL(1, UnityFixture.RepeatCount);
+}
+
+static const char* verbose[] = {
+        "testrunner.exe",
+        "-v"
+};
+
+TEST(UnityCommandOptions, OptionVerbose)
+{
+    TEST_ASSERT_EQUAL(0, UnityGetCommandLineOptions(2, verbose));
+    TEST_ASSERT_EQUAL(1, UnityFixture.Verbose);
+}
+
+static const char* group[] = {
+        "testrunner.exe",
+        "-g", "groupname"
+};
+
+TEST(UnityCommandOptions, OptionSelectTestByGroup)
+{
+    TEST_ASSERT_EQUAL(0, UnityGetCommandLineOptions(3, group));
+    STRCMP_EQUAL("groupname", UnityFixture.GroupFilter);
+}
+
+static const char* name[] = {
+        "testrunner.exe",
+        "-n", "testname"
+};
+
+TEST(UnityCommandOptions, OptionSelectTestByName)
+{
+    TEST_ASSERT_EQUAL(0, UnityGetCommandLineOptions(3, name));
+    STRCMP_EQUAL("testname", UnityFixture.NameFilter);
+}
+
+static const char* repeat[] = {
+        "testrunner.exe",
+        "-r", "99"
+};
+
+TEST(UnityCommandOptions, OptionSelectRepeatTestsDefaultCount)
+{
+    TEST_ASSERT_EQUAL(0, UnityGetCommandLineOptions(2, repeat));
+    TEST_ASSERT_EQUAL(2, UnityFixture.RepeatCount);
+}
+
+TEST(UnityCommandOptions, OptionSelectRepeatTestsSpecificCount)
+{
+    TEST_ASSERT_EQUAL(0, UnityGetCommandLineOptions(3, repeat));
+    TEST_ASSERT_EQUAL(99, UnityFixture.RepeatCount);
+}
+
+static const char* multiple[] = {
+        "testrunner.exe",
+        "-v",
+        "-g", "groupname",
+        "-n", "testname",
+        "-r", "98"
+};
+
+TEST(UnityCommandOptions, MultipleOptions)
+{
+    TEST_ASSERT_EQUAL(0, UnityGetCommandLineOptions(8, multiple));
+    TEST_ASSERT_EQUAL(1, UnityFixture.Verbose);
+    STRCMP_EQUAL("groupname", UnityFixture.GroupFilter);
+    STRCMP_EQUAL("testname", UnityFixture.NameFilter);
+    TEST_ASSERT_EQUAL(98, UnityFixture.RepeatCount);
+}
+
+static const char* dashRNotLast[] = {
+        "testrunner.exe",
+        "-v",
+        "-g", "gggg",
+        "-r",
+        "-n", "tttt",
+};
+
+TEST(UnityCommandOptions, MultipleOptionsDashRNotLastAndNoValueSpecified)
+{
+    TEST_ASSERT_EQUAL(0, UnityGetCommandLineOptions(7, dashRNotLast));
+    TEST_ASSERT_EQUAL(1, UnityFixture.Verbose);
+    STRCMP_EQUAL("gggg", UnityFixture.GroupFilter);
+    STRCMP_EQUAL("tttt", UnityFixture.NameFilter);
+    TEST_ASSERT_EQUAL(2, UnityFixture.RepeatCount);
+}
+
+static const char* unknownCommand[] = {
+        "testrunner.exe",
+        "-v",
+        "-g", "groupname",
+        "-n", "testname",
+        "-r", "98",
+        "-z"
+};
+TEST(UnityCommandOptions, UnknownCommandIsIgnored)
+{
+    TEST_ASSERT_EQUAL(0, UnityGetCommandLineOptions(9, unknownCommand));
+    TEST_ASSERT_EQUAL(1, UnityFixture.Verbose);
+    STRCMP_EQUAL("groupname", UnityFixture.GroupFilter);
+    STRCMP_EQUAL("testname", UnityFixture.NameFilter);
+    TEST_ASSERT_EQUAL(98, UnityFixture.RepeatCount);
+}
+
+TEST(UnityCommandOptions, GroupOrNameFilterWithoutStringFails)
+{
+    TEST_ASSERT_EQUAL(1, UnityGetCommandLineOptions(3, unknownCommand));
+    TEST_ASSERT_EQUAL(1, UnityGetCommandLineOptions(5, unknownCommand));
+    TEST_ASSERT_EQUAL(1, UnityMain(3, unknownCommand, NULL));
+}
+
+TEST(UnityCommandOptions, GroupFilterReallyFilters)
+{
+    UNITY_UINT saved = Unity.NumberOfTests;
+    TEST_ASSERT_EQUAL(0, UnityGetCommandLineOptions(4, unknownCommand));
+    UnityIgnoreTest(NULL, "non-matching", NULL);
+    TEST_ASSERT_EQUAL(saved, Unity.NumberOfTests);
+}
+
+IGNORE_TEST(UnityCommandOptions, TestShouldBeIgnored)
+{
+    TEST_FAIL_MESSAGE("This test should not run!");
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/fixture/test/unity_fixture_TestRunner.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/fixture/test/unity_fixture_TestRunner.c
new file mode 100644
index 000000000..7b78c49c0
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/fixture/test/unity_fixture_TestRunner.c
@@ -0,0 +1,32 @@
+/* Copyright (c) 2010 James Grenning and Contributed to Unity Project
+ * ==========================================
+ *  Unity Project - A Test Framework for C
+ *  Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+ *  [Released under MIT License. Please refer to license.txt for details]
+ * ========================================== */
+
+#include "unity_fixture.h"
+
+TEST_GROUP_RUNNER(UnityFixture)
+{
+    RUN_TEST_CASE(UnityFixture, PointerSetting);
+    RUN_TEST_CASE(UnityFixture, PointerSet);
+    RUN_TEST_CASE(UnityFixture, FreeNULLSafety);
+    RUN_TEST_CASE(UnityFixture, ConcludeTestIncrementsFailCount);
+}
+
+TEST_GROUP_RUNNER(UnityCommandOptions)
+{
+    RUN_TEST_CASE(UnityCommandOptions, DefaultOptions);
+    RUN_TEST_CASE(UnityCommandOptions, OptionVerbose);
+    RUN_TEST_CASE(UnityCommandOptions, OptionSelectTestByGroup);
+    RUN_TEST_CASE(UnityCommandOptions, OptionSelectTestByName);
+    RUN_TEST_CASE(UnityCommandOptions, OptionSelectRepeatTestsDefaultCount);
+    RUN_TEST_CASE(UnityCommandOptions, OptionSelectRepeatTestsSpecificCount);
+    RUN_TEST_CASE(UnityCommandOptions, MultipleOptions);
+    RUN_TEST_CASE(UnityCommandOptions, MultipleOptionsDashRNotLastAndNoValueSpecified);
+    RUN_TEST_CASE(UnityCommandOptions, UnknownCommandIsIgnored);
+    RUN_TEST_CASE(UnityCommandOptions, GroupOrNameFilterWithoutStringFails);
+    RUN_TEST_CASE(UnityCommandOptions, GroupFilterReallyFilters);
+    RUN_TEST_CASE(UnityCommandOptions, TestShouldBeIgnored);
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/memory/readme.md b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/memory/readme.md
new file mode 100644
index 000000000..37769825c
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/memory/readme.md
@@ -0,0 +1,49 @@
+# Unity Memory
+
+This Framework is an optional add-on to Unity.  By including unity.h and then
+unity_memory.h, you have the added ability to track malloc and free calls. This 
+addon requires that the stdlib functions be overridden by its own defines. These
+defines will still malloc / realloc / free etc, but will also track the calls
+in order to ensure that you don't have any memory leaks in your programs.
+
+Note that this is only useful in situations where a unit is in charge of both
+the allocation and deallocation of memory. When it is not symmetric, unit testing 
+can report a number of false failures. A more advanced runtime tool is required to
+track complete system memory handling.
+
+# Module API
+
+## `UnityMalloc_StartTest` and `UnityMalloc_EndTest`
+
+These must be called at the beginning and end of each test. For simplicity, they can
+be added to `setUp` and `tearDown` in order to do their job. When using the test
+runner generator scripts, these will be automatically added to the runner whenever
+unity_memory.h is included.
+
+## `UnityMalloc_MakeMallocFailAfterCount`
+
+This can be called from the tests themselves. Passing this function a number will
+force the reference counter to start keeping track of malloc calls. During that test,
+if the number of malloc calls exceeds the number given, malloc will immediately 
+start returning `NULL`. This allows you to test error conditions. Think of it as a 
+simplified mock.
+
+# Configuration
+
+## `UNITY_MALLOC` and `UNITY_FREE`
+
+By default, this module tries to use the real stdlib `malloc` and `free` internally. 
+If you would prefer it to use something else, like FreeRTOS's `pvPortMalloc` and 
+`pvPortFree`, then you can use these defines to make it so.
+
+## `UNITY_EXCLUDE_STDLIB_MALLOC`
+
+If you would like this library to ignore stdlib or other heap engines completely, and
+manage the memory on its own, then define this. All memory will be handled internally
+(and at likely lower overhead). Note that this is not a very featureful memory manager,
+but is sufficient for most testing purposes.
+
+## `UNITY_INTERNAL_HEAP_SIZE_BYTES`
+
+When using the built-in memory manager (see `UNITY_EXCLUDE_STDLIB_MALLOC`) this define
+allows you to set the heap size this library will use to manage the memory.
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/memory/src/unity_memory.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/memory/src/unity_memory.c
new file mode 100644
index 000000000..e4dc6654f
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/memory/src/unity_memory.c
@@ -0,0 +1,202 @@
+/* ==========================================
+ *  Unity Project - A Test Framework for C
+ *  Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+ *  [Released under MIT License. Please refer to license.txt for details]
+ * ========================================== */
+
+#include "unity.h"
+#include "unity_memory.h"
+#include <string.h>
+
+#define MALLOC_DONT_FAIL -1
+static int malloc_count;
+static int malloc_fail_countdown = MALLOC_DONT_FAIL;
+
+void UnityMalloc_StartTest(void)
+{
+    malloc_count = 0;
+    malloc_fail_countdown = MALLOC_DONT_FAIL;
+}
+
+void UnityMalloc_EndTest(void)
+{
+    malloc_fail_countdown = MALLOC_DONT_FAIL;
+    if (malloc_count != 0)
+    {
+        UNITY_TEST_FAIL(Unity.CurrentTestLineNumber, "This test leaks!");
+    }
+}
+
+void UnityMalloc_MakeMallocFailAfterCount(int countdown)
+{
+    malloc_fail_countdown = countdown;
+}
+
+/* These definitions are always included from unity_fixture_malloc_overrides.h */
+/* We undef to use them or avoid conflict with <stdlib.h> per the C standard */
+#undef malloc
+#undef free
+#undef calloc
+#undef realloc
+
+#ifdef UNITY_EXCLUDE_STDLIB_MALLOC
+static unsigned char unity_heap[UNITY_INTERNAL_HEAP_SIZE_BYTES];
+static size_t heap_index;
+#else
+#include <stdlib.h>
+#endif
+
+typedef struct GuardBytes
+{
+    size_t size;
+    size_t guard_space;
+} Guard;
+
+#define UNITY_MALLOC_ALIGNMENT (UNITY_POINTER_WIDTH / 8)
+static const char end[] = "END";
+
+static size_t unity_size_round_up(size_t size)
+{
+    size_t rounded_size;
+
+    rounded_size = ((size + UNITY_MALLOC_ALIGNMENT - 1) / UNITY_MALLOC_ALIGNMENT) * UNITY_MALLOC_ALIGNMENT;
+
+    return rounded_size;
+}
+
+void* unity_malloc(size_t size)
+{
+    char* mem;
+    Guard* guard;
+    size_t total_size;
+
+    total_size = sizeof(Guard) + unity_size_round_up(size + sizeof(end));
+
+    if (malloc_fail_countdown != MALLOC_DONT_FAIL)
+    {
+        if (malloc_fail_countdown == 0)
+            return NULL;
+        malloc_fail_countdown--;
+    }
+
+    if (size == 0) return NULL;
+#ifdef UNITY_EXCLUDE_STDLIB_MALLOC
+    if (heap_index + total_size > UNITY_INTERNAL_HEAP_SIZE_BYTES)
+    {
+        guard = NULL;
+    }
+    else
+    {
+        /* We know we can get away with this cast because we aligned memory already */
+        guard = (Guard*)(void*)(&unity_heap[heap_index]);
+        heap_index += total_size;
+    }
+#else
+    guard = (Guard*)UNITY_MALLOC(total_size);
+#endif
+    if (guard == NULL) return NULL;
+    malloc_count++;
+    guard->size = size;
+    guard->guard_space = 0;
+    mem = (char*)&(guard[1]);
+    memcpy(&mem[size], end, sizeof(end));
+
+    return (void*)mem;
+}
+
+static int isOverrun(void* mem)
+{
+    Guard* guard = (Guard*)mem;
+    char* memAsChar = (char*)mem;
+    guard--;
+
+    return guard->guard_space != 0 || strcmp(&memAsChar[guard->size], end) != 0;
+}
+
+static void release_memory(void* mem)
+{
+    Guard* guard = (Guard*)mem;
+    guard--;
+
+    malloc_count--;
+#ifdef UNITY_EXCLUDE_STDLIB_MALLOC
+    {
+        size_t block_size;
+
+        block_size = unity_size_round_up(guard->size + sizeof(end));
+
+        if (mem == unity_heap + heap_index - block_size)
+        {
+            heap_index -= (sizeof(Guard) + block_size);
+        }
+    }
+#else
+    UNITY_FREE(guard);
+#endif
+}
+
+void unity_free(void* mem)
+{
+    int overrun;
+
+    if (mem == NULL)
+    {
+        return;
+    }
+
+    overrun = isOverrun(mem);
+    release_memory(mem);
+    if (overrun)
+    {
+        UNITY_TEST_FAIL(Unity.CurrentTestLineNumber, "Buffer overrun detected during free()");
+    }
+}
+
+void* unity_calloc(size_t num, size_t size)
+{
+    void* mem = unity_malloc(num * size);
+    if (mem == NULL) return NULL;
+    memset(mem, 0, num * size);
+    return mem;
+}
+
+void* unity_realloc(void* oldMem, size_t size)
+{
+    Guard* guard = (Guard*)oldMem;
+    void* newMem;
+
+    if (oldMem == NULL) return unity_malloc(size);
+
+    guard--;
+    if (isOverrun(oldMem))
+    {
+        release_memory(oldMem);
+        UNITY_TEST_FAIL(Unity.CurrentTestLineNumber, "Buffer overrun detected during realloc()");
+    }
+
+    if (size == 0)
+    {
+        release_memory(oldMem);
+        return NULL;
+    }
+
+    if (guard->size >= size) return oldMem;
+
+#ifdef UNITY_EXCLUDE_STDLIB_MALLOC /* Optimization if memory is expandable */
+    {
+        size_t old_total_size = unity_size_round_up(guard->size + sizeof(end));
+
+        if ((oldMem == unity_heap + heap_index - old_total_size) &&
+            ((heap_index - old_total_size + unity_size_round_up(size + sizeof(end))) <= UNITY_INTERNAL_HEAP_SIZE_BYTES))
+        {
+            release_memory(oldMem);    /* Not thread-safe, like unity_heap generally */
+            return unity_malloc(size); /* No memcpy since data is in place */
+        }
+    }
+#endif
+    newMem = unity_malloc(size);
+    if (newMem == NULL) return NULL; /* Do not release old memory */
+    memcpy(newMem, oldMem, guard->size);
+    release_memory(oldMem);
+    return newMem;
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/memory/src/unity_memory.h b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/memory/src/unity_memory.h
new file mode 100644
index 000000000..ccdb826fe
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/memory/src/unity_memory.h
@@ -0,0 +1,60 @@
+/* ==========================================
+ *  Unity Project - A Test Framework for C
+ *  Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+ *  [Released under MIT License. Please refer to license.txt for details]
+ * ========================================== */
+
+#ifndef UNITY_MEMORY_OVERRIDES_H_
+#define UNITY_MEMORY_OVERRIDES_H_
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include <stddef.h>
+
+#ifdef UNITY_EXCLUDE_STDLIB_MALLOC
+/* Define this macro to remove the use of stdlib.h, malloc, and free.
+ * Many embedded systems do not have a heap or malloc/free by default.
+ * This internal unity_malloc() provides allocated memory deterministically from
+ * the end of an array only, unity_free() only releases from end-of-array,
+ * blocks are not coalesced, and memory not freed in LIFO order is stranded. */
+    #ifndef UNITY_INTERNAL_HEAP_SIZE_BYTES
+    #define UNITY_INTERNAL_HEAP_SIZE_BYTES 256
+    #endif
+#endif
+
+/* These functions are used by Unity to allocate and release memory
+ * on the heap and can be overridden with platform-specific implementations.
+ * For example, when using FreeRTOS UNITY_MALLOC becomes pvPortMalloc()
+ * and UNITY_FREE becomes vPortFree(). */
+#if !defined(UNITY_MALLOC) || !defined(UNITY_FREE)
+    #include <stdlib.h>
+    #define UNITY_MALLOC(size) malloc(size)
+    #define UNITY_FREE(ptr)    free(ptr)
+#else
+    extern void* UNITY_MALLOC(size_t size);
+    extern void UNITY_FREE(void* ptr);
+#endif
+
+#define malloc  unity_malloc
+#define calloc  unity_calloc
+#define realloc unity_realloc
+#define free    unity_free
+
+void* unity_malloc(size_t size);
+void* unity_calloc(size_t num, size_t size);
+void* unity_realloc(void * oldMem, size_t size);
+void unity_free(void * mem);
+
+/* You must compile with malloc replacement, as defined in unity_fixture_malloc_overrides.h */
+void UnityMalloc_StartTest(void);
+void UnityMalloc_EndTest(void);
+void UnityMalloc_MakeMallocFailAfterCount(int countdown);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif 
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/memory/test/Makefile b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/memory/test/Makefile
new file mode 100644
index 000000000..f3f86ce60
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/memory/test/Makefile
@@ -0,0 +1,78 @@
+CC = gcc
+ifeq ($(shell uname -s), Darwin)
+CC = clang
+endif
+#DEBUG = -O0 -g
+CFLAGS += -std=c99 -pedantic -Wall -Wextra -Werror
+CFLAGS += $(DEBUG)
+DEFINES = -D UNITY_OUTPUT_CHAR=UnityOutputCharSpy_OutputChar
+ifeq ($(OS),Windows_NT)
+  DEFINES += -D UNITY_OUTPUT_CHAR_HEADER_DECLARATION=UnityOutputCharSpy_OutputChar(int)
+else
+  DEFINES += -D UNITY_OUTPUT_CHAR_HEADER_DECLARATION=UnityOutputCharSpy_OutputChar\(int\)
+endif
+SRC = ../src/unity_memory.c \
+      ../../../src/unity.c   \
+      unity_memory_Test.c   \
+      unity_memory_TestRunner.c \
+      unity_output_Spy.c     \
+
+INC_DIR = -I../src -I../../../src/
+BUILD_DIR = ../build
+TARGET = ../build/memory_tests.exe
+
+all: default noStdlibMalloc 32bits
+
+default: $(BUILD_DIR)
+	$(CC) $(CFLAGS) $(DEFINES) $(SRC) $(INC_DIR) -o $(TARGET) -D UNITY_SUPPORT_64
+	@ echo "default build"
+	./$(TARGET)
+
+32bits: $(BUILD_DIR)
+	$(CC) $(CFLAGS) $(DEFINES) $(SRC) $(INC_DIR) -o $(TARGET) -m32
+	@ echo "32bits build"
+	./$(TARGET)
+
+noStdlibMalloc: $(BUILD_DIR)
+	$(CC) $(CFLAGS) $(DEFINES) $(SRC) $(INC_DIR) -o $(TARGET) -D UNITY_EXCLUDE_STDLIB_MALLOC
+	@ echo "build with noStdlibMalloc"
+	./$(TARGET)
+
+C89: CFLAGS += -D UNITY_EXCLUDE_STDINT_H # C89 did not have type 'long long', <stdint.h>
+C89: $(BUILD_DIR)
+	$(CC) $(CFLAGS) $(DEFINES) $(SRC) $(INC_DIR) -o $(TARGET) -std=c89 && ./$(TARGET)
+	$(CC) $(CFLAGS) $(DEFINES) $(SRC) $(INC_DIR) -o $(TARGET) -D UNITY_EXCLUDE_STDLIB_MALLOC -std=c89
+	./$(TARGET)
+
+$(BUILD_DIR):
+	mkdir -p $(BUILD_DIR)
+
+clean:
+	rm -f $(TARGET) $(BUILD_DIR)/*.gc*
+
+cov: $(BUILD_DIR)
+	cd $(BUILD_DIR) && \
+	$(CC) $(DEFINES) $(foreach i, $(SRC), ../test/$(i)) $(INC_DIR) -o $(TARGET) -fprofile-arcs -ftest-coverage
+	rm -f $(BUILD_DIR)/*.gcda
+	./$(TARGET) > /dev/null ; ./$(TARGET) -v > /dev/null
+	cd $(BUILD_DIR) && \
+	gcov unity_memory.c | head -3
+	grep '###' $(BUILD_DIR)/unity_memory.c.gcov -C2 || true # Show uncovered lines
+
+# These extended flags DO get included before any target build runs
+CFLAGS += -Wbad-function-cast
+CFLAGS += -Wcast-qual
+CFLAGS += -Wconversion
+CFLAGS += -Wformat=2
+CFLAGS += -Wmissing-prototypes
+CFLAGS += -Wold-style-definition
+CFLAGS += -Wpointer-arith
+CFLAGS += -Wshadow
+CFLAGS += -Wstrict-overflow=5
+CFLAGS += -Wstrict-prototypes
+CFLAGS += -Wswitch-default
+CFLAGS += -Wundef
+CFLAGS += -Wno-error=undef  # Warning only, this should not stop the build
+CFLAGS += -Wunreachable-code
+CFLAGS += -Wunused
+CFLAGS += -fstrict-aliasing
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/memory/test/unity_memory_Test.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/memory/test/unity_memory_Test.c
new file mode 100644
index 000000000..6f832e276
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/memory/test/unity_memory_Test.c
@@ -0,0 +1,325 @@
+/* ==========================================
+ *  Unity Project - A Test Framework for C
+ *  Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+ *  [Released under MIT License. Please refer to license.txt for details]
+ * ========================================== */
+
+#include "unity.h"
+#include "unity_memory.h"
+#include "unity_output_Spy.h"
+#include <stdlib.h>
+#include <string.h>
+
+/* This test module includes the following tests: */
+
+void test_ForceMallocFail(void);
+void test_ReallocSmallerIsUnchanged(void);
+void test_ReallocSameIsUnchanged(void);
+void test_ReallocLargerNeeded(void);
+void test_ReallocNullPointerIsLikeMalloc(void);
+void test_ReallocSizeZeroFreesMemAndReturnsNullPointer(void);
+void test_CallocFillsWithZero(void);
+void test_FreeNULLSafety(void);
+void test_DetectsLeak(void);
+void test_BufferOverrunFoundDuringFree(void);
+void test_BufferOverrunFoundDuringRealloc(void);
+void test_BufferGuardWriteFoundDuringFree(void);
+void test_BufferGuardWriteFoundDuringRealloc(void);
+void test_MallocPastBufferFails(void);
+void test_CallocPastBufferFails(void);
+void test_MallocThenReallocGrowsMemoryInPlace(void);
+void test_ReallocFailDoesNotFreeMem(void);
+
+/* It makes use of the following features */
+void setUp(void);
+void tearDown(void);
+
+/* Let's Go! */
+void setUp(void) 
+{ 
+#ifdef UNITY_EXCLUDE_STDLIB_MALLOC
+    UnityOutputCharSpy_Create(200);
+#else
+    UnityOutputCharSpy_Create(1000);
+#endif
+    UnityMalloc_StartTest();
+}
+
+void tearDown(void) 
+{ 
+    UnityMalloc_EndTest();
+    UnityOutputCharSpy_Destroy();
+}
+
+void test_ForceMallocFail(void)
+{
+    void* m;
+    void* mfails;
+    UnityMalloc_MakeMallocFailAfterCount(1);
+    m = malloc(10);
+    TEST_ASSERT_NOT_NULL(m);
+    mfails = malloc(10);
+    TEST_ASSERT_EQUAL_PTR(0, mfails);
+    free(m);
+}
+
+void test_ReallocSmallerIsUnchanged(void)
+{
+    void* m1 = malloc(10);
+    void* m2 = realloc(m1, 5);
+    TEST_ASSERT_NOT_NULL(m1);
+    TEST_ASSERT_EQUAL_PTR(m1, m2);
+    free(m2);
+}
+
+void test_ReallocSameIsUnchanged(void)
+{
+    void* m1 = malloc(10);
+    void* m2 = realloc(m1, 10);
+    TEST_ASSERT_NOT_NULL(m1);
+    TEST_ASSERT_EQUAL_PTR(m1, m2);
+    free(m2);
+}
+
+void test_ReallocLargerNeeded(void)
+{
+    void* m2;
+    void* m1 = malloc(10);
+    TEST_ASSERT_NOT_NULL(m1);
+    strcpy((char*)m1, "123456789");
+    m2 = realloc(m1, 15);
+    TEST_ASSERT_EQUAL_STRING("123456789", m2);
+    free(m2);
+}
+
+void test_ReallocNullPointerIsLikeMalloc(void)
+{
+    void* m = realloc(0, 15);
+    TEST_ASSERT_NOT_NULL(m);
+    free(m);
+}
+
+void test_ReallocSizeZeroFreesMemAndReturnsNullPointer(void)
+{
+    void* m1 = malloc(10);
+    void* m2 = realloc(m1, 0);
+    TEST_ASSERT_EQUAL_PTR(0, m2);
+}
+
+void test_CallocFillsWithZero(void)
+{
+    void* m = calloc(3, sizeof(char));
+    char* s = (char*)m;
+    TEST_ASSERT_NOT_NULL(m);
+    TEST_ASSERT_EQUAL_HEX8(0, s[0]);
+    TEST_ASSERT_EQUAL_HEX8(0, s[1]);
+    TEST_ASSERT_EQUAL_HEX8(0, s[2]);
+    free(m);
+}
+
+void test_FreeNULLSafety(void)
+{
+    free(NULL);
+}
+
+/*------------------------------------------------------------ */
+
+#define EXPECT_ABORT_BEGIN \
+  { \
+    jmp_buf TestAbortFrame;   \
+    memcpy(TestAbortFrame, Unity.AbortFrame, sizeof(jmp_buf)); \
+    if (TEST_PROTECT()) \
+    {
+
+#define EXPECT_ABORT_END \
+    } \
+    memcpy(Unity.AbortFrame, TestAbortFrame, sizeof(jmp_buf)); \
+  }
+
+/* This tricky set of defines lets us see if we are using the Spy, returns 1 if true */
+#ifdef __STDC_VERSION__
+
+#ifdef UNITY_SUPPORT_VARIADIC_MACROS
+#define USING_SPY_AS(a)                    EXPAND_AND_USE_2ND(ASSIGN_VALUE(a), 0)
+#define ASSIGN_VALUE(a)                    VAL_##a
+#define VAL_UnityOutputCharSpy_OutputChar  0, 1
+#define EXPAND_AND_USE_2ND(a, b)           SECOND_PARAM(a, b, throwaway)
+#define SECOND_PARAM(a, b, ...)            b
+#if USING_SPY_AS(UNITY_OUTPUT_CHAR)
+  #define USING_OUTPUT_SPY /* UNITY_OUTPUT_CHAR = UnityOutputCharSpy_OutputChar */
+#endif
+#endif /* UNITY_SUPPORT_VARIADIC_MACROS */
+
+#else  /* __STDC_VERSION__ else */
+
+#define UnityOutputCharSpy_OutputChar 42
+#if UNITY_OUTPUT_CHAR == UnityOutputCharSpy_OutputChar /* Works if no -Wundef -Werror */
+  #define USING_OUTPUT_SPY
+#endif
+#undef UnityOutputCharSpy_OutputChar
+  
+#endif /* __STDC_VERSION__ */
+
+void test_DetectsLeak(void)
+{
+#ifdef USING_OUTPUT_SPY
+    void* m = malloc(10);
+    TEST_ASSERT_NOT_NULL(m);
+    UnityOutputCharSpy_Enable(1);
+    EXPECT_ABORT_BEGIN
+    UnityMalloc_EndTest();
+    EXPECT_ABORT_END
+    UnityOutputCharSpy_Enable(0);
+    Unity.CurrentTestFailed = 0;
+    TEST_ASSERT_NOT_NULL(strstr(UnityOutputCharSpy_Get(), "This test leaks!"));
+    free(m);
+#else
+    TEST_IGNORE_MESSAGE("Enable USING_OUTPUT_SPY To Run This Test");
+#endif
+}
+
+void test_BufferOverrunFoundDuringFree(void)
+{
+#ifdef USING_OUTPUT_SPY
+    void* m = malloc(10);
+    char* s = (char*)m;
+    TEST_ASSERT_NOT_NULL(m);
+    s[10] = (char)0xFF;
+    UnityOutputCharSpy_Enable(1);
+    EXPECT_ABORT_BEGIN
+    free(m);
+    EXPECT_ABORT_END
+    UnityOutputCharSpy_Enable(0);
+    Unity.CurrentTestFailed = 0;
+    TEST_ASSERT_NOT_NULL(strstr(UnityOutputCharSpy_Get(), "Buffer overrun detected during free()"));
+#else
+    TEST_IGNORE_MESSAGE("Enable USING_OUTPUT_SPY To Run This Test");
+#endif
+}
+
+void test_BufferOverrunFoundDuringRealloc(void)
+{
+#ifdef USING_OUTPUT_SPY
+    void* m = malloc(10);
+    char* s = (char*)m;
+    TEST_ASSERT_NOT_NULL(m);
+    s[10] = (char)0xFF;
+    UnityOutputCharSpy_Enable(1);
+    EXPECT_ABORT_BEGIN
+    m = realloc(m, 100);
+    EXPECT_ABORT_END
+    UnityOutputCharSpy_Enable(0);
+    Unity.CurrentTestFailed = 0;
+    TEST_ASSERT_NOT_NULL(strstr(UnityOutputCharSpy_Get(), "Buffer overrun detected during realloc()"));
+#else
+    TEST_IGNORE_MESSAGE("Enable USING_OUTPUT_SPY To Run This Test");
+#endif
+}
+
+void test_BufferGuardWriteFoundDuringFree(void)
+{
+#ifdef USING_OUTPUT_SPY
+    void* m = malloc(10);
+    char* s = (char*)m;
+    TEST_ASSERT_NOT_NULL(m);
+    s[-1] = (char)0x00; /* Will not detect 0 */
+    s[-2] = (char)0x01;
+    UnityOutputCharSpy_Enable(1);
+    EXPECT_ABORT_BEGIN
+    free(m);
+    EXPECT_ABORT_END
+    UnityOutputCharSpy_Enable(0);
+    Unity.CurrentTestFailed = 0;
+    TEST_ASSERT_NOT_NULL(strstr(UnityOutputCharSpy_Get(), "Buffer overrun detected during free()"));
+#else
+    TEST_IGNORE_MESSAGE("Enable USING_OUTPUT_SPY To Run This Test");
+#endif
+}
+
+void test_BufferGuardWriteFoundDuringRealloc(void)
+{
+#ifdef USING_OUTPUT_SPY
+    void* m = malloc(10);
+    char* s = (char*)m;
+    TEST_ASSERT_NOT_NULL(m);
+    s[-1] = (char)0x0A;
+    UnityOutputCharSpy_Enable(1);
+    EXPECT_ABORT_BEGIN
+    m = realloc(m, 100);
+    EXPECT_ABORT_END
+    UnityOutputCharSpy_Enable(0);
+    Unity.CurrentTestFailed = 0;
+    TEST_ASSERT_NOT_NULL(strstr(UnityOutputCharSpy_Get(), "Buffer overrun detected during realloc()"));
+#else
+    TEST_IGNORE_MESSAGE("Enable USING_OUTPUT_SPY To Run This Test");
+#endif
+}
+
+/*------------------------------------------------------------ */
+
+#define TEST_ASSERT_MEMORY_ALL_FREE_LIFO_ORDER(first_mem_ptr, ptr) \
+    ptr = malloc(10); free(ptr);                                   \
+    TEST_ASSERT_EQUAL_PTR_MESSAGE(first_mem_ptr, ptr, "Memory was stranded, free in LIFO order");
+
+void test_MallocPastBufferFails(void)
+{
+#ifdef UNITY_EXCLUDE_STDLIB_MALLOC
+    void* m = malloc(UNITY_INTERNAL_HEAP_SIZE_BYTES/2 + 1);
+    void* n = malloc(UNITY_INTERNAL_HEAP_SIZE_BYTES/2);
+    free(m);
+    TEST_ASSERT_NOT_NULL(m);
+    TEST_ASSERT_NULL(n);
+    TEST_ASSERT_MEMORY_ALL_FREE_LIFO_ORDER(m, n);
+#else
+    TEST_IGNORE_MESSAGE("Enable UNITY_EXCLUDE_STDLIB_MALLOC to Run This Test");
+#endif
+}
+
+void test_CallocPastBufferFails(void)
+{
+#ifdef UNITY_EXCLUDE_STDLIB_MALLOC
+    void* m = calloc(1, UNITY_INTERNAL_HEAP_SIZE_BYTES/2 + 1);
+    void* n = calloc(1, UNITY_INTERNAL_HEAP_SIZE_BYTES/2);
+    free(m);
+    TEST_ASSERT_NOT_NULL(m);
+    TEST_ASSERT_NULL(n);
+    TEST_ASSERT_MEMORY_ALL_FREE_LIFO_ORDER(m, n);
+#else
+    TEST_IGNORE_MESSAGE("Enable UNITY_EXCLUDE_STDLIB_MALLOC to Run This Test");
+#endif
+}
+
+void test_MallocThenReallocGrowsMemoryInPlace(void)
+{
+#ifdef UNITY_EXCLUDE_STDLIB_MALLOC
+    void* m = malloc(UNITY_INTERNAL_HEAP_SIZE_BYTES/2 + 1);
+    void* n = realloc(m, UNITY_INTERNAL_HEAP_SIZE_BYTES/2 + 9);
+    free(n);
+    TEST_ASSERT_NOT_NULL(m);
+    TEST_ASSERT_EQUAL(m, n);
+    TEST_ASSERT_MEMORY_ALL_FREE_LIFO_ORDER(m, n);
+#else
+    TEST_IGNORE_MESSAGE("Enable UNITY_EXCLUDE_STDLIB_MALLOC to Run This Test");
+#endif
+}
+
+void test_ReallocFailDoesNotFreeMem(void)
+{
+#ifdef UNITY_EXCLUDE_STDLIB_MALLOC
+    void* m = malloc(UNITY_INTERNAL_HEAP_SIZE_BYTES/2);
+    void* n1 = malloc(10);
+    void* out_of_mem = realloc(n1, UNITY_INTERNAL_HEAP_SIZE_BYTES/2 + 1);
+    void* n2 = malloc(10);
+
+    free(n2);
+    if (out_of_mem == NULL) free(n1);
+    free(m);
+
+    TEST_ASSERT_NOT_NULL(m);       /* Got a real memory location */
+    TEST_ASSERT_NULL(out_of_mem);  /* The realloc should have failed */
+    TEST_ASSERT_NOT_EQUAL(n2, n1); /* If n1 != n2 then realloc did not free n1 */
+    TEST_ASSERT_MEMORY_ALL_FREE_LIFO_ORDER(m, n2);
+#else
+    TEST_IGNORE_MESSAGE("Enable UNITY_EXCLUDE_STDLIB_MALLOC to Run This Test");
+#endif
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/memory/test/unity_memory_TestRunner.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/memory/test/unity_memory_TestRunner.c
new file mode 100644
index 000000000..4c91a5995
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/memory/test/unity_memory_TestRunner.c
@@ -0,0 +1,49 @@
+/* ==========================================
+ *  Unity Project - A Test Framework for C
+ *  Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+ *  [Released under MIT License. Please refer to license.txt for details]
+ * ========================================== */
+
+#include "unity.h"
+#include "unity_memory.h"
+
+extern void test_ForceMallocFail(void);
+extern void test_ReallocSmallerIsUnchanged(void);
+extern void test_ReallocSameIsUnchanged(void);
+extern void test_ReallocLargerNeeded(void);
+extern void test_ReallocNullPointerIsLikeMalloc(void);
+extern void test_ReallocSizeZeroFreesMemAndReturnsNullPointer(void);
+extern void test_CallocFillsWithZero(void);
+extern void test_FreeNULLSafety(void);
+extern void test_DetectsLeak(void);
+extern void test_BufferOverrunFoundDuringFree(void);
+extern void test_BufferOverrunFoundDuringRealloc(void);
+extern void test_BufferGuardWriteFoundDuringFree(void);
+extern void test_BufferGuardWriteFoundDuringRealloc(void);
+extern void test_MallocPastBufferFails(void);
+extern void test_CallocPastBufferFails(void);
+extern void test_MallocThenReallocGrowsMemoryInPlace(void);
+extern void test_ReallocFailDoesNotFreeMem(void);
+
+int main(void)
+{
+    UnityBegin("unity_memory_Test.c");
+    RUN_TEST(test_ForceMallocFail);
+    RUN_TEST(test_ReallocSmallerIsUnchanged);
+    RUN_TEST(test_ReallocSameIsUnchanged);
+    RUN_TEST(test_ReallocLargerNeeded);
+    RUN_TEST(test_ReallocNullPointerIsLikeMalloc);
+    RUN_TEST(test_ReallocSizeZeroFreesMemAndReturnsNullPointer);
+    RUN_TEST(test_CallocFillsWithZero);
+    RUN_TEST(test_FreeNULLSafety);
+    RUN_TEST(test_DetectsLeak);
+    RUN_TEST(test_BufferOverrunFoundDuringFree);
+    RUN_TEST(test_BufferOverrunFoundDuringRealloc);
+    RUN_TEST(test_BufferGuardWriteFoundDuringFree);
+    RUN_TEST(test_BufferGuardWriteFoundDuringRealloc);
+    RUN_TEST(test_MallocPastBufferFails);
+    RUN_TEST(test_CallocPastBufferFails);
+    RUN_TEST(test_MallocThenReallocGrowsMemoryInPlace);
+    RUN_TEST(test_ReallocFailDoesNotFreeMem);
+    return UnityEnd();
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/memory/test/unity_output_Spy.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/memory/test/unity_output_Spy.c
new file mode 100644
index 000000000..772fe0bdf
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/memory/test/unity_output_Spy.c
@@ -0,0 +1,56 @@
+/* ==========================================
+ *  Unity Project - A Test Framework for C
+ *  Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+ *  [Released under MIT License. Please refer to license.txt for details]
+ * ========================================== */
+
+#include "unity.h"
+#include "unity_output_Spy.h"
+
+#include <stdio.h>
+#include <string.h>
+#include <stdlib.h>
+
+static int size;
+static int count;
+static char* buffer;
+static int spy_enable;
+
+void UnityOutputCharSpy_Create(int s)
+{
+    size = (s > 0) ? s : 0;
+    count = 0;
+    spy_enable = 0;
+    buffer = malloc((size_t)size);
+    TEST_ASSERT_NOT_NULL_MESSAGE(buffer, "Internal malloc failed in Spy Create():" __FILE__);
+    memset(buffer, 0, (size_t)size);
+}
+
+void UnityOutputCharSpy_Destroy(void)
+{
+    size = 0;
+    free(buffer);
+}
+
+void UnityOutputCharSpy_OutputChar(int c)
+{
+    if (spy_enable)
+    {
+        if (count < (size-1))
+            buffer[count++] = (char)c;
+    }
+    else
+    {
+        putchar(c);
+    }
+}
+
+const char * UnityOutputCharSpy_Get(void)
+{
+    return buffer;
+}
+
+void UnityOutputCharSpy_Enable(int enable)
+{
+    spy_enable = enable;
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/memory/test/unity_output_Spy.h b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/memory/test/unity_output_Spy.h
new file mode 100644
index 000000000..e2e401c48
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/extras/memory/test/unity_output_Spy.h
@@ -0,0 +1,16 @@
+/* ==========================================
+ *  Unity Project - A Test Framework for C
+ *  Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+ *  [Released under MIT License. Please refer to license.txt for details]
+ * ========================================== */
+
+#ifndef UNITY_OUTPUT_SPY_H
+#define UNITY_OUTPUT_SPY_H
+
+void UnityOutputCharSpy_Create(int s);
+void UnityOutputCharSpy_Destroy(void);
+void UnityOutputCharSpy_OutputChar(int c);
+const char * UnityOutputCharSpy_Get(void);
+void UnityOutputCharSpy_Enable(int enable);
+
+#endif
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/meson.build b/FreeRTOS-Plus/Test/CMock/vendor/unity/meson.build
new file mode 100644
index 000000000..968e5b13f
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/meson.build
@@ -0,0 +1,48 @@
+#
+# build script written by : Michael Brockus.
+# github repo author: Mike Karlesky, Mark VanderVoord, Greg Williams.
+#
+# license: MIT
+#
+project('unity', 'c',
+    license: 'MIT',
+    meson_version: '>=0.53.0',
+    default_options: ['layout=flat', 'warning_level=3', 'werror=true', 'c_std=c11']
+)
+lang = 'c'
+cc = meson.get_compiler(lang)
+
+#
+# Meson: Add compiler flags
+if cc.get_id() == 'clang'
+    add_project_arguments(cc.get_supported_arguments(
+            [
+                '-Wexit-time-destructors',
+                '-Wglobal-constructors',
+                '-Wmissing-prototypes',
+                '-Wmissing-noreturn',
+                '-Wno-missing-braces',
+                '-Wold-style-cast', '-Wpointer-arith', '-Wweak-vtables',
+                '-Wcast-align', '-Wconversion', '-Wcast-qual', '-Wshadow'
+            ]
+        ), language: lang)
+endif
+
+if cc.get_argument_syntax() == 'gcc'
+    add_project_arguments(cc.get_supported_arguments(
+            [
+                '-Wformat', '-Waddress', '-Winit-self', '-Wno-multichar',
+                '-Wpointer-arith'       , '-Wwrite-strings'              ,
+                '-Wno-parentheses'      , '-Wno-type-limits'             ,
+                '-Wformat-security'     , '-Wunreachable-code'           ,
+                '-Waggregate-return'    , '-Wformat-nonliteral'          ,
+                '-Wmissing-declarations', '-Wmissing-include-dirs'       ,
+                '-Wno-unused-parameter'
+            ]
+        ), language: lang)
+endif
+
+#
+# Sub directory to project source code
+subdir('src')
+unity_dep = declare_dependency(link_with: unity_lib, include_directories: unity_dir)
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/src/meson.build b/FreeRTOS-Plus/Test/CMock/vendor/unity/src/meson.build
new file mode 100644
index 000000000..7ede15af6
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/src/meson.build
@@ -0,0 +1,11 @@
+#
+# build script written by : Michael Brockus.
+# github repo author: Mike Karlesky, Mark VanderVoord, Greg Williams.
+#
+# license: MIT
+#
+unity_dir = include_directories('.')
+
+unity_lib = static_library(meson.project_name(), 
+    sources: ['unity.c'],
+    include_directories: unity_dir)
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/src/unity.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/src/unity.c
new file mode 100644
index 000000000..ffa5cf0d4
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/src/unity.c
@@ -0,0 +1,2109 @@
+/* =========================================================================
+    Unity Project - A Test Framework for C
+    Copyright (c) 2007-19 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+============================================================================ */
+
+#include "unity.h"
+#include <stddef.h>
+
+#ifdef AVR
+#include <avr/pgmspace.h>
+#else
+#define PROGMEM
+#endif
+
+/* If omitted from header, declare overrideable prototypes here so they're ready for use */
+#ifdef UNITY_OMIT_OUTPUT_CHAR_HEADER_DECLARATION
+void UNITY_OUTPUT_CHAR(int);
+#endif
+
+/* Helpful macros for us to use here in Assert functions */
+#define UNITY_FAIL_AND_BAIL   { Unity.CurrentTestFailed  = 1; UNITY_OUTPUT_FLUSH(); TEST_ABORT(); }
+#define UNITY_IGNORE_AND_BAIL { Unity.CurrentTestIgnored = 1; UNITY_OUTPUT_FLUSH(); TEST_ABORT(); }
+#define RETURN_IF_FAIL_OR_IGNORE if (Unity.CurrentTestFailed || Unity.CurrentTestIgnored) TEST_ABORT()
+
+struct UNITY_STORAGE_T Unity;
+
+#ifdef UNITY_OUTPUT_COLOR
+const char PROGMEM UnityStrOk[]                            = "\033[42mOK\033[00m";
+const char PROGMEM UnityStrPass[]                          = "\033[42mPASS\033[00m";
+const char PROGMEM UnityStrFail[]                          = "\033[41mFAIL\033[00m";
+const char PROGMEM UnityStrIgnore[]                        = "\033[43mIGNORE\033[00m";
+#else
+const char PROGMEM UnityStrOk[]                            = "OK";
+const char PROGMEM UnityStrPass[]                          = "PASS";
+const char PROGMEM UnityStrFail[]                          = "FAIL";
+const char PROGMEM UnityStrIgnore[]                        = "IGNORE";
+#endif
+static const char PROGMEM UnityStrNull[]                   = "NULL";
+static const char PROGMEM UnityStrSpacer[]                 = ". ";
+static const char PROGMEM UnityStrExpected[]               = " Expected ";
+static const char PROGMEM UnityStrWas[]                    = " Was ";
+static const char PROGMEM UnityStrGt[]                     = " to be greater than ";
+static const char PROGMEM UnityStrLt[]                     = " to be less than ";
+static const char PROGMEM UnityStrOrEqual[]                = "or equal to ";
+static const char PROGMEM UnityStrNotEqual[]               = " to be not equal to ";
+static const char PROGMEM UnityStrElement[]                = " Element ";
+static const char PROGMEM UnityStrByte[]                   = " Byte ";
+static const char PROGMEM UnityStrMemory[]                 = " Memory Mismatch.";
+static const char PROGMEM UnityStrDelta[]                  = " Values Not Within Delta ";
+static const char PROGMEM UnityStrPointless[]              = " You Asked Me To Compare Nothing, Which Was Pointless.";
+static const char PROGMEM UnityStrNullPointerForExpected[] = " Expected pointer to be NULL";
+static const char PROGMEM UnityStrNullPointerForActual[]   = " Actual pointer was NULL";
+#ifndef UNITY_EXCLUDE_FLOAT
+static const char PROGMEM UnityStrNot[]                    = "Not ";
+static const char PROGMEM UnityStrInf[]                    = "Infinity";
+static const char PROGMEM UnityStrNegInf[]                 = "Negative Infinity";
+static const char PROGMEM UnityStrNaN[]                    = "NaN";
+static const char PROGMEM UnityStrDet[]                    = "Determinate";
+static const char PROGMEM UnityStrInvalidFloatTrait[]      = "Invalid Float Trait";
+#endif
+const char PROGMEM UnityStrErrShorthand[]                  = "Unity Shorthand Support Disabled";
+const char PROGMEM UnityStrErrFloat[]                      = "Unity Floating Point Disabled";
+const char PROGMEM UnityStrErrDouble[]                     = "Unity Double Precision Disabled";
+const char PROGMEM UnityStrErr64[]                         = "Unity 64-bit Support Disabled";
+static const char PROGMEM UnityStrBreaker[]                = "-----------------------";
+static const char PROGMEM UnityStrResultsTests[]           = " Tests ";
+static const char PROGMEM UnityStrResultsFailures[]        = " Failures ";
+static const char PROGMEM UnityStrResultsIgnored[]         = " Ignored ";
+static const char PROGMEM UnityStrDetail1Name[]            = UNITY_DETAIL1_NAME " ";
+static const char PROGMEM UnityStrDetail2Name[]            = " " UNITY_DETAIL2_NAME " ";
+
+/*-----------------------------------------------
+ * Pretty Printers & Test Result Output Handlers
+ *-----------------------------------------------*/
+
+/*-----------------------------------------------*/
+/* Local helper function to print characters. */
+static void UnityPrintChar(const char* pch)
+{
+    /* printable characters plus CR & LF are printed */
+    if ((*pch <= 126) && (*pch >= 32))
+    {
+        UNITY_OUTPUT_CHAR(*pch);
+    }
+    /* write escaped carriage returns */
+    else if (*pch == 13)
+    {
+        UNITY_OUTPUT_CHAR('\\');
+        UNITY_OUTPUT_CHAR('r');
+    }
+    /* write escaped line feeds */
+    else if (*pch == 10)
+    {
+        UNITY_OUTPUT_CHAR('\\');
+        UNITY_OUTPUT_CHAR('n');
+    }
+    /* unprintable characters are shown as codes */
+    else
+    {
+        UNITY_OUTPUT_CHAR('\\');
+        UNITY_OUTPUT_CHAR('x');
+        UnityPrintNumberHex((UNITY_UINT)*pch, 2);
+    }
+}
+
+/*-----------------------------------------------*/
+/* Local helper function to print ANSI escape strings e.g. "\033[42m". */
+#ifdef UNITY_OUTPUT_COLOR
+static UNITY_UINT UnityPrintAnsiEscapeString(const char* string)
+{
+    const char* pch = string;
+    UNITY_UINT count = 0;
+
+    while (*pch && (*pch != 'm'))
+    {
+        UNITY_OUTPUT_CHAR(*pch);
+        pch++;
+        count++;
+    }
+    UNITY_OUTPUT_CHAR('m');
+    count++;
+
+    return count;
+}
+#endif
+
+/*-----------------------------------------------*/
+void UnityPrint(const char* string)
+{
+    const char* pch = string;
+
+    if (pch != NULL)
+    {
+        while (*pch)
+        {
+#ifdef UNITY_OUTPUT_COLOR
+            /* print ANSI escape code */
+            if ((*pch == 27) && (*(pch + 1) == '['))
+            {
+                pch += UnityPrintAnsiEscapeString(pch);
+                continue;
+            }
+#endif
+            UnityPrintChar(pch);
+            pch++;
+        }
+    }
+}
+/*-----------------------------------------------*/
+void UnityPrintLen(const char* string, const UNITY_UINT32 length)
+{
+    const char* pch = string;
+
+    if (pch != NULL)
+    {
+        while (*pch && ((UNITY_UINT32)(pch - string) < length))
+        {
+            /* printable characters plus CR & LF are printed */
+            if ((*pch <= 126) && (*pch >= 32))
+            {
+                UNITY_OUTPUT_CHAR(*pch);
+            }
+            /* write escaped carriage returns */
+            else if (*pch == 13)
+            {
+                UNITY_OUTPUT_CHAR('\\');
+                UNITY_OUTPUT_CHAR('r');
+            }
+            /* write escaped line feeds */
+            else if (*pch == 10)
+            {
+                UNITY_OUTPUT_CHAR('\\');
+                UNITY_OUTPUT_CHAR('n');
+            }
+            /* unprintable characters are shown as codes */
+            else
+            {
+                UNITY_OUTPUT_CHAR('\\');
+                UNITY_OUTPUT_CHAR('x');
+                UnityPrintNumberHex((UNITY_UINT)*pch, 2);
+            }
+            pch++;
+        }
+    }
+}
+
+/*-----------------------------------------------*/
+void UnityPrintNumberByStyle(const UNITY_INT number, const UNITY_DISPLAY_STYLE_T style)
+{
+    if ((style & UNITY_DISPLAY_RANGE_INT) == UNITY_DISPLAY_RANGE_INT)
+    {
+        if (style == UNITY_DISPLAY_STYLE_CHAR)
+        {
+            /* printable characters plus CR & LF are printed */
+            UNITY_OUTPUT_CHAR('\'');
+            if ((number <= 126) && (number >= 32))
+            {
+                UNITY_OUTPUT_CHAR((int)number);
+            }
+            /* write escaped carriage returns */
+            else if (number == 13)
+            {
+                UNITY_OUTPUT_CHAR('\\');
+                UNITY_OUTPUT_CHAR('r');
+            }
+            /* write escaped line feeds */
+            else if (number == 10)
+            {
+                UNITY_OUTPUT_CHAR('\\');
+                UNITY_OUTPUT_CHAR('n');
+            }
+            /* unprintable characters are shown as codes */
+            else
+            {
+                UNITY_OUTPUT_CHAR('\\');
+                UNITY_OUTPUT_CHAR('x');
+                UnityPrintNumberHex((UNITY_UINT)number, 2);
+            }
+            UNITY_OUTPUT_CHAR('\'');
+        }
+        else
+        {
+            UnityPrintNumber(number);
+        }
+    }
+    else if ((style & UNITY_DISPLAY_RANGE_UINT) == UNITY_DISPLAY_RANGE_UINT)
+    {
+        UnityPrintNumberUnsigned((UNITY_UINT)number);
+    }
+    else
+    {
+        UNITY_OUTPUT_CHAR('0');
+        UNITY_OUTPUT_CHAR('x');
+        UnityPrintNumberHex((UNITY_UINT)number, (char)((style & 0xF) * 2));
+    }
+}
+
+/*-----------------------------------------------*/
+void UnityPrintNumber(const UNITY_INT number_to_print)
+{
+    UNITY_UINT number = (UNITY_UINT)number_to_print;
+
+    if (number_to_print < 0)
+    {
+        /* A negative number, including MIN negative */
+        UNITY_OUTPUT_CHAR('-');
+        number = (~number) + 1;
+    }
+    UnityPrintNumberUnsigned(number);
+}
+
+/*-----------------------------------------------
+ * basically do an itoa using as little ram as possible */
+void UnityPrintNumberUnsigned(const UNITY_UINT number)
+{
+    UNITY_UINT divisor = 1;
+
+    /* figure out initial divisor */
+    while (number / divisor > 9)
+    {
+        divisor *= 10;
+    }
+
+    /* now mod and print, then divide divisor */
+    do
+    {
+        UNITY_OUTPUT_CHAR((char)('0' + (number / divisor % 10)));
+        divisor /= 10;
+    } while (divisor > 0);
+}
+
+/*-----------------------------------------------*/
+void UnityPrintNumberHex(const UNITY_UINT number, const char nibbles_to_print)
+{
+    int nibble;
+    char nibbles = nibbles_to_print;
+
+    if ((unsigned)nibbles > UNITY_MAX_NIBBLES)
+    {
+        nibbles = UNITY_MAX_NIBBLES;
+    }
+
+    while (nibbles > 0)
+    {
+        nibbles--;
+        nibble = (int)(number >> (nibbles * 4)) & 0x0F;
+        if (nibble <= 9)
+        {
+            UNITY_OUTPUT_CHAR((char)('0' + nibble));
+        }
+        else
+        {
+            UNITY_OUTPUT_CHAR((char)('A' - 10 + nibble));
+        }
+    }
+}
+
+/*-----------------------------------------------*/
+void UnityPrintMask(const UNITY_UINT mask, const UNITY_UINT number)
+{
+    UNITY_UINT current_bit = (UNITY_UINT)1 << (UNITY_INT_WIDTH - 1);
+    UNITY_INT32 i;
+
+    for (i = 0; i < UNITY_INT_WIDTH; i++)
+    {
+        if (current_bit & mask)
+        {
+            if (current_bit & number)
+            {
+                UNITY_OUTPUT_CHAR('1');
+            }
+            else
+            {
+                UNITY_OUTPUT_CHAR('0');
+            }
+        }
+        else
+        {
+            UNITY_OUTPUT_CHAR('X');
+        }
+        current_bit = current_bit >> 1;
+    }
+}
+
+/*-----------------------------------------------*/
+#ifndef UNITY_EXCLUDE_FLOAT_PRINT
+/*
+ * This function prints a floating-point value in a format similar to
+ * printf("%.7g") on a single-precision machine or printf("%.9g") on a
+ * double-precision machine.  The 7th digit won't always be totally correct
+ * in single-precision operation (for that level of accuracy, a more
+ * complicated algorithm would be needed).
+ */
+void UnityPrintFloat(const UNITY_DOUBLE input_number)
+{
+#ifdef UNITY_INCLUDE_DOUBLE
+    static const int sig_digits = 9;
+    static const UNITY_INT32 min_scaled = 100000000;
+    static const UNITY_INT32 max_scaled = 1000000000;
+#else
+    static const int sig_digits = 7;
+    static const UNITY_INT32 min_scaled = 1000000;
+    static const UNITY_INT32 max_scaled = 10000000;
+#endif
+
+    UNITY_DOUBLE number = input_number;
+
+    /* print minus sign (does not handle negative zero) */
+    if (number < 0.0f)
+    {
+        UNITY_OUTPUT_CHAR('-');
+        number = -number;
+    }
+
+    /* handle zero, NaN, and +/- infinity */
+    if (number == 0.0f)
+    {
+        UnityPrint("0");
+    }
+    else if (isnan(number))
+    {
+        UnityPrint("nan");
+    }
+    else if (isinf(number))
+    {
+        UnityPrint("inf");
+    }
+    else
+    {
+        UNITY_INT32 n_int = 0, n;
+        int exponent = 0;
+        int decimals, digits;
+        char buf[16] = {0};
+
+        /*
+         * Scale up or down by powers of 10.  To minimize rounding error,
+         * start with a factor/divisor of 10^10, which is the largest
+         * power of 10 that can be represented exactly.  Finally, compute
+         * (exactly) the remaining power of 10 and perform one more
+         * multiplication or division.
+         */
+        if (number < 1.0f)
+        {
+            UNITY_DOUBLE factor = 1.0f;
+
+            while (number < (UNITY_DOUBLE)max_scaled / 1e10f)  { number *= 1e10f; exponent -= 10; }
+            while (number * factor < (UNITY_DOUBLE)min_scaled) { factor *= 10.0f; exponent--; }
+
+            number *= factor;
+        }
+        else if (number > (UNITY_DOUBLE)max_scaled)
+        {
+            UNITY_DOUBLE divisor = 1.0f;
+
+            while (number > (UNITY_DOUBLE)min_scaled * 1e10f)   { number  /= 1e10f; exponent += 10; }
+            while (number / divisor > (UNITY_DOUBLE)max_scaled) { divisor *= 10.0f; exponent++; }
+
+            number /= divisor;
+        }
+        else
+        {
+            /*
+             * In this range, we can split off the integer part before
+             * doing any multiplications.  This reduces rounding error by
+             * freeing up significant bits in the fractional part.
+             */
+            UNITY_DOUBLE factor = 1.0f;
+            n_int = (UNITY_INT32)number;
+            number -= (UNITY_DOUBLE)n_int;
+
+            while (n_int < min_scaled) { n_int *= 10; factor *= 10.0f; exponent--; }
+
+            number *= factor;
+        }
+
+        /* round to nearest integer */
+        n = ((UNITY_INT32)(number + number) + 1) / 2;
+
+#ifndef UNITY_ROUND_TIES_AWAY_FROM_ZERO
+        /* round to even if exactly between two integers */
+        if ((n & 1) && (((UNITY_DOUBLE)n - number) == 0.5f))
+            n--;
+#endif
+
+        n += n_int;
+
+        if (n >= max_scaled)
+        {
+            n = min_scaled;
+            exponent++;
+        }
+
+        /* determine where to place decimal point */
+        decimals = ((exponent <= 0) && (exponent >= -(sig_digits + 3))) ? (-exponent) : (sig_digits - 1);
+        exponent += decimals;
+
+        /* truncate trailing zeroes after decimal point */
+        while ((decimals > 0) && ((n % 10) == 0))
+        {
+            n /= 10;
+            decimals--;
+        }
+
+        /* build up buffer in reverse order */
+        digits = 0;
+        while ((n != 0) || (digits < (decimals + 1)))
+        {
+            buf[digits++] = (char)('0' + n % 10);
+            n /= 10;
+        }
+        while (digits > 0)
+        {
+            if (digits == decimals) { UNITY_OUTPUT_CHAR('.'); }
+            UNITY_OUTPUT_CHAR(buf[--digits]);
+        }
+
+        /* print exponent if needed */
+        if (exponent != 0)
+        {
+            UNITY_OUTPUT_CHAR('e');
+
+            if (exponent < 0)
+            {
+                UNITY_OUTPUT_CHAR('-');
+                exponent = -exponent;
+            }
+            else
+            {
+                UNITY_OUTPUT_CHAR('+');
+            }
+
+            digits = 0;
+            while ((exponent != 0) || (digits < 2))
+            {
+                buf[digits++] = (char)('0' + exponent % 10);
+                exponent /= 10;
+            }
+            while (digits > 0)
+            {
+                UNITY_OUTPUT_CHAR(buf[--digits]);
+            }
+        }
+    }
+}
+#endif /* ! UNITY_EXCLUDE_FLOAT_PRINT */
+
+/*-----------------------------------------------*/
+static void UnityTestResultsBegin(const char* file, const UNITY_LINE_TYPE line)
+{
+#ifdef UNITY_OUTPUT_FOR_ECLIPSE
+    UNITY_OUTPUT_CHAR('(');
+    UnityPrint(file);
+    UNITY_OUTPUT_CHAR(':');
+    UnityPrintNumber((UNITY_INT)line);
+    UNITY_OUTPUT_CHAR(')');
+    UNITY_OUTPUT_CHAR(' ');
+    UnityPrint(Unity.CurrentTestName);
+    UNITY_OUTPUT_CHAR(':');
+#else
+#ifdef UNITY_OUTPUT_FOR_IAR_WORKBENCH
+    UnityPrint("<SRCREF line=");
+    UnityPrintNumber((UNITY_INT)line);
+    UnityPrint(" file=\"");
+    UnityPrint(file);
+    UNITY_OUTPUT_CHAR('"');
+    UNITY_OUTPUT_CHAR('>');
+    UnityPrint(Unity.CurrentTestName);
+    UnityPrint("</SRCREF> ");
+#else
+#ifdef UNITY_OUTPUT_FOR_QT_CREATOR
+    UnityPrint("file://");
+    UnityPrint(file);
+    UNITY_OUTPUT_CHAR(':');
+    UnityPrintNumber((UNITY_INT)line);
+    UNITY_OUTPUT_CHAR(' ');
+    UnityPrint(Unity.CurrentTestName);
+    UNITY_OUTPUT_CHAR(':');
+#else
+    UnityPrint(file);
+    UNITY_OUTPUT_CHAR(':');
+    UnityPrintNumber((UNITY_INT)line);
+    UNITY_OUTPUT_CHAR(':');
+    UnityPrint(Unity.CurrentTestName);
+    UNITY_OUTPUT_CHAR(':');
+#endif
+#endif
+#endif
+}
+
+/*-----------------------------------------------*/
+static void UnityTestResultsFailBegin(const UNITY_LINE_TYPE line)
+{
+    UnityTestResultsBegin(Unity.TestFile, line);
+    UnityPrint(UnityStrFail);
+    UNITY_OUTPUT_CHAR(':');
+}
+
+/*-----------------------------------------------*/
+void UnityConcludeTest(void)
+{
+    if (Unity.CurrentTestIgnored)
+    {
+        Unity.TestIgnores++;
+    }
+    else if (!Unity.CurrentTestFailed)
+    {
+        UnityTestResultsBegin(Unity.TestFile, Unity.CurrentTestLineNumber);
+        UnityPrint(UnityStrPass);
+    }
+    else
+    {
+        Unity.TestFailures++;
+    }
+
+    Unity.CurrentTestFailed = 0;
+    Unity.CurrentTestIgnored = 0;
+    UNITY_PRINT_EXEC_TIME();
+    UNITY_PRINT_EOL();
+    UNITY_FLUSH_CALL();
+}
+
+/*-----------------------------------------------*/
+static void UnityAddMsgIfSpecified(const char* msg)
+{
+    if (msg)
+    {
+        UnityPrint(UnityStrSpacer);
+
+#ifdef UNITY_PRINT_TEST_CONTEXT
+        UNITY_PRINT_TEST_CONTEXT();
+#endif
+#ifndef UNITY_EXCLUDE_DETAILS
+        if (Unity.CurrentDetail1)
+        {
+            UnityPrint(UnityStrDetail1Name);
+            UnityPrint(Unity.CurrentDetail1);
+            if (Unity.CurrentDetail2)
+            {
+                UnityPrint(UnityStrDetail2Name);
+                UnityPrint(Unity.CurrentDetail2);
+            }
+            UnityPrint(UnityStrSpacer);
+        }
+#endif
+        UnityPrint(msg);
+    }
+}
+
+/*-----------------------------------------------*/
+static void UnityPrintExpectedAndActualStrings(const char* expected, const char* actual)
+{
+    UnityPrint(UnityStrExpected);
+    if (expected != NULL)
+    {
+        UNITY_OUTPUT_CHAR('\'');
+        UnityPrint(expected);
+        UNITY_OUTPUT_CHAR('\'');
+    }
+    else
+    {
+        UnityPrint(UnityStrNull);
+    }
+    UnityPrint(UnityStrWas);
+    if (actual != NULL)
+    {
+        UNITY_OUTPUT_CHAR('\'');
+        UnityPrint(actual);
+        UNITY_OUTPUT_CHAR('\'');
+    }
+    else
+    {
+        UnityPrint(UnityStrNull);
+    }
+}
+
+/*-----------------------------------------------*/
+static void UnityPrintExpectedAndActualStringsLen(const char* expected,
+                                                  const char* actual,
+                                                  const UNITY_UINT32 length)
+{
+    UnityPrint(UnityStrExpected);
+    if (expected != NULL)
+    {
+        UNITY_OUTPUT_CHAR('\'');
+        UnityPrintLen(expected, length);
+        UNITY_OUTPUT_CHAR('\'');
+    }
+    else
+    {
+        UnityPrint(UnityStrNull);
+    }
+    UnityPrint(UnityStrWas);
+    if (actual != NULL)
+    {
+        UNITY_OUTPUT_CHAR('\'');
+        UnityPrintLen(actual, length);
+        UNITY_OUTPUT_CHAR('\'');
+    }
+    else
+    {
+        UnityPrint(UnityStrNull);
+    }
+}
+
+/*-----------------------------------------------
+ * Assertion & Control Helpers
+ *-----------------------------------------------*/
+
+/*-----------------------------------------------*/
+static int UnityIsOneArrayNull(UNITY_INTERNAL_PTR expected,
+                               UNITY_INTERNAL_PTR actual,
+                               const UNITY_LINE_TYPE lineNumber,
+                               const char* msg)
+{
+    /* Both are NULL or same pointer */
+    if (expected == actual) { return 0; }
+
+    /* print and return true if just expected is NULL */
+    if (expected == NULL)
+    {
+        UnityTestResultsFailBegin(lineNumber);
+        UnityPrint(UnityStrNullPointerForExpected);
+        UnityAddMsgIfSpecified(msg);
+        return 1;
+    }
+
+    /* print and return true if just actual is NULL */
+    if (actual == NULL)
+    {
+        UnityTestResultsFailBegin(lineNumber);
+        UnityPrint(UnityStrNullPointerForActual);
+        UnityAddMsgIfSpecified(msg);
+        return 1;
+    }
+
+    return 0; /* return false if neither is NULL */
+}
+
+/*-----------------------------------------------
+ * Assertion Functions
+ *-----------------------------------------------*/
+
+/*-----------------------------------------------*/
+void UnityAssertBits(const UNITY_INT mask,
+                     const UNITY_INT expected,
+                     const UNITY_INT actual,
+                     const char* msg,
+                     const UNITY_LINE_TYPE lineNumber)
+{
+    RETURN_IF_FAIL_OR_IGNORE;
+
+    if ((mask & expected) != (mask & actual))
+    {
+        UnityTestResultsFailBegin(lineNumber);
+        UnityPrint(UnityStrExpected);
+        UnityPrintMask((UNITY_UINT)mask, (UNITY_UINT)expected);
+        UnityPrint(UnityStrWas);
+        UnityPrintMask((UNITY_UINT)mask, (UNITY_UINT)actual);
+        UnityAddMsgIfSpecified(msg);
+        UNITY_FAIL_AND_BAIL;
+    }
+}
+
+/*-----------------------------------------------*/
+void UnityAssertEqualNumber(const UNITY_INT expected,
+                            const UNITY_INT actual,
+                            const char* msg,
+                            const UNITY_LINE_TYPE lineNumber,
+                            const UNITY_DISPLAY_STYLE_T style)
+{
+    RETURN_IF_FAIL_OR_IGNORE;
+
+    if (expected != actual)
+    {
+        UnityTestResultsFailBegin(lineNumber);
+        UnityPrint(UnityStrExpected);
+        UnityPrintNumberByStyle(expected, style);
+        UnityPrint(UnityStrWas);
+        UnityPrintNumberByStyle(actual, style);
+        UnityAddMsgIfSpecified(msg);
+        UNITY_FAIL_AND_BAIL;
+    }
+}
+
+/*-----------------------------------------------*/
+void UnityAssertGreaterOrLessOrEqualNumber(const UNITY_INT threshold,
+                                           const UNITY_INT actual,
+                                           const UNITY_COMPARISON_T compare,
+                                           const char *msg,
+                                           const UNITY_LINE_TYPE lineNumber,
+                                           const UNITY_DISPLAY_STYLE_T style)
+{
+    int failed = 0;
+    RETURN_IF_FAIL_OR_IGNORE;
+
+    if ((threshold == actual) && (compare & UNITY_EQUAL_TO)) { return; }
+    if ((threshold == actual))                               { failed = 1; }
+
+    if ((style & UNITY_DISPLAY_RANGE_INT) == UNITY_DISPLAY_RANGE_INT)
+    {
+        if ((actual > threshold) && (compare & UNITY_SMALLER_THAN)) { failed = 1; }
+        if ((actual < threshold) && (compare & UNITY_GREATER_THAN)) { failed = 1; }
+    }
+    else /* UINT or HEX */
+    {
+        if (((UNITY_UINT)actual > (UNITY_UINT)threshold) && (compare & UNITY_SMALLER_THAN)) { failed = 1; }
+        if (((UNITY_UINT)actual < (UNITY_UINT)threshold) && (compare & UNITY_GREATER_THAN)) { failed = 1; }
+    }
+
+    if (failed)
+    {
+        UnityTestResultsFailBegin(lineNumber);
+        UnityPrint(UnityStrExpected);
+        UnityPrintNumberByStyle(actual, style);
+        if (compare & UNITY_GREATER_THAN) { UnityPrint(UnityStrGt);       }
+        if (compare & UNITY_SMALLER_THAN) { UnityPrint(UnityStrLt);       }
+        if (compare & UNITY_EQUAL_TO)     { UnityPrint(UnityStrOrEqual);  }
+        if (compare == UNITY_NOT_EQUAL)   { UnityPrint(UnityStrNotEqual); }
+        UnityPrintNumberByStyle(threshold, style);
+        UnityAddMsgIfSpecified(msg);
+        UNITY_FAIL_AND_BAIL;
+    }
+}
+
+#define UnityPrintPointlessAndBail()       \
+{                                          \
+    UnityTestResultsFailBegin(lineNumber); \
+    UnityPrint(UnityStrPointless);         \
+    UnityAddMsgIfSpecified(msg);           \
+    UNITY_FAIL_AND_BAIL; }
+
+/*-----------------------------------------------*/
+void UnityAssertEqualIntArray(UNITY_INTERNAL_PTR expected,
+                              UNITY_INTERNAL_PTR actual,
+                              const UNITY_UINT32 num_elements,
+                              const char* msg,
+                              const UNITY_LINE_TYPE lineNumber,
+                              const UNITY_DISPLAY_STYLE_T style,
+                              const UNITY_FLAGS_T flags)
+{
+    UNITY_UINT32 elements  = num_elements;
+    unsigned int length    = style & 0xF;
+    unsigned int increment = 0;
+
+    RETURN_IF_FAIL_OR_IGNORE;
+
+    if (num_elements == 0)
+    {
+        UnityPrintPointlessAndBail();
+    }
+
+    if (expected == actual)
+    {
+        return; /* Both are NULL or same pointer */
+    }
+
+    if (UnityIsOneArrayNull(expected, actual, lineNumber, msg))
+    {
+        UNITY_FAIL_AND_BAIL;
+    }
+
+    while ((elements > 0) && (elements--))
+    {
+        UNITY_INT expect_val;
+        UNITY_INT actual_val;
+
+        switch (length)
+        {
+            case 1:
+                expect_val = *(UNITY_PTR_ATTRIBUTE const UNITY_INT8*)expected;
+                actual_val = *(UNITY_PTR_ATTRIBUTE const UNITY_INT8*)actual;
+                increment  = sizeof(UNITY_INT8);
+                break;
+
+            case 2:
+                expect_val = *(UNITY_PTR_ATTRIBUTE const UNITY_INT16*)expected;
+                actual_val = *(UNITY_PTR_ATTRIBUTE const UNITY_INT16*)actual;
+                increment  = sizeof(UNITY_INT16);
+                break;
+
+#ifdef UNITY_SUPPORT_64
+            case 8:
+                expect_val = *(UNITY_PTR_ATTRIBUTE const UNITY_INT64*)expected;
+                actual_val = *(UNITY_PTR_ATTRIBUTE const UNITY_INT64*)actual;
+                increment  = sizeof(UNITY_INT64);
+                break;
+#endif
+
+            default: /* default is length 4 bytes */
+            case 4:
+                expect_val = *(UNITY_PTR_ATTRIBUTE const UNITY_INT32*)expected;
+                actual_val = *(UNITY_PTR_ATTRIBUTE const UNITY_INT32*)actual;
+                increment  = sizeof(UNITY_INT32);
+                length = 4;
+                break;
+        }
+
+        if (expect_val != actual_val)
+        {
+            if ((style & UNITY_DISPLAY_RANGE_UINT) && (length < (UNITY_INT_WIDTH / 8)))
+            {   /* For UINT, remove sign extension (padding 1's) from signed type casts above */
+                UNITY_INT mask = 1;
+                mask = (mask << 8 * length) - 1;
+                expect_val &= mask;
+                actual_val &= mask;
+            }
+            UnityTestResultsFailBegin(lineNumber);
+            UnityPrint(UnityStrElement);
+            UnityPrintNumberUnsigned(num_elements - elements - 1);
+            UnityPrint(UnityStrExpected);
+            UnityPrintNumberByStyle(expect_val, style);
+            UnityPrint(UnityStrWas);
+            UnityPrintNumberByStyle(actual_val, style);
+            UnityAddMsgIfSpecified(msg);
+            UNITY_FAIL_AND_BAIL;
+        }
+        /* Walk through array by incrementing the pointers */
+        if (flags == UNITY_ARRAY_TO_ARRAY)
+        {
+            expected = (UNITY_INTERNAL_PTR)((const char*)expected + increment);
+        }
+        actual = (UNITY_INTERNAL_PTR)((const char*)actual + increment);
+    }
+}
+
+/*-----------------------------------------------*/
+#ifndef UNITY_EXCLUDE_FLOAT
+/* Wrap this define in a function with variable types as float or double */
+#define UNITY_FLOAT_OR_DOUBLE_WITHIN(delta, expected, actual, diff)                           \
+    if (isinf(expected) && isinf(actual) && (((expected) < 0) == ((actual) < 0))) return 1;   \
+    if (UNITY_NAN_CHECK) return 1;                                                            \
+    (diff) = (actual) - (expected);                                                           \
+    if ((diff) < 0) (diff) = -(diff);                                                         \
+    if ((delta) < 0) (delta) = -(delta);                                                      \
+    return !(isnan(diff) || isinf(diff) || ((diff) > (delta)))
+    /* This first part of this condition will catch any NaN or Infinite values */
+#ifndef UNITY_NAN_NOT_EQUAL_NAN
+  #define UNITY_NAN_CHECK isnan(expected) && isnan(actual)
+#else
+  #define UNITY_NAN_CHECK 0
+#endif
+
+#ifndef UNITY_EXCLUDE_FLOAT_PRINT
+  #define UNITY_PRINT_EXPECTED_AND_ACTUAL_FLOAT(expected, actual) \
+  {                                                               \
+    UnityPrint(UnityStrExpected);                                 \
+    UnityPrintFloat(expected);                                    \
+    UnityPrint(UnityStrWas);                                      \
+    UnityPrintFloat(actual); }
+#else
+  #define UNITY_PRINT_EXPECTED_AND_ACTUAL_FLOAT(expected, actual) \
+    UnityPrint(UnityStrDelta)
+#endif /* UNITY_EXCLUDE_FLOAT_PRINT */
+
+/*-----------------------------------------------*/
+static int UnityFloatsWithin(UNITY_FLOAT delta, UNITY_FLOAT expected, UNITY_FLOAT actual)
+{
+    UNITY_FLOAT diff;
+    UNITY_FLOAT_OR_DOUBLE_WITHIN(delta, expected, actual, diff);
+}
+
+/*-----------------------------------------------*/
+void UnityAssertEqualFloatArray(UNITY_PTR_ATTRIBUTE const UNITY_FLOAT* expected,
+                                UNITY_PTR_ATTRIBUTE const UNITY_FLOAT* actual,
+                                const UNITY_UINT32 num_elements,
+                                const char* msg,
+                                const UNITY_LINE_TYPE lineNumber,
+                                const UNITY_FLAGS_T flags)
+{
+    UNITY_UINT32 elements = num_elements;
+    UNITY_PTR_ATTRIBUTE const UNITY_FLOAT* ptr_expected = expected;
+    UNITY_PTR_ATTRIBUTE const UNITY_FLOAT* ptr_actual = actual;
+
+    RETURN_IF_FAIL_OR_IGNORE;
+
+    if (elements == 0)
+    {
+        UnityPrintPointlessAndBail();
+    }
+
+    if (expected == actual)
+    {
+        return; /* Both are NULL or same pointer */
+    }
+
+    if (UnityIsOneArrayNull((UNITY_INTERNAL_PTR)expected, (UNITY_INTERNAL_PTR)actual, lineNumber, msg))
+    {
+        UNITY_FAIL_AND_BAIL;
+    }
+
+    while (elements--)
+    {
+        if (!UnityFloatsWithin(*ptr_expected * UNITY_FLOAT_PRECISION, *ptr_expected, *ptr_actual))
+        {
+            UnityTestResultsFailBegin(lineNumber);
+            UnityPrint(UnityStrElement);
+            UnityPrintNumberUnsigned(num_elements - elements - 1);
+            UNITY_PRINT_EXPECTED_AND_ACTUAL_FLOAT((UNITY_DOUBLE)*ptr_expected, (UNITY_DOUBLE)*ptr_actual);
+            UnityAddMsgIfSpecified(msg);
+            UNITY_FAIL_AND_BAIL;
+        }
+        if (flags == UNITY_ARRAY_TO_ARRAY)
+        {
+            ptr_expected++;
+        }
+        ptr_actual++;
+    }
+}
+
+/*-----------------------------------------------*/
+void UnityAssertFloatsWithin(const UNITY_FLOAT delta,
+                             const UNITY_FLOAT expected,
+                             const UNITY_FLOAT actual,
+                             const char* msg,
+                             const UNITY_LINE_TYPE lineNumber)
+{
+    RETURN_IF_FAIL_OR_IGNORE;
+
+
+    if (!UnityFloatsWithin(delta, expected, actual))
+    {
+        UnityTestResultsFailBegin(lineNumber);
+        UNITY_PRINT_EXPECTED_AND_ACTUAL_FLOAT((UNITY_DOUBLE)expected, (UNITY_DOUBLE)actual);
+        UnityAddMsgIfSpecified(msg);
+        UNITY_FAIL_AND_BAIL;
+    }
+}
+
+/*-----------------------------------------------*/
+void UnityAssertFloatSpecial(const UNITY_FLOAT actual,
+                             const char* msg,
+                             const UNITY_LINE_TYPE lineNumber,
+                             const UNITY_FLOAT_TRAIT_T style)
+{
+    const char* trait_names[] = {UnityStrInf, UnityStrNegInf, UnityStrNaN, UnityStrDet};
+    UNITY_INT should_be_trait = ((UNITY_INT)style & 1);
+    UNITY_INT is_trait        = !should_be_trait;
+    UNITY_INT trait_index     = (UNITY_INT)(style >> 1);
+
+    RETURN_IF_FAIL_OR_IGNORE;
+
+    switch (style)
+    {
+        case UNITY_FLOAT_IS_INF:
+        case UNITY_FLOAT_IS_NOT_INF:
+            is_trait = isinf(actual) && (actual > 0);
+            break;
+        case UNITY_FLOAT_IS_NEG_INF:
+        case UNITY_FLOAT_IS_NOT_NEG_INF:
+            is_trait = isinf(actual) && (actual < 0);
+            break;
+
+        case UNITY_FLOAT_IS_NAN:
+        case UNITY_FLOAT_IS_NOT_NAN:
+            is_trait = isnan(actual) ? 1 : 0;
+            break;
+
+        case UNITY_FLOAT_IS_DET: /* A determinate number is non infinite and not NaN. */
+        case UNITY_FLOAT_IS_NOT_DET:
+            is_trait = !isinf(actual) && !isnan(actual);
+            break;
+
+        default:
+            trait_index = 0;
+            trait_names[0] = UnityStrInvalidFloatTrait;
+            break;
+    }
+
+    if (is_trait != should_be_trait)
+    {
+        UnityTestResultsFailBegin(lineNumber);
+        UnityPrint(UnityStrExpected);
+        if (!should_be_trait)
+        {
+            UnityPrint(UnityStrNot);
+        }
+        UnityPrint(trait_names[trait_index]);
+        UnityPrint(UnityStrWas);
+#ifndef UNITY_EXCLUDE_FLOAT_PRINT
+        UnityPrintFloat((UNITY_DOUBLE)actual);
+#else
+        if (should_be_trait)
+        {
+            UnityPrint(UnityStrNot);
+        }
+        UnityPrint(trait_names[trait_index]);
+#endif
+        UnityAddMsgIfSpecified(msg);
+        UNITY_FAIL_AND_BAIL;
+    }
+}
+
+#endif /* not UNITY_EXCLUDE_FLOAT */
+
+/*-----------------------------------------------*/
+#ifndef UNITY_EXCLUDE_DOUBLE
+static int UnityDoublesWithin(UNITY_DOUBLE delta, UNITY_DOUBLE expected, UNITY_DOUBLE actual)
+{
+    UNITY_DOUBLE diff;
+    UNITY_FLOAT_OR_DOUBLE_WITHIN(delta, expected, actual, diff);
+}
+
+/*-----------------------------------------------*/
+void UnityAssertEqualDoubleArray(UNITY_PTR_ATTRIBUTE const UNITY_DOUBLE* expected,
+                                 UNITY_PTR_ATTRIBUTE const UNITY_DOUBLE* actual,
+                                 const UNITY_UINT32 num_elements,
+                                 const char* msg,
+                                 const UNITY_LINE_TYPE lineNumber,
+                                 const UNITY_FLAGS_T flags)
+{
+    UNITY_UINT32 elements = num_elements;
+    UNITY_PTR_ATTRIBUTE const UNITY_DOUBLE* ptr_expected = expected;
+    UNITY_PTR_ATTRIBUTE const UNITY_DOUBLE* ptr_actual = actual;
+
+    RETURN_IF_FAIL_OR_IGNORE;
+
+    if (elements == 0)
+    {
+        UnityPrintPointlessAndBail();
+    }
+
+    if (expected == actual)
+    {
+        return; /* Both are NULL or same pointer */
+    }
+
+    if (UnityIsOneArrayNull((UNITY_INTERNAL_PTR)expected, (UNITY_INTERNAL_PTR)actual, lineNumber, msg))
+    {
+        UNITY_FAIL_AND_BAIL;
+    }
+
+    while (elements--)
+    {
+        if (!UnityDoublesWithin(*ptr_expected * UNITY_DOUBLE_PRECISION, *ptr_expected, *ptr_actual))
+        {
+            UnityTestResultsFailBegin(lineNumber);
+            UnityPrint(UnityStrElement);
+            UnityPrintNumberUnsigned(num_elements - elements - 1);
+            UNITY_PRINT_EXPECTED_AND_ACTUAL_FLOAT(*ptr_expected, *ptr_actual);
+            UnityAddMsgIfSpecified(msg);
+            UNITY_FAIL_AND_BAIL;
+        }
+        if (flags == UNITY_ARRAY_TO_ARRAY)
+        {
+            ptr_expected++;
+        }
+        ptr_actual++;
+    }
+}
+
+/*-----------------------------------------------*/
+void UnityAssertDoublesWithin(const UNITY_DOUBLE delta,
+                              const UNITY_DOUBLE expected,
+                              const UNITY_DOUBLE actual,
+                              const char* msg,
+                              const UNITY_LINE_TYPE lineNumber)
+{
+    RETURN_IF_FAIL_OR_IGNORE;
+
+    if (!UnityDoublesWithin(delta, expected, actual))
+    {
+        UnityTestResultsFailBegin(lineNumber);
+        UNITY_PRINT_EXPECTED_AND_ACTUAL_FLOAT(expected, actual);
+        UnityAddMsgIfSpecified(msg);
+        UNITY_FAIL_AND_BAIL;
+    }
+}
+
+/*-----------------------------------------------*/
+void UnityAssertDoubleSpecial(const UNITY_DOUBLE actual,
+                              const char* msg,
+                              const UNITY_LINE_TYPE lineNumber,
+                              const UNITY_FLOAT_TRAIT_T style)
+{
+    const char* trait_names[] = {UnityStrInf, UnityStrNegInf, UnityStrNaN, UnityStrDet};
+    UNITY_INT should_be_trait = ((UNITY_INT)style & 1);
+    UNITY_INT is_trait        = !should_be_trait;
+    UNITY_INT trait_index     = (UNITY_INT)(style >> 1);
+
+    RETURN_IF_FAIL_OR_IGNORE;
+
+    switch (style)
+    {
+        case UNITY_FLOAT_IS_INF:
+        case UNITY_FLOAT_IS_NOT_INF:
+            is_trait = isinf(actual) && (actual > 0);
+            break;
+        case UNITY_FLOAT_IS_NEG_INF:
+        case UNITY_FLOAT_IS_NOT_NEG_INF:
+            is_trait = isinf(actual) && (actual < 0);
+            break;
+
+        case UNITY_FLOAT_IS_NAN:
+        case UNITY_FLOAT_IS_NOT_NAN:
+            is_trait = isnan(actual) ? 1 : 0;
+            break;
+
+        case UNITY_FLOAT_IS_DET: /* A determinate number is non infinite and not NaN. */
+        case UNITY_FLOAT_IS_NOT_DET:
+            is_trait = !isinf(actual) && !isnan(actual);
+            break;
+
+        default:
+            trait_index = 0;
+            trait_names[0] = UnityStrInvalidFloatTrait;
+            break;
+    }
+
+    if (is_trait != should_be_trait)
+    {
+        UnityTestResultsFailBegin(lineNumber);
+        UnityPrint(UnityStrExpected);
+        if (!should_be_trait)
+        {
+            UnityPrint(UnityStrNot);
+        }
+        UnityPrint(trait_names[trait_index]);
+        UnityPrint(UnityStrWas);
+#ifndef UNITY_EXCLUDE_FLOAT_PRINT
+        UnityPrintFloat(actual);
+#else
+        if (should_be_trait)
+        {
+            UnityPrint(UnityStrNot);
+        }
+        UnityPrint(trait_names[trait_index]);
+#endif
+        UnityAddMsgIfSpecified(msg);
+        UNITY_FAIL_AND_BAIL;
+    }
+}
+
+#endif /* not UNITY_EXCLUDE_DOUBLE */
+
+/*-----------------------------------------------*/
+void UnityAssertNumbersWithin(const UNITY_UINT delta,
+                              const UNITY_INT expected,
+                              const UNITY_INT actual,
+                              const char* msg,
+                              const UNITY_LINE_TYPE lineNumber,
+                              const UNITY_DISPLAY_STYLE_T style)
+{
+    RETURN_IF_FAIL_OR_IGNORE;
+
+    if ((style & UNITY_DISPLAY_RANGE_INT) == UNITY_DISPLAY_RANGE_INT)
+    {
+        if (actual > expected)
+        {
+            Unity.CurrentTestFailed = (((UNITY_UINT)actual - (UNITY_UINT)expected) > delta);
+        }
+        else
+        {
+            Unity.CurrentTestFailed = (((UNITY_UINT)expected - (UNITY_UINT)actual) > delta);
+        }
+    }
+    else
+    {
+        if ((UNITY_UINT)actual > (UNITY_UINT)expected)
+        {
+            Unity.CurrentTestFailed = (((UNITY_UINT)actual - (UNITY_UINT)expected) > delta);
+        }
+        else
+        {
+            Unity.CurrentTestFailed = (((UNITY_UINT)expected - (UNITY_UINT)actual) > delta);
+        }
+    }
+
+    if (Unity.CurrentTestFailed)
+    {
+        UnityTestResultsFailBegin(lineNumber);
+        UnityPrint(UnityStrDelta);
+        UnityPrintNumberByStyle((UNITY_INT)delta, style);
+        UnityPrint(UnityStrExpected);
+        UnityPrintNumberByStyle(expected, style);
+        UnityPrint(UnityStrWas);
+        UnityPrintNumberByStyle(actual, style);
+        UnityAddMsgIfSpecified(msg);
+        UNITY_FAIL_AND_BAIL;
+    }
+}
+
+/*-----------------------------------------------*/
+void UnityAssertNumbersArrayWithin(const UNITY_UINT delta,
+                                   UNITY_INTERNAL_PTR expected,
+                                   UNITY_INTERNAL_PTR actual,
+                                   const UNITY_UINT32 num_elements,
+                                   const char* msg,
+                                   const UNITY_LINE_TYPE lineNumber,
+                                   const UNITY_DISPLAY_STYLE_T style,
+                                   const UNITY_FLAGS_T flags)
+{
+    UNITY_UINT32 elements = num_elements;
+    unsigned int length   = style & 0xF;
+    unsigned int increment = 0;
+
+    RETURN_IF_FAIL_OR_IGNORE;
+
+    if (num_elements == 0)
+    {
+        UnityPrintPointlessAndBail();
+    }
+
+    if (expected == actual)
+    {
+        return; /* Both are NULL or same pointer */
+    }
+
+    if (UnityIsOneArrayNull(expected, actual, lineNumber, msg))
+    {
+        UNITY_FAIL_AND_BAIL;
+    }
+
+    while ((elements > 0) && (elements--))
+    {
+        UNITY_INT expect_val;
+        UNITY_INT actual_val;
+
+        switch (length)
+        {
+            case 1:
+                expect_val = *(UNITY_PTR_ATTRIBUTE const UNITY_INT8*)expected;
+                actual_val = *(UNITY_PTR_ATTRIBUTE const UNITY_INT8*)actual;
+                increment  = sizeof(UNITY_INT8);
+                break;
+
+            case 2:
+                expect_val = *(UNITY_PTR_ATTRIBUTE const UNITY_INT16*)expected;
+                actual_val = *(UNITY_PTR_ATTRIBUTE const UNITY_INT16*)actual;
+                increment  = sizeof(UNITY_INT16);
+                break;
+
+#ifdef UNITY_SUPPORT_64
+            case 8:
+                expect_val = *(UNITY_PTR_ATTRIBUTE const UNITY_INT64*)expected;
+                actual_val = *(UNITY_PTR_ATTRIBUTE const UNITY_INT64*)actual;
+                increment  = sizeof(UNITY_INT64);
+                break;
+#endif
+
+            default: /* default is length 4 bytes */
+            case 4:
+                expect_val = *(UNITY_PTR_ATTRIBUTE const UNITY_INT32*)expected;
+                actual_val = *(UNITY_PTR_ATTRIBUTE const UNITY_INT32*)actual;
+                increment  = sizeof(UNITY_INT32);
+                length = 4;
+                break;
+        }
+
+        if ((style & UNITY_DISPLAY_RANGE_INT) == UNITY_DISPLAY_RANGE_INT)
+        {
+            if (actual_val > expect_val)
+            {
+                Unity.CurrentTestFailed = (((UNITY_UINT)actual_val - (UNITY_UINT)expect_val) > delta);
+            }
+            else
+            {
+                Unity.CurrentTestFailed = (((UNITY_UINT)expect_val - (UNITY_UINT)actual_val) > delta);
+            }
+        }
+        else
+        {
+            if ((UNITY_UINT)actual_val > (UNITY_UINT)expect_val)
+            {
+                Unity.CurrentTestFailed = (((UNITY_UINT)actual_val - (UNITY_UINT)expect_val) > delta);
+            }
+            else
+            {
+                Unity.CurrentTestFailed = (((UNITY_UINT)expect_val - (UNITY_UINT)actual_val) > delta);
+            }
+        }
+
+        if (Unity.CurrentTestFailed)
+        {
+            if ((style & UNITY_DISPLAY_RANGE_UINT) && (length < (UNITY_INT_WIDTH / 8)))
+            {   /* For UINT, remove sign extension (padding 1's) from signed type casts above */
+                UNITY_INT mask = 1;
+                mask = (mask << 8 * length) - 1;
+                expect_val &= mask;
+                actual_val &= mask;
+            }
+            UnityTestResultsFailBegin(lineNumber);
+            UnityPrint(UnityStrDelta);
+            UnityPrintNumberByStyle((UNITY_INT)delta, style);
+            UnityPrint(UnityStrElement);
+            UnityPrintNumberUnsigned(num_elements - elements - 1);
+            UnityPrint(UnityStrExpected);
+            UnityPrintNumberByStyle(expect_val, style);
+            UnityPrint(UnityStrWas);
+            UnityPrintNumberByStyle(actual_val, style);
+            UnityAddMsgIfSpecified(msg);
+            UNITY_FAIL_AND_BAIL;
+        }
+        /* Walk through array by incrementing the pointers */
+        if (flags == UNITY_ARRAY_TO_ARRAY)
+        {
+            expected = (UNITY_INTERNAL_PTR)((const char*)expected + increment);
+        }
+        actual = (UNITY_INTERNAL_PTR)((const char*)actual + increment);
+    }
+}
+
+/*-----------------------------------------------*/
+void UnityAssertEqualString(const char* expected,
+                            const char* actual,
+                            const char* msg,
+                            const UNITY_LINE_TYPE lineNumber)
+{
+    UNITY_UINT32 i;
+
+    RETURN_IF_FAIL_OR_IGNORE;
+
+    /* if both pointers not null compare the strings */
+    if (expected && actual)
+    {
+        for (i = 0; expected[i] || actual[i]; i++)
+        {
+            if (expected[i] != actual[i])
+            {
+                Unity.CurrentTestFailed = 1;
+                break;
+            }
+        }
+    }
+    else
+    { /* handle case of one pointers being null (if both null, test should pass) */
+        if (expected != actual)
+        {
+            Unity.CurrentTestFailed = 1;
+        }
+    }
+
+    if (Unity.CurrentTestFailed)
+    {
+        UnityTestResultsFailBegin(lineNumber);
+        UnityPrintExpectedAndActualStrings(expected, actual);
+        UnityAddMsgIfSpecified(msg);
+        UNITY_FAIL_AND_BAIL;
+    }
+}
+
+/*-----------------------------------------------*/
+void UnityAssertEqualStringLen(const char* expected,
+                               const char* actual,
+                               const UNITY_UINT32 length,
+                               const char* msg,
+                               const UNITY_LINE_TYPE lineNumber)
+{
+    UNITY_UINT32 i;
+
+    RETURN_IF_FAIL_OR_IGNORE;
+
+    /* if both pointers not null compare the strings */
+    if (expected && actual)
+    {
+        for (i = 0; (i < length) && (expected[i] || actual[i]); i++)
+        {
+            if (expected[i] != actual[i])
+            {
+                Unity.CurrentTestFailed = 1;
+                break;
+            }
+        }
+    }
+    else
+    { /* handle case of one pointers being null (if both null, test should pass) */
+        if (expected != actual)
+        {
+            Unity.CurrentTestFailed = 1;
+        }
+    }
+
+    if (Unity.CurrentTestFailed)
+    {
+        UnityTestResultsFailBegin(lineNumber);
+        UnityPrintExpectedAndActualStringsLen(expected, actual, length);
+        UnityAddMsgIfSpecified(msg);
+        UNITY_FAIL_AND_BAIL;
+    }
+}
+
+/*-----------------------------------------------*/
+void UnityAssertEqualStringArray(UNITY_INTERNAL_PTR expected,
+                                 const char** actual,
+                                 const UNITY_UINT32 num_elements,
+                                 const char* msg,
+                                 const UNITY_LINE_TYPE lineNumber,
+                                 const UNITY_FLAGS_T flags)
+{
+    UNITY_UINT32 i = 0;
+    UNITY_UINT32 j = 0;
+    const char* expd = NULL;
+    const char* act = NULL;
+
+    RETURN_IF_FAIL_OR_IGNORE;
+
+    /* if no elements, it's an error */
+    if (num_elements == 0)
+    {
+        UnityPrintPointlessAndBail();
+    }
+
+    if ((const void*)expected == (const void*)actual)
+    {
+        return; /* Both are NULL or same pointer */
+    }
+
+    if (UnityIsOneArrayNull((UNITY_INTERNAL_PTR)expected, (UNITY_INTERNAL_PTR)actual, lineNumber, msg))
+    {
+        UNITY_FAIL_AND_BAIL;
+    }
+
+    if (flags != UNITY_ARRAY_TO_ARRAY)
+    {
+        expd = (const char*)expected;
+    }
+
+    do
+    {
+        act = actual[j];
+        if (flags == UNITY_ARRAY_TO_ARRAY)
+        {
+            expd = ((const char* const*)expected)[j];
+        }
+
+        /* if both pointers not null compare the strings */
+        if (expd && act)
+        {
+            for (i = 0; expd[i] || act[i]; i++)
+            {
+                if (expd[i] != act[i])
+                {
+                    Unity.CurrentTestFailed = 1;
+                    break;
+                }
+            }
+        }
+        else
+        { /* handle case of one pointers being null (if both null, test should pass) */
+            if (expd != act)
+            {
+                Unity.CurrentTestFailed = 1;
+            }
+        }
+
+        if (Unity.CurrentTestFailed)
+        {
+            UnityTestResultsFailBegin(lineNumber);
+            if (num_elements > 1)
+            {
+                UnityPrint(UnityStrElement);
+                UnityPrintNumberUnsigned(j);
+            }
+            UnityPrintExpectedAndActualStrings(expd, act);
+            UnityAddMsgIfSpecified(msg);
+            UNITY_FAIL_AND_BAIL;
+        }
+    } while (++j < num_elements);
+}
+
+/*-----------------------------------------------*/
+void UnityAssertEqualMemory(UNITY_INTERNAL_PTR expected,
+                            UNITY_INTERNAL_PTR actual,
+                            const UNITY_UINT32 length,
+                            const UNITY_UINT32 num_elements,
+                            const char* msg,
+                            const UNITY_LINE_TYPE lineNumber,
+                            const UNITY_FLAGS_T flags)
+{
+    UNITY_PTR_ATTRIBUTE const unsigned char* ptr_exp = (UNITY_PTR_ATTRIBUTE const unsigned char*)expected;
+    UNITY_PTR_ATTRIBUTE const unsigned char* ptr_act = (UNITY_PTR_ATTRIBUTE const unsigned char*)actual;
+    UNITY_UINT32 elements = num_elements;
+    UNITY_UINT32 bytes;
+
+    RETURN_IF_FAIL_OR_IGNORE;
+
+    if ((elements == 0) || (length == 0))
+    {
+        UnityPrintPointlessAndBail();
+    }
+
+    if (expected == actual)
+    {
+        return; /* Both are NULL or same pointer */
+    }
+
+    if (UnityIsOneArrayNull(expected, actual, lineNumber, msg))
+    {
+        UNITY_FAIL_AND_BAIL;
+    }
+
+    while (elements--)
+    {
+        bytes = length;
+        while (bytes--)
+        {
+            if (*ptr_exp != *ptr_act)
+            {
+                UnityTestResultsFailBegin(lineNumber);
+                UnityPrint(UnityStrMemory);
+                if (num_elements > 1)
+                {
+                    UnityPrint(UnityStrElement);
+                    UnityPrintNumberUnsigned(num_elements - elements - 1);
+                }
+                UnityPrint(UnityStrByte);
+                UnityPrintNumberUnsigned(length - bytes - 1);
+                UnityPrint(UnityStrExpected);
+                UnityPrintNumberByStyle(*ptr_exp, UNITY_DISPLAY_STYLE_HEX8);
+                UnityPrint(UnityStrWas);
+                UnityPrintNumberByStyle(*ptr_act, UNITY_DISPLAY_STYLE_HEX8);
+                UnityAddMsgIfSpecified(msg);
+                UNITY_FAIL_AND_BAIL;
+            }
+            ptr_exp++;
+            ptr_act++;
+        }
+        if (flags == UNITY_ARRAY_TO_VAL)
+        {
+            ptr_exp = (UNITY_PTR_ATTRIBUTE const unsigned char*)expected;
+        }
+    }
+}
+
+/*-----------------------------------------------*/
+
+static union
+{
+    UNITY_INT8 i8;
+    UNITY_INT16 i16;
+    UNITY_INT32 i32;
+#ifdef UNITY_SUPPORT_64
+    UNITY_INT64 i64;
+#endif
+#ifndef UNITY_EXCLUDE_FLOAT
+    float f;
+#endif
+#ifndef UNITY_EXCLUDE_DOUBLE
+    double d;
+#endif
+} UnityQuickCompare;
+
+UNITY_INTERNAL_PTR UnityNumToPtr(const UNITY_INT num, const UNITY_UINT8 size)
+{
+    switch(size)
+    {
+        case 1:
+            UnityQuickCompare.i8 = (UNITY_INT8)num;
+            return (UNITY_INTERNAL_PTR)(&UnityQuickCompare.i8);
+
+        case 2:
+            UnityQuickCompare.i16 = (UNITY_INT16)num;
+            return (UNITY_INTERNAL_PTR)(&UnityQuickCompare.i16);
+
+#ifdef UNITY_SUPPORT_64
+        case 8:
+            UnityQuickCompare.i64 = (UNITY_INT64)num;
+            return (UNITY_INTERNAL_PTR)(&UnityQuickCompare.i64);
+#endif
+
+        default: /* 4 bytes */
+            UnityQuickCompare.i32 = (UNITY_INT32)num;
+            return (UNITY_INTERNAL_PTR)(&UnityQuickCompare.i32);
+    }
+}
+
+#ifndef UNITY_EXCLUDE_FLOAT
+/*-----------------------------------------------*/
+UNITY_INTERNAL_PTR UnityFloatToPtr(const float num)
+{
+    UnityQuickCompare.f = num;
+    return (UNITY_INTERNAL_PTR)(&UnityQuickCompare.f);
+}
+#endif
+
+#ifndef UNITY_EXCLUDE_DOUBLE
+/*-----------------------------------------------*/
+UNITY_INTERNAL_PTR UnityDoubleToPtr(const double num)
+{
+    UnityQuickCompare.d = num;
+    return (UNITY_INTERNAL_PTR)(&UnityQuickCompare.d);
+}
+#endif
+
+/*-----------------------------------------------
+ * printf helper function
+ *-----------------------------------------------*/
+#ifdef UNITY_INCLUDE_PRINT_FORMATTED
+static void UnityPrintFVA(const char* format, va_list va)
+{
+    const char* pch = format;
+    if (pch != NULL)
+    {
+        while (*pch)
+        {
+            /* format identification character */
+            if (*pch == '%')
+            {
+                pch++;
+
+                if (pch != NULL)
+                {
+                    switch (*pch)
+                    {
+                        case 'd':
+                        case 'i':
+                            {
+                                const int number = va_arg(va, int);
+                                UnityPrintNumber((UNITY_INT)number);
+                                break;
+                            }
+#ifndef UNITY_EXCLUDE_FLOAT_PRINT
+                        case 'f':
+                        case 'g':
+                            {
+                                const double number = va_arg(va, double);
+                                UnityPrintFloat((UNITY_DOUBLE)number);
+                                break;
+                            }
+#endif
+                        case 'u':
+                            {
+                                const unsigned int number = va_arg(va, unsigned int);
+                                UnityPrintNumberUnsigned((UNITY_UINT)number);
+                                break;
+                            }
+                        case 'b':
+                            {
+                                const unsigned int number = va_arg(va, unsigned int);
+                                const UNITY_UINT mask = (UNITY_UINT)0 - (UNITY_UINT)1;
+                                UNITY_OUTPUT_CHAR('0');
+                                UNITY_OUTPUT_CHAR('b');
+                                UnityPrintMask(mask, (UNITY_UINT)number);
+                                break;
+                            }
+                        case 'x':
+                        case 'X':
+                        case 'p':
+                            {
+                                const unsigned int number = va_arg(va, unsigned int);
+                                UNITY_OUTPUT_CHAR('0');
+                                UNITY_OUTPUT_CHAR('x');
+                                UnityPrintNumberHex((UNITY_UINT)number, 8);
+                                break;
+                            }
+                        case 'c':
+                            {
+                                const int ch = va_arg(va, int);
+                                UnityPrintChar((const char *)&ch);
+                                break;
+                            }
+                        case 's':
+                            {
+                                const char * string = va_arg(va, const char *);
+                                UnityPrint(string);
+                                break;
+                            }
+                        case '%':
+                            {
+                                UnityPrintChar(pch);
+                                break;
+                            }
+                        default:
+                            {
+                                /* print the unknown format character */
+                                UNITY_OUTPUT_CHAR('%');
+                                UnityPrintChar(pch);
+                                break;
+                            }
+                    }
+                }
+            }
+#ifdef UNITY_OUTPUT_COLOR
+            /* print ANSI escape code */
+            else if ((*pch == 27) && (*(pch + 1) == '['))
+            {
+                pch += UnityPrintAnsiEscapeString(pch);
+                continue;
+            }
+#endif
+            else if (*pch == '\n')
+            {
+                UNITY_PRINT_EOL();
+            }
+            else
+            {
+                UnityPrintChar(pch);
+            }
+
+            pch++;
+        }
+    }
+}
+
+void UnityPrintF(const UNITY_LINE_TYPE line, const char* format, ...)
+{
+    UnityTestResultsBegin(Unity.TestFile, line);
+    UnityPrint("INFO");
+    if(format != NULL)
+    {
+        UnityPrint(": ");
+        va_list va;
+        va_start(va, format);
+        UnityPrintFVA(format, va);
+        va_end(va);
+    }
+    UNITY_PRINT_EOL();
+}
+#endif /* ! UNITY_INCLUDE_PRINT_FORMATTED */
+
+
+/*-----------------------------------------------
+ * Control Functions
+ *-----------------------------------------------*/
+
+/*-----------------------------------------------*/
+void UnityFail(const char* msg, const UNITY_LINE_TYPE line)
+{
+    RETURN_IF_FAIL_OR_IGNORE;
+
+    UnityTestResultsBegin(Unity.TestFile, line);
+    UnityPrint(UnityStrFail);
+    if (msg != NULL)
+    {
+        UNITY_OUTPUT_CHAR(':');
+
+#ifdef UNITY_PRINT_TEST_CONTEXT
+        UNITY_PRINT_TEST_CONTEXT();
+#endif
+#ifndef UNITY_EXCLUDE_DETAILS
+        if (Unity.CurrentDetail1)
+        {
+            UnityPrint(UnityStrDetail1Name);
+            UnityPrint(Unity.CurrentDetail1);
+            if (Unity.CurrentDetail2)
+            {
+                UnityPrint(UnityStrDetail2Name);
+                UnityPrint(Unity.CurrentDetail2);
+            }
+            UnityPrint(UnityStrSpacer);
+        }
+#endif
+        if (msg[0] != ' ')
+        {
+            UNITY_OUTPUT_CHAR(' ');
+        }
+        UnityPrint(msg);
+    }
+
+    UNITY_FAIL_AND_BAIL;
+}
+
+/*-----------------------------------------------*/
+void UnityIgnore(const char* msg, const UNITY_LINE_TYPE line)
+{
+    RETURN_IF_FAIL_OR_IGNORE;
+
+    UnityTestResultsBegin(Unity.TestFile, line);
+    UnityPrint(UnityStrIgnore);
+    if (msg != NULL)
+    {
+        UNITY_OUTPUT_CHAR(':');
+        UNITY_OUTPUT_CHAR(' ');
+        UnityPrint(msg);
+    }
+    UNITY_IGNORE_AND_BAIL;
+}
+
+/*-----------------------------------------------*/
+void UnityMessage(const char* msg, const UNITY_LINE_TYPE line)
+{
+    UnityTestResultsBegin(Unity.TestFile, line);
+    UnityPrint("INFO");
+    if (msg != NULL)
+    {
+      UNITY_OUTPUT_CHAR(':');
+      UNITY_OUTPUT_CHAR(' ');
+      UnityPrint(msg);
+    }
+    UNITY_PRINT_EOL();
+}
+
+/*-----------------------------------------------*/
+/* If we have not defined our own test runner, then include our default test runner to make life easier */
+#ifndef UNITY_SKIP_DEFAULT_RUNNER
+void UnityDefaultTestRun(UnityTestFunction Func, const char* FuncName, const int FuncLineNum)
+{
+    Unity.CurrentTestName = FuncName;
+    Unity.CurrentTestLineNumber = (UNITY_LINE_TYPE)FuncLineNum;
+    Unity.NumberOfTests++;
+    UNITY_CLR_DETAILS();
+    UNITY_EXEC_TIME_START();
+    if (TEST_PROTECT())
+    {
+        setUp();
+        Func();
+    }
+    if (TEST_PROTECT())
+    {
+        tearDown();
+    }
+    UNITY_EXEC_TIME_STOP();
+    UnityConcludeTest();
+}
+#endif
+
+/*-----------------------------------------------*/
+void UnitySetTestFile(const char* filename)
+{
+	Unity.TestFile = filename;
+}
+
+/*-----------------------------------------------*/
+void UnityBegin(const char* filename)
+{
+    Unity.TestFile = filename;
+    Unity.CurrentTestName = NULL;
+    Unity.CurrentTestLineNumber = 0;
+    Unity.NumberOfTests = 0;
+    Unity.TestFailures = 0;
+    Unity.TestIgnores = 0;
+    Unity.CurrentTestFailed = 0;
+    Unity.CurrentTestIgnored = 0;
+
+    UNITY_CLR_DETAILS();
+    UNITY_OUTPUT_START();
+}
+
+/*-----------------------------------------------*/
+int UnityEnd(void)
+{
+    UNITY_PRINT_EOL();
+    UnityPrint(UnityStrBreaker);
+    UNITY_PRINT_EOL();
+    UnityPrintNumber((UNITY_INT)(Unity.NumberOfTests));
+    UnityPrint(UnityStrResultsTests);
+    UnityPrintNumber((UNITY_INT)(Unity.TestFailures));
+    UnityPrint(UnityStrResultsFailures);
+    UnityPrintNumber((UNITY_INT)(Unity.TestIgnores));
+    UnityPrint(UnityStrResultsIgnored);
+    UNITY_PRINT_EOL();
+    if (Unity.TestFailures == 0U)
+    {
+        UnityPrint(UnityStrOk);
+    }
+    else
+    {
+        UnityPrint(UnityStrFail);
+#ifdef UNITY_DIFFERENTIATE_FINAL_FAIL
+        UNITY_OUTPUT_CHAR('E'); UNITY_OUTPUT_CHAR('D');
+#endif
+    }
+    UNITY_PRINT_EOL();
+    UNITY_FLUSH_CALL();
+    UNITY_OUTPUT_COMPLETE();
+    return (int)(Unity.TestFailures);
+}
+
+/*-----------------------------------------------
+ * Command Line Argument Support
+ *-----------------------------------------------*/
+#ifdef UNITY_USE_COMMAND_LINE_ARGS
+
+char* UnityOptionIncludeNamed = NULL;
+char* UnityOptionExcludeNamed = NULL;
+int UnityVerbosity            = 1;
+
+/*-----------------------------------------------*/
+int UnityParseOptions(int argc, char** argv)
+{
+    int i;
+    UnityOptionIncludeNamed = NULL;
+    UnityOptionExcludeNamed = NULL;
+
+    for (i = 1; i < argc; i++)
+    {
+        if (argv[i][0] == '-')
+        {
+            switch (argv[i][1])
+            {
+                case 'l': /* list tests */
+                    return -1;
+                case 'n': /* include tests with name including this string */
+                case 'f': /* an alias for -n */
+                    if (argv[i][2] == '=')
+                    {
+                        UnityOptionIncludeNamed = &argv[i][3];
+                    }
+                    else if (++i < argc)
+                    {
+                        UnityOptionIncludeNamed = argv[i];
+                    }
+                    else
+                    {
+                        UnityPrint("ERROR: No Test String to Include Matches For");
+                        UNITY_PRINT_EOL();
+                        return 1;
+                    }
+                    break;
+                case 'q': /* quiet */
+                    UnityVerbosity = 0;
+                    break;
+                case 'v': /* verbose */
+                    UnityVerbosity = 2;
+                    break;
+                case 'x': /* exclude tests with name including this string */
+                    if (argv[i][2] == '=')
+                    {
+                        UnityOptionExcludeNamed = &argv[i][3];
+                    }
+                    else if (++i < argc)
+                    {
+                        UnityOptionExcludeNamed = argv[i];
+                    }
+                    else
+                    {
+                        UnityPrint("ERROR: No Test String to Exclude Matches For");
+                        UNITY_PRINT_EOL();
+                        return 1;
+                    }
+                    break;
+                default:
+                    UnityPrint("ERROR: Unknown Option ");
+                    UNITY_OUTPUT_CHAR(argv[i][1]);
+                    UNITY_PRINT_EOL();
+                    return 1;
+            }
+        }
+    }
+
+    return 0;
+}
+
+/*-----------------------------------------------*/
+int IsStringInBiggerString(const char* longstring, const char* shortstring)
+{
+    const char* lptr = longstring;
+    const char* sptr = shortstring;
+    const char* lnext = lptr;
+
+    if (*sptr == '*')
+    {
+        return 1;
+    }
+
+    while (*lptr)
+    {
+        lnext = lptr + 1;
+
+        /* If they current bytes match, go on to the next bytes */
+        while (*lptr && *sptr && (*lptr == *sptr))
+        {
+            lptr++;
+            sptr++;
+
+            /* We're done if we match the entire string or up to a wildcard */
+            if (*sptr == '*')
+                return 1;
+            if (*sptr == ',')
+                return 1;
+            if (*sptr == '"')
+                return 1;
+            if (*sptr == '\'')
+                return 1;
+            if (*sptr == ':')
+                return 2;
+            if (*sptr == 0)
+                return 1;
+        }
+
+        /* Otherwise we start in the long pointer 1 character further and try again */
+        lptr = lnext;
+        sptr = shortstring;
+    }
+
+    return 0;
+}
+
+/*-----------------------------------------------*/
+int UnityStringArgumentMatches(const char* str)
+{
+    int retval;
+    const char* ptr1;
+    const char* ptr2;
+    const char* ptrf;
+
+    /* Go through the options and get the substrings for matching one at a time */
+    ptr1 = str;
+    while (ptr1[0] != 0)
+    {
+        if ((ptr1[0] == '"') || (ptr1[0] == '\''))
+        {
+            ptr1++;
+        }
+
+        /* look for the start of the next partial */
+        ptr2 = ptr1;
+        ptrf = 0;
+        do
+        {
+            ptr2++;
+            if ((ptr2[0] == ':') && (ptr2[1] != 0) && (ptr2[0] != '\'') && (ptr2[0] != '"') && (ptr2[0] != ','))
+            {
+                ptrf = &ptr2[1];
+            }
+        } while ((ptr2[0] != 0) && (ptr2[0] != '\'') && (ptr2[0] != '"') && (ptr2[0] != ','));
+
+        while ((ptr2[0] != 0) && ((ptr2[0] == ':') || (ptr2[0] == '\'') || (ptr2[0] == '"') || (ptr2[0] == ',')))
+        {
+            ptr2++;
+        }
+
+        /* done if complete filename match */
+        retval = IsStringInBiggerString(Unity.TestFile, ptr1);
+        if (retval == 1)
+        {
+            return retval;
+        }
+
+        /* done if testname match after filename partial match */
+        if ((retval == 2) && (ptrf != 0))
+        {
+            if (IsStringInBiggerString(Unity.CurrentTestName, ptrf))
+            {
+                return 1;
+            }
+        }
+
+        /* done if complete testname match */
+        if (IsStringInBiggerString(Unity.CurrentTestName, ptr1) == 1)
+        {
+            return 1;
+        }
+
+        ptr1 = ptr2;
+    }
+
+    /* we couldn't find a match for any substrings */
+    return 0;
+}
+
+/*-----------------------------------------------*/
+int UnityTestMatches(void)
+{
+    /* Check if this test name matches the included test pattern */
+    int retval;
+    if (UnityOptionIncludeNamed)
+    {
+        retval = UnityStringArgumentMatches(UnityOptionIncludeNamed);
+    }
+    else
+    {
+        retval = 1;
+    }
+
+    /* Check if this test name matches the excluded test pattern */
+    if (UnityOptionExcludeNamed)
+    {
+        if (UnityStringArgumentMatches(UnityOptionExcludeNamed))
+        {
+            retval = 0;
+        }
+    }
+
+    return retval;
+}
+
+#endif /* UNITY_USE_COMMAND_LINE_ARGS */
+/*-----------------------------------------------*/
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/src/unity.h b/FreeRTOS-Plus/Test/CMock/vendor/unity/src/unity.h
new file mode 100644
index 000000000..8caa78529
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/src/unity.h
@@ -0,0 +1,661 @@
+/* ==========================================
+    Unity Project - A Test Framework for C
+    Copyright (c) 2007-19 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+========================================== */
+
+#ifndef UNITY_FRAMEWORK_H
+#define UNITY_FRAMEWORK_H
+#define UNITY
+
+#define UNITY_VERSION_MAJOR    2
+#define UNITY_VERSION_MINOR    5
+#define UNITY_VERSION_BUILD    1
+#define UNITY_VERSION          ((UNITY_VERSION_MAJOR << 16) | (UNITY_VERSION_MINOR << 8) | UNITY_VERSION_BUILD)
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#include "unity_internals.h"
+
+/*-------------------------------------------------------
+ * Test Setup / Teardown
+ *-------------------------------------------------------*/
+
+/* These functions are intended to be called before and after each test.
+ * If using unity directly, these will need to be provided for each test
+ * executable built. If you are using the test runner generator and/or
+ * Ceedling, these are optional. */
+void setUp(void);
+void tearDown(void);
+
+/* These functions are intended to be called at the beginning and end of an
+ * entire test suite.  suiteTearDown() is passed the number of tests that
+ * failed, and its return value becomes the exit code of main(). If using
+ * Unity directly, you're in charge of calling these if they are desired.
+ * If using Ceedling or the test runner generator, these will be called
+ * automatically if they exist. */
+void suiteSetUp(void);
+int suiteTearDown(int num_failures);
+
+/*-------------------------------------------------------
+ * Test Reset and Verify
+ *-------------------------------------------------------*/
+
+/* These functions are intended to be called before during tests in order
+ * to support complex test loops, etc. Both are NOT built into Unity. Instead
+ * the test runner generator will create them. resetTest will run teardown and
+ * setup again, verifying any end-of-test needs between. verifyTest will only
+ * run the verification. */
+void resetTest(void);
+void verifyTest(void);
+
+/*-------------------------------------------------------
+ * Configuration Options
+ *-------------------------------------------------------
+ * All options described below should be passed as a compiler flag to all files using Unity. If you must add #defines, place them BEFORE the #include above.
+
+ * Integers/longs/pointers
+ *     - Unity attempts to automatically discover your integer sizes
+ *       - define UNITY_EXCLUDE_STDINT_H to stop attempting to look in <stdint.h>
+ *       - define UNITY_EXCLUDE_LIMITS_H to stop attempting to look in <limits.h>
+ *     - If you cannot use the automatic methods above, you can force Unity by using these options:
+ *       - define UNITY_SUPPORT_64
+ *       - set UNITY_INT_WIDTH
+ *       - set UNITY_LONG_WIDTH
+ *       - set UNITY_POINTER_WIDTH
+
+ * Floats
+ *     - define UNITY_EXCLUDE_FLOAT to disallow floating point comparisons
+ *     - define UNITY_FLOAT_PRECISION to specify the precision to use when doing TEST_ASSERT_EQUAL_FLOAT
+ *     - define UNITY_FLOAT_TYPE to specify doubles instead of single precision floats
+ *     - define UNITY_INCLUDE_DOUBLE to allow double floating point comparisons
+ *     - define UNITY_EXCLUDE_DOUBLE to disallow double floating point comparisons (default)
+ *     - define UNITY_DOUBLE_PRECISION to specify the precision to use when doing TEST_ASSERT_EQUAL_DOUBLE
+ *     - define UNITY_DOUBLE_TYPE to specify something other than double
+ *     - define UNITY_EXCLUDE_FLOAT_PRINT to trim binary size, won't print floating point values in errors
+
+ * Output
+ *     - by default, Unity prints to standard out with putchar.  define UNITY_OUTPUT_CHAR(a) with a different function if desired
+ *     - define UNITY_DIFFERENTIATE_FINAL_FAIL to print FAILED (vs. FAIL) at test end summary - for automated search for failure
+
+ * Optimization
+ *     - by default, line numbers are stored in unsigned shorts.  Define UNITY_LINE_TYPE with a different type if your files are huge
+ *     - by default, test and failure counters are unsigned shorts.  Define UNITY_COUNTER_TYPE with a different type if you want to save space or have more than 65535 Tests.
+
+ * Test Cases
+ *     - define UNITY_SUPPORT_TEST_CASES to include the TEST_CASE macro, though really it's mostly about the runner generator script
+
+ * Parameterized Tests
+ *     - you'll want to create a define of TEST_CASE(...) which basically evaluates to nothing
+
+ * Tests with Arguments
+ *     - you'll want to define UNITY_USE_COMMAND_LINE_ARGS if you have the test runner passing arguments to Unity
+
+ *-------------------------------------------------------
+ * Basic Fail and Ignore
+ *-------------------------------------------------------*/
+
+#define TEST_FAIL_MESSAGE(message)                                                                 UNITY_TEST_FAIL(__LINE__, (message))
+#define TEST_FAIL()                                                                                UNITY_TEST_FAIL(__LINE__, NULL)
+#define TEST_IGNORE_MESSAGE(message)                                                               UNITY_TEST_IGNORE(__LINE__, (message))
+#define TEST_IGNORE()                                                                              UNITY_TEST_IGNORE(__LINE__, NULL)
+#define TEST_MESSAGE(message)                                                                      UnityMessage((message), __LINE__)
+#define TEST_ONLY()
+#ifdef UNITY_INCLUDE_PRINT_FORMATTED
+#define TEST_PRINTF(message, ...)                                                                  UnityPrintF(__LINE__, (message), __VA_ARGS__)
+#endif
+
+/* It is not necessary for you to call PASS. A PASS condition is assumed if nothing fails.
+ * This method allows you to abort a test immediately with a PASS state, ignoring the remainder of the test. */
+#define TEST_PASS()                                                                                TEST_ABORT()
+#define TEST_PASS_MESSAGE(message)                                                                 do { UnityMessage((message), __LINE__); TEST_ABORT(); } while(0)
+
+/* This macro does nothing, but it is useful for build tools (like Ceedling) to make use of this to figure out
+ * which files should be linked to in order to perform a test. Use it like TEST_FILE("sandwiches.c") */
+#define TEST_FILE(a)
+
+/*-------------------------------------------------------
+ * Test Asserts (simple)
+ *-------------------------------------------------------*/
+
+/* Boolean */
+#define TEST_ASSERT(condition)                                                                     UNITY_TEST_ASSERT(       (condition), __LINE__, " Expression Evaluated To FALSE")
+#define TEST_ASSERT_TRUE(condition)                                                                UNITY_TEST_ASSERT(       (condition), __LINE__, " Expected TRUE Was FALSE")
+#define TEST_ASSERT_UNLESS(condition)                                                              UNITY_TEST_ASSERT(      !(condition), __LINE__, " Expression Evaluated To TRUE")
+#define TEST_ASSERT_FALSE(condition)                                                               UNITY_TEST_ASSERT(      !(condition), __LINE__, " Expected FALSE Was TRUE")
+#define TEST_ASSERT_NULL(pointer)                                                                  UNITY_TEST_ASSERT_NULL(    (pointer), __LINE__, " Expected NULL")
+#define TEST_ASSERT_NOT_NULL(pointer)                                                              UNITY_TEST_ASSERT_NOT_NULL((pointer), __LINE__, " Expected Non-NULL")
+#define TEST_ASSERT_EMPTY(pointer)                                                                 UNITY_TEST_ASSERT_EMPTY(    (pointer), __LINE__, " Expected Empty")
+#define TEST_ASSERT_NOT_EMPTY(pointer)                                                             UNITY_TEST_ASSERT_NOT_EMPTY((pointer), __LINE__, " Expected Non-Empty")
+
+/* Integers (of all sizes) */
+#define TEST_ASSERT_EQUAL_INT(expected, actual)                                                    UNITY_TEST_ASSERT_EQUAL_INT((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_INT8(expected, actual)                                                   UNITY_TEST_ASSERT_EQUAL_INT8((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_INT16(expected, actual)                                                  UNITY_TEST_ASSERT_EQUAL_INT16((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_INT32(expected, actual)                                                  UNITY_TEST_ASSERT_EQUAL_INT32((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_INT64(expected, actual)                                                  UNITY_TEST_ASSERT_EQUAL_INT64((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_UINT(expected, actual)                                                   UNITY_TEST_ASSERT_EQUAL_UINT( (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_UINT8(expected, actual)                                                  UNITY_TEST_ASSERT_EQUAL_UINT8( (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_UINT16(expected, actual)                                                 UNITY_TEST_ASSERT_EQUAL_UINT16( (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_UINT32(expected, actual)                                                 UNITY_TEST_ASSERT_EQUAL_UINT32( (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_UINT64(expected, actual)                                                 UNITY_TEST_ASSERT_EQUAL_UINT64( (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_size_t(expected, actual)                                                 UNITY_TEST_ASSERT_EQUAL_UINT((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX(expected, actual)                                                    UNITY_TEST_ASSERT_EQUAL_HEX32((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX8(expected, actual)                                                   UNITY_TEST_ASSERT_EQUAL_HEX8( (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX16(expected, actual)                                                  UNITY_TEST_ASSERT_EQUAL_HEX16((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX32(expected, actual)                                                  UNITY_TEST_ASSERT_EQUAL_HEX32((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX64(expected, actual)                                                  UNITY_TEST_ASSERT_EQUAL_HEX64((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_CHAR(expected, actual)                                                   UNITY_TEST_ASSERT_EQUAL_CHAR((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_BITS(mask, expected, actual)                                                   UNITY_TEST_ASSERT_BITS((mask), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_BITS_HIGH(mask, actual)                                                        UNITY_TEST_ASSERT_BITS((mask), (UNITY_UINT32)(-1), (actual), __LINE__, NULL)
+#define TEST_ASSERT_BITS_LOW(mask, actual)                                                         UNITY_TEST_ASSERT_BITS((mask), (UNITY_UINT32)(0), (actual), __LINE__, NULL)
+#define TEST_ASSERT_BIT_HIGH(bit, actual)                                                          UNITY_TEST_ASSERT_BITS(((UNITY_UINT32)1 << (bit)), (UNITY_UINT32)(-1), (actual), __LINE__, NULL)
+#define TEST_ASSERT_BIT_LOW(bit, actual)                                                           UNITY_TEST_ASSERT_BITS(((UNITY_UINT32)1 << (bit)), (UNITY_UINT32)(0), (actual), __LINE__, NULL)
+
+/* Integer Not Equal To (of all sizes) */
+#define TEST_ASSERT_NOT_EQUAL_INT(threshold, actual)                                               UNITY_TEST_ASSERT_NOT_EQUAL_INT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_NOT_EQUAL_INT8(threshold, actual)                                              UNITY_TEST_ASSERT_NOT_EQUAL_INT8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_NOT_EQUAL_INT16(threshold, actual)                                             UNITY_TEST_ASSERT_NOT_EQUAL_INT16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_NOT_EQUAL_INT32(threshold, actual)                                             UNITY_TEST_ASSERT_NOT_EQUAL_INT32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_NOT_EQUAL_INT64(threshold, actual)                                             UNITY_TEST_ASSERT_NOT_EQUAL_INT64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_NOT_EQUAL_UINT(threshold, actual)                                              UNITY_TEST_ASSERT_NOT_EQUAL_UINT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_NOT_EQUAL_UINT8(threshold, actual)                                             UNITY_TEST_ASSERT_NOT_EQUAL_UINT8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_NOT_EQUAL_UINT16(threshold, actual)                                            UNITY_TEST_ASSERT_NOT_EQUAL_UINT16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_NOT_EQUAL_UINT32(threshold, actual)                                            UNITY_TEST_ASSERT_NOT_EQUAL_UINT32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_NOT_EQUAL_UINT64(threshold, actual)                                            UNITY_TEST_ASSERT_NOT_EQUAL_UINT64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_NOT_EQUAL_size_t(threshold, actual)                                            UNITY_TEST_ASSERT_NOT_EQUAL_UINT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_NOT_EQUAL_HEX8(threshold, actual)                                              UNITY_TEST_ASSERT_NOT_EQUAL_HEX8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_NOT_EQUAL_HEX16(threshold, actual)                                             UNITY_TEST_ASSERT_NOT_EQUAL_HEX16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_NOT_EQUAL_HEX32(threshold, actual)                                             UNITY_TEST_ASSERT_NOT_EQUAL_HEX32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_NOT_EQUAL_HEX64(threshold, actual)                                             UNITY_TEST_ASSERT_NOT_EQUAL_HEX64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_NOT_EQUAL_CHAR(threshold, actual)                                              UNITY_TEST_ASSERT_NOT_EQUAL_CHAR((threshold), (actual), __LINE__, NULL)
+
+/* Integer Greater Than/ Less Than (of all sizes) */
+#define TEST_ASSERT_GREATER_THAN(threshold, actual)                                                UNITY_TEST_ASSERT_GREATER_THAN_INT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_INT(threshold, actual)                                            UNITY_TEST_ASSERT_GREATER_THAN_INT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_INT8(threshold, actual)                                           UNITY_TEST_ASSERT_GREATER_THAN_INT8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_INT16(threshold, actual)                                          UNITY_TEST_ASSERT_GREATER_THAN_INT16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_INT32(threshold, actual)                                          UNITY_TEST_ASSERT_GREATER_THAN_INT32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_INT64(threshold, actual)                                          UNITY_TEST_ASSERT_GREATER_THAN_INT64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_UINT(threshold, actual)                                           UNITY_TEST_ASSERT_GREATER_THAN_UINT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_UINT8(threshold, actual)                                          UNITY_TEST_ASSERT_GREATER_THAN_UINT8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_UINT16(threshold, actual)                                         UNITY_TEST_ASSERT_GREATER_THAN_UINT16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_UINT32(threshold, actual)                                         UNITY_TEST_ASSERT_GREATER_THAN_UINT32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_UINT64(threshold, actual)                                         UNITY_TEST_ASSERT_GREATER_THAN_UINT64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_size_t(threshold, actual)                                         UNITY_TEST_ASSERT_GREATER_THAN_UINT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_HEX8(threshold, actual)                                           UNITY_TEST_ASSERT_GREATER_THAN_HEX8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_HEX16(threshold, actual)                                          UNITY_TEST_ASSERT_GREATER_THAN_HEX16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_HEX32(threshold, actual)                                          UNITY_TEST_ASSERT_GREATER_THAN_HEX32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_HEX64(threshold, actual)                                          UNITY_TEST_ASSERT_GREATER_THAN_HEX64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_THAN_CHAR(threshold, actual)                                           UNITY_TEST_ASSERT_GREATER_THAN_CHAR((threshold), (actual), __LINE__, NULL)
+
+#define TEST_ASSERT_LESS_THAN(threshold, actual)                                                   UNITY_TEST_ASSERT_SMALLER_THAN_INT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_INT(threshold, actual)                                               UNITY_TEST_ASSERT_SMALLER_THAN_INT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_INT8(threshold, actual)                                              UNITY_TEST_ASSERT_SMALLER_THAN_INT8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_INT16(threshold, actual)                                             UNITY_TEST_ASSERT_SMALLER_THAN_INT16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_INT32(threshold, actual)                                             UNITY_TEST_ASSERT_SMALLER_THAN_INT32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_INT64(threshold, actual)                                             UNITY_TEST_ASSERT_SMALLER_THAN_INT64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_UINT(threshold, actual)                                              UNITY_TEST_ASSERT_SMALLER_THAN_UINT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_UINT8(threshold, actual)                                             UNITY_TEST_ASSERT_SMALLER_THAN_UINT8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_UINT16(threshold, actual)                                            UNITY_TEST_ASSERT_SMALLER_THAN_UINT16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_UINT32(threshold, actual)                                            UNITY_TEST_ASSERT_SMALLER_THAN_UINT32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_UINT64(threshold, actual)                                            UNITY_TEST_ASSERT_SMALLER_THAN_UINT64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_size_t(threshold, actual)                                            UNITY_TEST_ASSERT_SMALLER_THAN_UINT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_HEX8(threshold, actual)                                              UNITY_TEST_ASSERT_SMALLER_THAN_HEX8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_HEX16(threshold, actual)                                             UNITY_TEST_ASSERT_SMALLER_THAN_HEX16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_HEX32(threshold, actual)                                             UNITY_TEST_ASSERT_SMALLER_THAN_HEX32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_HEX64(threshold, actual)                                             UNITY_TEST_ASSERT_SMALLER_THAN_HEX64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_THAN_CHAR(threshold, actual)                                              UNITY_TEST_ASSERT_SMALLER_THAN_CHAR((threshold), (actual), __LINE__, NULL)
+
+#define TEST_ASSERT_GREATER_OR_EQUAL(threshold, actual)                                            UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT(threshold, actual)                                        UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT8(threshold, actual)                                       UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT16(threshold, actual)                                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT32(threshold, actual)                                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT64(threshold, actual)                                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT(threshold, actual)                                       UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT8(threshold, actual)                                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT16(threshold, actual)                                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT32(threshold, actual)                                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT64(threshold, actual)                                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_size_t(threshold, actual)                                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_HEX8(threshold, actual)                                       UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_HEX16(threshold, actual)                                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_HEX32(threshold, actual)                                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_HEX64(threshold, actual)                                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_GREATER_OR_EQUAL_CHAR(threshold, actual)                                       UNITY_TEST_ASSERT_GREATER_OR_EQUAL_CHAR((threshold), (actual), __LINE__, NULL)
+
+#define TEST_ASSERT_LESS_OR_EQUAL(threshold, actual)                                               UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_INT(threshold, actual)                                           UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_INT8(threshold, actual)                                          UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_INT16(threshold, actual)                                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_INT32(threshold, actual)                                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_INT64(threshold, actual)                                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT(threshold, actual)                                          UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT8(threshold, actual)                                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT16(threshold, actual)                                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT32(threshold, actual)                                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT64(threshold, actual)                                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_size_t(threshold, actual)                                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_HEX8(threshold, actual)                                          UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX8((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_HEX16(threshold, actual)                                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX16((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_HEX32(threshold, actual)                                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX32((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_HEX64(threshold, actual)                                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX64((threshold), (actual), __LINE__, NULL)
+#define TEST_ASSERT_LESS_OR_EQUAL_CHAR(threshold, actual)                                          UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_CHAR((threshold), (actual), __LINE__, NULL)
+
+/* Integer Ranges (of all sizes) */
+#define TEST_ASSERT_INT_WITHIN(delta, expected, actual)                                            UNITY_TEST_ASSERT_INT_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_INT8_WITHIN(delta, expected, actual)                                           UNITY_TEST_ASSERT_INT8_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_INT16_WITHIN(delta, expected, actual)                                          UNITY_TEST_ASSERT_INT16_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_INT32_WITHIN(delta, expected, actual)                                          UNITY_TEST_ASSERT_INT32_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_INT64_WITHIN(delta, expected, actual)                                          UNITY_TEST_ASSERT_INT64_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_UINT_WITHIN(delta, expected, actual)                                           UNITY_TEST_ASSERT_UINT_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_UINT8_WITHIN(delta, expected, actual)                                          UNITY_TEST_ASSERT_UINT8_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_UINT16_WITHIN(delta, expected, actual)                                         UNITY_TEST_ASSERT_UINT16_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_UINT32_WITHIN(delta, expected, actual)                                         UNITY_TEST_ASSERT_UINT32_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_UINT64_WITHIN(delta, expected, actual)                                         UNITY_TEST_ASSERT_UINT64_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_size_t_WITHIN(delta, expected, actual)                                         UNITY_TEST_ASSERT_UINT_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_HEX_WITHIN(delta, expected, actual)                                            UNITY_TEST_ASSERT_HEX32_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_HEX8_WITHIN(delta, expected, actual)                                           UNITY_TEST_ASSERT_HEX8_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_HEX16_WITHIN(delta, expected, actual)                                          UNITY_TEST_ASSERT_HEX16_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_HEX32_WITHIN(delta, expected, actual)                                          UNITY_TEST_ASSERT_HEX32_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_HEX64_WITHIN(delta, expected, actual)                                          UNITY_TEST_ASSERT_HEX64_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_CHAR_WITHIN(delta, expected, actual)                                           UNITY_TEST_ASSERT_CHAR_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+
+/* Integer Array Ranges (of all sizes) */
+#define TEST_ASSERT_INT_ARRAY_WITHIN(delta, expected, actual, num_elements)                        UNITY_TEST_ASSERT_INT_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, NULL)
+#define TEST_ASSERT_INT8_ARRAY_WITHIN(delta, expected, actual, num_elements)                       UNITY_TEST_ASSERT_INT8_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, NULL)
+#define TEST_ASSERT_INT16_ARRAY_WITHIN(delta, expected, actual, num_elements)                      UNITY_TEST_ASSERT_INT16_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, NULL)
+#define TEST_ASSERT_INT32_ARRAY_WITHIN(delta, expected, actual, num_elements)                      UNITY_TEST_ASSERT_INT32_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, NULL)
+#define TEST_ASSERT_INT64_ARRAY_WITHIN(delta, expected, actual, num_elements)                      UNITY_TEST_ASSERT_INT64_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, NULL)
+#define TEST_ASSERT_UINT_ARRAY_WITHIN(delta, expected, actual, num_elements)                       UNITY_TEST_ASSERT_UINT_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, NULL)
+#define TEST_ASSERT_UINT8_ARRAY_WITHIN(delta, expected, actual, num_elements)                      UNITY_TEST_ASSERT_UINT8_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, NULL)
+#define TEST_ASSERT_UINT16_ARRAY_WITHIN(delta, expected, actual, num_elements)                     UNITY_TEST_ASSERT_UINT16_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, NULL)
+#define TEST_ASSERT_UINT32_ARRAY_WITHIN(delta, expected, actual, num_elements)                     UNITY_TEST_ASSERT_UINT32_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, NULL)
+#define TEST_ASSERT_UINT64_ARRAY_WITHIN(delta, expected, actual, num_elements)                     UNITY_TEST_ASSERT_UINT64_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, NULL)
+#define TEST_ASSERT_size_t_ARRAY_WITHIN(delta, expected, actual, num_elements)                     UNITY_TEST_ASSERT_UINT_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, NULL)
+#define TEST_ASSERT_HEX_ARRAY_WITHIN(delta, expected, actual, num_elements)                        UNITY_TEST_ASSERT_HEX32_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, NULL)
+#define TEST_ASSERT_HEX8_ARRAY_WITHIN(delta, expected, actual, num_elements)                       UNITY_TEST_ASSERT_HEX8_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, NULL)
+#define TEST_ASSERT_HEX16_ARRAY_WITHIN(delta, expected, actual, num_elements)                      UNITY_TEST_ASSERT_HEX16_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, NULL)
+#define TEST_ASSERT_HEX32_ARRAY_WITHIN(delta, expected, actual, num_elements)                      UNITY_TEST_ASSERT_HEX32_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, NULL)
+#define TEST_ASSERT_HEX64_ARRAY_WITHIN(delta, expected, actual, num_elements)                      UNITY_TEST_ASSERT_HEX64_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, NULL)
+#define TEST_ASSERT_CHAR_ARRAY_WITHIN(delta, expected, actual, num_elements)                       UNITY_TEST_ASSERT_CHAR_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, NULL)
+
+
+/* Structs and Strings */
+#define TEST_ASSERT_EQUAL_PTR(expected, actual)                                                    UNITY_TEST_ASSERT_EQUAL_PTR((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_STRING(expected, actual)                                                 UNITY_TEST_ASSERT_EQUAL_STRING((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_STRING_LEN(expected, actual, len)                                        UNITY_TEST_ASSERT_EQUAL_STRING_LEN((expected), (actual), (len), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_MEMORY(expected, actual, len)                                            UNITY_TEST_ASSERT_EQUAL_MEMORY((expected), (actual), (len), __LINE__, NULL)
+
+/* Arrays */
+#define TEST_ASSERT_EQUAL_INT_ARRAY(expected, actual, num_elements)                                UNITY_TEST_ASSERT_EQUAL_INT_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_INT8_ARRAY(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EQUAL_INT8_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_INT16_ARRAY(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EQUAL_INT16_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_INT32_ARRAY(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EQUAL_INT32_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_INT64_ARRAY(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EQUAL_INT64_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_UINT_ARRAY(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EQUAL_UINT_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_UINT8_ARRAY(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EQUAL_UINT8_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_UINT16_ARRAY(expected, actual, num_elements)                             UNITY_TEST_ASSERT_EQUAL_UINT16_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_UINT32_ARRAY(expected, actual, num_elements)                             UNITY_TEST_ASSERT_EQUAL_UINT32_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_UINT64_ARRAY(expected, actual, num_elements)                             UNITY_TEST_ASSERT_EQUAL_UINT64_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_size_t_ARRAY(expected, actual, num_elements)                             UNITY_TEST_ASSERT_EQUAL_UINT_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX_ARRAY(expected, actual, num_elements)                                UNITY_TEST_ASSERT_EQUAL_HEX32_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX8_ARRAY(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EQUAL_HEX8_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX16_ARRAY(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EQUAL_HEX16_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX32_ARRAY(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EQUAL_HEX32_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_HEX64_ARRAY(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EQUAL_HEX64_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_PTR_ARRAY(expected, actual, num_elements)                                UNITY_TEST_ASSERT_EQUAL_PTR_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_STRING_ARRAY(expected, actual, num_elements)                             UNITY_TEST_ASSERT_EQUAL_STRING_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_MEMORY_ARRAY(expected, actual, len, num_elements)                        UNITY_TEST_ASSERT_EQUAL_MEMORY_ARRAY((expected), (actual), (len), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_CHAR_ARRAY(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EQUAL_CHAR_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+
+/* Arrays Compared To Single Value */
+#define TEST_ASSERT_EACH_EQUAL_INT(expected, actual, num_elements)                                 UNITY_TEST_ASSERT_EACH_EQUAL_INT((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_INT8(expected, actual, num_elements)                                UNITY_TEST_ASSERT_EACH_EQUAL_INT8((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_INT16(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EACH_EQUAL_INT16((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_INT32(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EACH_EQUAL_INT32((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_INT64(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EACH_EQUAL_INT64((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_UINT(expected, actual, num_elements)                                UNITY_TEST_ASSERT_EACH_EQUAL_UINT((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_UINT8(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EACH_EQUAL_UINT8((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_UINT16(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EACH_EQUAL_UINT16((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_UINT32(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EACH_EQUAL_UINT32((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_UINT64(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EACH_EQUAL_UINT64((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_size_t(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EACH_EQUAL_UINT((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_HEX(expected, actual, num_elements)                                 UNITY_TEST_ASSERT_EACH_EQUAL_HEX32((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_HEX8(expected, actual, num_elements)                                UNITY_TEST_ASSERT_EACH_EQUAL_HEX8((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_HEX16(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EACH_EQUAL_HEX16((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_HEX32(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EACH_EQUAL_HEX32((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_HEX64(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EACH_EQUAL_HEX64((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_PTR(expected, actual, num_elements)                                 UNITY_TEST_ASSERT_EACH_EQUAL_PTR((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_STRING(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EACH_EQUAL_STRING((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_MEMORY(expected, actual, len, num_elements)                         UNITY_TEST_ASSERT_EACH_EQUAL_MEMORY((expected), (actual), (len), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_CHAR(expected, actual, num_elements)                                UNITY_TEST_ASSERT_EACH_EQUAL_CHAR((expected), (actual), (num_elements), __LINE__, NULL)
+
+/* Floating Point (If Enabled) */
+#define TEST_ASSERT_FLOAT_WITHIN(delta, expected, actual)                                          UNITY_TEST_ASSERT_FLOAT_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_FLOAT(expected, actual)                                                  UNITY_TEST_ASSERT_EQUAL_FLOAT((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_FLOAT_ARRAY(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EQUAL_FLOAT_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_FLOAT(expected, actual, num_elements)                               UNITY_TEST_ASSERT_EACH_EQUAL_FLOAT((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_FLOAT_IS_INF(actual)                                                           UNITY_TEST_ASSERT_FLOAT_IS_INF((actual), __LINE__, NULL)
+#define TEST_ASSERT_FLOAT_IS_NEG_INF(actual)                                                       UNITY_TEST_ASSERT_FLOAT_IS_NEG_INF((actual), __LINE__, NULL)
+#define TEST_ASSERT_FLOAT_IS_NAN(actual)                                                           UNITY_TEST_ASSERT_FLOAT_IS_NAN((actual), __LINE__, NULL)
+#define TEST_ASSERT_FLOAT_IS_DETERMINATE(actual)                                                   UNITY_TEST_ASSERT_FLOAT_IS_DETERMINATE((actual), __LINE__, NULL)
+#define TEST_ASSERT_FLOAT_IS_NOT_INF(actual)                                                       UNITY_TEST_ASSERT_FLOAT_IS_NOT_INF((actual), __LINE__, NULL)
+#define TEST_ASSERT_FLOAT_IS_NOT_NEG_INF(actual)                                                   UNITY_TEST_ASSERT_FLOAT_IS_NOT_NEG_INF((actual), __LINE__, NULL)
+#define TEST_ASSERT_FLOAT_IS_NOT_NAN(actual)                                                       UNITY_TEST_ASSERT_FLOAT_IS_NOT_NAN((actual), __LINE__, NULL)
+#define TEST_ASSERT_FLOAT_IS_NOT_DETERMINATE(actual)                                               UNITY_TEST_ASSERT_FLOAT_IS_NOT_DETERMINATE((actual), __LINE__, NULL)
+
+/* Double (If Enabled) */
+#define TEST_ASSERT_DOUBLE_WITHIN(delta, expected, actual)                                         UNITY_TEST_ASSERT_DOUBLE_WITHIN((delta), (expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_DOUBLE(expected, actual)                                                 UNITY_TEST_ASSERT_EQUAL_DOUBLE((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_EQUAL_DOUBLE_ARRAY(expected, actual, num_elements)                             UNITY_TEST_ASSERT_EQUAL_DOUBLE_ARRAY((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_EACH_EQUAL_DOUBLE(expected, actual, num_elements)                              UNITY_TEST_ASSERT_EACH_EQUAL_DOUBLE((expected), (actual), (num_elements), __LINE__, NULL)
+#define TEST_ASSERT_DOUBLE_IS_INF(actual)                                                          UNITY_TEST_ASSERT_DOUBLE_IS_INF((actual), __LINE__, NULL)
+#define TEST_ASSERT_DOUBLE_IS_NEG_INF(actual)                                                      UNITY_TEST_ASSERT_DOUBLE_IS_NEG_INF((actual), __LINE__, NULL)
+#define TEST_ASSERT_DOUBLE_IS_NAN(actual)                                                          UNITY_TEST_ASSERT_DOUBLE_IS_NAN((actual), __LINE__, NULL)
+#define TEST_ASSERT_DOUBLE_IS_DETERMINATE(actual)                                                  UNITY_TEST_ASSERT_DOUBLE_IS_DETERMINATE((actual), __LINE__, NULL)
+#define TEST_ASSERT_DOUBLE_IS_NOT_INF(actual)                                                      UNITY_TEST_ASSERT_DOUBLE_IS_NOT_INF((actual), __LINE__, NULL)
+#define TEST_ASSERT_DOUBLE_IS_NOT_NEG_INF(actual)                                                  UNITY_TEST_ASSERT_DOUBLE_IS_NOT_NEG_INF((actual), __LINE__, NULL)
+#define TEST_ASSERT_DOUBLE_IS_NOT_NAN(actual)                                                      UNITY_TEST_ASSERT_DOUBLE_IS_NOT_NAN((actual), __LINE__, NULL)
+#define TEST_ASSERT_DOUBLE_IS_NOT_DETERMINATE(actual)                                              UNITY_TEST_ASSERT_DOUBLE_IS_NOT_DETERMINATE((actual), __LINE__, NULL)
+
+/* Shorthand */
+#ifdef UNITY_SHORTHAND_AS_OLD
+#define TEST_ASSERT_EQUAL(expected, actual)                                                        UNITY_TEST_ASSERT_EQUAL_INT((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_NOT_EQUAL(expected, actual)                                                    UNITY_TEST_ASSERT(((expected) != (actual)), __LINE__, " Expected Not-Equal")
+#endif
+#ifdef UNITY_SHORTHAND_AS_INT
+#define TEST_ASSERT_EQUAL(expected, actual)                                                        UNITY_TEST_ASSERT_EQUAL_INT((expected), (actual), __LINE__, NULL)
+#define TEST_ASSERT_NOT_EQUAL(expected, actual)                                                    UNITY_TEST_FAIL(__LINE__, UnityStrErrShorthand)
+#endif
+#ifdef UNITY_SHORTHAND_AS_MEM
+#define TEST_ASSERT_EQUAL(expected, actual)                                                        UNITY_TEST_ASSERT_EQUAL_MEMORY((&expected), (&actual), sizeof(expected), __LINE__, NULL)
+#define TEST_ASSERT_NOT_EQUAL(expected, actual)                                                    UNITY_TEST_FAIL(__LINE__, UnityStrErrShorthand)
+#endif
+#ifdef UNITY_SHORTHAND_AS_RAW
+#define TEST_ASSERT_EQUAL(expected, actual)                                                        UNITY_TEST_ASSERT(((expected) == (actual)), __LINE__, " Expected Equal")
+#define TEST_ASSERT_NOT_EQUAL(expected, actual)                                                    UNITY_TEST_ASSERT(((expected) != (actual)), __LINE__, " Expected Not-Equal")
+#endif
+#ifdef UNITY_SHORTHAND_AS_NONE
+#define TEST_ASSERT_EQUAL(expected, actual)                                                        UNITY_TEST_FAIL(__LINE__, UnityStrErrShorthand)
+#define TEST_ASSERT_NOT_EQUAL(expected, actual)                                                    UNITY_TEST_FAIL(__LINE__, UnityStrErrShorthand)
+#endif
+
+/*-------------------------------------------------------
+ * Test Asserts (with additional messages)
+ *-------------------------------------------------------*/
+
+/* Boolean */
+#define TEST_ASSERT_MESSAGE(condition, message)                                                    UNITY_TEST_ASSERT(       (condition), __LINE__, (message))
+#define TEST_ASSERT_TRUE_MESSAGE(condition, message)                                               UNITY_TEST_ASSERT(       (condition), __LINE__, (message))
+#define TEST_ASSERT_UNLESS_MESSAGE(condition, message)                                             UNITY_TEST_ASSERT(      !(condition), __LINE__, (message))
+#define TEST_ASSERT_FALSE_MESSAGE(condition, message)                                              UNITY_TEST_ASSERT(      !(condition), __LINE__, (message))
+#define TEST_ASSERT_NULL_MESSAGE(pointer, message)                                                 UNITY_TEST_ASSERT_NULL(    (pointer), __LINE__, (message))
+#define TEST_ASSERT_NOT_NULL_MESSAGE(pointer, message)                                             UNITY_TEST_ASSERT_NOT_NULL((pointer), __LINE__, (message))
+#define TEST_ASSERT_EMPTY_MESSAGE(pointer, message)                                                UNITY_TEST_ASSERT_EMPTY(    (pointer), __LINE__, (message))
+#define TEST_ASSERT_NOT_EMPTY_MESSAGE(pointer, message)                                            UNITY_TEST_ASSERT_NOT_EMPTY((pointer), __LINE__, (message))
+
+/* Integers (of all sizes) */
+#define TEST_ASSERT_EQUAL_INT_MESSAGE(expected, actual, message)                                   UNITY_TEST_ASSERT_EQUAL_INT((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_INT8_MESSAGE(expected, actual, message)                                  UNITY_TEST_ASSERT_EQUAL_INT8((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_INT16_MESSAGE(expected, actual, message)                                 UNITY_TEST_ASSERT_EQUAL_INT16((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_INT32_MESSAGE(expected, actual, message)                                 UNITY_TEST_ASSERT_EQUAL_INT32((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_INT64_MESSAGE(expected, actual, message)                                 UNITY_TEST_ASSERT_EQUAL_INT64((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT_MESSAGE(expected, actual, message)                                  UNITY_TEST_ASSERT_EQUAL_UINT( (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT8_MESSAGE(expected, actual, message)                                 UNITY_TEST_ASSERT_EQUAL_UINT8( (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT16_MESSAGE(expected, actual, message)                                UNITY_TEST_ASSERT_EQUAL_UINT16( (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT32_MESSAGE(expected, actual, message)                                UNITY_TEST_ASSERT_EQUAL_UINT32( (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT64_MESSAGE(expected, actual, message)                                UNITY_TEST_ASSERT_EQUAL_UINT64( (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_size_t_MESSAGE(expected, actual, message)                                UNITY_TEST_ASSERT_EQUAL_UINT( (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX_MESSAGE(expected, actual, message)                                   UNITY_TEST_ASSERT_EQUAL_HEX32((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX8_MESSAGE(expected, actual, message)                                  UNITY_TEST_ASSERT_EQUAL_HEX8( (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX16_MESSAGE(expected, actual, message)                                 UNITY_TEST_ASSERT_EQUAL_HEX16((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX32_MESSAGE(expected, actual, message)                                 UNITY_TEST_ASSERT_EQUAL_HEX32((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX64_MESSAGE(expected, actual, message)                                 UNITY_TEST_ASSERT_EQUAL_HEX64((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_BITS_MESSAGE(mask, expected, actual, message)                                  UNITY_TEST_ASSERT_BITS((mask), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_BITS_HIGH_MESSAGE(mask, actual, message)                                       UNITY_TEST_ASSERT_BITS((mask), (UNITY_UINT32)(-1), (actual), __LINE__, (message))
+#define TEST_ASSERT_BITS_LOW_MESSAGE(mask, actual, message)                                        UNITY_TEST_ASSERT_BITS((mask), (UNITY_UINT32)(0), (actual), __LINE__, (message))
+#define TEST_ASSERT_BIT_HIGH_MESSAGE(bit, actual, message)                                         UNITY_TEST_ASSERT_BITS(((UNITY_UINT32)1 << (bit)), (UNITY_UINT32)(-1), (actual), __LINE__, (message))
+#define TEST_ASSERT_BIT_LOW_MESSAGE(bit, actual, message)                                          UNITY_TEST_ASSERT_BITS(((UNITY_UINT32)1 << (bit)), (UNITY_UINT32)(0), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_CHAR_MESSAGE(expected, actual, message)                                  UNITY_TEST_ASSERT_EQUAL_CHAR((expected), (actual), __LINE__, (message))
+
+/* Integer Not Equal To (of all sizes) */
+#define TEST_ASSERT_NOT_EQUAL_INT_MESSAGE(threshold, actual, message)                              UNITY_TEST_ASSERT_NOT_EQUAL_INT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_NOT_EQUAL_INT8_MESSAGE(threshold, actual, message)                             UNITY_TEST_ASSERT_NOT_EQUAL_INT8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_NOT_EQUAL_INT16_MESSAGE(threshold, actual, message)                            UNITY_TEST_ASSERT_NOT_EQUAL_INT16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_NOT_EQUAL_INT32_MESSAGE(threshold, actual, message)                            UNITY_TEST_ASSERT_NOT_EQUAL_INT32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_NOT_EQUAL_INT64_MESSAGE(threshold, actual, message)                            UNITY_TEST_ASSERT_NOT_EQUAL_INT64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_NOT_EQUAL_UINT_MESSAGE(threshold, actual, message)                             UNITY_TEST_ASSERT_NOT_EQUAL_UINT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_NOT_EQUAL_UINT8_MESSAGE(threshold, actual, message)                            UNITY_TEST_ASSERT_NOT_EQUAL_UINT8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_NOT_EQUAL_UINT16_MESSAGE(threshold, actual, message)                           UNITY_TEST_ASSERT_NOT_EQUAL_UINT16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_NOT_EQUAL_UINT32_MESSAGE(threshold, actual, message)                           UNITY_TEST_ASSERT_NOT_EQUAL_UINT32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_NOT_EQUAL_UINT64_MESSAGE(threshold, actual, message)                           UNITY_TEST_ASSERT_NOT_EQUAL_UINT64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_NOT_EQUAL_size_t_MESSAGE(threshold, actual, message)                           UNITY_TEST_ASSERT_NOT_EQUAL_UINT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_NOT_EQUAL_HEX8_MESSAGE(threshold, actual, message)                             UNITY_TEST_ASSERT_NOT_EQUAL_HEX8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_NOT_EQUAL_HEX16_MESSAGE(threshold, actual, message)                            UNITY_TEST_ASSERT_NOT_EQUAL_HEX16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_NOT_EQUAL_HEX32_MESSAGE(threshold, actual, message)                            UNITY_TEST_ASSERT_NOT_EQUAL_HEX32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_NOT_EQUAL_HEX64_MESSAGE(threshold, actual, message)                            UNITY_TEST_ASSERT_NOT_EQUAL_HEX64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_NOT_EQUAL_CHAR_MESSAGE(threshold, actual, message)                             UNITY_TEST_ASSERT_NOT_EQUAL_CHAR((threshold), (actual), __LINE__, (message))
+
+
+/* Integer Greater Than/ Less Than (of all sizes) */
+#define TEST_ASSERT_GREATER_THAN_MESSAGE(threshold, actual, message)                               UNITY_TEST_ASSERT_GREATER_THAN_INT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_INT_MESSAGE(threshold, actual, message)                           UNITY_TEST_ASSERT_GREATER_THAN_INT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_INT8_MESSAGE(threshold, actual, message)                          UNITY_TEST_ASSERT_GREATER_THAN_INT8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_INT16_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_GREATER_THAN_INT16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_INT32_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_GREATER_THAN_INT32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_INT64_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_GREATER_THAN_INT64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_UINT_MESSAGE(threshold, actual, message)                          UNITY_TEST_ASSERT_GREATER_THAN_UINT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_UINT8_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_GREATER_THAN_UINT8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_UINT16_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_GREATER_THAN_UINT16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_UINT32_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_GREATER_THAN_UINT32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_UINT64_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_GREATER_THAN_UINT64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_size_t_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_GREATER_THAN_UINT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_HEX8_MESSAGE(threshold, actual, message)                          UNITY_TEST_ASSERT_GREATER_THAN_HEX8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_HEX16_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_GREATER_THAN_HEX16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_HEX32_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_GREATER_THAN_HEX32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_HEX64_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_GREATER_THAN_HEX64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_THAN_CHAR_MESSAGE(threshold, actual, message)                          UNITY_TEST_ASSERT_GREATER_THAN_CHAR((threshold), (actual), __LINE__, (message))
+
+#define TEST_ASSERT_LESS_THAN_MESSAGE(threshold, actual, message)                                  UNITY_TEST_ASSERT_SMALLER_THAN_INT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_INT_MESSAGE(threshold, actual, message)                              UNITY_TEST_ASSERT_SMALLER_THAN_INT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_INT8_MESSAGE(threshold, actual, message)                             UNITY_TEST_ASSERT_SMALLER_THAN_INT8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_INT16_MESSAGE(threshold, actual, message)                            UNITY_TEST_ASSERT_SMALLER_THAN_INT16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_INT32_MESSAGE(threshold, actual, message)                            UNITY_TEST_ASSERT_SMALLER_THAN_INT32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_INT64_MESSAGE(threshold, actual, message)                            UNITY_TEST_ASSERT_SMALLER_THAN_INT64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_UINT_MESSAGE(threshold, actual, message)                             UNITY_TEST_ASSERT_SMALLER_THAN_UINT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_UINT8_MESSAGE(threshold, actual, message)                            UNITY_TEST_ASSERT_SMALLER_THAN_UINT8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_UINT16_MESSAGE(threshold, actual, message)                           UNITY_TEST_ASSERT_SMALLER_THAN_UINT16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_UINT32_MESSAGE(threshold, actual, message)                           UNITY_TEST_ASSERT_SMALLER_THAN_UINT32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_UINT64_MESSAGE(threshold, actual, message)                           UNITY_TEST_ASSERT_SMALLER_THAN_UINT64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_size_t_MESSAGE(threshold, actual, message)                           UNITY_TEST_ASSERT_SMALLER_THAN_UINT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_HEX8_MESSAGE(threshold, actual, message)                             UNITY_TEST_ASSERT_SMALLER_THAN_HEX8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_HEX16_MESSAGE(threshold, actual, message)                            UNITY_TEST_ASSERT_SMALLER_THAN_HEX16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_HEX32_MESSAGE(threshold, actual, message)                            UNITY_TEST_ASSERT_SMALLER_THAN_HEX32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_HEX64_MESSAGE(threshold, actual, message)                            UNITY_TEST_ASSERT_SMALLER_THAN_HEX64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_THAN_CHAR_MESSAGE(threshold, actual, message)                             UNITY_TEST_ASSERT_SMALLER_THAN_CHAR((threshold), (actual), __LINE__, (message))
+
+#define TEST_ASSERT_GREATER_OR_EQUAL_MESSAGE(threshold, actual, message)                           UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT_MESSAGE(threshold, actual, message)                       UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT8_MESSAGE(threshold, actual, message)                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT16_MESSAGE(threshold, actual, message)                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE(threshold, actual, message)                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_INT64_MESSAGE(threshold, actual, message)                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT_MESSAGE(threshold, actual, message)                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT8_MESSAGE(threshold, actual, message)                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT16_MESSAGE(threshold, actual, message)                    UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT32_MESSAGE(threshold, actual, message)                    UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_UINT64_MESSAGE(threshold, actual, message)                    UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_size_t_MESSAGE(threshold, actual, message)                    UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_HEX8_MESSAGE(threshold, actual, message)                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_HEX16_MESSAGE(threshold, actual, message)                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_HEX32_MESSAGE(threshold, actual, message)                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_HEX64_MESSAGE(threshold, actual, message)                     UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_GREATER_OR_EQUAL_CHAR_MESSAGE(threshold, actual, message)                      UNITY_TEST_ASSERT_GREATER_OR_EQUAL_CHAR((threshold), (actual), __LINE__, (message))
+
+#define TEST_ASSERT_LESS_OR_EQUAL_MESSAGE(threshold, actual, message)                              UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_INT_MESSAGE(threshold, actual, message)                          UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_INT8_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_INT16_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_INT32_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_INT64_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT8_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT16_MESSAGE(threshold, actual, message)                       UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT32_MESSAGE(threshold, actual, message)                       UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_UINT64_MESSAGE(threshold, actual, message)                       UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_size_t_MESSAGE(threshold, actual, message)                       UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_HEX8_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX8((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_HEX16_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX16((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_HEX32_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX32((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_HEX64_MESSAGE(threshold, actual, message)                        UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX64((threshold), (actual), __LINE__, (message))
+#define TEST_ASSERT_LESS_OR_EQUAL_CHAR_MESSAGE(threshold, actual, message)                         UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_CHAR((threshold), (actual), __LINE__, (message))
+
+/* Integer Ranges (of all sizes) */
+#define TEST_ASSERT_INT_WITHIN_MESSAGE(delta, expected, actual, message)                           UNITY_TEST_ASSERT_INT_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_INT8_WITHIN_MESSAGE(delta, expected, actual, message)                          UNITY_TEST_ASSERT_INT8_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_INT16_WITHIN_MESSAGE(delta, expected, actual, message)                         UNITY_TEST_ASSERT_INT16_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_INT32_WITHIN_MESSAGE(delta, expected, actual, message)                         UNITY_TEST_ASSERT_INT32_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_INT64_WITHIN_MESSAGE(delta, expected, actual, message)                         UNITY_TEST_ASSERT_INT64_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_UINT_WITHIN_MESSAGE(delta, expected, actual, message)                          UNITY_TEST_ASSERT_UINT_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_UINT8_WITHIN_MESSAGE(delta, expected, actual, message)                         UNITY_TEST_ASSERT_UINT8_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_UINT16_WITHIN_MESSAGE(delta, expected, actual, message)                        UNITY_TEST_ASSERT_UINT16_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_UINT32_WITHIN_MESSAGE(delta, expected, actual, message)                        UNITY_TEST_ASSERT_UINT32_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_UINT64_WITHIN_MESSAGE(delta, expected, actual, message)                        UNITY_TEST_ASSERT_UINT64_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_size_t_WITHIN_MESSAGE(delta, expected, actual, message)                        UNITY_TEST_ASSERT_UINT_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_HEX_WITHIN_MESSAGE(delta, expected, actual, message)                           UNITY_TEST_ASSERT_HEX32_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_HEX8_WITHIN_MESSAGE(delta, expected, actual, message)                          UNITY_TEST_ASSERT_HEX8_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_HEX16_WITHIN_MESSAGE(delta, expected, actual, message)                         UNITY_TEST_ASSERT_HEX16_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_HEX32_WITHIN_MESSAGE(delta, expected, actual, message)                         UNITY_TEST_ASSERT_HEX32_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_HEX64_WITHIN_MESSAGE(delta, expected, actual, message)                         UNITY_TEST_ASSERT_HEX64_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_CHAR_WITHIN_MESSAGE(delta, expected, actual, message)                          UNITY_TEST_ASSERT_CHAR_WITHIN((delta), (expected), (actual), __LINE__, (message))
+
+/* Integer Array Ranges (of all sizes) */
+#define TEST_ASSERT_INT_ARRAY_WITHIN_MESSAGE(delta, expected, actual, num_elements, message)       UNITY_TEST_ASSERT_INT_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, (message))
+#define TEST_ASSERT_INT8_ARRAY_WITHIN_MESSAGE(delta, expected, actual, num_elements, message)      UNITY_TEST_ASSERT_INT8_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, (message))
+#define TEST_ASSERT_INT16_ARRAY_WITHIN_MESSAGE(delta, expected, actual, num_elements, message)     UNITY_TEST_ASSERT_INT16_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, (message))
+#define TEST_ASSERT_INT32_ARRAY_WITHIN_MESSAGE(delta, expected, actual, num_elements, message)     UNITY_TEST_ASSERT_INT32_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, (message))
+#define TEST_ASSERT_INT64_ARRAY_WITHIN_MESSAGE(delta, expected, actual, num_elements, message)     UNITY_TEST_ASSERT_INT64_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, (message))
+#define TEST_ASSERT_UINT_ARRAY_WITHIN_MESSAGE(delta, expected, actual, num_elements, message)      UNITY_TEST_ASSERT_UINT_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, (message))
+#define TEST_ASSERT_UINT8_ARRAY_WITHIN_MESSAGE(delta, expected, actual, num_elements, message)     UNITY_TEST_ASSERT_UINT8_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, (message))
+#define TEST_ASSERT_UINT16_ARRAY_WITHIN_MESSAGE(delta, expected, actual, num_elements, message)    UNITY_TEST_ASSERT_UINT16_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, (message))
+#define TEST_ASSERT_UINT32_ARRAY_WITHIN_MESSAGE(delta, expected, actual, num_elements, message)    UNITY_TEST_ASSERT_UINT32_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, (message))
+#define TEST_ASSERT_UINT64_ARRAY_WITHIN_MESSAGE(delta, expected, actual, num_elements, message)    UNITY_TEST_ASSERT_UINT64_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, (message))
+#define TEST_ASSERT_size_t_ARRAY_WITHIN_MESSAGE(delta, expected, actual, num_elements, message)    UNITY_TEST_ASSERT_UINT_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, (message))
+#define TEST_ASSERT_HEX_ARRAY_WITHIN_MESSAGE(delta, expected, actual, num_elements, message)       UNITY_TEST_ASSERT_HEX32_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, (message))
+#define TEST_ASSERT_HEX8_ARRAY_WITHIN_MESSAGE(delta, expected, actual, num_elements, message)      UNITY_TEST_ASSERT_HEX8_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, (message))
+#define TEST_ASSERT_HEX16_ARRAY_WITHIN_MESSAGE(delta, expected, actual, num_elements, message)     UNITY_TEST_ASSERT_HEX16_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, (message))
+#define TEST_ASSERT_HEX32_ARRAY_WITHIN_MESSAGE(delta, expected, actual, num_elements, message)     UNITY_TEST_ASSERT_HEX32_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, (message))
+#define TEST_ASSERT_HEX64_ARRAY_WITHIN_MESSAGE(delta, expected, actual, num_elements, message)     UNITY_TEST_ASSERT_HEX64_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, (message))
+#define TEST_ASSERT_CHAR_ARRAY_WITHIN_MESSAGE(delta, expected, actual, num_elements, message)      UNITY_TEST_ASSERT_CHAR_ARRAY_WITHIN((delta), (expected), (actual), num_elements, __LINE__, (message))
+
+
+/* Structs and Strings */
+#define TEST_ASSERT_EQUAL_PTR_MESSAGE(expected, actual, message)                                   UNITY_TEST_ASSERT_EQUAL_PTR((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_STRING_MESSAGE(expected, actual, message)                                UNITY_TEST_ASSERT_EQUAL_STRING((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_STRING_LEN_MESSAGE(expected, actual, len, message)                       UNITY_TEST_ASSERT_EQUAL_STRING_LEN((expected), (actual), (len), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_MEMORY_MESSAGE(expected, actual, len, message)                           UNITY_TEST_ASSERT_EQUAL_MEMORY((expected), (actual), (len), __LINE__, (message))
+
+/* Arrays */
+#define TEST_ASSERT_EQUAL_INT_ARRAY_MESSAGE(expected, actual, num_elements, message)               UNITY_TEST_ASSERT_EQUAL_INT_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_INT8_ARRAY_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EQUAL_INT8_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_INT16_ARRAY_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EQUAL_INT16_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_INT32_ARRAY_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EQUAL_INT32_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_INT64_ARRAY_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EQUAL_INT64_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT_ARRAY_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EQUAL_UINT_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT8_ARRAY_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EQUAL_UINT8_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT16_ARRAY_MESSAGE(expected, actual, num_elements, message)            UNITY_TEST_ASSERT_EQUAL_UINT16_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT32_ARRAY_MESSAGE(expected, actual, num_elements, message)            UNITY_TEST_ASSERT_EQUAL_UINT32_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_UINT64_ARRAY_MESSAGE(expected, actual, num_elements, message)            UNITY_TEST_ASSERT_EQUAL_UINT64_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_size_t_ARRAY_MESSAGE(expected, actual, num_elements, message)            UNITY_TEST_ASSERT_EQUAL_UINT_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX_ARRAY_MESSAGE(expected, actual, num_elements, message)               UNITY_TEST_ASSERT_EQUAL_HEX32_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX8_ARRAY_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EQUAL_HEX8_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX16_ARRAY_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EQUAL_HEX16_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX32_ARRAY_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EQUAL_HEX32_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_HEX64_ARRAY_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EQUAL_HEX64_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_PTR_ARRAY_MESSAGE(expected, actual, num_elements, message)               UNITY_TEST_ASSERT_EQUAL_PTR_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_STRING_ARRAY_MESSAGE(expected, actual, num_elements, message)            UNITY_TEST_ASSERT_EQUAL_STRING_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_MEMORY_ARRAY_MESSAGE(expected, actual, len, num_elements, message)       UNITY_TEST_ASSERT_EQUAL_MEMORY_ARRAY((expected), (actual), (len), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_CHAR_ARRAY_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EQUAL_CHAR_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+
+/* Arrays Compared To Single Value*/
+#define TEST_ASSERT_EACH_EQUAL_INT_MESSAGE(expected, actual, num_elements, message)                UNITY_TEST_ASSERT_EACH_EQUAL_INT((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_INT8_MESSAGE(expected, actual, num_elements, message)               UNITY_TEST_ASSERT_EACH_EQUAL_INT8((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_INT16_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EACH_EQUAL_INT16((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_INT32_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EACH_EQUAL_INT32((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_INT64_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EACH_EQUAL_INT64((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_UINT_MESSAGE(expected, actual, num_elements, message)               UNITY_TEST_ASSERT_EACH_EQUAL_UINT((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_UINT8_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EACH_EQUAL_UINT8((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_UINT16_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EACH_EQUAL_UINT16((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_UINT32_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EACH_EQUAL_UINT32((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_UINT64_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EACH_EQUAL_UINT64((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_size_t_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EACH_EQUAL_UINT((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_HEX_MESSAGE(expected, actual, num_elements, message)                UNITY_TEST_ASSERT_EACH_EQUAL_HEX32((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_HEX8_MESSAGE(expected, actual, num_elements, message)               UNITY_TEST_ASSERT_EACH_EQUAL_HEX8((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_HEX16_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EACH_EQUAL_HEX16((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_HEX32_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EACH_EQUAL_HEX32((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_HEX64_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EACH_EQUAL_HEX64((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_PTR_MESSAGE(expected, actual, num_elements, message)                UNITY_TEST_ASSERT_EACH_EQUAL_PTR((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_STRING_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EACH_EQUAL_STRING((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_MEMORY_MESSAGE(expected, actual, len, num_elements, message)        UNITY_TEST_ASSERT_EACH_EQUAL_MEMORY((expected), (actual), (len), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_CHAR_MESSAGE(expected, actual, num_elements, message)               UNITY_TEST_ASSERT_EACH_EQUAL_CHAR((expected), (actual), (num_elements), __LINE__, (message))
+
+/* Floating Point (If Enabled) */
+#define TEST_ASSERT_FLOAT_WITHIN_MESSAGE(delta, expected, actual, message)                         UNITY_TEST_ASSERT_FLOAT_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_FLOAT_MESSAGE(expected, actual, message)                                 UNITY_TEST_ASSERT_EQUAL_FLOAT((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_FLOAT_ARRAY_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EQUAL_FLOAT_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_FLOAT_MESSAGE(expected, actual, num_elements, message)              UNITY_TEST_ASSERT_EACH_EQUAL_FLOAT((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_FLOAT_IS_INF_MESSAGE(actual, message)                                          UNITY_TEST_ASSERT_FLOAT_IS_INF((actual), __LINE__, (message))
+#define TEST_ASSERT_FLOAT_IS_NEG_INF_MESSAGE(actual, message)                                      UNITY_TEST_ASSERT_FLOAT_IS_NEG_INF((actual), __LINE__, (message))
+#define TEST_ASSERT_FLOAT_IS_NAN_MESSAGE(actual, message)                                          UNITY_TEST_ASSERT_FLOAT_IS_NAN((actual), __LINE__, (message))
+#define TEST_ASSERT_FLOAT_IS_DETERMINATE_MESSAGE(actual, message)                                  UNITY_TEST_ASSERT_FLOAT_IS_DETERMINATE((actual), __LINE__, (message))
+#define TEST_ASSERT_FLOAT_IS_NOT_INF_MESSAGE(actual, message)                                      UNITY_TEST_ASSERT_FLOAT_IS_NOT_INF((actual), __LINE__, (message))
+#define TEST_ASSERT_FLOAT_IS_NOT_NEG_INF_MESSAGE(actual, message)                                  UNITY_TEST_ASSERT_FLOAT_IS_NOT_NEG_INF((actual), __LINE__, (message))
+#define TEST_ASSERT_FLOAT_IS_NOT_NAN_MESSAGE(actual, message)                                      UNITY_TEST_ASSERT_FLOAT_IS_NOT_NAN((actual), __LINE__, (message))
+#define TEST_ASSERT_FLOAT_IS_NOT_DETERMINATE_MESSAGE(actual, message)                              UNITY_TEST_ASSERT_FLOAT_IS_NOT_DETERMINATE((actual), __LINE__, (message))
+
+/* Double (If Enabled) */
+#define TEST_ASSERT_DOUBLE_WITHIN_MESSAGE(delta, expected, actual, message)                        UNITY_TEST_ASSERT_DOUBLE_WITHIN((delta), (expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_DOUBLE_MESSAGE(expected, actual, message)                                UNITY_TEST_ASSERT_EQUAL_DOUBLE((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_EQUAL_DOUBLE_ARRAY_MESSAGE(expected, actual, num_elements, message)            UNITY_TEST_ASSERT_EQUAL_DOUBLE_ARRAY((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_EACH_EQUAL_DOUBLE_MESSAGE(expected, actual, num_elements, message)             UNITY_TEST_ASSERT_EACH_EQUAL_DOUBLE((expected), (actual), (num_elements), __LINE__, (message))
+#define TEST_ASSERT_DOUBLE_IS_INF_MESSAGE(actual, message)                                         UNITY_TEST_ASSERT_DOUBLE_IS_INF((actual), __LINE__, (message))
+#define TEST_ASSERT_DOUBLE_IS_NEG_INF_MESSAGE(actual, message)                                     UNITY_TEST_ASSERT_DOUBLE_IS_NEG_INF((actual), __LINE__, (message))
+#define TEST_ASSERT_DOUBLE_IS_NAN_MESSAGE(actual, message)                                         UNITY_TEST_ASSERT_DOUBLE_IS_NAN((actual), __LINE__, (message))
+#define TEST_ASSERT_DOUBLE_IS_DETERMINATE_MESSAGE(actual, message)                                 UNITY_TEST_ASSERT_DOUBLE_IS_DETERMINATE((actual), __LINE__, (message))
+#define TEST_ASSERT_DOUBLE_IS_NOT_INF_MESSAGE(actual, message)                                     UNITY_TEST_ASSERT_DOUBLE_IS_NOT_INF((actual), __LINE__, (message))
+#define TEST_ASSERT_DOUBLE_IS_NOT_NEG_INF_MESSAGE(actual, message)                                 UNITY_TEST_ASSERT_DOUBLE_IS_NOT_NEG_INF((actual), __LINE__, (message))
+#define TEST_ASSERT_DOUBLE_IS_NOT_NAN_MESSAGE(actual, message)                                     UNITY_TEST_ASSERT_DOUBLE_IS_NOT_NAN((actual), __LINE__, (message))
+#define TEST_ASSERT_DOUBLE_IS_NOT_DETERMINATE_MESSAGE(actual, message)                             UNITY_TEST_ASSERT_DOUBLE_IS_NOT_DETERMINATE((actual), __LINE__, (message))
+
+/* Shorthand */
+#ifdef UNITY_SHORTHAND_AS_OLD
+#define TEST_ASSERT_EQUAL_MESSAGE(expected, actual, message)                                       UNITY_TEST_ASSERT_EQUAL_INT((expected), (actual), __LINE__, (message))
+#define TEST_ASSERT_NOT_EQUAL_MESSAGE(expected, actual, message)                                   UNITY_TEST_ASSERT(((expected) != (actual)), __LINE__, (message))
+#endif
+#ifdef UNITY_SHORTHAND_AS_INT
+#define TEST_ASSERT_EQUAL_MESSAGE(expected, actual, message)                                       UNITY_TEST_ASSERT_EQUAL_INT((expected), (actual), __LINE__, message)
+#define TEST_ASSERT_NOT_EQUAL_MESSAGE(expected, actual, message)                                   UNITY_TEST_FAIL(__LINE__, UnityStrErrShorthand)
+#endif
+#ifdef  UNITY_SHORTHAND_AS_MEM
+#define TEST_ASSERT_EQUAL_MESSAGE(expected, actual, message)                                       UNITY_TEST_ASSERT_EQUAL_MEMORY((&expected), (&actual), sizeof(expected), __LINE__, message)
+#define TEST_ASSERT_NOT_EQUAL_MESSAGE(expected, actual, message)                                   UNITY_TEST_FAIL(__LINE__, UnityStrErrShorthand)
+#endif
+#ifdef  UNITY_SHORTHAND_AS_RAW
+#define TEST_ASSERT_EQUAL_MESSAGE(expected, actual, message)                                       UNITY_TEST_ASSERT(((expected) == (actual)), __LINE__, message)
+#define TEST_ASSERT_NOT_EQUAL_MESSAGE(expected, actual, message)                                   UNITY_TEST_ASSERT(((expected) != (actual)), __LINE__, message)
+#endif
+#ifdef UNITY_SHORTHAND_AS_NONE
+#define TEST_ASSERT_EQUAL_MESSAGE(expected, actual, message)                                       UNITY_TEST_FAIL(__LINE__, UnityStrErrShorthand)
+#define TEST_ASSERT_NOT_EQUAL_MESSAGE(expected, actual, message)                                   UNITY_TEST_FAIL(__LINE__, UnityStrErrShorthand)
+#endif
+
+/* end of UNITY_FRAMEWORK_H */
+#ifdef __cplusplus
+}
+#endif
+#endif
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/src/unity_internals.h b/FreeRTOS-Plus/Test/CMock/vendor/unity/src/unity_internals.h
new file mode 100644
index 000000000..d7c2116c7
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/src/unity_internals.h
@@ -0,0 +1,1030 @@
+/* ==========================================
+    Unity Project - A Test Framework for C
+    Copyright (c) 2007-19 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+========================================== */
+
+#ifndef UNITY_INTERNALS_H
+#define UNITY_INTERNALS_H
+
+#ifdef UNITY_INCLUDE_CONFIG_H
+#include "unity_config.h"
+#endif
+
+#ifndef UNITY_EXCLUDE_SETJMP_H
+#include <setjmp.h>
+#endif
+
+#ifndef UNITY_EXCLUDE_MATH_H
+#include <math.h>
+#endif
+
+#ifndef UNITY_EXCLUDE_STDDEF_H
+#include <stddef.h>
+#endif
+
+#ifdef UNITY_INCLUDE_PRINT_FORMATTED
+#include <stdarg.h>
+#endif
+
+/* Unity Attempts to Auto-Detect Integer Types
+ * Attempt 1: UINT_MAX, ULONG_MAX in <limits.h>, or default to 32 bits
+ * Attempt 2: UINTPTR_MAX in <stdint.h>, or default to same size as long
+ * The user may override any of these derived constants:
+ * UNITY_INT_WIDTH, UNITY_LONG_WIDTH, UNITY_POINTER_WIDTH */
+#ifndef UNITY_EXCLUDE_STDINT_H
+#include <stdint.h>
+#endif
+
+#ifndef UNITY_EXCLUDE_LIMITS_H
+#include <limits.h>
+#endif
+
+/*-------------------------------------------------------
+ * Guess Widths If Not Specified
+ *-------------------------------------------------------*/
+
+/* Determine the size of an int, if not already specified.
+ * We cannot use sizeof(int), because it is not yet defined
+ * at this stage in the translation of the C program.
+ * Also sizeof(int) does return the size in addressable units on all platforms,
+ * which may not necessarily be the size in bytes.
+ * Therefore, infer it from UINT_MAX if possible. */
+#ifndef UNITY_INT_WIDTH
+  #ifdef UINT_MAX
+    #if (UINT_MAX == 0xFFFF)
+      #define UNITY_INT_WIDTH (16)
+    #elif (UINT_MAX == 0xFFFFFFFF)
+      #define UNITY_INT_WIDTH (32)
+    #elif (UINT_MAX == 0xFFFFFFFFFFFFFFFF)
+      #define UNITY_INT_WIDTH (64)
+    #endif
+  #else /* Set to default */
+    #define UNITY_INT_WIDTH (32)
+  #endif /* UINT_MAX */
+#endif
+
+/* Determine the size of a long, if not already specified. */
+#ifndef UNITY_LONG_WIDTH
+  #ifdef ULONG_MAX
+    #if (ULONG_MAX == 0xFFFF)
+      #define UNITY_LONG_WIDTH (16)
+    #elif (ULONG_MAX == 0xFFFFFFFF)
+      #define UNITY_LONG_WIDTH (32)
+    #elif (ULONG_MAX == 0xFFFFFFFFFFFFFFFF)
+      #define UNITY_LONG_WIDTH (64)
+    #endif
+  #else /* Set to default */
+    #define UNITY_LONG_WIDTH (32)
+  #endif /* ULONG_MAX */
+#endif
+
+/* Determine the size of a pointer, if not already specified. */
+#ifndef UNITY_POINTER_WIDTH
+  #ifdef UINTPTR_MAX
+    #if (UINTPTR_MAX <= 0xFFFF)
+      #define UNITY_POINTER_WIDTH (16)
+    #elif (UINTPTR_MAX <= 0xFFFFFFFF)
+      #define UNITY_POINTER_WIDTH (32)
+    #elif (UINTPTR_MAX <= 0xFFFFFFFFFFFFFFFF)
+      #define UNITY_POINTER_WIDTH (64)
+    #endif
+  #else /* Set to default */
+    #define UNITY_POINTER_WIDTH UNITY_LONG_WIDTH
+  #endif /* UINTPTR_MAX */
+#endif
+
+/*-------------------------------------------------------
+ * Int Support (Define types based on detected sizes)
+ *-------------------------------------------------------*/
+
+#if (UNITY_INT_WIDTH == 32)
+    typedef unsigned char   UNITY_UINT8;
+    typedef unsigned short  UNITY_UINT16;
+    typedef unsigned int    UNITY_UINT32;
+    typedef signed char     UNITY_INT8;
+    typedef signed short    UNITY_INT16;
+    typedef signed int      UNITY_INT32;
+#elif (UNITY_INT_WIDTH == 16)
+    typedef unsigned char   UNITY_UINT8;
+    typedef unsigned int    UNITY_UINT16;
+    typedef unsigned long   UNITY_UINT32;
+    typedef signed char     UNITY_INT8;
+    typedef signed int      UNITY_INT16;
+    typedef signed long     UNITY_INT32;
+#else
+    #error Invalid UNITY_INT_WIDTH specified! (16 or 32 are supported)
+#endif
+
+/*-------------------------------------------------------
+ * 64-bit Support
+ *-------------------------------------------------------*/
+
+/* Auto-detect 64 Bit Support */
+#ifndef UNITY_SUPPORT_64
+  #if UNITY_LONG_WIDTH == 64 || UNITY_POINTER_WIDTH == 64
+    #define UNITY_SUPPORT_64
+  #endif
+#endif
+
+/* 64-Bit Support Dependent Configuration */
+#ifndef UNITY_SUPPORT_64
+    /* No 64-bit Support */
+    typedef UNITY_UINT32 UNITY_UINT;
+    typedef UNITY_INT32  UNITY_INT;
+    #define UNITY_MAX_NIBBLES (8)  /* Maximum number of nibbles in a UNITY_(U)INT */
+#else
+  /* 64-bit Support */
+  #if (UNITY_LONG_WIDTH == 32)
+    typedef unsigned long long UNITY_UINT64;
+    typedef signed long long   UNITY_INT64;
+  #elif (UNITY_LONG_WIDTH == 64)
+    typedef unsigned long      UNITY_UINT64;
+    typedef signed long        UNITY_INT64;
+  #else
+    #error Invalid UNITY_LONG_WIDTH specified! (32 or 64 are supported)
+  #endif
+    typedef UNITY_UINT64 UNITY_UINT;
+    typedef UNITY_INT64  UNITY_INT;
+    #define UNITY_MAX_NIBBLES (16) /* Maximum number of nibbles in a UNITY_(U)INT */
+#endif
+
+/*-------------------------------------------------------
+ * Pointer Support
+ *-------------------------------------------------------*/
+
+#if (UNITY_POINTER_WIDTH == 32)
+  #define UNITY_PTR_TO_INT UNITY_INT32
+  #define UNITY_DISPLAY_STYLE_POINTER UNITY_DISPLAY_STYLE_HEX32
+#elif (UNITY_POINTER_WIDTH == 64)
+  #define UNITY_PTR_TO_INT UNITY_INT64
+  #define UNITY_DISPLAY_STYLE_POINTER UNITY_DISPLAY_STYLE_HEX64
+#elif (UNITY_POINTER_WIDTH == 16)
+  #define UNITY_PTR_TO_INT UNITY_INT16
+  #define UNITY_DISPLAY_STYLE_POINTER UNITY_DISPLAY_STYLE_HEX16
+#else
+  #error Invalid UNITY_POINTER_WIDTH specified! (16, 32 or 64 are supported)
+#endif
+
+#ifndef UNITY_PTR_ATTRIBUTE
+  #define UNITY_PTR_ATTRIBUTE
+#endif
+
+#ifndef UNITY_INTERNAL_PTR
+  #define UNITY_INTERNAL_PTR UNITY_PTR_ATTRIBUTE const void*
+#endif
+
+/*-------------------------------------------------------
+ * Float Support
+ *-------------------------------------------------------*/
+
+#ifdef UNITY_EXCLUDE_FLOAT
+
+/* No Floating Point Support */
+#ifndef UNITY_EXCLUDE_DOUBLE
+#define UNITY_EXCLUDE_DOUBLE /* Remove double when excluding float support */
+#endif
+#ifndef UNITY_EXCLUDE_FLOAT_PRINT
+#define UNITY_EXCLUDE_FLOAT_PRINT
+#endif
+
+#else
+
+/* Floating Point Support */
+#ifndef UNITY_FLOAT_PRECISION
+#define UNITY_FLOAT_PRECISION (0.00001f)
+#endif
+#ifndef UNITY_FLOAT_TYPE
+#define UNITY_FLOAT_TYPE float
+#endif
+typedef UNITY_FLOAT_TYPE UNITY_FLOAT;
+
+/* isinf & isnan macros should be provided by math.h */
+#ifndef isinf
+/* The value of Inf - Inf is NaN */
+#define isinf(n) (isnan((n) - (n)) && !isnan(n))
+#endif
+
+#ifndef isnan
+/* NaN is the only floating point value that does NOT equal itself.
+ * Therefore if n != n, then it is NaN. */
+#define isnan(n) ((n != n) ? 1 : 0)
+#endif
+
+#endif
+
+/*-------------------------------------------------------
+ * Double Float Support
+ *-------------------------------------------------------*/
+
+/* unlike float, we DON'T include by default */
+#if defined(UNITY_EXCLUDE_DOUBLE) || !defined(UNITY_INCLUDE_DOUBLE)
+
+  /* No Floating Point Support */
+  #ifndef UNITY_EXCLUDE_DOUBLE
+  #define UNITY_EXCLUDE_DOUBLE
+  #else
+    #undef UNITY_INCLUDE_DOUBLE
+  #endif
+
+  #ifndef UNITY_EXCLUDE_FLOAT
+    #ifndef UNITY_DOUBLE_TYPE
+    #define UNITY_DOUBLE_TYPE double
+    #endif
+  typedef UNITY_FLOAT UNITY_DOUBLE;
+  /* For parameter in UnityPrintFloat(UNITY_DOUBLE), which aliases to double or float */
+  #endif
+
+#else
+
+  /* Double Floating Point Support */
+  #ifndef UNITY_DOUBLE_PRECISION
+  #define UNITY_DOUBLE_PRECISION (1e-12)
+  #endif
+
+  #ifndef UNITY_DOUBLE_TYPE
+  #define UNITY_DOUBLE_TYPE double
+  #endif
+  typedef UNITY_DOUBLE_TYPE UNITY_DOUBLE;
+
+#endif
+
+/*-------------------------------------------------------
+ * Output Method: stdout (DEFAULT)
+ *-------------------------------------------------------*/
+#ifndef UNITY_OUTPUT_CHAR
+  /* Default to using putchar, which is defined in stdio.h */
+  #include <stdio.h>
+  #define UNITY_OUTPUT_CHAR(a) (void)putchar(a)
+#else
+  /* If defined as something else, make sure we declare it here so it's ready for use */
+  #ifdef UNITY_OUTPUT_CHAR_HEADER_DECLARATION
+    extern void UNITY_OUTPUT_CHAR_HEADER_DECLARATION;
+  #endif
+#endif
+
+#ifndef UNITY_OUTPUT_FLUSH
+  #ifdef UNITY_USE_FLUSH_STDOUT
+    /* We want to use the stdout flush utility */
+    #include <stdio.h>
+    #define UNITY_OUTPUT_FLUSH() (void)fflush(stdout)
+  #else
+    /* We've specified nothing, therefore flush should just be ignored */
+    #define UNITY_OUTPUT_FLUSH()
+  #endif
+#else
+  /* If defined as something else, make sure we declare it here so it's ready for use */
+  #ifdef UNITY_OUTPUT_FLUSH_HEADER_DECLARATION
+    extern void UNITY_OUTPUT_FLUSH_HEADER_DECLARATION;
+  #endif
+#endif
+
+#ifndef UNITY_OUTPUT_FLUSH
+#define UNITY_FLUSH_CALL()
+#else
+#define UNITY_FLUSH_CALL() UNITY_OUTPUT_FLUSH()
+#endif
+
+#ifndef UNITY_PRINT_EOL
+#define UNITY_PRINT_EOL()    UNITY_OUTPUT_CHAR('\n')
+#endif
+
+#ifndef UNITY_OUTPUT_START
+#define UNITY_OUTPUT_START()
+#endif
+
+#ifndef UNITY_OUTPUT_COMPLETE
+#define UNITY_OUTPUT_COMPLETE()
+#endif
+
+#ifdef UNITY_INCLUDE_EXEC_TIME
+  #if !defined(UNITY_EXEC_TIME_START) && \
+      !defined(UNITY_EXEC_TIME_STOP) && \
+      !defined(UNITY_PRINT_EXEC_TIME) && \
+      !defined(UNITY_TIME_TYPE)
+      /* If none any of these macros are defined then try to provide a default implementation */
+
+    #if defined(UNITY_CLOCK_MS)
+      /* This is a simple way to get a default implementation on platforms that support getting a millisecond counter */
+      #define UNITY_TIME_TYPE UNITY_UINT
+      #define UNITY_EXEC_TIME_START() Unity.CurrentTestStartTime = UNITY_CLOCK_MS()
+      #define UNITY_EXEC_TIME_STOP() Unity.CurrentTestStopTime = UNITY_CLOCK_MS()
+      #define UNITY_PRINT_EXEC_TIME() { \
+        UNITY_UINT execTimeMs = (Unity.CurrentTestStopTime - Unity.CurrentTestStartTime); \
+        UnityPrint(" ("); \
+        UnityPrintNumberUnsigned(execTimeMs); \
+        UnityPrint(" ms)"); \
+        }
+    #elif defined(_WIN32)
+      #include <time.h>
+      #define UNITY_TIME_TYPE clock_t
+      #define UNITY_GET_TIME(t) t = (clock_t)((clock() * 1000) / CLOCKS_PER_SEC)
+      #define UNITY_EXEC_TIME_START() UNITY_GET_TIME(Unity.CurrentTestStartTime)
+      #define UNITY_EXEC_TIME_STOP() UNITY_GET_TIME(Unity.CurrentTestStopTime)
+      #define UNITY_PRINT_EXEC_TIME() { \
+        UNITY_UINT execTimeMs = (Unity.CurrentTestStopTime - Unity.CurrentTestStartTime); \
+        UnityPrint(" ("); \
+        UnityPrintNumberUnsigned(execTimeMs); \
+        UnityPrint(" ms)"); \
+        }
+    #elif defined(__unix__)
+      #include <time.h>
+      #define UNITY_TIME_TYPE struct timespec
+      #define UNITY_GET_TIME(t) clock_gettime(CLOCK_MONOTONIC, &t)
+      #define UNITY_EXEC_TIME_START() UNITY_GET_TIME(Unity.CurrentTestStartTime)
+      #define UNITY_EXEC_TIME_STOP() UNITY_GET_TIME(Unity.CurrentTestStopTime)
+      #define UNITY_PRINT_EXEC_TIME() { \
+        UNITY_UINT execTimeMs = ((Unity.CurrentTestStopTime.tv_sec - Unity.CurrentTestStartTime.tv_sec) * 1000L); \
+        execTimeMs += ((Unity.CurrentTestStopTime.tv_nsec - Unity.CurrentTestStartTime.tv_nsec) / 1000000L); \
+        UnityPrint(" ("); \
+        UnityPrintNumberUnsigned(execTimeMs); \
+        UnityPrint(" ms)"); \
+        }
+    #endif
+  #endif
+#endif
+
+#ifndef UNITY_EXEC_TIME_START
+#define UNITY_EXEC_TIME_START() do{}while(0)
+#endif
+
+#ifndef UNITY_EXEC_TIME_STOP
+#define UNITY_EXEC_TIME_STOP() do{}while(0)
+#endif
+
+#ifndef UNITY_TIME_TYPE
+#define UNITY_TIME_TYPE UNITY_UINT
+#endif
+
+#ifndef UNITY_PRINT_EXEC_TIME
+#define UNITY_PRINT_EXEC_TIME() do{}while(0)
+#endif
+
+/*-------------------------------------------------------
+ * Footprint
+ *-------------------------------------------------------*/
+
+#ifndef UNITY_LINE_TYPE
+#define UNITY_LINE_TYPE UNITY_UINT
+#endif
+
+#ifndef UNITY_COUNTER_TYPE
+#define UNITY_COUNTER_TYPE UNITY_UINT
+#endif
+
+/*-------------------------------------------------------
+ * Internal Structs Needed
+ *-------------------------------------------------------*/
+
+typedef void (*UnityTestFunction)(void);
+
+#define UNITY_DISPLAY_RANGE_INT  (0x10)
+#define UNITY_DISPLAY_RANGE_UINT (0x20)
+#define UNITY_DISPLAY_RANGE_HEX  (0x40)
+#define UNITY_DISPLAY_RANGE_CHAR (0x80)
+
+typedef enum
+{
+    UNITY_DISPLAY_STYLE_INT      = (UNITY_INT_WIDTH / 8) + UNITY_DISPLAY_RANGE_INT,
+    UNITY_DISPLAY_STYLE_INT8     = 1 + UNITY_DISPLAY_RANGE_INT,
+    UNITY_DISPLAY_STYLE_INT16    = 2 + UNITY_DISPLAY_RANGE_INT,
+    UNITY_DISPLAY_STYLE_INT32    = 4 + UNITY_DISPLAY_RANGE_INT,
+#ifdef UNITY_SUPPORT_64
+    UNITY_DISPLAY_STYLE_INT64    = 8 + UNITY_DISPLAY_RANGE_INT,
+#endif
+
+    UNITY_DISPLAY_STYLE_UINT     = (UNITY_INT_WIDTH / 8) + UNITY_DISPLAY_RANGE_UINT,
+    UNITY_DISPLAY_STYLE_UINT8    = 1 + UNITY_DISPLAY_RANGE_UINT,
+    UNITY_DISPLAY_STYLE_UINT16   = 2 + UNITY_DISPLAY_RANGE_UINT,
+    UNITY_DISPLAY_STYLE_UINT32   = 4 + UNITY_DISPLAY_RANGE_UINT,
+#ifdef UNITY_SUPPORT_64
+    UNITY_DISPLAY_STYLE_UINT64   = 8 + UNITY_DISPLAY_RANGE_UINT,
+#endif
+
+    UNITY_DISPLAY_STYLE_HEX8     = 1 + UNITY_DISPLAY_RANGE_HEX,
+    UNITY_DISPLAY_STYLE_HEX16    = 2 + UNITY_DISPLAY_RANGE_HEX,
+    UNITY_DISPLAY_STYLE_HEX32    = 4 + UNITY_DISPLAY_RANGE_HEX,
+#ifdef UNITY_SUPPORT_64
+    UNITY_DISPLAY_STYLE_HEX64    = 8 + UNITY_DISPLAY_RANGE_HEX,
+#endif
+
+    UNITY_DISPLAY_STYLE_CHAR     = 1 + UNITY_DISPLAY_RANGE_CHAR + UNITY_DISPLAY_RANGE_INT,
+
+    UNITY_DISPLAY_STYLE_UNKNOWN
+} UNITY_DISPLAY_STYLE_T;
+
+typedef enum
+{
+    UNITY_WITHIN           = 0x0,
+    UNITY_EQUAL_TO         = 0x1,
+    UNITY_GREATER_THAN     = 0x2,
+    UNITY_GREATER_OR_EQUAL = 0x2 + UNITY_EQUAL_TO,
+    UNITY_SMALLER_THAN     = 0x4,
+    UNITY_SMALLER_OR_EQUAL = 0x4 + UNITY_EQUAL_TO,
+    UNITY_NOT_EQUAL        = 0x0,
+    UNITY_UNKNOWN
+} UNITY_COMPARISON_T;
+
+#ifndef UNITY_EXCLUDE_FLOAT
+typedef enum UNITY_FLOAT_TRAIT
+{
+    UNITY_FLOAT_IS_NOT_INF       = 0,
+    UNITY_FLOAT_IS_INF,
+    UNITY_FLOAT_IS_NOT_NEG_INF,
+    UNITY_FLOAT_IS_NEG_INF,
+    UNITY_FLOAT_IS_NOT_NAN,
+    UNITY_FLOAT_IS_NAN,
+    UNITY_FLOAT_IS_NOT_DET,
+    UNITY_FLOAT_IS_DET,
+    UNITY_FLOAT_INVALID_TRAIT
+} UNITY_FLOAT_TRAIT_T;
+#endif
+
+typedef enum
+{
+    UNITY_ARRAY_TO_VAL = 0,
+    UNITY_ARRAY_TO_ARRAY,
+    UNITY_ARRAY_UNKNOWN
+} UNITY_FLAGS_T;
+
+struct UNITY_STORAGE_T
+{
+    const char* TestFile;
+    const char* CurrentTestName;
+#ifndef UNITY_EXCLUDE_DETAILS
+    const char* CurrentDetail1;
+    const char* CurrentDetail2;
+#endif
+    UNITY_LINE_TYPE CurrentTestLineNumber;
+    UNITY_COUNTER_TYPE NumberOfTests;
+    UNITY_COUNTER_TYPE TestFailures;
+    UNITY_COUNTER_TYPE TestIgnores;
+    UNITY_COUNTER_TYPE CurrentTestFailed;
+    UNITY_COUNTER_TYPE CurrentTestIgnored;
+#ifdef UNITY_INCLUDE_EXEC_TIME
+    UNITY_TIME_TYPE CurrentTestStartTime;
+    UNITY_TIME_TYPE CurrentTestStopTime;
+#endif
+#ifndef UNITY_EXCLUDE_SETJMP_H
+    jmp_buf AbortFrame;
+#endif
+};
+
+extern struct UNITY_STORAGE_T Unity;
+
+/*-------------------------------------------------------
+ * Test Suite Management
+ *-------------------------------------------------------*/
+
+void UnityBegin(const char* filename);
+int  UnityEnd(void);
+void UnitySetTestFile(const char* filename);
+void UnityConcludeTest(void);
+
+#ifndef RUN_TEST
+void UnityDefaultTestRun(UnityTestFunction Func, const char* FuncName, const int FuncLineNum);
+#else
+#define UNITY_SKIP_DEFAULT_RUNNER
+#endif
+
+/*-------------------------------------------------------
+ * Details Support
+ *-------------------------------------------------------*/
+
+#ifdef UNITY_EXCLUDE_DETAILS
+#define UNITY_CLR_DETAILS()
+#define UNITY_SET_DETAIL(d1)
+#define UNITY_SET_DETAILS(d1,d2)
+#else
+#define UNITY_CLR_DETAILS()      { Unity.CurrentDetail1 = 0;   Unity.CurrentDetail2 = 0;  }
+#define UNITY_SET_DETAIL(d1)     { Unity.CurrentDetail1 = (d1);  Unity.CurrentDetail2 = 0;  }
+#define UNITY_SET_DETAILS(d1,d2) { Unity.CurrentDetail1 = (d1);  Unity.CurrentDetail2 = (d2); }
+
+#ifndef UNITY_DETAIL1_NAME
+#define UNITY_DETAIL1_NAME "Function"
+#endif
+
+#ifndef UNITY_DETAIL2_NAME
+#define UNITY_DETAIL2_NAME "Argument"
+#endif
+#endif
+
+#ifdef UNITY_PRINT_TEST_CONTEXT
+void UNITY_PRINT_TEST_CONTEXT(void);
+#endif
+
+/*-------------------------------------------------------
+ * Test Output
+ *-------------------------------------------------------*/
+
+void UnityPrint(const char* string);
+
+#ifdef UNITY_INCLUDE_PRINT_FORMATTED
+void UnityPrintF(const UNITY_LINE_TYPE line, const char* format, ...);
+#endif
+
+void UnityPrintLen(const char* string, const UNITY_UINT32 length);
+void UnityPrintMask(const UNITY_UINT mask, const UNITY_UINT number);
+void UnityPrintNumberByStyle(const UNITY_INT number, const UNITY_DISPLAY_STYLE_T style);
+void UnityPrintNumber(const UNITY_INT number_to_print);
+void UnityPrintNumberUnsigned(const UNITY_UINT number);
+void UnityPrintNumberHex(const UNITY_UINT number, const char nibbles_to_print);
+
+#ifndef UNITY_EXCLUDE_FLOAT_PRINT
+void UnityPrintFloat(const UNITY_DOUBLE input_number);
+#endif
+
+/*-------------------------------------------------------
+ * Test Assertion Functions
+ *-------------------------------------------------------
+ *  Use the macros below this section instead of calling
+ *  these directly. The macros have a consistent naming
+ *  convention and will pull in file and line information
+ *  for you. */
+
+void UnityAssertEqualNumber(const UNITY_INT expected,
+                            const UNITY_INT actual,
+                            const char* msg,
+                            const UNITY_LINE_TYPE lineNumber,
+                            const UNITY_DISPLAY_STYLE_T style);
+
+void UnityAssertGreaterOrLessOrEqualNumber(const UNITY_INT threshold,
+                                           const UNITY_INT actual,
+                                           const UNITY_COMPARISON_T compare,
+                                           const char *msg,
+                                           const UNITY_LINE_TYPE lineNumber,
+                                           const UNITY_DISPLAY_STYLE_T style);
+
+void UnityAssertEqualIntArray(UNITY_INTERNAL_PTR expected,
+                              UNITY_INTERNAL_PTR actual,
+                              const UNITY_UINT32 num_elements,
+                              const char* msg,
+                              const UNITY_LINE_TYPE lineNumber,
+                              const UNITY_DISPLAY_STYLE_T style,
+                              const UNITY_FLAGS_T flags);
+
+void UnityAssertBits(const UNITY_INT mask,
+                     const UNITY_INT expected,
+                     const UNITY_INT actual,
+                     const char* msg,
+                     const UNITY_LINE_TYPE lineNumber);
+
+void UnityAssertEqualString(const char* expected,
+                            const char* actual,
+                            const char* msg,
+                            const UNITY_LINE_TYPE lineNumber);
+
+void UnityAssertEqualStringLen(const char* expected,
+                            const char* actual,
+                            const UNITY_UINT32 length,
+                            const char* msg,
+                            const UNITY_LINE_TYPE lineNumber);
+
+void UnityAssertEqualStringArray( UNITY_INTERNAL_PTR expected,
+                                  const char** actual,
+                                  const UNITY_UINT32 num_elements,
+                                  const char* msg,
+                                  const UNITY_LINE_TYPE lineNumber,
+                                  const UNITY_FLAGS_T flags);
+
+void UnityAssertEqualMemory( UNITY_INTERNAL_PTR expected,
+                             UNITY_INTERNAL_PTR actual,
+                             const UNITY_UINT32 length,
+                             const UNITY_UINT32 num_elements,
+                             const char* msg,
+                             const UNITY_LINE_TYPE lineNumber,
+                             const UNITY_FLAGS_T flags);
+
+void UnityAssertNumbersWithin(const UNITY_UINT delta,
+                              const UNITY_INT expected,
+                              const UNITY_INT actual,
+                              const char* msg,
+                              const UNITY_LINE_TYPE lineNumber,
+                              const UNITY_DISPLAY_STYLE_T style);
+
+void UnityAssertNumbersArrayWithin(const UNITY_UINT delta,
+                                   UNITY_INTERNAL_PTR expected,
+                                   UNITY_INTERNAL_PTR actual,
+                                   const UNITY_UINT32 num_elements,
+                                   const char* msg,
+                                   const UNITY_LINE_TYPE lineNumber,
+                                   const UNITY_DISPLAY_STYLE_T style,
+                                   const UNITY_FLAGS_T flags);
+
+void UnityFail(const char* message, const UNITY_LINE_TYPE line);
+void UnityIgnore(const char* message, const UNITY_LINE_TYPE line);
+void UnityMessage(const char* message, const UNITY_LINE_TYPE line);
+
+#ifndef UNITY_EXCLUDE_FLOAT
+void UnityAssertFloatsWithin(const UNITY_FLOAT delta,
+                             const UNITY_FLOAT expected,
+                             const UNITY_FLOAT actual,
+                             const char* msg,
+                             const UNITY_LINE_TYPE lineNumber);
+
+void UnityAssertEqualFloatArray(UNITY_PTR_ATTRIBUTE const UNITY_FLOAT* expected,
+                                UNITY_PTR_ATTRIBUTE const UNITY_FLOAT* actual,
+                                const UNITY_UINT32 num_elements,
+                                const char* msg,
+                                const UNITY_LINE_TYPE lineNumber,
+                                const UNITY_FLAGS_T flags);
+
+void UnityAssertFloatSpecial(const UNITY_FLOAT actual,
+                             const char* msg,
+                             const UNITY_LINE_TYPE lineNumber,
+                             const UNITY_FLOAT_TRAIT_T style);
+#endif
+
+#ifndef UNITY_EXCLUDE_DOUBLE
+void UnityAssertDoublesWithin(const UNITY_DOUBLE delta,
+                              const UNITY_DOUBLE expected,
+                              const UNITY_DOUBLE actual,
+                              const char* msg,
+                              const UNITY_LINE_TYPE lineNumber);
+
+void UnityAssertEqualDoubleArray(UNITY_PTR_ATTRIBUTE const UNITY_DOUBLE* expected,
+                                 UNITY_PTR_ATTRIBUTE const UNITY_DOUBLE* actual,
+                                 const UNITY_UINT32 num_elements,
+                                 const char* msg,
+                                 const UNITY_LINE_TYPE lineNumber,
+                                 const UNITY_FLAGS_T flags);
+
+void UnityAssertDoubleSpecial(const UNITY_DOUBLE actual,
+                              const char* msg,
+                              const UNITY_LINE_TYPE lineNumber,
+                              const UNITY_FLOAT_TRAIT_T style);
+#endif
+
+/*-------------------------------------------------------
+ * Helpers
+ *-------------------------------------------------------*/
+
+UNITY_INTERNAL_PTR UnityNumToPtr(const UNITY_INT num, const UNITY_UINT8 size);
+#ifndef UNITY_EXCLUDE_FLOAT
+UNITY_INTERNAL_PTR UnityFloatToPtr(const float num);
+#endif
+#ifndef UNITY_EXCLUDE_DOUBLE
+UNITY_INTERNAL_PTR UnityDoubleToPtr(const double num);
+#endif
+
+/*-------------------------------------------------------
+ * Error Strings We Might Need
+ *-------------------------------------------------------*/
+
+extern const char UnityStrOk[];
+extern const char UnityStrPass[];
+extern const char UnityStrFail[];
+extern const char UnityStrIgnore[];
+
+extern const char UnityStrErrFloat[];
+extern const char UnityStrErrDouble[];
+extern const char UnityStrErr64[];
+extern const char UnityStrErrShorthand[];
+
+/*-------------------------------------------------------
+ * Test Running Macros
+ *-------------------------------------------------------*/
+
+#ifndef UNITY_EXCLUDE_SETJMP_H
+#define TEST_PROTECT() (setjmp(Unity.AbortFrame) == 0)
+#define TEST_ABORT() longjmp(Unity.AbortFrame, 1)
+#else
+#define TEST_PROTECT() 1
+#define TEST_ABORT() return
+#endif
+
+/* This tricky series of macros gives us an optional line argument to treat it as RUN_TEST(func, num=__LINE__) */
+#ifndef RUN_TEST
+#ifdef __STDC_VERSION__
+#if __STDC_VERSION__ >= 199901L
+#define UNITY_SUPPORT_VARIADIC_MACROS
+#endif
+#endif
+#ifdef UNITY_SUPPORT_VARIADIC_MACROS
+#define RUN_TEST(...) UnityDefaultTestRun(RUN_TEST_FIRST(__VA_ARGS__), RUN_TEST_SECOND(__VA_ARGS__))
+#define RUN_TEST_FIRST(...) RUN_TEST_FIRST_HELPER(__VA_ARGS__, throwaway)
+#define RUN_TEST_FIRST_HELPER(first, ...) (first), #first
+#define RUN_TEST_SECOND(...) RUN_TEST_SECOND_HELPER(__VA_ARGS__, __LINE__, throwaway)
+#define RUN_TEST_SECOND_HELPER(first, second, ...) (second)
+#endif
+#endif
+
+/* If we can't do the tricky version, we'll just have to require them to always include the line number */
+#ifndef RUN_TEST
+#ifdef CMOCK
+#define RUN_TEST(func, num) UnityDefaultTestRun(func, #func, num)
+#else
+#define RUN_TEST(func) UnityDefaultTestRun(func, #func, __LINE__)
+#endif
+#endif
+
+#define TEST_LINE_NUM (Unity.CurrentTestLineNumber)
+#define TEST_IS_IGNORED (Unity.CurrentTestIgnored)
+#define UNITY_NEW_TEST(a) \
+    Unity.CurrentTestName = (a); \
+    Unity.CurrentTestLineNumber = (UNITY_LINE_TYPE)(__LINE__); \
+    Unity.NumberOfTests++;
+
+#ifndef UNITY_BEGIN
+#define UNITY_BEGIN() UnityBegin(__FILE__)
+#endif
+
+#ifndef UNITY_END
+#define UNITY_END() UnityEnd()
+#endif
+
+#ifndef UNITY_SHORTHAND_AS_INT
+#ifndef UNITY_SHORTHAND_AS_MEM
+#ifndef UNITY_SHORTHAND_AS_NONE
+#ifndef UNITY_SHORTHAND_AS_RAW
+#define UNITY_SHORTHAND_AS_OLD
+#endif
+#endif
+#endif
+#endif
+
+/*-----------------------------------------------
+ * Command Line Argument Support
+ *-----------------------------------------------*/
+
+#ifdef UNITY_USE_COMMAND_LINE_ARGS
+int UnityParseOptions(int argc, char** argv);
+int UnityTestMatches(void);
+#endif
+
+/*-------------------------------------------------------
+ * Basic Fail and Ignore
+ *-------------------------------------------------------*/
+
+#define UNITY_TEST_FAIL(line, message)   UnityFail(   (message), (UNITY_LINE_TYPE)(line))
+#define UNITY_TEST_IGNORE(line, message) UnityIgnore( (message), (UNITY_LINE_TYPE)(line))
+
+/*-------------------------------------------------------
+ * Test Asserts
+ *-------------------------------------------------------*/
+
+#define UNITY_TEST_ASSERT(condition, line, message)                                              do {if (condition) {} else {UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), (message));}} while(0)
+#define UNITY_TEST_ASSERT_NULL(pointer, line, message)                                           UNITY_TEST_ASSERT(((pointer) == NULL),  (UNITY_LINE_TYPE)(line), (message))
+#define UNITY_TEST_ASSERT_NOT_NULL(pointer, line, message)                                       UNITY_TEST_ASSERT(((pointer) != NULL),  (UNITY_LINE_TYPE)(line), (message))
+#define UNITY_TEST_ASSERT_EMPTY(pointer, line, message)                                          UNITY_TEST_ASSERT(((pointer[0]) == 0),  (UNITY_LINE_TYPE)(line), (message))
+#define UNITY_TEST_ASSERT_NOT_EMPTY(pointer, line, message)                                      UNITY_TEST_ASSERT(((pointer[0]) != 0),  (UNITY_LINE_TYPE)(line), (message))
+
+#define UNITY_TEST_ASSERT_EQUAL_INT(expected, actual, line, message)                             UnityAssertEqualNumber((UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT)
+#define UNITY_TEST_ASSERT_EQUAL_INT8(expected, actual, line, message)                            UnityAssertEqualNumber((UNITY_INT)(UNITY_INT8 )(expected), (UNITY_INT)(UNITY_INT8 )(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT8)
+#define UNITY_TEST_ASSERT_EQUAL_INT16(expected, actual, line, message)                           UnityAssertEqualNumber((UNITY_INT)(UNITY_INT16)(expected), (UNITY_INT)(UNITY_INT16)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT16)
+#define UNITY_TEST_ASSERT_EQUAL_INT32(expected, actual, line, message)                           UnityAssertEqualNumber((UNITY_INT)(UNITY_INT32)(expected), (UNITY_INT)(UNITY_INT32)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT32)
+#define UNITY_TEST_ASSERT_EQUAL_UINT(expected, actual, line, message)                            UnityAssertEqualNumber((UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT)
+#define UNITY_TEST_ASSERT_EQUAL_UINT8(expected, actual, line, message)                           UnityAssertEqualNumber((UNITY_INT)(UNITY_UINT8 )(expected), (UNITY_INT)(UNITY_UINT8 )(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT8)
+#define UNITY_TEST_ASSERT_EQUAL_UINT16(expected, actual, line, message)                          UnityAssertEqualNumber((UNITY_INT)(UNITY_UINT16)(expected), (UNITY_INT)(UNITY_UINT16)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT16)
+#define UNITY_TEST_ASSERT_EQUAL_UINT32(expected, actual, line, message)                          UnityAssertEqualNumber((UNITY_INT)(UNITY_UINT32)(expected), (UNITY_INT)(UNITY_UINT32)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT32)
+#define UNITY_TEST_ASSERT_EQUAL_HEX8(expected, actual, line, message)                            UnityAssertEqualNumber((UNITY_INT)(UNITY_INT8 )(expected), (UNITY_INT)(UNITY_INT8 )(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX8)
+#define UNITY_TEST_ASSERT_EQUAL_HEX16(expected, actual, line, message)                           UnityAssertEqualNumber((UNITY_INT)(UNITY_INT16)(expected), (UNITY_INT)(UNITY_INT16)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX16)
+#define UNITY_TEST_ASSERT_EQUAL_HEX32(expected, actual, line, message)                           UnityAssertEqualNumber((UNITY_INT)(UNITY_INT32)(expected), (UNITY_INT)(UNITY_INT32)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX32)
+#define UNITY_TEST_ASSERT_EQUAL_CHAR(expected, actual, line, message)                            UnityAssertEqualNumber((UNITY_INT)(UNITY_INT8 )(expected), (UNITY_INT)(UNITY_INT8 )(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_CHAR)
+#define UNITY_TEST_ASSERT_BITS(mask, expected, actual, line, message)                            UnityAssertBits((UNITY_INT)(mask), (UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line))
+
+#define UNITY_TEST_ASSERT_NOT_EQUAL_INT(threshold, actual, line, message)                        UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold),               (UNITY_INT)(actual),               UNITY_NOT_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT)
+#define UNITY_TEST_ASSERT_NOT_EQUAL_INT8(threshold, actual, line, message)                       UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT8 )(threshold),  (UNITY_INT)(UNITY_INT8 )(actual),  UNITY_NOT_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT8)
+#define UNITY_TEST_ASSERT_NOT_EQUAL_INT16(threshold, actual, line, message)                      UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT16)(threshold),  (UNITY_INT)(UNITY_INT16)(actual),  UNITY_NOT_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT16)
+#define UNITY_TEST_ASSERT_NOT_EQUAL_INT32(threshold, actual, line, message)                      UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT32)(threshold),  (UNITY_INT)(UNITY_INT32)(actual),  UNITY_NOT_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT32)
+#define UNITY_TEST_ASSERT_NOT_EQUAL_UINT(threshold, actual, line, message)                       UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold),               (UNITY_INT)(actual),               UNITY_NOT_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT)
+#define UNITY_TEST_ASSERT_NOT_EQUAL_UINT8(threshold, actual, line, message)                      UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT8 )(threshold), (UNITY_INT)(UNITY_UINT8 )(actual), UNITY_NOT_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT8)
+#define UNITY_TEST_ASSERT_NOT_EQUAL_UINT16(threshold, actual, line, message)                     UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT16)(threshold), (UNITY_INT)(UNITY_UINT16)(actual), UNITY_NOT_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT16)
+#define UNITY_TEST_ASSERT_NOT_EQUAL_UINT32(threshold, actual, line, message)                     UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT32)(threshold), (UNITY_INT)(UNITY_UINT32)(actual), UNITY_NOT_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT32)
+#define UNITY_TEST_ASSERT_NOT_EQUAL_HEX8(threshold, actual, line, message)                       UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT8 )(threshold), (UNITY_INT)(UNITY_UINT8 )(actual), UNITY_NOT_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX8)
+#define UNITY_TEST_ASSERT_NOT_EQUAL_HEX16(threshold, actual, line, message)                      UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT16)(threshold), (UNITY_INT)(UNITY_UINT16)(actual), UNITY_NOT_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX16)
+#define UNITY_TEST_ASSERT_NOT_EQUAL_HEX32(threshold, actual, line, message)                      UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT32)(threshold), (UNITY_INT)(UNITY_UINT32)(actual), UNITY_NOT_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX32)
+#define UNITY_TEST_ASSERT_NOT_EQUAL_CHAR(threshold, actual, line, message)                       UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT8 )(threshold),  (UNITY_INT)(UNITY_INT8 )(actual),  UNITY_NOT_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_CHAR)
+
+#define UNITY_TEST_ASSERT_GREATER_THAN_INT(threshold, actual, line, message)                     UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold),              (UNITY_INT)(actual),              UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT)
+#define UNITY_TEST_ASSERT_GREATER_THAN_INT8(threshold, actual, line, message)                    UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT8 )(threshold), (UNITY_INT)(UNITY_INT8 )(actual), UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT8)
+#define UNITY_TEST_ASSERT_GREATER_THAN_INT16(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT16)(threshold), (UNITY_INT)(UNITY_INT16)(actual), UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT16)
+#define UNITY_TEST_ASSERT_GREATER_THAN_INT32(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT32)(threshold), (UNITY_INT)(UNITY_INT32)(actual), UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT32)
+#define UNITY_TEST_ASSERT_GREATER_THAN_UINT(threshold, actual, line, message)                    UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold),              (UNITY_INT)(actual),              UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT)
+#define UNITY_TEST_ASSERT_GREATER_THAN_UINT8(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT8 )(threshold), (UNITY_INT)(UNITY_UINT8 )(actual), UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT8)
+#define UNITY_TEST_ASSERT_GREATER_THAN_UINT16(threshold, actual, line, message)                  UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT16)(threshold), (UNITY_INT)(UNITY_UINT16)(actual), UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT16)
+#define UNITY_TEST_ASSERT_GREATER_THAN_UINT32(threshold, actual, line, message)                  UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT32)(threshold), (UNITY_INT)(UNITY_UINT32)(actual), UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT32)
+#define UNITY_TEST_ASSERT_GREATER_THAN_HEX8(threshold, actual, line, message)                    UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT8 )(threshold), (UNITY_INT)(UNITY_UINT8 )(actual), UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX8)
+#define UNITY_TEST_ASSERT_GREATER_THAN_HEX16(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT16)(threshold), (UNITY_INT)(UNITY_UINT16)(actual), UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX16)
+#define UNITY_TEST_ASSERT_GREATER_THAN_HEX32(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT32)(threshold), (UNITY_INT)(UNITY_UINT32)(actual), UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX32)
+#define UNITY_TEST_ASSERT_GREATER_THAN_CHAR(threshold, actual, line, message)                    UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT8 )(threshold), (UNITY_INT)(UNITY_INT8 )(actual), UNITY_GREATER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_CHAR)
+
+#define UNITY_TEST_ASSERT_SMALLER_THAN_INT(threshold, actual, line, message)                     UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold),              (UNITY_INT)(actual),              UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_INT8(threshold, actual, line, message)                    UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT8 )(threshold), (UNITY_INT)(UNITY_INT8 )(actual), UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT8)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_INT16(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT16)(threshold), (UNITY_INT)(UNITY_INT16)(actual), UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT16)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_INT32(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT32)(threshold), (UNITY_INT)(UNITY_INT32)(actual), UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT32)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_UINT(threshold, actual, line, message)                    UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold),              (UNITY_INT)(actual),              UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_UINT8(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT8 )(threshold), (UNITY_INT)(UNITY_UINT8 )(actual), UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT8)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_UINT16(threshold, actual, line, message)                  UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT16)(threshold), (UNITY_INT)(UNITY_UINT16)(actual), UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT16)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_UINT32(threshold, actual, line, message)                  UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT32)(threshold), (UNITY_INT)(UNITY_UINT32)(actual), UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT32)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_HEX8(threshold, actual, line, message)                    UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT8 )(threshold), (UNITY_INT)(UNITY_UINT8 )(actual), UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX8)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_HEX16(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT16)(threshold), (UNITY_INT)(UNITY_UINT16)(actual), UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX16)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_HEX32(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT32)(threshold), (UNITY_INT)(UNITY_UINT32)(actual), UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX32)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_CHAR(threshold, actual, line, message)                    UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT8 )(threshold), (UNITY_INT)(UNITY_INT8 )(actual), UNITY_SMALLER_THAN, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_CHAR)
+
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT(threshold, actual, line, message)                 UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)              (threshold), (UNITY_INT)              (actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT8(threshold, actual, line, message)                UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT8 ) (threshold), (UNITY_INT)(UNITY_INT8 ) (actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT8)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT16(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT16) (threshold), (UNITY_INT)(UNITY_INT16) (actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT16)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT32(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT32) (threshold), (UNITY_INT)(UNITY_INT32) (actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT32)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT(threshold, actual, line, message)                UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)              (threshold), (UNITY_INT)              (actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT8(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT8 )(threshold), (UNITY_INT)(UNITY_UINT8 )(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT8)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT16(threshold, actual, line, message)              UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT16)(threshold), (UNITY_INT)(UNITY_UINT16)(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT16)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT32(threshold, actual, line, message)              UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT32)(threshold), (UNITY_INT)(UNITY_UINT32)(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT32)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX8(threshold, actual, line, message)                UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT8 )(threshold), (UNITY_INT)(UNITY_UINT8 )(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX8)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX16(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT16)(threshold), (UNITY_INT)(UNITY_UINT16)(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX16)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX32(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT32)(threshold), (UNITY_INT)(UNITY_UINT32)(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX32)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_CHAR(threshold, actual, line, message)                UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT8 ) (threshold), (UNITY_INT)(UNITY_INT8 ) (actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_CHAR)
+
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT(threshold, actual, line, message)                 UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)             (threshold),  (UNITY_INT)              (actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT8(threshold, actual, line, message)                UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT8 )(threshold),  (UNITY_INT)(UNITY_INT8 ) (actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT8)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT16(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT16)(threshold),  (UNITY_INT)(UNITY_INT16) (actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT16)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT32(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT32)(threshold),  (UNITY_INT)(UNITY_INT32) (actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT32)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT(threshold, actual, line, message)                UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)             (threshold),  (UNITY_INT)              (actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT8(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT8 )(threshold), (UNITY_INT)(UNITY_UINT8 )(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT8)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT16(threshold, actual, line, message)              UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT16)(threshold), (UNITY_INT)(UNITY_UINT16)(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT16)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT32(threshold, actual, line, message)              UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT32)(threshold), (UNITY_INT)(UNITY_UINT32)(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT32)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX8(threshold, actual, line, message)                UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT8 )(threshold), (UNITY_INT)(UNITY_UINT8 )(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX8)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX16(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT16)(threshold), (UNITY_INT)(UNITY_UINT16)(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX16)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX32(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_UINT32)(threshold), (UNITY_INT)(UNITY_UINT32)(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX32)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_CHAR(threshold, actual, line, message)                UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(UNITY_INT8 )(threshold),  (UNITY_INT)(UNITY_INT8 ) (actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_CHAR)
+
+#define UNITY_TEST_ASSERT_INT_WITHIN(delta, expected, actual, line, message)                     UnityAssertNumbersWithin(              (delta), (UNITY_INT)                          (expected), (UNITY_INT)                          (actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT)
+#define UNITY_TEST_ASSERT_INT8_WITHIN(delta, expected, actual, line, message)                    UnityAssertNumbersWithin((UNITY_UINT8 )(delta), (UNITY_INT)(UNITY_INT8 )             (expected), (UNITY_INT)(UNITY_INT8 )             (actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT8)
+#define UNITY_TEST_ASSERT_INT16_WITHIN(delta, expected, actual, line, message)                   UnityAssertNumbersWithin((UNITY_UINT16)(delta), (UNITY_INT)(UNITY_INT16)             (expected), (UNITY_INT)(UNITY_INT16)             (actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT16)
+#define UNITY_TEST_ASSERT_INT32_WITHIN(delta, expected, actual, line, message)                   UnityAssertNumbersWithin((UNITY_UINT32)(delta), (UNITY_INT)(UNITY_INT32)             (expected), (UNITY_INT)(UNITY_INT32)             (actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT32)
+#define UNITY_TEST_ASSERT_UINT_WITHIN(delta, expected, actual, line, message)                    UnityAssertNumbersWithin(              (delta), (UNITY_INT)                          (expected), (UNITY_INT)                          (actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT)
+#define UNITY_TEST_ASSERT_UINT8_WITHIN(delta, expected, actual, line, message)                   UnityAssertNumbersWithin((UNITY_UINT8 )(delta), (UNITY_INT)(UNITY_UINT)(UNITY_UINT8 )(expected), (UNITY_INT)(UNITY_UINT)(UNITY_UINT8 )(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT8)
+#define UNITY_TEST_ASSERT_UINT16_WITHIN(delta, expected, actual, line, message)                  UnityAssertNumbersWithin((UNITY_UINT16)(delta), (UNITY_INT)(UNITY_UINT)(UNITY_UINT16)(expected), (UNITY_INT)(UNITY_UINT)(UNITY_UINT16)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT16)
+#define UNITY_TEST_ASSERT_UINT32_WITHIN(delta, expected, actual, line, message)                  UnityAssertNumbersWithin((UNITY_UINT32)(delta), (UNITY_INT)(UNITY_UINT)(UNITY_UINT32)(expected), (UNITY_INT)(UNITY_UINT)(UNITY_UINT32)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT32)
+#define UNITY_TEST_ASSERT_HEX8_WITHIN(delta, expected, actual, line, message)                    UnityAssertNumbersWithin((UNITY_UINT8 )(delta), (UNITY_INT)(UNITY_UINT)(UNITY_UINT8 )(expected), (UNITY_INT)(UNITY_UINT)(UNITY_UINT8 )(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX8)
+#define UNITY_TEST_ASSERT_HEX16_WITHIN(delta, expected, actual, line, message)                   UnityAssertNumbersWithin((UNITY_UINT16)(delta), (UNITY_INT)(UNITY_UINT)(UNITY_UINT16)(expected), (UNITY_INT)(UNITY_UINT)(UNITY_UINT16)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX16)
+#define UNITY_TEST_ASSERT_HEX32_WITHIN(delta, expected, actual, line, message)                   UnityAssertNumbersWithin((UNITY_UINT32)(delta), (UNITY_INT)(UNITY_UINT)(UNITY_UINT32)(expected), (UNITY_INT)(UNITY_UINT)(UNITY_UINT32)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX32)
+#define UNITY_TEST_ASSERT_CHAR_WITHIN(delta, expected, actual, line, message)                    UnityAssertNumbersWithin((UNITY_UINT8 )(delta), (UNITY_INT)(UNITY_INT8 )             (expected), (UNITY_INT)(UNITY_INT8 )             (actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_CHAR)
+
+#define UNITY_TEST_ASSERT_INT_ARRAY_WITHIN(delta, expected, actual, num_elements, line, message)     UnityAssertNumbersArrayWithin(              (delta), (UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), ((UNITY_UINT32)(num_elements)), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT, UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_INT8_ARRAY_WITHIN(delta, expected, actual, num_elements, line, message)    UnityAssertNumbersArrayWithin((UNITY_UINT8 )(delta), (UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), ((UNITY_UINT32)(num_elements)), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT8, UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_INT16_ARRAY_WITHIN(delta, expected, actual, num_elements, line, message)   UnityAssertNumbersArrayWithin((UNITY_UINT16)(delta), (UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), ((UNITY_UINT32)(num_elements)), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT16, UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_INT32_ARRAY_WITHIN(delta, expected, actual, num_elements, line, message)   UnityAssertNumbersArrayWithin((UNITY_UINT32)(delta), (UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), ((UNITY_UINT32)(num_elements)), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT32, UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_UINT_ARRAY_WITHIN(delta, expected, actual, num_elements, line, message)    UnityAssertNumbersArrayWithin(              (delta), (UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), ((UNITY_UINT32)(num_elements)), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT, UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_UINT8_ARRAY_WITHIN(delta, expected, actual, num_elements, line, message)  UnityAssertNumbersArrayWithin( (UNITY_UINT16)(delta), (UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), ((UNITY_UINT32)(num_elements)), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT8, UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_UINT16_ARRAY_WITHIN(delta, expected, actual, num_elements, line, message)  UnityAssertNumbersArrayWithin((UNITY_UINT16)(delta), (UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), ((UNITY_UINT32)(num_elements)), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT16, UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_UINT32_ARRAY_WITHIN(delta, expected, actual, num_elements, line, message)  UnityAssertNumbersArrayWithin((UNITY_UINT32)(delta), (UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), ((UNITY_UINT32)(num_elements)), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT32, UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_HEX8_ARRAY_WITHIN(delta, expected, actual, num_elements, line, message)    UnityAssertNumbersArrayWithin((UNITY_UINT8 )(delta), (UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), ((UNITY_UINT32)(num_elements)), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX8, UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_HEX16_ARRAY_WITHIN(delta, expected, actual, num_elements, line, message)   UnityAssertNumbersArrayWithin((UNITY_UINT16)(delta), (UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), ((UNITY_UINT32)(num_elements)), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX16, UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_HEX32_ARRAY_WITHIN(delta, expected, actual, num_elements, line, message)   UnityAssertNumbersArrayWithin((UNITY_UINT32)(delta), (UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), ((UNITY_UINT32)(num_elements)), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX32, UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_CHAR_ARRAY_WITHIN(delta, expected, actual, num_elements, line, message)    UnityAssertNumbersArrayWithin((UNITY_UINT8 )(delta), (UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), ((UNITY_UINT32)(num_elements)), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_CHAR, UNITY_ARRAY_TO_ARRAY)
+
+
+#define UNITY_TEST_ASSERT_EQUAL_PTR(expected, actual, line, message)                             UnityAssertEqualNumber((UNITY_PTR_TO_INT)(expected), (UNITY_PTR_TO_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_POINTER)
+#define UNITY_TEST_ASSERT_EQUAL_STRING(expected, actual, line, message)                          UnityAssertEqualString((const char*)(expected), (const char*)(actual), (message), (UNITY_LINE_TYPE)(line))
+#define UNITY_TEST_ASSERT_EQUAL_STRING_LEN(expected, actual, len, line, message)                 UnityAssertEqualStringLen((const char*)(expected), (const char*)(actual), (UNITY_UINT32)(len), (message), (UNITY_LINE_TYPE)(line))
+#define UNITY_TEST_ASSERT_EQUAL_MEMORY(expected, actual, len, line, message)                     UnityAssertEqualMemory((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(len), 1, (message), (UNITY_LINE_TYPE)(line), UNITY_ARRAY_TO_ARRAY)
+
+#define UNITY_TEST_ASSERT_EQUAL_INT_ARRAY(expected, actual, num_elements, line, message)         UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT,     UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_INT8_ARRAY(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT8,    UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_INT16_ARRAY(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT16,   UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_INT32_ARRAY(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT32,   UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_UINT_ARRAY(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT,    UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_UINT8_ARRAY(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT8,   UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_UINT16_ARRAY(expected, actual, num_elements, line, message)      UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT16,  UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_UINT32_ARRAY(expected, actual, num_elements, line, message)      UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT32,  UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_HEX8_ARRAY(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX8,    UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_HEX16_ARRAY(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX16,   UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_HEX32_ARRAY(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX32,   UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_PTR_ARRAY(expected, actual, num_elements, line, message)         UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_POINTER, UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_STRING_ARRAY(expected, actual, num_elements, line, message)      UnityAssertEqualStringArray((UNITY_INTERNAL_PTR)(expected), (const char**)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_MEMORY_ARRAY(expected, actual, len, num_elements, line, message) UnityAssertEqualMemory((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(len), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_CHAR_ARRAY(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_CHAR,    UNITY_ARRAY_TO_ARRAY)
+
+#define UNITY_TEST_ASSERT_EACH_EQUAL_INT(expected, actual, num_elements, line, message)          UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)              (expected), (UNITY_INT_WIDTH / 8)),          (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT,     UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_INT8(expected, actual, num_elements, line, message)         UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_INT8  )(expected), 1),                              (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT8,    UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_INT16(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_INT16 )(expected), 2),                              (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT16,   UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_INT32(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_INT32 )(expected), 4),                              (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT32,   UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_UINT(expected, actual, num_elements, line, message)         UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)              (expected), (UNITY_INT_WIDTH / 8)),          (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT,    UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_UINT8(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_UINT8 )(expected), 1),                              (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT8,   UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_UINT16(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_UINT16)(expected), 2),                              (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT16,  UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_UINT32(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_UINT32)(expected), 4),                              (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT32,  UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_HEX8(expected, actual, num_elements, line, message)         UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_INT8  )(expected), 1),                              (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX8,    UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_HEX16(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_INT16 )(expected), 2),                              (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX16,   UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_HEX32(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_INT32 )(expected), 4),                              (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX32,   UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_PTR(expected, actual, num_elements, line, message)          UnityAssertEqualIntArray(UnityNumToPtr((UNITY_PTR_TO_INT)       (expected), (UNITY_POINTER_WIDTH / 8)),      (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_POINTER, UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_STRING(expected, actual, num_elements, line, message)       UnityAssertEqualStringArray((UNITY_INTERNAL_PTR)(expected), (const char**)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_MEMORY(expected, actual, len, num_elements, line, message)  UnityAssertEqualMemory((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(len), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_CHAR(expected, actual, num_elements, line, message)         UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_INT8  )(expected), 1),                              (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_CHAR,    UNITY_ARRAY_TO_VAL)
+
+#ifdef UNITY_SUPPORT_64
+#define UNITY_TEST_ASSERT_EQUAL_INT64(expected, actual, line, message)                           UnityAssertEqualNumber((UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT64)
+#define UNITY_TEST_ASSERT_EQUAL_UINT64(expected, actual, line, message)                          UnityAssertEqualNumber((UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT64)
+#define UNITY_TEST_ASSERT_EQUAL_HEX64(expected, actual, line, message)                           UnityAssertEqualNumber((UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX64)
+#define UNITY_TEST_ASSERT_EQUAL_INT64_ARRAY(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT64,  UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_UINT64_ARRAY(expected, actual, num_elements, line, message)      UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT64, UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EQUAL_HEX64_ARRAY(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray((UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX64,  UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_INT64(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_INT64)(expected), 8), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT64,  UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_UINT64(expected, actual, num_elements, line, message)       UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_UINT64)(expected), 8), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT64, UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_HEX64(expected, actual, num_elements, line, message)        UnityAssertEqualIntArray(UnityNumToPtr((UNITY_INT)(UNITY_INT64)(expected), 8), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX64,  UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_INT64_WITHIN(delta, expected, actual, line, message)                   UnityAssertNumbersWithin((delta), (UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT64)
+#define UNITY_TEST_ASSERT_UINT64_WITHIN(delta, expected, actual, line, message)                  UnityAssertNumbersWithin((delta), (UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT64)
+#define UNITY_TEST_ASSERT_HEX64_WITHIN(delta, expected, actual, line, message)                   UnityAssertNumbersWithin((delta), (UNITY_INT)(expected), (UNITY_INT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX64)
+#define UNITY_TEST_ASSERT_NOT_EQUAL_INT64(threshold, actual, line, message)                      UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_NOT_EQUAL,        (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT64)
+#define UNITY_TEST_ASSERT_NOT_EQUAL_UINT64(threshold, actual, line, message)                     UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_NOT_EQUAL,        (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT64)
+#define UNITY_TEST_ASSERT_NOT_EQUAL_HEX64(threshold, actual, line, message)                      UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_NOT_EQUAL,        (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX64)
+#define UNITY_TEST_ASSERT_GREATER_THAN_INT64(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_GREATER_THAN,     (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT64)
+#define UNITY_TEST_ASSERT_GREATER_THAN_UINT64(threshold, actual, line, message)                  UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_GREATER_THAN,     (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT64)
+#define UNITY_TEST_ASSERT_GREATER_THAN_HEX64(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_GREATER_THAN,     (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX64)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT64(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT64)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT64(threshold, actual, line, message)              UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT64)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX64(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_GREATER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX64)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_INT64(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_SMALLER_THAN,     (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT64)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_UINT64(threshold, actual, line, message)                  UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_SMALLER_THAN,     (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT64)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_HEX64(threshold, actual, line, message)                   UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_SMALLER_THAN,     (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX64)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT64(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT64)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT64(threshold, actual, line, message)              UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT64)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX64(threshold, actual, line, message)               UnityAssertGreaterOrLessOrEqualNumber((UNITY_INT)(threshold), (UNITY_INT)(actual), UNITY_SMALLER_OR_EQUAL, (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX64)
+#define UNITY_TEST_ASSERT_INT64_ARRAY_WITHIN(delta, expected, actual, num_elements, line, message)   UnityAssertNumbersArrayWithin((UNITY_UINT64)(delta), (UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_INT64, UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_UINT64_ARRAY_WITHIN(delta, expected, actual, num_elements, line, message)  UnityAssertNumbersArrayWithin((UNITY_UINT64)(delta), (UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_UINT64, UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_HEX64_ARRAY_WITHIN(delta, expected, actual, num_elements, line, message)   UnityAssertNumbersArrayWithin((UNITY_UINT64)(delta), (UNITY_INTERNAL_PTR)(expected), (UNITY_INTERNAL_PTR)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_DISPLAY_STYLE_HEX64, UNITY_ARRAY_TO_ARRAY)
+#else
+#define UNITY_TEST_ASSERT_EQUAL_INT64(expected, actual, line, message)                           UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_EQUAL_UINT64(expected, actual, line, message)                          UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_EQUAL_HEX64(expected, actual, line, message)                           UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_EQUAL_INT64_ARRAY(expected, actual, num_elements, line, message)       UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_EQUAL_UINT64_ARRAY(expected, actual, num_elements, line, message)      UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_EQUAL_HEX64_ARRAY(expected, actual, num_elements, line, message)       UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_INT64_WITHIN(delta, expected, actual, line, message)                   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_UINT64_WITHIN(delta, expected, actual, line, message)                  UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_HEX64_WITHIN(delta, expected, actual, line, message)                   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_GREATER_THAN_INT64(threshold, actual, line, message)                   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_GREATER_THAN_UINT64(threshold, actual, line, message)                  UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_GREATER_THAN_HEX64(threshold, actual, line, message)                   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_INT64(threshold, actual, line, message)               UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_UINT64(threshold, actual, line, message)              UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_GREATER_OR_EQUAL_HEX64(threshold, actual, line, message)               UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_INT64(threshold, actual, line, message)                   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_UINT64(threshold, actual, line, message)                  UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_SMALLER_THAN_HEX64(threshold, actual, line, message)                   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_INT64(threshold, actual, line, message)               UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_UINT64(threshold, actual, line, message)              UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_SMALLER_OR_EQUAL_HEX64(threshold, actual, line, message)               UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_INT64_ARRAY_WITHIN(delta, expected, actual, num_elements, line, message)   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_UINT64_ARRAY_WITHIN(delta, expected, actual, num_elements, line, message)  UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#define UNITY_TEST_ASSERT_HEX64_ARRAY_WITHIN(delta, expected, actual, num_elements, line, message)   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErr64)
+#endif
+
+#ifdef UNITY_EXCLUDE_FLOAT
+#define UNITY_TEST_ASSERT_FLOAT_WITHIN(delta, expected, actual, line, message)                   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_EQUAL_FLOAT(expected, actual, line, message)                           UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_EQUAL_FLOAT_ARRAY(expected, actual, num_elements, line, message)       UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_FLOAT(expected, actual, num_elements, line, message)        UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_FLOAT_IS_INF(actual, line, message)                                    UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NEG_INF(actual, line, message)                                UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NAN(actual, line, message)                                    UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_FLOAT_IS_DETERMINATE(actual, line, message)                            UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NOT_INF(actual, line, message)                                UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NOT_NEG_INF(actual, line, message)                            UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NOT_NAN(actual, line, message)                                UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NOT_DETERMINATE(actual, line, message)                        UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrFloat)
+#else
+#define UNITY_TEST_ASSERT_FLOAT_WITHIN(delta, expected, actual, line, message)                   UnityAssertFloatsWithin((UNITY_FLOAT)(delta), (UNITY_FLOAT)(expected), (UNITY_FLOAT)(actual), (message), (UNITY_LINE_TYPE)(line))
+#define UNITY_TEST_ASSERT_EQUAL_FLOAT(expected, actual, line, message)                           UNITY_TEST_ASSERT_FLOAT_WITHIN((UNITY_FLOAT)(expected) * (UNITY_FLOAT)UNITY_FLOAT_PRECISION, (UNITY_FLOAT)(expected), (UNITY_FLOAT)(actual), (UNITY_LINE_TYPE)(line), (message))
+#define UNITY_TEST_ASSERT_EQUAL_FLOAT_ARRAY(expected, actual, num_elements, line, message)       UnityAssertEqualFloatArray((UNITY_FLOAT*)(expected), (UNITY_FLOAT*)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_FLOAT(expected, actual, num_elements, line, message)        UnityAssertEqualFloatArray(UnityFloatToPtr(expected), (UNITY_FLOAT*)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_FLOAT_IS_INF(actual, line, message)                                    UnityAssertFloatSpecial((UNITY_FLOAT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_INF)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NEG_INF(actual, line, message)                                UnityAssertFloatSpecial((UNITY_FLOAT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NEG_INF)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NAN(actual, line, message)                                    UnityAssertFloatSpecial((UNITY_FLOAT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NAN)
+#define UNITY_TEST_ASSERT_FLOAT_IS_DETERMINATE(actual, line, message)                            UnityAssertFloatSpecial((UNITY_FLOAT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_DET)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NOT_INF(actual, line, message)                                UnityAssertFloatSpecial((UNITY_FLOAT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NOT_INF)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NOT_NEG_INF(actual, line, message)                            UnityAssertFloatSpecial((UNITY_FLOAT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NOT_NEG_INF)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NOT_NAN(actual, line, message)                                UnityAssertFloatSpecial((UNITY_FLOAT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NOT_NAN)
+#define UNITY_TEST_ASSERT_FLOAT_IS_NOT_DETERMINATE(actual, line, message)                        UnityAssertFloatSpecial((UNITY_FLOAT)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NOT_DET)
+#endif
+
+#ifdef UNITY_EXCLUDE_DOUBLE
+#define UNITY_TEST_ASSERT_DOUBLE_WITHIN(delta, expected, actual, line, message)                  UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_EQUAL_DOUBLE(expected, actual, line, message)                          UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_EQUAL_DOUBLE_ARRAY(expected, actual, num_elements, line, message)      UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_DOUBLE(expected, actual, num_elements, line, message)       UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_INF(actual, line, message)                                   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NEG_INF(actual, line, message)                               UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NAN(actual, line, message)                                   UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_DETERMINATE(actual, line, message)                           UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NOT_INF(actual, line, message)                               UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NOT_NEG_INF(actual, line, message)                           UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NOT_NAN(actual, line, message)                               UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NOT_DETERMINATE(actual, line, message)                       UNITY_TEST_FAIL((UNITY_LINE_TYPE)(line), UnityStrErrDouble)
+#else
+#define UNITY_TEST_ASSERT_DOUBLE_WITHIN(delta, expected, actual, line, message)                  UnityAssertDoublesWithin((UNITY_DOUBLE)(delta), (UNITY_DOUBLE)(expected), (UNITY_DOUBLE)(actual), (message), (UNITY_LINE_TYPE)(line))
+#define UNITY_TEST_ASSERT_EQUAL_DOUBLE(expected, actual, line, message)                          UNITY_TEST_ASSERT_DOUBLE_WITHIN((UNITY_DOUBLE)(expected) * (UNITY_DOUBLE)UNITY_DOUBLE_PRECISION, (UNITY_DOUBLE)(expected), (UNITY_DOUBLE)(actual), (UNITY_LINE_TYPE)(line), (message))
+#define UNITY_TEST_ASSERT_EQUAL_DOUBLE_ARRAY(expected, actual, num_elements, line, message)      UnityAssertEqualDoubleArray((UNITY_DOUBLE*)(expected), (UNITY_DOUBLE*)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_ARRAY_TO_ARRAY)
+#define UNITY_TEST_ASSERT_EACH_EQUAL_DOUBLE(expected, actual, num_elements, line, message)       UnityAssertEqualDoubleArray(UnityDoubleToPtr(expected), (UNITY_DOUBLE*)(actual), (UNITY_UINT32)(num_elements), (message), (UNITY_LINE_TYPE)(line), UNITY_ARRAY_TO_VAL)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_INF(actual, line, message)                                   UnityAssertDoubleSpecial((UNITY_DOUBLE)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_INF)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NEG_INF(actual, line, message)                               UnityAssertDoubleSpecial((UNITY_DOUBLE)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NEG_INF)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NAN(actual, line, message)                                   UnityAssertDoubleSpecial((UNITY_DOUBLE)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NAN)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_DETERMINATE(actual, line, message)                           UnityAssertDoubleSpecial((UNITY_DOUBLE)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_DET)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NOT_INF(actual, line, message)                               UnityAssertDoubleSpecial((UNITY_DOUBLE)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NOT_INF)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NOT_NEG_INF(actual, line, message)                           UnityAssertDoubleSpecial((UNITY_DOUBLE)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NOT_NEG_INF)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NOT_NAN(actual, line, message)                               UnityAssertDoubleSpecial((UNITY_DOUBLE)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NOT_NAN)
+#define UNITY_TEST_ASSERT_DOUBLE_IS_NOT_DETERMINATE(actual, line, message)                       UnityAssertDoubleSpecial((UNITY_DOUBLE)(actual), (message), (UNITY_LINE_TYPE)(line), UNITY_FLOAT_IS_NOT_DET)
+#endif
+
+/* End of UNITY_INTERNALS_H */
+#endif
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/.rubocop.yml b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/.rubocop.yml
new file mode 100644
index 000000000..6c9542f52
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/.rubocop.yml
@@ -0,0 +1,76 @@
+# This is the configuration used to check the rubocop source code.
+
+#inherit_from: .rubocop_todo.yml
+
+AllCops:
+  TargetRubyVersion: 2.3
+
+# These are areas where ThrowTheSwitch's coding style diverges from the Ruby standard
+Style/SpecialGlobalVars:
+  EnforcedStyle: use_perl_names
+Style/FormatString:
+  Enabled: false
+Style/GlobalVars:
+  Enabled: false
+Style/FrozenStringLiteralComment:
+  Enabled: false
+Style/RegexpLiteral:
+  AllowInnerSlashes: true
+Style/HashSyntax:
+  EnforcedStyle: no_mixed_keys
+Style/NumericPredicate:
+  Enabled: false
+Style/MultilineBlockChain:
+  Enabled: false
+Style/Alias:
+  Enabled: false
+Style/EvalWithLocation:
+  Enabled: false
+Style/MixinUsage:
+  Enabled: false
+
+# These are also places we diverge... but we will likely comply down the road
+Style/IfUnlessModifier:
+  Enabled: false
+Style/FormatStringToken:
+  Enabled: false
+
+# This is disabled because it seems to get confused over nested hashes
+Layout/AlignHash:
+  Enabled: false
+  EnforcedHashRocketStyle: table
+  EnforcedColonStyle: table
+
+# We purposefully use these insecure features because they're what makes Ruby awesome
+Security/Eval:
+  Enabled: false
+Security/YAMLLoad:
+  Enabled: false
+
+# At this point, we're not ready to enforce inline documentation requirements
+Style/Documentation:
+  Enabled: false
+Style/DocumentationMethod:
+  Enabled: false
+
+# At this point, we're not ready to enforce any metrics
+Metrics/AbcSize:
+  Enabled: false
+Metrics/BlockLength:
+  Enabled: false
+Metrics/BlockNesting:
+  Enabled: false
+Metrics/ClassLength:
+  Enabled: false
+Metrics/CyclomaticComplexity:
+  Enabled: false
+Metrics/LineLength:
+  Enabled: false
+Metrics/MethodLength:
+  Enabled: false
+Metrics/ModuleLength:
+  Enabled: false
+Metrics/ParameterLists:
+  Enabled: false
+Metrics/PerceivedComplexity:
+  Enabled: false
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/Makefile b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/Makefile
new file mode 100644
index 000000000..d8d10d22e
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/Makefile
@@ -0,0 +1,159 @@
+CC = gcc
+ifeq ($(shell uname -s), Darwin)
+CC = clang
+endif
+ifeq ($(findstring clang, $(CC)), clang)
+E = -Weverything
+CFLAGS += $E -Wno-unknown-warning-option -Wno-missing-prototypes
+CFLAGS += -Wno-unused-macros -Wno-padded -Wno-missing-noreturn
+endif
+CFLAGS += -std=c99 -pedantic -Wall -Wextra -Werror
+#CFLAGS += -Wconversion #disabled because if falsely complains about the isinf and isnan macros
+CFLAGS += -Wno-switch-enum -Wno-double-promotion
+CFLAGS += -Wbad-function-cast -Wcast-qual -Wold-style-definition -Wshadow -Wstrict-overflow \
+          -Wstrict-prototypes -Wswitch-default -Wundef
+#DEBUG = -O0 -g
+CFLAGS += $(DEBUG)
+UNITY_SUPPORT_64 = -D UNITY_SUPPORT_64
+UNITY_INCLUDE_DOUBLE = -D UNITY_INCLUDE_DOUBLE
+DEFINES =  -D UNITY_OUTPUT_CHAR=putcharSpy
+DEFINES += -D UNITY_OUTPUT_CHAR_HEADER_DECLARATION=putcharSpy\(int\)
+DEFINES += -D UNITY_OUTPUT_FLUSH=flushSpy
+DEFINES += -D UNITY_OUTPUT_FLUSH_HEADER_DECLARATION=flushSpy\(void\)
+DEFINES += $(UNITY_SUPPORT_64) $(UNITY_INCLUDE_DOUBLE)
+SRC1 = ../src/unity.c tests/test_unity_arrays.c build/test_unity_arraysRunner.c
+SRC2 = ../src/unity.c tests/test_unity_core.c build/test_unity_coreRunner.c
+SRC3 = ../src/unity.c tests/test_unity_doubles.c build/test_unity_doublesRunner.c
+SRC4 = ../src/unity.c tests/test_unity_floats.c build/test_unity_floatsRunner.c
+SRC5 = ../src/unity.c tests/test_unity_integers.c build/test_unity_integersRunner.c
+SRC6 = ../src/unity.c tests/test_unity_integers_64.c build/test_unity_integers_64Runner.c
+SRC7 = ../src/unity.c tests/test_unity_memory.c build/test_unity_memoryRunner.c
+SRC8 = ../src/unity.c tests/test_unity_strings.c build/test_unity_stringsRunner.c
+INC_DIR = -I ../src
+COV_FLAGS = -fprofile-arcs -ftest-coverage -I ../../src
+BUILD_DIR = build
+TARGET = build/testunity-cov.exe
+
+# To generate coverage, call 'make -s', the default target runs.
+# For verbose output of all the tests, run 'make test'.
+default: coverage
+.PHONY: default coverage test clean
+coverage: $(SRC1) $(SRC2) $(SRC3) $(SRC4) $(SRC5) $(SRC6) $(SRC7) $(SRC8)
+	cd $(BUILD_DIR) && \
+	$(CC) $(CFLAGS) $(DEFINES) $(foreach i,$(SRC1), ../$i) $(COV_FLAGS) -o ../$(TARGET)
+	rm -f $(BUILD_DIR)/*.gcda
+	./$(TARGET) | grep 'Tests\|]]]' -A1
+	cd $(BUILD_DIR) && \
+	gcov unity.c | head -3
+	grep '###' $(BUILD_DIR)/unity.c.gcov -C2 || true
+	cd $(BUILD_DIR) && \
+	$(CC) $(CFLAGS) $(DEFINES) $(foreach i,$(SRC2), ../$i) $(COV_FLAGS) -o ../$(TARGET)
+	rm -f $(BUILD_DIR)/*.gcda
+	./$(TARGET) | grep 'Tests\|]]]' -A1
+	cd $(BUILD_DIR) && \
+	gcov unity.c | head -3
+	grep '###' $(BUILD_DIR)/unity.c.gcov -C2 || true
+	cd $(BUILD_DIR) && \
+	$(CC) $(CFLAGS) $(DEFINES) $(foreach i,$(SRC3), ../$i) $(COV_FLAGS) -o ../$(TARGET)
+	rm -f $(BUILD_DIR)/*.gcda
+	./$(TARGET) | grep 'Tests\|]]]' -A1
+	cd $(BUILD_DIR) && \
+	gcov unity.c | head -3
+	grep '###' $(BUILD_DIR)/unity.c.gcov -C2 || true
+	cd $(BUILD_DIR) && \
+	$(CC) $(CFLAGS) $(DEFINES) $(foreach i,$(SRC4), ../$i) $(COV_FLAGS) -o ../$(TARGET)
+	rm -f $(BUILD_DIR)/*.gcda
+	./$(TARGET) | grep 'Tests\|]]]' -A1
+	cd $(BUILD_DIR) && \
+	gcov unity.c | head -3
+	grep '###' $(BUILD_DIR)/unity.c.gcov -C2 || true
+	cd $(BUILD_DIR) && \
+	$(CC) $(CFLAGS) $(DEFINES) $(foreach i,$(SRC5), ../$i) $(COV_FLAGS) -o ../$(TARGET)
+	rm -f $(BUILD_DIR)/*.gcda
+	./$(TARGET) | grep 'Tests\|]]]' -A1
+	cd $(BUILD_DIR) && \
+	gcov unity.c | head -3
+	grep '###' $(BUILD_DIR)/unity.c.gcov -C2 || true
+	cd $(BUILD_DIR) && \
+	$(CC) $(CFLAGS) $(DEFINES) $(foreach i,$(SRC6), ../$i) $(COV_FLAGS) -o ../$(TARGET)
+	rm -f $(BUILD_DIR)/*.gcda
+	./$(TARGET) | grep 'Tests\|]]]' -A1
+	cd $(BUILD_DIR) && \
+	gcov unity.c | head -3
+	grep '###' $(BUILD_DIR)/unity.c.gcov -C2 || true
+	cd $(BUILD_DIR) && \
+	$(CC) $(CFLAGS) $(DEFINES) $(foreach i,$(SRC7), ../$i) $(COV_FLAGS) -o ../$(TARGET)
+	rm -f $(BUILD_DIR)/*.gcda
+	./$(TARGET) | grep 'Tests\|]]]' -A1
+	cd $(BUILD_DIR) && \
+	gcov unity.c | head -3
+	grep '###' $(BUILD_DIR)/unity.c.gcov -C2 || true
+	cd $(BUILD_DIR) && \
+	$(CC) $(CFLAGS) $(DEFINES) $(foreach i,$(SRC8), ../$i) $(COV_FLAGS) -o ../$(TARGET)
+	rm -f $(BUILD_DIR)/*.gcda
+	./$(TARGET) | grep 'Tests\|]]]' -A1
+	cd $(BUILD_DIR) && \
+	gcov unity.c | head -3
+	grep '###' $(BUILD_DIR)/unity.c.gcov -C2 || true
+
+test: $(SRC1) $(SRC2) $(SRC3) $(SRC4) $(SRC5) $(SRC6) $(SRC7) $(SRC8)
+	$(CC) $(CFLAGS) $(DEFINES) $(INC_DIR) $(SRC1) -o $(TARGET)
+	./$(TARGET)
+	$(CC) $(CFLAGS) $(DEFINES) $(INC_DIR) $(SRC2) -o $(TARGET)
+	./$(TARGET)
+	$(CC) $(CFLAGS) $(DEFINES) $(INC_DIR) $(SRC3) -o $(TARGET)
+	./$(TARGET)
+	$(CC) $(CFLAGS) $(DEFINES) $(INC_DIR) $(SRC4) -o $(TARGET)
+	./$(TARGET)
+	$(CC) $(CFLAGS) $(DEFINES) $(INC_DIR) $(SRC5) -o $(TARGET)
+	./$(TARGET)
+	$(CC) $(CFLAGS) $(DEFINES) $(INC_DIR) $(SRC6) -o $(TARGET)
+	./$(TARGET)
+	$(CC) $(CFLAGS) $(DEFINES) $(INC_DIR) $(SRC7) -o $(TARGET)
+	./$(TARGET)
+	$(CC) $(CFLAGS) $(DEFINES) $(INC_DIR) $(SRC8) -o $(TARGET)
+	./$(TARGET)
+
+# Compile only, for testing that preprocessor detection works
+UNITY_C_ONLY =-c ../src/unity.c -o $(BUILD_DIR)/unity.o
+intDetection:
+	$(CC) $(CFLAGS) $(INC_DIR) $(UNITY_C_ONLY) -D UNITY_EXCLUDE_STDINT_H
+	$(CC) $(CFLAGS) $(INC_DIR) $(UNITY_C_ONLY) -D UNITY_EXCLUDE_LIMITS_H
+
+$(BUILD_DIR)/test_unity_arraysRunner.c: tests/test_unity_arrays.c | $(BUILD_DIR)
+	awk $(AWK_SCRIPT) tests/test_unity_arrays.c > $@
+
+$(BUILD_DIR)/test_unity_coreRunner.c: tests/test_unity_core.c | $(BUILD_DIR)
+	awk $(AWK_SCRIPT) tests/test_unity_core.c > $@
+
+$(BUILD_DIR)/test_unity_doublesRunner.c: tests/test_unity_doubles.c | $(BUILD_DIR)
+	awk $(AWK_SCRIPT) tests/test_unity_doubles.c > $@
+
+$(BUILD_DIR)/test_unity_floatsRunner.c: tests/test_unity_floats.c | $(BUILD_DIR)
+	awk $(AWK_SCRIPT) tests/test_unity_floats.c > $@
+
+$(BUILD_DIR)/test_unity_integersRunner.c: tests/test_unity_integers.c | $(BUILD_DIR)
+	awk $(AWK_SCRIPT) tests/test_unity_integers.c > $@
+
+$(BUILD_DIR)/test_unity_integers_64Runner.c: tests/test_unity_integers_64.c | $(BUILD_DIR)
+	awk $(AWK_SCRIPT) tests/test_unity_integers_64.c > $@
+
+$(BUILD_DIR)/test_unity_memoryRunner.c: tests/test_unity_memory.c | $(BUILD_DIR)
+	awk $(AWK_SCRIPT) tests/test_unity_memory.c > $@
+
+$(BUILD_DIR)/test_unity_stringsRunner.c: tests/test_unity_strings.c | $(BUILD_DIR)
+	awk $(AWK_SCRIPT) tests/test_unity_strings.c > $@
+
+AWK_SCRIPT=\
+  '/^void test/{ declarations[d++]=$$0; gsub(/\(?void\)? ?/,""); tests[t++]=$$0; line[u++]=NR } \
+  END{ print "\#include \"unity.h\" /* Autogenerated by awk in Makefile */" ;                   \
+       for (i=0; i<d; i++) { print declarations[i] ";" }                                        \
+       print "int main(void)\n{\n    UnityBegin(\"" FILENAME "\");" ;                           \
+       for (i=0; i<t; i++) { print "    RUN_TEST(" tests[i] ", " line[i] ");" }                 \
+       print "    return UNITY_END();\n}" }'
+
+$(BUILD_DIR):
+	mkdir -p $(BUILD_DIR)
+
+clean:
+	rm -f $(TARGET) $(BUILD_DIR)/*.gc* $(BUILD_DIR)/test_unity_*Runner.c
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_cmd.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_cmd.c
new file mode 100644
index 000000000..7bcf8e102
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_cmd.c
@@ -0,0 +1,61 @@
+/* AUTOGENERATED FILE. DO NOT EDIT. */
+
+/*=======Test Runner Used To Run Each Test Below=====*/
+#define RUN_TEST(TestFunc, TestLineNum) \
+{ \
+  Unity.CurrentTestName = #TestFunc; \
+  Unity.CurrentTestLineNumber = TestLineNum; \
+  Unity.NumberOfTests++; \
+  if (TEST_PROTECT()) \
+  { \
+    CEXCEPTION_T e; \
+    Try { \
+      setUp(); \
+      TestFunc(); \
+    } Catch(e) { TEST_ASSERT_EQUAL_HEX32_MESSAGE(CEXCEPTION_NONE, e, "Unhandled Exception!"); } \
+  } \
+  if (TEST_PROTECT() && !TEST_IS_IGNORED) \
+  { \
+    tearDown(); \
+  } \
+  UnityConcludeTest(); \
+}
+
+/*=======Automagically Detected Files To Include=====*/
+#include "unity.h"
+#include <setjmp.h>
+#include <stdio.h>
+#include "CException.h"
+#include "funky.h"
+#include "stanky.h"
+#include <setjmp.h>
+
+/*=======External Functions This Runner Calls=====*/
+extern void setUp(void);
+extern void tearDown(void);
+extern void test_TheFirstThingToTest(void);
+extern void test_TheSecondThingToTest(void);
+extern void test_TheThirdThingToTest(void);
+extern void test_TheFourthThingToTest(void);
+
+
+/*=======Test Reset Option=====*/
+void resetTest(void);
+void resetTest(void)
+{
+  tearDown();
+  setUp();
+}
+
+
+/*=======MAIN=====*/
+int main(void)
+{
+  UnityBegin("testdata/testsample.c");
+  RUN_TEST(test_TheFirstThingToTest, 21);
+  RUN_TEST(test_TheSecondThingToTest, 43);
+  RUN_TEST(test_TheThirdThingToTest, 53);
+  RUN_TEST(test_TheFourthThingToTest, 58);
+
+  return (UnityEnd());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_def.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_def.c
new file mode 100644
index 000000000..b8ad559f6
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_def.c
@@ -0,0 +1,57 @@
+/* AUTOGENERATED FILE. DO NOT EDIT. */
+
+/*=======Test Runner Used To Run Each Test Below=====*/
+#define RUN_TEST(TestFunc, TestLineNum) \
+{ \
+  Unity.CurrentTestName = #TestFunc; \
+  Unity.CurrentTestLineNumber = TestLineNum; \
+  Unity.NumberOfTests++; \
+  if (TEST_PROTECT()) \
+  { \
+      setUp(); \
+      TestFunc(); \
+  } \
+  if (TEST_PROTECT() && !TEST_IS_IGNORED) \
+  { \
+    tearDown(); \
+  } \
+  UnityConcludeTest(); \
+}
+
+/*=======Automagically Detected Files To Include=====*/
+#include "unity.h"
+#include <setjmp.h>
+#include <stdio.h>
+#include "funky.h"
+#include "stanky.h"
+#include <setjmp.h>
+
+/*=======External Functions This Runner Calls=====*/
+extern void setUp(void);
+extern void tearDown(void);
+extern void test_TheFirstThingToTest(void);
+extern void test_TheSecondThingToTest(void);
+extern void test_TheThirdThingToTest(void);
+extern void test_TheFourthThingToTest(void);
+
+
+/*=======Test Reset Option=====*/
+void resetTest(void);
+void resetTest(void)
+{
+  tearDown();
+  setUp();
+}
+
+
+/*=======MAIN=====*/
+int main(void)
+{
+  UnityBegin("testdata/testsample.c");
+  RUN_TEST(test_TheFirstThingToTest, 21);
+  RUN_TEST(test_TheSecondThingToTest, 43);
+  RUN_TEST(test_TheThirdThingToTest, 53);
+  RUN_TEST(test_TheFourthThingToTest, 58);
+
+  return (UnityEnd());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_head1.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_head1.c
new file mode 100644
index 000000000..1d01551e8
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_head1.c
@@ -0,0 +1,55 @@
+/* AUTOGENERATED FILE. DO NOT EDIT. */
+
+/*=======Test Runner Used To Run Each Test Below=====*/
+#define RUN_TEST(TestFunc, TestLineNum) \
+{ \
+  Unity.CurrentTestName = #TestFunc; \
+  Unity.CurrentTestLineNumber = TestLineNum; \
+  Unity.NumberOfTests++; \
+  if (TEST_PROTECT()) \
+  { \
+      setUp(); \
+      TestFunc(); \
+  } \
+  if (TEST_PROTECT() && !TEST_IS_IGNORED) \
+  { \
+    tearDown(); \
+  } \
+  UnityConcludeTest(); \
+}
+
+/*=======Automagically Detected Files To Include=====*/
+#include "unity.h"
+#include <setjmp.h>
+#include <stdio.h>
+#include "testsample_head1.h"
+
+/*=======External Functions This Runner Calls=====*/
+extern void setUp(void);
+extern void tearDown(void);
+extern void test_TheFirstThingToTest(void);
+extern void test_TheSecondThingToTest(void);
+extern void test_TheThirdThingToTest(void);
+extern void test_TheFourthThingToTest(void);
+
+
+/*=======Test Reset Option=====*/
+void resetTest(void);
+void resetTest(void)
+{
+  tearDown();
+  setUp();
+}
+
+
+/*=======MAIN=====*/
+int main(void)
+{
+  UnityBegin("testdata/testsample.c");
+  RUN_TEST(test_TheFirstThingToTest, 21);
+  RUN_TEST(test_TheSecondThingToTest, 43);
+  RUN_TEST(test_TheThirdThingToTest, 53);
+  RUN_TEST(test_TheFourthThingToTest, 58);
+
+  return (UnityEnd());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_head1.h b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_head1.h
new file mode 100644
index 000000000..da6b7ab26
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_head1.h
@@ -0,0 +1,15 @@
+/* AUTOGENERATED FILE. DO NOT EDIT. */
+#ifndef _TESTSAMPLE_HEAD1_H
+#define _TESTSAMPLE_HEAD1_H
+
+#include "unity.h"
+#include "funky.h"
+#include "stanky.h"
+#include <setjmp.h>
+
+void test_TheFirstThingToTest(void);
+void test_TheSecondThingToTest(void);
+void test_TheThirdThingToTest(void);
+void test_TheFourthThingToTest(void);
+#endif
+
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_cmd.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_cmd.c
new file mode 100644
index 000000000..45a09af22
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_cmd.c
@@ -0,0 +1,80 @@
+/* AUTOGENERATED FILE. DO NOT EDIT. */
+
+/*=======Test Runner Used To Run Each Test Below=====*/
+#define RUN_TEST(TestFunc, TestLineNum) \
+{ \
+  Unity.CurrentTestName = #TestFunc; \
+  Unity.CurrentTestLineNumber = TestLineNum; \
+  Unity.NumberOfTests++; \
+  CMock_Init(); \
+  UNITY_CLR_DETAILS(); \
+  if (TEST_PROTECT()) \
+  { \
+    CEXCEPTION_T e; \
+    Try { \
+      setUp(); \
+      TestFunc(); \
+    } Catch(e) { TEST_ASSERT_EQUAL_HEX32_MESSAGE(CEXCEPTION_NONE, e, "Unhandled Exception!"); } \
+  } \
+  if (TEST_PROTECT() && !TEST_IS_IGNORED) \
+  { \
+    tearDown(); \
+    CMock_Verify(); \
+  } \
+  CMock_Destroy(); \
+  UnityConcludeTest(); \
+}
+
+/*=======Automagically Detected Files To Include=====*/
+#include "unity.h"
+#include "cmock.h"
+#include <setjmp.h>
+#include <stdio.h>
+#include "CException.h"
+#include "funky.h"
+#include <setjmp.h>
+#include "Mockstanky.h"
+
+/*=======External Functions This Runner Calls=====*/
+extern void setUp(void);
+extern void tearDown(void);
+extern void test_TheFirstThingToTest(void);
+extern void test_TheSecondThingToTest(void);
+
+
+/*=======Mock Management=====*/
+static void CMock_Init(void)
+{
+  Mockstanky_Init();
+}
+static void CMock_Verify(void)
+{
+  Mockstanky_Verify();
+}
+static void CMock_Destroy(void)
+{
+  Mockstanky_Destroy();
+}
+
+/*=======Test Reset Option=====*/
+void resetTest(void);
+void resetTest(void)
+{
+  CMock_Verify();
+  CMock_Destroy();
+  tearDown();
+  CMock_Init();
+  setUp();
+}
+
+
+/*=======MAIN=====*/
+int main(void)
+{
+  UnityBegin("testdata/mocksample.c");
+  RUN_TEST(test_TheFirstThingToTest, 21);
+  RUN_TEST(test_TheSecondThingToTest, 43);
+
+  CMock_Guts_MemFreeFinal();
+  return (UnityEnd());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_def.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_def.c
new file mode 100644
index 000000000..a7a26078b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_def.c
@@ -0,0 +1,76 @@
+/* AUTOGENERATED FILE. DO NOT EDIT. */
+
+/*=======Test Runner Used To Run Each Test Below=====*/
+#define RUN_TEST(TestFunc, TestLineNum) \
+{ \
+  Unity.CurrentTestName = #TestFunc; \
+  Unity.CurrentTestLineNumber = TestLineNum; \
+  Unity.NumberOfTests++; \
+  CMock_Init(); \
+  UNITY_CLR_DETAILS(); \
+  if (TEST_PROTECT()) \
+  { \
+      setUp(); \
+      TestFunc(); \
+  } \
+  if (TEST_PROTECT() && !TEST_IS_IGNORED) \
+  { \
+    tearDown(); \
+    CMock_Verify(); \
+  } \
+  CMock_Destroy(); \
+  UnityConcludeTest(); \
+}
+
+/*=======Automagically Detected Files To Include=====*/
+#include "unity.h"
+#include "cmock.h"
+#include <setjmp.h>
+#include <stdio.h>
+#include "funky.h"
+#include <setjmp.h>
+#include "Mockstanky.h"
+
+/*=======External Functions This Runner Calls=====*/
+extern void setUp(void);
+extern void tearDown(void);
+extern void test_TheFirstThingToTest(void);
+extern void test_TheSecondThingToTest(void);
+
+
+/*=======Mock Management=====*/
+static void CMock_Init(void)
+{
+  Mockstanky_Init();
+}
+static void CMock_Verify(void)
+{
+  Mockstanky_Verify();
+}
+static void CMock_Destroy(void)
+{
+  Mockstanky_Destroy();
+}
+
+/*=======Test Reset Option=====*/
+void resetTest(void);
+void resetTest(void)
+{
+  CMock_Verify();
+  CMock_Destroy();
+  tearDown();
+  CMock_Init();
+  setUp();
+}
+
+
+/*=======MAIN=====*/
+int main(void)
+{
+  UnityBegin("testdata/mocksample.c");
+  RUN_TEST(test_TheFirstThingToTest, 21);
+  RUN_TEST(test_TheSecondThingToTest, 43);
+
+  CMock_Guts_MemFreeFinal();
+  return (UnityEnd());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_head1.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_head1.c
new file mode 100644
index 000000000..45829fe7e
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_head1.c
@@ -0,0 +1,75 @@
+/* AUTOGENERATED FILE. DO NOT EDIT. */
+
+/*=======Test Runner Used To Run Each Test Below=====*/
+#define RUN_TEST(TestFunc, TestLineNum) \
+{ \
+  Unity.CurrentTestName = #TestFunc; \
+  Unity.CurrentTestLineNumber = TestLineNum; \
+  Unity.NumberOfTests++; \
+  CMock_Init(); \
+  UNITY_CLR_DETAILS(); \
+  if (TEST_PROTECT()) \
+  { \
+      setUp(); \
+      TestFunc(); \
+  } \
+  if (TEST_PROTECT() && !TEST_IS_IGNORED) \
+  { \
+    tearDown(); \
+    CMock_Verify(); \
+  } \
+  CMock_Destroy(); \
+  UnityConcludeTest(); \
+}
+
+/*=======Automagically Detected Files To Include=====*/
+#include "unity.h"
+#include "cmock.h"
+#include <setjmp.h>
+#include <stdio.h>
+#include "testsample_mock_head1.h"
+#include "Mockstanky.h"
+
+/*=======External Functions This Runner Calls=====*/
+extern void setUp(void);
+extern void tearDown(void);
+extern void test_TheFirstThingToTest(void);
+extern void test_TheSecondThingToTest(void);
+
+
+/*=======Mock Management=====*/
+static void CMock_Init(void)
+{
+  Mockstanky_Init();
+}
+static void CMock_Verify(void)
+{
+  Mockstanky_Verify();
+}
+static void CMock_Destroy(void)
+{
+  Mockstanky_Destroy();
+}
+
+/*=======Test Reset Option=====*/
+void resetTest(void);
+void resetTest(void)
+{
+  CMock_Verify();
+  CMock_Destroy();
+  tearDown();
+  CMock_Init();
+  setUp();
+}
+
+
+/*=======MAIN=====*/
+int main(void)
+{
+  UnityBegin("testdata/mocksample.c");
+  RUN_TEST(test_TheFirstThingToTest, 21);
+  RUN_TEST(test_TheSecondThingToTest, 43);
+
+  CMock_Guts_MemFreeFinal();
+  return (UnityEnd());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_head1.h b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_head1.h
new file mode 100644
index 000000000..30c509ad0
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_head1.h
@@ -0,0 +1,13 @@
+/* AUTOGENERATED FILE. DO NOT EDIT. */
+#ifndef _TESTSAMPLE_MOCK_HEAD1_H
+#define _TESTSAMPLE_MOCK_HEAD1_H
+
+#include "unity.h"
+#include "cmock.h"
+#include "funky.h"
+#include <setjmp.h>
+
+void test_TheFirstThingToTest(void);
+void test_TheSecondThingToTest(void);
+#endif
+
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_new1.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_new1.c
new file mode 100644
index 000000000..0061822e5
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_new1.c
@@ -0,0 +1,89 @@
+/* AUTOGENERATED FILE. DO NOT EDIT. */
+
+/*=======Test Runner Used To Run Each Test Below=====*/
+#define RUN_TEST(TestFunc, TestLineNum) \
+{ \
+  Unity.CurrentTestName = #TestFunc; \
+  Unity.CurrentTestLineNumber = TestLineNum; \
+  Unity.NumberOfTests++; \
+  CMock_Init(); \
+  UNITY_CLR_DETAILS(); \
+  if (TEST_PROTECT()) \
+  { \
+    CEXCEPTION_T e; \
+    Try { \
+      setUp(); \
+      TestFunc(); \
+    } Catch(e) { TEST_ASSERT_EQUAL_HEX32_MESSAGE(CEXCEPTION_NONE, e, "Unhandled Exception!"); } \
+  } \
+  if (TEST_PROTECT() && !TEST_IS_IGNORED) \
+  { \
+    tearDown(); \
+    CMock_Verify(); \
+  } \
+  CMock_Destroy(); \
+  UnityConcludeTest(); \
+}
+
+/*=======Automagically Detected Files To Include=====*/
+#include "unity.h"
+#include "cmock.h"
+#include <setjmp.h>
+#include <stdio.h>
+#include "CException.h"
+#include "one.h"
+#include "two.h"
+#include "funky.h"
+#include <setjmp.h>
+#include "Mockstanky.h"
+
+int GlobalExpectCount;
+int GlobalVerifyOrder;
+char* GlobalOrderError;
+
+/*=======External Functions This Runner Calls=====*/
+extern void setUp(void);
+extern void tearDown(void);
+extern void test_TheFirstThingToTest(void);
+extern void test_TheSecondThingToTest(void);
+
+
+/*=======Mock Management=====*/
+static void CMock_Init(void)
+{
+  GlobalExpectCount = 0;
+  GlobalVerifyOrder = 0;
+  GlobalOrderError = NULL;
+  Mockstanky_Init();
+}
+static void CMock_Verify(void)
+{
+  Mockstanky_Verify();
+}
+static void CMock_Destroy(void)
+{
+  Mockstanky_Destroy();
+}
+
+/*=======Test Reset Option=====*/
+void resetTest(void);
+void resetTest(void)
+{
+  CMock_Verify();
+  CMock_Destroy();
+  tearDown();
+  CMock_Init();
+  setUp();
+}
+
+
+/*=======MAIN=====*/
+int main(void)
+{
+  UnityBegin("testdata/mocksample.c");
+  RUN_TEST(test_TheFirstThingToTest, 21);
+  RUN_TEST(test_TheSecondThingToTest, 43);
+
+  CMock_Guts_MemFreeFinal();
+  return (UnityEnd());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_new2.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_new2.c
new file mode 100644
index 000000000..ee63cdc0b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_new2.c
@@ -0,0 +1,89 @@
+/* AUTOGENERATED FILE. DO NOT EDIT. */
+
+/*=======Test Runner Used To Run Each Test Below=====*/
+#define RUN_TEST(TestFunc, TestLineNum) \
+{ \
+  Unity.CurrentTestName = #TestFunc; \
+  Unity.CurrentTestLineNumber = TestLineNum; \
+  Unity.NumberOfTests++; \
+  CMock_Init(); \
+  UNITY_CLR_DETAILS(); \
+  if (TEST_PROTECT()) \
+  { \
+      setUp(); \
+      TestFunc(); \
+  } \
+  if (TEST_PROTECT() && !TEST_IS_IGNORED) \
+  { \
+    tearDown(); \
+    CMock_Verify(); \
+  } \
+  CMock_Destroy(); \
+  UnityConcludeTest(); \
+}
+
+/*=======Automagically Detected Files To Include=====*/
+#include "unity.h"
+#include "cmock.h"
+#include <setjmp.h>
+#include <stdio.h>
+#include "funky.h"
+#include <setjmp.h>
+#include "Mockstanky.h"
+
+/*=======External Functions This Runner Calls=====*/
+extern void setUp(void);
+extern void tearDown(void);
+extern void test_TheFirstThingToTest(void);
+extern void test_TheSecondThingToTest(void);
+
+
+/*=======Mock Management=====*/
+static void CMock_Init(void)
+{
+  Mockstanky_Init();
+}
+static void CMock_Verify(void)
+{
+  Mockstanky_Verify();
+}
+static void CMock_Destroy(void)
+{
+  Mockstanky_Destroy();
+}
+
+/*=======Suite Setup=====*/
+static int suite_setup(void)
+{
+a_custom_setup();
+}
+
+/*=======Suite Teardown=====*/
+static int suite_teardown(int num_failures)
+{
+a_custom_teardown();
+}
+
+/*=======Test Reset Option=====*/
+void resetTest(void);
+void resetTest(void)
+{
+  CMock_Verify();
+  CMock_Destroy();
+  tearDown();
+  CMock_Init();
+  setUp();
+}
+
+
+/*=======MAIN=====*/
+int main(void)
+{
+  suite_setup();
+  UnityBegin("testdata/mocksample.c");
+  RUN_TEST(test_TheFirstThingToTest, 21);
+  RUN_TEST(test_TheSecondThingToTest, 43);
+
+  CMock_Guts_MemFreeFinal();
+  return suite_teardown(UnityEnd());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_param.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_param.c
new file mode 100644
index 000000000..a42b7deae
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_param.c
@@ -0,0 +1,77 @@
+/* AUTOGENERATED FILE. DO NOT EDIT. */
+
+/*=======Test Runner Used To Run Each Test Below=====*/
+#define RUN_TEST_NO_ARGS
+#define RUN_TEST(TestFunc, TestLineNum, ...) \
+{ \
+  Unity.CurrentTestName = #TestFunc "(" #__VA_ARGS__ ")"; \
+  Unity.CurrentTestLineNumber = TestLineNum; \
+  Unity.NumberOfTests++; \
+  CMock_Init(); \
+  UNITY_CLR_DETAILS(); \
+  if (TEST_PROTECT()) \
+  { \
+      setUp(); \
+      TestFunc(__VA_ARGS__); \
+  } \
+  if (TEST_PROTECT() && !TEST_IS_IGNORED) \
+  { \
+    tearDown(); \
+    CMock_Verify(); \
+  } \
+  CMock_Destroy(); \
+  UnityConcludeTest(); \
+}
+
+/*=======Automagically Detected Files To Include=====*/
+#include "unity.h"
+#include "cmock.h"
+#include <setjmp.h>
+#include <stdio.h>
+#include "funky.h"
+#include <setjmp.h>
+#include "Mockstanky.h"
+
+/*=======External Functions This Runner Calls=====*/
+extern void setUp(void);
+extern void tearDown(void);
+extern void test_TheFirstThingToTest(void);
+extern void test_TheSecondThingToTest(void);
+
+
+/*=======Mock Management=====*/
+static void CMock_Init(void)
+{
+  Mockstanky_Init();
+}
+static void CMock_Verify(void)
+{
+  Mockstanky_Verify();
+}
+static void CMock_Destroy(void)
+{
+  Mockstanky_Destroy();
+}
+
+/*=======Test Reset Option=====*/
+void resetTest(void);
+void resetTest(void)
+{
+  CMock_Verify();
+  CMock_Destroy();
+  tearDown();
+  CMock_Init();
+  setUp();
+}
+
+
+/*=======MAIN=====*/
+int main(void)
+{
+  UnityBegin("testdata/mocksample.c");
+  RUN_TEST(test_TheFirstThingToTest, 21, RUN_TEST_NO_ARGS);
+  RUN_TEST(test_TheSecondThingToTest, 43, RUN_TEST_NO_ARGS);
+
+  CMock_Guts_MemFreeFinal();
+  return (UnityEnd());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_run1.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_run1.c
new file mode 100644
index 000000000..0061822e5
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_run1.c
@@ -0,0 +1,89 @@
+/* AUTOGENERATED FILE. DO NOT EDIT. */
+
+/*=======Test Runner Used To Run Each Test Below=====*/
+#define RUN_TEST(TestFunc, TestLineNum) \
+{ \
+  Unity.CurrentTestName = #TestFunc; \
+  Unity.CurrentTestLineNumber = TestLineNum; \
+  Unity.NumberOfTests++; \
+  CMock_Init(); \
+  UNITY_CLR_DETAILS(); \
+  if (TEST_PROTECT()) \
+  { \
+    CEXCEPTION_T e; \
+    Try { \
+      setUp(); \
+      TestFunc(); \
+    } Catch(e) { TEST_ASSERT_EQUAL_HEX32_MESSAGE(CEXCEPTION_NONE, e, "Unhandled Exception!"); } \
+  } \
+  if (TEST_PROTECT() && !TEST_IS_IGNORED) \
+  { \
+    tearDown(); \
+    CMock_Verify(); \
+  } \
+  CMock_Destroy(); \
+  UnityConcludeTest(); \
+}
+
+/*=======Automagically Detected Files To Include=====*/
+#include "unity.h"
+#include "cmock.h"
+#include <setjmp.h>
+#include <stdio.h>
+#include "CException.h"
+#include "one.h"
+#include "two.h"
+#include "funky.h"
+#include <setjmp.h>
+#include "Mockstanky.h"
+
+int GlobalExpectCount;
+int GlobalVerifyOrder;
+char* GlobalOrderError;
+
+/*=======External Functions This Runner Calls=====*/
+extern void setUp(void);
+extern void tearDown(void);
+extern void test_TheFirstThingToTest(void);
+extern void test_TheSecondThingToTest(void);
+
+
+/*=======Mock Management=====*/
+static void CMock_Init(void)
+{
+  GlobalExpectCount = 0;
+  GlobalVerifyOrder = 0;
+  GlobalOrderError = NULL;
+  Mockstanky_Init();
+}
+static void CMock_Verify(void)
+{
+  Mockstanky_Verify();
+}
+static void CMock_Destroy(void)
+{
+  Mockstanky_Destroy();
+}
+
+/*=======Test Reset Option=====*/
+void resetTest(void);
+void resetTest(void)
+{
+  CMock_Verify();
+  CMock_Destroy();
+  tearDown();
+  CMock_Init();
+  setUp();
+}
+
+
+/*=======MAIN=====*/
+int main(void)
+{
+  UnityBegin("testdata/mocksample.c");
+  RUN_TEST(test_TheFirstThingToTest, 21);
+  RUN_TEST(test_TheSecondThingToTest, 43);
+
+  CMock_Guts_MemFreeFinal();
+  return (UnityEnd());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_run2.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_run2.c
new file mode 100644
index 000000000..ee63cdc0b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_run2.c
@@ -0,0 +1,89 @@
+/* AUTOGENERATED FILE. DO NOT EDIT. */
+
+/*=======Test Runner Used To Run Each Test Below=====*/
+#define RUN_TEST(TestFunc, TestLineNum) \
+{ \
+  Unity.CurrentTestName = #TestFunc; \
+  Unity.CurrentTestLineNumber = TestLineNum; \
+  Unity.NumberOfTests++; \
+  CMock_Init(); \
+  UNITY_CLR_DETAILS(); \
+  if (TEST_PROTECT()) \
+  { \
+      setUp(); \
+      TestFunc(); \
+  } \
+  if (TEST_PROTECT() && !TEST_IS_IGNORED) \
+  { \
+    tearDown(); \
+    CMock_Verify(); \
+  } \
+  CMock_Destroy(); \
+  UnityConcludeTest(); \
+}
+
+/*=======Automagically Detected Files To Include=====*/
+#include "unity.h"
+#include "cmock.h"
+#include <setjmp.h>
+#include <stdio.h>
+#include "funky.h"
+#include <setjmp.h>
+#include "Mockstanky.h"
+
+/*=======External Functions This Runner Calls=====*/
+extern void setUp(void);
+extern void tearDown(void);
+extern void test_TheFirstThingToTest(void);
+extern void test_TheSecondThingToTest(void);
+
+
+/*=======Mock Management=====*/
+static void CMock_Init(void)
+{
+  Mockstanky_Init();
+}
+static void CMock_Verify(void)
+{
+  Mockstanky_Verify();
+}
+static void CMock_Destroy(void)
+{
+  Mockstanky_Destroy();
+}
+
+/*=======Suite Setup=====*/
+static int suite_setup(void)
+{
+a_custom_setup();
+}
+
+/*=======Suite Teardown=====*/
+static int suite_teardown(int num_failures)
+{
+a_custom_teardown();
+}
+
+/*=======Test Reset Option=====*/
+void resetTest(void);
+void resetTest(void)
+{
+  CMock_Verify();
+  CMock_Destroy();
+  tearDown();
+  CMock_Init();
+  setUp();
+}
+
+
+/*=======MAIN=====*/
+int main(void)
+{
+  suite_setup();
+  UnityBegin("testdata/mocksample.c");
+  RUN_TEST(test_TheFirstThingToTest, 21);
+  RUN_TEST(test_TheSecondThingToTest, 43);
+
+  CMock_Guts_MemFreeFinal();
+  return suite_teardown(UnityEnd());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_yaml.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_yaml.c
new file mode 100644
index 000000000..a24bb5a57
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_mock_yaml.c
@@ -0,0 +1,90 @@
+/* AUTOGENERATED FILE. DO NOT EDIT. */
+
+/*=======Test Runner Used To Run Each Test Below=====*/
+#define RUN_TEST(TestFunc, TestLineNum) \
+{ \
+  Unity.CurrentTestName = #TestFunc; \
+  Unity.CurrentTestLineNumber = TestLineNum; \
+  Unity.NumberOfTests++; \
+  CMock_Init(); \
+  UNITY_CLR_DETAILS(); \
+  if (TEST_PROTECT()) \
+  { \
+    CEXCEPTION_T e; \
+    Try { \
+      setUp(); \
+      TestFunc(); \
+    } Catch(e) { TEST_ASSERT_EQUAL_HEX32_MESSAGE(CEXCEPTION_NONE, e, "Unhandled Exception!"); } \
+  } \
+  if (TEST_PROTECT() && !TEST_IS_IGNORED) \
+  { \
+    tearDown(); \
+    CMock_Verify(); \
+  } \
+  CMock_Destroy(); \
+  UnityConcludeTest(); \
+}
+
+/*=======Automagically Detected Files To Include=====*/
+#include "unity.h"
+#include "cmock.h"
+#include <setjmp.h>
+#include <stdio.h>
+#include "CException.h"
+#include "two.h"
+#include "three.h"
+#include <four.h>
+#include "funky.h"
+#include <setjmp.h>
+#include "Mockstanky.h"
+
+/*=======External Functions This Runner Calls=====*/
+extern void setUp(void);
+extern void tearDown(void);
+extern void test_TheFirstThingToTest(void);
+extern void test_TheSecondThingToTest(void);
+
+
+/*=======Mock Management=====*/
+static void CMock_Init(void)
+{
+  Mockstanky_Init();
+}
+static void CMock_Verify(void)
+{
+  Mockstanky_Verify();
+}
+static void CMock_Destroy(void)
+{
+  Mockstanky_Destroy();
+}
+
+/*=======Suite Setup=====*/
+static int suite_setup(void)
+{
+a_yaml_setup();
+}
+
+/*=======Test Reset Option=====*/
+void resetTest(void);
+void resetTest(void)
+{
+  CMock_Verify();
+  CMock_Destroy();
+  tearDown();
+  CMock_Init();
+  setUp();
+}
+
+
+/*=======MAIN=====*/
+int main(void)
+{
+  suite_setup();
+  UnityBegin("testdata/mocksample.c");
+  RUN_TEST(test_TheFirstThingToTest, 21);
+  RUN_TEST(test_TheSecondThingToTest, 43);
+
+  CMock_Guts_MemFreeFinal();
+  return (UnityEnd());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_new1.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_new1.c
new file mode 100644
index 000000000..7dcd3fdfe
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_new1.c
@@ -0,0 +1,67 @@
+/* AUTOGENERATED FILE. DO NOT EDIT. */
+
+/*=======Test Runner Used To Run Each Test Below=====*/
+#define RUN_TEST(TestFunc, TestLineNum) \
+{ \
+  Unity.CurrentTestName = #TestFunc; \
+  Unity.CurrentTestLineNumber = TestLineNum; \
+  Unity.NumberOfTests++; \
+  if (TEST_PROTECT()) \
+  { \
+    CEXCEPTION_T e; \
+    Try { \
+      setUp(); \
+      TestFunc(); \
+    } Catch(e) { TEST_ASSERT_EQUAL_HEX32_MESSAGE(CEXCEPTION_NONE, e, "Unhandled Exception!"); } \
+  } \
+  if (TEST_PROTECT() && !TEST_IS_IGNORED) \
+  { \
+    tearDown(); \
+  } \
+  UnityConcludeTest(); \
+}
+
+/*=======Automagically Detected Files To Include=====*/
+#include "unity.h"
+#include <setjmp.h>
+#include <stdio.h>
+#include "CException.h"
+#include "one.h"
+#include "two.h"
+#include "funky.h"
+#include "stanky.h"
+#include <setjmp.h>
+
+int GlobalExpectCount;
+int GlobalVerifyOrder;
+char* GlobalOrderError;
+
+/*=======External Functions This Runner Calls=====*/
+extern void setUp(void);
+extern void tearDown(void);
+extern void test_TheFirstThingToTest(void);
+extern void test_TheSecondThingToTest(void);
+extern void test_TheThirdThingToTest(void);
+extern void test_TheFourthThingToTest(void);
+
+
+/*=======Test Reset Option=====*/
+void resetTest(void);
+void resetTest(void)
+{
+  tearDown();
+  setUp();
+}
+
+
+/*=======MAIN=====*/
+int main(void)
+{
+  UnityBegin("testdata/testsample.c");
+  RUN_TEST(test_TheFirstThingToTest, 21);
+  RUN_TEST(test_TheSecondThingToTest, 43);
+  RUN_TEST(test_TheThirdThingToTest, 53);
+  RUN_TEST(test_TheFourthThingToTest, 58);
+
+  return (UnityEnd());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_new2.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_new2.c
new file mode 100644
index 000000000..c98c697f5
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_new2.c
@@ -0,0 +1,70 @@
+/* AUTOGENERATED FILE. DO NOT EDIT. */
+
+/*=======Test Runner Used To Run Each Test Below=====*/
+#define RUN_TEST(TestFunc, TestLineNum) \
+{ \
+  Unity.CurrentTestName = #TestFunc; \
+  Unity.CurrentTestLineNumber = TestLineNum; \
+  Unity.NumberOfTests++; \
+  if (TEST_PROTECT()) \
+  { \
+      setUp(); \
+      TestFunc(); \
+  } \
+  if (TEST_PROTECT() && !TEST_IS_IGNORED) \
+  { \
+    tearDown(); \
+  } \
+  UnityConcludeTest(); \
+}
+
+/*=======Automagically Detected Files To Include=====*/
+#include "unity.h"
+#include <setjmp.h>
+#include <stdio.h>
+#include "funky.h"
+#include "stanky.h"
+#include <setjmp.h>
+
+/*=======External Functions This Runner Calls=====*/
+extern void setUp(void);
+extern void tearDown(void);
+extern void test_TheFirstThingToTest(void);
+extern void test_TheSecondThingToTest(void);
+extern void test_TheThirdThingToTest(void);
+extern void test_TheFourthThingToTest(void);
+
+
+/*=======Suite Setup=====*/
+static int suite_setup(void)
+{
+a_custom_setup();
+}
+
+/*=======Suite Teardown=====*/
+static int suite_teardown(int num_failures)
+{
+a_custom_teardown();
+}
+
+/*=======Test Reset Option=====*/
+void resetTest(void);
+void resetTest(void)
+{
+  tearDown();
+  setUp();
+}
+
+
+/*=======MAIN=====*/
+int main(void)
+{
+  suite_setup();
+  UnityBegin("testdata/testsample.c");
+  RUN_TEST(test_TheFirstThingToTest, 21);
+  RUN_TEST(test_TheSecondThingToTest, 43);
+  RUN_TEST(test_TheThirdThingToTest, 53);
+  RUN_TEST(test_TheFourthThingToTest, 58);
+
+  return suite_teardown(UnityEnd());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_param.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_param.c
new file mode 100644
index 000000000..adf6c2626
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_param.c
@@ -0,0 +1,58 @@
+/* AUTOGENERATED FILE. DO NOT EDIT. */
+
+/*=======Test Runner Used To Run Each Test Below=====*/
+#define RUN_TEST_NO_ARGS
+#define RUN_TEST(TestFunc, TestLineNum, ...) \
+{ \
+  Unity.CurrentTestName = #TestFunc "(" #__VA_ARGS__ ")"; \
+  Unity.CurrentTestLineNumber = TestLineNum; \
+  Unity.NumberOfTests++; \
+  if (TEST_PROTECT()) \
+  { \
+      setUp(); \
+      TestFunc(__VA_ARGS__); \
+  } \
+  if (TEST_PROTECT() && !TEST_IS_IGNORED) \
+  { \
+    tearDown(); \
+  } \
+  UnityConcludeTest(); \
+}
+
+/*=======Automagically Detected Files To Include=====*/
+#include "unity.h"
+#include <setjmp.h>
+#include <stdio.h>
+#include "funky.h"
+#include "stanky.h"
+#include <setjmp.h>
+
+/*=======External Functions This Runner Calls=====*/
+extern void setUp(void);
+extern void tearDown(void);
+extern void test_TheFirstThingToTest(void);
+extern void test_TheSecondThingToTest(void);
+extern void test_TheThirdThingToTest(void);
+extern void test_TheFourthThingToTest(void);
+
+
+/*=======Test Reset Option=====*/
+void resetTest(void);
+void resetTest(void)
+{
+  tearDown();
+  setUp();
+}
+
+
+/*=======MAIN=====*/
+int main(void)
+{
+  UnityBegin("testdata/testsample.c");
+  RUN_TEST(test_TheFirstThingToTest, 21, RUN_TEST_NO_ARGS);
+  RUN_TEST(test_TheSecondThingToTest, 43, RUN_TEST_NO_ARGS);
+  RUN_TEST(test_TheThirdThingToTest, 53, RUN_TEST_NO_ARGS);
+  RUN_TEST(test_TheFourthThingToTest, 58, RUN_TEST_NO_ARGS);
+
+  return (UnityEnd());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_run1.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_run1.c
new file mode 100644
index 000000000..7dcd3fdfe
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_run1.c
@@ -0,0 +1,67 @@
+/* AUTOGENERATED FILE. DO NOT EDIT. */
+
+/*=======Test Runner Used To Run Each Test Below=====*/
+#define RUN_TEST(TestFunc, TestLineNum) \
+{ \
+  Unity.CurrentTestName = #TestFunc; \
+  Unity.CurrentTestLineNumber = TestLineNum; \
+  Unity.NumberOfTests++; \
+  if (TEST_PROTECT()) \
+  { \
+    CEXCEPTION_T e; \
+    Try { \
+      setUp(); \
+      TestFunc(); \
+    } Catch(e) { TEST_ASSERT_EQUAL_HEX32_MESSAGE(CEXCEPTION_NONE, e, "Unhandled Exception!"); } \
+  } \
+  if (TEST_PROTECT() && !TEST_IS_IGNORED) \
+  { \
+    tearDown(); \
+  } \
+  UnityConcludeTest(); \
+}
+
+/*=======Automagically Detected Files To Include=====*/
+#include "unity.h"
+#include <setjmp.h>
+#include <stdio.h>
+#include "CException.h"
+#include "one.h"
+#include "two.h"
+#include "funky.h"
+#include "stanky.h"
+#include <setjmp.h>
+
+int GlobalExpectCount;
+int GlobalVerifyOrder;
+char* GlobalOrderError;
+
+/*=======External Functions This Runner Calls=====*/
+extern void setUp(void);
+extern void tearDown(void);
+extern void test_TheFirstThingToTest(void);
+extern void test_TheSecondThingToTest(void);
+extern void test_TheThirdThingToTest(void);
+extern void test_TheFourthThingToTest(void);
+
+
+/*=======Test Reset Option=====*/
+void resetTest(void);
+void resetTest(void)
+{
+  tearDown();
+  setUp();
+}
+
+
+/*=======MAIN=====*/
+int main(void)
+{
+  UnityBegin("testdata/testsample.c");
+  RUN_TEST(test_TheFirstThingToTest, 21);
+  RUN_TEST(test_TheSecondThingToTest, 43);
+  RUN_TEST(test_TheThirdThingToTest, 53);
+  RUN_TEST(test_TheFourthThingToTest, 58);
+
+  return (UnityEnd());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_run2.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_run2.c
new file mode 100644
index 000000000..c98c697f5
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_run2.c
@@ -0,0 +1,70 @@
+/* AUTOGENERATED FILE. DO NOT EDIT. */
+
+/*=======Test Runner Used To Run Each Test Below=====*/
+#define RUN_TEST(TestFunc, TestLineNum) \
+{ \
+  Unity.CurrentTestName = #TestFunc; \
+  Unity.CurrentTestLineNumber = TestLineNum; \
+  Unity.NumberOfTests++; \
+  if (TEST_PROTECT()) \
+  { \
+      setUp(); \
+      TestFunc(); \
+  } \
+  if (TEST_PROTECT() && !TEST_IS_IGNORED) \
+  { \
+    tearDown(); \
+  } \
+  UnityConcludeTest(); \
+}
+
+/*=======Automagically Detected Files To Include=====*/
+#include "unity.h"
+#include <setjmp.h>
+#include <stdio.h>
+#include "funky.h"
+#include "stanky.h"
+#include <setjmp.h>
+
+/*=======External Functions This Runner Calls=====*/
+extern void setUp(void);
+extern void tearDown(void);
+extern void test_TheFirstThingToTest(void);
+extern void test_TheSecondThingToTest(void);
+extern void test_TheThirdThingToTest(void);
+extern void test_TheFourthThingToTest(void);
+
+
+/*=======Suite Setup=====*/
+static int suite_setup(void)
+{
+a_custom_setup();
+}
+
+/*=======Suite Teardown=====*/
+static int suite_teardown(int num_failures)
+{
+a_custom_teardown();
+}
+
+/*=======Test Reset Option=====*/
+void resetTest(void);
+void resetTest(void)
+{
+  tearDown();
+  setUp();
+}
+
+
+/*=======MAIN=====*/
+int main(void)
+{
+  suite_setup();
+  UnityBegin("testdata/testsample.c");
+  RUN_TEST(test_TheFirstThingToTest, 21);
+  RUN_TEST(test_TheSecondThingToTest, 43);
+  RUN_TEST(test_TheThirdThingToTest, 53);
+  RUN_TEST(test_TheFourthThingToTest, 58);
+
+  return suite_teardown(UnityEnd());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_yaml.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_yaml.c
new file mode 100644
index 000000000..3316024df
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/expectdata/testsample_yaml.c
@@ -0,0 +1,71 @@
+/* AUTOGENERATED FILE. DO NOT EDIT. */
+
+/*=======Test Runner Used To Run Each Test Below=====*/
+#define RUN_TEST(TestFunc, TestLineNum) \
+{ \
+  Unity.CurrentTestName = #TestFunc; \
+  Unity.CurrentTestLineNumber = TestLineNum; \
+  Unity.NumberOfTests++; \
+  if (TEST_PROTECT()) \
+  { \
+    CEXCEPTION_T e; \
+    Try { \
+      setUp(); \
+      TestFunc(); \
+    } Catch(e) { TEST_ASSERT_EQUAL_HEX32_MESSAGE(CEXCEPTION_NONE, e, "Unhandled Exception!"); } \
+  } \
+  if (TEST_PROTECT() && !TEST_IS_IGNORED) \
+  { \
+    tearDown(); \
+  } \
+  UnityConcludeTest(); \
+}
+
+/*=======Automagically Detected Files To Include=====*/
+#include "unity.h"
+#include <setjmp.h>
+#include <stdio.h>
+#include "CException.h"
+#include "two.h"
+#include "three.h"
+#include <four.h>
+#include "funky.h"
+#include "stanky.h"
+#include <setjmp.h>
+
+/*=======External Functions This Runner Calls=====*/
+extern void setUp(void);
+extern void tearDown(void);
+extern void test_TheFirstThingToTest(void);
+extern void test_TheSecondThingToTest(void);
+extern void test_TheThirdThingToTest(void);
+extern void test_TheFourthThingToTest(void);
+
+
+/*=======Suite Setup=====*/
+static int suite_setup(void)
+{
+a_yaml_setup();
+}
+
+/*=======Test Reset Option=====*/
+void resetTest(void);
+void resetTest(void)
+{
+  tearDown();
+  setUp();
+}
+
+
+/*=======MAIN=====*/
+int main(void)
+{
+  suite_setup();
+  UnityBegin("testdata/testsample.c");
+  RUN_TEST(test_TheFirstThingToTest, 21);
+  RUN_TEST(test_TheSecondThingToTest, 43);
+  RUN_TEST(test_TheThirdThingToTest, 53);
+  RUN_TEST(test_TheFourthThingToTest, 58);
+
+  return (UnityEnd());
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/rakefile b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/rakefile
new file mode 100644
index 000000000..e5f3b748f
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/rakefile
@@ -0,0 +1,163 @@
+# ==========================================
+#   Unity Project - A Test Framework for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+$verbose = false
+$extra_paths = []
+
+require 'rake'
+require 'rake/clean'
+require_relative 'rakefile_helper'
+require 'rspec/core/rake_task'
+
+TEMP_DIRS = [
+	File.join(__dir__, 'build'),
+	File.join(__dir__, 'sandbox')
+]
+
+TEMP_DIRS.each do |dir|
+  directory(dir)
+  CLOBBER.include(dir)
+end
+
+task :prepare_for_tests => TEMP_DIRS
+
+include RakefileHelpers
+
+# Load proper GCC as defult configuration
+DEFAULT_CONFIG_FILE = 'gcc_auto_stdint.yml'
+configure_toolchain(DEFAULT_CONFIG_FILE)
+
+############# ALL THE SELF-TESTS WE CAN PERFORM
+namespace :test do
+  desc "Build and test Unity"
+  task :all => [:clean, :prepare_for_tests, 'test:scripts', 'test:unit', :style, 'test:fixture', 'test:memory', 'test:summary']
+  task :ci => [:clean, :prepare_for_tests, 'test:scripts', 'test:unit', :style, 'test:make', 'test:fixture', 'test:memory', 'test:summary']
+
+  desc "Test unity with its own unit tests"
+  task :unit => [:prepare_for_tests] do
+    run_tests unit_test_files
+  end
+
+  namespace :unit do
+    unit_test_files.each do |f|
+      desc "test this unit only"
+      task File.basename(f,'.c').sub('test_unity_','') => [:prepare_for_tests] do
+        run_tests [f]
+      end
+    end
+  end
+
+  desc "Test unity's helper scripts"
+  task :scripts => [:prepare_for_tests] do
+    Dir['tests/test_*.rb'].each do |scriptfile|
+      require "./"+scriptfile
+    end
+  end
+
+  desc "Test unity triggered from make"
+  task :make => [:prepare_for_tests] do
+    run_make_tests()
+  end
+
+  desc "Test unity fixture addon"
+  task :fixture => [:prepare_for_tests] do
+    test_fixtures()
+  end
+
+  desc "Test unity memory addon"
+  task :memory => [:prepare_for_tests] do
+    test_memory()
+  end
+
+  desc "Test unity examples"
+  task :examples => [:prepare_for_tests] do
+    execute("cd ../examples/example_1 && make -s ci", false)
+    execute("cd ../examples/example_2 && make -s ci", false)
+    execute("cd ../examples/example_3 && rake", false)
+  end
+
+  desc "Run all rspecs"
+  RSpec::Core::RakeTask.new(:spec) do |t|
+    t.pattern = 'spec/**/*_spec.rb'
+  end
+
+  desc "Generate test summary"
+  task :summary do
+    report_summary
+  end
+end
+
+###################### Shorthand for many common tasks
+task :ci => ['test:ci']
+task :all => ['test:all']
+task :default => [:clobber, :all]
+
+desc "Load configuration"
+task :config, :config_file do |t, args|
+  configure_toolchain(args[:config_file])
+end
+
+task :no_color do
+  $colour_output = false
+end
+
+task :verbose do
+  $verbose = true
+end
+
+################### CODING STYLE VALIDATION
+namespace :style do
+  desc "Check style"
+  task :check do
+    report "\nVERIFYING RUBY STYLE"
+    report execute("rubocop ../auto ../examples ../extras --config .rubocop.yml", true)
+    report "Styling Ruby:PASS"
+  end
+
+  namespace :check do
+    Dir['../**/*.rb'].each do |f|
+      filename = File.basename(f, '.rb')
+      #desc "Check Style of #{filename}"
+      task filename.to_sym => ['style:clean'] do
+        report execute("rubocop #{f} --color --config .rubocop.yml", true)
+        report "Style Checked for #{f}"
+      end
+    end
+  end
+
+  desc "Fix Style of all C Code"
+  task :c do
+    run_astyle("../src/*.* ../extras/fixture/src/*.*")
+  end
+
+  namespace :c do
+    Dir['../{src,extras/**}/*.{c,h}'].each do |f|
+      filename = File.basename(f)[0..-3]
+      #desc "Check Style of #{filename}"
+      task filename.to_sym do
+        run_astyle f
+      end
+    end
+  end
+
+  desc "Attempt to Autocorrect style"
+  task :auto  => ['style:clean'] do
+    execute("rubocop ../auto ../examples ../extras --auto-correct --config .rubocop.yml")
+    report "Autocorrected What We Could."
+  end
+
+  desc "Update style todo list"
+  task :todo  => ['style:clean'] do
+    execute("rubocop ../auto ../examples ../extras --auto-gen-config --config .rubocop.yml")
+    report "Updated Style TODO List."
+  end
+
+  task :clean do
+    File.delete(".rubocop_todo.yml") if File.exists?(".rubocop_todo.yml")
+  end
+end
+
+task :style => ['style:check']
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/rakefile_helper.rb b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/rakefile_helper.rb
new file mode 100644
index 000000000..e205bc67d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/rakefile_helper.rb
@@ -0,0 +1,315 @@
+# ==========================================
+#   Unity Project - A Test Framework for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+require 'yaml'
+require 'fileutils'
+require_relative '../auto/unity_test_summary'
+require_relative '../auto/generate_test_runner'
+require_relative '../auto/colour_reporter'
+
+module RakefileHelpers
+  C_EXTENSION = '.c'.freeze
+  def load_configuration(config_file)
+    return if $configured
+
+    $cfg_file = "targets/#{config_file}" unless config_file =~ /[\\|\/]/
+    $cfg = YAML.load(File.read($cfg_file))
+    $colour_output = false unless $cfg['colour']
+    $configured = true if config_file != DEFAULT_CONFIG_FILE
+  end
+
+  def configure_clean
+    CLEAN.include('build/*.*')
+  end
+
+  def configure_toolchain(config_file = DEFAULT_CONFIG_FILE)
+    config_file += '.yml' unless config_file =~ /\.yml$/
+    config_file = config_file unless config_file =~ /[\\|\/]/
+    load_configuration(config_file)
+    configure_clean
+  end
+
+  def unit_test_files
+    path = 'tests/test*' + C_EXTENSION
+    path.tr!('\\', '/')
+    FileList.new(path)
+  end
+
+  def local_include_dirs
+    include_dirs = $cfg[:paths][:includes] || []
+    include_dirs += $cfg[:paths][:source] || []
+    include_dirs += $cfg[:paths][:test] || []
+    include_dirs += $cfg[:paths][:support] || []
+    include_dirs.delete_if { |dir| dir.is_a?(Array) }
+    include_dirs
+  end
+
+  def extract_headers(filename)
+    includes = []
+    lines = File.readlines(filename)
+    lines.each do |line|
+      m = line.match(/^\s*#include\s+\"\s*(.+\.[hH])\s*\"/)
+      includes << m[1] unless m.nil?
+    end
+    includes
+  end
+
+  def find_source_file(header, paths)
+    paths.each do |dir|
+      src_file = dir + header.ext(C_EXTENSION)
+      return src_file if File.exist?(src_file)
+    end
+    nil
+  end
+
+  def tackit(strings)
+    result = if strings.is_a?(Array)
+               "\"#{strings.join}\""
+             else
+               strings
+             end
+    result
+  end
+
+  def squash(prefix, items)
+    result = ''
+    items.each { |item| result += " #{prefix}#{tackit(item)}" }
+    result
+  end
+
+  def should(behave, &block)
+    if block
+      puts 'Should ' + behave
+      yield block
+    else
+      puts "UNIMPLEMENTED CASE: Should #{behave}"
+    end
+  end
+
+  def build_command_string(hash, values, defines = nil)
+
+    # Replace named and numbered slots
+    args = []
+    hash[:arguments].each do |arg|
+      if arg.include? '$'
+        if arg.include? ': COLLECTION_PATHS_TEST_TOOLCHAIN_INCLUDE'
+          pattern = arg.gsub(': COLLECTION_PATHS_TEST_TOOLCHAIN_INCLUDE','')
+          [ File.join('..','src') ].each do |f|
+            args << pattern.gsub(/\$/,f)
+          end
+
+        elsif arg.include? ': COLLECTION_PATHS_TEST_SUPPORT_SOURCE_INCLUDE_VENDOR'
+          pattern = arg.gsub(': COLLECTION_PATHS_TEST_SUPPORT_SOURCE_INCLUDE_VENDOR','')
+          [ $extra_paths, 'src', File.join('tests'), File.join('testdata'), $cfg[:paths][:support] ].flatten.uniq.compact.each do |f|
+            args << pattern.gsub(/\$/,f)
+          end
+
+        elsif arg.include? ': COLLECTION_DEFINES_TEST_AND_VENDOR'
+          pattern = arg.gsub(': COLLECTION_DEFINES_TEST_AND_VENDOR','')
+          [ $cfg[:defines][:test], defines ].flatten.uniq.compact.each do |f|
+            args << pattern.gsub(/\$/,f)
+          end
+
+        elsif arg =~ /\$\{(\d+)\}/
+          i = $1.to_i - 1
+          if (values[i].is_a?(Array))
+            values[i].each {|v| args << arg.gsub(/\$\{\d+\}/, v)}
+          else
+            args << arg.gsub(/\$\{(\d)+\}/, values[i] || '')
+          end
+
+        else
+          args << arg
+
+        end
+      else
+        args << arg
+      end
+    end
+
+    # Build Command
+    return tackit(hash[:executable]) + squash('', args)
+  end
+
+  def compile(file, defines = [])
+    out_file = File.join('build', File.basename(file, C_EXTENSION)) + $cfg[:extension][:object]
+    cmd_str = build_command_string( $cfg[:tools][:test_compiler], [ file, out_file ], defines )
+    execute(cmd_str)
+    out_file
+  end
+
+  def link_it(exe_name, obj_list)
+    exe_name = File.join('build', File.basename(exe_name))
+    cmd_str = build_command_string( $cfg[:tools][:test_linker], [ obj_list, exe_name ] )
+    execute(cmd_str)
+  end
+
+  def runtest(bin_name, ok_to_fail = false, extra_args = nil)
+    bin_name = File.join('build', File.basename(bin_name))
+    extra_args = extra_args.nil? ? "" : " " + extra_args
+    if $cfg[:tools][:test_fixture]
+      cmd_str = build_command_string( $cfg[:tools][:test_fixture], [ bin_name, extra_args ] )
+    else
+      cmd_str = bin_name + extra_args
+    end
+    execute(cmd_str, ok_to_fail)
+  end
+
+  def run_astyle(style_what)
+    report "Styling C Code..."
+    command = "AStyle " \
+              "--style=allman --indent=spaces=4 --indent-switches --indent-preproc-define --indent-preproc-block " \
+              "--pad-oper --pad-comma --unpad-paren --pad-header " \
+              "--align-pointer=type --align-reference=name " \
+              "--add-brackets --mode=c --suffix=none " \
+              "#{style_what}"
+    execute(command, false)
+    report "Styling C:PASS"
+  end
+
+  def execute(command_string, ok_to_fail = false)
+    report command_string if $verbose
+    output = `#{command_string}`.chomp
+    report(output) if $verbose && !output.nil? && !output.empty?
+    raise "Command failed. (Returned #{$?.exitstatus})" if !$?.nil? && !$?.exitstatus.zero? && !ok_to_fail
+    output
+  end
+
+  def report_summary
+    summary = UnityTestSummary.new
+    summary.root = __dir__
+    results_glob = File.join('build','*.test*')
+    results_glob.tr!('\\', '/')
+    results = Dir[results_glob]
+    summary.targets = results
+    report summary.run
+  end
+
+  def save_test_results(test_base, output)
+    test_results = File.join('build',test_base)
+    if output.match(/OK$/m).nil?
+      test_results += '.testfail'
+    else
+      report output unless $verbose # Verbose already prints this line, as does a failure
+      test_results += '.testpass'
+    end
+    File.open(test_results, 'w') { |f| f.print output }
+  end
+
+  def test_fixtures()
+    report "\nRunning Fixture Addon"
+
+    # Get a list of all source files needed
+    src_files  = Dir[File.join('..','extras','fixture','src','*.c')]
+    src_files += Dir[File.join('..','extras','fixture','test','*.c')]
+    src_files += Dir[File.join('..','extras','fixture','test','main','*.c')]
+    src_files += Dir[File.join('..','extras','memory','src','*.c')]
+    src_files << File.join('..','src','unity.c')
+
+    # Build object files
+    $extra_paths = [File.join('..','extras','fixture','src'), File.join('..','extras','memory','src')]
+    obj_list = src_files.map { |f| compile(f, ['UNITY_SKIP_DEFAULT_RUNNER', 'UNITY_FIXTURE_NO_EXTRAS']) }
+
+    # Link the test executable
+    test_base = File.basename('framework_test', C_EXTENSION)
+    link_it(test_base, obj_list)
+
+    # Run and collect output
+    output = runtest(test_base + " -v -r")
+    save_test_results(test_base, output)
+  end
+
+  def test_memory()
+    { 'w_malloc' => [],
+      'wo_malloc' => ['UNITY_EXCLUDE_STDLIB_MALLOC']
+    }.each_pair do |name, defs|
+      report "\nRunning Memory Addon #{name}"
+
+      # Get a list of all source files needed
+      src_files  = Dir[File.join('..','extras','memory','src','*.c')]
+      src_files += Dir[File.join('..','extras','memory','test','*.c')]
+      src_files += Dir[File.join('..','extras','memory','test','main','*.c')]
+      src_files << File.join('..','src','unity.c')
+
+      # Build object files
+      $extra_paths = [File.join('..','extras','memory','src')]
+      obj_list = src_files.map { |f| compile(f, defs) }
+
+      # Link the test executable
+      test_base = File.basename("memory_test_#{name}", C_EXTENSION)
+      link_it(test_base, obj_list)
+
+      # Run and collect output
+      output = runtest(test_base)
+      save_test_results(test_base, output)
+    end
+  end
+
+  def run_tests(test_files)
+    report "\nRunning Unity system tests"
+
+    include_dirs = local_include_dirs
+
+    # Build and execute each unit test
+    test_files.each do |test|
+
+      # Drop Out if we're skipping this type of test
+      if $cfg[:skip_tests]
+        if $cfg[:skip_tests].include?(:parameterized) && test.match(/parameterized/)
+          report("Skipping Parameterized Tests for this Target:IGNORE")
+          next
+        end
+      end
+
+      report "\nRunning Tests in #{test}"
+      obj_list = []
+      test_defines = []
+
+      # Detect dependencies and build required modules
+      extract_headers(test).each do |header|
+        # Compile corresponding source file if it exists
+        src_file = find_source_file(header, include_dirs)
+
+        obj_list << compile(src_file, test_defines) unless src_file.nil?
+      end
+
+      # Build the test runner (generate if configured to do so)
+      test_base = File.basename(test, C_EXTENSION)
+      runner_name = test_base + '_Runner.c'
+      runner_path = File.join('build',runner_name)
+
+      options = $cfg[:unity]
+      options[:use_param_tests] = test =~ /parameterized/ ? true : false
+      UnityTestRunnerGenerator.new(options).run(test, runner_path)
+      obj_list << compile(runner_path, test_defines)
+
+      # Build the test module
+      obj_list << compile(test, test_defines)
+
+      # Link the test executable
+      link_it(test_base, obj_list)
+
+      # Execute unit test and generate results file
+      output = runtest(test_base)
+      save_test_results(test_base, output)
+    end
+  end
+
+  def run_make_tests()
+    [ "make -s",                               # test with all defaults
+      "make -s DEBUG=-m32",                    # test 32-bit architecture with 64-bit support
+      "make -s DEBUG=-m32 UNITY_SUPPORT_64=",  # test 32-bit build without 64-bit types
+      "make -s UNITY_INCLUDE_DOUBLE= ",        # test without double
+      "cd #{File.join("..","extras","fixture",'test')} && make -s default noStdlibMalloc",
+      "cd #{File.join("..","extras","fixture",'test')} && make -s C89",
+      "cd #{File.join("..","extras","memory",'test')} && make -s default noStdlibMalloc",
+      "cd #{File.join("..","extras","memory",'test')} && make -s C89",
+    ].each do |cmd|
+      report "Testing '#{cmd}'"
+      execute(cmd, false)
+    end
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/spec/generate_module_existing_file_spec.rb b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/spec/generate_module_existing_file_spec.rb
new file mode 100644
index 000000000..74e7fc840
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/spec/generate_module_existing_file_spec.rb
@@ -0,0 +1,158 @@
+
+require '../auto/generate_module.rb'
+require 'fileutils'
+
+def touch_src(file)
+  FileUtils.touch "sandbox/src/#{file}"
+end
+
+def touch_test(file)
+  FileUtils.touch "sandbox/test/#{file}"
+end
+
+def create_src_with_known_content(file)
+  File.open("sandbox/src/#{file}", "w") {|f| f.write("the original #{file}")}
+end
+
+def create_test_with_known_content(file)
+  File.open("sandbox/test/#{file}", "w") {|f| f.write("the original #{file}")}
+end
+
+def expect_src_content_didnt_change(file)
+  expect(File.read("sandbox/src/#{file}")).to eq("the original #{file}")
+end
+
+def expect_test_content_didnt_change(file)
+  expect(File.read("sandbox/test/#{file}")).to eq("the original #{file}")
+end
+
+def expect_src_file_to_exist(file)
+  expect(File.exist?("sandbox/src/#{file}")).to be true
+end
+
+def expect_test_file_to_exist(file)
+  expect(File.exist?("sandbox/test/#{file}")).to be true
+end
+
+describe "UnityModuleGenerator" do
+
+  before do
+    # clean sandbox and setup our "project" folders
+    FileUtils.rm_rf "sandbox"
+    FileUtils.mkdir_p "sandbox"
+    FileUtils.mkdir_p "sandbox/src"
+    FileUtils.mkdir_p "sandbox/test"
+
+    @options = {
+      :path_src => "sandbox/src",
+      :path_tst => "sandbox/test",
+    }
+  end
+
+  context "with src pattern" do
+    before do
+      @options[:pattern] = "src"
+    end
+
+    it "fails when all files already exist" do
+      # create an existing triad of files
+      touch_src "meh.c"
+      touch_src "meh.h"
+      touch_test "Testmeh.c"
+      expect {
+        UnityModuleGenerator.new(@options).generate("meh")
+      }.to raise_error("ERROR: File meh already exists. Exiting.")
+    end
+
+    it "creates the test file if the source and header files exist" do
+      # Create the existing files.
+      touch_src "meh.c"
+      touch_src "meh.h"
+
+      UnityModuleGenerator.new(@options).generate("meh")
+
+      expect_test_file_to_exist "Testmeh.c"
+    end
+
+    it "does not alter existing files" do
+      # Create some files with known content.
+      create_src_with_known_content "meh.c"
+      create_src_with_known_content "meh.h"
+
+      UnityModuleGenerator.new(@options).generate("meh")
+
+      expect_src_content_didnt_change "meh.c"
+      expect_src_content_didnt_change "meh.c"
+    end
+
+    it "does not alter existing test files" do
+      # Create some files with known content.
+      create_test_with_known_content "Testmeh.c"
+
+      UnityModuleGenerator.new(@options).generate("meh")
+
+      expect_test_content_didnt_change "Testmeh.c"
+    end
+
+  end
+
+  context "with mch pattern" do
+    before do
+      @options[:pattern] = "mch"
+    end
+
+    it "fails when all files exist" do
+        touch_src "meh_model.c"
+        touch_src "meh_conductor.c"
+        touch_src "meh_hardware.c"
+        touch_src "meh_model.h"
+        touch_src "meh_conductor.h"
+        touch_src "meh_hardware.h"
+        touch_test "Testmeh_model.c"
+        touch_test "Testmeh_conductor.c"
+        touch_test "Testmeh_hardware.c"
+        expect {
+          UnityModuleGenerator.new(@options).generate("meh")
+        }.to raise_error("ERROR: File meh_model already exists. Exiting.")
+    end
+
+    it "creates files that don't exist" do
+      touch_src "meh_model.c"
+      touch_src "meh_conductor.c"
+      touch_src "meh_hardware.c"
+      touch_src "meh_model.h"
+      touch_src "meh_conductor.h"
+
+      UnityModuleGenerator.new(@options).generate("meh")
+
+      expect_src_file_to_exist "meh_hardware.h"
+      expect_test_file_to_exist "Testmeh_model.c"
+      expect_test_file_to_exist "Testmeh_conductor.c"
+      expect_test_file_to_exist "Testmeh_hardware.c"
+    end
+
+    it "does not alter existing source files" do
+      create_src_with_known_content "meh_model.c"
+      create_src_with_known_content "meh_model.c"
+      create_src_with_known_content "meh_model.c"
+      create_src_with_known_content "meh_model.h"
+      create_src_with_known_content "meh_model.c"
+
+      UnityModuleGenerator.new(@options).generate("meh")
+
+      expect_src_content_didnt_change "meh_model.c"
+      expect_src_content_didnt_change "meh_model.c"
+      expect_src_content_didnt_change "meh_model.c"
+      expect_src_content_didnt_change "meh_model.c"
+    end
+
+    it "does not alter existing test files" do
+      create_test_with_known_content "Testmeh_model.c"
+
+      UnityModuleGenerator.new(@options).generate("meh")
+
+      expect_test_content_didnt_change "Testmeh_model.c"
+    end
+
+  end
+end
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/ansi.yml b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/ansi.yml
new file mode 100644
index 000000000..81af4c7f5
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/ansi.yml
@@ -0,0 +1,44 @@
+---
+colour: true
+:unity:
+  :plugins: []
+:skip_tests:
+- :parameterized
+:tools:
+  :test_compiler:
+    :name: compiler
+    :executable: gcc
+    :arguments:
+    - "-c"
+    - "-m64"
+    - "-Wall"
+    - "-Wno-address"
+    - "-ansi"
+    - '-I"$": COLLECTION_PATHS_TEST_TOOLCHAIN_INCLUDE'
+    - '-I"$": COLLECTION_PATHS_TEST_SUPPORT_SOURCE_INCLUDE_VENDOR'
+    - "-D$: COLLECTION_DEFINES_TEST_AND_VENDOR"
+    - "${1}"
+    - "-o ${2}"
+  :test_linker:
+    :name: linker
+    :executable: gcc
+    :arguments:
+    - "${1}"
+    - "-lm"
+    - "-m64"
+    - "-o ${2}"
+:extension:
+  :object: ".o"
+  :executable: ".exe"
+:paths:
+  :test:
+    - src/
+    - "../src/"
+    - testdata/
+    - tests/
+:defines:
+  :test:
+  - UNITY_INCLUDE_DOUBLE
+  - UNITY_SUPPORT_TEST_CASES
+  - UNITY_EXCLUDE_TESTING_NEW_COMMENTS
+  - UNITY_SUPPORT_64
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/clang_file.yml b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/clang_file.yml
new file mode 100644
index 000000000..964e8145c
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/clang_file.yml
@@ -0,0 +1,72 @@
+---
+colour: true
+:unity:
+  :plugins: []
+:tools:
+  :test_compiler:
+    :name: compiler
+    :executable: clang
+    :arguments:
+    - "-c"
+    - "-Wall"
+    - "-Wextra"
+    - "-Werror"
+    - "-Wcast-qual"
+    - "-Wconversion"
+    - "-Wdisabled-optimization"
+    - "-Wformat=2"
+    - "-Winit-self"
+    - "-Winline"
+    - "-Winvalid-pch"
+    - "-Wmissing-include-dirs"
+    - "-Wnonnull"
+    - "-Wpacked"
+    - "-Wpointer-arith"
+    - "-Wswitch-default"
+    - "-Wstrict-aliasing"
+    - "-Wstrict-overflow=5"
+    - "-Wuninitialized"
+    - "-Wunused"
+    - "-Wreturn-type"
+    - "-Wshadow"
+    - "-Wundef"
+    - "-Wwrite-strings"
+    - "-Wno-nested-externs"
+    - "-Wno-unused-parameter"
+    - "-Wno-variadic-macros"
+    - "-Wbad-function-cast"
+    - "-fms-extensions"
+    - "-fno-omit-frame-pointer"
+    - "-ffloat-store"
+    - "-fno-common"
+    - "-fstrict-aliasing"
+    - "-std=gnu99"
+    - "-pedantic"
+    - "-O0"
+    - '-I"$": COLLECTION_PATHS_TEST_TOOLCHAIN_INCLUDE'
+    - '-I"$": COLLECTION_PATHS_TEST_SUPPORT_SOURCE_INCLUDE_VENDOR'
+    - "-D$: COLLECTION_DEFINES_TEST_AND_VENDOR"
+    - "${1}"
+    - "-o ${2}"
+  :test_linker:
+    :name: linker
+    :executable: clang
+    :arguments:
+    - "${1}"
+    - "-lm"
+    - "-m64"
+    - "-o ${2}"
+:extension:
+  :object: ".o"
+  :executable: ".exe"
+:paths:
+  :test:
+    - src/
+    - "../src/"
+    - testdata/
+    - tests/
+:defines:
+  :test:
+  - UNITY_INCLUDE_DOUBLE
+  - UNITY_SUPPORT_64
+  - UNITY_OUTPUT_RESULTS_FILE
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/clang_strict.yml b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/clang_strict.yml
new file mode 100644
index 000000000..04d568064
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/clang_strict.yml
@@ -0,0 +1,71 @@
+---
+colour: true
+:unity:
+  :plugins: []
+:tools:
+  :test_compiler:
+    :name: compiler
+    :executable: clang
+    :arguments:
+    - "-c"
+    - "-Wall"
+    - "-Wextra"
+    - "-Werror"
+    - "-Wcast-qual"
+    - "-Wconversion"
+    - "-Wdisabled-optimization"
+    - "-Wformat=2"
+    - "-Winit-self"
+    - "-Winline"
+    - "-Winvalid-pch"
+    - "-Wmissing-include-dirs"
+    - "-Wnonnull"
+    - "-Wpacked"
+    - "-Wpointer-arith"
+    - "-Wswitch-default"
+    - "-Wstrict-aliasing"
+    - "-Wstrict-overflow=5"
+    - "-Wuninitialized"
+    - "-Wunused"
+    - "-Wreturn-type"
+    - "-Wshadow"
+    - "-Wundef"
+    - "-Wwrite-strings"
+    - "-Wno-nested-externs"
+    - "-Wno-unused-parameter"
+    - "-Wno-variadic-macros"
+    - "-Wbad-function-cast"
+    - "-fms-extensions"
+    - "-fno-omit-frame-pointer"
+    - "-fno-common"
+    - "-fstrict-aliasing"
+    - "-std=gnu99"
+    - "-pedantic"
+    - "-O0"
+    - '-I"$": COLLECTION_PATHS_TEST_TOOLCHAIN_INCLUDE'
+    - '-I"$": COLLECTION_PATHS_TEST_SUPPORT_SOURCE_INCLUDE_VENDOR'
+    - "-D$: COLLECTION_DEFINES_TEST_AND_VENDOR"
+    - "${1}"
+    - "-o ${2}"
+  :test_linker:
+    :name: linker
+    :executable: clang
+    :arguments:
+    - "${1}"
+    - "-lm"
+    - "-m64"
+    - "-o ${2}"
+:extension:
+  :object: ".o"
+  :executable: ".exe"
+:paths:
+  :test:
+    - src/
+    - "../src/"
+    - testdata/
+    - tests/
+:defines:
+  :test:
+  - UNITY_INCLUDE_DOUBLE
+  - UNITY_SUPPORT_TEST_CASES
+  - UNITY_SUPPORT_64
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/gcc_32.yml b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/gcc_32.yml
new file mode 100644
index 000000000..ba388cf72
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/gcc_32.yml
@@ -0,0 +1,45 @@
+---
+colour: true
+:unity:
+  :plugins: []
+:tools:
+  :test_compiler:
+    :name: compiler
+    :executable: gcc
+    :arguments:
+    - "-c"
+    - "-m32"
+    - "-Wall"
+    - "-Wno-address"
+    - "-std=c99"
+    - "-pedantic"
+    - '-I"$": COLLECTION_PATHS_TEST_TOOLCHAIN_INCLUDE'
+    - '-I"$": COLLECTION_PATHS_TEST_SUPPORT_SOURCE_INCLUDE_VENDOR'
+    - "-D$: COLLECTION_DEFINES_TEST_AND_VENDOR"
+    - "${1}"
+    - "-o ${2}"
+  :test_linker:
+    :name: linker
+    :executable: gcc
+    :arguments:
+    - "${1}"
+    - "-lm"
+    - "-m32"
+    - "-o ${2}"
+:extension:
+  :object: ".o"
+  :executable: ".exe"
+:paths:
+  :test:
+    - src/
+    - "../src/"
+    - testdata/
+    - tests/
+:defines:
+  :test:
+  - UNITY_EXCLUDE_STDINT_H
+  - UNITY_EXCLUDE_LIMITS_H
+  - UNITY_INCLUDE_DOUBLE
+  - UNITY_SUPPORT_TEST_CASES
+  - UNITY_INT_WIDTH=32
+  - UNITY_LONG_WIDTH=32
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/gcc_64.yml b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/gcc_64.yml
new file mode 100644
index 000000000..ed9eb4a80
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/gcc_64.yml
@@ -0,0 +1,46 @@
+---
+colour: true
+:unity:
+  :plugins: []
+:tools:
+  :test_compiler:
+    :name: compiler
+    :executable: gcc
+    :arguments:
+    - "-c"
+    - "-m64"
+    - "-Wall"
+    - "-Wno-address"
+    - "-std=c99"
+    - "-pedantic"
+    - '-I"$": COLLECTION_PATHS_TEST_TOOLCHAIN_INCLUDE'
+    - '-I"$": COLLECTION_PATHS_TEST_SUPPORT_SOURCE_INCLUDE_VENDOR'
+    - "-D$: COLLECTION_DEFINES_TEST_AND_VENDOR"
+    - "${1}"
+    - "-o ${2}"
+  :test_linker:
+    :name: linker
+    :executable: gcc
+    :arguments:
+    - "${1}"
+    - "-lm"
+    - "-m64"
+    - "-o ${2}"
+:extension:
+  :object: ".o"
+  :executable: ".exe"
+:paths:
+  :test:
+    - src/
+    - "../src/"
+    - testdata/
+    - tests/
+:defines:
+  :test:
+  - UNITY_EXCLUDE_STDINT_H
+  - UNITY_EXCLUDE_LIMITS_H
+  - UNITY_INCLUDE_DOUBLE
+  - UNITY_SUPPORT_TEST_CASES
+  - UNITY_SUPPORT_64
+  - UNITY_INT_WIDTH=32
+  - UNITY_LONG_WIDTH=64
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/gcc_auto_limits.yml b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/gcc_auto_limits.yml
new file mode 100644
index 000000000..9cfda8d4a
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/gcc_auto_limits.yml
@@ -0,0 +1,43 @@
+---
+colour: true
+:unity:
+  :plugins: []
+:tools:
+  :test_compiler:
+    :name: compiler
+    :executable: gcc
+    :arguments:
+    - "-c"
+    - "-m64"
+    - "-Wall"
+    - "-Wno-address"
+    - "-std=c99"
+    - "-pedantic"
+    - '-I"$": COLLECTION_PATHS_TEST_TOOLCHAIN_INCLUDE'
+    - '-I"$": COLLECTION_PATHS_TEST_SUPPORT_SOURCE_INCLUDE_VENDOR'
+    - "-D$: COLLECTION_DEFINES_TEST_AND_VENDOR"
+    - "${1}"
+    - "-o ${2}"
+  :test_linker:
+    :name: linker
+    :executable: gcc
+    :arguments:
+    - "${1}"
+    - "-lm"
+    - "-m64"
+    - "-o ${2}"
+:extension:
+  :object: ".o"
+  :executable: ".exe"
+:paths:
+  :test:
+    - src/
+    - "../src/"
+    - testdata/
+    - tests/
+:defines:
+  :test:
+  - UNITY_EXCLUDE_STDINT_H
+  - UNITY_INCLUDE_DOUBLE
+  - UNITY_SUPPORT_TEST_CASES
+  - UNITY_SUPPORT_64
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/gcc_auto_stdint.yml b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/gcc_auto_stdint.yml
new file mode 100644
index 000000000..66602ef71
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/gcc_auto_stdint.yml
@@ -0,0 +1,55 @@
+---
+colour: true
+:unity:
+  :plugins: []
+:tools:
+  :test_compiler:
+    :name: compiler
+    :executable: gcc
+    :arguments:
+    - "-c"
+    - "-m64"
+    - "-Wall"
+    - "-Wno-address"
+    - "-std=c99"
+    - "-pedantic"
+    - "-Wextra"
+    - "-Werror"
+    - "-Wpointer-arith"
+    - "-Wcast-align"
+    - "-Wwrite-strings"
+    - "-Wswitch-default"
+    - "-Wunreachable-code"
+    - "-Winit-self"
+    - "-Wmissing-field-initializers"
+    - "-Wno-unknown-pragmas"
+    - "-Wstrict-prototypes"
+    - "-Wundef"
+    - "-Wold-style-definition"
+    - '-I"$": COLLECTION_PATHS_TEST_TOOLCHAIN_INCLUDE'
+    - '-I"$": COLLECTION_PATHS_TEST_SUPPORT_SOURCE_INCLUDE_VENDOR'
+    - "-D$: COLLECTION_DEFINES_TEST_AND_VENDOR"
+    - "${1}"
+    - "-o ${2}"
+  :test_linker:
+    :name: linker
+    :executable: gcc
+    :arguments:
+    - "${1}"
+    - "-lm"
+    - "-m64"
+    - "-o ${2}"
+:extension:
+  :object: ".o"
+  :executable: ".exe"
+:paths:
+  :test:
+    - src/
+    - "../src/"
+    - testdata/
+    - tests/
+:defines:
+  :test:
+  - UNITY_INCLUDE_DOUBLE
+  - UNITY_SUPPORT_TEST_CASES
+  - UNITY_SUPPORT_64
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/gcc_manual_math.yml b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/gcc_manual_math.yml
new file mode 100644
index 000000000..b1b5b82e5
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/gcc_manual_math.yml
@@ -0,0 +1,43 @@
+---
+colour: true
+:unity:
+  :plugins: []
+:tools:
+  :test_compiler:
+    :name: compiler
+    :executable: gcc
+    :arguments:
+    - "-c"
+    - "-m64"
+    - "-Wall"
+    - "-Wno-address"
+    - "-std=c99"
+    - "-pedantic"
+    - '-I"$": COLLECTION_PATHS_TEST_TOOLCHAIN_INCLUDE'
+    - '-I"$": COLLECTION_PATHS_TEST_SUPPORT_SOURCE_INCLUDE_VENDOR'
+    - "-D$: COLLECTION_DEFINES_TEST_AND_VENDOR"
+    - "${1}"
+    - "-o ${2}"
+  :test_linker:
+    :name: linker
+    :executable: gcc
+    :arguments:
+    - "${1}"
+    - "-lm"
+    - "-m64"
+    - "-o ${2}"
+:extension:
+  :object: ".o"
+  :executable: ".exe"
+:paths:
+  :test:
+    - src/
+    - "../src/"
+    - testdata/
+    - tests/
+:defines:
+  :test:
+  - UNITY_EXCLUDE_MATH_H
+  - UNITY_INCLUDE_DOUBLE
+  - UNITY_SUPPORT_TEST_CASES
+  - UNITY_SUPPORT_64
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/hitech_picc18.yml b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/hitech_picc18.yml
new file mode 100644
index 000000000..b984edbd8
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/hitech_picc18.yml
@@ -0,0 +1,91 @@
+---
+:cmock:
+  :plugins: []
+  :includes:
+  - Types.h
+  :suite_teardown: |
+    if (num_failures)
+      _FAILED_TEST();
+    else
+      _PASSED_TESTS();
+    return 0;
+colour: true
+:tools:
+  :test_compiler:
+    :name: compiler
+    :executable: cd build && picc18
+    :arguments:
+    - "--chip=18F87J10"
+    - "--ide=hitide"
+    - "--q"
+    - "--asmlist"
+    - "--codeoffset=0"
+    - "--emi=wordwrite"
+    - "--warn=0"
+    - "--errors=10"
+    - "--char=unsigned"
+    - "-Bl"
+    - "-G"
+    - "--cp=16"
+    - "--double=24"
+    - "-N255"
+    - "--opt=none"
+    - "-c"
+    - "-M"
+    - '-I"$": COLLECTION_PATHS_TEST_TOOLCHAIN_INCLUDE'
+    - '-I"$": COLLECTION_PATHS_TEST_SUPPORT_SOURCE_INCLUDE_VENDOR'
+    - "-D$: COLLECTION_DEFINES_TEST_AND_VENDOR"
+    - "${1}"
+    - " ${2}"
+  :test_linker:
+    :name: linker
+    :executable: cd build && picc18
+    :arguments:
+    - "${1}"
+    - "--chip=18F87J10"
+    - "--ide=hitide"
+    - "--cp=24"
+    - "--double=24"
+    - "-Lw"
+    - "--summary=mem,file"
+    - "--summary=+psect"
+    - "--summary=+hex"
+    - "--output=+intel"
+    - "--output=+mcof"
+    - "--runtime=+init"
+    - "--runtime=+clear"
+    - "--runtime=+clib"
+    - "--runtime=+keep"
+    - "-G"
+    - "-MIWasTheLastToBuild.map"
+    - "--warn=0"
+    - "-Bl"
+    - "-O ${2}"
+  :test_fixture:
+    :name: simulator
+    :executable: 'java -client -jar '
+    :arguments:
+    - - C:\Program Files\HI-TECH Software\HI-TIDE\3.15\lib\
+      - simpic18.jar
+    - 18F87J10
+    - "${1}"
+:extension:
+  :object: ".obj"
+  :executable: ".hex"
+:paths:
+  :test:
+    - c:/Projects/NexGen/Prototypes/CMockTest/src/
+    - c:/Projects/NexGen/Prototypes/CMockTest/mocks/
+    - c:/CMock/src/
+    - c:/CMock/examples/src/
+    - c:/CMock/vendor/unity/src/
+    - c:/CMock/vendor/unity/examples/helper/
+    - tests\
+:defines:
+  :test:
+  - UNITY_INT_WIDTH=16
+  - UNITY_POINTER_WIDTH=16
+  - CMOCK_MEM_STATIC
+  - CMOCK_MEM_SIZE=3000
+  - UNITY_SUPPORT_TEST_CASES
+  - _PICC18
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/iar_arm_v4.yml b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/iar_arm_v4.yml
new file mode 100644
index 000000000..9a1a2761e
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/iar_arm_v4.yml
@@ -0,0 +1,98 @@
+---
+tools_root: C:\Program Files\IAR Systems\Embedded Workbench 4.0 Kickstart\
+colour: true
+:unity:
+  :plugins: []
+:tools:
+  :test_compiler:
+    :name: compiler
+    :executable:
+    - C:\Program Files\IAR Systems\Embedded Workbench 4.0 Kickstart\
+    - arm\bin\iccarm.exe
+    :arguments:
+    - "--dlib_config"
+    - - C:\Program Files\IAR Systems\Embedded Workbench 4.0 Kickstart\
+      - arm\lib\dl4tptinl8n.h
+    - "-z3"
+    - "--no_cse"
+    - "--no_unroll"
+    - "--no_inline"
+    - "--no_code_motion"
+    - "--no_tbaa"
+    - "--no_clustering"
+    - "--no_scheduling"
+    - "--debug"
+    - "--cpu_mode thumb"
+    - "--endian little"
+    - "--cpu ARM7TDMI"
+    - "--stack_align 4"
+    - "--interwork"
+    - "-e"
+    - "--silent"
+    - "--warnings_are_errors"
+    - "--fpu None"
+    - "--diag_suppress Pa050"
+    - '-I"$": COLLECTION_PATHS_TEST_TOOLCHAIN_INCLUDE'
+    - '-I"$": COLLECTION_PATHS_TEST_SUPPORT_SOURCE_INCLUDE_VENDOR'
+    - "-D$: COLLECTION_DEFINES_TEST_AND_VENDOR"
+    - "${1}"
+    - "-o ${2}"
+  :test_linker:
+    :name: linker
+    :executable:
+    - C:\Program Files\IAR Systems\Embedded Workbench 4.0 Kickstart\
+    - common\bin\xlink.exe
+    :arguments:
+    - "${1}"
+    - "-rt"
+    - - C:\Program Files\IAR Systems\Embedded Workbench 4.0 Kickstart\
+      - arm\lib\dl4tptinl8n.r79
+    - "-D_L_EXTMEM_START=0"
+    - "-D_L_EXTMEM_SIZE=0"
+    - "-D_L_HEAP_SIZE=120"
+    - "-D_L_STACK_SIZE=32"
+    - "-e_small_write=_formatted_write"
+    - "-s"
+    - __program_start
+    - "-f"
+    - - C:\Program Files\IAR Systems\Embedded Workbench 4.0 Kickstart\
+      - "\\arm\\config\\lnkarm.xcl"
+    - "-o ${2}"
+  :test_fixture:
+    :name: simulator
+    :executable:
+    - C:\Program Files\IAR Systems\Embedded Workbench 4.0 Kickstart\
+    - common\bin\CSpyBat.exe
+    :arguments:
+    - "--silent"
+    - - C:\Program Files\IAR Systems\Embedded Workbench 4.0 Kickstart\
+      - arm\bin\armproc.dll
+    - - C:\Program Files\IAR Systems\Embedded Workbench 4.0 Kickstart\
+      - arm\bin\armsim.dll
+    - "${1}"
+    - "--plugin"
+    - - C:\Program Files\IAR Systems\Embedded Workbench 4.0 Kickstart\
+      - arm\bin\armbat.dll
+    - "--backend"
+    - "-B"
+    - "-p"
+    - - C:\Program Files\IAR Systems\Embedded Workbench 4.0 Kickstart\
+      - arm\config\ioat91sam7X256.ddf
+    - "-d"
+    - sim
+:extension:
+  :object: ".r79"
+  :executable: ".d79"
+:paths:
+  :test:
+    - - C:\Program Files\IAR Systems\Embedded Workbench 4.0 Kickstart\
+      - arm\inc\
+    - src\
+    - "..\\src\\"
+    - testdata/
+    - tests\
+    - vendor\unity\src\
+:defines:
+  :test:
+  - UNITY_SUPPORT_64
+  - UNITY_SUPPORT_TEST_CASES
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/iar_arm_v5.yml b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/iar_arm_v5.yml
new file mode 100644
index 000000000..d4b115f14
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/iar_arm_v5.yml
@@ -0,0 +1,92 @@
+---
+tools_root: C:\Program Files\IAR Systems\Embedded Workbench 5.3\
+colour: true
+:unity:
+  :plugins: []
+:tools:
+  :test_compiler:
+    :name: compiler
+    :executable:
+    - C:\Program Files\IAR Systems\Embedded Workbench 5.3\
+    - arm\bin\iccarm.exe
+    :arguments:
+    - "--dlib_config"
+    - - C:\Program Files\IAR Systems\Embedded Workbench 5.3\
+      - arm\inc\DLib_Config_Normal.h
+    - "--no_cse"
+    - "--no_unroll"
+    - "--no_inline"
+    - "--no_code_motion"
+    - "--no_tbaa"
+    - "--no_clustering"
+    - "--no_scheduling"
+    - "--debug"
+    - "--cpu_mode thumb"
+    - "--endian=little"
+    - "--cpu=ARM7TDMI"
+    - "--interwork"
+    - "--warnings_are_errors"
+    - "--fpu=None"
+    - "--diag_suppress=Pa050"
+    - "--diag_suppress=Pe111"
+    - "-e"
+    - "-On"
+    - '-I"$": COLLECTION_PATHS_TEST_TOOLCHAIN_INCLUDE'
+    - '-I"$": COLLECTION_PATHS_TEST_SUPPORT_SOURCE_INCLUDE_VENDOR'
+    - "-D$: COLLECTION_DEFINES_TEST_AND_VENDOR"
+    - "${1}"
+    - "-o ${2}"
+  :test_linker:
+    :name: linker
+    :executable:
+    - C:\Program Files\IAR Systems\Embedded Workbench 5.3\
+    - arm\bin\ilinkarm.exe
+    :arguments:
+    - "${1}"
+    - "--redirect _Printf=_PrintfLarge"
+    - "--redirect _Scanf=_ScanfSmall"
+    - "--semihosting"
+    - "--entry __iar_program_start"
+    - "--config"
+    - - C:\Program Files\IAR Systems\Embedded Workbench 5.3\
+      - arm\config\generic.icf
+    - "-o ${2}"
+  :test_fixture:
+    :name: simulator
+    :executable:
+    - C:\Program Files\IAR Systems\Embedded Workbench 5.3\
+    - common\bin\CSpyBat.exe
+    :arguments:
+    - "--silent"
+    - - C:\Program Files\IAR Systems\Embedded Workbench 5.3\
+      - arm\bin\armproc.dll
+    - - C:\Program Files\IAR Systems\Embedded Workbench 5.3\
+      - arm\bin\armsim.dll
+    - "${1}"
+    - "--plugin"
+    - - C:\Program Files\IAR Systems\Embedded Workbench 5.3\
+      - arm\bin\armbat.dll
+    - "--backend"
+    - "-B"
+    - "-p"
+    - - C:\Program Files\IAR Systems\Embedded Workbench 5.3\
+      - arm\config\debugger\atmel\ioat91sam7X256.ddf
+    - "-d"
+    - sim
+:extension:
+  :object: ".r79"
+  :executable: ".out"
+:paths:
+  :test:
+    - - C:\Program Files\IAR Systems\Embedded Workbench 5.3\
+      - arm\inc\
+    - src\
+    - "..\\src\\"
+    - testdata/
+    - tests\
+    - vendor\unity\src\
+    - iar\iar_v5\incIAR\
+:defines:
+  :test:
+  - UNITY_SUPPORT_64
+  - UNITY_SUPPORT_TEST_CASES
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/iar_arm_v5_3.yml b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/iar_arm_v5_3.yml
new file mode 100644
index 000000000..d4b115f14
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/iar_arm_v5_3.yml
@@ -0,0 +1,92 @@
+---
+tools_root: C:\Program Files\IAR Systems\Embedded Workbench 5.3\
+colour: true
+:unity:
+  :plugins: []
+:tools:
+  :test_compiler:
+    :name: compiler
+    :executable:
+    - C:\Program Files\IAR Systems\Embedded Workbench 5.3\
+    - arm\bin\iccarm.exe
+    :arguments:
+    - "--dlib_config"
+    - - C:\Program Files\IAR Systems\Embedded Workbench 5.3\
+      - arm\inc\DLib_Config_Normal.h
+    - "--no_cse"
+    - "--no_unroll"
+    - "--no_inline"
+    - "--no_code_motion"
+    - "--no_tbaa"
+    - "--no_clustering"
+    - "--no_scheduling"
+    - "--debug"
+    - "--cpu_mode thumb"
+    - "--endian=little"
+    - "--cpu=ARM7TDMI"
+    - "--interwork"
+    - "--warnings_are_errors"
+    - "--fpu=None"
+    - "--diag_suppress=Pa050"
+    - "--diag_suppress=Pe111"
+    - "-e"
+    - "-On"
+    - '-I"$": COLLECTION_PATHS_TEST_TOOLCHAIN_INCLUDE'
+    - '-I"$": COLLECTION_PATHS_TEST_SUPPORT_SOURCE_INCLUDE_VENDOR'
+    - "-D$: COLLECTION_DEFINES_TEST_AND_VENDOR"
+    - "${1}"
+    - "-o ${2}"
+  :test_linker:
+    :name: linker
+    :executable:
+    - C:\Program Files\IAR Systems\Embedded Workbench 5.3\
+    - arm\bin\ilinkarm.exe
+    :arguments:
+    - "${1}"
+    - "--redirect _Printf=_PrintfLarge"
+    - "--redirect _Scanf=_ScanfSmall"
+    - "--semihosting"
+    - "--entry __iar_program_start"
+    - "--config"
+    - - C:\Program Files\IAR Systems\Embedded Workbench 5.3\
+      - arm\config\generic.icf
+    - "-o ${2}"
+  :test_fixture:
+    :name: simulator
+    :executable:
+    - C:\Program Files\IAR Systems\Embedded Workbench 5.3\
+    - common\bin\CSpyBat.exe
+    :arguments:
+    - "--silent"
+    - - C:\Program Files\IAR Systems\Embedded Workbench 5.3\
+      - arm\bin\armproc.dll
+    - - C:\Program Files\IAR Systems\Embedded Workbench 5.3\
+      - arm\bin\armsim.dll
+    - "${1}"
+    - "--plugin"
+    - - C:\Program Files\IAR Systems\Embedded Workbench 5.3\
+      - arm\bin\armbat.dll
+    - "--backend"
+    - "-B"
+    - "-p"
+    - - C:\Program Files\IAR Systems\Embedded Workbench 5.3\
+      - arm\config\debugger\atmel\ioat91sam7X256.ddf
+    - "-d"
+    - sim
+:extension:
+  :object: ".r79"
+  :executable: ".out"
+:paths:
+  :test:
+    - - C:\Program Files\IAR Systems\Embedded Workbench 5.3\
+      - arm\inc\
+    - src\
+    - "..\\src\\"
+    - testdata/
+    - tests\
+    - vendor\unity\src\
+    - iar\iar_v5\incIAR\
+:defines:
+  :test:
+  - UNITY_SUPPORT_64
+  - UNITY_SUPPORT_TEST_CASES
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/iar_armcortex_LM3S9B92_v5_4.yml b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/iar_armcortex_LM3S9B92_v5_4.yml
new file mode 100644
index 000000000..1703fe27c
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/iar_armcortex_LM3S9B92_v5_4.yml
@@ -0,0 +1,90 @@
+---
+tools_root: C:\Program Files (x86)\IAR Systems\Embedded Workbench 5.4 Kickstart\
+colour: true
+:unity:
+  :plugins: []
+:tools:
+  :test_compiler:
+    :name: compiler
+    :executable:
+    - C:\Program Files (x86)\IAR Systems\Embedded Workbench 5.4 Kickstart\
+    - arm\bin\iccarm.exe
+    :arguments:
+    - "--diag_suppress=Pa050"
+    - "--debug"
+    - "--endian=little"
+    - "--cpu=Cortex-M3"
+    - "--no_path_in_file_macros"
+    - "-e"
+    - "--fpu=None"
+    - "--dlib_config"
+    - - C:\Program Files (x86)\IAR Systems\Embedded Workbench 5.4 Kickstart\
+      - arm\inc\DLib_Config_Normal.h
+    - "--interwork"
+    - "--warnings_are_errors"
+    - "-Oh"
+    - '-I"$": COLLECTION_PATHS_TEST_TOOLCHAIN_INCLUDE'
+    - '-I"$": COLLECTION_PATHS_TEST_SUPPORT_SOURCE_INCLUDE_VENDOR'
+    - "-D$: COLLECTION_DEFINES_TEST_AND_VENDOR"
+    - "${1}"
+    - "-o ${2}"
+  :test_linker:
+    :name: linker
+    :executable:
+    - C:\Program Files (x86)\IAR Systems\Embedded Workbench 5.4 Kickstart\
+    - arm\bin\ilinkarm.exe
+    :arguments:
+    - "${1}"
+    - "--redirect _Printf=_PrintfLarge"
+    - "--redirect _Scanf=_ScanfSmall"
+    - "--semihosting"
+    - "--entry __iar_program_start"
+    - "--config"
+    - - C:\Program Files (x86)\IAR Systems\Embedded Workbench 5.4 Kickstart\
+      - arm\config\generic.icf
+    - "-o ${2}"
+  :test_fixture:
+    :name: simulator
+    :executable:
+    - C:\Program Files (x86)\IAR Systems\Embedded Workbench 5.4 Kickstart\
+    - common\bin\CSpyBat.exe
+    :arguments:
+    - - C:\Program Files (x86)\IAR Systems\Embedded Workbench 5.4 Kickstart\
+      - arm\bin\armproc.dll
+    - - C:\Program Files (x86)\IAR Systems\Embedded Workbench 5.4 Kickstart\
+      - arm\bin\armsim2.dll
+    - "${1}"
+    - "--plugin"
+    - - C:\Program Files (x86)\IAR Systems\Embedded Workbench 5.4 Kickstart\
+      - arm\bin\armbat.dll
+    - "--backend"
+    - "-B"
+    - "--endian=little"
+    - "--cpu=Cortex-M3"
+    - "--fpu=None"
+    - "-p"
+    - - C:\Program Files (x86)\IAR Systems\Embedded Workbench 5.4 Kickstart\
+      - arm\config\debugger\TexasInstruments\iolm3sxxxx.ddf
+    - "--semihosting"
+    - "--device=LM3SxBxx"
+:extension:
+  :object: ".r79"
+  :executable: ".out"
+:paths:
+  :test:
+    - - C:\Program Files (x86)\IAR Systems\Embedded Workbench 5.4 Kickstart\
+      - arm\inc\
+    - src\
+    - "..\\src\\"
+    - testdata/
+    - tests\
+    - vendor\unity\src\
+    - iar\iar_v5\incIAR\
+:defines:
+  :test:
+  - ewarm
+  - PART_LM3S9B92
+  - TARGET_IS_TEMPEST_RB1
+  - USE_ROM_DRIVERS
+  - UART_BUFFERED
+  - UNITY_SUPPORT_64
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/iar_cortexm3_v5.yml b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/iar_cortexm3_v5.yml
new file mode 100644
index 000000000..8b0978ffa
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/iar_cortexm3_v5.yml
@@ -0,0 +1,94 @@
+---
+tools_root: C:\Program Files\IAR Systems\Embedded Workbench 5.4\
+colour: true
+:unity:
+  :plugins: []
+:tools:
+  :test_compiler:
+    :name: compiler
+    :executable:
+    - C:\Program Files\IAR Systems\Embedded Workbench 5.4\
+    - arm\bin\iccarm.exe
+    :arguments:
+    - "--dlib_config"
+    - - C:\Program Files\IAR Systems\Embedded Workbench 5.4\
+      - arm\inc\DLib_Config_Normal.h
+    - "--no_cse"
+    - "--no_unroll"
+    - "--no_inline"
+    - "--no_code_motion"
+    - "--no_tbaa"
+    - "--no_clustering"
+    - "--no_scheduling"
+    - "--debug"
+    - "--cpu_mode thumb"
+    - "--endian=little"
+    - "--cpu=Cortex-M3"
+    - "--interwork"
+    - "--warnings_are_errors"
+    - "--fpu=None"
+    - "--diag_suppress=Pa050"
+    - "--diag_suppress=Pe111"
+    - "-e"
+    - "-On"
+    - '-I"$": COLLECTION_PATHS_TEST_TOOLCHAIN_INCLUDE'
+    - '-I"$": COLLECTION_PATHS_TEST_SUPPORT_SOURCE_INCLUDE_VENDOR'
+    - "-D$: COLLECTION_DEFINES_TEST_AND_VENDOR"
+    - "${1}"
+    - "-o ${2}"
+  :test_linker:
+    :name: linker
+    :executable:
+    - C:\Program Files\IAR Systems\Embedded Workbench 5.4\
+    - arm\bin\ilinkarm.exe
+    :arguments:
+    - "${1}"
+    - "--redirect _Printf=_PrintfLarge"
+    - "--redirect _Scanf=_ScanfSmall"
+    - "--semihosting"
+    - "--entry __iar_program_start"
+    - "--config"
+    - - C:\Program Files\IAR Systems\Embedded Workbench 5.4\
+      - arm\config\generic_cortex.icf
+    - "-o ${2}"
+  :test_fixture:
+    :name: simulator
+    :executable:
+    - C:\Program Files\IAR Systems\Embedded Workbench 5.4\
+    - common\bin\CSpyBat.exe
+    :arguments:
+    - "--silent"
+    - - C:\Program Files\IAR Systems\Embedded Workbench 5.4\
+      - arm\bin\armproc.dll
+    - - C:\Program Files\IAR Systems\Embedded Workbench 5.4\
+      - arm\bin\armsim.dll
+    - "${1}"
+    - "--plugin"
+    - - C:\Program Files\IAR Systems\Embedded Workbench 5.4\
+      - arm\bin\armbat.dll
+    - "--backend"
+    - "-B"
+    - "-p"
+    - - C:\Program Files\IAR Systems\Embedded Workbench 5.4\
+      - arm\config\debugger\ST\iostm32f107xx.ddf
+    - "--cpu=Cortex-M3"
+    - "-d"
+    - sim
+:extension:
+  :object: ".r79"
+  :executable: ".out"
+:paths:
+  :test:
+    - - C:\Program Files\IAR Systems\Embedded Workbench 5.4\
+      - arm\inc\
+    - src\
+    - "..\\src\\"
+    - testdata/
+    - tests\
+    - vendor\unity\src\
+    - iar\iar_v5\incIAR\
+:defines:
+  :test:
+  - IAR
+  - UNITY_SUPPORT_64
+  - UNITY_SUPPORT_TEST_CASES
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/iar_msp430.yml b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/iar_msp430.yml
new file mode 100644
index 000000000..65872535f
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/iar_msp430.yml
@@ -0,0 +1,112 @@
+---
+tools_root: C:\Program Files\IAR Systems\Embedded Workbench 5.3 MSP430\
+core_root: &1
+- C:\Program Files\IAR Systems\Embedded Workbench 5.3 MSP430\
+- 430\
+core_bin: &2
+- *1
+- bin\
+core_config: &4
+- *1
+- config\
+core_lib: &3
+- *1
+- lib\
+core_inc: &5
+- *1
+- inc\
+colour: true
+:unity:
+  :plugins: []
+:tools:
+  :test_compiler:
+    :name: compiler
+    :executable:
+    - *2
+    - icc430.exe
+    :arguments:
+    - "--dlib_config"
+    - - *3
+      - dlib\dl430fn.h
+    - "--no_cse"
+    - "--no_unroll"
+    - "--no_inline"
+    - "--no_code_motion"
+    - "--no_tbaa"
+    - "--debug"
+    - "-e"
+    - "-Ol"
+    - "--multiplier=16"
+    - "--double=32"
+    - "--diag_suppress Pa050"
+    - "--diag_suppress Pe111"
+    - '-I"$": COLLECTION_PATHS_TEST_TOOLCHAIN_INCLUDE'
+    - '-I"$": COLLECTION_PATHS_TEST_SUPPORT_SOURCE_INCLUDE_VENDOR'
+    - "-D$: COLLECTION_DEFINES_TEST_AND_VENDOR"
+    - "${1}"
+    - "-o ${2}"
+  :test_linker:
+    :name: linker
+    :executable:
+    - *2
+    - xlink.exe
+    :arguments:
+    - "${1}"
+    - "-rt"
+    - - *3
+      - dlib\dl430fn.r43
+    - "-e_PrintfTiny=_Printf"
+    - "-e_ScanfSmall=_Scanf"
+    - "-s __program_start"
+    - "-D_STACK_SIZE=50"
+    - "-D_DATA16_HEAP_SIZE=50"
+    - "-D_DATA20_HEAP_SIZE=50"
+    - "-f"
+    - - *4
+      - lnk430f5438.xcl
+    - "-f"
+    - - *4
+      - multiplier.xcl
+    - "-o ${2}"
+  :test_fixture:
+    :name: simulator
+    :executable:
+    - C:\Program Files\IAR Systems\Embedded Workbench 5.3 MSP430\
+    - common\bin\CSpyBat.exe
+    :arguments:
+    - "--silent"
+    - - *2
+      - 430proc.dll
+    - - *2
+      - 430sim.dll
+    - "${1}"
+    - "--plugin"
+    - - *2
+      - 430bat.dll
+    - "--backend -B"
+    - "--cpu MSP430F5438"
+    - "-p"
+    - - *4
+      - MSP430F5438.ddf
+    - "-d sim"
+:extension:
+  :object: ".r43"
+  :executable: ".d79"
+:paths:
+  :test:
+    - *5
+    - - *5
+      - dlib
+    - - *3
+      - dlib
+    - src\
+    - "../src/"
+    - testdata/
+    - tests\
+    - vendor\unity\src
+:defines:
+  :test:
+  - __MSP430F149__
+  - INT_WIDTH=16
+  - UNITY_EXCLUDE_FLOAT
+  - UNITY_SUPPORT_TEST_CASES
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/iar_sh2a_v6.yml b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/iar_sh2a_v6.yml
new file mode 100644
index 000000000..b4371cd0a
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/targets/iar_sh2a_v6.yml
@@ -0,0 +1,99 @@
+---
+tools_root: C:\Program Files\IAR Systems\Embedded Workbench 6.0\
+colour: true
+:unity:
+  :plugins: []
+:tools:
+  :test_compiler:
+    :name: compiler
+    :executable:
+    - C:\Program Files\IAR Systems\Embedded Workbench 6.0\
+    - sh\bin\iccsh.exe
+    :arguments:
+    - "-e"
+    - "--char_is_signed"
+    - "-Ol"
+    - "--no_cse"
+    - "--no_unroll"
+    - "--no_inline"
+    - "--no_code_motion"
+    - "--no_tbaa"
+    - "--no_scheduling"
+    - "--no_clustering"
+    - "--debug"
+    - "--dlib_config"
+    - - C:\Program Files\IAR Systems\Embedded Workbench 6.0\
+      - sh\inc\DLib_Product.h
+    - "--double=32"
+    - "--code_model=huge"
+    - "--data_model=huge"
+    - "--core=sh2afpu"
+    - "--warnings_affect_exit_code"
+    - "--warnings_are_errors"
+    - "--mfc"
+    - "--use_unix_directory_separators"
+    - "--diag_suppress=Pe161"
+    - '-I"$": COLLECTION_PATHS_TEST_TOOLCHAIN_INCLUDE'
+    - '-I"$": COLLECTION_PATHS_TEST_SUPPORT_SOURCE_INCLUDE_VENDOR'
+    - "-D$: COLLECTION_DEFINES_TEST_AND_VENDOR"
+    - "${1}"
+    - "-o ${2}"
+  :test_linker:
+    :name: linker
+    :executable:
+    - C:\Program Files\IAR Systems\Embedded Workbench 6.0\
+    - sh\bin\ilinksh.exe
+    :arguments:
+    - "${1}"
+    - "--redirect __Printf=__PrintfSmall"
+    - "--redirect __Scanf=__ScanfSmall"
+    - "--config"
+    - - C:\Program Files\IAR Systems\Embedded Workbench 6.0\
+      - sh\config\generic.icf
+    - "--config_def _CSTACK_SIZE=0x800"
+    - "--config_def _HEAP_SIZE=0x800"
+    - "--config_def _INT_TABLE=0x10"
+    - "--entry __iar_program_start"
+    - "--debug_lib"
+    - "-o ${2}"
+  :test_fixture:
+    :name: simulator
+    :executable:
+    - C:\Program Files\IAR Systems\Embedded Workbench 6.0\
+    - common\bin\CSpyBat.exe
+    :arguments:
+    - "--silent"
+    - - C:\Program Files\IAR Systems\Embedded Workbench 6.0\
+      - sh\bin\shproc.dll
+    - - C:\Program Files\IAR Systems\Embedded Workbench 6.0\
+      - sh\bin\shsim.dll
+    - "${1}"
+    - "--plugin"
+    - - C:\Program Files\IAR Systems\Embedded Workbench 6.0\
+      - sh\bin\shbat.dll
+    - "--backend"
+    - "-B"
+    - "--core sh2afpu"
+    - "-p"
+    - - C:\Program Files\IAR Systems\Embedded Workbench 6.0\
+      - sh\config\debugger\io7264.ddf
+    - "-d"
+    - sim
+:extension:
+  :object: ".o"
+  :executable: ".out"
+:paths:
+  :test:
+    - - C:\Program Files\IAR Systems\Embedded Workbench 6.0\
+      - sh\inc\
+    - - C:\Program Files\IAR Systems\Embedded Workbench 6.0\
+      - sh\inc\c
+    - src\
+    - "..\\src\\"
+    - testdata/
+    - tests\
+    - vendor\unity\src\
+:defines:
+  :test:
+  - UNITY_SUPPORT_64
+  - UNITY_SUPPORT_TEST_CASES
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/testdata/CException.h b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/testdata/CException.h
new file mode 100644
index 000000000..3872fa75f
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/testdata/CException.h
@@ -0,0 +1,11 @@
+#ifndef CEXCEPTION_H
+#define CEXCEPTION_H
+
+#define CEXCEPTION_BEING_USED 1
+
+#define CEXCEPTION_NONE 0
+#define CEXCEPTION_T int e = 1; (void)
+#define Try          if (e)
+#define Catch(a)     if (!a)
+
+#endif
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/testdata/Defs.h b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/testdata/Defs.h
new file mode 100644
index 000000000..b1dc83e9b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/testdata/Defs.h
@@ -0,0 +1,8 @@
+#ifndef DEF_H
+#define DEF_H
+
+#define EXTERN_DECL
+
+extern int CounterSuiteSetup;
+
+#endif
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/testdata/cmock.h b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/testdata/cmock.h
new file mode 100644
index 000000000..33ddbfc56
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/testdata/cmock.h
@@ -0,0 +1,14 @@
+#ifndef CMOCK_H
+#define CMOCK_H
+
+int CMockMemFreeFinalCounter = 0;
+int mockMock_Init_Counter = 0;
+int mockMock_Verify_Counter = 0;
+int mockMock_Destroy_Counter = 0;
+
+void CMock_Guts_MemFreeFinal(void) { CMockMemFreeFinalCounter++; }
+void mockMock_Init(void)           { mockMock_Init_Counter++;    }
+void mockMock_Verify(void)         { mockMock_Verify_Counter++;  }
+void mockMock_Destroy(void)        { mockMock_Destroy_Counter++; }
+
+#endif
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/testdata/mockMock.h b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/testdata/mockMock.h
new file mode 100644
index 000000000..5c6829d77
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/testdata/mockMock.h
@@ -0,0 +1,13 @@
+#ifndef MOCK_MOCK_H
+#define MOCK_MOCK_H
+
+extern int mockMock_Init_Counter;
+extern int mockMock_Verify_Counter;
+extern int mockMock_Destroy_Counter;
+extern int CMockMemFreeFinalCounter;
+
+void mockMock_Init(void);
+void mockMock_Verify(void);
+void mockMock_Destroy(void);
+
+#endif
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/testdata/testRunnerGenerator.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/testdata/testRunnerGenerator.c
new file mode 100644
index 000000000..b5dd97f5d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/testdata/testRunnerGenerator.c
@@ -0,0 +1,189 @@
+/* This Test File Is Used To Verify Many Combinations Of Using the Generate Test Runner Script */
+
+#include <stdio.h>
+#include "unity.h"
+#include "Defs.h"
+
+#ifdef USE_CEXCEPTION
+#include "CException.h"
+#endif
+
+/* Notes about prefixes:
+   test     - normal default prefix. these are "always run" tests for this procedure
+   spec     - normal default prefix. required to run default setup/teardown calls.
+   should   - normal default prefix.
+   qwiktest - custom prefix for when tests skip all setup/teardown calls.
+   custtest - custom prefix for when tests use custom setup/teardown calls.
+   paratest - custom prefix for when we want to verify parameterized tests.
+   extest   - custom prefix only used during cexception
+   suitetest- custom prefix for when we want to use custom suite setup/teardown
+*/
+
+/* Support for Meta Test Rig */
+#define TEST_CASE(a)
+
+/* Include Passthroughs for Linking Tests */
+void putcharSpy(int c) { (void)putchar(c);}
+void flushSpy(void) {}
+
+/* Global Variables Used During These Tests */
+int CounterSetup = 0;
+int CounterTeardown = 0;
+int CounterSuiteSetup = 0;
+
+void setUp(void)
+{
+    CounterSetup = 1;
+}
+
+void tearDown(void)
+{
+    CounterTeardown = 1;
+}
+
+void custom_setup(void)
+{
+    CounterSetup = 2;
+}
+
+void custom_teardown(void)
+{
+    CounterTeardown = 2;
+}
+
+/*
+void test_OldSchoolCommentsShouldBeIgnored(void)
+{
+    TEST_ASSERT_FAIL("Old-School Comments Should Be Ignored");
+}
+*/
+
+void test_ThisTestAlwaysPasses(void)
+{
+    TEST_PASS();
+}
+
+void test_ThisTestAlwaysFails(void)
+{
+    TEST_FAIL_MESSAGE("This Test Should Fail");
+}
+
+void test_ThisTestAlwaysIgnored(void)
+{
+    TEST_IGNORE_MESSAGE("This Test Should Be Ignored");
+}
+
+void qwiktest_ThisTestPassesWhenNoSetupRan(void)
+{
+    TEST_ASSERT_EQUAL_MESSAGE(0, CounterSetup, "Setup Was Unexpectedly Run");
+}
+
+void qwiktest_ThisTestPassesWhenNoTeardownRan(void)
+{
+    TEST_ASSERT_EQUAL_MESSAGE(0, CounterTeardown, "Teardown Was Unexpectedly Run");
+}
+
+void spec_ThisTestPassesWhenNormalSuiteSetupAndTeardownRan(void)
+{
+    TEST_ASSERT_EQUAL_MESSAGE(0, CounterSuiteSetup, "Suite Setup Was Unexpectedly Run");
+}
+
+void spec_ThisTestPassesWhenNormalSetupRan(void)
+{
+    TEST_ASSERT_EQUAL_MESSAGE(1, CounterSetup, "Normal Setup Wasn't Run");
+}
+
+void spec_ThisTestPassesWhenNormalTeardownRan(void)
+{
+    TEST_ASSERT_EQUAL_MESSAGE(1, CounterTeardown, "Normal Teardown Wasn't Run");
+}
+
+void custtest_ThisTestPassesWhenCustomSetupRan(void)
+{
+    TEST_ASSERT_EQUAL_MESSAGE(2, CounterSetup, "Custom Setup Wasn't Run");
+}
+
+void custtest_ThisTestPassesWhenCustomTeardownRan(void)
+{
+    TEST_ASSERT_EQUAL_MESSAGE(2, CounterTeardown, "Custom Teardown Wasn't Run");
+}
+
+#ifndef UNITY_EXCLUDE_TESTING_NEW_COMMENTS
+//void test_NewStyleCommentsShouldBeIgnored(void)
+//{
+//    TEST_ASSERT_FAIL("New Style Comments Should Be Ignored");
+//}
+#endif
+
+void test_NotBeConfusedByLongComplicatedStrings(void)
+{
+    const char* crazyString = "GET / HTTP/1.1\r\nHost: 127.0.0.1:8081\r\nConnection: keep-alive\r\nCache-Control: no-cache\r\nUser-Agent: Mozilla/5.0 (Windows NT 6.3; WOW64) AppleWebKit/537.36 (KHTML, like Gecko) Chrome/46.0.2490.80 Safari/537.36\r\nPostman-Token: 768c7149-c3fb-f704-71a2-63918d9195b2\r\nAccept: */*\r\nAccept-Encoding: gzip, deflate, sdch\r\nAccept-Language: en-GB,en-US;q=0.8,en;q=0.6\r\n\r\n";
+
+    TEST_ASSERT_EQUAL_STRING_MESSAGE(crazyString, crazyString, "These Strings Are The Same");
+}
+
+/* The next test should still appear even though we have this confusing nested comment thing going on http://looks_like_comments.com */
+void test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings(void)
+{
+    TEST_ASSERT_TRUE_MESSAGE(1, "1 Should be True");
+    /* still should not break anything */
+}
+/* nor should this */
+
+void test_StillNotBeConfusedByLongComplicatedStrings(void)
+{
+    const char* crazyString = "GET / HTTP/1.1\r\nHost: 127.0.0.1:8081\r\nConnection: keep-alive\r\nCache-Control: no-cache\r\nUser-Agent: Mozilla/5.0 (Windows NT 6.3; WOW64) AppleWebKit/537.36 (KHTML, like Gecko) Chrome/46.0.2490.80 Safari/537.36\r\nPostman-Token: 768c7149-c3fb-f704-71a2-63918d9195b2\r\nAccept: */*\r\nAccept-Encoding: gzip, deflate, sdch\r\nAccept-Language: en-GB,en-US;q=0.8,en;q=0.6\r\n\r\n";
+
+    TEST_ASSERT_EQUAL_STRING_MESSAGE(crazyString, crazyString, "These Strings Are Still The Same");
+}
+
+void should_RunTestsStartingWithShouldByDefault(void)
+{
+    TEST_ASSERT_TRUE_MESSAGE(1, "1 Should be True");
+}
+
+TEST_CASE(25)
+TEST_CASE(125)
+TEST_CASE(5)
+void paratest_ShouldHandleParameterizedTests(int Num)
+{
+    TEST_ASSERT_EQUAL_MESSAGE(0, (Num % 5), "All The Values Are Divisible By 5");
+}
+
+TEST_CASE(7)
+void paratest_ShouldHandleParameterizedTests2(int Num)
+{
+    TEST_ASSERT_EQUAL_MESSAGE(7, Num, "The Only Call To This Passes");
+}
+
+void paratest_ShouldHandleNonParameterizedTestsWhenParameterizationValid(void)
+{
+    TEST_PASS();
+}
+
+TEST_CASE(17)
+void paratest_ShouldHandleParameterizedTestsThatFail(int Num)
+{
+    TEST_ASSERT_EQUAL_MESSAGE(3, Num, "This call should fail");
+}
+
+#ifdef USE_CEXCEPTION
+void extest_ShouldHandleCExceptionInTest(void)
+{
+    TEST_ASSERT_EQUAL_MESSAGE(1, CEXCEPTION_BEING_USED, "Should be pulling in CException");
+}
+#endif
+
+#ifdef USE_ANOTHER_MAIN
+int custom_main(void);
+
+int main(void)
+{
+    return custom_main();
+}
+#endif
+
+void suitetest_ThisTestPassesWhenCustomSuiteSetupAndTeardownRan(void)
+{
+    TEST_ASSERT_EQUAL_MESSAGE(1, CounterSuiteSetup, "Suite Setup Should Have Run");
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/testdata/testRunnerGeneratorSmall.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/testdata/testRunnerGeneratorSmall.c
new file mode 100644
index 000000000..c8aaf747e
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/testdata/testRunnerGeneratorSmall.c
@@ -0,0 +1,70 @@
+/* This Test File Is Used To Verify Many Combinations Of Using the Generate Test Runner Script */
+
+#include <stdio.h>
+#include "unity.h"
+#include "Defs.h"
+
+TEST_FILE("some_file.c")
+
+/* Notes about prefixes:
+   test     - normal default prefix. these are "always run" tests for this procedure
+   spec     - normal default prefix. required to run default setup/teardown calls.
+*/
+
+/* Support for Meta Test Rig */
+#define TEST_CASE(a)
+
+/* Include Passthroughs for Linking Tests */
+void putcharSpy(int c) { (void)putchar(c);}
+void flushSpy(void) {}
+
+/* Global Variables Used During These Tests */
+int CounterSetup = 0;
+int CounterTeardown = 0;
+int CounterSuiteSetup = 0;
+
+void setUp(void)
+{
+    CounterSetup = 1;
+}
+
+void tearDown(void)
+{
+    CounterTeardown = 1;
+}
+
+void custom_setup(void)
+{
+    CounterSetup = 2;
+}
+
+void custom_teardown(void)
+{
+    CounterTeardown = 2;
+}
+
+void test_ThisTestAlwaysPasses(void)
+{
+    TEST_PASS();
+}
+
+void test_ThisTestAlwaysFails(void)
+{
+    TEST_FAIL_MESSAGE("This Test Should Fail");
+}
+
+void test_ThisTestAlwaysIgnored(void)
+{
+    TEST_IGNORE_MESSAGE("This Test Should Be Ignored");
+}
+
+void spec_ThisTestPassesWhenNormalSetupRan(void)
+{
+    TEST_ASSERT_EQUAL_MESSAGE(1, CounterSetup, "Normal Setup Wasn't Run");
+}
+
+void spec_ThisTestPassesWhenNormalTeardownRan(void)
+{
+    TEST_ASSERT_EQUAL_MESSAGE(1, CounterTeardown, "Normal Teardown Wasn't Run");
+}
+
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/testdata/testRunnerGeneratorWithMocks.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/testdata/testRunnerGeneratorWithMocks.c
new file mode 100644
index 000000000..aaceda446
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/testdata/testRunnerGeneratorWithMocks.c
@@ -0,0 +1,197 @@
+/* This Test File Is Used To Verify Many Combinations Of Using the Generate Test Runner Script */
+
+#include <stdio.h>
+#include "unity.h"
+#include "Defs.h"
+#include "mockMock.h"
+
+#ifdef USE_CEXCEPTION
+#include "CException.h"
+#endif
+
+/* Notes about prefixes:
+   test     - normal default prefix. these are "always run" tests for this procedure
+   spec     - normal default prefix. required to run default setup/teardown calls.
+   should   - normal default prefix.
+   qwiktest - custom prefix for when tests skip all setup/teardown calls.
+   custtest - custom prefix for when tests use custom setup/teardown calls.
+   paratest - custom prefix for when we want to verify parameterized tests.
+   extest   - custom prefix only used during cexception
+   suitetest- custom prefix for when we want to use custom suite setup/teardown
+*/
+
+/* Support for Meta Test Rig */
+#define TEST_CASE(a)
+
+/* Include Passthroughs for Linking Tests */
+void putcharSpy(int c) { (void)putchar(c);}
+void flushSpy(void) {}
+
+/* Global Variables Used During These Tests */
+int CounterSetup = 0;
+int CounterTeardown = 0;
+int CounterSuiteSetup = 0;
+
+void setUp(void)
+{
+    CounterSetup = 1;
+}
+
+void tearDown(void)
+{
+    CounterTeardown = 1;
+}
+
+void custom_setup(void)
+{
+    CounterSetup = 2;
+}
+
+void custom_teardown(void)
+{
+    CounterTeardown = 2;
+}
+
+/*
+void test_OldSchoolCommentsShouldBeIgnored(void)
+{
+    TEST_ASSERT_FAIL("Old-School Comments Should Be Ignored");
+}
+*/
+
+void test_ThisTestAlwaysPasses(void)
+{
+    TEST_PASS();
+}
+
+void test_ThisTestAlwaysFails(void)
+{
+    TEST_FAIL_MESSAGE("This Test Should Fail");
+}
+
+void test_ThisTestAlwaysIgnored(void)
+{
+    TEST_IGNORE_MESSAGE("This Test Should Be Ignored");
+}
+
+void qwiktest_ThisTestPassesWhenNoSetupRan(void)
+{
+    TEST_ASSERT_EQUAL_MESSAGE(0, CounterSetup, "Setup Was Unexpectedly Run");
+}
+
+void qwiktest_ThisTestPassesWhenNoTeardownRan(void)
+{
+    TEST_ASSERT_EQUAL_MESSAGE(0, CounterTeardown, "Teardown Was Unexpectedly Run");
+}
+
+void spec_ThisTestPassesWhenNormalSuiteSetupAndTeardownRan(void)
+{
+    TEST_ASSERT_EQUAL_MESSAGE(0, CounterSuiteSetup, "Suite Setup Was Unexpectedly Run");
+}
+
+void spec_ThisTestPassesWhenNormalSetupRan(void)
+{
+    TEST_ASSERT_EQUAL_MESSAGE(1, CounterSetup, "Normal Setup Wasn't Run");
+}
+
+void spec_ThisTestPassesWhenNormalTeardownRan(void)
+{
+    TEST_ASSERT_EQUAL_MESSAGE(1, CounterTeardown, "Normal Teardown Wasn't Run");
+}
+
+void custtest_ThisTestPassesWhenCustomSetupRan(void)
+{
+    TEST_ASSERT_EQUAL_MESSAGE(2, CounterSetup, "Custom Setup Wasn't Run");
+}
+
+void custtest_ThisTestPassesWhenCustomTeardownRan(void)
+{
+    TEST_ASSERT_EQUAL_MESSAGE(2, CounterTeardown, "Custom Teardown Wasn't Run");
+}
+
+#ifndef UNITY_EXCLUDE_TESTING_NEW_COMMENTS
+//void test_NewStyleCommentsShouldBeIgnored(void)
+//{
+//    TEST_ASSERT_FAIL("New Style Comments Should Be Ignored");
+//}
+#endif
+
+void test_NotBeConfusedByLongComplicatedStrings(void)
+{
+    const char* crazyString = "GET / HTTP/1.1\r\nHost: 127.0.0.1:8081\r\nConnection: keep-alive\r\nCache-Control: no-cache\r\nUser-Agent: Mozilla/5.0 (Windows NT 6.3; WOW64) AppleWebKit/537.36 (KHTML, like Gecko) Chrome/46.0.2490.80 Safari/537.36\r\nPostman-Token: 768c7149-c3fb-f704-71a2-63918d9195b2\r\nAccept: */*\r\nAccept-Encoding: gzip, deflate, sdch\r\nAccept-Language: en-GB,en-US;q=0.8,en;q=0.6\r\n\r\n";
+
+    TEST_ASSERT_EQUAL_STRING_MESSAGE(crazyString, crazyString, "These Strings Are The Same");
+}
+
+void test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings(void)
+{
+    TEST_ASSERT_TRUE_MESSAGE(1, "1 Should be True");
+}
+
+void test_StillNotBeConfusedByLongComplicatedStrings(void)
+{
+    const char* crazyString = "GET / HTTP/1.1\r\nHost: 127.0.0.1:8081\r\nConnection: keep-alive\r\nCache-Control: no-cache\r\nUser-Agent: Mozilla/5.0 (Windows NT 6.3; WOW64) AppleWebKit/537.36 (KHTML, like Gecko) Chrome/46.0.2490.80 Safari/537.36\r\nPostman-Token: 768c7149-c3fb-f704-71a2-63918d9195b2\r\nAccept: */*\r\nAccept-Encoding: gzip, deflate, sdch\r\nAccept-Language: en-GB,en-US;q=0.8,en;q=0.6\r\n\r\n";
+
+    TEST_ASSERT_EQUAL_STRING_MESSAGE(crazyString, crazyString, "These Strings Are Still The Same");
+}
+
+void should_RunTestsStartingWithShouldByDefault(void)
+{
+    TEST_ASSERT_TRUE_MESSAGE(1, "1 Should be True");
+}
+
+TEST_CASE(25)
+TEST_CASE(125)
+TEST_CASE(5)
+void paratest_ShouldHandleParameterizedTests(int Num)
+{
+    TEST_ASSERT_EQUAL_MESSAGE(0, (Num % 5), "All The Values Are Divisible By 5");
+}
+
+TEST_CASE(7)
+void paratest_ShouldHandleParameterizedTests2(int Num)
+{
+    TEST_ASSERT_EQUAL_MESSAGE(7, Num, "The Only Call To This Passes");
+}
+
+void paratest_ShouldHandleNonParameterizedTestsWhenParameterizationValid(void)
+{
+    TEST_PASS();
+}
+
+TEST_CASE(17)
+void paratest_ShouldHandleParameterizedTestsThatFail(int Num)
+{
+    TEST_ASSERT_EQUAL_MESSAGE(3, Num, "This call should fail");
+}
+
+#ifdef USE_CEXCEPTION
+void extest_ShouldHandleCExceptionInTest(void)
+{
+    TEST_ASSERT_EQUAL_MESSAGE(1, CEXCEPTION_BEING_USED, "Should be pulling in CException");
+}
+#endif
+
+#ifdef USE_ANOTHER_MAIN
+int custom_main(void);
+
+int main(void)
+{
+    return custom_main();
+}
+#endif
+
+void suitetest_ThisTestPassesWhenCustomSuiteSetupAndTeardownRan(void)
+{
+    TEST_ASSERT_EQUAL_MESSAGE(1, CounterSuiteSetup, "Suite Setup Should Have Run");
+}
+
+void test_ShouldCallMockInitAndVerifyFunctionsForEachTest(void)
+{
+    int passesOrIgnores = (int)(Unity.NumberOfTests - Unity.TestFailures);
+    TEST_ASSERT_EQUAL_MESSAGE(Unity.NumberOfTests,     mockMock_Init_Counter,    "Mock Init Should Be Called Once Per Test Started");
+    TEST_ASSERT_EQUAL_MESSAGE(passesOrIgnores,         mockMock_Verify_Counter,  "Mock Verify Should Be Called Once Per Test Passed");
+    TEST_ASSERT_EQUAL_MESSAGE(Unity.NumberOfTests - 1, mockMock_Destroy_Counter, "Mock Destroy Should Be Called Once Per Test Completed");
+    TEST_ASSERT_EQUAL_MESSAGE(0,                       CMockMemFreeFinalCounter, "Mock MemFreeFinal Should Not Be Called Until End");
+}
+
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/self_assessment_utils.h b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/self_assessment_utils.h
new file mode 100644
index 000000000..c8cb595db
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/self_assessment_utils.h
@@ -0,0 +1,144 @@
+#ifdef TEST_INSTANCES
+
+#include <string.h>
+#include <stdint.h>
+
+/* Dividing by these constants produces +/- infinity.
+ * The rationale is given in UnityAssertFloatIsInf's body.
+ */
+#ifndef UNITY_EXCLUDE_FLOAT
+static const UNITY_FLOAT f_zero = 0.0f;
+#endif
+
+#ifndef UNITY_EXCLUDE_DOUBLE
+static const UNITY_DOUBLE d_zero = 0.0;
+#endif
+
+/* Macros for Catching An Expected Failure or Ignore */
+#define EXPECT_ABORT_BEGIN \
+    startPutcharSpy();     \
+    if (TEST_PROTECT())    \
+    {
+
+#define VERIFY_FAILS_END                                                       \
+    }                                                                          \
+    endPutcharSpy(); /* start/end Spy to suppress output of failure message */ \
+    Unity.CurrentTestFailed = (Unity.CurrentTestFailed == 1) ? 0 : 1;          \
+    if (Unity.CurrentTestFailed == 1) {                                        \
+      SetToOneMeanWeAlreadyCheckedThisGuy = 1;                                 \
+      UnityPrintNumberUnsigned(Unity.CurrentTestLineNumber);                   \
+      UNITY_OUTPUT_CHAR(':');                                                  \
+      UnityPrint(Unity.CurrentTestName);                                       \
+      UnityPrint(":FAIL: [[[[ Test Should Have Failed But Did Not ]]]]");      \
+      UNITY_OUTPUT_CHAR('\n');                                                 \
+    }
+
+#define VERIFY_IGNORES_END                                                     \
+    }                                                                          \
+    endPutcharSpy(); /* start/end Spy to suppress output of ignore message */  \
+    Unity.CurrentTestFailed = (Unity.CurrentTestIgnored == 1) ? 0 : 1;         \
+    Unity.CurrentTestIgnored = 0;                                              \
+    if (Unity.CurrentTestFailed == 1) {                                        \
+      SetToOneMeanWeAlreadyCheckedThisGuy = 1;                                 \
+      UnityPrintNumberUnsigned(Unity.CurrentTestLineNumber);                   \
+      UNITY_OUTPUT_CHAR(':');                                                  \
+      UnityPrint(Unity.CurrentTestName);                                       \
+      UnityPrint(":FAIL: [[[[ Test Should Have Ignored But Did Not ]]]]");     \
+      UNITY_OUTPUT_CHAR('\n');                                                 \
+    }
+
+/* Tricky series of macros to set USING_OUTPUT_SPY */
+#define USING_SPY_AS(a)           EXPAND_AND_USE_2ND(ASSIGN_VALUE(a), 0)
+#define ASSIGN_VALUE(a)           VAL_##a
+#define VAL_putcharSpy            0, 1
+#define EXPAND_AND_USE_2ND(a, b)  SECOND_PARAM(a, b, throwaway)
+#define SECOND_PARAM(a, b, ...)   b
+#if USING_SPY_AS(UNITY_OUTPUT_CHAR)
+  #define USING_OUTPUT_SPY /* true only if UNITY_OUTPUT_CHAR = putcharSpy */
+#endif
+
+#ifdef USING_OUTPUT_SPY
+#include <stdio.h>
+#define SPY_BUFFER_MAX 40
+static char putcharSpyBuffer[SPY_BUFFER_MAX];
+#endif
+static int indexSpyBuffer;
+static int putcharSpyEnabled;
+
+void startPutcharSpy(void)
+{
+    indexSpyBuffer = 0;
+    putcharSpyEnabled = 1;
+}
+
+void endPutcharSpy(void)
+{
+    putcharSpyEnabled = 0;
+}
+
+char* getBufferPutcharSpy(void)
+{
+#ifdef USING_OUTPUT_SPY
+    putcharSpyBuffer[indexSpyBuffer] = '\0';
+    return putcharSpyBuffer;
+#else
+    return NULL;
+#endif
+}
+
+void putcharSpy(int c)
+{
+#ifdef USING_OUTPUT_SPY
+    if (putcharSpyEnabled)
+    {
+        if (indexSpyBuffer < SPY_BUFFER_MAX - 1)
+            putcharSpyBuffer[indexSpyBuffer++] = (char)c;
+    } else
+        putchar((char)c);
+#else
+    (void)c;
+#endif
+}
+
+/* This is for counting the calls to the flushSpy */
+static int flushSpyEnabled;
+static int flushSpyCalls = 0;
+
+void startFlushSpy(void)
+{
+    flushSpyCalls = 0;
+    flushSpyEnabled = 1;
+}
+
+void endFlushSpy(void)
+{
+    flushSpyCalls = 0;
+    flushSpyEnabled = 0;
+}
+
+int getFlushSpyCalls(void)
+{
+    return flushSpyCalls;
+}
+
+void flushSpy(void)
+{
+    if (flushSpyEnabled){ flushSpyCalls++; }
+}
+
+#define TEST_ASSERT_EQUAL_PRINT_NUMBERS(expected, actual) {             \
+        startPutcharSpy(); UnityPrintNumber((actual)); endPutcharSpy(); \
+        TEST_ASSERT_EQUAL_STRING((expected), getBufferPutcharSpy());    \
+        }
+
+#define TEST_ASSERT_EQUAL_PRINT_UNSIGNED_NUMBERS(expected, actual) {            \
+        startPutcharSpy(); UnityPrintNumberUnsigned((actual)); endPutcharSpy(); \
+        TEST_ASSERT_EQUAL_STRING((expected), getBufferPutcharSpy());            \
+        }
+
+#define TEST_ASSERT_EQUAL_PRINT_FLOATING(expected, actual) {            \
+        startPutcharSpy(); UnityPrintFloat((actual)); endPutcharSpy();  \
+        TEST_ASSERT_EQUAL_STRING((expected), getBufferPutcharSpy());    \
+        }
+
+#endif
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_generate_test_runner.rb b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_generate_test_runner.rb
new file mode 100644
index 000000000..809b4494c
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_generate_test_runner.rb
@@ -0,0 +1,1260 @@
+# ==========================================
+#   CMock Project - Automatic Mock Generation for C
+#   Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+#   [Released under MIT License. Please refer to license.txt for details]
+# ==========================================
+
+require '../auto/generate_test_runner.rb'
+
+$generate_test_runner_tests = 0
+$generate_test_runner_failures = 0
+
+OUT_FILE  = 'build/testsample_'
+
+RUNNER_TESTS = [
+  { :name => 'DefaultsThroughOptions',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST'],
+    :options => nil, #defaults
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'spec_ThisTestPassesWhenNormalSetupRan',
+                    'spec_ThisTestPassesWhenNormalTeardownRan',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                    'should_RunTestsStartingWithShouldByDefault',
+                    'spec_ThisTestPassesWhenNormalSuiteSetupAndTeardownRan',
+                  ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'DefaultsThroughCommandLine',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST'],
+    :cmdline => "", #defaults
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'spec_ThisTestPassesWhenNormalSetupRan',
+                    'spec_ThisTestPassesWhenNormalTeardownRan',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                    'should_RunTestsStartingWithShouldByDefault',
+                    'spec_ThisTestPassesWhenNormalSuiteSetupAndTeardownRan',
+                  ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'DefaultsThroughYAMLFile',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST'],
+    :cmdline => "", #defaults
+    :yaml => {}, #defaults
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'spec_ThisTestPassesWhenNormalSetupRan',
+                    'spec_ThisTestPassesWhenNormalTeardownRan',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                    'should_RunTestsStartingWithShouldByDefault',
+                    'spec_ThisTestPassesWhenNormalSuiteSetupAndTeardownRan',
+                  ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'ShorterFilterOfJustTest',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST'],
+    :options => {
+      :test_prefix => "test",
+    },
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                  ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'ShorterFilterOfJustShould',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST'],
+    :options => {
+      :test_prefix => "should",
+    },
+    :expected => {
+      :to_pass => [ 'should_RunTestsStartingWithShouldByDefault' ],
+      :to_fail => [  ],
+      :to_ignore => [  ],
+    }
+  },
+
+  { :name => 'ShorterFilterOfJustSpec',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST'],
+    :options => {
+      :test_prefix => "spec",
+    },
+    :expected => {
+      :to_pass => [ 'spec_ThisTestPassesWhenNormalSetupRan',
+                    'spec_ThisTestPassesWhenNormalTeardownRan',
+                    'spec_ThisTestPassesWhenNormalSuiteSetupAndTeardownRan',
+                  ],
+      :to_fail => [  ],
+      :to_ignore => [  ],
+    }
+  },
+
+  { :name => 'InjectIncludes',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST'],
+    :options => {
+      :includes => ['Defs.h'],
+    },
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'spec_ThisTestPassesWhenNormalSetupRan',
+                    'spec_ThisTestPassesWhenNormalTeardownRan',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                    'should_RunTestsStartingWithShouldByDefault',
+                    'spec_ThisTestPassesWhenNormalSuiteSetupAndTeardownRan',
+                  ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'ParameterizedThroughOptions',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST'],
+    :options => {
+      :test_prefix => "paratest",
+      :use_param_tests => true,
+    },
+    :features => [ :parameterized ],
+    :expected => {
+      :to_pass => [ 'paratest_ShouldHandleParameterizedTests\(25\)',
+                    'paratest_ShouldHandleParameterizedTests\(125\)',
+                    'paratest_ShouldHandleParameterizedTests\(5\)',
+                    'paratest_ShouldHandleParameterizedTests2\(7\)',
+                    'paratest_ShouldHandleNonParameterizedTestsWhenParameterizationValid',
+                  ],
+      :to_fail => [ 'paratest_ShouldHandleParameterizedTestsThatFail\(17\)' ],
+      :to_ignore => [ ],
+    }
+  },
+
+  { :name => 'ParameterizedThroughCommandLine',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST'],
+    :cmdline => " --test_prefix=\"paratest\" --use_param_tests=1",
+    :features => [ :parameterized ],
+    :expected => {
+      :to_pass => [ 'paratest_ShouldHandleParameterizedTests\(25\)',
+                    'paratest_ShouldHandleParameterizedTests\(125\)',
+                    'paratest_ShouldHandleParameterizedTests\(5\)',
+                    'paratest_ShouldHandleParameterizedTests2\(7\)',
+                    'paratest_ShouldHandleNonParameterizedTestsWhenParameterizationValid',
+                  ],
+      :to_fail => [ 'paratest_ShouldHandleParameterizedTestsThatFail\(17\)' ],
+      :to_ignore => [ ],
+    }
+  },
+
+  { :name => 'ParameterizedThroughCommandLineAndYaml',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST'],
+    :cmdline => "--use_param_tests=1",
+    :yaml => {
+      :test_prefix => "paratest"
+    },
+    :features => [ :parameterized ],
+    :expected => {
+      :to_pass => [ 'paratest_ShouldHandleParameterizedTests\(25\)',
+                    'paratest_ShouldHandleParameterizedTests\(125\)',
+                    'paratest_ShouldHandleParameterizedTests\(5\)',
+                    'paratest_ShouldHandleParameterizedTests2\(7\)',
+                    'paratest_ShouldHandleNonParameterizedTestsWhenParameterizationValid',
+                  ],
+      :to_fail => [ 'paratest_ShouldHandleParameterizedTestsThatFail\(17\)' ],
+      :to_ignore => [ ],
+    }
+  },
+
+  { :name => 'CException',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST', 'USE_CEXCEPTION'],
+    :options => {
+      :test_prefix => "extest",
+      :plugins => [ :cexception ],
+    },
+    :expected => {
+      :to_pass => [ 'extest_ShouldHandleCExceptionInTest' ],
+      :to_fail => [ ],
+      :to_ignore => [ ],
+    }
+  },
+
+  { :name => 'CustomSetupAndTeardownThroughOptions',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST'],
+    :options => {
+      :test_prefix => "custtest|test",
+      :setup_name => "custom_setup",
+      :teardown_name => "custom_teardown",
+    },
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                    'custtest_ThisTestPassesWhenCustomSetupRan',
+                    'custtest_ThisTestPassesWhenCustomTeardownRan',
+                  ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'CustomSetupAndTeardownThroughCommandLine',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST'],
+    :cmdline => " --test_prefix=\"custtest|test\" --setup_name=\"custom_setup\" --teardown_name=\"custom_teardown\"",
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                    'custtest_ThisTestPassesWhenCustomSetupRan',
+                    'custtest_ThisTestPassesWhenCustomTeardownRan',
+                  ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'CustomSetupAndTeardownThroughYaml',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST'],
+    :cmdline => " --test_prefix=\"custtest|test\"",
+    :yaml => {
+      :setup_name => "custom_setup",
+      :teardown_name => "custom_teardown",
+    },
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                    'custtest_ThisTestPassesWhenCustomSetupRan',
+                    'custtest_ThisTestPassesWhenCustomTeardownRan',
+                  ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'CustomMain',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST', "USE_ANOTHER_MAIN"],
+    :options => {
+      :main_name => "custom_main",
+    },
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'spec_ThisTestPassesWhenNormalSetupRan',
+                    'spec_ThisTestPassesWhenNormalTeardownRan',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                    'should_RunTestsStartingWithShouldByDefault',
+                    'spec_ThisTestPassesWhenNormalSuiteSetupAndTeardownRan',
+                  ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'CustomSuiteSetupAndTeardown',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST'],
+    :includes => ['Defs.h'],
+    :options => {
+      :test_prefix    => "suitetest|test",
+      :suite_setup    => "  CounterSuiteSetup = 1;",
+      :suite_teardown => "  return num_failures;",
+    },
+    :expected =>  {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                    'suitetest_ThisTestPassesWhenCustomSuiteSetupAndTeardownRan',
+                  ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'MainExternDeclaration',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST'],
+    :includes => ['Defs.h'],
+    :options => {
+      :main_export_decl => "EXTERN_DECL",
+    },
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'spec_ThisTestPassesWhenNormalSetupRan',
+                    'spec_ThisTestPassesWhenNormalTeardownRan',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                    'should_RunTestsStartingWithShouldByDefault',
+                    'spec_ThisTestPassesWhenNormalSuiteSetupAndTeardownRan',
+                  ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+
+  #### WITH MOCKS ##########################################
+
+  { :name => 'DefaultsThroughOptions',
+    :testfile => 'testdata/testRunnerGeneratorWithMocks.c',
+    :testdefines => ['TEST'],
+    :options => nil, #defaults
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'spec_ThisTestPassesWhenNormalSetupRan',
+                    'spec_ThisTestPassesWhenNormalTeardownRan',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                    'should_RunTestsStartingWithShouldByDefault',
+                    'spec_ThisTestPassesWhenNormalSuiteSetupAndTeardownRan',
+                    'test_ShouldCallMockInitAndVerifyFunctionsForEachTest',
+                  ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'DefaultsThroughCommandLine',
+    :testfile => 'testdata/testRunnerGeneratorWithMocks.c',
+    :testdefines => ['TEST'],
+    :cmdline => "", #defaults
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'spec_ThisTestPassesWhenNormalSetupRan',
+                    'spec_ThisTestPassesWhenNormalTeardownRan',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                    'should_RunTestsStartingWithShouldByDefault',
+                    'spec_ThisTestPassesWhenNormalSuiteSetupAndTeardownRan',
+                    'test_ShouldCallMockInitAndVerifyFunctionsForEachTest',
+                  ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'DefaultsThroughYAMLFile',
+    :testfile => 'testdata/testRunnerGeneratorWithMocks.c',
+    :testdefines => ['TEST'],
+    :cmdline => "", #defaults
+    :yaml => {}, #defaults
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'spec_ThisTestPassesWhenNormalSetupRan',
+                    'spec_ThisTestPassesWhenNormalTeardownRan',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                    'should_RunTestsStartingWithShouldByDefault',
+                    'spec_ThisTestPassesWhenNormalSuiteSetupAndTeardownRan',
+                    'test_ShouldCallMockInitAndVerifyFunctionsForEachTest',
+                  ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'ShorterFilterOfJustTest',
+    :testfile => 'testdata/testRunnerGeneratorWithMocks.c',
+    :testdefines => ['TEST'],
+    :options => {
+      :test_prefix => "test",
+    },
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                    'test_ShouldCallMockInitAndVerifyFunctionsForEachTest',
+                  ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'ShorterFilterOfJustShould',
+    :testfile => 'testdata/testRunnerGeneratorWithMocks.c',
+    :testdefines => ['TEST'],
+    :options => {
+      :test_prefix => "should",
+    },
+    :expected => {
+      :to_pass => [ 'should_RunTestsStartingWithShouldByDefault' ],
+      :to_fail => [  ],
+      :to_ignore => [  ],
+    }
+  },
+
+  { :name => 'ShorterFilterOfJustSpec',
+    :testfile => 'testdata/testRunnerGeneratorWithMocks.c',
+    :testdefines => ['TEST'],
+    :options => {
+      :test_prefix => "spec",
+    },
+    :expected => {
+      :to_pass => [ 'spec_ThisTestPassesWhenNormalSetupRan',
+                    'spec_ThisTestPassesWhenNormalTeardownRan',
+                    'spec_ThisTestPassesWhenNormalSuiteSetupAndTeardownRan',
+                  ],
+      :to_fail => [  ],
+      :to_ignore => [  ],
+    }
+  },
+
+  { :name => 'InjectIncludes',
+    :testfile => 'testdata/testRunnerGeneratorWithMocks.c',
+    :testdefines => ['TEST'],
+    :options => {
+      :includes => ['Defs.h'],
+    },
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'spec_ThisTestPassesWhenNormalSetupRan',
+                    'spec_ThisTestPassesWhenNormalTeardownRan',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                    'should_RunTestsStartingWithShouldByDefault',
+                    'spec_ThisTestPassesWhenNormalSuiteSetupAndTeardownRan',
+                    'test_ShouldCallMockInitAndVerifyFunctionsForEachTest',
+                  ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'ParameterizedThroughOptions',
+    :testfile => 'testdata/testRunnerGeneratorWithMocks.c',
+    :testdefines => ['TEST'],
+    :options => {
+      :test_prefix => "paratest",
+      :use_param_tests => true,
+    },
+    :features => [ :parameterized ],
+    :expected => {
+      :to_pass => [ 'paratest_ShouldHandleParameterizedTests\(25\)',
+                    'paratest_ShouldHandleParameterizedTests\(125\)',
+                    'paratest_ShouldHandleParameterizedTests\(5\)',
+                    'paratest_ShouldHandleParameterizedTests2\(7\)',
+                    'paratest_ShouldHandleNonParameterizedTestsWhenParameterizationValid',
+                  ],
+      :to_fail => [ 'paratest_ShouldHandleParameterizedTestsThatFail\(17\)' ],
+      :to_ignore => [ ],
+    }
+  },
+
+  { :name => 'ParameterizedThroughCommandLine',
+    :testfile => 'testdata/testRunnerGeneratorWithMocks.c',
+    :testdefines => ['TEST'],
+    :cmdline => " --test_prefix=\"paratest\" --use_param_tests=1",
+    :features => [ :parameterized ],
+    :expected => {
+      :to_pass => [ 'paratest_ShouldHandleParameterizedTests\(25\)',
+                    'paratest_ShouldHandleParameterizedTests\(125\)',
+                    'paratest_ShouldHandleParameterizedTests\(5\)',
+                    'paratest_ShouldHandleParameterizedTests2\(7\)',
+                    'paratest_ShouldHandleNonParameterizedTestsWhenParameterizationValid',
+                  ],
+      :to_fail => [ 'paratest_ShouldHandleParameterizedTestsThatFail\(17\)' ],
+      :to_ignore => [ ],
+    }
+  },
+
+  { :name => 'ParameterizedThroughCommandLineAndYaml',
+    :testfile => 'testdata/testRunnerGeneratorWithMocks.c',
+    :testdefines => ['TEST'],
+    :cmdline => "--use_param_tests=1",
+    :yaml => {
+      :test_prefix => "paratest"
+    },
+    :features => [ :parameterized ],
+    :expected => {
+      :to_pass => [ 'paratest_ShouldHandleParameterizedTests\(25\)',
+                    'paratest_ShouldHandleParameterizedTests\(125\)',
+                    'paratest_ShouldHandleParameterizedTests\(5\)',
+                    'paratest_ShouldHandleParameterizedTests2\(7\)',
+                    'paratest_ShouldHandleNonParameterizedTestsWhenParameterizationValid',
+                  ],
+      :to_fail => [ 'paratest_ShouldHandleParameterizedTestsThatFail\(17\)' ],
+      :to_ignore => [ ],
+    }
+  },
+
+  { :name => 'CException',
+    :testfile => 'testdata/testRunnerGeneratorWithMocks.c',
+    :testdefines => ['TEST', 'USE_CEXCEPTION'],
+    :options => {
+      :test_prefix => "extest",
+      :plugins => [ :cexception ],
+    },
+    :expected => {
+      :to_pass => [ 'extest_ShouldHandleCExceptionInTest' ],
+      :to_fail => [ ],
+      :to_ignore => [ ],
+    }
+  },
+
+  { :name => 'CustomSetupAndTeardownThroughOptions',
+    :testfile => 'testdata/testRunnerGeneratorWithMocks.c',
+    :testdefines => ['TEST'],
+    :options => {
+      :test_prefix => "custtest|test",
+      :setup_name => "custom_setup",
+      :teardown_name => "custom_teardown",
+    },
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                    'custtest_ThisTestPassesWhenCustomSetupRan',
+                    'custtest_ThisTestPassesWhenCustomTeardownRan',
+                    'test_ShouldCallMockInitAndVerifyFunctionsForEachTest',
+                  ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'CustomSetupAndTeardownThroughCommandLine',
+    :testfile => 'testdata/testRunnerGeneratorWithMocks.c',
+    :testdefines => ['TEST'],
+    :cmdline => " --test_prefix=\"custtest|test\" --setup_name=\"custom_setup\" --teardown_name=\"custom_teardown\"",
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                    'custtest_ThisTestPassesWhenCustomSetupRan',
+                    'custtest_ThisTestPassesWhenCustomTeardownRan',
+                    'test_ShouldCallMockInitAndVerifyFunctionsForEachTest',
+                  ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'CustomSetupAndTeardownThroughYaml',
+    :testfile => 'testdata/testRunnerGeneratorWithMocks.c',
+    :testdefines => ['TEST'],
+    :cmdline => " --test_prefix=\"custtest|test\"",
+    :yaml => {
+      :setup_name => "custom_setup",
+      :teardown_name => "custom_teardown",
+    },
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                    'custtest_ThisTestPassesWhenCustomSetupRan',
+                    'custtest_ThisTestPassesWhenCustomTeardownRan',
+                    'test_ShouldCallMockInitAndVerifyFunctionsForEachTest',
+                  ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'CustomMain',
+    :testfile => 'testdata/testRunnerGeneratorWithMocks.c',
+    :testdefines => ['TEST', "USE_ANOTHER_MAIN"],
+    :options => {
+      :main_name => "custom_main",
+    },
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'spec_ThisTestPassesWhenNormalSetupRan',
+                    'spec_ThisTestPassesWhenNormalTeardownRan',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                    'should_RunTestsStartingWithShouldByDefault',
+                    'spec_ThisTestPassesWhenNormalSuiteSetupAndTeardownRan',
+                    'test_ShouldCallMockInitAndVerifyFunctionsForEachTest',
+                  ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'CustomSuiteSetupAndTeardown',
+    :testfile => 'testdata/testRunnerGeneratorWithMocks.c',
+    :testdefines => ['TEST'],
+    :includes => ['Defs.h'],
+    :options => {
+      :test_prefix    => "suitetest|test",
+      :suite_setup    => "  CounterSuiteSetup = 1;",
+      :suite_teardown => "  return num_failures;",
+    },
+    :expected =>  {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                    'suitetest_ThisTestPassesWhenCustomSuiteSetupAndTeardownRan',
+                    'test_ShouldCallMockInitAndVerifyFunctionsForEachTest',
+                  ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'MainExternDeclaration',
+    :testfile => 'testdata/testRunnerGeneratorWithMocks.c',
+    :testdefines => ['TEST'],
+    :includes => ['Defs.h'],
+    :options => {
+      :main_export_decl => "EXTERN_DECL",
+    },
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'spec_ThisTestPassesWhenNormalSetupRan',
+                    'spec_ThisTestPassesWhenNormalTeardownRan',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                    'should_RunTestsStartingWithShouldByDefault',
+                    'spec_ThisTestPassesWhenNormalSuiteSetupAndTeardownRan',
+                    'test_ShouldCallMockInitAndVerifyFunctionsForEachTest',
+                  ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+
+
+  #### WITH ARGS ##########################################
+
+  { :name => 'ArgsThroughOptions',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :options => {
+      :cmdline_args => true,
+    },
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'spec_ThisTestPassesWhenNormalSetupRan',
+                    'spec_ThisTestPassesWhenNormalTeardownRan',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                    'should_RunTestsStartingWithShouldByDefault',
+                    'spec_ThisTestPassesWhenNormalSuiteSetupAndTeardownRan',
+                  ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'ArgsThroughCommandLine',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :cmdline => "--cmdline_args=1",
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'spec_ThisTestPassesWhenNormalSetupRan',
+                    'spec_ThisTestPassesWhenNormalTeardownRan',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                    'should_RunTestsStartingWithShouldByDefault',
+                    'spec_ThisTestPassesWhenNormalSuiteSetupAndTeardownRan',
+                  ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'ArgsThroughYAMLFile',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :cmdline => "",
+    :yaml => {
+      :cmdline_args => true,
+    },
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'spec_ThisTestPassesWhenNormalSetupRan',
+                    'spec_ThisTestPassesWhenNormalTeardownRan',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                    'should_RunTestsStartingWithShouldByDefault',
+                    'spec_ThisTestPassesWhenNormalSuiteSetupAndTeardownRan',
+                  ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'ArgsNameFilterJustTest',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :options => {
+      :cmdline_args => true,
+    },
+    :cmdline_args => "-n test_",
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                  ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'ArgsNameFilterJustShould',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :options => {
+      :cmdline_args => true,
+    },
+    :cmdline_args => "-n should_",
+    :expected => {
+      :to_pass => [ 'should_RunTestsStartingWithShouldByDefault' ],
+      :to_fail => [  ],
+      :to_ignore => [  ],
+    }
+  },
+
+  { :name => 'ArgsNameFilterTestAndShould',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :options => {
+      :cmdline_args => true,
+    },
+    :cmdline_args => "-n should_,test_",
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                    'should_RunTestsStartingWithShouldByDefault' ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'ArgsNameFilterWithWildcardOnFile',
+    :testfile => 'testdata/testRunnerGeneratorSmall.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :options => {
+      :cmdline_args => true,
+    },
+    :cmdline_args => "-n=testRunnerGeneratorSma*",
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'spec_ThisTestPassesWhenNormalSetupRan',
+                    'spec_ThisTestPassesWhenNormalTeardownRan' ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'ArgsNameFilterWithWildcardAsName',
+    :testfile => 'testdata/testRunnerGeneratorSmall.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :options => {
+      :cmdline_args => true,
+    },
+    :cmdline_args => "-n testRunnerGeneratorSmall:*",
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'spec_ThisTestPassesWhenNormalSetupRan',
+                    'spec_ThisTestPassesWhenNormalTeardownRan' ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'ArgsNameFilterWithWildcardOnName',
+    :testfile => 'testdata/testRunnerGeneratorSmall.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :options => {
+      :cmdline_args => true,
+    },
+    :cmdline_args => "-n testRunnerGeneratorSmall:test_*",
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses' ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'ArgsNameFilterWithWildcardAndShortName',
+    :testfile => 'testdata/testRunnerGeneratorSmall.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :options => {
+      :cmdline_args => true,
+    },
+    :cmdline_args => "-n testRunnerGeneratorSmall:te*",
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses' ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'ArgsNameFilterWithWildcardOnBoth',
+    :testfile => 'testdata/testRunnerGeneratorSmall.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :options => {
+      :cmdline_args => true,
+    },
+    :cmdline_args => "-n testRunnerGeneratorSm*:*",
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'spec_ThisTestPassesWhenNormalSetupRan',
+                    'spec_ThisTestPassesWhenNormalTeardownRan' ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'ArgsExcludeFilterJustTest',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :options => {
+      :cmdline_args => true,
+    },
+    :cmdline_args => "-x test_",
+    :expected => {
+      :to_pass => [ 'spec_ThisTestPassesWhenNormalSetupRan',
+                    'spec_ThisTestPassesWhenNormalTeardownRan',
+                    'spec_ThisTestPassesWhenNormalSuiteSetupAndTeardownRan',
+                    'should_RunTestsStartingWithShouldByDefault',
+                  ],
+      :to_fail => [  ],
+      :to_ignore => [  ],
+    }
+  },
+
+  { :name => 'ArgsIncludeAndExcludeFilter',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :options => {
+      :cmdline_args => true,
+      :includes => ['Defs.h'],
+    },
+    :cmdline_args => "-n test_ -x Ignored",
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                  ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [  ],
+    }
+  },
+
+  { :name => 'ArgsIncludeSingleTest',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :options => {
+      :cmdline_args => true,
+    },
+    :cmdline_args => "-n ThisTestAlwaysPasses",
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses' ],
+      :to_fail => [ ],
+      :to_ignore => [ ],
+    }
+  },
+
+  { :name => 'ArgsIncludeSingleTestInSpecificFile',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :options => {
+      :cmdline_args => true,
+    },
+    :cmdline_args => "-n testRunnerGenerator:ThisTestAlwaysPasses",
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses' ],
+      :to_fail => [ ],
+      :to_ignore => [ ],
+    }
+  },
+
+  { :name => 'ArgsIncludeTestFileWithExtension',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :options => {
+      :cmdline_args => true,
+    },
+    :cmdline_args => "-n testRunnerGenerator.c:ThisTestAlwaysPasses",
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses' ],
+      :to_fail => [ ],
+      :to_ignore => [ ],
+    }
+  },
+
+  { :name => 'ArgsIncludeDoubleQuotes',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :options => {
+      :cmdline_args => true,
+    },
+    :cmdline_args => "-n \"testRunnerGenerator:ThisTestAlwaysPasses,test_ThisTestAlwaysFails\"",
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses' ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ ],
+    }
+  },
+
+  { :name => 'ArgsIncludeSingleQuotes',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :options => {
+      :cmdline_args => true,
+    },
+    :cmdline_args => "-n 'testRunnerGenerator:ThisTestAlwaysPasses,test_ThisTestAlwaysFails'",
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses' ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ ],
+    }
+  },
+
+  { :name => 'ArgsIncludeAValidTestForADifferentFile',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :options => {
+      :cmdline_args => true,
+    },
+    :cmdline_args => "-n AnotherFile:ThisTestDoesNotExist",
+    :expected => {
+      :to_pass => [ ],
+      :to_fail => [ ],
+      :to_ignore => [ ],
+    }
+  },
+
+  { :name => 'ArgsIncludeNoTests',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :options => {
+      :cmdline_args => true,
+    },
+    :cmdline_args => "-n ThisTestDoesNotExist",
+    :expected => {
+      :to_pass => [ ],
+      :to_fail => [ ],
+      :to_ignore => [ ],
+    }
+  },
+
+  { :name => 'ArgsExcludeAllTests',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :options => {
+      :cmdline_args => true,
+    },
+    :cmdline_args => "-x _",
+    :expected => {
+      :to_pass => [ ],
+      :to_fail => [ ],
+      :to_ignore => [ ],
+    }
+  },
+
+  { :name => 'ArgsIncludeFullFile',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :options => {
+      :cmdline_args => true,
+    },
+    :cmdline_args => "-n testRunnerGenerator",
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses',
+                    'spec_ThisTestPassesWhenNormalSetupRan',
+                    'spec_ThisTestPassesWhenNormalTeardownRan',
+                    'test_NotBeConfusedByLongComplicatedStrings',
+                    'test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings',
+                    'test_StillNotBeConfusedByLongComplicatedStrings',
+                    'should_RunTestsStartingWithShouldByDefault',
+                    'spec_ThisTestPassesWhenNormalSuiteSetupAndTeardownRan',
+                  ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ 'test_ThisTestAlwaysIgnored' ],
+    }
+  },
+
+  { :name => 'ArgsIncludeWithAlternateFlag',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :options => {
+      :cmdline_args => true,
+    },
+    :cmdline_args => "-f=\"testRunnerGenerator:ThisTestAlwaysPasses,test_ThisTestAlwaysFails\"",
+    :expected => {
+      :to_pass => [ 'test_ThisTestAlwaysPasses' ],
+      :to_fail => [ 'test_ThisTestAlwaysFails' ],
+      :to_ignore => [ ],
+    }
+  },
+
+  { :name => 'ArgsIncludeWithParameterized',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :cmdline => "--use_param_tests=1",
+    :yaml => {
+      :cmdline_args => true,
+      :test_prefix => "paratest"
+    },
+    :cmdline_args => "-n ShouldHandleParameterizedTests",
+    :features => [ :parameterized ],
+    :expected => {
+      :to_pass => [ 'paratest_ShouldHandleParameterizedTests\(25\)',
+                    'paratest_ShouldHandleParameterizedTests\(125\)',
+                    'paratest_ShouldHandleParameterizedTests\(5\)',
+                    'paratest_ShouldHandleParameterizedTests2\(7\)',
+                  ],
+      :to_fail => [ 'paratest_ShouldHandleParameterizedTestsThatFail\(17\)' ],
+      :to_ignore => [ ],
+    }
+  },
+
+  { :name => 'ArgsList',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :options => {
+      :cmdline_args => true,
+    },
+    :cmdline_args => "-l",
+    :expected => {
+      :to_pass => [ ],
+      :to_fail => [ ],
+      :to_ignore => [ ],
+      :text => [  "testRunnerGenerator",
+                  "test_ThisTestAlwaysPasses",
+                  "test_ThisTestAlwaysFails",
+                  "test_ThisTestAlwaysIgnored",
+                  "spec_ThisTestPassesWhenNormalSuiteSetupAndTeardownRan",
+                  "spec_ThisTestPassesWhenNormalSetupRan",
+                  "spec_ThisTestPassesWhenNormalTeardownRan",
+                  "test_NotBeConfusedByLongComplicatedStrings",
+                  "test_NotDisappearJustBecauseTheTestBeforeAndAfterHaveCrazyStrings",
+                  "test_StillNotBeConfusedByLongComplicatedStrings",
+                  "should_RunTestsStartingWithShouldByDefault"
+               ]
+    }
+  },
+
+  { :name => 'ArgsListParameterized',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :options => {
+      :test_prefix => "paratest",
+      :use_param_tests => true,
+      :cmdline_args => true,
+    },
+    :cmdline_args => "-l",
+    :features => [ :parameterized ],
+    :expected => {
+      :to_pass => [ ],
+      :to_fail => [ ],
+      :to_ignore => [ ],
+      :text => [  "testRunnerGenerator",
+                  'paratest_ShouldHandleParameterizedTests\(25\)',
+                  'paratest_ShouldHandleParameterizedTests\(125\)',
+                  'paratest_ShouldHandleParameterizedTests\(5\)',
+                  'paratest_ShouldHandleParameterizedTests2\(7\)',
+                  'paratest_ShouldHandleNonParameterizedTestsWhenParameterizationValid',
+                  'paratest_ShouldHandleParameterizedTestsThatFail\(17\)'
+               ],
+    }
+  },
+
+  { :name => 'ArgsIncompleteIncludeFlags',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :options => {
+      :cmdline_args => true,
+    },
+    :cmdline_args => "-n",
+    :expected => {
+      :to_pass => [ ],
+      :to_fail => [ ],
+      :to_ignore => [ ],
+      :text => [ "ERROR: No Test String to Include Matches For" ],
+    }
+  },
+
+  { :name => 'ArgsIncompleteExcludeFlags',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :options => {
+      :cmdline_args => true,
+    },
+    :cmdline_args => "-x",
+    :expected => {
+      :to_pass => [ ],
+      :to_fail => [ ],
+      :to_ignore => [ ],
+      :text => [ "ERROR: No Test String to Exclude Matches For" ],
+    }
+  },
+
+  { :name => 'ArgsIllegalFlags',
+    :testfile => 'testdata/testRunnerGenerator.c',
+    :testdefines => ['TEST', 'UNITY_USE_COMMAND_LINE_ARGS'],
+    :options => {
+      :cmdline_args => true,
+    },
+    :cmdline_args => "-z",
+    :expected => {
+      :to_pass => [ ],
+      :to_fail => [ ],
+      :to_ignore => [ ],
+      :text => [ "ERROR: Unknown Option z" ],
+    }
+  },
+]
+
+def runner_test(test, runner, expected, test_defines, cmdline_args, features)
+  # Tack on TEST define for compiling unit tests
+  load_configuration($cfg_file)
+
+  # Drop Out if we're skipping this type of test
+  if $cfg[:skip_tests] && features
+    if $cfg[:skip_tests].include?(:parameterized) && features.include?(:parameterized)
+      report("Skipping Parameterized Tests for this Target:IGNORE")
+      return true
+    end
+  end
+
+  #compile objects
+  obj_list = [
+    compile(runner, test_defines),
+    compile(test, test_defines),
+    compile('../src/unity.c', test_defines),
+  ]
+
+  # Link the test executable
+  test_base = File.basename(test, C_EXTENSION)
+  link_it(test_base, obj_list)
+
+  # Execute unit test and generate results file
+  output = runtest(test_base, true, cmdline_args)
+
+  #compare to the expected pass/fail
+  allgood = expected[:to_pass].inject(true)      {|s,v| s && verify_match(/#{v}:PASS/,   output) }
+  allgood = expected[:to_fail].inject(allgood)   {|s,v| s && verify_match(/#{v}:FAIL/,   output) }
+  allgood = expected[:to_ignore].inject(allgood) {|s,v| s && verify_match(/#{v}:IGNORE/, output) }
+
+  #verify there weren't more pass/fail/etc than expected
+  allgood &&= verify_number( expected[:to_pass],   /(:PASS)/,   output)
+  allgood &&= verify_number( expected[:to_fail],   /(:FAIL)/,   output)
+  allgood &&= verify_number( expected[:to_ignore], /(:IGNORE)/, output)
+
+  #if we care about any other text, check that too
+  if (expected[:text])
+    allgood = expected[:text].inject(allgood) {|s,v| s && verify_match(/#{v}/, output) }
+    allgood &&= verify_number( expected[:text], /.+/, output )
+  end
+
+  report output if (!allgood && !$verbose) #report failures if not already reporting everything
+  return allgood
+end
+
+def verify_match(expression, output)
+  if (expression =~ output)
+    return true
+  else
+    report "  FAIL: No Match For /#{expression.to_s}/"
+    return false
+  end
+end
+
+def verify_number(expected, expression, output)
+  exp = expected.length
+  act = output.scan(expression).length
+  if (exp == act)
+    return true
+  else
+    report "  FAIL: Expected #{exp} Matches For /#{expression.to_s}/. Was #{act}"
+    return false
+  end
+end
+
+RUNNER_TESTS.each do |testset|
+  basename = File.basename(testset[:testfile], C_EXTENSION)
+  testset_name = "Runner_#{basename}_#{testset[:name]}"
+  should testset_name do
+    runner_name = OUT_FILE + testset[:name] + '_runner.c'
+
+    #create a yaml file first if required
+    yaml_option = ""
+    if (testset[:yaml])
+      File.open("build/runner_options.yml",'w') {|f| f << { :unity => testset[:yaml] }.to_yaml }
+      yaml_option = "build/runner_options.yml"
+    end
+
+    #run script via command line or through hash function call, as requested
+    if (testset[:cmdline])
+      cmdstr = "ruby ../auto/generate_test_runner.rb #{yaml_option} #{testset[:cmdline]} \"#{testset[:testfile]}\" \"#{runner_name}\""
+      `#{cmdstr}`
+    else
+      UnityTestRunnerGenerator.new(testset[:options]).run(testset[:testfile], runner_name)
+    end
+
+    #test the script against the specified test file and check results
+    if (runner_test(testset[:testfile], runner_name, testset[:expected], testset[:testdefines], testset[:cmdline_args], testset[:features]))
+      report "#{testset_name}:PASS"
+    else
+      report "#{testset_name}:FAIL"
+      $generate_test_runner_failures += 1
+    end
+    $generate_test_runner_tests += 1
+  end
+end
+
+raise "There were #{$generate_test_runner_failures.to_s} failures while testing generate_test_runner.rb" if ($generate_test_runner_failures > 0)
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_unity_arrays.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_unity_arrays.c
new file mode 100644
index 000000000..ff90a6c42
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_unity_arrays.c
@@ -0,0 +1,2874 @@
+/* ==========================================
+    Unity Project - A Test Framework for C
+    Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+========================================== */
+
+#include "unity.h"
+#define TEST_INSTANCES
+#include "self_assessment_utils.h"
+
+static int SetToOneToFailInTearDown;
+static int SetToOneMeanWeAlreadyCheckedThisGuy;
+
+void setUp(void)
+{
+    SetToOneToFailInTearDown = 0;
+    SetToOneMeanWeAlreadyCheckedThisGuy = 0;
+}
+
+void tearDown(void)
+{
+    endPutcharSpy(); /* Stop suppressing test output */
+    if (SetToOneToFailInTearDown == 1)
+    {
+        /* These will be skipped internally if already failed/ignored */
+        TEST_FAIL_MESSAGE("<= Failed in tearDown");
+        TEST_IGNORE_MESSAGE("<= Ignored in tearDown");
+    }
+    if ((SetToOneMeanWeAlreadyCheckedThisGuy == 0) && (Unity.CurrentTestFailed > 0))
+    {
+        UnityPrint(": [[[[ Test Should Have Passed But Did Not ]]]]");
+        UNITY_OUTPUT_CHAR('\n');
+    }
+}
+
+void testInt64ArrayWithinDelta(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 expected[] = {12345000, -12344995, 12345005};
+    UNITY_INT64 actualSmallDelta[] = {12345001, -12344996, 12345005};
+    UNITY_INT64 actualBigDelta[] = {12345101, -12344896, 12345055};
+
+    TEST_ASSERT_INT64_ARRAY_WITHIN(1, expected, actualSmallDelta, 3);
+    TEST_ASSERT_INT64_ARRAY_WITHIN(110, expected, actualBigDelta, 3);
+#endif
+}
+
+void testInt64ArrayWithinDeltaAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 expected[] = {12345000, -12344995, 12345005};
+    UNITY_INT64 actualSmallDelta[] = {12345001, -12344996, 12345005};
+    UNITY_INT64 actualBigDelta[] = {12345101, -12344896, 12345055};
+
+    TEST_ASSERT_INT64_ARRAY_WITHIN_MESSAGE(1, expected, actualSmallDelta, 3, "Custom Message.");
+    TEST_ASSERT_INT64_ARRAY_WITHIN_MESSAGE(110, expected, actualBigDelta, 3, "Custom Message.");
+#endif
+}
+
+void tesUInt64ArrayNotWithinDelta(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 expected[] = {12345000, -12344995, 12345005};
+    UNITY_INT64 actualBigDelta[] = {12345101, -12344896, 12345055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT64_ARRAY_WITHIN(1, expected, actualBigDelta, 3);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testInt64ArrayNotWithinDeltaAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 expected[] = {12345000, -12344995, 12345005};
+    UNITY_INT64 actualBigDelta[] = {12345101, -12344896, 12345055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT64_ARRAY_WITHIN_MESSAGE(1, expected, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+#endif
+}
+
+void testInt64ArrayWithinDeltaPointless(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 expected[] = {12345000, -12344995, 12345005};
+    UNITY_INT64 actualBigDelta[] = {12345101, -12344896, 12345055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT64_ARRAY_WITHIN(110, expected, actualBigDelta, 0);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testInt64ArrayWithinDeltaPointlessAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 expected[] = {12345000, -12344995, 12345005};
+    UNITY_INT64 actualBigDelta[] = {12345101, -12344896, 12345055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT64_ARRAY_WITHIN_MESSAGE(110, expected, actualBigDelta, 0, "Custom Message.");
+    VERIFY_FAILS_END
+#endif
+}
+
+void testInt64ArrayWithinDeltaExpectedNull(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 actualBigDelta[] = {12345101, -12344896, 12345055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT64_ARRAY_WITHIN(110, NULL, actualBigDelta, 3);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testInt64ArrayWithinDeltaExpectedNullAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 actualBigDelta[] = {12345101, -12344896, 12345055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT64_ARRAY_WITHIN_MESSAGE(110, NULL, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+#endif
+}
+
+void testInt64ArrayWithinDeltaActualNull(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 expected[] = {12345000, -12344995, 12345005};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT64_ARRAY_WITHIN(110, expected, NULL, 3);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testInt64ArrayWithinDeltaActualNullAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 expected[] = {12345000, -12344995, 12345005};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT64_ARRAY_WITHIN_MESSAGE(110, expected, NULL, 3, "Custom Message.");
+    VERIFY_FAILS_END
+#endif
+}
+
+void testInt64ArrayWithinDeltaSamePointer(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 expected[] = {12345000, -12344995, 12345005};
+
+    TEST_ASSERT_UINT64_ARRAY_WITHIN(110, expected, expected, 3);
+#endif
+}
+
+void testInt64ArrayWithinDeltaSamePointerAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 expected[] = {12345000, -12344995, 12345005};
+
+    TEST_ASSERT_INT64_ARRAY_WITHIN_MESSAGE(110, expected, expected, 3, "Custom Message.");
+#endif
+}
+
+void testIntArrayWithinDelta(void)
+{
+    UNITY_INT expected[] = {5000, -4995, 5005};
+    UNITY_INT actualSmallDelta[] = {5001, -4996, 5005};
+    UNITY_INT actualBigDelta[] = {5101, -4896, 5055};
+
+    TEST_ASSERT_INT_ARRAY_WITHIN(1, expected, actualSmallDelta, 3);
+    TEST_ASSERT_INT_ARRAY_WITHIN(110, expected, actualBigDelta, 3);
+}
+
+void testIntArrayWithinDeltaAndMessage(void)
+{
+    UNITY_INT expected[] = {5000, -4995, 5005};
+    UNITY_INT actualSmallDelta[] = {5001, -4996, 5005};
+    UNITY_INT actualBigDelta[] = {5101, -4896, 5055};
+
+    TEST_ASSERT_INT_ARRAY_WITHIN_MESSAGE(1, expected, actualSmallDelta, 3, "Custom Message.");
+    TEST_ASSERT_INT_ARRAY_WITHIN_MESSAGE(110, expected, actualBigDelta, 3, "Custom Message.");
+}
+
+void testIntArrayNotWithinDelta(void)
+{
+    UNITY_INT expected[] = {5000, -4995, 5005};
+    UNITY_INT actualBigDelta[] = {5101, -4896, 5055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT_ARRAY_WITHIN(1, expected, actualBigDelta, 3);
+    VERIFY_FAILS_END
+}
+
+void testIntArrayNotWithinDeltaAndMessage(void)
+{
+    UNITY_INT expected[] = {5000, -4995, 5005};
+    UNITY_INT actualBigDelta[] = {5101, -4896, 5055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT_ARRAY_WITHIN_MESSAGE(1, expected, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testIntArrayWithinDeltaPointless(void)
+{
+    UNITY_INT expected[] = {5000, -4995, 5005};
+    UNITY_INT actualBigDelta[] = {5101, -4896, 5055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT_ARRAY_WITHIN(110, expected, actualBigDelta, 0);
+    VERIFY_FAILS_END
+}
+
+void testIntArrayWithinDeltaPointlessAndMessage(void)
+{
+    UNITY_INT expected[] = {5000, -4995, 5005};
+    UNITY_INT actualBigDelta[] = {5101, -4896, 5055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT_ARRAY_WITHIN_MESSAGE(110, expected, actualBigDelta, 0, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testIntArrayWithinDeltaExpectedNull(void)
+{
+    UNITY_INT actualBigDelta[] = {5101, -4896, 5055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT_ARRAY_WITHIN(110, NULL, actualBigDelta, 3);
+    VERIFY_FAILS_END
+}
+
+void testIntArrayWithinDeltaExpectedNullAndMessage(void)
+{
+    UNITY_INT actualBigDelta[] = {5101, -4896, 5055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT_ARRAY_WITHIN_MESSAGE(110, NULL, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testIntArrayWithinDeltaActualNull(void)
+{
+    UNITY_INT expected[] = {5000, -4995, 5005};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT_ARRAY_WITHIN(110, expected, NULL, 3);
+    VERIFY_FAILS_END
+}
+
+void testIntArrayWithinDeltaActualNullAndMessage(void)
+{
+    UNITY_INT expected[] = {5000, -4995, 5005};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT_ARRAY_WITHIN_MESSAGE(110, expected, NULL, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testIntArrayWithinDeltaSamePointer(void)
+{
+    UNITY_INT expected[] = {5000, -4995, 5005};
+
+    TEST_ASSERT_INT_ARRAY_WITHIN(110, expected, expected, 3);
+}
+
+void testIntArrayWithinDeltaSamePointerAndMessage(void)
+{
+    UNITY_INT expected[] = {5000, -4995, 5005};
+
+    TEST_ASSERT_INT_ARRAY_WITHIN_MESSAGE(110, expected, expected, 3, "Custom Message.");
+}
+
+void testInt16ArrayWithinDelta(void)
+{
+    UNITY_INT16 expected[] = {5000, -4995, 5005};
+    UNITY_INT16 actualSmallDelta[] = {5001, -4996, 5005};
+    UNITY_INT16 actualBigDelta[] = {5101, -4896, 5055};
+
+    TEST_ASSERT_INT16_ARRAY_WITHIN(1, expected, actualSmallDelta, 3);
+    TEST_ASSERT_INT16_ARRAY_WITHIN(110, expected, actualBigDelta, 3);
+}
+
+void testInt16ArrayWithinDeltaAndMessage(void)
+{
+    UNITY_INT16 expected[] = {5000, -4995, 5005};
+    UNITY_INT16 actualSmallDelta[] = {5001, -4996, 5005};
+    UNITY_INT16 actualBigDelta[] = {5101, -4896, 5055};
+
+    TEST_ASSERT_INT16_ARRAY_WITHIN_MESSAGE(1, expected, actualSmallDelta, 3, "Custom Message.");
+    TEST_ASSERT_INT16_ARRAY_WITHIN_MESSAGE(110, expected, actualBigDelta, 3, "Custom Message.");
+}
+
+void testInt16ArrayNotWithinDelta(void)
+{
+    UNITY_INT16 expected[] = {5000, -4995, 5005};
+    UNITY_INT16 actualBigDelta[] = {5101, -4896, 5055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT16_ARRAY_WITHIN(1, expected, actualBigDelta, 3);
+    VERIFY_FAILS_END
+}
+
+void testInt16ArrayNotWithinDeltaAndMessage(void)
+{
+    UNITY_INT16 expected[] = {5000, -4995, 5005};
+    UNITY_INT16 actualBigDelta[] = {5101, -4896, 5055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT16_ARRAY_WITHIN_MESSAGE(1, expected, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testInt16ArrayWithinDeltaPointless(void)
+{
+    UNITY_INT16 expected[] = {5000, -4995, 5005};
+    UNITY_INT16 actualBigDelta[] = {5101, -4896, 5055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT16_ARRAY_WITHIN(110, expected, actualBigDelta, 0);
+    VERIFY_FAILS_END
+}
+
+void testInt16ArrayWithinDeltaPointlessAndMessage(void)
+{
+    UNITY_INT16 expected[] = {5000, -4995, 5005};
+    UNITY_INT16 actualBigDelta[] = {5101, -4896, 5055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT16_ARRAY_WITHIN_MESSAGE(110, expected, actualBigDelta, 0, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testInt16ArrayWithinDeltaExpectedNull(void)
+{
+    UNITY_INT16 actualBigDelta[] = {5101, -4896, 5055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT16_ARRAY_WITHIN(110, NULL, actualBigDelta, 3);
+    VERIFY_FAILS_END
+}
+
+void testInt16ArrayWithinDeltaExpectedNullAndMessage(void)
+{
+    UNITY_INT16 actualBigDelta[] = {5101, -4896, 5055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT16_ARRAY_WITHIN_MESSAGE(110, NULL, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testInt16ArrayWithinDeltaActualNull(void)
+{
+    UNITY_INT16 expected[] = {5000, -4995, 5005};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT16_ARRAY_WITHIN(110, expected, NULL, 3);
+    VERIFY_FAILS_END
+}
+
+void testInt16ArrayWithinDeltaActualNullAndMessage(void)
+{
+    UNITY_INT16 expected[] = {5000, -4995, 5005};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT16_ARRAY_WITHIN_MESSAGE(110, expected, NULL, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testInt16ArrayWithinDeltaSamePointer(void)
+{
+    UNITY_INT16 expected[] = {5000, -4995, 5005};
+
+    TEST_ASSERT_INT16_ARRAY_WITHIN(110, expected, expected, 3);
+}
+
+void testInt16ArrayWithinDeltaSamePointerAndMessage(void)
+{
+    UNITY_INT16 expected[] = {5000, -4995, 5005};
+
+    TEST_ASSERT_INT16_ARRAY_WITHIN_MESSAGE(110, expected, expected, 3, "Custom Message.");
+}
+
+void testInt8ArrayWithinDelta(void)
+{
+    UNITY_INT8 expected[] = {20, -95, 55};
+    UNITY_INT8 actualSmallDelta[] = {21, -94, 55};
+    UNITY_INT8 actualBigDelta[] = {11, -86, 45};
+
+    TEST_ASSERT_INT8_ARRAY_WITHIN(1, expected, actualSmallDelta, 3);
+    TEST_ASSERT_INT8_ARRAY_WITHIN(11, expected, actualBigDelta, 3);
+}
+
+void testInt8ArrayWithinDeltaAndMessage(void)
+{
+    UNITY_INT8 expected[] = {20, -95, 55};
+    UNITY_INT8 actualSmallDelta[] = {21, -94, 55};
+    UNITY_INT8 actualBigDelta[] = {11, -86, 45};
+
+    TEST_ASSERT_INT8_ARRAY_WITHIN_MESSAGE(1, expected, actualSmallDelta, 3, "Custom Message.");
+    TEST_ASSERT_INT8_ARRAY_WITHIN_MESSAGE(11, expected, actualBigDelta, 3, "Custom Message.");
+}
+
+void testInt8ArrayNotWithinDelta(void)
+{
+    UNITY_INT8 expected[] = {20, -95, 55};
+    UNITY_INT8 actualBigDelta[] = {11, -86, 45};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT8_ARRAY_WITHIN(1, expected, actualBigDelta, 3);
+    VERIFY_FAILS_END
+}
+
+void testInt8ArrayNotWithinDeltaAndMessage(void)
+{
+    UNITY_INT8 expected[] = {20, -95, 55};
+    UNITY_INT8 actualBigDelta[] = {11, -86, 45};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT8_ARRAY_WITHIN_MESSAGE(1, expected, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testInt8ArrayWithinDeltaPointless(void)
+{
+    UNITY_INT8 expected[] = {20, -95, 55};
+    UNITY_INT8 actualBigDelta[] = {11, -86, 45};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT8_ARRAY_WITHIN(11, expected, actualBigDelta, 0);
+    VERIFY_FAILS_END
+}
+
+void testInt8ArrayWithinDeltaPointlessAndMessage(void)
+{
+    UNITY_INT8 expected[] = {20, -95, 55};
+    UNITY_INT8 actualBigDelta[] = {11, -86, 45};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT8_ARRAY_WITHIN_MESSAGE(11, expected, actualBigDelta, 0, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testInt8ArrayWithinDeltaExpectedNull(void)
+{
+    UNITY_INT8 actualBigDelta[] = {11, -86, 45};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT8_ARRAY_WITHIN(11, NULL, actualBigDelta, 3);
+    VERIFY_FAILS_END
+}
+
+void testInt8ArrayWithinDeltaExpectedNullAndMessage(void)
+{
+    UNITY_INT8 actualBigDelta[] = {11, -86, 45};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT8_ARRAY_WITHIN_MESSAGE(11, NULL, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testInt8ArrayWithinDeltaActualNull(void)
+{
+    UNITY_INT8 expected[] = {20, -95, 55};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT8_ARRAY_WITHIN(11, expected, NULL, 3);
+    VERIFY_FAILS_END
+}
+
+void testInt8ArrayWithinDeltaActualNullAndMessage(void)
+{
+    UNITY_INT8 expected[] = {20, -95, 55};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT8_ARRAY_WITHIN_MESSAGE(11, expected, NULL, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testInt8ArrayWithinDeltaSamePointer(void)
+{
+    UNITY_INT8 expected[] = {20, -95, 55};
+
+    TEST_ASSERT_INT8_ARRAY_WITHIN(11, expected, expected, 3);
+}
+
+void testInt8ArrayWithinDeltaSamePointerAndMessage(void)
+{
+    UNITY_INT8 expected[] = {20, -95, 55};
+
+    TEST_ASSERT_INT8_ARRAY_WITHIN_MESSAGE(11, expected, expected, 3, "Custom Message.");
+}
+
+void testCHARArrayWithinDelta(void)
+{
+    char expected[] = {20, -95, 55};
+    char actualSmallDelta[] = {21, -94, 55};
+    char actualBigDelta[] = {11, -86, 45};
+
+    TEST_ASSERT_CHAR_ARRAY_WITHIN(1, expected, actualSmallDelta, 3);
+    TEST_ASSERT_CHAR_ARRAY_WITHIN(11, expected, actualBigDelta, 3);
+}
+
+void testCHARArrayWithinDeltaAndMessage(void)
+{
+    char expected[] = {20, -95, 55};
+    char actualSmallDelta[] = {21, -94, 55};
+    char actualBigDelta[] = {11, -86, 45};
+
+    TEST_ASSERT_CHAR_ARRAY_WITHIN_MESSAGE(1, expected, actualSmallDelta, 3, "Custom Message.");
+    TEST_ASSERT_CHAR_ARRAY_WITHIN_MESSAGE(11, expected, actualBigDelta, 3, "Custom Message.");
+}
+
+void testCHARArrayNotWithinDelta(void)
+{
+    char expected[] = {20, -95, 55};
+    char actualBigDelta[] = {11, -86, 45};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_CHAR_ARRAY_WITHIN(1, expected, actualBigDelta, 3);
+    VERIFY_FAILS_END
+}
+
+void testCHARArrayNotWithinDeltaAndMessage(void)
+{
+    char expected[] = {20, -95, 55};
+    char actualBigDelta[] = {11, -86, 45};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_CHAR_ARRAY_WITHIN_MESSAGE(1, expected, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testCHARArrayWithinDeltaPointless(void)
+{
+    char expected[] = {20, -95, 55};
+    char actualBigDelta[] = {11, -86, 45};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_CHAR_ARRAY_WITHIN(11, expected, actualBigDelta, 0);
+    VERIFY_FAILS_END
+}
+
+void testCHARArrayWithinDeltaPointlessAndMessage(void)
+{
+    char expected[] = {20, -95, 55};
+    char actualBigDelta[] = {11, -86, 45};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_CHAR_ARRAY_WITHIN_MESSAGE(11, expected, actualBigDelta, 0, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testCHARArrayWithinDeltaExpectedNull(void)
+{
+    char actualBigDelta[] = {11, -86, 45};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_CHAR_ARRAY_WITHIN(11, NULL, actualBigDelta, 3);
+    VERIFY_FAILS_END
+}
+
+void testCHARArrayWithinDeltaExpectedNullAndMessage(void)
+{
+    char actualBigDelta[] = {11, -86, 45};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_CHAR_ARRAY_WITHIN_MESSAGE(11, NULL, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testCHARArrayWithinDeltaActualNull(void)
+{
+    char expected[] = {20, -95, 55};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_CHAR_ARRAY_WITHIN(11, expected, NULL, 3);
+    VERIFY_FAILS_END
+}
+
+void testCHARArrayWithinDeltaActualNullAndMessage(void)
+{
+    char expected[] = {20, -95, 55};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_CHAR_ARRAY_WITHIN_MESSAGE(11, expected, NULL, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testCHARArrayWithinDeltaSamePointer(void)
+{
+    char expected[] = {20, -95, 55};
+
+    TEST_ASSERT_CHAR_ARRAY_WITHIN(11, expected, expected, 3);
+}
+
+void testCHARArrayWithinDeltaSamePointerAndMessage(void)
+{
+    char expected[] = {20, -95, 55};
+
+    TEST_ASSERT_CHAR_ARRAY_WITHIN_MESSAGE(11, expected, expected, 3, "Custom Message.");
+}
+
+void testUInt64ArrayWithinDelta(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {12345000, 12344995, 12345005};
+    UNITY_UINT64 actualSmallDelta[] = {12345001, 12344996, 12345005};
+    UNITY_UINT64 actualBigDelta[] = {12345101, 12344896, 12345055};
+
+    TEST_ASSERT_UINT64_ARRAY_WITHIN(1, expected, actualSmallDelta, 3);
+    TEST_ASSERT_UINT64_ARRAY_WITHIN(110, expected, actualBigDelta, 3);
+#endif
+}
+
+void testUInt64ArrayWithinDeltaAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {12345000, 12344995, 12345005};
+    UNITY_UINT64 actualSmallDelta[] = {12345001, 12344996, 12345005};
+    UNITY_UINT64 actualBigDelta[] = {12345101, 12344896, 12345055};
+
+    TEST_ASSERT_UINT64_ARRAY_WITHIN_MESSAGE(1, expected, actualSmallDelta, 3, "Custom Message.");
+    TEST_ASSERT_UINT64_ARRAY_WITHIN_MESSAGE(110, expected, actualBigDelta, 3, "Custom Message.");
+#endif
+}
+
+void testUInt64ArrayNotWithinDelta(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {12345000, 12344995, 12345005};
+    UNITY_UINT64 actualBigDelta[] = {12345101, 12344896, 12345055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT64_ARRAY_WITHIN(1, expected, actualBigDelta, 3);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testUInt64ArrayNotWithinDeltaAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {12345000, 12344995, 12345005};
+    UNITY_UINT64 actualBigDelta[] = {12345101, 12344896, 12345055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT64_ARRAY_WITHIN_MESSAGE(1, expected, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+#endif
+}
+
+void testUInt64ArrayWithinDeltaPointless(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {12345000, 12344995, 12345005};
+    UNITY_UINT64 actualBigDelta[] = {12345101, 12344896, 12345055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT64_ARRAY_WITHIN(110, expected, actualBigDelta, 0);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testUInt64ArrayWithinDeltaPointlessAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {12345000, 12344995, 12345005};
+    UNITY_UINT64 actualBigDelta[] = {12345101, 12344896, 12345055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT64_ARRAY_WITHIN_MESSAGE(110, expected, actualBigDelta, 0, "Custom Message.");
+    VERIFY_FAILS_END
+#endif
+}
+
+void testUInt64ArrayWithinDeltaExpectedNull(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 actualBigDelta[] = {12345101, 12344896, 12345055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT64_ARRAY_WITHIN(110, NULL, actualBigDelta, 3);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testUInt64ArrayWithinDeltaExpectedNullAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 actualBigDelta[] = {12345101, 12344896, 12345055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT64_ARRAY_WITHIN_MESSAGE(110, NULL, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+#endif
+}
+
+void testUInt64ArrayWithinDeltaActualNull(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {12345000, 12344995, 12345005};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT64_ARRAY_WITHIN(110, expected, NULL, 3);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testUInt64ArrayWithinDeltaActualNullAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {12345000, 12344995, 12345005};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT64_ARRAY_WITHIN_MESSAGE(110, expected, NULL, 3, "Custom Message.");
+    VERIFY_FAILS_END
+#endif
+}
+
+void testUInt64ArrayWithinDeltaSamePointer(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {12345000, 12344995, 12345005};
+
+    TEST_ASSERT_UINT64_ARRAY_WITHIN(110, expected, expected, 3);
+#endif
+}
+
+void testUInt64ArrayWithinDeltaSamePointerAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {12345000, 12344995, 12345005};
+
+    TEST_ASSERT_UINT64_ARRAY_WITHIN_MESSAGE(110, expected, expected, 3, "Custom Message.");
+#endif
+}
+
+void testUIntArrayWithinDelta(void)
+{
+    UNITY_UINT expected[] = {125000, 124995, 125005};
+    UNITY_UINT actualSmallDelta[] = {125001, 124996, 125005};
+    UNITY_UINT actualBigDelta[] = {125101, 124896, 125055};
+
+    TEST_ASSERT_UINT_ARRAY_WITHIN(1, expected, actualSmallDelta, 3);
+    TEST_ASSERT_UINT_ARRAY_WITHIN(110, expected, actualBigDelta, 3);
+}
+
+void testUIntArrayWithinDeltaAndMessage(void)
+{
+    UNITY_UINT expected[] = {125000, 124995, 125005};
+    UNITY_UINT actualSmallDelta[] = {125001, 124996, 125005};
+    UNITY_UINT actualBigDelta[] = {125101, 124896, 125055};
+
+    TEST_ASSERT_UINT_ARRAY_WITHIN_MESSAGE(1, expected, actualSmallDelta, 3, "Custom Message.");
+    TEST_ASSERT_UINT_ARRAY_WITHIN_MESSAGE(110, expected, actualBigDelta, 3, "Custom Message.");
+}
+
+void testUIntArrayNotWithinDelta(void)
+{
+    UNITY_UINT expected[] = {125000, 124995, 125005};
+    UNITY_UINT actualBigDelta[] = {125101, 124896, 125055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT_ARRAY_WITHIN(1, expected, actualBigDelta, 3);
+    VERIFY_FAILS_END
+}
+
+void testUIntArrayNotWithinDeltaAndMessage(void)
+{
+    UNITY_UINT expected[] = {125000, 124995, 125005};
+    UNITY_UINT actualBigDelta[] = {125101, 124896, 125055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT_ARRAY_WITHIN_MESSAGE(1, expected, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testUIntArrayWithinDeltaPointless(void)
+{
+    UNITY_UINT expected[] = {125000, 124995, 125005};
+    UNITY_UINT actualBigDelta[] = {125101, 124896, 125055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT_ARRAY_WITHIN(110, expected, actualBigDelta, 0);
+    VERIFY_FAILS_END
+}
+
+void testUIntArrayWithinDeltaPointlessAndMessage(void)
+{
+    UNITY_UINT expected[] = {125000, 124995, 125005};
+    UNITY_UINT actualBigDelta[] = {125101, 124896, 125055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT_ARRAY_WITHIN_MESSAGE(110, expected, actualBigDelta, 0, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testUIntArrayWithinDeltaExpectedNull(void)
+{
+    UNITY_UINT actualBigDelta[] = {125101, 124896, 125055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT_ARRAY_WITHIN(110, NULL, actualBigDelta, 3);
+    VERIFY_FAILS_END
+}
+
+void testUIntArrayWithinDeltaExpectedNullAndMessage(void)
+{
+    UNITY_UINT actualBigDelta[] = {125101, 124896, 125055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT_ARRAY_WITHIN_MESSAGE(110, NULL, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testUIntArrayWithinDeltaActualNull(void)
+{
+    UNITY_UINT expected[] = {125000, 124995, 125005};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT_ARRAY_WITHIN(110, expected, NULL, 3);
+    VERIFY_FAILS_END
+}
+
+void testUIntArrayWithinDeltaActualNullAndMessage(void)
+{
+    UNITY_UINT expected[] = {125000, 124995, 125005};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT_ARRAY_WITHIN_MESSAGE(110, expected, NULL, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testUIntArrayWithinDeltaSamePointer(void)
+{
+    UNITY_UINT expected[] = {125000, 124995, 125005};
+
+    TEST_ASSERT_UINT_ARRAY_WITHIN(110, expected, expected, 3);
+}
+
+void testUIntArrayWithinDeltaSamePointerAndMessage(void)
+{
+    UNITY_UINT expected[] = {125000, 124995, 125005};
+
+    TEST_ASSERT_UINT_ARRAY_WITHIN_MESSAGE(110, expected, expected, 3, "Custom Message.");
+}
+
+void testUInt16ArrayWithinDelta(void)
+{
+    UNITY_UINT16 expected[] = {5000, 4995, 5005};
+    UNITY_UINT16 actualSmallDelta[] = {5001, 4996, 5005};
+    UNITY_UINT16 actualBigDelta[] = {5101, 4896, 5055};
+
+    TEST_ASSERT_UINT16_ARRAY_WITHIN(1, expected, actualSmallDelta, 3);
+    TEST_ASSERT_UINT16_ARRAY_WITHIN(110, expected, actualBigDelta, 3);
+}
+
+void testUInt16ArrayWithinDeltaAndMessage(void)
+{
+    UNITY_UINT16 expected[] = {5000, 4995, 5005};
+    UNITY_UINT16 actualSmallDelta[] = {5001, 4996, 5005};
+    UNITY_UINT16 actualBigDelta[] = {5101, 4896, 5055};
+
+    TEST_ASSERT_UINT16_ARRAY_WITHIN_MESSAGE(1, expected, actualSmallDelta, 3, "Custom Message.");
+    TEST_ASSERT_UINT16_ARRAY_WITHIN_MESSAGE(110, expected, actualBigDelta, 3, "Custom Message.");
+}
+
+void testUInt16ArrayNotWithinDelta(void)
+{
+    UNITY_UINT16 expected[] = {5000, 4995, 5005};
+    UNITY_UINT16 actualBigDelta[] = {5101, 4896, 5055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT16_ARRAY_WITHIN(1, expected, actualBigDelta, 3);
+    VERIFY_FAILS_END
+}
+
+void testUInt16ArrayNotWithinDeltaAndMessage(void)
+{
+    UNITY_UINT16 expected[] = {5000, 4995, 5005};
+    UNITY_UINT16 actualBigDelta[] = {5101, 4896, 5055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT16_ARRAY_WITHIN_MESSAGE(1, expected, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testUInt16ArrayWithinDeltaPointless(void)
+{
+    UNITY_UINT16 expected[] = {5000, 4995, 5005};
+    UNITY_UINT16 actualBigDelta[] = {5101, 4896, 5055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT16_ARRAY_WITHIN(110, expected, actualBigDelta, 0);
+    VERIFY_FAILS_END
+}
+
+void testUInt16ArrayWithinDeltaPointlessAndMessage(void)
+{
+    UNITY_UINT16 expected[] = {5000, 4995, 5005};
+    UNITY_UINT16 actualBigDelta[] = {5101, 4896, 5055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT16_ARRAY_WITHIN_MESSAGE(110, expected, actualBigDelta, 0, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testUInt16ArrayWithinDeltaExpectedNull(void)
+{
+    UNITY_UINT16 actualBigDelta[] = {5101, 4896, 5055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT16_ARRAY_WITHIN(110, NULL, actualBigDelta, 3);
+    VERIFY_FAILS_END
+}
+
+void testUInt16ArrayWithinDeltaExpectedNullAndMessage(void)
+{
+    UNITY_UINT16 actualBigDelta[] = {5101, 4896, 5055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT16_ARRAY_WITHIN_MESSAGE(110, NULL, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testUInt16ArrayWithinDeltaActualNull(void)
+{
+    UNITY_UINT16 expected[] = {5000, 4995, 5005};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT16_ARRAY_WITHIN(110, expected, NULL, 3);
+    VERIFY_FAILS_END
+}
+
+void testUInt16ArrayWithinDeltaActualNullAndMessage(void)
+{
+    UNITY_UINT16 expected[] = {5000, 4995, 5005};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT16_ARRAY_WITHIN_MESSAGE(110, expected, NULL, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testUInt16ArrayWithinDeltaSamePointer(void)
+{
+    UNITY_UINT16 expected[] = {5000, 4995, 5005};
+
+    TEST_ASSERT_UINT16_ARRAY_WITHIN(110, expected, expected, 3);
+}
+
+void testUInt16ArrayWithinDeltaSamePointerAndMessage(void)
+{
+    UNITY_UINT16 expected[] = {5000, 4995, 5005};
+
+    TEST_ASSERT_UINT16_ARRAY_WITHIN_MESSAGE(110, expected, expected, 3, "Custom Message.");
+}
+
+void testUInt8ArrayWithinDelta(void)
+{
+    UNITY_UINT8 expected[] = {20, 95, 55};
+    UNITY_UINT8 actualSmallDelta[] = {21, 94, 55};
+    UNITY_UINT8 actualBigDelta[] = {11, 86, 45};
+
+    TEST_ASSERT_UINT8_ARRAY_WITHIN(1, expected, actualSmallDelta, 3);
+    TEST_ASSERT_UINT8_ARRAY_WITHIN(11, expected, actualBigDelta, 3);
+}
+
+void testUInt8ArrayWithinDeltaAndMessage(void)
+{
+    UNITY_UINT8 expected[] = {20, 95, 55};
+    UNITY_UINT8 actualSmallDelta[] = {21, 94, 55};
+    UNITY_UINT8 actualBigDelta[] = {11, 86, 45};
+
+    TEST_ASSERT_UINT8_ARRAY_WITHIN_MESSAGE(1, expected, actualSmallDelta, 3, "Custom Message.");
+    TEST_ASSERT_UINT8_ARRAY_WITHIN_MESSAGE(11, expected, actualBigDelta, 3, "Custom Message.");
+}
+
+void testUInt8ArrayNotWithinDelta(void)
+{
+    UNITY_UINT8 expected[] = {20, 95, 55};
+    UNITY_UINT8 actualBigDelta[] = {11, 86, 45};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT8_ARRAY_WITHIN(1, expected, actualBigDelta, 3);
+    VERIFY_FAILS_END
+}
+
+void testUInt8ArrayNotWithinDeltaAndMessage(void)
+{
+    UNITY_UINT8 expected[] = {20, 95, 55};
+    UNITY_UINT8 actualBigDelta[] = {11, 86, 45};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT8_ARRAY_WITHIN_MESSAGE(1, expected, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testUInt8ArrayWithinDeltaPointless(void)
+{
+    UNITY_UINT8 expected[] = {20, 95, 55};
+    UNITY_UINT8 actualBigDelta[] = {11, 86, 45};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT8_ARRAY_WITHIN(11, expected, actualBigDelta, 0);
+    VERIFY_FAILS_END
+}
+
+void testUInt8ArrayWithinDeltaPointlessAndMessage(void)
+{
+    UNITY_UINT8 expected[] = {20, 95, 55};
+    UNITY_UINT8 actualBigDelta[] = {11, 86, 45};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT8_ARRAY_WITHIN_MESSAGE(11, expected, actualBigDelta, 0, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testUInt8ArrayWithinDeltaExpectedNull(void)
+{
+    UNITY_UINT8 actualBigDelta[] = {11, 86, 45};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT8_ARRAY_WITHIN(11, NULL, actualBigDelta, 3);
+    VERIFY_FAILS_END
+}
+
+void testUInt8ArrayWithinDeltaExpectedNullAndMessage(void)
+{
+    UNITY_UINT8 actualBigDelta[] = {11, 86, 45};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT8_ARRAY_WITHIN_MESSAGE(11, NULL, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testUInt8ArrayWithinDeltaActualNull(void)
+{
+    UNITY_UINT8 expected[] = {20, 95, 55};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT8_ARRAY_WITHIN(11, expected, NULL, 3);
+    VERIFY_FAILS_END
+}
+
+void testUInt8ArrayWithinDeltaActualNullAndMessage(void)
+{
+    UNITY_UINT8 expected[] = {20, 95, 55};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT8_ARRAY_WITHIN_MESSAGE(11, expected, NULL, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testUInt8ArrayWithinDeltaSamePointer(void)
+{
+    UNITY_UINT8 expected[] = {20, 95, 55};
+
+    TEST_ASSERT_UINT8_ARRAY_WITHIN(11, expected, expected, 3);
+}
+
+void testUInt8ArrayWithinDeltaSamePointerAndMessage(void)
+{
+    UNITY_UINT8 expected[] = {20, 95, 55};
+
+    TEST_ASSERT_UINT8_ARRAY_WITHIN_MESSAGE(11, expected, expected, 3, "Custom Message.");
+}
+
+void testHEX64ArrayWithinDelta(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {0xABCD123400000000, 0xABCD112200000000, 0xABCD127700000000};
+    UNITY_UINT64 actualSmallDelta[] = {0xABCD123500000000, 0xABCD112100000000, 0xABCD127700000000};
+    UNITY_UINT64 actualBigDelta[] = {0xABCD126700000000, 0xABCD118800000000, 0xABCD12AC00000000};
+
+    TEST_ASSERT_HEX64_ARRAY_WITHIN(0x100000000, expected, actualSmallDelta, 3);
+    TEST_ASSERT_HEX64_ARRAY_WITHIN(0x6E00000000, expected, actualBigDelta, 3);
+#endif
+}
+
+void testHEX64ArrayWithinDeltaAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {0xABCD123400000000, 0xABCD112200000000, 0xABCD127700000000};
+    UNITY_UINT64 actualSmallDelta[] = {0xABCD123500000000, 0xABCD112100000000, 0xABCD127700000000};
+    UNITY_UINT64 actualBigDelta[] = {0xABCD126700000000, 0xABCD118800000000, 0xABCD12AC00000000};
+
+    TEST_ASSERT_HEX64_ARRAY_WITHIN_MESSAGE(0x100000000, expected, actualSmallDelta, 3, "Custom Message.");
+    TEST_ASSERT_HEX64_ARRAY_WITHIN_MESSAGE(0x6E00000000, expected, actualBigDelta, 3, "Custom Message.");
+#endif
+}
+
+void testHEX64ArrayNotWithinDelta(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {0xABCD123400000000, 0xABCD112200000000, 0xABCD127700000000};
+    UNITY_UINT64 actualBigDelta[] = {0xABCD126700000000, 0xABCD118800000000, 0xABCD12AC00000000};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX64_ARRAY_WITHIN(0x100000000, expected, actualBigDelta, 3);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testHEX64ArrayNotWithinDeltaAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {0xABCD123400000000, 0xABCD112200000000, 0xABCD127700000000};
+    UNITY_UINT64 actualBigDelta[] = {0xABCD126700000000, 0xABCD118800000000, 0xABCD12AC00000000};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX64_ARRAY_WITHIN_MESSAGE(0x100000000, expected, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+#endif
+}
+
+void testHEX64ArrayWithinDeltaPointless(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {0xABCD123400000000, 0xABCD112200000000, 0xABCD127700000000};
+    UNITY_UINT64 actualBigDelta[] = {0xABCD126700000000, 0xABCD118800000000, 0xABCD12AC00000000};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX64_ARRAY_WITHIN(0x6E00000000, expected, actualBigDelta, 0);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testHEX64ArrayWithinDeltaPointlessAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {0xABCD123400000000, 0xABCD112200000000, 0xABCD127700000000};
+    UNITY_UINT64 actualBigDelta[] = {0xABCD126700000000, 0xABCD118800000000, 0xABCD12AC00000000};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX64_ARRAY_WITHIN_MESSAGE(0x6E00000000, expected, actualBigDelta, 0, "Custom Message.");
+    VERIFY_FAILS_END
+#endif
+}
+
+void testHEX64ArrayWithinDeltaExpectedNull(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 actualBigDelta[] = {0xABCD126700000000, 0xABCD118800000000, 0xABCD12AC00000000};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX64_ARRAY_WITHIN(0x6E00000000, NULL, actualBigDelta, 3);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testHEX64ArrayWithinDeltaExpectedNullAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 actualBigDelta[] = {0xABCD126700000000, 0xABCD118800000000, 0xABCD12AC00000000};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX64_ARRAY_WITHIN_MESSAGE(0x6E00000000, NULL, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+#endif
+}
+
+void testHEX64ArrayWithinDeltaActualNull(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {0xABCD123400000000, 0xABCD112200000000, 0xABCD127700000000};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX64_ARRAY_WITHIN(0x6E00000000, expected, NULL, 3);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testHEX64ArrayWithinDeltaActualNullAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {0xABCD123400000000, 0xABCD112200000000, 0xABCD127700000000};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX64_ARRAY_WITHIN_MESSAGE(0x6E00000000, expected, NULL, 3, "Custom Message.");
+    VERIFY_FAILS_END
+#endif
+}
+
+void testHEX64ArrayWithinDeltaSamePointer(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {0xABCD123400000000, 0xABCD112200000000, 0xABCD127700000000};
+
+    TEST_ASSERT_HEX64_ARRAY_WITHIN(0x6E00000000, expected, expected, 3);
+#endif
+}
+
+void testHEX64ArrayWithinDeltaSamePointerAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {0xABCD123400000000, 0xABCD112200000000, 0xABCD127700000000};
+
+    TEST_ASSERT_HEX64_ARRAY_WITHIN_MESSAGE(0x6E00000000, expected, expected, 3, "Custom Message.");
+#endif
+}
+
+void testHEX32ArrayWithinDelta(void)
+{
+    UNITY_UINT expected[] = {0xABCD1234, 0xABCD1122, 0xABCD1277};
+    UNITY_UINT actualSmallDelta[] = {0xABCD1235, 0xABCD1121, 0xABCD1277};
+    UNITY_UINT actualBigDelta[] = {0xABCD1267, 0xABCD1188, 0xABCD12AC};
+
+    TEST_ASSERT_HEX32_ARRAY_WITHIN(1, expected, actualSmallDelta, 3);
+    TEST_ASSERT_HEX32_ARRAY_WITHIN(110, expected, actualBigDelta, 3);
+}
+
+void testHEX32ArrayWithinDeltaAndMessage(void)
+{
+    UNITY_UINT expected[] = {0xABCD1234, 0xABCD1122, 0xABCD1277};
+    UNITY_UINT actualSmallDelta[] = {0xABCD1235, 0xABCD1121, 0xABCD1277};
+    UNITY_UINT actualBigDelta[] = {0xABCD1267, 0xABCD1188, 0xABCD12AC};
+
+    TEST_ASSERT_HEX32_ARRAY_WITHIN_MESSAGE(1, expected, actualSmallDelta, 3, "Custom Message.");
+    TEST_ASSERT_HEX32_ARRAY_WITHIN_MESSAGE(110, expected, actualBigDelta, 3, "Custom Message.");
+}
+
+void testHEX32ArrayNotWithinDelta(void)
+{
+    UNITY_UINT expected[] = {0xABCD1234, 0xABCD1122, 0xABCD1277};
+    UNITY_UINT actualBigDelta[] = {0xABCD1267, 0xABCD1188, 0xABCD12AC};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX32_ARRAY_WITHIN(1, expected, actualBigDelta, 3);
+    VERIFY_FAILS_END
+}
+
+void testHEX32ArrayNotWithinDeltaAndMessage(void)
+{
+    UNITY_UINT expected[] = {0xABCD1234, 0xABCD1122, 0xABCD1277};
+    UNITY_UINT actualBigDelta[] = {0xABCD1267, 0xABCD1188, 0xABCD12AC};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX32_ARRAY_WITHIN_MESSAGE(1, expected, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testHEX32ArrayWithinDeltaPointless(void)
+{
+    UNITY_UINT expected[] = {0xABCD1234, 0xABCD1122, 0xABCD1277};
+    UNITY_UINT actualBigDelta[] = {0xABCD1267, 0xABCD1188, 0xABCD12AC};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX32_ARRAY_WITHIN(110, expected, actualBigDelta, 0);
+    VERIFY_FAILS_END
+}
+
+void testHEX32ArrayWithinDeltaPointlessAndMessage(void)
+{
+    UNITY_UINT expected[] = {0xABCD1234, 0xABCD1122, 0xABCD1277};
+    UNITY_UINT actualBigDelta[] = {0xABCD1267, 0xABCD1188, 0xABCD12AC};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX32_ARRAY_WITHIN_MESSAGE(110, expected, actualBigDelta, 0, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testHEX32ArrayWithinDeltaExpectedNull(void)
+{
+    UNITY_UINT actualBigDelta[] = {0xABCD1267, 0xABCD1188, 0xABCD12AC};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX32_ARRAY_WITHIN(110, NULL, actualBigDelta, 3);
+    VERIFY_FAILS_END
+}
+
+void testHEX32ArrayWithinDeltaExpectedNullAndMessage(void)
+{
+    UNITY_UINT actualBigDelta[] = {0xABCD1267, 0xABCD1188, 0xABCD12AC};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX32_ARRAY_WITHIN_MESSAGE(110, NULL, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testHEX32ArrayWithinDeltaActualNull(void)
+{
+    UNITY_UINT expected[] = {0xABCD1234, 0xABCD1122, 0xABCD1277};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX32_ARRAY_WITHIN(110, expected, NULL, 3);
+    VERIFY_FAILS_END
+}
+
+void testHEX32ArrayWithinDeltaActualNullAndMessage(void)
+{
+    UNITY_UINT expected[] = {0xABCD1234, 0xABCD1122, 0xABCD1277};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX32_ARRAY_WITHIN_MESSAGE(110, expected, NULL, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testHEX32ArrayWithinDeltaSamePointer(void)
+{
+    UNITY_UINT expected[] = {0xABCD1234, 0xABCD1122, 0xABCD1277};
+
+    TEST_ASSERT_HEX32_ARRAY_WITHIN(110, expected, expected, 3);
+}
+
+void testHEX32ArrayWithinDeltaSamePointerAndMessage(void)
+{
+    UNITY_UINT expected[] = {0xABCD1234, 0xABCD1122, 0xABCD1277};
+
+    TEST_ASSERT_HEX32_ARRAY_WITHIN_MESSAGE(110, expected, expected, 3, "Custom Message.");
+}
+
+
+void testHEX16ArrayWithinDelta(void)
+{
+    UNITY_UINT16 expected[] = {0x1234, 0x1122, 0x1277};
+    UNITY_UINT16 actualSmallDelta[] = {0x1235, 0x1121, 0x1277};
+    UNITY_UINT16 actualBigDelta[] = {0x1267, 0x1188, 0x12AC};
+
+    TEST_ASSERT_HEX16_ARRAY_WITHIN(1, expected, actualSmallDelta, 3);
+    TEST_ASSERT_HEX16_ARRAY_WITHIN(110, expected, actualBigDelta, 3);
+}
+
+void testHEX16ArrayWithinDeltaAndMessage(void)
+{
+    UNITY_UINT16 expected[] = {0x1234, 0x1122, 0x1277};
+    UNITY_UINT16 actualSmallDelta[] = {0x1235, 0x1121, 0x1277};
+    UNITY_UINT16 actualBigDelta[] = {0x1267, 0x1188, 0x12AC};
+
+    TEST_ASSERT_HEX16_ARRAY_WITHIN_MESSAGE(1, expected, actualSmallDelta, 3, "Custom Message.");
+    TEST_ASSERT_HEX16_ARRAY_WITHIN_MESSAGE(110, expected, actualBigDelta, 3, "Custom Message.");
+}
+
+void testHEX16ArrayNotWithinDelta(void)
+{
+    UNITY_UINT16 expected[] = {0x1234, 0x1122, 0x1277};
+    UNITY_UINT16 actualBigDelta[] = {0x1267, 0x1188, 0x12AC};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX16_ARRAY_WITHIN(1, expected, actualBigDelta, 3);
+    VERIFY_FAILS_END
+}
+
+void testHEX16ArrayNotWithinDeltaAndMessage(void)
+{
+    UNITY_UINT16 expected[] = {0x1234, 0x1122, 0x1277};
+    UNITY_UINT16 actualBigDelta[] = {0x1267, 0x1188, 0x12AC};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX16_ARRAY_WITHIN_MESSAGE(1, expected, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testHEX16ArrayWithinDeltaPointless(void)
+{
+    UNITY_UINT16 expected[] = {0x1234, 0x1122, 0x1277};
+    UNITY_UINT16 actualBigDelta[] = {0x1267, 0x1188, 0x12AC};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX16_ARRAY_WITHIN(110, expected, actualBigDelta, 0);
+    VERIFY_FAILS_END
+}
+
+void testHEX16ArrayWithinDeltaPointlessAndMessage(void)
+{
+    UNITY_UINT16 expected[] = {0x1234, 0x1122, 0x1277};
+    UNITY_UINT16 actualBigDelta[] = {0x1267, 0x1188, 0x12AC};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX16_ARRAY_WITHIN_MESSAGE(110, expected, actualBigDelta, 0, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testHEX16ArrayWithinDeltaExpectedNull(void)
+{
+    UNITY_UINT16 actualBigDelta[] = {0x1267, 0x1188, 0x12AC};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX16_ARRAY_WITHIN(110, NULL, actualBigDelta, 3);
+    VERIFY_FAILS_END
+}
+
+void testHEX16ArrayWithinDeltaExpectedNullAndMessage(void)
+{
+    UNITY_UINT16 actualBigDelta[] = {0x1267, 0x1188, 0x12AC};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX16_ARRAY_WITHIN_MESSAGE(110, NULL, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testHEX16ArrayWithinDeltaActualNull(void)
+{
+    UNITY_UINT16 expected[] = {0x1234, 0x1122, 0x1277};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX16_ARRAY_WITHIN(110, expected, NULL, 3);
+    VERIFY_FAILS_END
+}
+
+void testHEX16ArrayWithinDeltaActualNullAndMessage(void)
+{
+    UNITY_UINT16 expected[] = {0x1234, 0x1122, 0x1277};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX16_ARRAY_WITHIN_MESSAGE(110, expected, NULL, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testHEX16ArrayWithinDeltaSamePointer(void)
+{
+    UNITY_UINT16 expected[] = {0x1234, 0x1122, 0x1277};
+
+    TEST_ASSERT_HEX16_ARRAY_WITHIN(110, expected, expected, 3);
+}
+
+void testHEX16ArrayWithinDeltaSamePointerAndMessage(void)
+{
+    UNITY_UINT16 expected[] = {0x1234, 0x1122, 0x1277};
+
+    TEST_ASSERT_HEX16_ARRAY_WITHIN_MESSAGE(110, expected, expected, 3, "Custom Message.");
+}
+
+void testHEX8ArrayWithinDelta(void)
+{
+    UNITY_UINT8 expected[] = {0x34, 0x22, 0x77};
+    UNITY_UINT8 actualSmallDelta[] = {0x35, 0x21, 0x77};
+    UNITY_UINT8 actualBigDelta[] = {0x47, 0x48, 0x4C};
+
+    TEST_ASSERT_HEX8_ARRAY_WITHIN(1, expected, actualSmallDelta, 3);
+    TEST_ASSERT_HEX8_ARRAY_WITHIN(60, expected, actualBigDelta, 3);
+}
+
+void testHEX8ArrayWithinDeltaAndMessage(void)
+{
+    UNITY_UINT8 expected[] = {0x34, 0x22, 0x77};
+    UNITY_UINT8 actualSmallDelta[] = {0x35, 0x21, 0x77};
+    UNITY_UINT8 actualBigDelta[] = {0x47, 0x48, 0x4C};
+
+    TEST_ASSERT_HEX8_ARRAY_WITHIN_MESSAGE(1, expected, actualSmallDelta, 3, "Custom Message.");
+    TEST_ASSERT_HEX8_ARRAY_WITHIN_MESSAGE(60, expected, actualBigDelta, 3, "Custom Message.");
+}
+
+void testHEX8ArrayNotWithinDelta(void)
+{
+    UNITY_UINT8 expected[] = {0x34, 0x22, 0x77};
+    UNITY_UINT8 actualBigDelta[] = {0x67, 0x88, 0xAC};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX8_ARRAY_WITHIN(1, expected, actualBigDelta, 3);
+    VERIFY_FAILS_END
+}
+
+void testHEX8ArrayNotWithinDeltaAndMessage(void)
+{
+    UNITY_UINT8 expected[] = {0x34, 0x22, 0x77};
+    UNITY_UINT8 actualBigDelta[] = {0x67, 0x88, 0xAC};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX8_ARRAY_WITHIN_MESSAGE(1, expected, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testHEX8ArrayWithinDeltaPointless(void)
+{
+    UNITY_UINT8 expected[] = {0x34, 0x22, 0x77};
+    UNITY_UINT8 actualBigDelta[] = {0x67, 0x88, 0xAC};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX8_ARRAY_WITHIN(60, expected, actualBigDelta, 0);
+    VERIFY_FAILS_END
+}
+
+void testHEX8ArrayWithinDeltaPointlessAndMessage(void)
+{
+    UNITY_UINT8 expected[] = {0x34, 0x22, 0x77};
+    UNITY_UINT8 actualBigDelta[] = {0x67, 0x88, 0xAC};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX8_ARRAY_WITHIN_MESSAGE(60, expected, actualBigDelta, 0, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testHEX8ArrayWithinDeltaExpectedNull(void)
+{
+    UNITY_UINT8 actualBigDelta[] = {0x67, 0x88, 0xAC};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX8_ARRAY_WITHIN(60, NULL, actualBigDelta, 3);
+    VERIFY_FAILS_END
+}
+
+void testHEX8ArrayWithinDeltaExpectedNullAndMessage(void)
+{
+    UNITY_UINT8 actualBigDelta[] = {0x67, 0x88, 0xAC};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX8_ARRAY_WITHIN_MESSAGE(60, NULL, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testHEX8ArrayWithinDeltaActualNull(void)
+{
+    UNITY_UINT8 expected[] = {0x34, 0x22, 0x77};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX8_ARRAY_WITHIN(60, expected, NULL, 3);
+    VERIFY_FAILS_END
+}
+
+void testHEX8ArrayWithinDeltaActualNullAndMessage(void)
+{
+    UNITY_UINT8 expected[] = {0x34, 0x22, 0x77};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX8_ARRAY_WITHIN_MESSAGE(60, expected, NULL, 3, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testHEX8ArrayWithinDeltaSamePointer(void)
+{
+    UNITY_UINT8 expected[] = {0x34, 0x22, 0x77};
+
+    TEST_ASSERT_HEX8_ARRAY_WITHIN(60, expected, expected, 3);
+}
+
+void testHEX8ArrayWithinDeltaSamePointerAndMessage(void)
+{
+    UNITY_UINT8 expected[] = {0x34, 0x22, 0x77};
+
+    TEST_ASSERT_HEX8_ARRAY_WITHIN_MESSAGE(60, expected, expected, 3, "Custom Message.");
+}
+
+void testEqualIntArrays(void)
+{
+    int p0[] = {1, 8, 987, -2};
+    int p1[] = {1, 8, 987, -2};
+    int p2[] = {1, 8, 987, 2};
+    int p3[] = {1, 500, 600, 700};
+
+    TEST_ASSERT_EQUAL_INT_ARRAY(p0, p0, 1);
+    TEST_ASSERT_EQUAL_INT_ARRAY(p0, p0, 4);
+    TEST_ASSERT_EQUAL_INT_ARRAY(p0, p1, 4);
+    TEST_ASSERT_EQUAL_INT_ARRAY(p0, p2, 3);
+    TEST_ASSERT_EQUAL_INT_ARRAY(p0, p3, 1);
+    TEST_ASSERT_EQUAL_INT_ARRAY(NULL, NULL, 1);
+}
+
+void testNotEqualIntArraysNullExpected(void)
+{
+    int* p0 = NULL;
+    int p1[] = {1, 8, 987, 2};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_INT_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualIntArraysNullActual(void)
+{
+    int* p1 = NULL;
+    int p0[] = {1, 8, 987, 2};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_INT_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualIntArrays1(void)
+{
+    int p0[] = {1, 8, 987, -2};
+    int p1[] = {1, 8, 987, 2};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_INT_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualIntArrays2(void)
+{
+    int p0[] = {1, 8, 987, -2};
+    int p1[] = {2, 8, 987, -2};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_INT_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualIntArrays3(void)
+{
+    int p0[] = {1, 8, 987, -2};
+    int p1[] = {1, 8, 986, -2};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_INT_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualIntArraysLengthZero(void)
+{
+    UNITY_UINT32 p0[1] = {1};
+    UNITY_UINT32 p1[1] = {1};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_INT_ARRAY(p0, p1, 0);
+    VERIFY_FAILS_END
+}
+
+void testEqualIntEachEqual(void)
+{
+    int p0[] = {1, 1, 1, 1};
+    int p1[] = {987, 987, 987, 987};
+    int p2[] = {-2, -2, -2, -3};
+    int p3[] = {1, 5, 600, 700};
+
+    TEST_ASSERT_EACH_EQUAL_INT(1, p0, 1);
+    TEST_ASSERT_EACH_EQUAL_INT(1, p0, 4);
+    TEST_ASSERT_EACH_EQUAL_INT(987, p1, 4);
+    TEST_ASSERT_EACH_EQUAL_INT(-2, p2, 3);
+    TEST_ASSERT_EACH_EQUAL_INT(1, p3, 1);
+}
+
+void testNotEqualIntEachEqualNullActual(void)
+{
+    int* p1 = NULL;
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_INT(1, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualIntEachEqual1(void)
+{
+    int p0[] = {1, 1, 1, -2};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_INT(1, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualIntEachEqual2(void)
+{
+    int p0[] = {-5, -5, -1, -5};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_INT(-5, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualIntEachEqual3(void)
+{
+    int p0[] = {1, 88, 88, 88};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_INT(88, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualEachEqualLengthZero(void)
+{
+    UNITY_UINT32 p0[1] = {1};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_INT(0, p0, 0);
+    VERIFY_FAILS_END
+}
+
+void testEqualPtrArrays(void)
+{
+    char A = 1;
+    char B = 2;
+    char C = 3;
+    char* p0[] = {&A, &B, &C};
+    char* p1[] = {&A, &B, &C, &A};
+    char* p2[] = {&A, &B};
+    char* p3[] = {&A};
+
+    TEST_ASSERT_EQUAL_PTR_ARRAY(p0, p0, 1);
+    TEST_ASSERT_EQUAL_PTR_ARRAY(p0, p0, 3);
+    TEST_ASSERT_EQUAL_PTR_ARRAY(p0, p1, 3);
+    TEST_ASSERT_EQUAL_PTR_ARRAY(p1, p2, 2);
+    TEST_ASSERT_EQUAL_PTR_ARRAY(p3, p0, 1);
+}
+
+void testNotEqualPtrArraysNullExpected(void)
+{
+    char A = 1;
+    char B = 2;
+    char** p0 = NULL;
+    char* p1[] = {&A, &B};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_PTR_ARRAY(p0, p1, 2);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualPtrArraysNullActual(void)
+{
+    char A = 1;
+    char B = 2;
+    char** p0 = NULL;
+    char* p1[] = {&A, &B};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_PTR_ARRAY(p1, p0, 2);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualPtrArrays1(void)
+{
+    char A = 1;
+    char B = 2;
+    char C = 3;
+    char* p0[] = {&A, &B, &C, &B};
+    char* p1[] = {&A, &B, &C, &A};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_PTR_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualPtrArrays2(void)
+{
+    char A = 1;
+    char B = 2;
+    char C = 3;
+    char* p0[] = {&B, &B, &C, &A};
+    char* p1[] = {&A, &B, &C, &A};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_PTR_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualPtrArrays3(void)
+{
+    char A = 1;
+    char B = 2;
+    char C = 3;
+    char* p0[] = {&A, &B, &B, &A};
+    char* p1[] = {&A, &B, &C, &A};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_PTR_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testEqualPtrEachEqual(void)
+{
+    char A = 1;
+    char B = 2;
+    char C = 3;
+    char* p0[] = {&A, &A, &A};
+    char* p1[] = {&A, &B, &C, &A};
+    char* p2[] = {&B, &B};
+    char* p3[] = {&C};
+
+    TEST_ASSERT_EACH_EQUAL_PTR(&A, p0, 1);
+    TEST_ASSERT_EACH_EQUAL_PTR(&A, p0, 3);
+    TEST_ASSERT_EACH_EQUAL_PTR(&A, p1, 1);
+    TEST_ASSERT_EACH_EQUAL_PTR(&B, p2, 2);
+    TEST_ASSERT_EACH_EQUAL_PTR(&C, p3, 1);
+}
+
+void testNotEqualPtrEachEqualNullExpected(void)
+{
+    char A = 1;
+    char B = 1;
+    char* p0[] = {&A, &B};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_PTR(&A, p0, 2);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualPtrEachEqualNullActual(void)
+{
+    char A = 1;
+    char** p0 = NULL;
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_PTR(&A, p0, 2);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualPtrEachEqual1(void)
+{
+    char A = 1;
+    char B = 1;
+    char* p0[] = {&A, &A, &A, &B};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_PTR(&A, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualPtrEachEqual2(void)
+{
+    char A = 1;
+    char B = 1;
+    char* p0[] = {&B, &B, &A, &B};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_PTR(&B, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualPtrEachEqual3(void)
+{
+    char A = 1;
+    char B = 1;
+    char* p0[] = {&A, &B, &B, &B};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_PTR(&B, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testEqualInt8Arrays(void)
+{
+    UNITY_INT8 p0[] = {1, 8, 117, -2};
+    UNITY_INT8 p1[] = {1, 8, 117, -2};
+    UNITY_INT8 p2[] = {1, 8, 117, 2};
+    UNITY_INT8 p3[] = {1, 50, 60, 70};
+
+    TEST_ASSERT_EQUAL_INT8_ARRAY(p0, p0, 1);
+    TEST_ASSERT_EQUAL_INT8_ARRAY(p0, p0, 4);
+    TEST_ASSERT_EQUAL_INT8_ARRAY(p0, p1, 4);
+    TEST_ASSERT_EQUAL_INT8_ARRAY(p0, p2, 3);
+    TEST_ASSERT_EQUAL_INT8_ARRAY(p0, p3, 1);
+}
+
+void testNotEqualInt8Arrays(void)
+{
+    UNITY_INT8 p0[] = {1, 8, 36, -2};
+    UNITY_INT8 p1[] = {1, 8, 36, 2};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_INT8_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testEqualInt8EachEqual(void)
+{
+    UNITY_INT8 p0[] = {1, 1, 1, 1};
+    UNITY_INT8 p1[] = {117, 117, 117, -2};
+    UNITY_INT8 p2[] = {-1, -1, 117, 2};
+    UNITY_INT8 p3[] = {1, 50, 60, 70};
+
+    TEST_ASSERT_EACH_EQUAL_INT8(1, p0, 1);
+    TEST_ASSERT_EACH_EQUAL_INT8(1, p0, 4);
+    TEST_ASSERT_EACH_EQUAL_INT8(117, p1, 3);
+    TEST_ASSERT_EACH_EQUAL_INT8(-1, p2, 2);
+    TEST_ASSERT_EACH_EQUAL_INT8(1, p3, 1);
+}
+
+void testNotEqualInt8EachEqual(void)
+{
+    UNITY_INT8 p0[] = {1, 8, 36, -2};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_INT8(1, p0, 2);
+    VERIFY_FAILS_END
+}
+
+void testEqualCHARArrays(void)
+{
+    char p0[] = {1, 8, 117, -2};
+    char p1[] = {1, 8, 117, -2};
+    char p2[] = {1, 8, 117, 2};
+    char p3[] = {1, 50, 60, 70};
+
+    TEST_ASSERT_EQUAL_CHAR_ARRAY(p0, p0, 1);
+    TEST_ASSERT_EQUAL_CHAR_ARRAY(p0, p0, 4);
+    TEST_ASSERT_EQUAL_CHAR_ARRAY(p0, p1, 4);
+    TEST_ASSERT_EQUAL_CHAR_ARRAY(p0, p2, 3);
+    TEST_ASSERT_EQUAL_CHAR_ARRAY(p0, p3, 1);
+}
+
+void testNotEqualCHARArrays(void)
+{
+    char p0[] = {1, 8, 36, -2};
+    char p1[] = {1, 8, 36, 2};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_CHAR_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testEqualCHAREachEqual(void)
+{
+    char p0[] = {1, 1, 1, 1};
+    char p1[] = {117, 117, 117, -2};
+    char p2[] = {-1, -1, 117, 2};
+    char p3[] = {1, 50, 60, 70};
+
+    TEST_ASSERT_EACH_EQUAL_CHAR(1, p0, 1);
+    TEST_ASSERT_EACH_EQUAL_CHAR(1, p0, 4);
+    TEST_ASSERT_EACH_EQUAL_CHAR(117, p1, 3);
+    TEST_ASSERT_EACH_EQUAL_CHAR(-1, p2, 2);
+    TEST_ASSERT_EACH_EQUAL_CHAR(1, p3, 1);
+}
+
+void testNotEqualCHAREachEqual(void)
+{
+    char p0[] = {1, 8, 36, -2};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_CHAR(1, p0, 2);
+    VERIFY_FAILS_END
+}
+
+void testEqualUIntArrays(void)
+{
+    unsigned int p0[] = {1, 8, 987, 65132u};
+    unsigned int p1[] = {1, 8, 987, 65132u};
+    unsigned int p2[] = {1, 8, 987, 2};
+    unsigned int p3[] = {1, 500, 600, 700};
+
+    TEST_ASSERT_EQUAL_UINT_ARRAY(p0, p0, 1);
+    TEST_ASSERT_EQUAL_UINT_ARRAY(p0, p0, 4);
+    TEST_ASSERT_EQUAL_UINT_ARRAY(p0, p1, 4);
+    TEST_ASSERT_EQUAL_UINT_ARRAY(p0, p2, 3);
+    TEST_ASSERT_EQUAL_UINT_ARRAY(p0, p3, 1);
+}
+
+void testNotEqualUIntArrays1(void)
+{
+    unsigned int p0[] = {1, 8, 987, 65132u};
+    unsigned int p1[] = {1, 8, 987, 65131u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_UINT_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualUIntArrays2(void)
+{
+    unsigned int p0[] = {1, 8, 987, 65132u};
+    unsigned int p1[] = {2, 8, 987, 65132u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_UINT_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualUIntArrays3(void)
+{
+    unsigned int p0[] = {1, 8, 987, 65132u};
+    unsigned int p1[] = {1, 8, 986, 65132u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_UINT_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testEqualUIntEachEqual(void)
+{
+    unsigned int p0[] = {1, 1, 1, 1};
+    unsigned int p1[] = {65132u, 65132u, 65132u, 65132u};
+    unsigned int p2[] = {8, 8, 987, 2};
+    unsigned int p3[] = {1, 500, 600, 700};
+
+    TEST_ASSERT_EACH_EQUAL_UINT(1, p0, 1);
+    TEST_ASSERT_EACH_EQUAL_UINT(1, p0, 4);
+    TEST_ASSERT_EACH_EQUAL_UINT(65132u, p1, 4);
+    TEST_ASSERT_EACH_EQUAL_UINT(8, p2, 2);
+    TEST_ASSERT_EACH_EQUAL_UINT(1, p3, 1);
+}
+
+void testNotEqualUIntEachEqual1(void)
+{
+    unsigned int p0[] = {1, 65132u, 65132u, 65132u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_UINT(65132u, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualUIntEachEqual2(void)
+{
+    unsigned int p0[] = {987, 8, 987, 987};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_UINT(987, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualUIntEachEqual3(void)
+{
+    unsigned int p0[] = {1, 1, 1, 65132u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_UINT(1, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testEqualInt16Arrays(void)
+{
+    UNITY_INT16 p0[] = {1, 8, 117, 3};
+    UNITY_INT16 p1[] = {1, 8, 117, 3};
+    UNITY_INT16 p2[] = {1, 8, 117, 2};
+    UNITY_INT16 p3[] = {1, 50, 60, 70};
+
+    TEST_ASSERT_EQUAL_INT16_ARRAY(p0, p0, 1);
+    TEST_ASSERT_EQUAL_INT16_ARRAY(p0, p0, 4);
+    TEST_ASSERT_EQUAL_INT16_ARRAY(p0, p1, 4);
+    TEST_ASSERT_EQUAL_INT16_ARRAY(p0, p2, 3);
+    TEST_ASSERT_EQUAL_INT16_ARRAY(p0, p3, 1);
+}
+
+void testNotEqualInt16Arrays(void)
+{
+    UNITY_INT16 p0[] = {1, 8, 127, 3};
+    UNITY_INT16 p1[] = {1, 8, 127, 2};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_INT16_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testEqualInt16EachEqual(void)
+{
+    UNITY_INT16 p0[] = {1, 1, 1, 1};
+    UNITY_INT16 p1[] = {32111, 32111, 32111, 3};
+    UNITY_INT16 p2[] = {-1, -1, -1, 2};
+    UNITY_INT16 p3[] = {1, 50, 60, 70};
+
+    TEST_ASSERT_EACH_EQUAL_INT16(1, p0, 1);
+    TEST_ASSERT_EACH_EQUAL_INT16(1, p0, 4);
+    TEST_ASSERT_EACH_EQUAL_INT16(32111, p1, 3);
+    TEST_ASSERT_EACH_EQUAL_INT16(-1, p2, 3);
+    TEST_ASSERT_EACH_EQUAL_INT16(1, p3, 1);
+}
+
+void testNotEqualInt16EachEqual(void)
+{
+    UNITY_INT16 p0[] = {127, 127, 127, 3};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_INT16(127, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testEqualInt32Arrays(void)
+{
+    UNITY_INT32 p0[] = {1, 8, 117, 3};
+    UNITY_INT32 p1[] = {1, 8, 117, 3};
+    UNITY_INT32 p2[] = {1, 8, 117, 2};
+    UNITY_INT32 p3[] = {1, 50, 60, 70};
+
+    TEST_ASSERT_EQUAL_INT32_ARRAY(p0, p0, 1);
+    TEST_ASSERT_EQUAL_INT32_ARRAY(p0, p0, 4);
+    TEST_ASSERT_EQUAL_INT32_ARRAY(p0, p1, 4);
+    TEST_ASSERT_EQUAL_INT32_ARRAY(p0, p2, 3);
+    TEST_ASSERT_EQUAL_INT32_ARRAY(p0, p3, 1);
+}
+
+void testNotEqualInt32Arrays(void)
+{
+    UNITY_INT32 p0[] = {1, 8, 127, 3};
+    UNITY_INT32 p1[] = {1, 8, 127, 2};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_INT32_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testEqualInt32EachEqual(void)
+{
+    UNITY_INT32 p0[] = {8, 8, 8, 8};
+    UNITY_INT32 p1[] = {65537, 65537, 65537, 65537};
+    UNITY_INT32 p2[] = {-3, -3, -3, 2};
+    UNITY_INT32 p3[] = {1, 50, 60, 70};
+
+    TEST_ASSERT_EACH_EQUAL_INT32(8, p0, 1);
+    TEST_ASSERT_EACH_EQUAL_INT32(8, p0, 4);
+    TEST_ASSERT_EACH_EQUAL_INT32(65537, p1, 4);
+    TEST_ASSERT_EACH_EQUAL_INT32(-3, p2, 3);
+    TEST_ASSERT_EACH_EQUAL_INT32(1, p3, 1);
+}
+
+void testNotEqualInt32EachEqual(void)
+{
+    UNITY_INT32 p0[] = {127, 8, 127, 127};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_INT32(127, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testEqualUINT8Arrays(void)
+{
+    UNITY_UINT8 p0[] = {1, 8, 100, 127};
+    UNITY_UINT8 p1[] = {1, 8, 100, 127};
+    UNITY_UINT8 p2[] = {1, 8, 100, 2};
+    UNITY_UINT8 p3[] = {1, 50, 60, 70};
+
+    TEST_ASSERT_EQUAL_UINT8_ARRAY(p0, p0, 1);
+    TEST_ASSERT_EQUAL_UINT8_ARRAY(p0, p0, 4);
+    TEST_ASSERT_EQUAL_UINT8_ARRAY(p0, p1, 4);
+    TEST_ASSERT_EQUAL_UINT8_ARRAY(p0, p2, 3);
+    TEST_ASSERT_EQUAL_UINT8_ARRAY(p0, p3, 1);
+}
+
+void testNotEqualUINT8Arrays1(void)
+{
+    unsigned char p0[] = {1, 8, 100, 127u};
+    unsigned char p1[] = {1, 8, 100, 255u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_UINT8_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualUINT8Arrays2(void)
+{
+    unsigned char p0[] = {1, 8, 100, 127u};
+    unsigned char p1[] = {1, 8, 100, 255u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_UINT8_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualUINT8Arrays3(void)
+{
+    unsigned char p0[] = {1, 8, 100, 127u};
+    unsigned char p1[] = {1, 8, 100, 255u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_UINT8_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+
+void testEqualUINT16Arrays(void)
+{
+    unsigned short p0[] = {1, 8, 987, 65132u};
+    unsigned short p1[] = {1, 8, 987, 65132u};
+    unsigned short p2[] = {1, 8, 987, 2};
+    unsigned short p3[] = {1, 500, 600, 700};
+
+    TEST_ASSERT_EQUAL_UINT16_ARRAY(p0, p0, 1);
+    TEST_ASSERT_EQUAL_UINT16_ARRAY(p0, p0, 4);
+    TEST_ASSERT_EQUAL_UINT16_ARRAY(p0, p1, 4);
+    TEST_ASSERT_EQUAL_UINT16_ARRAY(p0, p2, 3);
+    TEST_ASSERT_EQUAL_UINT16_ARRAY(p0, p3, 1);
+}
+
+void testNotEqualUINT16Arrays1(void)
+{
+    unsigned short p0[] = {1, 8, 987, 65132u};
+    unsigned short p1[] = {1, 8, 987, 65131u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_UINT16_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualUINT16Arrays2(void)
+{
+    unsigned short p0[] = {1, 8, 987, 65132u};
+    unsigned short p1[] = {2, 8, 987, 65132u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_UINT16_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualUINT16Arrays3(void)
+{
+    unsigned short p0[] = {1, 8, 987, 65132u};
+    unsigned short p1[] = {1, 8, 986, 65132u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_UINT16_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testEqualUINT32Arrays(void)
+{
+    UNITY_UINT32 p0[] = {1, 8, 987, 65132u};
+    UNITY_UINT32 p1[] = {1, 8, 987, 65132u};
+    UNITY_UINT32 p2[] = {1, 8, 987, 2};
+    UNITY_UINT32 p3[] = {1, 500, 600, 700};
+
+    TEST_ASSERT_EQUAL_UINT32_ARRAY(p0, p0, 1);
+    TEST_ASSERT_EQUAL_UINT32_ARRAY(p0, p0, 4);
+    TEST_ASSERT_EQUAL_UINT32_ARRAY(p0, p1, 4);
+    TEST_ASSERT_EQUAL_UINT32_ARRAY(p0, p2, 3);
+    TEST_ASSERT_EQUAL_UINT32_ARRAY(p0, p3, 1);
+}
+
+void testNotEqualUINT32Arrays1(void)
+{
+    UNITY_UINT32 p0[] = {1, 8, 987, 65132u};
+    UNITY_UINT32 p1[] = {1, 8, 987, 65131u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_UINT32_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualUINT32Arrays2(void)
+{
+    UNITY_UINT32 p0[] = {1, 8, 987, 65132u};
+    UNITY_UINT32 p1[] = {2, 8, 987, 65132u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_UINT32_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualUINT32Arrays3(void)
+{
+    UNITY_UINT32 p0[] = {1, 8, 987, 65132u};
+    UNITY_UINT32 p1[] = {1, 8, 986, 65132u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_UINT32_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testEqualHEXArrays(void)
+{
+    UNITY_UINT32 p0[] = {1, 8, 987, 65132u};
+    UNITY_UINT32 p1[] = {1, 8, 987, 65132u};
+    UNITY_UINT32 p2[] = {1, 8, 987, 2};
+    UNITY_UINT32 p3[] = {1, 500, 600, 700};
+
+    TEST_ASSERT_EQUAL_HEX_ARRAY(p0, p0, 1);
+    TEST_ASSERT_EQUAL_HEX_ARRAY(p0, p0, 4);
+    TEST_ASSERT_EQUAL_HEX_ARRAY(p0, p1, 4);
+    TEST_ASSERT_EQUAL_HEX32_ARRAY(p0, p2, 3);
+    TEST_ASSERT_EQUAL_HEX32_ARRAY(p0, p3, 1);
+}
+
+void testNotEqualHEXArrays1(void)
+{
+    UNITY_UINT32 p0[] = {1, 8, 987, 65132u};
+    UNITY_UINT32 p1[] = {1, 8, 987, 65131u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_HEX32_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualHEXArrays2(void)
+{
+    UNITY_UINT32 p0[] = {1, 8, 987, 65132u};
+    UNITY_UINT32 p1[] = {2, 8, 987, 65132u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_HEX32_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualHEXArrays3(void)
+{
+    UNITY_UINT32 p0[] = {1, 8, 987, 65132u};
+    UNITY_UINT32 p1[] = {1, 8, 986, 65132u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_HEX_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testEqualHEX32Arrays(void)
+{
+    UNITY_UINT32 p0[] = {1, 8, 987, 65132u};
+    UNITY_UINT32 p1[] = {1, 8, 987, 65132u};
+    UNITY_UINT32 p2[] = {1, 8, 987, 2};
+    UNITY_UINT32 p3[] = {1, 500, 600, 700};
+
+    TEST_ASSERT_EQUAL_HEX32_ARRAY(p0, p0, 1);
+    TEST_ASSERT_EQUAL_HEX32_ARRAY(p0, p0, 4);
+    TEST_ASSERT_EQUAL_HEX32_ARRAY(p0, p1, 4);
+    TEST_ASSERT_EQUAL_HEX32_ARRAY(p0, p2, 3);
+    TEST_ASSERT_EQUAL_HEX32_ARRAY(p0, p3, 1);
+}
+
+void testNotEqualHEX32Arrays1(void)
+{
+    UNITY_UINT32 p0[] = {1, 8, 987, 65132u};
+    UNITY_UINT32 p1[] = {1, 8, 987, 65131u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_HEX32_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualHEX32Arrays2(void)
+{
+    UNITY_UINT32 p0[] = {1, 8, 987, 65132u};
+    UNITY_UINT32 p1[] = {2, 8, 987, 65132u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_HEX32_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualHEX32Arrays3(void)
+{
+    UNITY_UINT32 p0[] = {1, 8, 987, 65132u};
+    UNITY_UINT32 p1[] = {1, 8, 986, 65132u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_HEX32_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testEqualHEX16Arrays(void)
+{
+    unsigned short p0[] = {1, 8, 987, 65132u};
+    unsigned short p1[] = {1, 8, 987, 65132u};
+    unsigned short p2[] = {1, 8, 987, 2};
+    unsigned short p3[] = {1, 500, 600, 700};
+
+    TEST_ASSERT_EQUAL_HEX16_ARRAY(p0, p0, 1);
+    TEST_ASSERT_EQUAL_HEX16_ARRAY(p0, p0, 4);
+    TEST_ASSERT_EQUAL_HEX16_ARRAY(p0, p1, 4);
+    TEST_ASSERT_EQUAL_HEX16_ARRAY(p0, p2, 3);
+    TEST_ASSERT_EQUAL_HEX16_ARRAY(p0, p3, 1);
+}
+
+void testNotEqualHEX16Arrays1(void)
+{
+    unsigned short p0[] = {1, 8, 987, 65132u};
+    unsigned short p1[] = {1, 8, 987, 65131u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_HEX16_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualHEX16Arrays2(void)
+{
+    unsigned short p0[] = {1, 8, 987, 65132u};
+    unsigned short p1[] = {2, 8, 987, 65132u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_HEX16_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualHEX16Arrays3(void)
+{
+    unsigned short p0[] = {1, 8, 987, 65132u};
+    unsigned short p1[] = {1, 8, 986, 65132u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_HEX16_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testEqualHEX8Arrays(void)
+{
+    unsigned char p0[] = {1, 8, 254u, 123};
+    unsigned char p1[] = {1, 8, 254u, 123};
+    unsigned char p2[] = {1, 8, 254u, 2};
+    unsigned char p3[] = {1, 23, 25, 26};
+
+    TEST_ASSERT_EQUAL_HEX8_ARRAY(p0, p0, 1);
+    TEST_ASSERT_EQUAL_HEX8_ARRAY(p0, p0, 4);
+    TEST_ASSERT_EQUAL_HEX8_ARRAY(p0, p1, 4);
+    TEST_ASSERT_EQUAL_HEX8_ARRAY(p0, p2, 3);
+    TEST_ASSERT_EQUAL_HEX8_ARRAY(p0, p3, 1);
+}
+
+void testNotEqualHEX8Arrays1(void)
+{
+    unsigned char p0[] = {1, 8, 254u, 253u};
+    unsigned char p1[] = {1, 8, 254u, 252u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_HEX8_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualHEX8Arrays2(void)
+{
+    unsigned char p0[] = {1, 8, 254u, 253u};
+    unsigned char p1[] = {2, 8, 254u, 253u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_HEX8_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualHEX8Arrays3(void)
+{
+    unsigned char p0[] = {1, 8, 254u, 253u};
+    unsigned char p1[] = {1, 8, 255u, 253u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_HEX8_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+}
+
+void testEqualUINT8EachEqual(void)
+{
+    UNITY_UINT8 p0[] = {127u, 127u, 127u, 127u};
+    UNITY_UINT8 p1[] = {1u, 1u, 1u, 1u};
+    UNITY_UINT8 p2[] = {128u, 128u, 128u, 2u};
+    UNITY_UINT8 p3[] = {1u, 50u, 60u, 70u};
+
+    TEST_ASSERT_EACH_EQUAL_UINT8(127u, p0, 1);
+    TEST_ASSERT_EACH_EQUAL_UINT8(127u, p0, 4);
+    TEST_ASSERT_EACH_EQUAL_UINT8(1u, p1, 4);
+    TEST_ASSERT_EACH_EQUAL_UINT8(128u, p2, 3);
+    TEST_ASSERT_EACH_EQUAL_UINT8(1u, p3, 1);
+}
+
+void testNotEqualUINT8EachEqual1(void)
+{
+    unsigned char p0[] = {127u, 127u, 128u, 127u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_UINT8(127u, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualUINT8EachEqual2(void)
+{
+    unsigned char p0[] = {1, 1, 1, 127u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_UINT8(1, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualUINT8EachEqual3(void)
+{
+    unsigned char p0[] = {54u, 55u, 55u, 55u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_UINT8(55u, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testEqualUINT16EachEqual(void)
+{
+    unsigned short p0[] = {65132u, 65132u, 65132u, 65132u};
+    unsigned short p1[] = {987, 987, 987, 987};
+    unsigned short p2[] = {1, 1, 1, 2};
+    unsigned short p3[] = {1, 500, 600, 700};
+
+    TEST_ASSERT_EACH_EQUAL_UINT16(65132u, p0, 1);
+    TEST_ASSERT_EACH_EQUAL_UINT16(65132u, p0, 4);
+    TEST_ASSERT_EACH_EQUAL_UINT16(987, p1, 4);
+    TEST_ASSERT_EACH_EQUAL_UINT16(1, p2, 3);
+    TEST_ASSERT_EACH_EQUAL_UINT16(1, p3, 1);
+}
+
+void testNotEqualUINT16EachEqual1(void)
+{
+    unsigned short p0[] = {1, 65132u, 65132u, 65132u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_UINT16(65132u, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualUINT16EachEqual2(void)
+{
+    unsigned short p0[] = {65132u, 65132u, 987, 65132u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_UINT16(65132u, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualUINT16EachEqual3(void)
+{
+    unsigned short p0[] = {65132u, 65132u, 65132u, 65133u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_UINT16(65132u, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testEqualUINT32EachEqual(void)
+{
+    UNITY_UINT32 p0[] = {65132u, 65132u, 65132u, 65132u};
+    UNITY_UINT32 p1[] = {987, 987, 987, 987};
+    UNITY_UINT32 p2[] = {8, 8, 8, 2};
+    UNITY_UINT32 p3[] = {1, 500, 600, 700};
+
+    TEST_ASSERT_EACH_EQUAL_UINT32(65132u, p0, 1);
+    TEST_ASSERT_EACH_EQUAL_UINT32(65132u, p0, 4);
+    TEST_ASSERT_EACH_EQUAL_UINT32(987, p1, 4);
+    TEST_ASSERT_EACH_EQUAL_UINT32(8, p2, 3);
+    TEST_ASSERT_EACH_EQUAL_UINT32(1, p3, 1);
+}
+
+void testNotEqualUINT32EachEqual1(void)
+{
+    UNITY_UINT32 p0[] = {65132u, 65132u, 987, 65132u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_UINT32(65132u, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualUINT32EachEqual2(void)
+{
+    UNITY_UINT32 p0[] = {1, 987, 987, 987};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_UINT32(987, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualUINT32EachEqual3(void)
+{
+    UNITY_UINT32 p0[] = {1, 1, 1, 65132u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_UINT32(1, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testEqualHEXEachEqual(void)
+{
+    UNITY_UINT32 p0[] = {65132u, 65132u, 65132u, 65132u};
+    UNITY_UINT32 p1[] = {987, 987, 987, 987};
+    UNITY_UINT32 p2[] = {8, 8, 8, 2};
+    UNITY_UINT32 p3[] = {1, 500, 600, 700};
+
+    TEST_ASSERT_EACH_EQUAL_HEX(65132u, p0, 1);
+    TEST_ASSERT_EACH_EQUAL_HEX(65132u, p0, 4);
+    TEST_ASSERT_EACH_EQUAL_HEX(987, p1, 4);
+    TEST_ASSERT_EACH_EQUAL_HEX(8, p2, 3);
+    TEST_ASSERT_EACH_EQUAL_HEX(1, p3, 1);
+}
+
+void testNotEqualHEXEachEqual1(void)
+{
+    UNITY_UINT32 p0[] = {1, 65132u, 65132u, 65132u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_HEX32(65132u, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualHEXEachEqual2(void)
+{
+    UNITY_UINT32 p0[] = {987, 987, 987, 65132u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_HEX32(987, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualHEXEachEqual3(void)
+{
+    UNITY_UINT32 p0[] = {8, 8, 987, 8};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_HEX(8, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testEqualHEX32EachEqual(void)
+{
+    UNITY_UINT32 p0[] = {65132u, 65132u, 65132u, 65132u};
+    UNITY_UINT32 p1[] = {987, 987, 987, 987};
+    UNITY_UINT32 p2[] = {8, 8, 8, 2};
+    UNITY_UINT32 p3[] = {1, 500, 600, 700};
+
+    TEST_ASSERT_EACH_EQUAL_HEX32(65132u, p0, 1);
+    TEST_ASSERT_EACH_EQUAL_HEX32(65132u, p0, 4);
+    TEST_ASSERT_EACH_EQUAL_HEX32(987, p1, 4);
+    TEST_ASSERT_EACH_EQUAL_HEX32(8, p2, 3);
+    TEST_ASSERT_EACH_EQUAL_HEX32(1, p3, 1);
+}
+
+void testNotEqualHEX32EachEqual1(void)
+{
+    UNITY_UINT32 p0[] = {65132u, 8, 65132u, 65132u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_HEX32(65132u, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualHEX32EachEqual2(void)
+{
+    UNITY_UINT32 p0[] = {1, 987, 987, 987};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_HEX32(987, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualHEX32EachEqual3(void)
+{
+    UNITY_UINT32 p0[] = {8, 8, 8, 65132u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_HEX32(8, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testEqualHEX16EachEqual(void)
+{
+    UNITY_UINT16 p0[] = {65132u, 65132u, 65132u, 65132u};
+    UNITY_UINT16 p1[] = {987, 987, 987, 987};
+    UNITY_UINT16 p2[] = {8, 8, 8, 2};
+    UNITY_UINT16 p3[] = {1, 500, 600, 700};
+
+    TEST_ASSERT_EACH_EQUAL_HEX16(65132u, p0, 1);
+    TEST_ASSERT_EACH_EQUAL_HEX16(65132u, p0, 4);
+    TEST_ASSERT_EACH_EQUAL_HEX16(987, p1, 4);
+    TEST_ASSERT_EACH_EQUAL_HEX16(8, p2, 3);
+    TEST_ASSERT_EACH_EQUAL_HEX16(1, p3, 1);
+}
+
+void testNotEqualHEX16EachEqual1(void)
+{
+    unsigned short p0[] = {65132u, 65132u, 987, 65132u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_HEX16(65132u, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualHEX16EachEqual2(void)
+{
+    unsigned short p0[] = {1, 987, 987, 987};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_HEX16(987, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualHEX16EachEqual3(void)
+{
+    unsigned short p0[] = {8, 8, 8, 65132u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_HEX16(8, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testEqualHEX8EachEqual(void)
+{
+    unsigned char p0[] = {254u, 254u, 254u, 254u};
+    unsigned char p1[] = {123, 123, 123, 123};
+    unsigned char p2[] = {8, 8, 8, 2};
+    unsigned char p3[] = {1, 23, 25, 26};
+
+    TEST_ASSERT_EACH_EQUAL_HEX8(254u, p0, 1);
+    TEST_ASSERT_EACH_EQUAL_HEX8(254u, p0, 4);
+    TEST_ASSERT_EACH_EQUAL_HEX8(123, p1, 4);
+    TEST_ASSERT_EACH_EQUAL_HEX8(8, p2, 3);
+    TEST_ASSERT_EACH_EQUAL_HEX8(1, p3, 1);
+}
+
+void testNotEqualHEX8EachEqual1(void)
+{
+    unsigned char p0[] = {253u, 253u, 254u, 253u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_HEX8(253u, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualHEX8EachEqual2(void)
+{
+    unsigned char p0[] = {254u, 254u, 254u, 253u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_HEX8(254u, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualHEX8EachEqual3(void)
+{
+    unsigned char p0[] = {1, 8, 8, 8};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_HEX8(8, p0, 4);
+    VERIFY_FAILS_END
+}
+
+void testEqualHEX64Arrays(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 p0[] = {1, 8, 987, 65132u};
+    UNITY_UINT64 p1[] = {1, 8, 987, 65132u};
+    UNITY_UINT64 p2[] = {1, 8, 987, 2};
+    UNITY_UINT64 p3[] = {1, 500, 600, 700};
+
+    TEST_ASSERT_EQUAL_HEX64_ARRAY(p0, p0, 1);
+    TEST_ASSERT_EQUAL_HEX64_ARRAY(p0, p0, 4);
+    TEST_ASSERT_EQUAL_HEX64_ARRAY(p0, p1, 4);
+    TEST_ASSERT_EQUAL_HEX64_ARRAY(p0, p2, 3);
+    TEST_ASSERT_EQUAL_HEX64_ARRAY(p0, p3, 1);
+#endif
+}
+
+void testEqualUint64Arrays(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 p0[] = {1, 8, 987, 65132u};
+    UNITY_UINT64 p1[] = {1, 8, 987, 65132u};
+    UNITY_UINT64 p2[] = {1, 8, 987, 2};
+    UNITY_UINT64 p3[] = {1, 500, 600, 700};
+
+    TEST_ASSERT_EQUAL_UINT64_ARRAY(p0, p0, 1);
+    TEST_ASSERT_EQUAL_UINT64_ARRAY(p0, p0, 4);
+    TEST_ASSERT_EQUAL_UINT64_ARRAY(p0, p1, 4);
+    TEST_ASSERT_EQUAL_UINT64_ARRAY(p0, p2, 3);
+    TEST_ASSERT_EQUAL_UINT64_ARRAY(p0, p3, 1);
+#endif
+}
+
+void testEqualInt64Arrays(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 p0[] = {1, 8, 987, -65132};
+    UNITY_INT64 p1[] = {1, 8, 987, -65132};
+    UNITY_INT64 p2[] = {1, 8, 987, -2};
+    UNITY_INT64 p3[] = {1, 500, 600, 700};
+
+    TEST_ASSERT_EQUAL_INT64_ARRAY(p0, p0, 1);
+    TEST_ASSERT_EQUAL_INT64_ARRAY(p0, p0, 4);
+    TEST_ASSERT_EQUAL_INT64_ARRAY(p0, p1, 4);
+    TEST_ASSERT_EQUAL_INT64_ARRAY(p0, p2, 3);
+    TEST_ASSERT_EQUAL_INT64_ARRAY(p0, p3, 1);
+#endif
+}
+
+
+void testNotEqualHEX64Arrays1(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 p0[] = {1, 8, 987, 65132u};
+    UNITY_UINT64 p1[] = {1, 8, 987, 65131u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_HEX64_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualHEX64Arrays2(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 p0[] = {1, 8, 987, 65132u};
+    UNITY_UINT64 p1[] = {2, 8, 987, 65132u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_HEX64_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualUint64Arrays(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 p0[] = {1, 8, 987, 65132u};
+    UNITY_UINT64 p1[] = {1, 8, 987, 65131u};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_UINT64_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualInt64Arrays(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 p0[] = {1, 8, 987, -65132};
+    UNITY_INT64 p1[] = {1, 8, 987, -65131};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_INT64_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+#endif
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_unity_core.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_unity_core.c
new file mode 100644
index 000000000..d324e8619
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_unity_core.c
@@ -0,0 +1,371 @@
+/* ==========================================
+    Unity Project - A Test Framework for C
+    Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+========================================== */
+
+#include "unity.h"
+#define TEST_INSTANCES
+#include "self_assessment_utils.h"
+
+static int SetToOneToFailInTearDown;
+static int SetToOneMeanWeAlreadyCheckedThisGuy;
+
+void setUp(void)
+{
+    SetToOneToFailInTearDown = 0;
+    SetToOneMeanWeAlreadyCheckedThisGuy = 0;
+}
+
+void tearDown(void)
+{
+    endPutcharSpy(); /* Stop suppressing test output */
+    if (SetToOneToFailInTearDown == 1)
+    {
+        /* These will be skipped internally if already failed/ignored */
+        TEST_FAIL_MESSAGE("<= Failed in tearDown");
+        TEST_IGNORE_MESSAGE("<= Ignored in tearDown");
+    }
+    if ((SetToOneMeanWeAlreadyCheckedThisGuy == 0) && (Unity.CurrentTestFailed > 0))
+    {
+        UnityPrint(": [[[[ Test Should Have Passed But Did Not ]]]]");
+        UNITY_OUTPUT_CHAR('\n');
+    }
+}
+
+void testUnitySizeInitializationReminder(void)
+{
+    /* This test ensures that sizeof(struct UNITY_STORAGE_T) doesn't change. If this
+     * test breaks, go look at the initialization of the Unity global variable
+     * in unity.c and make sure we're filling in the proper fields. */
+    const char* message = "Unexpected size for UNITY_STORAGE_T struct. Please check that "
+                     "the initialization of the Unity symbol in unity.c is "
+                     "still correct.";
+
+    /* Define a structure with all the same fields as `struct UNITY_STORAGE_T`. */
+#ifdef UNITY_EXCLUDE_DETAILS
+    struct {
+        const char* TestFile;
+        const char* CurrentTestName;
+        UNITY_LINE_TYPE CurrentTestLineNumber;
+        UNITY_COUNTER_TYPE NumberOfTests;
+        UNITY_COUNTER_TYPE TestFailures;
+        UNITY_COUNTER_TYPE TestIgnores;
+        UNITY_COUNTER_TYPE CurrentTestFailed;
+        UNITY_COUNTER_TYPE CurrentTestIgnored;
+#ifdef UNITY_INCLUDE_EXEC_TIME
+        UNITY_TIME_TYPE CurrentTestStartTime;
+        UNITY_TIME_TYPE CurrentTestStopTime;
+#endif
+#ifndef UNITY_EXCLUDE_SETJMP_H
+        jmp_buf AbortFrame;
+#endif
+    } _Expected_Unity;
+#else
+    struct {
+        const char* TestFile;
+        const char* CurrentTestName;
+        const char* CurrentDetails1;
+        const char* CurrentDetails2;
+        UNITY_LINE_TYPE CurrentTestLineNumber;
+        UNITY_COUNTER_TYPE NumberOfTests;
+        UNITY_COUNTER_TYPE TestFailures;
+        UNITY_COUNTER_TYPE TestIgnores;
+        UNITY_COUNTER_TYPE CurrentTestFailed;
+        UNITY_COUNTER_TYPE CurrentTestIgnored;
+#ifdef UNITY_INCLUDE_EXEC_TIME
+        UNITY_COUNTER_TYPE CurrentTestStartTime;
+        UNITY_COUNTER_TYPE CurrentTestStopTime;
+#endif
+#ifndef UNITY_EXCLUDE_SETJMP_H
+        jmp_buf AbortFrame;
+#endif
+    } _Expected_Unity;
+#endif
+
+    /* Compare our fake structure's size to the actual structure's size. They
+     * should be the same.
+     *
+     * This accounts for alignment, padding, and packing issues that might come
+     * up between different architectures. */
+    TEST_ASSERT_EQUAL_MESSAGE(sizeof(_Expected_Unity), sizeof(Unity), message);
+}
+
+void testPassShouldEndImmediatelyWithPass(void)
+{
+    TEST_PASS();
+    TEST_FAIL_MESSAGE("We should have passed already and finished this test");
+}
+
+void testPassShouldEndImmediatelyWithPassAndMessage(void)
+{
+    TEST_PASS_MESSAGE("Woohoo! This Automatically Passes!");
+    TEST_FAIL_MESSAGE("We should have passed already and finished this test");
+}
+
+void testMessageShouldDisplayMessageWithoutEndingAndGoOnToPass(void)
+{
+    TEST_MESSAGE("This is just a message");
+    TEST_MESSAGE("This is another message");
+    TEST_PASS();
+}
+
+void testMessageShouldDisplayMessageWithoutEndingAndGoOnToFail(void)
+{
+    TEST_MESSAGE("This is yet another message");
+
+    EXPECT_ABORT_BEGIN
+    TEST_FAIL();
+    VERIFY_FAILS_END
+}
+
+void testTrue(void)
+{
+    TEST_ASSERT(1);
+
+    TEST_ASSERT_TRUE(1);
+}
+
+void testFalse(void)
+{
+    TEST_ASSERT_FALSE(0);
+
+    TEST_ASSERT_UNLESS(0);
+}
+
+void testSingleStatement(void)
+{
+    for(int i = 0; i < 2; i++)
+    {
+        /* TEST_ASSERT_TRUE should expand to a single C statement, minus
+         * the semicolon. This if-else will fail to compile otherwise. */
+        if(i > 0)
+            TEST_ASSERT_TRUE(i);
+        else
+            TEST_ASSERT_FALSE(i);
+    }
+}
+
+void testPreviousPass(void)
+{
+    TEST_ASSERT_EQUAL_INT(0U, Unity.TestFailures);
+}
+
+void testNotVanilla(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT(0);
+    VERIFY_FAILS_END
+}
+
+void testNotTrue(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_TRUE(0);
+    VERIFY_FAILS_END
+}
+
+void testNotFalse(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_FALSE(1);
+    VERIFY_FAILS_END
+}
+
+void testNotUnless(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UNLESS(1);
+    VERIFY_FAILS_END
+}
+
+void testNotNotEqual(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_NOT_EQUAL(10, 10);
+    VERIFY_FAILS_END
+}
+
+void testFail(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_FAIL_MESSAGE("Expected for testing");
+    VERIFY_FAILS_END
+}
+
+void testIsNull(void)
+{
+    char* ptr1 = NULL;
+    const char* ptr2 = "hello";
+
+    TEST_ASSERT_NULL(ptr1);
+    TEST_ASSERT_NOT_NULL(ptr2);
+}
+
+void testIsNullShouldFailIfNot(void)
+{
+    const char* ptr1 = "hello";
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_NULL(ptr1);
+    VERIFY_FAILS_END
+}
+
+void testNotNullShouldFailIfNULL(void)
+{
+    char* ptr1 = NULL;
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_NOT_NULL(ptr1);
+    VERIFY_FAILS_END
+}
+
+void testIsEmpty(void)
+{
+    const char* ptr1 = "\0";
+    const char* ptr2 = "hello";
+
+    TEST_ASSERT_EMPTY(ptr1);
+    TEST_ASSERT_NOT_EMPTY(ptr2);
+}
+
+void testIsEmptyShouldFailIfNot(void)
+{
+    const char* ptr1 = "hello";
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EMPTY(ptr1);
+    VERIFY_FAILS_END
+}
+
+void testNotEmptyShouldFailIfEmpty(void)
+{
+    const char* ptr1 = "\0";
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_NOT_EMPTY(ptr1);
+    VERIFY_FAILS_END
+}
+
+void testIgnore(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_IGNORE();
+    TEST_FAIL_MESSAGE("This should not be reached");
+    VERIFY_IGNORES_END
+}
+
+void testIgnoreMessage(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_IGNORE_MESSAGE("This is an expected TEST_IGNORE_MESSAGE string!");
+    TEST_FAIL_MESSAGE("This should not be reached");
+    VERIFY_IGNORES_END
+}
+
+void testProtection(void)
+{
+    volatile int mask = 0;
+
+    if (TEST_PROTECT())
+    {
+        mask |= 1;
+        TEST_ABORT();
+    }
+    else
+    {
+        Unity.CurrentTestFailed = 0;
+        mask |= 2;
+    }
+
+    TEST_ASSERT_EQUAL(3, mask);
+}
+
+void testIgnoredAndThenFailInTearDown(void)
+{
+    SetToOneToFailInTearDown = 1;
+    TEST_IGNORE();
+}
+
+void testFailureCountIncrementsAndIsReturnedAtEnd(void)
+{
+#ifndef USING_OUTPUT_SPY
+    TEST_IGNORE();
+#else
+    UNITY_UINT savedFailures = Unity.TestFailures;
+    Unity.CurrentTestFailed = 1;
+    startPutcharSpy(); /* Suppress output */
+    startFlushSpy();
+    TEST_ASSERT_EQUAL(0, getFlushSpyCalls());
+    UnityConcludeTest();
+    endPutcharSpy();
+    TEST_ASSERT_EQUAL(savedFailures + 1, Unity.TestFailures);
+#if defined(UNITY_OUTPUT_FLUSH) && defined(UNITY_OUTPUT_FLUSH_HEADER_DECLARATION)
+    TEST_ASSERT_EQUAL(1, getFlushSpyCalls());
+#else
+    TEST_ASSERT_EQUAL(0, getFlushSpyCalls());
+#endif
+    endFlushSpy();
+
+    startPutcharSpy(); /* Suppress output */
+    int failures = UnityEnd();
+    Unity.TestFailures--;
+    endPutcharSpy();
+    TEST_ASSERT_EQUAL(savedFailures + 1, failures);
+#endif
+}
+
+/* ===================== THESE TEST WILL RUN IF YOUR CONFIG INCLUDES DETAIL SUPPORT ================== */
+
+void testThatDetailsCanBeHandleOneDetail(void)
+{
+#ifdef UNITY_EXCLUDE_DETAILS
+    TEST_IGNORE();
+#else
+    UNITY_SET_DETAIL("Detail1");
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_INT_MESSAGE(5, 6, "Should Fail And Say Detail1");
+    VERIFY_FAILS_END
+#endif
+}
+
+void testThatDetailsCanHandleTestFail(void)
+{
+#ifdef UNITY_EXCLUDE_DETAILS
+    TEST_IGNORE();
+#else
+    UNITY_SET_DETAILS("Detail1","Detail2");
+
+    EXPECT_ABORT_BEGIN
+    TEST_FAIL_MESSAGE("Should Fail And Say Detail1 and Detail2");
+    VERIFY_FAILS_END
+#endif
+}
+
+void testThatDetailsCanBeHandleTwoDetails(void)
+{
+#ifdef UNITY_EXCLUDE_DETAILS
+    TEST_IGNORE();
+#else
+    UNITY_SET_DETAILS("Detail1","Detail2");
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_HEX8_MESSAGE(7, 8, "Should Fail And Say Detail1 and Detail2");
+    VERIFY_FAILS_END
+#endif
+}
+
+void testThatDetailsCanBeHandleSingleDetailClearingTwoDetails(void)
+{
+#ifdef UNITY_EXCLUDE_DETAILS
+    TEST_IGNORE();
+#else
+    UNITY_SET_DETAILS("Detail1","Detail2");
+    UNITY_SET_DETAIL("DetailNew");
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_STRING_MESSAGE("MEH", "GUH", "Should Fail And Say DetailNew");
+    VERIFY_FAILS_END
+#endif
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_unity_doubles.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_unity_doubles.c
new file mode 100644
index 000000000..1bdedbc33
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_unity_doubles.c
@@ -0,0 +1,773 @@
+/* ==========================================
+    Unity Project - A Test Framework for C
+    Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+========================================== */
+
+#include "unity.h"
+#define TEST_INSTANCES
+#include "self_assessment_utils.h"
+
+static int SetToOneToFailInTearDown;
+static int SetToOneMeanWeAlreadyCheckedThisGuy;
+
+void setUp(void)
+{
+    SetToOneToFailInTearDown = 0;
+    SetToOneMeanWeAlreadyCheckedThisGuy = 0;
+}
+
+void tearDown(void)
+{
+    endPutcharSpy(); /* Stop suppressing test output */
+    if (SetToOneToFailInTearDown == 1)
+    {
+        /* These will be skipped internally if already failed/ignored */
+        TEST_FAIL_MESSAGE("<= Failed in tearDown");
+        TEST_IGNORE_MESSAGE("<= Ignored in tearDown");
+    }
+    if ((SetToOneMeanWeAlreadyCheckedThisGuy == 0) && (Unity.CurrentTestFailed > 0))
+    {
+        UnityPrint(": [[[[ Test Should Have Passed But Did Not ]]]]");
+        UNITY_OUTPUT_CHAR('\n');
+    }
+}
+
+void testDoublesWithinDelta(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_DOUBLE_WITHIN(0.00003, 187245.03485, 187245.03488);
+    TEST_ASSERT_DOUBLE_WITHIN(1.0, 187245.0, 187246.0);
+    TEST_ASSERT_DOUBLE_WITHIN(0.05, 9273.2549, 9273.2049);
+    TEST_ASSERT_DOUBLE_WITHIN(0.007, -726.93725, -726.94424);
+#endif
+}
+
+void testDoublesNotWithinDelta(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_DOUBLE_WITHIN(0.05, 9273.2649, 9273.2049);
+    VERIFY_FAILS_END
+#endif
+}
+
+
+void testDoublesEqual(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_EQUAL_DOUBLE(187245123456.0, 187245123456.0);
+    TEST_ASSERT_EQUAL_DOUBLE(187241234567.5, 187241234567.6);
+    TEST_ASSERT_EQUAL_DOUBLE(9273.2512345649, 9273.25123455699);
+    TEST_ASSERT_EQUAL_DOUBLE(-726.12345693724, -726.1234569374);
+#endif
+}
+
+void testDoublesNotEqual(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_DOUBLE(9273.9649, 9273.0049);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testDoublesNotEqualNegative1(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_DOUBLE(-9273.9649, -9273.0049);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testDoublesNotEqualNegative2(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_DOUBLE(-9273.0049, -9273.9649);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testDoublesNotEqualActualNaN(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_DOUBLE(85.963, 0.0 / d_zero);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testDoublesNotEqualExpectedNaN(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_DOUBLE(0.0 / d_zero, 85.963);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testDoublesEqualBothNaN(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_EQUAL_DOUBLE(0.0 / d_zero, 0.0 / d_zero);
+#endif
+}
+
+void testDoublesNotEqualInfNaN(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_DOUBLE(1.0 / d_zero, 0.0 / d_zero);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testDoublesNotEqualNaNInf(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_DOUBLE(0.0 / d_zero, 1.0 / d_zero);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testDoublesNotEqualActualInf(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_DOUBLE(321.642, 1.0 / d_zero);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testDoublesNotEqualExpectedInf(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_DOUBLE(1.0 / d_zero, 321.642);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testDoublesEqualBothInf(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_EQUAL_DOUBLE(1.0 / d_zero, 1.0 / d_zero);
+#endif
+}
+
+void testDoublesNotEqualPlusMinusInf(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_DOUBLE(1.0 / d_zero, -1.0 / d_zero);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testDoubleIsPosInf1(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_DOUBLE_IS_INF(2.0 / d_zero);
+#endif
+}
+
+void testDoubleIsPosInf2(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_DOUBLE_IS_NOT_INF(2.0 / d_zero);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testDoubleIsNegInf1(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_DOUBLE_IS_NEG_INF(-3.0 / d_zero);
+#endif
+}
+
+void testDoubleIsNegInf2(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_DOUBLE_IS_NOT_NEG_INF(-3.0 / d_zero);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testDoubleIsNotPosInf1(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_DOUBLE_IS_INF(2.0);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testDoubleIsNotPosInf2(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_DOUBLE_IS_NOT_INF(2.0);
+#endif
+}
+
+void testDoubleIsNotNegInf(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_DOUBLE_IS_NEG_INF(-999.876);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testDoubleIsNan1(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_DOUBLE_IS_NAN(0.0 / d_zero);
+#endif
+}
+
+void testDoubleIsNan2(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_DOUBLE_IS_NOT_NAN(0.0 / d_zero);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testDoubleIsNotNan1(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_DOUBLE_IS_NAN(234.9);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testDoubleIsNotNan2(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_DOUBLE_IS_NOT_NAN(234.9);
+#endif
+}
+
+void testDoubleInfIsNotNan(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_DOUBLE_IS_NAN(1.0 / d_zero);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testDoubleNanIsNotInf(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_DOUBLE_IS_INF(0.0 / d_zero);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testDoubleIsDeterminate1(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_DOUBLE_IS_DETERMINATE(0.0);
+    TEST_ASSERT_DOUBLE_IS_DETERMINATE(123.3);
+    TEST_ASSERT_DOUBLE_IS_DETERMINATE(-88.3);
+#endif
+}
+
+void testDoubleIsDeterminate2(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_DOUBLE_IS_NOT_DETERMINATE(-88.3);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testDoubleIsNotDeterminate1(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_DOUBLE_IS_NOT_DETERMINATE(1.0 / d_zero);
+    TEST_ASSERT_DOUBLE_IS_NOT_DETERMINATE(-1.0 / d_zero);
+    TEST_ASSERT_DOUBLE_IS_NOT_DETERMINATE(0.0 / d_zero);
+#endif
+}
+
+void testDoubleIsNotDeterminate2(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_DOUBLE_IS_DETERMINATE(-1.0 / d_zero);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testDoubleTraitFailsOnInvalidTrait(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    UnityAssertDoubleSpecial(1.0, NULL, __LINE__, UNITY_FLOAT_INVALID_TRAIT);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testEqualDoubleArrays(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    double p0[] = {1.0, -8.0,  25.4, -0.123};
+    double p1[] = {1.0, -8.0,  25.4, -0.123};
+    double p2[] = {1.0, -8.0,  25.4, -0.2};
+    double p3[] = {1.0, -23.0, 25.0, -0.26};
+
+    TEST_ASSERT_EQUAL_DOUBLE_ARRAY(p0, p0, 1);
+    TEST_ASSERT_EQUAL_DOUBLE_ARRAY(p0, p0, 4);
+    TEST_ASSERT_EQUAL_DOUBLE_ARRAY(p0, p1, 4);
+    TEST_ASSERT_EQUAL_DOUBLE_ARRAY(p0, p2, 3);
+    TEST_ASSERT_EQUAL_DOUBLE_ARRAY(p0, p3, 1);
+    TEST_ASSERT_EQUAL_DOUBLE_ARRAY(NULL, NULL, 1);
+#endif
+}
+
+void testNotEqualDoubleArraysExpectedNull(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    double* p0 = NULL;
+    double p1[] = {1.0, 8.0, 25.4, 0.252};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_DOUBLE_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualDoubleArraysActualNull(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    double p0[] = {1.0, 8.0, 25.4, 0.253};
+    double* p1 = NULL;
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_DOUBLE_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualDoubleArrays1(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    double p0[] = {1.0, 8.0, 25.4, 0.25666666667};
+    double p1[] = {1.0, 8.0, 25.4, 0.25666666666};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_DOUBLE_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualDoubleArrays2(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    double p0[] = {1.0, 8.0, 25.4, 0.253};
+    double p1[] = {2.0, 8.0, 25.4, 0.253};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_DOUBLE_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualDoubleArrays3(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    double p0[] = {1.0, 8.0, 25.4, 0.253};
+    double p1[] = {1.0, 8.0, 25.5, 0.253};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_DOUBLE_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualDoubleArraysNegative1(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    double p0[] = {-1.0, -8.0, -25.4, -0.2566666667};
+    double p1[] = {-1.0, -8.0, -25.4, -0.2566666666};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_DOUBLE_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualDoubleArraysNegative2(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    double p0[] = {-1.0, -8.0, -25.4, -0.253};
+    double p1[] = {-2.0, -8.0, -25.4, -0.253};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_DOUBLE_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualDoubleArraysNegative3(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    double p0[] = {-1.0, -8.0, -25.4, -0.253};
+    double p1[] = {-1.0, -8.0, -25.5, -0.253};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_DOUBLE_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testEqualDoubleArraysNaN(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    double p0[] = {1.0, 0.0 / d_zero, 25.4, 0.253};
+    double p1[] = {1.0, 0.0 / d_zero, 25.4, 0.253};
+
+    TEST_ASSERT_EQUAL_DOUBLE_ARRAY(p0, p1, 4);
+#endif
+}
+
+void testEqualDoubleArraysInf(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    double p0[] = {1.0, 1.0 / d_zero, 25.4, 0.253};
+    double p1[] = {1.0, 1.0 / d_zero, 25.4, 0.253};
+
+    TEST_ASSERT_EQUAL_DOUBLE_ARRAY(p0, p1, 4);
+#endif
+}
+
+void testNotEqualDoubleArraysLengthZero(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    double p0[1] = {0.0};
+    double p1[1] = {0.0};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_DOUBLE_ARRAY(p0, p1, 0);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testEqualDoubleEachEqual(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    double p0[] = {1.0, 1.0, 1.0, 1.0};
+    double p1[] = {-0.123, -0.123, -0.123, -0.123};
+    double p2[] = {25.4, 25.4, 25.4, -0.2};
+    double p3[] = {1.0, -23.0, 25.0, -0.26};
+
+    TEST_ASSERT_EACH_EQUAL_DOUBLE(1.0, p0, 1);
+    TEST_ASSERT_EACH_EQUAL_DOUBLE(1.0, p0, 4);
+    TEST_ASSERT_EACH_EQUAL_DOUBLE(-0.123, p1, 4);
+    TEST_ASSERT_EACH_EQUAL_DOUBLE(25.4, p2, 3);
+    TEST_ASSERT_EACH_EQUAL_DOUBLE(1.0, p3, 1);
+#endif
+}
+
+void testNotEqualDoubleEachEqualActualNull(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    double* p0 = NULL;
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_DOUBLE(5, p0, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualDoubleEachEqual1(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    double p0[] = {0.253, 8.0, 0.253, 0.253};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_DOUBLE(0.253, p0, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualDoubleEachEqual2(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    double p0[] = {8.0, 8.0, 8.0, 0.253};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_DOUBLE(8.0, p0, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualDoubleEachEqual3(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    double p0[] = {1.0, 1.0, 1.0, 0.253};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_DOUBLE(1.0, p0, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualDoubleEachEqualNegative1(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    double p0[] = {-1.0, -0.253, -0.253, -0.253};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_DOUBLE(-0.253, p0, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualDoubleEachEqualNegative2(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    double p0[] = {-25.4, -8.0, -25.4, -25.4};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_DOUBLE(-25.4, p0, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualDoubleEachEqualNegative3(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    double p0[] = {-8.0, -8.0, -8.0, -0.253};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_DOUBLE(-8.0, p0, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testEqualDoubleEachEqualNaN(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    double p0[] = {0.0 / d_zero, 0.0 / d_zero, 0.0 / d_zero, 0.0 / d_zero};
+
+    TEST_ASSERT_EACH_EQUAL_DOUBLE(0.0 / d_zero, p0, 4);
+#endif
+}
+
+void testEqualDoubleEachEqualInf(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    double p0[] = {1.0 / d_zero, 1.0 / d_zero, 25.4, 0.253};
+
+    TEST_ASSERT_EACH_EQUAL_DOUBLE(1.0 / d_zero, p0, 2);
+#endif
+}
+
+void testNotEqualDoubleEachEqualLengthZero(void)
+{
+#ifdef UNITY_EXCLUDE_DOUBLE
+    TEST_IGNORE();
+#else
+    double p0[1] = {0.0};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_DOUBLE(0.0, p0, 0);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testDoublePrinting(void)
+{
+#if defined(UNITY_EXCLUDE_FLOAT_PRINT) || defined(UNITY_EXCLUDE_DOUBLE) || !defined(USING_OUTPUT_SPY)
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("0",             0.0);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("4.99e-07",      0.000000499);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("5.0000005e-07", 0.00000050000005);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("0.100469499",   0.100469499);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("1",             0.9999999995); /*Rounding to int place*/
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("1",             1.0);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("1.25",          1.25);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("7.99999999",    7.99999999); /*Not rounding*/
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("16.0000002",    16.0000002);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("16.0000004",    16.0000004);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("16.0000006",    16.0000006);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("999999999",     999999999.0); /*Last full print integer*/
+
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("0",              -0.0); /* -0 no supported on all targets */
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-4.99e-07",      -0.000000499);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-5.0000005e-07", -0.00000050000005);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-0.100469499",   -0.100469499);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-1",             -0.9999999995); /*Rounding to int place*/
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-1",             -1.0);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-1.25",          -1.25);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-7.99999999",    -7.99999999); /*Not rounding*/
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-16.0000002",    -16.0000002);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-16.0000004",    -16.0000004);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-16.0000006",    -16.0000006);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-999999999",     -999999999.0); /*Last full print integer*/
+
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("0.1004695",       0.10046949999999999);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("4.2949673e+09",   4294967295.9);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("4.2949673e+09",   4294967296.0);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("1e+10",           9999999995.0);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("9.00719925e+15",  9007199254740990.0);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("7e+100",          7.0e+100);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("3e+200",          3.0e+200);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("9.23456789e+300", 9.23456789e+300);
+
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-0.1004695",     -0.10046949999999999);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-4.2949673e+09", -4294967295.9);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-4.2949673e+09", -4294967296.0);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-7e+100",        -7.0e+100);
+#endif
+}
+
+void testDoublePrintingRoundTiesToEven(void)
+{
+#if defined(UNITY_EXCLUDE_FLOAT_PRINT) || defined(UNITY_EXCLUDE_DOUBLE) || !defined(USING_OUTPUT_SPY)
+    TEST_IGNORE();
+#else
+  #ifdef UNITY_ROUND_TIES_AWAY_FROM_ZERO
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("1.00000001e+10", 10000000050.0);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("9.00719925e+15", 9007199245000000.0);
+  #else /* Default to Round ties to even */
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("1e+10",          10000000050.0);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("9.00719924e+15", 9007199245000000.0);
+  #endif
+#endif
+}
+
+void testDoublePrintingInfinityAndNaN(void)
+{
+#if defined(UNITY_EXCLUDE_FLOAT_PRINT) || defined(UNITY_EXCLUDE_DOUBLE) || !defined(USING_OUTPUT_SPY)
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("inf",   1.0 / d_zero);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-inf", -1.0 / d_zero);
+
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("nan",   0.0 / d_zero);
+#endif
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_unity_floats.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_unity_floats.c
new file mode 100644
index 000000000..e89bec20e
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_unity_floats.c
@@ -0,0 +1,884 @@
+/* ==========================================
+    Unity Project - A Test Framework for C
+    Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+========================================== */
+
+#include "unity.h"
+#define TEST_INSTANCES
+#include "self_assessment_utils.h"
+
+static int SetToOneToFailInTearDown;
+static int SetToOneMeanWeAlreadyCheckedThisGuy;
+
+void setUp(void)
+{
+    SetToOneToFailInTearDown = 0;
+    SetToOneMeanWeAlreadyCheckedThisGuy = 0;
+}
+
+void tearDown(void)
+{
+    endPutcharSpy(); /* Stop suppressing test output */
+    if (SetToOneToFailInTearDown == 1)
+    {
+        /* These will be skipped internally if already failed/ignored */
+        TEST_FAIL_MESSAGE("<= Failed in tearDown");
+        TEST_IGNORE_MESSAGE("<= Ignored in tearDown");
+    }
+    if ((SetToOneMeanWeAlreadyCheckedThisGuy == 0) && (Unity.CurrentTestFailed > 0))
+    {
+        UnityPrint(": [[[[ Test Should Have Passed But Did Not ]]]]");
+        UNITY_OUTPUT_CHAR('\n');
+    }
+}
+
+void testFloatsWithinDelta(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_FLOAT_WITHIN(0.00003f, 187245.03485f, 187245.03488f);
+    TEST_ASSERT_FLOAT_WITHIN(1.0f, 187245.0f, 187246.0f);
+    TEST_ASSERT_FLOAT_WITHIN(0.05f, 9273.2549f, 9273.2049f);
+    TEST_ASSERT_FLOAT_WITHIN(0.007f, -726.93724f, -726.94424f);
+#endif
+}
+
+void testFloatsNotWithinDelta(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_FLOAT_WITHIN(0.05f, 9273.2649f, 9273.2049f);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testFloatsEqual(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_EQUAL_FLOAT(187245.0f, 187246.0f);
+    TEST_ASSERT_EQUAL_FLOAT(18724.5f, 18724.6f);
+    TEST_ASSERT_EQUAL_FLOAT(9273.2549f, 9273.2599f);
+    TEST_ASSERT_EQUAL_FLOAT(-726.93724f, -726.9374f);
+#endif
+}
+
+void testFloatsNotEqual(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_FLOAT(9273.9649f, 9273.0049f);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testFloatsNotEqualNegative1(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_FLOAT(-9273.9649f, -9273.0049f);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testFloatsNotEqualNegative2(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_FLOAT(-9273.0049f, -9273.9649f);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testFloatsNotEqualActualNaN(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_FLOAT(85.963f, 0.0f / f_zero);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testFloatsNotEqualExpectedNaN(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_FLOAT(0.0f / f_zero, 85.963f);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testFloatsEqualBothNaN(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_EQUAL_FLOAT(0.0f / f_zero, 0.0f / f_zero);
+#endif
+}
+
+void testFloatsNotEqualInfNaN(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_FLOAT(1.0f / f_zero, 0.0f / f_zero);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testFloatsNotEqualNaNInf(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_FLOAT(0.0f / f_zero, 1.0f / f_zero);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testFloatsNotEqualActualInf(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_FLOAT(321.642f, 1.0f / f_zero);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testFloatsNotEqualExpectedInf(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_FLOAT(1.0f / f_zero, 321.642f);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testFloatsEqualBothInf(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_EQUAL_FLOAT(1.0f / f_zero, 1.0f / f_zero);
+#endif
+}
+
+void testFloatsNotEqualPlusMinusInf(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_FLOAT(1.0f / f_zero, -1.0f / f_zero);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testFloatIsPosInf1(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_FLOAT_IS_INF(2.0f / f_zero);
+#endif
+}
+
+void testFloatIsPosInf2(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_FLOAT_IS_NOT_INF(2.0f / f_zero);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testFloatIsNegInf1(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_FLOAT_IS_NEG_INF(-3.0f / f_zero);
+#endif
+}
+
+void testFloatIsNegInf2(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_FLOAT_IS_NOT_NEG_INF(-3.0f / f_zero);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testFloatIsNotPosInf1(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_FLOAT_IS_INF(2.0f);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testFloatIsNotPosInf2(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_FLOAT_IS_NOT_INF(2.0f);
+#endif
+}
+
+void testFloatIsNotNegInf(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_FLOAT_IS_NEG_INF(-999.876f);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testFloatIsNan1(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_FLOAT_IS_NAN(0.0f / f_zero);
+#endif
+}
+
+void testFloatIsNan2(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_FLOAT_IS_NOT_NAN(0.0f / f_zero);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testFloatIsNotNan1(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_FLOAT_IS_NAN(234.9f);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testFloatIsNotNan2(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_FLOAT_IS_NOT_NAN(234.9f);
+#endif
+}
+
+void testFloatInfIsNotNan(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_FLOAT_IS_NAN(1.0f / f_zero);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testFloatNanIsNotInf(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_FLOAT_IS_INF(0.0f / f_zero);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testFloatIsDeterminate1(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_FLOAT_IS_DETERMINATE(0.0f);
+    TEST_ASSERT_FLOAT_IS_DETERMINATE(123.3f);
+    TEST_ASSERT_FLOAT_IS_DETERMINATE(-88.3f);
+#endif
+}
+
+void testFloatIsDeterminate2(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_FLOAT_IS_NOT_DETERMINATE(-88.3f);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testFloatIsNotDeterminate1(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_FLOAT_IS_NOT_DETERMINATE(1.0f / f_zero);
+    TEST_ASSERT_FLOAT_IS_NOT_DETERMINATE(-1.0f / f_zero);
+    TEST_ASSERT_FLOAT_IS_NOT_DETERMINATE(0.0f / f_zero);
+#endif
+}
+
+void testFloatIsNotDeterminate2(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_FLOAT_IS_DETERMINATE(-1.0f / f_zero);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testFloatTraitFailsOnInvalidTrait(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    UnityAssertFloatSpecial(1.0f, NULL, __LINE__, UNITY_FLOAT_INVALID_TRAIT);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testEqualFloatArrays(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    float p0[] = {1.0f, -8.0f,  25.4f, -0.123f};
+    float p1[] = {1.0f, -8.0f,  25.4f, -0.123f};
+    float p2[] = {1.0f, -8.0f,  25.4f, -0.2f};
+    float p3[] = {1.0f, -23.0f, 25.0f, -0.26f};
+
+    TEST_ASSERT_EQUAL_FLOAT_ARRAY(p0, p0, 1);
+    TEST_ASSERT_EQUAL_FLOAT_ARRAY(p0, p0, 4);
+    TEST_ASSERT_EQUAL_FLOAT_ARRAY(p0, p1, 4);
+    TEST_ASSERT_EQUAL_FLOAT_ARRAY(p0, p2, 3);
+    TEST_ASSERT_EQUAL_FLOAT_ARRAY(p0, p3, 1);
+    TEST_ASSERT_EQUAL_FLOAT_ARRAY(NULL, NULL, 1);
+#endif
+}
+
+void testNotEqualFloatArraysExpectedNull(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    float* p0 = NULL;
+    float p1[] = {1.0f, 8.0f, 25.4f, 0.252f};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_FLOAT_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualFloatArraysActualNull(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    float p0[] = {1.0f, 8.0f, 25.4f, 0.253f};
+    float* p1 = NULL;
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_FLOAT_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualFloatArrays1(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    float p0[] = {1.0f, 8.0f, 25.4f, 0.253f};
+    float p1[] = {1.0f, 8.0f, 25.4f, 0.252f};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_FLOAT_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualFloatArrays2(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    float p0[] = {1.0f, 8.0f, 25.4f, 0.253f};
+    float p1[] = {2.0f, 8.0f, 25.4f, 0.253f};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_FLOAT_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualFloatArrays3(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    float p0[] = {1.0f, 8.0f, 25.4f, 0.253f};
+    float p1[] = {1.0f, 8.0f, 25.5f, 0.253f};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_FLOAT_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualFloatArraysNegative1(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    float p0[] = {-1.0f, -8.0f, -25.4f, -0.253f};
+    float p1[] = {-1.0f, -8.0f, -25.4f, -0.252f};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_FLOAT_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualFloatArraysNegative2(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    float p0[] = {-1.0f, -8.0f, -25.4f, -0.253f};
+    float p1[] = {-2.0f, -8.0f, -25.4f, -0.253f};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_FLOAT_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualFloatArraysNegative3(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    float p0[] = {-1.0f, -8.0f, -25.4f, -0.253f};
+    float p1[] = {-1.0f, -8.0f, -25.5f, -0.253f};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_FLOAT_ARRAY(p0, p1, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testEqualFloatArraysNaN(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    float p0[] = {1.0f, 0.0f / f_zero, 25.4f, 0.253f};
+    float p1[] = {1.0f, 0.0f / f_zero, 25.4f, 0.253f};
+
+    TEST_ASSERT_EQUAL_FLOAT_ARRAY(p0, p1, 4);
+#endif
+}
+
+void testEqualFloatArraysInf(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    float p0[] = {1.0f, 1.0f / f_zero, 25.4f, 0.253f};
+    float p1[] = {1.0f, 1.0f / f_zero, 25.4f, 0.253f};
+
+    TEST_ASSERT_EQUAL_FLOAT_ARRAY(p0, p1, 4);
+#endif
+}
+
+void testNotEqualFloatArraysLengthZero(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    float p0[1] = {0.0f};
+    float p1[1] = {0.0f};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_FLOAT_ARRAY(p0, p1, 0);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testEqualFloatEachEqual(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    float p0[] = {1.0f, 1.0f, 1.0f, 1.0f};
+    float p1[] = {-0.123f, -0.123f, -0.123f, -0.123f};
+    float p2[] = {25.4f, 25.4f, 25.4f, -0.2f};
+    float p3[] = {1.0f, -23.0f, 25.0f, -0.26f};
+
+    TEST_ASSERT_EACH_EQUAL_FLOAT(1.0f, p0, 1);
+    TEST_ASSERT_EACH_EQUAL_FLOAT(1.0f, p0, 4);
+    TEST_ASSERT_EACH_EQUAL_FLOAT(-0.123f, p1, 4);
+    TEST_ASSERT_EACH_EQUAL_FLOAT(25.4f, p2, 3);
+    TEST_ASSERT_EACH_EQUAL_FLOAT(1.0f, p3, 1);
+#endif
+}
+
+void testNotEqualFloatEachEqualActualNull(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    float* p0 = NULL;
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_FLOAT(5, p0, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualFloatEachEqual1(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    float p0[] = {0.253f, 8.0f, 0.253f, 0.253f};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_FLOAT(0.253f, p0, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualFloatEachEqual2(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    float p0[] = {8.0f, 8.0f, 8.0f, 0.253f};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_FLOAT(8.0f, p0, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualFloatEachEqual3(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    float p0[] = {1.0f, 1.0f, 1.0f, 0.253f};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_FLOAT(1.0f, p0, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualFloatEachEqualNegative1(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    float p0[] = {-1.0f, -0.253f, -0.253f, -0.253f};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_FLOAT(-0.253f, p0, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualFloatEachEqualNegative2(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    float p0[] = {-25.4f, -8.0f, -25.4f, -25.4f};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_FLOAT(-25.4f, p0, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualFloatEachEqualNegative3(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    float p0[] = {-8.0f, -8.0f, -8.0f, -0.253f};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_FLOAT(-8.0f, p0, 4);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testEqualFloatEachEqualNaN(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    float p0[] = {0.0f / f_zero, 0.0f / f_zero, 0.0f / f_zero, 0.0f / f_zero};
+
+    TEST_ASSERT_EACH_EQUAL_FLOAT(0.0f / f_zero, p0, 4);
+#endif
+}
+
+void testEqualFloatEachEqualInf(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    float p0[] = {1.0f / f_zero, 1.0f / f_zero, 25.4f, 0.253f};
+
+    TEST_ASSERT_EACH_EQUAL_FLOAT(1.0f / f_zero, p0, 2);
+#endif
+}
+
+void testNotEqualFloatEachEqualLengthZero(void)
+{
+#ifdef UNITY_EXCLUDE_FLOAT
+    TEST_IGNORE();
+#else
+    float p0[1] = {0.0f};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_FLOAT(0.0f, p0, 0);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testFloatPrinting(void)
+{
+#if defined(UNITY_EXCLUDE_FLOAT_PRINT) || defined(UNITY_INCLUDE_DOUBLE) || !defined(USING_OUTPUT_SPY)
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("0",            0.0f);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("4.99e-07",     0.000000499f);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("0.1004695",    0.100469499f);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("2",            1.9999995f); /*Rounding to int place*/
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("1",            1.0f);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("1.25",         1.25f);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("7.999999",     7.999999f); /*Not rounding*/
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("16.00002",     16.00002f);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("16.00004",     16.00004f);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("16.00006",     16.00006f);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("9999999",      9999999.0f); /*Last full print integer*/
+
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-0",            -0.0f);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-4.99e-07",     -0.000000499f);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-0.1004695",    -0.100469499f);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-2",            -1.9999995f); /*Rounding to int place*/
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-1",            -1.0f);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-1.25",         -1.25f);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-7.999999",     -7.999999f); /*Not rounding*/
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-16.00002",     -16.00002f);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-16.00004",     -16.00004f);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-16.00006",     -16.00006f);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-9999999",      -9999999.0f); /*Last full print integer*/
+
+    /* Fails, prints "4.294968e+09" due to FP math imprecision
+     * TEST_ASSERT_EQUAL_PRINT_FLOATING("4.294967e+09",  4294967296.0f); */
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("5e+09",        5000000000.0f);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("8e+09",        8.0e+09f);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("8.309999e+09", 8309999104.0f);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("1e+10",        1.0e+10f);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("1e+10",        10000000000.0f);
+    /* Some compilers have trouble with inexact float constants, a float cast works generally */
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("1.000055e+10", (float)1.000055e+10f);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("1.1e+38",      (float)1.10000005e+38f);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("1.635299e+10", 1.63529943e+10f);
+    /* Fails, prints "3.402824e+38" due to FP math imprecision
+     * TEST_ASSERT_EQUAL_PRINT_FLOATING("3.402823e+38", 3.40282346638e38f); */
+
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-1e+10",        -1.0e+10f);
+    /* Fails, prints "-3.402824e+38" due to FP math imprecision
+     * TEST_ASSERT_EQUAL_PRINT_FLOATING("-3.402823e+38", -3.40282346638e38f); */
+#endif
+}
+
+void testFloatPrintingRoundTiesToEven(void)
+{
+#if defined(UNITY_EXCLUDE_FLOAT_PRINT) || defined(UNITY_INCLUDE_DOUBLE) || !defined(USING_OUTPUT_SPY)
+    TEST_IGNORE();
+#else
+  #ifdef UNITY_ROUND_TIES_AWAY_FROM_ZERO
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("0.0004882813",  0.00048828125f);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("488281.3",      488281.25f);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("5.000001e-07",  0.00000050000005f);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-5.000001e-07", -0.00000050000005f);
+  #else /* Default to Round ties to even */
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("0.0004882812",  0.00048828125f);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("488281.2",      488281.25f);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("5e-07",         0.00000050000005f);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-5e-07",        -0.00000050000005f);
+  #endif
+#endif
+}
+
+void testFloatPrintingInfinityAndNaN(void)
+{
+#if defined(UNITY_EXCLUDE_FLOAT_PRINT) || !defined(USING_OUTPUT_SPY)
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("inf",   1.0f / f_zero);
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("-inf", -1.0f / f_zero);
+
+    TEST_ASSERT_EQUAL_PRINT_FLOATING("nan",   0.0f / f_zero);
+#endif
+}
+
+#if defined(UNITY_TEST_ALL_FLOATS_PRINT_OK) && defined(USING_OUTPUT_SPY)
+#ifdef UNITY_INCLUDE_DOUBLE
+static void printFloatValue(float f)
+{
+    char expected[18];
+
+    startPutcharSpy();
+    UnityPrintFloat(f);
+
+    sprintf(expected, "%.9g", f);
+    /* We print all NaN's as "nan", not "-nan" */
+    if (strcmp(expected, "-nan") == 0) strcpy(expected, "nan");
+
+    if (strcmp(expected, getBufferPutcharSpy()))
+    {
+        /* Fail with diagnostic printing */
+        TEST_ASSERT_EQUAL_PRINT_FLOATING(expected, f);
+    }
+}
+#else
+static void printFloatValue(float f)
+{
+    char expected[18];
+    char expected_lower[18];
+    char expected_lower2[18];
+    char expected_lower3[18];
+    char expected_higher[18];
+    char expected_higher2[18];
+    char expected_higher3[18];
+
+    startPutcharSpy();
+    UnityPrintFloat(f);
+
+    sprintf(expected, "%.7g", f);
+    /* We print all NaN's as "nan", not "-nan" */
+    if (strcmp(expected, "-nan") == 0) strcpy(expected, "nan");
+
+    strcpy(expected_lower, expected);
+    strcpy(expected_lower2, expected);
+    strcpy(expected_lower3, expected);
+    strcpy(expected_higher, expected);
+    strcpy(expected_higher2, expected);
+    strcpy(expected_higher3, expected);
+
+    /* Allow for rounding differences in the last digit */
+    double lower = (double)f * 0.99999995;
+    double higher = (double)f * 1.00000005;
+
+    if(isfinite(lower)) sprintf(expected_lower, "%.7g", lower);
+    if(isfinite(higher)) sprintf(expected_higher, "%.7g", higher);
+
+    /* Outside [1,10000000] allow for relative error of +/-2.5e-7 */
+    if (f < 1.0 || f > 10000000)
+    {
+        double lower2 = (double)f * 0.99999985;
+        double lower3 = (double)f * 0.99999975;
+        double higher2 = (double)f * 1.00000015;
+        double higher3 = (double)f * 1.00000025;
+
+        if (isfinite(lower2)) sprintf(expected_lower2, "%.7g", lower2);
+        if (isfinite(lower3)) sprintf(expected_lower3, "%.7g", lower3);
+        if (isfinite(higher2)) sprintf(expected_higher2, "%.7g", higher2);
+        if (isfinite(higher3)) sprintf(expected_higher3, "%.7g", higher3);
+    }
+
+    if (strcmp(expected, getBufferPutcharSpy()) != 0 &&
+        strcmp(expected_lower, getBufferPutcharSpy()) != 0 &&
+        strcmp(expected_lower2, getBufferPutcharSpy()) != 0 &&
+        strcmp(expected_lower3, getBufferPutcharSpy()) != 0 &&
+        strcmp(expected_higher, getBufferPutcharSpy()) != 0 &&
+        strcmp(expected_higher2, getBufferPutcharSpy()) != 0 &&
+        strcmp(expected_higher3, getBufferPutcharSpy()) != 0)
+    {
+        /* Fail with diagnostic printing */
+        TEST_ASSERT_EQUAL_PRINT_FLOATING(expected, f);
+    }
+}
+#endif
+#endif
+
+void testFloatPrintingRandomSamples(void)
+{
+#if !defined(UNITY_TEST_ALL_FLOATS_PRINT_OK) || !defined(USING_OUTPUT_SPY)
+    TEST_IGNORE();
+#else
+    union { float f_value; uint32_t int_value; } u;
+
+    /* These values are not covered by the MINSTD generator */
+    u.int_value = 0x00000000; printFloatValue(u.f_value);
+    u.int_value = 0x80000000; printFloatValue(u.f_value);
+    u.int_value = 0x7fffffff; printFloatValue(u.f_value);
+    u.int_value = 0xffffffff; printFloatValue(u.f_value);
+
+    uint32_t a = 1;
+    for(int num_tested = 0; num_tested < 1000000; num_tested++)
+    {
+        /* MINSTD pseudo-random number generator */
+        a = (uint32_t)(((uint64_t)a * 48271u) % 2147483647u);
+
+        /* MINSTD does not set the highest bit; test both possibilities */
+        u.int_value = a;              printFloatValue(u.f_value);
+        u.int_value = a | 0x80000000; printFloatValue(u.f_value);
+    }
+#endif
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_unity_integers.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_unity_integers.c
new file mode 100644
index 000000000..7bdfa1442
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_unity_integers.c
@@ -0,0 +1,2847 @@
+/* ==========================================
+    Unity Project - A Test Framework for C
+    Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+========================================== */
+
+#include "unity.h"
+#define TEST_INSTANCES
+#include "self_assessment_utils.h"
+
+static int SetToOneToFailInTearDown;
+static int SetToOneMeanWeAlreadyCheckedThisGuy;
+
+void setUp(void)
+{
+    SetToOneToFailInTearDown = 0;
+    SetToOneMeanWeAlreadyCheckedThisGuy = 0;
+}
+
+void tearDown(void)
+{
+    endPutcharSpy(); /* Stop suppressing test output */
+    if (SetToOneToFailInTearDown == 1)
+    {
+        /* These will be skipped internally if already failed/ignored */
+        TEST_FAIL_MESSAGE("<= Failed in tearDown");
+        TEST_IGNORE_MESSAGE("<= Ignored in tearDown");
+    }
+    if ((SetToOneMeanWeAlreadyCheckedThisGuy == 0) && (Unity.CurrentTestFailed > 0))
+    {
+        UnityPrint(": [[[[ Test Should Have Passed But Did Not ]]]]");
+        UNITY_OUTPUT_CHAR('\n');
+    }
+}
+
+void testNotEqualInts(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_INT(3982, 3983);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualInt8s(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_INT8(-127, -126);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualChars(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_CHAR('A', 'a');
+    VERIFY_FAILS_END
+}
+
+void testNotEqualInt16s(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_INT16(-16383, -16382);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualInt32s(void)
+{
+    EXPECT_ABORT_BEGIN
+    /*use largest 32 bit negative to test printability*/
+    /*note: (-2147483647 - 1) is used instead of -2147483648 because of C90 casting rules */
+    TEST_ASSERT_EQUAL_INT32(-2147483647, (-2147483647 - 1));
+    VERIFY_FAILS_END
+}
+
+void testNotEqualBits(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_BITS(0xFF00, 0x5555, 0x5A55);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualUInts(void)
+{
+    UNITY_UINT16 v0, v1;
+
+    v0 = 9000;
+    v1 = 9001;
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_UINT(v0, v1);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualUInt8s(void)
+{
+    UNITY_UINT8 v0, v1;
+
+    v0 = 254;
+    v1 = 255;
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_UINT8(v0, v1);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualUInt16s(void)
+{
+    UNITY_UINT16 v0, v1;
+
+    v0 = 65535u;
+    v1 = 65534u;
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_UINT16(v0, v1);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualUInt32s(void)
+{
+    UNITY_UINT32 v0, v1;
+
+    v0 = 4294967295u;
+    v1 = 4294967294u;
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_UINT32(v0, v1);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualHex8s(void)
+{
+    UNITY_UINT8 v0, v1;
+
+    v0 = 0x23;
+    v1 = 0x22;
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_HEX8(v0, v1);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualHex8sIfSigned(void)
+{
+    UNITY_INT8 v0, v1;
+
+    v0 = -2;
+    v1 = 2;
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_HEX8(v0, v1);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualHex16s(void)
+{
+    UNITY_UINT16 v0, v1;
+
+    v0 = 0x1234;
+    v1 = 0x1235;
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_HEX16(v0, v1);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualHex16sIfSigned(void)
+{
+    UNITY_INT16 v0, v1;
+
+    v0 = -1024;
+    v1 = -1028;
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_HEX16(v0, v1);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualHex32s(void)
+{
+    UNITY_UINT32 v0, v1;
+
+    v0 = 900000;
+    v1 = 900001;
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_HEX32(v0, v1);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualHex32sIfSigned(void)
+{
+    UNITY_INT32 v0, v1;
+
+    v0 = -900000;
+    v1 = 900001;
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_HEX32(v0, v1);
+    VERIFY_FAILS_END
+}
+
+void testEqualInts(void)
+{
+    int v0, v1;
+    int *p0, *p1;
+
+    v0 = 19467;
+    v1 = 19467;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_EQUAL_INT(1837, 1837);
+    TEST_ASSERT_EQUAL_INT(-27365, -27365);
+    TEST_ASSERT_EQUAL_INT(v0, v1);
+    TEST_ASSERT_EQUAL_INT(19467, v1);
+    TEST_ASSERT_EQUAL_INT(v0, 19467);
+    TEST_ASSERT_EQUAL_INT(*p0, v1);
+    TEST_ASSERT_EQUAL_INT(*p0, *p1);
+    TEST_ASSERT_EQUAL_INT(*p0, 19467);
+}
+
+void testEqualInt8s(void)
+{
+    UNITY_INT8 v0, v1;
+    UNITY_INT8 *p0, *p1;
+
+    v0 = 0x22;
+    v1 = 0x22;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_EQUAL_INT8(0x22, 0x22);
+    TEST_ASSERT_EQUAL_INT8(v0, v1);
+    TEST_ASSERT_EQUAL_INT8(0x22, v1);
+    TEST_ASSERT_EQUAL_INT8(v0, 0x22);
+    TEST_ASSERT_EQUAL_INT8(*p0, v1);
+    TEST_ASSERT_EQUAL_INT8(*p0, *p1);
+    TEST_ASSERT_EQUAL_INT8(*p0, 0x22);
+}
+
+void testEqualInt8sWhenThereAreDifferencesOutside8Bits(void)
+{
+    TEST_ASSERT_EQUAL_INT8(0x321,0x421);
+    TEST_ASSERT_EQUAL_INT8(0xFF21,0x0021);
+}
+
+void testEqualChars(void)
+{
+    char v0, v1;
+    char *p0, *p1;
+
+    v0 = 'A';
+    v1 = 'A';
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_EQUAL_CHAR('A', 'A');
+    TEST_ASSERT_EQUAL_CHAR(v0, v1);
+    TEST_ASSERT_EQUAL_CHAR('A', v1);
+    TEST_ASSERT_EQUAL_CHAR(v0, 'A');
+    TEST_ASSERT_EQUAL_CHAR(*p0, v1);
+    TEST_ASSERT_EQUAL_CHAR(*p0, *p1);
+    TEST_ASSERT_EQUAL_CHAR(*p0, 'A');
+}
+
+void testEqualCharsWhenThereAreDifferencesOutside8Bits(void)
+{
+    TEST_ASSERT_EQUAL_CHAR(0x321,0x421);
+    TEST_ASSERT_EQUAL_CHAR(0xFF21,0x0021);
+}
+
+
+void testEqualInt16s(void)
+{
+    UNITY_INT16 v0, v1;
+    UNITY_INT16 *p0, *p1;
+
+    v0 = 0x7876;
+    v1 = 0x7876;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_EQUAL_INT16(0x7876, 0x7876);
+    TEST_ASSERT_EQUAL_INT16(v0, v1);
+    TEST_ASSERT_EQUAL_INT16(0x7876, v1);
+    TEST_ASSERT_EQUAL_INT16(v0, 0x7876);
+    TEST_ASSERT_EQUAL_INT16(*p0, v1);
+    TEST_ASSERT_EQUAL_INT16(*p0, *p1);
+    TEST_ASSERT_EQUAL_INT16(*p0, 0x7876);
+}
+
+void testEqualInt16sNegatives(void)
+{
+    UNITY_INT16 v0, v1;
+    UNITY_INT16 *p0, *p1;
+
+    v0 = -7876;
+    v1 = -7876;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_EQUAL_INT16(-7876, -7876);
+    TEST_ASSERT_EQUAL_INT16(v0, v1);
+    TEST_ASSERT_EQUAL_INT16(-7876, v1);
+    TEST_ASSERT_EQUAL_INT16(v0, -7876);
+    TEST_ASSERT_EQUAL_INT16(*p0, v1);
+    TEST_ASSERT_EQUAL_INT16(*p0, *p1);
+    TEST_ASSERT_EQUAL_INT16(*p0, -7876);
+}
+
+void testEqualInt16sWhenThereAreDifferencesOutside16Bits(void)
+{
+    TEST_ASSERT_EQUAL_INT16(0x54321,0x64321);
+    TEST_ASSERT_EQUAL_INT16(0xFFFF4321,0x00004321);
+}
+
+void testEqualInt32s(void)
+{
+    UNITY_INT32 v0, v1;
+    UNITY_INT32 *p0, *p1;
+
+    v0 = 0x78760000;
+    v1 = 0x78760000;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_EQUAL_INT32(0x78760000, 0x78760000);
+    TEST_ASSERT_EQUAL_INT32(v0, v1);
+    TEST_ASSERT_EQUAL_INT32(0x78760000, v1);
+    TEST_ASSERT_EQUAL_INT32(v0, 0x78760000);
+    TEST_ASSERT_EQUAL_INT32(*p0, v1);
+    TEST_ASSERT_EQUAL_INT32(*p0, *p1);
+    TEST_ASSERT_EQUAL_INT32(*p0, 0x78760000);
+}
+
+void testEqualInt32sNegatives(void)
+{
+    UNITY_INT32 v0, v1;
+    UNITY_INT32 *p0, *p1;
+
+    v0 = -123456789;
+    v1 = -123456789;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_EQUAL_INT32(-123456789, -123456789);
+    TEST_ASSERT_EQUAL_INT32(v0, v1);
+    TEST_ASSERT_EQUAL_INT32(-123456789, v1);
+    TEST_ASSERT_EQUAL_INT32(v0, -123456789);
+    TEST_ASSERT_EQUAL_INT32(*p0, v1);
+    TEST_ASSERT_EQUAL_INT32(*p0, *p1);
+    TEST_ASSERT_EQUAL_INT32(*p0, -123456789);
+}
+
+
+void testEqualUints(void)
+{
+    unsigned int v0, v1;
+    unsigned int *p0, *p1;
+
+    v0 = 19467;
+    v1 = 19467;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_EQUAL_UINT(1837, 1837);
+    TEST_ASSERT_EQUAL_UINT(v0, v1);
+    TEST_ASSERT_EQUAL_UINT(19467, v1);
+    TEST_ASSERT_EQUAL_UINT(v0, 19467);
+    TEST_ASSERT_EQUAL_UINT(*p0, v1);
+    TEST_ASSERT_EQUAL_UINT(*p0, *p1);
+    TEST_ASSERT_EQUAL_UINT(*p0, 19467);
+    TEST_ASSERT_EQUAL_UINT(60872u, 60872u);
+}
+
+
+void testEqualUint8s(void)
+{
+    UNITY_UINT8 v0, v1;
+    UNITY_UINT8 *p0, *p1;
+
+    v0 = 0x22;
+    v1 = 0x22;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_EQUAL_UINT8(0x22, 0x22);
+    TEST_ASSERT_EQUAL_UINT8(v0, v1);
+    TEST_ASSERT_EQUAL_UINT8(0x22, v1);
+    TEST_ASSERT_EQUAL_UINT8(v0, 0x22);
+    TEST_ASSERT_EQUAL_UINT8(*p0, v1);
+    TEST_ASSERT_EQUAL_UINT8(*p0, *p1);
+    TEST_ASSERT_EQUAL_UINT8(*p0, 0x22);
+}
+
+void testEqualUint8sWhenThereAreDifferencesOutside8Bits(void)
+{
+    TEST_ASSERT_EQUAL_UINT8(0x321,0x421);
+    TEST_ASSERT_EQUAL_UINT8(0xFF21,0x0021);
+}
+
+void testEqualUint16s(void)
+{
+    UNITY_UINT16 v0, v1;
+    UNITY_UINT16 *p0, *p1;
+
+    v0 = 0x9876;
+    v1 = 0x9876;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_EQUAL_UINT16(0x9876, 0x9876);
+    TEST_ASSERT_EQUAL_UINT16(v0, v1);
+    TEST_ASSERT_EQUAL_UINT16(0x9876, v1);
+    TEST_ASSERT_EQUAL_UINT16(v0, 0x9876);
+    TEST_ASSERT_EQUAL_UINT16(*p0, v1);
+    TEST_ASSERT_EQUAL_UINT16(*p0, *p1);
+    TEST_ASSERT_EQUAL_UINT16(*p0, 0x9876);
+}
+
+void testEqualUint16sWhenThereAreDifferencesOutside16Bits(void)
+{
+    TEST_ASSERT_EQUAL_UINT16(0x54321,0x64321);
+    TEST_ASSERT_EQUAL_UINT16(0xFFFF4321,0x00004321);
+}
+
+void testEqualUint32s(void)
+{
+    UNITY_UINT32 v0, v1;
+    UNITY_UINT32 *p0, *p1;
+
+    v0 = 0x98760000;
+    v1 = 0x98760000;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_EQUAL_UINT32(0x98760000, 0x98760000);
+    TEST_ASSERT_EQUAL_UINT32(v0, v1);
+    TEST_ASSERT_EQUAL_UINT32(0x98760000, v1);
+    TEST_ASSERT_EQUAL_UINT32(v0, 0x98760000);
+    TEST_ASSERT_EQUAL_UINT32(*p0, v1);
+    TEST_ASSERT_EQUAL_UINT32(*p0, *p1);
+    TEST_ASSERT_EQUAL_UINT32(*p0, 0x98760000);
+}
+
+void testNotEqual(void)
+{
+    TEST_ASSERT_NOT_EQUAL(0, 1);
+    TEST_ASSERT_NOT_EQUAL(1, 0);
+    TEST_ASSERT_NOT_EQUAL(100, 101);
+    TEST_ASSERT_NOT_EQUAL(0, -1);
+    TEST_ASSERT_NOT_EQUAL(65535, -65535);
+    TEST_ASSERT_NOT_EQUAL(75, 900);
+    TEST_ASSERT_NOT_EQUAL(-100, -101);
+}
+
+void testEqualHex8s(void)
+{
+    UNITY_UINT8 v0, v1;
+    UNITY_UINT8 *p0, *p1;
+
+    v0 = 0x22;
+    v1 = 0x22;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_EQUAL_HEX8(0x22, 0x22);
+    TEST_ASSERT_EQUAL_HEX8(v0, v1);
+    TEST_ASSERT_EQUAL_HEX8(0x22, v1);
+    TEST_ASSERT_EQUAL_HEX8(v0, 0x22);
+    TEST_ASSERT_EQUAL_HEX8(*p0, v1);
+    TEST_ASSERT_EQUAL_HEX8(*p0, *p1);
+    TEST_ASSERT_EQUAL_HEX8(*p0, 0x22);
+}
+
+void testEqualHex8sWhenThereAreDifferencesOutside8Bits(void)
+{
+    TEST_ASSERT_EQUAL_HEX8(0x321,0x421);
+    TEST_ASSERT_EQUAL_HEX8(0xFF21,0x0021);
+}
+
+void testEqualHex8sNegatives(void)
+{
+    UNITY_UINT8 v0, v1;
+    UNITY_UINT8 *p0, *p1;
+
+    v0 = 0xDD;
+    v1 = 0xDD;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_EQUAL_HEX8(0xDD, 0xDD);
+    TEST_ASSERT_EQUAL_HEX8(v0, v1);
+    TEST_ASSERT_EQUAL_HEX8(0xDD, v1);
+    TEST_ASSERT_EQUAL_HEX8(v0, 0xDD);
+    TEST_ASSERT_EQUAL_HEX8(*p0, v1);
+    TEST_ASSERT_EQUAL_HEX8(*p0, *p1);
+    TEST_ASSERT_EQUAL_HEX8(*p0, 0xDD);
+}
+
+void testEqualHex16s(void)
+{
+    UNITY_UINT16 v0, v1;
+    UNITY_UINT16 *p0, *p1;
+
+    v0 = 0x9876;
+    v1 = 0x9876;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_EQUAL_HEX16(0x9876, 0x9876);
+    TEST_ASSERT_EQUAL_HEX16(v0, v1);
+    TEST_ASSERT_EQUAL_HEX16(0x9876, v1);
+    TEST_ASSERT_EQUAL_HEX16(v0, 0x9876);
+    TEST_ASSERT_EQUAL_HEX16(*p0, v1);
+    TEST_ASSERT_EQUAL_HEX16(*p0, *p1);
+    TEST_ASSERT_EQUAL_HEX16(*p0, 0x9876);
+}
+
+void testEqualHex16sWhenThereAreDifferencesOutside16Bits(void)
+{
+    TEST_ASSERT_EQUAL_HEX16(0x54321,0x64321);
+    TEST_ASSERT_EQUAL_HEX16(0xFFFF4321,0x00004321);
+}
+
+void testEqualHex32s(void)
+{
+    UNITY_UINT32 v0, v1;
+    UNITY_UINT32 *p0, *p1;
+
+    v0 = 0x98765432ul;
+    v1 = 0x98765432ul;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_EQUAL_HEX32(0x98765432ul, 0x98765432ul);
+    TEST_ASSERT_EQUAL_HEX32(v0, v1);
+    TEST_ASSERT_EQUAL_HEX32(0x98765432ul, v1);
+    TEST_ASSERT_EQUAL_HEX32(v0, 0x98765432ul);
+    TEST_ASSERT_EQUAL_HEX32(*p0, v1);
+    TEST_ASSERT_EQUAL_HEX32(*p0, *p1);
+    TEST_ASSERT_EQUAL_HEX32(*p0, 0x98765432ul);
+}
+
+void testEqualBits(void)
+{
+    UNITY_UINT32 v0 = 0xFF55AA00;
+    UNITY_UINT32 v1 = 0x55550000;
+
+    TEST_ASSERT_BITS(v1, v0, 0x55550000);
+    TEST_ASSERT_BITS(v1, v0, 0xFF55CC00);
+    TEST_ASSERT_BITS(0xFFFFFFFF, v0, 0xFF55AA00);
+    TEST_ASSERT_BITS(0xFFFFFFFF, v0, v0);
+    TEST_ASSERT_BITS(0xF0F0F0F0, v0, 0xFC5DAE0F);
+    TEST_ASSERT_BITS_HIGH(v1, v0);
+    TEST_ASSERT_BITS_LOW(0x000055FF, v0);
+    TEST_ASSERT_BIT_HIGH(30, v0);
+    TEST_ASSERT_BIT_LOW(5, v0);
+}
+
+void testNotEqualBitHigh(void)
+{
+    UNITY_UINT32 v0 = 0x7F55AA00;
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_BIT_HIGH(31, v0);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualBitLow(void)
+{
+    UNITY_UINT32 v0 = 0xFF55AA00;
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_BIT_LOW(30, v0);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualBitsHigh(void)
+{
+    UNITY_UINT32 v0 = 0xFF55AA00;
+    UNITY_UINT32 v1 = 0x55550000;
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_BITS_HIGH(v0, v1);
+    VERIFY_FAILS_END
+
+}
+
+void testNotEqualBitsLow(void)
+{
+    UNITY_UINT32 v0 = 0xFF55AA00;
+    UNITY_UINT32 v1 = 0x55550000;
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_BITS_LOW(v0, v1);
+    VERIFY_FAILS_END
+}
+
+
+void testEqualShorts(void)
+{
+    short v0, v1;
+    short *p0, *p1;
+
+    v0 = 19467;
+    v1 = 19467;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_EQUAL_INT(1837, 1837);
+    TEST_ASSERT_EQUAL_INT(-2987, -2987);
+    TEST_ASSERT_EQUAL_INT(v0, v1);
+    TEST_ASSERT_EQUAL_INT(19467, v1);
+    TEST_ASSERT_EQUAL_INT(v0, 19467);
+    TEST_ASSERT_EQUAL_INT(*p0, v1);
+    TEST_ASSERT_EQUAL_INT(*p0, *p1);
+    TEST_ASSERT_EQUAL_INT(*p0, 19467);
+}
+
+void testEqualUShorts(void)
+{
+    unsigned short v0, v1;
+    unsigned short *p0, *p1;
+
+    v0 = 19467;
+    v1 = 19467;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_EQUAL_UINT(1837, 1837);
+    TEST_ASSERT_EQUAL_UINT(2987, 2987);
+    TEST_ASSERT_EQUAL_UINT(v0, v1);
+    TEST_ASSERT_EQUAL_UINT(19467, v1);
+    TEST_ASSERT_EQUAL_UINT(v0, 19467);
+    TEST_ASSERT_EQUAL_UINT(*p0, v1);
+    TEST_ASSERT_EQUAL_UINT(*p0, *p1);
+    TEST_ASSERT_EQUAL_UINT(*p0, 19467);
+}
+
+void testEqualUInts(void)
+{
+    unsigned char v0, v1;
+    unsigned char *p0, *p1;
+
+    v0 = 109;
+    v1 = 109;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_EQUAL_UINT(42, 42);
+    TEST_ASSERT_EQUAL_UINT(-116, -116);
+    TEST_ASSERT_EQUAL_UINT(v0, v1);
+    TEST_ASSERT_EQUAL_UINT(109, v1);
+    TEST_ASSERT_EQUAL_UINT(v0, 109);
+    TEST_ASSERT_EQUAL_UINT(*p0, v1);
+    TEST_ASSERT_EQUAL_UINT(*p0, *p1);
+    TEST_ASSERT_EQUAL_UINT(*p0, 109);
+}
+
+void testEqualUChars(void)
+{
+    unsigned char v0, v1;
+    unsigned char *p0, *p1;
+
+    v0 = 251;
+    v1 = 251;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_EQUAL_INT(42, 42);
+    TEST_ASSERT_EQUAL_INT(v0, v1);
+    TEST_ASSERT_EQUAL_INT(251, v1);
+    TEST_ASSERT_EQUAL_INT(v0, 251);
+    TEST_ASSERT_EQUAL_INT(*p0, v1);
+    TEST_ASSERT_EQUAL_INT(*p0, *p1);
+    TEST_ASSERT_EQUAL_INT(*p0, 251);
+}
+
+void testEqualPointers(void)
+{
+    int v0, v1;
+    int *p0, *p1, *p2;
+
+    v0 = 19467;
+    v1 = 18271;
+    p0 = &v0;
+    p1 = &v1;
+    p2 = &v1;
+
+    TEST_ASSERT_EQUAL_PTR(p0, &v0);
+    TEST_ASSERT_EQUAL_PTR(&v1, p1);
+    TEST_ASSERT_EQUAL_PTR(p2, p1);
+    TEST_ASSERT_EQUAL_PTR(&v0, &v0);
+}
+
+void testNotEqualPointers(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_PTR(0x12345678, 0x12345677);
+    VERIFY_FAILS_END
+}
+
+void testIntsWithinDelta(void)
+{
+    TEST_ASSERT_INT_WITHIN(1, 5000, 5001);
+    TEST_ASSERT_INT_WITHIN(5, 5000, 4996);
+    TEST_ASSERT_INT_WITHIN(5, 5000, 5005);
+    TEST_ASSERT_INT_WITHIN(500, 50, -440);
+
+    TEST_ASSERT_INT_WITHIN(2, -1, -1);
+    TEST_ASSERT_INT_WITHIN(5, 1, -1);
+    TEST_ASSERT_INT_WITHIN(5, -1, 1);
+}
+
+void testIntsWithinDeltaAndCustomMessage(void)
+{
+    TEST_ASSERT_INT_WITHIN_MESSAGE(1, 5000, 5001, "Custom Message.");
+    TEST_ASSERT_INT_WITHIN_MESSAGE(5, 5000, 4996, "Custom Message.");
+    TEST_ASSERT_INT_WITHIN_MESSAGE(5, 5000, 5005, "Custom Message.");
+    TEST_ASSERT_INT_WITHIN_MESSAGE(500, 50, -440, "Custom Message.");
+
+    TEST_ASSERT_INT_WITHIN_MESSAGE(2, -1, -1, "Custom Message.");
+    TEST_ASSERT_INT_WITHIN_MESSAGE(5, 1, -1, "Custom Message.");
+    TEST_ASSERT_INT_WITHIN_MESSAGE(5, -1, 1, "Custom Message.");
+}
+
+void testIntsNotWithinDelta(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT_WITHIN(5, 5000, 5006);
+    VERIFY_FAILS_END
+}
+
+void testIntsNotWithinDeltaAndCustomMessage(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT_WITHIN_MESSAGE(5, 5000, 5006, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testUIntsWithinDelta(void)
+{
+    TEST_ASSERT_UINT_WITHIN(1, 5000, 5001);
+    TEST_ASSERT_UINT_WITHIN(5, 5000, 4996);
+    TEST_ASSERT_UINT_WITHIN(5, 5000, 5005);
+}
+
+void testUIntsWithinDeltaAndCustomMessage(void)
+{
+    TEST_ASSERT_UINT_WITHIN_MESSAGE(1, 5000, 5001, "Custom Message.");
+    TEST_ASSERT_UINT_WITHIN_MESSAGE(5, 5000, 4996, "Custom Message.");
+    TEST_ASSERT_UINT_WITHIN_MESSAGE(5, 5000, 5005, "Custom Message.");
+}
+
+void testUIntsNotWithinDelta(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT_WITHIN(1, 2147483647u, 2147483649u);
+    VERIFY_FAILS_END
+}
+
+void testUIntsNotWithinDeltaAndCustomMessage(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT_WITHIN_MESSAGE(1, 2147483647u, 2147483649u, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testUIntsNotWithinDeltaEvenThoughASignedIntWouldPassSmallFirst(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT_WITHIN(5, 1, -1);
+    VERIFY_FAILS_END
+}
+
+void testUIntsNotWithinDeltaEvenThoughASignedIntWouldPassSmallFirstAndCustomMessage(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT_WITHIN_MESSAGE(5, 1, -1, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testUIntsNotWithinDeltaEvenThoughASignedIntWouldPassBigFirst(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT_WITHIN(5, -1, 1);
+    VERIFY_FAILS_END
+}
+
+void testUIntsNotWithinDeltaEvenThoughASignedIntWouldPassBigFirstAndCustomMessage(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT_WITHIN_MESSAGE(5, -1, 1, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testHEX32sWithinDelta(void)
+{
+    TEST_ASSERT_HEX32_WITHIN(1, 5000, 5001);
+    TEST_ASSERT_HEX32_WITHIN(5, 5000, 4996);
+    TEST_ASSERT_HEX32_WITHIN(5, 5000, 5005);
+}
+
+void testHEX32sWithinDeltaAndCustomMessage(void)
+{
+    TEST_ASSERT_HEX32_WITHIN_MESSAGE(1, 5000, 5001, "Custom Message.");
+    TEST_ASSERT_HEX32_WITHIN_MESSAGE(5, 5000, 4996, "Custom Message.");
+    TEST_ASSERT_HEX32_WITHIN_MESSAGE(5, 5000, 5005, "Custom Message.");
+}
+
+void testHEX32sNotWithinDelta(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX32_WITHIN(1, 2147483647u, 2147483649u);
+    VERIFY_FAILS_END
+}
+
+void testHEX32sNotWithinDeltaAndCustomMessage(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX32_WITHIN_MESSAGE(1, 2147483647u, 2147483649u, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testHEX32sNotWithinDeltaEvenThoughASignedIntWouldPass(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX32_WITHIN(5, 1, -1);
+    VERIFY_FAILS_END
+}
+
+void testHEX32sNotWithinDeltaEvenThoughASignedIntWouldPassAndCustomMessage(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX32_WITHIN_MESSAGE(5, 1, -1, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testHEX16sWithinDelta(void)
+{
+    TEST_ASSERT_HEX16_WITHIN(1, 5000, 5001);
+    TEST_ASSERT_HEX16_WITHIN(5, 5000, 4996);
+    TEST_ASSERT_HEX16_WITHIN(5, 5000, 5005);
+}
+
+void testHEX16sWithinDeltaAndCustomMessage(void)
+{
+    TEST_ASSERT_HEX16_WITHIN_MESSAGE(1, 5000, 5001, "Custom Message.");
+    TEST_ASSERT_HEX16_WITHIN_MESSAGE(5, 5000, 4996, "Custom Message.");
+    TEST_ASSERT_HEX16_WITHIN_MESSAGE(5, 5000, 5005, "Custom Message.");
+}
+
+void testHEX16sWithinDeltaWhenThereAreDifferenceOutsideOf16Bits(void)
+{
+    TEST_ASSERT_HEX16_WITHIN(5, 0x54321, 0x44321);
+}
+
+void testHEX16sWithinDeltaWhenThereAreDifferenceOutsideOf16BitsAndCustomMessage(void)
+{
+    TEST_ASSERT_HEX16_WITHIN_MESSAGE(5, 0x54321, 0x44321, "Custom Message.");
+}
+
+void testHEX16sNotWithinDelta(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX16_WITHIN(2, 65535, 0);
+    VERIFY_FAILS_END
+}
+
+void testHEX16sNotWithinDeltaAndCustomMessage(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX16_WITHIN_MESSAGE(2, 65535, 0, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testHEX8sWithinDelta(void)
+{
+    TEST_ASSERT_HEX8_WITHIN(1, 254, 255);
+    TEST_ASSERT_HEX8_WITHIN(5, 251, 255);
+    TEST_ASSERT_HEX8_WITHIN(5, 1, 4);
+}
+
+void testHEX8sWithinDeltaAndCustomMessage(void)
+{
+    TEST_ASSERT_HEX8_WITHIN_MESSAGE(1, 254, 255, "Custom Message.");
+    TEST_ASSERT_HEX8_WITHIN_MESSAGE(5, 251, 255, "Custom Message.");
+    TEST_ASSERT_HEX8_WITHIN_MESSAGE(5, 1, 4, "Custom Message.");
+}
+
+void testHEX8sWithinDeltaWhenThereAreDifferenceOutsideOf8Bits(void)
+{
+    TEST_ASSERT_HEX8_WITHIN(5, 0x123, 0xF23);
+}
+
+void testHEX8sWithinDeltaWhenThereAreDifferenceOutsideOf8BitsAndCustomMessage(void)
+{
+    TEST_ASSERT_HEX8_WITHIN_MESSAGE(5, 0x123, 0xF23, "Custom Message.");
+}
+
+void testHEX8sNotWithinDelta(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX8_WITHIN(2, 255, 0);
+    VERIFY_FAILS_END
+}
+
+void testHEX8sNotWithinDeltaAndCustomMessage(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX8_WITHIN_MESSAGE(2, 255, 0, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+/*-----------------*/
+
+void testUINT32sWithinDelta(void)
+{
+    TEST_ASSERT_UINT32_WITHIN(1, 5000, 5001);
+    TEST_ASSERT_UINT32_WITHIN(5, 5000, 4996);
+    TEST_ASSERT_UINT32_WITHIN(5, 5000, 5005);
+}
+
+void testUINT32sWithinDeltaAndCustomMessage(void)
+{
+    TEST_ASSERT_UINT32_WITHIN_MESSAGE(1, 5000, 5001, "Custom Message.");
+    TEST_ASSERT_UINT32_WITHIN_MESSAGE(5, 5000, 4996, "Custom Message.");
+    TEST_ASSERT_UINT32_WITHIN_MESSAGE(5, 5000, 5005, "Custom Message.");
+}
+
+void testUINT32sNotWithinDelta(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT32_WITHIN(1, 2147483647u, 2147483649u);
+    VERIFY_FAILS_END
+}
+
+void testUINT32sNotWithinDeltaAndCustomMessage(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT32_WITHIN_MESSAGE(1, 2147483647u, 2147483649u, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testUINT32sNotWithinDeltaEvenThoughASignedIntWouldPass(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT32_WITHIN(5, 1, -1);
+    VERIFY_FAILS_END
+}
+
+void testUINT32sNotWithinDeltaEvenThoughASignedIntWouldPassAndCustomMessage(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT32_WITHIN_MESSAGE(5, 1, -1, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testUINT16sWithinDelta(void)
+{
+    TEST_ASSERT_UINT16_WITHIN(1, 5000, 5001);
+    TEST_ASSERT_UINT16_WITHIN(5, 5000, 4996);
+    TEST_ASSERT_UINT16_WITHIN(5, 5000, 5005);
+}
+
+void testUINT16sWithinDeltaAndCustomMessage(void)
+{
+    TEST_ASSERT_UINT16_WITHIN_MESSAGE(1, 5000, 5001, "Custom Message.");
+    TEST_ASSERT_UINT16_WITHIN_MESSAGE(5, 5000, 4996, "Custom Message.");
+    TEST_ASSERT_UINT16_WITHIN_MESSAGE(5, 5000, 5005, "Custom Message.");
+}
+
+void testUINT16sWithinDeltaWhenThereAreDifferenceOutsideOf16Bits(void)
+{
+    TEST_ASSERT_UINT16_WITHIN(5, 0x54321, 0x44321);
+}
+
+void testUINT16sWithinDeltaWhenThereAreDifferenceOutsideOf16BitsAndCustomMessage(void)
+{
+    TEST_ASSERT_UINT16_WITHIN_MESSAGE(5, 0x54321, 0x44321, "Custom Message.");
+}
+
+void testUINT16sNotWithinDelta(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT16_WITHIN(2, 65535, 0);
+    VERIFY_FAILS_END
+}
+
+void testUINT16sNotWithinDeltaAndCustomMessage(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT16_WITHIN_MESSAGE(2, 65535, 0, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testUINT8sWithinDelta(void)
+{
+    TEST_ASSERT_UINT8_WITHIN(1, 254, 255);
+    TEST_ASSERT_UINT8_WITHIN(5, 251, 255);
+    TEST_ASSERT_UINT8_WITHIN(5, 1, 4);
+}
+
+void testUINT8sWithinDeltaAndCustomMessage(void)
+{
+    TEST_ASSERT_UINT8_WITHIN_MESSAGE(1, 254, 255, "Custom Message.");
+    TEST_ASSERT_UINT8_WITHIN_MESSAGE(5, 251, 255, "Custom Message.");
+    TEST_ASSERT_UINT8_WITHIN_MESSAGE(5, 1, 4, "Custom Message.");
+}
+
+void testUINT8sWithinDeltaWhenThereAreDifferenceOutsideOf8Bits(void)
+{
+    TEST_ASSERT_UINT8_WITHIN(5, 0x123, 0xF23);
+}
+
+void testUINT8sWithinDeltaWhenThereAreDifferenceOutsideOf8BitsAndCustomMessage(void)
+{
+    TEST_ASSERT_UINT8_WITHIN_MESSAGE(5, 0x123, 0xF23, "Custom Message.");
+}
+
+void testUINT8sNotWithinDelta(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT8_WITHIN(2, 255, 0);
+    VERIFY_FAILS_END
+}
+
+void testUINT8sNotWithinDeltaAndCustomMessage(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT8_WITHIN_MESSAGE(2, 255, 0, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testINT32sWithinDelta(void)
+{
+    TEST_ASSERT_INT32_WITHIN(1, 5000, 5001);
+    TEST_ASSERT_INT32_WITHIN(5, 1, -2);
+    TEST_ASSERT_INT32_WITHIN(5, -2, 1);
+}
+
+void testINT32sWithinDeltaAndCustomMessage(void)
+{
+    TEST_ASSERT_INT32_WITHIN_MESSAGE(1, 5000, 5001, "Custom Message.");
+}
+
+void testINT32sNotWithinDelta(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT32_WITHIN(1, -3, 1);
+    VERIFY_FAILS_END
+}
+
+void testINT32sNotWithinDeltaAndDifferenceOverflows(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT32_WITHIN(1, -1, 0x7FFFFFFF);
+    VERIFY_FAILS_END
+}
+void testINT32sNotWithinDeltaAndCustomMessage(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT32_WITHIN_MESSAGE(1, -2, 1, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testINT16sWithinDelta(void)
+{
+    TEST_ASSERT_INT16_WITHIN(1, 5000, 5001);
+    TEST_ASSERT_INT16_WITHIN(5, 2, -2);
+    TEST_ASSERT_INT16_WITHIN(5, -2, 2);
+}
+
+void testINT16sWithinDeltaAndCustomMessage(void)
+{
+    TEST_ASSERT_INT16_WITHIN_MESSAGE(1, 5000, 5001, "Custom Message.");
+}
+
+void testINT16sWithinDeltaWhenThereAreDifferenceOutsideOf16Bits(void)
+{
+    TEST_ASSERT_INT16_WITHIN(5, 0x54321, 0x44321);
+}
+
+void testINT16sWithinDeltaWhenThereAreDifferenceOutsideOf16BitsAndCustomMessage(void)
+{
+    TEST_ASSERT_INT16_WITHIN_MESSAGE(5, 0x54321, 0x44321, "Custom Message.");
+}
+
+void testINT16sNotWithinDelta(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT16_WITHIN(2, 4, -2);
+    VERIFY_FAILS_END
+}
+
+void testINT16sNotWithinDeltaAndCustomMessage(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT16_WITHIN_MESSAGE(2, 3, 0, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testINT8sWithinDelta(void)
+{
+    TEST_ASSERT_INT8_WITHIN(1, 127, 126);
+    TEST_ASSERT_INT8_WITHIN(5, -2, 2);
+    TEST_ASSERT_INT8_WITHIN(5, 2, -2);
+}
+
+void testINT8sWithinDeltaAndCustomMessage(void)
+{
+    TEST_ASSERT_INT8_WITHIN_MESSAGE(5, 1, 4, "Custom Message.");
+}
+
+void testINT8sWithinDeltaWhenThereAreDifferenceOutsideOf8Bits(void)
+{
+    TEST_ASSERT_INT8_WITHIN(5, 0x123, 0xF23);
+}
+
+void testINT8sWithinDeltaWhenThereAreDifferenceOutsideOf8BitsAndCustomMessage(void)
+{
+    TEST_ASSERT_INT8_WITHIN_MESSAGE(5, 0x123, 0xF23, "Custom Message.");
+}
+
+void testINT8sNotWithinDelta(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT8_WITHIN(2, -3, 0);
+    VERIFY_FAILS_END
+}
+
+void testINT8sNotWithinDeltaAndCustomMessage(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT8_WITHIN_MESSAGE(2, -4, 0, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testCHARsWithinDelta(void)
+{
+    TEST_ASSERT_CHAR_WITHIN(1, 'M', 'L');
+    TEST_ASSERT_CHAR_WITHIN(5, -2, 2);
+    TEST_ASSERT_CHAR_WITHIN(5, 2, -2);
+}
+
+void testCHARsWithinDeltaAndCustomMessage(void)
+{
+    TEST_ASSERT_CHAR_WITHIN_MESSAGE(5, 1, 4, "Custom Message.");
+}
+
+void testCHARsWithinDeltaWhenThereAreDifferenceOutsideOf8Bits(void)
+{
+    TEST_ASSERT_CHAR_WITHIN(5, 0x123, 0xF23);
+}
+
+void testCHARsWithinDeltaWhenThereAreDifferenceOutsideOf8BitsAndCustomMessage(void)
+{
+    TEST_ASSERT_CHAR_WITHIN_MESSAGE(5, 0x123, 0xF23, "Custom Message.");
+}
+
+void testCHARsNotWithinDelta(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_CHAR_WITHIN(2, -3, 0);
+    VERIFY_FAILS_END
+}
+
+void testCHARsNotWithinDeltaAndCustomMessage(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_CHAR_WITHIN_MESSAGE(2, -4, 0, "Custom Message.");
+    VERIFY_FAILS_END
+}
+
+void testNotEqualINT(void)
+{
+    UNITY_INT v0, v1;
+    UNITY_INT *p0, *p1;
+
+    v0 = 302;
+    v1 = 3334;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_NOT_EQUAL_INT(v0, v1);
+    TEST_ASSERT_NOT_EQUAL_INT(*p0, v1);
+    TEST_ASSERT_NOT_EQUAL_INT(v0, *p1);
+    TEST_ASSERT_NOT_EQUAL_INT(*p1, *p0);
+}
+
+void testNotNotEqualINT(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_NOT_EQUAL_INT(302, 302);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualINT8(void)
+{
+    UNITY_INT8 v0, v1;
+    UNITY_INT8 *p0, *p1;
+
+    v0 = -128;
+    v1 = 127;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_NOT_EQUAL_INT8(v0, v1);
+    TEST_ASSERT_NOT_EQUAL_INT8(*p0, v1);
+    TEST_ASSERT_NOT_EQUAL_INT8(v0, *p1);
+    TEST_ASSERT_NOT_EQUAL_INT8(*p1, *p0);
+}
+
+void testNotNotEqualINT8(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_NOT_EQUAL_INT8(-128, -128);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualCHAR(void)
+{
+    char v0, v1;
+    char *p0, *p1;
+
+    v0 = -128;
+    v1 = 127;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_NOT_EQUAL_CHAR(v0, v1);
+    TEST_ASSERT_NOT_EQUAL_CHAR(*p0, v1);
+    TEST_ASSERT_NOT_EQUAL_CHAR(v0, *p1);
+    TEST_ASSERT_NOT_EQUAL_CHAR(*p1, *p0);
+}
+
+void testNotNotEqualCHAR(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_NOT_EQUAL_CHAR(127, 127);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualINT16(void)
+{
+    UNITY_INT16 v0, v1;
+    UNITY_INT16 *p0, *p1;
+
+    v0 = -32768;
+    v1 = 32767;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_NOT_EQUAL_INT16(v0, v1);
+    TEST_ASSERT_NOT_EQUAL_INT16(*p0, v1);
+    TEST_ASSERT_NOT_EQUAL_INT16(v0, *p1);
+    TEST_ASSERT_NOT_EQUAL_INT16(*p1, *p0);
+}
+
+void testNotNotEqualINT16(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_NOT_EQUAL_INT16(-32768, -32768);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualINT32(void)
+{
+    UNITY_INT32 v0, v1;
+    UNITY_INT32 *p0, *p1;
+
+    v0 = -214783648;
+    v1 = 214783647;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_NOT_EQUAL_INT32(v0, v1);
+    TEST_ASSERT_NOT_EQUAL_INT32(*p0, v1);
+    TEST_ASSERT_NOT_EQUAL_INT32(v0, *p1);
+    TEST_ASSERT_NOT_EQUAL_INT32(*p1, *p0);
+}
+
+void testNotNotEqualINT32(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_NOT_EQUAL_INT32(-214783648, -214783648);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualUINT(void)
+{
+    UNITY_UINT v0, v1;
+    UNITY_UINT *p0, *p1;
+
+    v0 = 0;
+    v1 = 1;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_NOT_EQUAL_UINT(v0, v1);
+    TEST_ASSERT_NOT_EQUAL_UINT(*p0, v1);
+    TEST_ASSERT_NOT_EQUAL_UINT(v0, *p1);
+    TEST_ASSERT_NOT_EQUAL_UINT(*p1, *p0);
+}
+
+void testNotNotEqualUINT(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_NOT_EQUAL_UINT(1, 1);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualUINT8(void)
+{
+    UNITY_UINT8 v0, v1;
+    UNITY_UINT8 *p0, *p1;
+
+    v0 = 0;
+    v1 = 255;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_NOT_EQUAL_UINT8(v0, v1);
+    TEST_ASSERT_NOT_EQUAL_UINT8(*p0, v1);
+    TEST_ASSERT_NOT_EQUAL_UINT8(v0, *p1);
+    TEST_ASSERT_NOT_EQUAL_UINT8(*p1, *p0);
+}
+
+void testNotNotEqualUINT8(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_NOT_EQUAL_UINT8(255, 255);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualUINT16(void)
+{
+    UNITY_UINT16 v0, v1;
+    UNITY_UINT16 *p0, *p1;
+
+    v0 = 0;
+    v1 = 65535;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_NOT_EQUAL_UINT16(v0, v1);
+    TEST_ASSERT_NOT_EQUAL_UINT16(*p0, v1);
+    TEST_ASSERT_NOT_EQUAL_UINT16(v0, *p1);
+    TEST_ASSERT_NOT_EQUAL_UINT16(*p1, *p0);
+}
+
+void testNotNotEqualUINT16(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_NOT_EQUAL_UINT16(65535, 65535);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualUINT32(void)
+{
+    UNITY_UINT32 v0, v1;
+    UNITY_UINT32 *p0, *p1;
+
+    v0 = 0u;
+    v1 = 4294967295u;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_NOT_EQUAL_UINT32(v0, v1);
+    TEST_ASSERT_NOT_EQUAL_UINT32(*p0, v1);
+    TEST_ASSERT_NOT_EQUAL_UINT32(v0, *p1);
+    TEST_ASSERT_NOT_EQUAL_UINT32(*p1, *p0);
+}
+
+void testNotNotEqualUINT32(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_NOT_EQUAL_UINT32(4294967295u, 4294967295u);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualHEX8(void)
+{
+    UNITY_UINT8 v0, v1;
+    UNITY_UINT8 *p0, *p1;
+
+    v0 = 0x00;
+    v1 = 0xFF;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_NOT_EQUAL_HEX8(v0, v1);
+    TEST_ASSERT_NOT_EQUAL_HEX8(*p0, v1);
+    TEST_ASSERT_NOT_EQUAL_HEX8(v0, *p1);
+    TEST_ASSERT_NOT_EQUAL_HEX8(*p1, *p0);
+}
+
+void testNotNotEqualHEX8(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_NOT_EQUAL_HEX8(0xFF, 0xFF);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualHEX16(void)
+{
+    UNITY_UINT16 v0, v1;
+    UNITY_UINT16 *p0, *p1;
+
+    v0 = 0x0000;
+    v1 = 0xFFFF;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_NOT_EQUAL_HEX16(v0, v1);
+    TEST_ASSERT_NOT_EQUAL_HEX16(*p0, v1);
+    TEST_ASSERT_NOT_EQUAL_HEX16(v0, *p1);
+    TEST_ASSERT_NOT_EQUAL_HEX16(*p1, *p0);
+}
+
+void testNotNotEqualHEX16(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_NOT_EQUAL_HEX16(0xFFFF, 0xFFFF);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualHEX32(void)
+{
+    UNITY_UINT32 v0, v1;
+    UNITY_UINT32 *p0, *p1;
+
+    v0 = 0x00000000;
+    v1 = 0xFFFFFFFF;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_NOT_EQUAL_HEX32(v0, v1);
+    TEST_ASSERT_NOT_EQUAL_HEX32(*p0, v1);
+    TEST_ASSERT_NOT_EQUAL_HEX32(v0, *p1);
+    TEST_ASSERT_NOT_EQUAL_HEX32(*p1, *p0);
+}
+
+void testNotNotEqualHEX32(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_NOT_EQUAL_HEX32(0xFFFFFFFF, 0xFFFFFFFF);
+    VERIFY_FAILS_END
+}
+
+/*-----------------*/
+
+void testGreaterThan(void)
+{
+    UNITY_INT v0, v1;
+    UNITY_INT *p0, *p1;
+
+    v0 = 0;
+    v1 = 1;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_GREATER_THAN(v0, v1);
+    TEST_ASSERT_GREATER_THAN(*p0, v1);
+    TEST_ASSERT_GREATER_THAN(v0, *p1);
+    TEST_ASSERT_GREATER_THAN(*p0, *p1);
+}
+
+void testNotGreaterThan(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_GREATER_THAN(0, -1);
+    VERIFY_FAILS_END
+}
+
+void testGreaterThanINT(void)
+{
+    UNITY_INT v0, v1;
+    UNITY_INT *p0, *p1;
+
+    v0 = 302;
+    v1 = 3334;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_GREATER_THAN_INT(v0, v1);
+    TEST_ASSERT_GREATER_THAN_INT(*p0, v1);
+    TEST_ASSERT_GREATER_THAN_INT(v0, *p1);
+    TEST_ASSERT_GREATER_THAN_INT(*p0, *p1);
+}
+
+void testNotGreaterThanINT(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_GREATER_THAN_INT(3334, 302);
+    VERIFY_FAILS_END
+}
+
+void testGreaterThanINT8(void)
+{
+    UNITY_INT8 v0, v1;
+    UNITY_INT8 *p0, *p1;
+
+    v0 = -128;
+    v1 = 127;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_GREATER_THAN_INT8(v0, v1);
+    TEST_ASSERT_GREATER_THAN_INT8(*p0, v1);
+    TEST_ASSERT_GREATER_THAN_INT8(v0, *p1);
+    TEST_ASSERT_GREATER_THAN_INT8(*p0, *p1);
+}
+
+void testNotGreaterThanINT8(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_GREATER_THAN_INT8(127, -128);
+    VERIFY_FAILS_END
+}
+
+void testGreaterThanCHAR(void)
+{
+    char v0, v1;
+    char *p0, *p1;
+
+    v0 = -128;
+    v1 = 127;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_GREATER_THAN_CHAR(v0, v1);
+    TEST_ASSERT_GREATER_THAN_CHAR(*p0, v1);
+    TEST_ASSERT_GREATER_THAN_CHAR(v0, *p1);
+    TEST_ASSERT_GREATER_THAN_CHAR(*p0, *p1);
+}
+
+void testNotGreaterThanCHAR(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_GREATER_THAN_CHAR(127, -128);
+    VERIFY_FAILS_END
+}
+
+void testGreaterThanINT16(void)
+{
+    UNITY_INT16 v0, v1;
+    UNITY_INT16 *p0, *p1;
+
+    v0 = -32768;
+    v1 = 32767;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_GREATER_THAN_INT16(v0, v1);
+    TEST_ASSERT_GREATER_THAN_INT16(*p0, v1);
+    TEST_ASSERT_GREATER_THAN_INT16(v0, *p1);
+    TEST_ASSERT_GREATER_THAN_INT16(*p0, *p1);
+}
+
+void testNotGreaterThanINT16(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_GREATER_THAN_INT16(32768, -32768);
+    VERIFY_FAILS_END
+}
+
+void testGreaterThanINT32(void)
+{
+    UNITY_INT32 v0, v1;
+    UNITY_INT32 *p0, *p1;
+
+    v0 = -214783648;
+    v1 = 214783647;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_GREATER_THAN_INT32(v0, v1);
+    TEST_ASSERT_GREATER_THAN_INT32(*p0, v1);
+    TEST_ASSERT_GREATER_THAN_INT32(v0, *p1);
+    TEST_ASSERT_GREATER_THAN_INT32(*p0, *p1);
+}
+
+void testNotGreaterThanINT32(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_GREATER_THAN_INT32(214783647, -214783648);
+    VERIFY_FAILS_END
+}
+
+void testGreaterThanUINT(void)
+{
+    UNITY_UINT v0, v1;
+    UNITY_UINT *p0, *p1;
+
+    v0 = 0;
+    v1 = 1;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_GREATER_THAN_UINT(v0, v1);
+    TEST_ASSERT_GREATER_THAN_UINT(*p0, v1);
+    TEST_ASSERT_GREATER_THAN_UINT(v0, *p1);
+    TEST_ASSERT_GREATER_THAN_UINT(*p0, *p1);
+}
+
+void testNotGreaterThanUINT(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_GREATER_THAN_UINT(1, 0);
+    VERIFY_FAILS_END
+}
+
+void testGreaterThanUINT8(void)
+{
+    UNITY_UINT8 v0, v1;
+    UNITY_UINT8 *p0, *p1;
+
+    v0 = 0;
+    v1 = 255;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_GREATER_THAN_UINT8(v0, v1);
+    TEST_ASSERT_GREATER_THAN_UINT8(*p0, v1);
+    TEST_ASSERT_GREATER_THAN_UINT8(v0, *p1);
+    TEST_ASSERT_GREATER_THAN_UINT8(*p0, *p1);
+}
+
+void testNotGreaterThanUINT8(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_GREATER_THAN_UINT8(255, 0);
+    VERIFY_FAILS_END
+}
+
+void testGreaterThanUINT16(void)
+{
+    UNITY_UINT16 v0, v1;
+    UNITY_UINT16 *p0, *p1;
+
+    v0 = 0;
+    v1 = 65535;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_GREATER_THAN_UINT16(v0, v1);
+    TEST_ASSERT_GREATER_THAN_UINT16(*p0, v1);
+    TEST_ASSERT_GREATER_THAN_UINT16(v0, *p1);
+    TEST_ASSERT_GREATER_THAN_UINT16(*p0, *p1);
+}
+
+void testNotGreaterThanUINT16(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_GREATER_THAN_UINT16(65535, 0);
+    VERIFY_FAILS_END
+}
+
+void testGreaterThanUINT32(void)
+{
+    UNITY_UINT32 v0, v1;
+    UNITY_UINT32 *p0, *p1;
+
+    v0 = 0u;
+    v1 = 4294967295u;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_GREATER_THAN_UINT32(v0, v1);
+    TEST_ASSERT_GREATER_THAN_UINT32(*p0, v1);
+    TEST_ASSERT_GREATER_THAN_UINT32(v0, *p1);
+    TEST_ASSERT_GREATER_THAN_UINT32(*p0, *p1);
+}
+
+void testNotGreaterThanUINT32(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_GREATER_THAN_UINT32(4294967295u, 0);
+    VERIFY_FAILS_END
+}
+
+void testGreaterThanHEX8(void)
+{
+    UNITY_UINT8 v0, v1;
+    UNITY_UINT8 *p0, *p1;
+
+    v0 = 0x00;
+    v1 = 0xFF;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_GREATER_THAN_HEX8(v0, v1);
+    TEST_ASSERT_GREATER_THAN_HEX8(*p0, v1);
+    TEST_ASSERT_GREATER_THAN_HEX8(v0, *p1);
+    TEST_ASSERT_GREATER_THAN_HEX8(*p0, *p1);
+}
+
+void testNotGreaterThanHEX8(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_GREATER_THAN_HEX8(0xFF, 0x00);
+    VERIFY_FAILS_END
+}
+
+void testGreaterThanHEX16(void)
+{
+    UNITY_UINT16 v0, v1;
+    UNITY_UINT16 *p0, *p1;
+
+    v0 = 0x0000;
+    v1 = 0xFFFF;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_GREATER_THAN_HEX16(v0, v1);
+    TEST_ASSERT_GREATER_THAN_HEX16(*p0, v1);
+    TEST_ASSERT_GREATER_THAN_HEX16(v0, *p1);
+    TEST_ASSERT_GREATER_THAN_HEX16(*p0, *p1);
+}
+
+void testNotGreaterThanHEX16(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_GREATER_THAN_HEX16(0xFFFF, 0x00);
+    VERIFY_FAILS_END
+}
+
+void testGreaterThanHEX32(void)
+{
+    UNITY_UINT32 v0, v1;
+    UNITY_UINT32 *p0, *p1;
+
+    v0 = 0x00000000;
+    v1 = 0xFFFFFFFF;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_GREATER_THAN_HEX32(v0, v1);
+    TEST_ASSERT_GREATER_THAN_HEX32(*p0, v1);
+    TEST_ASSERT_GREATER_THAN_HEX32(v0, *p1);
+    TEST_ASSERT_GREATER_THAN_HEX32(*p0, *p1);
+}
+
+void testNotGreaterThanHEX32(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_GREATER_THAN_HEX32(0xFFFFFFFF, 0x00);
+    VERIFY_FAILS_END
+}
+
+void testGreaterOrEqual(void)
+{
+    UNITY_INT v0, v1, v2;
+    UNITY_INT *p0, *p1, *p2;
+
+    v0 = 0;
+    v1 = 1;
+    v2 = 0;
+    p0 = &v0;
+    p1 = &v1;
+    p2 = &v2;
+
+    TEST_ASSERT_GREATER_OR_EQUAL(v0, v1);
+    TEST_ASSERT_GREATER_OR_EQUAL(*p0, v1);
+    TEST_ASSERT_GREATER_OR_EQUAL(v0, *p1);
+    TEST_ASSERT_GREATER_OR_EQUAL(*p0, *p1);
+    TEST_ASSERT_GREATER_OR_EQUAL(v0, v2);
+    TEST_ASSERT_GREATER_OR_EQUAL(*p0, v2);
+    TEST_ASSERT_GREATER_OR_EQUAL(v0, *p2);
+    TEST_ASSERT_GREATER_OR_EQUAL(*p0, *p2);
+}
+
+void testNotGreaterOrEqual(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_GREATER_OR_EQUAL(0, -1);
+    VERIFY_FAILS_END
+}
+
+void testGreaterOrEqualINT(void)
+{
+    UNITY_INT v0, v1, v2;
+    UNITY_INT *p0, *p1, *p2;
+
+    v0 = 302;
+    v1 = 3334;
+    v2 = 302;
+    p0 = &v0;
+    p1 = &v1;
+    p2 = &v2;
+
+    TEST_ASSERT_GREATER_OR_EQUAL_INT(v0, v1);
+    TEST_ASSERT_GREATER_OR_EQUAL_INT(*p0, v1);
+    TEST_ASSERT_GREATER_OR_EQUAL_INT(v0, *p1);
+    TEST_ASSERT_GREATER_OR_EQUAL_INT(*p0, *p1);
+    TEST_ASSERT_GREATER_OR_EQUAL_INT(v0, v2);
+    TEST_ASSERT_GREATER_OR_EQUAL_INT(*p0, v2);
+    TEST_ASSERT_GREATER_OR_EQUAL_INT(v0, *p2);
+    TEST_ASSERT_GREATER_OR_EQUAL_INT(*p0, *p2);
+}
+
+void testNotGreaterOrEqualINT(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_GREATER_OR_EQUAL_INT(3334, 302);
+    VERIFY_FAILS_END
+}
+
+void testGreaterOrEqualINT8(void)
+{
+    UNITY_INT8 v0, v1, v2;
+    UNITY_INT8 *p0, *p1, *p2;
+
+    v0 = -128;
+    v1 = 127;
+    v2 = -128;
+    p0 = &v0;
+    p1 = &v1;
+    p2 = &v2;
+
+    TEST_ASSERT_GREATER_OR_EQUAL_INT8(v0, v1);
+    TEST_ASSERT_GREATER_OR_EQUAL_INT8(*p0, v1);
+    TEST_ASSERT_GREATER_OR_EQUAL_INT8(v0, *p1);
+    TEST_ASSERT_GREATER_OR_EQUAL_INT8(*p0, *p1);
+    TEST_ASSERT_GREATER_OR_EQUAL_INT8(v0, v2);
+    TEST_ASSERT_GREATER_OR_EQUAL_INT8(*p0, v2);
+    TEST_ASSERT_GREATER_OR_EQUAL_INT8(v0, *p2);
+    TEST_ASSERT_GREATER_OR_EQUAL_INT8(*p0, *p2);
+}
+
+void testNotGreaterOrEqualINT8(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_GREATER_OR_EQUAL_INT8(127, -128);
+    VERIFY_FAILS_END
+}
+
+void testGreaterOrEqualCHAR(void)
+{
+    char v0, v1, v2;
+    char *p0, *p1, *p2;
+
+    v0 = -128;
+    v1 = 127;
+    v2 = -128;
+    p0 = &v0;
+    p1 = &v1;
+    p2 = &v2;
+
+    TEST_ASSERT_GREATER_OR_EQUAL_CHAR(v0, v1);
+    TEST_ASSERT_GREATER_OR_EQUAL_CHAR(*p0, v1);
+    TEST_ASSERT_GREATER_OR_EQUAL_CHAR(v0, *p1);
+    TEST_ASSERT_GREATER_OR_EQUAL_CHAR(*p0, *p1);
+    TEST_ASSERT_GREATER_OR_EQUAL_CHAR(v0, v2);
+    TEST_ASSERT_GREATER_OR_EQUAL_CHAR(*p0, v2);
+    TEST_ASSERT_GREATER_OR_EQUAL_CHAR(v0, *p2);
+    TEST_ASSERT_GREATER_OR_EQUAL_CHAR(*p0, *p2);
+}
+
+void testNotGreaterOrEqualCHAR(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_GREATER_OR_EQUAL_CHAR(127, -128);
+    VERIFY_FAILS_END
+}
+
+void testGreaterOrEqualINT16(void)
+{
+    UNITY_INT16 v0, v1, v2;
+    UNITY_INT16 *p0, *p1, *p2;
+
+    v0 = -32768;
+    v1 = 32767;
+    v2 = -32768;
+    p0 = &v0;
+    p1 = &v1;
+    p2 = &v2;
+
+    TEST_ASSERT_GREATER_OR_EQUAL_INT16(v0, v1);
+    TEST_ASSERT_GREATER_OR_EQUAL_INT16(*p0, v1);
+    TEST_ASSERT_GREATER_OR_EQUAL_INT16(v0, *p1);
+    TEST_ASSERT_GREATER_OR_EQUAL_INT16(*p0, *p1);
+    TEST_ASSERT_GREATER_OR_EQUAL_INT16(v0, v2);
+    TEST_ASSERT_GREATER_OR_EQUAL_INT16(*p0, v2);
+    TEST_ASSERT_GREATER_OR_EQUAL_INT16(v0, *p2);
+    TEST_ASSERT_GREATER_OR_EQUAL_INT16(*p0, *p2);
+}
+
+void testNotGreaterOrEqualINT16(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_GREATER_OR_EQUAL_INT16(32767, -32768);
+    VERIFY_FAILS_END
+}
+
+void testGreaterOrEqualINT32(void)
+{
+    UNITY_INT32 v0, v1, v2;
+    UNITY_INT32 *p0, *p1, *p2;
+
+    v0 = -214783648;
+    v1 = 214783647;
+    v2 = -214783648;
+    p0 = &v0;
+    p1 = &v1;
+    p2 = &v2;
+
+    TEST_ASSERT_GREATER_OR_EQUAL_INT32(v0, v1);
+    TEST_ASSERT_GREATER_OR_EQUAL_INT32(*p0, v1);
+    TEST_ASSERT_GREATER_OR_EQUAL_INT32(v0, *p1);
+    TEST_ASSERT_GREATER_OR_EQUAL_INT32(*p0, *p1);
+    TEST_ASSERT_GREATER_OR_EQUAL_INT32(v0, v2);
+    TEST_ASSERT_GREATER_OR_EQUAL_INT32(*p0, v2);
+    TEST_ASSERT_GREATER_OR_EQUAL_INT32(v0, *p2);
+    TEST_ASSERT_GREATER_OR_EQUAL_INT32(*p0, *p2);
+}
+
+void testNotGreaterOrEqualINT32(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_GREATER_OR_EQUAL_INT32(214783647, -214783648);
+    VERIFY_FAILS_END
+}
+
+void testGreaterOrEqualUINT(void)
+{
+    UNITY_UINT v0, v1, v2;
+    UNITY_UINT *p0, *p1, *p2;
+
+    v0 = 0;
+    v1 = 1;
+    v2 = 0;
+    p0 = &v0;
+    p1 = &v1;
+    p2 = &v2;
+
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT(v0, v1);
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT(*p0, v1);
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT(v0, *p1);
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT(*p0, *p1);
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT(v0, v2);
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT(*p0, v2);
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT(v0, *p2);
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT(*p0, *p2);
+}
+
+void testNotGreaterOrEqualUINT(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT(1, 0);
+    VERIFY_FAILS_END
+}
+
+void testGreaterOrEqualUINT8(void)
+{
+    UNITY_UINT8 v0, v1, v2;
+    UNITY_UINT8 *p0, *p1, *p2;
+
+    v0 = 0;
+    v1 = 255;
+    v2 = 0;
+    p0 = &v0;
+    p1 = &v1;
+    p2 = &v2;
+
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT8(v0, v1);
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT8(*p0, v1);
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT8(v0, *p1);
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT8(*p0, *p1);
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT8(v0, v2);
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT8(*p0, v2);
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT8(v0, *p2);
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT8(*p0, *p2);
+}
+
+void testNotGreaterOrEqualUINT8(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT8(255, 0);
+    VERIFY_FAILS_END
+}
+
+void testGreaterOrEqualUINT16(void)
+{
+    UNITY_UINT16 v0, v1, v2;
+    UNITY_UINT16 *p0, *p1, *p2;
+
+    v0 = 0;
+    v1 = 65535;
+    v2 = 0;
+    p0 = &v0;
+    p1 = &v1;
+    p2 = &v2;
+
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT16(v0, v1);
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT16(*p0, v1);
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT16(v0, *p1);
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT16(*p0, *p1);
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT16(v0, v2);
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT16(*p0, v2);
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT16(v0, *p2);
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT16(*p0, *p2);
+}
+
+void testNotGreaterOrEqualUINT16(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT16(65535, 0);
+    VERIFY_FAILS_END
+}
+
+void testGreaterOrEqualUINT32(void)
+{
+    UNITY_UINT32 v0, v1, v2;
+    UNITY_UINT32 *p0, *p1, *p2;
+
+    v0 = 0;
+    v1 = 4294967295u;
+    v2 = 0;
+    p0 = &v0;
+    p1 = &v1;
+    p2 = &v2;
+
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT32(v0, v1);
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT32(*p0, v1);
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT32(v0, *p1);
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT32(*p0, *p1);
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT32(v0, v2);
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT32(*p0, v2);
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT32(v0, *p2);
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT32(*p0, *p2);
+}
+
+void testNotGreaterOrEqualUINT32(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_GREATER_OR_EQUAL_UINT32(4294967295u, 0);
+    VERIFY_FAILS_END
+}
+
+void testGreaterOrEqualHEX8(void)
+{
+    UNITY_UINT8 v0, v1, v2;
+    UNITY_UINT8 *p0, *p1, *p2;
+
+    v0 = 0x00;
+    v1 = 0xFF;
+    v2 = 0x00;
+    p0 = &v0;
+    p1 = &v1;
+    p2 = &v2;
+
+    TEST_ASSERT_GREATER_OR_EQUAL_HEX8(v0, v1);
+    TEST_ASSERT_GREATER_OR_EQUAL_HEX8(*p0, v1);
+    TEST_ASSERT_GREATER_OR_EQUAL_HEX8(v0, *p1);
+    TEST_ASSERT_GREATER_OR_EQUAL_HEX8(*p0, *p1);
+    TEST_ASSERT_GREATER_OR_EQUAL_HEX8(v0, v2);
+    TEST_ASSERT_GREATER_OR_EQUAL_HEX8(*p0, v2);
+    TEST_ASSERT_GREATER_OR_EQUAL_HEX8(v0, *p2);
+    TEST_ASSERT_GREATER_OR_EQUAL_HEX8(*p0, *p2);
+}
+
+void testNotGreaterOrEqualHEX8(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_GREATER_OR_EQUAL_HEX8(0xFF, 0x00);
+    VERIFY_FAILS_END
+}
+
+void testGreaterOrEqualHEX16(void)
+{
+    UNITY_UINT16 v0, v1, v2;
+    UNITY_UINT16 *p0, *p1, *p2;
+
+    v0 = 0x0000;
+    v1 = 0xFFFF;
+    v2 = 0x0000;
+    p0 = &v0;
+    p1 = &v1;
+    p2 = &v2;
+
+    TEST_ASSERT_GREATER_OR_EQUAL_HEX16(v0, v1);
+    TEST_ASSERT_GREATER_OR_EQUAL_HEX16(*p0, v1);
+    TEST_ASSERT_GREATER_OR_EQUAL_HEX16(v0, *p1);
+    TEST_ASSERT_GREATER_OR_EQUAL_HEX16(*p0, *p1);
+    TEST_ASSERT_GREATER_OR_EQUAL_HEX16(v0, v2);
+    TEST_ASSERT_GREATER_OR_EQUAL_HEX16(*p0, v2);
+    TEST_ASSERT_GREATER_OR_EQUAL_HEX16(v0, *p2);
+    TEST_ASSERT_GREATER_OR_EQUAL_HEX16(*p0, *p2);
+}
+
+void testNotGreaterOrEqualHEX16(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_GREATER_OR_EQUAL_HEX16(0xFFFF, 0x00);
+    VERIFY_FAILS_END
+}
+
+void testGreaterOrEqualHEX32(void)
+{
+    UNITY_UINT32 v0, v1, v2;
+    UNITY_UINT32 *p0, *p1, *p2;
+
+    v0 = 0x00000000;
+    v1 = 0xFFFFFFFF;
+    v2 = 0x00000000;
+    p0 = &v0;
+    p1 = &v1;
+    p2 = &v2;
+
+    TEST_ASSERT_GREATER_OR_EQUAL_HEX32(v0, v1);
+    TEST_ASSERT_GREATER_OR_EQUAL_HEX32(*p0, v1);
+    TEST_ASSERT_GREATER_OR_EQUAL_HEX32(v0, *p1);
+    TEST_ASSERT_GREATER_OR_EQUAL_HEX32(*p0, *p1);
+    TEST_ASSERT_GREATER_OR_EQUAL_HEX32(v0, v2);
+    TEST_ASSERT_GREATER_OR_EQUAL_HEX32(*p0, v2);
+    TEST_ASSERT_GREATER_OR_EQUAL_HEX32(v0, *p2);
+    TEST_ASSERT_GREATER_OR_EQUAL_HEX32(*p0, *p2);
+}
+
+void testNotGreaterOrEqualHEX32(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_GREATER_OR_EQUAL_HEX32(0xFFFFFFFF, 0x00);
+    VERIFY_FAILS_END
+}
+
+/*-----------------*/
+
+void testLessThan(void)
+{
+    UNITY_INT v0, v1;
+    UNITY_INT *p0, *p1;
+
+    v0 = 0;
+    v1 = -1;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_LESS_THAN(v0, v1);
+    TEST_ASSERT_LESS_THAN(*p0, v1);
+    TEST_ASSERT_LESS_THAN(v0, *p1);
+    TEST_ASSERT_LESS_THAN(*p0, *p1);
+}
+
+void testNotLessThan(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_LESS_THAN(0, 1);
+    VERIFY_FAILS_END
+}
+
+void testLessThanINT(void)
+{
+    UNITY_INT v0, v1;
+    UNITY_INT *p0, *p1;
+
+    v0 = 3334;
+    v1 = 302;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_LESS_THAN_INT(v0, v1);
+    TEST_ASSERT_LESS_THAN_INT(*p0, v1);
+    TEST_ASSERT_LESS_THAN_INT(v0, *p1);
+    TEST_ASSERT_LESS_THAN_INT(*p0, *p1);
+}
+
+void testNotLessThanINT(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_LESS_THAN_INT(302, 3334);
+    VERIFY_FAILS_END
+}
+
+void testLessThanINT8(void)
+{
+    UNITY_INT8 v0, v1;
+    UNITY_INT8 *p0, *p1;
+
+    v0 = 127;
+    v1 = -128;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_LESS_THAN_INT8(v0, v1);
+    TEST_ASSERT_LESS_THAN_INT8(*p0, v1);
+    TEST_ASSERT_LESS_THAN_INT8(v0, *p1);
+    TEST_ASSERT_LESS_THAN_INT8(*p0, *p1);
+}
+
+void testNotLessThanINT8(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_LESS_THAN_INT8(-128, 127);
+    VERIFY_FAILS_END
+}
+
+void testLessThanCHAR(void)
+{
+    char v0, v1;
+    char *p0, *p1;
+
+    v0 = 127;
+    v1 = -128;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_LESS_THAN_CHAR(v0, v1);
+    TEST_ASSERT_LESS_THAN_CHAR(*p0, v1);
+    TEST_ASSERT_LESS_THAN_CHAR(v0, *p1);
+    TEST_ASSERT_LESS_THAN_CHAR(*p0, *p1);
+}
+
+void testNotLessThanCHAR(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_LESS_THAN_CHAR(-128, 127);
+    VERIFY_FAILS_END
+}
+
+void testLessThanINT16(void)
+{
+    UNITY_INT16 v0, v1;
+    UNITY_INT16 *p0, *p1;
+
+    v0 = 32767;
+    v1 = -32768;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_LESS_THAN_INT16(v0, v1);
+    TEST_ASSERT_LESS_THAN_INT16(*p0, v1);
+    TEST_ASSERT_LESS_THAN_INT16(v0, *p1);
+    TEST_ASSERT_LESS_THAN_INT16(*p0, *p1);
+}
+
+void testNotLessThanINT16(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_LESS_THAN_INT16(-32768, 32767);
+    VERIFY_FAILS_END
+}
+
+void testLessThanINT32(void)
+{
+    UNITY_INT32 v0, v1;
+    UNITY_INT32 *p0, *p1;
+
+    v0 = 214783647;
+    v1 = -214783648;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_LESS_THAN_INT32(v0, v1);
+    TEST_ASSERT_LESS_THAN_INT32(*p0, v1);
+    TEST_ASSERT_LESS_THAN_INT32(v0, *p1);
+    TEST_ASSERT_LESS_THAN_INT32(*p0, *p1);
+}
+
+void testNotLessThanINT32(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_LESS_THAN_INT32(-214783648, 214783647);
+    VERIFY_FAILS_END
+}
+
+void testLessThanUINT(void)
+{
+    UNITY_UINT v0, v1;
+    UNITY_UINT *p0, *p1;
+
+    v0 = 1;
+    v1 = 0;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_LESS_THAN_UINT(v0, v1);
+    TEST_ASSERT_LESS_THAN_UINT(*p0, v1);
+    TEST_ASSERT_LESS_THAN_UINT(v0, *p1);
+    TEST_ASSERT_LESS_THAN_UINT(*p0, *p1);
+}
+
+void testNotLessThanUINT(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_LESS_THAN_UINT(0, 1);
+    VERIFY_FAILS_END
+}
+
+void testLessThanUINT8(void)
+{
+    UNITY_UINT8 v0, v1;
+    UNITY_UINT8 *p0, *p1;
+
+    v0 = 255;
+    v1 = 0;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_LESS_THAN_UINT8(v0, v1);
+    TEST_ASSERT_LESS_THAN_UINT8(*p0, v1);
+    TEST_ASSERT_LESS_THAN_UINT8(v0, *p1);
+    TEST_ASSERT_LESS_THAN_UINT8(*p0, *p1);
+}
+
+void testNotLessThanUINT8(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_LESS_THAN_UINT8(0, 255);
+    VERIFY_FAILS_END
+}
+
+void testLessThanUINT16(void)
+{
+    UNITY_UINT16 v0, v1;
+    UNITY_UINT16 *p0, *p1;
+
+    v0 = 65535;
+    v1 = 0;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_LESS_THAN_UINT16(v0, v1);
+    TEST_ASSERT_LESS_THAN_UINT16(*p0, v1);
+    TEST_ASSERT_LESS_THAN_UINT16(v0, *p1);
+    TEST_ASSERT_LESS_THAN_UINT16(*p0, *p1);
+}
+
+void testNotLessThanUINT16(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_LESS_THAN_UINT16(0, 65535);
+    VERIFY_FAILS_END
+}
+
+void testLessThanUINT32(void)
+{
+    UNITY_UINT32 v0, v1;
+    UNITY_UINT32 *p0, *p1;
+
+    v0 = 4294967295u;
+    v1 = 0;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_LESS_THAN_UINT32(v0, v1);
+    TEST_ASSERT_LESS_THAN_UINT32(*p0, v1);
+    TEST_ASSERT_LESS_THAN_UINT32(v0, *p1);
+    TEST_ASSERT_LESS_THAN_UINT32(*p0, *p1);
+}
+
+void testNotLessThanUINT32(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_LESS_THAN_UINT32(0, 4294967295u);
+    VERIFY_FAILS_END
+}
+
+void testLessThanHEX8(void)
+{
+    UNITY_UINT8 v0, v1;
+    UNITY_UINT8 *p0, *p1;
+
+    v0 = 0xFF;
+    v1 = 0x00;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_LESS_THAN_HEX8(v0, v1);
+    TEST_ASSERT_LESS_THAN_HEX8(*p0, v1);
+    TEST_ASSERT_LESS_THAN_HEX8(v0, *p1);
+    TEST_ASSERT_LESS_THAN_HEX8(*p0, *p1);
+}
+
+void testNotLessThanHEX8(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_LESS_THAN_HEX8(0x00, 0xFF);
+    VERIFY_FAILS_END
+}
+
+void testLessThanHEX16(void)
+{
+    UNITY_UINT16 v0, v1;
+    UNITY_UINT16 *p0, *p1;
+
+    v0 = 0xFFFF;
+    v1 = 0x0000;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_LESS_THAN_HEX16(v0, v1);
+    TEST_ASSERT_LESS_THAN_HEX16(*p0, v1);
+    TEST_ASSERT_LESS_THAN_HEX16(v0, *p1);
+    TEST_ASSERT_LESS_THAN_HEX16(*p0, *p1);
+}
+
+void testNotLessThanHEX16(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_LESS_THAN_HEX16(0x0000, 0xFFFF);
+    VERIFY_FAILS_END
+}
+
+void testLessThanHEX32(void)
+{
+    UNITY_UINT32 v0, v1;
+    UNITY_UINT32 *p0, *p1;
+
+    v0 = 0xFFFFFFFF;
+    v1 = 0x00000000;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_LESS_THAN_HEX32(v0, v1);
+    TEST_ASSERT_LESS_THAN_HEX32(*p0, v1);
+    TEST_ASSERT_LESS_THAN_HEX32(v0, *p1);
+    TEST_ASSERT_LESS_THAN_HEX32(*p0, *p1);
+}
+
+void testNotLessThanHEX32(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_LESS_THAN_HEX32(0x00000000, 0xFFFFFFFF);
+    VERIFY_FAILS_END
+}
+
+void testLessOrEqual(void)
+{
+    UNITY_INT v0, v1, v2;
+    UNITY_INT *p0, *p1, *p2;
+
+    v0 = 0;
+    v1 = -1;
+    v2 = 0;
+    p0 = &v0;
+    p1 = &v1;
+    p2 = &v2;
+
+    TEST_ASSERT_LESS_OR_EQUAL(v0, v1);
+    TEST_ASSERT_LESS_OR_EQUAL(*p0, v1);
+    TEST_ASSERT_LESS_OR_EQUAL(v0, *p1);
+    TEST_ASSERT_LESS_OR_EQUAL(*p0, *p1);
+    TEST_ASSERT_LESS_OR_EQUAL(v0, v2);
+    TEST_ASSERT_LESS_OR_EQUAL(*p0, v2);
+    TEST_ASSERT_LESS_OR_EQUAL(v0, *p2);
+    TEST_ASSERT_LESS_OR_EQUAL(*p0, *p2);
+}
+
+void testNotLessOrEqual(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_LESS_OR_EQUAL(0, 1);
+    VERIFY_FAILS_END
+}
+
+void testLessOrEqualINT(void)
+{
+    UNITY_INT v0, v1, v2;
+    UNITY_INT *p0, *p1, *p2;
+
+    v0 = 3334;
+    v1 = 302;
+    v2 = 3334;
+    p0 = &v0;
+    p1 = &v1;
+    p2 = &v2;
+
+    TEST_ASSERT_LESS_OR_EQUAL_INT(v0, v1);
+    TEST_ASSERT_LESS_OR_EQUAL_INT(*p0, v1);
+    TEST_ASSERT_LESS_OR_EQUAL_INT(v0, *p1);
+    TEST_ASSERT_LESS_OR_EQUAL_INT(*p0, *p1);
+    TEST_ASSERT_LESS_OR_EQUAL_INT(v0, v2);
+    TEST_ASSERT_LESS_OR_EQUAL_INT(*p0, v2);
+    TEST_ASSERT_LESS_OR_EQUAL_INT(v0, *p2);
+    TEST_ASSERT_LESS_OR_EQUAL_INT(*p0, *p2);
+}
+
+void testNotLessOrEqualINT(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_LESS_OR_EQUAL_INT(302, 3334);
+    VERIFY_FAILS_END
+}
+
+void testLessOrEqualINT8(void)
+{
+    UNITY_INT8 v0, v1, v2;
+    UNITY_INT8 *p0, *p1, *p2;
+
+    v0 = 127;
+    v1 = -128;
+    v2 = 127;
+    p0 = &v0;
+    p1 = &v1;
+    p2 = &v2;
+
+    TEST_ASSERT_LESS_OR_EQUAL_INT8(v0, v1);
+    TEST_ASSERT_LESS_OR_EQUAL_INT8(*p0, v1);
+    TEST_ASSERT_LESS_OR_EQUAL_INT8(v0, *p1);
+    TEST_ASSERT_LESS_OR_EQUAL_INT8(*p0, *p1);
+    TEST_ASSERT_LESS_OR_EQUAL_INT8(v0, v2);
+    TEST_ASSERT_LESS_OR_EQUAL_INT8(*p0, v2);
+    TEST_ASSERT_LESS_OR_EQUAL_INT8(v0, *p2);
+    TEST_ASSERT_LESS_OR_EQUAL_INT8(*p0, *p2);
+}
+
+void testNotLessOrEqualINT8(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_LESS_OR_EQUAL_INT8(-128, 127);
+    VERIFY_FAILS_END
+}
+
+void testLessOrEqualCHAR(void)
+{
+    char v0, v1, v2;
+    char *p0, *p1, *p2;
+
+    v0 = 127;
+    v1 = -128;
+    v2 = 127;
+    p0 = &v0;
+    p1 = &v1;
+    p2 = &v2;
+
+    TEST_ASSERT_LESS_OR_EQUAL_CHAR(v0, v1);
+    TEST_ASSERT_LESS_OR_EQUAL_CHAR(*p0, v1);
+    TEST_ASSERT_LESS_OR_EQUAL_CHAR(v0, *p1);
+    TEST_ASSERT_LESS_OR_EQUAL_CHAR(*p0, *p1);
+    TEST_ASSERT_LESS_OR_EQUAL_CHAR(v0, v2);
+    TEST_ASSERT_LESS_OR_EQUAL_CHAR(*p0, v2);
+    TEST_ASSERT_LESS_OR_EQUAL_CHAR(v0, *p2);
+    TEST_ASSERT_LESS_OR_EQUAL_CHAR(*p0, *p2);
+}
+
+void testNotLessOrEqualCHAR(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_LESS_OR_EQUAL_CHAR(-128, 127);
+    VERIFY_FAILS_END
+}
+
+void testLessOrEqualINT16(void)
+{
+    UNITY_INT16 v0, v1, v2;
+    UNITY_INT16 *p0, *p1, *p2;
+
+    v0 = 32767;
+    v1 = -32768;
+    v2 = 32767;
+    p0 = &v0;
+    p1 = &v1;
+    p2 = &v2;
+
+    TEST_ASSERT_LESS_OR_EQUAL_INT16(v0, v1);
+    TEST_ASSERT_LESS_OR_EQUAL_INT16(*p0, v1);
+    TEST_ASSERT_LESS_OR_EQUAL_INT16(v0, *p1);
+    TEST_ASSERT_LESS_OR_EQUAL_INT16(*p0, *p1);
+    TEST_ASSERT_LESS_OR_EQUAL_INT16(v0, v2);
+    TEST_ASSERT_LESS_OR_EQUAL_INT16(*p0, v2);
+    TEST_ASSERT_LESS_OR_EQUAL_INT16(v0, *p2);
+    TEST_ASSERT_LESS_OR_EQUAL_INT16(*p0, *p2);
+}
+
+void testNotLessOrEqualINT16(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_LESS_OR_EQUAL_INT16(-32768, 32767);
+    VERIFY_FAILS_END
+}
+
+void testLessOrEqualINT32(void)
+{
+    UNITY_INT32 v0, v1, v2;
+    UNITY_INT32 *p0, *p1, *p2;
+
+    v0 = 214783647;
+    v1 = -214783648;
+    v2 = 214783647;
+    p0 = &v0;
+    p1 = &v1;
+    p2 = &v2;
+
+    TEST_ASSERT_LESS_OR_EQUAL_INT32(v0, v1);
+    TEST_ASSERT_LESS_OR_EQUAL_INT32(*p0, v1);
+    TEST_ASSERT_LESS_OR_EQUAL_INT32(v0, *p1);
+    TEST_ASSERT_LESS_OR_EQUAL_INT32(*p0, *p1);
+    TEST_ASSERT_LESS_OR_EQUAL_INT32(v0, v2);
+    TEST_ASSERT_LESS_OR_EQUAL_INT32(*p0, v2);
+    TEST_ASSERT_LESS_OR_EQUAL_INT32(v0, *p2);
+    TEST_ASSERT_LESS_OR_EQUAL_INT32(*p0, *p2);
+}
+
+void testNotLessOrEqualINT32(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_LESS_OR_EQUAL_INT32(-214783648, 214783647);
+    VERIFY_FAILS_END
+}
+
+void testLessOrEqualUINT(void)
+{
+    UNITY_UINT v0, v1, v2;
+    UNITY_UINT *p0, *p1, *p2;
+
+    v0 = 1;
+    v1 = 0;
+    v2 = 1;
+    p0 = &v0;
+    p1 = &v1;
+    p2 = &v2;
+
+    TEST_ASSERT_LESS_OR_EQUAL_UINT(v0, v1);
+    TEST_ASSERT_LESS_OR_EQUAL_UINT(*p0, v1);
+    TEST_ASSERT_LESS_OR_EQUAL_UINT(v0, *p1);
+    TEST_ASSERT_LESS_OR_EQUAL_UINT(*p0, *p1);
+    TEST_ASSERT_LESS_OR_EQUAL_UINT(v0, v2);
+    TEST_ASSERT_LESS_OR_EQUAL_UINT(*p0, v2);
+    TEST_ASSERT_LESS_OR_EQUAL_UINT(v0, *p2);
+    TEST_ASSERT_LESS_OR_EQUAL_UINT(*p0, *p2);
+}
+
+void testNotLessOrEqualUINT(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_LESS_OR_EQUAL_UINT(0, 1);
+    VERIFY_FAILS_END
+}
+
+void testLessOrEqualUINT8(void)
+{
+    UNITY_UINT8 v0, v1, v2;
+    UNITY_UINT8 *p0, *p1, *p2;
+
+    v0 = 255;
+    v1 = 0;
+    v2 = 255;
+    p0 = &v0;
+    p1 = &v1;
+    p2 = &v2;
+
+    TEST_ASSERT_LESS_OR_EQUAL_UINT8(v0, v1);
+    TEST_ASSERT_LESS_OR_EQUAL_UINT8(*p0, v1);
+    TEST_ASSERT_LESS_OR_EQUAL_UINT8(v0, *p1);
+    TEST_ASSERT_LESS_OR_EQUAL_UINT8(*p0, *p1);
+    TEST_ASSERT_LESS_OR_EQUAL_UINT8(v0, v2);
+    TEST_ASSERT_LESS_OR_EQUAL_UINT8(*p0, v2);
+    TEST_ASSERT_LESS_OR_EQUAL_UINT8(v0, *p2);
+    TEST_ASSERT_LESS_OR_EQUAL_UINT8(*p0, *p2);
+}
+
+void testNotLessOrEqualUINT8(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_LESS_OR_EQUAL_UINT8(0, 255);
+    VERIFY_FAILS_END
+}
+
+void testLessOrEqualUINT16(void)
+{
+    UNITY_UINT16 v0, v1, v2;
+    UNITY_UINT16 *p0, *p1, *p2;
+
+    v0 = 65535;
+    v1 = 0;
+    v2 = 65535;
+    p0 = &v0;
+    p1 = &v1;
+    p2 = &v2;
+
+    TEST_ASSERT_LESS_OR_EQUAL_UINT16(v0, v1);
+    TEST_ASSERT_LESS_OR_EQUAL_UINT16(*p0, v1);
+    TEST_ASSERT_LESS_OR_EQUAL_UINT16(v0, *p1);
+    TEST_ASSERT_LESS_OR_EQUAL_UINT16(*p0, *p1);
+    TEST_ASSERT_LESS_OR_EQUAL_UINT16(v0, v2);
+    TEST_ASSERT_LESS_OR_EQUAL_UINT16(*p0, v2);
+    TEST_ASSERT_LESS_OR_EQUAL_UINT16(v0, *p2);
+    TEST_ASSERT_LESS_OR_EQUAL_UINT16(*p0, *p2);
+}
+
+void testNotLessOrEqualUINT16(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_LESS_OR_EQUAL_UINT16(0, 65535);
+    VERIFY_FAILS_END
+}
+
+void testLessOrEqualUINT32(void)
+{
+    UNITY_UINT32 v0, v1, v2;
+    UNITY_UINT32 *p0, *p1, *p2;
+
+    v0 = 4294967295u;
+    v1 = 0;
+    v2 = 4294967295u;
+    p0 = &v0;
+    p1 = &v1;
+    p2 = &v2;
+
+    TEST_ASSERT_LESS_OR_EQUAL_UINT32(v0, v1);
+    TEST_ASSERT_LESS_OR_EQUAL_UINT32(*p0, v1);
+    TEST_ASSERT_LESS_OR_EQUAL_UINT32(v0, *p1);
+    TEST_ASSERT_LESS_OR_EQUAL_UINT32(*p0, *p1);
+    TEST_ASSERT_LESS_OR_EQUAL_UINT32(v0, v2);
+    TEST_ASSERT_LESS_OR_EQUAL_UINT32(*p0, v2);
+    TEST_ASSERT_LESS_OR_EQUAL_UINT32(v0, *p2);
+    TEST_ASSERT_LESS_OR_EQUAL_UINT32(*p0, *p2);
+}
+
+void testNotLessOrEqualUINT32(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_LESS_OR_EQUAL_UINT32(0, 4294967295u);
+    VERIFY_FAILS_END
+}
+
+void testLessOrEqualHEX8(void)
+{
+    UNITY_UINT8 v0, v1, v2;
+    UNITY_UINT8 *p0, *p1, *p2;
+
+    v0 = 0xFF;
+    v1 = 0x00;
+    v2 = 0xFF;
+    p0 = &v0;
+    p1 = &v1;
+    p2 = &v2;
+
+    TEST_ASSERT_LESS_OR_EQUAL_HEX8(v0, v1);
+    TEST_ASSERT_LESS_OR_EQUAL_HEX8(*p0, v1);
+    TEST_ASSERT_LESS_OR_EQUAL_HEX8(v0, *p1);
+    TEST_ASSERT_LESS_OR_EQUAL_HEX8(*p0, *p1);
+    TEST_ASSERT_LESS_OR_EQUAL_HEX8(v0, v2);
+    TEST_ASSERT_LESS_OR_EQUAL_HEX8(*p0, v2);
+    TEST_ASSERT_LESS_OR_EQUAL_HEX8(v0, *p2);
+    TEST_ASSERT_LESS_OR_EQUAL_HEX8(*p0, *p2);
+}
+
+void testNotLessOrEqualHEX8(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_LESS_OR_EQUAL_HEX8(0x00, 0xFF);
+    VERIFY_FAILS_END
+}
+
+void testLessOrEqualHEX16(void)
+{
+    UNITY_UINT16 v0, v1, v2;
+    UNITY_UINT16 *p0, *p1, *p2;
+
+    v0 = 0xFFFF;
+    v1 = 0x0000;
+    v2 = 0xFFFF;
+    p0 = &v0;
+    p1 = &v1;
+    p2 = &v2;
+
+    TEST_ASSERT_LESS_OR_EQUAL_HEX16(v0, v1);
+    TEST_ASSERT_LESS_OR_EQUAL_HEX16(*p0, v1);
+    TEST_ASSERT_LESS_OR_EQUAL_HEX16(v0, *p1);
+    TEST_ASSERT_LESS_OR_EQUAL_HEX16(*p0, *p1);
+    TEST_ASSERT_LESS_OR_EQUAL_HEX16(v0, v2);
+    TEST_ASSERT_LESS_OR_EQUAL_HEX16(*p0, v2);
+    TEST_ASSERT_LESS_OR_EQUAL_HEX16(v0, *p2);
+    TEST_ASSERT_LESS_OR_EQUAL_HEX16(*p0, *p2);
+}
+
+void testNotLessOrEqualHEX16(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_LESS_OR_EQUAL_HEX16(0x0000, 0xFFFF);
+    VERIFY_FAILS_END
+}
+
+void testLessOrEqualHEX32(void)
+{
+    UNITY_UINT32 v0, v1, v2;
+    UNITY_UINT32 *p0, *p1, *p2;
+
+    v0 = 0xFFFFFFFF;
+    v1 = 0x00000000;
+    v2 = 0xFFFFFFFF;
+    p0 = &v0;
+    p1 = &v1;
+    p2 = &v2;
+
+    TEST_ASSERT_LESS_OR_EQUAL_HEX32(v0, v1);
+    TEST_ASSERT_LESS_OR_EQUAL_HEX32(*p0, v1);
+    TEST_ASSERT_LESS_OR_EQUAL_HEX32(v0, *p1);
+    TEST_ASSERT_LESS_OR_EQUAL_HEX32(*p0, *p1);
+    TEST_ASSERT_LESS_OR_EQUAL_HEX32(v0, v2);
+    TEST_ASSERT_LESS_OR_EQUAL_HEX32(*p0, v2);
+    TEST_ASSERT_LESS_OR_EQUAL_HEX32(v0, *p2);
+    TEST_ASSERT_LESS_OR_EQUAL_HEX32(*p0, *p2);
+}
+
+void testNotLessOrEqualHEX32(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_LESS_OR_EQUAL_HEX32(0x00000000, 0xFFFFFFFF);
+    VERIFY_FAILS_END
+}
+
+void testHexPrintsUpToMaxNumberOfNibbles(void)
+{
+#ifndef USING_OUTPUT_SPY
+    TEST_IGNORE();
+#else
+    startPutcharSpy();
+    UnityPrintNumberHex(0xBEE, 21);
+    endPutcharSpy();
+#ifdef UNITY_SUPPORT_64
+    TEST_ASSERT_EQUAL_INT(16, strlen(getBufferPutcharSpy()));
+#else
+    TEST_ASSERT_EQUAL_INT( 8, strlen(getBufferPutcharSpy()));
+#endif
+#endif
+}
+
+void testPrintNumbers32(void)
+{
+#ifndef USING_OUTPUT_SPY
+    TEST_IGNORE_MESSAGE("Compile with '-D UNITY_OUTPUT_CHAR=putcharSpy' to enable print testing");
+#else
+    TEST_ASSERT_EQUAL_PRINT_NUMBERS("0", 0);
+    TEST_ASSERT_EQUAL_PRINT_NUMBERS("1", 1);
+    TEST_ASSERT_EQUAL_PRINT_NUMBERS("-1", -1);
+    TEST_ASSERT_EQUAL_PRINT_NUMBERS("2000000000", 2000000000);
+    TEST_ASSERT_EQUAL_PRINT_NUMBERS("-2147483648", (UNITY_INT32)0x80000000);
+    TEST_ASSERT_EQUAL_PRINT_NUMBERS("-1",          (UNITY_INT32)0xFFFFFFFF);
+#endif
+}
+
+void testPrintNumbersUnsigned32(void)
+{
+#ifndef USING_OUTPUT_SPY
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_EQUAL_PRINT_UNSIGNED_NUMBERS("0", 0);
+    TEST_ASSERT_EQUAL_PRINT_UNSIGNED_NUMBERS("1", 1);
+    TEST_ASSERT_EQUAL_PRINT_UNSIGNED_NUMBERS("1500000000", 1500000000);
+    TEST_ASSERT_EQUAL_PRINT_UNSIGNED_NUMBERS("2147483648", (UNITY_UINT32)0x80000000);
+    TEST_ASSERT_EQUAL_PRINT_UNSIGNED_NUMBERS("4294967295", (UNITY_UINT32)0xFFFFFFFF);
+#endif
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_unity_integers_64.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_unity_integers_64.c
new file mode 100644
index 000000000..e12566e83
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_unity_integers_64.c
@@ -0,0 +1,773 @@
+/* ==========================================
+    Unity Project - A Test Framework for C
+    Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+========================================== */
+
+#include "unity.h"
+#define TEST_INSTANCES
+#include "self_assessment_utils.h"
+
+static int SetToOneToFailInTearDown;
+static int SetToOneMeanWeAlreadyCheckedThisGuy;
+
+void setUp(void)
+{
+    SetToOneToFailInTearDown = 0;
+    SetToOneMeanWeAlreadyCheckedThisGuy = 0;
+}
+
+void tearDown(void)
+{
+    endPutcharSpy(); /* Stop suppressing test output */
+    if (SetToOneToFailInTearDown == 1)
+    {
+        /* These will be skipped internally if already failed/ignored */
+        TEST_FAIL_MESSAGE("<= Failed in tearDown");
+        TEST_IGNORE_MESSAGE("<= Ignored in tearDown");
+    }
+    if ((SetToOneMeanWeAlreadyCheckedThisGuy == 0) && (Unity.CurrentTestFailed > 0))
+    {
+        UnityPrint(": [[[[ Test Should Have Passed But Did Not ]]]]");
+        UNITY_OUTPUT_CHAR('\n');
+    }
+}
+
+void testInt64ArrayWithinDelta(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 expected[] = {12345000, -12344995, 12345005};
+    UNITY_INT64 actualSmallDelta[] = {12345001, -12344996, 12345005};
+    UNITY_INT64 actualBigDelta[] = {12345101, -12344896, 12345055};
+
+    TEST_ASSERT_INT64_ARRAY_WITHIN(1, expected, actualSmallDelta, 3);
+    TEST_ASSERT_INT64_ARRAY_WITHIN(110, expected, actualBigDelta, 3);
+#endif
+}
+
+void testInt64ArrayWithinDeltaAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 expected[] = {12345000, -12344995, 12345005};
+    UNITY_INT64 actualSmallDelta[] = {12345001, -12344996, 12345005};
+    UNITY_INT64 actualBigDelta[] = {12345101, -12344896, 12345055};
+
+    TEST_ASSERT_INT64_ARRAY_WITHIN_MESSAGE(1, expected, actualSmallDelta, 3, "Custom Message.");
+    TEST_ASSERT_INT64_ARRAY_WITHIN_MESSAGE(110, expected, actualBigDelta, 3, "Custom Message.");
+#endif
+}
+
+void tesUInt64ArrayNotWithinDelta(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 expected[] = {12345000, -12344995, 12345005};
+    UNITY_INT64 actualBigDelta[] = {12345101, -12344896, 12345055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT64_ARRAY_WITHIN(1, expected, actualBigDelta, 3);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testInt64ArrayNotWithinDeltaAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 expected[] = {12345000, -12344995, 12345005};
+    UNITY_INT64 actualBigDelta[] = {12345101, -12344896, 12345055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT64_ARRAY_WITHIN_MESSAGE(1, expected, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+#endif
+}
+
+void testInt64ArrayWithinDeltaPointless(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 expected[] = {12345000, -12344995, 12345005};
+    UNITY_INT64 actualBigDelta[] = {12345101, -12344896, 12345055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT64_ARRAY_WITHIN(110, expected, actualBigDelta, 0);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testInt64ArrayWithinDeltaPointlessAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 expected[] = {12345000, -12344995, 12345005};
+    UNITY_INT64 actualBigDelta[] = {12345101, -12344896, 12345055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT64_ARRAY_WITHIN_MESSAGE(110, expected, actualBigDelta, 0, "Custom Message.");
+    VERIFY_FAILS_END
+#endif
+}
+
+void testInt64ArrayWithinDeltaExpectedNull(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 actualBigDelta[] = {12345101, -12344896, 12345055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT64_ARRAY_WITHIN(110, NULL, actualBigDelta, 3);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testInt64ArrayWithinDeltaExpectedNullAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 actualBigDelta[] = {12345101, -12344896, 12345055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT64_ARRAY_WITHIN_MESSAGE(110, NULL, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+#endif
+}
+
+void testInt64ArrayWithinDeltaActualNull(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 expected[] = {12345000, -12344995, 12345005};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT64_ARRAY_WITHIN(110, expected, NULL, 3);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testInt64ArrayWithinDeltaActualNullAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 expected[] = {12345000, -12344995, 12345005};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT64_ARRAY_WITHIN_MESSAGE(110, expected, NULL, 3, "Custom Message.");
+    VERIFY_FAILS_END
+#endif
+}
+
+void testInt64ArrayWithinDeltaSamePointer(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 expected[] = {12345000, -12344995, 12345005};
+
+    TEST_ASSERT_UINT64_ARRAY_WITHIN(110, expected, expected, 3);
+#endif
+}
+
+void testInt64ArrayWithinDeltaSamePointerAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 expected[] = {12345000, -12344995, 12345005};
+
+    TEST_ASSERT_INT64_ARRAY_WITHIN_MESSAGE(110, expected, expected, 3, "Custom Message.");
+#endif
+}
+
+void testUInt64ArrayWithinDelta(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {12345000, 12344995, 12345005};
+    UNITY_UINT64 actualSmallDelta[] = {12345001, 12344996, 12345005};
+    UNITY_UINT64 actualBigDelta[] = {12345101, 12344896, 12345055};
+
+    TEST_ASSERT_UINT64_ARRAY_WITHIN(1, expected, actualSmallDelta, 3);
+    TEST_ASSERT_UINT64_ARRAY_WITHIN(110, expected, actualBigDelta, 3);
+#endif
+}
+
+void testUInt64ArrayWithinDeltaAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {12345000, 12344995, 12345005};
+    UNITY_UINT64 actualSmallDelta[] = {12345001, 12344996, 12345005};
+    UNITY_UINT64 actualBigDelta[] = {12345101, 12344896, 12345055};
+
+    TEST_ASSERT_UINT64_ARRAY_WITHIN_MESSAGE(1, expected, actualSmallDelta, 3, "Custom Message.");
+    TEST_ASSERT_UINT64_ARRAY_WITHIN_MESSAGE(110, expected, actualBigDelta, 3, "Custom Message.");
+#endif
+}
+
+void testUInt64ArrayNotWithinDelta(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {12345000, 12344995, 12345005};
+    UNITY_UINT64 actualBigDelta[] = {12345101, 12344896, 12345055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT64_ARRAY_WITHIN(1, expected, actualBigDelta, 3);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testUInt64ArrayNotWithinDeltaAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {12345000, 12344995, 12345005};
+    UNITY_UINT64 actualBigDelta[] = {12345101, 12344896, 12345055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT64_ARRAY_WITHIN_MESSAGE(1, expected, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+#endif
+}
+
+void testUInt64ArrayWithinDeltaPointless(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {12345000, 12344995, 12345005};
+    UNITY_UINT64 actualBigDelta[] = {12345101, 12344896, 12345055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT64_ARRAY_WITHIN(110, expected, actualBigDelta, 0);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testUInt64ArrayWithinDeltaPointlessAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {12345000, 12344995, 12345005};
+    UNITY_UINT64 actualBigDelta[] = {12345101, 12344896, 12345055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT64_ARRAY_WITHIN_MESSAGE(110, expected, actualBigDelta, 0, "Custom Message.");
+    VERIFY_FAILS_END
+#endif
+}
+
+void testUInt64ArrayWithinDeltaExpectedNull(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 actualBigDelta[] = {12345101, 12344896, 12345055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT64_ARRAY_WITHIN(110, NULL, actualBigDelta, 3);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testUInt64ArrayWithinDeltaExpectedNullAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 actualBigDelta[] = {12345101, 12344896, 12345055};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT64_ARRAY_WITHIN_MESSAGE(110, NULL, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+#endif
+}
+
+void testUInt64ArrayWithinDeltaActualNull(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {12345000, 12344995, 12345005};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT64_ARRAY_WITHIN(110, expected, NULL, 3);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testUInt64ArrayWithinDeltaActualNullAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {12345000, 12344995, 12345005};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT64_ARRAY_WITHIN_MESSAGE(110, expected, NULL, 3, "Custom Message.");
+    VERIFY_FAILS_END
+#endif
+}
+
+void testUInt64ArrayWithinDeltaSamePointer(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {12345000, 12344995, 12345005};
+
+    TEST_ASSERT_UINT64_ARRAY_WITHIN(110, expected, expected, 3);
+#endif
+}
+
+void testUInt64ArrayWithinDeltaSamePointerAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {12345000, 12344995, 12345005};
+
+    TEST_ASSERT_UINT64_ARRAY_WITHIN_MESSAGE(110, expected, expected, 3, "Custom Message.");
+#endif
+}
+
+void testHEX64ArrayWithinDelta(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {0xABCD123400000000, 0xABCD112200000000, 0xABCD127700000000};
+    UNITY_UINT64 actualSmallDelta[] = {0xABCD123500000000, 0xABCD112100000000, 0xABCD127700000000};
+    UNITY_UINT64 actualBigDelta[] = {0xABCD126700000000, 0xABCD118800000000, 0xABCD12AC00000000};
+
+    TEST_ASSERT_HEX64_ARRAY_WITHIN(0x100000000, expected, actualSmallDelta, 3);
+    TEST_ASSERT_HEX64_ARRAY_WITHIN(0x6E00000000, expected, actualBigDelta, 3);
+#endif
+}
+
+void testHEX64ArrayWithinDeltaAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {0xABCD123400000000, 0xABCD112200000000, 0xABCD127700000000};
+    UNITY_UINT64 actualSmallDelta[] = {0xABCD123500000000, 0xABCD112100000000, 0xABCD127700000000};
+    UNITY_UINT64 actualBigDelta[] = {0xABCD126700000000, 0xABCD118800000000, 0xABCD12AC00000000};
+
+    TEST_ASSERT_HEX64_ARRAY_WITHIN_MESSAGE(0x100000000, expected, actualSmallDelta, 3, "Custom Message.");
+    TEST_ASSERT_HEX64_ARRAY_WITHIN_MESSAGE(0x6E00000000, expected, actualBigDelta, 3, "Custom Message.");
+#endif
+}
+
+void testHEX64ArrayNotWithinDelta(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {0xABCD123400000000, 0xABCD112200000000, 0xABCD127700000000};
+    UNITY_UINT64 actualBigDelta[] = {0xABCD126700000000, 0xABCD118800000000, 0xABCD12AC00000000};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX64_ARRAY_WITHIN(0x100000000, expected, actualBigDelta, 3);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testHEX64ArrayNotWithinDeltaAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {0xABCD123400000000, 0xABCD112200000000, 0xABCD127700000000};
+    UNITY_UINT64 actualBigDelta[] = {0xABCD126700000000, 0xABCD118800000000, 0xABCD12AC00000000};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX64_ARRAY_WITHIN_MESSAGE(0x100000000, expected, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+#endif
+}
+
+void testHEX64ArrayWithinDeltaPointless(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {0xABCD123400000000, 0xABCD112200000000, 0xABCD127700000000};
+    UNITY_UINT64 actualBigDelta[] = {0xABCD126700000000, 0xABCD118800000000, 0xABCD12AC00000000};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX64_ARRAY_WITHIN(0x6E00000000, expected, actualBigDelta, 0);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testHEX64ArrayWithinDeltaPointlessAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {0xABCD123400000000, 0xABCD112200000000, 0xABCD127700000000};
+    UNITY_UINT64 actualBigDelta[] = {0xABCD126700000000, 0xABCD118800000000, 0xABCD12AC00000000};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX64_ARRAY_WITHIN_MESSAGE(0x6E00000000, expected, actualBigDelta, 0, "Custom Message.");
+    VERIFY_FAILS_END
+#endif
+}
+
+void testHEX64ArrayWithinDeltaExpectedNull(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 actualBigDelta[] = {0xABCD126700000000, 0xABCD118800000000, 0xABCD12AC00000000};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX64_ARRAY_WITHIN(0x6E00000000, NULL, actualBigDelta, 3);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testHEX64ArrayWithinDeltaExpectedNullAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 actualBigDelta[] = {0xABCD126700000000, 0xABCD118800000000, 0xABCD12AC00000000};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX64_ARRAY_WITHIN_MESSAGE(0x6E00000000, NULL, actualBigDelta, 3, "Custom Message.");
+    VERIFY_FAILS_END
+#endif
+}
+
+void testHEX64ArrayWithinDeltaActualNull(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {0xABCD123400000000, 0xABCD112200000000, 0xABCD127700000000};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX64_ARRAY_WITHIN(0x6E00000000, expected, NULL, 3);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testHEX64ArrayWithinDeltaActualNullAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {0xABCD123400000000, 0xABCD112200000000, 0xABCD127700000000};
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX64_ARRAY_WITHIN_MESSAGE(0x6E00000000, expected, NULL, 3, "Custom Message.");
+    VERIFY_FAILS_END
+#endif
+}
+
+void testHEX64ArrayWithinDeltaSamePointer(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {0xABCD123400000000, 0xABCD112200000000, 0xABCD127700000000};
+
+    TEST_ASSERT_HEX64_ARRAY_WITHIN(0x6E00000000, expected, expected, 3);
+#endif
+}
+
+void testHEX64ArrayWithinDeltaSamePointerAndMessage(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 expected[] = {0xABCD123400000000, 0xABCD112200000000, 0xABCD127700000000};
+
+    TEST_ASSERT_HEX64_ARRAY_WITHIN_MESSAGE(0x6E00000000, expected, expected, 3, "Custom Message.");
+#endif
+}
+
+void testEqualHex64s(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 v0, v1;
+    UNITY_UINT64 *p0, *p1;
+
+    v0 = 0x9876543201234567;
+    v1 = 0x9876543201234567;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_EQUAL_HEX64(0x9876543201234567, 0x9876543201234567);
+    TEST_ASSERT_EQUAL_HEX64(v0, v1);
+    TEST_ASSERT_EQUAL_HEX64(0x9876543201234567, v1);
+    TEST_ASSERT_EQUAL_HEX64(v0, 0x9876543201234567);
+    TEST_ASSERT_EQUAL_HEX64(*p0, v1);
+    TEST_ASSERT_EQUAL_HEX64(*p0, *p1);
+    TEST_ASSERT_EQUAL_HEX64(*p0, 0x9876543201234567);
+#endif
+}
+
+void testEqualUint64s(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 v0, v1;
+    UNITY_UINT64 *p0, *p1;
+
+    v0 = 0x9876543201234567;
+    v1 = 0x9876543201234567;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_EQUAL_UINT64(0x9876543201234567, 0x9876543201234567);
+    TEST_ASSERT_EQUAL_UINT64(v0, v1);
+    TEST_ASSERT_EQUAL_UINT64(0x9876543201234567, v1);
+    TEST_ASSERT_EQUAL_UINT64(v0, 0x9876543201234567);
+    TEST_ASSERT_EQUAL_UINT64(*p0, v1);
+    TEST_ASSERT_EQUAL_UINT64(*p0, *p1);
+    TEST_ASSERT_EQUAL_UINT64(*p0, 0x9876543201234567);
+#endif
+}
+
+void testEqualInt64s(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 v0, v1;
+    UNITY_INT64 *p0, *p1;
+
+    v0 = (UNITY_INT64)0x9876543201234567;
+    v1 = (UNITY_INT64)0x9876543201234567;
+    p0 = &v0;
+    p1 = &v1;
+
+    TEST_ASSERT_EQUAL_INT64(0x9876543201234567, 0x9876543201234567);
+    TEST_ASSERT_EQUAL_INT64(v0, v1);
+    TEST_ASSERT_EQUAL_INT64(0x9876543201234567, v1);
+    TEST_ASSERT_EQUAL_INT64(v0, 0x9876543201234567);
+    TEST_ASSERT_EQUAL_INT64(*p0, v1);
+    TEST_ASSERT_EQUAL_INT64(*p0, *p1);
+    TEST_ASSERT_EQUAL_INT64(*p0, 0x9876543201234567);
+#endif
+}
+
+
+void testNotEqualHex64s(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 v0, v1;
+
+    v0 = 9000000000;
+    v1 = 9100000000;
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_HEX64(v0, v1);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualUint64s(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_UINT64 v0, v1;
+
+    v0 = 9000000000;
+    v1 = 9100000000;
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_UINT64(v0, v1);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualInt64s(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 v0, v1;
+
+    v0 = -9000000000;
+    v1 = 9100000000;
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_INT64(v0, v1);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testNotEqualHex64sIfSigned(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    UNITY_INT64 v0, v1;
+
+    v0 = -9000000000;
+    v1 = 9000000000;
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_HEX64(v0, v1);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testHEX64sWithinDelta(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_HEX64_WITHIN(1, 0x7FFFFFFFFFFFFFFF,0x7FFFFFFFFFFFFFFE);
+    TEST_ASSERT_HEX64_WITHIN(5, 5000, 4996);
+    TEST_ASSERT_HEX64_WITHIN(5, 5000, 5005);
+#endif
+}
+
+void testHEX64sNotWithinDelta(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX64_WITHIN(1, 0x7FFFFFFFFFFFFFFF, 0x7FFFFFFFFFFFFFFC);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testHEX64sNotWithinDeltaEvenThoughASignedIntWouldPass(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_HEX64_WITHIN(5, 1, -1);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testUINT64sWithinDelta(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_UINT64_WITHIN(1, 0x7FFFFFFFFFFFFFFF,0x7FFFFFFFFFFFFFFE);
+    TEST_ASSERT_UINT64_WITHIN(5, 5000, 4996);
+    TEST_ASSERT_UINT64_WITHIN(5, 5000, 5005);
+#endif
+}
+
+void testUINT64sNotWithinDelta(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT64_WITHIN(1, 0x7FFFFFFFFFFFFFFF, 0x7FFFFFFFFFFFFFFC);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testUINT64sNotWithinDeltaEvenThoughASignedIntWouldPass(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_UINT64_WITHIN(5, 1, -1);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testINT64sWithinDelta(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    TEST_ASSERT_INT64_WITHIN(1, 0x7FFFFFFFFFFFFFFF,0x7FFFFFFFFFFFFFFE);
+    TEST_ASSERT_INT64_WITHIN(5, 5000, 4996);
+    TEST_ASSERT_INT64_WITHIN(5, 5000, 5005);
+#endif
+}
+
+void testINT64sNotWithinDelta(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT64_WITHIN(1, 0x7FFFFFFFFFFFFFFF, 0x7FFFFFFFFFFFFFFC);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testINT64sNotWithinDeltaAndDifferenceOverflows(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_INT64_WITHIN(1, 0x8000000000000000, 0x7FFFFFFFFFFFFFFF);
+    VERIFY_FAILS_END
+#endif
+}
+
+void testPrintNumbersInt64(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+  #ifndef USING_OUTPUT_SPY
+    TEST_IGNORE();
+  #else
+    TEST_ASSERT_EQUAL_PRINT_NUMBERS("0", 0);
+    TEST_ASSERT_EQUAL_PRINT_NUMBERS("10000000000", 10000000000);
+    TEST_ASSERT_EQUAL_PRINT_NUMBERS("-9223372036854775808", (UNITY_INT)0x8000000000000000);
+    TEST_ASSERT_EQUAL_PRINT_NUMBERS("-1", (UNITY_INT)0xFFFFFFFFFFFFFFFF);
+  #endif
+#endif
+}
+
+void testPrintNumbersUInt64(void)
+{
+#ifndef UNITY_SUPPORT_64
+    TEST_IGNORE();
+#else
+  #ifndef USING_OUTPUT_SPY
+    TEST_IGNORE();
+  #else
+    TEST_ASSERT_EQUAL_PRINT_UNSIGNED_NUMBERS("0", 0);
+    TEST_ASSERT_EQUAL_PRINT_UNSIGNED_NUMBERS("70000000000", 70000000000);
+    TEST_ASSERT_EQUAL_PRINT_UNSIGNED_NUMBERS("9223372036854775808",  (UNITY_UINT)0x8000000000000000);
+    TEST_ASSERT_EQUAL_PRINT_UNSIGNED_NUMBERS("18446744073709551615", (UNITY_UINT)0xFFFFFFFFFFFFFFFF);
+  #endif
+#endif
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_unity_memory.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_unity_memory.c
new file mode 100644
index 000000000..b3cff1319
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_unity_memory.c
@@ -0,0 +1,81 @@
+/* ==========================================
+    Unity Project - A Test Framework for C
+    Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+========================================== */
+
+#include "unity.h"
+#define TEST_INSTANCES
+#include "self_assessment_utils.h"
+
+static int SetToOneToFailInTearDown;
+static int SetToOneMeanWeAlreadyCheckedThisGuy;
+
+void setUp(void)
+{
+    SetToOneToFailInTearDown = 0;
+    SetToOneMeanWeAlreadyCheckedThisGuy = 0;
+}
+
+void tearDown(void)
+{
+    endPutcharSpy(); /* Stop suppressing test output */
+    if (SetToOneToFailInTearDown == 1)
+    {
+        /* These will be skipped internally if already failed/ignored */
+        TEST_FAIL_MESSAGE("<= Failed in tearDown");
+        TEST_IGNORE_MESSAGE("<= Ignored in tearDown");
+    }
+    if ((SetToOneMeanWeAlreadyCheckedThisGuy == 0) && (Unity.CurrentTestFailed > 0))
+    {
+        UnityPrint(": [[[[ Test Should Have Passed But Did Not ]]]]");
+        UNITY_OUTPUT_CHAR('\n');
+    }
+}
+
+void testEqualMemory(void)
+{
+    const char *testString = "whatever";
+
+    TEST_ASSERT_EQUAL_MEMORY(testString, testString, 8);
+    TEST_ASSERT_EQUAL_MEMORY("whatever", "whatever", 8);
+    TEST_ASSERT_EQUAL_MEMORY("whatever", testString, 8);
+    TEST_ASSERT_EQUAL_MEMORY(testString, "whatever", 8);
+    TEST_ASSERT_EQUAL_MEMORY(testString, "whatever", 2);
+    TEST_ASSERT_EQUAL_MEMORY(NULL, NULL, 1);
+}
+
+void testNotEqualMemory1(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_MEMORY("foo", "bar", 3);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualMemory2(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_MEMORY("fool", "food", 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualMemory3(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_MEMORY(NULL, "food", 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualMemory4(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_MEMORY("fool", NULL, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualMemoryLengthZero(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_MEMORY(NULL, NULL, 0);
+    VERIFY_FAILS_END
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_unity_parameterized.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_unity_parameterized.c
new file mode 100644
index 000000000..3129817e9
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_unity_parameterized.c
@@ -0,0 +1,171 @@
+/* ==========================================
+    Unity Project - A Test Framework for C
+    Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+========================================== */
+
+#include <setjmp.h>
+#include <stdio.h>
+#include "unity.h"
+
+/* Support for Meta Test Rig */
+#define TEST_CASE(...)
+
+/* Include Passthroughs for Linking Tests */
+void putcharSpy(int c) { (void)putchar(c);}
+void flushSpy(void) {}
+
+#define EXPECT_ABORT_BEGIN \
+    if (TEST_PROTECT())    \
+    {
+
+#define VERIFY_FAILS_END                                                       \
+    }                                                                          \
+    Unity.CurrentTestFailed = (Unity.CurrentTestFailed != 0) ? 0 : 1;          \
+    if (Unity.CurrentTestFailed == 1) {                                        \
+      SetToOneMeanWeAlreadyCheckedThisGuy = 1;                                 \
+      UnityPrintNumberUnsigned(Unity.CurrentTestLineNumber);                   \
+      UNITY_OUTPUT_CHAR(':');                                                  \
+      UnityPrint(Unity.CurrentTestName);                                       \
+      UnityPrint(":FAIL: [[[[ Test Should Have Failed But Did Not ]]]]");      \
+      UNITY_OUTPUT_CHAR('\n');                                                 \
+    }
+
+#define VERIFY_IGNORES_END                                                     \
+    }                                                                          \
+    Unity.CurrentTestFailed = (Unity.CurrentTestIgnored != 0) ? 0 : 1;         \
+    Unity.CurrentTestIgnored = 0;                                              \
+    if (Unity.CurrentTestFailed == 1) {                                        \
+      SetToOneMeanWeAlreadyCheckedThisGuy = 1;                                 \
+      UnityPrintNumberUnsigned(Unity.CurrentTestLineNumber);                   \
+      UNITY_OUTPUT_CHAR(':');                                                  \
+      UnityPrint(Unity.CurrentTestName);                                       \
+      UnityPrint(":FAIL: [[[[ Test Should Have Ignored But Did Not ]]]]");     \
+      UNITY_OUTPUT_CHAR('\n');                                                 \
+    }
+
+static int SetToOneToFailInTearDown;
+static int SetToOneMeanWeAlreadyCheckedThisGuy;
+static unsigned NextExpectedStringIndex;
+static unsigned NextExpectedCharIndex;
+
+void suiteSetUp(void)
+{
+    NextExpectedStringIndex = 0;
+    NextExpectedCharIndex = 0;
+}
+
+void setUp(void)
+{
+  SetToOneToFailInTearDown = 0;
+  SetToOneMeanWeAlreadyCheckedThisGuy = 0;
+}
+
+void tearDown(void)
+{
+  if (SetToOneToFailInTearDown == 1)
+    TEST_FAIL_MESSAGE("<= Failed in tearDown");
+  if ((SetToOneMeanWeAlreadyCheckedThisGuy == 0) && (Unity.CurrentTestFailed > 0))
+  {
+    UnityPrint(": [[[[ Test Should Have Passed But Did Not ]]]]");
+    UNITY_OUTPUT_CHAR('\n');
+  }
+}
+
+TEST_CASE(0)
+TEST_CASE(44)
+TEST_CASE((90)+9)
+void test_TheseShouldAllPass(int Num)
+{
+    TEST_ASSERT_TRUE(Num < 100);
+}
+
+TEST_CASE(3)
+TEST_CASE(77)
+TEST_CASE( (99) + 1 - (1))
+void test_TheseShouldAllFail(int Num)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_TRUE(Num > 100);
+    VERIFY_FAILS_END
+}
+
+TEST_CASE(1)
+TEST_CASE(44)
+TEST_CASE(99)
+TEST_CASE(98)
+void test_TheseAreEveryOther(int Num)
+{
+    if (Num & 1)
+    {
+        EXPECT_ABORT_BEGIN
+        TEST_ASSERT_TRUE(Num > 100);
+        VERIFY_FAILS_END
+    }
+    else
+    {
+        TEST_ASSERT_TRUE(Num < 100);
+    }
+}
+
+void test_NormalPassesStillWork(void)
+{
+    TEST_ASSERT_TRUE(1);
+}
+
+void test_NormalFailsStillWork(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_TRUE(0);
+    VERIFY_FAILS_END
+}
+
+TEST_CASE(0, "abc")
+TEST_CASE(1, "{")
+TEST_CASE(2, "}")
+TEST_CASE(3, ";")
+TEST_CASE(4, "\"quoted\"")
+void test_StringsArePreserved(unsigned index, const char * str)
+{
+    static const char * const expected[] =
+    {
+        "abc",
+        "{",
+        "}",
+        ";",
+        "\"quoted\""
+    };
+
+    /* Ensure that no test cases are skipped by tracking the next expected index */
+    TEST_ASSERT_EQUAL_UINT32(NextExpectedStringIndex, index);
+    TEST_ASSERT_LESS_THAN(sizeof(expected) / sizeof(expected[0]), index);
+    TEST_ASSERT_EQUAL_STRING(expected[index], str);
+
+    NextExpectedStringIndex++;
+}
+
+TEST_CASE(0, 'x')
+TEST_CASE(1, '{')
+TEST_CASE(2, '}')
+TEST_CASE(3, ';')
+TEST_CASE(4, '\'')
+TEST_CASE(5, '"')
+void test_CharsArePreserved(unsigned index, char c)
+{
+    static const char expected[] =
+    {
+        'x',
+        '{',
+        '}',
+        ';',
+        '\'',
+        '"'
+    };
+
+    /* Ensure that no test cases are skipped by tracking the next expected index */
+    TEST_ASSERT_EQUAL_UINT32(NextExpectedCharIndex, index);
+    TEST_ASSERT_LESS_THAN(sizeof(expected) / sizeof(expected[0]), index);
+    TEST_ASSERT_EQUAL(expected[index], c);
+
+    NextExpectedCharIndex++;
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_unity_strings.c b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_unity_strings.c
new file mode 100644
index 000000000..964c5536d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/test/tests/test_unity_strings.c
@@ -0,0 +1,329 @@
+/* ==========================================
+    Unity Project - A Test Framework for C
+    Copyright (c) 2007 Mike Karlesky, Mark VanderVoord, Greg Williams
+    [Released under MIT License. Please refer to license.txt for details]
+========================================== */
+
+#include "unity.h"
+#define TEST_INSTANCES
+#include "self_assessment_utils.h"
+
+static int SetToOneToFailInTearDown;
+static int SetToOneMeanWeAlreadyCheckedThisGuy;
+
+void setUp(void)
+{
+    SetToOneToFailInTearDown = 0;
+    SetToOneMeanWeAlreadyCheckedThisGuy = 0;
+}
+
+void tearDown(void)
+{
+    endPutcharSpy(); /* Stop suppressing test output */
+    if (SetToOneToFailInTearDown == 1)
+    {
+        /* These will be skipped internally if already failed/ignored */
+        TEST_FAIL_MESSAGE("<= Failed in tearDown");
+        TEST_IGNORE_MESSAGE("<= Ignored in tearDown");
+    }
+    if ((SetToOneMeanWeAlreadyCheckedThisGuy == 0) && (Unity.CurrentTestFailed > 0))
+    {
+        UnityPrint(": [[[[ Test Should Have Passed But Did Not ]]]]");
+        UNITY_OUTPUT_CHAR('\n');
+    }
+}
+
+void testEqualStrings(void)
+{
+    const char *testString = "foo";
+
+    TEST_ASSERT_EQUAL_STRING(testString, testString);
+    TEST_ASSERT_EQUAL_STRING_MESSAGE("foo", "foo", "foo isn't foo");
+    TEST_ASSERT_EQUAL_STRING("foo", testString);
+    TEST_ASSERT_EQUAL_STRING(testString, "foo");
+    TEST_ASSERT_EQUAL_STRING("", "");
+}
+
+void testEqualStringsLen(void)
+{
+    const char *testString = "foobar";
+    TEST_ASSERT_EQUAL_STRING_LEN(testString, testString, strlen(testString));
+    TEST_ASSERT_EQUAL_STRING_LEN_MESSAGE("foobar", "foobaz", 5, "fooba isn't fooba");
+    TEST_ASSERT_EQUAL_STRING_LEN("foo", testString, 3);
+    TEST_ASSERT_EQUAL_STRING_LEN(testString, "foo", 3);
+    TEST_ASSERT_EQUAL_STRING_LEN("", "", 3);
+}
+
+void testEqualStringsWithCarriageReturnsAndLineFeeds(void)
+{
+    const char *testString = "foo\r\nbar";
+
+    TEST_ASSERT_EQUAL_STRING(testString, testString);
+    TEST_ASSERT_EQUAL_STRING("foo\r\nbar", "foo\r\nbar");
+    TEST_ASSERT_EQUAL_STRING("foo\r\nbar", testString);
+    TEST_ASSERT_EQUAL_STRING(testString, "foo\r\nbar");
+    TEST_ASSERT_EQUAL_STRING("", "");
+}
+
+void testNotEqualString1(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_STRING("foo", "bar");
+    VERIFY_FAILS_END
+}
+
+void testNotEqualStringLen1(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_STRING_LEN("foobar", "foobaz", 6);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualString2(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_STRING("foo", "");
+    VERIFY_FAILS_END
+}
+
+void testNotEqualStringLen2(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_STRING_LEN("foo", "", 3);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualString3(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_STRING("", "bar");
+    VERIFY_FAILS_END
+}
+
+void testNotEqualStringLen3(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_STRING_LEN("", "bar", 3);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualString4(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_STRING("bar\r", "bar\n");
+    VERIFY_FAILS_END
+}
+
+void testNotEqualStringLen4(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_STRING_LEN("ba\r\x16", "ba\r\n", 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualString5(void)
+{
+    const char str1[] = { 0x41, 0x42, 0x03, 0x00 };
+    const char str2[] = { 0x41, 0x42, 0x04, 0x00 };
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_STRING(str1, str2);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualString_ExpectedStringIsNull(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_STRING(NULL, "bar");
+    VERIFY_FAILS_END
+}
+
+void testNotEqualStringLen_ExpectedStringIsNull(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_STRING_LEN(NULL, "bar", 1);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualString_ActualStringIsNull(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_STRING("foo", NULL);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualStringLen_ActualStringIsNull(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_STRING_LEN("foo", NULL, 1);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualString_ExpectedStringIsLonger(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_STRING("foo2", "foo");
+    VERIFY_FAILS_END
+}
+
+void testNotEqualString_ActualStringIsLonger(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_STRING("foo", "foo2");
+    VERIFY_FAILS_END
+}
+
+void testEqualStringArrays(void)
+{
+    const char *testStrings[] = { "foo", "boo", "woo", "moo" };
+    const char *expStrings[] = { "foo", "boo", "woo", "zoo" };
+
+    TEST_ASSERT_EQUAL_STRING_ARRAY(expStrings, expStrings, 3);
+    TEST_ASSERT_EQUAL_STRING_ARRAY(expStrings, testStrings, 3);
+    TEST_ASSERT_EQUAL_STRING_ARRAY(expStrings, testStrings, 2);
+    TEST_ASSERT_EQUAL_STRING_ARRAY(expStrings, testStrings, 1);
+}
+
+void testNotEqualStringArray1(void)
+{
+    const char *testStrings[] = { "foo", "boo", "woo", "moo" };
+    const char *expStrings[] = { "foo", "boo", "woo", "zoo" };
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_STRING_ARRAY(expStrings, testStrings, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualStringArray2(void)
+{
+    const char *testStrings[] = { "zoo", "boo", "woo", "moo" };
+    const char *expStrings[] = { "foo", "boo", "woo", "moo" };
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_STRING_ARRAY(expStrings, testStrings, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualStringArray3(void)
+{
+    const char *testStrings[] = { "foo", "boo", "woo", NULL };
+    const char *expStrings[] = { "foo", "boo", "woo", "zoo" };
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_STRING_ARRAY(expStrings, testStrings, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualStringArray4(void)
+{
+    const char *testStrings[] = { "foo", "boo", "woo", "moo" };
+    const char *expStrings[] = { "foo", NULL, "woo", "moo" };
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_STRING_ARRAY(expStrings, testStrings, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualStringArray5(void)
+{
+    const char **testStrings = NULL;
+    const char *expStrings[] = { "foo", "boo", "woo", "zoo" };
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_STRING_ARRAY(expStrings, testStrings, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualStringArray6(void)
+{
+    const char *testStrings[] = { "foo", "boo", "woo", "zoo" };
+    const char **expStrings = NULL;
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_STRING_ARRAY(expStrings, testStrings, 4);
+    VERIFY_FAILS_END
+}
+
+void testEqualStringArrayIfBothNulls(void)
+{
+    const char **testStrings = NULL;
+    const char **expStrings = NULL;
+
+    TEST_ASSERT_EQUAL_STRING_ARRAY(expStrings, testStrings, 4);
+}
+
+void testNotEqualStringArrayLengthZero(void)
+{
+    const char *testStrings[] = {NULL};
+    const char **expStrings = NULL;
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EQUAL_STRING_ARRAY(expStrings, testStrings, 0);
+    VERIFY_FAILS_END
+}
+
+void testEqualStringEachEqual(void)
+{
+    const char *testStrings1[] = { "foo", "foo", "foo", "foo" };
+    const char *testStrings2[] = { "boo", "boo", "boo", "zoo" };
+    const char *testStrings3[] = { "", "", "", "" };
+
+    TEST_ASSERT_EACH_EQUAL_STRING("foo", testStrings1, 4);
+    TEST_ASSERT_EACH_EQUAL_STRING("foo", testStrings1, 1);
+    TEST_ASSERT_EACH_EQUAL_STRING("boo", testStrings2, 3);
+    TEST_ASSERT_EACH_EQUAL_STRING("", testStrings3, 4);
+}
+
+void testNotEqualStringEachEqual1(void)
+{
+    const char *testStrings[] = { "foo", "foo", "foo", "moo" };
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_STRING("foo", testStrings, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualStringEachEqual2(void)
+{
+    const char *testStrings[] = { "boo", "foo", "foo", "foo" };
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_STRING("foo", testStrings, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualStringEachEqual3(void)
+{
+    const char *testStrings[] = { "foo", "foo", "foo", NULL };
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_STRING("foo", testStrings, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualStringEachEqual4(void)
+{
+    const char *testStrings[] = { "foo", "foo", "woo", "foo" };
+
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_STRING("foo", testStrings, 4);
+    VERIFY_FAILS_END
+}
+
+void testNotEqualStringEachEqual5(void)
+{
+    EXPECT_ABORT_BEGIN
+    TEST_ASSERT_EACH_EQUAL_STRING("foo", NULL, 1);
+    VERIFY_FAILS_END
+}
+
+void testCstringsEscapeSequence(void)
+{
+#ifndef USING_OUTPUT_SPY
+    TEST_IGNORE();
+#else
+    startPutcharSpy();
+    UnityPrint("\x16\x10");
+    endPutcharSpy();
+    TEST_ASSERT_EQUAL_STRING("\\x16\\x10", getBufferPutcharSpy());
+#endif
+}
diff --git a/FreeRTOS-Plus/Test/CMock/vendor/unity/unityConfig.cmake b/FreeRTOS-Plus/Test/CMock/vendor/unity/unityConfig.cmake
new file mode 100644
index 000000000..55410ccc8
--- /dev/null
+++ b/FreeRTOS-Plus/Test/CMock/vendor/unity/unityConfig.cmake
@@ -0,0 +1 @@
+include(${CMAKE_CURRENT_LIST_DIR}/unityTargets.cmake) 
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Config/FreeRTOSConfig.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Config/FreeRTOSConfig.h
new file mode 100644
index 000000000..1bb883130
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Config/FreeRTOSConfig.h
@@ -0,0 +1,219 @@
+/*
+ * FreeRTOS Kernel V10.3.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ * http://www.freertos.org/a00110.html
+ *
+ * The bottom of this file contains some constants specific to running the UDP
+ * stack in this demo.  Constants specific to FreeRTOS+TCP itself (rather than
+ * the demo) are contained in FreeRTOSIPConfig.h.
+ *----------------------------------------------------------*/
+#define configENABLE_BACKWARD_COMPATIBILITY		1
+#define configUSE_PREEMPTION					1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION	1
+#define configMAX_PRIORITIES					( 7 )
+#define configTICK_RATE_HZ						( 1000 ) /* In this non-real time simulated environment the tick frequency has to be at least a multiple of the Win32 tick frequency, and therefore very slow. */
+#define configMINIMAL_STACK_SIZE				( ( unsigned short ) 60 ) /* In this simulated case, the stack only has to hold one small structure as the real stack is part of the Win32 thread. */
+#define configTOTAL_HEAP_SIZE					( ( size_t ) ( 2048U * 1024U ) )
+#define configMAX_TASK_NAME_LEN					( 15 )
+#define configUSE_TRACE_FACILITY				1
+#define configUSE_16_BIT_TICKS					0
+#define configIDLE_SHOULD_YIELD					1
+#define configUSE_CO_ROUTINES 					0
+#define configUSE_MUTEXES						1
+#define configUSE_RECURSIVE_MUTEXES				1
+#define configQUEUE_REGISTRY_SIZE				0
+#define configUSE_APPLICATION_TASK_TAG			0
+#define configUSE_COUNTING_SEMAPHORES			1
+#define configUSE_ALTERNATIVE_API				0
+#define configNUM_THREAD_LOCAL_STORAGE_POINTERS	3 /* FreeRTOS+FAT requires 2 pointers if a CWD is supported. */
+
+/* Hook function related definitions. */
+#define configUSE_TICK_HOOK				0
+#define configUSE_IDLE_HOOK				1
+#define configUSE_MALLOC_FAILED_HOOK	0
+#define configCHECK_FOR_STACK_OVERFLOW	0 /* Not applicable to the Win32 port. */
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS				1
+#define configTIMER_TASK_PRIORITY		( configMAX_PRIORITIES - 1 )
+#define configTIMER_QUEUE_LENGTH		5
+#define configTIMER_TASK_STACK_DEPTH	( configMINIMAL_STACK_SIZE * 2 )
+
+/* Event group related definitions. */
+#define configUSE_EVENT_GROUPS			1
+
+/* Run time stats gathering definitions. */
+#define configGENERATE_RUN_TIME_STATS	0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES 			0
+#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet				1
+#define INCLUDE_uxTaskPriorityGet				1
+#define INCLUDE_vTaskDelete						1
+#define INCLUDE_vTaskCleanUpResources			0
+#define INCLUDE_vTaskSuspend					1
+#define INCLUDE_vTaskDelayUntil					1
+#define INCLUDE_vTaskDelay						1
+#define INCLUDE_uxTaskGetStackHighWaterMark		1
+#define INCLUDE_xTaskGetSchedulerState			1
+#define INCLUDE_xTimerGetTimerTaskHandle		0
+#define INCLUDE_xTaskGetIdleTaskHandle			0
+#define INCLUDE_xQueueGetMutexHolder			1
+#define INCLUDE_eTaskGetState					1
+#define INCLUDE_xEventGroupSetBitsFromISR		1
+#define INCLUDE_xTimerPendFunctionCall			1
+#define INCLUDE_pcTaskGetTaskName				1
+
+/* This demo makes use of one or more example stats formatting functions.  These
+format the raw data provided by the uxTaskGetSystemState() function in to human
+readable ASCII form.  See the notes in the implementation of vTaskList() within
+FreeRTOS/Source/tasks.c for limitations.  configUSE_STATS_FORMATTING_FUNCTIONS
+is set to 2 so the formatting functions are included without the stdio.h being
+included in tasks.c.  That is because this project defines its own sprintf()
+functions. */
+#define configUSE_STATS_FORMATTING_FUNCTIONS	1
+
+/* Assert call defined for debug builds. */
+#ifdef _DEBUG
+	extern void vAssertCalled( const char *pcFile, uint32_t ulLine );
+	#define configASSERT( x ) if( ( x ) == 0 ) vAssertCalled( __FILE__, __LINE__ )
+#endif /* _DEBUG */
+
+
+
+/* Application specific definitions follow. **********************************/
+
+/* If configINCLUDE_DEMO_DEBUG_STATS is set to one, then a few basic IP trace
+macros are defined to gather some UDP stack statistics that can then be viewed
+through the CLI interface. */
+#define configINCLUDE_DEMO_DEBUG_STATS 1
+
+/* The size of the global output buffer that is available for use when there
+are multiple command interpreters running at once (for example, one on a UART
+and one on TCP/IP).  This is done to prevent an output buffer being defined by
+each implementation - which would waste RAM.  In this case, there is only one
+command interpreter running, and it has its own local output buffer, so the
+global buffer is just set to be one byte long as it is not used and should not
+take up unnecessary RAM. */
+#define configCOMMAND_INT_MAX_OUTPUT_SIZE 1
+
+/* Only used when running in the FreeRTOS Windows simulator.  Defines the
+priority of the task used to simulate Ethernet interrupts. */
+#define configMAC_ISR_SIMULATOR_PRIORITY	( configMAX_PRIORITIES - 1 )
+
+/* This demo creates a virtual network connection by accessing the raw Ethernet
+or WiFi data to and from a real network connection.  Many computers have more
+than one real network port, and configNETWORK_INTERFACE_TO_USE is used to tell
+the demo which real port should be used to create the virtual port.  The ports
+available are displayed on the console when the application is executed.  For
+example, on my development laptop setting configNETWORK_INTERFACE_TO_USE to 4
+results in the wired network being used, while setting
+configNETWORK_INTERFACE_TO_USE to 2 results in the wireless network being
+used. */
+#define configNETWORK_INTERFACE_TO_USE 6L
+
+/* The address of an echo server that will be used by the two demo echo client
+tasks.
+http://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/TCP_Echo_Clients.html
+http://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/UDP_Echo_Clients.html */
+#define configECHO_SERVER_ADDR0	192
+#define configECHO_SERVER_ADDR1 168
+#define configECHO_SERVER_ADDR2 0
+#define configECHO_SERVER_ADDR3 11
+
+/* Default MAC address configuration.  The demo creates a virtual network
+connection that uses this MAC address by accessing the raw Ethernet/WiFi data
+to and from a real network connection on the host PC.  See the
+configNETWORK_INTERFACE_TO_USE definition above for information on how to
+configure the real network connection to use. */
+#define configMAC_ADDR0		0x00
+#define configMAC_ADDR1		0x11
+#define configMAC_ADDR2		0x22
+#define configMAC_ADDR3		0x33
+#define configMAC_ADDR4		0x44
+#define configMAC_ADDR5		0x41
+
+/* Default IP address configuration.  Used in ipconfigUSE_DNS is set to 0, or
+ipconfigUSE_DNS is set to 1 but a DNS server cannot be contacted. */
+#define configIP_ADDR0		10
+#define configIP_ADDR1		10
+#define configIP_ADDR2		10
+#define configIP_ADDR3		200
+
+/* Default gateway IP address configuration.  Used in ipconfigUSE_DNS is set to
+0, or ipconfigUSE_DNS is set to 1 but a DNS server cannot be contacted. */
+#define configGATEWAY_ADDR0	10
+#define configGATEWAY_ADDR1	10
+#define configGATEWAY_ADDR2	10
+#define configGATEWAY_ADDR3	1
+
+/* Default DNS server configuration.  OpenDNS addresses are 208.67.222.222 and
+208.67.220.220.  Used in ipconfigUSE_DNS is set to 0, or ipconfigUSE_DNS is set
+to 1 but a DNS server cannot be contacted.*/
+#define configDNS_SERVER_ADDR0 	208
+#define configDNS_SERVER_ADDR1 	67
+#define configDNS_SERVER_ADDR2 	222
+#define configDNS_SERVER_ADDR3 	222
+
+/* Default netmask configuration.  Used in ipconfigUSE_DNS is set to 0, or
+ipconfigUSE_DNS is set to 1 but a DNS server cannot be contacted. */
+#define configNET_MASK0		255
+#define configNET_MASK1		0
+#define configNET_MASK2		0
+#define configNET_MASK3		0
+
+/* The UDP port to which print messages are sent. */
+#define configPRINT_PORT	( 15000 )
+
+#if( defined( _MSC_VER ) && ( _MSC_VER <= 1600 ) && !defined( snprintf ) )
+	/* Map to Windows names. */
+	#define snprintf	_snprintf
+	#define vsnprintf	_vsnprintf
+#endif
+
+/* Visual studio does not have an implementation of strcasecmp(). */
+#define strcasecmp _stricmp
+#define strncasecmp _strnicmp
+#define strcmpi _strcmpi
+
+#endif /* FREERTOS_CONFIG_H */
+
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Config/FreeRTOSIPConfig.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Config/FreeRTOSIPConfig.h
new file mode 100644
index 000000000..79a9d5c33
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Config/FreeRTOSIPConfig.h
@@ -0,0 +1,310 @@
+/*
+ * FreeRTOS Kernel V10.3.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+/*****************************************************************************
+ *
+ * See the following URL for configuration information.
+ * http://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/TCP_IP_Configuration.html
+ *
+ *****************************************************************************/
+
+#ifndef FREERTOS_IP_CONFIG_H
+#define FREERTOS_IP_CONFIG_H
+
+#include <stdlib.h>
+
+/* Prototype for the function used to print out.  In this case it prints to the
+console before the network is connected then a UDP port after the network has
+connected. */
+extern void vLoggingPrintf( const char *pcFormatString, ... );
+
+/* Set to 1 to print out debug messages.  If ipconfigHAS_DEBUG_PRINTF is set to
+1 then FreeRTOS_debug_printf should be defined to the function used to print
+out the debugging messages. */
+#define ipconfigHAS_DEBUG_PRINTF	0
+#if( ipconfigHAS_DEBUG_PRINTF == 1 )
+	#define FreeRTOS_debug_printf(X)	vLoggingPrintf X
+#endif
+
+/* Set to 1 to print out non debugging messages, for example the output of the
+FreeRTOS_netstat() command, and ping replies.  If ipconfigHAS_PRINTF is set to 1
+then FreeRTOS_printf should be set to the function used to print out the
+messages. */
+#define ipconfigHAS_PRINTF			1
+#if( ipconfigHAS_PRINTF == 1 )
+	#define FreeRTOS_printf(X)			vLoggingPrintf X
+#endif
+
+/* Define the byte order of the target MCU (the MCU FreeRTOS+TCP is executing
+on).  Valid options are pdFREERTOS_BIG_ENDIAN and pdFREERTOS_LITTLE_ENDIAN. */
+#define ipconfigBYTE_ORDER pdFREERTOS_LITTLE_ENDIAN
+
+/* If the network card/driver includes checksum offloading (IP/TCP/UDP checksums)
+then set ipconfigDRIVER_INCLUDED_RX_IP_CHECKSUM to 1 to prevent the software
+stack repeating the checksum calculations. */
+#define ipconfigDRIVER_INCLUDED_RX_IP_CHECKSUM   1
+
+/* Several API's will block until the result is known, or the action has been
+performed, for example FreeRTOS_send() and FreeRTOS_recv().  The timeouts can be
+set per socket, using setsockopt().  If not set, the times below will be
+used as defaults. */
+#define ipconfigSOCK_DEFAULT_RECEIVE_BLOCK_TIME	( 5000 )
+#define	ipconfigSOCK_DEFAULT_SEND_BLOCK_TIME	( 5000 )
+
+/* Include support for LLMNR: Link-local Multicast Name Resolution
+(non-Microsoft) */
+#define ipconfigUSE_LLMNR					( 0 )
+
+/* Include support for NBNS: NetBIOS Name Service (Microsoft) */
+#define ipconfigUSE_NBNS					( 1 )
+
+/* Include support for DNS caching.  For TCP, having a small DNS cache is very
+useful.  When a cache is present, ipconfigDNS_REQUEST_ATTEMPTS can be kept low
+and also DNS may use small timeouts.  If a DNS reply comes in after the DNS
+socket has been destroyed, the result will be stored into the cache.  The next
+call to FreeRTOS_gethostbyname() will return immediately, without even creating
+a socket. */
+#define ipconfigUSE_DNS_CACHE				( 1 )
+#define ipconfigDNS_CACHE_NAME_LENGTH		( 254 )
+#define ipconfigDNS_CACHE_ENTRIES			( 4 )
+#define ipconfigDNS_CACHE_ADDRESSES_PER_ENTRY   ( 6 )
+#define ipconfigDNS_REQUEST_ATTEMPTS		( 2 )
+
+/* The IP stack executes it its own task (although any application task can make
+use of its services through the published sockets API). ipconfigUDP_TASK_PRIORITY
+sets the priority of the task that executes the IP stack.  The priority is a
+standard FreeRTOS task priority so can take any value from 0 (the lowest
+priority) to (configMAX_PRIORITIES - 1) (the highest priority).
+configMAX_PRIORITIES is a standard FreeRTOS configuration parameter defined in
+FreeRTOSConfig.h, not FreeRTOSIPConfig.h. Consideration needs to be given as to
+the priority assigned to the task executing the IP stack relative to the
+priority assigned to tasks that use the IP stack. */
+#define ipconfigIP_TASK_PRIORITY			( configMAX_PRIORITIES - 2 )
+
+/* The size, in words (not bytes), of the stack allocated to the FreeRTOS+TCP
+task.  This setting is less important when the FreeRTOS Win32 simulator is used
+as the Win32 simulator only stores a fixed amount of information on the task
+stack.  FreeRTOS includes optional stack overflow detection, see:
+http://www.freertos.org/Stacks-and-stack-overflow-checking.html */
+#define ipconfigIP_TASK_STACK_SIZE_WORDS	( configMINIMAL_STACK_SIZE * 5 )
+
+/* ipconfigRAND32() is called by the IP stack to generate random numbers for
+things such as a DHCP transaction number or initial sequence number.  Random
+number generation is performed via this macro to allow applications to use their
+own random number generation method.  For example, it might be possible to
+generate a random number by sampling noise on an analogue input. */
+//extern UBaseType_t rand();
+#define ipconfigRAND32()	rand()
+
+/* If ipconfigUSE_NETWORK_EVENT_HOOK is set to 1 then FreeRTOS+TCP will call the
+network event hook at the appropriate times.  If ipconfigUSE_NETWORK_EVENT_HOOK
+is not set to 1 then the network event hook will never be called.  See
+http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_UDP/API/vApplicationIPNetworkEventHook.shtml
+*/
+#define ipconfigUSE_NETWORK_EVENT_HOOK 1
+
+/* Sockets have a send block time attribute.  If FreeRTOS_sendto() is called but
+a network buffer cannot be obtained then the calling task is held in the Blocked
+state (so other tasks can continue to executed) until either a network buffer
+becomes available or the send block time expires.  If the send block time expires
+then the send operation is aborted.  The maximum allowable send block time is
+capped to the value set by ipconfigMAX_SEND_BLOCK_TIME_TICKS.  Capping the
+maximum allowable send block time prevents prevents a deadlock occurring when
+all the network buffers are in use and the tasks that process (and subsequently
+free) the network buffers are themselves blocked waiting for a network buffer.
+ipconfigMAX_SEND_BLOCK_TIME_TICKS is specified in RTOS ticks.  A time in
+milliseconds can be converted to a time in ticks by dividing the time in
+milliseconds by portTICK_PERIOD_MS. */
+#define ipconfigUDP_MAX_SEND_BLOCK_TIME_TICKS ( 5000U / portTICK_PERIOD_MS )
+
+/* If ipconfigUSE_DHCP is 1 then FreeRTOS+TCP will attempt to retrieve an IP
+address, netmask, DNS server address and gateway address from a DHCP server.  If
+ipconfigUSE_DHCP is 0 then FreeRTOS+TCP will use a static IP address.  The
+stack will revert to using the static IP address even when ipconfigUSE_DHCP is
+set to 1 if a valid configuration cannot be obtained from a DHCP server for any
+reason.  The static configuration used is that passed into the stack by the
+FreeRTOS_IPInit() function call. */
+#define ipconfigUSE_DHCP	1
+
+/* When ipconfigUSE_DHCP is set to 1, DHCP requests will be sent out at
+increasing time intervals until either a reply is received from a DHCP server
+and accepted, or the interval between transmissions reaches
+ipconfigMAXIMUM_DISCOVER_TX_PERIOD.  The IP stack will revert to using the
+static IP address passed as a parameter to FreeRTOS_IPInit() if the
+re-transmission time interval reaches ipconfigMAXIMUM_DISCOVER_TX_PERIOD without
+a DHCP reply being received. */
+#define ipconfigMAXIMUM_DISCOVER_TX_PERIOD		( 120000U / portTICK_PERIOD_MS )
+
+/* The ARP cache is a table that maps IP addresses to MAC addresses.  The IP
+stack can only send a UDP message to a remove IP address if it knowns the MAC
+address associated with the IP address, or the MAC address of the router used to
+contact the remote IP address.  When a UDP message is received from a remote IP
+address the MAC address and IP address are added to the ARP cache.  When a UDP
+message is sent to a remote IP address that does not already appear in the ARP
+cache then the UDP message is replaced by a ARP message that solicits the
+required MAC address information.  ipconfigARP_CACHE_ENTRIES defines the maximum
+number of entries that can exist in the ARP table at any one time. */
+#define ipconfigARP_CACHE_ENTRIES		6
+
+/* ARP requests that do not result in an ARP response will be re-transmitted a
+maximum of ipconfigMAX_ARP_RETRANSMISSIONS times before the ARP request is
+aborted. */
+#define ipconfigMAX_ARP_RETRANSMISSIONS ( 5 )
+
+/* ipconfigMAX_ARP_AGE defines the maximum time between an entry in the ARP
+table being created or refreshed and the entry being removed because it is stale.
+New ARP requests are sent for ARP cache entries that are nearing their maximum
+age.  ipconfigMAX_ARP_AGE is specified in tens of seconds, so a value of 150 is
+equal to 1500 seconds (or 25 minutes). */
+#define ipconfigMAX_ARP_AGE			150
+
+/* Implementing FreeRTOS_inet_addr() necessitates the use of string handling
+routines, which are relatively large.  To save code space the full
+FreeRTOS_inet_addr() implementation is made optional, and a smaller and faster
+alternative called FreeRTOS_inet_addr_quick() is provided.  FreeRTOS_inet_addr()
+takes an IP in decimal dot format (for example, "192.168.0.1") as its parameter.
+FreeRTOS_inet_addr_quick() takes an IP address as four separate numerical octets
+(for example, 192, 168, 0, 1) as its parameters.  If
+ipconfigINCLUDE_FULL_INET_ADDR is set to 1 then both FreeRTOS_inet_addr() and
+FreeRTOS_indet_addr_quick() are available.  If ipconfigINCLUDE_FULL_INET_ADDR is
+not set to 1 then only FreeRTOS_indet_addr_quick() is available. */
+#define ipconfigINCLUDE_FULL_INET_ADDR	1
+
+/* ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS defines the total number of network buffer that
+are available to the IP stack.  The total number of network buffers is limited
+to ensure the total amount of RAM that can be consumed by the IP stack is capped
+to a pre-determinable value. */
+#define ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS		60
+
+/* A FreeRTOS queue is used to send events from application tasks to the IP
+stack.  ipconfigEVENT_QUEUE_LENGTH sets the maximum number of events that can
+be queued for processing at any one time.  The event queue must be a minimum of
+5 greater than the total number of network buffers. */
+#define ipconfigEVENT_QUEUE_LENGTH		( ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS + 5 )
+
+/* The address of a socket is the combination of its IP address and its port
+number.  FreeRTOS_bind() is used to manually allocate a port number to a socket
+(to 'bind' the socket to a port), but manual binding is not normally necessary
+for client sockets (those sockets that initiate outgoing connections rather than
+wait for incoming connections on a known port number).  If
+ipconfigALLOW_SOCKET_SEND_WITHOUT_BIND is set to 1 then calling
+FreeRTOS_sendto() on a socket that has not yet been bound will result in the IP
+stack automatically binding the socket to a port number from the range
+socketAUTO_PORT_ALLOCATION_START_NUMBER to 0xffff.  If
+ipconfigALLOW_SOCKET_SEND_WITHOUT_BIND is set to 0 then calling FreeRTOS_sendto()
+on a socket that has not yet been bound will result in the send operation being
+aborted. */
+#define ipconfigALLOW_SOCKET_SEND_WITHOUT_BIND 1
+
+/* Defines the Time To Live (TTL) values used in outgoing UDP packets. */
+#define ipconfigUDP_TIME_TO_LIVE		128
+#define ipconfigTCP_TIME_TO_LIVE		128 /* also defined in FreeRTOSIPConfigDefaults.h */
+
+/* USE_TCP: Use TCP and all its features */
+#define ipconfigUSE_TCP				( 1 )
+
+/* USE_WIN: Let TCP use windowing mechanism. */
+#define ipconfigUSE_TCP_WIN			( 1 )
+
+/* The MTU is the maximum number of bytes the payload of a network frame can
+contain.  For normal Ethernet V2 frames the maximum MTU is 1500.  Setting a
+lower value can save RAM, depending on the buffer management scheme used.  If
+ipconfigCAN_FRAGMENT_OUTGOING_PACKETS is 1 then (ipconfigNETWORK_MTU - 28) must
+be divisible by 8. */
+#define ipconfigNETWORK_MTU		1200U
+
+/* Set ipconfigUSE_DNS to 1 to include a basic DNS client/resolver.  DNS is used
+through the FreeRTOS_gethostbyname() API function. */
+#define ipconfigUSE_DNS			1
+
+/* If ipconfigREPLY_TO_INCOMING_PINGS is set to 1 then the IP stack will
+generate replies to incoming ICMP echo (ping) requests. */
+#define ipconfigREPLY_TO_INCOMING_PINGS				1
+
+/* If ipconfigSUPPORT_OUTGOING_PINGS is set to 1 then the
+FreeRTOS_SendPingRequest() API function is available. */
+#define ipconfigSUPPORT_OUTGOING_PINGS				0
+
+/* If ipconfigSUPPORT_SELECT_FUNCTION is set to 1 then the FreeRTOS_select()
+(and associated) API function is available. */
+#define ipconfigSUPPORT_SELECT_FUNCTION				1
+
+/* If ipconfigFILTER_OUT_NON_ETHERNET_II_FRAMES is set to 1 then Ethernet frames
+that are not in Ethernet II format will be dropped.  This option is included for
+potential future IP stack developments. */
+#define ipconfigFILTER_OUT_NON_ETHERNET_II_FRAMES  1
+
+/* If ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES is set to 1 then it is the
+responsibility of the Ethernet interface to filter out packets that are of no
+interest.  If the Ethernet interface does not implement this functionality, then
+set ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES to 0 to have the IP stack
+perform the filtering instead (it is much less efficient for the stack to do it
+because the packet will already have been passed into the stack).  If the
+Ethernet driver does all the necessary filtering in hardware then software
+filtering can be removed by using a value other than 1 or 0. */
+#define ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES	1
+
+/* The windows simulator cannot really simulate MAC interrupts, and needs to
+block occasionally to allow other tasks to run. */
+#define configWINDOWS_MAC_INTERRUPT_SIMULATOR_DELAY ( 20 / portTICK_PERIOD_MS )
+
+/* Advanced only: in order to access 32-bit fields in the IP packets with
+32-bit memory instructions, all packets will be stored 32-bit-aligned, plus 16-bits.
+This has to do with the contents of the IP-packets: all 32-bit fields are
+32-bit-aligned, plus 16-bit(!) */
+#define ipconfigPACKET_FILLER_SIZE 2U
+
+/* Define the size of the pool of TCP window descriptors.  On the average, each
+TCP socket will use up to 2 x 6 descriptors, meaning that it can have 2 x 6
+outstanding packets (for Rx and Tx).  When using up to 10 TP sockets
+simultaneously, one could define TCP_WIN_SEG_COUNT as 120. */
+#define ipconfigTCP_WIN_SEG_COUNT		240
+
+/* Each TCP socket has a circular buffers for Rx and Tx, which have a fixed
+maximum size.  Define the size of Rx buffer for TCP sockets. */
+#define ipconfigTCP_RX_BUFFER_LENGTH			( 1000 )
+
+/* Define the size of Tx buffer for TCP sockets. */
+#define ipconfigTCP_TX_BUFFER_LENGTH			( 1000 )
+
+/* When using call-back handlers, the driver may check if the handler points to
+real program memory (RAM or flash) or just has a random non-zero value. */
+#define ipconfigIS_VALID_PROG_ADDRESS(x) ( (x) != NULL )
+
+/* Include support for TCP hang protection.  All sockets in a connecting or
+disconnecting stage will timeout after a period of non-activity. */
+#define ipconfigTCP_HANG_PROTECTION			( 1 )
+#define ipconfigTCP_HANG_PROTECTION_TIME	( 30 )
+
+/* Include support for TCP keep-alive messages. */
+#define ipconfigTCP_KEEP_ALIVE				( 1 )
+#define ipconfigTCP_KEEP_ALIVE_INTERVAL		( 20 ) /* in seconds */
+
+#define portINLINE __inline
+
+#endif /* FREERTOS_IP_CONFIG_H */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Full-TCP-Networkless.sln b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Full-TCP-Networkless.sln
new file mode 100644
index 000000000..f907d968a
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Full-TCP-Networkless.sln
@@ -0,0 +1,23 @@
+
+Microsoft Visual Studio Solution File, Format Version 11.00
+# Visual Studio 2010
+Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "RTOSDemo", "WIN32.vcxproj", "{C686325E-3261-42F7-AEB1-DDE5280E1CEB}"
+EndProject
+Global
+	GlobalSection(TestCaseManagementSettings) = postSolution
+		CategoryFile = FreeRTOS_Plus_TCP_Minimal.vsmdi
+	EndGlobalSection
+	GlobalSection(SolutionConfigurationPlatforms) = preSolution
+		Debug|Win32 = Debug|Win32
+		Release|Win32 = Release|Win32
+	EndGlobalSection
+	GlobalSection(ProjectConfigurationPlatforms) = postSolution
+		{C686325E-3261-42F7-AEB1-DDE5280E1CEB}.Debug|Win32.ActiveCfg = Debug|Win32
+		{C686325E-3261-42F7-AEB1-DDE5280E1CEB}.Debug|Win32.Build.0 = Debug|Win32
+		{C686325E-3261-42F7-AEB1-DDE5280E1CEB}.Release|Win32.ActiveCfg = Release|Win32
+		{C686325E-3261-42F7-AEB1-DDE5280E1CEB}.Release|Win32.Build.0 = Release|Win32
+	EndGlobalSection
+	GlobalSection(SolutionProperties) = preSolution
+		HideSolutionNode = FALSE
+	EndGlobalSection
+EndGlobal
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Logging/demo_logging.c b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Logging/demo_logging.c
new file mode 100644
index 000000000..0d33b0968
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Logging/demo_logging.c
@@ -0,0 +1,526 @@
+/*
+ * FreeRTOS Kernel V10.3.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+/*
+ * Logging utility that allows FreeRTOS tasks to log to a UDP port, stdout, and
+ * disk file without making any Win32 system calls themselves.
+ *
+ * Messages logged to a UDP port are sent directly (using FreeRTOS+TCP), but as
+ * FreeRTOS tasks cannot make Win32 system calls messages sent to stdout or a
+ * disk file are sent via a stream buffer to a Win32 thread which then performs
+ * the actual output.
+ */
+
+/* Standard includes. */
+#include <stdio.h>
+#include <stdint.h>
+#include <stdarg.h>
+#include <io.h>
+#include <ctype.h>
+
+/* FreeRTOS includes. */
+#include <FreeRTOS.h>
+#include "task.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_Sockets.h"
+#include "FreeRTOS_Stream_Buffer.h"
+
+/* Demo includes. */
+#include "demo_logging.h"
+
+/*-----------------------------------------------------------*/
+
+/* The maximum size to which the log file may grow, before being renamed
+to .ful. */
+#define dlLOGGING_FILE_SIZE		( 40ul * 1024ul * 1024ul )
+
+/* Dimensions the arrays into which print messages are created. */
+#define dlMAX_PRINT_STRING_LENGTH	255
+
+/* The size of the stream buffer used to pass messages from FreeRTOS tasks to
+the Win32 thread that is responsible for making any Win32 system calls that are
+necessary for the selected logging method. */
+#define dlLOGGING_STREAM_BUFFER_SIZE  32768
+
+/* A block time of zero simply means don't block. */
+#define dlDONT_BLOCK	0
+
+/*-----------------------------------------------------------*/
+
+/*
+ * Called from vLoggingInit() to start a new disk log file.
+ */
+static void prvFileLoggingInit( void );
+
+/*
+ * Attempt to write a message to the file.
+ */
+static void prvLogToFile( const char *pcMessage, size_t xLength );
+
+/*
+ * Simply close the logging file, if it is open.
+ */
+static void prvFileClose( void );
+
+/*
+ * Before the scheduler is started this function is called directly.  After the
+ * scheduler has started it is called from the Windows thread dedicated to
+ * outputting log messages.  Only the windows thread actually performs the
+ * writing so as not to disrupt the simulation by making Windows system calls
+ * from FreeRTOS tasks.
+ */
+static void prvLoggingFlushBuffer( void );
+
+/*
+ * The windows thread that performs the actual writing of messages that require
+ * Win32 system calls.  Only the windows thread can make system calls so as not
+ * to disrupt the simulation by making Windows calls from FreeRTOS tasks.
+ */
+static DWORD WINAPI prvWin32LoggingThread( void *pvParam );
+
+/*
+ * Creates the socket to which UDP messages are sent.  This function is not
+ * called directly to prevent the print socket being created from within the IP
+ * task - which could result in a deadlock.  Instead the function call is
+ * deferred to run in the RTOS daemon task - hence it prototype.
+ */
+static void prvCreatePrintSocket( void *pvParameter1, uint32_t ulParameter2 );
+
+/*-----------------------------------------------------------*/
+
+/* Windows event used to wake the Win32 thread which performs any logging that
+needs Win32 system calls. */
+static void *pvLoggingThreadEvent = NULL;
+
+/* Stores the selected logging targets passed in as parameters to the
+vLoggingInit() function. */
+BaseType_t xStdoutLoggingUsed = pdFALSE, xDiskFileLoggingUsed = pdFALSE, xUDPLoggingUsed = pdFALSE;
+
+/* Circular buffer used to pass messages from the FreeRTOS tasks to the Win32
+thread that is responsible for making Win32 calls (when stdout or a disk log is
+used). */
+static StreamBuffer_t *xLogStreamBuffer = NULL;
+
+/* Handle to the file used for logging.  This is left open while there are
+messages waiting to be logged, then closed again in between logs. */
+static FILE *pxLoggingFileHandle = NULL;
+
+/* When true prints are performed directly.  After start up xDirectPrint is set
+to pdFALSE - at which time prints that require Win32 system calls are done by
+the Win32 thread responsible for logging. */
+BaseType_t xDirectPrint = pdTRUE;
+
+/* File names for the in use and complete (full) log files. */
+static const char *pcLogFileName = "RTOSDemo.log";
+static const char *pcFullLogFileName = "RTOSDemo.ful";
+
+/* Keep the current file size in a variable, as an optimisation. */
+static size_t ulSizeOfLoggingFile = 0ul;
+
+/* The UDP socket and address on/to which print messages are sent. */
+Socket_t xPrintSocket = FREERTOS_INVALID_SOCKET;
+struct freertos_sockaddr xPrintUDPAddress;
+
+/*-----------------------------------------------------------*/
+
+void vLoggingInit( BaseType_t xLogToStdout, BaseType_t xLogToFile, BaseType_t xLogToUDP, uint32_t ulRemoteIPAddress, uint16_t usRemotePort )
+{
+	/* Can only be called before the scheduler has started. */
+	configASSERT( xTaskGetSchedulerState() == taskSCHEDULER_NOT_STARTED );
+
+	#if( ( ipconfigHAS_DEBUG_PRINTF == 1 ) || ( ipconfigHAS_PRINTF == 1 ) )
+	{
+		HANDLE Win32Thread;
+
+		/* Record which output methods are to be used. */
+		xStdoutLoggingUsed = xLogToStdout;
+		xDiskFileLoggingUsed = xLogToFile;
+		xUDPLoggingUsed = xLogToUDP;
+
+		/* If a disk file is used then initialise it now. */
+		if( xDiskFileLoggingUsed != pdFALSE )
+		{
+			prvFileLoggingInit();
+		}
+
+		/* If UDP logging is used then store the address to which the log data
+		will be sent - but don't create the socket yet because the network is
+		not initialised. */
+		if( xUDPLoggingUsed != pdFALSE )
+		{
+			/* Set the address to which the print messages are sent. */
+			xPrintUDPAddress.sin_port = FreeRTOS_htons( usRemotePort );
+			xPrintUDPAddress.sin_addr = ulRemoteIPAddress;
+		}
+
+		/* If a disk file or stdout are to be used then Win32 system calls will
+		have to be made.  Such system calls cannot be made from FreeRTOS tasks
+		so create a stream buffer to pass the messages to a Win32 thread, then
+		create the thread itself, along with a Win32 event that can be used to
+		unblock the thread. */
+		if( ( xStdoutLoggingUsed != pdFALSE ) || ( xDiskFileLoggingUsed != pdFALSE ) )
+		{
+			/* Create the buffer. */
+			xLogStreamBuffer = ( StreamBuffer_t * ) malloc( sizeof( *xLogStreamBuffer ) - sizeof( xLogStreamBuffer->ucArray ) + dlLOGGING_STREAM_BUFFER_SIZE + 1 );
+			configASSERT( xLogStreamBuffer );
+			memset( xLogStreamBuffer, '\0', sizeof( *xLogStreamBuffer ) - sizeof( xLogStreamBuffer->ucArray ) );
+			xLogStreamBuffer->LENGTH = dlLOGGING_STREAM_BUFFER_SIZE + 1;
+
+			/* Create the Windows event. */
+			pvLoggingThreadEvent = CreateEvent( NULL, FALSE, TRUE, "StdoutLoggingEvent" );
+
+			/* Create the thread itself. */
+			Win32Thread = CreateThread(
+				NULL,	/* Pointer to thread security attributes. */
+				0,		/* Initial thread stack size, in bytes. */
+				prvWin32LoggingThread,	/* Pointer to thread function. */
+				NULL,	/* Argument for new thread. */
+				0,		/* Creation flags. */
+				NULL );
+
+			/* Use the cores that are not used by the FreeRTOS tasks. */
+			SetThreadAffinityMask( Win32Thread, ~0x01u );
+			SetThreadPriorityBoost( Win32Thread, TRUE );
+			SetThreadPriority( Win32Thread, THREAD_PRIORITY_IDLE );
+		}
+	}
+	#else
+	{
+		/* FreeRTOSIPConfig is set such that no print messages will be output.
+		Avoid compiler warnings about unused parameters. */
+		( void ) xLogToStdout;
+		( void ) xLogToFile;
+		( void ) xLogToUDP;
+		( void ) usRemotePort;
+		( void ) ulRemoteIPAddress;
+	}
+	#endif /* ( ipconfigHAS_DEBUG_PRINTF == 1 ) || ( ipconfigHAS_PRINTF == 1 )  */
+}
+/*-----------------------------------------------------------*/
+
+static void prvCreatePrintSocket( void *pvParameter1, uint32_t ulParameter2 )
+{
+static const TickType_t xSendTimeOut = pdMS_TO_TICKS( 0 );
+Socket_t xSocket;
+
+	/* The function prototype is that of a deferred function, but the parameters
+	are not actually used. */
+	( void ) pvParameter1;
+	( void ) ulParameter2;
+
+	xSocket = FreeRTOS_socket( FREERTOS_AF_INET, FREERTOS_SOCK_DGRAM, FREERTOS_IPPROTO_UDP );
+
+	if( xSocket != FREERTOS_INVALID_SOCKET )
+	{
+		/* FreeRTOS+TCP decides which port to bind to. */
+		FreeRTOS_setsockopt( xSocket, 0, FREERTOS_SO_SNDTIMEO, &xSendTimeOut, sizeof( xSendTimeOut ) );
+		FreeRTOS_bind( xSocket, NULL, 0 );
+
+		/* Now the socket is bound it can be assigned to the print socket. */
+		xPrintSocket = xSocket;
+	}
+}
+/*-----------------------------------------------------------*/
+
+void vLoggingPrintf( const char *pcFormat, ... )
+{
+char cPrintString[ dlMAX_PRINT_STRING_LENGTH ];
+char cOutputString[ dlMAX_PRINT_STRING_LENGTH ];
+char *pcSource, *pcTarget, *pcBegin;
+size_t xLength, xLength2, rc;
+static BaseType_t xMessageNumber = 0;
+va_list args;
+uint32_t ulIPAddress;
+const char *pcTaskName;
+const char *pcNoTask = "None";
+int iOriginalPriority;
+HANDLE xCurrentTask;
+
+
+	if( ( xStdoutLoggingUsed != pdFALSE ) || ( xDiskFileLoggingUsed != pdFALSE ) || ( xUDPLoggingUsed != pdFALSE ) )
+	{
+		/* There are a variable number of parameters. */
+		va_start( args, pcFormat );
+
+		/* Additional info to place at the start of the log. */
+		if( xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED )
+		{
+			pcTaskName = pcTaskGetName( NULL );
+		}
+		else
+		{
+			pcTaskName = pcNoTask;
+		}
+
+		if( strcmp( pcFormat, "\n" ) != 0 )
+		{
+			xLength = snprintf( cPrintString, dlMAX_PRINT_STRING_LENGTH, "%lu %lu [%s] ",
+				xMessageNumber++,
+				( unsigned long ) xTaskGetTickCount(),
+				pcTaskName );
+		}
+		else
+		{
+			xLength = 0;
+			memset( cPrintString, 0x00, dlMAX_PRINT_STRING_LENGTH );
+		}
+
+		xLength2 = vsnprintf( cPrintString + xLength, dlMAX_PRINT_STRING_LENGTH - xLength, pcFormat, args );
+
+		if( xLength2 <  0 )
+		{
+			/* Clean up. */
+			xLength2 = dlMAX_PRINT_STRING_LENGTH - 1 - xLength;
+			cPrintString[ dlMAX_PRINT_STRING_LENGTH - 1 ] = '\0';
+		}
+
+		xLength += xLength2;
+		va_end( args );
+
+		/* For ease of viewing, copy the string into another buffer, converting
+		IP addresses to dot notation on the way. */
+		pcSource = cPrintString;
+		pcTarget = cOutputString;
+
+		while( ( *pcSource ) != '\0' )
+		{
+			*pcTarget = *pcSource;
+			pcTarget++;
+			pcSource++;
+
+			/* Look forward for an IP address denoted by 'ip'. */
+			if( ( isxdigit( pcSource[ 0 ] ) != pdFALSE ) && ( pcSource[ 1 ] == 'i' ) && ( pcSource[ 2 ] == 'p' ) )
+			{
+				*pcTarget = *pcSource;
+				pcTarget++;
+				*pcTarget = '\0';
+				pcBegin = pcTarget - 8;
+
+				while( ( pcTarget > pcBegin ) && ( isxdigit( pcTarget[ -1 ] ) != pdFALSE ) )
+				{
+					pcTarget--;
+				}
+
+				sscanf( pcTarget, "%8X", &ulIPAddress );
+				rc = sprintf( pcTarget, "%lu.%lu.%lu.%lu",
+					( unsigned long ) ( ulIPAddress >> 24UL ),
+					( unsigned long ) ( (ulIPAddress >> 16UL) & 0xffUL ),
+					( unsigned long ) ( (ulIPAddress >> 8UL) & 0xffUL ),
+					( unsigned long ) ( ulIPAddress & 0xffUL ) );
+				pcTarget += rc;
+				pcSource += 3; /* skip "<n>ip" */
+			}
+		}
+
+		/* How far through the buffer was written? */
+		xLength = ( BaseType_t ) ( pcTarget - cOutputString );
+
+		/* If the message is to be logged to a UDP port then it can be sent directly
+		because it only uses FreeRTOS function (not Win32 functions). */
+		if( xUDPLoggingUsed != pdFALSE )
+		{
+			if( ( xPrintSocket == FREERTOS_INVALID_SOCKET ) && ( FreeRTOS_IsNetworkUp() != pdFALSE ) )
+			{
+				/* Create and bind the socket to which print messages are sent.  The
+				xTimerPendFunctionCall() function is used even though this is
+				not an interrupt because this function is called from the IP task
+				and the	IP task cannot itself wait for a socket to bind.  The
+				parameters to prvCreatePrintSocket() are not required so set to
+				NULL or 0. */
+				xTimerPendFunctionCall( prvCreatePrintSocket, NULL, 0, dlDONT_BLOCK );
+			}
+
+			if( xPrintSocket != FREERTOS_INVALID_SOCKET )
+			{
+				FreeRTOS_sendto( xPrintSocket, cOutputString, xLength, 0, &xPrintUDPAddress, sizeof( xPrintUDPAddress ) );
+
+				/* Just because the UDP data logger I'm using is dumb. */
+				FreeRTOS_sendto( xPrintSocket, "\r", sizeof( char ), 0, &xPrintUDPAddress, sizeof( xPrintUDPAddress ) );
+			}
+		}
+
+		/* If logging is also to go to either stdout or a disk file then it cannot
+		be output here - so instead write the message to the stream buffer and wake
+		the Win32 thread which will read it from the stream buffer and perform the
+		actual output. */
+		if( ( xStdoutLoggingUsed != pdFALSE ) || ( xDiskFileLoggingUsed != pdFALSE ) )
+		{
+			configASSERT( xLogStreamBuffer );
+
+			/* How much space is in the buffer? */
+			xLength2 = uxStreamBufferGetSpace( xLogStreamBuffer );
+
+			/* There must be enough space to write both the string and the length of
+			the string. */
+			if( xLength2 >= ( xLength + sizeof( xLength ) ) )
+			{
+				/* First write in the length of the data, then write in the data
+				itself.  Raising the thread priority is used as a critical section
+				as there are potentially multiple writers.  The stream buffer is
+				only thread safe when there is a single writer (likewise for
+				reading from the buffer). */
+				xCurrentTask = GetCurrentThread();
+				iOriginalPriority = GetThreadPriority( xCurrentTask );
+				SetThreadPriority( GetCurrentThread(), THREAD_PRIORITY_TIME_CRITICAL );
+				uxStreamBufferAdd( xLogStreamBuffer, 0, ( const uint8_t * ) &( xLength ), sizeof( xLength ) );
+				uxStreamBufferAdd( xLogStreamBuffer, 0, ( const uint8_t * ) cOutputString, xLength );
+				SetThreadPriority( GetCurrentThread(), iOriginalPriority );
+			}
+
+			/* xDirectPrint is initialised to pdTRUE, and while it remains true the
+			logging output function is called directly.  When the system is running
+			the output function cannot be called directly because it would get
+			called from both FreeRTOS tasks and Win32 threads - so instead wake the
+			Win32 thread responsible for the actual output. */
+			if( xDirectPrint != pdFALSE )
+			{
+				/* While starting up, the thread which calls prvWin32LoggingThread()
+				is not running yet and xDirectPrint will be pdTRUE. */
+				prvLoggingFlushBuffer();
+			}
+			else if( pvLoggingThreadEvent != NULL )
+			{
+				/* While running, wake up prvWin32LoggingThread() to send the
+				logging data. */
+				SetEvent( pvLoggingThreadEvent );
+			}
+		}
+	}
+}
+/*-----------------------------------------------------------*/
+
+static void prvLoggingFlushBuffer( void )
+{
+size_t xLength;
+char cPrintString[ dlMAX_PRINT_STRING_LENGTH ];
+
+	/* Is there more than the length value stored in the circular buffer
+	used to pass data from the FreeRTOS simulator into this Win32 thread? */
+	while( uxStreamBufferGetSize( xLogStreamBuffer ) > sizeof( xLength ) )
+	{
+		memset( cPrintString, 0x00, dlMAX_PRINT_STRING_LENGTH );
+		uxStreamBufferGet( xLogStreamBuffer, 0, ( uint8_t * ) &xLength, sizeof( xLength ), pdFALSE );
+		uxStreamBufferGet( xLogStreamBuffer, 0, ( uint8_t * ) cPrintString, xLength, pdFALSE );
+
+		/* Write the message to standard out if requested to do so when
+		vLoggingInit() was called, or if the network is not yet up. */
+		if( ( xStdoutLoggingUsed != pdFALSE ) || ( FreeRTOS_IsNetworkUp() == pdFALSE ) )
+		{
+			/* Write the message to stdout. */
+			printf( "%s", cPrintString ); /*_RB_ Replace with _write(). */
+		}
+
+		/* Write the message to a file if requested to do so when
+		vLoggingInit() was called. */
+		if( xDiskFileLoggingUsed != pdFALSE )
+		{
+			prvLogToFile( cPrintString, xLength );
+		}
+	}
+
+	prvFileClose();
+}
+/*-----------------------------------------------------------*/
+
+static DWORD WINAPI prvWin32LoggingThread( void *pvParameter )
+{
+const DWORD xMaxWait = 1000;
+
+	( void ) pvParameter;
+
+	/* From now on, prvLoggingFlushBuffer() will only be called from this
+	Windows thread */
+	xDirectPrint = pdFALSE;
+
+	for( ;; )
+	{
+		/* Wait to be told there are message waiting to be logged. */
+		WaitForSingleObject( pvLoggingThreadEvent, xMaxWait );
+
+		/* Write out all waiting messages. */
+		prvLoggingFlushBuffer();
+	}
+}
+/*-----------------------------------------------------------*/
+
+static void prvFileLoggingInit( void )
+{
+FILE *pxHandle = fopen( pcLogFileName, "a" );
+
+	if( pxHandle != NULL )
+	{
+		fseek( pxHandle, SEEK_END, 0ul );
+		ulSizeOfLoggingFile = ftell( pxHandle );
+		fclose( pxHandle );
+	}
+	else
+	{
+		ulSizeOfLoggingFile = 0ul;
+	}
+}
+/*-----------------------------------------------------------*/
+
+static void prvFileClose( void )
+{
+	if( pxLoggingFileHandle != NULL )
+	{
+		fclose( pxLoggingFileHandle );
+		pxLoggingFileHandle = NULL;
+	}
+}
+/*-----------------------------------------------------------*/
+
+static void prvLogToFile( const char *pcMessage, size_t xLength )
+{
+	if( pxLoggingFileHandle == NULL )
+	{
+		pxLoggingFileHandle = fopen( pcLogFileName, "a" );
+	}
+
+	if( pxLoggingFileHandle != NULL )
+	{
+		fwrite( pcMessage, 1, xLength, pxLoggingFileHandle );
+		ulSizeOfLoggingFile += xLength;
+
+		/* If the file has grown to its maximum permissible size then close and
+		rename it - then start with a new file. */
+		if( ulSizeOfLoggingFile > ( size_t ) dlLOGGING_FILE_SIZE )
+		{
+			prvFileClose();
+			if( _access( pcFullLogFileName, 00 ) == 0 )
+			{
+				remove( pcFullLogFileName );
+			}
+			rename( pcLogFileName, pcFullLogFileName );
+			ulSizeOfLoggingFile = 0;
+		}
+	}
+}
+/*-----------------------------------------------------------*/
+
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Logging/demo_logging.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Logging/demo_logging.h
new file mode 100644
index 000000000..e94f7bf3e
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Logging/demo_logging.h
@@ -0,0 +1,48 @@
+/*
+ * FreeRTOS Kernel V10.3.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+#ifndef DEMO_LOGGING_H
+#define DEMO_LOGGING_H
+
+/*
+ * Initialise a logging system that can be used from FreeRTOS tasks and Win32
+ * threads.  Do not call printf() directly while the scheduler is running.
+ *
+ * Set xLogToStdout, xLogToFile and xLogToUDP to either pdTRUE or pdFALSE to
+ * lot to stdout, a disk file and a UDP port respectively.
+ *
+ * If xLogToUDP is pdTRUE then ulRemoteIPAddress and usRemotePort must be set
+ * to the IP address and port number to which UDP log messages will be sent.
+ */
+void vLoggingInit(	BaseType_t xLogToStdout,
+					BaseType_t xLogToFile,
+					BaseType_t xLogToUDP,
+					uint32_t ulRemoteIPAddress,
+					uint16_t usRemotePort );
+
+#endif /* DEMO_LOGGING_H */
+
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/ReadMe.txt b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/ReadMe.txt
new file mode 100644
index 000000000..6039423b8
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/ReadMe.txt
@@ -0,0 +1,18 @@
+The FreeRTOS+TCP source code and example projects are currently provided in
+their own .zip file download, but using the directory structure of the official
+FreeRTOS .zip file download.  This allow the projects to be seamlessly moved
+from one download to the other, but can seem strange when the files are viewed
+in isolation.
+
+The FreeRTOS+TCP Integration Tests Visual Studio project file is in the following
+directory: FreeRTOS-Plus\Tests\FreeRTOS_Plus_TCP_Integration_Tests
+
+This project is a version of the standard FreeRTOS demos that includes the
+integration tests of +TCP. It tests 4 functions in the TCP source code. To Run this
+project, make sure that the computer is connected to a network via ethernet cable.
+Open the project (using file named "FreeRTOS_Plus_TCP_Integration_Tests.sln") and
+choose the required network interface by modifying this line #define 
+configNETWORK_INTERFACE_TO_USE in FreeRTOSConfig.h.
+
+Once these changes are made, just build and run the project. It should run 4 test
+of which all should pass.
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Read_Me_Build_Instructions.url b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Read_Me_Build_Instructions.url
new file mode 100644
index 000000000..f01ec1411
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Read_Me_Build_Instructions.url
@@ -0,0 +1,6 @@
+[{000214A0-0000-0000-C000-000000000046}]
+Prop3=19,2
+[InternetShortcut]
+URL=http://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/examples_FreeRTOS_simulator.html
+IDList=
+HotKey=0
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Test_code/Test_Cases/freertos_tcp_test_access_declare.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Test_code/Test_Cases/freertos_tcp_test_access_declare.h
new file mode 100644
index 000000000..fb442f889
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Test_code/Test_Cases/freertos_tcp_test_access_declare.h
@@ -0,0 +1,44 @@
+/*
+ * FreeRTOS+TCP V2.2.1
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+#ifndef _FREERTOS_TCP_TEST_ACCESS_DECLARE_H_
+#define _FREERTOS_TCP_TEST_ACCESS_DECLARE_H_
+
+#include <stdint.h>
+#include "FreeRTOS.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOS_IP.h"
+#include "portmacro.h"
+
+uint32_t TEST_FreeRTOS_TCP_prvParseDNSReply( uint8_t * pucUDPPayloadBuffer,
+                                             size_t xBufferLength,
+                                             TickType_t xIdentifier );
+
+void TEST_FreeRTOS_TCP_prvCheckOptions( FreeRTOS_Socket_t * pxSocket,
+                                        NetworkBufferDescriptor_t * pxNetworkBuffer );
+
+void TEST_FreeRTOS_TCP_prvTCPCreateWindow( FreeRTOS_Socket_t * pxSocket );
+
+#endif /* ifndef _FREERTOS_TCP_TEST_ACCESS_DECLARE_H_ */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Test_code/Test_Cases/freertos_tcp_test_access_dns_define.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Test_code/Test_Cases/freertos_tcp_test_access_dns_define.h
new file mode 100644
index 000000000..14edf71ed
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Test_code/Test_Cases/freertos_tcp_test_access_dns_define.h
@@ -0,0 +1,48 @@
+/*
+ * FreeRTOS+TCP V2.2.1
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+/**
+ * @file aws_ota_pal_test_access_define.h
+ * @brief Function wrappers that access private methods in aws_ota_pal.c.
+ *
+ * Needed for testing private functions.
+ */
+
+#ifndef _FREERTOS_TCP_TEST_ACCESS_DNS_DEFINE_H_
+#define _FREERTOS_TCP_TEST_ACCESS_DNS_DEFINE_H_
+
+#include "freertos_tcp_test_access_declare.h"
+
+/*-----------------------------------------------------------*/
+
+uint32_t TEST_FreeRTOS_TCP_prvParseDNSReply( uint8_t * pucUDPPayloadBuffer,
+                                             size_t xBufferLength,
+                                             TickType_t xIdentifier )
+{
+    return prvParseDNSReply( pucUDPPayloadBuffer, xBufferLength, xIdentifier );
+}
+/*-----------------------------------------------------------*/
+
+#endif /* ifndef _AWS_FREERTOS_TCP_TEST_ACCESS_DNS_DEFINE_H_ */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Test_code/Test_Cases/freertos_tcp_test_access_tcp_define.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Test_code/Test_Cases/freertos_tcp_test_access_tcp_define.h
new file mode 100644
index 000000000..5debdb7b6
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Test_code/Test_Cases/freertos_tcp_test_access_tcp_define.h
@@ -0,0 +1,53 @@
+/*
+ * FreeRTOS+TCP V2.2.1
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+/**
+ * @file aws_ota_pal_test_access_define.h
+ * @brief Function wrappers that access private methods in aws_ota_pal.c.
+ *
+ * Needed for testing private functions.
+ */
+
+#ifndef _FREERTOS_TCP_TEST_ACCESS_TCP_DEFINE_H_
+#define _FREERTOS_TCP_TEST_ACCESS_TCP_DEFINE_H_
+
+#include "freertos_tcp_test_access_declare.h"
+
+/*-----------------------------------------------------------*/
+
+void TEST_FreeRTOS_TCP_prvCheckOptions( FreeRTOS_Socket_t * pxSocket,
+                                        NetworkBufferDescriptor_t * pxNetworkBuffer )
+{
+    prvCheckOptions( pxSocket, pxNetworkBuffer );
+}
+/*-----------------------------------------------------------*/
+
+void TEST_FreeRTOS_TCP_prvTCPCreateWindow( FreeRTOS_Socket_t * pxSocket )
+{
+    prvTCPCreateWindow( pxSocket );
+}
+/*-----------------------------------------------------------*/
+
+#endif /* ifndef _AWS_FREERTOS_TCP_TEST_ACCESS_TCP_DEFINE_H_ */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Test_code/Test_Cases/test_freertos_tcp.c b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Test_code/Test_Cases/test_freertos_tcp.c
new file mode 100644
index 000000000..0b9520c34
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Test_code/Test_Cases/test_freertos_tcp.c
@@ -0,0 +1,369 @@
+/*
+ * FreeRTOS+TCP V2.2.1
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+/* Standard includes. */
+#include <stdint.h>
+#include <stdbool.h>
+#include <string.h>
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "list.h"
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_IP_Private.h"
+#include "FreeRTOS_DNS.h"
+
+/* Test includes. */
+#include "unity_fixture.h"
+#include "unity.h"
+#include "freertos_tcp_test_access_declare.h"
+
+/**
+ * @brief Configuration for this test group.
+ */
+
+/*
+ * @brief Test group definition.
+ */
+TEST_GROUP( Full_FREERTOS_TCP );
+
+TEST_SETUP( Full_FREERTOS_TCP )
+{
+}
+
+TEST_TEAR_DOWN( Full_FREERTOS_TCP )
+{
+}
+
+TEST_GROUP_RUNNER( Full_FREERTOS_TCP )
+{
+    /* Run a parser test. */
+    RUN_TEST_CASE( Full_FREERTOS_TCP, prvParseDnsResponse );
+    RUN_TEST_CASE( Full_FREERTOS_TCP, ulDNSHandlePacket );
+
+    /* prvCheckOptions test. */
+    RUN_TEST_CASE( Full_FREERTOS_TCP, prvCheckOptions );
+
+    /* xProcessReceivedUDPPacket test. */
+    RUN_TEST_CASE( Full_FREERTOS_TCP, UDPPacketLength );
+}
+
+TEST( Full_FREERTOS_TCP, prvParseDnsResponse )
+{
+    uint8_t ucGoodDnsResponse[] =
+    {
+        0xd7, 0x66, 0x81, 0x80, 0x00, 0x01, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x0e, 0x61, 0x33, 0x37,
+        0x62, 0x78, 0x76, 0x31, 0x63, 0x62, 0x64, 0x61, 0x33, 0x6a, 0x67, 0x03, 0x69, 0x6f, 0x74, 0x09,
+        0x75, 0x73, 0x2d, 0x77, 0x65, 0x73, 0x74, 0x2d, 0x32, 0x09, 0x61, 0x6d, 0x61, 0x7a, 0x6f, 0x6e,
+        0x61, 0x77, 0x73, 0x03, 0x63, 0x6f, 0x6d, 0x00, 0x00, 0x01, 0x00, 0x01, 0xc0, 0x0c, 0x00, 0x05,
+        0x00, 0x01, 0x00, 0x00, 0x01, 0x2c, 0x00, 0x1e, 0x0c, 0x69, 0x6f, 0x74, 0x6d, 0x6f, 0x6f, 0x6e,
+        0x72, 0x61, 0x6b, 0x65, 0x72, 0x09, 0x75, 0x73, 0x2d, 0x77, 0x65, 0x73, 0x74, 0x2d, 0x32, 0x04,
+        0x70, 0x72, 0x6f, 0x64, 0xc0, 0x1b, 0xc0, 0x48, 0x00, 0x05, 0x00, 0x01, 0x00, 0x00, 0x00, 0xec,
+        0x00, 0x45, 0x09, 0x64, 0x75, 0x61, 0x6c, 0x73, 0x74, 0x61, 0x63, 0x6b, 0x2a, 0x69, 0x6f, 0x74,
+        0x6d, 0x6f, 0x6f, 0x6e, 0x72, 0x61, 0x6b, 0x65, 0x72, 0x2d, 0x75, 0x2d, 0x65, 0x6c, 0x62, 0x2d,
+        0x31, 0x77, 0x38, 0x71, 0x6e, 0x77, 0x31, 0x33, 0x33, 0x36, 0x7a, 0x71, 0x2d, 0x31, 0x31, 0x38,
+        0x36, 0x33, 0x34, 0x38, 0x30, 0x39, 0x32, 0x09, 0x75, 0x73, 0x2d, 0x77, 0x65, 0x73, 0x74, 0x2d,
+        0x32, 0x03, 0x65, 0x6c, 0x62, 0xc0, 0x29, 0xc0, 0x72, 0x00, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00,
+        0x23, 0x00, 0x04, 0x22, 0xd3, 0x41, 0xdb, 0xc0, 0x72, 0x00, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00,
+        0x23, 0x00, 0x04, 0x22, 0xd3, 0x53, 0xe4, 0xc0, 0x72, 0x00, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00,
+        0x23, 0x00, 0x04, 0x22, 0xd3, 0xb6, 0x17, 0xc0, 0x72, 0x00, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00,
+        0x23, 0x00, 0x04, 0x22, 0xd6, 0xf5, 0xf0, 0xc0, 0x72, 0x00, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00,
+        0x23, 0x00, 0x04, 0x22, 0xd7, 0xe6, 0xa4, 0xc0, 0x72, 0x00, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00,
+        0x23, 0x00, 0x04, 0x36, 0x95, 0x5e, 0x45
+    };
+    const uint32_t ulExpectedAddress = 0xf0f5d622;
+    uint8_t ucBadDnsResponseA[] =
+    {
+        0x3b, 0x6a, 0x81, 0x83, 0x01, 0x80, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x09, 0x69, 0x6e, 0x73,
+        0x70, 0x65, 0x63, 0x74, 0x6f, 0x72, 0x08, 0x75, 0x73, 0x2d, 0x77, 0x65, 0x73, 0x74, 0x32, 0x09,
+        0x61, 0x6d, 0x61, 0x7a, 0x6f, 0x6e, 0x61, 0x77, 0x73, 0x03, 0x63, 0x6f, 0x6d, 0x00, 0x00, 0x01,
+        0x00, 0x01, 0xc0, 0x1f, 0x00, 0x06, 0x00, 0x01, 0x00, 0x00, 0x00, 0x03, 0x00, 0x33, 0x0e, 0x64,
+        0x6e, 0x73, 0x2d, 0x64, 0x79, 0x6e, 0x2d
+    };
+    uint8_t ucBadDnsResponseB[] =
+    {
+        0xf0, 0x23, 0x81, 0x80, 0x04, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x03, 0x77, 0x77, 0x77,
+        0x05, 0x61, 0x70, 0x70, 0x6c, 0x65, 0x03, 0x63, 0x6f, 0x6d, 0x00, 0x00, 0x01, 0x00, 0x01, 0xc0,
+        0x0c, 0x00, 0x05, 0x00, 0x01, 0x00, 0x00, 0x01, 0x7c, 0x00, 0x1b, 0x03, 0x77, 0x77, 0x77, 0x05,
+        0x61, 0x70, 0x70, 0x6c, 0x65, 0x03, 0x63, 0x6f, 0x6d, 0x07, 0x65, 0x64, 0x67, 0x65, 0x6b, 0x65,
+        0x79, 0x03, 0x6e, 0x65, 0x74, 0x00, 0xc0, 0x2b, 0x00, 0x05, 0x00, 0x01, 0x00, 0x00, 0x1a, 0xd5,
+        0x00, 0x2f, 0x03, 0x77, 0x77, 0x77, 0x05, 0x61, 0x70, 0x70, 0x6c, 0x65, 0x03, 0x63, 0x6f, 0x6d,
+        0x07, 0x65, 0x64, 0x67, 0x65, 0x6b, 0x65, 0x79, 0x03, 0x6e, 0x65, 0x74, 0x0b, 0x67, 0x6c, 0x6f,
+        0x62, 0x61, 0x6c, 0x72, 0x65, 0x64, 0x69, 0x72, 0x06, 0x61, 0x6b, 0x61, 0x64, 0x6e, 0x73, 0xc0,
+        0x41, 0xc0, 0x52, 0x00, 0x05, 0x00, 0x01, 0x00, 0x00, 0x08, 0xb3, 0x00, 0x19, 0x05, 0x65, 0x36,
+        0x38, 0x35, 0x38, 0x05, 0x64, 0x73, 0x63, 0x65, 0x39, 0x0a, 0x61, 0x6b, 0x61, 0x6d, 0x61, 0x69,
+        0x65, 0x64, 0x67, 0x65, 0xc0, 0x41, 0xc0, 0x8d, 0x00, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00, 0x0a,
+        0x00, 0x04, 0x17, 0x4a, 0x3e, 0x96
+    };
+    uint8_t ucBadDnsResponseC[] =
+    {
+        0x3b, 0xa3, 0x81, 0x80, 0x00, 0x01, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x77, 0x77, 0x77,
+        0x09, 0x6d, 0x69, 0x63, 0x72, 0x6f, 0x73, 0x6f, 0x66
+    };
+    uint8_t ucBadDnsResponseD[] =
+    {
+        0x95, 0x1e, 0x81, 0x80, 0x05, 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x03, 0x77, 0x77, 0x77,
+        0x03, 0x63, 0x6e, 0x6e, 0x03, 0x63, 0x6f, 0x6d, 0x00, 0x00, 0x01, 0x00, 0x01, 0xc0, 0x0c, 0x00,
+        0x05, 0x00, 0x01, 0x00, 0x00, 0x00, 0x48, 0x00, 0x1b, 0x0a, 0x74, 0x75, 0x72, 0x6e, 0x65, 0x72,
+        0x2d, 0x74, 0x6c, 0x73, 0x03, 0x6d, 0x61, 0x70, 0x06, 0x66, 0x61, 0x73, 0x74, 0x6c, 0x79, 0x03,
+        0x6e, 0x65, 0x74, 0x00, 0xc0, 0x29, 0x00, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00, 0x18, 0x00, 0x04,
+        0x97, 0x65, 0x35, 0x43
+    };
+    uint8_t ucBadDnsResponseE[] =
+    {
+        0xa8, 0x6d, 0x81, 0x80, 0x03, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x03, 0x77, 0x77, 0x77,
+        0x05, 0x61, 0x70, 0x70, 0x6c, 0x65, 0x03, 0x63, 0x6f, 0x6d, 0x00, 0x00, 0x01, 0x00, 0x01, 0xc0,
+        0x0c, 0x00, 0x05, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1b, 0x03, 0x77, 0x77, 0x77, 0x05,
+        0x61, 0x70, 0x70, 0x6c, 0x65, 0x03, 0x63, 0x6f, 0x6d, 0x07, 0x65, 0x64, 0x67, 0x65, 0x6b, 0x65,
+        0x79, 0x03, 0x6e, 0x65, 0x74, 0x00, 0xc0, 0x2b, 0x00, 0x05, 0x00, 0x01, 0x00, 0x00, 0x1c, 0x2c,
+        0x00, 0x2f, 0x03, 0x77, 0x77, 0x77, 0x05, 0x61, 0x70, 0x70, 0x6c, 0x65, 0x03, 0x63, 0x6f, 0x6d,
+        0x07, 0x65, 0x64, 0x67, 0x65, 0x6b, 0x65, 0x79, 0x03, 0x6e, 0x65, 0x74, 0x0b, 0x67, 0x6c, 0x6f,
+        0x62, 0x61, 0x6c, 0x72, 0x65, 0x64, 0x69, 0x72, 0x06, 0x61, 0x6b, 0x61, 0x64, 0x6e, 0x73, 0xc0,
+        0x41, 0xc0, 0x52, 0x00, 0x05, 0x00, 0x01, 0x00, 0x00, 0x03, 0xd7, 0x00, 0x19, 0x05, 0x65, 0x36,
+        0x38, 0x35, 0x38, 0x05, 0x64, 0x73, 0x63, 0x65, 0x39, 0x0a, 0x61, 0x6b, 0x61, 0x6d, 0x61, 0x69,
+        0x65, 0x64, 0x67, 0x65, 0xc0, 0x41, 0xc0, 0x8d, 0x00, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00, 0x08,
+        0x00, 0x04, 0x17, 0x4b, 0xba, 0x13
+    };
+    uint8_t ucBadDnsResponseF[] =
+    {
+        0x6c, 0x1e, 0x81, 0x80, 0x00, 0x01, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x77, 0x77, 0x77,
+        0x06, 0x61, 0x6d, 0x61, 0x7a, 0x6f, 0x6e, 0x03, 0x63, 0x6f, 0x6d, 0x00, 0x00, 0x01, 0x00, 0x01,
+        0xc0, 0x0c, 0x00, 0x05, 0x00, 0x01, 0x00, 0x00, 0x01, 0x57, 0x00, 0x0a, 0x03, 0x77, 0x77, 0x77,
+        0x03, 0x63, 0x64, 0x6e, 0xc0, 0x10, 0x41, 0x41, 0xc0, 0x2c, 0x00, 0x05, 0x00, 0x01, 0x00, 0x00,
+        0x00, 0x17, 0x00, 0x1f, 0x0e, 0x64, 0x33, 0x61, 0x67, 0x34, 0x68, 0x75, 0x6b, 0x6b, 0x68, 0x36,
+        0x32, 0x79, 0x6e, 0x0a, 0x63, 0x6c, 0x6f, 0x75, 0x64, 0x66, 0x72, 0x6f, 0x6e, 0x74, 0x03, 0x6e,
+        0x65, 0x74, 0x00, 0xc0, 0x42, 0x00, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00, 0x2e, 0x00, 0x04, 0x0d,
+        0x20, 0xa7, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x9a, 0x3a, 0x01, 0x5c, 0x31, 0x1f, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00
+    };
+    uint8_t ucBadDnsResponseG[] =
+    {
+        0x73, 0xe1, 0x81, 0x80, 0x00, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x77, 0x77, 0x77,
+        0x06, 0x22, 0x03, 0x63, 0x6f, 0x6d, 0x00, 0x00, 0x01, 0x00, 0x01, 0xc0, 0x0c, 0x00, 0x01, 0x00,
+        0x01, 0x00, 0x00, 0x01, 0x0a, 0x00, 0x04, 0xd8, 0x3a, 0xd8, 0x84, 0x00, 0x34, 0x02, 0x41, 0x01,
+        0x2c, 0xb2, 0x1a, 0x01, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00
+    };
+    uint8_t ucBadDnsResponseH[] = /* Regress crash in prvReadNameField. */
+    {
+        0x10, 0x00, 0x00, 0x35, 0x00, 0x00, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x35,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00, 0x91, 0x91, 0x91,
+        0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91,
+        0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91,
+        0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91,
+        0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91,
+        0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91,
+        0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91,
+        0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91,
+        0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91,
+        0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x91, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+    };
+    uint8_t ucBadDnsResponseI[] = /* Regress crash in prvSkipNameField. */
+    {
+        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8,
+        0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8,
+        0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0x00, 0x35,
+        0x0a, 0xf8, 0xf8, 0xf8, 0x27, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8,
+        0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0xf8, 0x16, 0x16, 0x21, 0x16,
+        0x16, 0x16, 0x16, 0x16, 0x16, 0x2a, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xf8,
+        0x27, 0xf8, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02,
+        0x00, 0x16, 0x16, 0x16, 0x16, 0x00, 0x00, 0x00, 0x0a, 0x00, 0x16, 0x5a,
+        0x00, 0x16, 0x00, 0x16, 0x16, 0x16, 0x16, 0x16, 0x16, 0x16, 0x16, 0x21
+    };
+    uint32_t ulAddress = 0;
+
+    /* Parsing a valid packet should succeed. */
+    ulAddress = TEST_FreeRTOS_TCP_prvParseDNSReply(
+        ucGoodDnsResponse,
+        sizeof( ucGoodDnsResponse ),
+        *( uint16_t * ) ucGoodDnsResponse );
+    TEST_ASSERT_EQUAL_UINT32( ulExpectedAddress, ulAddress );
+    /* End test. */
+
+    /* Parsing a bad packet should fail gracefully. */
+    ulAddress = TEST_FreeRTOS_TCP_prvParseDNSReply(
+        ucBadDnsResponseA,
+        sizeof( ucBadDnsResponseA ),
+        *( uint16_t * ) ucBadDnsResponseA );
+    TEST_ASSERT_EQUAL_UINT32( 0, ulAddress );
+    /* End test. */
+
+    /* Parsing a bad packet should fail gracefully. */
+    ulAddress = TEST_FreeRTOS_TCP_prvParseDNSReply(
+        ucBadDnsResponseB,
+        sizeof( ucBadDnsResponseB ),
+        *( uint16_t * ) ucBadDnsResponseB );
+    TEST_ASSERT_EQUAL_UINT32( 0, ulAddress );
+    /* End test. */
+
+    /* Parsing a bad packet should fail gracefully. */
+    ulAddress = TEST_FreeRTOS_TCP_prvParseDNSReply(
+        ucBadDnsResponseC,
+        sizeof( ucBadDnsResponseC ),
+        *( uint16_t * ) ucBadDnsResponseC );
+    TEST_ASSERT_EQUAL_UINT32( 0, ulAddress );
+    /* End test. */
+
+    /* Parsing a bad packet should fail gracefully. */
+    ulAddress = TEST_FreeRTOS_TCP_prvParseDNSReply(
+        ucBadDnsResponseD,
+        sizeof( ucBadDnsResponseD ),
+        *( uint16_t * ) ucBadDnsResponseD );
+    TEST_ASSERT_EQUAL_UINT32( 0, ulAddress );
+    /* End test. */
+
+    /* Parsing a bad packet should fail gracefully. */
+    ulAddress = TEST_FreeRTOS_TCP_prvParseDNSReply(
+        ucBadDnsResponseE,
+        sizeof( ucBadDnsResponseE ),
+        *( uint16_t * ) ucBadDnsResponseE );
+    TEST_ASSERT_EQUAL_UINT32( 0, ulAddress );
+    /* End test. */
+
+    /* Parsing a bad packet should fail gracefully. */
+    ulAddress = TEST_FreeRTOS_TCP_prvParseDNSReply(
+        ucBadDnsResponseF,
+        sizeof( ucBadDnsResponseF ),
+        *( uint16_t * ) ucBadDnsResponseF );
+    TEST_ASSERT_EQUAL_UINT32( 0, ulAddress );
+    /* End test. */
+
+    /* Parsing a bad packet should fail gracefully. */
+    ulAddress = TEST_FreeRTOS_TCP_prvParseDNSReply(
+        ucBadDnsResponseG,
+        sizeof( ucBadDnsResponseG ),
+        *( uint16_t * ) ucBadDnsResponseG );
+    TEST_ASSERT_EQUAL_UINT32( 0, ulAddress );
+    /* End test. */
+
+    /* Parsing a bad packet should fail gracefully. */
+    ulAddress = TEST_FreeRTOS_TCP_prvParseDNSReply(
+        ucBadDnsResponseH,
+        sizeof( ucBadDnsResponseH ),
+        *( uint16_t * ) ucBadDnsResponseH );
+    TEST_ASSERT_EQUAL_UINT32( 0, ulAddress );
+    /* End test. */
+
+    /* Parsing a bad packet should fail gracefully. */
+    ulAddress = TEST_FreeRTOS_TCP_prvParseDNSReply(
+        ucBadDnsResponseI,
+        sizeof( ucBadDnsResponseI ),
+        *( uint16_t * ) ucBadDnsResponseI );
+    TEST_ASSERT_EQUAL_UINT32( 0, ulAddress );
+    /* End test. */
+}
+
+TEST( Full_FREERTOS_TCP, ulDNSHandlePacket )
+{
+    NetworkBufferDescriptor_t xNetworkBuffer = { 0 };
+    uint8_t ucPartialUdpPacket[ sizeof( ipSIZE_OF_UDP_HEADER ) - 1 ] = { 0xFF };
+    uint32_t ulResult = 0;
+
+    /* Attempting to parse a packet that's shorter than a UDP header should be
+     * a no-op. */
+    xNetworkBuffer.pucEthernetBuffer = ucPartialUdpPacket;
+    xNetworkBuffer.xDataLength = sizeof( ucPartialUdpPacket );
+    ulResult = ulDNSHandlePacket( &xNetworkBuffer );
+    TEST_ASSERT_EQUAL_UINT32( 0, ulResult );
+}
+
+TEST( Full_FREERTOS_TCP, prvCheckOptions )
+{
+    uint8_t ucDivideByZero[] =
+    {
+        0x6f, 0xff, 0xff, 0xff, 0x0a, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+        0xde, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x6f, 0x6f, 0x6f, 0x6d,
+        0x6f, 0xff, 0xff, 0xff, 0x0a, 0xff, 0xff, 0xff, 0xff, 0xe5, 0x6f, 0x6f,
+        0x6f, 0x6f, 0x6f, 0x6b, 0xbf, 0x6f, 0x03, 0xff, 0x04, 0x01, 0xb7, 0xff,
+        0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x04, 0x02, 0x02, 0x02, 0x02,
+        0x02, 0x02, 0x02, 0x02, 0x02, 0x04, 0x00, 0x00, 0x00, 0x02, 0x02, 0x02,
+        0x02, 0x02, 0xf8, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x03, 0x05
+    };
+
+    FreeRTOS_Socket_t xSocket;
+    NetworkBufferDescriptor_t xNetworkBuffer;
+
+    xNetworkBuffer.pucEthernetBuffer = ucDivideByZero;
+    xNetworkBuffer.xDataLength = sizeof( ucDivideByZero );
+
+    TEST_FreeRTOS_TCP_prvTCPCreateWindow( &xSocket );
+    TEST_FreeRTOS_TCP_prvCheckOptions( &xSocket, &xNetworkBuffer );
+}
+
+TEST( Full_FREERTOS_TCP, UDPPacketLength )
+{
+    uint8_t ucBadUdpPacketA[] =
+    {
+        0xff, 0xff
+    };
+
+    uint8_t ucBadUdpPacketB[] =
+    {
+        0x0a, 0xbf, 0xbf, 0xbf, 0xbf, 0xbf, 0x54, 0xbf, 0xbf, 0xbf, 0xff, 0xbf,
+        0x0a, 0xbf, 0xbf, 0xbf, 0x3f, 0xbf, 0xbf, 0xbf, 0xbf, 0xbf, 0xbf, 0xbf,
+        0x88, 0x00, 0xbf, 0xbf, 0xbf, 0x00, 0x32, 0xbf, 0xbf, 0xbf, 0x00, 0x35,
+        0x0a, 0xbf, 0xbf, 0x3a, 0xbf, 0xbf, 0xbf
+    };
+
+    BaseType_t xReturn = pdPASS;
+    uint16_t usPort = 65535;
+    NetworkBufferDescriptor_t xNetworkBuffer;
+
+    /* This test fails now since there is an assert 
+     * checking for NULL pucEthernetBuffer. Also, the
+     * next tests do not run and this whole test case
+     * is scrapped.
+
+    xNetworkBuffer.pucEthernetBuffer = NULL;
+    xNetworkBuffer.xDataLength = 0;
+
+    xReturn = xProcessReceivedUDPPacket( &xNetworkBuffer, usPort );
+    TEST_ASSERT_EQUAL_UINT32_MESSAGE( pdFAIL, xReturn, "Failed to parse 0 size packet" );
+     */
+    
+
+    xNetworkBuffer.pucEthernetBuffer = ucBadUdpPacketA;
+    xNetworkBuffer.xDataLength = sizeof( ucBadUdpPacketA );
+    xReturn = xProcessReceivedUDPPacket( &xNetworkBuffer, usPort );
+    TEST_ASSERT_EQUAL_UINT32_MESSAGE( pdFAIL, xReturn, "Failed to parse 2 bytes packet" );
+
+    xNetworkBuffer.pucEthernetBuffer = ucBadUdpPacketB;
+    xNetworkBuffer.xDataLength = sizeof( ucBadUdpPacketB );
+    xReturn = xProcessReceivedUDPPacket( &xNetworkBuffer, usPort );
+    TEST_ASSERT_EQUAL_UINT32( pdFAIL, xReturn );
+}
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Test_code/Test_Runner/test_runner.c b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Test_code/Test_Runner/test_runner.c
new file mode 100644
index 000000000..56850f083
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Test_code/Test_Runner/test_runner.c
@@ -0,0 +1,108 @@
+/*
+ * FreeRTOS V202002.00
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+ /**
+  * @file aws_test_runner.c
+  * @brief The function to be called to run all the tests.
+  */
+
+  /* Test runner interface includes. */
+#include "test_runner.h"
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+
+/* Unity framework includes. */
+#include "unity_fixture.h"
+#include "unity_internals.h"
+
+char cBuffer[testrunnerBUFFER_SIZE];
+
+/* Heap leak variables. */
+unsigned int xHeapBefore;
+unsigned int xHeapAfter;
+/*-----------------------------------------------------------*/
+
+/* This function will be generated by the test automation framework,
+ * do not change the signature of it. You could, however, add or remove
+ * RUN_TEST_GROUP statements.
+ */
+static void RunTests(void)
+{
+    RUN_TEST_GROUP(Full_FREERTOS_TCP);
+}
+/*-----------------------------------------------------------*/
+
+void TEST_RUNNER_RunTests_task(void* pvParameters)
+{
+    /* Disable unused parameter warning. */
+    (void)pvParameters;
+
+    /* Initialize unity. */
+    UnityFixture.Verbose = 1;
+    UnityFixture.GroupFilter = 0;
+    UnityFixture.NameFilter = testrunnerTEST_FILTER;
+    UnityFixture.RepeatCount = 1;
+
+    UNITY_BEGIN();
+
+    /* Give the print buffer time to empty */
+    vTaskDelay(pdMS_TO_TICKS(500));
+    /* Measure the heap size before any tests are run. */
+#if ( testrunnerFULL_MEMORYLEAK_ENABLED == 1 )
+    xHeapBefore = xPortGetFreeHeapSize();
+#endif
+
+    RunTests();
+
+#if ( testrunnerFULL_MEMORYLEAK_ENABLED == 1 )
+
+    /* Measure the heap size after tests are done running.
+     * This test must run last. */
+
+     /* Perform any global resource cleanup necessary to avoid memory leaks. */
+#ifdef testrunnerMEMORYLEAK_CLEANUP
+    testrunnerMEMORYLEAK_CLEANUP();
+#endif
+
+    /* Give the print buffer time to empty */
+    vTaskDelay(pdMS_TO_TICKS(500));
+    xHeapAfter = xPortGetFreeHeapSize();
+    RUN_TEST_GROUP(Full_MemoryLeak);
+#endif /* if ( testrunnerFULL_MEMORYLEAK_ENABLED == 1 ) */
+
+    /* Currently disabled. Will be enabled after cleanup. */
+    UNITY_END();
+
+#ifdef CODE_COVERAGE
+    exit(0);
+#endif
+
+    /* This task has finished.  FreeRTOS does not allow a task to run off the
+     * end of its implementing function, so the task must be deleted. */
+    vTaskDelete(NULL);
+}
+/*-----------------------------------------------------------*/
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Test_code/Test_Runner/test_runner.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Test_code/Test_Runner/test_runner.h
new file mode 100644
index 000000000..64b5b9b5e
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Test_code/Test_Runner/test_runner.h
@@ -0,0 +1,77 @@
+/*
+ * FreeRTOS V202002.00
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+ /**
+  * @file aws_test_runner.h
+  * @brief The function to be called to run all the tests.
+  */
+
+#ifndef _TEST_RUNNER_H_
+#define _TEST_RUNNER_H_
+
+#include "test_runner_config.h"
+
+  /*
+   * @brief If set to 1, will run DQP_FR tests only.
+   */
+#ifdef testrunnerAFQP_ENABLED
+#define testrunnerTEST_FILTER    "AFQP"
+#else
+#define testrunnerTEST_FILTER    0
+#endif
+
+   /**
+    * @brief Size of shared array.
+    *
+    */
+#define testrunnerBUFFER_SIZE    ( 4000 )
+
+    /**
+     * @brief Buffer used for all tests.
+     *
+     * Since tests are run in series, they can use the same memory array.
+     * This makes significant heap savings.
+     */
+extern char cBuffer[testrunnerBUFFER_SIZE];
+
+/**
+ * @brief FreeRTOS heap measurement taken before tests are run.
+ */
+extern unsigned int xHeapBefore;
+
+/**
+ * @brief FreeRTOS heap measurement taken after all tests are run.
+ */
+extern unsigned int xHeapAfter;
+
+
+/**
+ * @brief Runs all the tests.
+ */
+void TEST_RUNNER_RunTests_task(void* pvParameters);
+
+
+
+#endif /* _AWS_TEST_RUNNER_H_ */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Test_code/Test_Runner/test_runner_config.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Test_code/Test_Runner/test_runner_config.h
new file mode 100644
index 000000000..569cd5d83
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/Test_code/Test_Runner/test_runner_config.h
@@ -0,0 +1,76 @@
+/*
+ * FreeRTOS V1.1.4
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+#ifndef AWS_TEST_RUNNER_CONFIG_H
+#define AWS_TEST_RUNNER_CONFIG_H
+
+ /* Uncomment this line if you want to run DQP_FR tests only. */
+ /* #define testrunnerAFQP_ENABLED */
+
+#define testrunnerUNSUPPORTED                         0
+
+#define FREERTOS_ENABLE_UNIT_TESTS             1
+
+/* Unsupported tests. */
+#define testrunnerFULL_WIFI_ENABLED                   testrunnerUNSUPPORTED
+#define testrunnerFULL_BLE_ENABLED                    testrunnerUNSUPPORTED
+#define testrunnerFULL_BLE_END_TO_END_TEST_ENABLED    testrunnerUNSUPPORTED
+
+/* Supported tests. 0 = Disabled, 1 = Enabled */
+#define testrunnerFULL_TASKPOOL_ENABLED               0
+#define testrunnerFULL_CRYPTO_ENABLED                 0
+#define testrunnerFULL_FREERTOS_TCP_ENABLED           1
+#define testrunnerFULL_DEFENDER_ENABLED               0
+#define testrunnerFULL_GGD_ENABLED                    0
+#define testrunnerFULL_GGD_HELPER_ENABLED             0
+#define testrunnerFULL_MQTT_AGENT_ENABLED             0
+#define testrunnerFULL_MQTT_ALPN_ENABLED              0
+#define testrunnerFULL_MQTT_STRESS_TEST_ENABLED       0
+#define testrunnerFULL_MQTTv4_ENABLED                 0
+#define testrunnerFULL_PKCS11_ENABLED                 0
+#define testrunnerFULL_PKCS11_MODEL_ENABLED           0
+#define testrunnerFULL_POSIX_ENABLED                  0
+#define testrunnerFULL_SHADOW_ENABLED                 0
+#define testrunnerFULL_SHADOWv4_ENABLED               0
+#define testrunnerFULL_TCP_ENABLED                    0
+#define testrunnerFULL_TLS_ENABLED                    0
+#define testrunnerFULL_MEMORYLEAK_ENABLED             0
+#define testrunnerFULL_OTA_CBOR_ENABLED               0
+#define testrunnerFULL_OTA_AGENT_ENABLED              0
+#define testrunnerFULL_OTA_PAL_ENABLED                0
+#define testrunnerFULL_SERIALIZER_ENABLED             0
+#define testrunnerUTIL_PLATFORM_CLOCK_ENABLED         0
+#define testrunnerUTIL_PLATFORM_THREADS_ENABLED       0
+#define testrunnerFULL_HTTPS_CLIENT_ENABLED           0
+
+/* On systems using FreeRTOS+TCP (such as this one) the TCP segments must be
+ * cleaned up before running the memory leak check. */
+#if ( testrunnerFULL_MEMORYLEAK_ENABLED == 1 )
+extern void vTCPSegmentCleanup();
+#define testrunnerMEMORYLEAK_CLEANUP()    vTCPSegmentCleanup()
+#endif
+
+#endif /* AWS_TEST_RUNNER_CONFIG_H */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WIN32.vcxproj b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WIN32.vcxproj
new file mode 100644
index 000000000..017b3a34d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WIN32.vcxproj
@@ -0,0 +1,1731 @@
+<?xml version="1.0" encoding="utf-8"?>
+<Project DefaultTargets="Build" ToolsVersion="15.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
+  <ItemGroup Label="ProjectConfigurations">
+    <ProjectConfiguration Include="Debug|Win32">
+      <Configuration>Debug</Configuration>
+      <Platform>Win32</Platform>
+    </ProjectConfiguration>
+    <ProjectConfiguration Include="Release|Win32">
+      <Configuration>Release</Configuration>
+      <Platform>Win32</Platform>
+    </ProjectConfiguration>
+  </ItemGroup>
+  <PropertyGroup Label="Globals">
+    <ProjectGuid>{C686325E-3261-42F7-AEB1-DDE5280E1CEB}</ProjectGuid>
+    <ProjectName>Full-TCP-Networkless</ProjectName>
+    <WindowsTargetPlatformVersion>10.0</WindowsTargetPlatformVersion>
+  </PropertyGroup>
+  <Import Project="$(VCTargetsPath)\Microsoft.Cpp.Default.props" />
+  <PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Release|Win32'" Label="Configuration">
+    <ConfigurationType>Application</ConfigurationType>
+    <UseOfMfc>false</UseOfMfc>
+    <CharacterSet>MultiByte</CharacterSet>
+    <PlatformToolset>v142</PlatformToolset>
+  </PropertyGroup>
+  <PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'" Label="Configuration">
+    <ConfigurationType>Application</ConfigurationType>
+    <UseOfMfc>false</UseOfMfc>
+    <CharacterSet>MultiByte</CharacterSet>
+    <PlatformToolset>v142</PlatformToolset>
+  </PropertyGroup>
+  <Import Project="$(VCTargetsPath)\Microsoft.Cpp.props" />
+  <ImportGroup Label="ExtensionSettings">
+  </ImportGroup>
+  <ImportGroup Condition="'$(Configuration)|$(Platform)'=='Release|Win32'" Label="PropertySheets">
+    <Import Project="$(UserRootDir)\Microsoft.Cpp.$(Platform).user.props" Condition="exists('$(UserRootDir)\Microsoft.Cpp.$(Platform).user.props')" Label="LocalAppDataPlatform" />
+    <Import Project="$(VCTargetsPath)Microsoft.CPP.UpgradeFromVC60.props" />
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+    <Import Project="$(VCTargetsPath)Microsoft.CPP.UpgradeFromVC60.props" />
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+  <PropertyGroup Label="UserMacros" />
+  <PropertyGroup>
+    <_ProjectFileVersion>10.0.30319.1</_ProjectFileVersion>
+    <OutDir Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">Debug\</OutDir>
+    <IntDir Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">Debug\</IntDir>
+    <LinkIncremental Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">true</LinkIncremental>
+    <OutDir Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">.\Release\</OutDir>
+    <IntDir Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">.\Release\</IntDir>
+    <LinkIncremental Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">false</LinkIncremental>
+    <CodeAnalysisRuleSet Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">AllRules.ruleset</CodeAnalysisRuleSet>
+  </PropertyGroup>
+  <PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">
+    <IncludePath>C:\Program Files (x86)\Windows Kits\10\Include\10.0.18362.0\um\;.;$(IncludePath)</IncludePath>
+    <SourcePath>..\..\..\CMock\vendor\unity\extras\memory\src;..\..\..\CMock\vendor\unity\extras\fixture\src;..\..\..\CMock\vendor\unity\src;$(SourcePath)</SourcePath>
+  </PropertyGroup>
+  <ItemDefinitionGroup Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">
+    <Midl>
+      <TypeLibraryName>.\Debug/WIN32.tlb</TypeLibraryName>
+      <HeaderFileName>
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+      <MinimalRebuild>true</MinimalRebuild>
+      <BasicRuntimeChecks>EnableFastChecks</BasicRuntimeChecks>
+      <RuntimeLibrary>MultiThreadedDLL</RuntimeLibrary>
+      <PrecompiledHeaderOutputFile>.\Debug/WIN32.pch</PrecompiledHeaderOutputFile>
+      <AssemblerListingLocation>.\Debug/</AssemblerListingLocation>
+      <ObjectFileName>.\Debug/</ObjectFileName>
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+      <WarningLevel>Level4</WarningLevel>
+      <SuppressStartupBanner>true</SuppressStartupBanner>
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+      <DebugInformationFormat>EditAndContinue</DebugInformationFormat>
+      <AdditionalOptions>/wd4210 /wd4127 /wd4214 /wd4201 /wd4244  /wd4310 %(AdditionalOptions)</AdditionalOptions>
+      <BrowseInformation>true</BrowseInformation>
+      <PrecompiledHeader>NotUsing</PrecompiledHeader>
+      <ExceptionHandling>false</ExceptionHandling>
+      <CompileAs>CompileAsC</CompileAs>
+    </ClCompile>
+    <ResourceCompile>
+      <PreprocessorDefinitions>_DEBUG;%(PreprocessorDefinitions)</PreprocessorDefinitions>
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+    <Link>
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+      <SuppressStartupBanner>true</SuppressStartupBanner>
+      <GenerateDebugInformation>true</GenerateDebugInformation>
+      <ProgramDatabaseFile>.\Debug/WIN32.pdb</ProgramDatabaseFile>
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+      <Profile>false</Profile>
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+    <Link>
+      <OutputFile>.\Release/RTOSDemo.exe</OutputFile>
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diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WIN32.vcxproj.filters b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WIN32.vcxproj.filters
new file mode 100644
index 000000000..57a398e43
--- /dev/null
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@@ -0,0 +1,4783 @@
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+      <Filter>Windows resources</Filter>
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+    <ClInclude Include="..\..\..\..\..\..\..\..\..\..\Program Files (x86)\Windows Kits\10\Include\10.0.18362.0\um\filterpipelineutil.h">
+      <Filter>Windows resources</Filter>
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+    <ClInclude Include="..\..\..\..\..\..\..\..\..\..\Program Files (x86)\Windows Kits\10\Include\10.0.18362.0\um\winppi.h">
+      <Filter>Windows resources</Filter>
+    </ClInclude>
+    <ClInclude Include="Test_code\Test_Cases\freertos_tcp_test_access_declare.h">
+      <Filter>Test_Code\Test_Cases</Filter>
+    </ClInclude>
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+    <ClInclude Include="Config\FreeRTOSConfig.h" />
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+    <None Include="..\..\..\..\..\..\..\..\..\..\Program Files (x86)\Windows Kits\10\Include\10.0.18362.0\um\msft_healthaction.mof">
+      <Filter>Windows resources</Filter>
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+    <None Include="..\..\..\..\..\..\..\..\..\..\Program Files (x86)\Windows Kits\10\Include\10.0.18362.0\um\msft_healthactionevent.mof">
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+</Project>
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WIN32.vcxproj.user b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WIN32.vcxproj.user
new file mode 100644
index 000000000..88a550947
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WIN32.vcxproj.user
@@ -0,0 +1,4 @@
+<?xml version="1.0" encoding="utf-8"?>
+<Project ToolsVersion="Current" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
+  <PropertyGroup />
+</Project>
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/Packet32.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/Packet32.h
new file mode 100644
index 000000000..64be055d9
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/Packet32.h
@@ -0,0 +1,359 @@
+/*
+ * Copyright (c) 1999 - 2005 NetGroup, Politecnico di Torino (Italy)
+ * Copyright (c) 2005 - 2007 CACE Technologies, Davis (California)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Politecnico di Torino, CACE Technologies 
+ * nor the names of its contributors may be used to endorse or promote 
+ * products derived from this software without specific prior written 
+ * permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/** @ingroup packetapi
+ *  @{ 
+ */
+
+/** @defgroup packet32h Packet.dll definitions and data structures
+ *  Packet32.h contains the data structures and the definitions used by packet.dll.
+ *  The file is used both by the Win9x and the WinNTx versions of packet.dll, and can be included
+ *  by the applications that use the functions of this library
+ *  @{
+ */
+
+#ifndef __PACKET32
+#define __PACKET32
+
+#include <winsock2.h>
+
+#ifdef HAVE_AIRPCAP_API
+#include <airpcap.h>
+#else
+#if !defined(AIRPCAP_HANDLE__EAE405F5_0171_9592_B3C2_C19EC426AD34__DEFINED_)
+#define AIRPCAP_HANDLE__EAE405F5_0171_9592_B3C2_C19EC426AD34__DEFINED_
+typedef struct _AirpcapHandle *PAirpcapHandle;
+#endif /* AIRPCAP_HANDLE__EAE405F5_0171_9592_B3C2_C19EC426AD34__DEFINED_ */
+#endif /* HAVE_AIRPCAP_API */
+
+#ifdef HAVE_DAG_API
+#include <dagc.h>
+#endif /* HAVE_DAG_API */
+
+// Working modes
+#define PACKET_MODE_CAPT 0x0 ///< Capture mode
+#define PACKET_MODE_STAT 0x1 ///< Statistical mode
+#define PACKET_MODE_MON 0x2 ///< Monitoring mode
+#define PACKET_MODE_DUMP 0x10 ///< Dump mode
+#define PACKET_MODE_STAT_DUMP MODE_DUMP | MODE_STAT ///< Statistical dump Mode
+
+
+/// Alignment macro. Defines the alignment size.
+#define Packet_ALIGNMENT sizeof(int)
+/// Alignment macro. Rounds up to the next even multiple of Packet_ALIGNMENT. 
+#define Packet_WORDALIGN(x) (((x)+(Packet_ALIGNMENT-1))&~(Packet_ALIGNMENT-1))
+
+#define NdisMediumNull	-1		///< Custom linktype: NDIS doesn't provide an equivalent
+#define NdisMediumCHDLC	-2		///< Custom linktype: NDIS doesn't provide an equivalent
+#define NdisMediumPPPSerial	-3	///< Custom linktype: NDIS doesn't provide an equivalent
+#define NdisMediumBare80211	-4	///< Custom linktype: NDIS doesn't provide an equivalent
+#define NdisMediumRadio80211	-5	///< Custom linktype: NDIS doesn't provide an equivalent
+#define NdisMediumPpi		-6	///< Custom linktype: NDIS doesn't provide an equivalent
+
+// Loopback behaviour definitions
+#define NPF_DISABLE_LOOPBACK	1	///< Drop the packets sent by the NPF driver
+#define NPF_ENABLE_LOOPBACK		2	///< Capture the packets sent by the NPF driver
+
+/*!
+  \brief Network type structure.
+
+  This structure is used by the PacketGetNetType() function to return information on the current adapter's type and speed.
+*/
+typedef struct NetType
+{
+	UINT LinkType;	///< The MAC of the current network adapter (see function PacketGetNetType() for more information)
+	ULONGLONG LinkSpeed;	///< The speed of the network in bits per second
+}NetType;
+
+
+//some definitions stolen from libpcap
+
+#ifndef BPF_MAJOR_VERSION
+
+/*!
+  \brief A BPF pseudo-assembly program.
+
+  The program will be injected in the kernel by the PacketSetBPF() function and applied to every incoming packet. 
+*/
+struct bpf_program 
+{
+	UINT bf_len;				///< Indicates the number of instructions of the program, i.e. the number of struct bpf_insn that will follow.
+	struct bpf_insn *bf_insns;	///< A pointer to the first instruction of the program.
+};
+
+/*!
+  \brief A single BPF pseudo-instruction.
+
+  bpf_insn contains a single instruction for the BPF register-machine. It is used to send a filter program to the driver.
+*/
+struct bpf_insn 
+{
+	USHORT	code;		///< Instruction type and addressing mode.
+	UCHAR 	jt;			///< Jump if true
+	UCHAR 	jf;			///< Jump if false
+	int k;				///< Generic field used for various purposes.
+};
+
+/*!
+  \brief Structure that contains a couple of statistics values on the current capture.
+
+  It is used by packet.dll to return statistics about a capture session.
+*/
+struct bpf_stat 
+{
+	UINT bs_recv;		///< Number of packets that the driver received from the network adapter 
+						///< from the beginning of the current capture. This value includes the packets 
+						///< lost by the driver.
+	UINT bs_drop;		///< number of packets that the driver lost from the beginning of a capture. 
+						///< Basically, a packet is lost when the the buffer of the driver is full. 
+						///< In this situation the packet cannot be stored and the driver rejects it.
+	UINT ps_ifdrop;		///< drops by interface. XXX not yet supported
+	UINT bs_capt;		///< number of packets that pass the filter, find place in the kernel buffer and
+						///< thus reach the application.
+};
+
+/*!
+  \brief Packet header.
+
+  This structure defines the header associated with every packet delivered to the application.
+*/
+struct bpf_hdr 
+{
+	struct timeval	bh_tstamp;	///< The timestamp associated with the captured packet. 
+								///< It is stored in a TimeVal structure.
+	UINT	bh_caplen;			///< Length of captured portion. The captured portion <b>can be different</b>
+								///< from the original packet, because it is possible (with a proper filter)
+								///< to instruct the driver to capture only a portion of the packets.
+	UINT	bh_datalen;			///< Original length of packet
+	USHORT		bh_hdrlen;		///< Length of bpf header (this struct plus alignment padding). In some cases,
+								///< a padding could be added between the end of this structure and the packet
+								///< data for performance reasons. This filed can be used to retrieve the actual data 
+								///< of the packet.
+};
+
+/*!
+  \brief Dump packet header.
+
+  This structure defines the header associated with the packets in a buffer to be used with PacketSendPackets().
+  It is simpler than the bpf_hdr, because it corresponds to the header associated by WinPcap and libpcap to a
+  packet in a dump file. This makes straightforward sending WinPcap dump files to the network.
+*/
+struct dump_bpf_hdr{
+    struct timeval	ts;			///< Time stamp of the packet
+    UINT			caplen;		///< Length of captured portion. The captured portion can smaller than the 
+								///< the original packet, because it is possible (with a proper filter) to 
+								///< instruct the driver to capture only a portion of the packets. 
+    UINT			len;		///< Length of the original packet (off wire).
+};
+
+
+#endif
+
+struct bpf_stat;
+
+#define        DOSNAMEPREFIX   TEXT("Packet_")	///< Prefix added to the adapters device names to create the WinPcap devices
+#define        MAX_LINK_NAME_LENGTH	64			//< Maximum length of the devices symbolic links
+#define        NMAX_PACKET 65535
+
+/*!
+  \brief Addresses of a network adapter.
+
+  This structure is used by the PacketGetNetInfoEx() function to return the IP addresses associated with 
+  an adapter.
+*/
+typedef struct npf_if_addr {
+	struct sockaddr_storage IPAddress;	///< IP address.
+	struct sockaddr_storage SubnetMask;	///< Netmask for that address.
+	struct sockaddr_storage Broadcast;	///< Broadcast address.
+}npf_if_addr;
+
+
+#define ADAPTER_NAME_LENGTH 256 + 12	///<  Maximum length for the name of an adapter. The value is the same used by the IP Helper API.
+#define ADAPTER_DESC_LENGTH 128			///<  Maximum length for the description of an adapter. The value is the same used by the IP Helper API.
+#define MAX_MAC_ADDR_LENGTH 8			///<  Maximum length for the link layer address of an adapter. The value is the same used by the IP Helper API.
+#define MAX_NETWORK_ADDRESSES 16		///<  Maximum length for the link layer address of an adapter. The value is the same used by the IP Helper API.
+
+
+typedef struct WAN_ADAPTER_INT WAN_ADAPTER; ///< Describes an opened wan (dialup, VPN...) network adapter using the NetMon API
+typedef WAN_ADAPTER *PWAN_ADAPTER; ///< Describes an opened wan (dialup, VPN...) network adapter using the NetMon API
+
+#define INFO_FLAG_NDIS_ADAPTER		0	///< Flag for ADAPTER_INFO: this is a traditional ndis adapter
+#define INFO_FLAG_NDISWAN_ADAPTER	1	///< Flag for ADAPTER_INFO: this is a NdisWan adapter, and it's managed by WANPACKET
+#define INFO_FLAG_DAG_CARD			2	///< Flag for ADAPTER_INFO: this is a DAG card
+#define INFO_FLAG_DAG_FILE			6	///< Flag for ADAPTER_INFO: this is a DAG file
+#define INFO_FLAG_DONT_EXPORT		8	///< Flag for ADAPTER_INFO: when this flag is set, the adapter will not be listed or openend by winpcap. This allows to prevent exporting broken network adapters, like for example FireWire ones.
+#define INFO_FLAG_AIRPCAP_CARD		16	///< Flag for ADAPTER_INFO: this is an airpcap card
+#define INFO_FLAG_NPFIM_DEVICE		32
+
+/*!
+  \brief Describes an opened network adapter.
+
+  This structure is the most important for the functioning of packet.dll, but the great part of its fields
+  should be ignored by the user, since the library offers functions that avoid to cope with low-level parameters
+*/
+typedef struct _ADAPTER  { 
+	HANDLE hFile;				///< \internal Handle to an open instance of the NPF driver.
+	CHAR  SymbolicLink[MAX_LINK_NAME_LENGTH]; ///< \internal A string containing the name of the network adapter currently opened.
+	int NumWrites;				///< \internal Number of times a packets written on this adapter will be repeated 
+								///< on the wire.
+	HANDLE ReadEvent;			///< A notification event associated with the read calls on the adapter.
+								///< It can be passed to standard Win32 functions (like WaitForSingleObject
+								///< or WaitForMultipleObjects) to wait until the driver's buffer contains some 
+								///< data. It is particularly useful in GUI applications that need to wait 
+								///< concurrently on several events. In Windows NT/2000 the PacketSetMinToCopy()
+								///< function can be used to define the minimum amount of data in the kernel buffer
+								///< that will cause the event to be signalled. 
+	
+	UINT ReadTimeOut;			///< \internal The amount of time after which a read on the driver will be released and 
+								///< ReadEvent will be signaled, also if no packets were captured
+	CHAR Name[ADAPTER_NAME_LENGTH];
+	PWAN_ADAPTER pWanAdapter;
+	UINT Flags;					///< Adapter's flags. Tell if this adapter must be treated in a different way, using the Netmon API or the dagc API.
+
+#ifdef HAVE_AIRPCAP_API
+	PAirpcapHandle	AirpcapAd;
+#endif // HAVE_AIRPCAP_API
+
+#ifdef HAVE_NPFIM_API
+	void* NpfImHandle;
+#endif // HAVE_NPFIM_API
+
+#ifdef HAVE_DAG_API
+	dagc_t *pDagCard;			///< Pointer to the dagc API adapter descriptor for this adapter
+	PCHAR DagBuffer;			///< Pointer to the buffer with the packets that is received from the DAG card
+	struct timeval DagReadTimeout;	///< Read timeout. The dagc API requires a timeval structure
+	unsigned DagFcsLen;			///< Length of the frame check sequence attached to any packet by the card. Obtained from the registry
+	DWORD DagFastProcess;		///< True if the user requests fast capture processing on this card. Higher level applications can use this value to provide a faster but possibly unprecise capture (for example, libpcap doesn't convert the timestamps).
+#endif // HAVE_DAG_API
+}  ADAPTER, *LPADAPTER;
+
+/*!
+  \brief Structure that contains a group of packets coming from the driver.
+
+  This structure defines the header associated with every packet delivered to the application.
+*/
+typedef struct _PACKET {  
+	HANDLE       hEvent;		///< \deprecated Still present for compatibility with old applications.
+	OVERLAPPED   OverLapped;	///< \deprecated Still present for compatibility with old applications.
+	PVOID        Buffer;		///< Buffer with containing the packets. See the PacketReceivePacket() for
+								///< details about the organization of the data in this buffer
+	UINT         Length;		///< Length of the buffer
+	DWORD        ulBytesReceived;	///< Number of valid bytes present in the buffer, i.e. amount of data
+									///< received by the last call to PacketReceivePacket()
+	BOOLEAN      bIoComplete;	///< \deprecated Still present for compatibility with old applications.
+}  PACKET, *LPPACKET;
+
+/*!
+  \brief Structure containing an OID request.
+
+  It is used by the PacketRequest() function to send an OID to the interface card driver. 
+  It can be used, for example, to retrieve the status of the error counters on the adapter, its MAC address, 
+  the list of the multicast groups defined on it, and so on.
+*/
+struct _PACKET_OID_DATA {
+    ULONG Oid;					///< OID code. See the Microsoft DDK documentation or the file ntddndis.h
+								///< for a complete list of valid codes.
+    ULONG Length;				///< Length of the data field
+    UCHAR Data[1];				///< variable-lenght field that contains the information passed to or received 
+								///< from the adapter.
+}; 
+typedef struct _PACKET_OID_DATA PACKET_OID_DATA, *PPACKET_OID_DATA;
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ *  @}
+ */
+
+/*
+BOOLEAN QueryWinPcapRegistryStringA(CHAR *SubKeyName,
+								 CHAR *Value,
+								 UINT *pValueLen,
+								 CHAR *DefaultVal);
+
+BOOLEAN QueryWinPcapRegistryStringW(WCHAR *SubKeyName,
+								 WCHAR *Value,
+								 UINT *pValueLen,
+								 WCHAR *DefaultVal);
+*/
+								 
+//---------------------------------------------------------------------------
+// EXPORTED FUNCTIONS
+//---------------------------------------------------------------------------
+
+PCHAR PacketGetVersion();
+PCHAR PacketGetDriverVersion();
+BOOLEAN PacketSetMinToCopy(LPADAPTER AdapterObject,int nbytes);
+BOOLEAN PacketSetNumWrites(LPADAPTER AdapterObject,int nwrites);
+BOOLEAN PacketSetMode(LPADAPTER AdapterObject,int mode);
+BOOLEAN PacketSetReadTimeout(LPADAPTER AdapterObject,int timeout);
+BOOLEAN PacketSetBpf(LPADAPTER AdapterObject,struct bpf_program *fp);
+BOOLEAN PacketSetLoopbackBehavior(LPADAPTER  AdapterObject, UINT LoopbackBehavior);
+INT PacketSetSnapLen(LPADAPTER AdapterObject,int snaplen);
+BOOLEAN PacketGetStats(LPADAPTER AdapterObject,struct bpf_stat *s);
+BOOLEAN PacketGetStatsEx(LPADAPTER AdapterObject,struct bpf_stat *s);
+BOOLEAN PacketSetBuff(LPADAPTER AdapterObject,int dim);
+BOOLEAN PacketGetNetType (LPADAPTER AdapterObject,NetType *type);
+LPADAPTER PacketOpenAdapter(PCHAR AdapterName);
+BOOLEAN PacketSendPacket(LPADAPTER AdapterObject,LPPACKET pPacket,BOOLEAN Sync);
+INT PacketSendPackets(LPADAPTER AdapterObject,PVOID PacketBuff,ULONG Size, BOOLEAN Sync);
+LPPACKET PacketAllocatePacket(void);
+VOID PacketInitPacket(LPPACKET lpPacket,PVOID  Buffer,UINT  Length);
+VOID PacketFreePacket(LPPACKET lpPacket);
+BOOLEAN PacketReceivePacket(LPADAPTER AdapterObject,LPPACKET lpPacket,BOOLEAN Sync);
+BOOLEAN PacketSetHwFilter(LPADAPTER AdapterObject,ULONG Filter);
+BOOLEAN PacketGetAdapterNames(PTSTR pStr,PULONG  BufferSize);
+BOOLEAN PacketGetNetInfoEx(PCHAR AdapterName, npf_if_addr* buffer, PLONG NEntries);
+BOOLEAN PacketRequest(LPADAPTER  AdapterObject,BOOLEAN Set,PPACKET_OID_DATA  OidData);
+HANDLE PacketGetReadEvent(LPADAPTER AdapterObject);
+BOOLEAN PacketSetDumpName(LPADAPTER AdapterObject, void *name, int len);
+BOOLEAN PacketSetDumpLimits(LPADAPTER AdapterObject, UINT maxfilesize, UINT maxnpacks);
+BOOLEAN PacketIsDumpEnded(LPADAPTER AdapterObject, BOOLEAN sync);
+BOOL PacketStopDriver();
+VOID PacketCloseAdapter(LPADAPTER lpAdapter);
+BOOLEAN PacketStartOem(PCHAR errorString, UINT errorStringLength);
+BOOLEAN PacketStartOemEx(PCHAR errorString, UINT errorStringLength, ULONG flags);
+PAirpcapHandle PacketGetAirPcapHandle(LPADAPTER AdapterObject);
+
+//
+// Used by PacketStartOemEx
+//
+#define PACKET_START_OEM_NO_NETMON	0x00000001
+
+#ifdef __cplusplus
+}
+#endif 
+
+#endif //__PACKET32
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/PacketData.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/PacketData.h
new file mode 100644
index 000000000..dd3d225e4
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/PacketData.h
@@ -0,0 +1,270 @@
+char pkt1[] = {
+0x00, 0x01, 0x02, 0x45, 0x09, 0x11, 0x00, 0x14,
+0x22, 0xcb, 0x18, 0x2d, 0x08, 0x00, 0x45, 0x00,
+0x00, 0x30, 0x09, 0x9c, 0x40, 0x00, 0x80, 0x06,
+0x6f, 0x07, 0xc0, 0xa8, 0x00, 0xc8, 0xc0, 0xa8,
+0x00, 0x0c, 0x0f, 0xe2, 0x00, 0x50, 0x09, 0xe7,
+0xc7, 0x35, 0x00, 0x00, 0x00, 0x00, 0x70, 0x02,
+0x40, 0x00, 0xdf, 0xab, 0x00, 0x00, 0x02, 0x04,
+0x05, 0xb4, 0x01, 0x01, 0x04, 0x02 };
+
+char pkt2[] = {
+0x00, 0x14, 0x22, 0xcb, 0x18, 0x2d, 0x00, 0x01,
+0x02, 0x45, 0x09, 0x11, 0x08, 0x00, 0x45, 0x00,
+0x00, 0x2c, 0x00, 0x01, 0x00, 0x00, 0x40, 0x06,
+0xf8, 0xa6, 0xc0, 0xa8, 0x00, 0x0c, 0xc0, 0xa8,
+0x00, 0xc8, 0x00, 0x50, 0x0f, 0xe2, 0x00, 0x00,
+0x06, 0x68, 0x09, 0xe7, 0xc7, 0x36, 0x60, 0x12,
+0x05, 0x92, 0x28, 0xca, 0x00, 0x00, 0x02, 0x04,
+0x05, 0x92 };
+
+char pkt3[] = {
+0x00, 0x01, 0x02, 0x45, 0x09, 0x11, 0x00, 0x14,
+0x22, 0xcb, 0x18, 0x2d, 0x08, 0x00, 0x45, 0x00,
+0x00, 0x28, 0x09, 0x9e, 0x40, 0x00, 0x80, 0x06,
+0x6f, 0x0d, 0xc0, 0xa8, 0x00, 0xc8, 0xc0, 0xa8,
+0x00, 0x0c, 0x0f, 0xe2, 0x00, 0x50, 0x09, 0xe7,
+0xc7, 0x36, 0x00, 0x00, 0x06, 0x69, 0x50, 0x10,
+0x42, 0xd8, 0x82, 0x3f, 0x00, 0x00 };
+
+char pkt4[] = {
+0x00, 0x01, 0x02, 0x45, 0x09, 0x11, 0x00, 0x14,
+0x22, 0xcb, 0x18, 0x2d, 0x08, 0x00, 0x45, 0x00,
+0x02, 0x27, 0x09, 0x9f, 0x40, 0x00, 0x80, 0x06,
+0x6d, 0x0d, 0xc0, 0xa8, 0x00, 0xc8, 0xc0, 0xa8,
+0x00, 0x0c, 0x0f, 0xe2, 0x00, 0x50, 0x09, 0xe7,
+0xc7, 0x36, 0x00, 0x00, 0x06, 0x69, 0x50, 0x18,
+0x42, 0xd8, 0x84, 0x3e, 0x00, 0x00, 0x47, 0x45,
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+0x65, 0x0d, 0x0a, 0x0d, 0x0a };
+
+char pkt5[] = {
+0x00, 0x14, 0x22, 0xcb, 0x18, 0x2d, 0x00, 0x01,
+0x02, 0x45, 0x09, 0x11, 0x08, 0x00, 0x45, 0x00,
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+0x05, 0x92, 0x28, 0xca, 0x00, 0x00, 0x02, 0x04,
+0x05, 0x92 };
+
+char pkt6[] = {
+0x00, 0x01, 0x02, 0x45, 0x09, 0x11, 0x00, 0x14,
+0x22, 0xcb, 0x18, 0x2d, 0x08, 0x00, 0x45, 0x00,
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+0xc9, 0x35, 0x00, 0x00, 0x06, 0x69, 0x50, 0x10,
+0x42, 0xd8, 0x82, 0x3f, 0x00, 0x00 };
+
+char pkt7[] = {
+0x00, 0x01, 0x02, 0x45, 0x09, 0x11, 0x00, 0x14,
+0x22, 0xcb, 0x18, 0x2d, 0x08, 0x00, 0x45, 0x00,
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+0x45, 0x54, 0x20, 0x43, 0x4c, 0x52, 0x20, 0x32,
+0x2e, 0x30, 0x2e, 0x35, 0x30, 0x37, 0x32, 0x37,
+0x3b, 0x20, 0x2e, 0x4e, 0x45, 0x54, 0x20, 0x43,
+0x4c, 0x52, 0x20, 0x33, 0x2e, 0x30, 0x2e, 0x30,
+0x34, 0x35, 0x30, 0x36, 0x2e, 0x36, 0x34, 0x38,
+0x3b, 0x20, 0x2e, 0x4e, 0x45, 0x54, 0x20, 0x43,
+0x4c, 0x52, 0x20, 0x33, 0x2e, 0x35, 0x2e, 0x32,
+0x31, 0x30, 0x32, 0x32, 0x29, 0x0d, 0x0a, 0x48,
+0x6f, 0x73, 0x74, 0x3a, 0x20, 0x31, 0x39, 0x32,
+0x2e, 0x31, 0x36, 0x38, 0x2e, 0x30, 0x2e, 0x31,
+0x32, 0x0d, 0x0a, 0x43, 0x6f, 0x6e, 0x6e, 0x65,
+0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x4b,
+0x65, 0x65, 0x70, 0x2d, 0x41, 0x6c, 0x69, 0x76,
+0x65, 0x0d, 0x0a, 0x0d, 0x0a };
+
+char pkt8[] = {
+0x00, 0x14, 0x22, 0xcb, 0x18, 0x2d, 0x00, 0x01,
+0x02, 0x45, 0x09, 0x11, 0x08, 0x00, 0x45, 0x00,
+0x00, 0x2c, 0x00, 0x03, 0x00, 0x00, 0x40, 0x06,
+0xf8, 0xa4, 0xc0, 0xa8, 0x00, 0x0c, 0xc0, 0xa8,
+0x00, 0xc8, 0x00, 0x50, 0x0f, 0xe2, 0x00, 0x00,
+0x06, 0x68, 0x09, 0xe7, 0xc7, 0x36, 0x60, 0x12,
+0x05, 0x92, 0x28, 0xca, 0x00, 0x00, 0x02, 0x04,
+0x05, 0x92 };
+
+char pkt9[] = {
+0x00, 0x01, 0x02, 0x45, 0x09, 0x11, 0x00, 0x14,
+0x22, 0xcb, 0x18, 0x2d, 0x08, 0x00, 0x45, 0x00,
+0x00, 0x28, 0x09, 0xa3, 0x40, 0x00, 0x80, 0x06,
+0x6f, 0x08, 0xc0, 0xa8, 0x00, 0xc8, 0xc0, 0xa8,
+0x00, 0x0c, 0x0f, 0xe2, 0x00, 0x50, 0x09, 0xe7,
+0xc9, 0x35, 0x00, 0x00, 0x06, 0x69, 0x50, 0x10,
+0x42, 0xd8, 0x82, 0x3f, 0x00, 0x00 };
+
+char pkt10[] = {
+0x00, 0x14, 0x22, 0xcb, 0x18, 0x2d, 0x00, 0x01,
+0x02, 0x45, 0x09, 0x11, 0x08, 0x00, 0x45, 0x00,
+0x00, 0x2c, 0x00, 0x04, 0x00, 0x00, 0x40, 0x06,
+0xf8, 0xa3, 0xc0, 0xa8, 0x00, 0x0c, 0xc0, 0xa8,
+0x00, 0xc8, 0x00, 0x50, 0x0f, 0xe2, 0x00, 0x00,
+0x06, 0x68, 0x09, 0xe7, 0xc7, 0x36, 0x60, 0x12,
+0x05, 0x92, 0x28, 0xca, 0x00, 0x00, 0x02, 0x04,
+0x05, 0x92 };
+
+char pkt11[] = {
+0x00, 0x01, 0x02, 0x45, 0x09, 0x11, 0x00, 0x14,
+0x22, 0xcb, 0x18, 0x2d, 0x08, 0x00, 0x45, 0x00,
+0x00, 0x28, 0x09, 0xa6, 0x40, 0x00, 0x80, 0x06,
+0x6f, 0x05, 0xc0, 0xa8, 0x00, 0xc8, 0xc0, 0xa8,
+0x00, 0x0c, 0x0f, 0xe2, 0x00, 0x50, 0x09, 0xe7,
+0xc9, 0x35, 0x00, 0x00, 0x06, 0x69, 0x50, 0x10,
+0x42, 0xd8, 0x82, 0x3f, 0x00, 0x00 };
+
+char pkt12[] = {
+0x00, 0x01, 0x02, 0x45, 0x09, 0x11, 0x00, 0x14,
+0x22, 0xcb, 0x18, 0x2d, 0x08, 0x00, 0x45, 0x00,
+0x00, 0x28, 0x09, 0xa7, 0x40, 0x00, 0x80, 0x06,
+0x6f, 0x04, 0xc0, 0xa8, 0x00, 0xc8, 0xc0, 0xa8,
+0x00, 0x0c, 0x0f, 0xe2, 0x00, 0x50, 0x09, 0xe7,
+0xc9, 0x35, 0x00, 0x00, 0x06, 0x69, 0x50, 0x14,
+0x00, 0x00, 0x43, 0xf4, 0x00, 0x00 };
+
+
+typedef struct
+{
+	char *pcData;
+	int iDataLen;
+} xPacketData;
+
+xPacketData xAllPackets[] =
+{
+/* These comments below are there so that we may modify
+ * them as and when required. Keeping them unmodified.
+ * Might be removed in later incremental PRs */
+	{ pkt1, sizeof( pkt1 ) },
+/*	{ pkt2, sizeof( pkt2 ) },  */
+	{ pkt3, sizeof( pkt3 ) },
+	{ pkt4, sizeof( pkt4 ) },
+/*	{ pkt5, sizeof( pkt5 ) },  */
+	{ pkt6, sizeof( pkt6 ) },
+	{ pkt7, sizeof( pkt7 ) },
+	{ pkt8, sizeof( pkt8 ) },
+	{ pkt9, sizeof( pkt9 ) },
+	{ pkt10, sizeof( pkt10 ) },
+/*	{ pkt11, sizeof( pkt11 ) },  */
+/*	{ pkt12, sizeof( pkt12 ) },  */
+/*	{ pkt13, sizeof( pkt13 ) },  */
+/*	{ pkt14, sizeof( pkt14 ) },  */
+/*	{ pkt15, sizeof( pkt15 ) },  */
+/*	{ pkt16, sizeof( pkt16 ) },  */
+};
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/Win32-Extensions.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/Win32-Extensions.h
new file mode 100644
index 000000000..bad7c33ac
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/Win32-Extensions.h
@@ -0,0 +1,114 @@
+/*
+ * Copyright (c) 1999 - 2005 NetGroup, Politecnico di Torino (Italy)
+ * Copyright (c) 2005 - 2006 CACE Technologies, Davis (California)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Politecnico di Torino, CACE Technologies 
+ * nor the names of its contributors may be used to endorse or promote 
+ * products derived from this software without specific prior written 
+ * permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+
+#ifndef __WIN32_EXTENSIONS_H__
+#define __WIN32_EXTENSIONS_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Definitions */
+
+/*!
+  \brief A queue of raw packets that will be sent to the network with pcap_sendqueue_transmit().
+*/
+struct pcap_send_queue
+{
+	u_int maxlen;		///< Maximum size of the the queue, in bytes. This variable contains the size of the buffer field.
+	u_int len;			///< Current size of the queue, in bytes.
+	char *buffer;		///< Buffer containing the packets to be sent.
+};
+
+typedef struct pcap_send_queue pcap_send_queue;
+
+/*!
+  \brief This typedef is a support for the pcap_get_airpcap_handle() function
+*/
+#if !defined(AIRPCAP_HANDLE__EAE405F5_0171_9592_B3C2_C19EC426AD34__DEFINED_)
+#define AIRPCAP_HANDLE__EAE405F5_0171_9592_B3C2_C19EC426AD34__DEFINED_
+typedef struct _AirpcapHandle *PAirpcapHandle;
+#endif
+
+#define		BPF_MEM_EX_IMM	0xc0
+#define		BPF_MEM_EX_IND	0xe0
+
+/*used for ST*/
+#define		BPF_MEM_EX		0xc0
+#define		BPF_TME					0x08
+
+#define		BPF_LOOKUP				0x90   
+#define		BPF_EXECUTE				0xa0
+#define		BPF_INIT				0xb0
+#define		BPF_VALIDATE			0xc0
+#define		BPF_SET_ACTIVE			0xd0
+#define		BPF_RESET				0xe0
+#define		BPF_SET_MEMORY			0x80
+#define		BPF_GET_REGISTER_VALUE	0x70
+#define		BPF_SET_REGISTER_VALUE	0x60
+#define		BPF_SET_WORKING			0x50
+#define		BPF_SET_ACTIVE_READ		0x40
+#define		BPF_SET_AUTODELETION	0x30
+#define		BPF_SEPARATION			0xff
+
+/* Prototypes */
+pcap_send_queue* pcap_sendqueue_alloc(u_int memsize);
+
+void pcap_sendqueue_destroy(pcap_send_queue* queue);
+
+int pcap_sendqueue_queue(pcap_send_queue* queue, const struct pcap_pkthdr *pkt_header, const u_char *pkt_data);
+
+u_int pcap_sendqueue_transmit(pcap_t *p, pcap_send_queue* queue, int sync);
+
+HANDLE pcap_getevent(pcap_t *p);
+
+struct pcap_stat *pcap_stats_ex(pcap_t *p, int *pcap_stat_size);
+
+int pcap_setuserbuffer(pcap_t *p, int size);
+
+int pcap_live_dump(pcap_t *p, char *filename, int maxsize, int maxpacks);
+
+int pcap_live_dump_ended(pcap_t *p, int sync);
+
+int pcap_offline_filter(struct bpf_program *prog, const struct pcap_pkthdr *header, const u_char *pkt_data);
+
+int pcap_start_oem(char* err_str, int flags);
+
+PAirpcapHandle pcap_get_airpcap_handle(pcap_t *p);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //__WIN32_EXTENSIONS_H__
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/arch.c b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/arch.c
new file mode 100644
index 000000000..f5db41dae
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/arch.c
@@ -0,0 +1,336 @@
+/*
+ * FreeRTOS Kernel V10.3.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+/* WinPCap includes. */
+#include "pcap.h"
+#include "remote-ext.h"
+
+/* uIP includes. */
+#include "net/uip.h"
+#include "net/uip_arp.h"
+#include "net/clock-arch.h"
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "queue.h"
+
+/*
+ * Query the computer the simulation is being executed on to find the network
+ * interfaces it has installed.
+ */
+static pcap_if_t * prvPrintAvailableNetworkInterfaces( void );
+
+/*
+ * Open the network interface.  The number of the interface to be opened is set
+ * by the configNETWORK_INTERFACE_TO_USE constant in FreeRTOSConfig.h.
+ */
+static void prvOpenSelectedNetworkInterface( pcap_if_t *pxAllNetworkInterfaces );
+
+/*
+ * Configure the capture filter to allow blocking reads, and to filter out
+ * packets that are not of interest to this demo.
+ */
+static void prvConfigureCaptureBehaviour( void );
+
+pcap_t *pxOpenedInterfaceHandle = NULL;
+LARGE_INTEGER freq, sys_start_time;
+
+#define archNUM_BUFFERS	5
+#define archNUM_BUFFER_POINTERS ( archNUM_BUFFERS - 1 )
+
+static void prvInterruptSimulator( void *pvParameters );
+
+static unsigned char ucEthernetBuffer[ archNUM_BUFFERS ][ UIP_CONF_BUFFER_SIZE ];
+static unsigned char *pucEthernetBufferPointers[ archNUM_BUFFER_POINTERS ];
+
+static long lLengthOfDataInBuffer[ archNUM_BUFFER_POINTERS ] = { 0 };
+static unsigned char ucNextBufferToFill = 0U, ucNextBufferToProcess = 0U;
+
+unsigned char *uip_buf = NULL;
+char cErrorBuffer[PCAP_ERRBUF_SIZE];
+
+void vNetifTx( void )
+{
+	pcap_sendpacket( pxOpenedInterfaceHandle, uip_buf, uip_len );
+	pcap_sendpacket( pxOpenedInterfaceHandle, uip_buf, uip_len );
+}
+/*-----------------------------------------------------------*/
+
+UBaseType_t uxNetifRx( void )
+{
+UBaseType_t xDataLen;
+unsigned char *pucTemp;
+
+	/* Check there is really data available. */
+	xDataLen = lLengthOfDataInBuffer[ ucNextBufferToProcess ];
+	if( xDataLen != 0L )
+	{
+
+		/* The buffer pointed to by uip_buf is going to change.  Remember which
+		buffer uip_buf is currently pointing to. */
+		pucTemp = uip_buf;
+
+		/* Point uip_buf at the next buffer that contains data. */
+		uip_buf = pucEthernetBufferPointers[ ucNextBufferToProcess ];
+
+		/* The buffer pointed to by 
+		pucEthernetBufferPointeres[ ucNextBufferToProcess ] is now in use by
+		uip_buf, but the buffer uip_buf was pointing to on entry to this
+		function is free.  Set 
+		pucEthernetBufferPointeres[ ucNextBufferToProcess ] to the free 
+		buffer. */
+		pucEthernetBufferPointers[ ucNextBufferToProcess ] = pucTemp;
+		lLengthOfDataInBuffer[ ucNextBufferToProcess ] = 0L;
+
+		ucNextBufferToProcess++;
+		if( ucNextBufferToProcess >= archNUM_BUFFER_POINTERS )
+		{
+			ucNextBufferToProcess = 0L;
+		}
+	}
+
+	return xDataLen;
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xNetifInit( void )
+{
+BaseType_t x;
+pcap_if_t *pxAllNetworkInterfaces;
+
+	/* Allocate a free buffer to each buffer pointer. */
+	for( x = 0; x < sizeof( pucEthernetBufferPointers ) / sizeof( unsigned char * ); x++ )
+	{
+		pucEthernetBufferPointers[ x ] = &( ucEthernetBuffer[ x ][ 0 ] );
+	}
+
+	/* Start with uip_buf pointing to a buffer that is not referenced from the
+	pucEthernetBufferPointers[] array. */
+	uip_buf = &( ucEthernetBuffer[ archNUM_BUFFERS - 1 ][ 0 ] );
+
+	/* Query the computer the simulation is being executed on to find the 
+	network interfaces it has installed. */
+	pxAllNetworkInterfaces = prvPrintAvailableNetworkInterfaces();
+	
+	/* Open the network interface.  The number of the interface to be opened is 
+	set by the configNETWORK_INTERFACE_TO_USE constant in FreeRTOSConfig.h.
+	Calling this function will set the pxOpenedInterfaceHandle variable.  If,
+	after calling this function, pxOpenedInterfaceHandle is equal to NULL, then
+	the interface could not be opened. */
+	if( pxAllNetworkInterfaces != NULL )
+	{
+		prvOpenSelectedNetworkInterface( pxAllNetworkInterfaces );
+	}
+	
+
+	return x;
+}
+/*-----------------------------------------------------------*/
+
+static pcap_if_t * prvPrintAvailableNetworkInterfaces( void )
+{    
+pcap_if_t * pxAllNetworkInterfaces = NULL, *xInterface;
+long lInterfaceNumber = 1;
+
+    if( pcap_findalldevs_ex( PCAP_SRC_IF_STRING, NULL, &pxAllNetworkInterfaces, cErrorBuffer ) == -1 )
+    {
+        printf( "\r\nCould not obtain a list of network interfaces\r\n%s\r\n", cErrorBuffer );
+        pxAllNetworkInterfaces = NULL;
+    }
+
+	if( pxAllNetworkInterfaces != NULL )
+	{
+		/* Print out the list of network interfaces.  The first in the list
+		is interface '1', not interface '0'. */
+		for( xInterface = pxAllNetworkInterfaces; xInterface != NULL; xInterface = xInterface->next )
+		{
+			printf( "%d. %s", lInterfaceNumber, xInterface->name );
+			
+			if( xInterface->description != NULL )
+			{
+				printf( " (%s)\r\n", xInterface->description );
+			}
+			else
+			{
+				printf( " (No description available)\r\n") ;
+			}
+			
+			lInterfaceNumber++;
+		}
+	}
+
+    if( lInterfaceNumber == 1 )
+    {
+		/* The interface number was never incremented, so the above for() loop
+		did not execute meaning no interfaces were found. */
+        printf( " \r\nNo network interfaces were found.\r\n" );
+        pxAllNetworkInterfaces = NULL;
+    }
+
+	printf( "\r\nThe interface that will be opened is set by configNETWORK_INTERFACE_TO_USE which should be defined in FreeRTOSConfig.h\r\n" );
+	printf( "Attempting to open interface number %d.\r\n", configNETWORK_INTERFACE_TO_USE );
+	
+    if( ( configNETWORK_INTERFACE_TO_USE < 1L ) || ( configNETWORK_INTERFACE_TO_USE > lInterfaceNumber ) )
+    {
+        printf("\r\nconfigNETWORK_INTERFACE_TO_USE is not in the valid range.\r\n" );
+		
+		if( pxAllNetworkInterfaces != NULL )
+		{
+			/* Free the device list, as no devices are going to be opened. */
+			pcap_freealldevs( pxAllNetworkInterfaces );
+			pxAllNetworkInterfaces = NULL;
+		}
+    }
+
+	return pxAllNetworkInterfaces;
+}
+/*-----------------------------------------------------------*/
+
+static void prvOpenSelectedNetworkInterface( pcap_if_t *pxAllNetworkInterfaces )
+{
+pcap_if_t *xInterface;
+long x;
+
+    /* Walk the list of devices until the selected device is located. */
+	xInterface = pxAllNetworkInterfaces;
+    for( x = 0L; x < ( configNETWORK_INTERFACE_TO_USE - 1L ); x++ )
+	{
+		xInterface = xInterface->next;
+	}
+
+    /* Open the selected interface. */
+	pxOpenedInterfaceHandle = pcap_open(	xInterface->name,          	/* The name of the selected interface. */
+											UIP_CONF_BUFFER_SIZE, 		/* The size of the packet to capture. */
+											PCAP_OPENFLAG_PROMISCUOUS,	/* Open in promiscious mode as the MAC and 
+																		IP address is going to be "simulated", and 
+																		not be the real MAC and IP address.  This allows
+																		trafic to the simulated IP address to be routed
+																		to uIP, and trafic to the real IP address to be
+																		routed to the Windows TCP/IP stack. */
+											0xfffffffL,             	/* The read time out.  This is going to block
+																		until data is available. */
+											NULL,             			/* No authentication is required as this is
+																		not a remote capture session. */
+											cErrorBuffer            
+									   );
+									   
+    if ( pxOpenedInterfaceHandle == NULL )
+    {
+        printf( "\r\n%s is not supported by WinPcap and cannot be opened\r\n", xInterface->name );
+    }
+	else
+	{
+		/* Configure the capture filter to allow blocking reads, and to filter 
+		out packets that are not of interest to this demo. */
+		prvConfigureCaptureBehaviour();
+	}
+
+	/* The device list is no longer required. */
+	pcap_freealldevs( pxAllNetworkInterfaces );
+}
+/*-----------------------------------------------------------*/
+
+static void prvConfigureCaptureBehaviour( void )
+{
+struct bpf_program xFilterCode;
+const long lMinBytesToCopy = 10L, lBlocking = 0L;
+unsigned long ulNetMask;
+
+	/* Unblock a read as soon as anything is received. */
+	pcap_setmintocopy( pxOpenedInterfaceHandle, lMinBytesToCopy );
+
+	/* Allow blocking. */
+	pcap_setnonblock( pxOpenedInterfaceHandle, lBlocking, cErrorBuffer );
+
+	/* Set up a filter so only the packets of interest are passed to the uIP
+	stack.  cErrorBuffer is used for convenience to create the string.  Don't
+	confuse this with an error message. */
+	sprintf( cErrorBuffer, "broadcast or multicast or host %d.%d.%d.%d", configIP_ADDR0, configIP_ADDR1, configIP_ADDR2, configIP_ADDR3 );
+
+	ulNetMask = ( configNET_MASK3 << 24UL ) | ( configNET_MASK2 << 16UL ) | ( configNET_MASK1 << 8L ) | configNET_MASK0;
+
+	if( pcap_compile(pxOpenedInterfaceHandle, &xFilterCode, cErrorBuffer, 1, ulNetMask ) < 0 )
+    {
+        printf("\r\nThe packet filter string is invalid\r\n" );
+    }
+	else
+	{    
+		if( pcap_setfilter( pxOpenedInterfaceHandle, &xFilterCode ) < 0 )
+		{
+			printf( "\r\nAn error occurred setting the packet filter.\r\n" );
+		}
+	}
+
+	/* Create a task that simulates an interrupt in a real system.  This will
+	block waiting for packets, then send a message to the uIP task when data
+	is available. */
+	xTaskCreate( prvInterruptSimulator, ( signed char * ) "MAC_ISR", configMINIMAL_STACK_SIZE, NULL, ( configuIP_TASK_PRIORITY - 1 ), NULL );
+}
+/*-----------------------------------------------------------*/
+
+static void prvInterruptSimulator( void *pvParameters )
+{
+static struct pcap_pkthdr *pxHeader;
+const unsigned char *pucPacketData;
+extern QueueHandle_t xEMACEventQueue;
+const unsigned long ulRxEvent = uipETHERNET_RX_EVENT;
+long lResult;
+
+	/* Just to kill the compiler warning. */
+	( void ) pvParameters;
+
+	for( ;; )
+	{
+		/* Get the next packet. */
+		lResult = pcap_next_ex( pxOpenedInterfaceHandle, &pxHeader, &pucPacketData );
+		if( lResult )
+		{
+			/* Is the next buffer into which data should be placed free? */
+			if( lLengthOfDataInBuffer[ ucNextBufferToFill ] == 0L )
+			{
+				/* Copy the data from the captured packet into the buffer. */
+				memcpy( pucEthernetBufferPointers[ ucNextBufferToFill ], pucPacketData, pxHeader->len );
+
+				/* Note the amount of data that was copied. */
+				lLengthOfDataInBuffer[ ucNextBufferToFill ] = pxHeader->len;
+
+				/* Move onto the next buffer, wrapping around if necessary. */
+				ucNextBufferToFill++;
+				if( ucNextBufferToFill >= archNUM_BUFFER_POINTERS )
+				{
+					ucNextBufferToFill = 0U;
+				}
+
+				/* Data was received and stored.  Send a message to the uIP task
+				to let it know. */
+				xQueueSendToBack( xEMACEventQueue, &ulRxEvent, portMAX_DELAY );
+			}
+		}
+	}
+}
+
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/bittypes.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/bittypes.h
new file mode 100644
index 000000000..f55fcecfd
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/bittypes.h
@@ -0,0 +1,137 @@
+/*
+ * Copyright (C) 1999 WIDE Project.
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+#ifndef _BITTYPES_H
+#define _BITTYPES_H
+
+#ifndef HAVE_U_INT8_T
+
+#if SIZEOF_CHAR == 1
+typedef unsigned char u_int8_t;
+typedef signed char _int8_t;
+#elif SIZEOF_INT == 1
+typedef unsigned int u_int8_t;
+typedef signed int int8_t;
+#else  /* XXX */
+#error "there's no appropriate type for u_int8_t"
+#endif
+#define HAVE_U_INT8_T 1
+#define HAVE_INT8_T 1
+
+#endif /* HAVE_U_INT8_T */
+
+#ifndef HAVE_U_INT16_T 
+
+#if SIZEOF_SHORT == 2
+typedef unsigned short u_int16_t;
+typedef signed short _int16_t;
+#elif SIZEOF_INT == 2
+typedef unsigned int u_int16_t;
+typedef signed int int16_t;
+#elif SIZEOF_CHAR == 2
+typedef unsigned char u_int16_t;
+typedef signed char int16_t;
+#else  /* XXX */
+#error "there's no appropriate type for u_int16_t"
+#endif
+#define HAVE_U_INT16_T 1
+#define HAVE_INT16_T 1
+
+#endif /* HAVE_U_INT16_T */
+
+#ifndef HAVE_U_INT32_T
+
+#if SIZEOF_INT == 4
+typedef unsigned int u_int32_t;
+typedef signed int _int32_t;
+#elif SIZEOF_LONG == 4
+typedef unsigned long u_int32_t;
+typedef signed long int32_t;
+#elif SIZEOF_SHORT == 4
+typedef unsigned short u_int32_t;
+typedef signed short int32_t;
+#else  /* XXX */
+#error "there's no appropriate type for u_int32_t"
+#endif
+#define HAVE_U_INT32_T 1
+#define HAVE_INT32_T 1
+
+#endif /* HAVE_U_INT32_T */
+
+#ifndef HAVE_U_INT64_T
+#if SIZEOF_LONG_LONG == 8
+typedef unsigned long long u_int64_t;
+typedef long long int64_t;
+#elif defined(_MSC_EXTENSIONS)
+typedef unsigned _int64 u_int64_t;
+typedef _int64 int64_t;
+#elif SIZEOF_INT == 8
+typedef unsigned int u_int64_t;
+#elif SIZEOF_LONG == 8
+typedef unsigned long u_int64_t;
+#elif SIZEOF_SHORT == 8
+typedef unsigned short u_int64_t;
+#else  /* XXX */
+#error "there's no appropriate type for u_int64_t"
+#endif
+
+#endif /* HAVE_U_INT64_T */
+
+#ifndef PRId64
+#ifdef _MSC_EXTENSIONS
+#define PRId64	"I64d"
+#else /* _MSC_EXTENSIONS */
+#define PRId64	"lld"
+#endif /* _MSC_EXTENSIONS */
+#endif /* PRId64 */
+
+#ifndef PRIo64
+#ifdef _MSC_EXTENSIONS
+#define PRIo64	"I64o"
+#else /* _MSC_EXTENSIONS */
+#define PRIo64	"llo"
+#endif /* _MSC_EXTENSIONS */
+#endif /* PRIo64 */
+
+#ifndef PRIx64
+#ifdef _MSC_EXTENSIONS
+#define PRIx64	"I64x"
+#else /* _MSC_EXTENSIONS */
+#define PRIx64	"llx"
+#endif /* _MSC_EXTENSIONS */
+#endif /* PRIx64 */
+
+#ifndef PRIu64
+#ifdef _MSC_EXTENSIONS
+#define PRIu64	"I64u"
+#else /* _MSC_EXTENSIONS */
+#define PRIu64	"llu"
+#endif /* _MSC_EXTENSIONS */
+#endif /* PRIu64 */
+
+#endif /* _BITTYPES_H */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/ip6_misc.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/ip6_misc.h
new file mode 100644
index 000000000..562fa6184
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/ip6_misc.h
@@ -0,0 +1,163 @@
+/*
+ * Copyright (c) 1993, 1994, 1997
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that: (1) source code distributions
+ * retain the above copyright notice and this paragraph in its entirety, (2)
+ * distributions including binary code include the above copyright notice and
+ * this paragraph in its entirety in the documentation or other materials
+ * provided with the distribution, and (3) all advertising materials mentioning
+ * features or use of this software display the following acknowledgement:
+ * ``This product includes software developed by the University of California,
+ * Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+ * the University nor the names of its contributors may be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ * @(#) $Header: /tcpdump/master/libpcap/Win32/Include/ip6_misc.h,v 1.5 2006-01-22 18:02:18 gianluca Exp $ (LBL)
+ */
+
+/*
+ * This file contains a collage of declarations for IPv6 from FreeBSD not present in Windows
+ */
+
+#include <winsock2.h>
+
+#include <ws2tcpip.h>
+
+#ifndef __MINGW32__
+#define	IN_MULTICAST(a)		IN_CLASSD(a)
+#endif
+
+#define	IN_EXPERIMENTAL(a)	((((u_int32_t) (a)) & 0xf0000000) == 0xf0000000)
+
+#define	IN_LOOPBACKNET		127
+
+#if defined(__MINGW32__) && defined(DEFINE_ADDITIONAL_IPV6_STUFF)
+/* IPv6 address */
+struct in6_addr
+  {
+    union
+      {
+	u_int8_t		u6_addr8[16];
+	u_int16_t	u6_addr16[8];
+	u_int32_t	u6_addr32[4];
+      } in6_u;
+#define s6_addr			in6_u.u6_addr8
+#define s6_addr16		in6_u.u6_addr16
+#define s6_addr32		in6_u.u6_addr32
+#define s6_addr64		in6_u.u6_addr64
+  };
+
+#define IN6ADDR_ANY_INIT { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
+#define IN6ADDR_LOOPBACK_INIT { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1 }
+#endif /* __MINGW32__ */
+
+
+#if (defined _MSC_VER) || (defined(__MINGW32__) && defined(DEFINE_ADDITIONAL_IPV6_STUFF))
+typedef unsigned short	sa_family_t;
+#endif
+
+
+#if defined(__MINGW32__) && defined(DEFINE_ADDITIONAL_IPV6_STUFF)
+
+#define	__SOCKADDR_COMMON(sa_prefix) \
+  sa_family_t sa_prefix##family
+
+/* Ditto, for IPv6.  */
+struct sockaddr_in6
+  {
+    __SOCKADDR_COMMON (sin6_);
+    u_int16_t sin6_port;		/* Transport layer port # */
+    u_int32_t sin6_flowinfo;	/* IPv6 flow information */
+    struct in6_addr sin6_addr;	/* IPv6 address */
+  };
+
+#define IN6_IS_ADDR_V4MAPPED(a) \
+	((((u_int32_t *) (a))[0] == 0) && (((u_int32_t *) (a))[1] == 0) && \
+	 (((u_int32_t *) (a))[2] == htonl (0xffff)))
+
+#define IN6_IS_ADDR_MULTICAST(a) (((u_int8_t *) (a))[0] == 0xff)
+
+#define IN6_IS_ADDR_LINKLOCAL(a) \
+	((((u_int32_t *) (a))[0] & htonl (0xffc00000)) == htonl (0xfe800000))
+
+#define IN6_IS_ADDR_LOOPBACK(a) \
+	(((u_int32_t *) (a))[0] == 0 && ((u_int32_t *) (a))[1] == 0 && \
+	 ((u_int32_t *) (a))[2] == 0 && ((u_int32_t *) (a))[3] == htonl (1))
+#endif /* __MINGW32__ */
+
+#define ip6_vfc   ip6_ctlun.ip6_un2_vfc
+#define ip6_flow  ip6_ctlun.ip6_un1.ip6_un1_flow
+#define ip6_plen  ip6_ctlun.ip6_un1.ip6_un1_plen
+#define ip6_nxt   ip6_ctlun.ip6_un1.ip6_un1_nxt
+#define ip6_hlim  ip6_ctlun.ip6_un1.ip6_un1_hlim
+#define ip6_hops  ip6_ctlun.ip6_un1.ip6_un1_hlim
+
+#define nd_rd_type               nd_rd_hdr.icmp6_type
+#define nd_rd_code               nd_rd_hdr.icmp6_code
+#define nd_rd_cksum              nd_rd_hdr.icmp6_cksum
+#define nd_rd_reserved           nd_rd_hdr.icmp6_data32[0]
+
+/*
+ *	IPV6 extension headers
+ */
+#define IPPROTO_HOPOPTS		0	/* IPv6 hop-by-hop options	*/
+#define IPPROTO_IPV6		41  /* IPv6 header.  */
+#define IPPROTO_ROUTING		43	/* IPv6 routing header		*/
+#define IPPROTO_FRAGMENT	44	/* IPv6 fragmentation header	*/
+#define IPPROTO_ESP		50	/* encapsulating security payload */
+#define IPPROTO_AH		51	/* authentication header	*/
+#define IPPROTO_ICMPV6		58	/* ICMPv6			*/
+#define IPPROTO_NONE		59	/* IPv6 no next header		*/
+#define IPPROTO_DSTOPTS		60	/* IPv6 destination options	*/
+#define IPPROTO_PIM			103 /* Protocol Independent Multicast.  */
+
+#define	 IPV6_RTHDR_TYPE_0 0
+
+/* Option types and related macros */
+#define IP6OPT_PAD1		0x00	/* 00 0 00000 */
+#define IP6OPT_PADN		0x01	/* 00 0 00001 */
+#define IP6OPT_JUMBO		0xC2	/* 11 0 00010 = 194 */
+#define IP6OPT_JUMBO_LEN	6
+#define IP6OPT_ROUTER_ALERT	0x05	/* 00 0 00101 */
+
+#define IP6OPT_RTALERT_LEN	4
+#define IP6OPT_RTALERT_MLD	0	/* Datagram contains an MLD message */
+#define IP6OPT_RTALERT_RSVP	1	/* Datagram contains an RSVP message */
+#define IP6OPT_RTALERT_ACTNET	2 	/* contains an Active Networks msg */
+#define IP6OPT_MINLEN		2
+
+#define IP6OPT_BINDING_UPDATE	0xc6	/* 11 0 00110 */
+#define IP6OPT_BINDING_ACK	0x07	/* 00 0 00111 */
+#define IP6OPT_BINDING_REQ	0x08	/* 00 0 01000 */
+#define IP6OPT_HOME_ADDRESS	0xc9	/* 11 0 01001 */
+#define IP6OPT_EID		0x8a	/* 10 0 01010 */
+
+#define IP6OPT_TYPE(o)		((o) & 0xC0)
+#define IP6OPT_TYPE_SKIP	0x00
+#define IP6OPT_TYPE_DISCARD	0x40
+#define IP6OPT_TYPE_FORCEICMP	0x80
+#define IP6OPT_TYPE_ICMP	0xC0
+
+#define IP6OPT_MUTABLE		0x20
+
+
+#if defined(__MINGW32__) && defined(DEFINE_ADDITIONAL_IPV6_STUFF)
+#ifndef EAI_ADDRFAMILY
+struct addrinfo {
+	int	ai_flags;	/* AI_PASSIVE, AI_CANONNAME */
+	int	ai_family;	/* PF_xxx */
+	int	ai_socktype;	/* SOCK_xxx */
+	int	ai_protocol;	/* 0 or IPPROTO_xxx for IPv4 and IPv6 */
+	size_t	ai_addrlen;	/* length of ai_addr */
+	char	*ai_canonname;	/* canonical name for hostname */
+	struct sockaddr *ai_addr;	/* binary address */
+	struct addrinfo *ai_next;	/* next structure in linked list */
+};
+#endif
+#endif /* __MINGW32__ */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/netif.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/netif.h
new file mode 100644
index 000000000..837991409
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/netif.h
@@ -0,0 +1,52 @@
+/*
+ * FreeRTOS Kernel V10.3.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+#ifndef NET_IF_H
+#define NET_IF_H
+
+/*
+ * Send uip_len bytes from uip_buf to the network interface selected by the 
+ * configNETWORK_INTERFACE_TO_USE constant (defined in FreeRTOSConfig.h). 
+ */
+void vNetifTx( void );
+
+/*
+ * Receive bytes from the network interface selected by the 
+ * configNETWORK_INTERFACE_TO_USE constant (defined in FreeRTOSConfig.h).  The
+ * bytes are placed in uip_buf.  The number of bytes copied into uip_buf is
+ * returned.
+ */
+UBaseType_t uxNetifRx( void );
+
+/*
+ * Prepare a packet capture session.  This will print out all the network 
+ * interfaces available, and the one actually used is set by the 
+ * configNETWORK_INTERFACE_TO_USE constant that is defined in 
+ * FreeRTOSConfig.h. */
+BaseType_t xNetifInit( void );
+
+#endif /* NET_IF_H */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap-bpf.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap-bpf.h
new file mode 100644
index 000000000..5fe129dbb
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap-bpf.h
@@ -0,0 +1,47 @@
+/*-
+ * Copyright (c) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from the Stanford/CMU enet packet filter,
+ * (net/enet.c) distributed as part of 4.3BSD, and code contributed
+ * to Berkeley by Steven McCanne and Van Jacobson both of Lawrence 
+ * Berkeley Laboratory.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed by the University of
+ *      California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#) $Header: /tcpdump/master/libpcap/pcap-bpf.h,v 1.50 2007/04/01 21:43:55 guy Exp $ (LBL)
+ */
+
+/*
+ * For backwards compatibility.
+ *
+ * Note to OS vendors: do NOT get rid of this file!  Some applications
+ * might expect to be able to include <pcap-bpf.h>.
+ */
+#include <pcap/bpf.h>
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap-namedb.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap-namedb.h
new file mode 100644
index 000000000..80a2f0040
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap-namedb.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 1994, 1996
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the Computer Systems
+ *	Engineering Group at Lawrence Berkeley Laboratory.
+ * 4. Neither the name of the University nor of the Laboratory may be used
+ *    to endorse or promote products derived from this software without
+ *    specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#) $Header: /tcpdump/master/libpcap/pcap-namedb.h,v 1.13 2006/10/04 18:13:32 guy Exp $ (LBL)
+ */
+
+/*
+ * For backwards compatibility.
+ *
+ * Note to OS vendors: do NOT get rid of this file!  Some applications
+ * might expect to be able to include <pcap-namedb.h>.
+ */
+#include <pcap/namedb.h>
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap-stdinc.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap-stdinc.h
new file mode 100644
index 000000000..417604177
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap-stdinc.h
@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2002 - 2005 NetGroup, Politecnico di Torino (Italy)
+ * Copyright (c) 2005 - 2009 CACE Technologies, Inc. Davis (California)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Politecnico di Torino nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @(#) $Header: /tcpdump/master/libpcap/pcap-stdinc.h,v 1.10.2.1 2008-10-06 15:38:39 gianluca Exp $ (LBL)
+ */
+
+#define SIZEOF_CHAR 1
+#define SIZEOF_SHORT 2
+#define SIZEOF_INT 4
+#ifndef _MSC_EXTENSIONS
+#define SIZEOF_LONG_LONG 8
+#endif
+
+/*
+ * Avoids a compiler warning in case this was already defined      
+ * (someone defined _WINSOCKAPI_ when including 'windows.h', in order
+ * to prevent it from including 'winsock.h')
+ */
+#ifdef _WINSOCKAPI_
+#undef _WINSOCKAPI_
+#endif
+#include <winsock2.h>
+
+#include <fcntl.h>
+
+#include "bittypes.h"
+#include <time.h>
+#include <io.h>
+
+#ifndef __MINGW32__
+#include "IP6_misc.h"
+#endif
+
+#define caddr_t char*
+
+#if _MSC_VER < 1500
+#define snprintf _snprintf
+#define vsnprintf _vsnprintf
+#define strdup _strdup
+#endif
+
+#define inline __inline 
+
+#ifdef __MINGW32__
+#include <stdint.h>
+#else /*__MINGW32__*/
+/* MSVC compiler */
+#ifndef _UINTPTR_T_DEFINED
+#ifdef  _WIN64
+typedef unsigned __int64    uintptr_t;
+#else
+typedef _W64 unsigned int   uintptr_t;
+#endif
+#define _UINTPTR_T_DEFINED
+#endif
+
+#ifndef _INTPTR_T_DEFINED
+#ifdef  _WIN64
+typedef __int64    intptr_t;
+#else
+typedef _W64 int   intptr_t;
+#endif
+#define _INTPTR_T_DEFINED
+#endif 
+
+#endif /*__MINGW32__*/
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap.h
new file mode 100644
index 000000000..935f9494c
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 1993, 1994, 1995, 1996, 1997
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the Computer Systems
+ *	Engineering Group at Lawrence Berkeley Laboratory.
+ * 4. Neither the name of the University nor of the Laboratory may be used
+ *    to endorse or promote products derived from this software without
+ *    specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#) $Header: /tcpdump/master/libpcap/pcap.h,v 1.59 2006/10/04 18:09:22 guy Exp $ (LBL)
+ */
+
+/*
+ * For backwards compatibility.
+ *
+ * Note to OS vendors: do NOT get rid of this file!  Many applications
+ * expect to be able to include <pcap.h>, and at least some of them
+ * go through contortions in their configure scripts to try to detect
+ * OSes that have "helpfully" moved pcap.h to <pcap/pcap.h> without
+ * leaving behind a <pcap.h> file.
+ */
+#include <pcap/pcap.h>
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap/bluetooth.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap/bluetooth.h
new file mode 100644
index 000000000..7bf65df03
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap/bluetooth.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2006 Paolo Abeni (Italy)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote 
+ * products derived from this software without specific prior written 
+ * permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * bluetooth data struct
+ * By Paolo Abeni <paolo.abeni@email.it>
+ *
+ * @(#) $Header: /tcpdump/master/libpcap/pcap/bluetooth.h,v 1.1 2007/09/22 02:10:17 guy Exp $
+ */
+ 
+#ifndef _PCAP_BLUETOOTH_STRUCTS_H__
+#define _PCAP_BLUETOOTH_STRUCTS_H__
+
+/*
+ * Header prepended libpcap to each bluetooth h:4 frame.
+ * fields are in network byte order
+ */
+typedef struct _pcap_bluetooth_h4_header {
+	u_int32_t direction; /* if first bit is set direction is incoming */
+} pcap_bluetooth_h4_header;
+
+
+#endif
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap/bpf.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap/bpf.h
new file mode 100644
index 000000000..9f4ca33e3
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap/bpf.h
@@ -0,0 +1,934 @@
+/*-
+ * Copyright (c) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from the Stanford/CMU enet packet filter,
+ * (net/enet.c) distributed as part of 4.3BSD, and code contributed
+ * to Berkeley by Steven McCanne and Van Jacobson both of Lawrence 
+ * Berkeley Laboratory.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed by the University of
+ *      California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *      @(#)bpf.h       7.1 (Berkeley) 5/7/91
+ *
+ * @(#) $Header: /tcpdump/master/libpcap/pcap/bpf.h,v 1.19.2.8 2008-09-22 20:16:01 guy Exp $ (LBL)
+ */
+
+/*
+ * This is libpcap's cut-down version of bpf.h; it includes only
+ * the stuff needed for the code generator and the userland BPF
+ * interpreter, and the libpcap APIs for setting filters, etc..
+ *
+ * "pcap-bpf.c" will include the native OS version, as it deals with
+ * the OS's BPF implementation.
+ *
+ * XXX - should this all just be moved to "pcap.h"?
+ */
+
+#ifndef BPF_MAJOR_VERSION
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* BSD style release date */
+#define BPF_RELEASE 199606
+
+#ifdef MSDOS /* must be 32-bit */
+typedef long          bpf_int32;
+typedef unsigned long bpf_u_int32;
+#else
+typedef	int bpf_int32;
+typedef	u_int bpf_u_int32;
+#endif
+
+/*
+ * Alignment macros.  BPF_WORDALIGN rounds up to the next 
+ * even multiple of BPF_ALIGNMENT. 
+ */
+#ifndef __NetBSD__
+#define BPF_ALIGNMENT sizeof(bpf_int32)
+#else
+#define BPF_ALIGNMENT sizeof(long)
+#endif
+#define BPF_WORDALIGN(x) (((x)+(BPF_ALIGNMENT-1))&~(BPF_ALIGNMENT-1))
+
+#define BPF_MAXBUFSIZE 0x8000
+#define BPF_MINBUFSIZE 32
+
+/*
+ * Structure for "pcap_compile()", "pcap_setfilter()", etc..
+ */
+struct bpf_program {
+	u_int bf_len;
+	struct bpf_insn *bf_insns;
+};
+ 
+/*
+ * Struct return by BIOCVERSION.  This represents the version number of 
+ * the filter language described by the instruction encodings below.
+ * bpf understands a program iff kernel_major == filter_major &&
+ * kernel_minor >= filter_minor, that is, if the value returned by the
+ * running kernel has the same major number and a minor number equal
+ * equal to or less than the filter being downloaded.  Otherwise, the
+ * results are undefined, meaning an error may be returned or packets
+ * may be accepted haphazardly.
+ * It has nothing to do with the source code version.
+ */
+struct bpf_version {
+	u_short bv_major;
+	u_short bv_minor;
+};
+/* Current version number of filter architecture. */
+#define BPF_MAJOR_VERSION 1
+#define BPF_MINOR_VERSION 1
+
+/*
+ * Data-link level type codes.
+ *
+ * Do *NOT* add new values to this list without asking
+ * "tcpdump-workers@lists.tcpdump.org" for a value.  Otherwise, you run
+ * the risk of using a value that's already being used for some other
+ * purpose, and of having tools that read libpcap-format captures not
+ * being able to handle captures with your new DLT_ value, with no hope
+ * that they will ever be changed to do so (as that would destroy their
+ * ability to read captures using that value for that other purpose).
+ */
+
+/*
+ * These are the types that are the same on all platforms, and that
+ * have been defined by <net/bpf.h> for ages.
+ */
+#define DLT_NULL	0	/* BSD loopback encapsulation */
+#define DLT_EN10MB	1	/* Ethernet (10Mb) */
+#define DLT_EN3MB	2	/* Experimental Ethernet (3Mb) */
+#define DLT_AX25	3	/* Amateur Radio AX.25 */
+#define DLT_PRONET	4	/* Proteon ProNET Token Ring */
+#define DLT_CHAOS	5	/* Chaos */
+#define DLT_IEEE802	6	/* 802.5 Token Ring */
+#define DLT_ARCNET	7	/* ARCNET, with BSD-style header */
+#define DLT_SLIP	8	/* Serial Line IP */
+#define DLT_PPP		9	/* Point-to-point Protocol */
+#define DLT_FDDI	10	/* FDDI */
+
+/*
+ * These are types that are different on some platforms, and that
+ * have been defined by <net/bpf.h> for ages.  We use #ifdefs to
+ * detect the BSDs that define them differently from the traditional
+ * libpcap <net/bpf.h>
+ *
+ * XXX - DLT_ATM_RFC1483 is 13 in BSD/OS, and DLT_RAW is 14 in BSD/OS,
+ * but I don't know what the right #define is for BSD/OS.
+ */
+#define DLT_ATM_RFC1483	11	/* LLC-encapsulated ATM */
+
+#ifdef __OpenBSD__
+#define DLT_RAW		14	/* raw IP */
+#else
+#define DLT_RAW		12	/* raw IP */
+#endif
+
+/*
+ * Given that the only OS that currently generates BSD/OS SLIP or PPP
+ * is, well, BSD/OS, arguably everybody should have chosen its values
+ * for DLT_SLIP_BSDOS and DLT_PPP_BSDOS, which are 15 and 16, but they
+ * didn't.  So it goes.
+ */
+#if defined(__NetBSD__) || defined(__FreeBSD__)
+#ifndef DLT_SLIP_BSDOS
+#define DLT_SLIP_BSDOS	13	/* BSD/OS Serial Line IP */
+#define DLT_PPP_BSDOS	14	/* BSD/OS Point-to-point Protocol */
+#endif
+#else
+#define DLT_SLIP_BSDOS	15	/* BSD/OS Serial Line IP */
+#define DLT_PPP_BSDOS	16	/* BSD/OS Point-to-point Protocol */
+#endif
+
+/*
+ * 17 is used for DLT_OLD_PFLOG in OpenBSD;
+ *     OBSOLETE: DLT_PFLOG is 117 in OpenBSD now as well. See below.
+ * 18 is used for DLT_PFSYNC in OpenBSD; don't use it for anything else.
+ */
+
+#define DLT_ATM_CLIP	19	/* Linux Classical-IP over ATM */
+
+/*
+ * Apparently Redback uses this for its SmartEdge 400/800.  I hope
+ * nobody else decided to use it, too.
+ */
+#define DLT_REDBACK_SMARTEDGE	32
+
+/*
+ * These values are defined by NetBSD; other platforms should refrain from
+ * using them for other purposes, so that NetBSD savefiles with link
+ * types of 50 or 51 can be read as this type on all platforms.
+ */
+#define DLT_PPP_SERIAL	50	/* PPP over serial with HDLC encapsulation */
+#define DLT_PPP_ETHER	51	/* PPP over Ethernet */
+
+/*
+ * The Axent Raptor firewall - now the Symantec Enterprise Firewall - uses
+ * a link-layer type of 99 for the tcpdump it supplies.  The link-layer
+ * header has 6 bytes of unknown data, something that appears to be an
+ * Ethernet type, and 36 bytes that appear to be 0 in at least one capture
+ * I've seen.
+ */
+#define DLT_SYMANTEC_FIREWALL	99
+
+/*
+ * Values between 100 and 103 are used in capture file headers as
+ * link-layer types corresponding to DLT_ types that differ
+ * between platforms; don't use those values for new DLT_ new types.
+ */
+
+/*
+ * This value was defined by libpcap 0.5; platforms that have defined
+ * it with a different value should define it here with that value -
+ * a link type of 104 in a save file will be mapped to DLT_C_HDLC,
+ * whatever value that happens to be, so programs will correctly
+ * handle files with that link type regardless of the value of
+ * DLT_C_HDLC.
+ *
+ * The name DLT_C_HDLC was used by BSD/OS; we use that name for source
+ * compatibility with programs written for BSD/OS.
+ *
+ * libpcap 0.5 defined it as DLT_CHDLC; we define DLT_CHDLC as well,
+ * for source compatibility with programs written for libpcap 0.5.
+ */
+#define DLT_C_HDLC	104	/* Cisco HDLC */
+#define DLT_CHDLC	DLT_C_HDLC
+
+#define DLT_IEEE802_11	105	/* IEEE 802.11 wireless */
+
+/*
+ * 106 is reserved for Linux Classical IP over ATM; it's like DLT_RAW,
+ * except when it isn't.  (I.e., sometimes it's just raw IP, and
+ * sometimes it isn't.)  We currently handle it as DLT_LINUX_SLL,
+ * so that we don't have to worry about the link-layer header.)
+ */
+
+/*
+ * Frame Relay; BSD/OS has a DLT_FR with a value of 11, but that collides
+ * with other values.
+ * DLT_FR and DLT_FRELAY packets start with the Q.922 Frame Relay header
+ * (DLCI, etc.).
+ */
+#define DLT_FRELAY	107
+
+/*
+ * OpenBSD DLT_LOOP, for loopback devices; it's like DLT_NULL, except
+ * that the AF_ type in the link-layer header is in network byte order.
+ *
+ * DLT_LOOP is 12 in OpenBSD, but that's DLT_RAW in other OSes, so
+ * we don't use 12 for it in OSes other than OpenBSD.
+ */
+#ifdef __OpenBSD__
+#define DLT_LOOP	12
+#else
+#define DLT_LOOP	108
+#endif
+
+/*
+ * Encapsulated packets for IPsec; DLT_ENC is 13 in OpenBSD, but that's
+ * DLT_SLIP_BSDOS in NetBSD, so we don't use 13 for it in OSes other
+ * than OpenBSD.
+ */
+#ifdef __OpenBSD__
+#define DLT_ENC		13
+#else
+#define DLT_ENC		109
+#endif
+
+/*
+ * Values between 110 and 112 are reserved for use in capture file headers
+ * as link-layer types corresponding to DLT_ types that might differ
+ * between platforms; don't use those values for new DLT_ types
+ * other than the corresponding DLT_ types.
+ */
+
+/*
+ * This is for Linux cooked sockets.
+ */
+#define DLT_LINUX_SLL	113
+
+/*
+ * Apple LocalTalk hardware.
+ */
+#define DLT_LTALK	114
+
+/*
+ * Acorn Econet.
+ */
+#define DLT_ECONET	115
+
+/*
+ * Reserved for use with OpenBSD ipfilter.
+ */
+#define DLT_IPFILTER	116
+
+/*
+ * OpenBSD DLT_PFLOG; DLT_PFLOG is 17 in OpenBSD, but that's DLT_LANE8023
+ * in SuSE 6.3, so we can't use 17 for it in capture-file headers.
+ *
+ * XXX: is there a conflict with DLT_PFSYNC 18 as well?
+ */
+#ifdef __OpenBSD__
+#define DLT_OLD_PFLOG	17
+#define DLT_PFSYNC	18
+#endif
+#define DLT_PFLOG	117
+
+/*
+ * Registered for Cisco-internal use.
+ */
+#define DLT_CISCO_IOS	118
+
+/*
+ * For 802.11 cards using the Prism II chips, with a link-layer
+ * header including Prism monitor mode information plus an 802.11
+ * header.
+ */
+#define DLT_PRISM_HEADER	119
+
+/*
+ * Reserved for Aironet 802.11 cards, with an Aironet link-layer header
+ * (see Doug Ambrisko's FreeBSD patches).
+ */
+#define DLT_AIRONET_HEADER	120
+
+/*
+ * Reserved for Siemens HiPath HDLC.
+ */
+#define DLT_HHDLC		121
+
+/*
+ * This is for RFC 2625 IP-over-Fibre Channel.
+ *
+ * This is not for use with raw Fibre Channel, where the link-layer
+ * header starts with a Fibre Channel frame header; it's for IP-over-FC,
+ * where the link-layer header starts with an RFC 2625 Network_Header
+ * field.
+ */
+#define DLT_IP_OVER_FC		122
+
+/*
+ * This is for Full Frontal ATM on Solaris with SunATM, with a
+ * pseudo-header followed by an AALn PDU.
+ *
+ * There may be other forms of Full Frontal ATM on other OSes,
+ * with different pseudo-headers.
+ *
+ * If ATM software returns a pseudo-header with VPI/VCI information
+ * (and, ideally, packet type information, e.g. signalling, ILMI,
+ * LANE, LLC-multiplexed traffic, etc.), it should not use
+ * DLT_ATM_RFC1483, but should get a new DLT_ value, so tcpdump
+ * and the like don't have to infer the presence or absence of a
+ * pseudo-header and the form of the pseudo-header.
+ */
+#define DLT_SUNATM		123	/* Solaris+SunATM */
+
+/* 
+ * Reserved as per request from Kent Dahlgren <kent@praesum.com>
+ * for private use.
+ */
+#define DLT_RIO                 124     /* RapidIO */
+#define DLT_PCI_EXP             125     /* PCI Express */
+#define DLT_AURORA              126     /* Xilinx Aurora link layer */
+
+/*
+ * Header for 802.11 plus a number of bits of link-layer information
+ * including radio information, used by some recent BSD drivers as
+ * well as the madwifi Atheros driver for Linux.
+ */
+#define DLT_IEEE802_11_RADIO	127	/* 802.11 plus radiotap radio header */
+
+/*
+ * Reserved for the TZSP encapsulation, as per request from
+ * Chris Waters <chris.waters@networkchemistry.com>
+ * TZSP is a generic encapsulation for any other link type,
+ * which includes a means to include meta-information
+ * with the packet, e.g. signal strength and channel
+ * for 802.11 packets.
+ */
+#define DLT_TZSP                128     /* Tazmen Sniffer Protocol */
+
+/*
+ * BSD's ARCNET headers have the source host, destination host,
+ * and type at the beginning of the packet; that's what's handed
+ * up to userland via BPF.
+ *
+ * Linux's ARCNET headers, however, have a 2-byte offset field
+ * between the host IDs and the type; that's what's handed up
+ * to userland via PF_PACKET sockets.
+ *
+ * We therefore have to have separate DLT_ values for them.
+ */
+#define DLT_ARCNET_LINUX	129	/* ARCNET */
+
+/*
+ * Juniper-private data link types, as per request from
+ * Hannes Gredler <hannes@juniper.net>.  The DLT_s are used
+ * for passing on chassis-internal metainformation such as
+ * QOS profiles, etc..
+ */
+#define DLT_JUNIPER_MLPPP       130
+#define DLT_JUNIPER_MLFR        131
+#define DLT_JUNIPER_ES          132
+#define DLT_JUNIPER_GGSN        133
+#define DLT_JUNIPER_MFR         134
+#define DLT_JUNIPER_ATM2        135
+#define DLT_JUNIPER_SERVICES    136
+#define DLT_JUNIPER_ATM1        137
+
+/*
+ * Apple IP-over-IEEE 1394, as per a request from Dieter Siegmund
+ * <dieter@apple.com>.  The header that's presented is an Ethernet-like
+ * header:
+ *
+ *	#define FIREWIRE_EUI64_LEN	8
+ *	struct firewire_header {
+ *		u_char  firewire_dhost[FIREWIRE_EUI64_LEN];
+ *		u_char  firewire_shost[FIREWIRE_EUI64_LEN];
+ *		u_short firewire_type;
+ *	};
+ *
+ * with "firewire_type" being an Ethernet type value, rather than,
+ * for example, raw GASP frames being handed up.
+ */
+#define DLT_APPLE_IP_OVER_IEEE1394	138
+
+/*
+ * Various SS7 encapsulations, as per a request from Jeff Morriss
+ * <jeff.morriss[AT]ulticom.com> and subsequent discussions.
+ */
+#define DLT_MTP2_WITH_PHDR	139	/* pseudo-header with various info, followed by MTP2 */
+#define DLT_MTP2		140	/* MTP2, without pseudo-header */
+#define DLT_MTP3		141	/* MTP3, without pseudo-header or MTP2 */
+#define DLT_SCCP		142	/* SCCP, without pseudo-header or MTP2 or MTP3 */
+
+/*
+ * DOCSIS MAC frames.
+ */
+#define DLT_DOCSIS		143
+
+/*
+ * Linux-IrDA packets. Protocol defined at http://www.irda.org.
+ * Those packets include IrLAP headers and above (IrLMP...), but
+ * don't include Phy framing (SOF/EOF/CRC & byte stuffing), because Phy
+ * framing can be handled by the hardware and depend on the bitrate.
+ * This is exactly the format you would get capturing on a Linux-IrDA
+ * interface (irdaX), but not on a raw serial port.
+ * Note the capture is done in "Linux-cooked" mode, so each packet include
+ * a fake packet header (struct sll_header). This is because IrDA packet
+ * decoding is dependant on the direction of the packet (incomming or
+ * outgoing).
+ * When/if other platform implement IrDA capture, we may revisit the
+ * issue and define a real DLT_IRDA...
+ * Jean II
+ */
+#define DLT_LINUX_IRDA		144
+
+/*
+ * Reserved for IBM SP switch and IBM Next Federation switch.
+ */
+#define DLT_IBM_SP		145
+#define DLT_IBM_SN		146
+
+/*
+ * Reserved for private use.  If you have some link-layer header type
+ * that you want to use within your organization, with the capture files
+ * using that link-layer header type not ever be sent outside your
+ * organization, you can use these values.
+ *
+ * No libpcap release will use these for any purpose, nor will any
+ * tcpdump release use them, either.
+ *
+ * Do *NOT* use these in capture files that you expect anybody not using
+ * your private versions of capture-file-reading tools to read; in
+ * particular, do *NOT* use them in products, otherwise you may find that
+ * people won't be able to use tcpdump, or snort, or Ethereal, or... to
+ * read capture files from your firewall/intrusion detection/traffic
+ * monitoring/etc. appliance, or whatever product uses that DLT_ value,
+ * and you may also find that the developers of those applications will
+ * not accept patches to let them read those files.
+ *
+ * Also, do not use them if somebody might send you a capture using them
+ * for *their* private type and tools using them for *your* private type
+ * would have to read them.
+ *
+ * Instead, ask "tcpdump-workers@lists.tcpdump.org" for a new DLT_ value,
+ * as per the comment above, and use the type you're given.
+ */
+#define DLT_USER0		147
+#define DLT_USER1		148
+#define DLT_USER2		149
+#define DLT_USER3		150
+#define DLT_USER4		151
+#define DLT_USER5		152
+#define DLT_USER6		153
+#define DLT_USER7		154
+#define DLT_USER8		155
+#define DLT_USER9		156
+#define DLT_USER10		157
+#define DLT_USER11		158
+#define DLT_USER12		159
+#define DLT_USER13		160
+#define DLT_USER14		161
+#define DLT_USER15		162
+
+/*
+ * For future use with 802.11 captures - defined by AbsoluteValue
+ * Systems to store a number of bits of link-layer information
+ * including radio information:
+ *
+ *	http://www.shaftnet.org/~pizza/software/capturefrm.txt
+ *
+ * but it might be used by some non-AVS drivers now or in the
+ * future.
+ */
+#define DLT_IEEE802_11_RADIO_AVS 163	/* 802.11 plus AVS radio header */
+
+/*
+ * Juniper-private data link type, as per request from
+ * Hannes Gredler <hannes@juniper.net>.  The DLT_s are used
+ * for passing on chassis-internal metainformation such as
+ * QOS profiles, etc..
+ */
+#define DLT_JUNIPER_MONITOR     164
+
+/*
+ * Reserved for BACnet MS/TP.
+ */
+#define DLT_BACNET_MS_TP	165
+
+/*
+ * Another PPP variant as per request from Karsten Keil <kkeil@suse.de>.
+ *
+ * This is used in some OSes to allow a kernel socket filter to distinguish
+ * between incoming and outgoing packets, on a socket intended to
+ * supply pppd with outgoing packets so it can do dial-on-demand and
+ * hangup-on-lack-of-demand; incoming packets are filtered out so they
+ * don't cause pppd to hold the connection up (you don't want random
+ * input packets such as port scans, packets from old lost connections,
+ * etc. to force the connection to stay up).
+ *
+ * The first byte of the PPP header (0xff03) is modified to accomodate
+ * the direction - 0x00 = IN, 0x01 = OUT.
+ */
+#define DLT_PPP_PPPD		166
+
+/*
+ * Names for backwards compatibility with older versions of some PPP
+ * software; new software should use DLT_PPP_PPPD.
+ */
+#define DLT_PPP_WITH_DIRECTION	DLT_PPP_PPPD
+#define DLT_LINUX_PPP_WITHDIRECTION	DLT_PPP_PPPD
+
+/*
+ * Juniper-private data link type, as per request from
+ * Hannes Gredler <hannes@juniper.net>.  The DLT_s are used
+ * for passing on chassis-internal metainformation such as
+ * QOS profiles, cookies, etc..
+ */
+#define DLT_JUNIPER_PPPOE       167
+#define DLT_JUNIPER_PPPOE_ATM   168
+
+#define DLT_GPRS_LLC		169	/* GPRS LLC */
+#define DLT_GPF_T		170	/* GPF-T (ITU-T G.7041/Y.1303) */
+#define DLT_GPF_F		171	/* GPF-F (ITU-T G.7041/Y.1303) */
+
+/*
+ * Requested by Oolan Zimmer <oz@gcom.com> for use in Gcom's T1/E1 line
+ * monitoring equipment.
+ */
+#define DLT_GCOM_T1E1		172
+#define DLT_GCOM_SERIAL		173
+
+/*
+ * Juniper-private data link type, as per request from
+ * Hannes Gredler <hannes@juniper.net>.  The DLT_ is used
+ * for internal communication to Physical Interface Cards (PIC)
+ */
+#define DLT_JUNIPER_PIC_PEER    174
+
+/*
+ * Link types requested by Gregor Maier <gregor@endace.com> of Endace
+ * Measurement Systems.  They add an ERF header (see
+ * http://www.endace.com/support/EndaceRecordFormat.pdf) in front of
+ * the link-layer header.
+ */
+#define DLT_ERF_ETH		175	/* Ethernet */
+#define DLT_ERF_POS		176	/* Packet-over-SONET */
+
+/*
+ * Requested by Daniele Orlandi <daniele@orlandi.com> for raw LAPD
+ * for vISDN (http://www.orlandi.com/visdn/).  Its link-layer header
+ * includes additional information before the LAPD header, so it's
+ * not necessarily a generic LAPD header.
+ */
+#define DLT_LINUX_LAPD		177
+
+/*
+ * Juniper-private data link type, as per request from
+ * Hannes Gredler <hannes@juniper.net>. 
+ * The DLT_ are used for prepending meta-information
+ * like interface index, interface name
+ * before standard Ethernet, PPP, Frelay & C-HDLC Frames
+ */
+#define DLT_JUNIPER_ETHER       178
+#define DLT_JUNIPER_PPP         179
+#define DLT_JUNIPER_FRELAY      180
+#define DLT_JUNIPER_CHDLC       181
+
+/*
+ * Multi Link Frame Relay (FRF.16)
+ */
+#define DLT_MFR                 182
+
+/*
+ * Juniper-private data link type, as per request from
+ * Hannes Gredler <hannes@juniper.net>. 
+ * The DLT_ is used for internal communication with a
+ * voice Adapter Card (PIC)
+ */
+#define DLT_JUNIPER_VP          183
+
+/*
+ * Arinc 429 frames.
+ * DLT_ requested by Gianluca Varenni <gianluca.varenni@cacetech.com>.
+ * Every frame contains a 32bit A429 label.
+ * More documentation on Arinc 429 can be found at
+ * http://www.condoreng.com/support/downloads/tutorials/ARINCTutorial.pdf
+ */
+#define DLT_A429                184
+
+/*
+ * Arinc 653 Interpartition Communication messages.
+ * DLT_ requested by Gianluca Varenni <gianluca.varenni@cacetech.com>.
+ * Please refer to the A653-1 standard for more information.
+ */
+#define DLT_A653_ICM            185
+
+/*
+ * USB packets, beginning with a USB setup header; requested by
+ * Paolo Abeni <paolo.abeni@email.it>.
+ */
+#define DLT_USB			186
+
+/*
+ * Bluetooth HCI UART transport layer (part H:4); requested by
+ * Paolo Abeni.
+ */
+#define DLT_BLUETOOTH_HCI_H4	187
+
+/*
+ * IEEE 802.16 MAC Common Part Sublayer; requested by Maria Cruz
+ * <cruz_petagay@bah.com>.
+ */
+#define DLT_IEEE802_16_MAC_CPS	188
+
+/*
+ * USB packets, beginning with a Linux USB header; requested by
+ * Paolo Abeni <paolo.abeni@email.it>.
+ */
+#define DLT_USB_LINUX		189
+
+/*
+ * Controller Area Network (CAN) v. 2.0B packets.
+ * DLT_ requested by Gianluca Varenni <gianluca.varenni@cacetech.com>.
+ * Used to dump CAN packets coming from a CAN Vector board.
+ * More documentation on the CAN v2.0B frames can be found at
+ * http://www.can-cia.org/downloads/?269
+ */
+#define DLT_CAN20B              190
+
+/*
+ * IEEE 802.15.4, with address fields padded, as is done by Linux
+ * drivers; requested by Juergen Schimmer.
+ */
+#define DLT_IEEE802_15_4_LINUX	191
+
+/*
+ * Per Packet Information encapsulated packets.
+ * DLT_ requested by Gianluca Varenni <gianluca.varenni@cacetech.com>.
+ */
+#define DLT_PPI			192
+
+/*
+ * Header for 802.16 MAC Common Part Sublayer plus a radiotap radio header;
+ * requested by Charles Clancy.
+ */
+#define DLT_IEEE802_16_MAC_CPS_RADIO	193
+
+/*
+ * Juniper-private data link type, as per request from
+ * Hannes Gredler <hannes@juniper.net>. 
+ * The DLT_ is used for internal communication with a
+ * integrated service module (ISM).
+ */
+#define DLT_JUNIPER_ISM         194
+
+/*
+ * IEEE 802.15.4, exactly as it appears in the spec (no padding, no
+ * nothing); requested by Mikko Saarnivala <mikko.saarnivala@sensinode.com>.
+ */
+#define DLT_IEEE802_15_4	195
+
+/*
+ * Various link-layer types, with a pseudo-header, for SITA
+ * (http://www.sita.aero/); requested by Fulko Hew (fulko.hew@gmail.com).
+ */
+#define DLT_SITA		196
+
+/*
+ * Various link-layer types, with a pseudo-header, for Endace DAG cards;
+ * encapsulates Endace ERF records.  Requested by Stephen Donnelly
+ * <stephen@endace.com>.
+ */
+#define DLT_ERF			197
+
+/*
+ * Special header prepended to Ethernet packets when capturing from a
+ * u10 Networks board.  Requested by Phil Mulholland
+ * <phil@u10networks.com>.
+ */
+#define DLT_RAIF1		198
+
+/*
+ * IPMB packet for IPMI, beginning with the I2C slave address, followed
+ * by the netFn and LUN, etc..  Requested by Chanthy Toeung
+ * <chanthy.toeung@ca.kontron.com>.
+ */
+#define DLT_IPMB		199
+
+/*
+ * Juniper-private data link type, as per request from
+ * Hannes Gredler <hannes@juniper.net>. 
+ * The DLT_ is used for capturing data on a secure tunnel interface.
+ */
+#define DLT_JUNIPER_ST          200
+
+/*
+ * Bluetooth HCI UART transport layer (part H:4), with pseudo-header
+ * that includes direction information; requested by Paolo Abeni.
+ */
+#define DLT_BLUETOOTH_HCI_H4_WITH_PHDR	201
+
+/*
+ * AX.25 packet with a 1-byte KISS header; see
+ *
+ *	http://www.ax25.net/kiss.htm
+ *
+ * as per Richard Stearn <richard@rns-stearn.demon.co.uk>.
+ */
+#define DLT_AX25_KISS		202
+
+/*
+ * LAPD packets from an ISDN channel, starting with the address field,
+ * with no pseudo-header.
+ * Requested by Varuna De Silva <varunax@gmail.com>.
+ */
+#define DLT_LAPD		203
+
+/*
+ * Variants of various link-layer headers, with a one-byte direction
+ * pseudo-header prepended - zero means "received by this host",
+ * non-zero (any non-zero value) means "sent by this host" - as per
+ * Will Barker <w.barker@zen.co.uk>.
+ */
+#define DLT_PPP_WITH_DIR	204	/* PPP - don't confuse with DLT_PPP_WITH_DIRECTION */
+#define DLT_C_HDLC_WITH_DIR	205	/* Cisco HDLC */
+#define DLT_FRELAY_WITH_DIR	206	/* Frame Relay */
+#define DLT_LAPB_WITH_DIR	207	/* LAPB */
+
+/*
+ * 208 is reserved for an as-yet-unspecified proprietary link-layer
+ * type, as requested by Will Barker.
+ */
+
+/*
+ * IPMB with a Linux-specific pseudo-header; as requested by Alexey Neyman
+ * <avn@pigeonpoint.com>.
+ */
+#define DLT_IPMB_LINUX		209
+
+/*
+ * FlexRay automotive bus - http://www.flexray.com/ - as requested
+ * by Hannes Kaelber <hannes.kaelber@x2e.de>.
+ */
+#define DLT_FLEXRAY		210
+
+/*
+ * Media Oriented Systems Transport (MOST) bus for multimedia
+ * transport - http://www.mostcooperation.com/ - as requested
+ * by Hannes Kaelber <hannes.kaelber@x2e.de>.
+ */
+#define DLT_MOST		211
+
+/*
+ * Local Interconnect Network (LIN) bus for vehicle networks -
+ * http://www.lin-subbus.org/ - as requested by Hannes Kaelber
+ * <hannes.kaelber@x2e.de>.
+ */
+#define DLT_LIN			212
+
+/*
+ * X2E-private data link type used for serial line capture,
+ * as requested by Hannes Kaelber <hannes.kaelber@x2e.de>.
+ */
+#define DLT_X2E_SERIAL		213
+
+/*
+ * X2E-private data link type used for the Xoraya data logger
+ * family, as requested by Hannes Kaelber <hannes.kaelber@x2e.de>.
+ */
+#define DLT_X2E_XORAYA		214
+
+/*
+ * IEEE 802.15.4, exactly as it appears in the spec (no padding, no
+ * nothing), but with the PHY-level data for non-ASK PHYs (4 octets
+ * of 0 as preamble, one octet of SFD, one octet of frame length+
+ * reserved bit, and then the MAC-layer data, starting with the
+ * frame control field).
+ *
+ * Requested by Max Filippov <jcmvbkbc@gmail.com>.
+ */
+#define DLT_IEEE802_15_4_NONASK_PHY	215
+
+
+/*
+ * DLT and savefile link type values are split into a class and
+ * a member of that class.  A class value of 0 indicates a regular
+ * DLT_/LINKTYPE_ value.
+ */
+#define DLT_CLASS(x)		((x) & 0x03ff0000)
+
+/*
+ * NetBSD-specific generic "raw" link type.  The class value indicates
+ * that this is the generic raw type, and the lower 16 bits are the
+ * address family we're dealing with.  Those values are NetBSD-specific;
+ * do not assume that they correspond to AF_ values for your operating
+ * system.
+ */
+#define	DLT_CLASS_NETBSD_RAWAF	0x02240000
+#define	DLT_NETBSD_RAWAF(af)	(DLT_CLASS_NETBSD_RAWAF | (af))
+#define	DLT_NETBSD_RAWAF_AF(x)	((x) & 0x0000ffff)
+#define	DLT_IS_NETBSD_RAWAF(x)	(DLT_CLASS(x) == DLT_CLASS_NETBSD_RAWAF)
+
+
+/*
+ * The instruction encodings.
+ */
+/* instruction classes */
+#define BPF_CLASS(code) ((code) & 0x07)
+#define		BPF_LD		0x00
+#define		BPF_LDX		0x01
+#define		BPF_ST		0x02
+#define		BPF_STX		0x03
+#define		BPF_ALU		0x04
+#define		BPF_JMP		0x05
+#define		BPF_RET		0x06
+#define		BPF_MISC	0x07
+
+/* ld/ldx fields */
+#define BPF_SIZE(code)	((code) & 0x18)
+#define		BPF_W		0x00
+#define		BPF_H		0x08
+#define		BPF_B		0x10
+#define BPF_MODE(code)	((code) & 0xe0)
+#define		BPF_IMM 	0x00
+#define		BPF_ABS		0x20
+#define		BPF_IND		0x40
+#define		BPF_MEM		0x60
+#define		BPF_LEN		0x80
+#define		BPF_MSH		0xa0
+
+/* alu/jmp fields */
+#define BPF_OP(code)	((code) & 0xf0)
+#define		BPF_ADD		0x00
+#define		BPF_SUB		0x10
+#define		BPF_MUL		0x20
+#define		BPF_DIV		0x30
+#define		BPF_OR		0x40
+#define		BPF_AND		0x50
+#define		BPF_LSH		0x60
+#define		BPF_RSH		0x70
+#define		BPF_NEG		0x80
+#define		BPF_JA		0x00
+#define		BPF_JEQ		0x10
+#define		BPF_JGT		0x20
+#define		BPF_JGE		0x30
+#define		BPF_JSET	0x40
+#define BPF_SRC(code)	((code) & 0x08)
+#define		BPF_K		0x00
+#define		BPF_X		0x08
+
+/* ret - BPF_K and BPF_X also apply */
+#define BPF_RVAL(code)	((code) & 0x18)
+#define		BPF_A		0x10
+
+/* misc */
+#define BPF_MISCOP(code) ((code) & 0xf8)
+#define		BPF_TAX		0x00
+#define		BPF_TXA		0x80
+
+/*
+ * The instruction data structure.
+ */
+struct bpf_insn {
+	u_short	code;
+	u_char 	jt;
+	u_char 	jf;
+	bpf_u_int32 k;
+};
+
+/*
+ * Macros for insn array initializers.
+ */
+#define BPF_STMT(code, k) { (u_short)(code), 0, 0, k }
+#define BPF_JUMP(code, k, jt, jf) { (u_short)(code), jt, jf, k }
+
+#if __STDC__ || defined(__cplusplus)
+extern int bpf_validate(const struct bpf_insn *, int);
+extern u_int bpf_filter(const struct bpf_insn *, const u_char *, u_int, u_int);
+#else
+extern int bpf_validate();
+extern u_int bpf_filter();
+#endif
+
+/*
+ * Number of scratch memory words (for BPF_LD|BPF_MEM and BPF_ST).
+ */
+#define BPF_MEMWORDS 16
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap/namedb.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap/namedb.h
new file mode 100644
index 000000000..9002c7509
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap/namedb.h
@@ -0,0 +1,89 @@
+/*
+ * Copyright (c) 1994, 1996
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the Computer Systems
+ *	Engineering Group at Lawrence Berkeley Laboratory.
+ * 4. Neither the name of the University nor of the Laboratory may be used
+ *    to endorse or promote products derived from this software without
+ *    specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#) $Header: /tcpdump/master/libpcap/pcap/namedb.h,v 1.1 2006/10/04 18:09:22 guy Exp $ (LBL)
+ */
+
+#ifndef lib_pcap_namedb_h
+#define lib_pcap_namedb_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * As returned by the pcap_next_etherent()
+ * XXX this stuff doesn't belong in this interface, but this
+ * library already must do name to address translation, so
+ * on systems that don't have support for /etc/ethers, we
+ * export these hooks since they'll
+ */
+struct pcap_etherent {
+	u_char addr[6];
+	char name[122];
+};
+#ifndef PCAP_ETHERS_FILE
+#define PCAP_ETHERS_FILE "/etc/ethers"
+#endif
+struct	pcap_etherent *pcap_next_etherent(FILE *);
+u_char *pcap_ether_hostton(const char*);
+u_char *pcap_ether_aton(const char *);
+
+bpf_u_int32 **pcap_nametoaddr(const char *);
+#ifdef INET6
+struct addrinfo *pcap_nametoaddrinfo(const char *);
+#endif
+bpf_u_int32 pcap_nametonetaddr(const char *);
+
+int	pcap_nametoport(const char *, int *, int *);
+int	pcap_nametoportrange(const char *, int *, int *, int *);
+int	pcap_nametoproto(const char *);
+int	pcap_nametoeproto(const char *);
+int	pcap_nametollc(const char *);
+/*
+ * If a protocol is unknown, PROTO_UNDEF is returned.
+ * Also, pcap_nametoport() returns the protocol along with the port number.
+ * If there are ambiguous entried in /etc/services (i.e. domain
+ * can be either tcp or udp) PROTO_UNDEF is returned.
+ */
+#define PROTO_UNDEF		-1
+
+/* XXX move these to pcap-int.h? */
+int __pcap_atodn(const char *, bpf_u_int32 *);
+int __pcap_atoin(const char *, bpf_u_int32 *);
+u_short	__pcap_nametodnaddr(const char *);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap/pcap.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap/pcap.h
new file mode 100644
index 000000000..ad8fc40ac
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap/pcap.h
@@ -0,0 +1,407 @@
+/* -*- Mode: c; tab-width: 8; indent-tabs-mode: 1; c-basic-offset: 8; -*- */
+/*
+ * Copyright (c) 1993, 1994, 1995, 1996, 1997
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the Computer Systems
+ *	Engineering Group at Lawrence Berkeley Laboratory.
+ * 4. Neither the name of the University nor of the Laboratory may be used
+ *    to endorse or promote products derived from this software without
+ *    specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#) $Header: /tcpdump/master/libpcap/pcap/pcap.h,v 1.4.2.11 2008-10-06 15:38:39 gianluca Exp $ (LBL)
+ */
+
+#ifndef lib_pcap_pcap_h
+#define lib_pcap_pcap_h
+
+#if defined(WIN32)
+  #include <pcap-stdinc.h>
+#elif defined(MSDOS)
+  #include <sys/types.h>
+  #include <sys/socket.h>  /* u_int, u_char etc. */
+#else /* UN*X */
+  #include <sys/types.h>
+  #include <sys/time.h>
+#endif /* WIN32/MSDOS/UN*X */
+
+#ifndef PCAP_DONT_INCLUDE_PCAP_BPF_H
+#include <pcap/bpf.h>
+#endif
+
+#include <stdio.h>
+
+#ifdef HAVE_REMOTE
+	// We have to define the SOCKET here, although it has been defined in sockutils.h
+	// This is to avoid the distribution of the 'sockutils.h' file around
+	// (for example in the WinPcap developer's pack)
+	#ifndef SOCKET
+		#ifdef WIN32
+			#define SOCKET unsigned int
+		#else
+			#define SOCKET int
+		#endif
+	#endif
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define PCAP_VERSION_MAJOR 2
+#define PCAP_VERSION_MINOR 4
+
+#define PCAP_ERRBUF_SIZE 256
+
+/*
+ * Compatibility for systems that have a bpf.h that
+ * predates the bpf typedefs for 64-bit support.
+ */
+#if BPF_RELEASE - 0 < 199406
+typedef	int bpf_int32;
+typedef	u_int bpf_u_int32;
+#endif
+
+typedef struct pcap pcap_t;
+typedef struct pcap_dumper pcap_dumper_t;
+typedef struct pcap_if pcap_if_t;
+typedef struct pcap_addr pcap_addr_t;
+
+/*
+ * The first record in the file contains saved values for some
+ * of the flags used in the printout phases of tcpdump.
+ * Many fields here are 32 bit ints so compilers won't insert unwanted
+ * padding; these files need to be interchangeable across architectures.
+ *
+ * Do not change the layout of this structure, in any way (this includes
+ * changes that only affect the length of fields in this structure).
+ *
+ * Also, do not change the interpretation of any of the members of this
+ * structure, in any way (this includes using values other than
+ * LINKTYPE_ values, as defined in "savefile.c", in the "linktype"
+ * field).
+ *
+ * Instead:
+ *
+ *	introduce a new structure for the new format, if the layout
+ *	of the structure changed;
+ *
+ *	send mail to "tcpdump-workers@lists.tcpdump.org", requesting
+ *	a new magic number for your new capture file format, and, when
+ *	you get the new magic number, put it in "savefile.c";
+ *
+ *	use that magic number for save files with the changed file
+ *	header;
+ *
+ *	make the code in "savefile.c" capable of reading files with
+ *	the old file header as well as files with the new file header
+ *	(using the magic number to determine the header format).
+ *
+ * Then supply the changes as a patch at
+ *
+ *	http://sourceforge.net/projects/libpcap/
+ *
+ * so that future versions of libpcap and programs that use it (such as
+ * tcpdump) will be able to read your new capture file format.
+ */
+struct pcap_file_header {
+	bpf_u_int32 magic;
+	u_short version_major;
+	u_short version_minor;
+	bpf_int32 thiszone;	/* gmt to local correction */
+	bpf_u_int32 sigfigs;	/* accuracy of timestamps */
+	bpf_u_int32 snaplen;	/* max length saved portion of each pkt */
+	bpf_u_int32 linktype;	/* data link type (LINKTYPE_*) */
+};
+
+/*
+ * Macros for the value returned by pcap_datalink_ext().
+ * 
+ * If LT_FCS_LENGTH_PRESENT(x) is true, the LT_FCS_LENGTH(x) macro
+ * gives the FCS length of packets in the capture.
+ */
+#define LT_FCS_LENGTH_PRESENT(x)	((x) & 0x04000000)
+#define LT_FCS_LENGTH(x)		(((x) & 0xF0000000) >> 28)
+#define LT_FCS_DATALINK_EXT(x)		((((x) & 0xF) << 28) | 0x04000000)
+
+typedef enum {
+       PCAP_D_INOUT = 0,
+       PCAP_D_IN,
+       PCAP_D_OUT
+} pcap_direction_t;
+
+/*
+ * Generic per-packet information, as supplied by libpcap.
+ *
+ * The time stamp can and should be a "struct timeval", regardless of
+ * whether your system supports 32-bit tv_sec in "struct timeval",
+ * 64-bit tv_sec in "struct timeval", or both if it supports both 32-bit
+ * and 64-bit applications.  The on-disk format of savefiles uses 32-bit
+ * tv_sec (and tv_usec); this structure is irrelevant to that.  32-bit
+ * and 64-bit versions of libpcap, even if they're on the same platform,
+ * should supply the appropriate version of "struct timeval", even if
+ * that's not what the underlying packet capture mechanism supplies.
+ */
+struct pcap_pkthdr {
+	struct timeval ts;	/* time stamp */
+	bpf_u_int32 caplen;	/* length of portion present */
+	bpf_u_int32 len;	/* length this packet (off wire) */
+};
+
+/*
+ * As returned by the pcap_stats()
+ */
+struct pcap_stat {
+	u_int ps_recv;		/* number of packets received */
+	u_int ps_drop;		/* number of packets dropped */
+	u_int ps_ifdrop;	/* drops by interface XXX not yet supported */
+#ifdef HAVE_REMOTE
+	u_int ps_capt;		/* number of packets that are received by the application; please get rid off the Win32 ifdef */
+	u_int ps_sent;		/* number of packets sent by the server on the network */
+	u_int ps_netdrop;	/* number of packets lost on the network */
+#endif /* HAVE_REMOTE */
+};
+
+#ifdef MSDOS
+/*
+ * As returned by the pcap_stats_ex()
+ */
+struct pcap_stat_ex {
+       u_long  rx_packets;        /* total packets received       */
+       u_long  tx_packets;        /* total packets transmitted    */
+       u_long  rx_bytes;          /* total bytes received         */
+       u_long  tx_bytes;          /* total bytes transmitted      */
+       u_long  rx_errors;         /* bad packets received         */
+       u_long  tx_errors;         /* packet transmit problems     */
+       u_long  rx_dropped;        /* no space in Rx buffers       */
+       u_long  tx_dropped;        /* no space available for Tx    */
+       u_long  multicast;         /* multicast packets received   */
+       u_long  collisions;
+
+       /* detailed rx_errors: */
+       u_long  rx_length_errors;
+       u_long  rx_over_errors;    /* receiver ring buff overflow  */
+       u_long  rx_crc_errors;     /* recv'd pkt with crc error    */
+       u_long  rx_frame_errors;   /* recv'd frame alignment error */
+       u_long  rx_fifo_errors;    /* recv'r fifo overrun          */
+       u_long  rx_missed_errors;  /* recv'r missed packet         */
+
+       /* detailed tx_errors */
+       u_long  tx_aborted_errors;
+       u_long  tx_carrier_errors;
+       u_long  tx_fifo_errors;
+       u_long  tx_heartbeat_errors;
+       u_long  tx_window_errors;
+     };
+#endif
+
+/*
+ * Item in a list of interfaces.
+ */
+struct pcap_if {
+	struct pcap_if *next;
+	char *name;		/* name to hand to "pcap_open_live()" */
+	char *description;	/* textual description of interface, or NULL */
+	struct pcap_addr *addresses;
+	bpf_u_int32 flags;	/* PCAP_IF_ interface flags */
+};
+
+#define PCAP_IF_LOOPBACK	0x00000001	/* interface is loopback */
+
+/*
+ * Representation of an interface address.
+ */
+struct pcap_addr {
+	struct pcap_addr *next;
+	struct sockaddr *addr;		/* address */
+	struct sockaddr *netmask;	/* netmask for that address */
+	struct sockaddr *broadaddr;	/* broadcast address for that address */
+	struct sockaddr *dstaddr;	/* P2P destination address for that address */
+};
+
+typedef void (*pcap_handler)(u_char *, const struct pcap_pkthdr *,
+			     const u_char *);
+
+/*
+ * Error codes for the pcap API.
+ * These will all be negative, so you can check for the success or
+ * failure of a call that returns these codes by checking for a
+ * negative value.
+ */
+#define PCAP_ERROR			-1	/* generic error code */
+#define PCAP_ERROR_BREAK		-2	/* loop terminated by pcap_breakloop */
+#define PCAP_ERROR_NOT_ACTIVATED	-3	/* the capture needs to be activated */
+#define PCAP_ERROR_ACTIVATED		-4	/* the operation can't be performed on already activated captures */
+#define PCAP_ERROR_NO_SUCH_DEVICE	-5	/* no such device exists */
+#define PCAP_ERROR_RFMON_NOTSUP		-6	/* this device doesn't support rfmon (monitor) mode */
+#define PCAP_ERROR_NOT_RFMON		-7	/* operation supported only in monitor mode */
+#define PCAP_ERROR_PERM_DENIED		-8	/* no permission to open the device */
+#define PCAP_ERROR_IFACE_NOT_UP		-9	/* interface isn't up */
+
+/*
+ * Warning codes for the pcap API.
+ * These will all be positive and non-zero, so they won't look like
+ * errors.
+ */
+#define PCAP_WARNING			1	/* generic warning code */
+#define PCAP_WARNING_PROMISC_NOTSUP	2	/* this device doesn't support promiscuous mode */
+
+char	*pcap_lookupdev(char *);
+int	pcap_lookupnet(const char *, bpf_u_int32 *, bpf_u_int32 *, char *);
+
+pcap_t	*pcap_create(const char *, char *);
+int	pcap_set_snaplen(pcap_t *, int);
+int	pcap_set_promisc(pcap_t *, int);
+int	pcap_can_set_rfmon(pcap_t *);
+int	pcap_set_rfmon(pcap_t *, int);
+int	pcap_set_timeout(pcap_t *, int);
+int	pcap_set_buffer_size(pcap_t *, int);
+int	pcap_activate(pcap_t *);
+
+pcap_t	*pcap_open_live(const char *, int, int, int, char *);
+pcap_t	*pcap_open_dead(int, int);
+pcap_t	*pcap_open_offline(const char *, char *);
+#if defined(WIN32)
+pcap_t  *pcap_hopen_offline(intptr_t, char *);
+#if !defined(LIBPCAP_EXPORTS)
+#define pcap_fopen_offline(f,b) \
+	pcap_hopen_offline(_get_osfhandle(_fileno(f)), b)
+#else /*LIBPCAP_EXPORTS*/
+static pcap_t *pcap_fopen_offline(FILE *, char *);
+#endif
+#else /*WIN32*/
+pcap_t	*pcap_fopen_offline(FILE *, char *);
+#endif /*WIN32*/
+
+void	pcap_close(pcap_t *);
+int	pcap_loop(pcap_t *, int, pcap_handler, u_char *);
+int	pcap_dispatch(pcap_t *, int, pcap_handler, u_char *);
+const u_char*
+	pcap_next(pcap_t *, struct pcap_pkthdr *);
+int 	pcap_next_ex(pcap_t *, struct pcap_pkthdr **, const u_char **);
+void	pcap_breakloop(pcap_t *);
+int	pcap_stats(pcap_t *, struct pcap_stat *);
+int	pcap_setfilter(pcap_t *, struct bpf_program *);
+int 	pcap_setdirection(pcap_t *, pcap_direction_t);
+int	pcap_getnonblock(pcap_t *, char *);
+int	pcap_setnonblock(pcap_t *, int, char *);
+int	pcap_inject(pcap_t *, const void *, size_t);
+int	pcap_sendpacket(pcap_t *, const u_char *, int);
+const char *pcap_statustostr(int);
+const char *pcap_strerror(int);
+char	*pcap_geterr(pcap_t *);
+void	pcap_perror(pcap_t *, char *);
+int	pcap_compile(pcap_t *, struct bpf_program *, const char *, int,
+	    bpf_u_int32);
+int	pcap_compile_nopcap(int, int, struct bpf_program *,
+	    const char *, int, bpf_u_int32);
+void	pcap_freecode(struct bpf_program *);
+int	pcap_offline_filter(struct bpf_program *, const struct pcap_pkthdr *,
+	    const u_char *);
+int	pcap_datalink(pcap_t *);
+int	pcap_datalink_ext(pcap_t *);
+int	pcap_list_datalinks(pcap_t *, int **);
+int	pcap_set_datalink(pcap_t *, int);
+void	pcap_free_datalinks(int *);
+int	pcap_datalink_name_to_val(const char *);
+const char *pcap_datalink_val_to_name(int);
+const char *pcap_datalink_val_to_description(int);
+int	pcap_snapshot(pcap_t *);
+int	pcap_is_swapped(pcap_t *);
+int	pcap_major_version(pcap_t *);
+int	pcap_minor_version(pcap_t *);
+
+/* XXX */
+FILE	*pcap_file(pcap_t *);
+int	pcap_fileno(pcap_t *);
+
+pcap_dumper_t *pcap_dump_open(pcap_t *, const char *);
+pcap_dumper_t *pcap_dump_fopen(pcap_t *, FILE *fp);
+FILE	*pcap_dump_file(pcap_dumper_t *);
+long	pcap_dump_ftell(pcap_dumper_t *);
+int	pcap_dump_flush(pcap_dumper_t *);
+void	pcap_dump_close(pcap_dumper_t *);
+void	pcap_dump(u_char *, const struct pcap_pkthdr *, const u_char *);
+
+int	pcap_findalldevs(pcap_if_t **, char *);
+void	pcap_freealldevs(pcap_if_t *);
+
+const char *pcap_lib_version(void);
+
+/* XXX this guy lives in the bpf tree */
+u_int	bpf_filter(const struct bpf_insn *, const u_char *, u_int, u_int);
+int	bpf_validate(const struct bpf_insn *f, int len);
+char	*bpf_image(const struct bpf_insn *, int);
+void	bpf_dump(const struct bpf_program *, int);
+
+#if defined(WIN32)
+
+/*
+ * Win32 definitions
+ */
+
+int pcap_setbuff(pcap_t *p, int dim);
+int pcap_setmode(pcap_t *p, int mode);
+int pcap_setmintocopy(pcap_t *p, int size);
+
+#ifdef WPCAP
+/* Include file with the wpcap-specific extensions */
+#include <Win32-Extensions.h>
+#endif /* WPCAP */
+
+#define MODE_CAPT 0
+#define MODE_STAT 1
+#define MODE_MON 2
+
+#elif defined(MSDOS)
+
+/*
+ * MS-DOS definitions
+ */
+
+int  pcap_stats_ex (pcap_t *, struct pcap_stat_ex *);
+void pcap_set_wait (pcap_t *p, void (*yield)(void), int wait);
+u_long pcap_mac_packets (void);
+
+#else /* UN*X */
+
+/*
+ * UN*X definitions
+ */
+
+int	pcap_get_selectable_fd(pcap_t *);
+
+#endif /* WIN32/MSDOS/UN*X */
+
+#ifdef HAVE_REMOTE
+/* Includes most of the public stuff that is needed for the remote capture */
+#include <remote-ext.h>
+#endif	 /* HAVE_REMOTE */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap/sll.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap/sll.h
new file mode 100644
index 000000000..e9d5452af
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap/sll.h
@@ -0,0 +1,129 @@
+/*-
+ * Copyright (c) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from the Stanford/CMU enet packet filter,
+ * (net/enet.c) distributed as part of 4.3BSD, and code contributed
+ * to Berkeley by Steven McCanne and Van Jacobson both of Lawrence
+ * Berkeley Laboratory.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed by the University of
+ *      California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#) $Header: /tcpdump/master/libpcap/pcap/sll.h,v 1.2.2.1 2008-05-30 01:36:06 guy Exp $ (LBL)
+ */
+
+/*
+ * For captures on Linux cooked sockets, we construct a fake header
+ * that includes:
+ *
+ *	a 2-byte "packet type" which is one of:
+ *
+ *		LINUX_SLL_HOST		packet was sent to us
+ *		LINUX_SLL_BROADCAST	packet was broadcast
+ *		LINUX_SLL_MULTICAST	packet was multicast
+ *		LINUX_SLL_OTHERHOST	packet was sent to somebody else
+ *		LINUX_SLL_OUTGOING	packet was sent *by* us;
+ *
+ *	a 2-byte Ethernet protocol field;
+ *
+ *	a 2-byte link-layer type;
+ *
+ *	a 2-byte link-layer address length;
+ *
+ *	an 8-byte source link-layer address, whose actual length is
+ *	specified by the previous value.
+ *
+ * All fields except for the link-layer address are in network byte order.
+ *
+ * DO NOT change the layout of this structure, or change any of the
+ * LINUX_SLL_ values below.  If you must change the link-layer header
+ * for a "cooked" Linux capture, introduce a new DLT_ type (ask
+ * "tcpdump-workers@lists.tcpdump.org" for one, so that you don't give it
+ * a value that collides with a value already being used), and use the
+ * new header in captures of that type, so that programs that can
+ * handle DLT_LINUX_SLL captures will continue to handle them correctly
+ * without any change, and so that capture files with different headers
+ * can be told apart and programs that read them can dissect the
+ * packets in them.
+ */
+
+#ifndef lib_pcap_sll_h
+#define lib_pcap_sll_h
+
+/*
+ * A DLT_LINUX_SLL fake link-layer header.
+ */
+#define SLL_HDR_LEN	16		/* total header length */
+#define SLL_ADDRLEN	8		/* length of address field */
+
+struct sll_header {
+	u_int16_t sll_pkttype;		/* packet type */
+	u_int16_t sll_hatype;		/* link-layer address type */
+	u_int16_t sll_halen;		/* link-layer address length */
+	u_int8_t sll_addr[SLL_ADDRLEN];	/* link-layer address */
+	u_int16_t sll_protocol;		/* protocol */
+};
+
+/*
+ * The LINUX_SLL_ values for "sll_pkttype"; these correspond to the
+ * PACKET_ values on Linux, but are defined here so that they're
+ * available even on systems other than Linux, and so that they
+ * don't change even if the PACKET_ values change.
+ */
+#define LINUX_SLL_HOST		0
+#define LINUX_SLL_BROADCAST	1
+#define LINUX_SLL_MULTICAST	2
+#define LINUX_SLL_OTHERHOST	3
+#define LINUX_SLL_OUTGOING	4
+
+/*
+ * The LINUX_SLL_ values for "sll_protocol"; these correspond to the
+ * ETH_P_ values on Linux, but are defined here so that they're
+ * available even on systems other than Linux.  We assume, for now,
+ * that the ETH_P_ values won't change in Linux; if they do, then:
+ *
+ *	if we don't translate them in "pcap-linux.c", capture files
+ *	won't necessarily be readable if captured on a system that
+ *	defines ETH_P_ values that don't match these values;
+ *
+ *	if we do translate them in "pcap-linux.c", that makes life
+ *	unpleasant for the BPF code generator, as the values you test
+ *	for in the kernel aren't the values that you test for when
+ *	reading a capture file, so the fixup code run on BPF programs
+ *	handed to the kernel ends up having to do more work.
+ *
+ * Add other values here as necessary, for handling packet types that
+ * might show up on non-Ethernet, non-802.x networks.  (Not all the ones
+ * in the Linux "if_ether.h" will, I suspect, actually show up in
+ * captures.)
+ */
+#define LINUX_SLL_P_802_3	0x0001	/* Novell 802.3 frames without 802.2 LLC header */
+#define LINUX_SLL_P_802_2	0x0004	/* 802.2 frames (not D/I/X Ethernet) */
+
+#endif
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap/usb.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap/usb.h
new file mode 100644
index 000000000..adcd19c05
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap/usb.h
@@ -0,0 +1,90 @@
+/*
+ * Copyright (c) 2006 Paolo Abeni (Italy)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote 
+ * products derived from this software without specific prior written 
+ * permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Basic USB data struct
+ * By Paolo Abeni <paolo.abeni@email.it>
+ *
+ * @(#) $Header: /tcpdump/master/libpcap/pcap/usb.h,v 1.6 2007/09/22 02:06:08 guy Exp $
+ */
+ 
+#ifndef _PCAP_USB_STRUCTS_H__
+#define _PCAP_USB_STRUCTS_H__
+
+/* 
+ * possible transfer mode
+ */
+#define URB_TRANSFER_IN   0x80
+#define URB_ISOCHRONOUS   0x0
+#define URB_INTERRUPT     0x1
+#define URB_CONTROL       0x2
+#define URB_BULK          0x3
+
+/*
+ * possible event type
+ */
+#define URB_SUBMIT        'S'
+#define URB_COMPLETE      'C'
+#define URB_ERROR         'E'
+
+/*
+ * USB setup header as defined in USB specification.
+ * Appears at the front of each packet in DLT_USB captures.
+ */
+typedef struct _usb_setup {
+	u_int8_t bmRequestType;
+	u_int8_t bRequest;
+	u_int16_t wValue;
+	u_int16_t wIndex;
+	u_int16_t wLength;
+} pcap_usb_setup;
+
+
+/*
+ * Header prepended by linux kernel to each event.
+ * Appears at the front of each packet in DLT_USB_LINUX captures.
+ */
+typedef struct _usb_header {
+	u_int64_t id;
+	u_int8_t event_type;
+	u_int8_t transfer_type;
+	u_int8_t endpoint_number;
+	u_int8_t device_address;
+	u_int16_t bus_id;
+	char setup_flag;/*if !=0 the urb setup header is not present*/
+	char data_flag; /*if !=0 no urb data is present*/
+	int64_t ts_sec;
+	int32_t ts_usec;
+	int32_t status;
+	u_int32_t urb_len;
+	u_int32_t data_len; /* amount of urb data really present in this event*/
+	pcap_usb_setup setup;
+} pcap_usb_header;
+
+
+#endif
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap/vlan.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap/vlan.h
new file mode 100644
index 000000000..b0cb7949b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/pcap/vlan.h
@@ -0,0 +1,46 @@
+/*-
+ * Copyright (c) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed by the University of
+ *      California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#) $Header: /tcpdump/master/libpcap/pcap/vlan.h,v 1.1.2.2 2008-08-06 07:45:59 guy Exp $
+ */
+
+#ifndef lib_pcap_vlan_h
+#define lib_pcap_vlan_h
+
+struct vlan_tag {
+	u_int16_t	vlan_tpid;		/* ETH_P_8021Q */
+	u_int16_t	vlan_tci;		/* VLAN TCI */
+};
+
+#define VLAN_TAG_LEN	4
+
+#endif
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/remote-ext.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/remote-ext.h
new file mode 100644
index 000000000..35a2fff6c
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/remote-ext.h
@@ -0,0 +1,444 @@
+/*
+ * Copyright (c) 2002 - 2003
+ * NetGroup, Politecnico di Torino (Italy)
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * 
+ * 1. Redistributions of source code must retain the above copyright 
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright 
+ * notice, this list of conditions and the following disclaimer in the 
+ * documentation and/or other materials provided with the distribution. 
+ * 3. Neither the name of the Politecnico di Torino nor the names of its 
+ * contributors may be used to endorse or promote products derived from 
+ * this software without specific prior written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ */
+
+
+#ifndef __REMOTE_EXT_H__
+#define __REMOTE_EXT_H__
+
+
+#ifndef HAVE_REMOTE
+#error Please do not include this file directly. Just define HAVE_REMOTE and then include pcap.h
+#endif
+
+// Definition for Microsoft Visual Studio
+#if _MSC_VER > 1000
+#pragma once
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*!
+	\file remote-ext.h
+
+	The goal of this file it to include most of the new definitions that should be
+	placed into the pcap.h file.
+
+	It includes all new definitions (structures and functions like pcap_open().
+    Some of the functions are not really a remote feature, but, right now, 
+	they are placed here.
+*/
+
+
+
+// All this stuff is public
+/*! \addtogroup remote_struct
+	\{
+*/
+
+
+
+
+/*!
+	\brief Defines the maximum buffer size in which address, port, interface names are kept.
+
+	In case the adapter name or such is larger than this value, it is truncated.
+	This is not used by the user; however it must be aware that an hostname / interface
+	name longer than this value will be truncated.
+*/
+#define PCAP_BUF_SIZE 1024
+
+
+/*! \addtogroup remote_source_ID
+	\{
+*/
+
+
+/*!
+	\brief Internal representation of the type of source in use (file, 
+	remote/local interface).
+
+	This indicates a file, i.e. the user want to open a capture from a local file.
+*/
+#define PCAP_SRC_FILE 2
+/*!
+	\brief Internal representation of the type of source in use (file, 
+	remote/local interface).
+
+	This indicates a local interface, i.e. the user want to open a capture from 
+	a local interface. This does not involve the RPCAP protocol.
+*/
+#define PCAP_SRC_IFLOCAL 3
+/*!
+	\brief Internal representation of the type of source in use (file, 
+	remote/local interface).
+
+	This indicates a remote interface, i.e. the user want to open a capture from 
+	an interface on a remote host. This does involve the RPCAP protocol.
+*/
+#define PCAP_SRC_IFREMOTE 4
+
+/*!
+	\}
+*/
+
+
+
+/*! \addtogroup remote_source_string
+
+	The formats allowed by the pcap_open() are the following:
+	- file://path_and_filename [opens a local file]
+	- rpcap://devicename [opens the selected device devices available on the local host, without using the RPCAP protocol]
+	- rpcap://host/devicename [opens the selected device available on a remote host]
+	- rpcap://host:port/devicename [opens the selected device available on a remote host, using a non-standard port for RPCAP]
+	- adaptername [to open a local adapter; kept for compability, but it is strongly discouraged]
+	- (NULL) [to open the first local adapter; kept for compability, but it is strongly discouraged]
+
+	The formats allowed by the pcap_findalldevs_ex() are the following:
+	- file://folder/ [lists all the files in the given folder]
+	- rpcap:// [lists all local adapters]
+	- rpcap://host:port/ [lists the devices available on a remote host]
+
+	Referring to the 'host' and 'port' paramters, they can be either numeric or literal. Since
+	IPv6 is fully supported, these are the allowed formats:
+
+	- host (literal): e.g. host.foo.bar
+	- host (numeric IPv4): e.g. 10.11.12.13
+	- host (numeric IPv4, IPv6 style): e.g. [10.11.12.13]
+	- host (numeric IPv6): e.g. [1:2:3::4]
+	- port: can be either numeric (e.g. '80') or literal (e.g. 'http')
+
+	Here you find some allowed examples:
+	- rpcap://host.foo.bar/devicename [everything literal, no port number]
+	- rpcap://host.foo.bar:1234/devicename [everything literal, with port number]
+	- rpcap://10.11.12.13/devicename [IPv4 numeric, no port number]
+	- rpcap://10.11.12.13:1234/devicename [IPv4 numeric, with port number]
+	- rpcap://[10.11.12.13]:1234/devicename [IPv4 numeric with IPv6 format, with port number]
+	- rpcap://[1:2:3::4]/devicename [IPv6 numeric, no port number]
+	- rpcap://[1:2:3::4]:1234/devicename [IPv6 numeric, with port number]
+	- rpcap://[1:2:3::4]:http/devicename [IPv6 numeric, with literal port number]
+	
+	\{
+*/
+
+
+/*!
+	\brief String that will be used to determine the type of source in use (file,
+	remote/local interface).
+
+	This string will be prepended to the interface name in order to create a string
+	that contains all the information required to open the source.
+
+	This string indicates that the user wants to open a capture from a local file.
+*/
+#define PCAP_SRC_FILE_STRING "file://"
+/*!
+	\brief String that will be used to determine the type of source in use (file,
+	remote/local interface).
+
+	This string will be prepended to the interface name in order to create a string
+	that contains all the information required to open the source.
+
+	This string indicates that the user wants to open a capture from a network interface.
+	This string does not necessarily involve the use of the RPCAP protocol. If the
+	interface required resides on the local host, the RPCAP protocol is not involved
+	and the local functions are used.
+*/
+#define PCAP_SRC_IF_STRING "rpcap://"
+
+/*!
+	\}
+*/
+
+
+
+
+
+/*!
+	\addtogroup remote_open_flags
+	\{
+*/
+
+/*!
+	\brief Defines if the adapter has to go in promiscuous mode.
+
+	It is '1' if you have to open the adapter in promiscuous mode, '0' otherwise.
+	Note that even if this parameter is false, the interface could well be in promiscuous
+	mode for some other reason (for example because another capture process with 
+	promiscuous mode enabled is currently using that interface).
+	On on Linux systems with 2.2 or later kernels (that have the "any" device), this
+	flag does not work on the "any" device; if an argument of "any" is supplied,
+	the 'promisc' flag is ignored.
+*/
+#define PCAP_OPENFLAG_PROMISCUOUS		1
+
+/*!
+	\brief Defines if the data trasfer (in case of a remote
+	capture) has to be done with UDP protocol.
+
+	If it is '1' if you want a UDP data connection, '0' if you want
+	a TCP data connection; control connection is always TCP-based.
+	A UDP connection is much lighter, but it does not guarantee that all
+	the captured packets arrive to the client workstation. Moreover, 
+	it could be harmful in case of network congestion.
+	This flag is meaningless if the source is not a remote interface.
+	In that case, it is simply ignored.
+*/
+#define PCAP_OPENFLAG_DATATX_UDP			2
+
+
+/*!
+	\brief Defines if the remote probe will capture its own generated traffic.
+
+	In case the remote probe uses the same interface to capture traffic and to send
+	data back to the caller, the captured traffic includes the RPCAP traffic as well.
+	If this flag is turned on, the RPCAP traffic is excluded from the capture, so that
+	the trace returned back to the collector is does not include this traffic.
+*/
+#define PCAP_OPENFLAG_NOCAPTURE_RPCAP	4
+
+/*!
+	\brief Defines if the local adapter will capture its own generated traffic.
+
+	This flag tells the underlying capture driver to drop the packets that were sent by itself. 
+	This is usefult when building applications like bridges, that should ignore the traffic
+	they just sent.
+*/
+#define PCAP_OPENFLAG_NOCAPTURE_LOCAL	8
+
+/*!
+	\brief This flag configures the adapter for maximum responsiveness.
+
+	In presence of a large value for nbytes, WinPcap waits for the arrival of several packets before 
+	copying the data to the user. This guarantees a low number of system calls, i.e. lower processor usage, 
+	i.e. better performance, which is good for applications like sniffers. If the user sets the 
+	PCAP_OPENFLAG_MAX_RESPONSIVENESS flag, the capture driver will copy the packets as soon as the application 
+	is ready to receive them. This is suggested for real time applications (like, for example, a bridge) 
+	that need the best responsiveness.*/
+#define PCAP_OPENFLAG_MAX_RESPONSIVENESS	16
+
+/*!
+	\}
+*/
+
+
+/*!
+	\addtogroup remote_samp_methods
+	\{
+*/
+
+/*!
+	\brief No sampling has to be done on the current capture.
+
+	In this case, no sampling algorithms are applied to the current capture.
+*/
+#define PCAP_SAMP_NOSAMP	0
+
+/*!
+	\brief It defines that only 1 out of N packets must be returned to the user.
+
+	In this case, the 'value' field of the 'pcap_samp' structure indicates the
+	number of packets (minus 1) that must be discarded before one packet got accepted.
+	In other words, if 'value = 10', the first packet is returned to the caller, while
+	the following 9 are discarded.
+*/
+#define PCAP_SAMP_1_EVERY_N	1
+
+/*!
+	\brief It defines that we have to return 1 packet every N milliseconds.
+
+	In this case, the 'value' field of the 'pcap_samp' structure indicates the 'waiting
+	time' in milliseconds before one packet got accepted.
+	In other words, if 'value = 10', the first packet is returned to the caller; the next 
+	returned one will be the first packet that arrives when 10ms have elapsed. 
+*/
+#define PCAP_SAMP_FIRST_AFTER_N_MS 2
+
+/*!
+	\}
+*/
+
+
+/*!
+	\addtogroup remote_auth_methods
+	\{
+*/
+
+/*!
+	\brief It defines the NULL authentication.
+
+	This value has to be used within the 'type' member of the pcap_rmtauth structure.
+	The 'NULL' authentication has to be equal to 'zero', so that old applications
+	can just put every field of struct pcap_rmtauth to zero, and it does work.
+*/
+#define RPCAP_RMTAUTH_NULL 0
+/*!
+	\brief It defines the username/password authentication.
+
+	With this type of authentication, the RPCAP protocol will use the username/
+	password provided to authenticate the user on the remote machine. If the
+	authentication is successful (and the user has the right to open network devices)
+	the RPCAP connection will continue; otherwise it will be dropped.
+
+	This value has to be used within the 'type' member of the pcap_rmtauth structure.
+*/
+#define RPCAP_RMTAUTH_PWD 1
+
+/*!
+	\}
+*/
+
+
+
+
+/*!
+
+	\brief This structure keeps the information needed to autheticate
+	the user on a remote machine.
+	
+	The remote machine can either grant or refuse the access according 
+	to the information provided.
+	In case the NULL authentication is required, both 'username' and
+	'password' can be NULL pointers.
+	
+	This structure is meaningless if the source is not a remote interface;
+	in that case, the functions which requires such a structure can accept
+	a NULL pointer as well.
+*/
+struct pcap_rmtauth
+{
+	/*!
+		\brief Type of the authentication required.
+
+		In order to provide maximum flexibility, we can support different types
+		of authentication based on the value of this 'type' variable. The currently 
+		supported authentication methods are defined into the
+		\link remote_auth_methods Remote Authentication Methods Section\endlink.
+
+	*/
+	int type;
+	/*!
+		\brief Zero-terminated string containing the username that has to be 
+		used on the remote machine for authentication.
+		
+		This field is meaningless in case of the RPCAP_RMTAUTH_NULL authentication
+		and it can be NULL.
+	*/
+	char *username;
+	/*!
+		\brief Zero-terminated string containing the password that has to be 
+		used on the remote machine for authentication.
+		
+		This field is meaningless in case of the RPCAP_RMTAUTH_NULL authentication
+		and it can be NULL.
+	*/
+	char *password;
+};
+
+
+/*!
+	\brief This structure defines the information related to sampling.
+
+	In case the sampling is requested, the capturing device should read
+	only a subset of the packets coming from the source. The returned packets depend
+	on the sampling parameters.
+
+	\warning The sampling process is applied <strong>after</strong> the filtering process.
+	In other words, packets are filtered first, then the sampling process selects a
+	subset of the 'filtered' packets and it returns them to the caller.
+*/
+struct pcap_samp
+{
+	/*!
+		Method used for sampling. Currently, the supported methods are listed in the
+		\link remote_samp_methods Sampling Methods Section\endlink.
+	*/
+	int method;
+
+	/*!
+		This value depends on the sampling method defined. For its meaning, please check
+		at the \link remote_samp_methods Sampling Methods Section\endlink.
+	*/
+	int value;
+};
+
+
+
+
+//! Maximum lenght of an host name (needed for the RPCAP active mode)
+#define RPCAP_HOSTLIST_SIZE 1024
+
+
+/*!
+	\}
+*/ // end of public documentation
+
+
+// Exported functions
+
+
+
+/** \name New WinPcap functions
+
+	This section lists the new functions that are able to help considerably in writing
+	WinPcap programs because of their easiness of use.
+ */
+//\{
+pcap_t *pcap_open(const char *source, int snaplen, int flags, int read_timeout, struct pcap_rmtauth *auth, char *errbuf);
+int pcap_createsrcstr(char *source, int type, const char *host, const char *port, const char *name, char *errbuf);
+int pcap_parsesrcstr(const char *source, int *type, char *host, char *port, char *name, char *errbuf);
+int pcap_findalldevs_ex(char *source, struct pcap_rmtauth *auth, pcap_if_t **alldevs, char *errbuf);
+struct pcap_samp *pcap_setsampling(pcap_t *p);
+
+//\}
+// End of new winpcap functions
+
+
+
+/** \name Remote Capture functions
+ */
+//\{ 
+SOCKET pcap_remoteact_accept(const char *address, const char *port, const char *hostlist, char *connectinghost, struct pcap_rmtauth *auth, char *errbuf);
+int pcap_remoteact_list(char *hostlist, char sep, int size, char *errbuf);
+int pcap_remoteact_close(const char *host, char *errbuf);
+void pcap_remoteact_cleanup();
+//\}
+// End of remote capture functions
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif
+
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/wpcap.lib b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/wpcap.lib
new file mode 100644
index 000000000..f832e0445
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/WinPCap/wpcap.lib
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/main.c b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/main.c
new file mode 100644
index 000000000..db4e893b3
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Networkless/main.c
@@ -0,0 +1,341 @@
+/*
+* FreeRTOS
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+ /**
+  * @file main.c
+  * @brief Implements the main function.
+  */
+
+  /* FreeRTOS include. */
+#include <FreeRTOS.h>
+#include "task.h"
+
+/* Standard includes. */
+#include <signal.h>
+#include <conio.h>
+#include <setjmp.h>
+#include <time.h>
+#include <windows.h>
+
+/* Test runner includes. */
+#include "test_runner.h"
+
+/* System application includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_Sockets.h"
+#include "FreeRTOS_DHCP.h"
+#include "demo_logging.h"
+#include "errhandlingapi.h"
+//#include "iot_system_init.h"
+
+//#include "aws_dev_mode_key_provisioning.h"
+
+/* Unity includes. */
+#include "unity.h"
+
+/* Define a name that will be used for LLMNR and NBNS searches. Once running,
+ * you can "ping RTOSDemo" instead of pinging the IP address, which is useful when
+ * using DHCP. */
+#define mainHOST_NAME                  "TestRunner"
+#define mainDEVICE_NICK_NAME           "windows_TestRunner"
+
+
+#define TEST_RUNNER_TASK_STACK_SIZE    10000
+#define FIRST_EXCEPTION_HANDLER        1
+ /* Windows-NT VectoredHandler callback function. */
+static LONG CALLBACK prvExceptionHandler(_In_ PEXCEPTION_POINTERS ExceptionInfo);
+jmp_buf xMark; /* Address for long jump to jump to. */
+
+/*-----------------------------------------------------------*/
+
+/* Notes if the trace is running or not. */
+static BaseType_t xTraceRunning = pdTRUE;
+
+/* Default MAC address configuration.  The demo creates a virtual network
+ * connection that uses this MAC address by accessing the raw Ethernet data
+ * to and from a real network connection on the host PC.  See the
+ * configNETWORK_INTERFACE_TO_USE definition for information on how to configure
+ * the real network connection to use. */
+const uint8_t ucMACAddress[6] =
+{
+    configMAC_ADDR0,
+    configMAC_ADDR1,
+    configMAC_ADDR2,
+    configMAC_ADDR3,
+    configMAC_ADDR4,
+    configMAC_ADDR5
+};
+
+/* The default IP and MAC address used by the demo.  The address configuration
+ * defined here will be used if ipconfigUSE_DHCP is 0, or if ipconfigUSE_DHCP is
+ * 1 but a DHCP server could not be contacted.  See the online documentation for
+ * more information.  In both cases the node can be discovered using
+ * "ping RTOSDemo". */
+static const uint8_t ucIPAddress[4] =
+{
+    configIP_ADDR0,
+    configIP_ADDR1,
+    configIP_ADDR2,
+    configIP_ADDR3
+};
+static const uint8_t ucNetMask[4] =
+{
+    configNET_MASK0,
+    configNET_MASK1,
+    configNET_MASK2,
+    configNET_MASK3
+};
+static const uint8_t ucGatewayAddress[4] =
+{
+    configGATEWAY_ADDR0,
+    configGATEWAY_ADDR1,
+    configGATEWAY_ADDR2,
+    configGATEWAY_ADDR3
+};
+static const uint8_t ucDNSServerAddress[4] =
+{
+    configDNS_SERVER_ADDR0,
+    configDNS_SERVER_ADDR1,
+    configDNS_SERVER_ADDR2,
+    configDNS_SERVER_ADDR3
+};
+
+/* Use by the pseudo random number generator. */
+static UBaseType_t ulNextRand;
+
+/*-----------------------------------------------------------*/
+int main(void)
+{
+    /* Register the Windows VEH for exceptions. */
+    //AddVectoredExceptionHandler(FIRST_EXCEPTION_HANDLER, prvExceptionHandler);
+
+    /* Initialize logging for libraries that depend on it. */
+    vLoggingInit(
+        pdTRUE,
+        pdFALSE,
+        pdFALSE,
+        0,
+        0);
+
+    /* Initialize the network interface.
+     *
+     ***NOTE*** Tasks that use the network are created in the network event hook
+     * when the network is connected and ready for use (see the definition of
+     * vApplicationIPNetworkEventHook() below).  The address values passed in here
+     * are used if ipconfigUSE_DHCP is set to 0, or if ipconfigUSE_DHCP is set to 1
+     * but a DHCP server cannot be contacted. */
+    FreeRTOS_printf(("FreeRTOS_IPInit\n"));
+    FreeRTOS_IPInit(
+        ucIPAddress,
+        ucNetMask,
+        ucGatewayAddress,
+        ucDNSServerAddress,
+        ucMACAddress);
+
+    vTaskStartScheduler();
+
+    return 0;
+}
+/*-----------------------------------------------------------*/
+
+void vApplicationIPNetworkEventHook(eIPCallbackEvent_t eNetworkEvent)
+{
+    static BaseType_t xTasksAlreadyCreated = pdFALSE;
+
+    /* If the network has just come up...*/
+    if ((eNetworkEvent == eNetworkUp) && (xTasksAlreadyCreated == pdFALSE))
+    {
+        xTaskCreate(TEST_RUNNER_RunTests_task,
+            "TestRunner",
+            TEST_RUNNER_TASK_STACK_SIZE,
+            NULL,
+            tskIDLE_PRIORITY, NULL);
+
+        xTasksAlreadyCreated = pdTRUE;
+    }
+}
+
+/*-----------------------------------------------------------*/
+
+static LONG CALLBACK prvExceptionHandler(_In_ PEXCEPTION_POINTERS ExceptionInfo)
+{
+    /* If this function is called during a test, the test immediately fails. */
+    TEST_FAIL();
+
+    return EXCEPTION_CONTINUE_EXECUTION;
+}
+
+/*-----------------------------------------------------------*/
+
+#if ( ( ipconfigUSE_LLMNR != 0 ) || \
+    ( ipconfigUSE_NBNS != 0 ) ||    \
+    ( ipconfigDHCP_REGISTER_HOSTNAME == 1 ) )
+
+const char* pcApplicationHostnameHook(void)
+{
+    /* This function will be called during the DHCP: the machine will be registered
+     * with an IP address plus this name. */
+    return mainHOST_NAME;
+}
+
+#endif /* if ( ( ipconfigUSE_LLMNR != 0 ) || ( ipconfigUSE_NBNS != 0 ) || ( ipconfigDHCP_REGISTER_HOSTNAME == 1 ) ) */
+/*-----------------------------------------------------------*/
+
+#if ( ipconfigUSE_LLMNR != 0 ) || ( ipconfigUSE_NBNS != 0 )
+
+BaseType_t xApplicationDNSQueryHook(const char* pcName)
+{
+    BaseType_t xReturn;
+
+    /* Determine if a name lookup is for this node.  Two names are given
+     * to this node: that returned by pcApplicationHostnameHook() and that set
+     * by mainDEVICE_NICK_NAME. */
+    if (_stricmp(pcName, pcApplicationHostnameHook()) == 0)
+    {
+        xReturn = pdPASS;
+    }
+    else if (_stricmp(pcName, mainDEVICE_NICK_NAME) == 0)
+    {
+        xReturn = pdPASS;
+    }
+    else
+    {
+        xReturn = pdFAIL;
+    }
+
+    return xReturn;
+}
+
+#endif /* if ( ipconfigUSE_LLMNR != 0 ) || ( ipconfigUSE_NBNS != 0 ) */
+/*-----------------------------------------------------------*/
+
+void vApplicationIdleHook(void)
+{
+    const uint32_t ulMSToSleep = 1;
+    const TickType_t xKitHitCheckPeriod = pdMS_TO_TICKS(1000UL);
+    static TickType_t xTimeNow, xLastTimeCheck = 0;
+
+    /* vApplicationIdleHook() will only be called if configUSE_IDLE_HOOK is set
+     * to 1 in FreeRTOSConfig.h.  It will be called on each iteration of the idle
+     * task.  It is essential that code added to this hook function never attempts
+     * to block in any way (for example, call xQueueReceive() with a block time
+     * specified, or call vTaskDelay()).  If application tasks make use of the
+     * vTaskDelete() API function to delete themselves then it is also important
+     * that vApplicationIdleHook() is permitted to return to its calling function,
+     * because it is the responsibility of the idle task to clean up memory
+     * allocated by the kernel to any task that has since deleted itself. */
+
+     /* _kbhit() is a Windows system function, and system functions can cause
+      * crashes if they somehow block the FreeRTOS thread.  The call to _kbhit()
+      * can be removed if it causes problems.  Limiting the frequency of calls to
+      * _kbhit() should minimize the potential for issues. */
+    xTimeNow = xTaskGetTickCount();
+
+    if ((xTimeNow - xLastTimeCheck) > xKitHitCheckPeriod)
+    {
+        
+
+        /* Uncomment the print line to get confirmation that tests are still
+         * running if you suspect a previous run resulted in a crash. */
+         /* configPRINTF( ( "Running...\n" ) ); /**/
+        xLastTimeCheck = xTimeNow;
+    }
+
+    /* This is just a trivial example of an idle hook.  It is called on each
+     * cycle of the idle task if configUSE_IDLE_HOOK is set to 1 in
+     * FreeRTOSConfig.h.  It must *NOT* attempt to block.  In this case the
+     * idle task just sleeps to lower the CPU usage. */
+    Sleep(ulMSToSleep);
+}
+/*-----------------------------------------------------------*/
+
+void vAssertCalled(const char* pcFile,
+    uint32_t ulLine)
+{
+    const uint32_t ulLongSleep = 1000UL;
+    volatile uint32_t ulBlockVariable = 0UL;
+    volatile char* pcFileName = (volatile char*)pcFile;
+    volatile uint32_t ulLineNumber = ulLine;
+
+    (void)pcFileName;
+    (void)ulLineNumber;
+
+    printf("vAssertCalled %s, %ld\n", pcFile, (long)ulLine);
+    fflush(stdout);
+
+    /* Setting ulBlockVariable to a non-zero value in the debugger will allow
+     * this function to be exited. */
+    taskDISABLE_INTERRUPTS();
+    {
+        while (ulBlockVariable == 0UL)
+        {
+            Sleep(ulLongSleep);
+        }
+    }
+    taskENABLE_INTERRUPTS();
+}
+/*-----------------------------------------------------------*/
+
+void getUserCmd(char* pucUserCmd)
+{
+    char cTmp;
+
+    scanf("%c%c", pucUserCmd, &cTmp);
+}
+/*-----------------------------------------------------------*/
+
+UBaseType_t uxRand(void)
+{
+    const uint32_t ulMultiplier = 0x015a4e35UL, ulIncrement = 1UL;
+
+    /* Utility function to generate a pseudo random number. */
+
+    ulNextRand = (ulMultiplier * ulNextRand) + ulIncrement;
+    return((int)(ulNextRand >> 16UL) & 0x7fffUL);
+}
+
+BaseType_t xApplicationGetRandomNumber()
+{
+    return uxRand();
+}
+
+/*
+ * Callback that provides the inputs necessary to generate a randomized TCP
+ * Initial Sequence Number per RFC 6528.  THIS IS ONLY A DUMMY IMPLEMENTATION
+ * THAT RETURNS A PSEUDO RANDOM NUMBER SO IS NOT INTENDED FOR USE IN PRODUCTION
+ * SYSTEMS.
+ */
+extern uint32_t ulApplicationGetNextSequenceNumber(uint32_t ulSourceAddress,
+    uint16_t usSourcePort,
+    uint32_t ulDestinationAddress,
+    uint16_t usDestinationPort)
+{
+    (void)ulSourceAddress;
+    (void)usSourcePort;
+    (void)ulDestinationAddress;
+    (void)usDestinationPort;
+
+    return uxRand();
+}
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Config/FreeRTOSConfig.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Config/FreeRTOSConfig.h
new file mode 100644
index 000000000..016f389fc
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Config/FreeRTOSConfig.h
@@ -0,0 +1,240 @@
+/*
+ * FreeRTOS Kernel V10.2.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+#include "unity_internals.h"
+
+ /*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ * http://www.freertos.org/a00110.html
+ *
+ * The bottom of this file contains some constants specific to running the UDP
+ * stack in this demo.  Constants specific to FreeRTOS+TCP itself (rather than
+ * the demo) are contained in FreeRTOSIPConfig.h.
+ *----------------------------------------------------------*/
+#define configENABLE_BACKWARD_COMPATIBILITY        1
+#define configUSE_PREEMPTION                       1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION    1
+#define configMAX_PRIORITIES                       ( 7 )
+#define configTICK_RATE_HZ                         ( 1000 )                  /* In this non-real time simulated environment the tick frequency has to be at least a multiple of the Win32 tick frequency, and therefore very slow. */
+#define configMINIMAL_STACK_SIZE                   ( ( unsigned short ) 60 ) /* In this simulated case, the stack only has to hold one small structure as the real stack is part of the Win32 thread. */
+#define configTOTAL_HEAP_SIZE                      ( ( size_t ) ( 2048U * 1024U ) )
+#define configMAX_TASK_NAME_LEN                    ( 15 )
+#define configUSE_TRACE_FACILITY                   1
+#define configUSE_16_BIT_TICKS                     0
+#define configIDLE_SHOULD_YIELD                    1
+#define configUSE_CO_ROUTINES                      0
+#define configUSE_MUTEXES                          1
+#define configUSE_RECURSIVE_MUTEXES                1
+#define configQUEUE_REGISTRY_SIZE                  0
+#define configUSE_APPLICATION_TASK_TAG             1
+#define configUSE_COUNTING_SEMAPHORES              1
+#define configUSE_ALTERNATIVE_API                  0
+#define configNUM_THREAD_LOCAL_STORAGE_POINTERS    3      /* FreeRTOS+FAT requires 2 pointers if a CWD is supported. */
+#define configRECORD_STACK_HIGH_ADDRESS            1
+
+ /* Hook function related definitions. */
+#define configUSE_TICK_HOOK                        0
+#define configUSE_IDLE_HOOK                        1
+#define configUSE_MALLOC_FAILED_HOOK               1
+#define configCHECK_FOR_STACK_OVERFLOW             0      /* Not applicable to the Win32 port. */
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                           1
+#define configTIMER_TASK_PRIORITY                  ( configMAX_PRIORITIES - 1 )
+#define configTIMER_QUEUE_LENGTH                   5
+#define configTIMER_TASK_STACK_DEPTH               ( configMINIMAL_STACK_SIZE * 2 )
+
+/* Event group related definitions. */
+#define configUSE_EVENT_GROUPS                     1
+
+/* Run time stats gathering definitions. */
+unsigned long ulGetRunTimeCounterValue(void);
+void vConfigureTimerForRunTimeStats(void);
+#define configGENERATE_RUN_TIME_STATS    1
+#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS()    vConfigureTimerForRunTimeStats()
+#define portGET_RUN_TIME_COUNTER_VALUE()            ulGetRunTimeCounterValue()
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                   0
+#define configMAX_CO_ROUTINE_PRIORITIES         ( 2 )
+
+/* Currently the TCP/IP stack is using dynamic allocation, and the MQTT task is
+ * using static allocation. */
+#define configSUPPORT_DYNAMIC_ALLOCATION        1
+#define configSUPPORT_STATIC_ALLOCATION         1
+
+ /* Set the following definitions to 1 to include the API function, or zero
+  * to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet                1
+#define INCLUDE_uxTaskPriorityGet               1
+#define INCLUDE_vTaskDelete                     1
+#define INCLUDE_vTaskCleanUpResources           0
+#define INCLUDE_vTaskSuspend                    1
+#define INCLUDE_vTaskDelayUntil                 1
+#define INCLUDE_vTaskDelay                      1
+#define INCLUDE_uxTaskGetStackHighWaterMark     1
+#define INCLUDE_xTaskGetSchedulerState          1
+#define INCLUDE_xTimerGetTimerTaskHandle        0
+#define INCLUDE_xTaskGetIdleTaskHandle          0
+#define INCLUDE_xQueueGetMutexHolder            1
+#define INCLUDE_eTaskGetState                   1
+#define INCLUDE_xEventGroupSetBitsFromISR       1
+#define INCLUDE_xTimerPendFunctionCall          1
+#define INCLUDE_xTaskGetCurrentTaskHandle       1
+#define INCLUDE_xTaskAbortDelay                 1
+
+  /* This demo makes use of one or more example stats formatting functions.  These
+   * format the raw data provided by the uxTaskGetSystemState() function in to human
+   * readable ASCII form.  See the notes in the implementation of vTaskList() within
+   * FreeRTOS/Source/tasks.c for limitations.  configUSE_STATS_FORMATTING_FUNCTIONS
+   * is set to 2 so the formatting functions are included without the stdio.h being
+   * included in tasks.c.  That is because this project defines its own sprintf()
+   * functions. */
+#define configUSE_STATS_FORMATTING_FUNCTIONS    1
+
+   /* Assert call defined for debug builds. */
+void vAssertCalled(const char* pcFile,
+    uint32_t ulLine);
+
+#define configASSERT( x )    if( ( x ) == 0 ) TEST_ABORT()
+
+/* The function that implements FreeRTOS printf style output, and the macro
+ * that maps the configPRINTF() macros to that function. */
+void vLoggingPrintf(char const* pcFormat,
+    ...);
+#define configPRINTF( X )    vLoggingPrintf X
+
+/* Non-format version thread-safe print. */
+extern void vLoggingPrint(const char* pcMessage);
+#define configPRINT( X )    vLoggingPrint( X )
+
+/* Non-format version thread-safe print. */
+#define configPRINT_STRING( X )    vLoggingPrintf( X )
+
+/* Application specific definitions follow. **********************************/
+
+/* If configINCLUDE_DEMO_DEBUG_STATS is set to one, then a few basic IP trace
+ * macros are defined to gather some UDP stack statistics that can then be viewed
+ * through the CLI interface. */
+#define configINCLUDE_DEMO_DEBUG_STATS       1
+
+ /* The size of the global output buffer that is available for use when there
+  * are multiple command interpreters running at once (for example, one on a UART
+  * and one on TCP/IP).  This is done to prevent an output buffer being defined by
+  * each implementation - which would waste RAM.  In this case, there is only one
+  * command interpreter running, and it has its own local output buffer, so the
+  * global buffer is just set to be one byte long as it is not used and should not
+  * take up unnecessary RAM. */
+#define configCOMMAND_INT_MAX_OUTPUT_SIZE    1
+
+  /* Only used when running in the FreeRTOS Windows simulator.  Defines the
+   * priority of the task used to simulate Ethernet interrupts. */
+#define configMAC_ISR_SIMULATOR_PRIORITY     ( configMAX_PRIORITIES - 1 )
+
+   /* This demo creates a virtual network connection by accessing the raw Ethernet
+    * or WiFi data to and from a real network connection.  Many computers have more
+    * than one real network port, and configNETWORK_INTERFACE_TO_USE is used to tell
+    * the demo which real port should be used to create the virtual port.  The ports
+    * available are displayed on the console when the application is executed.  For
+    * example, on my development laptop setting configNETWORK_INTERFACE_TO_USE to 4
+    * results in the wired network being used, while setting
+    * configNETWORK_INTERFACE_TO_USE to 2 results in the wireless network being
+    * used. */
+#define configNETWORK_INTERFACE_TO_USE       ( 0L )
+
+    /* The address of an echo server that will be used by the two demo echo client
+     * tasks:
+     * http://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/TCP_Echo_Clients.html,
+     * http://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/UDP_Echo_Clients.html. */
+#define configECHO_SERVER_ADDR0              192
+#define configECHO_SERVER_ADDR1              168
+#define configECHO_SERVER_ADDR2              2
+#define configECHO_SERVER_ADDR3              6
+#define configTCP_ECHO_CLIENT_PORT           7
+
+     /* Default MAC address configuration.  The demo creates a virtual network
+      * connection that uses this MAC address by accessing the raw Ethernet/WiFi data
+      * to and from a real network connection on the host PC.  See the
+      * configNETWORK_INTERFACE_TO_USE definition above for information on how to
+      * configure the real network connection to use. */
+#define configMAC_ADDR0                      0x00
+#define configMAC_ADDR1                      0x11
+#define configMAC_ADDR2                      0x22
+#define configMAC_ADDR3                      0x33
+#define configMAC_ADDR4                      0x44
+#define configMAC_ADDR5                      0x32
+
+      /* Default IP address configuration.  Used in ipconfigUSE_DHCP is set to 0, or
+       * ipconfigUSE_DHCP is set to 1 but a DNS server cannot be contacted. */
+#define configIP_ADDR0                       192
+#define configIP_ADDR1                       168
+#define configIP_ADDR2                       0
+#define configIP_ADDR3                       105
+
+       /* Default gateway IP address configuration.  Used in ipconfigUSE_DHCP is set to
+        * 0, or ipconfigUSE_DHCP is set to 1 but a DNS server cannot be contacted. */
+#define configGATEWAY_ADDR0                  192
+#define configGATEWAY_ADDR1                  168
+#define configGATEWAY_ADDR2                  0
+#define configGATEWAY_ADDR3                  1
+
+        /* Default DNS server configuration.  OpenDNS addresses are 208.67.222.222 and
+         * 208.67.220.220.  Used in ipconfigUSE_DHCP is set to 0, or ipconfigUSE_DHCP is
+         * set to 1 but a DNS server cannot be contacted.*/
+#define configDNS_SERVER_ADDR0               208
+#define configDNS_SERVER_ADDR1               67
+#define configDNS_SERVER_ADDR2               222
+#define configDNS_SERVER_ADDR3               222
+
+         /* Default netmask configuration.  Used in ipconfigUSE_DHCP is set to 0, or
+          * ipconfigUSE_DHCP is set to 1 but a DNS server cannot be contacted. */
+#define configNET_MASK0                      255
+#define configNET_MASK1                      255
+#define configNET_MASK2                      255
+#define configNET_MASK3                      0
+
+          /* The UDP port to which print messages are sent. */
+#define configPRINT_PORT                     ( 15000 )
+
+#define configPROFILING                      ( 0 )
+
+/* Pseudo random number generater used by some demo tasks. */
+extern uint32_t ulRand();
+#define configRAND32()    ulRand()
+
+/* The platform that FreeRTOS is running on. */
+#define configPLATFORM_NAME    "WinSim"
+
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Config/FreeRTOSIPConfig.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Config/FreeRTOSIPConfig.h
new file mode 100644
index 000000000..0a52d8023
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Config/FreeRTOSIPConfig.h
@@ -0,0 +1,305 @@
+/*
+FreeRTOS Kernel V10.2.0
+Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy of
+this software and associated documentation files (the "Software"), to deal in
+the Software without restriction, including without limitation the rights to
+use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+the Software, and to permit persons to whom the Software is furnished to do so,
+subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all
+copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+ http://aws.amazon.com/freertos
+ http://www.FreeRTOS.org
+*/
+
+
+/*****************************************************************************
+*
+* See the following URL for configuration information.
+* http://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/TCP_IP_Configuration.html
+*
+*****************************************************************************/
+
+#ifndef FREERTOS_IP_CONFIG_H
+#define FREERTOS_IP_CONFIG_H
+
+/* Set to 1 to print out debug messages.  If ipconfigHAS_DEBUG_PRINTF is set to
+ * 1 then FreeRTOS_debug_printf should be defined to the function used to print
+ * out the debugging messages. */
+#define ipconfigHAS_DEBUG_PRINTF    0
+#if ( ipconfigHAS_DEBUG_PRINTF == 1 )
+#define FreeRTOS_debug_printf( X )    configPRINTF( X )
+#endif
+
+ /* Set to 1 to print out non debugging messages, for example the output of the
+  * FreeRTOS_netstat() command, and ping replies.  If ipconfigHAS_PRINTF is set to 1
+  * then FreeRTOS_printf should be set to the function used to print out the
+  * messages. */
+#define ipconfigHAS_PRINTF    1
+#if ( ipconfigHAS_PRINTF == 1 )
+#define FreeRTOS_printf( X )    configPRINTF( X )
+#endif
+
+  /* Define the byte order of the target MCU (the MCU FreeRTOS+TCP is executing
+   * on).  Valid options are pdFREERTOS_BIG_ENDIAN and pdFREERTOS_LITTLE_ENDIAN. */
+#define ipconfigBYTE_ORDER                         pdFREERTOS_LITTLE_ENDIAN
+
+   /* If the network card/driver includes checksum offloading (IP/TCP/UDP checksums)
+    * then set ipconfigDRIVER_INCLUDED_RX_IP_CHECKSUM to 1 to prevent the software
+    * stack repeating the checksum calculations. */
+#define ipconfigDRIVER_INCLUDED_RX_IP_CHECKSUM     1
+
+    /* Several API's will block until the result is known, or the action has been
+     * performed, for example FreeRTOS_send() and FreeRTOS_recv().  The timeouts can be
+     * set per socket, using setsockopt().  If not set, the times below will be
+     * used as defaults. */
+#define ipconfigSOCK_DEFAULT_RECEIVE_BLOCK_TIME    ( 5000 )
+#define ipconfigSOCK_DEFAULT_SEND_BLOCK_TIME       ( 5000 )
+
+     /* Include support for DNS caching.  For TCP, having a small DNS cache is very
+      * useful.  When a cache is present, ipconfigDNS_REQUEST_ATTEMPTS can be kept low
+      * and also DNS may use small timeouts.  If a DNS reply comes in after the DNS
+      * socket has been destroyed, the result will be stored into the cache.  The next
+      * call to FreeRTOS_gethostbyname() will return immediately, without even creating
+      * a socket.
+      */
+#define ipconfigUSE_DNS_CACHE                      ( 1 )
+#define ipconfigDNS_CACHE_ADDRESSES_PER_ENTRY      ( 6 )
+#define ipconfigDNS_REQUEST_ATTEMPTS               ( 2 )
+
+      /* The IP stack executes it its own task (although any application task can make
+       * use of its services through the published sockets API). ipconfigUDP_TASK_PRIORITY
+       * sets the priority of the task that executes the IP stack.  The priority is a
+       * standard FreeRTOS task priority so can take any value from 0 (the lowest
+       * priority) to (configMAX_PRIORITIES - 1) (the highest priority).
+       * configMAX_PRIORITIES is a standard FreeRTOS configuration parameter defined in
+       * FreeRTOSConfig.h, not FreeRTOSIPConfig.h. Consideration needs to be given as to
+       * the priority assigned to the task executing the IP stack relative to the
+       * priority assigned to tasks that use the IP stack. */
+#define ipconfigIP_TASK_PRIORITY                   ( configMAX_PRIORITIES - 2 )
+
+       /* The size, in words (not bytes), of the stack allocated to the FreeRTOS+TCP
+        * task.  This setting is less important when the FreeRTOS Win32 simulator is used
+        * as the Win32 simulator only stores a fixed amount of information on the task
+        * stack.  FreeRTOS includes optional stack overflow detection, see:
+        * http://www.freertos.org/Stacks-and-stack-overflow-checking.html. */
+#define ipconfigIP_TASK_STACK_SIZE_WORDS           ( configMINIMAL_STACK_SIZE * 5 )
+
+        /* ipconfigRAND32() is called by the IP stack to generate random numbers for
+         * things such as a DHCP transaction number or initial sequence number.  Random
+         * number generation is performed via this macro to allow applications to use their
+         * own random number generation method.  For example, it might be possible to
+         * generate a random number by sampling noise on an analogue input. */
+extern uint32_t ulRand();
+#define ipconfigRAND32()    ulRand()
+
+/* If ipconfigUSE_NETWORK_EVENT_HOOK is set to 1 then FreeRTOS+TCP will call the
+ * network event hook at the appropriate times.  If ipconfigUSE_NETWORK_EVENT_HOOK
+ * is not set to 1 then the network event hook will never be called. See:
+ * http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_UDP/API/vApplicationIPNetworkEventHook.shtml.
+ */
+#define ipconfigUSE_NETWORK_EVENT_HOOK           1
+
+ /* Sockets have a send block time attribute.  If FreeRTOS_sendto() is called but
+  * a network buffer cannot be obtained then the calling task is held in the Blocked
+  * state (so other tasks can continue to executed) until either a network buffer
+  * becomes available or the send block time expires.  If the send block time expires
+  * then the send operation is aborted.  The maximum allowable send block time is
+  * capped to the value set by ipconfigMAX_SEND_BLOCK_TIME_TICKS.  Capping the
+  * maximum allowable send block time prevents prevents a deadlock occurring when
+  * all the network buffers are in use and the tasks that process (and subsequently
+  * free) the network buffers are themselves blocked waiting for a network buffer.
+  * ipconfigMAX_SEND_BLOCK_TIME_TICKS is specified in RTOS ticks.  A time in
+  * milliseconds can be converted to a time in ticks by dividing the time in
+  * milliseconds by portTICK_PERIOD_MS. */
+#define ipconfigUDP_MAX_SEND_BLOCK_TIME_TICKS    ( 5000U / portTICK_PERIOD_MS )
+
+  /* If ipconfigUSE_DHCP is 1 then FreeRTOS+TCP will attempt to retrieve an IP
+   * address, netmask, DNS server address and gateway address from a DHCP server.  If
+   * ipconfigUSE_DHCP is 0 then FreeRTOS+TCP will use a static IP address.  The
+   * stack will revert to using the static IP address even when ipconfigUSE_DHCP is
+   * set to 1 if a valid configuration cannot be obtained from a DHCP server for any
+   * reason.  The static configuration used is that passed into the stack by the
+   * FreeRTOS_IPInit() function call. */
+#define ipconfigUSE_DHCP                         1
+#define ipconfigDHCP_REGISTER_HOSTNAME           1
+#define ipconfigDHCP_USES_UNICAST                1
+
+   /* If ipconfigDHCP_USES_USER_HOOK is set to 1 then the application writer must
+    * provide an implementation of the DHCP callback function,
+    * xApplicationDHCPUserHook(). */
+#define ipconfigUSE_DHCP_HOOK                    0
+
+    /* When ipconfigUSE_DHCP is set to 1, DHCP requests will be sent out at
+     * increasing time intervals until either a reply is received from a DHCP server
+     * and accepted, or the interval between transmissions reaches
+     * ipconfigMAXIMUM_DISCOVER_TX_PERIOD.  The IP stack will revert to using the
+     * static IP address passed as a parameter to FreeRTOS_IPInit() if the
+     * re-transmission time interval reaches ipconfigMAXIMUM_DISCOVER_TX_PERIOD without
+     * a DHCP reply being received. */
+#define ipconfigMAXIMUM_DISCOVER_TX_PERIOD \
+    ( 120000U / portTICK_PERIOD_MS )
+
+     /* The ARP cache is a table that maps IP addresses to MAC addresses.  The IP
+      * stack can only send a UDP message to a remove IP address if it knowns the MAC
+      * address associated with the IP address, or the MAC address of the router used to
+      * contact the remote IP address.  When a UDP message is received from a remote IP
+      * address the MAC address and IP address are added to the ARP cache.  When a UDP
+      * message is sent to a remote IP address that does not already appear in the ARP
+      * cache then the UDP message is replaced by a ARP message that solicits the
+      * required MAC address information.  ipconfigARP_CACHE_ENTRIES defines the maximum
+      * number of entries that can exist in the ARP table at any one time. */
+#define ipconfigARP_CACHE_ENTRIES                 6
+
+      /* ARP requests that do not result in an ARP response will be re-transmitted a
+       * maximum of ipconfigMAX_ARP_RETRANSMISSIONS times before the ARP request is
+       * aborted. */
+#define ipconfigMAX_ARP_RETRANSMISSIONS           ( 5 )
+
+       /* ipconfigMAX_ARP_AGE defines the maximum time between an entry in the ARP
+        * table being created or refreshed and the entry being removed because it is stale.
+        * New ARP requests are sent for ARP cache entries that are nearing their maximum
+        * age.  ipconfigMAX_ARP_AGE is specified in tens of seconds, so a value of 150 is
+        * equal to 1500 seconds (or 25 minutes). */
+#define ipconfigMAX_ARP_AGE                       150
+
+        /* Implementing FreeRTOS_inet_addr() necessitates the use of string handling
+         * routines, which are relatively large.  To save code space the full
+         * FreeRTOS_inet_addr() implementation is made optional, and a smaller and faster
+         * alternative called FreeRTOS_inet_addr_quick() is provided.  FreeRTOS_inet_addr()
+         * takes an IP in decimal dot format (for example, "192.168.0.1") as its parameter.
+         * FreeRTOS_inet_addr_quick() takes an IP address as four separate numerical octets
+         * (for example, 192, 168, 0, 1) as its parameters.  If
+         * ipconfigINCLUDE_FULL_INET_ADDR is set to 1 then both FreeRTOS_inet_addr() and
+         * FreeRTOS_indet_addr_quick() are available.  If ipconfigINCLUDE_FULL_INET_ADDR is
+         * not set to 1 then only FreeRTOS_indet_addr_quick() is available. */
+#define ipconfigINCLUDE_FULL_INET_ADDR            1
+
+         /* ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS defines the total number of network buffer that
+          * are available to the IP stack.  The total number of network buffers is limited
+          * to ensure the total amount of RAM that can be consumed by the IP stack is capped
+          * to a pre-determinable value. */
+#define ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS    60
+
+          /* A FreeRTOS queue is used to send events from application tasks to the IP
+           * stack.  ipconfigEVENT_QUEUE_LENGTH sets the maximum number of events that can
+           * be queued for processing at any one time.  The event queue must be a minimum of
+           * 5 greater than the total number of network buffers. */
+#define ipconfigEVENT_QUEUE_LENGTH \
+    ( ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS + 5 )
+
+           /* The address of a socket is the combination of its IP address and its port
+            * number.  FreeRTOS_bind() is used to manually allocate a port number to a socket
+            * (to 'bind' the socket to a port), but manual binding is not normally necessary
+            * for client sockets (those sockets that initiate outgoing connections rather than
+            * wait for incoming connections on a known port number).  If
+            * ipconfigALLOW_SOCKET_SEND_WITHOUT_BIND is set to 1 then calling
+            * FreeRTOS_sendto() on a socket that has not yet been bound will result in the IP
+            * stack automatically binding the socket to a port number from the range
+            * socketAUTO_PORT_ALLOCATION_START_NUMBER to 0xffff.  If
+            * ipconfigALLOW_SOCKET_SEND_WITHOUT_BIND is set to 0 then calling FreeRTOS_sendto()
+            * on a socket that has not yet been bound will result in the send operation being
+            * aborted. */
+#define ipconfigALLOW_SOCKET_SEND_WITHOUT_BIND         1
+
+            /* Defines the Time To Live (TTL) values used in outgoing UDP packets. */
+#define ipconfigUDP_TIME_TO_LIVE                       128
+/* Also defined in FreeRTOSIPConfigDefaults.h. */
+#define ipconfigTCP_TIME_TO_LIVE                       128
+
+/* USE_TCP: Use TCP and all its features. */
+#define ipconfigUSE_TCP                                ( 1 )
+
+/* USE_WIN: Let TCP use windowing mechanism. */
+#define ipconfigUSE_TCP_WIN                            ( 1 )
+
+/* The MTU is the maximum number of bytes the payload of a network frame can
+ * contain.  For normal Ethernet V2 frames the maximum MTU is 1500.  Setting a
+ * lower value can save RAM, depending on the buffer management scheme used.  If
+ * ipconfigCAN_FRAGMENT_OUTGOING_PACKETS is 1 then (ipconfigNETWORK_MTU - 28) must
+ * be divisible by 8. */
+#define ipconfigNETWORK_MTU                            1200U
+
+ /* Set ipconfigUSE_DNS to 1 to include a basic DNS client/resolver.  DNS is used
+  * through the FreeRTOS_gethostbyname() API function. */
+#define ipconfigUSE_DNS                                1
+
+  /* If ipconfigREPLY_TO_INCOMING_PINGS is set to 1 then the IP stack will
+   * generate replies to incoming ICMP echo (ping) requests. */
+#define ipconfigREPLY_TO_INCOMING_PINGS                1
+
+   /* If ipconfigSUPPORT_OUTGOING_PINGS is set to 1 then the
+    * FreeRTOS_SendPingRequest() API function is available. */
+#define ipconfigSUPPORT_OUTGOING_PINGS                 0
+
+    /* If ipconfigSUPPORT_SELECT_FUNCTION is set to 1 then the FreeRTOS_select()
+     * (and associated) API function is available. */
+#define ipconfigSUPPORT_SELECT_FUNCTION                0
+
+     /* If ipconfigFILTER_OUT_NON_ETHERNET_II_FRAMES is set to 1 then Ethernet frames
+      * that are not in Ethernet II format will be dropped.  This option is included for
+      * potential future IP stack developments. */
+#define ipconfigFILTER_OUT_NON_ETHERNET_II_FRAMES      1
+
+      /* If ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES is set to 1 then it is the
+       * responsibility of the Ethernet interface to filter out packets that are of no
+       * interest.  If the Ethernet interface does not implement this functionality, then
+       * set ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES to 0 to have the IP stack
+       * perform the filtering instead (it is much less efficient for the stack to do it
+       * because the packet will already have been passed into the stack).  If the
+       * Ethernet driver does all the necessary filtering in hardware then software
+       * filtering can be removed by using a value other than 1 or 0. */
+#define ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES    1
+
+       /* The windows simulator cannot really simulate MAC interrupts, and needs to
+        * block occasionally to allow other tasks to run. */
+#define configWINDOWS_MAC_INTERRUPT_SIMULATOR_DELAY    ( 20 / portTICK_PERIOD_MS )
+
+        /* Advanced only: in order to access 32-bit fields in the IP packets with
+         * 32-bit memory instructions, all packets will be stored 32-bit-aligned,
+         * plus 16-bits. This has to do with the contents of the IP-packets: all
+         * 32-bit fields are 32-bit-aligned, plus 16-bit. */
+#define ipconfigPACKET_FILLER_SIZE                     2U
+
+         /* Define the size of the pool of TCP window descriptors.  On the average, each
+          * TCP socket will use up to 2 x 6 descriptors, meaning that it can have 2 x 6
+          * outstanding packets (for Rx and Tx).  When using up to 10 TP sockets
+          * simultaneously, one could define TCP_WIN_SEG_COUNT as 120. */
+#define ipconfigTCP_WIN_SEG_COUNT                      240
+
+          /* Each TCP socket has a circular buffers for Rx and Tx, which have a fixed
+           * maximum size.  Define the size of Rx buffer for TCP sockets. */
+#define ipconfigTCP_RX_BUFFER_LENGTH                   ( 10000 )
+
+           /* Define the size of Tx buffer for TCP sockets. */
+#define ipconfigTCP_TX_BUFFER_LENGTH                   ( 10000 )
+
+/* When using call-back handlers, the driver may check if the handler points to
+ * real program memory (RAM or flash) or just has a random non-zero value. */
+#define ipconfigIS_VALID_PROG_ADDRESS( x )    ( ( x ) != NULL )
+
+ /* Include support for TCP keep-alive messages. */
+#define ipconfigTCP_KEEP_ALIVE                   ( 1 )
+#define ipconfigTCP_KEEP_ALIVE_INTERVAL          ( 20 ) /* Seconds. */
+
+/* The socket semaphore is used to unblock the MQTT task. */
+#define ipconfigSOCKET_HAS_USER_SEMAPHORE        ( 0 )
+
+#define ipconfigSOCKET_HAS_USER_WAKE_CALLBACK    ( 1 )
+#define ipconfigUSE_CALLBACKS                    ( 0 )
+
+
+#define portINLINE                               __inline
+
+#endif /* FREERTOS_IP_CONFIG_H */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Full-TCP-Suite.sln b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Full-TCP-Suite.sln
new file mode 100644
index 000000000..f907d968a
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Full-TCP-Suite.sln
@@ -0,0 +1,23 @@
+
+Microsoft Visual Studio Solution File, Format Version 11.00
+# Visual Studio 2010
+Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "RTOSDemo", "WIN32.vcxproj", "{C686325E-3261-42F7-AEB1-DDE5280E1CEB}"
+EndProject
+Global
+	GlobalSection(TestCaseManagementSettings) = postSolution
+		CategoryFile = FreeRTOS_Plus_TCP_Minimal.vsmdi
+	EndGlobalSection
+	GlobalSection(SolutionConfigurationPlatforms) = preSolution
+		Debug|Win32 = Debug|Win32
+		Release|Win32 = Release|Win32
+	EndGlobalSection
+	GlobalSection(ProjectConfigurationPlatforms) = postSolution
+		{C686325E-3261-42F7-AEB1-DDE5280E1CEB}.Debug|Win32.ActiveCfg = Debug|Win32
+		{C686325E-3261-42F7-AEB1-DDE5280E1CEB}.Debug|Win32.Build.0 = Debug|Win32
+		{C686325E-3261-42F7-AEB1-DDE5280E1CEB}.Release|Win32.ActiveCfg = Release|Win32
+		{C686325E-3261-42F7-AEB1-DDE5280E1CEB}.Release|Win32.Build.0 = Release|Win32
+	EndGlobalSection
+	GlobalSection(SolutionProperties) = preSolution
+		HideSolutionNode = FALSE
+	EndGlobalSection
+EndGlobal
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Logging/demo_logging.c b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Logging/demo_logging.c
new file mode 100644
index 000000000..0d33b0968
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Logging/demo_logging.c
@@ -0,0 +1,526 @@
+/*
+ * FreeRTOS Kernel V10.3.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+/*
+ * Logging utility that allows FreeRTOS tasks to log to a UDP port, stdout, and
+ * disk file without making any Win32 system calls themselves.
+ *
+ * Messages logged to a UDP port are sent directly (using FreeRTOS+TCP), but as
+ * FreeRTOS tasks cannot make Win32 system calls messages sent to stdout or a
+ * disk file are sent via a stream buffer to a Win32 thread which then performs
+ * the actual output.
+ */
+
+/* Standard includes. */
+#include <stdio.h>
+#include <stdint.h>
+#include <stdarg.h>
+#include <io.h>
+#include <ctype.h>
+
+/* FreeRTOS includes. */
+#include <FreeRTOS.h>
+#include "task.h"
+
+/* FreeRTOS+TCP includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_Sockets.h"
+#include "FreeRTOS_Stream_Buffer.h"
+
+/* Demo includes. */
+#include "demo_logging.h"
+
+/*-----------------------------------------------------------*/
+
+/* The maximum size to which the log file may grow, before being renamed
+to .ful. */
+#define dlLOGGING_FILE_SIZE		( 40ul * 1024ul * 1024ul )
+
+/* Dimensions the arrays into which print messages are created. */
+#define dlMAX_PRINT_STRING_LENGTH	255
+
+/* The size of the stream buffer used to pass messages from FreeRTOS tasks to
+the Win32 thread that is responsible for making any Win32 system calls that are
+necessary for the selected logging method. */
+#define dlLOGGING_STREAM_BUFFER_SIZE  32768
+
+/* A block time of zero simply means don't block. */
+#define dlDONT_BLOCK	0
+
+/*-----------------------------------------------------------*/
+
+/*
+ * Called from vLoggingInit() to start a new disk log file.
+ */
+static void prvFileLoggingInit( void );
+
+/*
+ * Attempt to write a message to the file.
+ */
+static void prvLogToFile( const char *pcMessage, size_t xLength );
+
+/*
+ * Simply close the logging file, if it is open.
+ */
+static void prvFileClose( void );
+
+/*
+ * Before the scheduler is started this function is called directly.  After the
+ * scheduler has started it is called from the Windows thread dedicated to
+ * outputting log messages.  Only the windows thread actually performs the
+ * writing so as not to disrupt the simulation by making Windows system calls
+ * from FreeRTOS tasks.
+ */
+static void prvLoggingFlushBuffer( void );
+
+/*
+ * The windows thread that performs the actual writing of messages that require
+ * Win32 system calls.  Only the windows thread can make system calls so as not
+ * to disrupt the simulation by making Windows calls from FreeRTOS tasks.
+ */
+static DWORD WINAPI prvWin32LoggingThread( void *pvParam );
+
+/*
+ * Creates the socket to which UDP messages are sent.  This function is not
+ * called directly to prevent the print socket being created from within the IP
+ * task - which could result in a deadlock.  Instead the function call is
+ * deferred to run in the RTOS daemon task - hence it prototype.
+ */
+static void prvCreatePrintSocket( void *pvParameter1, uint32_t ulParameter2 );
+
+/*-----------------------------------------------------------*/
+
+/* Windows event used to wake the Win32 thread which performs any logging that
+needs Win32 system calls. */
+static void *pvLoggingThreadEvent = NULL;
+
+/* Stores the selected logging targets passed in as parameters to the
+vLoggingInit() function. */
+BaseType_t xStdoutLoggingUsed = pdFALSE, xDiskFileLoggingUsed = pdFALSE, xUDPLoggingUsed = pdFALSE;
+
+/* Circular buffer used to pass messages from the FreeRTOS tasks to the Win32
+thread that is responsible for making Win32 calls (when stdout or a disk log is
+used). */
+static StreamBuffer_t *xLogStreamBuffer = NULL;
+
+/* Handle to the file used for logging.  This is left open while there are
+messages waiting to be logged, then closed again in between logs. */
+static FILE *pxLoggingFileHandle = NULL;
+
+/* When true prints are performed directly.  After start up xDirectPrint is set
+to pdFALSE - at which time prints that require Win32 system calls are done by
+the Win32 thread responsible for logging. */
+BaseType_t xDirectPrint = pdTRUE;
+
+/* File names for the in use and complete (full) log files. */
+static const char *pcLogFileName = "RTOSDemo.log";
+static const char *pcFullLogFileName = "RTOSDemo.ful";
+
+/* Keep the current file size in a variable, as an optimisation. */
+static size_t ulSizeOfLoggingFile = 0ul;
+
+/* The UDP socket and address on/to which print messages are sent. */
+Socket_t xPrintSocket = FREERTOS_INVALID_SOCKET;
+struct freertos_sockaddr xPrintUDPAddress;
+
+/*-----------------------------------------------------------*/
+
+void vLoggingInit( BaseType_t xLogToStdout, BaseType_t xLogToFile, BaseType_t xLogToUDP, uint32_t ulRemoteIPAddress, uint16_t usRemotePort )
+{
+	/* Can only be called before the scheduler has started. */
+	configASSERT( xTaskGetSchedulerState() == taskSCHEDULER_NOT_STARTED );
+
+	#if( ( ipconfigHAS_DEBUG_PRINTF == 1 ) || ( ipconfigHAS_PRINTF == 1 ) )
+	{
+		HANDLE Win32Thread;
+
+		/* Record which output methods are to be used. */
+		xStdoutLoggingUsed = xLogToStdout;
+		xDiskFileLoggingUsed = xLogToFile;
+		xUDPLoggingUsed = xLogToUDP;
+
+		/* If a disk file is used then initialise it now. */
+		if( xDiskFileLoggingUsed != pdFALSE )
+		{
+			prvFileLoggingInit();
+		}
+
+		/* If UDP logging is used then store the address to which the log data
+		will be sent - but don't create the socket yet because the network is
+		not initialised. */
+		if( xUDPLoggingUsed != pdFALSE )
+		{
+			/* Set the address to which the print messages are sent. */
+			xPrintUDPAddress.sin_port = FreeRTOS_htons( usRemotePort );
+			xPrintUDPAddress.sin_addr = ulRemoteIPAddress;
+		}
+
+		/* If a disk file or stdout are to be used then Win32 system calls will
+		have to be made.  Such system calls cannot be made from FreeRTOS tasks
+		so create a stream buffer to pass the messages to a Win32 thread, then
+		create the thread itself, along with a Win32 event that can be used to
+		unblock the thread. */
+		if( ( xStdoutLoggingUsed != pdFALSE ) || ( xDiskFileLoggingUsed != pdFALSE ) )
+		{
+			/* Create the buffer. */
+			xLogStreamBuffer = ( StreamBuffer_t * ) malloc( sizeof( *xLogStreamBuffer ) - sizeof( xLogStreamBuffer->ucArray ) + dlLOGGING_STREAM_BUFFER_SIZE + 1 );
+			configASSERT( xLogStreamBuffer );
+			memset( xLogStreamBuffer, '\0', sizeof( *xLogStreamBuffer ) - sizeof( xLogStreamBuffer->ucArray ) );
+			xLogStreamBuffer->LENGTH = dlLOGGING_STREAM_BUFFER_SIZE + 1;
+
+			/* Create the Windows event. */
+			pvLoggingThreadEvent = CreateEvent( NULL, FALSE, TRUE, "StdoutLoggingEvent" );
+
+			/* Create the thread itself. */
+			Win32Thread = CreateThread(
+				NULL,	/* Pointer to thread security attributes. */
+				0,		/* Initial thread stack size, in bytes. */
+				prvWin32LoggingThread,	/* Pointer to thread function. */
+				NULL,	/* Argument for new thread. */
+				0,		/* Creation flags. */
+				NULL );
+
+			/* Use the cores that are not used by the FreeRTOS tasks. */
+			SetThreadAffinityMask( Win32Thread, ~0x01u );
+			SetThreadPriorityBoost( Win32Thread, TRUE );
+			SetThreadPriority( Win32Thread, THREAD_PRIORITY_IDLE );
+		}
+	}
+	#else
+	{
+		/* FreeRTOSIPConfig is set such that no print messages will be output.
+		Avoid compiler warnings about unused parameters. */
+		( void ) xLogToStdout;
+		( void ) xLogToFile;
+		( void ) xLogToUDP;
+		( void ) usRemotePort;
+		( void ) ulRemoteIPAddress;
+	}
+	#endif /* ( ipconfigHAS_DEBUG_PRINTF == 1 ) || ( ipconfigHAS_PRINTF == 1 )  */
+}
+/*-----------------------------------------------------------*/
+
+static void prvCreatePrintSocket( void *pvParameter1, uint32_t ulParameter2 )
+{
+static const TickType_t xSendTimeOut = pdMS_TO_TICKS( 0 );
+Socket_t xSocket;
+
+	/* The function prototype is that of a deferred function, but the parameters
+	are not actually used. */
+	( void ) pvParameter1;
+	( void ) ulParameter2;
+
+	xSocket = FreeRTOS_socket( FREERTOS_AF_INET, FREERTOS_SOCK_DGRAM, FREERTOS_IPPROTO_UDP );
+
+	if( xSocket != FREERTOS_INVALID_SOCKET )
+	{
+		/* FreeRTOS+TCP decides which port to bind to. */
+		FreeRTOS_setsockopt( xSocket, 0, FREERTOS_SO_SNDTIMEO, &xSendTimeOut, sizeof( xSendTimeOut ) );
+		FreeRTOS_bind( xSocket, NULL, 0 );
+
+		/* Now the socket is bound it can be assigned to the print socket. */
+		xPrintSocket = xSocket;
+	}
+}
+/*-----------------------------------------------------------*/
+
+void vLoggingPrintf( const char *pcFormat, ... )
+{
+char cPrintString[ dlMAX_PRINT_STRING_LENGTH ];
+char cOutputString[ dlMAX_PRINT_STRING_LENGTH ];
+char *pcSource, *pcTarget, *pcBegin;
+size_t xLength, xLength2, rc;
+static BaseType_t xMessageNumber = 0;
+va_list args;
+uint32_t ulIPAddress;
+const char *pcTaskName;
+const char *pcNoTask = "None";
+int iOriginalPriority;
+HANDLE xCurrentTask;
+
+
+	if( ( xStdoutLoggingUsed != pdFALSE ) || ( xDiskFileLoggingUsed != pdFALSE ) || ( xUDPLoggingUsed != pdFALSE ) )
+	{
+		/* There are a variable number of parameters. */
+		va_start( args, pcFormat );
+
+		/* Additional info to place at the start of the log. */
+		if( xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED )
+		{
+			pcTaskName = pcTaskGetName( NULL );
+		}
+		else
+		{
+			pcTaskName = pcNoTask;
+		}
+
+		if( strcmp( pcFormat, "\n" ) != 0 )
+		{
+			xLength = snprintf( cPrintString, dlMAX_PRINT_STRING_LENGTH, "%lu %lu [%s] ",
+				xMessageNumber++,
+				( unsigned long ) xTaskGetTickCount(),
+				pcTaskName );
+		}
+		else
+		{
+			xLength = 0;
+			memset( cPrintString, 0x00, dlMAX_PRINT_STRING_LENGTH );
+		}
+
+		xLength2 = vsnprintf( cPrintString + xLength, dlMAX_PRINT_STRING_LENGTH - xLength, pcFormat, args );
+
+		if( xLength2 <  0 )
+		{
+			/* Clean up. */
+			xLength2 = dlMAX_PRINT_STRING_LENGTH - 1 - xLength;
+			cPrintString[ dlMAX_PRINT_STRING_LENGTH - 1 ] = '\0';
+		}
+
+		xLength += xLength2;
+		va_end( args );
+
+		/* For ease of viewing, copy the string into another buffer, converting
+		IP addresses to dot notation on the way. */
+		pcSource = cPrintString;
+		pcTarget = cOutputString;
+
+		while( ( *pcSource ) != '\0' )
+		{
+			*pcTarget = *pcSource;
+			pcTarget++;
+			pcSource++;
+
+			/* Look forward for an IP address denoted by 'ip'. */
+			if( ( isxdigit( pcSource[ 0 ] ) != pdFALSE ) && ( pcSource[ 1 ] == 'i' ) && ( pcSource[ 2 ] == 'p' ) )
+			{
+				*pcTarget = *pcSource;
+				pcTarget++;
+				*pcTarget = '\0';
+				pcBegin = pcTarget - 8;
+
+				while( ( pcTarget > pcBegin ) && ( isxdigit( pcTarget[ -1 ] ) != pdFALSE ) )
+				{
+					pcTarget--;
+				}
+
+				sscanf( pcTarget, "%8X", &ulIPAddress );
+				rc = sprintf( pcTarget, "%lu.%lu.%lu.%lu",
+					( unsigned long ) ( ulIPAddress >> 24UL ),
+					( unsigned long ) ( (ulIPAddress >> 16UL) & 0xffUL ),
+					( unsigned long ) ( (ulIPAddress >> 8UL) & 0xffUL ),
+					( unsigned long ) ( ulIPAddress & 0xffUL ) );
+				pcTarget += rc;
+				pcSource += 3; /* skip "<n>ip" */
+			}
+		}
+
+		/* How far through the buffer was written? */
+		xLength = ( BaseType_t ) ( pcTarget - cOutputString );
+
+		/* If the message is to be logged to a UDP port then it can be sent directly
+		because it only uses FreeRTOS function (not Win32 functions). */
+		if( xUDPLoggingUsed != pdFALSE )
+		{
+			if( ( xPrintSocket == FREERTOS_INVALID_SOCKET ) && ( FreeRTOS_IsNetworkUp() != pdFALSE ) )
+			{
+				/* Create and bind the socket to which print messages are sent.  The
+				xTimerPendFunctionCall() function is used even though this is
+				not an interrupt because this function is called from the IP task
+				and the	IP task cannot itself wait for a socket to bind.  The
+				parameters to prvCreatePrintSocket() are not required so set to
+				NULL or 0. */
+				xTimerPendFunctionCall( prvCreatePrintSocket, NULL, 0, dlDONT_BLOCK );
+			}
+
+			if( xPrintSocket != FREERTOS_INVALID_SOCKET )
+			{
+				FreeRTOS_sendto( xPrintSocket, cOutputString, xLength, 0, &xPrintUDPAddress, sizeof( xPrintUDPAddress ) );
+
+				/* Just because the UDP data logger I'm using is dumb. */
+				FreeRTOS_sendto( xPrintSocket, "\r", sizeof( char ), 0, &xPrintUDPAddress, sizeof( xPrintUDPAddress ) );
+			}
+		}
+
+		/* If logging is also to go to either stdout or a disk file then it cannot
+		be output here - so instead write the message to the stream buffer and wake
+		the Win32 thread which will read it from the stream buffer and perform the
+		actual output. */
+		if( ( xStdoutLoggingUsed != pdFALSE ) || ( xDiskFileLoggingUsed != pdFALSE ) )
+		{
+			configASSERT( xLogStreamBuffer );
+
+			/* How much space is in the buffer? */
+			xLength2 = uxStreamBufferGetSpace( xLogStreamBuffer );
+
+			/* There must be enough space to write both the string and the length of
+			the string. */
+			if( xLength2 >= ( xLength + sizeof( xLength ) ) )
+			{
+				/* First write in the length of the data, then write in the data
+				itself.  Raising the thread priority is used as a critical section
+				as there are potentially multiple writers.  The stream buffer is
+				only thread safe when there is a single writer (likewise for
+				reading from the buffer). */
+				xCurrentTask = GetCurrentThread();
+				iOriginalPriority = GetThreadPriority( xCurrentTask );
+				SetThreadPriority( GetCurrentThread(), THREAD_PRIORITY_TIME_CRITICAL );
+				uxStreamBufferAdd( xLogStreamBuffer, 0, ( const uint8_t * ) &( xLength ), sizeof( xLength ) );
+				uxStreamBufferAdd( xLogStreamBuffer, 0, ( const uint8_t * ) cOutputString, xLength );
+				SetThreadPriority( GetCurrentThread(), iOriginalPriority );
+			}
+
+			/* xDirectPrint is initialised to pdTRUE, and while it remains true the
+			logging output function is called directly.  When the system is running
+			the output function cannot be called directly because it would get
+			called from both FreeRTOS tasks and Win32 threads - so instead wake the
+			Win32 thread responsible for the actual output. */
+			if( xDirectPrint != pdFALSE )
+			{
+				/* While starting up, the thread which calls prvWin32LoggingThread()
+				is not running yet and xDirectPrint will be pdTRUE. */
+				prvLoggingFlushBuffer();
+			}
+			else if( pvLoggingThreadEvent != NULL )
+			{
+				/* While running, wake up prvWin32LoggingThread() to send the
+				logging data. */
+				SetEvent( pvLoggingThreadEvent );
+			}
+		}
+	}
+}
+/*-----------------------------------------------------------*/
+
+static void prvLoggingFlushBuffer( void )
+{
+size_t xLength;
+char cPrintString[ dlMAX_PRINT_STRING_LENGTH ];
+
+	/* Is there more than the length value stored in the circular buffer
+	used to pass data from the FreeRTOS simulator into this Win32 thread? */
+	while( uxStreamBufferGetSize( xLogStreamBuffer ) > sizeof( xLength ) )
+	{
+		memset( cPrintString, 0x00, dlMAX_PRINT_STRING_LENGTH );
+		uxStreamBufferGet( xLogStreamBuffer, 0, ( uint8_t * ) &xLength, sizeof( xLength ), pdFALSE );
+		uxStreamBufferGet( xLogStreamBuffer, 0, ( uint8_t * ) cPrintString, xLength, pdFALSE );
+
+		/* Write the message to standard out if requested to do so when
+		vLoggingInit() was called, or if the network is not yet up. */
+		if( ( xStdoutLoggingUsed != pdFALSE ) || ( FreeRTOS_IsNetworkUp() == pdFALSE ) )
+		{
+			/* Write the message to stdout. */
+			printf( "%s", cPrintString ); /*_RB_ Replace with _write(). */
+		}
+
+		/* Write the message to a file if requested to do so when
+		vLoggingInit() was called. */
+		if( xDiskFileLoggingUsed != pdFALSE )
+		{
+			prvLogToFile( cPrintString, xLength );
+		}
+	}
+
+	prvFileClose();
+}
+/*-----------------------------------------------------------*/
+
+static DWORD WINAPI prvWin32LoggingThread( void *pvParameter )
+{
+const DWORD xMaxWait = 1000;
+
+	( void ) pvParameter;
+
+	/* From now on, prvLoggingFlushBuffer() will only be called from this
+	Windows thread */
+	xDirectPrint = pdFALSE;
+
+	for( ;; )
+	{
+		/* Wait to be told there are message waiting to be logged. */
+		WaitForSingleObject( pvLoggingThreadEvent, xMaxWait );
+
+		/* Write out all waiting messages. */
+		prvLoggingFlushBuffer();
+	}
+}
+/*-----------------------------------------------------------*/
+
+static void prvFileLoggingInit( void )
+{
+FILE *pxHandle = fopen( pcLogFileName, "a" );
+
+	if( pxHandle != NULL )
+	{
+		fseek( pxHandle, SEEK_END, 0ul );
+		ulSizeOfLoggingFile = ftell( pxHandle );
+		fclose( pxHandle );
+	}
+	else
+	{
+		ulSizeOfLoggingFile = 0ul;
+	}
+}
+/*-----------------------------------------------------------*/
+
+static void prvFileClose( void )
+{
+	if( pxLoggingFileHandle != NULL )
+	{
+		fclose( pxLoggingFileHandle );
+		pxLoggingFileHandle = NULL;
+	}
+}
+/*-----------------------------------------------------------*/
+
+static void prvLogToFile( const char *pcMessage, size_t xLength )
+{
+	if( pxLoggingFileHandle == NULL )
+	{
+		pxLoggingFileHandle = fopen( pcLogFileName, "a" );
+	}
+
+	if( pxLoggingFileHandle != NULL )
+	{
+		fwrite( pcMessage, 1, xLength, pxLoggingFileHandle );
+		ulSizeOfLoggingFile += xLength;
+
+		/* If the file has grown to its maximum permissible size then close and
+		rename it - then start with a new file. */
+		if( ulSizeOfLoggingFile > ( size_t ) dlLOGGING_FILE_SIZE )
+		{
+			prvFileClose();
+			if( _access( pcFullLogFileName, 00 ) == 0 )
+			{
+				remove( pcFullLogFileName );
+			}
+			rename( pcLogFileName, pcFullLogFileName );
+			ulSizeOfLoggingFile = 0;
+		}
+	}
+}
+/*-----------------------------------------------------------*/
+
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Logging/demo_logging.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Logging/demo_logging.h
new file mode 100644
index 000000000..e94f7bf3e
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Logging/demo_logging.h
@@ -0,0 +1,48 @@
+/*
+ * FreeRTOS Kernel V10.3.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+#ifndef DEMO_LOGGING_H
+#define DEMO_LOGGING_H
+
+/*
+ * Initialise a logging system that can be used from FreeRTOS tasks and Win32
+ * threads.  Do not call printf() directly while the scheduler is running.
+ *
+ * Set xLogToStdout, xLogToFile and xLogToUDP to either pdTRUE or pdFALSE to
+ * lot to stdout, a disk file and a UDP port respectively.
+ *
+ * If xLogToUDP is pdTRUE then ulRemoteIPAddress and usRemotePort must be set
+ * to the IP address and port number to which UDP log messages will be sent.
+ */
+void vLoggingInit(	BaseType_t xLogToStdout,
+					BaseType_t xLogToFile,
+					BaseType_t xLogToUDP,
+					uint32_t ulRemoteIPAddress,
+					uint16_t usRemotePort );
+
+#endif /* DEMO_LOGGING_H */
+
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Logging/run-time-stats-utils.c b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Logging/run-time-stats-utils.c
new file mode 100644
index 000000000..f289c2327
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Logging/run-time-stats-utils.c
@@ -0,0 +1,101 @@
+/*
+ * FreeRTOS V1.4.8
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+
+/*
+ * Utility functions required to gather run time statistics.  See:
+ * http://www.freertos.org/rtos-run-time-stats.html
+ *
+ * Note that this is a simulated port, where simulated time is a lot slower than
+ * real time, therefore the run time counter values have no real meaningful
+ * units.
+ *
+ * Also note that it is assumed this demo is going to be used for short periods
+ * of time only, and therefore timer overflows are not handled.
+ */
+
+/* FreeRTOS includes. */
+#include <FreeRTOS.h>
+
+/* Variables used in the creation of the run time stats time base.  Run time
+ * stats record how much time each task spends in the Running state. */
+static long long llInitialRunTimeCounterValue = 0LL, llTicksPerHundedthMillisecond = 0LL;
+
+/*-----------------------------------------------------------*/
+
+void vConfigureTimerForRunTimeStats( void )
+{
+    LARGE_INTEGER liPerformanceCounterFrequency, liInitialRunTimeValue;
+
+    /* Initialise the variables used to create the run time stats time base.
+     * Run time stats record how much time each task spends in the Running
+     * state. */
+
+    if( QueryPerformanceFrequency( &liPerformanceCounterFrequency ) == 0 )
+    {
+        llTicksPerHundedthMillisecond = 1;
+    }
+    else
+    {
+        /* How many times does the performance counter increment in 1/100th
+         * millisecond. */
+        llTicksPerHundedthMillisecond = liPerformanceCounterFrequency.QuadPart / 100000LL;
+
+        /* What is the performance counter value now, this will be subtracted
+         * from readings taken at run time. */
+        QueryPerformanceCounter( &liInitialRunTimeValue );
+        llInitialRunTimeCounterValue = liInitialRunTimeValue.QuadPart;
+    }
+}
+/*-----------------------------------------------------------*/
+
+unsigned long ulGetRunTimeCounterValue( void )
+{
+    LARGE_INTEGER liCurrentCount;
+    unsigned long ulReturn;
+
+    /* What is the performance counter value now? */
+    QueryPerformanceCounter( &liCurrentCount );
+
+    /* Subtract the performance counter value reading taken when the
+     * application started to get a count from that reference point, then
+     * scale to (simulated) 1/100ths of a millisecond. */
+    if( llTicksPerHundedthMillisecond == 0 )
+    {
+        /* The trace macros can call this function before the kernel has been
+         * started, in which case llTicksPerHundedthMillisecond will not have been
+         * initialised. */
+        ulReturn = 0;
+    }
+    else
+    {
+        ulReturn = ( unsigned long )
+                   ( ( liCurrentCount.QuadPart - llInitialRunTimeCounterValue ) /
+                     llTicksPerHundedthMillisecond );
+    }
+
+    return ulReturn;
+}
+/*-----------------------------------------------------------*/
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/ReadMe.txt b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/ReadMe.txt
new file mode 100644
index 000000000..34adcf735
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/ReadMe.txt
@@ -0,0 +1,23 @@
+The FreeRTOS+TCP source code and example projects are currently provided in
+their own .zip file download, but using the directory structure of the official
+FreeRTOS .zip file download.  This allow the projects to be seamlessly moved
+from one download to the other, but can seem strange when the files are viewed
+in isolation.
+
+The FreeRTOS+TCP test suite Visual Studio project file is in the following
+directory: FreeRTOS-Plus\Test\FreeRTOS-Plus-TCP\Integration\Full-TCP-Suite
+
+This project is a version of the standard FreeRTOS demos that includes the
+integration tests of +TCP. It tests the +TCP stack through the use of FreeRTOS_Sockets
+API. To Run this project, make sure that the computer is connected to a network
+via ethernet cable. 
+- Open the project (using file named `Full-TCP-Suite.sln`) and
+choose the required network interface by modifying this line `#define 
+configNETWORK_INTERFACE_TO_USE` in FreeRTOSConfig.h. 
+- Modify the `tcptestECHO_SERVER_ADDR[0-3]` and `tcptestECHO_PORT` in the file 
+`test_tcp.h` according to the address of the unsecure echo server of your choosing.
+An implementation of echo server is provided here: 
+https://docs.aws.amazon.com/freertos/latest/portingguide/afr-echo-server.html
+
+Once these changes are made, just build and run the project. It should run 23 test
+of which all should pass with a proper connection.
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Read_Me_Build_Instructions.url b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Read_Me_Build_Instructions.url
new file mode 100644
index 000000000..f01ec1411
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Read_Me_Build_Instructions.url
@@ -0,0 +1,6 @@
+[{000214A0-0000-0000-C000-000000000046}]
+Prop3=19,2
+[InternetShortcut]
+URL=http://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/examples_FreeRTOS_simulator.html
+IDList=
+HotKey=0
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/include/application_version.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/include/application_version.h
new file mode 100644
index 000000000..bf78174b1
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/include/application_version.h
@@ -0,0 +1,36 @@
+/*
+ * FreeRTOS V202002.00
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+#ifndef _AWS_APPLICATION_VERSION_H_
+#define _AWS_APPLICATION_VERSION_H_
+
+#include "iot_appversion32.h"
+extern const AppVersion32_t xAppFirmwareVersion;
+
+#define APP_VERSION_MAJOR    0
+#define APP_VERSION_MINOR    9
+#define APP_VERSION_BUILD    0
+
+#endif
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/include/clientcredential.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/include/clientcredential.h
new file mode 100644
index 000000000..58d2ca4fa
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/include/clientcredential.h
@@ -0,0 +1,54 @@
+/*
+ * FreeRTOS V202002.00
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+
+#ifndef __CLIENTCREDENTIAL__H__
+#define __CLIENTCREDENTIAL__H__
+
+  /*
+   * @brief Wi-Fi network to join.
+   *
+   * @todo If you are using Wi-Fi, set this to your network name.
+   */
+#define clientcredentialWIFI_SSID       ""
+
+   /*
+    * @brief Password needed to join Wi-Fi network.
+    *
+    * @todo If you are using WPA, set this to your network password.
+    */
+#define clientcredentialWIFI_PASSWORD   ""
+
+    /*
+     * @brief Wi-Fi network security type.
+     *
+     * @see WIFISecurity_t.
+     *
+     * @note Possible values are eWiFiSecurityOpen, eWiFiSecurityWEP, eWiFiSecurityWPA,
+     * eWiFiSecurityWPA2 (depending on the support of your device Wi-Fi radio).
+     */
+#define clientcredentialWIFI_SECURITY   eWiFiSecurityWPA2
+
+#endif
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/include/config_common.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/include/config_common.h
new file mode 100644
index 000000000..2b1820f52
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/include/config_common.h
@@ -0,0 +1,299 @@
+/*
+ * FreeRTOS V202002.00
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+/* This file contains default configuration settings for the tests on FreeRTOS. */
+
+#ifndef IOT_CONFIG_COMMON_H_
+#define IOT_CONFIG_COMMON_H_
+
+/* FreeRTOS include. */
+#include "FreeRTOS.h"
+
+/* Credentials include. */
+#include <aws_clientcredential.h>
+#include <aws_clientcredential_keys.h>
+
+/* Unity framework includes. */
+#include "unity.h"
+
+/* Use platform types on FreeRTOS. */
+#include "platform/iot_platform_types_freertos.h"
+
+/* SDK version. */
+#define IOT_SDK_VERSION    "4.0.0"
+
+/* This config file is for the tests. */
+#ifndef IOT_BUILD_TESTS
+    #define IOT_BUILD_TESTS    ( 1 )
+#endif
+
+#if IOT_BUILD_TESTS != 1
+    #error "IOT_BUILD_TESTS must be 1 for this test project."
+#endif
+
+/* Unity on FreeRTOS does not provide malloc overrides. */
+#define IOT_TEST_NO_MALLOC_OVERRIDES    ( 1 )
+
+/* Supported network types.*/
+#define AWSIOT_NETWORK_TYPE_NONE        0x00000000
+#define AWSIOT_NETWORK_TYPE_WIFI        0x00000001
+#define AWSIOT_NETWORK_TYPE_BLE         0x00000002
+
+/* Logging puts function. */
+#define IotLogging_Puts( str )    configPRINTF( ( "%s\r\n", str ) )
+
+/* Enable asserts in libraries. */
+#define IOT_METRICS_ENABLE_ASSERTS         ( 1 )
+#define IOT_CONTAINERS_ENABLE_ASSERTS      ( 1 )
+#define IOT_TASKPOOL_ENABLE_ASSERTS        ( 1 )
+#define IOT_MQTT_ENABLE_ASSERTS            ( 1 )
+#define AWS_IOT_SHADOW_ENABLE_ASSERTS      ( 1 )
+#define AWS_IOT_DEFENDER_ENABLE_ASSERTS    ( 1 )
+#define IOT_BLE_ENABLE_ASSERTS             ( 1 )
+
+/* Assert functions. */
+#define IotMetrics_Assert( expression )        if( ( expression ) == 0 ) TEST_FAIL_MESSAGE( "Assertion failure" )
+#define IotContainers_Assert( expression )     if( ( expression ) == 0 ) TEST_FAIL_MESSAGE( "Assertion failure" )
+#define IotTaskPool_Assert( expression )       if( ( expression ) == 0 ) TEST_FAIL_MESSAGE( "Assertion failure" )
+#define IotMqtt_Assert( expression )           if( ( expression ) == 0 ) TEST_FAIL_MESSAGE( "Assertion failure" )
+#define AwsIotShadow_Assert( expression )      if( ( expression ) == 0 ) TEST_FAIL_MESSAGE( "Assertion failure" )
+#define AwsIotDefender_Assert( expression )    if( ( expression ) == 0 ) TEST_FAIL_MESSAGE( "Assertion failure" )
+#define IotBle_Assert( expression )            if( ( expression ) == 0 ) TEST_FAIL_MESSAGE( "Assertion failure" )
+
+/* Control the usage of dynamic memory allocation. */
+#ifndef IOT_STATIC_MEMORY_ONLY
+    #define IOT_STATIC_MEMORY_ONLY    ( 0 )
+#endif
+
+/* Memory allocation configuration. Note that these functions will not be affected
+ * by IOT_STATIC_MEMORY_ONLY. */
+#define IotNetwork_Malloc    pvPortMalloc
+#define IotNetwork_Free      vPortFree
+#define IotThreads_Malloc    pvPortMalloc
+#define IotThreads_Free      vPortFree
+#define IotLogging_Malloc    pvPortMalloc
+#define IotLogging_Free      vPortFree
+#define IotBle_Malloc        pvPortMalloc
+#define IotBle_Free          vPortFree
+/* #define IotLogging_StaticBufferSize */
+#define IotTest_Malloc       pvPortMalloc
+#define IotTest_Free         vPortFree
+
+
+/* Memory allocation function configuration for the MQTT library. The MQTT library
+ * will be affected by IOT_STATIC_MEMORY_ONLY. */
+#if IOT_STATIC_MEMORY_ONLY == 0
+    #define IotMetrics_MallocTcpConnection       pvPortMalloc
+    #define IotMetrics_FreeTcpConnection         vPortFree
+    #define IotMetrics_MallocIpAddress           pvPortMalloc
+    #define IotMetrics_FreeIpAddress             vPortFree
+
+    #define IotTaskPool_MallocTaskPool           pvPortMalloc
+    #define IotTaskPool_FreeTaskPool             vPortFree
+    #define IotTaskPool_MallocJob                pvPortMalloc
+    #define IotTaskPool_FreeJob                  vPortFree
+    #define IotTaskPool_MallocTimerEvent         pvPortMalloc
+    #define IotTaskPool_FreeTimerEvent           vPortFree
+
+    #define IotMqtt_MallocConnection             pvPortMalloc
+    #define IotMqtt_FreeConnection               vPortFree
+    #define IotMqtt_MallocMessage                pvPortMalloc
+    #define IotMqtt_FreeMessage                  vPortFree
+    #define IotMqtt_MallocOperation              pvPortMalloc
+    #define IotMqtt_FreeOperation                vPortFree
+    #define IotMqtt_MallocSubscription           pvPortMalloc
+    #define IotMqtt_FreeSubscription             vPortFree
+
+    #define IotSerializer_MallocCborEncoder      pvPortMalloc
+    #define IotSerializer_FreeCborEncoder        vPortFree
+    #define IotSerializer_MallocCborParser       pvPortMalloc
+    #define IotSerializer_FreeCborParser         vPortFree
+    #define IotSerializer_MallocCborValue        pvPortMalloc
+    #define IotSerializer_FreeCborValue          vPortFree
+    #define IotSerializer_MallocDecoderObject    pvPortMalloc
+    #define IotSerializer_FreeDecoderObject      vPortFree
+
+    #define AwsIotShadow_MallocOperation         pvPortMalloc
+    #define AwsIotShadow_FreeOperation           vPortFree
+    #define AwsIotShadow_MallocString            pvPortMalloc
+    #define AwsIotShadow_FreeString              vPortFree
+    #define AwsIotShadow_MallocSubscription      pvPortMalloc
+    #define AwsIotShadow_FreeSubscription        vPortFree
+
+    #define AwsIotDefender_MallocReport          pvPortMalloc
+    #define AwsIotDefender_FreeReport            vPortFree
+    #define AwsIotDefender_MallocTopic           pvPortMalloc
+    #define AwsIotDefender_FreeTopic             vPortFree
+#endif /* if IOT_STATIC_MEMORY_ONLY == 0 */
+
+/* Require MQTT serializer overrides for the tests. */
+#define IOT_MQTT_ENABLE_SERIALIZER_OVERRIDES    ( 1 )
+
+/* Platform and SDK name for AWS MQTT metrics. Only used when AWS_IOT_MQTT_ENABLE_METRICS is 1. */
+#define IOT_SDK_NAME                            "AmazonFreeRTOS"
+#ifdef configPLATFORM_NAME
+    #define IOT_PLATFORM_NAME                   configPLATFORM_NAME
+#else
+    #define IOT_PLATFORM_NAME                   "Unknown"
+#endif
+
+/* BLE_HAL test suites header file abstraction */
+#define IOT_LINEAR_CONTAINERS             "iot_linear_containers.h"
+#define IOT_THREADS                       "platform/iot_threads.h"
+#define IOT_CLOCK                         "platform/iot_clock.h"
+#define IOT_PLATFORM_TYPES                "types/iot_platform_types.h"
+#define IOT_BT_HAL_MANAGER_ADAPTER_BLE    "bt_hal_manager_adapter_ble.h"
+#define IOT_BT_HAL_MANAGER_ADAPTER        "bt_hal_manager.h"
+#define IOT_BT_HAL_GATT_SERVER            "bt_hal_gatt_server.h"
+#define IOT_BT_HAL_GATT_TYPES             "bt_hal_gatt_types.h"
+#define IOT_UNITY_FIXTURE                 "unity_fixture.h"
+#define IOT_UNITY                         "unity.h"
+#define IOT_LOG                           "iot_logging_setup.h"
+
+/* Cloud endpoint to which the device connects to. */
+#define IOT_CLOUD_ENDPOINT                clientcredentialMQTT_BROKER_ENDPOINT
+
+/* Certificate for the device.*/
+#define IOT_DEVICE_CERTIFICATE            keyCLIENT_CERTIFICATE_PEM
+
+/**
+ * @brief Unique identifier used to recognize a device by the cloud.
+ * This could be SHA-256 of the device certificate.
+ */
+extern const char * getDeviceIdentifier( void );
+#define IOT_DEVICE_IDENTIFIER    getDeviceIdentifier()
+
+/**
+ * @brief Metrics emitted by the device.
+ */
+extern const char * getDeviceMetrics( void );
+#define AWS_IOT_METRICS_USERNAME    getDeviceMetrics()
+
+/**
+ * @brief Length of the metrics emitted by device.
+ */
+extern uint16_t getDeviceMetricsLength( void );
+#define AWS_IOT_METRICS_USERNAME_LENGTH     getDeviceMetricsLength()
+
+/* Set Thing Name. */
+#define AWS_IOT_TEST_SHADOW_THING_NAME      clientcredentialIOT_THING_NAME
+#define AWS_IOT_TEST_DEFENDER_THING_NAME    clientcredentialIOT_THING_NAME
+
+/* Configuration for defender demo: set format to CBOR. */
+#define AWS_IOT_DEFENDER_FORMAT             AWS_IOT_DEFENDER_FORMAT_CBOR
+
+/* Configuration for defender demo: use long tag for readable output. Please use short tag for the real application. */
+#define AWS_IOT_DEFENDER_USE_LONG_TAG       ( 1 )
+
+/* Define the data type of metrics connection id as same as Socket_t in aws_secure_socket.h */
+#define IotMetricsConnectionId_t            void *
+
+/* For compatibility with the FreeRTOS test framework, UnityPrint and similar
+ * must be redefined. */
+extern int snprintf( char *,
+                     size_t,
+                     const char *,
+                     ... );
+#define UnityPrint( X )          configPRINTF( ( X ) )
+#define UnityPrintNumber( X )    { char number[ 12 ] = { 0 }; snprintf( number, 12, "%d", X ); configPRINTF( ( number ) ); }
+#undef UNITY_PRINT_EOL
+#define UNITY_PRINT_EOL()        configPRINTF( ( "\r\n" ) )
+
+/* Default platform thread stack size and priority. */
+#ifndef IOT_THREAD_DEFAULT_STACK_SIZE
+    #define IOT_THREAD_DEFAULT_STACK_SIZE    2048
+#endif
+#ifndef IOT_THREAD_DEFAULT_PRIORITY
+    #define IOT_THREAD_DEFAULT_PRIORITY      tskIDLE_PRIORITY
+#endif
+
+/* Platform network configuration. */
+#ifndef IOT_NETWORK_RECEIVE_TASK_PRIORITY
+    #define IOT_NETWORK_RECEIVE_TASK_PRIORITY      ( tskIDLE_PRIORITY + 1 )
+#endif
+#ifndef IOT_NETWORK_RECEIVE_TASK_STACK_SIZE
+    #define IOT_NETWORK_RECEIVE_TASK_STACK_SIZE    IOT_THREAD_DEFAULT_STACK_SIZE
+#endif
+
+/* Use FreeRTOS Secure Sockets network for tests. */
+#ifndef IOT_TEST_NETWORK_HEADER
+    #define IOT_TEST_NETWORK_HEADER    "platform/iot_network_freertos.h"
+#endif
+
+/* All tests use a secured connection. */
+#define IOT_TEST_SECURED_CONNECTION    ( 1 )
+
+/* Allow the network interface to be chosen by at runtime. */
+struct IotNetworkInterface;
+extern const struct IotNetworkInterface * IotTestNetwork_GetNetworkInterface( void );
+#define IOT_TEST_NETWORK_INTERFACE    IotTestNetwork_GetNetworkInterface()
+
+/* Allow the network serializer to be chosen by at runtime. */
+struct IotMqttSerializer;
+extern const struct IotMqttSerializer * IotTestNetwork_GetSerializer( void );
+#define IOT_TEST_MQTT_SERIALIZER                     IotTestNetwork_GetSerializer()
+
+/* Retry the MQTT Connections in the MQTT System unit tests for all hardware
+ * platforms supported in FreeRTOS.
+ * Set this to the number of connection attempts for the MQTT tests.
+ * If undefined, it should default to 1. */
+#define IOT_TEST_MQTT_CONNECT_RETRY_COUNT            ( 3 )
+
+/* AWS IoT Service limits only allow 1 connection per MQTT client ID per second.
+ * Wait until 1100 ms have elapsed since the last connection. */
+#define IOT_TEST_MQTT_CONNECT_INIT_RETRY_DELAY_MS    ( 1100 )
+
+/* Forward declarations of network types used in the tests. */
+typedef struct IotNetworkConnection    IotTestNetworkConnection_t;
+typedef struct IotNetworkServerInfo    IotTestNetworkServerInfo_t;
+typedef struct IotNetworkCredentials   IotTestNetworkCredentials_t;
+
+/* Define test network initializers. */
+#define IOT_TEST_NETWORK_CONNECTION_INITIALIZER     IOT_NETWORK_CONNECTION_AFR_INITIALIZER
+#define IOT_TEST_NETWORK_SERVER_INFO_INITIALIZER    AWS_IOT_NETWORK_SERVER_INFO_AFR_INITIALIZER
+
+/* Define the credentials initializer based on the server port. Use ALPN if on
+ * 443, otherwise disable ALPN. */
+#if clientcredentialMQTT_BROKER_PORT == 443
+    #define IOT_TEST_NETWORK_CREDENTIALS_INITIALIZER    AWS_IOT_NETWORK_CREDENTIALS_AFR_INITIALIZER
+#else
+    #define IOT_TEST_NETWORK_CREDENTIALS_INITIALIZER           \
+    {                                                          \
+        .disableSni = false,                                   \
+        .pAlpnProtos = NULL,                                   \
+        .pRootCa = NULL,                                       \
+        .pClientCert = keyCLIENT_CERTIFICATE_PEM,              \
+        .pPrivateKey = keyCLIENT_PRIVATE_KEY_PEM,              \
+        .rootCaSize = 0,                                       \
+        .clientCertSize = sizeof( keyCLIENT_CERTIFICATE_PEM ), \
+        .privateKeySize = sizeof( keyCLIENT_PRIVATE_KEY_PEM )  \
+    }
+#endif /* if clientcredentialMQTT_BROKER_PORT == 443 */
+
+/* Network initialization and cleanup functions are not needed on FreeRTOS. */
+#define IotTestNetwork_Init()    IOT_NETWORK_SUCCESS
+#define IotTestNetwork_Cleanup()
+
+#endif /* ifndef IOT_CONFIG_COMMON_H_ */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/include/test_framework.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/include/test_framework.h
new file mode 100644
index 000000000..2adaeab1c
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/include/test_framework.h
@@ -0,0 +1,44 @@
+/*
+ * FreeRTOS V202002.00
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+/**
+ * @file aws_test_framework.h
+ * @brief Header file for test framework.
+ */
+
+#ifndef _AWS_TEST_FRAMEWORK_H_
+#define _AWS_TEST_FRAMEWORK_H_
+
+void TEST_CacheResult( char cResult );
+
+void TEST_SubmitResultBuffer( void );
+
+void TEST_NotifyTestStart( void );
+
+void TEST_NotifyTestFinished( void );
+
+void TEST_SubmitResult( const char * pcResult );
+
+#endif /* _AWS_TEST_FRAMEWORK_H_ */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/include/test_runner.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/include/test_runner.h
new file mode 100644
index 000000000..827164945
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/include/test_runner.h
@@ -0,0 +1,72 @@
+/*
+ * FreeRTOS V202002.00
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+/**
+ * @file aws_test_runner.h
+ * @brief The function to be called to run all the tests.
+ */
+
+#ifndef _AWS_TEST_RUNNER_H_
+#define _AWS_TEST_RUNNER_H_
+
+/*
+ * @brief If set to 1, will run DQP_FR tests only.
+ */
+#define testrunnerTEST_FILTER    0
+
+
+/**
+ * @brief Size of shared array.
+ *
+ */
+#define testrunnerBUFFER_SIZE    ( 4000 )
+
+/**
+ * @brief Buffer used for all tests.
+ *
+ * Since tests are run in series, they can use the same memory array.
+ * This makes significant heap savings.
+ */
+extern char cBuffer[ testrunnerBUFFER_SIZE ];
+
+/**
+ * @brief FreeRTOS heap measurement taken before tests are run.
+ */
+extern unsigned int xHeapBefore;
+
+/**
+ * @brief FreeRTOS heap measurement taken after all tests are run.
+ */
+extern unsigned int xHeapAfter;
+
+
+/**
+ * @brief Runs all the tests.
+ */
+void TEST_RUNNER_RunTests_task( void * pvParameters );
+
+
+
+#endif /* _AWS_TEST_RUNNER_H_ */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/include/test_tcp.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/include/test_tcp.h
new file mode 100644
index 000000000..a2247784c
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/include/test_tcp.h
@@ -0,0 +1,49 @@
+/*
+ * FreeRTOS V202002.00
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+#ifndef TEST_TCP_H
+#define TEST_TCP_H
+
+ /* Non-Encrypted Echo Server.
+  * Update tcptestECHO_SERVER_ADDR# and
+  * tcptestECHO_PORT with IP address
+  * and port of unencrypted TCP echo server. */
+
+  /* You can find the code to setup an echo server in the Repo */
+
+  /* Assume ECHO server IP-address A.B.C.D  And   Port Z*/
+#define tcptestECHO_SERVER_ADDR0         ( 255 )    /* Replace with Your Echo Server Addr First Byte  i.e. A */
+#define tcptestECHO_SERVER_ADDR1         ( 255 )    /* Replace with Your Echo Server Addr Second Byte i.e. B */
+#define tcptestECHO_SERVER_ADDR2         ( 255 )    /* Replace with Your Echo Server Addr Third Byte  i.e. C */
+#define tcptestECHO_SERVER_ADDR3         ( 255 )    /* Replace with Your Echo Server Addr Fourth Byte i.e. D */
+#define tcptestECHO_PORT                 ( 0 )      /* Replace with Your Echo Server Port Number i.e. Z */
+
+#if tcptestECHO_PORT == 0
+#error "Use Correct Port number and Correct IP address by setting tcptestECHO_SERVER_ADDR[0-3] and tcptestECHO_PORT in test_tcp.h"
+#endif
+/* Number of times to retry a connection if it fails. */
+#define tcptestRETRY_CONNECTION_TIMES    6
+
+#endif /* ifndef TEST_TCP_H */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/include/test_tcp_config.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/include/test_tcp_config.h
new file mode 100644
index 000000000..057f107e3
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/include/test_tcp_config.h
@@ -0,0 +1,73 @@
+/*
+ * Copyright (C) 2018 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+#ifndef AWS_INTEGRATION_TEST_TCP_CONFIG_H
+#define AWS_INTEGRATION_TEST_TCP_CONFIG_H
+
+/**
+ * @file aws_integration_test_tcp_portable.h
+ * @brief Port-specific variables for TCP tests. */
+
+
+/**
+ * @brief Indicates how much longer than the specified timeout is acceptable for
+ * RCVTIMEO tests.
+ *
+ * This value can be used to compensate for clock differences, and other
+ * code overhead.
+ */
+#define         integrationtestportableTIMEOUT_OVER_TOLERANCE      1
+
+/**
+ * @brief Indicates how much less time than the specified timeout is acceptable for
+ * RCVTIMEO tests.
+ *
+ * This value must be 0 unless networking is performs on a separate processor.
+ * If networking and tests are on different CPUs, an "under tolerance" is acceptable.
+ * For tests where same clock is used for networking and tests.
+ */
+#define         integrationtestportableTIMEOUT_UNDER_TOLERANCE     0
+
+/**
+ *  @brief Indicates how long  receive needs to wait for data before Timeout happens.
+ *
+ */
+#define         integrationtestportableRECEIVE_TIMEOUT             2000
+
+/**
+ * @brief Indicates how long  send needs to wait before Timeout happens.
+ *
+ */
+#define         integrationtestportableSEND_TIMEOUT                2000
+
+
+ /**
+  * @brief Choose a desired hostname to be resolved.
+  * Also, select the number of IP-addresses the test should expect by modifying
+  * dnstestNUM_UNIQUE_IP_ADDRESSES in test_tcp.c source file.
+  */
+#define         HostNameUNIQUE_ADDRESSES_TEST                "freertos.org"
+
+
+#endif /*AWS_INTEGRATION_TEST_TCP_CONFIG_H */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/include/test_utils.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/include/test_utils.h
new file mode 100644
index 000000000..ec76b314b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/include/test_utils.h
@@ -0,0 +1,100 @@
+/*
+ * FreeRTOS V202002.00
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+#ifndef _TEST_UTILS_H_
+#define _TEST_UTILS_H_
+
+/**
+ * @brief      Retry expression or statement with exponential backoff
+ *
+ * @param      xCommand            The expression or statement that should be
+ *                                 retried
+ * @param      xSuccessStatus      The success status where a xCommand need not
+ *                                 be retried any more
+ * @param      ulStartingPeriodMs  The initial delay period in milliseconds
+ * @param      lRetries            The number of times to retry.  xCommand will
+ *                                 be tried once, and then retried n times.
+ *
+ * @code
+ *  int a = 0;
+ *  RETRY_EXPONENTIAL( printf( "foo\n" ), 4, 150, 8 );
+ *  RETRY_EXPONENTIAL( a = printf( "bar\n" ), 0, 250, 8 );
+ *  RETRY_EXPONENTIAL( a = printf( "bar\n" ), 0, 250, 8 );
+ *  RETRY_EXPONENTIAL( a = connect_to_server(), CONNECTION_SUCCESS, 250, 8 );
+ *  RETRY_EXPONENTIAL( a++, 10, 250, 8 );
+ * @endcode
+ *
+ * @return     None
+ */
+#define RETRY_EXPONENTIAL(                                               \
+        xCommand, xSuccessStatus, ulStartingPeriodMs, lRetries )         \
+    {                                                                    \
+        int32_t lRetried = 0;                                            \
+        uint32_t ulPeriodMs = ulStartingPeriodMs;                        \
+        int32_t lStatus;                                                 \
+        for( ; lRetried <= lRetries; lRetried++ ) {                      \
+            if( lRetried ) {                                             \
+                configPRINTF( ( "retrying \"%s\", %d of %d, in %d ms\n", \
+                                # xCommand, lRetried,                    \
+                                lRetries, ulPeriodMs ) );                \
+                vTaskDelay( pdMS_TO_TICKS( ulPeriodMs ) );               \
+                ulPeriodMs *= 2;                                         \
+            }                                                            \
+            lStatus = xCommand;                                          \
+            if( xSuccessStatus == lStatus ) {                            \
+                break;                                                   \
+            }                                                            \
+            configPRINTF( ( "expected %d, got %d\n",                     \
+                            xSuccessStatus, lStatus ) );                 \
+        }                                                                \
+    }
+
+/**
+ * @brief      Returns the file name at the end of a windows path
+ *
+ * @param      full_path  The full path
+ *
+ * @return     file name
+ */
+#define WIN_FILENAME( full_path ) \
+    ( strrchr( full_path, '\\' ) ? strrchr( full_path, '\\' ) + 1 : full_path )
+
+/**
+ * @brief      Returns the file name at the end of a linux path
+ *
+ * @param      full_path  The full path
+ *
+ * @return     file name
+ */
+#define NIX_FILENAME( full_path ) \
+    ( strrchr( full_path, '/' ) ? strrchr( full_path, '/' ) + 1 : full_path )
+
+/**
+ * The name of the current file, stripped of the path
+ */
+#define __FILENAME__    WIN_FILENAME( NIX_FILENAME( __FILE__ ) )
+
+
+#endif /* end of include guard: _AWS_TEST_UTILS_H_ */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/include/unity_config.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/include/unity_config.h
new file mode 100644
index 000000000..1c83e54e3
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/include/unity_config.h
@@ -0,0 +1,280 @@
+/*
+ * FreeRTOS V202002.00
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+/* Unity Configuration
+ * As of May 11th, 2016 at ThrowTheSwitch/Unity commit 837c529
+ * Update: December 29th, 2016
+ * See Also: Unity/docs/UnityConfigurationGuide.pdf
+ *
+ * Unity is designed to run on almost anything that is targeted by a C compiler.
+ * It would be awesome if this could be done with zero configuration. While
+ * there are some targets that come close to this dream, it is sadly not
+ * universal. It is likely that you are going to need at least a couple of the
+ * configuration options described in this document.
+ *
+ * All of Unity's configuration options are `#defines`. Most of these are simple
+ * definitions. A couple are macros with arguments. They live inside the
+ * unity_internals.h header file. We don't necessarily recommend opening that
+ * file unless you really need to. That file is proof that a cross-platform
+ * library is challenging to build. From a more positive perspective, it is also
+ * proof that a great deal of complexity can be centralized primarily to one
+ * place in order to provide a more consistent and simple experience elsewhere.
+ *
+ * Using These Options
+ * It doesn't matter if you're using a target-specific compiler and a simulator
+ * or a native compiler. In either case, you've got a couple choices for
+ * configuring these options:
+ *
+ *  1. Because these options are specified via C defines, you can pass most of
+ *     these options to your compiler through command line compiler flags. Even
+ *     if you're using an embedded target that forces you to use their
+ *     overbearing IDE for all configuration, there will be a place somewhere in
+ *     your project to configure defines for your compiler.
+ *  2. You can create a custom `unity_config.h` configuration file (present in
+ *     your toolchain's search paths). In this file, you will list definitions
+ *     and macros specific to your target. All you must do is define
+ *     `UNITY_INCLUDE_CONFIG_H` and Unity will rely on `unity_config.h` for any
+ *     further definitions it may need.
+ */
+
+#ifndef AWS_UNITY_CONFIG_H
+#define AWS_UNITY_CONFIG_H
+
+/* ************************* AUTOMATIC INTEGER TYPES ***************************
+ * C's concept of an integer varies from target to target. The C Standard has
+ * rules about the `int` matching the register size of the target
+ * microprocessor. It has rules about the `int` and how its size relates to
+ * other integer types. An `int` on one target might be 16 bits while on another
+ * target it might be 64. There are more specific types in compilers compliant
+ * with C99 or later, but that's certainly not every compiler you are likely to
+ * encounter. Therefore, Unity has a number of features for helping to adjust
+ * itself to match your required integer sizes. It starts off by trying to do it
+ * automatically.
+ **************************************************************************** */
+
+/* The first attempt to guess your types is to check `limits.h`. Some compilers
+ * that don't support `stdint.h` could include `limits.h`. If you don't
+ * want Unity to check this file, define this to make it skip the inclusion.
+ * Unity looks at UINT_MAX & ULONG_MAX, which were available since C89.
+ */
+/* #define UNITY_EXCLUDE_LIMITS_H */
+
+/* The second thing that Unity does to guess your types is check `stdint.h`.
+ * This file defines `UINTPTR_MAX`, since C99, that Unity can make use of to
+ * learn about your system. It's possible you don't want it to do this or it's
+ * possible that your system doesn't support `stdint.h`. If that's the case,
+ * you're going to want to define this. That way, Unity will know to skip the
+ * inclusion of this file and you won't be left with a compiler error.
+ */
+/* #define UNITY_EXCLUDE_STDINT_H */
+
+/* ********************** MANUAL INTEGER TYPE DEFINITION ***********************
+ * If you've disabled all of the automatic options above, you're going to have
+ * to do the configuration yourself. There are just a handful of defines that
+ * you are going to specify if you don't like the defaults.
+ **************************************************************************** */
+
+/* Define this to be the number of bits an `int` takes up on your system. The
+ * default, if not auto-detected, is 32 bits.
+ *
+ * Example:
+ */
+/* #define UNITY_INT_WIDTH 16 */
+
+/* Define this to be the number of bits a `long` takes up on your system. The
+ * default, if not autodetected, is 32 bits. This is used to figure out what
+ * kind of 64-bit support your system can handle.  Does it need to specify a
+ * `long` or a `long long` to get a 64-bit value. On 16-bit systems, this option
+ * is going to be ignored.
+ *
+ * Example:
+ */
+/* #define UNITY_LONG_WIDTH 16 */
+
+/* Define this to be the number of bits a pointer takes up on your system. The
+ * default, if not autodetected, is 32-bits. If you're getting ugly compiler
+ * warnings about casting from pointers, this is the one to look at.
+ *
+ * Example:
+ */
+/* #define UNITY_POINTER_WIDTH 64 */
+
+/* Unity will automatically include 64-bit support if it auto-detects it, or if
+ * your `int`, `long`, or pointer widths are greater than 32-bits. Define this
+ * to enable 64-bit support if none of the other options already did it for you.
+ * There can be a significant size and speed impact to enabling 64-bit support
+ * on small targets, so don't define it if you don't need it.
+ */
+/* #define UNITY_INCLUDE_64 */
+
+
+/* *************************** FLOATING POINT TYPES ****************************
+ * In the embedded world, it's not uncommon for targets to have no support for
+ * floating point operations at all or to have support that is limited to only
+ * single precision. We are able to guess integer sizes on the fly because
+ * integers are always available in at least one size. Floating point, on the
+ * other hand, is sometimes not available at all. Trying to include `float.h` on
+ * these platforms would result in an error. This leaves manual configuration as
+ * the only option.
+ **************************************************************************** */
+
+/* By default, Unity guesses that you will want single precision floating point
+ * support, but not double precision. It's easy to change either of these using
+ * the include and exclude options here. You may include neither, just float,
+ * or both, as suits your needs.
+ */
+/* #define UNITY_EXCLUDE_FLOAT  */
+/* #define UNITY_INCLUDE_DOUBLE */
+/* #define UNITY_EXCLUDE_DOUBLE */
+
+/* For features that are enabled, the following floating point options also
+ * become available.
+ */
+
+/* Unity aims for as small of a footprint as possible and avoids most standard
+ * library calls (some embedded platforms don't have a standard library!).
+ * Because of this, its routines for printing integer values are minimalist and
+ * hand-coded. To keep Unity universal, though, we eventually chose to develop
+ * our own floating point print routines. Still, the display of floating point
+ * values during a failure are optional. By default, Unity will print the
+ * actual results of floating point assertion failures. So a failed assertion
+ * will produce a message like "Expected 4.0 Was 4.25". If you would like less
+ * verbose failure messages for floating point assertions, use this option to
+ * give a failure message `"Values Not Within Delta"` and trim the binary size.
+ */
+/* #define UNITY_EXCLUDE_FLOAT_PRINT */
+
+/* If enabled, Unity assumes you want your `FLOAT` asserts to compare standard C
+ * floats. If your compiler supports a specialty floating point type, you can
+ * always override this behavior by using this definition.
+ *
+ * Example:
+ */
+/* #define UNITY_FLOAT_TYPE float16_t */
+
+/* If enabled, Unity assumes you want your `DOUBLE` asserts to compare standard
+ * C doubles. If you would like to change this, you can specify something else
+ * by using this option. For example, defining `UNITY_DOUBLE_TYPE` to `long
+ * double` could enable gargantuan floating point types on your 64-bit processor
+ * instead of the standard `double`.
+ *
+ * Example:
+ */
+/* #define UNITY_DOUBLE_TYPE long double */
+
+/* If you look up `UNITY_ASSERT_EQUAL_FLOAT` and `UNITY_ASSERT_EQUAL_DOUBLE` as
+ * documented in the Unity Assertion Guide, you will learn that they are not
+ * really asserting that two values are equal but rather that two values are
+ * "close enough" to equal. "Close enough" is controlled by these precision
+ * configuration options. If you are working with 32-bit floats and/or 64-bit
+ * doubles (the normal on most processors), you should have no need to change
+ * these options. They are both set to give you approximately 1 significant bit
+ * in either direction. The float precision is 0.00001 while the double is
+ * 10^-12. For further details on how this works, see the appendix of the Unity
+ * Assertion Guide.
+ *
+ * Example:
+ */
+/* #define UNITY_FLOAT_PRECISION 0.001f  */
+/* #define UNITY_DOUBLE_PRECISION 0.001f */
+
+
+/* *************************** TOOLSET CUSTOMIZATION ***************************
+ * In addition to the options listed above, there are a number of other options
+ * which will come in handy to customize Unity's behavior for your specific
+ * toolchain. It is possible that you may not need to touch any of these but
+ * certain platforms, particularly those running in simulators, may need to jump
+ * through extra hoops to operate properly. These macros will help in those
+ * situations.
+ **************************************************************************** */
+
+/* By default, Unity prints its results to `stdout` as it runs. This works
+ * perfectly fine in most situations where you are using a native compiler for
+ * testing. It works on some simulators as well so long as they have `stdout`
+ * routed back to the command line. There are times, however, where the
+ * simulator will lack support for dumping results or you will want to route
+ * results elsewhere for other reasons. In these cases, you should define the
+ * `UNITY_OUTPUT_CHAR` macro. This macro accepts a single character at a time
+ * (as an `int`, since this is the parameter type of the standard C `putchar`
+ * function most commonly used). You may replace this with whatever function
+ * call you like.
+ *
+ * Example:
+ * Say you are forced to run your test suite on an embedded processor with no
+ * `stdout` option. You decide to route your test result output to a custom
+ * serial `RS232_putc()` function you wrote like thus:
+ */
+/* #define UNITY_OUTPUT_CHAR(a)                    RS232_putc(a) */
+/* #define UNITY_OUTPUT_CHAR_HEADER_DECLARATION    RS232_putc(int) */
+/* #define UNITY_OUTPUT_FLUSH()                    RS232_flush() */
+/* #define UNITY_OUTPUT_FLUSH_HEADER_DECLARATION   RS232_flush(void) */
+/* #define UNITY_OUTPUT_START()                    RS232_config(115200,1,8,0) */
+/* #define UNITY_OUTPUT_COMPLETE()                 RS232_close() */
+
+/* For some targets, Unity can make the otherwise required `setUp()` and
+ * `tearDown()` functions optional. This is a nice convenience for test writers
+ * since `setUp` and `tearDown` don't often actually _do_ anything. If you're
+ * using gcc or clang, this option is automatically defined for you. Other
+ * compilers can also support this behavior, if they support a C feature called
+ * weak functions. A weak function is a function that is compiled into your
+ * executable _unless_ a non-weak version of the same function is defined
+ * elsewhere. If a non-weak version is found, the weak version is ignored as if
+ * it never existed. If your compiler supports this feature, you can let Unity
+ * know by defining `UNITY_SUPPORT_WEAK` as the function attributes that would
+ * need to be applied to identify a function as weak. If your compiler lacks
+ * support for weak functions, you will always need to define `setUp` and
+ * `tearDown` functions (though they can be and often will be just empty). The
+ * most common options for this feature are:
+ */
+/* #define UNITY_SUPPORT_WEAK weak */
+/* #define UNITY_SUPPORT_WEAK __attribute__((weak)) */
+/* #define UNITY_NO_WEAK */
+
+/* Some compilers require a custom attribute to be assigned to pointers, like
+ * `near` or `far`. In these cases, you can give Unity a safe default for these
+ * by defining this option with the attribute you would like.
+ *
+ * Example:
+ */
+/* #define UNITY_PTR_ATTRIBUTE __attribute__((far)) */
+/* #define UNITY_PTR_ATTRIBUTE near */
+
+#include "aws_test_framework.h"
+
+/* Redirect output to print task. */
+#ifndef UNITY_OUTPUT_CHAR
+    #define UNITY_OUTPUT_CHAR( a )     TEST_CacheResult( a )
+#endif
+#ifndef UNITY_OUTPUT_FLUSH
+    #define UNITY_OUTPUT_FLUSH()       TEST_SubmitResultBuffer()
+#endif
+#ifndef UNITY_OUTPUT_START
+    #define UNITY_OUTPUT_START()       TEST_NotifyTestStart()
+#endif
+#ifndef UNITY_OUTPUT_COMPLETE
+    #define UNITY_OUTPUT_COMPLETE()    TEST_NotifyTestFinished()
+#endif
+
+#endif /* AWS_UNITY_CONFIG_H */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/test.c b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/test.c
new file mode 100644
index 000000000..6bef263d2
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/test.c
@@ -0,0 +1,92 @@
+/*
+ * FreeRTOS V202002.00
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+/**
+ * @file  iot_demo.c
+ * @brief Demo
+ */
+
+#include "FreeRTOS.h"
+
+
+/*-----------------------------------------------------------*/
+
+/* configUSE_STATIC_ALLOCATION is set to 1, so the application must provide an
+ * implementation of vApplicationGetIdleTaskMemory() to provide the memory that is
+ * used by the Idle task. */
+void vApplicationGetIdleTaskMemory( StaticTask_t ** ppxIdleTaskTCBBuffer,
+                                    StackType_t ** ppxIdleTaskStackBuffer,
+                                    uint32_t * pulIdleTaskStackSize )
+{
+    /* If the buffers to be provided to the Idle task are declared inside this
+     * function then they must be declared static - otherwise they will be allocated on
+     * the stack and so not exists after this function exits. */
+    static StaticTask_t xIdleTaskTCB;
+    static StackType_t uxIdleTaskStack[ configMINIMAL_STACK_SIZE ];
+
+    /* Pass out a pointer to the StaticTask_t structure in which the Idle
+     * task's state will be stored. */
+    *ppxIdleTaskTCBBuffer = &xIdleTaskTCB;
+
+    /* Pass out the array that will be used as the Idle task's stack. */
+    *ppxIdleTaskStackBuffer = uxIdleTaskStack;
+
+    /* Pass out the size of the array pointed to by *ppxIdleTaskStackBuffer.
+     * Note that, as the array is necessarily of type StackType_t,
+     * configMINIMAL_STACK_SIZE is specified in words, not bytes. */
+    *pulIdleTaskStackSize = configMINIMAL_STACK_SIZE;
+}
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief This is to provide the memory that is used by the RTOS daemon/time task.
+ *
+ * If configUSE_STATIC_ALLOCATION is set to 1, so the application must provide an
+ * implementation of vApplicationGetTimerTaskMemory() to provide the memory that is
+ * used by the RTOS daemon/time task.
+ */
+void vApplicationGetTimerTaskMemory( StaticTask_t ** ppxTimerTaskTCBBuffer,
+                                     StackType_t ** ppxTimerTaskStackBuffer,
+                                     uint32_t * pulTimerTaskStackSize )
+{
+    /* If the buffers to be provided to the Timer task are declared inside this
+     * function then they must be declared static - otherwise they will be allocated on
+     * the stack and so not exists after this function exits. */
+    static StaticTask_t xTimerTaskTCB;
+    static StackType_t uxTimerTaskStack[ configTIMER_TASK_STACK_DEPTH ];
+
+    /* Pass out a pointer to the StaticTask_t structure in which the Idle
+     * task's state will be stored. */
+    *ppxTimerTaskTCBBuffer = &xTimerTaskTCB;
+
+    /* Pass out the array that will be used as the Timer task's stack. */
+    *ppxTimerTaskStackBuffer = uxTimerTaskStack;
+
+    /* Pass out the size of the array pointed to by *ppxTimerTaskStackBuffer.
+     * Note that, as the array is necessarily of type StackType_t,
+     * configMINIMAL_STACK_SIZE is specified in words, not bytes. */
+    *pulTimerTaskStackSize = configTIMER_TASK_STACK_DEPTH;
+}
+/*-----------------------------------------------------------*/
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/test_framework.c b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/test_framework.c
new file mode 100644
index 000000000..12e749fd1
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/test_framework.c
@@ -0,0 +1,97 @@
+/*
+ * FreeRTOS V202002.00
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+/* Standard includes. */
+#include <stdio.h>
+#include <string.h>
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+
+/* Test framework include */
+#include "test_framework.h"
+
+/* Unity include */
+#include "unity.h"
+
+#define TEST_RESULT_BUFFER_CAPACITY    1024
+
+/*-----------------------------------------------------------*/
+
+/* The buffer to store test result. The content will be printed if an eol character
+ * is received */
+static char pcTestResultBuffer[ TEST_RESULT_BUFFER_CAPACITY ];
+static int16_t xBufferSize = 0;
+
+/*-----------------------------------------------------------*/
+
+void TEST_CacheResult( char cResult )
+{
+    if( TEST_RESULT_BUFFER_CAPACITY - xBufferSize == 2 )
+    {
+        cResult = '\n';
+    }
+
+    pcTestResultBuffer[ xBufferSize++ ] = cResult;
+
+    if( ( '\n' == cResult ) )
+    {
+        TEST_SubmitResultBuffer();
+    }
+}
+/*-----------------------------------------------------------*/
+
+void TEST_SubmitResultBuffer()
+{
+    if( 0 != xBufferSize )
+    {
+        TEST_SubmitResult( pcTestResultBuffer );
+        memset( pcTestResultBuffer, 0, TEST_RESULT_BUFFER_CAPACITY );
+        xBufferSize = 0;
+    }
+}
+/*-----------------------------------------------------------*/
+
+void TEST_NotifyTestStart()
+{
+    TEST_SubmitResult( "---------STARTING TESTS---------\n" );
+}
+/*-----------------------------------------------------------*/
+
+void TEST_NotifyTestFinished()
+{
+    TEST_SubmitResult( "-------ALL TESTS FINISHED-------\n" );
+}
+/*-----------------------------------------------------------*/
+
+void TEST_SubmitResult( const char * pcResult )
+{
+    /* We want to print test result no matter configPRINTF is defined or not */
+    vLoggingPrintf( pcResult );
+
+    /* Wait for 0.1 seconds to let print task empty its buffer. */
+    vTaskDelay( pdMS_TO_TICKS( 100UL ) );
+}
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/test_freertos.c b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/test_freertos.c
new file mode 100644
index 000000000..27a33b042
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/test_freertos.c
@@ -0,0 +1,87 @@
+/*
+ * FreeRTOS V202002.00
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+/**
+ * @file iot_test_freertos.c
+ * @brief Common hooks file for platforms that have not implemented hooks.
+ */
+
+#include "FreeRTOS.h"
+#include "task.h"
+
+/* It is recommended to implement hooks that use platform specific APIs. This allows
+ * for better error messages and recovery. Should platform specific hooks be implemented,
+ * add this macro to iot_config.h to avoid compiling these symbols.*/
+#ifndef iotconfigUSE_PORT_SPECIFIC_HOOKS
+
+/**
+ * @brief Warn user if pvPortMalloc fails.
+ *
+ * Called if a call to pvPortMalloc() fails because there is insufficient
+ * free memory available in the FreeRTOS heap.  pvPortMalloc() is called
+ * internally by FreeRTOS API functions that create tasks, queues, software
+ * timers, and semaphores.  The size of the FreeRTOS heap is set by the
+ * configTOTAL_HEAP_SIZE configuration constant in FreeRTOSConfig.h.
+ *
+ */
+    void vApplicationMallocFailedHook()
+    {
+        configPRINT_STRING( ( "ERROR: Malloc failed to allocate memory\r\n" ) );
+        taskDISABLE_INTERRUPTS();
+
+        /* Loop forever */
+        for( ; ; )
+        {
+        }
+    }
+/*-----------------------------------------------------------*/
+
+/**
+ * @brief Loop forever if stack overflow is detected.
+ *
+ * If configCHECK_FOR_STACK_OVERFLOW is set to 1,
+ * this hook provides a location for applications to
+ * define a response to a stack overflow.
+ *
+ * Use this hook to help identify that a stack overflow
+ * has occurred.
+ *
+ */
+    void vApplicationStackOverflowHook( TaskHandle_t xTask,
+                                        char * pcTaskName )
+    {
+        /* Disable unused parameter warnings. */
+        ( void ) xTask;
+        ( void ) pcTaskName;
+
+        configPRINT_STRING( ( "ERROR: stack overflow with task \r\n" ) );
+        portDISABLE_INTERRUPTS();
+
+        /* Loop forever */
+        for( ; ; )
+        {
+        }
+    }
+#endif /* iotconfigUSE_PORT_SPECIFIC_HOOKS */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/test_tcp.c b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/test_tcp.c
new file mode 100644
index 000000000..149364d89
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Cases/test_tcp.c
@@ -0,0 +1,2560 @@
+/*
+ * FreeRTOS Secure Sockets V1.1.9
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+/* Standard includes. */
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "queue.h"
+#include "event_groups.h"
+
+/* Test framework includes. */
+#include "unity_fixture.h"
+#include "test_runner.h"
+#include "test_utils.h"
+#include "test_tcp.h"
+
+#include "FreeRTOS_Sockets.h"
+#include "FreeRTOS_IP.h"
+
+/* Update this file with port-specific values. */
+#include "test_tcp_config.h"
+
+/* Update this file with AWS Crredentials. */
+#include "clientcredential.h"
+
+/* Verbose printing. */
+#define tcptestPRINTF( x )
+/* In case of test failures, FAILUREPRINTF may provide more detailed information. */
+#define tcptestFAILUREPRINTF( x )    vLoggingPrintf x
+/* Fail the test on tcptestASSERT. */
+#define tcptestASSERT( x )           configASSERT( x )
+/* Take measurements of the FreeRTOS heap before and after every test. */
+#define tcptestMEMORYWATCH    0
+
+/* Connection type. Add additional test servers here. */
+typedef enum
+{
+    eSecure,    /* Secure test server.  Uses tcptestECHO_SERVER_TLS. */
+    eNonsecure, /* Non secure test server.  Uses tcptestECHO_SERVER. */
+    eAwsBroker  /* AWS IoT Broker.  Uses clientcredential. */
+} Server_t;
+
+/* The echo tasks create a socket, send out a number of echo requests, listen
+ * for the echo reply, then close the socket again before starting over.  This
+ * delay is used between each iteration to ensure the network does not get too
+ * congested. */
+#define tcptestLOOP_DELAY_MS    ( 150 )
+#define tcptestLOOP_DELAY       ( ( TickType_t ) tcptestLOOP_DELAY_MS / portTICK_PERIOD_MS )
+
+/* The number of times FreeRTOS_connect_TCP opens and closes a socket. */
+/* Need to test at least 20 times. So bugs were not discovered with only 10 loops. */
+#define tcptestCONNECT_AND_CLOSE_LOOP    ( 20 )
+
+/* Filler values in the RX and TX buffers used to check for undesirable
+ * buffer modification. */
+#define tcptestRX_BUFFER_FILLER          0xFF
+#define tcptestTX_BUFFER_FILLER          0xAA
+
+/* Size of pcTxBuffer and pcRxBuffer. */
+#define tcptestBUFFER_SIZE               ( testrunnerBUFFER_SIZE / 2 )
+
+/* Global buffers are shared between tests to reduce RAM usage. */
+char * pcTxBuffer = &cBuffer[ 0 ];
+char * pcRxBuffer = &cBuffer[ tcptestBUFFER_SIZE ];
+
+/* Default Rx and Tx time outs are used to ensure the sockets do not
+ * wait too long for missing data. */
+static const TickType_t xReceiveTimeOut = pdMS_TO_TICKS( integrationtestportableRECEIVE_TIMEOUT );
+static const TickType_t xSendTimeOut = pdMS_TO_TICKS( integrationtestportableSEND_TIMEOUT );
+
+/* Primary socket, declared globally so that it can be closed in test tear down
+ * in the event that a test exits/fails before socket is closed. */
+volatile Socket_t xSocket = FREERTOS_INVALID_SOCKET;
+volatile BaseType_t xSocketOpen = pdFALSE;
+
+/*
+ * Uses a socket to send more than MSS bytes in one go to the standard echo
+ * port number 7.  The echoed data is received on the same socket but in a
+ * different task (see prvEchoClientRxTask() below).
+ */
+static void prvEchoClientTxTask( void * pvParameters );
+
+/* TCP Echo Client tasks multi-task test parameters. These can be configured in aws_test_tcp_config.h. */
+#ifndef tcptestTCP_ECHO_TASKS_STACK_SIZE
+    #define tcptestTCP_ECHO_TASKS_STACK_SIZE    ( configMINIMAL_STACK_SIZE * 4 )
+#endif
+#ifndef tcptestTCP_ECHO_TASKS_PRIORITY
+    #define tcptestTCP_ECHO_TASKS_PRIORITY      ( tskIDLE_PRIORITY )
+#endif
+
+/* The queue used by prvEchoClientTxTask() to send the next socket to use to
+ * prvEchoClientRxTask(). */
+static volatile QueueHandle_t xSocketPassingQueue = NULL;
+
+/* The event group used by the prvEchoClientTxTask() and prvEchoClientRxTask()
+ * to synchronize prior to commencing a cycle using a new socket. */
+static volatile EventGroupHandle_t xSyncEventGroup = NULL;
+
+
+/* Bit definitions used with the xSyncEventGroup event group to allow the
+ * prvEchoClientTxTask() and prvEchoClientRxTask() tasks to synchronize before
+ * commencing a new cycle with a different socket. */
+#define tcptestTX_TASK_BIT    ( 0x01 << 1 )
+#define tcptestRX_TASK_BIT    ( 0x01 << 2 )
+
+
+/* Array setup for 2x an Ethernet II data section */
+#define tcptestTWICE_MAX_FRAME_SIZE    ( 2 * 1500 )
+/* Array is defined as const so it can be located in flash. */
+static const char cTransmittedString[ tcptestTWICE_MAX_FRAME_SIZE ] =
+{
+    0,   1,   2,   3,   4,   5,   6,   7,   8,   9,   10,  11,
+    12,  13,  14,  15,  16,  17,  18,  19,  20,  21,  22,  23,
+    24,  25,  26,  27,  28,  29,  30,  31,  32,  33,  34,  35,
+    36,  37,  38,  39,  40,  41,  42,  43,  44,  45,  46,  47,
+    48,  49,  50,  51,  52,  53,  54,  55,  56,  57,  58,  59,
+    60,  61,  62,  63,  64,  65,  66,  67,  68,  69,  70,  71,
+    72,  73,  74,  75,  76,  77,  78,  79,  80,  81,  82,  83,
+    84,  85,  86,  87,  88,  89,  90,  91,  92,  93,  94,  95,
+    96,  97,  98,  99,  100, 101, 102, 103, 104, 105, 106, 107,
+    108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119,
+    120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131,
+    132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143,
+    144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155,
+    156, 157, 158, 159, 160, 161, 162, 163, 164, 165, 166, 167,
+    168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179,
+    180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191,
+    192, 193, 194, 195, 196, 197, 198, 199, 200, 201, 202, 203,
+    204, 205, 206, 207, 208, 209, 210, 211, 212, 213, 214, 215,
+    216, 217, 218, 219, 220, 221, 222, 223, 224, 225, 226, 227,
+    228, 229, 230, 231, 232, 233, 234, 235, 236, 237, 238, 239,
+    240, 241, 242, 243, 244, 245, 246, 247, 248, 249, 250, 251,
+    252, 253, 254, 255, 0,   1,   2,   3,   4,   5,   6,   7,
+    8,   9,   10,  11,  12,  13,  14,  15,  16,  17,  18,  19,
+    20,  21,  22,  23,  24,  25,  26,  27,  28,  29,  30,  31,
+    32,  33,  34,  35,  36,  37,  38,  39,  40,  41,  42,  43,
+    44,  45,  46,  47,  48,  49,  50,  51,  52,  53,  54,  55,
+    56,  57,  58,  59,  60,  61,  62,  63,  64,  65,  66,  67,
+    68,  69,  70,  71,  72,  73,  74,  75,  76,  77,  78,  79,
+    80,  81,  82,  83,  84,  85,  86,  87,  88,  89,  90,  91,
+    92,  93,  94,  95,  96,  97,  98,  99,  100, 101, 102, 103,
+    104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115,
+    116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127,
+    128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139,
+    140, 141, 142, 143, 144, 145, 146, 147, 148, 149, 150, 151,
+    152, 153, 154, 155, 156, 157, 158, 159, 160, 161, 162, 163,
+    164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175,
+    176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187,
+    188, 189, 190, 191, 192, 193, 194, 195, 196, 197, 198, 199,
+    200, 201, 202, 203, 204, 205, 206, 207, 208, 209, 210, 211,
+    212, 213, 214, 215, 216, 217, 218, 219, 220, 221, 222, 223,
+    224, 225, 226, 227, 228, 229, 230, 231, 232, 233, 234, 235,
+    236, 237, 238, 239, 240, 241, 242, 243, 244, 245, 246, 247,
+    248, 249, 250, 251, 252, 253, 254, 255, 0,   1,   2,   3,
+    4,   5,   6,   7,   8,   9,   10,  11,  12,  13,  14,  15,
+    16,  17,  18,  19,  20,  21,  22,  23,  24,  25,  26,  27,
+    28,  29,  30,  31,  32,  33,  34,  35,  36,  37,  38,  39,
+    40,  41,  42,  43,  44,  45,  46,  47,  48,  49,  50,  51,
+    52,  53,  54,  55,  56,  57,  58,  59,  60,  61,  62,  63,
+    64,  65,  66,  67,  68,  69,  70,  71,  72,  73,  74,  75,
+    76,  77,  78,  79,  80,  81,  82,  83,  84,  85,  86,  87,
+    88,  89,  90,  91,  92,  93,  94,  95,  96,  97,  98,  99,
+    100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111,
+    112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123,
+    124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 135,
+    136, 137, 138, 139, 140, 141, 142, 143, 144, 145, 146, 147,
+    148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159,
+    160, 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171,
+    172, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183,
+    184, 185, 186, 187, 188, 189, 190, 191, 192, 193, 194, 195,
+    196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207,
+    208, 209, 210, 211, 212, 213, 214, 215, 216, 217, 218, 219,
+    220, 221, 222, 223, 224, 225, 226, 227, 228, 229, 230, 231,
+    232, 233, 234, 235, 236, 237, 238, 239, 240, 241, 242, 243,
+    244, 245, 246, 247, 248, 249, 250, 251, 252, 253, 254, 255,
+    0,   1,   2,   3,   4,   5,   6,   7,   8,   9,   10,  11,
+    12,  13,  14,  15,  16,  17,  18,  19,  20,  21,  22,  23,
+    24,  25,  26,  27,  28,  29,  30,  31,  32,  33,  34,  35,
+    36,  37,  38,  39,  40,  41,  42,  43,  44,  45,  46,  47,
+    48,  49,  50,  51,  52,  53,  54,  55,  56,  57,  58,  59,
+    60,  61,  62,  63,  64,  65,  66,  67,  68,  69,  70,  71,
+    72,  73,  74,  75,  76,  77,  78,  79,  80,  81,  82,  83,
+    84,  85,  86,  87,  88,  89,  90,  91,  92,  93,  94,  95,
+    96,  97,  98,  99,  100, 101, 102, 103, 104, 105, 106, 107,
+    108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119,
+    120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131,
+    132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143,
+    144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155,
+    156, 157, 158, 159, 160, 161, 162, 163, 164, 165, 166, 167,
+    168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179,
+    180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191,
+    192, 193, 194, 195, 196, 197, 198, 199, 200, 201, 202, 203,
+    204, 205, 206, 207, 208, 209, 210, 211, 212, 213, 214, 215,
+    216, 217, 218, 219, 220, 221, 222, 223, 224, 225, 226, 227,
+    228, 229, 230, 231, 232, 233, 234, 235, 236, 237, 238, 239,
+    240, 241, 242, 243, 244, 245, 246, 247, 248, 249, 250, 251,
+    252, 253, 254, 255, 0,   1,   2,   3,   4,   5,   6,   7,
+    8,   9,   10,  11,  12,  13,  14,  15,  16,  17,  18,  19,
+    20,  21,  22,  23,  24,  25,  26,  27,  28,  29,  30,  31,
+    32,  33,  34,  35,  36,  37,  38,  39,  40,  41,  42,  43,
+    44,  45,  46,  47,  48,  49,  50,  51,  52,  53,  54,  55,
+    56,  57,  58,  59,  60,  61,  62,  63,  64,  65,  66,  67,
+    68,  69,  70,  71,  72,  73,  74,  75,  76,  77,  78,  79,
+    80,  81,  82,  83,  84,  85,  86,  87,  88,  89,  90,  91,
+    92,  93,  94,  95,  96,  97,  98,  99,  100, 101, 102, 103,
+    104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115,
+    116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127,
+    128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139,
+    140, 141, 142, 143, 144, 145, 146, 147, 148, 149, 150, 151,
+    152, 153, 154, 155, 156, 157, 158, 159, 160, 161, 162, 163,
+    164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175,
+    176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187,
+    188, 189, 190, 191, 192, 193, 194, 195, 196, 197, 198, 199,
+    200, 201, 202, 203, 204, 205, 206, 207, 208, 209, 210, 211,
+    212, 213, 214, 215, 216, 217, 218, 219, 220, 221, 222, 223,
+    224, 225, 226, 227, 228, 229, 230, 231, 232, 233, 234, 235,
+    236, 237, 238, 239, 240, 241, 242, 243, 244, 245, 246, 247,
+    248, 249, 250, 251, 252, 253, 254, 255, 0,   1,   2,   3,
+    4,   5,   6,   7,   8,   9,   10,  11,  12,  13,  14,  15,
+    16,  17,  18,  19,  20,  21,  22,  23,  24,  25,  26,  27,
+    28,  29,  30,  31,  32,  33,  34,  35,  36,  37,  38,  39,
+    40,  41,  42,  43,  44,  45,  46,  47,  48,  49,  50,  51,
+    52,  53,  54,  55,  56,  57,  58,  59,  60,  61,  62,  63,
+    64,  65,  66,  67,  68,  69,  70,  71,  72,  73,  74,  75,
+    76,  77,  78,  79,  80,  81,  82,  83,  84,  85,  86,  87,
+    88,  89,  90,  91,  92,  93,  94,  95,  96,  97,  98,  99,
+    100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111,
+    112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123,
+    124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 135,
+    136, 137, 138, 139, 140, 141, 142, 143, 144, 145, 146, 147,
+    148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159,
+    160, 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171,
+    172, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183,
+    184, 185, 186, 187, 188, 189, 190, 191, 192, 193, 194, 195,
+    196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207,
+    208, 209, 210, 211, 212, 213, 214, 215, 216, 217, 218, 219,
+
+    0,   1,   2,   3,   4,   5,   6,   7,   8,   9,   10,  11,
+    12,  13,  14,  15,  16,  17,  18,  19,  20,  21,  22,  23,
+    24,  25,  26,  27,  28,  29,  30,  31,  32,  33,  34,  35,
+    36,  37,  38,  39,  40,  41,  42,  43,  44,  45,  46,  47,
+    48,  49,  50,  51,  52,  53,  54,  55,  56,  57,  58,  59,
+    60,  61,  62,  63,  64,  65,  66,  67,  68,  69,  70,  71,
+    72,  73,  74,  75,  76,  77,  78,  79,  80,  81,  82,  83,
+    84,  85,  86,  87,  88,  89,  90,  91,  92,  93,  94,  95,
+    96,  97,  98,  99,  100, 101, 102, 103, 104, 105, 106, 107,
+    108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119,
+    120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131,
+    132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143,
+    144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155,
+    156, 157, 158, 159, 160, 161, 162, 163, 164, 165, 166, 167,
+    168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179,
+    180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191,
+    192, 193, 194, 195, 196, 197, 198, 199, 200, 201, 202, 203,
+    204, 205, 206, 207, 208, 209, 210, 211, 212, 213, 214, 215,
+    216, 217, 218, 219, 220, 221, 222, 223, 224, 225, 226, 227,
+    228, 229, 230, 231, 232, 233, 234, 235, 236, 237, 238, 239,
+    240, 241, 242, 243, 244, 245, 246, 247, 248, 249, 250, 251,
+    252, 253, 254, 255, 0,   1,   2,   3,   4,   5,   6,   7,
+    8,   9,   10,  11,  12,  13,  14,  15,  16,  17,  18,  19,
+    20,  21,  22,  23,  24,  25,  26,  27,  28,  29,  30,  31,
+    32,  33,  34,  35,  36,  37,  38,  39,  40,  41,  42,  43,
+    44,  45,  46,  47,  48,  49,  50,  51,  52,  53,  54,  55,
+    56,  57,  58,  59,  60,  61,  62,  63,  64,  65,  66,  67,
+    68,  69,  70,  71,  72,  73,  74,  75,  76,  77,  78,  79,
+    80,  81,  82,  83,  84,  85,  86,  87,  88,  89,  90,  91,
+    92,  93,  94,  95,  96,  97,  98,  99,  100, 101, 102, 103,
+    104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115,
+    116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127,
+    128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139,
+    140, 141, 142, 143, 144, 145, 146, 147, 148, 149, 150, 151,
+    152, 153, 154, 155, 156, 157, 158, 159, 160, 161, 162, 163,
+    164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175,
+    176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187,
+    188, 189, 190, 191, 192, 193, 194, 195, 196, 197, 198, 199,
+    200, 201, 202, 203, 204, 205, 206, 207, 208, 209, 210, 211,
+    212, 213, 214, 215, 216, 217, 218, 219, 220, 221, 222, 223,
+    224, 225, 226, 227, 228, 229, 230, 231, 232, 233, 234, 235,
+    236, 237, 238, 239, 240, 241, 242, 243, 244, 245, 246, 247,
+    248, 249, 250, 251, 252, 253, 254, 255, 0,   1,   2,   3,
+    4,   5,   6,   7,   8,   9,   10,  11,  12,  13,  14,  15,
+    16,  17,  18,  19,  20,  21,  22,  23,  24,  25,  26,  27,
+    28,  29,  30,  31,  32,  33,  34,  35,  36,  37,  38,  39,
+    40,  41,  42,  43,  44,  45,  46,  47,  48,  49,  50,  51,
+    52,  53,  54,  55,  56,  57,  58,  59,  60,  61,  62,  63,
+    64,  65,  66,  67,  68,  69,  70,  71,  72,  73,  74,  75,
+    76,  77,  78,  79,  80,  81,  82,  83,  84,  85,  86,  87,
+    88,  89,  90,  91,  92,  93,  94,  95,  96,  97,  98,  99,
+    100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111,
+    112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123,
+    124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 135,
+    136, 137, 138, 139, 140, 141, 142, 143, 144, 145, 146, 147,
+    148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159,
+    160, 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171,
+    172, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183,
+    184, 185, 186, 187, 188, 189, 190, 191, 192, 193, 194, 195,
+    196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207,
+    208, 209, 210, 211, 212, 213, 214, 215, 216, 217, 218, 219,
+    220, 221, 222, 223, 224, 225, 226, 227, 228, 229, 230, 231,
+    232, 233, 234, 235, 236, 237, 238, 239, 240, 241, 242, 243,
+    244, 245, 246, 247, 248, 249, 250, 251, 252, 253, 254, 255,
+    0,   1,   2,   3,   4,   5,   6,   7,   8,   9,   10,  11,
+    12,  13,  14,  15,  16,  17,  18,  19,  20,  21,  22,  23,
+    24,  25,  26,  27,  28,  29,  30,  31,  32,  33,  34,  35,
+    36,  37,  38,  39,  40,  41,  42,  43,  44,  45,  46,  47,
+    48,  49,  50,  51,  52,  53,  54,  55,  56,  57,  58,  59,
+    60,  61,  62,  63,  64,  65,  66,  67,  68,  69,  70,  71,
+    72,  73,  74,  75,  76,  77,  78,  79,  80,  81,  82,  83,
+    84,  85,  86,  87,  88,  89,  90,  91,  92,  93,  94,  95,
+    96,  97,  98,  99,  100, 101, 102, 103, 104, 105, 106, 107,
+    108, 109, 110, 111, 112, 113, 114, 115, 116, 117, 118, 119,
+    120, 121, 122, 123, 124, 125, 126, 127, 128, 129, 130, 131,
+    132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143,
+    144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 154, 155,
+    156, 157, 158, 159, 160, 161, 162, 163, 164, 165, 166, 167,
+    168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 178, 179,
+    180, 181, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191,
+    192, 193, 194, 195, 196, 197, 198, 199, 200, 201, 202, 203,
+    204, 205, 206, 207, 208, 209, 210, 211, 212, 213, 214, 215,
+    216, 217, 218, 219, 220, 221, 222, 223, 224, 225, 226, 227,
+    228, 229, 230, 231, 232, 233, 234, 235, 236, 237, 238, 239,
+    240, 241, 242, 243, 244, 245, 246, 247, 248, 249, 250, 251,
+    252, 253, 254, 255, 0,   1,   2,   3,   4,   5,   6,   7,
+    8,   9,   10,  11,  12,  13,  14,  15,  16,  17,  18,  19,
+    20,  21,  22,  23,  24,  25,  26,  27,  28,  29,  30,  31,
+    32,  33,  34,  35,  36,  37,  38,  39,  40,  41,  42,  43,
+    44,  45,  46,  47,  48,  49,  50,  51,  52,  53,  54,  55,
+    56,  57,  58,  59,  60,  61,  62,  63,  64,  65,  66,  67,
+    68,  69,  70,  71,  72,  73,  74,  75,  76,  77,  78,  79,
+    80,  81,  82,  83,  84,  85,  86,  87,  88,  89,  90,  91,
+    92,  93,  94,  95,  96,  97,  98,  99,  100, 101, 102, 103,
+    104, 105, 106, 107, 108, 109, 110, 111, 112, 113, 114, 115,
+    116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127,
+    128, 129, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139,
+    140, 141, 142, 143, 144, 145, 146, 147, 148, 149, 150, 151,
+    152, 153, 154, 155, 156, 157, 158, 159, 160, 161, 162, 163,
+    164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 175,
+    176, 177, 178, 179, 180, 181, 182, 183, 184, 185, 186, 187,
+    188, 189, 190, 191, 192, 193, 194, 195, 196, 197, 198, 199,
+    200, 201, 202, 203, 204, 205, 206, 207, 208, 209, 210, 211,
+    212, 213, 214, 215, 216, 217, 218, 219, 220, 221, 222, 223,
+    224, 225, 226, 227, 228, 229, 230, 231, 232, 233, 234, 235,
+    236, 237, 238, 239, 240, 241, 242, 243, 244, 245, 246, 247,
+    248, 249, 250, 251, 252, 253, 254, 255, 0,   1,   2,   3,
+    4,   5,   6,   7,   8,   9,   10,  11,  12,  13,  14,  15,
+    16,  17,  18,  19,  20,  21,  22,  23,  24,  25,  26,  27,
+    28,  29,  30,  31,  32,  33,  34,  35,  36,  37,  38,  39,
+    40,  41,  42,  43,  44,  45,  46,  47,  48,  49,  50,  51,
+    52,  53,  54,  55,  56,  57,  58,  59,  60,  61,  62,  63,
+    64,  65,  66,  67,  68,  69,  70,  71,  72,  73,  74,  75,
+    76,  77,  78,  79,  80,  81,  82,  83,  84,  85,  86,  87,
+    88,  89,  90,  91,  92,  93,  94,  95,  96,  97,  98,  99,
+    100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111,
+    112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123,
+    124, 125, 126, 127, 128, 129, 130, 131, 132, 133, 134, 135,
+    136, 137, 138, 139, 140, 141, 142, 143, 144, 145, 146, 147,
+    148, 149, 150, 151, 152, 153, 154, 155, 156, 157, 158, 159,
+    160, 161, 162, 163, 164, 165, 166, 167, 168, 169, 170, 171,
+    172, 173, 174, 175, 176, 177, 178, 179, 180, 181, 182, 183,
+    184, 185, 186, 187, 188, 189, 190, 191, 192, 193, 194, 195,
+    196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207,
+    208, 209, 210, 211, 212, 213, 214, 215, 216, 217, 218, 219
+};
+
+#ifndef tcptestECHO_TEST_SYNC_TIMEOUT
+    #define tcptestECHO_TEST_SYNC_TIMEOUT    80000
+#endif
+
+#ifndef tcptestECHO_TEST_RXTX_TIMEOUT
+    #define tcptestECHO_TEST_RXTX_TIMEOUT       5000
+#endif
+#define tcptestECHO_CLIENT_EVENT_MASK           ( ( 1 << tcptestNUM_ECHO_CLIENTS ) - 1 )
+
+#define  tcptestECHO_TEST_SYNC_TIMEOUT_TICKS    ( pdMS_TO_TICKS( tcptestECHO_TEST_SYNC_TIMEOUT ) )
+static const TickType_t xEchoTestRxTxTimeOut = pdMS_TO_TICKS( tcptestECHO_TEST_RXTX_TIMEOUT );
+
+/* All the modes for the test  SOCKETS_Echo_Client_Separate_Tasks */
+typedef enum
+{
+    LARGE_BUFFER_HIGH_PRIORITY,
+    SMALL_BUFFER_HIGH_PRIORITY,
+    LARGE_BUFFER_LOW_PRIORITY,
+    SMALL_BUFFER_LOW_PRIORITY,
+    tcptestMAX_ECHO_TEST_MODES
+} tcptestEchoTestModes_t;
+
+typedef struct
+{    
+    uint16_t usTaskTag;
+    BaseType_t xResult;
+    TaskHandle_t xTaskHandle;
+} tcptestEchoClientsTaskParams_t;
+
+/* Number of time the test goes through all the modes. */
+#define tcptestMAX_LOOPS_ECHO_TEST            tcptestMAX_ECHO_TEST_MODES
+
+#define tcptestECHO_TEST_LOW_PRIORITY         tskIDLE_PRIORITY
+#define tcptestECHO_TEST_HIGH_PRIORITY        ( configMAX_PRIORITIES - 1 )
+
+#ifndef ipconfigTCP_MSS
+    #define ipconfigTCP_MSS                   ( 256 )
+#endif
+#define tcptestNUM_ECHO_CLIENTS               ( 2 )
+#define tcptestMAX_LOOPS_ECHO_CLIENTS_LOOP    ( 10 )
+
+#define dnstestNUM_UNIQUE_IP_ADDRESSES        ( 3 )
+
+static void prvThreadSafeDifferentSocketsDifferentTasks( void * pvParameters );
+/****************** Unity Test Code *********************************/
+size_t xHeapB;
+size_t xHeapA;
+/* Group declaration required by Unity framework. */
+TEST_GROUP( Full_TCP );
+
+/* Setup required by Unity framework. */
+TEST_SETUP( Full_TCP )
+{
+    #if ( tcptestMEMORYWATCH == 1 )
+        /* Give the print buffer time to empty */
+        vTaskDelay( 500 );
+        xHeapB = xPortGetFreeHeapSize();
+    #endif
+}
+
+/* Tear down required by Unity framework.
+ * Closes the global socket if it was left open by the test. */
+TEST_TEAR_DOWN( Full_TCP )
+{
+    int32_t lReturn;
+
+    if( TEST_PROTECT() )
+    {
+        if( xSocketOpen == pdTRUE )
+        {
+            lReturn = FreeRTOS_closesocket( xSocket );
+            xSocketOpen = pdFALSE;
+            TEST_ASSERT_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, lReturn, "SOCKETS_Close failed in tear down. \r\n" );
+        }
+    }
+
+    #if ( tcptestMEMORYWATCH == 1 )
+        /* Give the print buffer time to empty */
+        vTaskDelay( 500 );
+        xHeapA = xPortGetFreeHeapSize();
+
+        configPRINTF( ( "Heap before: %d, Heap After: %d \r\n", xHeapB, xHeapA ) );
+    #endif
+}
+
+
+/*-----------------------------------------------------------*/
+static void prvCreateTxData( char * cBuffer,
+                             size_t xMessageLength,
+                             uint32_t ulTxCount );
+static BaseType_t prvCheckRxTxBuffers( uint8_t * pucTxBuffer,
+                                       uint8_t * pucRxBuffer,
+                                       size_t xMessageLength );
+
+/*-----------------------------------------------------------*/
+
+/* Creates a TCP Socket.
+ * Causes a test failure if socket creation fails. */
+static Socket_t prvTcpSocketHelper( volatile BaseType_t * pxSocketOpen )
+{
+    Socket_t xSocketLocal;
+
+    /* Make socket. */
+    xSocketLocal = FreeRTOS_socket( FREERTOS_AF_INET,
+                                    FREERTOS_SOCK_STREAM,
+                                    FREERTOS_IPPROTO_TCP );
+
+    if( xSocketLocal != FREERTOS_INVALID_SOCKET )
+    {
+        /* Test variable for closing exits/fails before closing. */
+        *pxSocketOpen = pdTRUE;
+    }
+
+    return xSocketLocal;
+}
+
+/*-----------------------------------------------------------*/
+
+static BaseType_t prvNonSecureConnectHelper( Socket_t xSocketLocal,
+                                            struct freertos_sockaddr* pxHostAddress )
+{
+    /* Disable unused parameter warning. */
+    ( void ) xSocketLocal;
+
+    /* Echo requests are sent to the echo server.  The echo server is
+    * listening to tcptestECHO_PORT on this computer's IP address. */
+    pxHostAddress->sin_addr = FreeRTOS_inet_addr_quick( tcptestECHO_SERVER_ADDR0,
+                                                        tcptestECHO_SERVER_ADDR1,
+                                                        tcptestECHO_SERVER_ADDR2,
+                                                        tcptestECHO_SERVER_ADDR3 );
+    pxHostAddress->sin_port = FreeRTOS_htons( tcptestECHO_PORT );
+    pxHostAddress->sin_len = sizeof( struct freertos_sockaddr );
+    pxHostAddress->sin_family = FREERTOS_AF_INET;
+
+    return pdFREERTOS_ERRNO_NONE;
+}
+
+/*-----------------------------------------------------------*/
+
+static BaseType_t prvConnect( Socket_t xSocketLocal)
+{
+    BaseType_t xResult = pdFAIL;
+    struct freertos_sockaddr xAddress;
+
+    xResult = prvNonSecureConnectHelper( xSocketLocal, &xAddress );
+    
+    if( xResult == pdFREERTOS_ERRNO_NONE )
+    {
+        xResult = FreeRTOS_connect( xSocketLocal,
+                                   &xAddress,
+                                   sizeof( xAddress ) );
+    }
+    else
+    {
+        tcptestFAILUREPRINTF( ("%s: Non Secure connect helper failed", __FUNCTION__) );
+    }
+
+    return xResult;
+}
+/*-----------------------------------------------------------*/
+
+static BaseType_t prvConnectHelper( Socket_t xSocketLocal)
+{
+    BaseType_t xResult = pdFAIL;
+    uint32_t ulInitialRetryPeriodMs = tcptestLOOP_DELAY_MS;
+    BaseType_t xMaxRetries = tcptestRETRY_CONNECTION_TIMES;
+
+    RETRY_EXPONENTIAL( xResult = prvConnect( xSocketLocal),
+                        pdFREERTOS_ERRNO_NONE,
+                        ulInitialRetryPeriodMs,
+                        xMaxRetries );
+
+    return xResult;
+}
+
+/*-----------------------------------------------------------*/
+
+static BaseType_t prvSetSockOptHelper( Socket_t xSocketLocal,
+                                       TickType_t xRxTimeOut,
+                                       TickType_t xTxTimeOut )
+{
+    BaseType_t xResult;
+
+    /* Set a time out so a missing reply does not cause the task to block
+     * indefinitely. */
+    xResult = FreeRTOS_setsockopt( xSocketLocal,
+                                    0,
+                                    FREERTOS_SO_RCVTIMEO,
+                                    &xRxTimeOut,
+                                    sizeof( xRxTimeOut ) );
+
+    if( xResult == pdFREERTOS_ERRNO_NONE )
+    {
+        xResult = FreeRTOS_setsockopt( xSocketLocal,
+                                        0,
+                                        FREERTOS_SO_SNDTIMEO,
+                                        &xTxTimeOut,
+                                        sizeof( xTxTimeOut ) );
+
+        if( xResult != pdFREERTOS_ERRNO_NONE )
+        {
+            tcptestFAILUREPRINTF( ( "%s: Socket set sock opt send timeout failed \r\n", __FUNCTION__ ) );
+        }
+    }
+    else
+    {
+        tcptestFAILUREPRINTF( ( "%s: Socket set sock opt receive timeout failed \r\n", __FUNCTION__ ) );
+    }
+
+    return xResult;
+}
+
+/*-----------------------------------------------------------*/
+
+static BaseType_t prvConnectHelperWithRetry( volatile Socket_t * pxSocket,
+                                             TickType_t xRxTimeOut,
+                                             TickType_t xTxTimeOut,
+                                             volatile BaseType_t * pxSocketIsAllocated )
+{
+    BaseType_t xIsConnected = pdFALSE;
+    BaseType_t xResult = pdFREERTOS_ERRNO_NONE;
+    BaseType_t xRetry = 0;
+    struct freertos_sockaddr xEchoServerAddress;
+    TickType_t xRetryTimeoutTicks = tcptestLOOP_DELAY;
+
+    do
+    {
+        /* Create the socket. */
+        *pxSocket = prvTcpSocketHelper( pxSocketIsAllocated );
+
+        if( FREERTOS_INVALID_SOCKET == *pxSocket )
+        {
+            xResult = FREERTOS_SOCKET_ERROR;
+            tcptestFAILUREPRINTF( ( "Failed to allocate Socket Descriptor \r\n" ) );
+            break;
+        }
+
+        /* Set the appropriate socket options for the destination. */
+        if( pdFREERTOS_ERRNO_NONE == xResult )
+        {
+            xResult = prvNonSecureConnectHelper( *pxSocket, &xEchoServerAddress );            
+        }
+
+        /* Set socket timeout options. */
+        if( pdFREERTOS_ERRNO_NONE == xResult )
+        {
+            xResult = prvSetSockOptHelper( *pxSocket, xRxTimeOut, xTxTimeOut );
+        }
+
+        /* Attempt, with possible retries, to connect to the destination. */
+        if( pdFREERTOS_ERRNO_NONE == xResult )
+        {
+            xResult = FreeRTOS_connect( *pxSocket,
+                                       &xEchoServerAddress,
+                                       sizeof( xEchoServerAddress ) );
+
+            if( pdFREERTOS_ERRNO_NONE == xResult )
+            {
+                xIsConnected = pdTRUE;
+            }
+            else
+            {                
+                if( xRetry < tcptestRETRY_CONNECTION_TIMES )
+                {
+                    FreeRTOS_closesocket( *pxSocket );
+                    *pxSocket = FREERTOS_INVALID_SOCKET;
+                    xResult = pdFREERTOS_ERRNO_NONE;
+                    xRetry++;
+                    vTaskDelay( xRetryTimeoutTicks );
+                    /* Exponentially backoff the retry times */
+                    xRetryTimeoutTicks *= 2; /*Arbitrarily chose 2*/
+                }
+                else
+                {
+                    /* Too many failures. Give up. */
+                    break;
+                }
+            }
+        }
+    }
+    while( pdFALSE == xIsConnected );
+
+    return xResult;
+}
+
+/*-----------------------------------------------------------*/
+
+static BaseType_t prvSendHelper( Socket_t xSocketLocal,
+                                 uint8_t * pucTxBuffer,
+                                 size_t xLength )
+{
+    BaseType_t xNumBytesSentTotal;
+    BaseType_t xNumBytes;
+    BaseType_t xResult;
+
+    xResult = pdPASS;
+    xNumBytesSentTotal = 0;
+
+    while( ( size_t ) xNumBytesSentTotal < xLength )
+    {
+        xNumBytes = FreeRTOS_send( xSocketLocal,                            /* The socket being sent to. */
+                                  &pucTxBuffer[ xNumBytesSentTotal ], /* The data being sent. */
+                                  xLength - xNumBytesSentTotal,       /* The length of the data being sent. */
+                                  0 );                                /* No flags. */
+
+        if( xNumBytes <= 0 )
+        {
+            xResult = pdFAIL;
+            tcptestFAILUREPRINTF( ( "Error in FreeRTOS_send. Return value: %d \r\n", xNumBytes ) );
+            break;
+        }
+
+        xNumBytesSentTotal += xNumBytes;
+    }
+
+    if( ( size_t ) xNumBytesSentTotal != xLength )
+    {
+        xResult = pdFAIL;
+    }
+
+    return xResult;
+}
+
+/*-----------------------------------------------------------*/
+
+static BaseType_t prvRecvHelper( Socket_t xSocketLocal,
+                                 uint8_t * pucRxBuffer,
+                                 size_t xLength )
+{
+    BaseType_t xNumBytesRecvTotal;
+    BaseType_t xNumBytes;
+    BaseType_t xResult;
+
+    xResult = pdPASS;
+    xNumBytesRecvTotal = 0;
+
+    while( ( size_t ) xNumBytesRecvTotal < xLength )
+    {
+        xNumBytes = FreeRTOS_recv( xSocketLocal,
+                                  &pucRxBuffer[ xNumBytesRecvTotal ],
+                                  xLength - xNumBytesRecvTotal,
+                                  0 );
+
+        if( xNumBytes == 0 )
+        {
+            tcptestFAILUREPRINTF( ( "Timed out receiving from echo server \r\n" ) );
+            xResult = pdFAIL;
+            break;
+        }
+        else if( xNumBytes < 0 )
+        {
+            tcptestFAILUREPRINTF( ( "Error %d while receiving from echo server\r\n", xNumBytes ) );
+            xResult = pdFAIL;
+            break;
+        }
+        else /* xNumBytes > 0 */
+        {
+            xNumBytesRecvTotal += xNumBytes;
+        }
+    }
+
+    if( ( size_t ) xNumBytesRecvTotal != xLength )
+    {
+        xResult = pdFAIL;
+    }
+
+    return xResult;
+}
+
+/*-----------------------------------------------------------*/
+
+static BaseType_t prvShutdownHelper( Socket_t xSocketLocal)
+{
+    BaseType_t xResult;
+
+    /* The caller is done with the connected socket; initiate a graceful close:
+     * send a FIN packet and wait for the server to stop sending. */
+    xResult = FreeRTOS_shutdown( xSocketLocal, FREERTOS_SHUT_RDWR );
+
+    if( 0 == xResult )
+    {
+        /* Keep calling receive until an error code is returned. */
+        do
+        {
+            xResult = FreeRTOS_recv( xSocketLocal,            /* The socket being received from. */
+                                    pcRxBuffer,         /* The buffer into which the received data will be written. */
+                                    tcptestBUFFER_SIZE, /* The size of the buffer provided to receive the data. */
+                                    0 );
+        }
+        while( xResult >= 0 );
+
+        xResult = 0;
+    }
+
+    return xResult;
+}
+
+/*-----------------------------------------------------------*/
+
+static BaseType_t prvCloseHelper( Socket_t xSocketLocal,
+                                  volatile BaseType_t * pxSocketOpen )
+{
+    BaseType_t xResult;
+
+    xResult = FreeRTOS_closesocket( xSocketLocal );
+
+    *pxSocketOpen = pdFALSE;
+
+    return xResult;
+}
+
+/*-----------------------------------------------------------*/
+
+static void prvCreateTxData( char * cBufferLocal,
+                             size_t xMessageLength,
+                             uint32_t ulTxCount )
+{
+    size_t xCharacter;
+    char cChar = '0';
+
+    /* Set the Tx buffer to a known filler value. */
+    memset( cBufferLocal, tcptestTX_BUFFER_FILLER, tcptestBUFFER_SIZE );
+
+    /* Fill the end of the buffer with ascending characters. */
+    if( xMessageLength > 25 )
+    {
+        for( xCharacter = 0; xCharacter < xMessageLength; xCharacter++ )
+        {
+            cBufferLocal[ xCharacter ] = cChar;
+            cChar++;
+
+            if( cChar > '~' )
+            {
+                cChar = '0';
+            }
+        }
+    }
+
+    /* Write as much of the identifying string as possible to the buffer. */
+    snprintf( cBufferLocal, xMessageLength, "%u TxRx with of length %u", ( unsigned ) ulTxCount, ( unsigned ) xMessageLength );
+}
+
+/*-----------------------------------------------------------*/
+
+static BaseType_t prvCheckRxTxBuffers( uint8_t * pucTxBuffer,
+                                       uint8_t * pucRxBuffer,
+                                       size_t xMessageLength )
+{
+    BaseType_t xReturn;
+    size_t xIndex;
+
+    xReturn = pdPASS;
+
+    /* Check that the message received is correct. */
+    for( xIndex = 0; xIndex < xMessageLength; xIndex++ )
+    {
+        if( pucTxBuffer[ xIndex ] != pucRxBuffer[ xIndex ] )
+        {
+            xReturn = pdFAIL;
+            tcptestFAILUREPRINTF( ( "Message bytes received different than those sent. Message Length %d, Byte Index %d \r\n", xMessageLength, xIndex ) );
+            tcptestASSERT( xReturn == pdPASS );
+        }
+    }
+
+    /* Check that neither the Rx nor Tx buffers were modified/overflowed. */
+    for( xIndex = xMessageLength; xIndex < tcptestBUFFER_SIZE; xIndex++ )
+    {
+        if( pucRxBuffer[ xIndex ] != tcptestRX_BUFFER_FILLER )
+        {
+            xReturn = pdFAIL;
+            tcptestFAILUREPRINTF( ( "Rx buffer padding modified byte. Message Length %d, Byte Index %d \r\n", xMessageLength, xIndex ) );
+        }
+
+        if( pucTxBuffer[ xIndex ] != tcptestTX_BUFFER_FILLER )
+        {
+            xReturn = pdFAIL;
+            tcptestFAILUREPRINTF( ( "Tx buffer padding modified. Message Length %d, Byte Index %d \r\n", xMessageLength, xIndex ) );
+        }
+    }
+
+    tcptestASSERT( xReturn == pdPASS );
+
+    return xReturn;
+}
+
+/*-----------------------------------------------------------*/
+
+static BaseType_t prvCheckBufferUnmodified( uint8_t * pucBuffer,
+                                            uint8_t ucFiller,
+                                            size_t xLength )
+{
+    BaseType_t xResult;
+    size_t xIndex;
+
+    xResult = pdPASS;
+
+    for( xIndex = 0; xIndex < xLength; xIndex++ )
+    {
+        if( pucBuffer[ xIndex ] != ucFiller )
+        {
+            xResult = pdFAIL;
+            tcptestFAILUREPRINTF( ( "Buffer modified at byte %d \r\n", xIndex ) );
+        }
+    }
+
+    return xResult;
+}
+
+/*-----------------------------------------------------------*/
+
+static BaseType_t prvCheckTimeout( TickType_t xStartTime,
+                                   TickType_t xEndTime,
+                                   TickType_t xTimeout )
+{
+    BaseType_t xResult = pdPASS;
+
+    /* Did the function run at least as long as the timeout?
+     * An "under tolerance" may be needed when the application timer
+     * and the network timer are sourced from separate clocks. */
+    if( ( int32_t ) ( xEndTime - xStartTime ) < ( int32_t ) ( xTimeout - integrationtestportableTIMEOUT_UNDER_TOLERANCE ) )
+    {
+        xResult = pdFAIL;
+        tcptestFAILUREPRINTF( ( "Start Time: %d, End Time: %d, Timeout: %d \n", xStartTime, xEndTime, xTimeout ) );
+    }
+
+    /* Did the function exit after a reasonable amount of time?
+     * An "over tolerance" is used to allow for overhead surrounding the timeout. */
+    if( ( xEndTime - xStartTime ) > ( xTimeout + integrationtestportableTIMEOUT_OVER_TOLERANCE ) )
+    {
+        xResult = pdFAIL;
+        tcptestFAILUREPRINTF( ( "Start Time: %d, End Time: %d, Timeout: %d \n", xStartTime, xEndTime, xTimeout ) );
+    }
+
+    return xResult;
+}
+
+/*-----------------------------------------------------------*/
+
+TEST_GROUP_RUNNER( Full_TCP )
+{
+    RUN_TEST_CASE( Full_TCP, TCP_Socket ); 
+    RUN_TEST_CASE( Full_TCP, TCP_Socket_InvalidInputParams );
+    RUN_TEST_CASE( Full_TCP, TCP_Socket_Setsockopt_InvalidParams );
+    RUN_TEST_CASE( Full_TCP, TCP_Socket_Close_InvalidParams );
+    RUN_TEST_CASE( Full_TCP, TCP_Socket_Shutdown_InvalidParams );
+    RUN_TEST_CASE( Full_TCP, TCP_Socket_Create_Concurrent );
+    RUN_TEST_CASE( Full_TCP, TCP_Socket_Connect_InvalidParams );
+    RUN_TEST_CASE( Full_TCP, TCP_htons_HappyCase );
+    RUN_TEST_CASE( Full_TCP, TCP_inet_addr_quick_HappyCase );
+    RUN_TEST_CASE( Full_TCP, TCP_Socket_Send_InvalidParams );
+    RUN_TEST_CASE( Full_TCP, TCP_Socket_Close_WithoutReceiving );
+    RUN_TEST_CASE( Full_TCP, TCP_Socket_Shutdown_WithoutReceiving );
+    RUN_TEST_CASE( Full_TCP, TCP_Socket_Recv_Invalid );
+    RUN_TEST_CASE( Full_TCP, TCP_Socket_Recv_Unconnected );
+    RUN_TEST_CASE( Full_TCP, TCP_Socket_Setsockopt_RCVTIMEO );
+    RUN_TEST_CASE( Full_TCP, TCP_Socket_Recv_NonBlocking );
+    RUN_TEST_CASE( Full_TCP, TCP_Socket_Shutdown );
+    RUN_TEST_CASE( Full_TCP, TCP_Socket_Close );
+    RUN_TEST_CASE( Full_TCP, TCP_Socket_Recv_ByteByByte );
+    RUN_TEST_CASE( Full_TCP, TCP_Socket_SendRecv_VaryLength );
+    RUN_TEST_CASE( Full_TCP, TCP_test_dns_multiple_addresses );
+    
+    /* Thread safety tests */
+    RUN_TEST_CASE( Full_TCP, TCP_Threadsafe_SameSocketDifferentTasks );
+    RUN_TEST_CASE( Full_TCP, TCP_Threadsafe_DifferentSocketsDifferentTasks );
+}
+
+/*-------------------------------------------------------------------*/
+/*-----------------------Begin Tests---------------------------------*/
+/*-------------------------------------------------------------------*/
+
+static void prvSOCKETS_CloseInvalidParams( void )
+{
+    BaseType_t xResult;
+
+    /* Try to close with an invalid socket. */
+    xResult = FreeRTOS_closesocket( FREERTOS_INVALID_SOCKET );
+    TEST_ASSERT_EQUAL_INT32_MESSAGE( 0, xResult, "Socket failed to close" );
+}
+
+TEST( Full_TCP, TCP_Socket_Close_InvalidParams )
+{
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    prvSOCKETS_CloseInvalidParams();
+}
+
+/*-----------------------------------------------------------*/
+
+static void prvSOCKETS_CloseWithoutReceiving( void )
+{
+    BaseType_t xResult;
+
+    /* Attempt to establish the requested connection. */
+    xResult = prvConnectHelperWithRetry( &xSocket, xReceiveTimeOut, xSendTimeOut, &xSocketOpen );
+    TEST_ASSERT_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Failed to connect" );
+
+    /* Send a lot of data to the echo server but never use the recv. */
+    xResult = FreeRTOS_send( xSocket, &cTransmittedString, tcptestTWICE_MAX_FRAME_SIZE, 0 );
+    TEST_ASSERT_GREATER_THAN_MESSAGE( 0, xResult, "Socket was not able to send" );
+
+    /* Try to close. */
+    xResult = prvCloseHelper( xSocket, &xSocketOpen );
+    TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to close" );
+}
+
+
+TEST( Full_TCP, TCP_Socket_Close_WithoutReceiving )
+{
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    prvSOCKETS_CloseWithoutReceiving();
+}
+
+/*-----------------------------------------------------------*/
+
+static void prvSOCKETS_ShutdownInvalidParams( void )
+{
+    BaseType_t xResult;
+
+    /* Ideally, we should test for all valid/invalid permutations
+     * of the parameters, but FreeRTOS_shutdown does not use the
+     * 2nd (xHow) parameter */
+
+    /* Call shutdown with invalid parameters. 2nd Parameter doesn't matter in this case */
+    xResult = FreeRTOS_shutdown( FREERTOS_INVALID_SOCKET, FREERTOS_SHUT_RDWR );
+    TEST_ASSERT_EQUAL_MESSAGE( -pdFREERTOS_ERRNO_EOPNOTSUPP, xResult, "Socket could shutdown with an invalid param" );
+}
+
+TEST( Full_TCP, TCP_Socket_Shutdown_InvalidParams )
+{
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    prvSOCKETS_ShutdownInvalidParams();
+}
+
+
+/*-----------------------------------------------------------*/
+static void prvSOCKETS_ShutdownWithoutReceiving( void )
+{
+    BaseType_t xResult;
+
+    /* Attempt to establish the requested connection. */
+    xResult = prvConnectHelperWithRetry( &xSocket, xReceiveTimeOut, xSendTimeOut, &xSocketOpen );
+    TEST_ASSERT_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Failed to connect" );
+
+    /* Send a lot of data to the echo server but never use the recv. */
+    xResult = FreeRTOS_send( xSocket, &cTransmittedString, tcptestTWICE_MAX_FRAME_SIZE, 0 );
+    TEST_ASSERT_GREATER_THAN_MESSAGE( 0, xResult, "Socket was not able to send" );
+
+    xResult = FreeRTOS_shutdown( xSocket, FREERTOS_SHUT_RDWR);
+    TEST_ASSERT_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to shutdown" );
+
+    xResult = prvCloseHelper( xSocket, &xSocketOpen );
+    TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to close" );
+}
+
+
+TEST( Full_TCP, TCP_Socket_Shutdown_WithoutReceiving )
+{
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    prvSOCKETS_ShutdownWithoutReceiving();
+}
+
+/*-----------------------------------------------------------*/
+
+static void prvFreeRTOS_recv_On_Unconnected_Socket( void )
+{
+    BaseType_t xResult;
+    uint8_t ucBuf;
+    volatile BaseType_t xConnectedSocketOpen = pdFALSE;
+    volatile Socket_t xConnectedSocket;
+
+    if( TEST_PROTECT() )
+    {
+        xSocket = prvTcpSocketHelper( &xSocketOpen );
+        TEST_ASSERT_NOT_EQUAL_MESSAGE( FREERTOS_INVALID_SOCKET, xSocket, "Socket creation failed" );
+
+        xResult = prvSetSockOptHelper( xSocket, xReceiveTimeOut, xSendTimeOut );
+        TEST_ASSERT_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "SetSockOpt Failed" );
+
+
+        /* We connect another socket. The rational for this is a bug that was experienced in the past
+         * where the data would be received  by from another socket. */
+        /* Attempt to establish the requested connection. */
+        xResult = prvConnectHelperWithRetry( &xConnectedSocket, xReceiveTimeOut, xSendTimeOut, &xConnectedSocketOpen );
+        TEST_ASSERT_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Failed to connect" );
+
+        /* Send data from the connected socket. */
+        xResult = FreeRTOS_send( xConnectedSocket, &ucBuf, 1, 0 );
+        TEST_ASSERT_GREATER_THAN_MESSAGE( 0, xResult, "Socket was not able to send" );
+
+        /* Try to receive on unconnected socket. */
+        xResult = FreeRTOS_recv( xSocket, &ucBuf, 1, 0 );
+        TEST_ASSERT_LESS_THAN_MESSAGE( 0, xResult, "Socket was able to receive from unconnected socket" );
+
+        xResult = prvCloseHelper( xSocket, &xSocketOpen );
+        TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to close" );
+
+        /* Close the other socket. */
+        xResult = prvShutdownHelper( xConnectedSocket );
+        TEST_ASSERT_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to shutdown" );
+
+        xResult = prvCloseHelper( xConnectedSocket, &xConnectedSocketOpen );
+        TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to close" );
+        xConnectedSocketOpen = pdFALSE;
+    }
+
+    if( xConnectedSocketOpen == pdTRUE )
+    {
+        ( void ) prvShutdownHelper( xConnectedSocket );
+
+        xResult = prvCloseHelper( xConnectedSocket, &xConnectedSocketOpen );
+        TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to close." );
+    }
+}
+
+TEST( Full_TCP, TCP_Socket_Recv_Unconnected )
+{
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    prvFreeRTOS_recv_On_Unconnected_Socket();
+}
+
+/*-----------------------------------------------------------*/
+
+static void prvSOCKETS_Socket_TCP( void )
+{
+    BaseType_t xResult;
+
+    /* Make TCP socket. */
+    xSocket = FreeRTOS_socket( FREERTOS_AF_INET,
+                              FREERTOS_SOCK_STREAM,
+                              FREERTOS_IPPROTO_TCP );
+
+    TEST_ASSERT_NOT_EQUAL( xSocket, FREERTOS_INVALID_SOCKET );
+
+    xResult = prvCloseHelper( xSocket, &xSocketOpen );
+    TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to close" );
+}
+
+TEST( Full_TCP, TCP_Socket )
+{
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    prvSOCKETS_Socket_TCP();
+}
+
+/*-----------------------------------------------------------*/
+
+static void prvSOCKETS_SetSockOpt_RCVTIMEO( void )
+{
+    BaseType_t xResult;
+    UBaseType_t uxOldPriority;
+    TickType_t xStartTime;
+    TickType_t xEndTime;
+    TickType_t xTimeout;
+    TickType_t xTimeouts[] = { 30, 100, 10000 }; /* TODO: Add 0, nonblocking tests */
+    uint8_t ucBuffer;
+    size_t xIndex;
+
+
+    xResult = pdPASS;
+    tcptestPRINTF( ( "Starting %s \r\n", __FUNCTION__ ) );
+    tcptestPRINTF( ( "This tests timeouts, so it takes a while! \r\n" ) );
+
+    /* Attempt to establish the requested connection. */
+    xResult = prvConnectHelperWithRetry( &xSocket, xReceiveTimeOut, xSendTimeOut, &xSocketOpen );
+    TEST_ASSERT_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Failed to connect" );
+
+    /* Record the priority of this task. */
+    uxOldPriority = uxTaskPriorityGet( NULL );
+
+    /*
+     * Set this task to be the highest possible priority.
+     * Since we are testing timeouts, we don't want other tasks
+     * running in the middle of it.
+     */
+    vTaskPrioritySet( NULL, configMAX_PRIORITIES - 1 );
+
+    /*
+     * Set the receive timeout, check the tick count,
+     * call receive (with no data sent), check the tick
+     * count again, make sure time elapsed is within
+     * time expected.
+     */
+    for( xIndex = 0; xIndex < sizeof( xTimeouts ) / sizeof( TickType_t ); xIndex++ )
+    {
+        xTimeout = pdMS_TO_TICKS( xTimeouts[ xIndex ] );
+        xResult = FreeRTOS_setsockopt( xSocket, 0, FREERTOS_SO_RCVTIMEO, &xTimeout, sizeof( TickType_t ) );
+        TEST_ASSERT_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Failed to set receive timeout" );
+
+        xStartTime = xTaskGetTickCount();
+        xResult = FreeRTOS_recv( xSocket, &ucBuffer, 1, 0 );
+        xEndTime = xTaskGetTickCount();
+        TEST_ASSERT_LESS_THAN_MESSAGE( 1, xResult, "Receive call failed in receive timeout test" );
+        xResult = prvCheckTimeout( xStartTime, xEndTime, xTimeout );
+        TEST_ASSERT_EQUAL_INT32_MESSAGE( pdPASS, xResult, "Receive timeout was outside of acceptable range" );
+    }
+
+    /* Restore the old priority of this task. */
+    vTaskPrioritySet( NULL, uxOldPriority );
+    xResult = prvShutdownHelper( xSocket );
+    TEST_ASSERT_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to shutdown" );
+
+    xResult = prvCloseHelper( xSocket, &xSocketOpen );
+    TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to close" );
+
+    tcptestPRINTF( ( "%s passed\r\n", __FUNCTION__ ) );
+}
+
+
+TEST( Full_TCP, TCP_Socket_Setsockopt_RCVTIMEO )
+{
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    prvSOCKETS_SetSockOpt_RCVTIMEO();
+}
+
+/*-----------------------------------------------------------*/
+
+static void prvSOCKETS_NonBlocking_Test( void )
+{
+    BaseType_t xResult;
+    int32_t lNumBytes;
+    TickType_t xStartTime;
+    TickType_t xEndTime;
+    TickType_t xTimeout = 0;
+    TickType_t xWaitTime = 1000;
+    uint8_t * pucTxBuffer = ( uint8_t * ) pcTxBuffer;
+    uint8_t * pucRxBuffer = ( uint8_t * ) pcRxBuffer;
+    size_t xMessageLength = 1200;
+    size_t xNumBytesReceived = 0;
+
+
+    xResult = pdPASS;
+    tcptestPRINTF( ( "Starting %s \r\n", __FUNCTION__ ) );
+    tcptestPRINTF( ( "This tests timeouts, so it takes a while! \r\n" ) );
+
+    if( TEST_PROTECT() )
+    {
+        /* Attempt to establish the requested connection. */
+        xResult = prvConnectHelperWithRetry( &xSocket, xReceiveTimeOut, xSendTimeOut, &xSocketOpen );
+        TEST_ASSERT_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Failed to connect" );
+
+        /*
+         * Set the receive timeout, check the tick count,
+         * call receive (with no data sent), check the tick
+         * count again, make sure time elapsed is within
+         * time expected.
+         */
+        xResult = FreeRTOS_setsockopt( xSocket, 0, FREERTOS_SO_RCVTIMEO, &xTimeout, sizeof( TickType_t ) );
+        TEST_ASSERT_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Failed to set receive timeout" );
+                
+        xStartTime = xTaskGetTickCount();
+        xResult = FreeRTOS_recv( xSocket, &pucRxBuffer, 1, 0 );
+        xEndTime = xTaskGetTickCount();
+        TEST_ASSERT_LESS_THAN_MESSAGE( 1, xResult, "Receive call failed in receive timeout test" );
+
+        xResult = prvCheckTimeout( xStartTime, xEndTime, xTimeout );
+        TEST_ASSERT_EQUAL_INT32_MESSAGE( pdPASS, xResult, "Receive timeout was outside of acceptable range" );
+
+        /*
+         * Send data and receive data in nonblocking mode
+         */
+        memset( pucTxBuffer, tcptestTX_BUFFER_FILLER, tcptestBUFFER_SIZE );
+        prvCreateTxData( ( char * ) pucTxBuffer, xMessageLength, 0 );
+
+        xResult = prvSendHelper( xSocket, pucTxBuffer, xMessageLength );
+        TEST_ASSERT_EQUAL_INT32_MESSAGE( pdPASS, xResult, "Data failed to send\r\n" );
+
+        memset( pucRxBuffer, tcptestRX_BUFFER_FILLER, tcptestBUFFER_SIZE );
+        xStartTime = xTaskGetTickCount();
+        xEndTime = xTaskGetTickCount();
+
+        do
+        {
+            lNumBytes = FreeRTOS_recv( xSocket, &pucRxBuffer[ xNumBytesReceived ], xMessageLength - xNumBytesReceived, 0 );
+
+            if( lNumBytes > 0 )
+            {
+                /*
+                 * If xResult is negative, it's an error code. Because xNumBytesReceived is an
+                 * unsigned int, it will become a large positive number, so the while loop
+                 * would end prematurely. This if statement prevents that.
+                 */
+                xNumBytesReceived += lNumBytes;
+            }
+
+            xEndTime = xTaskGetTickCount();
+        }
+        while( ( ( xEndTime - xStartTime ) < xWaitTime ) && ( xMessageLength > xNumBytesReceived ) );
+
+        TEST_ASSERT_EQUAL_INT32_MESSAGE( xMessageLength, xNumBytesReceived, "Data was not received \r\n" );
+
+        xResult = prvCheckRxTxBuffers( pucTxBuffer, pucRxBuffer, xMessageLength );
+
+        xResult = prvShutdownHelper( xSocket );
+        TEST_ASSERT_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to shutdown" );
+    }
+
+    xResult = prvCloseHelper( xSocket, &xSocketOpen );
+    TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to close" );
+
+    tcptestPRINTF( ( "%s passed\r\n", __FUNCTION__ ) );
+}
+
+
+TEST( Full_TCP, TCP_Socket_Recv_NonBlocking )
+{
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    prvSOCKETS_NonBlocking_Test();
+}
+
+/*-----------------------------------------------------------*/
+
+static void prvSetSockOpt_InvalidParams( void )
+{
+    BaseType_t xResult;
+
+    if( TEST_PROTECT() )
+    {
+        /* Attempt to establish the requested connection. */
+        xResult = prvConnectHelperWithRetry( &xSocket, xReceiveTimeOut, xSendTimeOut, &xSocketOpen );
+        TEST_ASSERT_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Failed to connect" );
+
+        /* Try to set the invalid option. */
+        xResult = FreeRTOS_setsockopt( xSocket,
+                                      0,    /* lLevel - Not used. */
+                                      -1,   /* Invalid option name. */
+                                      NULL, /* pvOptionValue - This is insignificant as the option name is invalid. */
+                                      0     /* xOptionLength - zero for NULL value. */
+                                      );
+
+        /* Since the option name supplied in the previous
+         * call was invalid, we expect the call to the API
+         * SOCKETS_SetSockOpt to fail. */
+        TEST_ASSERT_LESS_THAN_INT32_MESSAGE( 0, xResult, "SOCKETS_SetSockOpt with invalid option succeeded." );
+
+        /* Try to set a valid option on an invalid socket. */
+        xResult = FreeRTOS_setsockopt( FREERTOS_INVALID_SOCKET, /* Invalid socket. */
+                                      0,                      /* lLevel - Not used. */
+                                      FREERTOS_SO_RCVTIMEO,    /* Receive timeout. */
+                                      &( xReceiveTimeOut ),
+                                      sizeof( TickType_t ) );
+
+        /* Since the socket passed in the previous call was
+         * invalid, we expect the call to the API
+         * SOCKETS_SetSockOpt to fail. */
+        TEST_ASSERT_LESS_THAN_INT32_MESSAGE( 0, xResult, "SOCKETS_SetSockOpt with invalid socket succeeded." );
+    }
+
+    /* If the code reaches here, it means that the socket
+     * was created successfully. Make sure to free it even
+     * if any of the above assertion fails. This is needed
+     * to avoid leaks. */
+    xResult = prvCloseHelper( xSocket, &( xSocketOpen ) );
+
+    /* If this fails there is nothing much we can do
+     * to avoid leaking. */
+    TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "SOCKETS_Close failed. \r\n" );
+}
+
+TEST( Full_TCP, TCP_Socket_Setsockopt_InvalidParams )
+{
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    prvSetSockOpt_InvalidParams();
+
+    tcptestPRINTF( ( "%s complete.\r\n", __FUNCTION__ ) );
+}
+
+/*-----------------------------------------------------------*/
+
+static void prvSOCKETS_SetSockOpt_SNDTIMEO( void )
+{    
+    /* TODO: This is a stub function. */
+    TEST_FAIL_MESSAGE( "This test is not implemented." );
+}
+
+TEST( Full_TCP, FreeRTOSSetSockOpt_SNDTIMEO )
+{
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    prvSOCKETS_SetSockOpt_SNDTIMEO();
+}
+
+/*-----------------------------------------------------------*/
+
+static void prvSOCKETS_Shutdown( void )
+{
+    BaseType_t xResult;
+    uint8_t ucBuf;
+
+    xResult = pdPASS;
+
+    /* Shutdown: Read. */
+
+    /* Attempt to establish the requested connection. */
+    xResult = prvConnectHelperWithRetry( &xSocket, xReceiveTimeOut, xSendTimeOut, &xSocketOpen );
+    TEST_ASSERT_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Failed to connect" );
+
+    xResult = FreeRTOS_shutdown( xSocket, FREERTOS_SHUT_RD );
+    TEST_ASSERT_EQUAL_INT32( pdFREERTOS_ERRNO_NONE, xResult );
+
+    do
+    {
+        xResult = FreeRTOS_recv( xSocket, &ucBuf, 1, 0 );
+    }
+    while( xResult >= 0 );
+
+    TEST_ASSERT_LESS_THAN_INT32( 0, xResult );
+
+    xResult = prvCloseHelper( xSocket, &xSocketOpen );
+    TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to close" );
+
+    /* Shutdown: Write. Expected behavior of send after
+     * Shutdown/WRITE is ambiguous. Therefore, we cannot
+     * test anything except the read/recv. */       
+}
+
+TEST( Full_TCP, TCP_Socket_Shutdown )
+{
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    prvSOCKETS_Shutdown();
+}
+
+/*-----------------------------------------------------------*/
+
+static void prvTestSOCKETS_Close( void )
+{
+    BaseType_t xResult;
+    uint8_t ucBuf;
+
+    xResult = pdPASS;
+
+    /* Close an unconnected socket */
+    xSocket = prvTcpSocketHelper( &xSocketOpen );
+    TEST_ASSERT_NOT_EQUAL_MESSAGE( FREERTOS_INVALID_SOCKET, xSocket, "Socket creation failed" );
+
+    xResult = prvCloseHelper( xSocket, &xSocketOpen );
+    TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to close" );
+
+    /* The secure sockets API abstraction requires that Socket_t be treated as
+     * opaque. It could be a pointer, a handle, an index, or whatever. In addition,
+     * SOCKETS_Close treats the socket only as input. Therefore, it is not a valid
+     * test to pass a socket that has been freed, via explicit close, to other
+     * downstream socket APIs. */
+    xSocket = FREERTOS_INVALID_SOCKET;
+
+    /* Closed socket should not connect, send or receive */
+    xResult = FreeRTOS_send( xSocket, &ucBuf, 1, 0 );
+    TEST_ASSERT_LESS_THAN_INT32( 0, xResult );
+    xResult = FreeRTOS_recv( xSocket, &ucBuf, 1, 0 );
+    TEST_ASSERT_LESS_THAN_INT32( 0, xResult );
+
+    /* Close a connected socket */
+    xResult = prvConnectHelperWithRetry( &xSocket, xReceiveTimeOut, xSendTimeOut, &xSocketOpen );
+    TEST_ASSERT_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Failed to connect" );
+
+    xResult = prvCloseHelper( xSocket, &xSocketOpen );
+    TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to close" );
+
+    /* See comment above. */
+    xSocket = FREERTOS_INVALID_SOCKET;
+
+    /* Closed socket should not connect, send or receive */
+    xResult = FreeRTOS_send( xSocket, &ucBuf, 1, 0 );
+    TEST_ASSERT_LESS_THAN_INT32( 0, xResult );
+    xResult = FreeRTOS_recv( xSocket, &ucBuf, 1, 0 );
+    TEST_ASSERT_LESS_THAN_INT32( 0, xResult );
+
+    /* Close a shutdown socket */
+    xResult = prvConnectHelperWithRetry( &xSocket, xReceiveTimeOut, xSendTimeOut, &xSocketOpen );
+    TEST_ASSERT_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Failed to connect" );
+
+    xResult = prvShutdownHelper( xSocket );
+    TEST_ASSERT_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to shutdown" );
+
+    xResult = prvCloseHelper( xSocket, &xSocketOpen );
+    TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to close" );
+
+    /* See comment above. */
+    xSocket = FREERTOS_INVALID_SOCKET;
+
+    /* Closed socket should not connect, send or receive */
+    xResult = FreeRTOS_send( xSocket, &ucBuf, 1, 0 );
+    TEST_ASSERT_LESS_THAN_INT32( 0, xResult );
+    xResult = FreeRTOS_recv( xSocket, &ucBuf, 1, 0 );
+    TEST_ASSERT_LESS_THAN_INT32( 0, xResult );
+
+    tcptestPRINTF( ( "%s passed\r\n", __FUNCTION__ ) );
+}
+
+TEST( Full_TCP, TCP_Socket_Close )
+{
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    prvTestSOCKETS_Close();
+}
+
+/*-----------------------------------------------------------*/
+
+static void prvTestFreeRTOS_recv_ByteByByte( void )
+{
+    BaseType_t xResult = pdFAIL;
+    uint32_t ulTxCount;
+    size_t xBytesReceived;
+    uint8_t * pucTxBuffer = ( uint8_t * ) pcTxBuffer;
+    uint8_t * pucRxBuffer = ( uint8_t * ) pcRxBuffer;
+    size_t xMessageLengths[] = { 2, 7, 8, 9, 20 };
+
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    /* Attempt to establish the requested connection. */
+    xResult = prvConnectHelperWithRetry( &xSocket, xReceiveTimeOut, xSendTimeOut, &xSocketOpen );
+    TEST_ASSERT_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Failed to connect" );
+
+    for( ulTxCount = 0; ulTxCount < sizeof( xMessageLengths ) / sizeof( xMessageLengths[ 0 ] ); ulTxCount++ )
+    {
+        xBytesReceived = 0;
+
+        prvCreateTxData( ( char * ) pucTxBuffer, xMessageLengths[ ulTxCount ], ulTxCount );
+        xResult = prvSendHelper( xSocket, pucTxBuffer, xMessageLengths[ ulTxCount ] );
+
+        while( ( xResult == pdPASS ) && ( xBytesReceived < xMessageLengths[ ulTxCount ] ) )
+        {
+            memset( pucRxBuffer, tcptestRX_BUFFER_FILLER, tcptestBUFFER_SIZE );
+            xResult = prvRecvHelper( xSocket, pucRxBuffer, 1 );
+
+            if( xResult == pdPASS )
+            {
+                if( pucRxBuffer[ 0 ] == pucTxBuffer[ xBytesReceived ] )
+                {
+                    /* Check that all but the first byte of the RxBuffer is unmodified. */
+                    xResult = prvCheckBufferUnmodified( pucRxBuffer + 1,
+                                                        tcptestRX_BUFFER_FILLER,
+                                                        tcptestBUFFER_SIZE - 1 );
+                }
+                else
+                {
+                    xResult = pdFAIL;
+                    tcptestPRINTF( ( "Byte %d was incorrectly received\r\n", ( xBytesReceived + 1 ) ) );
+                }
+            }
+
+            xBytesReceived++;
+        }
+    }
+
+    /* Close this socket before looping back to create another. */
+    TEST_ASSERT_EQUAL_INT32_MESSAGE( pdPASS, xResult, "Failed received" );
+    xResult = prvShutdownHelper( xSocket );
+    TEST_ASSERT_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to shutdown" );
+
+    xResult = prvCloseHelper( xSocket, &xSocketOpen );
+    TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to close" );
+}
+
+TEST( Full_TCP, TCP_Socket_Recv_ByteByByte )
+{
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    prvTestFreeRTOS_recv_ByteByByte();
+}
+
+/*-----------------------------------------------------------*/
+
+static void prvFreeRTOS_sendRecv_VaryLength( void )
+{
+    BaseType_t xResult;
+    uint32_t ulIndex;
+    uint32_t ulTxCount;
+    const uint32_t ulMaxLoopCount = 10;
+    uint32_t ulI;
+    uint8_t * pucTxBuffer = ( uint8_t * ) pcTxBuffer;
+    uint8_t * pucRxBuffer = ( uint8_t * ) pcRxBuffer;
+    size_t xMessageLengths[] = { 1, 2, 7, 8, 9, 1199, 1200, 1201 }; /* TODO: Add 0, send sizes larger than MTU. */
+
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    xResult = pdPASS;
+    ulTxCount = 0;
+
+    for( ulIndex = 0; ulIndex < sizeof( xMessageLengths ) / sizeof( size_t ); ulIndex++ )
+    {
+        /* Attempt to establish the requested connection. */
+        xResult = prvConnectHelperWithRetry( &xSocket, xReceiveTimeOut, xSendTimeOut, &xSocketOpen );
+        TEST_ASSERT_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Failed to connect" );
+
+        /* Send each message length ulMaxLoopCount times. */
+        for( ulI = 0; ulI < ulMaxLoopCount; ulI++ )
+        {
+            memset( pucTxBuffer, tcptestTX_BUFFER_FILLER, tcptestBUFFER_SIZE );
+
+            prvCreateTxData( ( char * ) pucTxBuffer,
+                             xMessageLengths[ ulIndex ],
+                             ulTxCount );
+            ulTxCount++;
+
+            xResult = prvSendHelper( xSocket,
+                                     pucTxBuffer,
+                                     xMessageLengths[ ulIndex ] );
+
+            TEST_ASSERT_EQUAL_INT32_MESSAGE( pdPASS, xResult, "Data failed to send\r\n" );
+            memset( pucRxBuffer, tcptestRX_BUFFER_FILLER, tcptestBUFFER_SIZE );
+            xResult = prvRecvHelper( xSocket,
+                                     pucRxBuffer,
+                                     xMessageLengths[ ulIndex ] );
+
+            TEST_ASSERT_EQUAL_INT32_MESSAGE( pdPASS, xResult, "Data was not received \r\n" );
+            xResult = prvCheckRxTxBuffers( pucTxBuffer,
+                                           pucRxBuffer,
+                                           xMessageLengths[ ulIndex ] );
+        }
+
+        xResult = prvShutdownHelper( xSocket );
+        TEST_ASSERT_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to shutdown" );
+
+        xResult = prvCloseHelper( xSocket, &xSocketOpen );
+        TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to close" );
+
+        /* Print feedback since this test takes a while! */
+        tcptestPRINTF( ( " Sending messages with length %d complete\r\n", xMessageLengths[ ulIndex ] ) );
+
+        /* Pause for a short while to ensure the network is not too
+         * congested. */
+        vTaskDelay( tcptestLOOP_DELAY );
+    }
+
+    /* Report Test Results. */
+    tcptestPRINTF( ( "%s passed\r\n", __FUNCTION__ ) );
+}
+
+TEST( Full_TCP, TCP_Socket_SendRecv_VaryLength )
+{
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    prvFreeRTOS_sendRecv_VaryLength();
+}
+
+/*-----------------------------------------------------------*/
+
+static void prvSOCKETS_Socket_InvalidInputParams( void )
+{
+    BaseType_t xResult;
+
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    /* Providing invalid domain. */
+    if( TEST_PROTECT() )
+    {
+        xSocket = FreeRTOS_socket( ( FREERTOS_AF_INET + 1 ),
+                                        FREERTOS_SOCK_STREAM,
+                                        FREERTOS_IPPROTO_TCP );
+
+        /* If the test code reaches here, it failed. */
+        TEST_FAIL_MESSAGE( "Invalid socket domain accepted" );
+        xResult = prvCloseHelper( xSocket, &xSocketOpen );
+        TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to close" );
+    }
+
+    /* Providing invalid type. */
+    if( TEST_PROTECT() )
+    {
+        xSocket = FreeRTOS_socket( FREERTOS_AF_INET,
+                                  ( FREERTOS_SOCK_STREAM | FREERTOS_SOCK_DGRAM ),
+                                    FREERTOS_IPPROTO_TCP );
+
+        TEST_FAIL_MESSAGE( "Invalid socket type accepted" );
+        xResult = prvCloseHelper( xSocket, &xSocketOpen );
+        TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to close" );
+    }
+
+    /* Providing invalid protocol. */
+    if( TEST_PROTECT() )
+    {
+        xSocket = FreeRTOS_socket(FREERTOS_AF_INET,
+                                    FREERTOS_SOCK_STREAM,
+                                  ( FREERTOS_IPPROTO_TCP | FREERTOS_IPPROTO_UDP ) );
+
+        TEST_FAIL_MESSAGE( "Invalid socket protocol accepted" );
+        xResult = prvCloseHelper( xSocket, &xSocketOpen );
+        TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to close" );
+    }
+
+    if( TEST_PROTECT() )
+    {
+        /* Mixing DGRAM type with TCP protocol (instead of UDP). */
+        xSocket = FreeRTOS_socket(  FREERTOS_AF_INET,
+                                    FREERTOS_SOCK_DGRAM,
+                                    FREERTOS_IPPROTO_TCP );
+
+        TEST_FAIL_MESSAGE( "Invalid socket created - mixed TCP with DGRAM " );
+        xResult = prvCloseHelper( xSocket, &xSocketOpen );
+        TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to close" );
+    }
+
+    /* Mixing STREAM type with UDP protocol (instead of TCP). */
+    if( TEST_PROTECT() )
+    {
+        xSocket = FreeRTOS_socket( FREERTOS_AF_INET,
+                                    FREERTOS_SOCK_STREAM,
+                                    FREERTOS_IPPROTO_UDP );
+
+        TEST_FAIL_MESSAGE( "Invalid socket created - mixed UDP with STREAM" );
+        xResult = prvCloseHelper( xSocket, &xSocketOpen );
+        TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to close" );
+    }
+
+    /* Report Test Results. */
+    tcptestPRINTF( ( "%s passed\r\n", __FUNCTION__ ) );
+}
+
+TEST( Full_TCP, TCP_Socket_InvalidInputParams )
+{
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    prvSOCKETS_Socket_InvalidInputParams();
+}
+
+/*-----------------------------------------------------------*/
+
+/*
+ * Verify the number of sockets that can be concurrently
+ * created up to a configured maximum.  Return pdFAIL if
+ * fewer than that number are created.  If more than the
+ * maximum can be created, a warning is printed, but this
+ * is not a failure condition.  Some ports are limited only
+ * by free memory. For these ports, check that a reasonable
+ * number of sockets can be created concurrently.
+ */
+#ifdef integrationtestportableMAX_NUM_UNSECURE_SOCKETS
+    #define MAX_NUM_SOCKETS    integrationtestportableMAX_NUM_UNSECURE_SOCKETS
+#else
+    #define MAX_NUM_SOCKETS    5u
+#endif
+static void prvSOCKETS_Socket_ConcurrentCount( void )
+{
+    BaseType_t xResult = pdFAIL;
+    Socket_t xCreatedSockets[ MAX_NUM_SOCKETS ];
+    BaseType_t xSocketsCreated;
+    Socket_t xSocketLocal;
+
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    xResult = pdPASS;
+
+    for( xSocketsCreated = 0; xSocketsCreated < MAX_NUM_SOCKETS; xSocketsCreated++ )
+    {
+        xSocketLocal = FreeRTOS_socket( FREERTOS_AF_INET, FREERTOS_SOCK_STREAM, FREERTOS_IPPROTO_TCP );
+
+        if( xSocketLocal == FREERTOS_INVALID_SOCKET )
+        {
+            xResult = pdFAIL;
+            tcptestPRINTF( ( "%s failed creating a socket number %d \r\n", __FUNCTION__, xSocketsCreated ) );
+            break;
+        }
+        else
+        {
+            xCreatedSockets[ xSocketsCreated ] = xSocketLocal;
+        }
+    }
+
+    #ifdef integrationtestportableMAX_NUM_UNSECURE_SOCKETS
+        if( xResult == pdPASS )
+        {
+            xSocketLocal = FreeRTOS_socket(FREERTOS_AF_INET, FREERTOS_SOCK_STREAM, FREERTOS_IPPROTO_TCP);
+
+            if( xSocketLocal != FREERTOS_INVALID_SOCKET )
+            {
+                SOCKETS_Close( xSocket );
+                tcptestPRINTF( ( "%s exceeded maximum number of sockets (%d > %d); is the value of " \
+                                 "integrationtestportableMAX_NUM_UNSECURE_SOCKETS correct?\r\n", __FUNCTION__,
+                                 ( MAX_NUM_SOCKETS + 1 ), MAX_NUM_SOCKETS ) );
+            }
+        }
+    #endif /* ifdef integrationtestportableMAX_NUM_UNSECURE_SOCKETS */
+    
+    TEST_ASSERT_EQUAL_UINT32_MESSAGE(pdPASS, xResult, "Concurrent num sockets test failed");
+
+    /* Cleanup. */
+    while( xSocketsCreated > 0 )
+    {
+        --xSocketsCreated;
+        xResult = FreeRTOS_closesocket( xCreatedSockets[ xSocketsCreated ] );
+        TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE(0, xResult, "Closing Socket in Multiple Concurrent Socket test failed\n");
+    }
+    
+    /* Report Test Results. */
+    tcptestPRINTF( ( "%s passed\r\n", __FUNCTION__ ) );
+}
+
+TEST( Full_TCP, TCP_Socket_Create_Concurrent )
+{
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    prvSOCKETS_Socket_ConcurrentCount();
+}
+
+/*-----------------------------------------------------------*/
+
+static void prvFreeRTOS_connect_InvalidParams( void )
+{
+    BaseType_t xResult;
+    struct freertos_sockaddr xEchoServerAddress;
+
+    uint32_t ulEchoServerIP;
+
+    ulEchoServerIP = FreeRTOS_inet_addr_quick( tcptestECHO_SERVER_ADDR0,
+                                               tcptestECHO_SERVER_ADDR1,
+                                               tcptestECHO_SERVER_ADDR2,
+                                               tcptestECHO_SERVER_ADDR3 );
+
+
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    xSocket = prvTcpSocketHelper( &xSocketOpen );
+    TEST_ASSERT_NOT_EQUAL_MESSAGE( FREERTOS_INVALID_SOCKET, xSocket, "Socket creation failed" );
+
+    /* Echo requests are sent to the echo server.  The echo server is
+    * listening to tcptestECHO_PORT on this computer's IP address. */
+    xEchoServerAddress.sin_port = FreeRTOS_htons( tcptestECHO_PORT );
+    xEchoServerAddress.sin_addr = ulEchoServerIP;
+
+    /* Invalid socket. */
+    xResult = FreeRTOS_connect( FREERTOS_INVALID_SOCKET,
+                               &xEchoServerAddress,
+                               sizeof( xEchoServerAddress ) );
+
+    TEST_ASSERT_LESS_THAN_INT32_MESSAGE( 0, xResult, "Connect on an invalid socket succeeded\n" );
+
+    xResult = prvCloseHelper( xSocket, &xSocketOpen );
+    TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to close" );
+    
+
+
+    /* Invalid IP address (0.0.0.0).  TODO: Investigate reserved IP addresses */
+    xSocket = prvTcpSocketHelper( &xSocketOpen );
+    TEST_ASSERT_NOT_EQUAL_MESSAGE( FREERTOS_INVALID_SOCKET, xSocket, "Socket creation failed" );
+
+    xEchoServerAddress.sin_addr = FreeRTOS_inet_addr_quick( 0, 0, 0, 0 );
+    xResult = FreeRTOS_connect( xSocket,
+                               &xEchoServerAddress,
+                               sizeof( xEchoServerAddress ) );
+
+    TEST_ASSERT_LESS_THAN_INT32_MESSAGE( 0, xResult, "Connect to IP Address 0.0.0.0 worked" );
+
+    xResult = prvCloseHelper( xSocket, &xSocketOpen );
+    TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to close" );
+
+
+
+    /* Invalid port (0). */
+    xSocket = prvTcpSocketHelper( &xSocketOpen );
+    TEST_ASSERT_NOT_EQUAL_MESSAGE( FREERTOS_INVALID_SOCKET, xSocket, "Socket creation failed" );
+
+    xEchoServerAddress.sin_port = FreeRTOS_htons( 0 );
+    xEchoServerAddress.sin_addr = ulEchoServerIP;
+    xResult = FreeRTOS_connect( xSocket,
+                               &xEchoServerAddress,
+                               sizeof( xEchoServerAddress ) );
+
+    TEST_ASSERT_LESS_THAN_INT32_MESSAGE( 0, xResult, "Connect to Port 0 worked" );
+
+    xResult = prvCloseHelper( xSocket, &xSocketOpen );
+    TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to close" );
+
+
+
+    /* NULL Address. */
+    xSocket = prvTcpSocketHelper( &xSocketOpen );
+    TEST_ASSERT_NOT_EQUAL_MESSAGE( FREERTOS_INVALID_SOCKET, xSocket, "Socket creation failed" );
+    xResult = FreeRTOS_connect( xSocket, NULL, 0 );
+
+    /* Ensure that the attempt to connect to NULL address fails. */
+    TEST_ASSERT_LESS_THAN_INT32_MESSAGE( 0, xResult, "Connect to NULL Address worked." );
+
+    /* TODO: Does port 0 mean connect to any available port? */
+    xResult = prvCloseHelper( xSocket, &xSocketOpen );
+    TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to close" );
+}
+
+TEST( Full_TCP, TCP_Socket_Connect_InvalidParams )
+{
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    prvFreeRTOS_connect_InvalidParams();
+}
+
+/*-----------------------------------------------------------*/
+
+static void prvSend_Invalid( void )
+{
+    BaseType_t xResult;
+    uint8_t * pucTxBuffer = ( uint8_t * ) pcTxBuffer;
+
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    /* Unconnected socket. */
+    if( TEST_PROTECT() )
+    {
+        /* Attempt to establish the requested connection. */
+        xResult = prvConnectHelperWithRetry( &xSocket, xReceiveTimeOut, xSendTimeOut, &xSocketOpen );
+        TEST_ASSERT_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Failed to connect" );
+
+        /* Invalid socket. */
+        xResult = FreeRTOS_send( FREERTOS_INVALID_SOCKET, pucTxBuffer, 300, 0 );
+        TEST_ASSERT_LESS_THAN_INT32_MESSAGE( 0, xResult, "Socket send fails with invalid socket" );
+
+        /* NULL Tx Buffer. */
+        xResult = FreeRTOS_send( xSocket, NULL, 300, 0 );
+        TEST_ASSERT_LESS_THAN_INT32_MESSAGE( 0, xResult, "Socket send should return error for NULL input buffer" );
+    }
+    else
+    {
+        TEST_FAIL_MESSAGE( "Sending on an TCP socket with NULL buffer triggered an assert " );
+    }
+
+    /* Cleanup. */
+    xResult = prvCloseHelper( xSocket, &xSocketOpen );
+    TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to close" );
+
+    /* Unconnected socket. */
+    if( TEST_PROTECT() )
+    {
+        xSocket = prvTcpSocketHelper( &xSocketOpen );
+        TEST_ASSERT_NOT_EQUAL_MESSAGE( FREERTOS_INVALID_SOCKET, xSocket, "Socket creation failed" );
+
+        xResult = prvSetSockOptHelper( xSocket, xReceiveTimeOut, xSendTimeOut );
+        TEST_ASSERT_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Set sockopt failed" );
+
+        xResult = FreeRTOS_send( xSocket, pucTxBuffer, 300, 0 );
+        TEST_ASSERT_LESS_THAN_INT32_MESSAGE( 0, xResult, "Socket send worked with an unconnected socket" );
+
+        xResult = prvCloseHelper( xSocket, &xSocketOpen );
+        TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket close failed" );
+    }
+    else
+    {
+        TEST_FAIL_MESSAGE( "Sending on an unconnected TCP socket triggered an assert " );
+    }
+
+    /* Report Test Results. */
+    tcptestPRINTF( ( "%s passed\r\n", __FUNCTION__ ) );
+}
+
+TEST( Full_TCP, TCP_Socket_Send_InvalidParams )
+{
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    prvSend_Invalid();
+}
+
+/*-------------------------------------------------------------------*/
+
+static void prvRecv_Invalid( void )
+{
+    BaseType_t xResult;
+
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    /* Attempt to establish the requested connection. */
+    xResult = prvConnectHelperWithRetry( &xSocket, xReceiveTimeOut, xSendTimeOut, &xSocketOpen );
+    TEST_ASSERT_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Failed to connect" );
+
+    /* Receive with NULL buffer should fail in FREERTOS_ZERO_COPY mode. */
+    xResult = FreeRTOS_recv( xSocket, NULL, 100, FREERTOS_ZERO_COPY );
+    TEST_ASSERT_LESS_THAN_INT32_MESSAGE( 0, xResult, "Socket receive with NULL receive buffer should have triggered error" );
+
+    /* Receive on invalid socket should fail. */
+    xResult = FreeRTOS_recv( FREERTOS_INVALID_SOCKET, pcRxBuffer, tcptestBUFFER_SIZE, 0 );
+    TEST_ASSERT_LESS_THAN_INT32_MESSAGE( 0, xResult, "Socket receive with invalid socket should have triggered error" );
+
+    /* Cleanup. */
+    xResult = prvCloseHelper( xSocket, &xSocketOpen );
+    TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to close" );
+}
+
+TEST( Full_TCP, TCP_Socket_Recv_Invalid )
+{
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    prvRecv_Invalid();
+}
+
+/*-------------------------------------------------------------------*/
+
+/** @brief This test will create a task the will send data to an echo server.
+ * The data coming back will be received in that task.
+ * The size of receiving buffer, the priority, the size of data send,
+ * will keep changing to cover a maximum cases.
+ */
+static void prvSOCKETS_Threadsafe_SameSocketDifferentTasks( void )
+{
+    BaseType_t xTotalReceived, xReturned = 0;
+    size_t xRecvLoop, xRecvLen;
+    tcptestEchoTestModes_t xMode;
+    BaseType_t xResult;
+    volatile char * pcReceivedString;
+    volatile BaseType_t xReceivedStringAllocated = pdFALSE;
+    volatile BaseType_t xSocketPassingQueueAllocated = pdFALSE;
+    volatile BaseType_t xSyncEventGroupAllocated = pdFALSE;
+    volatile TaskHandle_t xCreatedTask;
+
+    if( TEST_PROTECT() )
+    {
+        pcReceivedString = pvPortMalloc( ipconfigTCP_MSS * sizeof( char ) );
+        configASSERT( pcReceivedString != NULL );
+        xReceivedStringAllocated = pdTRUE;
+
+        /* Create the queue used to pass the socket to use from the Tx task to the
+         * Rx task. */
+        xSocketPassingQueue = xQueueCreate( 1, sizeof( Socket_t ) );
+        configASSERT( xSocketPassingQueue );
+        xSocketPassingQueueAllocated = pdTRUE;
+
+        /* Create the event group used by the Tx and Rx tasks to synchronize prior
+         * to commencing a cycle using a new socket. */
+        xSyncEventGroup = xEventGroupCreate();
+        configASSERT( xSyncEventGroup );
+        xSyncEventGroupAllocated = pdTRUE;
+
+        /* Create the task that sends to an echo server, but lets a different task
+         * receive the reply on the same socket. */
+        xResult = xTaskCreate( prvEchoClientTxTask,              /* The function that implements the task. */
+                               "EchoMultiTx",                    /* Just a text name for the task to aid debugging. */
+                               tcptestTCP_ECHO_TASKS_STACK_SIZE, /* The stack size is defined in aws_demo_config.h. */
+                               NULL,                             /* The task parameter, not used in this case. */
+                               tcptestTCP_ECHO_TASKS_PRIORITY,   /* The priority assigned to the task is defined in aws_demo_config.h. */
+                               ( TaskHandle_t * ) &xCreatedTask );
+        TEST_ASSERT_EQUAL_MESSAGE( pdPASS, xResult, "Task creation failed" );
+
+        for( xRecvLoop = 0; xRecvLoop < tcptestMAX_LOOPS_ECHO_TEST; xRecvLoop++ )
+        {
+            /* Attempt to establish the requested connection. */
+            xResult = prvConnectHelperWithRetry( &xSocket, xEchoTestRxTxTimeOut, xEchoTestRxTxTimeOut, &xSocketOpen );
+            TEST_ASSERT_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Failed to connect" );
+
+            /* Wait to receive the socket that will be used from the Tx task. */
+            if( xEventGroupSync( xSyncEventGroup,                             /* The event group used for the rendezvous. */
+                                 tcptestRX_TASK_BIT,                          /* The bit representing the Tx task reaching the rendezvous. */
+                                 ( tcptestTX_TASK_BIT | tcptestRX_TASK_BIT ), /* Also wait for the Rx task. */
+                                 tcptestECHO_TEST_SYNC_TIMEOUT_TICKS ) != ( tcptestTX_TASK_BIT | tcptestRX_TASK_BIT ) )
+            {
+                TEST_FAIL();
+            }
+
+            /* Nothing received yet. */
+            xTotalReceived = 0;
+
+            xMode = ( tcptestEchoTestModes_t ) ( xRecvLoop % tcptestMAX_ECHO_TEST_MODES ); /* % should be optimized to simple masking since only 4 modes are present.*/
+                                                                                           /* Using % to avoid bug in case a new state is unknowingly added. */
+
+            xRecvLen = ipconfigTCP_MSS;
+            vTaskPrioritySet( NULL, tcptestECHO_TEST_HIGH_PRIORITY );
+
+            /* Set low priority if requested . */
+            if( ( xMode == LARGE_BUFFER_LOW_PRIORITY ) || ( xMode == SMALL_BUFFER_LOW_PRIORITY ) )
+            {
+                vTaskPrioritySet( NULL, tcptestECHO_TEST_LOW_PRIORITY );
+            }
+
+            if( ( xMode == SMALL_BUFFER_HIGH_PRIORITY ) || ( xMode == SMALL_BUFFER_LOW_PRIORITY ) )
+            {
+                xRecvLen = 1;
+            }
+
+            while( xTotalReceived < tcptestTWICE_MAX_FRAME_SIZE )
+            {
+                xReturned = FreeRTOS_recv( ( Socket_t ) xSocket, ( char * ) pcReceivedString, xRecvLen, 0 );
+
+                TEST_ASSERT_NOT_EQUAL_MESSAGE( 0, xReturned, "Timeout occurred" );
+                TEST_ASSERT_GREATER_THAN_MESSAGE( 0, xReturned, "Error occurred receiving large message" );
+
+                /* Data was received. */
+                TEST_ASSERT_EQUAL_MEMORY( &cTransmittedString[ xTotalReceived ], pcReceivedString, xReturned );
+
+                xTotalReceived += xReturned;
+            }
+
+            /* Rendezvous with the Tx task ready to start a new cycle with a
+             * different socket. */
+            if( xEventGroupSync( xSyncEventGroup,                             /* The event group used for the rendezvous. */
+                                 tcptestRX_TASK_BIT,                          /* The bit representing the Rx task reaching the rendezvous. */
+                                 ( tcptestTX_TASK_BIT | tcptestRX_TASK_BIT ), /* Also wait for the Tx task. */
+                                 tcptestECHO_TEST_SYNC_TIMEOUT_TICKS ) != ( tcptestTX_TASK_BIT | tcptestRX_TASK_BIT ) )
+            {
+                TEST_FAIL();
+            }
+
+            xResult = prvShutdownHelper( xSocket );
+            TEST_ASSERT_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to shutdown" );
+
+            xResult = prvCloseHelper( xSocket, &xSocketOpen );
+            TEST_ASSERT_GREATER_OR_EQUAL_INT32_MESSAGE( pdFREERTOS_ERRNO_NONE, xResult, "Socket failed to close" );
+        }
+    }
+
+    /* Free all dynamic memory. */
+    if( xReceivedStringAllocated == pdTRUE )
+    {
+        vPortFree( ( char * ) pcReceivedString );
+    }
+
+    if( xSocketPassingQueueAllocated == pdTRUE )
+    {
+        vQueueDelete( xSocketPassingQueue );
+    }
+
+    if( xSyncEventGroupAllocated == pdTRUE )
+    {
+        vEventGroupDelete( xSyncEventGroup );
+    }
+
+    vTaskDelete( xCreatedTask );
+
+    /* Set priority back. */
+    vTaskPrioritySet( NULL, tskIDLE_PRIORITY );
+}
+
+TEST( Full_TCP, TCP_Threadsafe_SameSocketDifferentTasks )
+{
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    prvSOCKETS_Threadsafe_SameSocketDifferentTasks();
+}
+
+/*-----------------------------------------------------------*/
+
+static void prvEchoClientTxTask( void * pvParameters )
+{
+    BaseType_t xReturned = 0;
+    BaseType_t xTransmitted;
+    BaseType_t xStatus;
+    size_t xLenToSend, xSendLoop;
+    size_t xMaxBufferSize;
+    tcptestEchoTestModes_t xMode;
+
+
+    /* Avoid warning about unused parameter. */
+    ( void ) pvParameters;
+
+    /* Offset by one so of sending and receiving task are not always the same. Sometimes both low/high or opposite. */
+
+    /*  Recv task                   Sending task
+     *  LARGE_BUFFER_HIGH_PRIORITY  SMALL_BUFFER_HIGH_PRIORITY
+     *  SMALL_BUFFER_HIGH_PRIORITY  LARGE_BUFFER_LOW_PRIORITY
+     *  LARGE_BUFFER_LOW_PRIORITY   SMALL_BUFFER_LOW_PRIORITY
+     *  SMALL_BUFFER_LOW_PRIORITY   LARGE_BUFFER_HIGH_PRIORITY
+     */
+    for( xSendLoop = 1; xSendLoop < tcptestMAX_LOOPS_ECHO_TEST + 1; xSendLoop++ )
+    {
+        xMode = ( tcptestEchoTestModes_t ) ( xSendLoop % tcptestMAX_ECHO_TEST_MODES ); /* % should be optimized to simple masking since only 4 modes are present.*/
+                                                                                       /* Using % to avoid bug in case a new state is unknowingly added. */
+
+        vTaskPrioritySet( NULL, tcptestECHO_TEST_HIGH_PRIORITY );
+        xMaxBufferSize = tcptestTWICE_MAX_FRAME_SIZE;
+
+        /* Set low priority if requested . */
+        if( ( xMode == LARGE_BUFFER_LOW_PRIORITY ) || ( xMode == SMALL_BUFFER_LOW_PRIORITY ) )
+        {
+            vTaskPrioritySet( NULL, tcptestECHO_TEST_LOW_PRIORITY );
+        }
+
+        /* Set buffer size to 1 if requested. */
+        if( ( xMode == SMALL_BUFFER_HIGH_PRIORITY ) || ( xMode == SMALL_BUFFER_LOW_PRIORITY ) )
+        {
+            xMaxBufferSize = 1;
+        }
+
+        /* Wait for the Rx task to create and connect the socket. */
+        if( xEventGroupSync( xSyncEventGroup,                             /* The event group used for the rendezvous. */
+                             tcptestTX_TASK_BIT,                          /* The bit representing the Tx task reaching the rendezvous. */
+                             ( tcptestTX_TASK_BIT | tcptestRX_TASK_BIT ), /* Also wait for the Rx task. */
+                             tcptestECHO_TEST_SYNC_TIMEOUT_TICKS ) != ( tcptestTX_TASK_BIT | tcptestRX_TASK_BIT ) )
+        {
+            break;
+        }
+
+        xTransmitted = 0;
+        xStatus = pdTRUE;
+
+        /* Keep sending until the entire buffer has been sent. */
+        while( xTransmitted < tcptestTWICE_MAX_FRAME_SIZE )
+        {
+            /* How many bytes are left to send?  Attempt to send them
+             * all at once (so the length is potentially greater than the
+             * MSS). */
+            xLenToSend = tcptestTWICE_MAX_FRAME_SIZE - xTransmitted;
+
+            /* Every loop switch the size of the packet from maximum to smallest. */
+            if( xLenToSend > xMaxBufferSize )
+            {
+                xLenToSend = xMaxBufferSize;
+            }
+
+            xReturned = FreeRTOS_send( xSocket,                                            /* The socket being sent to. */
+                                      ( void * ) &( cTransmittedString[ xTransmitted ] ), /* The data being sent. */
+                                      xLenToSend,                                         /* The length of the data being sent. */
+                                      0 );                                                /* ulFlags. */
+
+            if( xReturned >= 0 )
+            {
+                /* Data was sent successfully. */
+                xTransmitted += xReturned;
+            }
+            else
+            {
+                xStatus = pdFAIL;
+                break;
+            }
+        }
+
+        /* Wait for the Rx task to recognize the socket is closing and stop
+         * using it. */
+
+        if( xEventGroupSync( xSyncEventGroup,                             /* The event group used for the rendezvous. */
+                             tcptestTX_TASK_BIT,                          /* The bit representing the Tx task reaching the rendezvous. */
+                             ( tcptestTX_TASK_BIT | tcptestRX_TASK_BIT ), /* Also wait for the Rx task. */
+                             tcptestECHO_TEST_SYNC_TIMEOUT_TICKS ) != ( tcptestTX_TASK_BIT | tcptestRX_TASK_BIT ) )
+        {
+            xStatus = pdFAIL;
+        }
+
+        if( xStatus == pdFAIL )
+        {
+            break;
+        }
+    }
+
+    vTaskSuspend( NULL ); /* Delete this task. */
+}
+
+/*-----------------------------------------------------------*/
+
+
+/** @brief This test will create x tasks that will send and receive to an
+ * echo server on different socket at the same time.
+ */
+void prvStartTCPEchoClientTasks_DifferentSockets( void )
+{
+    uint16_t usIndex;
+    tcptestEchoClientsTaskParams_t xTcptestEchoClientsTaskParams[ tcptestNUM_ECHO_CLIENTS ];
+    uint32_t ulEventMask;
+    volatile BaseType_t xSyncEventGroupAllocated = pdFALSE;
+    BaseType_t xResult;
+
+    if( TEST_PROTECT() )
+    {
+        /* Create the event group used by the Tx and Rx tasks to synchronize prior
+         * to commencing a cycle using a new socket. */
+        xSyncEventGroup = xEventGroupCreate();
+        configASSERT( xSyncEventGroup );
+        xSyncEventGroupAllocated = pdTRUE;
+
+        /* Create the echo client tasks. */
+        for( usIndex = 0; usIndex < tcptestNUM_ECHO_CLIENTS; usIndex++ )
+        {
+            xTcptestEchoClientsTaskParams[ usIndex ].usTaskTag = usIndex;            
+            xTcptestEchoClientsTaskParams[ usIndex ].xResult = FREERTOS_SOCKET_ERROR;
+
+            xResult = xTaskCreate( prvThreadSafeDifferentSocketsDifferentTasks,                 /* The function that implements the task. */
+                                   "ClientTask",                                                /* Just a text name for the task to aid debugging. */
+                                   tcptestTCP_ECHO_TASKS_STACK_SIZE,                            /* The stack size is defined in FreeRTOSIPConfig.h. */
+                                   &( xTcptestEchoClientsTaskParams[ usIndex ] ),               /* The task parameter, not used in this case. */
+                                   tcptestTCP_ECHO_TASKS_PRIORITY,                              /* The priority assigned to the task is defined in FreeRTOSConfig.h. */
+                                   &( xTcptestEchoClientsTaskParams[ usIndex ].xTaskHandle ) ); /* The task handle is not used. */
+            TEST_ASSERT_EQUAL_MESSAGE( pdPASS, xResult, "Task creation failed" );
+        }
+
+        ulEventMask = xEventGroupSync( xSyncEventGroup, /* The event group used for the rendezvous. */
+                                       0,
+                                       tcptestECHO_CLIENT_EVENT_MASK,
+                                       tcptestECHO_TEST_SYNC_TIMEOUT_TICKS );
+
+        /* For each task not completed, delete the task.  */
+        for( usIndex = 0; usIndex < tcptestNUM_ECHO_CLIENTS; usIndex++ )
+        {
+            if( ( ulEventMask & ( 1 << usIndex ) ) == 0 )
+            {
+                vTaskDelete( xTcptestEchoClientsTaskParams[ usIndex ].xTaskHandle );
+            }
+        }
+
+        for( usIndex = 0; usIndex < tcptestNUM_ECHO_CLIENTS; usIndex++ )
+        {
+            TEST_ASSERT_EQUAL_MESSAGE( pdFREERTOS_ERRNO_NONE,
+                                       xTcptestEchoClientsTaskParams[ usIndex ].xResult,
+                                       "Check iot_secure_sockets.h for error code" );
+        }
+    }
+
+    if( xSyncEventGroupAllocated == pdTRUE )
+    {
+        vEventGroupDelete( xSyncEventGroup );
+    }
+}
+
+
+TEST( Full_TCP, TCP_Threadsafe_DifferentSocketsDifferentTasks )
+{
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    prvStartTCPEchoClientTasks_DifferentSockets();
+}
+
+/*-----------------------------------------------------------*/
+
+static void prvThreadSafeDifferentSocketsDifferentTasks( void * pvParameters )
+{
+    Socket_t xTaskSocket = FREERTOS_INVALID_SOCKET;
+    int32_t lLoopCount = 0UL;
+    BaseType_t xReceivedBytes, xReturned;
+    BaseType_t xTransmitted;
+    char * pcReceivedString;
+    BaseType_t xResult = FREERTOS_SOCKET_ERROR;
+    BaseType_t xReceivedStringAllocated = pdFALSE;
+    BaseType_t xSocketOpenLocal = pdFALSE;
+    tcptestEchoClientsTaskParams_t * pxTcptestEchoClientsTaskParams;
+
+    pxTcptestEchoClientsTaskParams = ( ( tcptestEchoClientsTaskParams_t * ) pvParameters );
+
+    pcReceivedString = pvPortMalloc( ipconfigTCP_MSS * sizeof( char ) );
+
+    if( pcReceivedString != NULL )
+    {
+        xReceivedStringAllocated = pdTRUE;
+    }
+    else
+    {
+        xResult = FREERTOS_SOCKET_ERROR;
+        tcptestFAILUREPRINTF( ( "%s: Task %d failed to alloc memory \r\n",
+                                __FUNCTION__,
+                                ( int ) pxTcptestEchoClientsTaskParams->usTaskTag ) );
+    }
+
+    if( pcReceivedString != NULL )
+    {
+        /* Send a number of echo requests. */
+        for( lLoopCount = 0; lLoopCount < tcptestMAX_LOOPS_ECHO_CLIENTS_LOOP; lLoopCount++ )
+        {
+            /* Attempt to establish the requested connection. */
+            xResult = prvConnectHelperWithRetry( &xTaskSocket,
+                                                 xEchoTestRxTxTimeOut,
+                                                 xEchoTestRxTxTimeOut,
+                                                 &xSocketOpenLocal);
+
+            if( xResult != pdFREERTOS_ERRNO_NONE )
+            {
+                tcptestFAILUREPRINTF( ( "%s: Task %d failed to connect with error code %d on loop %d \r\n",
+                                        __FUNCTION__,
+                                        xResult,
+                                        lLoopCount,
+                                        ( int ) pxTcptestEchoClientsTaskParams->usTaskTag ) );
+                break;
+            }
+
+            /* Send the string to the socket. */
+            xTransmitted = FreeRTOS_send( xTaskSocket,                   /* The socket being sent to. */
+                                         ( void * ) cTransmittedString, /* The data being sent. */
+                                         ipconfigTCP_MSS,               /* The length of the data being sent. */
+                                         0 );                           /* No flags. */
+
+            if( xTransmitted < ipconfigTCP_MSS )
+            {
+                tcptestFAILUREPRINTF( ( "%s: Task %d error  %ld while transmitting data\r\n",
+                                        __FUNCTION__,
+                                        ( int ) pxTcptestEchoClientsTaskParams->usTaskTag,
+                                        xTransmitted ) );
+                xResult = FREERTOS_SOCKET_ERROR;
+                break;
+            }
+
+            /* Clear the buffer into which the echoed string will be
+             * placed. */
+            xReceivedBytes = 0;
+
+            /* Receive data echoed back to the socket. */
+            while( xReceivedBytes < xTransmitted )
+            {
+                xReturned = FreeRTOS_recv( xTaskSocket,                             /* The socket being received from. */
+                                          &( pcReceivedString[ xReceivedBytes ] ), /* The buffer into which the received data will be written. */
+                                          ipconfigTCP_MSS - xReceivedBytes,        /* The size of the buffer provided to receive the data. */
+                                          0 );                                     /* No flags. */
+
+                if( xReturned <= 0 )
+                {
+                    break;
+                }
+
+                xReceivedBytes += xReturned;
+            }
+
+            /* If an error occurred it will be latched in xReceivedBytes,
+             * otherwise xReceived bytes will be just that - the number of
+             * bytes received from the echo server. */
+            if( xReceivedBytes == ipconfigTCP_MSS )
+            {
+                /* Compare the transmitted string to the received string. */
+                if( strncmp( pcReceivedString, cTransmittedString, xTransmitted ) != 0 )
+                {
+                    tcptestFAILUREPRINTF( ( "%s: Task %d error while receiving data \r\n",
+                                            __FUNCTION__,
+                                            ( int ) pxTcptestEchoClientsTaskParams->usTaskTag ) );
+                    xResult = FREERTOS_SOCKET_ERROR;
+                    break;
+                }
+            }
+            else
+            {
+                tcptestFAILUREPRINTF( ( "%s: Task %d error not enough bytes received \r\n",
+                                        __FUNCTION__,
+                                        ( int ) pxTcptestEchoClientsTaskParams->usTaskTag ) );
+                xResult = FREERTOS_SOCKET_ERROR;
+                break;
+            }
+
+            /* Close this socket before looping back to create another. */
+            ( void ) prvShutdownHelper( xTaskSocket );
+            ( void ) prvCloseHelper( xTaskSocket, &xSocketOpenLocal);
+        }
+    }
+
+    /* Free all dynamic memory. */
+    if( xReceivedStringAllocated == pdTRUE )
+    {
+        vPortFree( pcReceivedString );
+    }
+
+    if( xSocketOpenLocal == pdTRUE )
+    {
+        ( void ) prvCloseHelper( xTaskSocket, &xSocketOpenLocal );
+    }
+
+    pxTcptestEchoClientsTaskParams->xResult = xResult;
+
+    /* Don't wait, just flag it reached that point. */
+    xEventGroupSync( xSyncEventGroup, /* The event group used for the rendezvous. */
+                     ( 1 << pxTcptestEchoClientsTaskParams->usTaskTag ),
+                     tcptestECHO_CLIENT_EVENT_MASK,
+                     tcptestECHO_TEST_SYNC_TIMEOUT_TICKS );
+
+
+    vTaskDelete( NULL ); /* Delete this task. */
+}
+
+/*-----------------------------------------------------------*/
+
+TEST( Full_TCP, TCP_htons_HappyCase )
+{
+    uint16_t usNetworkOrderValue;
+
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    /* Convert the host order value to network order
+     * value. */
+    usNetworkOrderValue = FreeRTOS_htons( 0x1234 );
+
+    #if defined(ipconfigBYTE_ORDER) && ( ipconfigBYTE_ORDER == pdFREERTOS_LITTLE_ENDIAN )
+
+        /* If the platform we are running on, is little
+         * endian, bytes must have been swapped. */
+        TEST_ASSERT_EQUAL_INT16_MESSAGE( 0x3412, usNetworkOrderValue, "FreeRTOS_htons returned incorrect value." );
+    #else
+
+        /* If the platform we are running on, is big
+         * endian, the output value must be same as
+         * the input value. */
+        TEST_ASSERT_EQUAL_INT16_MESSAGE( 0x1234, usNetworkOrderValue, "FreeRTOS_htons returned incorrect value." );
+    #endif
+
+    tcptestPRINTF( ( "%s complete.\r\n", __FUNCTION__ ) );
+}
+/*-----------------------------------------------------------*/
+
+TEST( Full_TCP, TCP_test_dns_multiple_addresses )
+{
+    BaseType_t xResult = pdFAIL;
+    uint32_t i;
+    uint32_t j;
+    uint32_t ulIPAddress;
+    uint32_t ulUnique;
+    uint32_t ulNumUniqueIPAddresses = 0;
+
+    /* Resolve "freertos.org", which will have multiple IP addresses */
+
+    uint32_t ulIPAddresses[ dnstestNUM_UNIQUE_IP_ADDRESSES ] = { 0UL };
+
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    /*
+     * Resolve the endpoint to an array of IP addresses. Each subsequent
+     * call will return one of the addresses which the name resolves to.
+     *
+     * NOTE: Resolving addresses can take some time, so allow up to
+     *   60 seconds to collect all of them.
+     */
+    for( i = 0; ( i < 60 ) && ( ulNumUniqueIPAddresses < dnstestNUM_UNIQUE_IP_ADDRESSES ); i++ )
+    {
+        ulIPAddress = FreeRTOS_gethostbyname( HostNameUNIQUE_ADDRESSES_TEST );
+
+        for( j = 0, ulUnique = 1; j < ulNumUniqueIPAddresses; j++ )
+        {
+            if( ulIPAddresses[ j ] == ulIPAddress )
+            {
+                ulUnique = 0;
+            }
+        }
+
+        if( ( ulUnique == 1 ) && ( ulNumUniqueIPAddresses < dnstestNUM_UNIQUE_IP_ADDRESSES ) )
+        {
+            ulIPAddresses[ ulNumUniqueIPAddresses++ ] = ulIPAddress;
+        }
+
+        vTaskDelay( 1000 / portTICK_PERIOD_MS );
+    }
+
+    tcptestPRINTF( ( "%s: identified %d different IP addresses for %s.\r\n",
+                    __FUNCTION__,
+                    ulNumUniqueIPAddresses,
+                    HostNameUNIQUE_ADDRESSES_TEST ) );
+
+    /* Require a minimum number of IP addresses for AWS IoT Core endpoints */
+    if( ulNumUniqueIPAddresses >= dnstestNUM_UNIQUE_IP_ADDRESSES )
+    {
+        xResult = pdPASS;
+    }
+    TEST_ASSERT_EQUAL_UINT32_MESSAGE( pdPASS, xResult, "Less number of IP addresses per entry than expected\n" );
+
+    tcptestPRINTF( ( "%s complete.\r\n", __FUNCTION__ ) );
+}
+
+/*-----------------------------------------------------------*/
+
+TEST( Full_TCP, TCP_inet_addr_quick_HappyCase )
+{
+    uint32_t ulPackedIpAddress;
+
+    tcptestPRINTF( ( "Starting %s.\r\n", __FUNCTION__ ) );
+
+    ulPackedIpAddress = FreeRTOS_inet_addr_quick( 192, 168, 2, 6 );
+
+    #if defined(ipconfigBYTE_ORDER) && ( ipconfigBYTE_ORDER == pdFREERTOS_LITTLE_ENDIAN )
+
+        /* The expected return value of FreeRTOS_inet_addr_quick
+         * on a little endian platform must be same as the correct
+         * hand calculated value. */
+        TEST_ASSERT_EQUAL_INT32_MESSAGE( 0x0602A8C0, ulPackedIpAddress, "FreeRTOS_inet_addr_quick returned incorrect value." );
+    #else
+
+        /* The expected return value of FreeRTOS_inet_addr_quick
+         * on a big endian platform must be same as the correct
+         * hand calculated value. */
+        TEST_ASSERT_EQUAL_INT32_MESSAGE( 0xC0A80206, ulPackedIpAddress, "FreeRTOS_inet_addr_quick returned incorrect value." );
+    #endif
+
+    tcptestPRINTF( ( "%s complete.\r\n", __FUNCTION__ ) );
+}
+
+/* TODO: Investigate tests for loopback, other reserved IP addresses */
+/* TODO: Implement tests with a bad TCP connection (dropped packets, repeated packets, connection refused etc */
+/* TODO: Implement tests that have memory allocation errors (freertos heap is full) */
+/*-------------------------------------------------------------------*/
+/*-----------------------End Tests-----------------------------------*/
+/*-------------------------------------------------------------------*/
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Runner/test_runner.c b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Runner/test_runner.c
new file mode 100644
index 000000000..926e9b0b2
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Runner/test_runner.c
@@ -0,0 +1,108 @@
+/*
+ * FreeRTOS V202002.00
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+/**
+ * @file aws_test_runner.c
+ * @brief The function to be called to run all the tests.
+ */
+
+/* Test runner interface includes. */
+#include "test_runner.h"
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+
+/* Unity framework includes. */
+#include "unity_fixture.h"
+#include "unity_internals.h"
+
+char cBuffer[ testrunnerBUFFER_SIZE ];
+
+/* Heap leak variables. */
+unsigned int xHeapBefore;
+unsigned int xHeapAfter;
+/*-----------------------------------------------------------*/
+
+/* This function will be generated by the test automation framework,
+ * do not change the signature of it. You could, however, add or remove
+ * RUN_TEST_GROUP statements.
+ */
+static void RunTests( void )
+{    
+    RUN_TEST_GROUP( Full_TCP ); 
+}
+/*-----------------------------------------------------------*/
+
+void TEST_RUNNER_RunTests_task( void * pvParameters )
+{
+    /* Disable unused parameter warning. */
+    ( void ) pvParameters;
+
+    /* Initialize unity. */
+    UnityFixture.Verbose = 1;
+    UnityFixture.GroupFilter = 0;
+    UnityFixture.NameFilter = testrunnerTEST_FILTER;
+    UnityFixture.RepeatCount = 1;
+
+    UNITY_BEGIN();
+
+    /* Give the print buffer time to empty */
+    vTaskDelay( pdMS_TO_TICKS( 500 ) );
+    /* Measure the heap size before any tests are run. */
+    #if ( testrunnerFULL_MEMORYLEAK_ENABLED == 1 )
+        xHeapBefore = xPortGetFreeHeapSize();
+    #endif
+
+    RunTests();
+
+    #if ( testrunnerFULL_MEMORYLEAK_ENABLED == 1 )
+
+        /* Measure the heap size after tests are done running.
+         * This test must run last. */
+
+        /* Perform any global resource cleanup necessary to avoid memory leaks. */
+        #ifdef testrunnerMEMORYLEAK_CLEANUP
+            testrunnerMEMORYLEAK_CLEANUP();
+        #endif
+
+        /* Give the print buffer time to empty */
+        vTaskDelay( pdMS_TO_TICKS( 500 ) );
+        xHeapAfter = xPortGetFreeHeapSize();
+        RUN_TEST_GROUP( Full_MemoryLeak );
+    #endif /* if ( testrunnerFULL_MEMORYLEAK_ENABLED == 1 ) */
+
+    /* Currently disabled. Will be enabled after cleanup. */
+    UNITY_END();
+
+    #ifdef CODE_COVERAGE
+        exit( 0 );
+    #endif
+
+    /* This task has finished.  FreeRTOS does not allow a task to run off the
+     * end of its implementing function, so the task must be deleted. */
+    vTaskDelete( NULL );
+}
+/*-----------------------------------------------------------*/
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Runner/test_runner_config.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Runner/test_runner_config.h
new file mode 100644
index 000000000..fc43a0fc6
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/Test_Code/Test_Runner/test_runner_config.h
@@ -0,0 +1,74 @@
+/*
+ * FreeRTOS V1.1.4
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+#ifndef AWS_TEST_RUNNER_CONFIG_H
+#define AWS_TEST_RUNNER_CONFIG_H
+
+ /* Uncomment this line if you want to run DQP_FR tests only. */
+ /* #define testrunnerAFQP_ENABLED */
+
+#define testrunnerUNSUPPORTED                         0
+
+/* Unsupported tests. */
+#define testrunnerFULL_WIFI_ENABLED                   testrunnerUNSUPPORTED
+#define testrunnerFULL_BLE_ENABLED                    testrunnerUNSUPPORTED
+#define testrunnerFULL_BLE_END_TO_END_TEST_ENABLED    testrunnerUNSUPPORTED
+
+/* Supported tests. 0 = Disabled, 1 = Enabled */
+#define testrunnerFULL_TASKPOOL_ENABLED               0
+#define testrunnerFULL_CRYPTO_ENABLED                 0
+#define testrunnerFULL_FREERTOS_TCP_ENABLED           0
+#define testrunnerFULL_DEFENDER_ENABLED               0
+#define testrunnerFULL_GGD_ENABLED                    0
+#define testrunnerFULL_GGD_HELPER_ENABLED             0
+#define testrunnerFULL_MQTT_AGENT_ENABLED             0
+#define testrunnerFULL_MQTT_ALPN_ENABLED              0
+#define testrunnerFULL_MQTT_STRESS_TEST_ENABLED       0
+#define testrunnerFULL_MQTTv4_ENABLED                 0
+#define testrunnerFULL_PKCS11_ENABLED                 0
+#define testrunnerFULL_PKCS11_MODEL_ENABLED           0
+#define testrunnerFULL_POSIX_ENABLED                  0
+#define testrunnerFULL_SHADOW_ENABLED                 0
+#define testrunnerFULL_SHADOWv4_ENABLED               0
+#define testrunnerFULL_TCP_ENABLED                    1
+#define testrunnerFULL_TLS_ENABLED                    0
+#define testrunnerFULL_MEMORYLEAK_ENABLED             0
+#define testrunnerFULL_OTA_CBOR_ENABLED               0
+#define testrunnerFULL_OTA_AGENT_ENABLED              0
+#define testrunnerFULL_OTA_PAL_ENABLED                0
+#define testrunnerFULL_SERIALIZER_ENABLED             0
+#define testrunnerUTIL_PLATFORM_CLOCK_ENABLED         0
+#define testrunnerUTIL_PLATFORM_THREADS_ENABLED       0
+#define testrunnerFULL_HTTPS_CLIENT_ENABLED           0
+
+/* On systems using FreeRTOS+TCP (such as this one) the TCP segments must be
+ * cleaned up before running the memory leak check. */
+#if ( testrunnerFULL_MEMORYLEAK_ENABLED == 1 )
+extern void vTCPSegmentCleanup();
+#define testrunnerMEMORYLEAK_CLEANUP()    vTCPSegmentCleanup()
+#endif
+
+#endif /* AWS_TEST_RUNNER_CONFIG_H */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WIN32.vcxproj b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WIN32.vcxproj
new file mode 100644
index 000000000..26fbc8339
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WIN32.vcxproj
@@ -0,0 +1,227 @@
+<?xml version="1.0" encoding="utf-8"?>
+<Project DefaultTargets="Build" ToolsVersion="15.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
+  <ItemGroup Label="ProjectConfigurations">
+    <ProjectConfiguration Include="Debug|Win32">
+      <Configuration>Debug</Configuration>
+      <Platform>Win32</Platform>
+    </ProjectConfiguration>
+    <ProjectConfiguration Include="Release|Win32">
+      <Configuration>Release</Configuration>
+      <Platform>Win32</Platform>
+    </ProjectConfiguration>
+  </ItemGroup>
+  <PropertyGroup Label="Globals">
+    <ProjectGuid>{C686325E-3261-42F7-AEB1-DDE5280E1CEB}</ProjectGuid>
+    <ProjectName>Full-TCP</ProjectName>
+    <WindowsTargetPlatformVersion>10.0</WindowsTargetPlatformVersion>
+  </PropertyGroup>
+  <Import Project="$(VCTargetsPath)\Microsoft.Cpp.Default.props" />
+  <PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Release|Win32'" Label="Configuration">
+    <ConfigurationType>Application</ConfigurationType>
+    <UseOfMfc>false</UseOfMfc>
+    <CharacterSet>MultiByte</CharacterSet>
+    <PlatformToolset>v142</PlatformToolset>
+  </PropertyGroup>
+  <PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'" Label="Configuration">
+    <ConfigurationType>Application</ConfigurationType>
+    <UseOfMfc>false</UseOfMfc>
+    <CharacterSet>MultiByte</CharacterSet>
+    <PlatformToolset>v142</PlatformToolset>
+  </PropertyGroup>
+  <Import Project="$(VCTargetsPath)\Microsoft.Cpp.props" />
+  <ImportGroup Label="ExtensionSettings">
+  </ImportGroup>
+  <ImportGroup Condition="'$(Configuration)|$(Platform)'=='Release|Win32'" Label="PropertySheets">
+    <Import Project="$(UserRootDir)\Microsoft.Cpp.$(Platform).user.props" Condition="exists('$(UserRootDir)\Microsoft.Cpp.$(Platform).user.props')" Label="LocalAppDataPlatform" />
+    <Import Project="$(VCTargetsPath)Microsoft.CPP.UpgradeFromVC60.props" />
+  </ImportGroup>
+  <ImportGroup Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'" Label="PropertySheets">
+    <Import Project="$(UserRootDir)\Microsoft.Cpp.$(Platform).user.props" Condition="exists('$(UserRootDir)\Microsoft.Cpp.$(Platform).user.props')" Label="LocalAppDataPlatform" />
+    <Import Project="$(VCTargetsPath)Microsoft.CPP.UpgradeFromVC60.props" />
+  </ImportGroup>
+  <PropertyGroup Label="UserMacros" />
+  <PropertyGroup>
+    <_ProjectFileVersion>10.0.30319.1</_ProjectFileVersion>
+    <OutDir Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">Debug\</OutDir>
+    <IntDir Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">Debug\</IntDir>
+    <LinkIncremental Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">true</LinkIncremental>
+    <OutDir Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">.\Release\</OutDir>
+    <IntDir Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">.\Release\</IntDir>
+    <LinkIncremental Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">false</LinkIncremental>
+    <CodeAnalysisRuleSet Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">AllRules.ruleset</CodeAnalysisRuleSet>
+  </PropertyGroup>
+  <PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">
+    <IncludePath>..\..\Source\FreeRTOS-Plus-TCP\test;C:\Program Files (x86)\Windows Kits\10\Include\10.0.18362.0\um\;..\CMock\vendor\unity\extras\memory\src;..\CMock\vendor\unity\extras\fixture\src;..\CMock\vendor\unity\src;.;$(IncludePath)</IncludePath>
+    <SourcePath>..\CMock\vendor\unity\extras\memory\src;..\CMock\vendor\unity\extras\fixture\src;..\CMock\vendor\unity\src;$(SourcePath)</SourcePath>
+  </PropertyGroup>
+  <ItemDefinitionGroup Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">
+    <Midl>
+      <TypeLibraryName>.\Debug/WIN32.tlb</TypeLibraryName>
+      <HeaderFileName>
+      </HeaderFileName>
+    </Midl>
+    <ClCompile>
+      <Optimization>Disabled</Optimization>
+      <AdditionalIncludeDirectories>.\Logging;.\Config;.\Test_Code\Test_Cases\include;..\..\..\CMock\vendor\unity\extras\fixture\src;..\..\..\..\Source\FreeRTOS-Plus-FAT\include;..\..\..\..\Source\FreeRTOS-Plus-FAT\portable\common;..\..\..\..\Source\FreeRTOS-Plus-TCP\protocols\include;..\..\..\..\Source\FreeRTOS-Plus-TCP\portable\BufferManagement;..\..\..\..\Source\FreeRTOS-Plus-TCP\portable\Compiler\MSVC;..\..\..\..\Source\FreeRTOS-Plus-TCP\include;..\..\..\CMock\vendor\unity\extras\memory\src;.\DemoTasks\include;.\WinPCap;..\..\..\..\..\FreeRTOS\Source\include;..\..\..\..\..\FreeRTOS\Source\portable\MSVC-MingW;..\..\..\..\Source\FreeRTOS-Plus-CLI;..\..\..\CMock\vendor\unity\src;.\TraceMacros\Example1;.;%(AdditionalIncludeDirectories)</AdditionalIncludeDirectories>
+      <PreprocessorDefinitions>WIN32;_DEBUG;_CONSOLE;_WIN32_WINNT=0x0600;WINVER=0x400;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions)</PreprocessorDefinitions>
+      <MinimalRebuild>true</MinimalRebuild>
+      <BasicRuntimeChecks>EnableFastChecks</BasicRuntimeChecks>
+      <RuntimeLibrary>MultiThreadedDLL</RuntimeLibrary>
+      <PrecompiledHeaderOutputFile>.\Debug/WIN32.pch</PrecompiledHeaderOutputFile>
+      <AssemblerListingLocation>.\Debug/</AssemblerListingLocation>
+      <ObjectFileName>.\Debug/</ObjectFileName>
+      <ProgramDataBaseFileName>.\Debug/</ProgramDataBaseFileName>
+      <WarningLevel>Level4</WarningLevel>
+      <SuppressStartupBanner>true</SuppressStartupBanner>
+      <DisableLanguageExtensions>false</DisableLanguageExtensions>
+      <DebugInformationFormat>EditAndContinue</DebugInformationFormat>
+      <AdditionalOptions>/wd4210 /wd4127 /wd4214 /wd4201 /wd4244  /wd4310 %(AdditionalOptions)</AdditionalOptions>
+      <BrowseInformation>true</BrowseInformation>
+      <PrecompiledHeader>NotUsing</PrecompiledHeader>
+      <ExceptionHandling>false</ExceptionHandling>
+      <CompileAs>CompileAsC</CompileAs>
+    </ClCompile>
+    <ResourceCompile>
+      <PreprocessorDefinitions>_DEBUG;%(PreprocessorDefinitions)</PreprocessorDefinitions>
+      <Culture>0x0c09</Culture>
+    </ResourceCompile>
+    <Link>
+      <OutputFile>.\Debug/Full-TCP.exe</OutputFile>
+      <SuppressStartupBanner>true</SuppressStartupBanner>
+      <GenerateDebugInformation>true</GenerateDebugInformation>
+      <ProgramDatabaseFile>.\Debug/WIN32.pdb</ProgramDatabaseFile>
+      <SubSystem>Console</SubSystem>
+      <TargetMachine>MachineX86</TargetMachine>
+      <AdditionalDependencies>wpcap.lib;%(AdditionalDependencies)</AdditionalDependencies>
+      <AdditionalLibraryDirectories>.\WinPCap</AdditionalLibraryDirectories>
+      <Profile>false</Profile>
+    </Link>
+    <Bscmake>
+      <SuppressStartupBanner>true</SuppressStartupBanner>
+      <OutputFile>.\Debug/WIN32.bsc</OutputFile>
+    </Bscmake>
+  </ItemDefinitionGroup>
+  <ItemDefinitionGroup Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">
+    <Midl>
+      <TypeLibraryName>.\Release/WIN32.tlb</TypeLibraryName>
+      <HeaderFileName>
+      </HeaderFileName>
+    </Midl>
+    <ClCompile>
+      <Optimization>MaxSpeed</Optimization>
+      <InlineFunctionExpansion>OnlyExplicitInline</InlineFunctionExpansion>
+      <PreprocessorDefinitions>_WINSOCKAPI_;WIN32;NDEBUG;_CONSOLE;_CRT_SECURE_NO_WARNINGS;%(PreprocessorDefinitions)</PreprocessorDefinitions>
+      <StringPooling>true</StringPooling>
+      <RuntimeLibrary>MultiThreaded</RuntimeLibrary>
+      <FunctionLevelLinking>true</FunctionLevelLinking>
+      <PrecompiledHeaderOutputFile>.\Release/WIN32.pch</PrecompiledHeaderOutputFile>
+      <AssemblerListingLocation>.\Release/</AssemblerListingLocation>
+      <ObjectFileName>.\Release/</ObjectFileName>
+      <ProgramDataBaseFileName>.\Release/</ProgramDataBaseFileName>
+      <WarningLevel>Level3</WarningLevel>
+      <SuppressStartupBanner>true</SuppressStartupBanner>
+      <AdditionalIncludeDirectories>..\Common\Utils;..\Common\ethernet\lwip-1.4.0\ports\win32\WinPCap;..\Common\ethernet\lwip-1.4.0\src\include\ipv4;..\Common\ethernet\lwip-1.4.0\src\include;..\..\Source\include;..\..\Source\portable\MSVC-MingW;..\Common\ethernet\lwip-1.4.0\ports\win32\include;..\Common\Include;.\lwIP_Apps;.;%(AdditionalIncludeDirectories)</AdditionalIncludeDirectories>
+    </ClCompile>
+    <ResourceCompile>
+      <PreprocessorDefinitions>NDEBUG;%(PreprocessorDefinitions)</PreprocessorDefinitions>
+      <Culture>0x0c09</Culture>
+    </ResourceCompile>
+    <Link>
+      <OutputFile>.\Release/RTOSDemo.exe</OutputFile>
+      <SuppressStartupBanner>true</SuppressStartupBanner>
+      <ProgramDatabaseFile>.\Release/WIN32.pdb</ProgramDatabaseFile>
+      <SubSystem>Console</SubSystem>
+      <TargetMachine>MachineX86</TargetMachine>
+      <AdditionalLibraryDirectories>..\Common\ethernet\lwip-1.4.0\ports\win32\WinPCap</AdditionalLibraryDirectories>
+      <AdditionalDependencies>wpcap.lib;%(AdditionalDependencies)</AdditionalDependencies>
+    </Link>
+    <Bscmake>
+      <SuppressStartupBanner>true</SuppressStartupBanner>
+      <OutputFile>.\Release/WIN32.bsc</OutputFile>
+    </Bscmake>
+  </ItemDefinitionGroup>
+  <ItemGroup>
+    <ClCompile Include="..\..\..\..\..\FreeRTOS\Source\event_groups.c" />
+    <ClCompile Include="..\..\..\..\..\FreeRTOS\Source\list.c" />
+    <ClCompile Include="..\..\..\..\..\FreeRTOS\Source\portable\MemMang\heap_4.c" />
+    <ClCompile Include="..\..\..\..\..\FreeRTOS\Source\portable\MSVC-MingW\port.c" />
+    <ClCompile Include="..\..\..\..\..\FreeRTOS\Source\queue.c" />
+    <ClCompile Include="..\..\..\..\..\FreeRTOS\Source\tasks.c" />
+    <ClCompile Include="..\..\..\..\..\FreeRTOS\Source\timers.c" />
+    <ClCompile Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\FreeRTOS_ARP.c" />
+    <ClCompile Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\FreeRTOS_DHCP.c" />
+    <ClCompile Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\FreeRTOS_DNS.c" />
+    <ClCompile Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\FreeRTOS_IP.c" />
+    <ClCompile Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\FreeRTOS_Sockets.c" />
+    <ClCompile Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\FreeRTOS_Stream_Buffer.c" />
+    <ClCompile Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\FreeRTOS_TCP_IP.c" />
+    <ClCompile Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\FreeRTOS_TCP_WIN.c" />
+    <ClCompile Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\FreeRTOS_UDP_IP.c" />
+    <ClCompile Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\portable\BufferManagement\BufferAllocation_2.c" />
+    <ClCompile Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\portable\NetworkInterface\WinPCap\NetworkInterface.c" />
+    <ClCompile Include="..\..\..\CMock\vendor\unity\extras\fixture\src\unity_fixture.c" />
+    <ClCompile Include="..\..\..\CMock\vendor\unity\extras\memory\src\unity_memory.c" />
+    <ClCompile Include="..\..\..\CMock\vendor\unity\src\unity.c" />
+    <ClCompile Include="Logging\demo_logging.c" />
+    <ClCompile Include="Logging\run-time-stats-utils.c" />
+    <ClCompile Include="main.c">
+      <AdditionalIncludeDirectories Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">%(AdditionalIncludeDirectories)</AdditionalIncludeDirectories>
+      <PreprocessorDefinitions Condition="'$(Configuration)|$(Platform)'=='Debug|Win32'">%(PreprocessorDefinitions)</PreprocessorDefinitions>
+      <PreprocessorDefinitions Condition="'$(Configuration)|$(Platform)'=='Release|Win32'">%(PreprocessorDefinitions)</PreprocessorDefinitions>
+    </ClCompile>
+    <ClCompile Include="Test_Code\Test_Cases\test.c" />
+    <ClCompile Include="Test_Code\Test_Cases\test_framework.c" />
+    <ClCompile Include="Test_Code\Test_Cases\test_freertos.c" />
+    <ClCompile Include="Test_Code\Test_Cases\test_tcp.c" />
+    <ClCompile Include="Test_Code\Test_Runner\test_runner.c" />
+  </ItemGroup>
+  <ItemGroup>
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+    <ClInclude Include="..\..\..\..\..\FreeRTOS\Source\include\FreeRTOS.h" />
+    <ClInclude Include="..\..\..\..\..\FreeRTOS\Source\include\list.h" />
+    <ClInclude Include="..\..\..\..\..\FreeRTOS\Source\include\portable.h" />
+    <ClInclude Include="..\..\..\..\..\FreeRTOS\Source\include\projdefs.h" />
+    <ClInclude Include="..\..\..\..\..\FreeRTOS\Source\include\queue.h" />
+    <ClInclude Include="..\..\..\..\..\FreeRTOS\Source\include\semphr.h" />
+    <ClInclude Include="..\..\..\..\..\FreeRTOS\Source\include\stream_buffer.h" />
+    <ClInclude Include="..\..\..\..\..\FreeRTOS\Source\include\task.h" />
+    <ClInclude Include="..\..\..\..\..\FreeRTOS\Source\include\timers.h" />
+    <ClInclude Include="..\..\..\..\..\FreeRTOS\Source\portable\MSVC-MingW\portmacro.h" />
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\FreeRTOSIPConfigDefaults.h" />
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\FreeRTOS_ARP.h" />
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\FreeRTOS_DHCP.h" />
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\FreeRTOS_DNS.h" />
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\FreeRTOS_errno_TCP.h" />
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\FreeRTOS_IP.h" />
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\FreeRTOS_IP_Private.h" />
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\FreeRTOS_Sockets.h" />
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\FreeRTOS_Stream_Buffer.h" />
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\FreeRTOS_TCP_IP.h" />
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\FreeRTOS_TCP_WIN.h" />
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\FreeRTOS_UDP_IP.h" />
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\IPTraceMacroDefaults.h" />
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\NetworkBufferManagement.h" />
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\NetworkInterface.h" />
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\tcp_dump_packets.h" />
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\tcp_mem_stats.h" />
+    <ClInclude Include="..\..\..\CMock\vendor\unity\extras\fixture\src\unity_fixture.h" />
+    <ClInclude Include="..\..\..\CMock\vendor\unity\extras\fixture\src\unity_fixture_internals.h" />
+    <ClInclude Include="..\..\..\CMock\vendor\unity\extras\memory\src\unity_memory.h" />
+    <ClInclude Include="..\..\..\CMock\vendor\unity\src\unity.h" />
+    <ClInclude Include="..\..\..\CMock\vendor\unity\src\unity_internals.h" />
+    <ClInclude Include="Config\FreeRTOSConfig.h" />
+    <ClInclude Include="Config\FreeRTOSIPConfig.h" />
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+    <ClInclude Include="Test_Code\Test_Cases\include\config_common.h" />
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+    <ClInclude Include="Test_Code\Test_Cases\include\test_tcp.h" />
+    <ClInclude Include="Test_Code\Test_Cases\include\test_tcp_config.h" />
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+  <Import Project="$(VCTargetsPath)\Microsoft.Cpp.targets" />
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+  </ImportGroup>
+</Project>
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WIN32.vcxproj.filters b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WIN32.vcxproj.filters
new file mode 100644
index 000000000..f61583274
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WIN32.vcxproj.filters
@@ -0,0 +1,261 @@
+<?xml version="1.0" encoding="utf-8"?>
+<Project ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
+  <ItemGroup>
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+      <UniqueIdentifier>{38712199-cebf-4124-bf15-398f7c3419ea}</UniqueIdentifier>
+      <Extensions>ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe</Extensions>
+    </Filter>
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+      <UniqueIdentifier>{af3445a1-4908-4170-89ed-39345d90d30c}</UniqueIdentifier>
+    </Filter>
+    <Filter Include="FreeRTOS\Source">
+      <UniqueIdentifier>{f32be356-4763-4cae-9020-974a2638cb08}</UniqueIdentifier>
+      <Extensions>*.c</Extensions>
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+      <UniqueIdentifier>{d2dcd641-8d91-492b-852f-5563ffadaec6}</UniqueIdentifier>
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+    </ClCompile>
+    <ClCompile Include="..\..\..\..\..\FreeRTOS\Source\portable\MemMang\heap_4.c">
+      <Filter>FreeRTOS\Source\Portable</Filter>
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+      <Filter>FreeRTOS\Source</Filter>
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+      <Filter>FreeRTOS\Source</Filter>
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+      <Filter>FreeRTOS+\FreeRTOS+TCP</Filter>
+    </ClCompile>
+    <ClCompile Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\FreeRTOS_DNS.c">
+      <Filter>FreeRTOS+\FreeRTOS+TCP</Filter>
+    </ClCompile>
+    <ClCompile Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\FreeRTOS_IP.c">
+      <Filter>FreeRTOS+\FreeRTOS+TCP</Filter>
+    </ClCompile>
+    <ClCompile Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\FreeRTOS_Sockets.c">
+      <Filter>FreeRTOS+\FreeRTOS+TCP</Filter>
+    </ClCompile>
+    <ClCompile Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\FreeRTOS_Stream_Buffer.c">
+      <Filter>FreeRTOS+\FreeRTOS+TCP</Filter>
+    </ClCompile>
+    <ClCompile Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\FreeRTOS_TCP_IP.c">
+      <Filter>FreeRTOS+\FreeRTOS+TCP</Filter>
+    </ClCompile>
+    <ClCompile Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\FreeRTOS_TCP_WIN.c">
+      <Filter>FreeRTOS+\FreeRTOS+TCP</Filter>
+    </ClCompile>
+    <ClCompile Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\FreeRTOS_UDP_IP.c">
+      <Filter>FreeRTOS+\FreeRTOS+TCP</Filter>
+    </ClCompile>
+    <ClCompile Include="Test_Code\Test_Cases\test.c">
+      <Filter>Tests</Filter>
+    </ClCompile>
+    <ClCompile Include="Test_Code\Test_Cases\test_framework.c">
+      <Filter>Tests</Filter>
+    </ClCompile>
+    <ClCompile Include="Test_Code\Test_Cases\test_freertos.c">
+      <Filter>Tests</Filter>
+    </ClCompile>
+    <ClCompile Include="Test_Code\Test_Cases\test_tcp.c">
+      <Filter>Tests</Filter>
+    </ClCompile>
+    <ClCompile Include="..\..\..\CMock\vendor\unity\src\unity.c">
+      <Filter>Unity</Filter>
+    </ClCompile>
+    <ClCompile Include="..\..\..\CMock\vendor\unity\extras\fixture\src\unity_fixture.c">
+      <Filter>Unity</Filter>
+    </ClCompile>
+    <ClCompile Include="..\..\..\CMock\vendor\unity\extras\memory\src\unity_memory.c">
+      <Filter>Unity</Filter>
+    </ClCompile>
+    <ClCompile Include="Logging\demo_logging.c" />
+    <ClCompile Include="Logging\run-time-stats-utils.c">
+      <Filter>Application Code</Filter>
+    </ClCompile>
+    <ClCompile Include="Test_Code\Test_Runner\test_runner.c">
+      <Filter>Tests</Filter>
+    </ClCompile>
+  </ItemGroup>
+  <ItemGroup>
+    <ClInclude Include="..\..\..\..\..\FreeRTOS\Source\include\event_groups.h">
+      <Filter>FreeRTOS\Source\include</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\..\..\FreeRTOS\Source\include\FreeRTOS.h">
+      <Filter>FreeRTOS\Source\include</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\..\..\FreeRTOS\Source\include\list.h">
+      <Filter>FreeRTOS\Source\include</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\..\..\FreeRTOS\Source\include\portable.h">
+      <Filter>FreeRTOS\Source\include</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\..\..\FreeRTOS\Source\include\projdefs.h">
+      <Filter>FreeRTOS\Source\include</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\..\..\FreeRTOS\Source\include\queue.h">
+      <Filter>FreeRTOS\Source\include</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\..\..\FreeRTOS\Source\include\semphr.h">
+      <Filter>FreeRTOS\Source\include</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\..\..\FreeRTOS\Source\include\stream_buffer.h">
+      <Filter>FreeRTOS\Source\include</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\..\..\FreeRTOS\Source\include\task.h">
+      <Filter>FreeRTOS\Source\include</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\..\..\FreeRTOS\Source\include\timers.h">
+      <Filter>FreeRTOS\Source\include</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\..\..\FreeRTOS\Source\portable\MSVC-MingW\portmacro.h">
+      <Filter>FreeRTOS\Source\Portable</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\FreeRTOS_ARP.h">
+      <Filter>FreeRTOS+\FreeRTOS+TCP\include</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\FreeRTOS_DHCP.h">
+      <Filter>FreeRTOS+\FreeRTOS+TCP\include</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\FreeRTOS_DNS.h">
+      <Filter>FreeRTOS+\FreeRTOS+TCP\include</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\FreeRTOS_errno_TCP.h">
+      <Filter>FreeRTOS+\FreeRTOS+TCP\include</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\FreeRTOS_IP.h">
+      <Filter>FreeRTOS+\FreeRTOS+TCP\include</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\FreeRTOS_IP_Private.h">
+      <Filter>FreeRTOS+\FreeRTOS+TCP\include</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\FreeRTOS_Sockets.h">
+      <Filter>FreeRTOS+\FreeRTOS+TCP\include</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\FreeRTOS_Stream_Buffer.h">
+      <Filter>FreeRTOS+\FreeRTOS+TCP\include</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\FreeRTOS_TCP_IP.h">
+      <Filter>FreeRTOS+\FreeRTOS+TCP\include</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\FreeRTOS_TCP_WIN.h">
+      <Filter>FreeRTOS+\FreeRTOS+TCP\include</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\FreeRTOS_UDP_IP.h">
+      <Filter>FreeRTOS+\FreeRTOS+TCP\include</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\FreeRTOSIPConfigDefaults.h">
+      <Filter>FreeRTOS+\FreeRTOS+TCP\include</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\IPTraceMacroDefaults.h">
+      <Filter>FreeRTOS+\FreeRTOS+TCP\include</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\NetworkBufferManagement.h">
+      <Filter>FreeRTOS+\FreeRTOS+TCP\include</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\NetworkInterface.h">
+      <Filter>FreeRTOS+\FreeRTOS+TCP\include</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\tcp_dump_packets.h">
+      <Filter>FreeRTOS+\FreeRTOS+TCP\include</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\..\Source\FreeRTOS-Plus-TCP\include\tcp_mem_stats.h">
+      <Filter>FreeRTOS+\FreeRTOS+TCP\include</Filter>
+    </ClInclude>
+    <ClInclude Include="Test_Code\Test_Cases\include\application_version.h">
+      <Filter>Tests\include</Filter>
+    </ClInclude>
+    <ClInclude Include="Test_Code\Test_Cases\include\clientcredential.h">
+      <Filter>Tests\include</Filter>
+    </ClInclude>
+    <ClInclude Include="Test_Code\Test_Cases\include\config_common.h">
+      <Filter>Tests\include</Filter>
+    </ClInclude>
+    <ClInclude Include="Test_Code\Test_Cases\include\test_framework.h">
+      <Filter>Tests\include</Filter>
+    </ClInclude>
+    <ClInclude Include="Test_Code\Test_Cases\include\test_runner.h">
+      <Filter>Tests\include</Filter>
+    </ClInclude>
+    <ClInclude Include="Test_Code\Test_Cases\include\test_tcp.h">
+      <Filter>Tests\include</Filter>
+    </ClInclude>
+    <ClInclude Include="Test_Code\Test_Cases\include\test_tcp_config.h">
+      <Filter>Tests\include</Filter>
+    </ClInclude>
+    <ClInclude Include="Test_Code\Test_Cases\include\test_utils.h">
+      <Filter>Tests\include</Filter>
+    </ClInclude>
+    <ClInclude Include="Test_Code\Test_Cases\include\unity_config.h">
+      <Filter>Tests\include</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\CMock\vendor\unity\src\unity.h">
+      <Filter>Unity</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\CMock\vendor\unity\src\unity_internals.h">
+      <Filter>Unity</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\CMock\vendor\unity\extras\fixture\src\unity_fixture.h">
+      <Filter>Unity</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\CMock\vendor\unity\extras\fixture\src\unity_fixture_internals.h">
+      <Filter>Unity</Filter>
+    </ClInclude>
+    <ClInclude Include="..\..\..\CMock\vendor\unity\extras\memory\src\unity_memory.h">
+      <Filter>Unity</Filter>
+    </ClInclude>
+    <ClInclude Include="Config\FreeRTOSConfig.h" />
+    <ClInclude Include="Config\FreeRTOSIPConfig.h" />
+  </ItemGroup>
+</Project>
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WIN32.vcxproj.user b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WIN32.vcxproj.user
new file mode 100644
index 000000000..88a550947
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WIN32.vcxproj.user
@@ -0,0 +1,4 @@
+<?xml version="1.0" encoding="utf-8"?>
+<Project ToolsVersion="Current" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
+  <PropertyGroup />
+</Project>
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/Packet32.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/Packet32.h
new file mode 100644
index 000000000..64be055d9
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/Packet32.h
@@ -0,0 +1,359 @@
+/*
+ * Copyright (c) 1999 - 2005 NetGroup, Politecnico di Torino (Italy)
+ * Copyright (c) 2005 - 2007 CACE Technologies, Davis (California)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Politecnico di Torino, CACE Technologies 
+ * nor the names of its contributors may be used to endorse or promote 
+ * products derived from this software without specific prior written 
+ * permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+/** @ingroup packetapi
+ *  @{ 
+ */
+
+/** @defgroup packet32h Packet.dll definitions and data structures
+ *  Packet32.h contains the data structures and the definitions used by packet.dll.
+ *  The file is used both by the Win9x and the WinNTx versions of packet.dll, and can be included
+ *  by the applications that use the functions of this library
+ *  @{
+ */
+
+#ifndef __PACKET32
+#define __PACKET32
+
+#include <winsock2.h>
+
+#ifdef HAVE_AIRPCAP_API
+#include <airpcap.h>
+#else
+#if !defined(AIRPCAP_HANDLE__EAE405F5_0171_9592_B3C2_C19EC426AD34__DEFINED_)
+#define AIRPCAP_HANDLE__EAE405F5_0171_9592_B3C2_C19EC426AD34__DEFINED_
+typedef struct _AirpcapHandle *PAirpcapHandle;
+#endif /* AIRPCAP_HANDLE__EAE405F5_0171_9592_B3C2_C19EC426AD34__DEFINED_ */
+#endif /* HAVE_AIRPCAP_API */
+
+#ifdef HAVE_DAG_API
+#include <dagc.h>
+#endif /* HAVE_DAG_API */
+
+// Working modes
+#define PACKET_MODE_CAPT 0x0 ///< Capture mode
+#define PACKET_MODE_STAT 0x1 ///< Statistical mode
+#define PACKET_MODE_MON 0x2 ///< Monitoring mode
+#define PACKET_MODE_DUMP 0x10 ///< Dump mode
+#define PACKET_MODE_STAT_DUMP MODE_DUMP | MODE_STAT ///< Statistical dump Mode
+
+
+/// Alignment macro. Defines the alignment size.
+#define Packet_ALIGNMENT sizeof(int)
+/// Alignment macro. Rounds up to the next even multiple of Packet_ALIGNMENT. 
+#define Packet_WORDALIGN(x) (((x)+(Packet_ALIGNMENT-1))&~(Packet_ALIGNMENT-1))
+
+#define NdisMediumNull	-1		///< Custom linktype: NDIS doesn't provide an equivalent
+#define NdisMediumCHDLC	-2		///< Custom linktype: NDIS doesn't provide an equivalent
+#define NdisMediumPPPSerial	-3	///< Custom linktype: NDIS doesn't provide an equivalent
+#define NdisMediumBare80211	-4	///< Custom linktype: NDIS doesn't provide an equivalent
+#define NdisMediumRadio80211	-5	///< Custom linktype: NDIS doesn't provide an equivalent
+#define NdisMediumPpi		-6	///< Custom linktype: NDIS doesn't provide an equivalent
+
+// Loopback behaviour definitions
+#define NPF_DISABLE_LOOPBACK	1	///< Drop the packets sent by the NPF driver
+#define NPF_ENABLE_LOOPBACK		2	///< Capture the packets sent by the NPF driver
+
+/*!
+  \brief Network type structure.
+
+  This structure is used by the PacketGetNetType() function to return information on the current adapter's type and speed.
+*/
+typedef struct NetType
+{
+	UINT LinkType;	///< The MAC of the current network adapter (see function PacketGetNetType() for more information)
+	ULONGLONG LinkSpeed;	///< The speed of the network in bits per second
+}NetType;
+
+
+//some definitions stolen from libpcap
+
+#ifndef BPF_MAJOR_VERSION
+
+/*!
+  \brief A BPF pseudo-assembly program.
+
+  The program will be injected in the kernel by the PacketSetBPF() function and applied to every incoming packet. 
+*/
+struct bpf_program 
+{
+	UINT bf_len;				///< Indicates the number of instructions of the program, i.e. the number of struct bpf_insn that will follow.
+	struct bpf_insn *bf_insns;	///< A pointer to the first instruction of the program.
+};
+
+/*!
+  \brief A single BPF pseudo-instruction.
+
+  bpf_insn contains a single instruction for the BPF register-machine. It is used to send a filter program to the driver.
+*/
+struct bpf_insn 
+{
+	USHORT	code;		///< Instruction type and addressing mode.
+	UCHAR 	jt;			///< Jump if true
+	UCHAR 	jf;			///< Jump if false
+	int k;				///< Generic field used for various purposes.
+};
+
+/*!
+  \brief Structure that contains a couple of statistics values on the current capture.
+
+  It is used by packet.dll to return statistics about a capture session.
+*/
+struct bpf_stat 
+{
+	UINT bs_recv;		///< Number of packets that the driver received from the network adapter 
+						///< from the beginning of the current capture. This value includes the packets 
+						///< lost by the driver.
+	UINT bs_drop;		///< number of packets that the driver lost from the beginning of a capture. 
+						///< Basically, a packet is lost when the the buffer of the driver is full. 
+						///< In this situation the packet cannot be stored and the driver rejects it.
+	UINT ps_ifdrop;		///< drops by interface. XXX not yet supported
+	UINT bs_capt;		///< number of packets that pass the filter, find place in the kernel buffer and
+						///< thus reach the application.
+};
+
+/*!
+  \brief Packet header.
+
+  This structure defines the header associated with every packet delivered to the application.
+*/
+struct bpf_hdr 
+{
+	struct timeval	bh_tstamp;	///< The timestamp associated with the captured packet. 
+								///< It is stored in a TimeVal structure.
+	UINT	bh_caplen;			///< Length of captured portion. The captured portion <b>can be different</b>
+								///< from the original packet, because it is possible (with a proper filter)
+								///< to instruct the driver to capture only a portion of the packets.
+	UINT	bh_datalen;			///< Original length of packet
+	USHORT		bh_hdrlen;		///< Length of bpf header (this struct plus alignment padding). In some cases,
+								///< a padding could be added between the end of this structure and the packet
+								///< data for performance reasons. This filed can be used to retrieve the actual data 
+								///< of the packet.
+};
+
+/*!
+  \brief Dump packet header.
+
+  This structure defines the header associated with the packets in a buffer to be used with PacketSendPackets().
+  It is simpler than the bpf_hdr, because it corresponds to the header associated by WinPcap and libpcap to a
+  packet in a dump file. This makes straightforward sending WinPcap dump files to the network.
+*/
+struct dump_bpf_hdr{
+    struct timeval	ts;			///< Time stamp of the packet
+    UINT			caplen;		///< Length of captured portion. The captured portion can smaller than the 
+								///< the original packet, because it is possible (with a proper filter) to 
+								///< instruct the driver to capture only a portion of the packets. 
+    UINT			len;		///< Length of the original packet (off wire).
+};
+
+
+#endif
+
+struct bpf_stat;
+
+#define        DOSNAMEPREFIX   TEXT("Packet_")	///< Prefix added to the adapters device names to create the WinPcap devices
+#define        MAX_LINK_NAME_LENGTH	64			//< Maximum length of the devices symbolic links
+#define        NMAX_PACKET 65535
+
+/*!
+  \brief Addresses of a network adapter.
+
+  This structure is used by the PacketGetNetInfoEx() function to return the IP addresses associated with 
+  an adapter.
+*/
+typedef struct npf_if_addr {
+	struct sockaddr_storage IPAddress;	///< IP address.
+	struct sockaddr_storage SubnetMask;	///< Netmask for that address.
+	struct sockaddr_storage Broadcast;	///< Broadcast address.
+}npf_if_addr;
+
+
+#define ADAPTER_NAME_LENGTH 256 + 12	///<  Maximum length for the name of an adapter. The value is the same used by the IP Helper API.
+#define ADAPTER_DESC_LENGTH 128			///<  Maximum length for the description of an adapter. The value is the same used by the IP Helper API.
+#define MAX_MAC_ADDR_LENGTH 8			///<  Maximum length for the link layer address of an adapter. The value is the same used by the IP Helper API.
+#define MAX_NETWORK_ADDRESSES 16		///<  Maximum length for the link layer address of an adapter. The value is the same used by the IP Helper API.
+
+
+typedef struct WAN_ADAPTER_INT WAN_ADAPTER; ///< Describes an opened wan (dialup, VPN...) network adapter using the NetMon API
+typedef WAN_ADAPTER *PWAN_ADAPTER; ///< Describes an opened wan (dialup, VPN...) network adapter using the NetMon API
+
+#define INFO_FLAG_NDIS_ADAPTER		0	///< Flag for ADAPTER_INFO: this is a traditional ndis adapter
+#define INFO_FLAG_NDISWAN_ADAPTER	1	///< Flag for ADAPTER_INFO: this is a NdisWan adapter, and it's managed by WANPACKET
+#define INFO_FLAG_DAG_CARD			2	///< Flag for ADAPTER_INFO: this is a DAG card
+#define INFO_FLAG_DAG_FILE			6	///< Flag for ADAPTER_INFO: this is a DAG file
+#define INFO_FLAG_DONT_EXPORT		8	///< Flag for ADAPTER_INFO: when this flag is set, the adapter will not be listed or openend by winpcap. This allows to prevent exporting broken network adapters, like for example FireWire ones.
+#define INFO_FLAG_AIRPCAP_CARD		16	///< Flag for ADAPTER_INFO: this is an airpcap card
+#define INFO_FLAG_NPFIM_DEVICE		32
+
+/*!
+  \brief Describes an opened network adapter.
+
+  This structure is the most important for the functioning of packet.dll, but the great part of its fields
+  should be ignored by the user, since the library offers functions that avoid to cope with low-level parameters
+*/
+typedef struct _ADAPTER  { 
+	HANDLE hFile;				///< \internal Handle to an open instance of the NPF driver.
+	CHAR  SymbolicLink[MAX_LINK_NAME_LENGTH]; ///< \internal A string containing the name of the network adapter currently opened.
+	int NumWrites;				///< \internal Number of times a packets written on this adapter will be repeated 
+								///< on the wire.
+	HANDLE ReadEvent;			///< A notification event associated with the read calls on the adapter.
+								///< It can be passed to standard Win32 functions (like WaitForSingleObject
+								///< or WaitForMultipleObjects) to wait until the driver's buffer contains some 
+								///< data. It is particularly useful in GUI applications that need to wait 
+								///< concurrently on several events. In Windows NT/2000 the PacketSetMinToCopy()
+								///< function can be used to define the minimum amount of data in the kernel buffer
+								///< that will cause the event to be signalled. 
+	
+	UINT ReadTimeOut;			///< \internal The amount of time after which a read on the driver will be released and 
+								///< ReadEvent will be signaled, also if no packets were captured
+	CHAR Name[ADAPTER_NAME_LENGTH];
+	PWAN_ADAPTER pWanAdapter;
+	UINT Flags;					///< Adapter's flags. Tell if this adapter must be treated in a different way, using the Netmon API or the dagc API.
+
+#ifdef HAVE_AIRPCAP_API
+	PAirpcapHandle	AirpcapAd;
+#endif // HAVE_AIRPCAP_API
+
+#ifdef HAVE_NPFIM_API
+	void* NpfImHandle;
+#endif // HAVE_NPFIM_API
+
+#ifdef HAVE_DAG_API
+	dagc_t *pDagCard;			///< Pointer to the dagc API adapter descriptor for this adapter
+	PCHAR DagBuffer;			///< Pointer to the buffer with the packets that is received from the DAG card
+	struct timeval DagReadTimeout;	///< Read timeout. The dagc API requires a timeval structure
+	unsigned DagFcsLen;			///< Length of the frame check sequence attached to any packet by the card. Obtained from the registry
+	DWORD DagFastProcess;		///< True if the user requests fast capture processing on this card. Higher level applications can use this value to provide a faster but possibly unprecise capture (for example, libpcap doesn't convert the timestamps).
+#endif // HAVE_DAG_API
+}  ADAPTER, *LPADAPTER;
+
+/*!
+  \brief Structure that contains a group of packets coming from the driver.
+
+  This structure defines the header associated with every packet delivered to the application.
+*/
+typedef struct _PACKET {  
+	HANDLE       hEvent;		///< \deprecated Still present for compatibility with old applications.
+	OVERLAPPED   OverLapped;	///< \deprecated Still present for compatibility with old applications.
+	PVOID        Buffer;		///< Buffer with containing the packets. See the PacketReceivePacket() for
+								///< details about the organization of the data in this buffer
+	UINT         Length;		///< Length of the buffer
+	DWORD        ulBytesReceived;	///< Number of valid bytes present in the buffer, i.e. amount of data
+									///< received by the last call to PacketReceivePacket()
+	BOOLEAN      bIoComplete;	///< \deprecated Still present for compatibility with old applications.
+}  PACKET, *LPPACKET;
+
+/*!
+  \brief Structure containing an OID request.
+
+  It is used by the PacketRequest() function to send an OID to the interface card driver. 
+  It can be used, for example, to retrieve the status of the error counters on the adapter, its MAC address, 
+  the list of the multicast groups defined on it, and so on.
+*/
+struct _PACKET_OID_DATA {
+    ULONG Oid;					///< OID code. See the Microsoft DDK documentation or the file ntddndis.h
+								///< for a complete list of valid codes.
+    ULONG Length;				///< Length of the data field
+    UCHAR Data[1];				///< variable-lenght field that contains the information passed to or received 
+								///< from the adapter.
+}; 
+typedef struct _PACKET_OID_DATA PACKET_OID_DATA, *PPACKET_OID_DATA;
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ *  @}
+ */
+
+/*
+BOOLEAN QueryWinPcapRegistryStringA(CHAR *SubKeyName,
+								 CHAR *Value,
+								 UINT *pValueLen,
+								 CHAR *DefaultVal);
+
+BOOLEAN QueryWinPcapRegistryStringW(WCHAR *SubKeyName,
+								 WCHAR *Value,
+								 UINT *pValueLen,
+								 WCHAR *DefaultVal);
+*/
+								 
+//---------------------------------------------------------------------------
+// EXPORTED FUNCTIONS
+//---------------------------------------------------------------------------
+
+PCHAR PacketGetVersion();
+PCHAR PacketGetDriverVersion();
+BOOLEAN PacketSetMinToCopy(LPADAPTER AdapterObject,int nbytes);
+BOOLEAN PacketSetNumWrites(LPADAPTER AdapterObject,int nwrites);
+BOOLEAN PacketSetMode(LPADAPTER AdapterObject,int mode);
+BOOLEAN PacketSetReadTimeout(LPADAPTER AdapterObject,int timeout);
+BOOLEAN PacketSetBpf(LPADAPTER AdapterObject,struct bpf_program *fp);
+BOOLEAN PacketSetLoopbackBehavior(LPADAPTER  AdapterObject, UINT LoopbackBehavior);
+INT PacketSetSnapLen(LPADAPTER AdapterObject,int snaplen);
+BOOLEAN PacketGetStats(LPADAPTER AdapterObject,struct bpf_stat *s);
+BOOLEAN PacketGetStatsEx(LPADAPTER AdapterObject,struct bpf_stat *s);
+BOOLEAN PacketSetBuff(LPADAPTER AdapterObject,int dim);
+BOOLEAN PacketGetNetType (LPADAPTER AdapterObject,NetType *type);
+LPADAPTER PacketOpenAdapter(PCHAR AdapterName);
+BOOLEAN PacketSendPacket(LPADAPTER AdapterObject,LPPACKET pPacket,BOOLEAN Sync);
+INT PacketSendPackets(LPADAPTER AdapterObject,PVOID PacketBuff,ULONG Size, BOOLEAN Sync);
+LPPACKET PacketAllocatePacket(void);
+VOID PacketInitPacket(LPPACKET lpPacket,PVOID  Buffer,UINT  Length);
+VOID PacketFreePacket(LPPACKET lpPacket);
+BOOLEAN PacketReceivePacket(LPADAPTER AdapterObject,LPPACKET lpPacket,BOOLEAN Sync);
+BOOLEAN PacketSetHwFilter(LPADAPTER AdapterObject,ULONG Filter);
+BOOLEAN PacketGetAdapterNames(PTSTR pStr,PULONG  BufferSize);
+BOOLEAN PacketGetNetInfoEx(PCHAR AdapterName, npf_if_addr* buffer, PLONG NEntries);
+BOOLEAN PacketRequest(LPADAPTER  AdapterObject,BOOLEAN Set,PPACKET_OID_DATA  OidData);
+HANDLE PacketGetReadEvent(LPADAPTER AdapterObject);
+BOOLEAN PacketSetDumpName(LPADAPTER AdapterObject, void *name, int len);
+BOOLEAN PacketSetDumpLimits(LPADAPTER AdapterObject, UINT maxfilesize, UINT maxnpacks);
+BOOLEAN PacketIsDumpEnded(LPADAPTER AdapterObject, BOOLEAN sync);
+BOOL PacketStopDriver();
+VOID PacketCloseAdapter(LPADAPTER lpAdapter);
+BOOLEAN PacketStartOem(PCHAR errorString, UINT errorStringLength);
+BOOLEAN PacketStartOemEx(PCHAR errorString, UINT errorStringLength, ULONG flags);
+PAirpcapHandle PacketGetAirPcapHandle(LPADAPTER AdapterObject);
+
+//
+// Used by PacketStartOemEx
+//
+#define PACKET_START_OEM_NO_NETMON	0x00000001
+
+#ifdef __cplusplus
+}
+#endif 
+
+#endif //__PACKET32
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/PacketData.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/PacketData.h
new file mode 100644
index 000000000..dd3d225e4
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/PacketData.h
@@ -0,0 +1,270 @@
+char pkt1[] = {
+0x00, 0x01, 0x02, 0x45, 0x09, 0x11, 0x00, 0x14,
+0x22, 0xcb, 0x18, 0x2d, 0x08, 0x00, 0x45, 0x00,
+0x00, 0x30, 0x09, 0x9c, 0x40, 0x00, 0x80, 0x06,
+0x6f, 0x07, 0xc0, 0xa8, 0x00, 0xc8, 0xc0, 0xa8,
+0x00, 0x0c, 0x0f, 0xe2, 0x00, 0x50, 0x09, 0xe7,
+0xc7, 0x35, 0x00, 0x00, 0x00, 0x00, 0x70, 0x02,
+0x40, 0x00, 0xdf, 0xab, 0x00, 0x00, 0x02, 0x04,
+0x05, 0xb4, 0x01, 0x01, 0x04, 0x02 };
+
+char pkt2[] = {
+0x00, 0x14, 0x22, 0xcb, 0x18, 0x2d, 0x00, 0x01,
+0x02, 0x45, 0x09, 0x11, 0x08, 0x00, 0x45, 0x00,
+0x00, 0x2c, 0x00, 0x01, 0x00, 0x00, 0x40, 0x06,
+0xf8, 0xa6, 0xc0, 0xa8, 0x00, 0x0c, 0xc0, 0xa8,
+0x00, 0xc8, 0x00, 0x50, 0x0f, 0xe2, 0x00, 0x00,
+0x06, 0x68, 0x09, 0xe7, 0xc7, 0x36, 0x60, 0x12,
+0x05, 0x92, 0x28, 0xca, 0x00, 0x00, 0x02, 0x04,
+0x05, 0x92 };
+
+char pkt3[] = {
+0x00, 0x01, 0x02, 0x45, 0x09, 0x11, 0x00, 0x14,
+0x22, 0xcb, 0x18, 0x2d, 0x08, 0x00, 0x45, 0x00,
+0x00, 0x28, 0x09, 0x9e, 0x40, 0x00, 0x80, 0x06,
+0x6f, 0x0d, 0xc0, 0xa8, 0x00, 0xc8, 0xc0, 0xa8,
+0x00, 0x0c, 0x0f, 0xe2, 0x00, 0x50, 0x09, 0xe7,
+0xc7, 0x36, 0x00, 0x00, 0x06, 0x69, 0x50, 0x10,
+0x42, 0xd8, 0x82, 0x3f, 0x00, 0x00 };
+
+char pkt4[] = {
+0x00, 0x01, 0x02, 0x45, 0x09, 0x11, 0x00, 0x14,
+0x22, 0xcb, 0x18, 0x2d, 0x08, 0x00, 0x45, 0x00,
+0x02, 0x27, 0x09, 0x9f, 0x40, 0x00, 0x80, 0x06,
+0x6d, 0x0d, 0xc0, 0xa8, 0x00, 0xc8, 0xc0, 0xa8,
+0x00, 0x0c, 0x0f, 0xe2, 0x00, 0x50, 0x09, 0xe7,
+0xc7, 0x36, 0x00, 0x00, 0x06, 0x69, 0x50, 0x18,
+0x42, 0xd8, 0x84, 0x3e, 0x00, 0x00, 0x47, 0x45,
+0x54, 0x20, 0x2f, 0x20, 0x48, 0x54, 0x54, 0x50,
+0x2f, 0x31, 0x2e, 0x31, 0x0d, 0x0a, 0x41, 0x63,
+0x63, 0x65, 0x70, 0x74, 0x3a, 0x20, 0x69, 0x6d,
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+0x3b, 0x20, 0x2e, 0x4e, 0x45, 0x54, 0x20, 0x43,
+0x4c, 0x52, 0x20, 0x33, 0x2e, 0x30, 0x2e, 0x30,
+0x34, 0x35, 0x30, 0x36, 0x2e, 0x36, 0x34, 0x38,
+0x3b, 0x20, 0x2e, 0x4e, 0x45, 0x54, 0x20, 0x43,
+0x4c, 0x52, 0x20, 0x33, 0x2e, 0x35, 0x2e, 0x32,
+0x31, 0x30, 0x32, 0x32, 0x29, 0x0d, 0x0a, 0x48,
+0x6f, 0x73, 0x74, 0x3a, 0x20, 0x31, 0x39, 0x32,
+0x2e, 0x31, 0x36, 0x38, 0x2e, 0x30, 0x2e, 0x31,
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+0x63, 0x74, 0x69, 0x6f, 0x6e, 0x3a, 0x20, 0x4b,
+0x65, 0x65, 0x70, 0x2d, 0x41, 0x6c, 0x69, 0x76,
+0x65, 0x0d, 0x0a, 0x0d, 0x0a };
+
+char pkt5[] = {
+0x00, 0x14, 0x22, 0xcb, 0x18, 0x2d, 0x00, 0x01,
+0x02, 0x45, 0x09, 0x11, 0x08, 0x00, 0x45, 0x00,
+0x00, 0x2c, 0x00, 0x02, 0x00, 0x00, 0x40, 0x06,
+0xf8, 0xa5, 0xc0, 0xa8, 0x00, 0x0c, 0xc0, 0xa8,
+0x00, 0xc8, 0x00, 0x50, 0x0f, 0xe2, 0x00, 0x00,
+0x06, 0x68, 0x09, 0xe7, 0xc7, 0x36, 0x60, 0x12,
+0x05, 0x92, 0x28, 0xca, 0x00, 0x00, 0x02, 0x04,
+0x05, 0x92 };
+
+char pkt6[] = {
+0x00, 0x01, 0x02, 0x45, 0x09, 0x11, 0x00, 0x14,
+0x22, 0xcb, 0x18, 0x2d, 0x08, 0x00, 0x45, 0x00,
+0x00, 0x28, 0x09, 0xa1, 0x40, 0x00, 0x80, 0x06,
+0x6f, 0x0a, 0xc0, 0xa8, 0x00, 0xc8, 0xc0, 0xa8,
+0x00, 0x0c, 0x0f, 0xe2, 0x00, 0x50, 0x09, 0xe7,
+0xc9, 0x35, 0x00, 0x00, 0x06, 0x69, 0x50, 0x10,
+0x42, 0xd8, 0x82, 0x3f, 0x00, 0x00 };
+
+char pkt7[] = {
+0x00, 0x01, 0x02, 0x45, 0x09, 0x11, 0x00, 0x14,
+0x22, 0xcb, 0x18, 0x2d, 0x08, 0x00, 0x45, 0x00,
+0x02, 0x27, 0x09, 0xa2, 0x40, 0x00, 0x80, 0x06,
+0x6d, 0x0a, 0xc0, 0xa8, 0x00, 0xc8, 0xc0, 0xa8,
+0x00, 0x0c, 0x0f, 0xe2, 0x00, 0x50, 0x09, 0xe7,
+0xc7, 0x36, 0x00, 0x00, 0x06, 0x69, 0x50, 0x18,
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+0x65, 0x0d, 0x0a, 0x0d, 0x0a };
+
+char pkt8[] = {
+0x00, 0x14, 0x22, 0xcb, 0x18, 0x2d, 0x00, 0x01,
+0x02, 0x45, 0x09, 0x11, 0x08, 0x00, 0x45, 0x00,
+0x00, 0x2c, 0x00, 0x03, 0x00, 0x00, 0x40, 0x06,
+0xf8, 0xa4, 0xc0, 0xa8, 0x00, 0x0c, 0xc0, 0xa8,
+0x00, 0xc8, 0x00, 0x50, 0x0f, 0xe2, 0x00, 0x00,
+0x06, 0x68, 0x09, 0xe7, 0xc7, 0x36, 0x60, 0x12,
+0x05, 0x92, 0x28, 0xca, 0x00, 0x00, 0x02, 0x04,
+0x05, 0x92 };
+
+char pkt9[] = {
+0x00, 0x01, 0x02, 0x45, 0x09, 0x11, 0x00, 0x14,
+0x22, 0xcb, 0x18, 0x2d, 0x08, 0x00, 0x45, 0x00,
+0x00, 0x28, 0x09, 0xa3, 0x40, 0x00, 0x80, 0x06,
+0x6f, 0x08, 0xc0, 0xa8, 0x00, 0xc8, 0xc0, 0xa8,
+0x00, 0x0c, 0x0f, 0xe2, 0x00, 0x50, 0x09, 0xe7,
+0xc9, 0x35, 0x00, 0x00, 0x06, 0x69, 0x50, 0x10,
+0x42, 0xd8, 0x82, 0x3f, 0x00, 0x00 };
+
+char pkt10[] = {
+0x00, 0x14, 0x22, 0xcb, 0x18, 0x2d, 0x00, 0x01,
+0x02, 0x45, 0x09, 0x11, 0x08, 0x00, 0x45, 0x00,
+0x00, 0x2c, 0x00, 0x04, 0x00, 0x00, 0x40, 0x06,
+0xf8, 0xa3, 0xc0, 0xa8, 0x00, 0x0c, 0xc0, 0xa8,
+0x00, 0xc8, 0x00, 0x50, 0x0f, 0xe2, 0x00, 0x00,
+0x06, 0x68, 0x09, 0xe7, 0xc7, 0x36, 0x60, 0x12,
+0x05, 0x92, 0x28, 0xca, 0x00, 0x00, 0x02, 0x04,
+0x05, 0x92 };
+
+char pkt11[] = {
+0x00, 0x01, 0x02, 0x45, 0x09, 0x11, 0x00, 0x14,
+0x22, 0xcb, 0x18, 0x2d, 0x08, 0x00, 0x45, 0x00,
+0x00, 0x28, 0x09, 0xa6, 0x40, 0x00, 0x80, 0x06,
+0x6f, 0x05, 0xc0, 0xa8, 0x00, 0xc8, 0xc0, 0xa8,
+0x00, 0x0c, 0x0f, 0xe2, 0x00, 0x50, 0x09, 0xe7,
+0xc9, 0x35, 0x00, 0x00, 0x06, 0x69, 0x50, 0x10,
+0x42, 0xd8, 0x82, 0x3f, 0x00, 0x00 };
+
+char pkt12[] = {
+0x00, 0x01, 0x02, 0x45, 0x09, 0x11, 0x00, 0x14,
+0x22, 0xcb, 0x18, 0x2d, 0x08, 0x00, 0x45, 0x00,
+0x00, 0x28, 0x09, 0xa7, 0x40, 0x00, 0x80, 0x06,
+0x6f, 0x04, 0xc0, 0xa8, 0x00, 0xc8, 0xc0, 0xa8,
+0x00, 0x0c, 0x0f, 0xe2, 0x00, 0x50, 0x09, 0xe7,
+0xc9, 0x35, 0x00, 0x00, 0x06, 0x69, 0x50, 0x14,
+0x00, 0x00, 0x43, 0xf4, 0x00, 0x00 };
+
+
+typedef struct
+{
+	char *pcData;
+	int iDataLen;
+} xPacketData;
+
+xPacketData xAllPackets[] =
+{
+/* These comments below are there so that we may modify
+ * them as and when required. Keeping them unmodified.
+ * Might be removed in later incremental PRs */
+	{ pkt1, sizeof( pkt1 ) },
+/*	{ pkt2, sizeof( pkt2 ) },  */
+	{ pkt3, sizeof( pkt3 ) },
+	{ pkt4, sizeof( pkt4 ) },
+/*	{ pkt5, sizeof( pkt5 ) },  */
+	{ pkt6, sizeof( pkt6 ) },
+	{ pkt7, sizeof( pkt7 ) },
+	{ pkt8, sizeof( pkt8 ) },
+	{ pkt9, sizeof( pkt9 ) },
+	{ pkt10, sizeof( pkt10 ) },
+/*	{ pkt11, sizeof( pkt11 ) },  */
+/*	{ pkt12, sizeof( pkt12 ) },  */
+/*	{ pkt13, sizeof( pkt13 ) },  */
+/*	{ pkt14, sizeof( pkt14 ) },  */
+/*	{ pkt15, sizeof( pkt15 ) },  */
+/*	{ pkt16, sizeof( pkt16 ) },  */
+};
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/Win32-Extensions.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/Win32-Extensions.h
new file mode 100644
index 000000000..bad7c33ac
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/Win32-Extensions.h
@@ -0,0 +1,114 @@
+/*
+ * Copyright (c) 1999 - 2005 NetGroup, Politecnico di Torino (Italy)
+ * Copyright (c) 2005 - 2006 CACE Technologies, Davis (California)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Politecnico di Torino, CACE Technologies 
+ * nor the names of its contributors may be used to endorse or promote 
+ * products derived from this software without specific prior written 
+ * permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+
+#ifndef __WIN32_EXTENSIONS_H__
+#define __WIN32_EXTENSIONS_H__
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Definitions */
+
+/*!
+  \brief A queue of raw packets that will be sent to the network with pcap_sendqueue_transmit().
+*/
+struct pcap_send_queue
+{
+	u_int maxlen;		///< Maximum size of the the queue, in bytes. This variable contains the size of the buffer field.
+	u_int len;			///< Current size of the queue, in bytes.
+	char *buffer;		///< Buffer containing the packets to be sent.
+};
+
+typedef struct pcap_send_queue pcap_send_queue;
+
+/*!
+  \brief This typedef is a support for the pcap_get_airpcap_handle() function
+*/
+#if !defined(AIRPCAP_HANDLE__EAE405F5_0171_9592_B3C2_C19EC426AD34__DEFINED_)
+#define AIRPCAP_HANDLE__EAE405F5_0171_9592_B3C2_C19EC426AD34__DEFINED_
+typedef struct _AirpcapHandle *PAirpcapHandle;
+#endif
+
+#define		BPF_MEM_EX_IMM	0xc0
+#define		BPF_MEM_EX_IND	0xe0
+
+/*used for ST*/
+#define		BPF_MEM_EX		0xc0
+#define		BPF_TME					0x08
+
+#define		BPF_LOOKUP				0x90   
+#define		BPF_EXECUTE				0xa0
+#define		BPF_INIT				0xb0
+#define		BPF_VALIDATE			0xc0
+#define		BPF_SET_ACTIVE			0xd0
+#define		BPF_RESET				0xe0
+#define		BPF_SET_MEMORY			0x80
+#define		BPF_GET_REGISTER_VALUE	0x70
+#define		BPF_SET_REGISTER_VALUE	0x60
+#define		BPF_SET_WORKING			0x50
+#define		BPF_SET_ACTIVE_READ		0x40
+#define		BPF_SET_AUTODELETION	0x30
+#define		BPF_SEPARATION			0xff
+
+/* Prototypes */
+pcap_send_queue* pcap_sendqueue_alloc(u_int memsize);
+
+void pcap_sendqueue_destroy(pcap_send_queue* queue);
+
+int pcap_sendqueue_queue(pcap_send_queue* queue, const struct pcap_pkthdr *pkt_header, const u_char *pkt_data);
+
+u_int pcap_sendqueue_transmit(pcap_t *p, pcap_send_queue* queue, int sync);
+
+HANDLE pcap_getevent(pcap_t *p);
+
+struct pcap_stat *pcap_stats_ex(pcap_t *p, int *pcap_stat_size);
+
+int pcap_setuserbuffer(pcap_t *p, int size);
+
+int pcap_live_dump(pcap_t *p, char *filename, int maxsize, int maxpacks);
+
+int pcap_live_dump_ended(pcap_t *p, int sync);
+
+int pcap_offline_filter(struct bpf_program *prog, const struct pcap_pkthdr *header, const u_char *pkt_data);
+
+int pcap_start_oem(char* err_str, int flags);
+
+PAirpcapHandle pcap_get_airpcap_handle(pcap_t *p);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //__WIN32_EXTENSIONS_H__
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/arch.c b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/arch.c
new file mode 100644
index 000000000..f5db41dae
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/arch.c
@@ -0,0 +1,336 @@
+/*
+ * FreeRTOS Kernel V10.3.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+/* WinPCap includes. */
+#include "pcap.h"
+#include "remote-ext.h"
+
+/* uIP includes. */
+#include "net/uip.h"
+#include "net/uip_arp.h"
+#include "net/clock-arch.h"
+
+/* FreeRTOS includes. */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "queue.h"
+
+/*
+ * Query the computer the simulation is being executed on to find the network
+ * interfaces it has installed.
+ */
+static pcap_if_t * prvPrintAvailableNetworkInterfaces( void );
+
+/*
+ * Open the network interface.  The number of the interface to be opened is set
+ * by the configNETWORK_INTERFACE_TO_USE constant in FreeRTOSConfig.h.
+ */
+static void prvOpenSelectedNetworkInterface( pcap_if_t *pxAllNetworkInterfaces );
+
+/*
+ * Configure the capture filter to allow blocking reads, and to filter out
+ * packets that are not of interest to this demo.
+ */
+static void prvConfigureCaptureBehaviour( void );
+
+pcap_t *pxOpenedInterfaceHandle = NULL;
+LARGE_INTEGER freq, sys_start_time;
+
+#define archNUM_BUFFERS	5
+#define archNUM_BUFFER_POINTERS ( archNUM_BUFFERS - 1 )
+
+static void prvInterruptSimulator( void *pvParameters );
+
+static unsigned char ucEthernetBuffer[ archNUM_BUFFERS ][ UIP_CONF_BUFFER_SIZE ];
+static unsigned char *pucEthernetBufferPointers[ archNUM_BUFFER_POINTERS ];
+
+static long lLengthOfDataInBuffer[ archNUM_BUFFER_POINTERS ] = { 0 };
+static unsigned char ucNextBufferToFill = 0U, ucNextBufferToProcess = 0U;
+
+unsigned char *uip_buf = NULL;
+char cErrorBuffer[PCAP_ERRBUF_SIZE];
+
+void vNetifTx( void )
+{
+	pcap_sendpacket( pxOpenedInterfaceHandle, uip_buf, uip_len );
+	pcap_sendpacket( pxOpenedInterfaceHandle, uip_buf, uip_len );
+}
+/*-----------------------------------------------------------*/
+
+UBaseType_t uxNetifRx( void )
+{
+UBaseType_t xDataLen;
+unsigned char *pucTemp;
+
+	/* Check there is really data available. */
+	xDataLen = lLengthOfDataInBuffer[ ucNextBufferToProcess ];
+	if( xDataLen != 0L )
+	{
+
+		/* The buffer pointed to by uip_buf is going to change.  Remember which
+		buffer uip_buf is currently pointing to. */
+		pucTemp = uip_buf;
+
+		/* Point uip_buf at the next buffer that contains data. */
+		uip_buf = pucEthernetBufferPointers[ ucNextBufferToProcess ];
+
+		/* The buffer pointed to by 
+		pucEthernetBufferPointeres[ ucNextBufferToProcess ] is now in use by
+		uip_buf, but the buffer uip_buf was pointing to on entry to this
+		function is free.  Set 
+		pucEthernetBufferPointeres[ ucNextBufferToProcess ] to the free 
+		buffer. */
+		pucEthernetBufferPointers[ ucNextBufferToProcess ] = pucTemp;
+		lLengthOfDataInBuffer[ ucNextBufferToProcess ] = 0L;
+
+		ucNextBufferToProcess++;
+		if( ucNextBufferToProcess >= archNUM_BUFFER_POINTERS )
+		{
+			ucNextBufferToProcess = 0L;
+		}
+	}
+
+	return xDataLen;
+}
+/*-----------------------------------------------------------*/
+
+BaseType_t xNetifInit( void )
+{
+BaseType_t x;
+pcap_if_t *pxAllNetworkInterfaces;
+
+	/* Allocate a free buffer to each buffer pointer. */
+	for( x = 0; x < sizeof( pucEthernetBufferPointers ) / sizeof( unsigned char * ); x++ )
+	{
+		pucEthernetBufferPointers[ x ] = &( ucEthernetBuffer[ x ][ 0 ] );
+	}
+
+	/* Start with uip_buf pointing to a buffer that is not referenced from the
+	pucEthernetBufferPointers[] array. */
+	uip_buf = &( ucEthernetBuffer[ archNUM_BUFFERS - 1 ][ 0 ] );
+
+	/* Query the computer the simulation is being executed on to find the 
+	network interfaces it has installed. */
+	pxAllNetworkInterfaces = prvPrintAvailableNetworkInterfaces();
+	
+	/* Open the network interface.  The number of the interface to be opened is 
+	set by the configNETWORK_INTERFACE_TO_USE constant in FreeRTOSConfig.h.
+	Calling this function will set the pxOpenedInterfaceHandle variable.  If,
+	after calling this function, pxOpenedInterfaceHandle is equal to NULL, then
+	the interface could not be opened. */
+	if( pxAllNetworkInterfaces != NULL )
+	{
+		prvOpenSelectedNetworkInterface( pxAllNetworkInterfaces );
+	}
+	
+
+	return x;
+}
+/*-----------------------------------------------------------*/
+
+static pcap_if_t * prvPrintAvailableNetworkInterfaces( void )
+{    
+pcap_if_t * pxAllNetworkInterfaces = NULL, *xInterface;
+long lInterfaceNumber = 1;
+
+    if( pcap_findalldevs_ex( PCAP_SRC_IF_STRING, NULL, &pxAllNetworkInterfaces, cErrorBuffer ) == -1 )
+    {
+        printf( "\r\nCould not obtain a list of network interfaces\r\n%s\r\n", cErrorBuffer );
+        pxAllNetworkInterfaces = NULL;
+    }
+
+	if( pxAllNetworkInterfaces != NULL )
+	{
+		/* Print out the list of network interfaces.  The first in the list
+		is interface '1', not interface '0'. */
+		for( xInterface = pxAllNetworkInterfaces; xInterface != NULL; xInterface = xInterface->next )
+		{
+			printf( "%d. %s", lInterfaceNumber, xInterface->name );
+			
+			if( xInterface->description != NULL )
+			{
+				printf( " (%s)\r\n", xInterface->description );
+			}
+			else
+			{
+				printf( " (No description available)\r\n") ;
+			}
+			
+			lInterfaceNumber++;
+		}
+	}
+
+    if( lInterfaceNumber == 1 )
+    {
+		/* The interface number was never incremented, so the above for() loop
+		did not execute meaning no interfaces were found. */
+        printf( " \r\nNo network interfaces were found.\r\n" );
+        pxAllNetworkInterfaces = NULL;
+    }
+
+	printf( "\r\nThe interface that will be opened is set by configNETWORK_INTERFACE_TO_USE which should be defined in FreeRTOSConfig.h\r\n" );
+	printf( "Attempting to open interface number %d.\r\n", configNETWORK_INTERFACE_TO_USE );
+	
+    if( ( configNETWORK_INTERFACE_TO_USE < 1L ) || ( configNETWORK_INTERFACE_TO_USE > lInterfaceNumber ) )
+    {
+        printf("\r\nconfigNETWORK_INTERFACE_TO_USE is not in the valid range.\r\n" );
+		
+		if( pxAllNetworkInterfaces != NULL )
+		{
+			/* Free the device list, as no devices are going to be opened. */
+			pcap_freealldevs( pxAllNetworkInterfaces );
+			pxAllNetworkInterfaces = NULL;
+		}
+    }
+
+	return pxAllNetworkInterfaces;
+}
+/*-----------------------------------------------------------*/
+
+static void prvOpenSelectedNetworkInterface( pcap_if_t *pxAllNetworkInterfaces )
+{
+pcap_if_t *xInterface;
+long x;
+
+    /* Walk the list of devices until the selected device is located. */
+	xInterface = pxAllNetworkInterfaces;
+    for( x = 0L; x < ( configNETWORK_INTERFACE_TO_USE - 1L ); x++ )
+	{
+		xInterface = xInterface->next;
+	}
+
+    /* Open the selected interface. */
+	pxOpenedInterfaceHandle = pcap_open(	xInterface->name,          	/* The name of the selected interface. */
+											UIP_CONF_BUFFER_SIZE, 		/* The size of the packet to capture. */
+											PCAP_OPENFLAG_PROMISCUOUS,	/* Open in promiscious mode as the MAC and 
+																		IP address is going to be "simulated", and 
+																		not be the real MAC and IP address.  This allows
+																		trafic to the simulated IP address to be routed
+																		to uIP, and trafic to the real IP address to be
+																		routed to the Windows TCP/IP stack. */
+											0xfffffffL,             	/* The read time out.  This is going to block
+																		until data is available. */
+											NULL,             			/* No authentication is required as this is
+																		not a remote capture session. */
+											cErrorBuffer            
+									   );
+									   
+    if ( pxOpenedInterfaceHandle == NULL )
+    {
+        printf( "\r\n%s is not supported by WinPcap and cannot be opened\r\n", xInterface->name );
+    }
+	else
+	{
+		/* Configure the capture filter to allow blocking reads, and to filter 
+		out packets that are not of interest to this demo. */
+		prvConfigureCaptureBehaviour();
+	}
+
+	/* The device list is no longer required. */
+	pcap_freealldevs( pxAllNetworkInterfaces );
+}
+/*-----------------------------------------------------------*/
+
+static void prvConfigureCaptureBehaviour( void )
+{
+struct bpf_program xFilterCode;
+const long lMinBytesToCopy = 10L, lBlocking = 0L;
+unsigned long ulNetMask;
+
+	/* Unblock a read as soon as anything is received. */
+	pcap_setmintocopy( pxOpenedInterfaceHandle, lMinBytesToCopy );
+
+	/* Allow blocking. */
+	pcap_setnonblock( pxOpenedInterfaceHandle, lBlocking, cErrorBuffer );
+
+	/* Set up a filter so only the packets of interest are passed to the uIP
+	stack.  cErrorBuffer is used for convenience to create the string.  Don't
+	confuse this with an error message. */
+	sprintf( cErrorBuffer, "broadcast or multicast or host %d.%d.%d.%d", configIP_ADDR0, configIP_ADDR1, configIP_ADDR2, configIP_ADDR3 );
+
+	ulNetMask = ( configNET_MASK3 << 24UL ) | ( configNET_MASK2 << 16UL ) | ( configNET_MASK1 << 8L ) | configNET_MASK0;
+
+	if( pcap_compile(pxOpenedInterfaceHandle, &xFilterCode, cErrorBuffer, 1, ulNetMask ) < 0 )
+    {
+        printf("\r\nThe packet filter string is invalid\r\n" );
+    }
+	else
+	{    
+		if( pcap_setfilter( pxOpenedInterfaceHandle, &xFilterCode ) < 0 )
+		{
+			printf( "\r\nAn error occurred setting the packet filter.\r\n" );
+		}
+	}
+
+	/* Create a task that simulates an interrupt in a real system.  This will
+	block waiting for packets, then send a message to the uIP task when data
+	is available. */
+	xTaskCreate( prvInterruptSimulator, ( signed char * ) "MAC_ISR", configMINIMAL_STACK_SIZE, NULL, ( configuIP_TASK_PRIORITY - 1 ), NULL );
+}
+/*-----------------------------------------------------------*/
+
+static void prvInterruptSimulator( void *pvParameters )
+{
+static struct pcap_pkthdr *pxHeader;
+const unsigned char *pucPacketData;
+extern QueueHandle_t xEMACEventQueue;
+const unsigned long ulRxEvent = uipETHERNET_RX_EVENT;
+long lResult;
+
+	/* Just to kill the compiler warning. */
+	( void ) pvParameters;
+
+	for( ;; )
+	{
+		/* Get the next packet. */
+		lResult = pcap_next_ex( pxOpenedInterfaceHandle, &pxHeader, &pucPacketData );
+		if( lResult )
+		{
+			/* Is the next buffer into which data should be placed free? */
+			if( lLengthOfDataInBuffer[ ucNextBufferToFill ] == 0L )
+			{
+				/* Copy the data from the captured packet into the buffer. */
+				memcpy( pucEthernetBufferPointers[ ucNextBufferToFill ], pucPacketData, pxHeader->len );
+
+				/* Note the amount of data that was copied. */
+				lLengthOfDataInBuffer[ ucNextBufferToFill ] = pxHeader->len;
+
+				/* Move onto the next buffer, wrapping around if necessary. */
+				ucNextBufferToFill++;
+				if( ucNextBufferToFill >= archNUM_BUFFER_POINTERS )
+				{
+					ucNextBufferToFill = 0U;
+				}
+
+				/* Data was received and stored.  Send a message to the uIP task
+				to let it know. */
+				xQueueSendToBack( xEMACEventQueue, &ulRxEvent, portMAX_DELAY );
+			}
+		}
+	}
+}
+
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/bittypes.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/bittypes.h
new file mode 100644
index 000000000..f55fcecfd
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/bittypes.h
@@ -0,0 +1,137 @@
+/*
+ * Copyright (C) 1999 WIDE Project.
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the project nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE PROJECT AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE PROJECT OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+#ifndef _BITTYPES_H
+#define _BITTYPES_H
+
+#ifndef HAVE_U_INT8_T
+
+#if SIZEOF_CHAR == 1
+typedef unsigned char u_int8_t;
+typedef signed char _int8_t;
+#elif SIZEOF_INT == 1
+typedef unsigned int u_int8_t;
+typedef signed int int8_t;
+#else  /* XXX */
+#error "there's no appropriate type for u_int8_t"
+#endif
+#define HAVE_U_INT8_T 1
+#define HAVE_INT8_T 1
+
+#endif /* HAVE_U_INT8_T */
+
+#ifndef HAVE_U_INT16_T 
+
+#if SIZEOF_SHORT == 2
+typedef unsigned short u_int16_t;
+typedef signed short _int16_t;
+#elif SIZEOF_INT == 2
+typedef unsigned int u_int16_t;
+typedef signed int int16_t;
+#elif SIZEOF_CHAR == 2
+typedef unsigned char u_int16_t;
+typedef signed char int16_t;
+#else  /* XXX */
+#error "there's no appropriate type for u_int16_t"
+#endif
+#define HAVE_U_INT16_T 1
+#define HAVE_INT16_T 1
+
+#endif /* HAVE_U_INT16_T */
+
+#ifndef HAVE_U_INT32_T
+
+#if SIZEOF_INT == 4
+typedef unsigned int u_int32_t;
+typedef signed int _int32_t;
+#elif SIZEOF_LONG == 4
+typedef unsigned long u_int32_t;
+typedef signed long int32_t;
+#elif SIZEOF_SHORT == 4
+typedef unsigned short u_int32_t;
+typedef signed short int32_t;
+#else  /* XXX */
+#error "there's no appropriate type for u_int32_t"
+#endif
+#define HAVE_U_INT32_T 1
+#define HAVE_INT32_T 1
+
+#endif /* HAVE_U_INT32_T */
+
+#ifndef HAVE_U_INT64_T
+#if SIZEOF_LONG_LONG == 8
+typedef unsigned long long u_int64_t;
+typedef long long int64_t;
+#elif defined(_MSC_EXTENSIONS)
+typedef unsigned _int64 u_int64_t;
+typedef _int64 int64_t;
+#elif SIZEOF_INT == 8
+typedef unsigned int u_int64_t;
+#elif SIZEOF_LONG == 8
+typedef unsigned long u_int64_t;
+#elif SIZEOF_SHORT == 8
+typedef unsigned short u_int64_t;
+#else  /* XXX */
+#error "there's no appropriate type for u_int64_t"
+#endif
+
+#endif /* HAVE_U_INT64_T */
+
+#ifndef PRId64
+#ifdef _MSC_EXTENSIONS
+#define PRId64	"I64d"
+#else /* _MSC_EXTENSIONS */
+#define PRId64	"lld"
+#endif /* _MSC_EXTENSIONS */
+#endif /* PRId64 */
+
+#ifndef PRIo64
+#ifdef _MSC_EXTENSIONS
+#define PRIo64	"I64o"
+#else /* _MSC_EXTENSIONS */
+#define PRIo64	"llo"
+#endif /* _MSC_EXTENSIONS */
+#endif /* PRIo64 */
+
+#ifndef PRIx64
+#ifdef _MSC_EXTENSIONS
+#define PRIx64	"I64x"
+#else /* _MSC_EXTENSIONS */
+#define PRIx64	"llx"
+#endif /* _MSC_EXTENSIONS */
+#endif /* PRIx64 */
+
+#ifndef PRIu64
+#ifdef _MSC_EXTENSIONS
+#define PRIu64	"I64u"
+#else /* _MSC_EXTENSIONS */
+#define PRIu64	"llu"
+#endif /* _MSC_EXTENSIONS */
+#endif /* PRIu64 */
+
+#endif /* _BITTYPES_H */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/ip6_misc.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/ip6_misc.h
new file mode 100644
index 000000000..562fa6184
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/ip6_misc.h
@@ -0,0 +1,163 @@
+/*
+ * Copyright (c) 1993, 1994, 1997
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that: (1) source code distributions
+ * retain the above copyright notice and this paragraph in its entirety, (2)
+ * distributions including binary code include the above copyright notice and
+ * this paragraph in its entirety in the documentation or other materials
+ * provided with the distribution, and (3) all advertising materials mentioning
+ * features or use of this software display the following acknowledgement:
+ * ``This product includes software developed by the University of California,
+ * Lawrence Berkeley Laboratory and its contributors.'' Neither the name of
+ * the University nor the names of its contributors may be used to endorse
+ * or promote products derived from this software without specific prior
+ * written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ * @(#) $Header: /tcpdump/master/libpcap/Win32/Include/ip6_misc.h,v 1.5 2006-01-22 18:02:18 gianluca Exp $ (LBL)
+ */
+
+/*
+ * This file contains a collage of declarations for IPv6 from FreeBSD not present in Windows
+ */
+
+#include <winsock2.h>
+
+#include <ws2tcpip.h>
+
+#ifndef __MINGW32__
+#define	IN_MULTICAST(a)		IN_CLASSD(a)
+#endif
+
+#define	IN_EXPERIMENTAL(a)	((((u_int32_t) (a)) & 0xf0000000) == 0xf0000000)
+
+#define	IN_LOOPBACKNET		127
+
+#if defined(__MINGW32__) && defined(DEFINE_ADDITIONAL_IPV6_STUFF)
+/* IPv6 address */
+struct in6_addr
+  {
+    union
+      {
+	u_int8_t		u6_addr8[16];
+	u_int16_t	u6_addr16[8];
+	u_int32_t	u6_addr32[4];
+      } in6_u;
+#define s6_addr			in6_u.u6_addr8
+#define s6_addr16		in6_u.u6_addr16
+#define s6_addr32		in6_u.u6_addr32
+#define s6_addr64		in6_u.u6_addr64
+  };
+
+#define IN6ADDR_ANY_INIT { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
+#define IN6ADDR_LOOPBACK_INIT { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1 }
+#endif /* __MINGW32__ */
+
+
+#if (defined _MSC_VER) || (defined(__MINGW32__) && defined(DEFINE_ADDITIONAL_IPV6_STUFF))
+typedef unsigned short	sa_family_t;
+#endif
+
+
+#if defined(__MINGW32__) && defined(DEFINE_ADDITIONAL_IPV6_STUFF)
+
+#define	__SOCKADDR_COMMON(sa_prefix) \
+  sa_family_t sa_prefix##family
+
+/* Ditto, for IPv6.  */
+struct sockaddr_in6
+  {
+    __SOCKADDR_COMMON (sin6_);
+    u_int16_t sin6_port;		/* Transport layer port # */
+    u_int32_t sin6_flowinfo;	/* IPv6 flow information */
+    struct in6_addr sin6_addr;	/* IPv6 address */
+  };
+
+#define IN6_IS_ADDR_V4MAPPED(a) \
+	((((u_int32_t *) (a))[0] == 0) && (((u_int32_t *) (a))[1] == 0) && \
+	 (((u_int32_t *) (a))[2] == htonl (0xffff)))
+
+#define IN6_IS_ADDR_MULTICAST(a) (((u_int8_t *) (a))[0] == 0xff)
+
+#define IN6_IS_ADDR_LINKLOCAL(a) \
+	((((u_int32_t *) (a))[0] & htonl (0xffc00000)) == htonl (0xfe800000))
+
+#define IN6_IS_ADDR_LOOPBACK(a) \
+	(((u_int32_t *) (a))[0] == 0 && ((u_int32_t *) (a))[1] == 0 && \
+	 ((u_int32_t *) (a))[2] == 0 && ((u_int32_t *) (a))[3] == htonl (1))
+#endif /* __MINGW32__ */
+
+#define ip6_vfc   ip6_ctlun.ip6_un2_vfc
+#define ip6_flow  ip6_ctlun.ip6_un1.ip6_un1_flow
+#define ip6_plen  ip6_ctlun.ip6_un1.ip6_un1_plen
+#define ip6_nxt   ip6_ctlun.ip6_un1.ip6_un1_nxt
+#define ip6_hlim  ip6_ctlun.ip6_un1.ip6_un1_hlim
+#define ip6_hops  ip6_ctlun.ip6_un1.ip6_un1_hlim
+
+#define nd_rd_type               nd_rd_hdr.icmp6_type
+#define nd_rd_code               nd_rd_hdr.icmp6_code
+#define nd_rd_cksum              nd_rd_hdr.icmp6_cksum
+#define nd_rd_reserved           nd_rd_hdr.icmp6_data32[0]
+
+/*
+ *	IPV6 extension headers
+ */
+#define IPPROTO_HOPOPTS		0	/* IPv6 hop-by-hop options	*/
+#define IPPROTO_IPV6		41  /* IPv6 header.  */
+#define IPPROTO_ROUTING		43	/* IPv6 routing header		*/
+#define IPPROTO_FRAGMENT	44	/* IPv6 fragmentation header	*/
+#define IPPROTO_ESP		50	/* encapsulating security payload */
+#define IPPROTO_AH		51	/* authentication header	*/
+#define IPPROTO_ICMPV6		58	/* ICMPv6			*/
+#define IPPROTO_NONE		59	/* IPv6 no next header		*/
+#define IPPROTO_DSTOPTS		60	/* IPv6 destination options	*/
+#define IPPROTO_PIM			103 /* Protocol Independent Multicast.  */
+
+#define	 IPV6_RTHDR_TYPE_0 0
+
+/* Option types and related macros */
+#define IP6OPT_PAD1		0x00	/* 00 0 00000 */
+#define IP6OPT_PADN		0x01	/* 00 0 00001 */
+#define IP6OPT_JUMBO		0xC2	/* 11 0 00010 = 194 */
+#define IP6OPT_JUMBO_LEN	6
+#define IP6OPT_ROUTER_ALERT	0x05	/* 00 0 00101 */
+
+#define IP6OPT_RTALERT_LEN	4
+#define IP6OPT_RTALERT_MLD	0	/* Datagram contains an MLD message */
+#define IP6OPT_RTALERT_RSVP	1	/* Datagram contains an RSVP message */
+#define IP6OPT_RTALERT_ACTNET	2 	/* contains an Active Networks msg */
+#define IP6OPT_MINLEN		2
+
+#define IP6OPT_BINDING_UPDATE	0xc6	/* 11 0 00110 */
+#define IP6OPT_BINDING_ACK	0x07	/* 00 0 00111 */
+#define IP6OPT_BINDING_REQ	0x08	/* 00 0 01000 */
+#define IP6OPT_HOME_ADDRESS	0xc9	/* 11 0 01001 */
+#define IP6OPT_EID		0x8a	/* 10 0 01010 */
+
+#define IP6OPT_TYPE(o)		((o) & 0xC0)
+#define IP6OPT_TYPE_SKIP	0x00
+#define IP6OPT_TYPE_DISCARD	0x40
+#define IP6OPT_TYPE_FORCEICMP	0x80
+#define IP6OPT_TYPE_ICMP	0xC0
+
+#define IP6OPT_MUTABLE		0x20
+
+
+#if defined(__MINGW32__) && defined(DEFINE_ADDITIONAL_IPV6_STUFF)
+#ifndef EAI_ADDRFAMILY
+struct addrinfo {
+	int	ai_flags;	/* AI_PASSIVE, AI_CANONNAME */
+	int	ai_family;	/* PF_xxx */
+	int	ai_socktype;	/* SOCK_xxx */
+	int	ai_protocol;	/* 0 or IPPROTO_xxx for IPv4 and IPv6 */
+	size_t	ai_addrlen;	/* length of ai_addr */
+	char	*ai_canonname;	/* canonical name for hostname */
+	struct sockaddr *ai_addr;	/* binary address */
+	struct addrinfo *ai_next;	/* next structure in linked list */
+};
+#endif
+#endif /* __MINGW32__ */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/netif.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/netif.h
new file mode 100644
index 000000000..837991409
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/netif.h
@@ -0,0 +1,52 @@
+/*
+ * FreeRTOS Kernel V10.3.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+#ifndef NET_IF_H
+#define NET_IF_H
+
+/*
+ * Send uip_len bytes from uip_buf to the network interface selected by the 
+ * configNETWORK_INTERFACE_TO_USE constant (defined in FreeRTOSConfig.h). 
+ */
+void vNetifTx( void );
+
+/*
+ * Receive bytes from the network interface selected by the 
+ * configNETWORK_INTERFACE_TO_USE constant (defined in FreeRTOSConfig.h).  The
+ * bytes are placed in uip_buf.  The number of bytes copied into uip_buf is
+ * returned.
+ */
+UBaseType_t uxNetifRx( void );
+
+/*
+ * Prepare a packet capture session.  This will print out all the network 
+ * interfaces available, and the one actually used is set by the 
+ * configNETWORK_INTERFACE_TO_USE constant that is defined in 
+ * FreeRTOSConfig.h. */
+BaseType_t xNetifInit( void );
+
+#endif /* NET_IF_H */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap-bpf.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap-bpf.h
new file mode 100644
index 000000000..5fe129dbb
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap-bpf.h
@@ -0,0 +1,47 @@
+/*-
+ * Copyright (c) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from the Stanford/CMU enet packet filter,
+ * (net/enet.c) distributed as part of 4.3BSD, and code contributed
+ * to Berkeley by Steven McCanne and Van Jacobson both of Lawrence 
+ * Berkeley Laboratory.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed by the University of
+ *      California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#) $Header: /tcpdump/master/libpcap/pcap-bpf.h,v 1.50 2007/04/01 21:43:55 guy Exp $ (LBL)
+ */
+
+/*
+ * For backwards compatibility.
+ *
+ * Note to OS vendors: do NOT get rid of this file!  Some applications
+ * might expect to be able to include <pcap-bpf.h>.
+ */
+#include <pcap/bpf.h>
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap-namedb.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap-namedb.h
new file mode 100644
index 000000000..80a2f0040
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap-namedb.h
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 1994, 1996
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the Computer Systems
+ *	Engineering Group at Lawrence Berkeley Laboratory.
+ * 4. Neither the name of the University nor of the Laboratory may be used
+ *    to endorse or promote products derived from this software without
+ *    specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#) $Header: /tcpdump/master/libpcap/pcap-namedb.h,v 1.13 2006/10/04 18:13:32 guy Exp $ (LBL)
+ */
+
+/*
+ * For backwards compatibility.
+ *
+ * Note to OS vendors: do NOT get rid of this file!  Some applications
+ * might expect to be able to include <pcap-namedb.h>.
+ */
+#include <pcap/namedb.h>
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap-stdinc.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap-stdinc.h
new file mode 100644
index 000000000..417604177
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap-stdinc.h
@@ -0,0 +1,93 @@
+/*
+ * Copyright (c) 2002 - 2005 NetGroup, Politecnico di Torino (Italy)
+ * Copyright (c) 2005 - 2009 CACE Technologies, Inc. Davis (California)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the Politecnico di Torino nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * @(#) $Header: /tcpdump/master/libpcap/pcap-stdinc.h,v 1.10.2.1 2008-10-06 15:38:39 gianluca Exp $ (LBL)
+ */
+
+#define SIZEOF_CHAR 1
+#define SIZEOF_SHORT 2
+#define SIZEOF_INT 4
+#ifndef _MSC_EXTENSIONS
+#define SIZEOF_LONG_LONG 8
+#endif
+
+/*
+ * Avoids a compiler warning in case this was already defined      
+ * (someone defined _WINSOCKAPI_ when including 'windows.h', in order
+ * to prevent it from including 'winsock.h')
+ */
+#ifdef _WINSOCKAPI_
+#undef _WINSOCKAPI_
+#endif
+#include <winsock2.h>
+
+#include <fcntl.h>
+
+#include "bittypes.h"
+#include <time.h>
+#include <io.h>
+
+#ifndef __MINGW32__
+#include "IP6_misc.h"
+#endif
+
+#define caddr_t char*
+
+#if _MSC_VER < 1500
+#define snprintf _snprintf
+#define vsnprintf _vsnprintf
+#define strdup _strdup
+#endif
+
+#define inline __inline 
+
+#ifdef __MINGW32__
+#include <stdint.h>
+#else /*__MINGW32__*/
+/* MSVC compiler */
+#ifndef _UINTPTR_T_DEFINED
+#ifdef  _WIN64
+typedef unsigned __int64    uintptr_t;
+#else
+typedef _W64 unsigned int   uintptr_t;
+#endif
+#define _UINTPTR_T_DEFINED
+#endif
+
+#ifndef _INTPTR_T_DEFINED
+#ifdef  _WIN64
+typedef __int64    intptr_t;
+#else
+typedef _W64 int   intptr_t;
+#endif
+#define _INTPTR_T_DEFINED
+#endif 
+
+#endif /*__MINGW32__*/
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap.h
new file mode 100644
index 000000000..935f9494c
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap.h
@@ -0,0 +1,45 @@
+/*
+ * Copyright (c) 1993, 1994, 1995, 1996, 1997
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the Computer Systems
+ *	Engineering Group at Lawrence Berkeley Laboratory.
+ * 4. Neither the name of the University nor of the Laboratory may be used
+ *    to endorse or promote products derived from this software without
+ *    specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#) $Header: /tcpdump/master/libpcap/pcap.h,v 1.59 2006/10/04 18:09:22 guy Exp $ (LBL)
+ */
+
+/*
+ * For backwards compatibility.
+ *
+ * Note to OS vendors: do NOT get rid of this file!  Many applications
+ * expect to be able to include <pcap.h>, and at least some of them
+ * go through contortions in their configure scripts to try to detect
+ * OSes that have "helpfully" moved pcap.h to <pcap/pcap.h> without
+ * leaving behind a <pcap.h> file.
+ */
+#include <pcap/pcap.h>
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap/bluetooth.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap/bluetooth.h
new file mode 100644
index 000000000..7bf65df03
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap/bluetooth.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2006 Paolo Abeni (Italy)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote 
+ * products derived from this software without specific prior written 
+ * permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * bluetooth data struct
+ * By Paolo Abeni <paolo.abeni@email.it>
+ *
+ * @(#) $Header: /tcpdump/master/libpcap/pcap/bluetooth.h,v 1.1 2007/09/22 02:10:17 guy Exp $
+ */
+ 
+#ifndef _PCAP_BLUETOOTH_STRUCTS_H__
+#define _PCAP_BLUETOOTH_STRUCTS_H__
+
+/*
+ * Header prepended libpcap to each bluetooth h:4 frame.
+ * fields are in network byte order
+ */
+typedef struct _pcap_bluetooth_h4_header {
+	u_int32_t direction; /* if first bit is set direction is incoming */
+} pcap_bluetooth_h4_header;
+
+
+#endif
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap/bpf.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap/bpf.h
new file mode 100644
index 000000000..9f4ca33e3
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap/bpf.h
@@ -0,0 +1,934 @@
+/*-
+ * Copyright (c) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from the Stanford/CMU enet packet filter,
+ * (net/enet.c) distributed as part of 4.3BSD, and code contributed
+ * to Berkeley by Steven McCanne and Van Jacobson both of Lawrence 
+ * Berkeley Laboratory.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed by the University of
+ *      California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *      @(#)bpf.h       7.1 (Berkeley) 5/7/91
+ *
+ * @(#) $Header: /tcpdump/master/libpcap/pcap/bpf.h,v 1.19.2.8 2008-09-22 20:16:01 guy Exp $ (LBL)
+ */
+
+/*
+ * This is libpcap's cut-down version of bpf.h; it includes only
+ * the stuff needed for the code generator and the userland BPF
+ * interpreter, and the libpcap APIs for setting filters, etc..
+ *
+ * "pcap-bpf.c" will include the native OS version, as it deals with
+ * the OS's BPF implementation.
+ *
+ * XXX - should this all just be moved to "pcap.h"?
+ */
+
+#ifndef BPF_MAJOR_VERSION
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* BSD style release date */
+#define BPF_RELEASE 199606
+
+#ifdef MSDOS /* must be 32-bit */
+typedef long          bpf_int32;
+typedef unsigned long bpf_u_int32;
+#else
+typedef	int bpf_int32;
+typedef	u_int bpf_u_int32;
+#endif
+
+/*
+ * Alignment macros.  BPF_WORDALIGN rounds up to the next 
+ * even multiple of BPF_ALIGNMENT. 
+ */
+#ifndef __NetBSD__
+#define BPF_ALIGNMENT sizeof(bpf_int32)
+#else
+#define BPF_ALIGNMENT sizeof(long)
+#endif
+#define BPF_WORDALIGN(x) (((x)+(BPF_ALIGNMENT-1))&~(BPF_ALIGNMENT-1))
+
+#define BPF_MAXBUFSIZE 0x8000
+#define BPF_MINBUFSIZE 32
+
+/*
+ * Structure for "pcap_compile()", "pcap_setfilter()", etc..
+ */
+struct bpf_program {
+	u_int bf_len;
+	struct bpf_insn *bf_insns;
+};
+ 
+/*
+ * Struct return by BIOCVERSION.  This represents the version number of 
+ * the filter language described by the instruction encodings below.
+ * bpf understands a program iff kernel_major == filter_major &&
+ * kernel_minor >= filter_minor, that is, if the value returned by the
+ * running kernel has the same major number and a minor number equal
+ * equal to or less than the filter being downloaded.  Otherwise, the
+ * results are undefined, meaning an error may be returned or packets
+ * may be accepted haphazardly.
+ * It has nothing to do with the source code version.
+ */
+struct bpf_version {
+	u_short bv_major;
+	u_short bv_minor;
+};
+/* Current version number of filter architecture. */
+#define BPF_MAJOR_VERSION 1
+#define BPF_MINOR_VERSION 1
+
+/*
+ * Data-link level type codes.
+ *
+ * Do *NOT* add new values to this list without asking
+ * "tcpdump-workers@lists.tcpdump.org" for a value.  Otherwise, you run
+ * the risk of using a value that's already being used for some other
+ * purpose, and of having tools that read libpcap-format captures not
+ * being able to handle captures with your new DLT_ value, with no hope
+ * that they will ever be changed to do so (as that would destroy their
+ * ability to read captures using that value for that other purpose).
+ */
+
+/*
+ * These are the types that are the same on all platforms, and that
+ * have been defined by <net/bpf.h> for ages.
+ */
+#define DLT_NULL	0	/* BSD loopback encapsulation */
+#define DLT_EN10MB	1	/* Ethernet (10Mb) */
+#define DLT_EN3MB	2	/* Experimental Ethernet (3Mb) */
+#define DLT_AX25	3	/* Amateur Radio AX.25 */
+#define DLT_PRONET	4	/* Proteon ProNET Token Ring */
+#define DLT_CHAOS	5	/* Chaos */
+#define DLT_IEEE802	6	/* 802.5 Token Ring */
+#define DLT_ARCNET	7	/* ARCNET, with BSD-style header */
+#define DLT_SLIP	8	/* Serial Line IP */
+#define DLT_PPP		9	/* Point-to-point Protocol */
+#define DLT_FDDI	10	/* FDDI */
+
+/*
+ * These are types that are different on some platforms, and that
+ * have been defined by <net/bpf.h> for ages.  We use #ifdefs to
+ * detect the BSDs that define them differently from the traditional
+ * libpcap <net/bpf.h>
+ *
+ * XXX - DLT_ATM_RFC1483 is 13 in BSD/OS, and DLT_RAW is 14 in BSD/OS,
+ * but I don't know what the right #define is for BSD/OS.
+ */
+#define DLT_ATM_RFC1483	11	/* LLC-encapsulated ATM */
+
+#ifdef __OpenBSD__
+#define DLT_RAW		14	/* raw IP */
+#else
+#define DLT_RAW		12	/* raw IP */
+#endif
+
+/*
+ * Given that the only OS that currently generates BSD/OS SLIP or PPP
+ * is, well, BSD/OS, arguably everybody should have chosen its values
+ * for DLT_SLIP_BSDOS and DLT_PPP_BSDOS, which are 15 and 16, but they
+ * didn't.  So it goes.
+ */
+#if defined(__NetBSD__) || defined(__FreeBSD__)
+#ifndef DLT_SLIP_BSDOS
+#define DLT_SLIP_BSDOS	13	/* BSD/OS Serial Line IP */
+#define DLT_PPP_BSDOS	14	/* BSD/OS Point-to-point Protocol */
+#endif
+#else
+#define DLT_SLIP_BSDOS	15	/* BSD/OS Serial Line IP */
+#define DLT_PPP_BSDOS	16	/* BSD/OS Point-to-point Protocol */
+#endif
+
+/*
+ * 17 is used for DLT_OLD_PFLOG in OpenBSD;
+ *     OBSOLETE: DLT_PFLOG is 117 in OpenBSD now as well. See below.
+ * 18 is used for DLT_PFSYNC in OpenBSD; don't use it for anything else.
+ */
+
+#define DLT_ATM_CLIP	19	/* Linux Classical-IP over ATM */
+
+/*
+ * Apparently Redback uses this for its SmartEdge 400/800.  I hope
+ * nobody else decided to use it, too.
+ */
+#define DLT_REDBACK_SMARTEDGE	32
+
+/*
+ * These values are defined by NetBSD; other platforms should refrain from
+ * using them for other purposes, so that NetBSD savefiles with link
+ * types of 50 or 51 can be read as this type on all platforms.
+ */
+#define DLT_PPP_SERIAL	50	/* PPP over serial with HDLC encapsulation */
+#define DLT_PPP_ETHER	51	/* PPP over Ethernet */
+
+/*
+ * The Axent Raptor firewall - now the Symantec Enterprise Firewall - uses
+ * a link-layer type of 99 for the tcpdump it supplies.  The link-layer
+ * header has 6 bytes of unknown data, something that appears to be an
+ * Ethernet type, and 36 bytes that appear to be 0 in at least one capture
+ * I've seen.
+ */
+#define DLT_SYMANTEC_FIREWALL	99
+
+/*
+ * Values between 100 and 103 are used in capture file headers as
+ * link-layer types corresponding to DLT_ types that differ
+ * between platforms; don't use those values for new DLT_ new types.
+ */
+
+/*
+ * This value was defined by libpcap 0.5; platforms that have defined
+ * it with a different value should define it here with that value -
+ * a link type of 104 in a save file will be mapped to DLT_C_HDLC,
+ * whatever value that happens to be, so programs will correctly
+ * handle files with that link type regardless of the value of
+ * DLT_C_HDLC.
+ *
+ * The name DLT_C_HDLC was used by BSD/OS; we use that name for source
+ * compatibility with programs written for BSD/OS.
+ *
+ * libpcap 0.5 defined it as DLT_CHDLC; we define DLT_CHDLC as well,
+ * for source compatibility with programs written for libpcap 0.5.
+ */
+#define DLT_C_HDLC	104	/* Cisco HDLC */
+#define DLT_CHDLC	DLT_C_HDLC
+
+#define DLT_IEEE802_11	105	/* IEEE 802.11 wireless */
+
+/*
+ * 106 is reserved for Linux Classical IP over ATM; it's like DLT_RAW,
+ * except when it isn't.  (I.e., sometimes it's just raw IP, and
+ * sometimes it isn't.)  We currently handle it as DLT_LINUX_SLL,
+ * so that we don't have to worry about the link-layer header.)
+ */
+
+/*
+ * Frame Relay; BSD/OS has a DLT_FR with a value of 11, but that collides
+ * with other values.
+ * DLT_FR and DLT_FRELAY packets start with the Q.922 Frame Relay header
+ * (DLCI, etc.).
+ */
+#define DLT_FRELAY	107
+
+/*
+ * OpenBSD DLT_LOOP, for loopback devices; it's like DLT_NULL, except
+ * that the AF_ type in the link-layer header is in network byte order.
+ *
+ * DLT_LOOP is 12 in OpenBSD, but that's DLT_RAW in other OSes, so
+ * we don't use 12 for it in OSes other than OpenBSD.
+ */
+#ifdef __OpenBSD__
+#define DLT_LOOP	12
+#else
+#define DLT_LOOP	108
+#endif
+
+/*
+ * Encapsulated packets for IPsec; DLT_ENC is 13 in OpenBSD, but that's
+ * DLT_SLIP_BSDOS in NetBSD, so we don't use 13 for it in OSes other
+ * than OpenBSD.
+ */
+#ifdef __OpenBSD__
+#define DLT_ENC		13
+#else
+#define DLT_ENC		109
+#endif
+
+/*
+ * Values between 110 and 112 are reserved for use in capture file headers
+ * as link-layer types corresponding to DLT_ types that might differ
+ * between platforms; don't use those values for new DLT_ types
+ * other than the corresponding DLT_ types.
+ */
+
+/*
+ * This is for Linux cooked sockets.
+ */
+#define DLT_LINUX_SLL	113
+
+/*
+ * Apple LocalTalk hardware.
+ */
+#define DLT_LTALK	114
+
+/*
+ * Acorn Econet.
+ */
+#define DLT_ECONET	115
+
+/*
+ * Reserved for use with OpenBSD ipfilter.
+ */
+#define DLT_IPFILTER	116
+
+/*
+ * OpenBSD DLT_PFLOG; DLT_PFLOG is 17 in OpenBSD, but that's DLT_LANE8023
+ * in SuSE 6.3, so we can't use 17 for it in capture-file headers.
+ *
+ * XXX: is there a conflict with DLT_PFSYNC 18 as well?
+ */
+#ifdef __OpenBSD__
+#define DLT_OLD_PFLOG	17
+#define DLT_PFSYNC	18
+#endif
+#define DLT_PFLOG	117
+
+/*
+ * Registered for Cisco-internal use.
+ */
+#define DLT_CISCO_IOS	118
+
+/*
+ * For 802.11 cards using the Prism II chips, with a link-layer
+ * header including Prism monitor mode information plus an 802.11
+ * header.
+ */
+#define DLT_PRISM_HEADER	119
+
+/*
+ * Reserved for Aironet 802.11 cards, with an Aironet link-layer header
+ * (see Doug Ambrisko's FreeBSD patches).
+ */
+#define DLT_AIRONET_HEADER	120
+
+/*
+ * Reserved for Siemens HiPath HDLC.
+ */
+#define DLT_HHDLC		121
+
+/*
+ * This is for RFC 2625 IP-over-Fibre Channel.
+ *
+ * This is not for use with raw Fibre Channel, where the link-layer
+ * header starts with a Fibre Channel frame header; it's for IP-over-FC,
+ * where the link-layer header starts with an RFC 2625 Network_Header
+ * field.
+ */
+#define DLT_IP_OVER_FC		122
+
+/*
+ * This is for Full Frontal ATM on Solaris with SunATM, with a
+ * pseudo-header followed by an AALn PDU.
+ *
+ * There may be other forms of Full Frontal ATM on other OSes,
+ * with different pseudo-headers.
+ *
+ * If ATM software returns a pseudo-header with VPI/VCI information
+ * (and, ideally, packet type information, e.g. signalling, ILMI,
+ * LANE, LLC-multiplexed traffic, etc.), it should not use
+ * DLT_ATM_RFC1483, but should get a new DLT_ value, so tcpdump
+ * and the like don't have to infer the presence or absence of a
+ * pseudo-header and the form of the pseudo-header.
+ */
+#define DLT_SUNATM		123	/* Solaris+SunATM */
+
+/* 
+ * Reserved as per request from Kent Dahlgren <kent@praesum.com>
+ * for private use.
+ */
+#define DLT_RIO                 124     /* RapidIO */
+#define DLT_PCI_EXP             125     /* PCI Express */
+#define DLT_AURORA              126     /* Xilinx Aurora link layer */
+
+/*
+ * Header for 802.11 plus a number of bits of link-layer information
+ * including radio information, used by some recent BSD drivers as
+ * well as the madwifi Atheros driver for Linux.
+ */
+#define DLT_IEEE802_11_RADIO	127	/* 802.11 plus radiotap radio header */
+
+/*
+ * Reserved for the TZSP encapsulation, as per request from
+ * Chris Waters <chris.waters@networkchemistry.com>
+ * TZSP is a generic encapsulation for any other link type,
+ * which includes a means to include meta-information
+ * with the packet, e.g. signal strength and channel
+ * for 802.11 packets.
+ */
+#define DLT_TZSP                128     /* Tazmen Sniffer Protocol */
+
+/*
+ * BSD's ARCNET headers have the source host, destination host,
+ * and type at the beginning of the packet; that's what's handed
+ * up to userland via BPF.
+ *
+ * Linux's ARCNET headers, however, have a 2-byte offset field
+ * between the host IDs and the type; that's what's handed up
+ * to userland via PF_PACKET sockets.
+ *
+ * We therefore have to have separate DLT_ values for them.
+ */
+#define DLT_ARCNET_LINUX	129	/* ARCNET */
+
+/*
+ * Juniper-private data link types, as per request from
+ * Hannes Gredler <hannes@juniper.net>.  The DLT_s are used
+ * for passing on chassis-internal metainformation such as
+ * QOS profiles, etc..
+ */
+#define DLT_JUNIPER_MLPPP       130
+#define DLT_JUNIPER_MLFR        131
+#define DLT_JUNIPER_ES          132
+#define DLT_JUNIPER_GGSN        133
+#define DLT_JUNIPER_MFR         134
+#define DLT_JUNIPER_ATM2        135
+#define DLT_JUNIPER_SERVICES    136
+#define DLT_JUNIPER_ATM1        137
+
+/*
+ * Apple IP-over-IEEE 1394, as per a request from Dieter Siegmund
+ * <dieter@apple.com>.  The header that's presented is an Ethernet-like
+ * header:
+ *
+ *	#define FIREWIRE_EUI64_LEN	8
+ *	struct firewire_header {
+ *		u_char  firewire_dhost[FIREWIRE_EUI64_LEN];
+ *		u_char  firewire_shost[FIREWIRE_EUI64_LEN];
+ *		u_short firewire_type;
+ *	};
+ *
+ * with "firewire_type" being an Ethernet type value, rather than,
+ * for example, raw GASP frames being handed up.
+ */
+#define DLT_APPLE_IP_OVER_IEEE1394	138
+
+/*
+ * Various SS7 encapsulations, as per a request from Jeff Morriss
+ * <jeff.morriss[AT]ulticom.com> and subsequent discussions.
+ */
+#define DLT_MTP2_WITH_PHDR	139	/* pseudo-header with various info, followed by MTP2 */
+#define DLT_MTP2		140	/* MTP2, without pseudo-header */
+#define DLT_MTP3		141	/* MTP3, without pseudo-header or MTP2 */
+#define DLT_SCCP		142	/* SCCP, without pseudo-header or MTP2 or MTP3 */
+
+/*
+ * DOCSIS MAC frames.
+ */
+#define DLT_DOCSIS		143
+
+/*
+ * Linux-IrDA packets. Protocol defined at http://www.irda.org.
+ * Those packets include IrLAP headers and above (IrLMP...), but
+ * don't include Phy framing (SOF/EOF/CRC & byte stuffing), because Phy
+ * framing can be handled by the hardware and depend on the bitrate.
+ * This is exactly the format you would get capturing on a Linux-IrDA
+ * interface (irdaX), but not on a raw serial port.
+ * Note the capture is done in "Linux-cooked" mode, so each packet include
+ * a fake packet header (struct sll_header). This is because IrDA packet
+ * decoding is dependant on the direction of the packet (incomming or
+ * outgoing).
+ * When/if other platform implement IrDA capture, we may revisit the
+ * issue and define a real DLT_IRDA...
+ * Jean II
+ */
+#define DLT_LINUX_IRDA		144
+
+/*
+ * Reserved for IBM SP switch and IBM Next Federation switch.
+ */
+#define DLT_IBM_SP		145
+#define DLT_IBM_SN		146
+
+/*
+ * Reserved for private use.  If you have some link-layer header type
+ * that you want to use within your organization, with the capture files
+ * using that link-layer header type not ever be sent outside your
+ * organization, you can use these values.
+ *
+ * No libpcap release will use these for any purpose, nor will any
+ * tcpdump release use them, either.
+ *
+ * Do *NOT* use these in capture files that you expect anybody not using
+ * your private versions of capture-file-reading tools to read; in
+ * particular, do *NOT* use them in products, otherwise you may find that
+ * people won't be able to use tcpdump, or snort, or Ethereal, or... to
+ * read capture files from your firewall/intrusion detection/traffic
+ * monitoring/etc. appliance, or whatever product uses that DLT_ value,
+ * and you may also find that the developers of those applications will
+ * not accept patches to let them read those files.
+ *
+ * Also, do not use them if somebody might send you a capture using them
+ * for *their* private type and tools using them for *your* private type
+ * would have to read them.
+ *
+ * Instead, ask "tcpdump-workers@lists.tcpdump.org" for a new DLT_ value,
+ * as per the comment above, and use the type you're given.
+ */
+#define DLT_USER0		147
+#define DLT_USER1		148
+#define DLT_USER2		149
+#define DLT_USER3		150
+#define DLT_USER4		151
+#define DLT_USER5		152
+#define DLT_USER6		153
+#define DLT_USER7		154
+#define DLT_USER8		155
+#define DLT_USER9		156
+#define DLT_USER10		157
+#define DLT_USER11		158
+#define DLT_USER12		159
+#define DLT_USER13		160
+#define DLT_USER14		161
+#define DLT_USER15		162
+
+/*
+ * For future use with 802.11 captures - defined by AbsoluteValue
+ * Systems to store a number of bits of link-layer information
+ * including radio information:
+ *
+ *	http://www.shaftnet.org/~pizza/software/capturefrm.txt
+ *
+ * but it might be used by some non-AVS drivers now or in the
+ * future.
+ */
+#define DLT_IEEE802_11_RADIO_AVS 163	/* 802.11 plus AVS radio header */
+
+/*
+ * Juniper-private data link type, as per request from
+ * Hannes Gredler <hannes@juniper.net>.  The DLT_s are used
+ * for passing on chassis-internal metainformation such as
+ * QOS profiles, etc..
+ */
+#define DLT_JUNIPER_MONITOR     164
+
+/*
+ * Reserved for BACnet MS/TP.
+ */
+#define DLT_BACNET_MS_TP	165
+
+/*
+ * Another PPP variant as per request from Karsten Keil <kkeil@suse.de>.
+ *
+ * This is used in some OSes to allow a kernel socket filter to distinguish
+ * between incoming and outgoing packets, on a socket intended to
+ * supply pppd with outgoing packets so it can do dial-on-demand and
+ * hangup-on-lack-of-demand; incoming packets are filtered out so they
+ * don't cause pppd to hold the connection up (you don't want random
+ * input packets such as port scans, packets from old lost connections,
+ * etc. to force the connection to stay up).
+ *
+ * The first byte of the PPP header (0xff03) is modified to accomodate
+ * the direction - 0x00 = IN, 0x01 = OUT.
+ */
+#define DLT_PPP_PPPD		166
+
+/*
+ * Names for backwards compatibility with older versions of some PPP
+ * software; new software should use DLT_PPP_PPPD.
+ */
+#define DLT_PPP_WITH_DIRECTION	DLT_PPP_PPPD
+#define DLT_LINUX_PPP_WITHDIRECTION	DLT_PPP_PPPD
+
+/*
+ * Juniper-private data link type, as per request from
+ * Hannes Gredler <hannes@juniper.net>.  The DLT_s are used
+ * for passing on chassis-internal metainformation such as
+ * QOS profiles, cookies, etc..
+ */
+#define DLT_JUNIPER_PPPOE       167
+#define DLT_JUNIPER_PPPOE_ATM   168
+
+#define DLT_GPRS_LLC		169	/* GPRS LLC */
+#define DLT_GPF_T		170	/* GPF-T (ITU-T G.7041/Y.1303) */
+#define DLT_GPF_F		171	/* GPF-F (ITU-T G.7041/Y.1303) */
+
+/*
+ * Requested by Oolan Zimmer <oz@gcom.com> for use in Gcom's T1/E1 line
+ * monitoring equipment.
+ */
+#define DLT_GCOM_T1E1		172
+#define DLT_GCOM_SERIAL		173
+
+/*
+ * Juniper-private data link type, as per request from
+ * Hannes Gredler <hannes@juniper.net>.  The DLT_ is used
+ * for internal communication to Physical Interface Cards (PIC)
+ */
+#define DLT_JUNIPER_PIC_PEER    174
+
+/*
+ * Link types requested by Gregor Maier <gregor@endace.com> of Endace
+ * Measurement Systems.  They add an ERF header (see
+ * http://www.endace.com/support/EndaceRecordFormat.pdf) in front of
+ * the link-layer header.
+ */
+#define DLT_ERF_ETH		175	/* Ethernet */
+#define DLT_ERF_POS		176	/* Packet-over-SONET */
+
+/*
+ * Requested by Daniele Orlandi <daniele@orlandi.com> for raw LAPD
+ * for vISDN (http://www.orlandi.com/visdn/).  Its link-layer header
+ * includes additional information before the LAPD header, so it's
+ * not necessarily a generic LAPD header.
+ */
+#define DLT_LINUX_LAPD		177
+
+/*
+ * Juniper-private data link type, as per request from
+ * Hannes Gredler <hannes@juniper.net>. 
+ * The DLT_ are used for prepending meta-information
+ * like interface index, interface name
+ * before standard Ethernet, PPP, Frelay & C-HDLC Frames
+ */
+#define DLT_JUNIPER_ETHER       178
+#define DLT_JUNIPER_PPP         179
+#define DLT_JUNIPER_FRELAY      180
+#define DLT_JUNIPER_CHDLC       181
+
+/*
+ * Multi Link Frame Relay (FRF.16)
+ */
+#define DLT_MFR                 182
+
+/*
+ * Juniper-private data link type, as per request from
+ * Hannes Gredler <hannes@juniper.net>. 
+ * The DLT_ is used for internal communication with a
+ * voice Adapter Card (PIC)
+ */
+#define DLT_JUNIPER_VP          183
+
+/*
+ * Arinc 429 frames.
+ * DLT_ requested by Gianluca Varenni <gianluca.varenni@cacetech.com>.
+ * Every frame contains a 32bit A429 label.
+ * More documentation on Arinc 429 can be found at
+ * http://www.condoreng.com/support/downloads/tutorials/ARINCTutorial.pdf
+ */
+#define DLT_A429                184
+
+/*
+ * Arinc 653 Interpartition Communication messages.
+ * DLT_ requested by Gianluca Varenni <gianluca.varenni@cacetech.com>.
+ * Please refer to the A653-1 standard for more information.
+ */
+#define DLT_A653_ICM            185
+
+/*
+ * USB packets, beginning with a USB setup header; requested by
+ * Paolo Abeni <paolo.abeni@email.it>.
+ */
+#define DLT_USB			186
+
+/*
+ * Bluetooth HCI UART transport layer (part H:4); requested by
+ * Paolo Abeni.
+ */
+#define DLT_BLUETOOTH_HCI_H4	187
+
+/*
+ * IEEE 802.16 MAC Common Part Sublayer; requested by Maria Cruz
+ * <cruz_petagay@bah.com>.
+ */
+#define DLT_IEEE802_16_MAC_CPS	188
+
+/*
+ * USB packets, beginning with a Linux USB header; requested by
+ * Paolo Abeni <paolo.abeni@email.it>.
+ */
+#define DLT_USB_LINUX		189
+
+/*
+ * Controller Area Network (CAN) v. 2.0B packets.
+ * DLT_ requested by Gianluca Varenni <gianluca.varenni@cacetech.com>.
+ * Used to dump CAN packets coming from a CAN Vector board.
+ * More documentation on the CAN v2.0B frames can be found at
+ * http://www.can-cia.org/downloads/?269
+ */
+#define DLT_CAN20B              190
+
+/*
+ * IEEE 802.15.4, with address fields padded, as is done by Linux
+ * drivers; requested by Juergen Schimmer.
+ */
+#define DLT_IEEE802_15_4_LINUX	191
+
+/*
+ * Per Packet Information encapsulated packets.
+ * DLT_ requested by Gianluca Varenni <gianluca.varenni@cacetech.com>.
+ */
+#define DLT_PPI			192
+
+/*
+ * Header for 802.16 MAC Common Part Sublayer plus a radiotap radio header;
+ * requested by Charles Clancy.
+ */
+#define DLT_IEEE802_16_MAC_CPS_RADIO	193
+
+/*
+ * Juniper-private data link type, as per request from
+ * Hannes Gredler <hannes@juniper.net>. 
+ * The DLT_ is used for internal communication with a
+ * integrated service module (ISM).
+ */
+#define DLT_JUNIPER_ISM         194
+
+/*
+ * IEEE 802.15.4, exactly as it appears in the spec (no padding, no
+ * nothing); requested by Mikko Saarnivala <mikko.saarnivala@sensinode.com>.
+ */
+#define DLT_IEEE802_15_4	195
+
+/*
+ * Various link-layer types, with a pseudo-header, for SITA
+ * (http://www.sita.aero/); requested by Fulko Hew (fulko.hew@gmail.com).
+ */
+#define DLT_SITA		196
+
+/*
+ * Various link-layer types, with a pseudo-header, for Endace DAG cards;
+ * encapsulates Endace ERF records.  Requested by Stephen Donnelly
+ * <stephen@endace.com>.
+ */
+#define DLT_ERF			197
+
+/*
+ * Special header prepended to Ethernet packets when capturing from a
+ * u10 Networks board.  Requested by Phil Mulholland
+ * <phil@u10networks.com>.
+ */
+#define DLT_RAIF1		198
+
+/*
+ * IPMB packet for IPMI, beginning with the I2C slave address, followed
+ * by the netFn and LUN, etc..  Requested by Chanthy Toeung
+ * <chanthy.toeung@ca.kontron.com>.
+ */
+#define DLT_IPMB		199
+
+/*
+ * Juniper-private data link type, as per request from
+ * Hannes Gredler <hannes@juniper.net>. 
+ * The DLT_ is used for capturing data on a secure tunnel interface.
+ */
+#define DLT_JUNIPER_ST          200
+
+/*
+ * Bluetooth HCI UART transport layer (part H:4), with pseudo-header
+ * that includes direction information; requested by Paolo Abeni.
+ */
+#define DLT_BLUETOOTH_HCI_H4_WITH_PHDR	201
+
+/*
+ * AX.25 packet with a 1-byte KISS header; see
+ *
+ *	http://www.ax25.net/kiss.htm
+ *
+ * as per Richard Stearn <richard@rns-stearn.demon.co.uk>.
+ */
+#define DLT_AX25_KISS		202
+
+/*
+ * LAPD packets from an ISDN channel, starting with the address field,
+ * with no pseudo-header.
+ * Requested by Varuna De Silva <varunax@gmail.com>.
+ */
+#define DLT_LAPD		203
+
+/*
+ * Variants of various link-layer headers, with a one-byte direction
+ * pseudo-header prepended - zero means "received by this host",
+ * non-zero (any non-zero value) means "sent by this host" - as per
+ * Will Barker <w.barker@zen.co.uk>.
+ */
+#define DLT_PPP_WITH_DIR	204	/* PPP - don't confuse with DLT_PPP_WITH_DIRECTION */
+#define DLT_C_HDLC_WITH_DIR	205	/* Cisco HDLC */
+#define DLT_FRELAY_WITH_DIR	206	/* Frame Relay */
+#define DLT_LAPB_WITH_DIR	207	/* LAPB */
+
+/*
+ * 208 is reserved for an as-yet-unspecified proprietary link-layer
+ * type, as requested by Will Barker.
+ */
+
+/*
+ * IPMB with a Linux-specific pseudo-header; as requested by Alexey Neyman
+ * <avn@pigeonpoint.com>.
+ */
+#define DLT_IPMB_LINUX		209
+
+/*
+ * FlexRay automotive bus - http://www.flexray.com/ - as requested
+ * by Hannes Kaelber <hannes.kaelber@x2e.de>.
+ */
+#define DLT_FLEXRAY		210
+
+/*
+ * Media Oriented Systems Transport (MOST) bus for multimedia
+ * transport - http://www.mostcooperation.com/ - as requested
+ * by Hannes Kaelber <hannes.kaelber@x2e.de>.
+ */
+#define DLT_MOST		211
+
+/*
+ * Local Interconnect Network (LIN) bus for vehicle networks -
+ * http://www.lin-subbus.org/ - as requested by Hannes Kaelber
+ * <hannes.kaelber@x2e.de>.
+ */
+#define DLT_LIN			212
+
+/*
+ * X2E-private data link type used for serial line capture,
+ * as requested by Hannes Kaelber <hannes.kaelber@x2e.de>.
+ */
+#define DLT_X2E_SERIAL		213
+
+/*
+ * X2E-private data link type used for the Xoraya data logger
+ * family, as requested by Hannes Kaelber <hannes.kaelber@x2e.de>.
+ */
+#define DLT_X2E_XORAYA		214
+
+/*
+ * IEEE 802.15.4, exactly as it appears in the spec (no padding, no
+ * nothing), but with the PHY-level data for non-ASK PHYs (4 octets
+ * of 0 as preamble, one octet of SFD, one octet of frame length+
+ * reserved bit, and then the MAC-layer data, starting with the
+ * frame control field).
+ *
+ * Requested by Max Filippov <jcmvbkbc@gmail.com>.
+ */
+#define DLT_IEEE802_15_4_NONASK_PHY	215
+
+
+/*
+ * DLT and savefile link type values are split into a class and
+ * a member of that class.  A class value of 0 indicates a regular
+ * DLT_/LINKTYPE_ value.
+ */
+#define DLT_CLASS(x)		((x) & 0x03ff0000)
+
+/*
+ * NetBSD-specific generic "raw" link type.  The class value indicates
+ * that this is the generic raw type, and the lower 16 bits are the
+ * address family we're dealing with.  Those values are NetBSD-specific;
+ * do not assume that they correspond to AF_ values for your operating
+ * system.
+ */
+#define	DLT_CLASS_NETBSD_RAWAF	0x02240000
+#define	DLT_NETBSD_RAWAF(af)	(DLT_CLASS_NETBSD_RAWAF | (af))
+#define	DLT_NETBSD_RAWAF_AF(x)	((x) & 0x0000ffff)
+#define	DLT_IS_NETBSD_RAWAF(x)	(DLT_CLASS(x) == DLT_CLASS_NETBSD_RAWAF)
+
+
+/*
+ * The instruction encodings.
+ */
+/* instruction classes */
+#define BPF_CLASS(code) ((code) & 0x07)
+#define		BPF_LD		0x00
+#define		BPF_LDX		0x01
+#define		BPF_ST		0x02
+#define		BPF_STX		0x03
+#define		BPF_ALU		0x04
+#define		BPF_JMP		0x05
+#define		BPF_RET		0x06
+#define		BPF_MISC	0x07
+
+/* ld/ldx fields */
+#define BPF_SIZE(code)	((code) & 0x18)
+#define		BPF_W		0x00
+#define		BPF_H		0x08
+#define		BPF_B		0x10
+#define BPF_MODE(code)	((code) & 0xe0)
+#define		BPF_IMM 	0x00
+#define		BPF_ABS		0x20
+#define		BPF_IND		0x40
+#define		BPF_MEM		0x60
+#define		BPF_LEN		0x80
+#define		BPF_MSH		0xa0
+
+/* alu/jmp fields */
+#define BPF_OP(code)	((code) & 0xf0)
+#define		BPF_ADD		0x00
+#define		BPF_SUB		0x10
+#define		BPF_MUL		0x20
+#define		BPF_DIV		0x30
+#define		BPF_OR		0x40
+#define		BPF_AND		0x50
+#define		BPF_LSH		0x60
+#define		BPF_RSH		0x70
+#define		BPF_NEG		0x80
+#define		BPF_JA		0x00
+#define		BPF_JEQ		0x10
+#define		BPF_JGT		0x20
+#define		BPF_JGE		0x30
+#define		BPF_JSET	0x40
+#define BPF_SRC(code)	((code) & 0x08)
+#define		BPF_K		0x00
+#define		BPF_X		0x08
+
+/* ret - BPF_K and BPF_X also apply */
+#define BPF_RVAL(code)	((code) & 0x18)
+#define		BPF_A		0x10
+
+/* misc */
+#define BPF_MISCOP(code) ((code) & 0xf8)
+#define		BPF_TAX		0x00
+#define		BPF_TXA		0x80
+
+/*
+ * The instruction data structure.
+ */
+struct bpf_insn {
+	u_short	code;
+	u_char 	jt;
+	u_char 	jf;
+	bpf_u_int32 k;
+};
+
+/*
+ * Macros for insn array initializers.
+ */
+#define BPF_STMT(code, k) { (u_short)(code), 0, 0, k }
+#define BPF_JUMP(code, k, jt, jf) { (u_short)(code), jt, jf, k }
+
+#if __STDC__ || defined(__cplusplus)
+extern int bpf_validate(const struct bpf_insn *, int);
+extern u_int bpf_filter(const struct bpf_insn *, const u_char *, u_int, u_int);
+#else
+extern int bpf_validate();
+extern u_int bpf_filter();
+#endif
+
+/*
+ * Number of scratch memory words (for BPF_LD|BPF_MEM and BPF_ST).
+ */
+#define BPF_MEMWORDS 16
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap/namedb.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap/namedb.h
new file mode 100644
index 000000000..9002c7509
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap/namedb.h
@@ -0,0 +1,89 @@
+/*
+ * Copyright (c) 1994, 1996
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the Computer Systems
+ *	Engineering Group at Lawrence Berkeley Laboratory.
+ * 4. Neither the name of the University nor of the Laboratory may be used
+ *    to endorse or promote products derived from this software without
+ *    specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#) $Header: /tcpdump/master/libpcap/pcap/namedb.h,v 1.1 2006/10/04 18:09:22 guy Exp $ (LBL)
+ */
+
+#ifndef lib_pcap_namedb_h
+#define lib_pcap_namedb_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * As returned by the pcap_next_etherent()
+ * XXX this stuff doesn't belong in this interface, but this
+ * library already must do name to address translation, so
+ * on systems that don't have support for /etc/ethers, we
+ * export these hooks since they'll
+ */
+struct pcap_etherent {
+	u_char addr[6];
+	char name[122];
+};
+#ifndef PCAP_ETHERS_FILE
+#define PCAP_ETHERS_FILE "/etc/ethers"
+#endif
+struct	pcap_etherent *pcap_next_etherent(FILE *);
+u_char *pcap_ether_hostton(const char*);
+u_char *pcap_ether_aton(const char *);
+
+bpf_u_int32 **pcap_nametoaddr(const char *);
+#ifdef INET6
+struct addrinfo *pcap_nametoaddrinfo(const char *);
+#endif
+bpf_u_int32 pcap_nametonetaddr(const char *);
+
+int	pcap_nametoport(const char *, int *, int *);
+int	pcap_nametoportrange(const char *, int *, int *, int *);
+int	pcap_nametoproto(const char *);
+int	pcap_nametoeproto(const char *);
+int	pcap_nametollc(const char *);
+/*
+ * If a protocol is unknown, PROTO_UNDEF is returned.
+ * Also, pcap_nametoport() returns the protocol along with the port number.
+ * If there are ambiguous entried in /etc/services (i.e. domain
+ * can be either tcp or udp) PROTO_UNDEF is returned.
+ */
+#define PROTO_UNDEF		-1
+
+/* XXX move these to pcap-int.h? */
+int __pcap_atodn(const char *, bpf_u_int32 *);
+int __pcap_atoin(const char *, bpf_u_int32 *);
+u_short	__pcap_nametodnaddr(const char *);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap/pcap.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap/pcap.h
new file mode 100644
index 000000000..ad8fc40ac
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap/pcap.h
@@ -0,0 +1,407 @@
+/* -*- Mode: c; tab-width: 8; indent-tabs-mode: 1; c-basic-offset: 8; -*- */
+/*
+ * Copyright (c) 1993, 1994, 1995, 1996, 1997
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the Computer Systems
+ *	Engineering Group at Lawrence Berkeley Laboratory.
+ * 4. Neither the name of the University nor of the Laboratory may be used
+ *    to endorse or promote products derived from this software without
+ *    specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#) $Header: /tcpdump/master/libpcap/pcap/pcap.h,v 1.4.2.11 2008-10-06 15:38:39 gianluca Exp $ (LBL)
+ */
+
+#ifndef lib_pcap_pcap_h
+#define lib_pcap_pcap_h
+
+#if defined(WIN32)
+  #include <pcap-stdinc.h>
+#elif defined(MSDOS)
+  #include <sys/types.h>
+  #include <sys/socket.h>  /* u_int, u_char etc. */
+#else /* UN*X */
+  #include <sys/types.h>
+  #include <sys/time.h>
+#endif /* WIN32/MSDOS/UN*X */
+
+#ifndef PCAP_DONT_INCLUDE_PCAP_BPF_H
+#include <pcap/bpf.h>
+#endif
+
+#include <stdio.h>
+
+#ifdef HAVE_REMOTE
+	// We have to define the SOCKET here, although it has been defined in sockutils.h
+	// This is to avoid the distribution of the 'sockutils.h' file around
+	// (for example in the WinPcap developer's pack)
+	#ifndef SOCKET
+		#ifdef WIN32
+			#define SOCKET unsigned int
+		#else
+			#define SOCKET int
+		#endif
+	#endif
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define PCAP_VERSION_MAJOR 2
+#define PCAP_VERSION_MINOR 4
+
+#define PCAP_ERRBUF_SIZE 256
+
+/*
+ * Compatibility for systems that have a bpf.h that
+ * predates the bpf typedefs for 64-bit support.
+ */
+#if BPF_RELEASE - 0 < 199406
+typedef	int bpf_int32;
+typedef	u_int bpf_u_int32;
+#endif
+
+typedef struct pcap pcap_t;
+typedef struct pcap_dumper pcap_dumper_t;
+typedef struct pcap_if pcap_if_t;
+typedef struct pcap_addr pcap_addr_t;
+
+/*
+ * The first record in the file contains saved values for some
+ * of the flags used in the printout phases of tcpdump.
+ * Many fields here are 32 bit ints so compilers won't insert unwanted
+ * padding; these files need to be interchangeable across architectures.
+ *
+ * Do not change the layout of this structure, in any way (this includes
+ * changes that only affect the length of fields in this structure).
+ *
+ * Also, do not change the interpretation of any of the members of this
+ * structure, in any way (this includes using values other than
+ * LINKTYPE_ values, as defined in "savefile.c", in the "linktype"
+ * field).
+ *
+ * Instead:
+ *
+ *	introduce a new structure for the new format, if the layout
+ *	of the structure changed;
+ *
+ *	send mail to "tcpdump-workers@lists.tcpdump.org", requesting
+ *	a new magic number for your new capture file format, and, when
+ *	you get the new magic number, put it in "savefile.c";
+ *
+ *	use that magic number for save files with the changed file
+ *	header;
+ *
+ *	make the code in "savefile.c" capable of reading files with
+ *	the old file header as well as files with the new file header
+ *	(using the magic number to determine the header format).
+ *
+ * Then supply the changes as a patch at
+ *
+ *	http://sourceforge.net/projects/libpcap/
+ *
+ * so that future versions of libpcap and programs that use it (such as
+ * tcpdump) will be able to read your new capture file format.
+ */
+struct pcap_file_header {
+	bpf_u_int32 magic;
+	u_short version_major;
+	u_short version_minor;
+	bpf_int32 thiszone;	/* gmt to local correction */
+	bpf_u_int32 sigfigs;	/* accuracy of timestamps */
+	bpf_u_int32 snaplen;	/* max length saved portion of each pkt */
+	bpf_u_int32 linktype;	/* data link type (LINKTYPE_*) */
+};
+
+/*
+ * Macros for the value returned by pcap_datalink_ext().
+ * 
+ * If LT_FCS_LENGTH_PRESENT(x) is true, the LT_FCS_LENGTH(x) macro
+ * gives the FCS length of packets in the capture.
+ */
+#define LT_FCS_LENGTH_PRESENT(x)	((x) & 0x04000000)
+#define LT_FCS_LENGTH(x)		(((x) & 0xF0000000) >> 28)
+#define LT_FCS_DATALINK_EXT(x)		((((x) & 0xF) << 28) | 0x04000000)
+
+typedef enum {
+       PCAP_D_INOUT = 0,
+       PCAP_D_IN,
+       PCAP_D_OUT
+} pcap_direction_t;
+
+/*
+ * Generic per-packet information, as supplied by libpcap.
+ *
+ * The time stamp can and should be a "struct timeval", regardless of
+ * whether your system supports 32-bit tv_sec in "struct timeval",
+ * 64-bit tv_sec in "struct timeval", or both if it supports both 32-bit
+ * and 64-bit applications.  The on-disk format of savefiles uses 32-bit
+ * tv_sec (and tv_usec); this structure is irrelevant to that.  32-bit
+ * and 64-bit versions of libpcap, even if they're on the same platform,
+ * should supply the appropriate version of "struct timeval", even if
+ * that's not what the underlying packet capture mechanism supplies.
+ */
+struct pcap_pkthdr {
+	struct timeval ts;	/* time stamp */
+	bpf_u_int32 caplen;	/* length of portion present */
+	bpf_u_int32 len;	/* length this packet (off wire) */
+};
+
+/*
+ * As returned by the pcap_stats()
+ */
+struct pcap_stat {
+	u_int ps_recv;		/* number of packets received */
+	u_int ps_drop;		/* number of packets dropped */
+	u_int ps_ifdrop;	/* drops by interface XXX not yet supported */
+#ifdef HAVE_REMOTE
+	u_int ps_capt;		/* number of packets that are received by the application; please get rid off the Win32 ifdef */
+	u_int ps_sent;		/* number of packets sent by the server on the network */
+	u_int ps_netdrop;	/* number of packets lost on the network */
+#endif /* HAVE_REMOTE */
+};
+
+#ifdef MSDOS
+/*
+ * As returned by the pcap_stats_ex()
+ */
+struct pcap_stat_ex {
+       u_long  rx_packets;        /* total packets received       */
+       u_long  tx_packets;        /* total packets transmitted    */
+       u_long  rx_bytes;          /* total bytes received         */
+       u_long  tx_bytes;          /* total bytes transmitted      */
+       u_long  rx_errors;         /* bad packets received         */
+       u_long  tx_errors;         /* packet transmit problems     */
+       u_long  rx_dropped;        /* no space in Rx buffers       */
+       u_long  tx_dropped;        /* no space available for Tx    */
+       u_long  multicast;         /* multicast packets received   */
+       u_long  collisions;
+
+       /* detailed rx_errors: */
+       u_long  rx_length_errors;
+       u_long  rx_over_errors;    /* receiver ring buff overflow  */
+       u_long  rx_crc_errors;     /* recv'd pkt with crc error    */
+       u_long  rx_frame_errors;   /* recv'd frame alignment error */
+       u_long  rx_fifo_errors;    /* recv'r fifo overrun          */
+       u_long  rx_missed_errors;  /* recv'r missed packet         */
+
+       /* detailed tx_errors */
+       u_long  tx_aborted_errors;
+       u_long  tx_carrier_errors;
+       u_long  tx_fifo_errors;
+       u_long  tx_heartbeat_errors;
+       u_long  tx_window_errors;
+     };
+#endif
+
+/*
+ * Item in a list of interfaces.
+ */
+struct pcap_if {
+	struct pcap_if *next;
+	char *name;		/* name to hand to "pcap_open_live()" */
+	char *description;	/* textual description of interface, or NULL */
+	struct pcap_addr *addresses;
+	bpf_u_int32 flags;	/* PCAP_IF_ interface flags */
+};
+
+#define PCAP_IF_LOOPBACK	0x00000001	/* interface is loopback */
+
+/*
+ * Representation of an interface address.
+ */
+struct pcap_addr {
+	struct pcap_addr *next;
+	struct sockaddr *addr;		/* address */
+	struct sockaddr *netmask;	/* netmask for that address */
+	struct sockaddr *broadaddr;	/* broadcast address for that address */
+	struct sockaddr *dstaddr;	/* P2P destination address for that address */
+};
+
+typedef void (*pcap_handler)(u_char *, const struct pcap_pkthdr *,
+			     const u_char *);
+
+/*
+ * Error codes for the pcap API.
+ * These will all be negative, so you can check for the success or
+ * failure of a call that returns these codes by checking for a
+ * negative value.
+ */
+#define PCAP_ERROR			-1	/* generic error code */
+#define PCAP_ERROR_BREAK		-2	/* loop terminated by pcap_breakloop */
+#define PCAP_ERROR_NOT_ACTIVATED	-3	/* the capture needs to be activated */
+#define PCAP_ERROR_ACTIVATED		-4	/* the operation can't be performed on already activated captures */
+#define PCAP_ERROR_NO_SUCH_DEVICE	-5	/* no such device exists */
+#define PCAP_ERROR_RFMON_NOTSUP		-6	/* this device doesn't support rfmon (monitor) mode */
+#define PCAP_ERROR_NOT_RFMON		-7	/* operation supported only in monitor mode */
+#define PCAP_ERROR_PERM_DENIED		-8	/* no permission to open the device */
+#define PCAP_ERROR_IFACE_NOT_UP		-9	/* interface isn't up */
+
+/*
+ * Warning codes for the pcap API.
+ * These will all be positive and non-zero, so they won't look like
+ * errors.
+ */
+#define PCAP_WARNING			1	/* generic warning code */
+#define PCAP_WARNING_PROMISC_NOTSUP	2	/* this device doesn't support promiscuous mode */
+
+char	*pcap_lookupdev(char *);
+int	pcap_lookupnet(const char *, bpf_u_int32 *, bpf_u_int32 *, char *);
+
+pcap_t	*pcap_create(const char *, char *);
+int	pcap_set_snaplen(pcap_t *, int);
+int	pcap_set_promisc(pcap_t *, int);
+int	pcap_can_set_rfmon(pcap_t *);
+int	pcap_set_rfmon(pcap_t *, int);
+int	pcap_set_timeout(pcap_t *, int);
+int	pcap_set_buffer_size(pcap_t *, int);
+int	pcap_activate(pcap_t *);
+
+pcap_t	*pcap_open_live(const char *, int, int, int, char *);
+pcap_t	*pcap_open_dead(int, int);
+pcap_t	*pcap_open_offline(const char *, char *);
+#if defined(WIN32)
+pcap_t  *pcap_hopen_offline(intptr_t, char *);
+#if !defined(LIBPCAP_EXPORTS)
+#define pcap_fopen_offline(f,b) \
+	pcap_hopen_offline(_get_osfhandle(_fileno(f)), b)
+#else /*LIBPCAP_EXPORTS*/
+static pcap_t *pcap_fopen_offline(FILE *, char *);
+#endif
+#else /*WIN32*/
+pcap_t	*pcap_fopen_offline(FILE *, char *);
+#endif /*WIN32*/
+
+void	pcap_close(pcap_t *);
+int	pcap_loop(pcap_t *, int, pcap_handler, u_char *);
+int	pcap_dispatch(pcap_t *, int, pcap_handler, u_char *);
+const u_char*
+	pcap_next(pcap_t *, struct pcap_pkthdr *);
+int 	pcap_next_ex(pcap_t *, struct pcap_pkthdr **, const u_char **);
+void	pcap_breakloop(pcap_t *);
+int	pcap_stats(pcap_t *, struct pcap_stat *);
+int	pcap_setfilter(pcap_t *, struct bpf_program *);
+int 	pcap_setdirection(pcap_t *, pcap_direction_t);
+int	pcap_getnonblock(pcap_t *, char *);
+int	pcap_setnonblock(pcap_t *, int, char *);
+int	pcap_inject(pcap_t *, const void *, size_t);
+int	pcap_sendpacket(pcap_t *, const u_char *, int);
+const char *pcap_statustostr(int);
+const char *pcap_strerror(int);
+char	*pcap_geterr(pcap_t *);
+void	pcap_perror(pcap_t *, char *);
+int	pcap_compile(pcap_t *, struct bpf_program *, const char *, int,
+	    bpf_u_int32);
+int	pcap_compile_nopcap(int, int, struct bpf_program *,
+	    const char *, int, bpf_u_int32);
+void	pcap_freecode(struct bpf_program *);
+int	pcap_offline_filter(struct bpf_program *, const struct pcap_pkthdr *,
+	    const u_char *);
+int	pcap_datalink(pcap_t *);
+int	pcap_datalink_ext(pcap_t *);
+int	pcap_list_datalinks(pcap_t *, int **);
+int	pcap_set_datalink(pcap_t *, int);
+void	pcap_free_datalinks(int *);
+int	pcap_datalink_name_to_val(const char *);
+const char *pcap_datalink_val_to_name(int);
+const char *pcap_datalink_val_to_description(int);
+int	pcap_snapshot(pcap_t *);
+int	pcap_is_swapped(pcap_t *);
+int	pcap_major_version(pcap_t *);
+int	pcap_minor_version(pcap_t *);
+
+/* XXX */
+FILE	*pcap_file(pcap_t *);
+int	pcap_fileno(pcap_t *);
+
+pcap_dumper_t *pcap_dump_open(pcap_t *, const char *);
+pcap_dumper_t *pcap_dump_fopen(pcap_t *, FILE *fp);
+FILE	*pcap_dump_file(pcap_dumper_t *);
+long	pcap_dump_ftell(pcap_dumper_t *);
+int	pcap_dump_flush(pcap_dumper_t *);
+void	pcap_dump_close(pcap_dumper_t *);
+void	pcap_dump(u_char *, const struct pcap_pkthdr *, const u_char *);
+
+int	pcap_findalldevs(pcap_if_t **, char *);
+void	pcap_freealldevs(pcap_if_t *);
+
+const char *pcap_lib_version(void);
+
+/* XXX this guy lives in the bpf tree */
+u_int	bpf_filter(const struct bpf_insn *, const u_char *, u_int, u_int);
+int	bpf_validate(const struct bpf_insn *f, int len);
+char	*bpf_image(const struct bpf_insn *, int);
+void	bpf_dump(const struct bpf_program *, int);
+
+#if defined(WIN32)
+
+/*
+ * Win32 definitions
+ */
+
+int pcap_setbuff(pcap_t *p, int dim);
+int pcap_setmode(pcap_t *p, int mode);
+int pcap_setmintocopy(pcap_t *p, int size);
+
+#ifdef WPCAP
+/* Include file with the wpcap-specific extensions */
+#include <Win32-Extensions.h>
+#endif /* WPCAP */
+
+#define MODE_CAPT 0
+#define MODE_STAT 1
+#define MODE_MON 2
+
+#elif defined(MSDOS)
+
+/*
+ * MS-DOS definitions
+ */
+
+int  pcap_stats_ex (pcap_t *, struct pcap_stat_ex *);
+void pcap_set_wait (pcap_t *p, void (*yield)(void), int wait);
+u_long pcap_mac_packets (void);
+
+#else /* UN*X */
+
+/*
+ * UN*X definitions
+ */
+
+int	pcap_get_selectable_fd(pcap_t *);
+
+#endif /* WIN32/MSDOS/UN*X */
+
+#ifdef HAVE_REMOTE
+/* Includes most of the public stuff that is needed for the remote capture */
+#include <remote-ext.h>
+#endif	 /* HAVE_REMOTE */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap/sll.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap/sll.h
new file mode 100644
index 000000000..e9d5452af
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap/sll.h
@@ -0,0 +1,129 @@
+/*-
+ * Copyright (c) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from the Stanford/CMU enet packet filter,
+ * (net/enet.c) distributed as part of 4.3BSD, and code contributed
+ * to Berkeley by Steven McCanne and Van Jacobson both of Lawrence
+ * Berkeley Laboratory.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed by the University of
+ *      California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#) $Header: /tcpdump/master/libpcap/pcap/sll.h,v 1.2.2.1 2008-05-30 01:36:06 guy Exp $ (LBL)
+ */
+
+/*
+ * For captures on Linux cooked sockets, we construct a fake header
+ * that includes:
+ *
+ *	a 2-byte "packet type" which is one of:
+ *
+ *		LINUX_SLL_HOST		packet was sent to us
+ *		LINUX_SLL_BROADCAST	packet was broadcast
+ *		LINUX_SLL_MULTICAST	packet was multicast
+ *		LINUX_SLL_OTHERHOST	packet was sent to somebody else
+ *		LINUX_SLL_OUTGOING	packet was sent *by* us;
+ *
+ *	a 2-byte Ethernet protocol field;
+ *
+ *	a 2-byte link-layer type;
+ *
+ *	a 2-byte link-layer address length;
+ *
+ *	an 8-byte source link-layer address, whose actual length is
+ *	specified by the previous value.
+ *
+ * All fields except for the link-layer address are in network byte order.
+ *
+ * DO NOT change the layout of this structure, or change any of the
+ * LINUX_SLL_ values below.  If you must change the link-layer header
+ * for a "cooked" Linux capture, introduce a new DLT_ type (ask
+ * "tcpdump-workers@lists.tcpdump.org" for one, so that you don't give it
+ * a value that collides with a value already being used), and use the
+ * new header in captures of that type, so that programs that can
+ * handle DLT_LINUX_SLL captures will continue to handle them correctly
+ * without any change, and so that capture files with different headers
+ * can be told apart and programs that read them can dissect the
+ * packets in them.
+ */
+
+#ifndef lib_pcap_sll_h
+#define lib_pcap_sll_h
+
+/*
+ * A DLT_LINUX_SLL fake link-layer header.
+ */
+#define SLL_HDR_LEN	16		/* total header length */
+#define SLL_ADDRLEN	8		/* length of address field */
+
+struct sll_header {
+	u_int16_t sll_pkttype;		/* packet type */
+	u_int16_t sll_hatype;		/* link-layer address type */
+	u_int16_t sll_halen;		/* link-layer address length */
+	u_int8_t sll_addr[SLL_ADDRLEN];	/* link-layer address */
+	u_int16_t sll_protocol;		/* protocol */
+};
+
+/*
+ * The LINUX_SLL_ values for "sll_pkttype"; these correspond to the
+ * PACKET_ values on Linux, but are defined here so that they're
+ * available even on systems other than Linux, and so that they
+ * don't change even if the PACKET_ values change.
+ */
+#define LINUX_SLL_HOST		0
+#define LINUX_SLL_BROADCAST	1
+#define LINUX_SLL_MULTICAST	2
+#define LINUX_SLL_OTHERHOST	3
+#define LINUX_SLL_OUTGOING	4
+
+/*
+ * The LINUX_SLL_ values for "sll_protocol"; these correspond to the
+ * ETH_P_ values on Linux, but are defined here so that they're
+ * available even on systems other than Linux.  We assume, for now,
+ * that the ETH_P_ values won't change in Linux; if they do, then:
+ *
+ *	if we don't translate them in "pcap-linux.c", capture files
+ *	won't necessarily be readable if captured on a system that
+ *	defines ETH_P_ values that don't match these values;
+ *
+ *	if we do translate them in "pcap-linux.c", that makes life
+ *	unpleasant for the BPF code generator, as the values you test
+ *	for in the kernel aren't the values that you test for when
+ *	reading a capture file, so the fixup code run on BPF programs
+ *	handed to the kernel ends up having to do more work.
+ *
+ * Add other values here as necessary, for handling packet types that
+ * might show up on non-Ethernet, non-802.x networks.  (Not all the ones
+ * in the Linux "if_ether.h" will, I suspect, actually show up in
+ * captures.)
+ */
+#define LINUX_SLL_P_802_3	0x0001	/* Novell 802.3 frames without 802.2 LLC header */
+#define LINUX_SLL_P_802_2	0x0004	/* 802.2 frames (not D/I/X Ethernet) */
+
+#endif
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap/usb.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap/usb.h
new file mode 100644
index 000000000..adcd19c05
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap/usb.h
@@ -0,0 +1,90 @@
+/*
+ * Copyright (c) 2006 Paolo Abeni (Italy)
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote 
+ * products derived from this software without specific prior written 
+ * permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Basic USB data struct
+ * By Paolo Abeni <paolo.abeni@email.it>
+ *
+ * @(#) $Header: /tcpdump/master/libpcap/pcap/usb.h,v 1.6 2007/09/22 02:06:08 guy Exp $
+ */
+ 
+#ifndef _PCAP_USB_STRUCTS_H__
+#define _PCAP_USB_STRUCTS_H__
+
+/* 
+ * possible transfer mode
+ */
+#define URB_TRANSFER_IN   0x80
+#define URB_ISOCHRONOUS   0x0
+#define URB_INTERRUPT     0x1
+#define URB_CONTROL       0x2
+#define URB_BULK          0x3
+
+/*
+ * possible event type
+ */
+#define URB_SUBMIT        'S'
+#define URB_COMPLETE      'C'
+#define URB_ERROR         'E'
+
+/*
+ * USB setup header as defined in USB specification.
+ * Appears at the front of each packet in DLT_USB captures.
+ */
+typedef struct _usb_setup {
+	u_int8_t bmRequestType;
+	u_int8_t bRequest;
+	u_int16_t wValue;
+	u_int16_t wIndex;
+	u_int16_t wLength;
+} pcap_usb_setup;
+
+
+/*
+ * Header prepended by linux kernel to each event.
+ * Appears at the front of each packet in DLT_USB_LINUX captures.
+ */
+typedef struct _usb_header {
+	u_int64_t id;
+	u_int8_t event_type;
+	u_int8_t transfer_type;
+	u_int8_t endpoint_number;
+	u_int8_t device_address;
+	u_int16_t bus_id;
+	char setup_flag;/*if !=0 the urb setup header is not present*/
+	char data_flag; /*if !=0 no urb data is present*/
+	int64_t ts_sec;
+	int32_t ts_usec;
+	int32_t status;
+	u_int32_t urb_len;
+	u_int32_t data_len; /* amount of urb data really present in this event*/
+	pcap_usb_setup setup;
+} pcap_usb_header;
+
+
+#endif
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap/vlan.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap/vlan.h
new file mode 100644
index 000000000..b0cb7949b
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/pcap/vlan.h
@@ -0,0 +1,46 @@
+/*-
+ * Copyright (c) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *      This product includes software developed by the University of
+ *      California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#) $Header: /tcpdump/master/libpcap/pcap/vlan.h,v 1.1.2.2 2008-08-06 07:45:59 guy Exp $
+ */
+
+#ifndef lib_pcap_vlan_h
+#define lib_pcap_vlan_h
+
+struct vlan_tag {
+	u_int16_t	vlan_tpid;		/* ETH_P_8021Q */
+	u_int16_t	vlan_tci;		/* VLAN TCI */
+};
+
+#define VLAN_TAG_LEN	4
+
+#endif
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/remote-ext.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/remote-ext.h
new file mode 100644
index 000000000..35a2fff6c
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/remote-ext.h
@@ -0,0 +1,444 @@
+/*
+ * Copyright (c) 2002 - 2003
+ * NetGroup, Politecnico di Torino (Italy)
+ * All rights reserved.
+ * 
+ * Redistribution and use in source and binary forms, with or without 
+ * modification, are permitted provided that the following conditions 
+ * are met:
+ * 
+ * 1. Redistributions of source code must retain the above copyright 
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright 
+ * notice, this list of conditions and the following disclaimer in the 
+ * documentation and/or other materials provided with the distribution. 
+ * 3. Neither the name of the Politecnico di Torino nor the names of its 
+ * contributors may be used to endorse or promote products derived from 
+ * this software without specific prior written permission. 
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ * 
+ */
+
+
+#ifndef __REMOTE_EXT_H__
+#define __REMOTE_EXT_H__
+
+
+#ifndef HAVE_REMOTE
+#error Please do not include this file directly. Just define HAVE_REMOTE and then include pcap.h
+#endif
+
+// Definition for Microsoft Visual Studio
+#if _MSC_VER > 1000
+#pragma once
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*!
+	\file remote-ext.h
+
+	The goal of this file it to include most of the new definitions that should be
+	placed into the pcap.h file.
+
+	It includes all new definitions (structures and functions like pcap_open().
+    Some of the functions are not really a remote feature, but, right now, 
+	they are placed here.
+*/
+
+
+
+// All this stuff is public
+/*! \addtogroup remote_struct
+	\{
+*/
+
+
+
+
+/*!
+	\brief Defines the maximum buffer size in which address, port, interface names are kept.
+
+	In case the adapter name or such is larger than this value, it is truncated.
+	This is not used by the user; however it must be aware that an hostname / interface
+	name longer than this value will be truncated.
+*/
+#define PCAP_BUF_SIZE 1024
+
+
+/*! \addtogroup remote_source_ID
+	\{
+*/
+
+
+/*!
+	\brief Internal representation of the type of source in use (file, 
+	remote/local interface).
+
+	This indicates a file, i.e. the user want to open a capture from a local file.
+*/
+#define PCAP_SRC_FILE 2
+/*!
+	\brief Internal representation of the type of source in use (file, 
+	remote/local interface).
+
+	This indicates a local interface, i.e. the user want to open a capture from 
+	a local interface. This does not involve the RPCAP protocol.
+*/
+#define PCAP_SRC_IFLOCAL 3
+/*!
+	\brief Internal representation of the type of source in use (file, 
+	remote/local interface).
+
+	This indicates a remote interface, i.e. the user want to open a capture from 
+	an interface on a remote host. This does involve the RPCAP protocol.
+*/
+#define PCAP_SRC_IFREMOTE 4
+
+/*!
+	\}
+*/
+
+
+
+/*! \addtogroup remote_source_string
+
+	The formats allowed by the pcap_open() are the following:
+	- file://path_and_filename [opens a local file]
+	- rpcap://devicename [opens the selected device devices available on the local host, without using the RPCAP protocol]
+	- rpcap://host/devicename [opens the selected device available on a remote host]
+	- rpcap://host:port/devicename [opens the selected device available on a remote host, using a non-standard port for RPCAP]
+	- adaptername [to open a local adapter; kept for compability, but it is strongly discouraged]
+	- (NULL) [to open the first local adapter; kept for compability, but it is strongly discouraged]
+
+	The formats allowed by the pcap_findalldevs_ex() are the following:
+	- file://folder/ [lists all the files in the given folder]
+	- rpcap:// [lists all local adapters]
+	- rpcap://host:port/ [lists the devices available on a remote host]
+
+	Referring to the 'host' and 'port' paramters, they can be either numeric or literal. Since
+	IPv6 is fully supported, these are the allowed formats:
+
+	- host (literal): e.g. host.foo.bar
+	- host (numeric IPv4): e.g. 10.11.12.13
+	- host (numeric IPv4, IPv6 style): e.g. [10.11.12.13]
+	- host (numeric IPv6): e.g. [1:2:3::4]
+	- port: can be either numeric (e.g. '80') or literal (e.g. 'http')
+
+	Here you find some allowed examples:
+	- rpcap://host.foo.bar/devicename [everything literal, no port number]
+	- rpcap://host.foo.bar:1234/devicename [everything literal, with port number]
+	- rpcap://10.11.12.13/devicename [IPv4 numeric, no port number]
+	- rpcap://10.11.12.13:1234/devicename [IPv4 numeric, with port number]
+	- rpcap://[10.11.12.13]:1234/devicename [IPv4 numeric with IPv6 format, with port number]
+	- rpcap://[1:2:3::4]/devicename [IPv6 numeric, no port number]
+	- rpcap://[1:2:3::4]:1234/devicename [IPv6 numeric, with port number]
+	- rpcap://[1:2:3::4]:http/devicename [IPv6 numeric, with literal port number]
+	
+	\{
+*/
+
+
+/*!
+	\brief String that will be used to determine the type of source in use (file,
+	remote/local interface).
+
+	This string will be prepended to the interface name in order to create a string
+	that contains all the information required to open the source.
+
+	This string indicates that the user wants to open a capture from a local file.
+*/
+#define PCAP_SRC_FILE_STRING "file://"
+/*!
+	\brief String that will be used to determine the type of source in use (file,
+	remote/local interface).
+
+	This string will be prepended to the interface name in order to create a string
+	that contains all the information required to open the source.
+
+	This string indicates that the user wants to open a capture from a network interface.
+	This string does not necessarily involve the use of the RPCAP protocol. If the
+	interface required resides on the local host, the RPCAP protocol is not involved
+	and the local functions are used.
+*/
+#define PCAP_SRC_IF_STRING "rpcap://"
+
+/*!
+	\}
+*/
+
+
+
+
+
+/*!
+	\addtogroup remote_open_flags
+	\{
+*/
+
+/*!
+	\brief Defines if the adapter has to go in promiscuous mode.
+
+	It is '1' if you have to open the adapter in promiscuous mode, '0' otherwise.
+	Note that even if this parameter is false, the interface could well be in promiscuous
+	mode for some other reason (for example because another capture process with 
+	promiscuous mode enabled is currently using that interface).
+	On on Linux systems with 2.2 or later kernels (that have the "any" device), this
+	flag does not work on the "any" device; if an argument of "any" is supplied,
+	the 'promisc' flag is ignored.
+*/
+#define PCAP_OPENFLAG_PROMISCUOUS		1
+
+/*!
+	\brief Defines if the data trasfer (in case of a remote
+	capture) has to be done with UDP protocol.
+
+	If it is '1' if you want a UDP data connection, '0' if you want
+	a TCP data connection; control connection is always TCP-based.
+	A UDP connection is much lighter, but it does not guarantee that all
+	the captured packets arrive to the client workstation. Moreover, 
+	it could be harmful in case of network congestion.
+	This flag is meaningless if the source is not a remote interface.
+	In that case, it is simply ignored.
+*/
+#define PCAP_OPENFLAG_DATATX_UDP			2
+
+
+/*!
+	\brief Defines if the remote probe will capture its own generated traffic.
+
+	In case the remote probe uses the same interface to capture traffic and to send
+	data back to the caller, the captured traffic includes the RPCAP traffic as well.
+	If this flag is turned on, the RPCAP traffic is excluded from the capture, so that
+	the trace returned back to the collector is does not include this traffic.
+*/
+#define PCAP_OPENFLAG_NOCAPTURE_RPCAP	4
+
+/*!
+	\brief Defines if the local adapter will capture its own generated traffic.
+
+	This flag tells the underlying capture driver to drop the packets that were sent by itself. 
+	This is usefult when building applications like bridges, that should ignore the traffic
+	they just sent.
+*/
+#define PCAP_OPENFLAG_NOCAPTURE_LOCAL	8
+
+/*!
+	\brief This flag configures the adapter for maximum responsiveness.
+
+	In presence of a large value for nbytes, WinPcap waits for the arrival of several packets before 
+	copying the data to the user. This guarantees a low number of system calls, i.e. lower processor usage, 
+	i.e. better performance, which is good for applications like sniffers. If the user sets the 
+	PCAP_OPENFLAG_MAX_RESPONSIVENESS flag, the capture driver will copy the packets as soon as the application 
+	is ready to receive them. This is suggested for real time applications (like, for example, a bridge) 
+	that need the best responsiveness.*/
+#define PCAP_OPENFLAG_MAX_RESPONSIVENESS	16
+
+/*!
+	\}
+*/
+
+
+/*!
+	\addtogroup remote_samp_methods
+	\{
+*/
+
+/*!
+	\brief No sampling has to be done on the current capture.
+
+	In this case, no sampling algorithms are applied to the current capture.
+*/
+#define PCAP_SAMP_NOSAMP	0
+
+/*!
+	\brief It defines that only 1 out of N packets must be returned to the user.
+
+	In this case, the 'value' field of the 'pcap_samp' structure indicates the
+	number of packets (minus 1) that must be discarded before one packet got accepted.
+	In other words, if 'value = 10', the first packet is returned to the caller, while
+	the following 9 are discarded.
+*/
+#define PCAP_SAMP_1_EVERY_N	1
+
+/*!
+	\brief It defines that we have to return 1 packet every N milliseconds.
+
+	In this case, the 'value' field of the 'pcap_samp' structure indicates the 'waiting
+	time' in milliseconds before one packet got accepted.
+	In other words, if 'value = 10', the first packet is returned to the caller; the next 
+	returned one will be the first packet that arrives when 10ms have elapsed. 
+*/
+#define PCAP_SAMP_FIRST_AFTER_N_MS 2
+
+/*!
+	\}
+*/
+
+
+/*!
+	\addtogroup remote_auth_methods
+	\{
+*/
+
+/*!
+	\brief It defines the NULL authentication.
+
+	This value has to be used within the 'type' member of the pcap_rmtauth structure.
+	The 'NULL' authentication has to be equal to 'zero', so that old applications
+	can just put every field of struct pcap_rmtauth to zero, and it does work.
+*/
+#define RPCAP_RMTAUTH_NULL 0
+/*!
+	\brief It defines the username/password authentication.
+
+	With this type of authentication, the RPCAP protocol will use the username/
+	password provided to authenticate the user on the remote machine. If the
+	authentication is successful (and the user has the right to open network devices)
+	the RPCAP connection will continue; otherwise it will be dropped.
+
+	This value has to be used within the 'type' member of the pcap_rmtauth structure.
+*/
+#define RPCAP_RMTAUTH_PWD 1
+
+/*!
+	\}
+*/
+
+
+
+
+/*!
+
+	\brief This structure keeps the information needed to autheticate
+	the user on a remote machine.
+	
+	The remote machine can either grant or refuse the access according 
+	to the information provided.
+	In case the NULL authentication is required, both 'username' and
+	'password' can be NULL pointers.
+	
+	This structure is meaningless if the source is not a remote interface;
+	in that case, the functions which requires such a structure can accept
+	a NULL pointer as well.
+*/
+struct pcap_rmtauth
+{
+	/*!
+		\brief Type of the authentication required.
+
+		In order to provide maximum flexibility, we can support different types
+		of authentication based on the value of this 'type' variable. The currently 
+		supported authentication methods are defined into the
+		\link remote_auth_methods Remote Authentication Methods Section\endlink.
+
+	*/
+	int type;
+	/*!
+		\brief Zero-terminated string containing the username that has to be 
+		used on the remote machine for authentication.
+		
+		This field is meaningless in case of the RPCAP_RMTAUTH_NULL authentication
+		and it can be NULL.
+	*/
+	char *username;
+	/*!
+		\brief Zero-terminated string containing the password that has to be 
+		used on the remote machine for authentication.
+		
+		This field is meaningless in case of the RPCAP_RMTAUTH_NULL authentication
+		and it can be NULL.
+	*/
+	char *password;
+};
+
+
+/*!
+	\brief This structure defines the information related to sampling.
+
+	In case the sampling is requested, the capturing device should read
+	only a subset of the packets coming from the source. The returned packets depend
+	on the sampling parameters.
+
+	\warning The sampling process is applied <strong>after</strong> the filtering process.
+	In other words, packets are filtered first, then the sampling process selects a
+	subset of the 'filtered' packets and it returns them to the caller.
+*/
+struct pcap_samp
+{
+	/*!
+		Method used for sampling. Currently, the supported methods are listed in the
+		\link remote_samp_methods Sampling Methods Section\endlink.
+	*/
+	int method;
+
+	/*!
+		This value depends on the sampling method defined. For its meaning, please check
+		at the \link remote_samp_methods Sampling Methods Section\endlink.
+	*/
+	int value;
+};
+
+
+
+
+//! Maximum lenght of an host name (needed for the RPCAP active mode)
+#define RPCAP_HOSTLIST_SIZE 1024
+
+
+/*!
+	\}
+*/ // end of public documentation
+
+
+// Exported functions
+
+
+
+/** \name New WinPcap functions
+
+	This section lists the new functions that are able to help considerably in writing
+	WinPcap programs because of their easiness of use.
+ */
+//\{
+pcap_t *pcap_open(const char *source, int snaplen, int flags, int read_timeout, struct pcap_rmtauth *auth, char *errbuf);
+int pcap_createsrcstr(char *source, int type, const char *host, const char *port, const char *name, char *errbuf);
+int pcap_parsesrcstr(const char *source, int *type, char *host, char *port, char *name, char *errbuf);
+int pcap_findalldevs_ex(char *source, struct pcap_rmtauth *auth, pcap_if_t **alldevs, char *errbuf);
+struct pcap_samp *pcap_setsampling(pcap_t *p);
+
+//\}
+// End of new winpcap functions
+
+
+
+/** \name Remote Capture functions
+ */
+//\{ 
+SOCKET pcap_remoteact_accept(const char *address, const char *port, const char *hostlist, char *connectinghost, struct pcap_rmtauth *auth, char *errbuf);
+int pcap_remoteact_list(char *hostlist, char sep, int size, char *errbuf);
+int pcap_remoteact_close(const char *host, char *errbuf);
+void pcap_remoteact_cleanup();
+//\}
+// End of remote capture functions
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif
+
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/wpcap.lib b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/wpcap.lib
new file mode 100644
index 000000000..f832e0445
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/WinPCap/wpcap.lib
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/main.c b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/main.c
new file mode 100644
index 000000000..f88041487
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Integration/Full-TCP-Suite/main.c
@@ -0,0 +1,345 @@
+/*
+* FreeRTOS
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+ /**
+  * @file main.c
+  * @brief Implements the main function.
+  */
+
+  /* FreeRTOS include. */
+#include <FreeRTOS.h>
+#include "task.h"
+
+/* Standard includes. */
+#include <signal.h>
+#include <conio.h>
+#include <setjmp.h>
+#include <time.h>
+#include <windows.h>
+
+/* Test runner includes. */
+#include "test_runner.h"
+
+/* System application includes. */
+#include "FreeRTOS_IP.h"
+#include "FreeRTOS_Sockets.h"
+#include "FreeRTOS_DHCP.h"
+#include "demo_logging.h"
+#include "errhandlingapi.h"
+//#include "iot_system_init.h"
+
+//#include "aws_dev_mode_key_provisioning.h"
+
+/* Unity includes. */
+#include "unity.h"
+
+/* Define a name that will be used for LLMNR and NBNS searches. Once running,
+ * you can "ping RTOSDemo" instead of pinging the IP address, which is useful when
+ * using DHCP. */
+#define mainHOST_NAME                  "TestRunner"
+#define mainDEVICE_NICK_NAME           "windows_TestRunner"
+
+
+#define TEST_RUNNER_TASK_STACK_SIZE    10000
+#define FIRST_EXCEPTION_HANDLER        1
+ /* Windows-NT VectoredHandler callback function. */
+static LONG CALLBACK prvExceptionHandler(_In_ PEXCEPTION_POINTERS ExceptionInfo);
+jmp_buf xMark; /* Address for long jump to jump to. */
+
+/*-----------------------------------------------------------*/
+
+/* Notes if the trace is running or not. */
+static BaseType_t xTraceRunning = pdTRUE;
+
+/* Default MAC address configuration.  The demo creates a virtual network
+ * connection that uses this MAC address by accessing the raw Ethernet data
+ * to and from a real network connection on the host PC.  See the
+ * configNETWORK_INTERFACE_TO_USE definition for information on how to configure
+ * the real network connection to use. */
+const uint8_t ucMACAddress[6] =
+{
+    configMAC_ADDR0,
+    configMAC_ADDR1,
+    configMAC_ADDR2,
+    configMAC_ADDR3,
+    configMAC_ADDR4,
+    configMAC_ADDR5
+};
+
+/* The default IP and MAC address used by the demo.  The address configuration
+ * defined here will be used if ipconfigUSE_DHCP is 0, or if ipconfigUSE_DHCP is
+ * 1 but a DHCP server could not be contacted.  See the online documentation for
+ * more information.  In both cases the node can be discovered using
+ * "ping RTOSDemo". */
+static const uint8_t ucIPAddress[4] =
+{
+    configIP_ADDR0,
+    configIP_ADDR1,
+    configIP_ADDR2,
+    configIP_ADDR3
+};
+static const uint8_t ucNetMask[4] =
+{
+    configNET_MASK0,
+    configNET_MASK1,
+    configNET_MASK2,
+    configNET_MASK3
+};
+static const uint8_t ucGatewayAddress[4] =
+{
+    configGATEWAY_ADDR0,
+    configGATEWAY_ADDR1,
+    configGATEWAY_ADDR2,
+    configGATEWAY_ADDR3
+};
+static const uint8_t ucDNSServerAddress[4] =
+{
+    configDNS_SERVER_ADDR0,
+    configDNS_SERVER_ADDR1,
+    configDNS_SERVER_ADDR2,
+    configDNS_SERVER_ADDR3
+};
+
+/* Use by the pseudo random number generator. */
+static UBaseType_t ulNextRand;
+
+/*-----------------------------------------------------------*/
+int main(void)
+{
+    /* Register the Windows VEH for exceptions. */
+    AddVectoredExceptionHandler(FIRST_EXCEPTION_HANDLER, prvExceptionHandler);
+
+    /* Initialize logging for libraries that depend on it. */
+    vLoggingInit(
+        pdTRUE,
+        pdFALSE,
+        pdFALSE,
+        0,
+        0);
+
+    /* Initialize the network interface.
+     *
+     ***NOTE*** Tasks that use the network are created in the network event hook
+     * when the network is connected and ready for use (see the definition of
+     * vApplicationIPNetworkEventHook() below).  The address values passed in here
+     * are used if ipconfigUSE_DHCP is set to 0, or if ipconfigUSE_DHCP is set to 1
+     * but a DHCP server cannot be contacted. */
+    FreeRTOS_printf(("FreeRTOS_IPInit\n"));
+    FreeRTOS_IPInit(
+        ucIPAddress,
+        ucNetMask,
+        ucGatewayAddress,
+        ucDNSServerAddress,
+        ucMACAddress);
+
+    vTaskStartScheduler();
+
+    return 0;
+}
+/*-----------------------------------------------------------*/
+
+void vApplicationIPNetworkEventHook(eIPCallbackEvent_t eNetworkEvent)
+{
+    static BaseType_t xTasksAlreadyCreated = pdFALSE;
+
+    /* If the network has just come up...*/
+    if ((eNetworkEvent == eNetworkUp) && (xTasksAlreadyCreated == pdFALSE))
+    {
+        xTaskCreate(TEST_RUNNER_RunTests_task,
+            "TestRunner",
+            TEST_RUNNER_TASK_STACK_SIZE,
+            NULL,
+            tskIDLE_PRIORITY, NULL);
+
+        xTasksAlreadyCreated = pdTRUE;
+    }
+}
+
+/*-----------------------------------------------------------*/
+
+static LONG CALLBACK prvExceptionHandler(_In_ PEXCEPTION_POINTERS ExceptionInfo)
+{
+    /* Remove warning about unused parameter */
+    ( void ) ExceptionInfo;
+    /* If this function is called during a test, the test immediately fails. */
+    TEST_FAIL();
+
+    return EXCEPTION_CONTINUE_EXECUTION;
+}
+
+/*-----------------------------------------------------------*/
+
+#if ( ( ipconfigUSE_LLMNR != 0 ) || \
+    ( ipconfigUSE_NBNS != 0 ) ||    \
+    ( ipconfigDHCP_REGISTER_HOSTNAME == 1 ) )
+
+const char* pcApplicationHostnameHook(void)
+{
+    /* This function will be called during the DHCP: the machine will be registered
+     * with an IP address plus this name. */
+    return mainHOST_NAME;
+}
+
+#endif /* if ( ( ipconfigUSE_LLMNR != 0 ) || ( ipconfigUSE_NBNS != 0 ) || ( ipconfigDHCP_REGISTER_HOSTNAME == 1 ) ) */
+/*-----------------------------------------------------------*/
+
+#if ( ipconfigUSE_LLMNR != 0 ) || ( ipconfigUSE_NBNS != 0 )
+
+BaseType_t xApplicationDNSQueryHook(const char* pcName)
+{
+    BaseType_t xReturn;
+
+    /* Determine if a name lookup is for this node.  Two names are given
+     * to this node: that returned by pcApplicationHostnameHook() and that set
+     * by mainDEVICE_NICK_NAME. */
+    if (_stricmp(pcName, pcApplicationHostnameHook()) == 0)
+    {
+        xReturn = pdPASS;
+    }
+    else if (_stricmp(pcName, mainDEVICE_NICK_NAME) == 0)
+    {
+        xReturn = pdPASS;
+    }
+    else
+    {
+        xReturn = pdFAIL;
+    }
+
+    return xReturn;
+}
+
+#endif /* if ( ipconfigUSE_LLMNR != 0 ) || ( ipconfigUSE_NBNS != 0 ) */
+/*-----------------------------------------------------------*/
+
+void vApplicationIdleHook(void)
+{
+    const uint32_t ulMSToSleep = 1;
+    const TickType_t xKitHitCheckPeriod = pdMS_TO_TICKS(1000UL);
+    static TickType_t xTimeNow, xLastTimeCheck = 0;
+
+    /* vApplicationIdleHook() will only be called if configUSE_IDLE_HOOK is set
+     * to 1 in FreeRTOSConfig.h.  It will be called on each iteration of the idle
+     * task.  It is essential that code added to this hook function never attempts
+     * to block in any way (for example, call xQueueReceive() with a block time
+     * specified, or call vTaskDelay()).  If application tasks make use of the
+     * vTaskDelete() API function to delete themselves then it is also important
+     * that vApplicationIdleHook() is permitted to return to its calling function,
+     * because it is the responsibility of the idle task to clean up memory
+     * allocated by the kernel to any task that has since deleted itself. */
+
+     /* _kbhit() is a Windows system function, and system functions can cause
+      * crashes if they somehow block the FreeRTOS thread.  The call to _kbhit()
+      * can be removed if it causes problems.  Limiting the frequency of calls to
+      * _kbhit() should minimize the potential for issues. */
+    xTimeNow = xTaskGetTickCount();
+
+    if ((xTimeNow - xLastTimeCheck) > xKitHitCheckPeriod)
+    {
+        
+
+        /* Uncomment the print line to get confirmation that tests are still
+         * running if you suspect a previous run resulted in a crash. */
+         /* configPRINTF( ( "Running...\n" ) ); /**/
+        xLastTimeCheck = xTimeNow;
+    }
+
+    /* This is just a trivial example of an idle hook.  It is called on each
+     * cycle of the idle task if configUSE_IDLE_HOOK is set to 1 in
+     * FreeRTOSConfig.h.  It must *NOT* attempt to block.  In this case the
+     * idle task just sleeps to lower the CPU usage. */
+    Sleep(ulMSToSleep);
+}
+/*-----------------------------------------------------------*/
+
+void vAssertCalled(const char* pcFile,
+    uint32_t ulLine)
+{
+    const uint32_t ulLongSleep = 1000UL;
+    volatile uint32_t ulBlockVariable = 0UL;
+    volatile char* pcFileName = (volatile char*)pcFile;
+    volatile uint32_t ulLineNumber = ulLine;
+
+    (void)pcFileName;
+    (void)ulLineNumber;
+
+    printf("vAssertCalled %s, %ld\n", pcFile, (long)ulLine);
+    fflush(stdout);
+
+    /* Setting ulBlockVariable to a non-zero value in the debugger will allow
+     * this function to be exited. */
+    taskDISABLE_INTERRUPTS();
+    {
+        while (ulBlockVariable == 0UL)
+        {
+            Sleep(ulLongSleep);
+        }
+    }
+    taskENABLE_INTERRUPTS();
+}
+/*-----------------------------------------------------------*/
+
+void getUserCmd(char* pucUserCmd)
+{
+    char cTmp;
+
+    scanf("%c%c", pucUserCmd, &cTmp);
+}
+/*-----------------------------------------------------------*/
+
+UBaseType_t uxRand( void )
+{
+    const uint32_t ulMultiplier = 0x015a4e35UL, ulIncrement = 1UL;
+
+    /* Utility function to generate a pseudo random number. */
+
+    ulNextRand = (ulMultiplier * ulNextRand) + ulIncrement;
+    return((int)(ulNextRand) & 0x7fffUL);
+}
+
+BaseType_t xApplicationGetRandomNumber( uint32_t* pulNumber )
+{
+    *pulNumber = uxRand();
+
+    return pdTRUE;
+}
+
+/*
+ * Callback that provides the inputs necessary to generate a randomized TCP
+ * Initial Sequence Number per RFC 6528.  THIS IS ONLY A DUMMY IMPLEMENTATION
+ * THAT RETURNS A PSEUDO RANDOM NUMBER SO IS NOT INTENDED FOR USE IN PRODUCTION
+ * SYSTEMS.
+ */
+extern uint32_t ulApplicationGetNextSequenceNumber(uint32_t ulSourceAddress,
+    uint16_t usSourcePort,
+    uint32_t ulDestinationAddress,
+    uint16_t usDestinationPort)
+{
+    (void)ulSourceAddress;
+    (void)usSourcePort;
+    (void)ulDestinationAddress;
+    (void)usDestinationPort;
+
+    return uxRand();
+}
\ No newline at end of file
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/FreeRTOSConfig.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/FreeRTOSConfig.h
new file mode 100644
index 000000000..a78a6413f
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/FreeRTOSConfig.h
@@ -0,0 +1,128 @@
+/*
+ * FreeRTOS Kernel V10.3.0
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.  See
+ * http://www.freertos.org/a00110.html
+ *----------------------------------------------------------*/
+
+#define configUSE_PREEMPTION					1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION	1
+#define configUSE_IDLE_HOOK						1
+#define configUSE_TICK_HOOK						1
+#define configUSE_DAEMON_TASK_STARTUP_HOOK		1
+#define configTICK_RATE_HZ						( 1000 ) /* In this non-real time simulated environment the tick frequency has to be at least a multiple of the Win32 tick frequency, and therefore very slow. */
+#define configMINIMAL_STACK_SIZE				( ( unsigned short ) 70 ) /* In this simulated case, the stack only has to hold one small structure as the real stack is part of the win32 thread. */
+#define configTOTAL_HEAP_SIZE					( ( size_t ) ( 52 * 1024 ) )
+#define configMAX_TASK_NAME_LEN					( 12 )
+#define configUSE_TRACE_FACILITY				1
+#define configUSE_16_BIT_TICKS					0
+#define configIDLE_SHOULD_YIELD					1
+#define configUSE_MUTEXES						1
+#define configCHECK_FOR_STACK_OVERFLOW			0
+#define configUSE_RECURSIVE_MUTEXES				1
+#define configQUEUE_REGISTRY_SIZE				20
+#define configUSE_MALLOC_FAILED_HOOK			1
+#define configUSE_APPLICATION_TASK_TAG			1
+#define configUSE_COUNTING_SEMAPHORES			1
+#define configUSE_ALTERNATIVE_API				0
+#define configUSE_QUEUE_SETS					1
+#define configUSE_TASK_NOTIFICATIONS			1
+#define configSUPPORT_STATIC_ALLOCATION			1
+#define configINITIAL_TICK_COUNT				( ( TickType_t ) 0 ) /* For test. */
+#define configSTREAM_BUFFER_TRIGGER_LEVEL_TEST_MARGIN 1 /* As there are a lot of tasks running. */
+
+/* Software timer related configuration options. */
+#define configUSE_TIMERS						1
+#define configTIMER_TASK_PRIORITY				( configMAX_PRIORITIES - 1 )
+#define configTIMER_QUEUE_LENGTH				20
+#define configTIMER_TASK_STACK_DEPTH			( configMINIMAL_STACK_SIZE * 2 )
+
+#define configMAX_PRIORITIES					( 7 )
+
+/* Run time stats gathering configuration options. */
+unsigned long ulGetRunTimeCounterValue( void ); /* Prototype of function that returns run time counter. */
+void vConfigureTimerForRunTimeStats( void );	/* Prototype of function that initialises the run time counter. */
+#define configGENERATE_RUN_TIME_STATS			1
+#define portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() vConfigureTimerForRunTimeStats()
+#define portGET_RUN_TIME_COUNTER_VALUE() ulGetRunTimeCounterValue()
+
+/* Co-routine related configuration options. */
+#define configUSE_CO_ROUTINES 					1
+#define configMAX_CO_ROUTINE_PRIORITIES			( 2 )
+
+/* This demo makes use of one or more example stats formatting functions.  These
+format the raw data provided by the uxTaskGetSystemState() function in to human
+readable ASCII form.  See the notes in the implementation of vTaskList() within
+FreeRTOS/Source/tasks.c for limitations. */
+#define configUSE_STATS_FORMATTING_FUNCTIONS	1
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function.  In most cases the linker will remove unused
+functions anyway. */
+#define INCLUDE_vTaskPrioritySet				1
+#define INCLUDE_uxTaskPriorityGet				1
+#define INCLUDE_vTaskDelete						1
+#define INCLUDE_vTaskCleanUpResources			0
+#define INCLUDE_vTaskSuspend					1
+#define INCLUDE_vTaskDelayUntil					1
+#define INCLUDE_vTaskDelay						1
+#define INCLUDE_uxTaskGetStackHighWaterMark		1
+#define INCLUDE_xTaskGetSchedulerState			1
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle	1
+#define INCLUDE_xTaskGetIdleTaskHandle			1
+#define INCLUDE_xTaskGetHandle					1
+#define INCLUDE_eTaskGetState					1
+#define INCLUDE_xSemaphoreGetMutexHolder		1
+#define INCLUDE_xTimerPendFunctionCall			1
+#define INCLUDE_xTaskAbortDelay					1
+
+/* It is a good idea to define configASSERT() while developing.  configASSERT()
+uses the same semantics as the standard C assert() macro. */
+extern void vAssertCalled( unsigned long ulLine, const char * const pcFileName );
+#define configASSERT( x ) if( ( x ) == 0 ) vAssertCalled( __LINE__, __FILE__ )
+
+#define configINCLUDE_MESSAGE_BUFFER_AMP_DEMO	0
+#if ( configINCLUDE_MESSAGE_BUFFER_AMP_DEMO == 1 )
+	extern void vGenerateCoreBInterrupt( void * xUpdatedMessageBuffer );
+	#define sbSEND_COMPLETED( pxStreamBuffer ) vGenerateCoreBInterrupt( pxStreamBuffer )
+#endif /* configINCLUDE_MESSAGE_BUFFER_AMP_DEMO */
+
+/* Include the FreeRTOS+Trace FreeRTOS trace macro definitions. */
+/* #include "trcRecorder.h" */
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/FreeRTOSIPConfig.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/FreeRTOSIPConfig.h
new file mode 100644
index 000000000..4bd8c3319
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/FreeRTOSIPConfig.h
@@ -0,0 +1,305 @@
+/*
+FreeRTOS Kernel V10.2.0
+Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+Permission is hereby granted, free of charge, to any person obtaining a copy of
+this software and associated documentation files (the "Software"), to deal in
+the Software without restriction, including without limitation the rights to
+use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+the Software, and to permit persons to whom the Software is furnished to do so,
+subject to the following conditions:
+The above copyright notice and this permission notice shall be included in all
+copies or substantial portions of the Software.
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ http://aws.amazon.com/freertos
+ http://www.FreeRTOS.org
+*/
+
+
+/*****************************************************************************
+*
+* See the following URL for configuration information.
+* http://www.freertos.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/TCP_IP_Configuration.html
+*
+*****************************************************************************/
+
+#ifndef FREERTOS_IP_CONFIG_H
+#define FREERTOS_IP_CONFIG_H
+
+/* Set to 1 to print out debug messages.  If ipconfigHAS_DEBUG_PRINTF is set to
+ * 1 then FreeRTOS_debug_printf should be defined to the function used to print
+ * out the debugging messages. */
+#define ipconfigHAS_DEBUG_PRINTF    0
+#if ( ipconfigHAS_DEBUG_PRINTF == 1 )
+    #define FreeRTOS_debug_printf( X )    configPRINTF( X )
+#endif
+
+/* Set to 1 to print out non debugging messages, for example the output of the
+ * FreeRTOS_netstat() command, and ping replies.  If ipconfigHAS_PRINTF is set to 1
+ * then FreeRTOS_printf should be set to the function used to print out the
+ * messages. */
+#define ipconfigHAS_PRINTF    1
+#if ( ipconfigHAS_PRINTF == 1 )
+    #define FreeRTOS_printf( X )    configPRINTF( X )
+#endif
+
+/* Define the byte order of the target MCU (the MCU FreeRTOS+TCP is executing
+ * on).  Valid options are pdFREERTOS_BIG_ENDIAN and pdFREERTOS_LITTLE_ENDIAN. */
+#define ipconfigBYTE_ORDER                         pdFREERTOS_LITTLE_ENDIAN
+
+/* If the network card/driver includes checksum offloading (IP/TCP/UDP checksums)
+ * then set ipconfigDRIVER_INCLUDED_RX_IP_CHECKSUM to 1 to prevent the software
+ * stack repeating the checksum calculations. */
+#define ipconfigDRIVER_INCLUDED_RX_IP_CHECKSUM     1
+
+/* Several API's will block until the result is known, or the action has been
+ * performed, for example FreeRTOS_send() and FreeRTOS_recv().  The timeouts can be
+ * set per socket, using setsockopt().  If not set, the times below will be
+ * used as defaults. */
+#define ipconfigSOCK_DEFAULT_RECEIVE_BLOCK_TIME    ( 5000 )
+#define ipconfigSOCK_DEFAULT_SEND_BLOCK_TIME       ( 5000 )
+
+/* Include support for DNS caching.  For TCP, having a small DNS cache is very
+ * useful.  When a cache is present, ipconfigDNS_REQUEST_ATTEMPTS can be kept low
+ * and also DNS may use small timeouts.  If a DNS reply comes in after the DNS
+ * socket has been destroyed, the result will be stored into the cache.  The next
+ * call to FreeRTOS_gethostbyname() will return immediately, without even creating
+ * a socket.
+ */
+#define ipconfigUSE_DNS_CACHE                      ( 1 )
+#define ipconfigDNS_CACHE_ADDRESSES_PER_ENTRY      ( 6 )
+#define ipconfigDNS_REQUEST_ATTEMPTS               ( 2 )
+
+/* The IP stack executes it its own task (although any application task can make
+ * use of its services through the published sockets API). ipconfigUDP_TASK_PRIORITY
+ * sets the priority of the task that executes the IP stack.  The priority is a
+ * standard FreeRTOS task priority so can take any value from 0 (the lowest
+ * priority) to (configMAX_PRIORITIES - 1) (the highest priority).
+ * configMAX_PRIORITIES is a standard FreeRTOS configuration parameter defined in
+ * FreeRTOSConfig.h, not FreeRTOSIPConfig.h. Consideration needs to be given as to
+ * the priority assigned to the task executing the IP stack relative to the
+ * priority assigned to tasks that use the IP stack. */
+#define ipconfigIP_TASK_PRIORITY                   ( configMAX_PRIORITIES - 2 )
+
+/* The size, in words (not bytes), of the stack allocated to the FreeRTOS+TCP
+ * task.  This setting is less important when the FreeRTOS Win32 simulator is used
+ * as the Win32 simulator only stores a fixed amount of information on the task
+ * stack.  FreeRTOS includes optional stack overflow detection, see:
+ * http://www.freertos.org/Stacks-and-stack-overflow-checking.html. */
+#define ipconfigIP_TASK_STACK_SIZE_WORDS           ( configMINIMAL_STACK_SIZE * 5 )
+
+/* ipconfigRAND32() is called by the IP stack to generate random numbers for
+ * things such as a DHCP transaction number or initial sequence number.  Random
+ * number generation is performed via this macro to allow applications to use their
+ * own random number generation method.  For example, it might be possible to
+ * generate a random number by sampling noise on an analogue input. */
+extern uint32_t ulRand();
+#define ipconfigRAND32()    ulRand()
+
+/* If ipconfigUSE_NETWORK_EVENT_HOOK is set to 1 then FreeRTOS+TCP will call the
+ * network event hook at the appropriate times.  If ipconfigUSE_NETWORK_EVENT_HOOK
+ * is not set to 1 then the network event hook will never be called. See:
+ * http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_UDP/API/vApplicationIPNetworkEventHook.shtml.
+ */
+#define ipconfigUSE_NETWORK_EVENT_HOOK           1
+
+/* Sockets have a send block time attribute.  If FreeRTOS_sendto() is called but
+ * a network buffer cannot be obtained then the calling task is held in the Blocked
+ * state (so other tasks can continue to executed) until either a network buffer
+ * becomes available or the send block time expires.  If the send block time expires
+ * then the send operation is aborted.  The maximum allowable send block time is
+ * capped to the value set by ipconfigMAX_SEND_BLOCK_TIME_TICKS.  Capping the
+ * maximum allowable send block time prevents prevents a deadlock occurring when
+ * all the network buffers are in use and the tasks that process (and subsequently
+ * free) the network buffers are themselves blocked waiting for a network buffer.
+ * ipconfigMAX_SEND_BLOCK_TIME_TICKS is specified in RTOS ticks.  A time in
+ * milliseconds can be converted to a time in ticks by dividing the time in
+ * milliseconds by portTICK_PERIOD_MS. */
+#define ipconfigUDP_MAX_SEND_BLOCK_TIME_TICKS    ( 5000U / portTICK_PERIOD_MS )
+
+/* If ipconfigUSE_DHCP is 1 then FreeRTOS+TCP will attempt to retrieve an IP
+ * address, netmask, DNS server address and gateway address from a DHCP server.  If
+ * ipconfigUSE_DHCP is 0 then FreeRTOS+TCP will use a static IP address.  The
+ * stack will revert to using the static IP address even when ipconfigUSE_DHCP is
+ * set to 1 if a valid configuration cannot be obtained from a DHCP server for any
+ * reason.  The static configuration used is that passed into the stack by the
+ * FreeRTOS_IPInit() function call. */
+#define ipconfigUSE_DHCP                         1
+#define ipconfigDHCP_REGISTER_HOSTNAME           1
+#define ipconfigDHCP_USES_UNICAST                1
+
+/* If ipconfigDHCP_USES_USER_HOOK is set to 1 then the application writer must
+ * provide an implementation of the DHCP callback function,
+ * xApplicationDHCPUserHook(). */
+#define ipconfigUSE_DHCP_HOOK                    0
+
+/* When ipconfigUSE_DHCP is set to 1, DHCP requests will be sent out at
+ * increasing time intervals until either a reply is received from a DHCP server
+ * and accepted, or the interval between transmissions reaches
+ * ipconfigMAXIMUM_DISCOVER_TX_PERIOD.  The IP stack will revert to using the
+ * static IP address passed as a parameter to FreeRTOS_IPInit() if the
+ * re-transmission time interval reaches ipconfigMAXIMUM_DISCOVER_TX_PERIOD without
+ * a DHCP reply being received. */
+#define ipconfigMAXIMUM_DISCOVER_TX_PERIOD \
+    ( 120000U / portTICK_PERIOD_MS )
+
+/* The ARP cache is a table that maps IP addresses to MAC addresses.  The IP
+ * stack can only send a UDP message to a remove IP address if it knowns the MAC
+ * address associated with the IP address, or the MAC address of the router used to
+ * contact the remote IP address.  When a UDP message is received from a remote IP
+ * address the MAC address and IP address are added to the ARP cache.  When a UDP
+ * message is sent to a remote IP address that does not already appear in the ARP
+ * cache then the UDP message is replaced by a ARP message that solicits the
+ * required MAC address information.  ipconfigARP_CACHE_ENTRIES defines the maximum
+ * number of entries that can exist in the ARP table at any one time. */
+#define ipconfigARP_CACHE_ENTRIES                 6
+
+/* ARP requests that do not result in an ARP response will be re-transmitted a
+ * maximum of ipconfigMAX_ARP_RETRANSMISSIONS times before the ARP request is
+ * aborted. */
+#define ipconfigMAX_ARP_RETRANSMISSIONS           ( 5 )
+
+/* ipconfigMAX_ARP_AGE defines the maximum time between an entry in the ARP
+ * table being created or refreshed and the entry being removed because it is stale.
+ * New ARP requests are sent for ARP cache entries that are nearing their maximum
+ * age.  ipconfigMAX_ARP_AGE is specified in tens of seconds, so a value of 150 is
+ * equal to 1500 seconds (or 25 minutes). */
+#define ipconfigMAX_ARP_AGE                       150
+
+/* Implementing FreeRTOS_inet_addr() necessitates the use of string handling
+ * routines, which are relatively large.  To save code space the full
+ * FreeRTOS_inet_addr() implementation is made optional, and a smaller and faster
+ * alternative called FreeRTOS_inet_addr_quick() is provided.  FreeRTOS_inet_addr()
+ * takes an IP in decimal dot format (for example, "192.168.0.1") as its parameter.
+ * FreeRTOS_inet_addr_quick() takes an IP address as four separate numerical octets
+ * (for example, 192, 168, 0, 1) as its parameters.  If
+ * ipconfigINCLUDE_FULL_INET_ADDR is set to 1 then both FreeRTOS_inet_addr() and
+ * FreeRTOS_indet_addr_quick() are available.  If ipconfigINCLUDE_FULL_INET_ADDR is
+ * not set to 1 then only FreeRTOS_indet_addr_quick() is available. */
+#define ipconfigINCLUDE_FULL_INET_ADDR            1
+
+/* ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS defines the total number of network buffer that
+ * are available to the IP stack.  The total number of network buffers is limited
+ * to ensure the total amount of RAM that can be consumed by the IP stack is capped
+ * to a pre-determinable value. */
+#define ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS    60
+
+/* A FreeRTOS queue is used to send events from application tasks to the IP
+ * stack.  ipconfigEVENT_QUEUE_LENGTH sets the maximum number of events that can
+ * be queued for processing at any one time.  The event queue must be a minimum of
+ * 5 greater than the total number of network buffers. */
+#define ipconfigEVENT_QUEUE_LENGTH \
+    ( ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS + 5 )
+
+/* The address of a socket is the combination of its IP address and its port
+ * number.  FreeRTOS_bind() is used to manually allocate a port number to a socket
+ * (to 'bind' the socket to a port), but manual binding is not normally necessary
+ * for client sockets (those sockets that initiate outgoing connections rather than
+ * wait for incoming connections on a known port number).  If
+ * ipconfigALLOW_SOCKET_SEND_WITHOUT_BIND is set to 1 then calling
+ * FreeRTOS_sendto() on a socket that has not yet been bound will result in the IP
+ * stack automatically binding the socket to a port number from the range
+ * socketAUTO_PORT_ALLOCATION_START_NUMBER to 0xffff.  If
+ * ipconfigALLOW_SOCKET_SEND_WITHOUT_BIND is set to 0 then calling FreeRTOS_sendto()
+ * on a socket that has not yet been bound will result in the send operation being
+ * aborted. */
+#define ipconfigALLOW_SOCKET_SEND_WITHOUT_BIND         1
+
+/* Defines the Time To Live (TTL) values used in outgoing UDP packets. */
+#define ipconfigUDP_TIME_TO_LIVE                       128
+/* Also defined in FreeRTOSIPConfigDefaults.h. */
+#define ipconfigTCP_TIME_TO_LIVE                       128
+
+/* USE_TCP: Use TCP and all its features. */
+#define ipconfigUSE_TCP                                ( 1 )
+
+/* USE_WIN: Let TCP use windowing mechanism. */
+#define ipconfigUSE_TCP_WIN                            ( 1 )
+
+/* The MTU is the maximum number of bytes the payload of a network frame can
+ * contain.  For normal Ethernet V2 frames the maximum MTU is 1500.  Setting a
+ * lower value can save RAM, depending on the buffer management scheme used.  If
+ * ipconfigCAN_FRAGMENT_OUTGOING_PACKETS is 1 then (ipconfigNETWORK_MTU - 28) must
+ * be divisible by 8. */
+#define ipconfigNETWORK_MTU                            1200U
+
+/* Set ipconfigUSE_DNS to 1 to include a basic DNS client/resolver.  DNS is used
+ * through the FreeRTOS_gethostbyname() API function. */
+#define ipconfigUSE_DNS                                1
+
+/* If ipconfigREPLY_TO_INCOMING_PINGS is set to 1 then the IP stack will
+ * generate replies to incoming ICMP echo (ping) requests. */
+#define ipconfigREPLY_TO_INCOMING_PINGS                1
+
+/* If ipconfigSUPPORT_OUTGOING_PINGS is set to 1 then the
+ * FreeRTOS_SendPingRequest() API function is available. */
+#define ipconfigSUPPORT_OUTGOING_PINGS                 0
+
+/* If ipconfigSUPPORT_SELECT_FUNCTION is set to 1 then the FreeRTOS_select()
+ * (and associated) API function is available. */
+#define ipconfigSUPPORT_SELECT_FUNCTION                1
+
+/* If ipconfigFILTER_OUT_NON_ETHERNET_II_FRAMES is set to 1 then Ethernet frames
+ * that are not in Ethernet II format will be dropped.  This option is included for
+ * potential future IP stack developments. */
+#define ipconfigFILTER_OUT_NON_ETHERNET_II_FRAMES      1
+
+/* If ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES is set to 1 then it is the
+ * responsibility of the Ethernet interface to filter out packets that are of no
+ * interest.  If the Ethernet interface does not implement this functionality, then
+ * set ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES to 0 to have the IP stack
+ * perform the filtering instead (it is much less efficient for the stack to do it
+ * because the packet will already have been passed into the stack).  If the
+ * Ethernet driver does all the necessary filtering in hardware then software
+ * filtering can be removed by using a value other than 1 or 0. */
+#define ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES    1
+
+/* The windows simulator cannot really simulate MAC interrupts, and needs to
+ * block occasionally to allow other tasks to run. */
+#define configWINDOWS_MAC_INTERRUPT_SIMULATOR_DELAY    ( 20 / portTICK_PERIOD_MS )
+
+/* Advanced only: in order to access 32-bit fields in the IP packets with
+ * 32-bit memory instructions, all packets will be stored 32-bit-aligned,
+ * plus 16-bits. This has to do with the contents of the IP-packets: all
+ * 32-bit fields are 32-bit-aligned, plus 16-bit. */
+#define ipconfigPACKET_FILLER_SIZE                     2U
+
+/* Define the size of the pool of TCP window descriptors.  On the average, each
+ * TCP socket will use up to 2 x 6 descriptors, meaning that it can have 2 x 6
+ * outstanding packets (for Rx and Tx).  When using up to 10 TP sockets
+ * simultaneously, one could define TCP_WIN_SEG_COUNT as 120. */
+#define ipconfigTCP_WIN_SEG_COUNT                      240
+
+/* Each TCP socket has a circular buffers for Rx and Tx, which have a fixed
+ * maximum size.  Define the size of Rx buffer for TCP sockets. */
+#define ipconfigTCP_RX_BUFFER_LENGTH                   ( 10000 )
+
+/* Define the size of Tx buffer for TCP sockets. */
+#define ipconfigTCP_TX_BUFFER_LENGTH                   ( 10000 )
+
+/* When using call-back handlers, the driver may check if the handler points to
+ * real program memory (RAM or flash) or just has a random non-zero value. */
+#define ipconfigIS_VALID_PROG_ADDRESS( x )    ( ( x ) != NULL )
+
+/* Include support for TCP keep-alive messages. */
+#define ipconfigTCP_KEEP_ALIVE                   ( 1 )
+#define ipconfigTCP_KEEP_ALIVE_INTERVAL          ( 20 ) /* Seconds. */
+
+/* The socket semaphore is used to unblock the MQTT task. */
+#define ipconfigSOCKET_HAS_USER_SEMAPHORE        ( 0 )
+
+#define ipconfigSOCKET_HAS_USER_WAKE_CALLBACK    ( 1 )
+#define ipconfigUSE_CALLBACKS                    ( 0 )
+
+
+#define portINLINE
+
+void vApplicationMQTTGetKeys( const char ** ppcRootCA,
+                              const char ** ppcClientCert,
+                              const char ** ppcClientPrivateKey );
+
+#endif /* FREERTOS_IP_CONFIG_H */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/FreeRTOSIPConfigDefaults.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/FreeRTOSIPConfigDefaults.h
new file mode 100644
index 000000000..d23410f5f
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/FreeRTOSIPConfigDefaults.h
@@ -0,0 +1,569 @@
+/*
+ * FreeRTOS+TCP V2.2.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+#ifndef FREERTOS_DEFAULT_IP_CONFIG_H
+#define FREERTOS_DEFAULT_IP_CONFIG_H
+
+/* The error numbers defined in this file will be moved to the core FreeRTOS
+code in future versions of FreeRTOS - at which time the following header file
+will be removed. */
+#include "FreeRTOS_errno_TCP.h"
+
+/* This file provides default values for configuration options that are missing
+from the FreeRTOSIPConfig.h configuration header file. */
+
+
+/* Ensure defined configuration constants are using the most up to date naming. */
+#ifdef tcpconfigIP_TIME_TO_LIVE
+	#error now called: ipconfigTCP_TIME_TO_LIVE
+#endif
+
+#ifdef updconfigIP_TIME_TO_LIVE
+	#error now called: ipconfigUDP_TIME_TO_LIVE
+#endif
+
+#ifdef ipFILLER_SIZE
+	#error now called: ipconfigPACKET_FILLER_SIZE
+#endif
+
+#ifdef dnsMAX_REQUEST_ATTEMPTS
+	#error now called: ipconfigDNS_REQUEST_ATTEMPTS
+#endif
+
+#ifdef ipconfigUDP_TASK_PRIORITY
+	#error now called: ipconfigIP_TASK_PRIORITY
+#endif
+
+#ifdef ipconfigUDP_TASK_STACK_SIZE_WORDS
+	#error now called: ipconfigIP_TASK_STACK_SIZE_WORDS
+#endif
+
+#ifdef ipconfigDRIVER_INCLUDED_RX_IP_FILTERING
+	#error now called: ipconfigETHERNET_DRIVER_FILTERS_PACKETS
+#endif
+
+#ifdef ipconfigMAX_SEND_BLOCK_TIME_TICKS
+	#error now called: ipconfigUDP_MAX_SEND_BLOCK_TIME_TICKS
+#endif
+
+#ifdef ipconfigUSE_RECEIVE_CONNECT_CALLBACKS
+	#error now called: ipconfigUSE_CALLBACKS
+#endif
+
+#ifdef ipconfigNUM_NETWORK_BUFFERS
+	#error now called: ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS
+#endif
+
+#ifdef ipconfigTCP_HANG_PROT
+	#error now called: ipconfigTCP_HANG_PROTECTION
+#endif
+
+#ifdef ipconfigTCP_HANG_PROT_TIME
+	#error now called: ipconfigTCP_HANG_PROTECTION_TIME
+#endif
+
+#ifdef FreeRTOS_lprintf
+	#error now called: FreeRTOS_debug_printf
+#endif
+
+#if ( ipconfigEVENT_QUEUE_LENGTH < ( ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS + 5 ) )
+	#error The ipconfigEVENT_QUEUE_LENGTH parameter must be at least ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS + 5
+#endif
+
+#if ( ipconfigNETWORK_MTU < 46 )
+	#error ipconfigNETWORK_MTU must be at least 46.
+#endif
+
+#ifdef	ipconfigBUFFER_ALLOC_FIXED_SIZE
+	#error ipconfigBUFFER_ALLOC_FIXED_SIZE was dropped and replaced by a const value, declared in BufferAllocation[12].c
+#endif
+
+#ifdef	ipconfigNIC_SEND_PASSES_DMA
+	#error now called: ipconfigZERO_COPY_TX_DRIVER
+#endif
+
+#ifdef	HAS_TX_CRC_OFFLOADING
+	/* _HT_ As these macro names have changed, throw an error
+	if they're still defined. */
+	#error now called: ipconfigHAS_TX_CRC_OFFLOADING
+#endif
+
+#ifdef	HAS_RX_CRC_OFFLOADING
+	#error now called: ipconfigHAS_RX_CRC_OFFLOADING
+#endif
+
+#ifdef ipconfigTCP_RX_BUF_LEN
+	#error ipconfigTCP_RX_BUF_LEN is now called ipconfigTCP_RX_BUFFER_LENGTH
+#endif
+
+#ifdef ipconfigTCP_TX_BUF_LEN
+	#error ipconfigTCP_TX_BUF_LEN is now called ipconfigTCP_TX_BUFFER_LENGTH
+#endif
+
+#ifdef ipconfigDHCP_USES_USER_HOOK
+	#error ipconfigDHCP_USES_USER_HOOK and its associated callback have been superceeded - see http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/TCP_IP_Configuration.html#ipconfigUSE_DHCP_HOOK
+#endif
+
+#ifndef ipconfigUSE_TCP
+	#define	ipconfigUSE_TCP						( 1 )
+#endif
+
+#if	ipconfigUSE_TCP
+
+	/* Include support for TCP scaling windows */
+	#ifndef ipconfigUSE_TCP_WIN
+		#define ipconfigUSE_TCP_WIN				( 1 )
+	#endif
+
+	#ifndef ipconfigTCP_WIN_SEG_COUNT
+		#define	ipconfigTCP_WIN_SEG_COUNT		( 256 )
+	#endif
+
+	#ifndef ipconfigIGNORE_UNKNOWN_PACKETS
+		/* When non-zero, TCP will not send RST packets in reply to
+		TCP packets which are unknown, or out-of-order. */
+		#define ipconfigIGNORE_UNKNOWN_PACKETS	( 0 )
+	#endif
+#endif
+
+/*
+ * For debuging/logging: check if the port number is used for telnet
+ * Some events will not be logged for telnet connections
+ * because it would produce logging about the transmission of the logging...
+ * This macro will only be used if FreeRTOS_debug_printf() is defined for logging
+ */
+#ifndef ipconfigTCP_MAY_LOG_PORT
+	#define ipconfigTCP_MAY_LOG_PORT(xPort)			( ( xPort ) != 23u )
+#endif
+
+
+#ifndef	ipconfigSOCK_DEFAULT_RECEIVE_BLOCK_TIME
+	#define	ipconfigSOCK_DEFAULT_RECEIVE_BLOCK_TIME	portMAX_DELAY
+#endif
+
+#ifndef	ipconfigSOCK_DEFAULT_SEND_BLOCK_TIME
+	#define	ipconfigSOCK_DEFAULT_SEND_BLOCK_TIME	portMAX_DELAY
+#endif
+
+
+#ifndef	ipconfigDNS_RECEIVE_BLOCK_TIME_TICKS
+	#define	ipconfigDNS_RECEIVE_BLOCK_TIME_TICKS	pdMS_TO_TICKS( 500u )
+#endif
+
+#ifndef	ipconfigDNS_SEND_BLOCK_TIME_TICKS
+	#define	ipconfigDNS_SEND_BLOCK_TIME_TICKS		pdMS_TO_TICKS( 500u )
+#endif
+/*
+ * FreeRTOS debug logging routine (proposal)
+ * The macro will be called in the printf() style. Users can define
+ * their own logging routine as:
+ *
+ *     #define FreeRTOS_debug_printf( MSG )			my_printf MSG
+ *
+ * The FreeRTOS_debug_printf() must be thread-safe but does not have to be
+ * interrupt-safe.
+ */
+#ifdef ipconfigHAS_DEBUG_PRINTF
+	#if( ipconfigHAS_DEBUG_PRINTF == 0 )
+		#ifdef FreeRTOS_debug_printf
+			#error Do not define FreeRTOS_debug_print if ipconfigHAS_DEBUG_PRINTF is set to 0
+		#endif /* ifdef FreeRTOS_debug_printf */
+	#endif /* ( ipconfigHAS_DEBUG_PRINTF == 0 ) */
+#endif /* ifdef ipconfigHAS_DEBUG_PRINTF */
+
+#ifndef FreeRTOS_debug_printf
+    #define FreeRTOS_debug_printf( MSG )		do{} while(0)
+	#define ipconfigHAS_DEBUG_PRINTF			0
+#endif
+
+/*
+ * FreeRTOS general logging routine (proposal)
+ * Used in some utility functions such as FreeRTOS_netstat() and FreeRTOS_PrintARPCache()
+ *
+ *     #define FreeRTOS_printf( MSG )			my_printf MSG
+ *
+ * The FreeRTOS_printf() must be thread-safe but does not have to be interrupt-safe
+ */
+#ifdef ipconfigHAS_PRINTF
+	#if( ipconfigHAS_PRINTF == 0 )
+		#ifdef FreeRTOS_printf
+			#error Do not define FreeRTOS_print if ipconfigHAS_PRINTF is set to 0
+		#endif /* ifdef FreeRTOS_debug_printf */
+	#endif /* ( ipconfigHAS_PRINTF == 0 ) */
+#endif /* ifdef ipconfigHAS_PRINTF */
+
+#ifndef FreeRTOS_printf
+    #define FreeRTOS_printf( MSG )				do{} while(0)
+	#define ipconfigHAS_PRINTF					0
+#endif
+
+/*
+ * In cases where a lot of logging is produced, FreeRTOS_flush_logging( )
+ * will be called to give the logging module a chance to flush the data
+ * An example of this is the netstat command, which produces many lines of logging
+ */
+#ifndef FreeRTOS_flush_logging
+    #define FreeRTOS_flush_logging( )			do{} while(0)
+#endif
+
+/* Malloc functions. Within most applications of FreeRTOS, the couple
+ * pvPortMalloc()/vPortFree() will be used.
+ * If there is also SDRAM, the user may decide to use a different memory
+ * allocator:
+ * MallocLarge is used to allocate large TCP buffers (for Rx/Tx)
+ * MallocSocket is used to allocate the space for the sockets
+ */
+#ifndef pvPortMallocLarge
+	#define pvPortMallocLarge( x )				pvPortMalloc( x )
+#endif
+
+#ifndef vPortFreeLarge
+	#define vPortFreeLarge(ptr)					vPortFree(ptr)
+#endif
+
+#ifndef pvPortMallocSocket
+	#define pvPortMallocSocket( x )				pvPortMalloc( x )
+#endif
+
+#ifndef vPortFreeSocket
+	#define vPortFreeSocket(ptr)				vPortFree(ptr)
+#endif
+
+/*
+ * At several places within the library, random numbers are needed:
+ * - DHCP:    For creating a DHCP transaction number
+ * - TCP:     Set the Initial Sequence Number: this is the value of the first outgoing
+ *            sequence number being used when connecting to a peer.
+ *            Having a well randomised ISN is important to avoid spoofing
+ * - UDP/TCP: for setting the first port number to be used, in case a socket
+ *            uses a 'random' or anonymous port number
+ */
+#ifndef ipconfigRAND32
+	#define ipconfigRAND32() rand()
+#endif
+/* --------------------------------------------------------
+ * End of: HT Added some macro defaults for the PLUS-UDP project
+ * -------------------------------------------------------- */
+
+#ifndef ipconfigUSE_NETWORK_EVENT_HOOK
+	#define ipconfigUSE_NETWORK_EVENT_HOOK 0
+#endif
+
+#ifndef ipconfigUDP_MAX_SEND_BLOCK_TIME_TICKS
+	#define ipconfigUDP_MAX_SEND_BLOCK_TIME_TICKS ( pdMS_TO_TICKS( 20 ) )
+#endif
+
+#ifndef ipconfigARP_CACHE_ENTRIES
+	#define ipconfigARP_CACHE_ENTRIES		10
+#endif
+
+#ifndef ipconfigMAX_ARP_RETRANSMISSIONS
+	#define ipconfigMAX_ARP_RETRANSMISSIONS ( 5u )
+#endif
+
+#ifndef ipconfigMAX_ARP_AGE
+	#define ipconfigMAX_ARP_AGE			150u
+#endif
+
+#ifndef ipconfigUSE_ARP_REVERSED_LOOKUP
+	#define ipconfigUSE_ARP_REVERSED_LOOKUP		0
+#endif
+
+#ifndef ipconfigUSE_ARP_REMOVE_ENTRY
+	#define	ipconfigUSE_ARP_REMOVE_ENTRY		0
+#endif
+
+#ifndef ipconfigINCLUDE_FULL_INET_ADDR
+	#define ipconfigINCLUDE_FULL_INET_ADDR	1
+#endif
+
+#ifndef ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS
+	#define ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS		45
+#endif
+
+#ifndef ipconfigEVENT_QUEUE_LENGTH
+	#define ipconfigEVENT_QUEUE_LENGTH		( ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS + 5 )
+#endif
+
+#ifndef ipconfigALLOW_SOCKET_SEND_WITHOUT_BIND
+	#define ipconfigALLOW_SOCKET_SEND_WITHOUT_BIND 1
+#endif
+
+#ifndef ipconfigUDP_TIME_TO_LIVE
+	#define ipconfigUDP_TIME_TO_LIVE		128
+#endif
+
+#ifndef ipconfigTCP_TIME_TO_LIVE
+	#define ipconfigTCP_TIME_TO_LIVE		128
+#endif
+
+#ifndef ipconfigUDP_MAX_RX_PACKETS
+	/* Make postive to define the maximum number of packets which will be buffered
+	 * for each UDP socket.
+	 * Can be overridden with the socket option FREERTOS_SO_UDP_MAX_RX_PACKETS
+	 */
+	#define ipconfigUDP_MAX_RX_PACKETS		0u
+#endif
+
+#ifndef ipconfigUSE_DHCP
+	#define ipconfigUSE_DHCP				1
+#endif
+
+#ifndef ipconfigUSE_DHCP_HOOK
+	#define ipconfigUSE_DHCP_HOOK		0
+#endif
+
+#ifndef ipconfigDHCP_FALL_BACK_AUTO_IP
+	/*
+	 * Only applicable when DHCP is in use:
+	 * If no DHCP server responds, use "Auto-IP" : the
+	 * device will allocate a random LinkLayer IP address.
+	 */
+	#define ipconfigDHCP_FALL_BACK_AUTO_IP		( 0 )
+#endif
+
+#if( ipconfigDHCP_FALL_BACK_AUTO_IP != 0 )
+	#define ipconfigARP_USE_CLASH_DETECTION		1
+#endif
+
+#ifndef ipconfigARP_USE_CLASH_DETECTION
+	#define ipconfigARP_USE_CLASH_DETECTION		0
+#endif
+
+#ifndef ipconfigNETWORK_MTU
+	#define ipconfigNETWORK_MTU		1500
+#endif
+
+#ifndef ipconfigTCP_MSS
+	#define ipconfigTCP_MSS		( ipconfigNETWORK_MTU - ipSIZE_OF_IPv4_HEADER - ipSIZE_OF_TCP_HEADER )
+#endif
+
+/* Each TCP socket has circular stream buffers for Rx and Tx, which
+ * have a fixed maximum size.
+ * The defaults for these size are defined here, although
+ * they can be overridden at runtime by using the setsockopt() call */
+#ifndef ipconfigTCP_RX_BUFFER_LENGTH
+	#define ipconfigTCP_RX_BUFFER_LENGTH			( 4u * ipconfigTCP_MSS )	/* defaults to 5840 bytes */
+#endif
+
+/* Define the size of Tx stream buffer for TCP sockets */
+#ifndef ipconfigTCP_TX_BUFFER_LENGTH
+#	define ipconfigTCP_TX_BUFFER_LENGTH			( 4u * ipconfigTCP_MSS )	/* defaults to 5840 bytes */
+#endif
+
+#ifndef ipconfigMAXIMUM_DISCOVER_TX_PERIOD
+	#ifdef _WINDOWS_
+		#define ipconfigMAXIMUM_DISCOVER_TX_PERIOD		( pdMS_TO_TICKS( 999 ) )
+	#else
+		#define ipconfigMAXIMUM_DISCOVER_TX_PERIOD		( pdMS_TO_TICKS( 30000 ) )
+	#endif /* _WINDOWS_ */
+#endif /* ipconfigMAXIMUM_DISCOVER_TX_PERIOD */
+
+#if( ipconfigUSE_DNS == 0 )
+	/* The DNS module will not be included. */
+	#if( ( ipconfigUSE_LLMNR != 0 ) || ( ipconfigUSE_NBNS != 0 ) )
+		/* LLMNR and NBNS depend on DNS because those protocols share a lot of code. */
+		#error When either LLMNR or NBNS is used, ipconfigUSE_DNS must be defined
+	#endif
+#endif
+
+#ifndef ipconfigUSE_DNS
+	#define ipconfigUSE_DNS						1
+#endif
+
+#ifndef ipconfigDNS_REQUEST_ATTEMPTS
+	#define ipconfigDNS_REQUEST_ATTEMPTS		5
+#endif
+
+#ifndef ipconfigUSE_DNS_CACHE
+	#define ipconfigUSE_DNS_CACHE				0
+#endif
+
+#if( ipconfigUSE_DNS_CACHE != 0 )
+	#ifndef ipconfigDNS_CACHE_NAME_LENGTH
+		/* Per https://tools.ietf.org/html/rfc1035, 253 is the maximum string length
+		of a DNS name. The following default accounts for a null terminator. */
+		#define ipconfigDNS_CACHE_NAME_LENGTH   254
+	#endif
+
+	#ifndef ipconfigDNS_CACHE_ENTRIES
+		#define ipconfigDNS_CACHE_ENTRIES			1
+	#endif
+#endif /* ipconfigUSE_DNS_CACHE != 0 */
+
+#ifndef ipconfigCHECK_IP_QUEUE_SPACE
+	#define ipconfigCHECK_IP_QUEUE_SPACE			0
+#endif
+
+#ifndef ipconfigUSE_LLMNR
+	/* Include support for LLMNR: Link-local Multicast Name Resolution (non-Microsoft) */
+	#define ipconfigUSE_LLMNR					( 0 )
+#endif
+
+#ifndef ipconfigREPLY_TO_INCOMING_PINGS
+	#define ipconfigREPLY_TO_INCOMING_PINGS		1
+#endif
+
+#ifndef ipconfigSUPPORT_OUTGOING_PINGS
+	#define ipconfigSUPPORT_OUTGOING_PINGS		0
+#endif
+
+#ifndef ipconfigFILTER_OUT_NON_ETHERNET_II_FRAMES
+	#define ipconfigFILTER_OUT_NON_ETHERNET_II_FRAMES 1
+#endif
+
+#ifndef ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES
+	#define ipconfigETHERNET_DRIVER_FILTERS_FRAME_TYPES	1
+#endif
+
+#ifndef configINCLUDE_TRACE_RELATED_CLI_COMMANDS
+	#define ipconfigINCLUDE_EXAMPLE_FREERTOS_PLUS_TRACE_CALLS 0
+#else
+	#define ipconfigINCLUDE_EXAMPLE_FREERTOS_PLUS_TRACE_CALLS configINCLUDE_TRACE_RELATED_CLI_COMMANDS
+#endif
+
+#ifndef ipconfigDRIVER_INCLUDED_RX_IP_CHECKSUM
+	#define	ipconfigDRIVER_INCLUDED_RX_IP_CHECKSUM	( 0 )
+#endif
+
+#ifndef ipconfigETHERNET_DRIVER_FILTERS_PACKETS
+	#define	ipconfigETHERNET_DRIVER_FILTERS_PACKETS	( 0 )
+#endif
+
+#ifndef ipconfigWATCHDOG_TIMER
+	/* This macro will be called in every loop the IP-task makes.  It may be
+	replaced by user-code that triggers a watchdog */
+	#define ipconfigWATCHDOG_TIMER()
+#endif
+
+#ifndef ipconfigUSE_CALLBACKS
+	#define ipconfigUSE_CALLBACKS			( 0 )
+#endif
+
+#if( ipconfigUSE_CALLBACKS != 0 )
+	#ifndef ipconfigIS_VALID_PROG_ADDRESS
+		/* Replace this macro with a test returning non-zero if the memory pointer to by x
+		 * is valid memory which can contain executable code
+		 * In fact this is an extra safety measure: if a handler points to invalid memory,
+		 * it will not be called
+		 */
+		#define ipconfigIS_VALID_PROG_ADDRESS(x)		( ( x ) != NULL )
+	#endif
+#endif
+
+#ifndef ipconfigHAS_INLINE_FUNCTIONS
+	#define	ipconfigHAS_INLINE_FUNCTIONS	( 1 )
+#endif
+
+#ifndef portINLINE
+	#define portINLINE inline
+#endif
+
+#ifndef ipconfigZERO_COPY_TX_DRIVER
+	/* When non-zero, the buffers passed to the SEND routine may be passed
+	to DMA. As soon as sending is ready, the buffers must be released by
+	calling vReleaseNetworkBufferAndDescriptor(), */
+	#define ipconfigZERO_COPY_TX_DRIVER		( 0 )
+#endif
+
+#ifndef ipconfigZERO_COPY_RX_DRIVER
+	/* This define doesn't mean much to the driver, except that it makes
+	sure that pxPacketBuffer_to_NetworkBuffer() will be included. */
+	#define ipconfigZERO_COPY_RX_DRIVER		( 0 )
+#endif
+
+#ifndef ipconfigDRIVER_INCLUDED_TX_IP_CHECKSUM
+	#define ipconfigDRIVER_INCLUDED_TX_IP_CHECKSUM 0
+#endif
+
+#ifndef ipconfigDRIVER_INCLUDED_RX_IP_CHECKSUM
+	#define ipconfigDRIVER_INCLUDED_RX_IP_CHECKSUM 0
+#endif
+
+#ifndef ipconfigDHCP_REGISTER_HOSTNAME
+	#define ipconfigDHCP_REGISTER_HOSTNAME 0
+#endif
+
+#ifndef ipconfigSOCKET_HAS_USER_SEMAPHORE
+	#define ipconfigSOCKET_HAS_USER_SEMAPHORE 0
+#endif
+
+#ifndef ipconfigSOCKET_HAS_USER_WAKE_CALLBACK
+	#define ipconfigSOCKET_HAS_USER_WAKE_CALLBACK 0
+#endif
+
+#ifndef ipconfigSUPPORT_SELECT_FUNCTION
+	#define ipconfigSUPPORT_SELECT_FUNCTION 0
+#endif
+
+#ifndef ipconfigTCP_KEEP_ALIVE
+	#define ipconfigTCP_KEEP_ALIVE 0
+#endif
+
+#ifndef ipconfigDNS_USE_CALLBACKS
+	#define ipconfigDNS_USE_CALLBACKS 0
+#endif
+
+#ifndef ipconfigSUPPORT_SIGNALS
+	#define ipconfigSUPPORT_SIGNALS				0
+#endif
+
+#ifndef ipconfigUSE_NBNS
+	#define ipconfigUSE_NBNS 0
+#endif
+
+/* As an attack surface reduction for ports that listen for inbound 
+connections, hang protection can help reduce the impact of SYN floods. */
+#ifndef ipconfigTCP_HANG_PROTECTION
+	#define ipconfigTCP_HANG_PROTECTION  1
+#endif
+
+/* Non-activity timeout is expressed in seconds. */
+#ifndef ipconfigTCP_HANG_PROTECTION_TIME
+	#define ipconfigTCP_HANG_PROTECTION_TIME 30
+#endif
+
+#ifndef ipconfigTCP_IP_SANITY
+	#define ipconfigTCP_IP_SANITY 0
+#endif
+
+#ifndef ipconfigARP_STORES_REMOTE_ADDRESSES
+	#define ipconfigARP_STORES_REMOTE_ADDRESSES 0
+#endif
+
+#ifndef ipconfigBUFFER_PADDING
+	/* Expert option: define a value for 'ipBUFFER_PADDING'.
+	When 'ipconfigBUFFER_PADDING' equals 0,
+	'ipBUFFER_PADDING' will get a default value of 8 + 2 bytes. */
+	#define ipconfigBUFFER_PADDING 0
+#endif
+
+#ifndef ipconfigPACKET_FILLER_SIZE
+	#define ipconfigPACKET_FILLER_SIZE 2
+#endif
+
+#endif /* FREERTOS_DEFAULT_IP_CONFIG_H */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/FreeRTOS_errno_TCP.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/FreeRTOS_errno_TCP.h
new file mode 100644
index 000000000..0253a200d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/FreeRTOS_errno_TCP.h
@@ -0,0 +1,90 @@
+/*
+ * FreeRTOS+TCP V2.2.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+#ifndef FREERTOS_ERRNO_TCP
+#define FREERTOS_ERRNO_TCP
+
+/* The following definitions will be included in the core FreeRTOS code in
+future versions of FreeRTOS - hence the 'pd' (ProjDefs) prefix - at which time
+this file will be removed. */
+
+/* The following errno values are used by FreeRTOS+ components, not FreeRTOS
+itself. */
+
+/* For future compatibility (see comment above), check the definitions have not
+already been made. */
+#ifndef pdFREERTOS_ERRNO_NONE
+	#define pdFREERTOS_ERRNO_NONE			0	/* No errors */
+	#define	pdFREERTOS_ERRNO_ENOENT			2	/* No such file or directory */
+	#define	pdFREERTOS_ERRNO_EINTR			4	/* Interrupted system call */
+	#define	pdFREERTOS_ERRNO_EIO			5	/* I/O error */
+	#define	pdFREERTOS_ERRNO_ENXIO			6	/* No such device or address */
+	#define	pdFREERTOS_ERRNO_EBADF			9	/* Bad file number */
+	#define	pdFREERTOS_ERRNO_EAGAIN			11	/* No more processes */
+	#define	pdFREERTOS_ERRNO_EWOULDBLOCK	11	/* Operation would block */
+	#define	pdFREERTOS_ERRNO_ENOMEM			12	/* Not enough memory */
+	#define	pdFREERTOS_ERRNO_EACCES			13	/* Permission denied */
+	#define	pdFREERTOS_ERRNO_EFAULT			14	/* Bad address */
+	#define	pdFREERTOS_ERRNO_EBUSY			16	/* Mount device busy */
+	#define	pdFREERTOS_ERRNO_EEXIST			17	/* File exists */
+	#define	pdFREERTOS_ERRNO_EXDEV			18	/* Cross-device link */
+	#define	pdFREERTOS_ERRNO_ENODEV			19	/* No such device */
+	#define	pdFREERTOS_ERRNO_ENOTDIR		20	/* Not a directory */
+	#define	pdFREERTOS_ERRNO_EISDIR			21	/* Is a directory */
+	#define	pdFREERTOS_ERRNO_EINVAL			22	/* Invalid argument */
+	#define	pdFREERTOS_ERRNO_ENOSPC			28	/* No space left on device */
+	#define	pdFREERTOS_ERRNO_ESPIPE			29	/* Illegal seek */
+	#define	pdFREERTOS_ERRNO_EROFS			30	/* Read only file system */
+	#define	pdFREERTOS_ERRNO_EUNATCH		42	/* Protocol driver not attached */
+	#define	pdFREERTOS_ERRNO_EBADE			50	/* Invalid exchange */
+	#define	pdFREERTOS_ERRNO_EFTYPE			79	/* Inappropriate file type or format */
+	#define	pdFREERTOS_ERRNO_ENMFILE		89	/* No more files */
+	#define	pdFREERTOS_ERRNO_ENOTEMPTY		90	/* Directory not empty */
+	#define	pdFREERTOS_ERRNO_ENAMETOOLONG 	91	/* File or path name too long */
+	#define	pdFREERTOS_ERRNO_EOPNOTSUPP		95	/* Operation not supported on transport endpoint */
+	#define	pdFREERTOS_ERRNO_ENOBUFS		105	/* No buffer space available */
+	#define	pdFREERTOS_ERRNO_ENOPROTOOPT	109	/* Protocol not available */
+	#define	pdFREERTOS_ERRNO_EADDRINUSE		112	/* Address already in use */
+	#define	pdFREERTOS_ERRNO_ETIMEDOUT		116	/* Connection timed out */
+	#define	pdFREERTOS_ERRNO_EINPROGRESS	119	/* Connection already in progress */
+	#define	pdFREERTOS_ERRNO_EALREADY		120	/* Socket already connected */
+	#define	pdFREERTOS_ERRNO_EADDRNOTAVAIL 	125	/* Address not available */
+	#define	pdFREERTOS_ERRNO_EISCONN		127	/* Socket is already connected */
+	#define	pdFREERTOS_ERRNO_ENOTCONN		128	/* Socket is not connected */
+	#define	pdFREERTOS_ERRNO_ENOMEDIUM		135	/* No medium inserted */
+	#define	pdFREERTOS_ERRNO_EILSEQ			138	/* An invalid UTF-16 sequence was encountered. */
+	#define	pdFREERTOS_ERRNO_ECANCELED		140	/* Operation canceled. */
+
+	/* The following endian values are used by FreeRTOS+ components, not FreeRTOS
+	itself. */
+	#define pdFREERTOS_LITTLE_ENDIAN	0
+	#define pdFREERTOS_BIG_ENDIAN		1
+
+#endif /* pdFREERTOS_ERRNO_NONE */
+
+#endif /* FREERTOS_ERRNO_TCP */
+
+
+
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/IPTraceMacroDefaults.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/IPTraceMacroDefaults.h
new file mode 100644
index 000000000..0af7189dd
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/IPTraceMacroDefaults.h
@@ -0,0 +1,193 @@
+/*
+ * FreeRTOS+TCP V2.2.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+/* This file provides default (empty) implementations for any IP trace macros
+that are not defined by the user.  See
+http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/TCP_IP_Trace.html */
+
+#ifndef UDP_TRACE_MACRO_DEFAULTS_H
+#define UDP_TRACE_MACRO_DEFAULTS_H
+
+#ifndef iptraceNETWORK_DOWN
+	#define iptraceNETWORK_DOWN()
+#endif
+
+#ifndef iptraceNETWORK_BUFFER_RELEASED
+	#define iptraceNETWORK_BUFFER_RELEASED( pxBufferAddress )
+#endif
+
+#ifndef iptraceNETWORK_BUFFER_OBTAINED
+	#define iptraceNETWORK_BUFFER_OBTAINED( pxBufferAddress )
+#endif
+
+#ifndef iptraceNETWORK_BUFFER_OBTAINED_FROM_ISR
+	#define iptraceNETWORK_BUFFER_OBTAINED_FROM_ISR( pxBufferAddress )
+#endif
+
+#ifndef iptraceFAILED_TO_OBTAIN_NETWORK_BUFFER
+	#define iptraceFAILED_TO_OBTAIN_NETWORK_BUFFER()
+#endif
+
+#ifndef iptraceFAILED_TO_OBTAIN_NETWORK_BUFFER_FROM_ISR
+	#define iptraceFAILED_TO_OBTAIN_NETWORK_BUFFER_FROM_ISR()
+#endif
+
+#ifndef iptraceCREATING_ARP_REQUEST
+	#define iptraceCREATING_ARP_REQUEST( ulIPAddress )
+#endif
+
+#ifndef iptraceARP_TABLE_ENTRY_WILL_EXPIRE
+	#define iptraceARP_TABLE_ENTRY_WILL_EXPIRE( ulIPAddress )
+#endif
+
+#ifndef iptraceARP_TABLE_ENTRY_EXPIRED
+	#define iptraceARP_TABLE_ENTRY_EXPIRED( ulIPAddress )
+#endif
+
+#ifndef iptraceARP_TABLE_ENTRY_CREATED
+	#define iptraceARP_TABLE_ENTRY_CREATED( ulIPAddress, ucMACAddress )
+#endif
+
+#ifndef iptraceSENDING_UDP_PACKET
+	#define iptraceSENDING_UDP_PACKET( ulIPAddress )
+#endif
+
+#ifndef iptracePACKET_DROPPED_TO_GENERATE_ARP
+	#define iptracePACKET_DROPPED_TO_GENERATE_ARP( ulIPAddress )
+#endif
+
+#ifndef iptraceICMP_PACKET_RECEIVED
+	#define iptraceICMP_PACKET_RECEIVED()
+#endif
+
+#ifndef iptraceSENDING_PING_REPLY
+	#define iptraceSENDING_PING_REPLY( ulIPAddress )
+#endif
+
+#ifndef traceARP_PACKET_RECEIVED
+	#define traceARP_PACKET_RECEIVED()
+#endif
+
+#ifndef iptracePROCESSING_RECEIVED_ARP_REPLY
+	#define iptracePROCESSING_RECEIVED_ARP_REPLY( ulIPAddress )
+#endif
+
+#ifndef iptraceSENDING_ARP_REPLY
+	#define iptraceSENDING_ARP_REPLY( ulIPAddress )
+#endif
+
+#ifndef iptraceFAILED_TO_CREATE_SOCKET
+	#define iptraceFAILED_TO_CREATE_SOCKET()
+#endif
+
+#ifndef iptraceFAILED_TO_CREATE_EVENT_GROUP
+	#define iptraceFAILED_TO_CREATE_EVENT_GROUP()
+#endif
+
+#ifndef iptraceRECVFROM_DISCARDING_BYTES
+	#define iptraceRECVFROM_DISCARDING_BYTES( xNumberOfBytesDiscarded )
+#endif
+
+#ifndef iptraceETHERNET_RX_EVENT_LOST
+	#define iptraceETHERNET_RX_EVENT_LOST()
+#endif
+
+#ifndef iptraceSTACK_TX_EVENT_LOST
+	#define iptraceSTACK_TX_EVENT_LOST( xEvent )
+#endif
+
+#ifndef iptraceNETWORK_EVENT_RECEIVED
+	#define iptraceNETWORK_EVENT_RECEIVED( eEvent )
+#endif
+
+#ifndef iptraceBIND_FAILED
+	#define iptraceBIND_FAILED( xSocket, usPort )
+#endif
+
+#ifndef iptraceDHCP_REQUESTS_FAILED_USING_DEFAULT_IP_ADDRESS
+	#define iptraceDHCP_REQUESTS_FAILED_USING_DEFAULT_IP_ADDRESS( ulIPAddress )
+#endif
+
+#ifndef iptraceSENDING_DHCP_DISCOVER
+	#define iptraceSENDING_DHCP_DISCOVER()
+#endif
+
+#ifndef iptraceSENDING_DHCP_REQUEST
+	#define iptraceSENDING_DHCP_REQUEST()
+#endif
+
+#ifndef iptraceDHCP_SUCCEDEED
+	#define iptraceDHCP_SUCCEDEED( address )
+#endif
+
+#ifndef iptraceNETWORK_INTERFACE_TRANSMIT
+	#define iptraceNETWORK_INTERFACE_TRANSMIT()
+#endif
+
+#ifndef iptraceNETWORK_INTERFACE_RECEIVE
+	#define iptraceNETWORK_INTERFACE_RECEIVE()
+#endif
+
+#ifndef iptraceSENDING_DNS_REQUEST
+	#define iptraceSENDING_DNS_REQUEST()
+#endif
+
+#ifndef	iptraceWAITING_FOR_TX_DMA_DESCRIPTOR
+	#define iptraceWAITING_FOR_TX_DMA_DESCRIPTOR()
+#endif
+
+#ifndef ipconfigINCLUDE_EXAMPLE_FREERTOS_PLUS_TRACE_CALLS
+	#define ipconfigINCLUDE_EXAMPLE_FREERTOS_PLUS_TRACE_CALLS 0
+#endif
+
+#ifndef iptraceFAILED_TO_NOTIFY_SELECT_GROUP
+	#define iptraceFAILED_TO_NOTIFY_SELECT_GROUP( xSocket )
+#endif
+
+#ifndef pvPortMallocSocket
+	#define pvPortMallocSocket(xSize) pvPortMalloc( ( xSize ) )
+#endif
+
+#ifndef iptraceRECVFROM_TIMEOUT
+	#define iptraceRECVFROM_TIMEOUT()
+#endif
+
+#ifndef iptraceRECVFROM_INTERRUPTED
+	#define iptraceRECVFROM_INTERRUPTED()
+#endif
+
+#ifndef iptraceNO_BUFFER_FOR_SENDTO
+	#define iptraceNO_BUFFER_FOR_SENDTO()
+#endif
+
+#ifndef iptraceSENDTO_SOCKET_NOT_BOUND
+	#define iptraceSENDTO_SOCKET_NOT_BOUND()
+#endif
+
+#ifndef iptraceSENDTO_DATA_TOO_LONG
+	#define iptraceSENDTO_DATA_TOO_LONG()
+#endif
+
+#endif /* UDP_TRACE_MACRO_DEFAULTS_H */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/NetworkBufferManagement.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/NetworkBufferManagement.h
new file mode 100644
index 000000000..d57e607ac
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/NetworkBufferManagement.h
@@ -0,0 +1,70 @@
+/*
+ * FreeRTOS+TCP V2.2.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+#ifndef NETWORK_BUFFER_MANAGEMENT_H
+#define NETWORK_BUFFER_MANAGEMENT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* NOTE PUBLIC API FUNCTIONS. */
+BaseType_t xNetworkBuffersInitialise( void );
+NetworkBufferDescriptor_t *pxGetNetworkBufferWithDescriptor( size_t xRequestedSizeBytes, TickType_t xBlockTimeTicks );
+NetworkBufferDescriptor_t *pxNetworkBufferGetFromISR( size_t xRequestedSizeBytes );
+void vReleaseNetworkBufferAndDescriptor( NetworkBufferDescriptor_t * const pxNetworkBuffer );
+BaseType_t vNetworkBufferReleaseFromISR( NetworkBufferDescriptor_t * const pxNetworkBuffer );
+uint8_t *pucGetNetworkBuffer( size_t *pxRequestedSizeBytes );
+void vReleaseNetworkBuffer( uint8_t *pucEthernetBuffer );
+
+/* Get the current number of free network buffers. */
+UBaseType_t uxGetNumberOfFreeNetworkBuffers( void );
+
+/* Get the lowest number of free network buffers. */
+UBaseType_t uxGetMinimumFreeNetworkBuffers( void );
+
+/* Copy a network buffer into a bigger buffer. */
+NetworkBufferDescriptor_t *pxDuplicateNetworkBufferWithDescriptor( NetworkBufferDescriptor_t * const pxNetworkBuffer,
+	size_t uxNewLength);
+
+/* Increase the size of a Network Buffer.
+In case BufferAllocation_2.c is used, the new space must be allocated. */
+NetworkBufferDescriptor_t *pxResizeNetworkBufferWithDescriptor( NetworkBufferDescriptor_t * pxNetworkBuffer,
+	size_t xNewSizeBytes );
+
+#if ipconfigTCP_IP_SANITY
+	/*
+	 * Check if an address is a valid pointer to a network descriptor
+	 * by looking it up in the array of network descriptors
+	 */
+	UBaseType_t bIsValidNetworkDescriptor (const NetworkBufferDescriptor_t * pxDesc);
+	BaseType_t prvIsFreeBuffer( const NetworkBufferDescriptor_t *pxDescr );
+#endif
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+
+#endif /* NETWORK_BUFFER_MANAGEMENT_H */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/NetworkInterface.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/NetworkInterface.h
new file mode 100644
index 000000000..8f1fb3219
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/NetworkInterface.h
@@ -0,0 +1,44 @@
+/*
+ * FreeRTOS+TCP V2.2.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://aws.amazon.com/freertos
+ * http://www.FreeRTOS.org
+ */
+
+#ifndef NETWORK_INTERFACE_H
+#define NETWORK_INTERFACE_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* NOTE PUBLIC API FUNCTIONS. */
+BaseType_t xNetworkInterfaceInitialise( void );
+BaseType_t xNetworkInterfaceOutput( NetworkBufferDescriptor_t * const pxNetworkBuffer, BaseType_t xReleaseAfterSend );
+void vNetworkInterfaceAllocateRAMToBuffers( NetworkBufferDescriptor_t pxNetworkBuffers[ ipconfigNUM_NETWORK_BUFFER_DESCRIPTORS ] );
+BaseType_t xGetPhyLinkStatus( void );
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+
+#endif /* NETWORK_INTERFACE_H */
+
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/WinBase.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/WinBase.h
new file mode 100644
index 000000000..5df6b044f
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/WinBase.h
@@ -0,0 +1 @@
+/* Nothing to do */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/Windows.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/Windows.h
new file mode 100644
index 000000000..5df6b044f
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/Windows.h
@@ -0,0 +1 @@
+/* Nothing to do */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/pack_struct_end.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/pack_struct_end.h
new file mode 100644
index 000000000..df63bc18d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/pack_struct_end.h
@@ -0,0 +1,33 @@
+/*
+FreeRTOS+TCP V2.0.11
+Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy of
+this software and associated documentation files (the "Software"), to deal in
+the Software without restriction, including without limitation the rights to
+use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+the Software, and to permit persons to whom the Software is furnished to do so,
+subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all
+copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+ http://aws.amazon.com/freertos
+ http://www.FreeRTOS.org
+*/
+
+/*****************************************************************************
+ *
+ * See the following URL for an explanation of this file:
+ * http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/Embedded_Compiler_Porting.html
+ *
+ *****************************************************************************/
+__attribute__( (packed) );
+
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/pack_struct_start.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/pack_struct_start.h
new file mode 100644
index 000000000..26a8bc9a7
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/pack_struct_start.h
@@ -0,0 +1,33 @@
+/*
+FreeRTOS+TCP V2.0.11
+Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+
+Permission is hereby granted, free of charge, to any person obtaining a copy of
+this software and associated documentation files (the "Software"), to deal in
+the Software without restriction, including without limitation the rights to
+use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+the Software, and to permit persons to whom the Software is furnished to do so,
+subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all
+copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+
+ http://aws.amazon.com/freertos
+ http://www.FreeRTOS.org
+*/
+
+/*****************************************************************************
+ *
+ * See the following URL for an explanation of this file:
+ * http://www.FreeRTOS.org/FreeRTOS-Plus/FreeRTOS_Plus_TCP/Embedded_Compiler_Porting.html
+ *
+ *****************************************************************************/
+
+/* Nothing to do here. */
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/portmacro.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/portmacro.h
new file mode 100644
index 000000000..caa7dd990
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Config_files/portmacro.h
@@ -0,0 +1,162 @@
+/*
+ * FreeRTOS Kernel V10.3.0
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+#ifndef PORTMACRO_H
+#define PORTMACRO_H
+
+#include <Windows.h>
+#include <WinBase.h>
+
+/******************************************************************************
+	Defines
+******************************************************************************/
+/* Type definitions. */
+#define portCHAR		char
+#define portFLOAT		float
+#define portDOUBLE		double
+#define portLONG		long
+#define portSHORT		short
+#define portSTACK_TYPE	size_t
+#define portBASE_TYPE	long
+#define portPOINTER_SIZE_TYPE size_t
+
+typedef portSTACK_TYPE StackType_t;
+typedef long BaseType_t;
+typedef unsigned long UBaseType_t;
+
+
+#if( configUSE_16_BIT_TICKS == 1 )
+    typedef uint16_t TickType_t;
+    #define portMAX_DELAY ( TickType_t ) 0xffff
+#else
+    typedef uint32_t TickType_t;
+    #define portMAX_DELAY ( TickType_t ) 0xffffffffUL
+
+	/* 32/64-bit tick type on a 32/64-bit architecture, so reads of the tick
+	count do not need to be guarded with a critical section. */
+	#define portTICK_TYPE_IS_ATOMIC 1
+#endif
+
+/* Hardware specifics. */
+#define portSTACK_GROWTH			( -1 )
+#define portTICK_PERIOD_MS			( ( TickType_t ) 1000 / configTICK_RATE_HZ )
+#define portINLINE
+
+#if defined( __x86_64__) || defined( _M_X64 )
+	#define portBYTE_ALIGNMENT		8
+#else
+	#define portBYTE_ALIGNMENT		4
+#endif
+
+#define portYIELD()					vPortGenerateSimulatedInterrupt( portINTERRUPT_YIELD )
+
+
+extern volatile BaseType_t xInsideInterrupt;
+#define portSOFTWARE_BARRIER() while( xInsideInterrupt != pdFALSE )
+
+
+/* Simulated interrupts return pdFALSE if no context switch should be performed,
+or a non-zero number if a context switch should be performed. */
+#define portYIELD_FROM_ISR( x ) ( void ) x
+#define portEND_SWITCHING_ISR( x ) portYIELD_FROM_ISR( ( x ) )
+
+void vPortCloseRunningThread( void *pvTaskToDelete, volatile BaseType_t *pxPendYield );
+void vPortDeleteThread( void *pvThreadToDelete );
+#define portCLEAN_UP_TCB( pxTCB )	vPortDeleteThread( pxTCB )
+#define portPRE_TASK_DELETE_HOOK( pvTaskToDelete, pxPendYield ) vPortCloseRunningThread( ( pvTaskToDelete ), ( pxPendYield ) )
+#define portDISABLE_INTERRUPTS() vPortEnterCritical()
+#define portENABLE_INTERRUPTS() vPortExitCritical()
+
+/* Critical section handling. */
+void vPortEnterCritical( void );
+void vPortExitCritical( void );
+
+#define portENTER_CRITICAL()		vPortEnterCritical()
+#define portEXIT_CRITICAL()			vPortExitCritical()
+
+#ifndef configUSE_PORT_OPTIMISED_TASK_SELECTION
+	#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
+#endif
+
+#if configUSE_PORT_OPTIMISED_TASK_SELECTION == 1
+
+	/* Check the configuration. */
+	#if( configMAX_PRIORITIES > 32 )
+		#error configUSE_PORT_OPTIMISED_TASK_SELECTION can only be set to 1 when configMAX_PRIORITIES is less than or equal to 32.  It is very rare that a system requires more than 10 to 15 difference priorities as tasks that share a priority will time slice.
+	#endif
+
+	/* Store/clear the ready priorities in a bit map. */
+	#define portRECORD_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) |= ( 1UL << ( uxPriority ) )
+	#define portRESET_READY_PRIORITY( uxPriority, uxReadyPriorities ) ( uxReadyPriorities ) &= ~( 1UL << ( uxPriority ) )
+
+
+	/*-----------------------------------------------------------*/
+
+	#ifdef __GNUC__
+		#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities )	\
+			__asm volatile(	"bsr %1, %0\n\t" 									\
+							:"=r"(uxTopPriority) : "rm"(uxReadyPriorities) : "cc" )
+	#else
+		/* BitScanReverse returns the bit position of the most significant '1'
+		in the word. */
+		#define portGET_HIGHEST_PRIORITY( uxTopPriority, uxReadyPriorities ) _BitScanReverse( ( DWORD * ) &( uxTopPriority ), ( uxReadyPriorities ) )
+	#endif /* __GNUC__ */
+
+#endif /* taskRECORD_READY_PRIORITY */
+
+#ifndef __GNUC__
+	__pragma( warning( disable:4211 ) ) /* Nonstandard extension used, as extern is only nonstandard to MSVC. */
+#endif
+
+
+/* Task function macros as described on the FreeRTOS.org WEB site. */
+#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
+#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
+
+#define portINTERRUPT_YIELD				( 0UL )
+#define portINTERRUPT_TICK				( 1UL )
+
+/*
+ * Raise a simulated interrupt represented by the bit mask in ulInterruptMask.
+ * Each bit can be used to represent an individual interrupt - with the first
+ * two bits being used for the Yield and Tick interrupts respectively.
+*/
+void vPortGenerateSimulatedInterrupt( uint32_t ulInterruptNumber );
+
+/*
+ * Install an interrupt handler to be called by the simulated interrupt handler
+ * thread.  The interrupt number must be above any used by the kernel itself
+ * (at the time of writing the kernel was using interrupt numbers 0, 1, and 2
+ * as defined above).  The number must also be lower than 32.
+ *
+ * Interrupt handler functions must return a non-zero value if executing the
+ * handler resulted in a task switch being required.
+ */
+void vPortSetInterruptHandler( uint32_t ulInterruptNumber, uint32_t (*pvHandler)( void ) );
+
+#endif
+
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Makefile b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Makefile
new file mode 100644
index 000000000..2cf572cbb
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/Makefile
@@ -0,0 +1,110 @@
+#CC := /usr/local/bin/gcc
+#GCOV := /usr/local/bin/gcov
+
+EXECUTABLE=cmock_test
+ROOT_DIR ?= $(shell pwd)
+
+CONFIGURATION_DIR ?= ${ROOT_DIR}/tools/configuration
+
+CMOCK_DIR ?= ${ROOT_DIR}/../CMock
+CMOCK_SRC_DIR ?= ${CMOCK_DIR}/src
+CMOCK_INCLUDE_DIR ?= ${CMOCK_SRC_DIR}
+CMOCK_LIB_DIR ?= ${CMOCK_DIR}/lib
+
+UNITY_DIR ?= ${CMOCK_DIR}/vendor/unity
+UNITY_SRC_DIR ?= ${UNITY_DIR}/src
+UNITY_INCLUDE_DIR ?= ${UNITY_SRC_DIR}
+UNITY_BIN_DIR ?= ${UNITY_DIR}/auto
+UNITY_FIXTURE_DIR ?= ${UNITY_DIR}/extras/fixture/src
+UNITY_MEMORY_DIR ?= ${UNITY_DIR}/extras/memory/src
+
+BUILD_DIR ?= ${ROOT_DIR}/build
+LIB_DIR ?= ${ROOT_DIR}/build/lib
+BIN_DIR ?= ${ROOT_DIR}/build/bin
+MOCKS_DIR ?= ${ROOT_DIR}/build/mocks
+GEN_DIR ?= ${ROOT_DIR}/build/generated
+
+SRC_DIR ?= ${ROOT_DIR}/../../Source/FreeRTOS-Plus-TCP/test
+
+EXAMPLE_DIR ?= ${ROOT_DIR}/tests/example
+
+CONFIG_FILES_DIR ?= $(ROOT_DIR)/Config_files
+TEST_DIR ?= test
+
+KERNEL_INCLUDES ?= ${ROOT_DIR}/../../../FreeRTOS/Source/include
+
+# ${FREE_RTOS_INCLUDE_DIR}/FreeRTOS_IP.h       -I ${FREE_RTOS_INCLUDE_DIR}
+
+INCLUDE_DIR ?= -I ${ROOT_DIR} -I ${ROOT_DIR}/tests/example -I $(CONFIG_FILES_DIR) -I ${CMOCK_INCLUDE_DIR} -I ${UNITY_INCLUDE_DIR} -I ${MOCKS_DIR} -I ${UNITY_FIXTURE_DIR} -I ${SRC_DIR} -I ${UNITY_MEMORY_DIR}
+
+MOCK_HEADERS ?= ${ROOT_DIR}/tests/example/some_value.h
+
+CODE_COVERAGE ?= -fprofile-arcs -ftest-coverage -fprofile-generate
+
+.PHONY: all clean directories mocks coverage run
+
+all: ${LIB_DIR}/libcmock.so ${LIB_DIR}/libunity.so directories mocks ${BIN_DIR}/${EXECUTABLE}
+
+directories:
+	mkdir -p ${BUILD_DIR}
+	mkdir -p ${MOCKS_DIR}
+	mkdir -p ${LIB_DIR}
+	mkdir -p ${BIN_DIR}
+	mkdir -p ${GEN_DIR}
+
+mocks: directories
+	cd ${BUILD_DIR} && ruby  ${CMOCK_LIB_DIR}/cmock.rb -o${CONFIGURATION_DIR}/project.yml ${MOCK_HEADERS}
+	@echo "\n"
+
+${LIB_DIR}/libcmock.so: ${CMOCK_SRC_DIR}/cmock.c ${CMOCK_SRC_DIR}/cmock.h Makefile ${LIB_DIR}/libunity.so
+	${CC} -o $@ -shared -fPIC  $<  ${INCLUDE_DIR}
+	@echo "\n"
+
+${LIB_DIR}/libunity.so: ${UNITY_SRC_DIR}/unity.c ${CMOCK_SRC_DIR}/cmock.h Makefile directories
+	${CC} -o $@ -shared -fPIC  $< -I ${UNITY_INCLUDE_DIR}
+	@echo "\n"
+
+#=============================================================================================
+#============== LIST ALL THE HEADERS YOU WANT TO MOCK IN SIMILAR MANNER  =====================
+${LIB_DIR}/mock_some_value.o: ${MOCKS_DIR}/mock_some_value.c mocks Makefile
+	${CC} -c $< -o $@ ${INCLUDE_DIR} -fPIC
+
+COMMON_OBJECTS ?= ${LIB_DIR}/mock_some_value.o
+
+
+#=============================================================================================
+#======================== LIST ALL THE TEST SOURCE FILES HERE ================================
+TEST_FILES ?= ${EXAMPLE_DIR}/hello_world_test.c
+
+#=============================================================================================
+#===================== LIST ALL THE SOURCE FILES UNDER TEST HERE =============================
+SOURCE_FILES ?= ${EXAMPLE_DIR}/hello_world.c
+#---------------------------------------------------------------------------------------------
+#=============================================================================================
+
+
+${LIB_DIR}/libcommon.so: ${COMMON_OBJECTS}
+	${CC} -o $@ -shared -fPIC $+ ${INCLUDE_DIR} ${CODE_COVERAGE} -lgcov
+
+
+${GEN_DIR}/${EXECUTABLE}_test_runner.c: mocks Makefile ${LIB_DIR}/libunity.so ${LIB_DIR}/libcmock.so
+	ruby ${UNITY_BIN_DIR}/generate_test_runner.rb   ${CONFIGURATION_DIR}/project.yml ${ROOT_DIR}/tests/example/hello_world_test.c $@
+	@echo "\n"
+
+
+${BIN_DIR}/${EXECUTABLE}: ${GEN_DIR}/${EXECUTABLE}_test_runner.c ${TEST_FILES} ${SOURCE_FILES} ${LIB_DIR}/libcommon.so
+	${CC} --coverage -o $@  $+  ${INCLUDE_DIR} -L ${LIB_DIR} -Wl,-rpath,${LIB_DIR} -lunity -lcmock -lcommon
+	@echo "\n"
+
+clean:
+	@rm -rf build
+	@rm -f *.gcda  *.gcno
+	@echo "Cleaned...\n"
+
+run:  ${BIN_DIR}/${EXECUTABLE}
+	${BIN_DIR}/${EXECUTABLE}
+
+coverage: run
+	lcov --base-directory . --directory . -c --rc lcov_branch_coverage=1 --rc genhtml_branch_coverage=1  -o build/cmock_test.info
+	genhtml build/cmock_test.info --branch-coverage --output-directory build/coverage_html
+
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/README.md b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/README.md
new file mode 100644
index 000000000..44b232808
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/README.md
@@ -0,0 +1,42 @@
+# Unit Tests for FreeRTOS-Plus libraries
+This directory is made for the purpose of Unit testing and tries to provide the tools for developing unit tests along with a simple example. To that end, this directory submodules the [CMock](https://github.com/ThrowTheSwitch/CMock) framework (which submodules [Unity](https://github.com/throwtheswitch/unity/tree/cf949f45ca6d172a177b00da21310607b97bc7a7)).
+
+## Getting Started
+### Prerequisites
+You can run this on any GNU Make compatible systems. But in case of DOS based systems some tweaking is required with the makefile.
+To compile and run this project successfully, you must have the following:
+1. Make (You can check whether you have this by typing `make --version`)
+    - Not found? Try `apt-get install make`.
+2. Ruby (You can check whether you have this by typing `ruby --version`)
+    - Not found? Try `apt-get install ruby`.
+3. Downloaded the repo with --recurse-submodules option to include CMock (and by extension Unity) in the cloned repo.
+    - `git clone https://github.com/FreeRTOS/FreeRTOS.git --recurse-submodules ./FreeRTOS_Dir`
+
+### To run the Unit tests:
+Go to `FreeRTOS/FreeRTOS-Plus/Test/Unit-Tests`. Most probably you are in the mentioned directory already.
+Run:
+- `make clean`
+- `make coverage`
+
+You should see an output similar to this:
+```
+-----------------------
+3 Tests 0 Failures 0 Ignored 
+OK
+Capturing coverage data from .
+... <Skipped some lines here for the sake of brevity>
+Overall coverage rate:
+  lines......: 84.8% (56 of 66 lines)
+  functions..: 85.7% (12 of 14 functions)
+  branches...: 50.0% (2 of 4 branches)
+
+```
+
+NOTE: after this point all directories mentioned in the README will be relative to this path: `FreeRTOS/FreeRTOS-Plus/Test/Unit-Tests`
+
+## Examples:
+The examples are present in `/tests/example` directory. The examples are in the form of a few small '.c' and '.h' files. Open those files and have a look at all of them. These files try to show all scenarios which you might find in actual libraries (e.g. One module calling functions defined in other modules by including corresponding header files etc.).
+The file that tests the functions in `hello_world.c` file is aptly named `hello_world_test.c`. It includes a header file `mock_some_value.h`. This header is present there since we will be mocking the functions declared in the file `some_value.h`.
+
+### The Makefile
+The makefile is used to make the development easier by doing all the backend work required to make CMock and Unity work. The Makefile has a special section which is bound by commented headings directing what is to be added in which section. Else everything should be self explanatory.
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/tests/example/hello_world.c b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/tests/example/hello_world.c
new file mode 100644
index 000000000..3b17828bb
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/tests/example/hello_world.c
@@ -0,0 +1,14 @@
+#include "hello_world.h"
+#include "some_value.h"
+
+int8_t average(int8_t value1, int8_t value2, int8_t value3)
+{
+	return (int8_t)( ( (int16_t)value1 + (int16_t)value2 + (int16_t)value3) / 3 );
+}
+
+int Print_Hello_world( void )
+{
+	int32_t value;
+        value = some_number();
+	return printf("Hello World! %d\n",  value);
+}
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/tests/example/hello_world.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/tests/example/hello_world.h
new file mode 100644
index 000000000..b9c833443
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/tests/example/hello_world.h
@@ -0,0 +1,10 @@
+#ifndef __HELLO_WORLD__
+#define __HELLO_WORLD__
+
+#include <stdio.h>
+#include <stdint.h>
+
+int8_t average(int8_t value1, int8_t value2, int8_t value3);
+int Print_Hello_world( void );
+
+#endif
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/tests/example/hello_world_test.c b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/tests/example/hello_world_test.c
new file mode 100644
index 000000000..c916c051d
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/tests/example/hello_world_test.c
@@ -0,0 +1,46 @@
+/* Include Unity header */
+#include <unity.h>
+
+/* Include standard libraries */
+#include <stdlib.h>
+#include <string.h>
+
+#include "mock_some_value.h"
+
+/* Include header file(s) which have declaration 
+ * of functions under test */
+#include "hello_world.h"
+
+void test_average_normal( void )
+{
+    int8_t result;
+
+    /* Check normal operation */
+    result = average(4, 5, 6);
+    TEST_ASSERT_EQUAL_INT(5, result);
+
+    /* Check whether the buffer used to store
+     * intermediate result overflows or not */
+    result = average(255, 255, 255);
+    TEST_ASSERT_EQUAL_INT(-1, result);
+
+}
+
+void test_average_round_off( void )
+{
+    int8_t result;
+
+    /* Check the round off value */
+    result = average(1, 2, 2);
+    TEST_ASSERT_EQUAL_INT(1, result);
+}
+
+void test_Print_Hello_world( void )
+{
+    int32_t result;
+
+    /* check how the Printf returns the value */
+    some_number_ExpectAndReturn( 5 );
+    result = Print_Hello_world();
+    TEST_ASSERT_EQUAL_INT(15, result);
+}
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/tests/example/some_value.c b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/tests/example/some_value.c
new file mode 100644
index 000000000..bae21d0b6
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/tests/example/some_value.c
@@ -0,0 +1,6 @@
+#include "some_value.h"
+
+int32_t some_number( void )
+{
+	return ( int32_t ) 24;
+}
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/tests/example/some_value.h b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/tests/example/some_value.h
new file mode 100644
index 000000000..443042f30
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/tests/example/some_value.h
@@ -0,0 +1,9 @@
+#ifndef __SOME_VALUE__
+#define __SOME_VALUE__
+
+#include <stdio.h>
+#include <stdint.h>
+
+int32_t some_number( void );
+
+#endif
diff --git a/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/tools/configuration/project.yml b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/tools/configuration/project.yml
new file mode 100644
index 000000000..cf49360e9
--- /dev/null
+++ b/FreeRTOS-Plus/Test/FreeRTOS-Plus-TCP/Unit/tools/configuration/project.yml
@@ -0,0 +1,60 @@
+
+:cmock:
+  :mock_prefix: mock_
+  :when_no_prototypes: :warn
+  :enforce_strict_ordering: TRUE
+  :plugins:
+    - :ignore
+    - :ignore_arg
+    - :expect_any_args
+    - :array
+    - :callback
+    - :return_thru_ptr
+  :callback_include_count: true # include a count arg when calling the callback
+  :callback_after_arg_check: false # check arguments before calling the callback
+  :treat_as:
+    uint8:    HEX8
+    uint16:   HEX16
+    uint32:   UINT32
+    int8:     INT8
+    bool:     UINT8
+  :includes:        # This will add these includes to each mock.
+    - <stdbool.h>
+    - <stdint.h>
+    - <fcntl.h>
+  :weak: __attribute__((weak))
+  :verbosity: 3
+  :attributes:
+    - PRIVILEGED_FUNCTION
+    - 'int fcntl(int s, int cmd, ...);'
+  :strippables:
+    - PRIVILEGED_FUNCTION
+    - portDONT_DISCARD
+    - '(?:fcntl\s*\(+.*?\)+)' # this function is causing some trouble with code coverage as the annotations are calling the mocked one, so we won't mock it
+
+    #No stop some functions from being mocked..
+    - '(?:<YOUR_FUNCTION_NAME>\s*\(+.*?\)+)'
+    - '(?:FreeRTOS_max_uint32\s*\(+.*?\)+)'
+    - '(?:FreeRTOS_min_int32\s*\(+.*?\)+)'
+    - '(?:FreeRTOS_min_uint32\s*\(+.*?\)+)'
+    - '(?:FreeRTOS_round_up\s*\(+.*?\)+)'
+    - '(?:FreeRTOS_round_down\s*\(+.*?\)+)'
+    - '(?:FreeRTOS_min_BaseType\s*\(+.*?\)+)'
+    - '(?:FreeRTOS_max_BaseType\s*\(+.*?\)+)'
+    - '(?:FreeRTOS_max_UBaseType\s*\(+.*?\)+)'
+    - '(?:FreeRTOS_min_UBaseType\s*\(+.*?\)+)'
+    #in FreeRTOS_IP_Private.h
+    - '(?:ulChar2u32\s*\(+.*?\)+)'
+    - '(?:usChar2u16\s*\(+.*?\)+)'
+    #declared in multiple files
+    - '(?:FreeRTOS_netstat\s*\(+.*?\)+)'
+  :treat_externs: :include
+
+#  :includes_c_pre_header:
+#    - "portableDefs.h"
+#  :includes_h_pre_orig_headder:
+#    - "portableDefs.h"
+#  :includes:
+#    - "portableDefs.h"
+#    - "projdefs.h"
+#    - "task.h"
diff --git a/FreeRTOS-Plus/Test/README.md b/FreeRTOS-Plus/Test/README.md
new file mode 100644
index 000000000..bb16f7f8a
--- /dev/null
+++ b/FreeRTOS-Plus/Test/README.md
@@ -0,0 +1,13 @@
+## Testing in FreeRTOS
+FreeRTOS (kernel and libraries) consists of common code and porting layer. Extensive [static analysis](https://en.wikipedia.org/wiki/Static_program_analysis) and [dynamic analysis](https://en.wikipedia.org/wiki/Dynamic_program_analysis) are done on both to ensure functional correctness of FreeRTOS.
+
+Additional bounded-ness checks are done using [CBMC](https://www.cprover.org/cbmc/). Although these checks do not cover all functions, they cover considerable chunk of code base. Missing CBMC tests will be added later.
+
+For more information on FreeRTOS testing please refer to https://www.freertos.org/FreeRTOS-Coding-Standard-and-Style-Guide.html.
+
+## Directory structure
+This directory is in working progress -- we are migrating scattered test cases to this directory. Here only lists what's currently under this directory. 
+
+- ```./CBMC```: This directory contains automated proofs of the memory safety of various parts of the FreeRTOS code base.
+- ```./CMock```: This directory has the submoduled version of CMock for providing basis Unit testing
+- ```./Unit-Tests```: This directory has the Unit tests for FreeRTOS-Plus libraries. As of now, just Unit tests for +TCP (testing these).